text
stringlengths 41
20k
|
|---|
///////////////////////////////////////////////////////////////////////////////////
// __ _ _ _ //
// / _(_) | | | | //
// __ _ _ _ ___ ___ _ __ | |_ _ ___| | __| | //
// / _` | | | |/ _ \/ _ \ '_ \| _| |/ _ \ |/ _` | //
// | (_| | |_| | __/ __/ | | | | | | __/ | (_| | //
// \__, |\__,_|\___|\___|_| |_|_| |_|\___|_|\__,_| //
// | | //
// |_| //
// //
// //
// Peripheral-NTM for MPSoC //
// Neural Turing Machine for MPSoC //
// //
///////////////////////////////////////////////////////////////////////////////////
///////////////////////////////////////////////////////////////////////////////////
// //
// Copyright (c) 2020-2024 by the author(s) //
// //
// Permission is hereby granted, free of charge, to any person obtaining a copy //
// of this software and associated documentation files (the "Software"), to deal //
// in the Software without restriction, including without limitation the rights //
// to use, copy, modify, merge, publish, distribute, sublicense, and/or sell //
// copies of the Software, and to permit persons to whom the Software is //
// furnished to do so, subject to the following conditions: //
// //
// The above copyright notice and this permission notice shall be included in //
// all copies or substantial portions of the Software. //
// //
// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR //
// IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, //
// FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE //
// AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER //
// LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, //
// OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN //
// THE SOFTWARE. //
// //
// ============================================================================= //
// Author(s): //
// Paco Reina Campo <[email protected]> //
// //
///////////////////////////////////////////////////////////////////////////////////
#include "systemc.h"
#define SIZE_I_IN 4
#define SIZE_J_IN 4
#define SIZE_K_IN 4
SC_MODULE(tensor_subtractor) {
sc_in_clk clock;
sc_in<sc_int<64>> data_a_in[SIZE_I_IN][SIZE_J_IN][SIZE_K_IN];
sc_in<sc_int<64>> data_b_in[SIZE_I_IN][SIZE_J_IN][SIZE_K_IN];
sc_out<sc_int<64>> data_out[SIZE_I_IN][SIZE_J_IN][SIZE_K_IN];
SC_CTOR(tensor_subtractor) {
SC_METHOD(subtractor);
sensitive << clock.pos();
for (int i = 0; i < SIZE_I_IN; i++) {
for (int j = 0; j < SIZE_J_IN; j++) {
for (int k = 0; k < SIZE_K_IN; k++) {
sensitive << data_a_in[i][j][k];
sensitive << data_b_in[i][j][k];
}
}
}
}
void subtractor() {
for (int i = 0; i < SIZE_I_IN; i++) {
for (int j = 0; j < SIZE_J_IN; j++) {
for (int k = 0; k < SIZE_K_IN; k++) {
data_out[i][j][k].write(data_a_in[i][j][k].read() - data_b_in[i][j][k].read());
}
}
}
}
};
|
///////////////////////////////////////////////////////////////////////////////////
// __ _ _ _ //
// / _(_) | | | | //
// __ _ _ _ ___ ___ _ __ | |_ _ ___| | __| | //
// / _` | | | |/ _ \/ _ \ '_ \| _| |/ _ \ |/ _` | //
// | (_| | |_| | __/ __/ | | | | | | __/ | (_| | //
// \__, |\__,_|\___|\___|_| |_|_| |_|\___|_|\__,_| //
// | | //
// |_| //
// //
// //
// Peripheral-NTM for MPSoC //
// Neural Turing Machine for MPSoC //
// //
///////////////////////////////////////////////////////////////////////////////////
///////////////////////////////////////////////////////////////////////////////////
// //
// Copyright (c) 2020-2024 by the author(s) //
// //
// Permission is hereby granted, free of charge, to any person obtaining a copy //
// of this software and associated documentation files (the "Software"), to deal //
// in the Software without restriction, including without limitation the rights //
// to use, copy, modify, merge, publish, distribute, sublicense, and/or sell //
// copies of the Software, and to permit persons to whom the Software is //
// furnished to do so, subject to the following conditions: //
// //
// The above copyright notice and this permission notice shall be included in //
// all copies or substantial portions of the Software. //
// //
// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR //
// IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, //
// FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE //
// AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER //
// LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, //
// OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN //
// THE SOFTWARE. //
// //
// ============================================================================= //
// Author(s): //
// Paco Reina Campo <[email protected]> //
// //
///////////////////////////////////////////////////////////////////////////////////
#include "systemc.h"
#define SIZE_I_IN 4
#define SIZE_J_IN 4
#define SIZE_K_IN 4
SC_MODULE(tensor_subtractor) {
sc_in_clk clock;
sc_in<sc_int<64>> data_a_in[SIZE_I_IN][SIZE_J_IN][SIZE_K_IN];
sc_in<sc_int<64>> data_b_in[SIZE_I_IN][SIZE_J_IN][SIZE_K_IN];
sc_out<sc_int<64>> data_out[SIZE_I_IN][SIZE_J_IN][SIZE_K_IN];
SC_CTOR(tensor_subtractor) {
SC_METHOD(subtractor);
sensitive << clock.pos();
for (int i = 0; i < SIZE_I_IN; i++) {
for (int j = 0; j < SIZE_J_IN; j++) {
for (int k = 0; k < SIZE_K_IN; k++) {
sensitive << data_a_in[i][j][k];
sensitive << data_b_in[i][j][k];
}
}
}
}
void subtractor() {
for (int i = 0; i < SIZE_I_IN; i++) {
for (int j = 0; j < SIZE_J_IN; j++) {
for (int k = 0; k < SIZE_K_IN; k++) {
data_out[i][j][k].write(data_a_in[i][j][k].read() - data_b_in[i][j][k].read());
}
}
}
}
};
|
///////////////////////////////////////////////////////////////////////////////////
// __ _ _ _ //
// / _(_) | | | | //
// __ _ _ _ ___ ___ _ __ | |_ _ ___| | __| | //
// / _` | | | |/ _ \/ _ \ '_ \| _| |/ _ \ |/ _` | //
// | (_| | |_| | __/ __/ | | | | | | __/ | (_| | //
// \__, |\__,_|\___|\___|_| |_|_| |_|\___|_|\__,_| //
// | | //
// |_| //
// //
// //
// Peripheral-NTM for MPSoC //
// Neural Turing Machine for MPSoC //
// //
///////////////////////////////////////////////////////////////////////////////////
///////////////////////////////////////////////////////////////////////////////////
// //
// Copyright (c) 2020-2024 by the author(s) //
// //
// Permission is hereby granted, free of charge, to any person obtaining a copy //
// of this software and associated documentation files (the "Software"), to deal //
// in the Software without restriction, including without limitation the rights //
// to use, copy, modify, merge, publish, distribute, sublicense, and/or sell //
// copies of the Software, and to permit persons to whom the Software is //
// furnished to do so, subject to the following conditions: //
// //
// The above copyright notice and this permission notice shall be included in //
// all copies or substantial portions of the Software. //
// //
// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR //
// IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, //
// FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE //
// AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER //
// LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, //
// OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN //
// THE SOFTWARE. //
// //
// ============================================================================= //
// Author(s): //
// Paco Reina Campo <[email protected]> //
// //
///////////////////////////////////////////////////////////////////////////////////
#include "systemc.h"
#define SIZE_I_IN 4
#define SIZE_J_IN 4
#define SIZE_K_IN 4
SC_MODULE(tensor_subtractor) {
sc_in_clk clock;
sc_in<sc_int<64>> data_a_in[SIZE_I_IN][SIZE_J_IN][SIZE_K_IN];
sc_in<sc_int<64>> data_b_in[SIZE_I_IN][SIZE_J_IN][SIZE_K_IN];
sc_out<sc_int<64>> data_out[SIZE_I_IN][SIZE_J_IN][SIZE_K_IN];
SC_CTOR(tensor_subtractor) {
SC_METHOD(subtractor);
sensitive << clock.pos();
for (int i = 0; i < SIZE_I_IN; i++) {
for (int j = 0; j < SIZE_J_IN; j++) {
for (int k = 0; k < SIZE_K_IN; k++) {
sensitive << data_a_in[i][j][k];
sensitive << data_b_in[i][j][k];
}
}
}
}
void subtractor() {
for (int i = 0; i < SIZE_I_IN; i++) {
for (int j = 0; j < SIZE_J_IN; j++) {
for (int k = 0; k < SIZE_K_IN; k++) {
data_out[i][j][k].write(data_a_in[i][j][k].read() - data_b_in[i][j][k].read());
}
}
}
}
};
|
///////////////////////////////////////////////////////////////////////////////////
// __ _ _ _ //
// / _(_) | | | | //
// __ _ _ _ ___ ___ _ __ | |_ _ ___| | __| | //
// / _` | | | |/ _ \/ _ \ '_ \| _| |/ _ \ |/ _` | //
// | (_| | |_| | __/ __/ | | | | | | __/ | (_| | //
// \__, |\__,_|\___|\___|_| |_|_| |_|\___|_|\__,_| //
// | | //
// |_| //
// //
// //
// Peripheral-NTM for MPSoC //
// Neural Turing Machine for MPSoC //
// //
///////////////////////////////////////////////////////////////////////////////////
///////////////////////////////////////////////////////////////////////////////////
// //
// Copyright (c) 2020-2024 by the author(s) //
// //
// Permission is hereby granted, free of charge, to any person obtaining a copy //
// of this software and associated documentation files (the "Software"), to deal //
// in the Software without restriction, including without limitation the rights //
// to use, copy, modify, merge, publish, distribute, sublicense, and/or sell //
// copies of the Software, and to permit persons to whom the Software is //
// furnished to do so, subject to the following conditions: //
// //
// The above copyright notice and this permission notice shall be included in //
// all copies or substantial portions of the Software. //
// //
// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR //
// IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, //
// FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE //
// AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER //
// LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, //
// OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN //
// THE SOFTWARE. //
// //
// ============================================================================= //
// Author(s): //
// Paco Reina Campo <[email protected]> //
// //
///////////////////////////////////////////////////////////////////////////////////
#include "systemc.h"
#define SIZE_I_IN 4
#define SIZE_J_IN 4
#define SIZE_K_IN 4
SC_MODULE(tensor_subtractor) {
sc_in_clk clock;
sc_in<sc_int<64>> data_a_in[SIZE_I_IN][SIZE_J_IN][SIZE_K_IN];
sc_in<sc_int<64>> data_b_in[SIZE_I_IN][SIZE_J_IN][SIZE_K_IN];
sc_out<sc_int<64>> data_out[SIZE_I_IN][SIZE_J_IN][SIZE_K_IN];
SC_CTOR(tensor_subtractor) {
SC_METHOD(subtractor);
sensitive << clock.pos();
for (int i = 0; i < SIZE_I_IN; i++) {
for (int j = 0; j < SIZE_J_IN; j++) {
for (int k = 0; k < SIZE_K_IN; k++) {
sensitive << data_a_in[i][j][k];
sensitive << data_b_in[i][j][k];
}
}
}
}
void subtractor() {
for (int i = 0; i < SIZE_I_IN; i++) {
for (int j = 0; j < SIZE_J_IN; j++) {
for (int k = 0; k < SIZE_K_IN; k++) {
data_out[i][j][k].write(data_a_in[i][j][k].read() - data_b_in[i][j][k].read());
}
}
}
}
};
|
/*****************************************************************************
Licensed to Accellera Systems Initiative Inc. (Accellera) under one or
more contributor license agreements. See the NOTICE file distributed
with this work for additional information regarding copyright ownership.
Accellera licenses this file to you under the Apache License, Version 2.0
(the "License"); you may not use this file except in compliance with the
License. You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
implied. See the License for the specific language governing
permissions and limitations under the License.
*****************************************************************************/
/*****************************************************************************
* simple example of async events
*
* Copyright (C) 2017, GreenSocs Ltd.
*
* Developped by Mark Burton [email protected]
*
*****************************************************************************/
#include "systemc.h"
#include "async_event.h"
#if SC_CPLUSPLUS >= 201103L
// this version properly uses separate host threads.
// Without host threads, the example simply notifys the async event
// directly from the constructor
#include <thread>
#include <chrono>
#endif
SC_MODULE(watchDog)
{
async_event when;
bool barked;
public:
SC_CTOR(watchDog) : barked(false)
{
SC_METHOD(call_stop);
sensitive << when;
dont_initialize();
}
#if SC_CPLUSPLUS >= 201103L // C++11 threading support
~watchDog()
{
m_thread.join();
}
private:
std::thread m_thread;
void start_of_simulation()
{
m_thread=std::thread( [this] { this->process(); } );
}
void process()
{
std::this_thread::sleep_for(std::chrono::seconds(1));
// asynchronous notification from a separate thread
when.notify(sc_time(10,SC_NS));
}
#else
void start_of_simulation()
{
// no threading support, notifiy directly
when.notify(sc_time(10,SC_NS));
}
#endif // C++11 threading support
private:
void call_stop()
{
cout << "Asked to stop at time " << sc_time_stamp() << endl;
barked=true;
sc_stop();
}
void end_of_simulation()
{
sc_assert(barked==true);
cout << "The dog barks before the end of simulation" << endl;
}
};
SC_MODULE(activity)
{
SC_CTOR(activity)
{
SC_THREAD(busy);
}
void busy()
{
cout << "I'm busy!"<<endl;
}
};
int sc_main(int , char* [])
{
watchDog m_watchdog("WatchDog");
activity m_activity("Activity");
cout << "Start SystemC " << endl;
sc_start();
cout << "Program completed" << endl;
return 0;
}
|
/*****************************************************************************
Licensed to Accellera Systems Initiative Inc. (Accellera) under one or
more contributor license agreements. See the NOTICE file distributed
with this work for additional information regarding copyright ownership.
Accellera licenses this file to you under the Apache License, Version 2.0
(the "License"); you may not use this file except in compliance with the
License. You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
implied. See the License for the specific language governing
permissions and limitations under the License.
*****************************************************************************/
/*****************************************************************************
* simple example of async events
*
* Copyright (C) 2017, GreenSocs Ltd.
*
* Developped by Mark Burton [email protected]
*
*****************************************************************************/
#include "systemc.h"
#include "async_event.h"
#if SC_CPLUSPLUS >= 201103L
// this version properly uses separate host threads.
// Without host threads, the example simply notifys the async event
// directly from the constructor
#include <thread>
#include <chrono>
#endif
SC_MODULE(watchDog)
{
async_event when;
bool barked;
public:
SC_CTOR(watchDog) : barked(false)
{
SC_METHOD(call_stop);
sensitive << when;
dont_initialize();
}
#if SC_CPLUSPLUS >= 201103L // C++11 threading support
~watchDog()
{
m_thread.join();
}
private:
std::thread m_thread;
void start_of_simulation()
{
m_thread=std::thread( [this] { this->process(); } );
}
void process()
{
std::this_thread::sleep_for(std::chrono::seconds(1));
// asynchronous notification from a separate thread
when.notify(sc_time(10,SC_NS));
}
#else
void start_of_simulation()
{
// no threading support, notifiy directly
when.notify(sc_time(10,SC_NS));
}
#endif // C++11 threading support
private:
void call_stop()
{
cout << "Asked to stop at time " << sc_time_stamp() << endl;
barked=true;
sc_stop();
}
void end_of_simulation()
{
sc_assert(barked==true);
cout << "The dog barks before the end of simulation" << endl;
}
};
SC_MODULE(activity)
{
SC_CTOR(activity)
{
SC_THREAD(busy);
}
void busy()
{
cout << "I'm busy!"<<endl;
}
};
int sc_main(int , char* [])
{
watchDog m_watchdog("WatchDog");
activity m_activity("Activity");
cout << "Start SystemC " << endl;
sc_start();
cout << "Program completed" << endl;
return 0;
}
|
/*****************************************************************************
Licensed to Accellera Systems Initiative Inc. (Accellera) under one or
more contributor license agreements. See the NOTICE file distributed
with this work for additional information regarding copyright ownership.
Accellera licenses this file to you under the Apache License, Version 2.0
(the "License"); you may not use this file except in compliance with the
License. You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
implied. See the License for the specific language governing
permissions and limitations under the License.
*****************************************************************************/
/*****************************************************************************
* simple example of async events
*
* Copyright (C) 2017, GreenSocs Ltd.
*
* Developped by Mark Burton [email protected]
*
*****************************************************************************/
#include "systemc.h"
#include "async_event.h"
#if SC_CPLUSPLUS >= 201103L
// this version properly uses separate host threads.
// Without host threads, the example simply notifys the async event
// directly from the constructor
#include <thread>
#include <chrono>
#endif
SC_MODULE(watchDog)
{
async_event when;
bool barked;
public:
SC_CTOR(watchDog) : barked(false)
{
SC_METHOD(call_stop);
sensitive << when;
dont_initialize();
}
#if SC_CPLUSPLUS >= 201103L // C++11 threading support
~watchDog()
{
m_thread.join();
}
private:
std::thread m_thread;
void start_of_simulation()
{
m_thread=std::thread( [this] { this->process(); } );
}
void process()
{
std::this_thread::sleep_for(std::chrono::seconds(1));
// asynchronous notification from a separate thread
when.notify(sc_time(10,SC_NS));
}
#else
void start_of_simulation()
{
// no threading support, notifiy directly
when.notify(sc_time(10,SC_NS));
}
#endif // C++11 threading support
private:
void call_stop()
{
cout << "Asked to stop at time " << sc_time_stamp() << endl;
barked=true;
sc_stop();
}
void end_of_simulation()
{
sc_assert(barked==true);
cout << "The dog barks before the end of simulation" << endl;
}
};
SC_MODULE(activity)
{
SC_CTOR(activity)
{
SC_THREAD(busy);
}
void busy()
{
cout << "I'm busy!"<<endl;
}
};
int sc_main(int , char* [])
{
watchDog m_watchdog("WatchDog");
activity m_activity("Activity");
cout << "Start SystemC " << endl;
sc_start();
cout << "Program completed" << endl;
return 0;
}
|
/*****************************************************************************
Licensed to Accellera Systems Initiative Inc. (Accellera) under one or
more contributor license agreements. See the NOTICE file distributed
with this work for additional information regarding copyright ownership.
Accellera licenses this file to you under the Apache License, Version 2.0
(the "License"); you may not use this file except in compliance with the
License. You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
implied. See the License for the specific language governing
permissions and limitations under the License.
*****************************************************************************/
/*****************************************************************************
* simple example of async events
*
* Copyright (C) 2017, GreenSocs Ltd.
*
* Developped by Mark Burton [email protected]
*
*****************************************************************************/
#include "systemc.h"
#include "async_event.h"
#if SC_CPLUSPLUS >= 201103L
// this version properly uses separate host threads.
// Without host threads, the example simply notifys the async event
// directly from the constructor
#include <thread>
#include <chrono>
#endif
SC_MODULE(watchDog)
{
async_event when;
bool barked;
public:
SC_CTOR(watchDog) : barked(false)
{
SC_METHOD(call_stop);
sensitive << when;
dont_initialize();
}
#if SC_CPLUSPLUS >= 201103L // C++11 threading support
~watchDog()
{
m_thread.join();
}
private:
std::thread m_thread;
void start_of_simulation()
{
m_thread=std::thread( [this] { this->process(); } );
}
void process()
{
std::this_thread::sleep_for(std::chrono::seconds(1));
// asynchronous notification from a separate thread
when.notify(sc_time(10,SC_NS));
}
#else
void start_of_simulation()
{
// no threading support, notifiy directly
when.notify(sc_time(10,SC_NS));
}
#endif // C++11 threading support
private:
void call_stop()
{
cout << "Asked to stop at time " << sc_time_stamp() << endl;
barked=true;
sc_stop();
}
void end_of_simulation()
{
sc_assert(barked==true);
cout << "The dog barks before the end of simulation" << endl;
}
};
SC_MODULE(activity)
{
SC_CTOR(activity)
{
SC_THREAD(busy);
}
void busy()
{
cout << "I'm busy!"<<endl;
}
};
int sc_main(int , char* [])
{
watchDog m_watchdog("WatchDog");
activity m_activity("Activity");
cout << "Start SystemC " << endl;
sc_start();
cout << "Program completed" << endl;
return 0;
}
|
///////////////////////////////////////////////////////////////////////////////////
// __ _ _ _ //
// / _(_) | | | | //
// __ _ _ _ ___ ___ _ __ | |_ _ ___| | __| | //
// / _` | | | |/ _ \/ _ \ '_ \| _| |/ _ \ |/ _` | //
// | (_| | |_| | __/ __/ | | | | | | __/ | (_| | //
// \__, |\__,_|\___|\___|_| |_|_| |_|\___|_|\__,_| //
// | | //
// |_| //
// //
// //
// Peripheral-NTM for MPSoC //
// Neural Turing Machine for MPSoC //
// //
///////////////////////////////////////////////////////////////////////////////////
///////////////////////////////////////////////////////////////////////////////////
// //
// Copyright (c) 2020-2024 by the author(s) //
// //
// Permission is hereby granted, free of charge, to any person obtaining a copy //
// of this software and associated documentation files (the "Software"), to deal //
// in the Software without restriction, including without limitation the rights //
// to use, copy, modify, merge, publish, distribute, sublicense, and/or sell //
// copies of the Software, and to permit persons to whom the Software is //
// furnished to do so, subject to the following conditions: //
// //
// The above copyright notice and this permission notice shall be included in //
// all copies or substantial portions of the Software. //
// //
// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR //
// IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, //
// FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE //
// AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER //
// LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, //
// OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN //
// THE SOFTWARE. //
// //
// ============================================================================= //
// Author(s): //
// Paco Reina Campo <[email protected]> //
// //
///////////////////////////////////////////////////////////////////////////////////
#include "ntm_fnn_design.cpp"
#include "systemc.h"
int sc_main(int argc, char *argv[]) {
adder adder("ADDER");
sc_signal<int> Ain;
sc_signal<int> Bin;
sc_signal<bool> clock;
sc_signal<int> out;
adder(clock, Ain, Bin, out);
Ain = 1;
Bin = 2;
clock = 0;
sc_start(1, SC_NS);
clock = 1;
sc_start(1, SC_NS);
cout << "@" << sc_time_stamp() << ": A + B = " << out.read() << endl;
Ain = 2;
Bin = 2;
clock = 0;
sc_start(1, SC_NS);
clock = 1;
sc_start(1, SC_NS);
cout << "@" << sc_time_stamp() << ": A + B = " << out.read() << endl;
return 0;
}
|
/*
* Copyright (C) 2020 GreenWaves Technologies, SAS, ETH Zurich and
* University of Bologna
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
/*
* Authors: Germain Haugou, GreenWaves Technologies ([email protected])
*/
#include <iostream>
#include <sstream>
#include <string>
#include <stdio.h>
#include <vp/vp.hpp>
#include <stdio.h>
#include "string.h"
#include <iostream>
#include <sstream>
#include <string>
#include <dlfcn.h>
#include <algorithm>
#include <string>
#include <sys/types.h>
#include <sys/socket.h>
#include <netinet/in.h>
#include <poll.h>
#include <signal.h>
#include <regex>
#include <gv/gvsoc_proxy.hpp>
#include <gv/gvsoc.h>
#include <sys/types.h>
#include <unistd.h>
#include <sys/prctl.h>
#include <vp/time/time_scheduler.hpp>
#include <vp/proxy.hpp>
#include <vp/queue.hpp>
#include <vp/signal.hpp>
extern "C" long long int dpi_time_ps();
#ifdef __VP_USE_SYSTEMC
#include <systemc.h>
#endif
#ifdef __VP_USE_SYSTEMV
extern "C" void dpi_raise_event();
#endif
char vp_error[VP_ERROR_SIZE];
static Gv_proxy *proxy = NULL;
void vp::component::get_trace(std::vector<vp::trace *> &traces, std::string path)
{
if (this->get_path() != "" && path.find(this->get_path()) != 0)
{
return;
}
for (vp::component *component: this->get_childs())
{
component->get_trace(traces, path);
}
for (auto x: this->traces.traces)
{
if (x.second->get_full_path().find(path) == 0)
{
traces.push_back(x.second);
}
}
for (auto x: this->traces.trace_events)
{
if (x.second->get_full_path().find(path) == 0)
{
traces.push_back(x.second);
}
}
}
void vp::component::reg_step_pre_start(std::function<void()> callback)
{
this->pre_start_callbacks.push_back(callback);
}
void vp::component::register_build_callback(std::function<void()> callback)
{
this->build_callbacks.push_back(callback);
}
void vp::component::post_post_build()
{
traces.post_post_build();
}
void vp::component::final_bind()
{
for (auto port : this->slave_ports)
{
port.second->final_bind();
}
for (auto port : this->master_ports)
{
port.second->final_bind();
}
for (auto &x : this->childs)
{
x->final_bind();
}
}
void vp::component::set_vp_config(js::config *config)
{
this->vp_config = config;
}
void vp::component::set_gv_conf(struct gv_conf *gv_conf)
{
if (gv_conf)
{
memcpy(&this->gv_conf, gv_conf, sizeof(struct gv_conf));
}
else
{
memset(&this->gv_conf, 0, sizeof(struct gv_conf));
gv_init(&this->gv_conf);
}
}
js::config *vp::component::get_vp_config()
{
if (this->vp_config == NULL)
{
if (this->parent != NULL)
{
this->vp_config = this->parent->get_vp_config();
}
}
vp_assert_always(this->vp_config != NULL, NULL, "No VP config found\n");
return this->vp_config;
}
void vp::component::load_all()
{
for (auto &x : this->childs)
{
x->load_all();
}
this->load();
}
int vp::component::build_new()
{
this->bind_comps();
this->post_post_build_all();
this->pre_start_all();
this->start_all();
this->final_bind();
return 0;
}
void vp::component::post_post_build_all()
{
for (auto &x : this->childs)
{
x->post_post_build_all();
}
this->post_post_build();
}
void vp::component::start_all()
{
for (auto &x : this->childs)
{
x->start_all();
}
this->start();
}
void vp::component::stop_all()
{
for (auto &x : this->childs)
{
x->stop_all();
}
this->stop();
}
void vp::component::flush_all()
{
for (auto &x : this->childs)
{
x->flush_all();
}
this->flush();
}
void vp::component::pre_start_all()
{
for (auto &x : this->childs)
{
x->pre_start_all();
}
this->pre_start();
for (auto x : pre_start_callbacks)
{
x();
}
}
void vp::component_clock::clk_reg(component *_this, component *clock)
{
_this->clock = (clock_engine *)clock;
for (auto &x : _this->childs)
{
x->clk_reg(x, clock);
}
}
void vp::component::reset_all(bool active, bool from_itf)
{
// Small hack to not propagate the reset from top level if the reset has
// already been done through the interface from another component.
// This should be all implemented with interfaces to better control
// the reset propagation.
this->reset_done_from_itf |= from_itf;
if (from_itf || !this->reset_done_from_itf)
{
this->get_trace()->msg("Reset\n");
this->pre_reset();
for (auto reg : this->regs)
{
reg->reset(active);
}
this->block::reset_all(active);
if (active)
{
for (clock_event *event: this->events)
{
this->event_cancel(event);
}
}
for (auto &x : this->childs)
{
x->reset_all(active);
}
}
}
void vp::component_clock::reset_sync(void *__this, bool active)
{
component *_this = (component *)__this;
_this->reset_done_from_itf = true;
_this->reset_all(active, true);
}
void vp::component_clock::pre_build(component *comp)
{
clock_port.set_reg_meth((vp::clk_reg_meth_t *)&component_clock::clk_reg);
comp->new_slave_port("clock", &clock_port);
reset_port.set_sync_meth(&component_clock::reset_sync);
comp->new_slave_port("reset", &reset_port);
comp->traces.new_trace("comp", comp->get_trace(), vp::DEBUG);
comp->traces.new_trace("warning", &comp->warning, vp::WARNING);
}
int64_t vp::time_engine::get_next_event_time()
{
if (this->first_client)
{
return this->first_client->next_event_time;
}
return this->time;
}
bool vp::time_engine::dequeue(time_engine_client *client)
{
if (!client->is_enqueued)
return false;
client->is_enqueued = false;
time_engine_client *current = this->first_client, *prev = NULL;
while (current && current != client)
{
prev = current;
current = current->next;
}
if (prev)
prev->next = client->next;
else
this->first_client = client->next;
return true;
}
bool vp::time_engine::enqueue(time_engine_client *client, int64_t time)
{
vp_assert(time >= 0, NULL, "Time must be positive\n");
int64_t full_time = this->get_time() + time;
#ifdef __VP_USE_SYSTEMC
// Notify to the engine that something has been pushed in case it is done
// by an external systemC component and the engine needs to be waken up
if (started)
sync_event.notify();
#endif
#ifdef __VP_USE_SYSTEMV
dpi_raise_event();
#endif
if (client->is_running())
return false;
if (client->is_enqueued)
{
if (client->next_event_time <= full_time)
return false;
this->dequeue(client);
}
client->is_enqueued = true;
time_engine_client *current = first_client, *prev = NULL;
client->next_event_time = full_time;
while (current && current->next_event_time < client->next_event_time)
{
prev = current;
current = current->next;
}
if (prev)
prev->next = client;
else
first_client = client;
client->next = current;
return true;
}
bool vp::clock_engine::dequeue_from_engine()
{
if (this->is_running() || !this->is_enqueued)
return false;
this->engine->dequeue(this);
return true;
}
void vp::clock_engine::reenqueue_to_engine()
{
this->engine->enqueue(this, this->next_event_time);
}
void vp::clock_engine::apply_frequency(int frequency)
{
if (frequency > 0)
{
bool reenqueue = this->dequeue_from_engine();
int64_t period = this->period;
this->freq = frequency;
this->period = 1e12 / this->freq;
if (reenqueue && period > 0)
{
int64_t cycles = (this->next_event_time - this->get_time()) / period;
this->next_event_time = cycles * this->period;
this->reenqueue_to_engine();
}
else if (period == 0)
{
// Case where the clock engine was clock-gated
// We need to reenqueue the engine in case it has pending events
if (this->has_events())
{
// Compute the time of the next event based on the new frequency
this->next_event_time = (this->get_next_event()->get_cycle() - this->get_cycles()) * this->period;
this->reenqueue_to_engine();
}
}
}
else if (frequency == 0)
{
this->dequeue_from_engine();
this->period = 0;
}
}
void vp::clock_engine::update()
{
if (this->period == 0)
return;
int64_t diff = this->get_time() - this->stop_time;
#ifdef __VP_USE_SYSTEMC
if ((int64_t)sc_time_stamp().to_double() > this->get_time())
diff = (int64_t)sc_time_stamp().to_double() - this->stop_time;
engine->update((int64_t)sc_time_stamp().to_double());
#endif
if (diff > 0)
{
int64_t cycles = (diff + this->period - 1) / this->period;
this->stop_time += cycles * this->period;
this->cycles += cycles;
}
}
vp::clock_event *vp::clock_engine::enqueue_other(vp::clock_event *event, int64_t cycle)
{
// Slow case where the engine is not running or we must enqueue out of the
// circular buffer.
// First check if we have to enqueue it to the global time engine in case we
// were not running.
// Check if we can enqueue to the fast circular queue in case were not
// running.
bool can_enqueue_to_cycle = false;
if (!this->is_running())
{
//this->current_cycle = (this->get_cycles() + 1) & CLOCK_EVENT_QUEUE_MASK;
//can_enqueue_to_cycle = this->current_cycle + cycle - 1 < CLOCK_EVENT_QUEUE_SIZE;
}
if (can_enqueue_to_cycle)
{
//this->current_cycle = (this->get_cycles() + cycle) & CLOCK_EVENT_QUEUE_MASK;
this->enqueue_to_cycle(event, cycle - 1);
if (this->period != 0)
enqueue_to_engine(period);
}
else
{
this->must_flush_delayed_queue = true;
if (this->period != 0)
{
enqueue_to_engine(cycle * period);
}
vp::clock_event *current = delayed_queue, *prev = NULL;
int64_t full_cycle = cycle + get_cycles();
while (current && current->cycle < full_cycle)
{
prev = current;
current = current->next;
}
if (prev)
prev->next = event;
else
delayed_queue = event;
event->next = current;
event->cycle = full_cycle;
}
return event;
}
vp::clock_event *vp::clock_engine::get_next_event()
{
// There is no quick way of getting the next event.
// We have to first check if there is an event in the circular buffer
// and if not in the delayed queue
if (this->nb_enqueued_to_cycle)
{
for (int i = 0; i < CLOCK_EVENT_QUEUE_SIZE; i++)
{
int cycle = (current_cycle + i) & CLOCK_EVENT_QUEUE_MASK;
vp::clock_event *event = event_queue[cycle];
if (event)
{
return event;
}
}
vp_assert(false, 0, "Didn't find any event in circular buffer while it is not empty\n");
}
return this->delayed_queue;
}
void vp::clock_engine::cancel(vp::clock_event *event)
{
if (!event->is_enqueued())
return;
// There is no way to know if the event is enqueued into the circular buffer
// or in the delayed queue so first go through the delayed queue and if it is
// not found, look in the circular buffer
// First the delayed queue
vp::clock_event *current = delayed_queue, *prev = NULL;
while (current)
{
if (current == event)
{
if (prev)
prev->next = event->next;
else
delayed_queue = event->next;
goto end;
}
prev = current;
current = current->next;
}
// Then in the circular buffer
for (int i = 0; i < CLOCK_EVENT_QUEUE_SIZE; i++)
{
vp::clock_event *current = event_queue[i], *prev = NULL;
while (current)
{
if (current == event)
{
if (prev)
prev->next = event->next;
else
event_queue[i] = event->next;
this->nb_enqueued_to_cycle--;
goto end;
}
prev = current;
current = current->next;
}
}
vp_assert(0, NULL, "Didn't find event in any queue while canceling event\n");
end:
event->enqueued = false;
if (!this->has_events())
this->dequeue_from_engine();
}
void vp::clock_engine::flush_delayed_queue()
{
clock_event *event = delayed_queue;
this->must_flush_delayed_queue = false;
while (event)
{
if (nb_enqueued_to_cycle == 0)
cycles = event->cycle;
uint64_t cycle_diff = event->cycle - get_cycles();
if (cycle_diff >= CLOCK_EVENT_QUEUE_SIZE)
break;
clock_event *next = event->next;
enqueue_to_cycle(event, cycle_diff);
event = next;
delayed_queue = event;
}
}
int64_t vp::clock_engine::exec()
{
vp_assert(this->has_events(), NULL, "Executing clock engine while it has no event\n");
vp_assert(this->get_next_event(), NULL, "Executing clock engine while it has no next event\n");
this->cycles_trace.event_real(this->cycles);
// The clock engine has a circular buffer of events to be executed.
// Events longer than the buffer as put temporarly in a queue.
// Everytime we start again at the beginning of the buffer, we need
// to check if events must be enqueued from the queue to the buffer
// in case they fit the window.
if (unlikely(this->must_flush_delayed_queue))
{
this->flush_delayed_queue();
}
vp_assert(this->get_next_event(), NULL, "Executing clock engine while it has no next event\n");
// Now take all events available at the current cycle and execute them all without returning
// to the main engine to execute them faster.
clock_event *current = event_queue[current_cycle];
while (likely(current != NULL))
{
event_queue[current_cycle] = current->next;
current->enqueued = false;
nb_enqueued_to_cycle--;
current->meth(current->_this, current);
current = event_queue[current_cycle];
}
// Now we need to tell the time engine when is the next event.
// The most likely is that there is an event in the circular buffer,
// in which case we just return the clock period, as we will go through
// each element of the circular buffer, even if the next event is further in
// the buffer.
if (likely(nb_enqueued_to_cycle))
{
cycles++;
current_cycle = (current_cycle + 1) & CLOCK_EVENT_QUEUE_MASK;
if (unlikely(current_cycle == 0))
this->must_flush_delayed_queue = true;
return period;
}
else
{
// Otherwise if there is an event in the delayed queue, return the time
// to this event.
// In both cases, force the delayed queue flush so that the next event to be
// executed is moved to the circular buffer.
this->must_flush_delayed_queue = true;
// Also remember the current time in order to resynchronize the clock engine
// in case we enqueue and event from another engine.
this->stop_time = this->get_time();
if (delayed_queue)
{
return (delayed_queue->cycle - get_cycles()) * period;
}
else
{
// In case there is no more event to execute, returns -1 to tell the time
// engine we are done.
return -1;
}
}
}
vp::clock_event::clock_event(component_clock *comp, clock_event_meth_t *meth)
: comp(comp), _this((void *)static_cast<vp::component *>((vp::component_clock *)(comp))), meth(meth), enqueued(false)
{
comp->add_clock_event(this);
}
void vp::component_clock::add_clock_event(clock_event *event)
{
this->events.push_back(event);
}
vp::time_engine *vp::component::get_time_engine()
{
if (this->time_engine_ptr == NULL)
{
this->time_engine_ptr = (vp::time_engine*)this->get_service("time");
}
return this->time_engine_ptr;
}
vp::master_port::master_port(vp::component *owner)
: vp::port(owner)
{
}
void vp::component::new_master_port(std::string name, vp::master_port *port)
{
this->get_trace()->msg(vp::trace::LEVEL_DEBUG, "New master port (name: %s, port: %p)\n", name.c_str(), port);
port->set_owner(this);
port->set_context(this);
port->set_name(name);
this->add_master_port(name, port);
}
void vp::component::new_master_port(void *comp, std::string name, vp::master_port *port)
{
this->get_trace()->msg(vp::trace::LEVEL_DEBUG, "New master port (name: %s, port: %p)\n", name.c_str(), port);
port->set_owner(this);
port->set_context(comp);
port->set_name(name);
this->add_master_port(name, port);
}
void vp::component::add_slave_port(std::string name, vp::slave_port *port)
{
vp_assert_always(port != NULL, this->get_trace(), "Adding NULL port\n");
//vp_assert_always(this->slave_ports[name] == NULL, this->get_trace(), "Adding already existing port\n");
this->slave_ports[name] = port;
}
void vp::component::add_master_port(std::string name, vp::master_port *port)
{
vp_assert_always(port != NULL, this->get_trace(), "Adding NULL port\n");
//vp_assert_always(this->master_ports[name] == NULL, this->get_trace(), "Adding already existing port\n");
this->master_ports[name] = port;
}
void vp::component::new_slave_port(std::string name, vp::slave_port *port)
{
this->get_trace()->msg(vp::trace::LEVEL_DEBUG, "New slave port (name: %s, port: %p)\n", name.c_str(), port);
port->set_owner(this);
port->set_context(this);
port->set_name(name);
this->add_slave_port(name, port);
}
void vp::component::new_slave_port(void *comp, std::string name, vp::slave_port *port)
{
this->get_trace()->msg(vp::trace::LEVEL_DEBUG, "New slave port (name: %s, port: %p)\n", name.c_str(), port);
port->set_owner(this);
port->set_context(comp);
port->set_name(name);
this->add_slave_port(name, port);
}
void vp::component::add_service(std::string name, void *service)
{
if (this->parent)
this->parent->add_service(name, service);
else if (all_services[name] == NULL)
all_services[name] = service;
}
void vp::component::new_service(std::string name, void *service)
{
this->get_trace()->msg(vp::trace::LEVEL_DEBUG, "New service (name: %s, service: %p)\n", name.c_str(), service);
if (this->parent)
this->parent->add_service(name, service);
all_services[name] = service;
}
void *vp::component::get_service(string name)
{
if (all_services[name])
return all_services[name];
if (this->parent)
return this->parent->get_service(name);
return NULL;
}
std::vector<std::string> split_name(const std: |
:string &s, char delimiter)
{
std::vector<std::string> tokens;
std::string token;
std::istringstream tokenStream(s);
while (std::getline(tokenStream, token, delimiter))
{
tokens.push_back(token);
}
return tokens;
}
vp::config *vp::config::create_config(jsmntok_t *tokens, int *_size)
{
jsmntok_t *current = tokens;
config *config = NULL;
switch (current->type)
{
case JSMN_PRIMITIVE:
if (strcmp(current->str, "True") == 0 || strcmp(current->str, "False") == 0 || strcmp(current->str, "true") == 0 || strcmp(current->str, "false") == 0)
{
config = new config_bool(current);
}
else
{
config = new config_number(current);
}
current++;
break;
case JSMN_OBJECT:
{
int size;
config = new config_object(current, &size);
current += size;
break;
}
case JSMN_ARRAY:
{
int size;
config = new config_array(current, &size);
current += size;
break;
}
case JSMN_STRING:
config = new config_string(current);
current++;
break;
case JSMN_UNDEFINED:
break;
}
if (_size)
{
*_size = current - tokens;
}
return config;
}
vp::config *vp::config_string::get_from_list(std::vector<std::string> name_list)
{
if (name_list.size() == 0)
return this;
return NULL;
}
vp::config *vp::config_number::get_from_list(std::vector<std::string> name_list)
{
if (name_list.size() == 0)
return this;
return NULL;
}
vp::config *vp::config_bool::get_from_list(std::vector<std::string> name_list)
{
if (name_list.size() == 0)
return this;
return NULL;
}
vp::config *vp::config_array::get_from_list(std::vector<std::string> name_list)
{
if (name_list.size() == 0)
return this;
return NULL;
}
vp::config *vp::config_object::get_from_list(std::vector<std::string> name_list)
{
if (name_list.size() == 0)
return this;
vp::config *result = NULL;
std::string name;
int name_pos = 0;
for (auto &x : name_list)
{
if (x != "*" && x != "**")
{
name = x;
break;
}
name_pos++;
}
for (auto &x : childs)
{
if (name == x.first)
{
result = x.second->get_from_list(std::vector<std::string>(name_list.begin() + name_pos + 1, name_list.begin() + name_list.size()));
if (name_pos == 0 || result != NULL)
return result;
}
else if (name_list[0] == "*")
{
result = x.second->get_from_list(std::vector<std::string>(name_list.begin() + 1, name_list.begin() + name_list.size()));
if (result != NULL)
return result;
}
else if (name_list[0] == "**")
{
result = x.second->get_from_list(name_list);
if (result != NULL)
return result;
}
}
return result;
}
vp::config *vp::config_object::get(std::string name)
{
return get_from_list(split_name(name, '/'));
}
vp::config_string::config_string(jsmntok_t *tokens)
{
value = tokens->str;
}
vp::config_number::config_number(jsmntok_t *tokens)
{
value = atof(tokens->str);
}
vp::config_bool::config_bool(jsmntok_t *tokens)
{
value = strcmp(tokens->str, "True") == 0 || strcmp(tokens->str, "true") == 0;
}
vp::config_array::config_array(jsmntok_t *tokens, int *_size)
{
jsmntok_t *current = tokens;
jsmntok_t *top = current++;
for (int i = 0; i < top->size; i++)
{
int child_size;
elems.push_back(create_config(current, &child_size));
current += child_size;
}
if (_size)
{
*_size = current - tokens;
}
}
vp::config_object::config_object(jsmntok_t *tokens, int *_size)
{
jsmntok_t *current = tokens;
jsmntok_t *t = current++;
for (int i = 0; i < t->size; i++)
{
jsmntok_t *child_name = current++;
int child_size;
config *child_config = create_config(current, &child_size);
current += child_size;
if (child_config != NULL)
{
childs[child_name->str] = child_config;
}
}
if (_size)
{
*_size = current - tokens;
}
}
vp::config *vp::component::import_config(const char *config_string)
{
if (config_string == NULL)
return NULL;
jsmn_parser parser;
jsmn_init(&parser);
int nb_tokens = jsmn_parse(&parser, config_string, strlen(config_string), NULL, 0);
jsmntok_t tokens[nb_tokens];
jsmn_init(&parser);
nb_tokens = jsmn_parse(&parser, config_string, strlen(config_string), tokens, nb_tokens);
char *str = strdup(config_string);
for (int i = 0; i < nb_tokens; i++)
{
jsmntok_t *tok = &tokens[i];
tok->str = &str[tok->start];
str[tok->end] = 0;
}
return new vp::config_object(tokens);
}
void vp::component::conf(string name, string path, vp::component *parent)
{
this->name = name;
this->parent = parent;
this->path = path;
if (parent != NULL)
{
parent->add_child(name, this);
}
}
void vp::component::add_child(std::string name, vp::component *child)
{
this->childs.push_back(child);
this->childs_dict[name] = child;
}
vp::component *vp::component::get_component(std::vector<std::string> path_list)
{
if (path_list.size() == 0)
{
return this;
}
std::string name = "";
unsigned int name_pos= 0;
for (auto x: path_list)
{
if (x != "*" && x != "**")
{
name = x;
break;
}
name_pos += 1;
}
for (auto x:this->childs)
{
vp::component *comp;
if (name == x->get_name())
{
comp = x->get_component({ path_list.begin() + name_pos + 1, path_list.end() });
}
else if (path_list[0] == "**")
{
comp = x->get_component(path_list);
}
else if (path_list[0] == "*")
{
comp = x->get_component({ path_list.begin() + 1, path_list.end() });
}
if (comp)
{
return comp;
}
}
return NULL;
}
void vp::component::elab()
{
for (auto &x : this->childs)
{
x->elab();
}
}
void vp::component::new_reg_any(std::string name, vp::reg *reg, int bits, uint8_t *reset_val)
{
reg->init(this, name, bits, NULL, reset_val);
this->regs.push_back(reg);
}
void vp::component::new_reg(std::string name, vp::reg_1 *reg, uint8_t reset_val, bool reset)
{
this->get_trace()->msg(vp::trace::LEVEL_DEBUG, "New register (name: %s, width: %d, reset_val: 0x%x, reset: %d)\n",
name.c_str(), 1, reset_val, reset
);
reg->init(this, name, reset ? (uint8_t *)&reset_val : NULL);
this->regs.push_back(reg);
}
void vp::component::new_reg(std::string name, vp::reg_8 *reg, uint8_t reset_val, bool reset)
{
this->get_trace()->msg(vp::trace::LEVEL_DEBUG, "New register (name: %s, width: %d, reset_val: 0x%x, reset: %d)\n",
name.c_str(), 8, reset_val, reset
);
reg->init(this, name, reset ? (uint8_t *)&reset_val : NULL);
this->regs.push_back(reg);
}
void vp::component::new_reg(std::string name, vp::reg_16 *reg, uint16_t reset_val, bool reset)
{
this->get_trace()->msg(vp::trace::LEVEL_DEBUG, "New register (name: %s, width: %d, reset_val: 0x%x, reset: %d)\n",
name.c_str(), 16, reset_val, reset
);
reg->init(this, name, reset ? (uint8_t *)&reset_val : NULL);
this->regs.push_back(reg);
}
void vp::component::new_reg(std::string name, vp::reg_32 *reg, uint32_t reset_val, bool reset)
{
this->get_trace()->msg(vp::trace::LEVEL_DEBUG, "New register (name: %s, width: %d, reset_val: 0x%x, reset: %d)\n",
name.c_str(), 32, reset_val, reset
);
reg->init(this, name, reset ? (uint8_t *)&reset_val : NULL);
this->regs.push_back(reg);
}
void vp::component::new_reg(std::string name, vp::reg_64 *reg, uint64_t reset_val, bool reset)
{
this->get_trace()->msg(vp::trace::LEVEL_DEBUG, "New register (name: %s, width: %d, reset_val: 0x%x, reset: %d)\n",
name.c_str(), 64, reset_val, reset
);
reg->init(this, name, reset ? (uint8_t *)&reset_val : NULL);
this->regs.push_back(reg);
}
bool vp::reg::access_callback(uint64_t reg_offset, int size, uint8_t *value, bool is_write)
{
if (this->callback != NULL)
this->callback(reg_offset, size, value, is_write);
return this->callback != NULL;
}
void vp::reg::init(vp::component *top, std::string name, int bits, uint8_t *value, uint8_t *reset_value)
{
this->top = top;
this->nb_bytes = (bits + 7) / 8;
this->bits = bits;
if (reset_value)
this->reset_value_bytes = new uint8_t[this->nb_bytes];
else
this->reset_value_bytes = NULL;
if (value)
this->value_bytes = value;
else
this->value_bytes = new uint8_t[this->nb_bytes];
this->name = name;
if (reset_value)
memcpy((void *)this->reset_value_bytes, (void *)reset_value, this->nb_bytes);
top->traces.new_trace(name + "/trace", &this->trace, vp::TRACE);
top->traces.new_trace_event(name, &this->reg_event, bits);
}
void vp::reg::reset(bool active)
{
if (active)
{
this->trace.msg("Resetting register\n");
if (this->reset_value_bytes)
{
memcpy((void *)this->value_bytes, (void *)this->reset_value_bytes, this->nb_bytes);
}
else
{
memset((void *)this->value_bytes, 0, this->nb_bytes);
}
if (this->reg_event.get_event_active())
{
this->reg_event.event((uint8_t *)this->value_bytes);
}
}
}
void vp::reg_1::init(vp::component *top, std::string name, uint8_t *reset_val)
{
reg::init(top, name, 1, (uint8_t *)&this->value, reset_val);
}
void vp::reg_8::init(vp::component *top, std::string name, uint8_t *reset_val)
{
reg::init(top, name, 8, (uint8_t *)&this->value, reset_val);
}
void vp::reg_16::init(vp::component *top, std::string name, uint8_t *reset_val)
{
reg::init(top, name, 16, (uint8_t *)&this->value, reset_val);
}
void vp::reg_32::init(vp::component *top, std::string name, uint8_t *reset_val)
{
reg::init(top, name, 32, (uint8_t *)&this->value, reset_val);
}
void vp::reg_64::init(vp::component *top, std::string name, uint8_t *reset_val)
{
reg::init(top, name, 64, (uint8_t *)&this->value, reset_val);
}
void vp::reg_1::build(vp::component *top, std::string name)
{
top->new_reg(name, this, this->reset_val, this->do_reset);
}
void vp::reg_8::build(vp::component *top, std::string name)
{
top->new_reg(name, this, this->reset_val, this->do_reset);
}
void vp::reg_16::build(vp::component *top, std::string name)
{
top->new_reg(name, this, this->reset_val, this->do_reset);
}
void vp::reg_32::build(vp::component *top, std::string name)
{
top->new_reg(name, this, this->reset_val, this->do_reset);
}
void vp::reg_32::write(int reg_offset, int size, uint8_t *value)
{
uint8_t *dest = this->value_bytes+reg_offset;
uint8_t *src = value;
uint8_t *mask = ((uint8_t *)&this->write_mask) + reg_offset;
for (int i=0; i<size; i++)
{
dest[i] = (dest[i] & ~mask[i]) | (src[i] & mask[i]);
}
this->dump_after_write();
if (this->reg_event.get_event_active())
{
this->reg_event.event((uint8_t *)this->value_bytes);
}
}
void vp::reg_64::build(vp::component *top, std::string name)
{
top->new_reg(name, this, this->reset_val, this->do_reset);
}
void vp::master_port::final_bind()
{
if (this->is_bound)
{
this->finalize();
}
}
void vp::slave_port::final_bind()
{
if (this->is_bound)
this->finalize();
}
extern "C" char *vp_get_error()
{
return vp_error;
}
extern "C" void vp_port_bind_to(void *_master, void *_slave, const char *config_str)
{
vp::master_port *master = (vp::master_port *)_master;
vp::slave_port *slave = (vp::slave_port *)_slave;
vp::config *config = NULL;
if (config_str != NULL)
{
config = master->get_comp()->import_config(config_str);
}
master->bind_to(slave, config);
slave->bind_to(master, config);
}
void vp::component::throw_error(std::string error)
{
throw std::invalid_argument("[\033[31m" + this->get_path() + "\033[0m] " + error);
}
void vp::component::build_instance(std::string name, vp::component *parent)
{
std::string comp_path = parent->get_path() != "" ? parent->get_path() + "/" + name : name == "" ? "" : "/" + name;
this->conf(name, comp_path, parent);
this->pre_pre_build();
this->pre_build();
this->build();
this->power.build();
for (auto x : build_callbacks)
{
x();
}
}
vp::component *vp::component::new_component(std::string name, js::config *config, std::string module_name)
{
if (module_name == "")
{
module_name = config->get_child_str("vp_component");
if (module_name == "")
{
module_name = "utils.composite_impl";
}
}
if (this->get_vp_config()->get_child_bool("sv-mode"))
{
module_name = "sv." + module_name;
}
else if (this->get_vp_config()->get_child_bool("debug-mode"))
{
module_name = "debug." + module_name;
}
this->get_trace()->msg(vp::trace::LEVEL_DEBUG, "New component (name: %s, module: %s)\n", name.c_str(), module_name.c_str());
std::replace(module_name.begin(), module_name.end(), '.', '/');
std::string path = std::string(getenv("GVSOC_PATH")) + "/" + module_name + ".so";
void *module = dlopen(path.c_str(), RTLD_NOW | RTLD_GLOBAL | RTLD_DEEPBIND);
if (module == NULL)
{
this->throw_error("ERROR, Failed to open periph model (module: " + module_name + ", error: " + std::string(dlerror()) + ")");
}
vp::component *(*constructor)(js::config *) = (vp::component * (*)(js::config *)) dlsym(module, "vp_constructor");
if (constructor == NULL)
{
this->throw_error("ERROR, couldn't find vp_constructor in loaded module (module: " + module_name + ")");
}
vp::component *instance = constructor(config);
instance->build_instance(name, this);
return instance;
}
vp::component::component(js::config *config)
: block(NULL), traces(*this), power(*this), reset_done_from_itf(false)
{
this->comp_js_config = config;
//this->conf(path, parent);
}
void vp::component::create_ports()
{
js::config *config = this->get_js_config();
js::config *ports = config->get("vp_ports");
if (ports == NULL)
{
ports = config->get("ports");
}
if (ports != NULL)
{
this->get_trace()->msg(vp::trace::LEVEL_DEBUG, "Creating ports\n");
for (auto x : ports->get_elems())
{
std::string port_name = x->get_str();
this->get_trace()->msg(vp::trace::LEVEL_DEBUG, "Creating port (name: %s)\n", port_name.c_str());
if (this->get_master_port(port_name) == NULL && this->get_slave_port(port_name) == NULL)
this->add_master_port(port_name, new vp::virtual_port(this));
}
}
}
void vp::component::create_bindings()
{
js::config *config = this->get_js_config();
js::config *bindings = config->get("vp_bindings");
if (bindings == NULL)
{
bindings = config->get("bindings");
}
if (bindings != NULL)
{
this->get_trace()->msg(vp::trace::LEVEL_DEBUG, "Creating bindings\n");
for (auto x : bindings->get_elems())
{
std::string master_binding = x->get_elem(0)->get_str();
std::string slave_binding = x->get_elem(1)->get_str();
int pos = master_binding.find_first_of("->");
std::string master_comp_name = master_binding.substr(0, pos);
std::string master_port_name = master_binding.substr(pos + 2);
pos = slave_binding.find_first_of("->");
std::string slave_comp_name = slave_binding.substr(0, pos);
std::string slave_port_name = slave_binding.substr(pos + 2);
this->get_trace()->msg(vp::trace::LEVEL_DEBUG, "Creating binding (%s:%s -> %s:%s)\n",
master_comp_name.c_str(), master_port_name.c_str(),
slave_comp_name.c_str(), slave_port_name.c_str()
);
vp::component *master_comp = master_comp_name == "self" ? this : this->get_childs_dict()[master_comp_name];
vp::component *slave_comp = slave_comp_name == "self" ? this : this->get_childs_dict()[slave_comp_name];
vp_assert_always(master_comp != NULL, this->get_trace(), "Binding from invalid master\n");
vp_assert_always(slave_comp != NULL, this->get_trace(), "Binding from invalid slave\n");
vp::port *master_port = master_comp->get_master_port(master_port_name);
vp::port *slave_port = slave_comp->get_slave_port(slave_port_name);
vp_assert_always(master_port != NULL, this->get_trace(), "Binding from invalid master port\n");
vp_assert_always(slave_port != NULL, this->get_trace(), "Binding from invalid slave port\n");
master_port->bind_to_virtual(slave_port);
}
}
}
std::vector<vp::slave_port *> vp::slave_port::get_final_ports()
{
return { this };
}
std::vector<vp::slave_port *> vp::master_port::get_final_ports()
{
std::vector<vp::slave_port *> result;
for (auto x : this->slave_ports)
{
std::vector<vp::slave_port *> slave_ports = x->get_final_ports();
result.insert(result.end(), slave_ports.begin(), slave_ports.end());
}
return result;
}
void vp::master_port::bind_to_slaves()
{
for (auto x : this->slave_ports)
{
for (auto y : x->get_final_ports())
{
this->get_owner()->get_trace()->msg(vp::trace::LEVEL_DEBUG, "Creating final binding (%s:%s -> %s:%s)\n",
this->get_owner()->get_path().c_str(), this->get_name().c_str(),
y->get_owner()->get_path().c_str(), y->get_name().c_str()
);
this->bind_to(y, NULL);
y->bind_to(this, NULL);
}
}
}
void vp::component::bind_comps()
{
this->get_trace()->msg(vp::trace::LEVEL_DEBUG, "Creating final bindings\n");
for (auto x : this->get_childs())
{
x->bind_comps();
}
for (auto x : this->master_ports)
{
if (!x.second->is_virtual())
{
x.second->bind_to_slaves();
}
}
}
void *vp::component::external_bind(std::string comp_name, std::string itf_name, void *handle)
{
for (auto &x : this->childs)
{
void *result = x->external_bind(comp_name, itf_name, handle);
if (result != NULL)
return result;
}
return NULL;
}
void vp::master_port::bind_to_virtual(vp::port *port)
{
vp_assert_always(port != NULL, this->get_comp()->get_trace(), "Trying to bind master port to NULL\n");
this->slave_ports.push_back(port);
}
void vp::component::create_comps()
{
js::config *config = this->get_js_config();
js::config *comps = config->get("vp_comps");
if (comps == NULL)
{
comps = config->get("components");
}
if (comps != NULL)
{
this->get_trace()->msg(vp::trace::LEVEL_DEBUG, "Creating components\n");
for (auto x : comps->get_elems())
{
std::string comp_name = x->get_str();
js::config *comp_config = config->get(comp_name);
std::string vp_component = comp_config->get_child_str("vp_component");
if (vp_component == "")
vp_component = "utils.composite_impl";
this->new_component(comp_name, comp_config, vp_component);
}
}
}
void vp::component::dump_traces_recursive(FILE *file)
{
this->dump_traces(file);
for |
(auto& x: this->get_childs())
{
x->dump_traces_recursive(file);
}
}
vp::component *vp::__gv_create(std::string config_path, struct gv_conf *gv_conf)
{
setenv("PULP_CONFIG_FILE", config_path.c_str(), 1);
js::config *js_config = js::import_config_from_file(config_path);
if (js_config == NULL)
{
fprintf(stderr, "Invalid configuration.");
return NULL;
}
js::config *gv_config = js_config->get("**/gvsoc");
std::string module_name = "vp.trace_domain_impl";
if (gv_config->get_child_bool("sv-mode"))
{
module_name = "sv." + module_name;
}
else if (gv_config->get_child_bool("debug-mode"))
{
module_name = "debug." + module_name;
}
std::replace(module_name.begin(), module_name.end(), '.', '/');
std::string path = std::string(getenv("GVSOC_PATH")) + "/" + module_name + ".so";
void *module = dlopen(path.c_str(), RTLD_NOW | RTLD_GLOBAL | RTLD_DEEPBIND);
if (module == NULL)
{
throw std::invalid_argument("ERROR, Failed to open periph model (module: " + module_name + ", error: " + std::string(dlerror()) + ")");
}
vp::component *(*constructor)(js::config *) = (vp::component * (*)(js::config *)) dlsym(module, "vp_constructor");
if (constructor == NULL)
{
throw std::invalid_argument("ERROR, couldn't find vp_constructor in loaded module (module: " + module_name + ")");
}
vp::component *instance = constructor(js_config);
vp::top *top = new vp::top();
top->top_instance = instance;
top->power_engine = new vp::power::engine(instance);
instance->set_vp_config(gv_config);
instance->set_gv_conf(gv_conf);
return (vp::component *)top;
}
extern "C" void *gv_create(const char *config_path, struct gv_conf *gv_conf)
{
return (void *)vp::__gv_create(config_path, gv_conf);
}
extern "C" void gv_destroy(void *arg)
{
}
extern "C" void gv_start(void *arg)
{
vp::top *top = (vp::top *)arg;
vp::component *instance = (vp::component *)top->top_instance;
instance->pre_pre_build();
instance->pre_build();
instance->build();
instance->build_new();
if (instance->gv_conf.open_proxy || instance->get_vp_config()->get_child_bool("proxy/enabled"))
{
int in_port = instance->gv_conf.open_proxy ? 0 : instance->get_vp_config()->get_child_int("proxy/port");
int out_port;
proxy = new Gv_proxy(instance, instance->gv_conf.req_pipe, instance->gv_conf.reply_pipe);
if (proxy->open(in_port, &out_port))
{
instance->throw_error("Failed to start proxy");
}
if (instance->gv_conf.proxy_socket)
{
*instance->gv_conf.proxy_socket = out_port;
}
}
}
extern "C" void gv_reset(void *arg, bool active)
{
vp::top *top = (vp::top *)arg;
vp::component *instance = (vp::component *)top->top_instance;
instance->reset_all(active);
}
extern "C" void gv_step(void *arg, int64_t timestamp)
{
vp::top *top = (vp::top *)arg;
vp::component *instance = (vp::component *)top->top_instance;
instance->step(timestamp);
}
extern "C" int64_t gv_time(void *arg)
{
vp::top *top = (vp::top *)arg;
vp::component *instance = (vp::component *)top->top_instance;
return instance->get_time_engine()->get_next_event_time();
}
extern "C" void *gv_open(const char *config_path, bool open_proxy, int *proxy_socket, int req_pipe, int reply_pipe)
{
struct gv_conf gv_conf;
gv_conf.open_proxy = open_proxy;
gv_conf.proxy_socket = proxy_socket;
gv_conf.req_pipe = req_pipe;
gv_conf.reply_pipe = reply_pipe;
void *instance = gv_create(config_path, &gv_conf);
if (instance == NULL)
return NULL;
gv_start(instance);
return instance;
}
Gvsoc_proxy::Gvsoc_proxy(std::string config_path)
: config_path(config_path)
{
}
void Gvsoc_proxy::proxy_loop()
{
FILE *sock = fdopen(this->reply_pipe[0], "r");
while(1)
{
char line[1024];
if (!fgets(line, 1024, sock))
return ;
std::string s = std::string(line);
std::regex regex{R"([\s]+)"};
std::sregex_token_iterator it{s.begin(), s.end(), regex, -1};
std::vector<std::string> words{it, {}};
if (words.size() > 0)
{
if (words[0] == "stopped")
{
int64_t timestamp = std::atoll(words[1].c_str());
printf("GOT STOP AT %ld\n", timestamp);
this->mutex.lock();
this->stopped_timestamp = timestamp;
this->running = false;
this->cond.notify_all();
this->mutex.unlock();
}
else if (words[0] == "running")
{
int64_t timestamp = std::atoll(words[1].c_str());
printf("GOT RUN AT %ld\n", timestamp);
this->mutex.lock();
this->running = true;
this->cond.notify_all();
this->mutex.unlock();
}
else if (words[0] == "req=")
{
}
else
{
printf("Ignoring invalid command: %s\n", words[0].c_str());
}
}
}
}
int Gvsoc_proxy::open()
{
pid_t ppid_before_fork = getpid();
if (pipe(this->req_pipe) == -1)
return -1;
if (pipe(this->reply_pipe) == -1)
return -1;
pid_t child_id = fork();
if(child_id == -1)
{
return -1;
}
else if (child_id == 0)
{
int r = prctl(PR_SET_PDEATHSIG, SIGTERM);
if (r == -1) { perror(0); exit(1); }
// test in case the original parent exited just
// before the prctl() call
if (getppid() != ppid_before_fork) exit(1);
void *instance = gv_open(this->config_path.c_str(), true, NULL, this->req_pipe[0], this->reply_pipe[1]);
int retval = gv_run(instance);
gv_stop(instance, retval);
return retval;
}
else
{
this->running = false;
this->loop_thread = new std::thread(&Gvsoc_proxy::proxy_loop, this);
}
return 0;
}
void Gvsoc_proxy::run()
{
dprintf(this->req_pipe[1], "cmd=run\n");
}
int64_t Gvsoc_proxy::pause()
{
int64_t result;
dprintf(this->req_pipe[1], "cmd=stop\n");
std::unique_lock<std::mutex> lock(this->mutex);
while (this->running)
{
this->cond.wait(lock);
}
result = this->stopped_timestamp;
lock.unlock();
return result;
}
void Gvsoc_proxy::close()
{
dprintf(this->req_pipe[1], "cmd=quit\n");
}
void Gvsoc_proxy::add_event_regex(std::string regex)
{
dprintf(this->req_pipe[1], "cmd=event add %s\n", regex.c_str());
}
void Gvsoc_proxy::remove_event_regex(std::string regex)
{
dprintf(this->req_pipe[1], "cmd=event remove %s\n", regex.c_str());
}
void Gvsoc_proxy::add_trace_regex(std::string regex)
{
dprintf(this->req_pipe[1], "cmd=trace add %s\n", regex.c_str());
}
void Gvsoc_proxy::remove_trace_regex(std::string regex)
{
dprintf(this->req_pipe[1], "cmd=trace remove %s\n", regex.c_str());
}
vp::time_scheduler::time_scheduler(js::config *config)
: time_engine_client(config), first_event(NULL)
{
}
int64_t vp::time_scheduler::exec()
{
vp::time_event *current = this->first_event;
while (current && current->time == this->get_time())
{
this->first_event = current->next;
current->meth(current->_this, current);
current = this->first_event;
}
if (this->first_event == NULL)
{
return -1;
}
else
{
return this->first_event->time - this->get_time();
}
}
vp::time_event::time_event(time_scheduler *comp, time_event_meth_t *meth)
: comp(comp), _this((void *)static_cast<vp::component *>((vp::time_scheduler *)(comp))), meth(meth), enqueued(false)
{
}
vp::time_event *vp::time_scheduler::enqueue(time_event *event, int64_t time)
{
vp::time_event *current = this->first_event, *prev = NULL;
int64_t full_time = time + this->get_time();
while (current && current->time < full_time)
{
prev = current;
current = current->next;
}
if (prev)
prev->next = event;
else
this->first_event = event;
event->next = current;
event->time = full_time;
this->enqueue_to_engine(time);
return event;
}
extern "C" int gv_run(void *arg)
{
vp::top *top = (vp::top *)arg;
vp::component *instance = (vp::component *)top->top_instance;
if (!proxy)
{
instance->run();
}
return instance->join();
}
extern "C" void gv_init(struct gv_conf *gv_conf)
{
gv_conf->open_proxy = 0;
if (gv_conf->proxy_socket)
{
*gv_conf->proxy_socket = -1;
}
gv_conf->req_pipe = 0;
gv_conf->reply_pipe = 0;
}
extern "C" void gv_stop(void *arg, int retval)
{
vp::top *top = (vp::top *)arg;
vp::component *instance = (vp::component *)top->top_instance;
if (proxy)
{
proxy->stop(retval);
}
instance->stop_all();
delete top->power_engine;
}
#ifdef __VP_USE_SYSTEMC
static void *(*sc_entry)(void *);
static void *sc_entry_arg;
void set_sc_main_entry(void *(*entry)(void *), void *arg)
{
sc_entry = entry;
sc_entry_arg = arg;
}
int sc_main(int argc, char *argv[])
{
sc_entry(sc_entry_arg);
return 0;
}
#endif
void vp::fatal(const char *fmt, ...)
{
va_list ap;
va_start(ap, fmt);
if (vfprintf(stderr, fmt, ap) < 0) {}
va_end(ap);
abort();
}
extern "C" void *gv_chip_pad_bind(void *handle, char *name, int ext_handle)
{
vp::top *top = (vp::top *)handle;
vp::component *instance = (vp::component *)top->top_instance;
return instance->external_bind(name, "", (void *)(long)ext_handle);
}
|
// ================================================================
// NVDLA Open Source Project
//
// Copyright(c) 2016 - 2017 NVIDIA Corporation. Licensed under the
// NVDLA Open Hardware License; Check "LICENSE" which comes with
// this distribution for more information.
// ================================================================
// File Name: cdp_hls_wrapper.cpp
#include "log.h"
#include "ac_int.h"
#include "ac_channel.h"
#include "log.h"
#include <systemc.h>
#include "arnvdla.h"
#define __STDC_FORMAT_MACROS
#include <inttypes.h>
#include "vlibs.h"
#include "cdp_hls_wrapper.h"
#pragma CTC SKIP
int half2single(void *target, void *source, int numel)
{
unsigned short *hp = (unsigned short *) source; // Type pun input as an unsigned 16-bit int
unsigned int *xp = (unsigned int *) target; // Type pun output as an unsigned 32-bit int
unsigned short h, hs, he, hm;
unsigned int xs, xe, xm;
int xes;
int e;
static int checkieee = 1; // Flag to check for IEEE754, Endian, and word size
double one = 1.0; // Used for checking IEEE754 floating point format
unsigned int *ip; // Used for checking IEEE754 floating point format
if( checkieee ) { // 1st call, so check for IEEE754, Endian, and word size
ip = (unsigned int *) &one;
if( *ip ) { // If Big Endian, then no adjustment
} else { // If Little Endian, then adjustment will be necessary
ip++;
}
if( *ip != 0x3FF00000u ) { // Check for exact IEEE 754 bit pattern of 1.0
return 1; // Floating point bit pattern is not IEEE 754
}
if( sizeof(short) != 2 || sizeof(int) != 4 ) {
return 1; // short is not 16-bits, or long is not 32-bits.
}
checkieee = 0; // Everything checks out OK
}
if( source == NULL || target == NULL ) // Nothing to convert (e.g., imag part of pure real)
return 0;
while( numel-- ) {
h = *hp++;
if( (h & 0x7FFFu) == 0 ) { // Signed zero
*xp++ = ((unsigned int) h) << 16; // Return the signed zero
} else { // Not zero
hs = h & 0x8000u; // Pick off sign bit
he = h & 0x7C00u; // Pick off exponent bits
hm = h & 0x03FFu; // Pick off mantissa bits
if( he == 0 ) { // Denormal will convert to normalized
e = -1; // The following loop figures out how much extra to adjust the exponent
do {
e++;
hm <<= 1;
} while( (hm & 0x0400u) == 0 ); // Shift until leading bit overflows into exponent bit
xs = ((unsigned int) hs) << 16; // Sign bit
xes = ((int) (he >> 10)) - 15 + 127 - e; // Exponent unbias the halfp, then bias the single
xe = (unsigned int) (xes << 23); // Exponent
xm = ((unsigned int) (hm & 0x03FFu)) << 13; // Mantissa
*xp++ = (xs | xe | xm); // Combine sign bit, exponent bits, and mantissa bits
} else if( he == 0x7C00u ) { // Inf or NaN (all the exponent bits are set)
if( hm == 0 ) { // If mantissa is zero ...
*xp++ = (((unsigned int) hs) << 16) | ((unsigned int) 0x7F800000u); // Signed Inf
} else {
*xp++ = (unsigned int) 0xFFC00000u; // NaN, only 1st mantissa bit set
}
} else { // Normalized number
xs = ((unsigned int) hs) << 16; // Sign bit
xes = ((int) (he >> 10)) - 15 + 127; // Exponent unbias the halfp, then bias the single
xe = (unsigned int) (xes << 23); // Exponent
xm = ((unsigned int) hm) << 13; // Mantissa
*xp++ = (xs | xe | xm); // Combine sign bit, exponent bits, and mantissa bits
}
}
}
return 0;
}
int single2half(void *target, void *source, int numel)
{
unsigned short *hp = (unsigned short *) target; // Type pun output as an unsigned 16-bit int
unsigned int *xp = (unsigned int *) source; // Type pun input as an unsigned 32-bit int
unsigned short hs, he, hm;
unsigned int x, xs, xe, xm;
int hes;
static int checkieee = 1; // Flag to check for IEEE754, Endian, and word size
double one = 1.0; // Used for checking IEEE754 floating point format
unsigned int *ip; // Used for checking IEEE754 floating point format
if( checkieee ) { // 1st call, so check for IEEE754, Endian, and word size
ip = (unsigned int *) &one;
if( *ip ) { // If Big Endian, then no adjustment
} else { // If Little Endian, then adjustment will be necessary
ip++;
}
if( *ip != 0x3FF00000u ) { // Check for exact IEEE 754 bit pattern of 1.0
return 1; // Floating point bit pattern is not IEEE 754
}
if( sizeof(short) != 2 || sizeof(int) != 4 ) {
return 1; // short is not 16-bits, or long is not 32-bits.
}
checkieee = 0; // Everything checks out OK
}
if( source == NULL || target == NULL ) { // Nothing to convert (e.g., imag part of pure real)
return 0;
}
while( numel-- ) {
x = *xp++;
if( (x & 0x7FFFFFFFu) == 0 ) { // Signed zero
*hp++ = (unsigned short) (x >> 16); // Return the signed zero
} else { // Not zero
xs = x & 0x80000000u; // Pick off sign bit
xe = x & 0x7F800000u; // Pick off exponent bits
xm = x & 0x007FFFFFu; // Pick off mantissa bits
if( xe == 0 ) { // Denormal will underflow, return a signed zero
*hp++ = (unsigned short) (xs >> 16);
} else if( xe == 0x7F800000u ) { // Inf or NaN (all the exponent bits are set)
if( xm == 0 ) { // If mantissa is zero ...
*hp++ = (unsigned short) ((xs >> 16) | 0x7C00u); // Signed Inf
} else {
*hp++ = (unsigned short) 0xFE00u; // NaN, only 1st mantissa bit set
}
} else { // Normalized number
hs = (unsigned short) (xs >> 16); // Sign bit
hes = ((int)(xe >> 23)) - 127 + 15; // Exponent unbias the single, then bias the halfp
if( hes >= 0x1F ) { // Overflow
*hp++ = (unsigned short) ((xs >> 16) | 0x7C00u); // Signed Inf
} else if( hes <= 0 ) { // Underflow
if( (14 - hes) > 24 ) { // Mantissa shifted all the way off & no rounding possibility
hm = (unsigned short) 0u; // Set mantissa to zero
} else {
xm |= 0x00800000u; // Add the hidden leading bit
hm = (unsigned short) (xm >> (14 - hes)); // Mantissa
if( (xm >> (13 - hes)) & 0x00000001u ) // Check for rounding
hm += (unsigned short) 1u; // Round, might overflow into exp bit, but this is OK
}
*hp++ = (hs | hm); // Combine sign bit and mantissa bits, biased exponent is zero
} else {
he = (unsigned short) (hes << 10); // Exponent
hm = (unsigned short) (xm >> 13); // Mantissa
if( xm & 0x00001000u ) // Check for rounding
*hp++ = (hs | he | hm) + (unsigned short) 1u; // Round, might overflow to inf, this is OK
else
*hp++ = (hs | he | hm); // No rounding
}
}
}
}
return 0;
}
#pragma CTC ENDSKIP
// Inputs: 12 HLS_FP17 after icvt
// Outputs: 1 HLS_FP17 after Interplolation
void HLS_CDP_lookup_lut (
vFp32Type square_sum,
uint16_t lut_upper_index,
bool le, // True: linear_exp table
bool exp_mode, // Only for linear_exp table
int16_t* lut, // LUT table
uint64_t lut_start,
uint64_t lut_end,
int16_t slope_uflow_scale, // It's accutally signed value
int16_t slope_oflow_scale,
int16_t index_offset,
int8_t index_select,
// Outputs
bool & underflow,
bool & overflow,
bool & lut_hit,
ac_channel<vFp17Type> & chn_result_fp17)
{
#if !ASSERT_WAR_CONSTRAIN
// assert(density_end - pow(2, cdp_lut_lo_index_select_ + 8) == density_start);
#endif
// Variables for sub input_offset
vFp32Type lut_start_fp32, lut_end_fp32;
vFp32Type lut_sub_result_fp32;
ac_channel<vFp32Type> chn_square_sum_fp32;
ac_channel<vFp32Type> chn_lut_start_fp32, chn_lut_end_fp32;
ac_channel<vFp32Type> chn_lut_sub_result_fp32;
ac_channel<vFp17Type> chn_lut_sub_result_fp17;
float lut_sub_result_float;
float lut_shifted;
uint16_t lut_offset;
int32_t lut_index;
ac_channel<vFp17Type> chn_lut_offset_fp17;
// Varibales for underflow/overflow
vFp16Type slope_fp16;
ac_channel<vFp16Type> chn_slope_fp16;
ac_channel<vFp17Type> chn_slope_fp17;
ac_channel<vFp17Type> chn_lo_sub_result_fp17;
ac_channel<vFp17Type> chn_mul_result_fp17;
ac_channel<vFp17Type> chn_result_lut_underflow;
ac_channel<vFp17Type> chn_result_lut_overflow;
// Variables for Interpolation
uint16_t result_0, result_1;
vFp16Type result_0_fp16, result_1_fp16;
ac_channel<vFp16Type> chn_result_0_fp16, chn_result_1_fp16;
vFp32Type result_0_fp32, result_1_fp32;
ac_channel<vFp32Type> chn_result_0_fp32, chn_result_1_fp32;
ac_channel<vFp17Type> chn_result_0_fp17;
ac_channel<vFp17Type> chn_result_1_fp17;
// ac_channel<vFp17Type> chn_result_underflow_fp17;
// ac_channel<vFp17Type> chn_result_overflow_fp17;
ac_channel<vFp32Type> chn_L1_minus_L0_fp32;
ac_channel<vFp17Type> chn_L1_minus_L0_fp17;
ac_channel<vFp17Type> chn_result_lut_tmp;
//--------------------------------------------
underflow = false;
overflow = false;
//exp_underflow = false;
//exp_overflow = false;
lut_hit = false;
//--------------------------------------------
// 1. sub offset
lut_start_fp32 = lut_start;
chn_lut_start_fp32.write(lut_start_fp32);
chn_square_sum_fp32.write(square_sum);
HLS_fp32_sub(chn_square_sum_fp32, chn_lut_start_fp32, chn_lut_sub_result_fp32);
lut_sub_result_fp32 = chn_lut_sub_result_fp32.read();
lut_sub_result_float = *(float *)(&lut_sub_result_fp32); // vFp32Type is actually integer type
cslDebug((70, "lut_start=0x%x, lut_sub_result=0x%x\n", (uint32_t)lut_start_fp32, (uint32_t)lut_sub_result_fp32));
if(lut_sub_result_float <= 0 || std::isnan(lut_sub_result_float))
{
underflow = true;
}
if (!underflow) {
if (le && exp_mode) {
// Log2. If lo_sub_result_float is 0, exp will be 0
uint32_t tmp_uint32 = *(uint32_t*)(&lut_sub_result_float);
int32_t exp_raw = (tmp_uint32 >> 23) & 0xff; // 8bits
//int32_t exp = (exp_raw == 0)? 0 : exp_raw - 127;
int32_t exp = exp_raw - 127;
lut_index = exp - index_offset;
lut_offset = (tmp_uint32 >> 7) & 0xffff;
if(lut_index < 0)
{
lut_offset >>= -lut_index;
lut_index = 0;
underflow = true;
}
else if (lut_index >= lut_upper_index)
{
overflow = true;
}
cslDebug((70, "exp=%d, index_offset=%d, lut_index=%d, lut_offset=%d\n", exp, index_offset, lut_index, lut_offset));
}
else {
// lo or (le && linear_mode)
// To int and Shift using float of C++
// In RTL, HLS is not used in below code
if(index_select >= 0)
lut_shifted = lut_sub_result_float / pow(2, index_select);
else
lut_shifted = lut_sub_result_float * pow(2, -index_select);
overflow = lut_shifted >= lut_upper_index;
lut_index = lut_shifted;
lut_offset = (lut_shifted - int32_t(lut_shifted)) * 0x10000; // 16 MSB bits of fraction
cslDebug((70, "index_select=%d, lut_shifted=%f, lut_index=%d, lut_offset=%d\n", index_select, lut_shifted, lut_index, lut_offset));
}
}
// Convert Fraction from special INT16 to HLS_FP17
vU16Type lut_offset_u16 = lut_offset;
ac_channel<vU16Type> chn_lut_offset_u16;
chn_lut_offset_u16.write(lut_offset_u16);
HLS_uint16_to_fp17(chn_lut_offset_u16, chn_lut_offset_fp17);
//if ((underflow || (le&&exp_underflow))) {
if (underflow) {
result_0 = lut[0];
result_0_fp16 = result_0;
chn_result_0_fp16.write(result_0_fp16);
cslDebug((70, "L0=0x%x\n", result_0));
// Convert result_lo_0 of HLS FP16 to HLS_FP17
HLS_fp16_to_fp17(chn_result_0_fp16, chn_result_0_fp17);
slope_fp16 = (int16_t)slope_uflow_scale;
chn_slope_fp16.write(slope_fp16);
// Convert FP16 to HLS_FP17
HLS_fp16_to_fp17(chn_slope_fp16, chn_slope_fp17);
// Convert FP32 to HLS_FP17
if(le && exp_mode)
{
float offset;
#pragma CTC SKIP
if(index_offset <= -127)
{
offset = 0;
}
#pragma CTC ENDSKIP
else
{
offset = pow(2, index_offset);
}
ac_channel<vFp32Type> chn_offset, chn_offset_adj;
chn_offset.write(*(vFp32Type *)(&offset));
chn_lut_start_fp32.write(lut_start_fp32);
HLS_fp32_add(chn_lut_start_fp32, chn_offset, chn_offset_adj);
chn_square_sum_fp32.write(square_sum);
HLS_fp32_sub(chn_square_sum_fp32, chn_offset_adj, chn_lut_sub_result_fp32);
}
else
{
chn_lut_sub_result_fp32.write(lut_sub_result_fp32);
}
HLS_fp32_to_fp17(chn_lut_sub_result_fp32, chn_lut_sub_result_fp17);
// chn_gap * slope
HLS_fp17_mul(chn_lut_sub_result_fp17, chn_slope_fp17, chn_mul_result_fp17);
HLS_fp17_add(chn_mul_result_fp17, chn_result_0_fp17, chn_result_fp17);
}
//else if ((overflow || (le&&exp_overflow))) {
else if (overflow) {
result_1 = lut[lut_upper_index];
result_1_fp16 = result_1;
chn_result_1_fp16.write(result_1_fp16);
cslDebug((70, "L1=0x%x\n", result_1));
// Convert result_lo_0 of HLS FP16 to HLS_FP17
HLS_fp16_to_fp17(chn_result_1_fp16, chn_result_1_fp17);
slope_fp16 = (int16_t)slope_oflow_scale;
chn_slope_fp16.write(slope_fp16);
// Convert FP16 to HLS_FP17
HLS_fp16_to_fp17(chn_slope_fp16, chn_slope_fp17);
// Convert FP32 to HLS_FP17
lut_end_fp32 = lut_end;
chn_lut_end_fp32.write(lut_end_fp32);
chn_square_sum_fp32.write(square_sum);
HLS_fp32_sub(chn_square_sum_fp32, chn_lut_end_fp32, chn_lut_sub_result_fp32);
HLS_fp32_to_fp17(chn_lut_sub_result_fp32, chn_lut_sub_result_fp17);
// chn_gap * slope
HLS_fp17_mul(chn_lut_sub_result_fp17, chn_slope_fp17, chn_mul_result_fp17);
HLS_fp17_add(chn_mul_result_fp17, chn_result_1_fp17, chn_result_fp17);
}
else {
result_0 = lut[lut_index];
result_1 = lut[lut_index+1];
result_0_fp16 = result_0;
result_1_fp16 = result_1;
chn_result_0_fp16.write(result_0_fp16);
chn_result_1_fp16.write(result_1_fp16);
cslDebug((70, "L0=0x%x, L1=0x%x\n", result_0, result_1));
// Convert HLS_FP16 to HLS_FP32
HLS_fp16_to_fp32(chn_result_0_fp16, chn_result_0_fp32);
HLS_fp16_to_fp32(chn_result_1_fp16, chn_result_1_fp32);
// Convert result_lo_0 of HLS FP16 to HLS_FP17
chn_result_0_fp16.write(result_0_fp16);
HLS_fp16_to_fp17(chn_result_0_fp16, chn_result_0_fp17);
// Interpolation
HLS_fp32_sub(chn_result_1_fp32, chn_result_0_fp32, chn_L1_minus_L0_fp32);
//vFp32Type L1_minus_L0_fp32 = chn_L1_minus_L0_fp32.read();
//cslDebug((70,"L1_minus_L0_fp32=0x%x\n", L1_minus_L0_fp32));
//chn_L1_minus_L0_fp32.write(L1_minus_L0_fp32);
HLS_fp32_to_fp17(chn_L1_minus_L0_fp32, chn_L1_minus_L0_fp17);
HLS_fp17_mul(chn_L1_minus_L0_fp17, chn_lut_offset_fp17, chn_result_lut_tmp);
HLS_fp17_add(chn_result_lut_tmp, chn_result_0_fp17, chn_result_fp17);
lut_hit = true;
/*
float L0_float, L1_float, L1_minus_L0_float, result_float;
half2single(&L0_float,&result_0_fp16, 1);
cslDebug((70,"L0: %f(0x%x)\n", L0_float, *(int *)(&L0_float) ));
half2single(&L1_float,&result_1_fp16, 1);
cslDebug((70,"L1: %f(0x%x)\n", L1_float, *(int *)(&L1_float) ));
L1_minus_L0_float = L1_float - L0_float;
cslDebug((70,"L1-L1: %f(0x%x)\n", L1_minus_L0_float, *(int *)(&L1_minus_L0_float) ));
result_float = L0_float + L1_minus_L0_float * lut_offset;
cslDebug((70,"result: %f(0x%x)\n", result_float, *(int *)(&result_float) ));*/
}
}
void HLS_CDP_lookup_fp16 (
int16_t *data_in, // 12 * fp17
int16_t *le_lut,
int16_t *lo_lut,
// Configurations
uint16_t normalz_len,
uint16_t raw_method,
bool lut_uflow_priority,
bool lut_oflow_priority,
bool lut_hybrid_priority,
uint64_t le_start,
int16_t le_index_offset,
int8_t le_index_select,
uint64_t le_end,
uint64_t lo_start,
int8_t lo_index_select,
uint64_t lo_end,
uint16_t datin_offset,
uint16_t datin_scale,
uint8_t datin_shifter,
uint32_t datout_offset,
uint16_t datout_scale,
uint8_t datout_shifter,
int16_t le_slope_uflow_scale,
int16_t le_slope_oflow_scale,
int16_t lo_slope_uflow_scale,
int16_t lo_slope_oflow_scale,
bool sqsum_bypass,
bool mul_bypass,
int16_t *normalz_out,
uint32_t *lut_u_flow,
uint32_t *lut_o_flow,
uint32_t *lut_le_hit,
uint32_t *lut_lo_hit,
uint32_t *lut_hybrid_hit) // 16bits
{
int i;
// Outputs
bool le_underflow;
bool le_overflow;
//bool exp_underflow;
//bool exp_overflow;
bool lo_underflow;
bool lo_overflow;
bool le_hit;
bool lo_hit;
// Variables
int32_t icvt_data_out[12];
ac_channel<vFp32Type> fp17tofp32_out[12];
ac_channel<vFp32Type> square_array[12];
//ac_channel<vFp32Type> square_sum;
vFp32Type square_result[12];
// Outputs of lut tables
ac_channel<vFp17Type> chn_result_le_fp17;
ac_channel<vFp17Type> chn_result_lo_fp17;
// ac_channel<vFp17Type> chn_result_fp17;
ac_channel<vFp17Type> chn_result_to_ocvt_fp17;
ac_channel<vFp17Type> chn_ocvt_out_fp17;
#if 0
// Initialization
le_underflow = false;
le_overflow = false;
exp_underflow = false;
exp_overflow = false;
lo_underflow = false;
lo_overflow = false;
le_hit = false;
lo_hit = false;
#endif
vFp32Type icvt_data_out_fp32[12];
float tmp[12], din_offset, din_scale;
half2single(&din_offset, &datin_offset, 1);
half2single(&din_scale, &datin_scale, 1);
cslDebug((70, "Data before input converter(float)\n"));
for(i=0; i<12; i++)
{
half2single(&tmp[i], &data_in[i], 1);
cslDebug((70, "%f(0x%x) ", tmp[i], *(int *)(&tmp[i]) ));
}
cslDebug((70, "\n"));
cslDebug((70, "Data after square(float)\n"));
for(i=0; i<12; i++)
{
tmp[i] = tmp[i] * tmp[i];
cslDebug((70, "%f(0x%x) ", tmp[i], *(int *)(&tmp[i]) ));
}
cslDebug((70, "\n"));
for(i=0; i<12; i++) {
//***** Input Convertor (FP16->FP17) ******
cdp_icvt_hls(&data_in[i], datin_offset, datin_scale, datin_shifter, NVDLA_CDP_RDMA_D_DATA_FORMAT_0_INPUT_DATA_FP16, &icvt_data_out[i]);
|
//***** Convert FP17 to FP32 ******
ac_channel<vFp17Type> chn_a;
chn_a.write(icvt_data_out[i]);
HLS_fp17_to_fp32(chn_a, fp17tofp32_out[i]);
icvt_data_out_fp32[i] = fp17tofp32_out[i].read();
ac_channel<vFp32Type> chn_b, chn_c;
chn_b.write(icvt_data_out_fp32[i]);
chn_c.write(icvt_data_out_fp32[i]);
if(sqsum_bypass)
{
square_result[i] = icvt_data_out_fp32[i];
}
else
{
HLS_fp32_mul(chn_b, chn_c, square_array[i]); // HLS_FP32 mul
square_result[i] = square_array[i].read(); //keep data to re-write the square_array later
}
}
// cslDebug((70, "Data after input convertor(FP17):\n"));
// for(int i=0;i<12;i++) cslDebug((70,"%x ", *(int*)(&icvt_data_out[i]) ));
// cslDebug((70, "\n"));
cslDebug((70, "Data after input convertor(FP32):\n"));
for(int i=0;i<12;i++) cslDebug((70,"%x ", *(int*)(&icvt_data_out_fp32[i]) ));
cslDebug((70, "\n"));
cslDebug((70, "Data after square:\n"));
for(int i=0;i<12;i++) cslDebug((70,"%x ", *(int*)(&square_result[i]) ));
cslDebug((70, "\n"));
//***** Per Element ******
for (i=0; i<4; i++) {
le_underflow = false;
le_overflow = false;
//exp_underflow = false;
//exp_overflow = false;
lo_underflow = false;
lo_overflow = false;
le_hit = false;
lo_hit = false;
//re-write square_array in each iteration since it is empty after read
for(int j=0; j<12; j++) square_array[j].write(square_result[j]);
//***** Sum ******
vFp32Type square_sum_result;
if(sqsum_bypass)
{
square_sum_result = square_array[i+4].read();
}
else
{
ac_channel<vFp32Type> square_sum_1, square_sum_2;
HLS_fp32_add(square_array[i+3], square_array[i+5], square_sum_1); //3 + 5
HLS_fp32_add(square_sum_1, square_array[i+4], square_sum_2); //sum3 = (3 + 5) + 4
ac_channel<vFp32Type> square_sum_3, square_sum_4;
if(normalz_len > 0) //5+ elements
{
HLS_fp32_add(square_array[i+2], square_array[i+6], square_sum_3); //2 + 6
HLS_fp32_add(square_sum_2, square_sum_3, square_sum_4); //sum5 = sum3 + (2 + 6)
}
ac_channel<vFp32Type> square_sum_5, square_sum_6;
if(normalz_len > 1) //7+ elements
{
HLS_fp32_add(square_array[i+1], square_array[i+7], square_sum_5); //1 + 7
HLS_fp32_add(square_sum_4, square_sum_5, square_sum_6); //sum7 = sum5 + (1 + 7)
}
ac_channel<vFp32Type> square_sum_7, square_sum_8;
if(normalz_len > 2) //9 elements
{
HLS_fp32_add(square_array[i+0], square_array[i+8], square_sum_7); //1 + 7
HLS_fp32_add(square_sum_6, square_sum_7, square_sum_8); //sum9 = sum7 + (0 + 8)
}
switch(normalz_len)
{
case 0: square_sum_result = square_sum_2.read(); break;
case 1: square_sum_result = square_sum_4.read(); break;
case 2: square_sum_result = square_sum_6.read(); break;
case 3: square_sum_result = square_sum_8.read(); break;
#pragma CTC SKIP
default: break;
#pragma CTC ENDSKIP
}
}
cslDebug((70, "Square sum: %x\n", *(int *)(&square_sum_result) ));
// Look up Raw table
if(NVDLA_CDP_S_LUT_CFG_0_LUT_LE_FUNCTION_EXPONENT == raw_method) { //raw lut is exponential
cslDebug((70, "Lookup exp table\n"));
HLS_CDP_lookup_lut(square_sum_result, 64, true, true, le_lut, le_start, le_end, le_slope_uflow_scale, le_slope_oflow_scale, le_index_offset, le_index_select, le_underflow, le_overflow, le_hit, chn_result_le_fp17);
}
else { // raw lut is linear
cslDebug((70, "Lookup lin table\n"));
HLS_CDP_lookup_lut(square_sum_result, 64, true, false, le_lut, le_start, le_end, le_slope_uflow_scale, le_slope_oflow_scale, le_index_offset, le_index_select, le_underflow, le_overflow, le_hit, chn_result_le_fp17);
}
cslDebug((70, "Lookup lo table\n"));
// Look up LO(Linear Only) table
HLS_CDP_lookup_lut(square_sum_result, 256, false, false, lo_lut, lo_start, lo_end, lo_slope_uflow_scale, lo_slope_oflow_scale, 0, lo_index_select, lo_underflow, lo_overflow, lo_hit, chn_result_lo_fp17);
vFp17Type result_le = chn_result_le_fp17.read();
vFp17Type result_lo = chn_result_lo_fp17.read();
vFp17Type result_out;
// Select result between RAW table and Density Table
if(le_underflow && lo_underflow) {
result_out = lut_uflow_priority? result_lo : result_le;
(*lut_u_flow)++;
}
else if(le_overflow && lo_overflow) {
result_out = lut_oflow_priority? result_lo : result_le;
(*lut_o_flow)++;
}
else {
if(le_hit ^ lo_hit) {
result_out = le_hit? result_le : result_lo;
if(le_hit)
{
(*lut_le_hit)++;
}
else
{
(*lut_lo_hit)++;
}
}
else {
if(lut_hybrid_priority)
result_out = result_lo;
else
result_out = result_le;
(*lut_hybrid_hit)++;
}
}
cslDebug((70, "le:%x, lo:%x, out:%x\n" , *(int *)(&result_le), *(int *)(&result_lo), *(int *)(&result_out) ));
if(mul_bypass)
{
float icvt_data_out_float = *(float *)&icvt_data_out_fp32[i+4];
if(std::isnan(icvt_data_out_float))
{
chn_result_to_ocvt_fp17.write(icvt_data_out[i+4]);
}
else
{
chn_result_to_ocvt_fp17.write(result_out);
}
}
else
{
ac_channel<vFp17Type> chn_result_fp17, chn_icvt_data_out_fp17;
chn_result_fp17.write(result_out);
vFp17Type icvt_data_out_fp17 = icvt_data_out[i+4];
chn_icvt_data_out_fp17.write(icvt_data_out_fp17);
HLS_fp17_mul(chn_icvt_data_out_fp17, chn_result_fp17, chn_result_to_ocvt_fp17);
}
// Output Converter
int64_t ocvt_data_in = chn_result_to_ocvt_fp17.read();
cslDebug((70, "ocvt_data_in:%x\n", (int)ocvt_data_in));
uint8_t flag;
cdp_ocvt_hls(&ocvt_data_in, datout_offset, datout_scale, datout_shifter, NVDLA_CDP_RDMA_D_DATA_FORMAT_0_INPUT_DATA_FP16, &normalz_out[i], &flag);
}
}
|
///////////////////////////////////////////////////////////////////////////////////
// __ _ _ _ //
// / _(_) | | | | //
// __ _ _ _ ___ ___ _ __ | |_ _ ___| | __| | //
// / _` | | | |/ _ \/ _ \ '_ \| _| |/ _ \ |/ _` | //
// | (_| | |_| | __/ __/ | | | | | | __/ | (_| | //
// \__, |\__,_|\___|\___|_| |_|_| |_|\___|_|\__,_| //
// | | //
// |_| //
// //
// //
// Peripheral-NTM for MPSoC //
// Neural Turing Machine for MPSoC //
// //
///////////////////////////////////////////////////////////////////////////////////
///////////////////////////////////////////////////////////////////////////////////
// //
// Copyright (c) 2020-2024 by the author(s) //
// //
// Permission is hereby granted, free of charge, to any person obtaining a copy //
// of this software and associated documentation files (the "Software"), to deal //
// in the Software without restriction, including without limitation the rights //
// to use, copy, modify, merge, publish, distribute, sublicense, and/or sell //
// copies of the Software, and to permit persons to whom the Software is //
// furnished to do so, subject to the following conditions: //
// //
// The above copyright notice and this permission notice shall be included in //
// all copies or substantial portions of the Software. //
// //
// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR //
// IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, //
// FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE //
// AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER //
// LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, //
// OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN //
// THE SOFTWARE. //
// //
// ============================================================================= //
// Author(s): //
// Paco Reina Campo <[email protected]> //
// //
///////////////////////////////////////////////////////////////////////////////////
#include "ntm_fnn_design.cpp"
#include "systemc.h"
int sc_main(int argc, char *argv[]) {
adder adder("ADDER");
sc_signal<int> Ain;
sc_signal<int> Bin;
sc_signal<bool> clock;
sc_signal<int> out;
adder(clock, Ain, Bin, out);
Ain = 1;
Bin = 2;
clock = 0;
sc_start(1, SC_NS);
clock = 1;
sc_start(1, SC_NS);
cout << "@" << sc_time_stamp() << ": A + B = " << out.read() << endl;
Ain = 2;
Bin = 2;
clock = 0;
sc_start(1, SC_NS);
clock = 1;
sc_start(1, SC_NS);
cout << "@" << sc_time_stamp() << ": A + B = " << out.read() << endl;
return 0;
}
|
///////////////////////////////////////////////////////////////////////////////////
// __ _ _ _ //
// / _(_) | | | | //
// __ _ _ _ ___ ___ _ __ | |_ _ ___| | __| | //
// / _` | | | |/ _ \/ _ \ '_ \| _| |/ _ \ |/ _` | //
// | (_| | |_| | __/ __/ | | | | | | __/ | (_| | //
// \__, |\__,_|\___|\___|_| |_|_| |_|\___|_|\__,_| //
// | | //
// |_| //
// //
// //
// Peripheral-NTM for MPSoC //
// Neural Turing Machine for MPSoC //
// //
///////////////////////////////////////////////////////////////////////////////////
///////////////////////////////////////////////////////////////////////////////////
// //
// Copyright (c) 2020-2024 by the author(s) //
// //
// Permission is hereby granted, free of charge, to any person obtaining a copy //
// of this software and associated documentation files (the "Software"), to deal //
// in the Software without restriction, including without limitation the rights //
// to use, copy, modify, merge, publish, distribute, sublicense, and/or sell //
// copies of the Software, and to permit persons to whom the Software is //
// furnished to do so, subject to the following conditions: //
// //
// The above copyright notice and this permission notice shall be included in //
// all copies or substantial portions of the Software. //
// //
// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR //
// IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, //
// FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE //
// AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER //
// LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, //
// OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN //
// THE SOFTWARE. //
// //
// ============================================================================= //
// Author(s): //
// Paco Reina Campo <[email protected]> //
// //
///////////////////////////////////////////////////////////////////////////////////
#include "ntm_fnn_design.cpp"
#include "systemc.h"
int sc_main(int argc, char *argv[]) {
adder adder("ADDER");
sc_signal<int> Ain;
sc_signal<int> Bin;
sc_signal<bool> clock;
sc_signal<int> out;
adder(clock, Ain, Bin, out);
Ain = 1;
Bin = 2;
clock = 0;
sc_start(1, SC_NS);
clock = 1;
sc_start(1, SC_NS);
cout << "@" << sc_time_stamp() << ": A + B = " << out.read() << endl;
Ain = 2;
Bin = 2;
clock = 0;
sc_start(1, SC_NS);
clock = 1;
sc_start(1, SC_NS);
cout << "@" << sc_time_stamp() << ": A + B = " << out.read() << endl;
return 0;
}
|
///////////////////////////////////////////////////////////////////////////////////
// __ _ _ _ //
// / _(_) | | | | //
// __ _ _ _ ___ ___ _ __ | |_ _ ___| | __| | //
// / _` | | | |/ _ \/ _ \ '_ \| _| |/ _ \ |/ _` | //
// | (_| | |_| | __/ __/ | | | | | | __/ | (_| | //
// \__, |\__,_|\___|\___|_| |_|_| |_|\___|_|\__,_| //
// | | //
// |_| //
// //
// //
// Peripheral-NTM for MPSoC //
// Neural Turing Machine for MPSoC //
// //
///////////////////////////////////////////////////////////////////////////////////
///////////////////////////////////////////////////////////////////////////////////
// //
// Copyright (c) 2020-2024 by the author(s) //
// //
// Permission is hereby granted, free of charge, to any person obtaining a copy //
// of this software and associated documentation files (the "Software"), to deal //
// in the Software without restriction, including without limitation the rights //
// to use, copy, modify, merge, publish, distribute, sublicense, and/or sell //
// copies of the Software, and to permit persons to whom the Software is //
// furnished to do so, subject to the following conditions: //
// //
// The above copyright notice and this permission notice shall be included in //
// all copies or substantial portions of the Software. //
// //
// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR //
// IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, //
// FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE //
// AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER //
// LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, //
// OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN //
// THE SOFTWARE. //
// //
// ============================================================================= //
// Author(s): //
// Paco Reina Campo <[email protected]> //
// //
///////////////////////////////////////////////////////////////////////////////////
#include "ntm_fnn_design.cpp"
#include "systemc.h"
int sc_main(int argc, char *argv[]) {
adder adder("ADDER");
sc_signal<int> Ain;
sc_signal<int> Bin;
sc_signal<bool> clock;
sc_signal<int> out;
adder(clock, Ain, Bin, out);
Ain = 1;
Bin = 2;
clock = 0;
sc_start(1, SC_NS);
clock = 1;
sc_start(1, SC_NS);
cout << "@" << sc_time_stamp() << ": A + B = " << out.read() << endl;
Ain = 2;
Bin = 2;
clock = 0;
sc_start(1, SC_NS);
clock = 1;
sc_start(1, SC_NS);
cout << "@" << sc_time_stamp() << ": A + B = " << out.read() << endl;
return 0;
}
|
/*****************************************************************************
Licensed to Accellera Systems Initiative Inc. (Accellera) under one or
more contributor license agreements. See the NOTICE file distributed
with this work for additional information regarding copyright ownership.
Accellera licenses this file to you under the Apache License, Version 2.0
(the "License"); you may not use this file except in compliance with the
License. You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
implied. See the License for the specific language governing
permissions and limitations under the License.
*****************************************************************************/
/*****************************************************************************
stimulus.cpp --
Original Author: Rocco Jonack, Synopsys, Inc.
*****************************************************************************/
/*****************************************************************************
MODIFICATION LOG - modifiers, enter your name, affiliation, date and
changes you are making here.
Name, Affiliation, Date:
Description of Modification:
*****************************************************************************/
#include <systemc.h>
#include "stimulus.h"
void stimulus::entry() {
cycle++;
// sending some reset values
if (cycle<4) {
reset.write(true);
input_valid.write(false);
} else {
reset.write(false);
input_valid.write( false );
// sending normal mode values
if (cycle%10==0) {
input_valid.write(true);
sample.write( (int)send_value1 );
cout << "Stimuli : " << (int)send_value1 << " at time "
/* << sc_time_stamp() << endl; */
<< sc_time_stamp().to_double() << endl;
send_value1++;
};
}
}
|
#include "systemc.h"
#if 0
#include "first_counter.cpp"
#else
#include "counter_vhdl.cpp"
#endif
int sc_main (int argc, char* argv[]) {
sc_signal<bool> clock;
sc_signal<bool> reset;
sc_signal<bool> enable;
sc_signal<sc_uint<4> > counter_out;
int i = 0;
// Connect the DUT
first_counter counter("COUNTER");
counter.clock(clock);
counter.reset(reset);
counter.enable(enable);
counter.counter_out(counter_out);
sc_start(1, SC_NS);
// Open VCD file
sc_trace_file *wf = sc_create_vcd_trace_file("counter");
// Dump the desired signals
sc_trace(wf, clock, "clock");
sc_trace(wf, reset, "reset");
sc_trace(wf, enable, "enable");
sc_trace(wf, counter_out, "count");
// Initialize all variables
reset = 0; // initial value of reset
enable = 0; // initial value of enable
for (i=0;i<5;i++) {
clock = 0;
sc_start(1, SC_NS);
clock = 1;
sc_start(1, SC_NS);
}
reset = 1; // Assert the reset
cout << "@" << sc_time_stamp() <<" Asserting reset\n" << endl;
for (i=0;i<10;i++) {
clock = 0;
sc_start(1, SC_NS);
clock = 1;
sc_start(1, SC_NS);
}
reset = 0; // De-assert the reset
cout << "@" << sc_time_stamp() <<" De-Asserting reset\n" << endl;
for (i=0;i<5;i++) {
clock = 0;
sc_start(1, SC_NS);
clock = 1;
sc_start(1, SC_NS);
}
cout << "count=" << counter_out << endl;
cout << "@" << sc_time_stamp() <<" Asserting Enable\n" << endl;
enable = 1; // Assert enable
for (i=0;i<20;i++) {
clock = 0;
sc_start(1, SC_NS);
clock = 1;
sc_start(1, SC_NS);
}
cout << "count=" << counter_out << endl;
cout << "@" << sc_time_stamp() <<" De-Asserting Enable\n" << endl;
enable = 0; // De-assert enable
cout << "@" << sc_time_stamp() <<" Terminating simulation\n" << endl;
sc_close_vcd_trace_file(wf);
return 0;// Terminate simulation
}
|
///////////////////////////////////////////////////////////////////////////////////
// __ _ _ _ //
// / _(_) | | | | //
// __ _ _ _ ___ ___ _ __ | |_ _ ___| | __| | //
// / _` | | | |/ _ \/ _ \ '_ \| _| |/ _ \ |/ _` | //
// | (_| | |_| | __/ __/ | | | | | | __/ | (_| | //
// \__, |\__,_|\___|\___|_| |_|_| |_|\___|_|\__,_| //
// | | //
// |_| //
// //
// //
// Peripheral-NTM for MPSoC //
// Neural Turing Machine for MPSoC //
// //
///////////////////////////////////////////////////////////////////////////////////
///////////////////////////////////////////////////////////////////////////////////
// //
// Copyright (c) 2020-2024 by the author(s) //
// //
// Permission is hereby granted, free of charge, to any person obtaining a copy //
// of this software and associated documentation files (the "Software"), to deal //
// in the Software without restriction, including without limitation the rights //
// to use, copy, modify, merge, publish, distribute, sublicense, and/or sell //
// copies of the Software, and to permit persons to whom the Software is //
// furnished to do so, subject to the following conditions: //
// //
// The above copyright notice and this permission notice shall be included in //
// all copies or substantial portions of the Software. //
// //
// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR //
// IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, //
// FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE //
// AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER //
// LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, //
// OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN //
// THE SOFTWARE. //
// //
// ============================================================================= //
// Author(s): //
// Paco Reina Campo <[email protected]> //
// //
///////////////////////////////////////////////////////////////////////////////////
#include "ntm_lstm_activation_u_trainer_design.cpp"
#include "systemc.h"
int sc_main(int argc, char *argv[]) {
adder adder("ADDER");
sc_signal<int> Ain;
sc_signal<int> Bin;
sc_signal<bool> clock;
sc_signal<int> out;
adder(clock, Ain, Bin, out);
Ain = 1;
Bin = 2;
clock = 0;
sc_start(1, SC_NS);
clock = 1;
sc_start(1, SC_NS);
cout << "@" << sc_time_stamp() << ": A + B = " << out.read() << endl;
Ain = 2;
Bin = 2;
clock = 0;
sc_start(1, SC_NS);
clock = 1;
sc_start(1, SC_NS);
cout << "@" << sc_time_stamp() << ": A + B = " << out.read() << endl;
return 0;
}
|
#include "observer.hpp"
#include "objection.hpp"
#include "top.hpp"
#include "systemc.hpp"
#include <iomanip>
#include <string>
using namespace sc_core;
namespace {
constexpr char const* const MSGID{ "/Doulos/Example/tracing" };
}
Observer_module::Observer_module( sc_module_name instance )
: sc_module( instance )
{
SC_HAS_PROCESS( Observer_module );
SC_THREAD( prepare_thread );
SC_THREAD( checker_thread );
actual_export.bind( actual_data );
}
void Observer_module::start_of_simulation()
{
const auto& trace_file { Top_module::trace_file() };
if( trace_file != nullptr ) {
auto prefix = std::string(name()) + ".";
sc_trace( trace_file, received_value, prefix + "received_value" );
sc_trace( trace_file, expected_value, prefix + "expected_value" );
sc_trace( trace_file, actual_value , prefix + "actual_value" );
sc_trace( trace_file, observed_count, prefix + "observed_count" );
sc_trace( trace_file, failures_count, prefix + "failures_count" );
}
}
void Observer_module::prepare_thread()
{
INFO( NONE, "Starting " << __PRETTY_FUNCTION__ );
// Obtain values sent out and convert into expected values
for(;;) {
wait( expect_port->value_changed_event() );
received_value = expect_port->read();
auto computed_value = ~std::hash<Data_t>{}( received_value ) & ~Data_t();
DEBUG( "Computed " << std::hex << computed_value );
expected_fifo.put( computed_value );
}
}
void Observer_module::checker_thread()
{
INFO( NONE, "Starting " << __PRETTY_FUNCTION__ );
for(;;) {
expected_value = expected_fifo.get(); // Wait for new expected value
{
Objection obj{ "Observing" }; // Raise objection on creation
wait( actual_data.value_changed_event() );
actual_value = actual_data.read();
++observed_count;
// Do the values match?
if( actual_value == expected_value ) {
INFO( HIGH, "Good value 0x" << std::hex << actual_value );
} else {
REPORT(ERROR, std::hex << "Mismatch got 0x" << actual_value
<< " != expected 0x" << expected_value );
++failures_count;
}
}
}
}
// TAF!
|
#include <systemc.h>
#include <i2c_controller.h>
void i2c_controller::clk_divider()
{
if(rst)
{
i2c_clk.write(1);
}
else
{
if(counter2 == 1)
{
bool t = i2c_clk.read();
i2c_clk.write(!t);
counter2 = 0;
}
else {
counter2 = counter2 + 1;
}
}
}
void i2c_controller::scl_controller()
{
if(rst)
{
i2c_scl_enable = 0;
}
else
{
if((state == IDLE) | (state == START) | (state == STOP))
{
i2c_scl_enable = 0;
}
else
{
i2c_scl_enable = 1;
}
}
}
void i2c_controller::logic_fsm()
{
if(rst)
{
state = IDLE;
}
else
{
switch(state)
{
case IDLE:
if(enable == 1)
{
state = START;
saved_addr = (addr,rw);
saved_data = data_in;
}
else
{
state = IDLE;
}
break;
case START:
counter = 7;
state = ADDRESS;
break;
case ADDRESS:
if(counter == 0)
{
state = READ_ACK;
}
else
{
counter = counter - 1;
}
break;
case READ_ACK:
if(i2c_sda ==(sc_logic) 0)
{
counter = 7;
if(saved_addr[0] == 0)
{
state = WRITE_DATA;
}
else
{
state = READ_DATA;
}
}
else
{
state = STOP;
}
break;
case WRITE_DATA:
if(counter == 0)
{
state = READ_ACK2;
}
else
{
counter = counter - 1;
}
break;
case READ_ACK2:
if((i2c_sda == 0) & (enable == 1))
{
state = IDLE;
}
else
{
state = STOP;
}
break;
case READ_DATA:
data_from_slave[counter] = i2c_sda;
if(counter == 0)
{
state = WRITE_ACK;
}
else
{
counter = counter - 1;
}
break;
case WRITE_ACK:
state = STOP;
break;
case STOP:
state = IDLE;
break;
}
}
}
void i2c_controller::data_fsm()
{
if(rst)
{
write_enable.write(1);
i2c_sda.write((sc_logic)1);
}
else
{
switch(state)
{
case IDLE:
break;
case READ_ACK2:
break;
case START:
write_enable.write(1);
i2c_sda.write((sc_logic)0);
break;
case ADDRESS:
{
int t = saved_addr[counter];
i2c_sda.write((sc_logic) t);
}
break;
case READ_ACK:
i2c_sda.write(sc_logic('Z'));
write_enable.write(0);
break;
case WRITE_DATA:
{
write_enable.write(1);
sc_logic t = saved_data[counter];
i2c_sda.write((sc_logic) t);
}
break;
case WRITE_ACK:
i2c_sda.write((sc_logic) 0);
write_enable.write(1);
break;
case READ_DATA:
write_enable.write(0);
break;
case STOP:
write_enable.write(1);
i2c_sda.write((sc_logic)1);
break;
}
}
}
void i2c_controller::ready_assign()
{
if((rst == 0) && (state == IDLE))
{
ready.write(1);
}
else
{
ready.write(0);
}
}
void i2c_controller::i2c_scl_assign()
{
if(i2c_scl_enable == 0)
{
i2c_scl.write((sc_logic)1);
}
else
{
i2c_scl.write((sc_logic)i2c_clk);
}
}
|
// ----------------------------------------------------------------------------
// SystemC SCVerify Flow -- sysc_sim_trans.cpp
//
// HLS version: 10.4b/841621 Production Release
// HLS date: Thu Oct 24 17:20:07 PDT 2019
// Flow Packages: HDL_Tcl 8.0a, SCVerify 10.4
//
// Generated by: [email protected]
// Generated date: Fri Apr 17 23:30:03 EDT 2020
//
// ----------------------------------------------------------------------------
//
// -------------------------------------
// sysc_sim_wrapper
// Represents a new SC_MODULE having the same interface as the original model SysTop_rtl
// -------------------------------------
//
#ifndef TO_QUOTED_STRING
#define TO_QUOTED_STRING(x) TO_QUOTED_STRING1(x)
#define TO_QUOTED_STRING1(x) #x
#endif
// Hold time for the SCVerify testbench to account for the gate delay after downstream synthesis in pico second(s)
// Hold time value is obtained from 'top_gate_constraints.cpp', which is generated at the end of RTL synthesis
#ifdef CCS_DUT_GATE
extern double __scv_hold_time;
#else
double __scv_hold_time = 0.0; // default for non-gate simulation is zero
#endif
#ifndef SC_USE_STD_STRING
#define SC_USE_STD_STRING
#endif
#include "../../../../../cmod/lab3/SysTop/SysTop.h"
#include <systemc.h>
#include <mc_scverify.h>
#include <mt19937ar.c>
#include "mc_dut_wrapper.h"
namespace CCS_RTL {
class sysc_sim_wrapper : public sc_module
{
public:
// Interface Ports
sc_core::sc_in<bool > clk;
sc_core::sc_in<bool > rst;
Connections::In<InputSetup::WriteReq, Connections::SYN_PORT > write_req;
Connections::In<ac_int<6, false >, Connections::SYN_PORT > start;
Connections::In<ac_int<8, true >, Connections::SYN_PORT > weight_in_vec[8];
Connections::Out<ac_int<32, true >, Connections::SYN_PORT > accum_out_vec[8];
// Data objects
sc_signal< bool > ccs_rtl_SIG_clk;
sc_signal< sc_logic > ccs_rtl_SIG_rst;
sc_signal< sc_logic > ccs_rtl_SIG_write_req_val;
sc_signal< sc_logic > ccs_rtl_SIG_write_req_rdy;
sc_signal< sc_lv<69> > ccs_rtl_SIG_write_req_msg;
sc_signal< sc_logic > ccs_rtl_SIG_start_val;
sc_signal< sc_logic > ccs_rtl_SIG_start_rdy;
sc_signal< sc_lv<6> > ccs_rtl_SIG_start_msg;
sc_signal< sc_logic > ccs_rtl_SIG_weight_in_vec_0_val;
sc_signal< sc_logic > ccs_rtl_SIG_weight_in_vec_1_val;
sc_signal< sc_logic > ccs_rtl_SIG_weight_in_vec_2_val;
sc_signal< sc_logic > ccs_rtl_SIG_weight_in_vec_3_val;
sc_signal< sc_logic > ccs_rtl_SIG_weight_in_vec_4_val;
sc_signal< sc_logic > ccs_rtl_SIG_weight_in_vec_5_val;
sc_signal< sc_logic > ccs_rtl_SIG_weight_in_vec_6_val;
sc_signal< sc_logic > ccs_rtl_SIG_weight_in_vec_7_val;
sc_signal< sc_logic > ccs_rtl_SIG_weight_in_vec_0_rdy;
sc_signal< sc_logic > ccs_rtl_SIG_weight_in_vec_1_rdy;
sc_signal< sc_logic > ccs_rtl_SIG_weight_in_vec_2_rdy;
sc_signal< sc_logic > ccs_rtl_SIG_weight_in_vec_3_rdy;
sc_signal< sc_logic > ccs_rtl_SIG_weight_in_vec_4_rdy;
sc_signal< sc_logic > ccs_rtl_SIG_weight_in_vec_5_rdy;
sc_signal< sc_logic > ccs_rtl_SIG_weight_in_vec_6_rdy;
sc_signal< sc_logic > ccs_rtl_SIG_weight_in_vec_7_rdy;
sc_signal< sc_lv<8> > ccs_rtl_SIG_weight_in_vec_0_msg;
sc_signal< sc_lv<8> > ccs_rtl_SIG_weight_in_vec_1_msg;
sc_signal< sc_lv<8> > ccs_rtl_SIG_weight_in_vec_2_msg;
sc_signal< sc_lv<8> > ccs_rtl_SIG_weight_in_vec_3_msg;
sc_signal< sc_lv<8> > ccs_rtl_SIG_weight_in_vec_4_msg;
sc_signal< sc_lv<8> > ccs_rtl_SIG_weight_in_vec_5_msg;
sc_signal< sc_lv<8> > ccs_rtl_SIG_weight_in_vec_6_msg;
sc_signal< sc_lv<8> > ccs_rtl_SIG_weight_in_vec_7_msg;
sc_signal< sc_logic > ccs_rtl_SIG_accum_out_vec_0_val;
sc_signal< sc_logic > ccs_rtl_SIG_accum_out_vec_1_val;
sc_signal< sc_logic > ccs_rtl_SIG_accum_out_vec_2_val;
sc_signal< sc_logic > ccs_rtl_SIG_accum_out_vec_3_val;
sc_signal< sc_logic > ccs_rtl_SIG_accum_out_vec_4_val;
sc_signal< sc_logic > ccs_rtl_SIG_accum_out_vec_5_val;
sc_signal< sc_logic > ccs_rtl_SIG_accum_out_vec_6_val;
sc_signal< sc_logic > ccs_rtl_SIG_accum_out_vec_7_val;
sc_signal< sc_logic > ccs_rtl_SIG_accum_out_vec_0_rdy;
sc_signal< sc_logic > ccs_rtl_SIG_accum_out_vec_1_rdy;
sc_signal< sc_logic > ccs_rtl_SIG_accum_out_vec_2_rdy;
sc_signal< sc_logic > ccs_rtl_SIG_accum_out_vec_3_rdy;
sc_signal< sc_logic > ccs_rtl_SIG_accum_out_vec_4_rdy;
sc_signal< sc_logic > ccs_rtl_SIG_accum_out_vec_5_rdy;
sc_signal< sc_logic > ccs_rtl_SIG_accum_out_vec_6_rdy;
sc_signal< sc_logic > ccs_rtl_SIG_accum_out_vec_7_rdy;
sc_signal< sc_lv<32> > ccs_rtl_SIG_accum_out_vec_0_msg;
sc_signal< sc_lv<32> > ccs_rtl_SIG_accum_out_vec_1_msg;
sc_signal< sc_lv<32> > ccs_rtl_SIG_accum_out_vec_2_msg;
sc_signal< sc_lv<32> > ccs_rtl_SIG_accum_out_vec_3_msg;
sc_signal< sc_lv<32> > ccs_rtl_SIG_accum_out_vec_4_msg;
sc_signal< sc_lv<32> > ccs_rtl_SIG_accum_out_vec_5_msg;
sc_signal< sc_lv<32> > ccs_rtl_SIG_accum_out_vec_6_msg;
sc_signal< sc_lv<32> > ccs_rtl_SIG_accum_out_vec_7_msg;
// Named Objects
// Module instance pointers
HDL::ccs_DUT_wrapper ccs_rtl;
// Declare processes (SC_METHOD and SC_THREAD)
void update_proc();
// Constructor
SC_HAS_PROCESS(sysc_sim_wrapper);
sysc_sim_wrapper(
const sc_module_name& nm
)
: ccs_rtl(
"ccs_rtl",
TO_QUOTED_STRING(TOP_HDL_ENTITY)
)
, clk("clk")
, rst("rst")
, write_req("write_req")
, start("start")
, weight_in_vec()
, accum_out_vec()
, ccs_rtl_SIG_clk("ccs_rtl_SIG_clk")
, ccs_rtl_SIG_rst("ccs_rtl_SIG_rst")
, ccs_rtl_SIG_write_req_val("ccs_rtl_SIG_write_req_val")
, ccs_rtl_SIG_write_req_rdy("ccs_rtl_SIG_write_req_rdy")
, ccs_rtl_SIG_write_req_msg("ccs_rtl_SIG_write_req_msg")
, ccs_rtl_SIG_start_val("ccs_rtl_SIG_start_val")
, ccs_rtl_SIG_start_rdy("ccs_rtl_SIG_start_rdy")
, ccs_rtl_SIG_start_msg("ccs_rtl_SIG_start_msg")
, ccs_rtl_SIG_weight_in_vec_0_val("ccs_rtl_SIG_weight_in_vec_0_val")
, ccs_rtl_SIG_weight_in_vec_1_val("ccs_rtl_SIG_weight_in_vec_1_val")
, ccs_rtl_SIG_weight_in_vec_2_val("ccs_rtl_SIG_weight_in_vec_2_val")
, ccs_rtl_SIG_weight_in_vec_3_val("ccs_rtl_SIG_weight_in_vec_3_val")
, ccs_rtl_SIG_weight_in_vec_4_val("ccs_rtl_SIG_weight_in_vec_4_val")
, ccs_rtl_SIG_weight_in_vec_5_val("ccs_rtl_SIG_weight_in_vec_5_val")
, ccs_rtl_SIG_weight_in_vec_6_val("ccs_rtl_SIG_weight_in_vec_6_val")
, ccs_rtl_SIG_weight_in_vec_7_val("ccs_rtl_SIG_weight_in_vec_7_val")
, ccs_rtl_SIG_weight_in_vec_0_rdy("ccs_rtl_SIG_weight_in_vec_0_rdy")
, ccs_rtl_SIG_weight_in_vec_1_rdy("ccs_rtl_SIG_weight_in_vec_1_rdy")
, ccs_rtl_SIG_weight_in_vec_2_rdy("ccs_rtl_SIG_weight_in_vec_2_rdy")
, ccs_rtl_SIG_weight_in_vec_3_rdy("ccs_rtl_SIG_weight_in_vec_3_rdy")
, ccs_rtl_SIG_weight_in_vec_4_rdy("ccs_rtl_SIG_weight_in_vec_4_rdy")
, ccs_rtl_SIG_weight_in_vec_5_rdy("ccs_rtl_SIG_weight_in_vec_5_rdy")
, ccs_rtl_SIG_weight_in_vec_6_rdy("ccs_rtl_SIG_weight_in_vec_6_rdy")
, ccs_rtl_SIG_weight_in_vec_7_rdy("ccs_rtl_SIG_weight_in_vec_7_rdy")
, ccs_rtl_SIG_weight_in_vec_0_msg("ccs_rtl_SIG_weight_in_vec_0_msg")
, ccs_rtl_SIG_weight_in_vec_1_msg("ccs_rtl_SIG_weight_in_vec_1_msg")
, ccs_rtl_SIG_weight_in_vec_2_msg("ccs_rtl_SIG_weight_in_vec_2_msg")
, ccs_rtl_SIG_weight_in_vec_3_msg("ccs_rtl_SIG_weight_in_vec_3_msg")
, ccs_rtl_SIG_weight_in_vec_4_msg("ccs_rtl_SIG_weight_in_vec_4_msg")
, ccs_rtl_SIG_weight_in_vec_5_msg("ccs_rtl_SIG_weight_in_vec_5_msg")
, ccs_rtl_SIG_weight_in_vec_6_msg("ccs_rtl_SIG_weight_in_vec_6_msg")
, ccs_rtl_SIG_weight_in_vec_7_msg("ccs_rtl_SIG_weight_in_vec_7_msg")
, ccs_rtl_SIG_accum_out_vec_0_val("ccs_rtl_SIG_accum_out_vec_0_val")
, ccs_rtl_SIG_accum_out_vec_1_val("ccs_rtl_SIG_accum_out_vec_1_val")
, ccs_rtl_SIG_accum_out_vec_2_val("ccs_rtl_SIG_accum_out_vec_2_val")
, ccs_rtl_SIG_accum_out_vec_3_val("ccs_rtl_SIG_accum_out_vec_3_val")
, ccs_rtl_SIG_accum_out_vec_4_val("ccs_rtl_SIG_accum_out_vec_4_val")
, ccs_rtl_SIG_accum_out_vec_5_val("ccs_rtl_SIG_accum_out_vec_5_val")
, ccs_rtl_SIG_accum_out_vec_6_val("ccs_rtl_SIG_accum_out_vec_6_val")
, ccs_rtl_SIG_accum_out_vec_7_val("ccs_rtl_SIG_accum_out_vec_7_val")
, ccs_rtl_SIG_accum_out_vec_0_rdy("ccs_rtl_SIG_accum_out_vec_0_rdy")
, ccs_rtl_SIG_accum_out_vec_1_rdy("ccs_rtl_SIG_accum_out_vec_1_rdy")
, ccs_rtl_SIG_accum_out_vec_2_rdy("ccs_rtl_SIG_accum_out_vec_2_rdy")
, ccs_rtl_SIG_accum_out_vec_3_rdy("ccs_rtl_SIG_accum_out_vec_3_rdy")
, ccs_rtl_SIG_accum_out_vec_4_rdy("ccs_rtl_SIG_accum_out_vec_4_rdy")
, ccs_rtl_SIG_accum_out_vec_5_rdy("ccs_rtl_SIG_accum_out_vec_5_rdy")
, ccs_rtl_SIG_accum_out_vec_6_rdy("ccs_rtl_SIG_accum_out_vec_6_rdy")
, ccs_rtl_SIG_accum_out_vec_7_rdy("ccs_rtl_SIG_accum_out_vec_7_rdy")
, ccs_rtl_SIG_accum_out_vec_0_msg("ccs_rtl_SIG_accum_out_vec_0_msg")
, ccs_rtl_SIG_accum_out_vec_1_msg("ccs_rtl_SIG_accum_out_vec_1_msg")
, ccs_rtl_SIG_accum_out_vec_2_msg("ccs_rtl_SIG_accum_out_vec_2_msg")
, ccs_rtl_SIG_accum_out_vec_3_msg("ccs_rtl_SIG_accum_out_vec_3_msg")
, ccs_rtl_SIG_accum_out_vec_4_msg("ccs_rtl_SIG_accum_out_vec_4_msg")
, ccs_rtl_SIG_accum_out_vec_5_msg("ccs_rtl_SIG_accum_out_vec_5_msg")
, ccs_rtl_SIG_accum_out_vec_6_msg("ccs_rtl_SIG_accum_out_vec_6_msg")
, ccs_rtl_SIG_accum_out_vec_7_msg("ccs_rtl_SIG_accum_out_vec_7_msg")
{
// Instantiate other modules
ccs_rtl.clk(ccs_rtl_SIG_clk);
ccs_rtl.rst(ccs_rtl_SIG_rst);
ccs_rtl.write_req_val(ccs_rtl_SIG_write_req_val);
ccs_rtl.write_req_rdy(ccs_rtl_SIG_write_req_rdy);
ccs_rtl.write_req_msg(ccs_rtl_SIG_write_req_msg);
ccs_rtl.start_val(ccs_rtl_SIG_start_val);
ccs_rtl.start_rdy(ccs_rtl_SIG_start_rdy);
ccs_rtl.start_msg(ccs_rtl_SIG_start_msg);
ccs_rtl.weight_in_vec_0_val(ccs_rtl_SIG_weight_in_vec_0_val);
ccs_rtl.weight_in_vec_1_val(ccs_rtl_SIG_weight_in_vec_1_val);
ccs_rtl.weight_in_vec_2_val(ccs_rtl_SIG_weight_in_vec_2_val);
ccs_rtl.weight_in_vec_3_val(ccs_rtl_SIG_weight_in_vec_3_val);
ccs_rtl.weight_in_vec_4_val(ccs_rtl_SIG_weight_in_vec_4_val);
ccs_rtl.weight_in_vec_5_val(ccs_rtl_SIG_weight_in_vec_5_val);
ccs_rtl.weight_in_vec_6_val(ccs_rtl_SIG_weight_in_vec_6_val);
ccs_rtl.weight_in_vec_7_val(ccs_rtl_SIG_weight_in_vec_7_val);
ccs_rtl.weight_in_vec_0_rdy(ccs_rtl_SIG_weight_in_vec_0_rdy);
ccs_rtl.weight_in_vec_1_rdy(ccs_rtl_SIG_weight_in_vec_1_rdy);
ccs_rtl.weight_in_vec_2_rdy(ccs_rtl_SIG_weight_in_vec_2_rdy);
ccs_rtl.weight_in_vec_3_rdy(ccs_rtl_SIG_weight_in_vec_3_rdy);
ccs_rtl.weight_in_vec_4_rdy(ccs_rtl_SIG_weight_in_vec_4_rdy);
ccs_rtl.weight_in_vec_5_rdy(ccs_rtl_SIG_weight_in_vec_5_rdy);
ccs_rtl.weight_in_vec_6_rdy(ccs_rtl_SIG_weight_in_vec_6_rdy);
ccs_rtl.weight_in_vec_7_rdy(ccs_rtl_SIG_weight_in_vec_7_rdy);
ccs_rtl.weight_in_vec_0_msg(ccs_rtl_SIG_weight_in_vec_0_msg);
ccs_rtl.weight_in_vec_1_msg(ccs_rtl_SIG_weight_in_vec_1_msg);
ccs_rtl.weight_in_vec_2_msg(ccs_rtl_SIG_weight_in_vec_2_msg);
ccs_rtl.weight_in_vec_3_msg(ccs_rtl_SIG_weight_in_vec_3_msg);
ccs_rtl.weight_in_vec_4_msg(ccs_rtl_SIG_weight_in_vec_4_msg);
ccs_rtl.weight_in_vec_5_msg(ccs_rtl_SIG_weight_in_vec_5_msg);
ccs_rtl.weight_in_vec_6_msg(ccs_rtl_SIG_weight_in_vec_6_msg);
ccs_rtl.weight_in_vec_7_msg(ccs_rtl_SIG_weight_in_vec_7_msg);
ccs_rtl.accum_out_vec_0_val(ccs_rtl_SIG_accum_out_vec_0_val);
ccs_rtl.accum_out_vec_1_val(ccs_rtl_SIG_accum_out_vec_1_val);
ccs_rtl.accum_out_vec_2_val(ccs_rtl_SIG_accum_out_vec_2_val);
ccs_rtl.accum_out_vec_3_val(ccs_rtl_SIG_accum_out_vec_3_val);
ccs_rtl.accum_out_vec_4_val(ccs_rtl_SIG_accum_out_vec_4_val);
ccs_rtl.accum_out_vec_5_val(ccs_rtl_SIG_accum_out_vec_5_val);
ccs_rtl.accum_out_vec_6_val(ccs_rtl_SIG_accum_out_vec_6_val);
ccs_rtl.accum_out_vec_7_val(ccs_rtl_SIG_accum_out_vec_7_val);
ccs_rtl.accum_out_vec_0_rdy(ccs_rtl_SIG_accum_out_vec_0_rdy);
ccs_rtl.accum_out_vec_1_rdy(ccs_rtl_SIG_accum_out_vec_1_rdy);
ccs_rtl.accum_out_vec_2_rdy(ccs_rtl_SIG_accum_out_vec_2_rdy);
ccs_rtl.accum_out_vec_3_rdy(ccs_rtl_SIG_accum_out_vec_3_rdy);
ccs_rtl.accum_out_vec_4_rdy(ccs_rtl_SIG_accum_out_vec_4_rdy);
ccs_rtl.accum_out_vec_5_rdy(ccs_rtl_SIG_accum_out_vec_5_rdy);
ccs_rtl.accum_out_vec_6_rdy(ccs_rtl_SIG_accum_out_vec_6_rdy);
ccs_rtl.accum_out_vec_7_rdy(ccs_rtl_SIG_accum_out_vec_7_rdy);
ccs_rtl.accum_out_vec_0_msg(ccs_rtl_SIG_accum_out_vec_0_msg);
ccs_rtl.accum_out_vec_1_msg(ccs_rtl_SIG_accum_out_vec_1_msg);
ccs_rtl.accum_out_vec_2_msg(ccs_rtl_SIG_accum_out_vec_2_msg);
ccs_rtl.accum_out_vec_3_msg(ccs_rtl_SIG_accum_out_vec_3_msg);
ccs_rtl.accum_out_vec_4_msg(ccs_rtl_SIG_accum_out_vec_4_msg);
ccs_rtl.accum_out_vec_5_msg(ccs_rtl_SIG_accum_out_vec_5_msg);
ccs_rtl.accum_out_vec_6_msg(ccs_rtl_SIG_accum_out_vec_6_msg);
ccs_rtl.accum_out_vec_7_msg(ccs_rtl_SIG_accum_out_vec_7_msg);
// Register processes
SC_METHOD(update_proc);
sensitive << clk << rst << write_req.Connections::InBlocking_Ports_abs<InputSetup::WriteReq >::val << ccs_rtl_SIG_write_req_rdy << write_req.Connections::InBlocking<InputSetup::WriteReq, Connections::SYN_PORT >::msg << start.Connections::InBlocking_Ports_abs<ac_int<6, false > >::val << ccs_rtl_SIG_start_rdy << start.Connections::InBlocking<ac_int<6, false >, Connections::SYN_PORT >::msg << weight_in_vec[0].Connections::InBlocking_Ports_abs<ac_int<8, true > >::val << weight_in_vec[1].Connections::InBlocking_Ports_abs<ac_int<8, true > >::val << weight_in_vec[2].Connections::InBlocking_Ports_abs<ac_int<8, true > >::val << weight_in_vec[3].Connections::InBlocking_Ports_abs<ac_int<8, true > >::val << weight_in_vec[4].Connections::InBlocking_Ports_abs<ac_int<8, true > >::val << weight_in_vec[5].Connections::InBlocking_Ports_abs<ac_int<8, true > >::val << weight_in_vec[6].Connections::InBlocking_Ports_abs<ac_int<8, true > >::val << weight_in_vec[7].Connections::InBlocking_Ports_abs<ac_int<8, true > >::val << ccs_rtl_SIG_weight_in_vec_0_rdy << ccs_rtl_SIG_weight_in_vec_1_rdy << ccs_rtl_SIG_weight_in_vec_2_rdy << ccs_rtl_SIG_weight_in_vec_3_rdy << ccs_rtl_SIG_weight_in_vec_4_rdy << ccs_rtl_SIG_weight_in_vec_5_rdy << ccs_rtl_SIG_weight_in_vec_6_rdy << ccs_rtl_SIG_weight_in_vec_7_rdy << weight_in_vec[0].Connections::InBlocking<ac_int<8, true >, Connections::SYN_PORT >::msg << weight_in_vec[1].Connections::InBlocking<ac_int<8, true >, Connections::SYN_PORT >::msg << weight_in_vec[2].Connections::InBlocking<ac_int<8, true >, Connections::SYN_PORT >::msg << weight_in_vec[3].Connections::InBlocking<ac_int<8, true >, Connections::SYN_PORT >::msg << weight_in_vec[4].Connections::InBlocking<ac_int<8, true >, Connections::SYN_PORT >::msg << weight_in_vec[5].Connections::InBlocking<ac_int<8, true >, Connections::SYN_PORT >::msg << weight_in_vec[6].Connections::InBlocking<ac_int<8, true >, Connections::SYN_PORT >::msg << weight_in_vec[7].Connections::InBlocking<ac_int<8, true >, Connections::SYN_PORT >::msg << ccs_rtl_SIG_accum_out_vec_0_val << ccs_rtl_SIG_accum_out_vec_1_val << ccs_rtl_SIG_accum_out_vec_2_val << ccs_rtl_SIG_accum_out_vec_3_val << ccs_rtl_SIG_accum_out_vec_4_val << ccs_rtl_SIG_accum_out_vec_5_val << ccs_rtl_SIG_accum_out_vec_6_val << ccs_rtl_SIG_accum_out_vec_7_val << accum_out_vec[0].Connections::OutBlocking_Ports_abs<ac_int<32, true > >::rdy << accum_out_vec[1].Connections::OutBlocking_Ports_abs<ac_int<32, true > >::rdy << accum_out_vec[2].Connections::OutBlocking_Ports_abs<ac_int<32, true > >::rdy << accum_out_vec[3].Connections::OutBlocking_Ports_abs<ac_int<32, true > >::rdy << accum_out_vec[4].Connections::OutBlocking_Ports_abs<ac_int<32, true > >::rdy << accum_out_vec[5].Connections::OutBlocking_Ports_abs<ac_int<32, true > >::rdy << accum_out_vec[6].Connections::OutBlocking_Ports_abs<ac_int<32, true > >::rdy << accum_out_vec[7].Connections::OutBlocking_Ports_abs<ac_int<32, true > >::rdy << ccs_rtl_SIG_accum_out_vec_0_msg << ccs_rtl_SIG_accum_out_vec_1_msg << ccs_rtl_SIG_accum_out_vec_2_msg << ccs_rtl_SIG_accum_out_vec_3_msg << ccs_rtl_SIG_accum_out_vec_4_msg << ccs_rtl_SIG_accum_out_vec_5_msg << ccs_rtl_SIG_accum_out_vec_6_msg << ccs_rtl_SIG_accum_out_vec_7_msg;
// Other constructor statements
}
~sysc_sim_wrapper()
{
}
// C++ class functions
};
} // end namespace CCS_RTL
//
// -------------------------------------
// sysc_sim_wrapper
// Represents a new SC_MODULE having the same interface as the original model SysTop_rtl
// -------------------------------------
//
// ---------------------------------------------------------------
// Process: SC_METHOD update_proc
// Static sensitivity: sensitive << clk << rst << write_req.Connections::InBlocking_Ports_abs<InputSetup::WriteReq >::val << ccs_rtl_SIG_write_req_rdy << write_req.Connections::InBlocking<InputSetup::WriteReq, Connections::SYN_PORT >::msg << start.Connections::InBlocking_Ports_abs<ac_int<6, false > >::val << ccs_rtl_SIG_start_rdy << start.Connections::InBlocking<ac_int<6, false >, Connections::SYN_PORT >::msg << weight_in_vec[0].Connections::InBlocking_Ports_abs<ac_int<8, true > >::val << weight_in_vec[1].Connections::InBlocking_Ports_abs<ac_int<8, true > >::val << weight_in_vec[2].Connections::InBlocking_Ports_abs<ac_int<8, true > >::val << weight_in_vec[3].Connections::InBlocking_Ports_abs<ac_int<8, true > >::val << weight_in_vec[4].Connections::InBlocking_Ports_abs<ac_int<8, true > >::val << weight_in_vec[5].Connections::InBlocking_Ports_abs<ac_int<8, true > >::val << weight_in_vec[6].Connections::InBlocking_Ports_abs<ac_int<8, true > >::val << weight_in_vec[7].Connections::InBlocking_Ports_abs<ac_int<8, true > >::val << ccs_rtl_SIG_weight_in_vec_0_rdy << ccs_rtl_SIG_weight_in_vec_1_rdy << ccs_rtl_SIG_weight_in_vec_2_rdy << ccs_rtl_SIG_weight_in_vec_3_rdy << ccs |
_rtl_SIG_weight_in_vec_4_rdy << ccs_rtl_SIG_weight_in_vec_5_rdy << ccs_rtl_SIG_weight_in_vec_6_rdy << ccs_rtl_SIG_weight_in_vec_7_rdy << weight_in_vec[0].Connections::InBlocking<ac_int<8, true >, Connections::SYN_PORT >::msg << weight_in_vec[1].Connections::InBlocking<ac_int<8, true >, Connections::SYN_PORT >::msg << weight_in_vec[2].Connections::InBlocking<ac_int<8, true >, Connections::SYN_PORT >::msg << weight_in_vec[3].Connections::InBlocking<ac_int<8, true >, Connections::SYN_PORT >::msg << weight_in_vec[4].Connections::InBlocking<ac_int<8, true >, Connections::SYN_PORT >::msg << weight_in_vec[5].Connections::InBlocking<ac_int<8, true >, Connections::SYN_PORT >::msg << weight_in_vec[6].Connections::InBlocking<ac_int<8, true >, Connections::SYN_PORT >::msg << weight_in_vec[7].Connections::InBlocking<ac_int<8, true >, Connections::SYN_PORT >::msg << ccs_rtl_SIG_accum_out_vec_0_val << ccs_rtl_SIG_accum_out_vec_1_val << ccs_rtl_SIG_accum_out_vec_2_val << ccs_rtl_SIG_accum_out_vec_3_val << ccs_rtl_SIG_accum_out_vec_4_val << ccs_rtl_SIG_accum_out_vec_5_val << ccs_rtl_SIG_accum_out_vec_6_val << ccs_rtl_SIG_accum_out_vec_7_val << accum_out_vec[0].Connections::OutBlocking_Ports_abs<ac_int<32, true > >::rdy << accum_out_vec[1].Connections::OutBlocking_Ports_abs<ac_int<32, true > >::rdy << accum_out_vec[2].Connections::OutBlocking_Ports_abs<ac_int<32, true > >::rdy << accum_out_vec[3].Connections::OutBlocking_Ports_abs<ac_int<32, true > >::rdy << accum_out_vec[4].Connections::OutBlocking_Ports_abs<ac_int<32, true > >::rdy << accum_out_vec[5].Connections::OutBlocking_Ports_abs<ac_int<32, true > >::rdy << accum_out_vec[6].Connections::OutBlocking_Ports_abs<ac_int<32, true > >::rdy << accum_out_vec[7].Connections::OutBlocking_Ports_abs<ac_int<32, true > >::rdy << ccs_rtl_SIG_accum_out_vec_0_msg << ccs_rtl_SIG_accum_out_vec_1_msg << ccs_rtl_SIG_accum_out_vec_2_msg << ccs_rtl_SIG_accum_out_vec_3_msg << ccs_rtl_SIG_accum_out_vec_4_msg << ccs_rtl_SIG_accum_out_vec_5_msg << ccs_rtl_SIG_accum_out_vec_6_msg << ccs_rtl_SIG_accum_out_vec_7_msg;
void CCS_RTL::sysc_sim_wrapper::update_proc() {
// none.sc_in field_key=clk:6bfbc86a-4643-405d-8ac5-31fb9eb3828c-685:clk:6bfbc86a-4643-405d-8ac5-31fb9eb3828c-685
sc_logic t_6bfbc86a_4643_405d_8ac5_31fb9eb3828c_685; // NPS - LV to hold field
ccs_rtl_SIG_clk.write(clk.read());
// none.sc_in field_key=rst:6bfbc86a-4643-405d-8ac5-31fb9eb3828c-686:rst:6bfbc86a-4643-405d-8ac5-31fb9eb3828c-686
sc_logic t_6bfbc86a_4643_405d_8ac5_31fb9eb3828c_686; // NPS - LV to hold field
type_to_vector(rst.read(),1,t_6bfbc86a_4643_405d_8ac5_31fb9eb3828c_686); // read orig port and type convert
ccs_rtl_SIG_rst.write(t_6bfbc86a_4643_405d_8ac5_31fb9eb3828c_686); // then write to RTL port
// none.sc_in field_key=write_req:6bfbc86a-4643-405d-8ac5-31fb9eb3828c-696:val:6bfbc86a-4643-405d-8ac5-31fb9eb3828c-725
sc_logic t_6bfbc86a_4643_405d_8ac5_31fb9eb3828c_725; // NPS - LV to hold field
type_to_vector(write_req.Connections::InBlocking_Ports_abs<InputSetup::WriteReq >::val.read(),1,t_6bfbc86a_4643_405d_8ac5_31fb9eb3828c_725); // read orig port and type convert
ccs_rtl_SIG_write_req_val.write(t_6bfbc86a_4643_405d_8ac5_31fb9eb3828c_725); // then write to RTL port
// none.sc_out field_key=write_req:6bfbc86a-4643-405d-8ac5-31fb9eb3828c-696:rdy:6bfbc86a-4643-405d-8ac5-31fb9eb3828c-735
bool d_6bfbc86a_4643_405d_8ac5_31fb9eb3828c_735;
vector_to_type(ccs_rtl_SIG_write_req_rdy.read(), 1, &d_6bfbc86a_4643_405d_8ac5_31fb9eb3828c_735);
write_req.Connections::InBlocking_Ports_abs<InputSetup::WriteReq >::rdy.write(d_6bfbc86a_4643_405d_8ac5_31fb9eb3828c_735);
// none.sc_in field_key=write_req:6bfbc86a-4643-405d-8ac5-31fb9eb3828c-696:msg:6bfbc86a-4643-405d-8ac5-31fb9eb3828c-745
sc_lv< 69 > t_6bfbc86a_4643_405d_8ac5_31fb9eb3828c_745; // NPS - LV to hold field
type_to_vector(write_req.Connections::InBlocking<InputSetup::WriteReq, Connections::SYN_PORT >::msg.read(),69,t_6bfbc86a_4643_405d_8ac5_31fb9eb3828c_745); // read orig port and type convert
ccs_rtl_SIG_write_req_msg.write(t_6bfbc86a_4643_405d_8ac5_31fb9eb3828c_745); // then write to RTL port
// none.sc_in field_key=start:6bfbc86a-4643-405d-8ac5-31fb9eb3828c-755:val:6bfbc86a-4643-405d-8ac5-31fb9eb3828c-782
sc_logic t_6bfbc86a_4643_405d_8ac5_31fb9eb3828c_782; // NPS - LV to hold field
type_to_vector(start.Connections::InBlocking_Ports_abs<ac_int<6, false > >::val.read(),1,t_6bfbc86a_4643_405d_8ac5_31fb9eb3828c_782); // read orig port and type convert
ccs_rtl_SIG_start_val.write(t_6bfbc86a_4643_405d_8ac5_31fb9eb3828c_782); // then write to RTL port
// none.sc_out field_key=start:6bfbc86a-4643-405d-8ac5-31fb9eb3828c-755:rdy:6bfbc86a-4643-405d-8ac5-31fb9eb3828c-792
bool d_6bfbc86a_4643_405d_8ac5_31fb9eb3828c_792;
vector_to_type(ccs_rtl_SIG_start_rdy.read(), 1, &d_6bfbc86a_4643_405d_8ac5_31fb9eb3828c_792);
start.Connections::InBlocking_Ports_abs<ac_int<6, false > >::rdy.write(d_6bfbc86a_4643_405d_8ac5_31fb9eb3828c_792);
// none.sc_in field_key=start:6bfbc86a-4643-405d-8ac5-31fb9eb3828c-755:msg:6bfbc86a-4643-405d-8ac5-31fb9eb3828c-802
sc_lv< 6 > t_6bfbc86a_4643_405d_8ac5_31fb9eb3828c_802; // NPS - LV to hold field
type_to_vector(start.Connections::InBlocking<ac_int<6, false >, Connections::SYN_PORT >::msg.read(),6,t_6bfbc86a_4643_405d_8ac5_31fb9eb3828c_802); // read orig port and type convert
ccs_rtl_SIG_start_msg.write(t_6bfbc86a_4643_405d_8ac5_31fb9eb3828c_802); // then write to RTL port
// none.sc_in field_key=weight_in_vec:6bfbc86a-4643-405d-8ac5-31fb9eb3828c-812:val:6bfbc86a-4643-405d-8ac5-31fb9eb3828c-839
sc_logic t_6bfbc86a_4643_405d_8ac5_31fb9eb3828c_839; // NPS - LV to hold field
type_to_vector(weight_in_vec[0].Connections::InBlocking_Ports_abs<ac_int<8, true > >::val.read(),1,t_6bfbc86a_4643_405d_8ac5_31fb9eb3828c_839); // read orig port and type convert
ccs_rtl_SIG_weight_in_vec_0_val.write(t_6bfbc86a_4643_405d_8ac5_31fb9eb3828c_839); // then write to RTL port
// none.sc_in field_key=weight_in_vec:6bfbc86a-4643-405d-8ac5-31fb9eb3828c-812:val:6bfbc86a-4643-405d-8ac5-31fb9eb3828c-839
type_to_vector(weight_in_vec[1].Connections::InBlocking_Ports_abs<ac_int<8, true > >::val.read(),1,t_6bfbc86a_4643_405d_8ac5_31fb9eb3828c_839); // read orig port and type convert
ccs_rtl_SIG_weight_in_vec_1_val.write(t_6bfbc86a_4643_405d_8ac5_31fb9eb3828c_839); // then write to RTL port
// none.sc_in field_key=weight_in_vec:6bfbc86a-4643-405d-8ac5-31fb9eb3828c-812:val:6bfbc86a-4643-405d-8ac5-31fb9eb3828c-839
type_to_vector(weight_in_vec[2].Connections::InBlocking_Ports_abs<ac_int<8, true > >::val.read(),1,t_6bfbc86a_4643_405d_8ac5_31fb9eb3828c_839); // read orig port and type convert
ccs_rtl_SIG_weight_in_vec_2_val.write(t_6bfbc86a_4643_405d_8ac5_31fb9eb3828c_839); // then write to RTL port
// none.sc_in field_key=weight_in_vec:6bfbc86a-4643-405d-8ac5-31fb9eb3828c-812:val:6bfbc86a-4643-405d-8ac5-31fb9eb3828c-839
type_to_vector(weight_in_vec[3].Connections::InBlocking_Ports_abs<ac_int<8, true > >::val.read(),1,t_6bfbc86a_4643_405d_8ac5_31fb9eb3828c_839); // read orig port and type convert
ccs_rtl_SIG_weight_in_vec_3_val.write(t_6bfbc86a_4643_405d_8ac5_31fb9eb3828c_839); // then write to RTL port
// none.sc_in field_key=weight_in_vec:6bfbc86a-4643-405d-8ac5-31fb9eb3828c-812:val:6bfbc86a-4643-405d-8ac5-31fb9eb3828c-839
type_to_vector(weight_in_vec[4].Connections::InBlocking_Ports_abs<ac_int<8, true > >::val.read(),1,t_6bfbc86a_4643_405d_8ac5_31fb9eb3828c_839); // read orig port and type convert
ccs_rtl_SIG_weight_in_vec_4_val.write(t_6bfbc86a_4643_405d_8ac5_31fb9eb3828c_839); // then write to RTL port
// none.sc_in field_key=weight_in_vec:6bfbc86a-4643-405d-8ac5-31fb9eb3828c-812:val:6bfbc86a-4643-405d-8ac5-31fb9eb3828c-839
type_to_vector(weight_in_vec[5].Connections::InBlocking_Ports_abs<ac_int<8, true > >::val.read(),1,t_6bfbc86a_4643_405d_8ac5_31fb9eb3828c_839); // read orig port and type convert
ccs_rtl_SIG_weight_in_vec_5_val.write(t_6bfbc86a_4643_405d_8ac5_31fb9eb3828c_839); // then write to RTL port
// none.sc_in field_key=weight_in_vec:6bfbc86a-4643-405d-8ac5-31fb9eb3828c-812:val:6bfbc86a-4643-405d-8ac5-31fb9eb3828c-839
type_to_vector(weight_in_vec[6].Connections::InBlocking_Ports_abs<ac_int<8, true > >::val.read(),1,t_6bfbc86a_4643_405d_8ac5_31fb9eb3828c_839); // read orig port and type convert
ccs_rtl_SIG_weight_in_vec_6_val.write(t_6bfbc86a_4643_405d_8ac5_31fb9eb3828c_839); // then write to RTL port
// none.sc_in field_key=weight_in_vec:6bfbc86a-4643-405d-8ac5-31fb9eb3828c-812:val:6bfbc86a-4643-405d-8ac5-31fb9eb3828c-839
type_to_vector(weight_in_vec[7].Connections::InBlocking_Ports_abs<ac_int<8, true > >::val.read(),1,t_6bfbc86a_4643_405d_8ac5_31fb9eb3828c_839); // read orig port and type convert
ccs_rtl_SIG_weight_in_vec_7_val.write(t_6bfbc86a_4643_405d_8ac5_31fb9eb3828c_839); // then write to RTL port
// none.sc_out field_key=weight_in_vec:6bfbc86a-4643-405d-8ac5-31fb9eb3828c-812:rdy:6bfbc86a-4643-405d-8ac5-31fb9eb3828c-849
bool d_6bfbc86a_4643_405d_8ac5_31fb9eb3828c_849;
vector_to_type(ccs_rtl_SIG_weight_in_vec_0_rdy.read(), 1, &d_6bfbc86a_4643_405d_8ac5_31fb9eb3828c_849);
weight_in_vec[0].Connections::InBlocking_Ports_abs<ac_int<8, true > >::rdy.write(d_6bfbc86a_4643_405d_8ac5_31fb9eb3828c_849);
// none.sc_out field_key=weight_in_vec:6bfbc86a-4643-405d-8ac5-31fb9eb3828c-812:rdy:6bfbc86a-4643-405d-8ac5-31fb9eb3828c-849
vector_to_type(ccs_rtl_SIG_weight_in_vec_1_rdy.read(), 1, &d_6bfbc86a_4643_405d_8ac5_31fb9eb3828c_849);
weight_in_vec[1].Connections::InBlocking_Ports_abs<ac_int<8, true > >::rdy.write(d_6bfbc86a_4643_405d_8ac5_31fb9eb3828c_849);
// none.sc_out field_key=weight_in_vec:6bfbc86a-4643-405d-8ac5-31fb9eb3828c-812:rdy:6bfbc86a-4643-405d-8ac5-31fb9eb3828c-849
vector_to_type(ccs_rtl_SIG_weight_in_vec_2_rdy.read(), 1, &d_6bfbc86a_4643_405d_8ac5_31fb9eb3828c_849);
weight_in_vec[2].Connections::InBlocking_Ports_abs<ac_int<8, true > >::rdy.write(d_6bfbc86a_4643_405d_8ac5_31fb9eb3828c_849);
// none.sc_out field_key=weight_in_vec:6bfbc86a-4643-405d-8ac5-31fb9eb3828c-812:rdy:6bfbc86a-4643-405d-8ac5-31fb9eb3828c-849
vector_to_type(ccs_rtl_SIG_weight_in_vec_3_rdy.read(), 1, &d_6bfbc86a_4643_405d_8ac5_31fb9eb3828c_849);
weight_in_vec[3].Connections::InBlocking_Ports_abs<ac_int<8, true > >::rdy.write(d_6bfbc86a_4643_405d_8ac5_31fb9eb3828c_849);
// none.sc_out field_key=weight_in_vec:6bfbc86a-4643-405d-8ac5-31fb9eb3828c-812:rdy:6bfbc86a-4643-405d-8ac5-31fb9eb3828c-849
vector_to_type(ccs_rtl_SIG_weight_in_vec_4_rdy.read(), 1, &d_6bfbc86a_4643_405d_8ac5_31fb9eb3828c_849);
weight_in_vec[4].Connections::InBlocking_Ports_abs<ac_int<8, true > >::rdy.write(d_6bfbc86a_4643_405d_8ac5_31fb9eb3828c_849);
// none.sc_out field_key=weight_in_vec:6bfbc86a-4643-405d-8ac5-31fb9eb3828c-812:rdy:6bfbc86a-4643-405d-8ac5-31fb9eb3828c-849
vector_to_type(ccs_rtl_SIG_weight_in_vec_5_rdy.read(), 1, &d_6bfbc86a_4643_405d_8ac5_31fb9eb3828c_849);
weight_in_vec[5].Connections::InBlocking_Ports_abs<ac_int<8, true > >::rdy.write(d_6bfbc86a_4643_405d_8ac5_31fb9eb3828c_849);
// none.sc_out field_key=weight_in_vec:6bfbc86a-4643-405d-8ac5-31fb9eb3828c-812:rdy:6bfbc86a-4643-405d-8ac5-31fb9eb3828c-849
vector_to_type(ccs_rtl_SIG_weight_in_vec_6_rdy.read(), 1, &d_6bfbc86a_4643_405d_8ac5_31fb9eb3828c_849);
weight_in_vec[6].Connections::InBlocking_Ports_abs<ac_int<8, true > >::rdy.write(d_6bfbc86a_4643_405d_8ac5_31fb9eb3828c_849);
// none.sc_out field_key=weight_in_vec:6bfbc86a-4643-405d-8ac5-31fb9eb3828c-812:rdy:6bfbc86a-4643-405d-8ac5-31fb9eb3828c-849
vector_to_type(ccs_rtl_SIG_weight_in_vec_7_rdy.read(), 1, &d_6bfbc86a_4643_405d_8ac5_31fb9eb3828c_849);
weight_in_vec[7].Connections::InBlocking_Ports_abs<ac_int<8, true > >::rdy.write(d_6bfbc86a_4643_405d_8ac5_31fb9eb3828c_849);
// none.sc_in field_key=weight_in_vec:6bfbc86a-4643-405d-8ac5-31fb9eb3828c-812:msg:6bfbc86a-4643-405d-8ac5-31fb9eb3828c-859
sc_lv< 8 > t_6bfbc86a_4643_405d_8ac5_31fb9eb3828c_859; // NPS - LV to hold field
type_to_vector(weight_in_vec[0].Connections::InBlocking<ac_int<8, true >, Connections::SYN_PORT >::msg.read(),8,t_6bfbc86a_4643_405d_8ac5_31fb9eb3828c_859); // read orig port and type convert
ccs_rtl_SIG_weight_in_vec_0_msg.write(t_6bfbc86a_4643_405d_8ac5_31fb9eb3828c_859); // then write to RTL port
// none.sc_in field_key=weight_in_vec:6bfbc86a-4643-405d-8ac5-31fb9eb3828c-812:msg:6bfbc86a-4643-405d-8ac5-31fb9eb3828c-859
type_to_vector(weight_in_vec[1].Connections::InBlocking<ac_int<8, true >, Connections::SYN_PORT >::msg.read(),8,t_6bfbc86a_4643_405d_8ac5_31fb9eb3828c_859); // read orig port and type convert
ccs_rtl_SIG_weight_in_vec_1_msg.write(t_6bfbc86a_4643_405d_8ac5_31fb9eb3828c_859); // then write to RTL port
// none.sc_in field_key=weight_in_vec:6bfbc86a-4643-405d-8ac5-31fb9eb3828c-812:msg:6bfbc86a-4643-405d-8ac5-31fb9eb3828c-859
type_to_vector(weight_in_vec[2].Connections::InBlocking<ac_int<8, true >, Connections::SYN_PORT >::msg.read(),8,t_6bfbc86a_4643_405d_8ac5_31fb9eb3828c_859); // read orig port and type convert
ccs_rtl_SIG_weight_in_vec_2_msg.write(t_6bfbc86a_4643_405d_8ac5_31fb9eb3828c_859); // then write to RTL port
// none.sc_in field_key=weight_in_vec:6bfbc86a-4643-405d-8ac5-31fb9eb3828c-812:msg:6bfbc86a-4643-405d-8ac5-31fb9eb3828c-859
type_to_vector(weight_in_vec[3].Connections::InBlocking<ac_int<8, true >, Connections::SYN_PORT >::msg.read(),8,t_6bfbc86a_4643_405d_8ac5_31fb9eb3828c_859); // read orig port and type convert
ccs_rtl_SIG_weight_in_vec_3_msg.write(t_6bfbc86a_4643_405d_8ac5_31fb9eb3828c_859); // then write to RTL port
// none.sc_in field_key=weight_in_vec:6bfbc86a-4643-405d-8ac5-31fb9eb3828c-812:msg:6bfbc86a-4643-405d-8ac5-31fb9eb3828c-859
type_to_vector(weight_in_vec[4].Connections::InBlocking<ac_int<8, true >, Connections::SYN_PORT >::msg.read(),8,t_6bfbc86a_4643_405d_8ac5_31fb9eb3828c_859); // read orig port and type convert
ccs_rtl_SIG_weight_in_vec_4_msg.write(t_6bfbc86a_4643_405d_8ac5_31fb9eb3828c_859); // then write to RTL port
// none.sc_in field_key=weight_in_vec:6bfbc86a-4643-405d-8ac5-31fb9eb3828c-812:msg:6bfbc86a-4643-405d-8ac5-31fb9eb3828c-859
type_to_vector(weight_in_vec[5].Connections::InBlocking<ac_int<8, true >, Connections::SYN_PORT >::msg.read(),8,t_6bfbc86a_4643_405d_8ac5_31fb9eb3828c_859); // read orig port and type convert
ccs_rtl_SIG_weight_in_vec_5_msg.write(t_6bfbc86a_4643_405d_8ac5_31fb9eb3828c_859); // then write to RTL port
// none.sc_in field_key=weight_in_vec:6bfbc86a-4643-405d-8ac5-31fb9eb3828c-812:msg:6bfbc86a-4643-405d-8ac5-31fb9eb3828c-859
type_to_vector(weight_in_vec[6].Connections::InBlocking<ac_int<8, true >, Connections::SYN_PORT >::msg.read(),8,t_6bfbc86a_4643_405d_8ac5_31fb9eb3828c_859); // read orig port and type convert
ccs_rtl_SIG_weight_in_vec_6_msg.write(t_6bfbc86a_4643_405d_8ac5_31fb9eb3828c_859); // then write to RTL port
// none.sc_in field_key=weight_in_vec:6bfbc86a-4643-405d-8ac5-31fb9eb3828c-812:msg:6bfbc86a-4643-405d-8ac5-31fb9eb3828c-859
type_to_vector(weight_in_vec[7].Connections::InBlocking<ac_int<8, true >, Connections::SYN_PORT >::msg.read(),8,t_6bfbc86a_4643_405d_8ac5_31fb9eb3828c_859); // read orig port and type convert
ccs_rtl_SIG_weight_in_vec_7_msg.write(t_6bfbc86a_4643_405d_8ac5_31fb9eb3828c_859); // then write to RTL port
// none.sc_out field_key=accum_out_vec:6bfbc86a-4643-405d-8ac5-31fb9eb3828c-869:val:6bfbc86a-4643-405d-8ac5-31fb9eb3828c-884
bool d_6bfbc86a_4643_405d_8ac5_31fb9eb3828c_884;
vector_to_type(ccs_rtl_SIG_accum_out_vec_0_val.read(), 1, &d_6bfbc86a_4643_405d_8ac5_31fb9eb3828c_884);
accum_out_vec[0].Connections::OutBlocking_Ports_abs<ac_int<32, true > >::val.write(d_6bfbc86a_4643_405d_8ac5_31fb9eb3828c_884);
// none.sc_out field_key=accum_out_vec:6bfbc86a-4643-405d-8ac5-31fb9eb3828c-869:val:6bfbc86a-4643-405d-8ac5-31fb9eb3828c-884
vector_to_type(ccs_rtl_SIG_accum_out_vec_1_val.read(), 1, &d_6bfbc86a_4643_405d_8ac5_31fb9eb3828c_884);
accum_out_vec[1].Connections::OutBlocking_Ports_abs<ac_int<32, true > >::val.write(d_6bfbc86a_4643_405d_8ac5_31fb9eb3828c_884);
// none.sc_out field_key=accum_out_vec:6bfbc86a-4643-405d-8ac5-31fb9eb3828c-869:val:6bfbc86a-4643-405d-8ac5-31fb9eb3828c-884
vector_to_type(ccs_rtl_SIG_accum_out_vec_2_val.read(), 1, &d_6bfbc86a_4643_405d_8ac5_31fb9eb3828c_884);
accum_out_vec[2].Connections::OutBlocking_Ports_abs<ac_int<32, true > >::val.write(d_6bfbc86a_4643_405d_8ac5_31fb9eb3828c_884);
// none.sc_out field_key=accum_out_vec:6bfbc86a-4643-405d-8ac5-31fb9eb3828c-869:val:6bfbc86a-4643-405d-8ac5-31fb9eb3828c-884
vector_to_type(ccs_rtl_SIG_accum_out_vec_3_val.read(), 1, &d_6bfbc86a_4643_405d_8ac5_31fb9eb3828c_884);
accum_out_vec[3].Connections::OutBlocking_Ports_abs<ac_int<32, true > >::val.write(d_6bfbc86a_4643_405d_8ac5_31fb9eb3828c_884);
// none.sc_out field_key=accum_out_vec:6bfbc86a-4643-405d-8ac5-31fb9eb3828c-869:val:6bfbc86a-4643-405d-8ac5-31fb9eb3828c-884
vector_to_type(ccs_rtl_SIG_accum_out_vec_4_val.read(), 1, &d_6bfbc86a_4643_405d_8ac5_31fb9eb3828c_884);
accum_out_vec[4].Connections::OutBlocking_Ports_abs<ac_int<32, true > >::val.write(d_6bfbc86a_4643_405d_8ac5_31fb9eb3828c_884);
// none.sc_out field_key=accum_out_vec:6bfbc86a-4643-405d-8ac5-31fb9eb3828c-869:val:6bfbc86a-4643-405d-8ac5-31fb9eb3828c-884
vector_to_type(ccs_rtl_SIG_accum_out_vec_5_val.read(), 1, &d_6bfbc86a_4643_405d_8ac5_31fb9eb3828c_884);
accum_out_vec[5].Connections::OutBlocking_Ports_abs<ac_int<32, true > >::val.write(d_6bfbc86a_4643_405d_8ac5_31fb9eb3828c_884);
// none.sc_out field_key=accum_out_vec:6bfbc86a-4643-405d-8ac5-31fb9eb3828c-869:val:6bfbc86a-4643-405d-8ac5-31fb9eb3828c-884
vector_to_type(ccs_rtl_SIG_accum_out_vec_6_val.read(), 1, &d_6bfbc86a_4643_405d_8ac5_31fb9eb3828c_884);
accum_out_vec[6].Connections::OutBlocking_Ports_abs<ac_int<32, true > >::val.write(d_6bfbc86a_4643_405d_8ac5_31fb9eb3828c_884);
// none.sc_out field_key=accum_out_vec:6bfbc86a-4643-405d-8ac5-31fb9eb3828c-869:val:6bfbc86a-4643-405d-8ac5-31fb9eb3828c-884
vector_to_type(ccs_rtl_SIG_accum_out_vec_7_val.read(), 1, &d_6bfbc86a_4643_405d_8ac5_31fb9eb3828c_884);
accum_out_vec[7].Connections::OutBlocking_Ports_abs<ac_int<32, true > >::val.write(d_6bfbc86a_4643_405d_8ac5_31fb9eb3828c_884);
// none.sc_in field_key=accum_out_vec:6bfbc86a-4643-405d-8ac5-31fb9eb3828c-869:rdy:6bfbc86a-4643-405d-8ac5-31fb9eb3828c-888
sc_logic t_6bfbc86a_4643_405d_8ac5_31fb9eb3828c_888; // NPS - LV to hold field
type_to_vector(accum_out_vec[0].Connections::OutBlocking_Ports_abs<ac_int<32, true > >::rdy.read(),1,t_6bfbc86a_4643_405d_8ac5_31fb9eb3828c_888); // read orig port and type convert
ccs_rtl_SIG_accum_out_vec_0_rdy.write(t_6bfbc86a_4643_405d_8ac5_31fb9eb3828c_888); // then write to RTL port
// none.sc_in field_key=accum_out_vec:6bfbc86a-4643-405d-8ac5-31fb9eb3828c-869:rdy:6bfbc86a-4643-405d-8ac5-31fb9eb3828c-888
type_to_vector(accum_out_vec[1].Connections::OutBlocking_Ports_abs<ac_int<32, true > >::rdy.read(),1,t_6bfbc86a_4643_405d_8ac5_31fb9eb3828c_888); // read orig port and type convert
ccs_rtl_SIG_accum_out_vec_1_rdy.write(t_6bfbc86a_4643_405d_8ac5_31fb9eb3828c_888); // then write to RTL port
// none.sc_in field_key=accum_out_vec:6bfbc86a-4643-405d-8ac5-31fb9eb3828c-869:rdy:6bfbc86a-4643-405d-8ac5-31fb9eb3828c-888
type_to_vector(accum_out_vec[2].Connections::OutBlocking_Ports_abs<ac_int<32, true > >::rdy.read(),1,t_6bfbc86a_4643_405d_8ac5_31fb9eb3828c_888); // read orig port and type convert
ccs_rtl_SIG_accum_out_vec_2_rdy.write(t_6bfbc86a_4643_405d_8ac5_31fb9eb3828c_888); // then write to RTL port
// none.sc_in fi |
eld_key=accum_out_vec:6bfbc86a-4643-405d-8ac5-31fb9eb3828c-869:rdy:6bfbc86a-4643-405d-8ac5-31fb9eb3828c-888
type_to_vector(accum_out_vec[3].Connections::OutBlocking_Ports_abs<ac_int<32, true > >::rdy.read(),1,t_6bfbc86a_4643_405d_8ac5_31fb9eb3828c_888); // read orig port and type convert
ccs_rtl_SIG_accum_out_vec_3_rdy.write(t_6bfbc86a_4643_405d_8ac5_31fb9eb3828c_888); // then write to RTL port
// none.sc_in field_key=accum_out_vec:6bfbc86a-4643-405d-8ac5-31fb9eb3828c-869:rdy:6bfbc86a-4643-405d-8ac5-31fb9eb3828c-888
type_to_vector(accum_out_vec[4].Connections::OutBlocking_Ports_abs<ac_int<32, true > >::rdy.read(),1,t_6bfbc86a_4643_405d_8ac5_31fb9eb3828c_888); // read orig port and type convert
ccs_rtl_SIG_accum_out_vec_4_rdy.write(t_6bfbc86a_4643_405d_8ac5_31fb9eb3828c_888); // then write to RTL port
// none.sc_in field_key=accum_out_vec:6bfbc86a-4643-405d-8ac5-31fb9eb3828c-869:rdy:6bfbc86a-4643-405d-8ac5-31fb9eb3828c-888
type_to_vector(accum_out_vec[5].Connections::OutBlocking_Ports_abs<ac_int<32, true > >::rdy.read(),1,t_6bfbc86a_4643_405d_8ac5_31fb9eb3828c_888); // read orig port and type convert
ccs_rtl_SIG_accum_out_vec_5_rdy.write(t_6bfbc86a_4643_405d_8ac5_31fb9eb3828c_888); // then write to RTL port
// none.sc_in field_key=accum_out_vec:6bfbc86a-4643-405d-8ac5-31fb9eb3828c-869:rdy:6bfbc86a-4643-405d-8ac5-31fb9eb3828c-888
type_to_vector(accum_out_vec[6].Connections::OutBlocking_Ports_abs<ac_int<32, true > >::rdy.read(),1,t_6bfbc86a_4643_405d_8ac5_31fb9eb3828c_888); // read orig port and type convert
ccs_rtl_SIG_accum_out_vec_6_rdy.write(t_6bfbc86a_4643_405d_8ac5_31fb9eb3828c_888); // then write to RTL port
// none.sc_in field_key=accum_out_vec:6bfbc86a-4643-405d-8ac5-31fb9eb3828c-869:rdy:6bfbc86a-4643-405d-8ac5-31fb9eb3828c-888
type_to_vector(accum_out_vec[7].Connections::OutBlocking_Ports_abs<ac_int<32, true > >::rdy.read(),1,t_6bfbc86a_4643_405d_8ac5_31fb9eb3828c_888); // read orig port and type convert
ccs_rtl_SIG_accum_out_vec_7_rdy.write(t_6bfbc86a_4643_405d_8ac5_31fb9eb3828c_888); // then write to RTL port
// none.sc_out field_key=accum_out_vec:6bfbc86a-4643-405d-8ac5-31fb9eb3828c-869:msg:6bfbc86a-4643-405d-8ac5-31fb9eb3828c-892
sc_dt::sc_lv<32 > d_6bfbc86a_4643_405d_8ac5_31fb9eb3828c_892;
vector_to_type(ccs_rtl_SIG_accum_out_vec_0_msg.read(), 32, &d_6bfbc86a_4643_405d_8ac5_31fb9eb3828c_892);
accum_out_vec[0].Connections::OutBlocking<ac_int<32, true >, Connections::SYN_PORT >::msg.write(d_6bfbc86a_4643_405d_8ac5_31fb9eb3828c_892);
// none.sc_out field_key=accum_out_vec:6bfbc86a-4643-405d-8ac5-31fb9eb3828c-869:msg:6bfbc86a-4643-405d-8ac5-31fb9eb3828c-892
vector_to_type(ccs_rtl_SIG_accum_out_vec_1_msg.read(), 32, &d_6bfbc86a_4643_405d_8ac5_31fb9eb3828c_892);
accum_out_vec[1].Connections::OutBlocking<ac_int<32, true >, Connections::SYN_PORT >::msg.write(d_6bfbc86a_4643_405d_8ac5_31fb9eb3828c_892);
// none.sc_out field_key=accum_out_vec:6bfbc86a-4643-405d-8ac5-31fb9eb3828c-869:msg:6bfbc86a-4643-405d-8ac5-31fb9eb3828c-892
vector_to_type(ccs_rtl_SIG_accum_out_vec_2_msg.read(), 32, &d_6bfbc86a_4643_405d_8ac5_31fb9eb3828c_892);
accum_out_vec[2].Connections::OutBlocking<ac_int<32, true >, Connections::SYN_PORT >::msg.write(d_6bfbc86a_4643_405d_8ac5_31fb9eb3828c_892);
// none.sc_out field_key=accum_out_vec:6bfbc86a-4643-405d-8ac5-31fb9eb3828c-869:msg:6bfbc86a-4643-405d-8ac5-31fb9eb3828c-892
vector_to_type(ccs_rtl_SIG_accum_out_vec_3_msg.read(), 32, &d_6bfbc86a_4643_405d_8ac5_31fb9eb3828c_892);
accum_out_vec[3].Connections::OutBlocking<ac_int<32, true >, Connections::SYN_PORT >::msg.write(d_6bfbc86a_4643_405d_8ac5_31fb9eb3828c_892);
// none.sc_out field_key=accum_out_vec:6bfbc86a-4643-405d-8ac5-31fb9eb3828c-869:msg:6bfbc86a-4643-405d-8ac5-31fb9eb3828c-892
vector_to_type(ccs_rtl_SIG_accum_out_vec_4_msg.read(), 32, &d_6bfbc86a_4643_405d_8ac5_31fb9eb3828c_892);
accum_out_vec[4].Connections::OutBlocking<ac_int<32, true >, Connections::SYN_PORT >::msg.write(d_6bfbc86a_4643_405d_8ac5_31fb9eb3828c_892);
// none.sc_out field_key=accum_out_vec:6bfbc86a-4643-405d-8ac5-31fb9eb3828c-869:msg:6bfbc86a-4643-405d-8ac5-31fb9eb3828c-892
vector_to_type(ccs_rtl_SIG_accum_out_vec_5_msg.read(), 32, &d_6bfbc86a_4643_405d_8ac5_31fb9eb3828c_892);
accum_out_vec[5].Connections::OutBlocking<ac_int<32, true >, Connections::SYN_PORT >::msg.write(d_6bfbc86a_4643_405d_8ac5_31fb9eb3828c_892);
// none.sc_out field_key=accum_out_vec:6bfbc86a-4643-405d-8ac5-31fb9eb3828c-869:msg:6bfbc86a-4643-405d-8ac5-31fb9eb3828c-892
vector_to_type(ccs_rtl_SIG_accum_out_vec_6_msg.read(), 32, &d_6bfbc86a_4643_405d_8ac5_31fb9eb3828c_892);
accum_out_vec[6].Connections::OutBlocking<ac_int<32, true >, Connections::SYN_PORT >::msg.write(d_6bfbc86a_4643_405d_8ac5_31fb9eb3828c_892);
// none.sc_out field_key=accum_out_vec:6bfbc86a-4643-405d-8ac5-31fb9eb3828c-869:msg:6bfbc86a-4643-405d-8ac5-31fb9eb3828c-892
vector_to_type(ccs_rtl_SIG_accum_out_vec_7_msg.read(), 32, &d_6bfbc86a_4643_405d_8ac5_31fb9eb3828c_892);
accum_out_vec[7].Connections::OutBlocking<ac_int<32, true >, Connections::SYN_PORT >::msg.write(d_6bfbc86a_4643_405d_8ac5_31fb9eb3828c_892);
}
// Include original testbench file(s)
#include "/home/billyk/cs148/hls/lab3/SysTop/../../../cmod/lab3/SysTop/testbench.cpp"
|
#include <systemc.h>
//
// Example which is using switch statement to create multiplexer
//
// .. hwt-autodoc::
//
SC_MODULE(SwitchStmHwModule) {
// ports
sc_in<sc_uint<1>> a;
sc_in<sc_uint<1>> b;
sc_in<sc_uint<1>> c;
sc_out<sc_uint<1>> out;
sc_in<sc_uint<3>> sel;
// component instances
// internal signals
void assig_process_out() {
switch(sel.read()) {
case sc_uint<3>("0b000"): {
out.write(a.read());
break;
}
case sc_uint<3>("0b001"): {
out.write(b.read());
break;
}
case sc_uint<3>("0b010"): {
out.write(c.read());
break;
}
default:
out.write(sc_uint<1>("0b0"));
}
}
SC_CTOR(SwitchStmHwModule) {
SC_METHOD(assig_process_out);
sensitive << a << b << c << sel;
// connect ports
}
};
|
/*****************************************************************************
Licensed to Accellera Systems Initiative Inc. (Accellera) under one or
more contributor license agreements. See the NOTICE file distributed
with this work for additional information regarding copyright ownership.
Accellera licenses this file to you under the Apache License, Version 2.0
(the "License"); you may not use this file except in compliance with the
License. You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
implied. See the License for the specific language governing
permissions and limitations under the License.
*****************************************************************************/
/*****************************************************************************
display.cpp --
Original Author: Rocco Jonack, Synopsys, Inc.
*****************************************************************************/
/*****************************************************************************
MODIFICATION LOG - modifiers, enter your name, affiliation, date and
changes you are making here.
Name, Affiliation: Teodor Vasilache and Dragos Dospinescu,
AMIQ Consulting s.r.l. ([email protected])
Date: 2018-Feb-20
Description of Modification: Included the FC4SC library in order to collect
functional coverage data and generate a coverage database.
*****************************************************************************/
/*****************************************************************************
MODIFICATION LOG - modifiers, enter your name, affiliation, date and
changes you are making here.
Name, Affiliation, Date:
Description of Modification:
*****************************************************************************/
#include <systemc.h>
#include "display.h"
#include "fc4sc.hpp"
void display::entry(){
// Reading Data when valid if high
tmp1 = result.read();
cout << "Display : " << tmp1 << " "
/* << " at time " << sc_time_stamp() << endl; */
<< " at time " << sc_time_stamp().to_double() << endl;
i++;
// sample the data
this->out_cg.sample(result, output_data_ready);
if(i == 24) {
cout << "Simulation of " << i << " items finished"
/* << " at time " << sc_time_stamp() << endl; */
<< " at time " << sc_time_stamp().to_double() << endl;
// generate the coverage database from the collected data
fc4sc::global::coverage_save("coverage_results.xml");
sc_stop();
};
}
// EOF
|
#ifndef IPS_FILTER_TLM_CPP
#define IPS_FILTER_TLM_CPP
#include <systemc.h>
using namespace sc_core;
using namespace sc_dt;
using namespace std;
#include <tlm.h>
#include <tlm_utils/simple_initiator_socket.h>
#include <tlm_utils/simple_target_socket.h>
#include <tlm_utils/peq_with_cb_and_phase.h>
#include "ips_filter_tlm.hpp"
#include "common_func.hpp"
#include "important_defines.hpp"
void ips_filter_tlm::do_when_read_transaction(unsigned char*& data, unsigned int data_length, sc_dt::uint64 address)
{
dbgimgtarmodprint(use_prints, "Called do_when_read_transaction with an address %016llX and length %d", address, data_length);
this->img_result = *(Filter<IPS_IN_TYPE_TB, IPS_OUT_TYPE_TB, IPS_FILTER_KERNEL_SIZE>::result_ptr);
*data = (unsigned char) this->img_result;
dbgimgtarmodprint(true, "Returning filter result %f", this->img_result);
//memcpy(data, Filter<IPS_IN_TYPE_TB, IPS_OUT_TYPE_TB, IPS_FILTER_KERNEL_SIZE>::result_ptr, sizeof(IPS_OUT_TYPE_TB));
}
void ips_filter_tlm::do_when_write_transaction(unsigned char*& data, unsigned int data_length, sc_dt::uint64 address)
{
IPS_OUT_TYPE_TB* result = new IPS_OUT_TYPE_TB;
dbgimgtarmodprint(use_prints, "Called do_when_write_transaction with an address %016llX and length %d", address, data_length);
//dbgimgtarmodprint(use_prints, "[DEBUG]: data: %0d, address %0d, data_length %0d, size of char %0d", *data, address, data_length, sizeof(char));
for (int i = 0; i < data_length; i++) {
this->img_window[address + i] = (IPS_IN_TYPE_TB) *(data + i);
}
//dbgimgtarmodprint(use_prints, "[DEBUG]: img_window data: %0f", this->img_window[address]);
if (address == 8) {
dbgimgtarmodprint(true, "Got full window, starting filtering now");
filter(this->img_window, result);
}
}
#endif // IPS_FILTER_TLM_CPP
|
/*******************************************************************************
* pcnttest.cpp -- Copyright 2019 (c) Glenn Ramalho - RFIDo Design
*******************************************************************************
* Description:
* This is the main testbench for the pcnt.ino test.
*******************************************************************************
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*******************************************************************************
*/
#include <systemc.h>
#include "pcnttest.h"
#include <string>
#include <vector>
#include "info.h"
/**********************
* Function: trace()
* inputs: trace file
* outputs: none
* return: none
* globals: none
*
* Traces all signals in the design. For a signal to be traced it must be listed
* here. This function should also call tracing in any subblocks, if desired.
*/
void pcnttest::trace(sc_trace_file *tf) {
sc_trace(tf, led, led.name());
sc_trace(tf, rx, rx.name());
sc_trace(tf, tx, tx.name());
sc_trace(tf, pwm0, pwm0.name());
sc_trace(tf, pwm1, pwm1.name());
sc_trace(tf, pwm2, pwm2.name());
sc_trace(tf, pwm3, pwm3.name());
sc_trace(tf, ctrl0, ctrl0.name());
sc_trace(tf, ctrl1, ctrl1.name());
sc_trace(tf, ctrl2, ctrl2.name());
i_esp.trace(tf);
}
/**********************
* Task: serflush():
* inputs: none
* outputs: none
* return: none
* globals: none
*
* Dumps everything comming from the serial interface.
*/
void pcnttest::serflush() {
i_uartclient.dump();
}
/**********************
* Task: drivewave():
* inputs: none
* outputs: none
* return: none
* globals: none
*
* Drives a waveform onto the pwm0 pin.
*/
void pcnttest::drivewave() {
int c;
pwm0.write(false);
pwm1.write(false);
pwm2.write(false);
pwm3.write(false);
while(true) {
ctrl1.write(false);
for(c = 0; c < 20; c = c + 1) {
wait(1, SC_MS);
pwm0.write(true);
wait(300, SC_NS);
pwm1.write(true);
pwm2.write(true);
wait(200, SC_NS);
pwm0.write(false);
wait(300, SC_NS);
pwm1.write(false);
pwm2.write(false);
}
ctrl1.write(true);
for(c = 0; c < 20; c = c + 1) {
wait(1, SC_MS);
pwm0.write(true);
wait(300, SC_NS);
pwm1.write(true);
pwm3.write(true);
wait(200, SC_NS);
pwm0.write(false);
wait(300, SC_NS);
pwm1.write(false);
pwm3.write(false);
}
}
}
/*******************************************************************************
** Testbenches *****************************************************************
*******************************************************************************/
void pcnttest::t0(void) {
SC_REPORT_INFO("TEST", "Running Test T0.");
PRINTF_INFO("TEST", "Waiting for power-up");
ctrl0.write(false);
ctrl2.write(false);
wait(500, SC_MS);
}
void pcnttest::testbench(void) {
/* Now we check the test case and run the correct TB. */
printf("Starting Testbench Test%d @%s\n", tn,
sc_time_stamp().to_string().c_str());
if (tn == 0) t0();
else SC_REPORT_ERROR("TEST", "Test number too large.");
sc_stop();
}
|
/* Copyright © 2017, Stefan Sicklinger, Munich
*
* All rights reserved.
*
* This file is part of STACCATO.
*
* STACCATO is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
* (at your option) any later version.
*
* STACCATO is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with STACCATO. If not, see http://www.gnu.org/licenses/.
*/
#include "FeUmaElement.h"
#include "Material.h"
#include "Message.h"
#include "MathLibrary.h"
#ifdef USE_SIMULIA_UMA_API
#include <ads_CoreFESystemC.h>
#include <ads_CoreMeshC.h>
#include <uma_System.h>
#include <uma_SparseMatrix.h>
#include <uma_ArrayInt.h>
#include <uma_IncoreMatrix.h>
#endif
#include <iostream>
#include <stdio.h>
#include <iomanip>
//XML
#include "MetaDatabase.h"
FeUmaElement::FeUmaElement(Material *_material) : FeElement(_material) {
/*nodeToDofMap = MetaDatabase::getInstance()->nodeToDofMapMeta;
nodeToGlobalMap = MetaDatabase::getInstance()->nodeToGlobalMapMeta;
int numNodes = nodeToGlobalMap.size();
totalDOFs = 0;
for (std::map<int, std::vector<int>>::iterator it = nodeToDofMap.begin(); it != nodeToDofMap.end(); ++it) {
totalDOFs += it->second.size();
}
mySparseSDReal = new MathLibrary::SparseMatrix<double>(totalDOFs, true, true);
std::cout << " >> UMA Element Created with TotalDoFs: " << totalDOFs << std::endl;*/
}
FeUmaElement::~FeUmaElement() {
}
void FeUmaElement::computeElementMatrix(const double* _eleCoords) {
/*bool matdisp = false;
bool fileexp = false;
std::string simFileK = MetaDatabase::getInstance()->simFile + "_X1.sim";
const char * simFileStiffness = simFileK.c_str();
std::string simFileM = MetaDatabase::getInstance()->simFile + "_X2.sim";
const char * simFileMass = simFileM.c_str();
std::string simFileStrD = MetaDatabase::getInstance()->simFile + "_X3.sim";
const char * simFileSD = simFileStrD.c_str();
bool structDampingExists = false;
std::ifstream ifile(simFileSD);
if (ifile)
structDampingExists = true;
stiffnessUMA_key = "GenericSystem_stiffness";
massUMA_key = "GenericSystem_mass";
structuralDampingUMA_key = "GenericSystem_structuralDamping";
#ifdef USE_SIMULIA_UMA_API
//DebugSIM(stiffnessUMA_key, simFileStiffness, matdisp, fileexp);
//DebugSIM(massUMA_key, simFileMass, matdisp, fileexp);
ImportSIM(stiffnessUMA_key, simFileStiffness, matdisp, fileexp);
ImportSIM(massUMA_key, simFileMass, matdisp, fileexp);
ImportSIM(structuralDampingUMA_key, simFileSD, matdisp, fileexp);
#endif*/
}
#ifdef USE_SIMULIA_UMA_API
void FeUmaElement::PrintMatrix(const uma_System &system, const char *matrixName, bool _printToScreen, bool _printToFile)
{
/*char * mapTypeName[] = { "DOFS", "NODES", "MODES", "ELEMENTS", "CASES", "Unknown" };
if (!system.HasMatrix(matrixName)) {
return;
printf("\nSparse matrix %s not found\n", matrixName);
}
uma_SparseMatrix smtx;
system.SparseMatrix(smtx, matrixName);
if (!smtx) {
printf("\nSparse matrix %s cannot be not accessed\n", matrixName);
return;
}
printf(" Matrix %s - sparse type\n", matrixName);
printf(" domain: rows %s, columns %s\n", mapTypeName[smtx.TypeRows()], mapTypeName[smtx.TypeColumns()]);
printf(" size: rows %i, columns %i, entries %i", smtx.NumRows(), smtx.NumColumns(), smtx.NumEntries());
if (smtx.IsSymmetric())
printf("; symmetric");
printf("\n");
uma_SparseIterator iter(smtx);
int row, col; double val;
if (_printToScreen) {
int count = 0;
int lastRow = 0;
for (iter.First(); !iter.IsDone(); iter.Next(), count++) {
iter.Entry(row, col, val);
if (row != lastRow)
printf("\n");
if (row != col)
printf(" %2i,%-2i:%g", row, col, val);
else
printf(" *%2i,%-2i:%g", row, col, val);
lastRow = row;
}
printf("\n");
// Map column DOFS to user nodes and dofs
if (smtx.TypeColumns() != uma_Enum::DOFS)
return;
printf("\n map columns [column: node-dof]:");
uma_ArrayInt nodes; smtx.MapColumns(nodes, uma_Enum::NODES); // test array
std::vector<int> ldofs; smtx.MapColumns(ldofs, uma_Enum::DOFS); // test vector
for (int col = 0; col < nodes.Size(); col++) {
if (col % 10 == 0)
printf("\n");
printf(" %3i:%3i-%1i", col, nodes[col], ldofs[col]);
}
printf("\n");
}
if (_printToFile) {
std::ofstream myfile;
myfile.open(std::string(matrixName) +".mtx");
std::cout << ">>> Writing file to: " << std::string(matrixName) + ".mtx" << std::endl;
myfile.precision(std::numeric_limits<double>::digits10 + 1);
myfile << std::scientific;
for (iter.First(); !iter.IsDone(); iter.Next()) {
iter.Entry(row, col, val);
myfile << row << " " << col << " " << val << std::endl;
}
myfile.close();
}*/
}
#endif
void FeUmaElement::DebugSIM(const char* _matrixkey, const char* _fileName, bool _printToScreen, bool _printToFile) {
#ifdef USE_SIMULIA_UMA_API
/*std::cout << ">>> Debug SIM File: " << _fileName << " UMA Key: " << _matrixkey << std::endl;
uma_System system(_fileName);
if (system.IsNull()) {
std::cout << ">>> Error: System not defined.\n";
}
if (system.Type() != ads_GenericSystem) {
std::cout << "Error: Struc. Damping Not a Generic System.\n";
}
PrintMatrix(system, _matrixkey, _printToScreen, _printToFile);*/
#endif
}
void FeUmaElement::ImportSIM(const char* _matrixkey, const char* _fileName, bool _printToScreen, bool _printToFile) {
#ifdef USE_SIMULIA_UMA_API
/*std::cout << ">>> Import SIM File: " << _fileName << " UMA Key: " << _matrixkey << std::endl;
bool flag = false;
std::ifstream ifile(_fileName);
if (!ifile) {
if (std::string(_matrixkey) == structuralDampingUMA_key)
{
std::cout << " > StructuralDamping file not found and hence skipped." << std::endl;
flag = true;
}
else {
std::cout << " > File not found." << std::endl;
exit(EXIT_FAILURE);
}
}
if (!flag)
{
uma_System system(_fileName);
if (system.IsNull()) {
std::cout << ">> Error: System not defined.\n";
}
if (system.Type() != ads_GenericSystem) {
std::cout << ">> Error: Not a Generic System.\n";
}
extractData(system, _matrixkey, _printToScreen, _printToFile);
}*/
#endif
}
#ifdef USE_SIMULIA_UMA_API
void FeUmaElement::extractData(const uma_System &system, const char *matrixName, bool _printToScreen, bool _printToFile) {
/*char * mapTypeName[] = { "DOFS", "NODES", "MODES", "ELEMENTS", "CASES", "Unknown" };
// Check for matrix existence
if (!system.HasMatrix(matrixName)) {
std::cout << " >> Sparse matrix " << matrixName << " not found\n";
exit(EXIT_FAILURE);
}
// Load the matrix
uma_SparseMatrix smtx;
system.SparseMatrix(smtx, matrixName);
if (!smtx) {
std::cout << " >> Sparse matrix " << matrixName << " cannot be accessed!\n";
exit(EXIT_FAILURE);
}
if (_printToScreen)
{
printf(" Matrix %s - sparse type\n", matrixName);
printf(" domain: rows %s, columns %s\n", mapTypeName[smtx.TypeRows()], mapTypeName[smtx.TypeColumns()]);
printf(" size: rows %i, columns %i, entries %i", smtx.NumRows(), smtx.NumColumns(), smtx.NumEntries());
if (smtx.IsSymmetric())
printf("; symmetric");
else {
std::cout << ";unsymmetric" << std::endl;
exit(EXIT_FAILURE);
}
printf("\n");
}
if (!smtx.IsSymmetric()){
std::cout << " Error: System not Symmetric" << std::endl;
exit(EXIT_FAILURE);
}
uma_SparseIterator iter(smtx);
int row, col; double val;
int count = 0;
uma_ArrayInt nodes; smtx.MapColumns(nodes, uma_Enum::NODES); // test array
uma_ArrayInt ldofs; smtx.MapColumns(ldofs, uma_Enum::DOFS); // test vector
if (std::string(matrixName) == std::string(stiffnessUMA_key)) {
std::cout << " > Importing Ke ..." << std::endl;
mySparseKReal = new MathLibrary::SparseMatrix<double>(totalDOFs, true, true);
for (iter.First(); !iter.IsDone(); iter.Next(), count++) {
iter.Entry(row, col, val);
int fnode_row = nodes[row];
int fdof_row = ldofs[row];
int fnode_col = nodes[col];
int fdof_col = ldofs[col];
int globalrow = -1;
int globalcol = -1;
for (int i = 0; i < nodeToDofMap[fnode_row].size(); i++)
{
if(nodeToDofMap[fnode_row][i] == fdof_row)
globalrow = nodeToGlobalMap[fnode_row][i];
}
for (int i = 0; i < nodeToDofMap[fnode_col].size(); i++)
{
if (nodeToDofMap[fnode_col][i] == fdof_col)
globalcol = nodeToGlobalMap[fnode_col][i];
}
//std::cout << "Entry @ " << globalrow << " , " << globalcol << std::endl;
if (globalrow > globalcol) {
int temp = globalrow;
globalrow = globalcol;
globalcol = temp;
}
(*mySparseKReal)(globalrow, globalcol) = val;
myK_row.push_back(globalrow);
myK_col.push_back(globalcol);
if (globalrow == globalcol) {
if (val >= 1e36) {
std::cout << "Error: DBC pivot found!";
exit(EXIT_FAILURE);
}
}
}
if (_printToFile) {
std::cout << ">> Printing to file Staccato_Sparse_Stiffness.mtx..." << std::endl;
(*mySparseKReal).writeSparseMatrixToFile("Staccato_Sparse_Stiffness", "mtx");
}
}
else if (std::string(matrixName) == std::string(massUMA_key)) {
std::cout << " > Importing Me ..." << std::endl;
mySparseMReal = new MathLibrary::SparseMatrix<double>(totalDOFs, true, true);
for (iter.First(); !iter.IsDone(); iter.Next(), count++) {
iter.Entry(row, col, val);
int fnode_row = nodes[row];
int fdof_row = ldofs[row];
int fnode_col = nodes[col];
int fdof_col = ldofs[col];
int globalrow = -1;
int globalcol = -1;
for (int i = 0; i < nodeToDofMap[fnode_row].size(); i++)
{
if (nodeToDofMap[fnode_row][i] == fdof_row)
globalrow = nodeToGlobalMap[fnode_row][i];
}
for (int i = 0; i < nodeToDofMap[fnode_col].size(); i++)
{
if (nodeToDofMap[fnode_col][i] == fdof_col)
globalcol = nodeToGlobalMap[fnode_col][i];
}
//std::cout << "Entry @ " << globalrow << " , " << globalcol << std::endl;
if (fnode_row >= 1e9 || fnode_col >= 1e9) {
if (val != 0) {
std::cout << ">> ERROR: Has entry." << std::endl;
exit(EXIT_FAILURE);
}
}
if (globalrow <= globalcol)
(*mySparseMReal)(globalrow, globalcol) = val;
else
(*mySparseMReal)(globalcol, globalrow) = val;
myM_row.push_back(globalrow);
myM_col.push_back(globalcol);
}
if (_printToFile) {
std::cout << ">> Printing to file Staccato_Sparse_Mass.mtx..." << std::endl;
(*mySparseMReal).writeSparseMatrixToFile("Staccato_Sparse_Mass", "mtx");
}
}
else if (std::string(matrixName) == std::string(structuralDampingUMA_key)) {
std::cout << " > Importing SDe ..." << std::endl;
for (iter.First(); !iter.IsDone(); iter.Next(), count++) {
iter.Entry(row, col, val);
int fnode_row = nodes[row];
int fdof_row = ldofs[row];
int fnode_col = nodes[col];
int fdof_col = ldofs[col];
int globalrow = -1;
int globalcol = -1;
for (int i = 0; i < nodeToDofMap[fnode_row].size(); i++)
{
if (nodeToDofMap[fnode_row][i] == fdof_row)
globalrow = nodeToGlobalMap[fnode_row][i];
}
for (int i = 0; i < nodeToDofMap[fnode_col].size(); i++)
{
if (nodeToDofMap[fnode_col][i] == fdof_col)
globalcol = nodeToGlobalMap[fnode_col][i];
}
//std::cout << "Entry @ " << globalrow << " , " << globalcol << std::endl;
if (globalrow > globalcol) {
int temp = globalrow;
globalrow = globalcol;
globalcol = temp;
}
(*mySparseSDReal)(globalrow, globalcol) = val;
mySD_row.push_back(globalrow);
mySD_col.push_back(globalcol);
if (globalrow == globalcol) {
if (val >= 1e36) {
std::cout << "Error: DBC pivot found!";
exit(EXIT_FAILURE);
}
}
}
if (_printToFile) {
std::cout << ">> Printing to file Staccato_Sparse_StructuralDamping.mtx..." << std::endl;
(*mySparseSDReal).writeSparseMatrixToFile("Staccato_Sparse_StructuralDamping", "mtx");
}
}*/
}
#endif |
///////////////////////////////////////////////////////////////////////////////////
// __ _ _ _ //
// / _(_) | | | | //
// __ _ _ _ ___ ___ _ __ | |_ _ ___| | __| | //
// / _` | | | |/ _ \/ _ \ '_ \| _| |/ _ \ |/ _` | //
// | (_| | |_| | __/ __/ | | | | | | __/ | (_| | //
// \__, |\__,_|\___|\___|_| |_|_| |_|\___|_|\__,_| //
// | | //
// |_| //
// //
// //
// Peripheral-NTM for MPSoC //
// Neural Turing Machine for MPSoC //
// //
///////////////////////////////////////////////////////////////////////////////////
///////////////////////////////////////////////////////////////////////////////////
// //
// Copyright (c) 2020-2024 by the author(s) //
// //
// Permission is hereby granted, free of charge, to any person obtaining a copy //
// of this software and associated documentation files (the "Software"), to deal //
// in the Software without restriction, including without limitation the rights //
// to use, copy, modify, merge, publish, distribute, sublicense, and/or sell //
// copies of the Software, and to permit persons to whom the Software is //
// furnished to do so, subject to the following conditions: //
// //
// The above copyright notice and this permission notice shall be included in //
// all copies or substantial portions of the Software. //
// //
// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR //
// IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, //
// FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE //
// AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER //
// LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, //
// OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN //
// THE SOFTWARE. //
// //
// ============================================================================= //
// Author(s): //
// Paco Reina Campo <[email protected]> //
// //
///////////////////////////////////////////////////////////////////////////////////
#include "ntm_tensor_summation_design.cpp"
#include "systemc.h"
int sc_main(int argc, char *argv[]) {
adder adder("ADDER");
sc_signal<int> Ain;
sc_signal<int> Bin;
sc_signal<bool> clock;
sc_signal<int> out;
adder(clock, Ain, Bin, out);
Ain = 1;
Bin = 2;
clock = 0;
sc_start(1, SC_NS);
clock = 1;
sc_start(1, SC_NS);
cout << "@" << sc_time_stamp() << ": A + B = " << out.read() << endl;
Ain = 2;
Bin = 2;
clock = 0;
sc_start(1, SC_NS);
clock = 1;
sc_start(1, SC_NS);
cout << "@" << sc_time_stamp() << ": A + B = " << out.read() << endl;
return 0;
}
|
#include <systemc.h>
#include "memory.cpp"
int sc_main (int argc, char* argv[]) {
int data;
ram mem("MEM", 1024);
// Open VCD file
sc_trace_file *wf = sc_create_vcd_trace_file("memory");
wf->set_time_unit(1, SC_NS);
// Dump the desired signals
sc_trace(wf, data, "data");
sc_start();
cout << "@" << sc_time_stamp()<< endl;
printf("Writing in zero time\n");
printf("WR: addr = 0x10, data = 0xaced\n");
printf("WR: addr = 0x12, data = 0xbeef\n");
printf("WR: addr = 0x13, data = 0xdead\n");
printf("WR: addr = 0x14, data = 0x1234\n");
mem.wr(0x10, 0xaced);
mem.wr(0x11, 0xbeef);
mem.wr(0x12, 0xdead);
mem.wr(0x13, 0x1234);
cout << "@" << sc_time_stamp()<< endl;
cout << "Reading in zero time" <<endl;
data = mem.rd(0x10);
printf("Rd: addr = 0x10, data = %x\n",data);
data = mem.rd(0x11);
printf("Rd: addr = 0x11, data = %x\n",data);
data = mem.rd(0x12);
printf("Rd: addr = 0x12, data = %x\n",data);
data = mem.rd(0x13);
printf("Rd: addr = 0x13, data = %x\n",data);
cout << "@" << sc_time_stamp()<< endl;
cout << "@" << sc_time_stamp() <<" Terminating simulation\n" << endl;
sc_close_vcd_trace_file(wf);
return 0;// Terminate simulation
} |
#include <systemc.h>
//
// Every HW component class has to be derived from :class:`hwt.hwModule.HwModule` class
//
// .. hwt-autodoc::
//
SC_MODULE(Showcase0) {
// ports
sc_in<sc_uint<32>> a;
sc_in<sc_int<32>> b;
sc_out<sc_uint<32>> c;
sc_in_clk clk;
sc_out<sc_uint<1>> cmp_0;
sc_out<sc_uint<1>> cmp_1;
sc_out<sc_uint<1>> cmp_2;
sc_out<sc_uint<1>> cmp_3;
sc_out<sc_uint<1>> cmp_4;
sc_out<sc_uint<1>> cmp_5;
sc_out<sc_uint<32>> contOut;
sc_in<sc_uint<32>> d;
sc_in<sc_uint<1>> e;
sc_out<sc_uint<1>> f;
sc_out<sc_uint<16>> fitted;
sc_out<sc_uint<8>> g;
sc_out<sc_uint<8>> h;
sc_in<sc_uint<2>> i;
sc_out<sc_uint<8>> j;
sc_out<sc_uint<32>> k;
sc_out<sc_uint<1>> out;
sc_out<sc_uint<1>> output;
sc_in<sc_uint<1>> rst_n;
sc_out<sc_uint<8>> sc_signal_0;
// component instances
// internal signals
sc_uint<32> const_private_signal = sc_uint<32>("0x0000007B");
sc_int<8> fallingEdgeRam[4];
sc_uint<1> r = sc_uint<1>("0b0");
sc_uint<2> r_0 = sc_uint<2>("0b00");
sc_uint<2> r_1 = sc_uint<2>("0b00");
sc_signal<sc_uint<1>> r_next;
sc_signal<sc_uint<2>> r_next_0;
sc_signal<sc_uint<2>> r_next_1;
sc_uint<8> rom[4] = {sc_uint<8>("0x00"),
sc_uint<8>("0x01"),
sc_uint<8>("0x02"),
sc_uint<8>("0x03"),
};
void assig_process_c() {
c.write(static_cast<sc_uint<32>>(a.read() + static_cast<sc_uint<32>>(b.read())));
}
void assig_process_cmp_0() {
cmp_0.write(a.read() < sc_uint<32>("0x00000004"));
}
void assig_process_cmp_1() {
cmp_1.write(a.read() > sc_uint<32>("0x00000004"));
}
void assig_process_cmp_2() {
cmp_2.write(b.read() <= sc_int<32>("0x00000004"));
}
void assig_process_cmp_3() {
cmp_3.write(b.read() >= sc_int<32>("0x00000004"));
}
void assig_process_cmp_4() {
cmp_4.write(b.read() != sc_int<32>("0x00000004"));
}
void assig_process_cmp_5() {
cmp_5.write(b.read() == sc_int<32>("0x00000004"));
}
void assig_process_contOut() {
contOut.write(static_cast<sc_uint<32>>(const_private_signal));
}
void assig_process_f() {
f.write(r);
}
void assig_process_fallingEdgeRam() {
sc_signal<sc_uint<32>> tmpConcat_0;
tmpConcat_0.write((sc_uint<24>("0x000000"), static_cast<sc_uint<8>>(static_cast<sc_uint<8>>(fallingEdgeRam[r_1])), ));
{
(fallingEdgeRam[r_1]).write(static_cast<sc_int<8>>(a.read().range(sc_int<32>("0x00000008"), sc_int<32>("0x00000000"))));
k = tmpConcat_0.read();
}
}
void assig_process_fitted() {
fitted.write(static_cast<sc_uint<16>>(a.read().range(sc_int<32>("0x00000010"), sc_int<32>("0x00000000"))));
}
void assig_process_g() {
sc_signal<sc_uint<2>> tmpConcat_1;
sc_signal<sc_uint<8>> tmpConcat_0;
tmpConcat_1.write((a.read()[sc_int<32>("0x00000001")] & b.read()[sc_int<32>("0x00000001")], a.read()[sc_int<32>("0x00000000")] ^ b.read()[sc_int<32>("0x00000000")] | a.read()[sc_int<32>("0x00000001")], ));
tmpConcat_0.write((tmpConcat_1.read(), static_cast<sc_uint<6>>(a.read().range(sc_int<32>("0x00000006"), sc_int<32>("0x00000000"))), ));
g.write(tmpConcat_0.read());
}
void assig_process_h() {
if (a.read()[sc_int<32>("0x00000002")] == sc_uint<1>("0b1"))
if (r == sc_uint<1>("0b1"))
h.write(sc_uint<8>("0x00"));
else if (a.read()[sc_int<32>("0x00000001")] == sc_uint<1>("0b1"))
h.write(sc_uint<8>("0x01"));
else
h.write(sc_uint<8>("0x02"));
}
void assig_process_j() {
j = static_cast<sc_uint<8>>(rom[r_1]);
}
void assig_process_out() {
out.write(sc_uint<1>("0b0"));
}
void assig_process_output() {
output.write(sc_uint<1>("0bX"));
}
void assig_process_r() {
if (rst_n.read() == sc_uint<1>("0b0")) {
r_1 = sc_uint<2>("0b00");
r_0 = sc_uint<2>("0b00");
r = sc_uint<1>("0b0");
} else {
r_1 = r_next_1.read();
r_0 = r_next_0.read();
r = r_next.read();
}
}
void assig_process_r_next() {
r_next_0.write(i.read());
}
void assig_process_r_next_0() {
r_next_1.write(r_0);
}
void assig_process_r_next_1() {
if (r == sc_uint<1>("0b0"))
r_next.write(e.read());
else
r_next.write(r);
}
void assig_process_sc_signal_0() {
switch(a.read()) {
case sc_uint<32>("0x00000001"): {
sc_signal_0.write(sc_uint<8>("0x00"));
break;
}
case sc_uint<32>("0x00000002"): {
sc_signal_0.write(sc_uint<8>("0x01"));
break;
}
case sc_uint<32>("0x00000003"): {
sc_signal_0.write(sc_uint<8>("0x03"));
break;
}
default:
sc_signal_0.write(sc_uint<8>("0x04"));
}
}
SC_CTOR(Showcase0) {
SC_METHOD(assig_process_c);
sensitive << a << b;
SC_METHOD(assig_process_cmp_0);
sensitive << a;
SC_METHOD(assig_process_cmp_1);
sensitive << a;
SC_METHOD(assig_process_cmp_2);
sensitive << b;
SC_METHOD(assig_process_cmp_3);
sensitive << b;
SC_METHOD(assig_process_cmp_4);
sensitive << b;
SC_METHOD(assig_process_cmp_5);
sensitive << b;
assig_process_contOut();
SC_METHOD(assig_process_f);
sensitive << r;
SC_METHOD(assig_process_fallingEdgeRam);
sensitive << clk.neg();
SC_METHOD(assig_process_fitted);
sensitive << a;
SC_METHOD(assig_process_g);
sensitive << a << b;
SC_METHOD(assig_process_h);
sensitive << a << r;
SC_METHOD(assig_process_j);
sensitive << clk.pos();
assig_process_out();
assig_process_output();
SC_METHOD(assig_process_r);
sensitive << clk.pos();
SC_METHOD(assig_process_r_next);
sensitive << i;
SC_METHOD(assig_process_r_next_0);
sensitive << r_0;
SC_METHOD(assig_process_r_next_1);
sensitive << e << r;
SC_METHOD(assig_process_sc_signal_0);
sensitive << a;
// connect ports
}
};
|
/********************************************************************************
* University of L'Aquila - HEPSYCODE Source Code License *
* *
* *
* (c) 2018-2019 Centre of Excellence DEWS All rights reserved *
********************************************************************************
* <one line to give the program's name and a brief idea of what it does.> *
* Copyright (C) 2022 Vittoriano Muttillo, Luigi Pomante * *
* *
* This program is free software: you can redistribute it and/or modify *
* it under the terms of the GNU General Public License as published by *
* the Free Software Foundation, either version 3 of the License, or *
* (at your option) any later version. *
* *
* This program is distributed in the hope that it will be useful, *
* but WITHOUT ANY WARRANTY; without even the implied warranty of *
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
* GNU General Public License for more details. *
* *
********************************************************************************
* *
* Created on: 09/May/2023 *
* Authors: Vittoriano Muttillo, Marco Santic, Luigi Pomante *
* *
* email: [email protected] *
* [email protected] *
* [email protected] *
* *
********************************************************************************
* This code has been developed from an HEPSYCODE model used as demonstrator by *
* University of L'Aquila. *
*******************************************************************************/
/*
* SystemManager.cpp
*
* Created on: 07 ott 2016
* Author: daniele
*/
#include <systemc.h>
#include <iostream>
#include <stdlib.h>
#include <stdio.h>
#include <vector>
#include <string.h>
#include "tl.h"
#include "pugixml.hpp"
#include "SystemManager.h"
using namespace std;
using namespace pugi;
////////////////////////////
// SBM INDEPENDENT
////////////////////////////
// Constructor
SystemManager::SystemManager()
{
VPS = generateProcessInstances();
VCH = generateChannelInstances();
VBB = generateBBInstances();
VPL = generatePhysicalLinkInstances();
mappingPS();
mappingCH();
}
// Fill process data structure VPS from xml file (application.xml)
vector<Process> SystemManager:: generateProcessInstances(){
vector<Process> vps2;
int exp_id = 0;
int processId;
pugi::xml_document doc;
pugi::xml_parse_result result = doc.load_file(APPLICATION);
xml_node instancesPS2 = doc.child("instancesPS");
for (pugi::xml_node xn_process = instancesPS2.first_child(); !xn_process.empty(); xn_process = xn_process.next_sibling()){
Process pi;
// Process Name
pi.setName(xn_process.child_value("name"));
// Process id
processId = atoi((char*) xn_process.child_value("id"));
pi.setId(processId);
// Process Priority
pi.setPriority(atoi((char*) xn_process.child_value("priority")));
// Process Criticality
pi.setCriticality(atoi((char*) xn_process.child_value("criticality")));
// Process eqGate (HW size)
xml_node eqGate = xn_process.child("eqGate");
pi.setEqGate((float)eqGate.attribute("value").as_int());
// Process dataType
pi.setDataType(atoi((char*) xn_process.child_value("dataType")));
// Process MemSize (SW Size)
xml_node memSize = xn_process.child("memSize");
xml_node codeSize = memSize.child("codeSize");
for (pugi::xml_node processorModel = codeSize.child("processorModel"); processorModel; processorModel = processorModel.next_sibling()) {
pi.setCodeSize( processorModel.attribute("name").as_string(), processorModel.attribute("value").as_int() );
}
xml_node dataSize = memSize.child("dataSize");
for (pugi::xml_node processorModel = dataSize.child("processorModel"); processorModel; processorModel = processorModel.next_sibling()) {
pi.setDataSize( processorModel.attribute("name").as_string(), processorModel.attribute("value").as_int() );
}
// Process Affinity
xml_node affinity = xn_process.child("affinity");
for (pugi::xml_node processorType = affinity.child("processorType"); processorType; processorType = processorType.next_sibling()) {
string processorType_name = processorType.attribute("name").as_string();
float affinity_value = processorType.attribute("value").as_float();
pi.setAffinity(processorType_name, affinity_value);
}
// Process Concurrency
xml_node concurrency = xn_process.child("concurrency");
for (pugi::xml_node xn_cprocessId = concurrency.child("processId"); xn_cprocessId; xn_cprocessId = xn_cprocessId.next_sibling()) {
unsigned int process_id_n = xn_cprocessId.attribute("id").as_int();
float process_concurrency_value = xn_cprocessId.attribute("value").as_float();
pi.setConcurrency(process_id_n, process_concurrency_value);
}
// Process Load
xml_node load = xn_process.child("load");
for (pugi::xml_node processorId = load.child("processorId"); processorId; processorId = processorId.next_sibling()) {
unsigned int processor_id_n = processorId.attribute("id").as_int();
float process_load_value = processorId.attribute("value").as_float();
pi.setLoad(processor_id_n, process_load_value);
}
// Process time (init)
pi.processTime = sc_time(0, SC_MS);
// Process energy (init)
pi.setEnergy(0);
// Process Communication
// TO DO
if(processId == exp_id){
vps2.push_back(pi);
exp_id++;
} else {
cout << "XML for application is corrupted\n";
exit(11);
}
}
if(exp_id != NPS){
cout << "XML for application is corrupted (NPS)\n";
exit(11);
}
doc.reset();
return vps2;
}
// Fill channel data structure VCH from xml file
vector<Channel> SystemManager:: generateChannelInstances()
{
vector<Channel> vch;
// parsing xml file
xml_document myDoc;
xml_parse_result myResult = myDoc.load_file(APPLICATION);
xml_node instancesLL = myDoc.child("instancesLL");
//channel parameters
xml_node_iterator seqChannel_it;
for (seqChannel_it=instancesLL.begin(); seqChannel_it!=instancesLL.end(); ++seqChannel_it){
xml_node_iterator channel_node_it = seqChannel_it->begin();
Channel ch;
char* temp;
// CH-NAME
string name = channel_node_it->child_value();
ch.setName(name);
// CH-ID
channel_node_it++;
temp = (char*) channel_node_it->child_value();
int id = atoi(temp);
ch.setId(id);
// writer ID
channel_node_it++;
temp = (char*) channel_node_it->child_value();
int w_id = atoi(temp);
ch.setW_id(w_id);
// reader ID
channel_node_it++;
temp = (char*) channel_node_it->child_value();
int r_id = atoi(temp);
ch.setR_id(r_id);
// CH-width (logical width)
channel_node_it++;
temp = (char*) channel_node_it->child_value();
int width = atoi(temp);
ch.setWidth(width);
ch.setNum(0);
vch.push_back(ch);
}
return vch;
}
/*
* for a given processID, increments the profiling variable
* (the number of "loops" executed by the process)
*/
void SystemManager::PS_Profiling(int processId)
{
VPS[processId].profiling++;
}
// Check if a process is allocated on a SPP
bool SystemManager::checkSPP(int processId)
{
return VBB[allocationPS_BB[processId]].getProcessors()[0].getProcessorType() == "SPP";
}
// Return a subset of allocationPS by considering only processes mapped to BB with ID equal to bb_unit_id
vector<int> SystemManager::getAllocationPS_BB(int bb_id)
{
vector<int> pu_alloc;
for (unsigned int j = 2; j < allocationPS_BB.size(); j++) // 0 and 1 are the testbench
{
if (allocationPS_BB[j] == bb_id) pu_alloc.push_back(j);
}
return pu_alloc;
}
///// UPDATE XML Concurrency and Communication
void SystemManager::deleteConcXmlConCom()
{
pugi::xml_document myDoc;
pugi::xml_parse_result myResult = myDoc.load_file("./XML/application.xml");
cout << "XML Delete result: " << myResult.description() << endl;
//method 2: use object/node structure
pugi::xml_node instancesPS = myDoc.child("instancesPS");
xml_node processes = instancesPS.child("process");
for (int i = 0; i < NPS; i++){
xml_node concom = processes.child("concurrency");
for (pugi::xml_node processorId = concom.child("processId"); processorId; processorId = processorId.next_sibling()) {
concom.remove_child(processorId);
}
xml_node concom2 = processes.child("comunication");
for (pugi::xml_node processorId = concom2.child("rec"); processorId; processorId = processorId.next_sibling()) {
concom2.remove_child(processorId);
}
processes = processes.next_sibling();
}
xml_node instancesCH = myDoc.child("instancesLL");
xml_node processesCH = instancesCH.child("logical_link");
for (int i = 0; i < NCH; i++){
xml_node concom3 = processesCH.child("concurrency");
for (pugi::xml_node processorId = concom3.child("channelId"); processorId; processorId = processorId.next_sibling()) {
concom3.remove_child(processorId);
}
processesCH = processesCH.next_sibling();
}
myDoc.save_file("./XML/application.xml");
cout << endl;
}
void SystemManager::updateXmlConCom(float matrixCONC_PS_N[NPS][NPS], unsigned int matrixCOM[NPS][NPS], float matrixCONC_CH_N[NCH][NCH])
{
pugi::xml_document myDoc;
pugi::xml_parse_result myResult = myDoc.load_file("./XML/application.xml");
cout << "XML result: " << myResult.description() << endl;
//method 2: use object/node structure
pugi::xml_node instancesPS = myDoc.child("instancesPS");
for (xml_node_iterator seqProcess_it = instancesPS.begin(); seqProcess_it != instancesPS.end(); ++seqProcess_it){
int Id = atoi(seqProcess_it->child_value("id"));
if (seqProcess_it->child("concurrency")){
pugi::xml_node concurrency = seqProcess_it->child("concurrency");
for (int i = 0; i<NPS; i++){
if (i != Id){
pugi::xml_node conc_it = concurrency.append_child("processId");
conc_it.append_attribute("id").set_value(i);
conc_it.append_attribute("value").set_value(matrixCONC_PS_N[Id][i]);
}
}
}
else{
pugi::xml_node concurrency = seqProcess_it->append_child("concurrency");
for (int i = 0; i<NPS; i++){
if (i != Id){
pugi::xml_node conc_it = concurrency.append_child("processId");
conc_it.append_attribute("id").set_value(i);
conc_it.append_attribute("value").set_value(matrixCONC_PS_N[Id][i]);
}
}
}
}
//method 2: use object/node structure
pugi::xml_node instancesCOM = myDoc.child("instancesPS");
for (pugi::xml_node_iterator seqProcess_it = instancesCOM.begin(); seqProcess_it != instancesCOM.end(); ++seqProcess_it){
int Id = atoi(seqProcess_it->child_value("id"));
if (seqProcess_it->child("comunication")){
pugi::xml_node comunication = seqProcess_it->child("comunication");
for (int i = 0; i<NPS; i++){
if (i != Id){
pugi::xml_node com_it = comunication.append_child("rec");
com_it.append_attribute("idRec").set_value(i);
com_it.append_attribute("value").set_value(matrixCOM[Id][i]);
}
}
}
else{
pugi::xml_node comunication = seqProcess_it->append_child("comunication");
for (int i = 0; i<NPS; i++){
if (i != Id){
pugi::xml_node com_it = comunication.append_child("rec");
com_it.append_attribute("idRec").set_value(i);
com_it.append_attribute("value").set_value(matrixCOM[Id][i]);
}
}
}
}
pugi::xml_node instancesLL = myDoc.child("instancesLL");
for (xml_node_iterator seqLink_it = instancesLL.begin(); seqLink_it != instancesLL.end(); ++seqLink_it){
int Id = atoi(seqLink_it->child_value("id"));
if (seqLink_it->child("concurrency")){
pugi::xml_node concurrencyL = seqLink_it->child("concurrency");
for (int i = 0; i<NCH; i++){
if (i != Id){
pugi::xml_node concL_it = concurrencyL.append_child("channelId");
concL_it.append_attribute("id").set_value(i);
concL_it.append_attribute("value").set_value(matrixCONC_CH_N[Id][i]);
}
}
}
else{
pugi::xml_node concurrencyL = seqLink_it->append_child("concurrency");
for (int i = 0; i<NCH; i++){
if (i != Id){
pugi::xml_node concL_it = concurrencyL.append_child("channelId");
concL_it.append_attribute("id").set_value(i);
concL_it.append_attribute("value").set_value(matrixCONC_CH_N[Id][i]);
}
}
}
}
cout << "Saving result: " << myDoc.save_file("./XML/application.xml") << endl;
myDoc.reset();
cout << endl;
}
#if defined(_TIMING_ENERGY_)
// Fill VBB data structure from xml file (instancesTL.xml)
vector<BasicBlock> SystemManager::generateBBInstances(){
/*****************************
* LOAD BASIC BLOCKS
*****************************/
char* temp;
vector<BasicBlock> vbb;
// parsing xml file
xml_document myDoc;
xml_parse_result myResult = myDoc.load_file("./XML/instancesTL.xml");
xml_node instancesBB = myDoc.child("instancesBB");
for (xml_node_iterator seqBB_it=instancesBB.begin(); seqBB_it!=instancesBB.end(); ++seqBB_it){
xml_node_iterator BB_it = seqBB_it->begin();
BasicBlock bb;
//BB-ID
int id = atoi(BB_it->child_value());
bb.setId(id);
//BB-NAME
BB_it++;
string BBname = BB_it->child_value();
bb.setName(BBname);
//BB-TYPE
BB_it++;
string type = BB_it->child_value();
bb.setType(type);
// PROCESSING UNIT
BB_it++;
vector<ProcessingUnit> vpu;
for(xml_node child = seqBB_it->child("processingUnit");child;child= child.next_sibling("processingUnit")){
xml_node_iterator pu_it = child.begin();
ProcessingUnit pu;
//PU-NAME
string puName = pu_it->child_value();
pu.setName(puName);
//PU-ID
pu_it++;
int idPU = atoi(pu_it->child_value());
pu.setId(idPU);
//Processor Type
pu_it++;
string puType = pu_it->child_value();
pu.setProcessorType(puType);
// PU-cost
pu_it++;
float idCost = (float) atof(pu_it->child_value());
pu.setCost(idCost);
//PU-ISA
pu_it++;
string puISA = pu_it->child_value();
pu.setISA(puISA);
// PU-Frequency (MHz)
pu_it++;
float idFreq = (float) atof(pu_it->child_value());
pu.setFrequency(idFreq);
// PU-CC4CS
float** array = new float*[5];
//Int8
pu_it++;
float idCC4CSminint8 = (float) atof(pu_it->child_value());
pu_it++;
float idCC4CSmaxint8 = (float) atof(pu_it->child_value());
//Int16
pu_it++;
float idCC4CSminint16 = (float) atof(pu_it->child_value());
pu_it++;
float idCC4CSmaxint16 = (float) atof(pu_it->child_value());
//Int32
pu_it++;
float idCC4CSminint32 = (float) atof(pu_it->child_value());
pu_it++;
float idCC4CSmaxint32 = (float) atof(pu_it->child_value());
//Float
pu_it++;
float idCC4CSminfloat = (float) atof(pu_it->child_value());
pu_it++;
float idCC4CSmaxfloat = (float) atof(pu_it->child_value());
//Tot
pu_it++;
float idCC4CSmin = (float) atof(pu_it->child_value());
pu_it++;
float idCC4CSmax = (float) atof(pu_it->child_value());
array[0] = new float[2];
array[0][0] = idCC4CSminint8;
array[0][1] = idCC4CSmaxint8;
array[1] = new float[2];
array[1][0] = idCC4CSminint16;
array[1][1] = idCC4CSmaxint16;
array[2] = new float[2];
array[2][0] = idCC4CSminint32;
array[2][1] = idCC4CSmaxint32;
array[3] = new float[2];
array[3][0] = idCC4CSminfloat;
array[3][1] = idCC4CSmaxfloat;
array[4] = new float[2];
array[4][0] = idCC4CSmin;
array[4][1] = idCC4CSmax;
pu.setCC4S(array);
// PU-Power (W)
pu_it++;
float idPow = (float) atof(pu_it->child_value());
pu.setPower(idPow);
// PU-MIPS
pu_it++;
float idMIPS = (float) atof(pu_it->child_value());
pu.setMIPS(idMIPS);
// PU-I4CS
pu_it++;
float idI4CSmin = (float) atof(pu_it->child_value());
pu.setI4CSmin(idI4CSmin);
pu_it++;
float idI4CSmax = (float) atof(pu_it->child_value());
pu.setI4CSmax(idI4CSmax);
// PU-Vdd (V)
pu_it++;
float idVdd = (float)atof(pu_it->child_value());
pu.setVdd(idVdd);
// PU-Idd (A)
pu_it++;
float idIdd = (float)atof(pu_it->child_value());
pu.setIdd(idIdd);
// PU-overheadCS (us)
pu_it++;
float idOver = (float)atof(pu_it->child_value());
pu.setOverheadCS(sc_time((int)idOver, SC_US));
vpu.push_back(pu);
}
// LOACL MEMORY
bb.setProcessor(vpu);
BB_it++;
xml_node instancesLM = seqBB_it->child("localMemory");
xml_node_iterator lm_it = instancesLM.begin();
//CODE SIZE
int lmCodeSize = (int)atof(lm_it->child_value());
bb.setCodeSize(lmCodeSize);
//DATA SIZE
lm_it++;
int lmDataSize = (int)atof(lm_it->child_value());
bb.setDataSize(lmDataSize);
//eQG
lm_it++;
temp = (char*)lm_it->child_value();
int lmEqG = (int)atof(temp);
bb.setEqG(lmEqG);
// Comunication
BB_it++;
xml_node instancesCU = seqBB_it->child("communicationUnit");
xml_node_iterator cu_it = instancesCU.begin();
// TO DO
// Free Running time
BB_it++;
xml_node instancesFRT = seqBB_it->child("loadEstimation");
xml_node_iterator frt_it = instancesFRT.begin();
float lmFreeRunningTime = frt_it->attribute("value").as_float();
bb.setFRT(lmFreeRunningTime);
vbb.push_back(bb);
}
return vbb;
}
#else
/*
This method generates a dummy instance of a basic block.
Each BB contains more than one processing unit inside.
*/
vector<BasicBlock> SystemManager::generateBBInstances(){
vector<BasicBlock> vbb;
for (int i = 0; i < NBB; i++){
BasicBlock bb;
//BB-ID
bb.setId(i);
//BB-NAME
bb.setName("dummy");
//BB-TYPE
bb.setType("dummy");
// PROCESSING UNIT
vector<ProcessingUnit> vpu;
for (int j = 0; j < 4; j++){ // each block contains at most 4 pu
ProcessingUnit pu;
//PU-NAME
pu.setName("dummy");
//PU-ID
int idPU = j;
pu.setId(idPU);
//Processor Type
pu.setProcessorType("dummy");
//// PU-cost
//pu.setCost(0);
//PU-ISA
pu.setISA("dummy");
// PU-Frequency (MHz)
pu.setFrequency(0);
// PU-CC4CS
float** array = new float*[5]; //TODO: eliminare **?
//Int8
float idCC4CSminint8 = 0;
float idCC4CSmaxint8 = 0;
//Int16
float idCC4CSminint16 = 0;
float idCC4CSmaxint16 = 0;
//Int32
float idCC4CSminint32 = 0;
float idCC4CSmaxint32 = 0;
//Float
float idCC4CSminfloat = 0;
float idCC4CSmaxfloat = 0;
//Tot
float idCC4CSmin = 0;
float idCC4CSmax = 0;
//TODO: ciclo con tutti 0!
array[0] = new float[2];
array[0][0] = idCC4CSminint8;
array[0][1] = idCC4CSmaxint8;
array[1] = new float[2];
array[1][0] = idCC4CSminint16;
array[1][1] = idCC4CSmaxint16;
array[2] = new float[2];
array[2][0] = idCC4CSminint32;
array[2][1] = idCC4CSmaxint32;
array[3] = new float[2];
array[3][0] = idCC4CSminfloat;
array[3][1] = idCC4CSmaxfloat;
array[4] = new float[2];
array[4][0] = idCC4CSmin;
array[4][1] = idCC4CSmax;
pu.setCC4S(array);
// PU-Power (W)
pu.setPower(0);
// PU-MIPS
float idMIPS = 0;
pu.setMIPS(idMIPS);
// PU-I4CS
fl |
oat idI4CSmin = 0;
pu.setI4CSmin(idI4CSmin);
float idI4CSmax = 0;
pu.setI4CSmax(idI4CSmax);
// PU-Vdd (V)
float idVdd = 0;
pu.setVdd(idVdd);
// PU-Idd (A)
float idIdd = 0;
pu.setIdd(idIdd);
// PU-overheadCS (us)
float idOver = 0;
pu.setOverheadCS(sc_time((int)idOver, SC_US));
vpu.push_back(pu);
}
bb.setProcessor(vpu);
// LOCAL MEMORY
//CODE SIZE
bb.setCodeSize(0);
//DATA SIZE
bb.setDataSize(0);
//eQG
bb.setEqG(0);
// Free Running time
float lmFreeRunningTime = 0;
bb.setFRT(lmFreeRunningTime);
vbb.push_back(bb);
}
return vbb;
}
#endif
#if defined(_TIMING_ENERGY_)
// Fill link data structure VPL from xml file (instancesTL.xml)
vector<PhysicalLink> SystemManager:: generatePhysicalLinkInstances()
{
vector<PhysicalLink> VPL;
PhysicalLink l;
// parsing xml file
xml_document myDoc;
xml_parse_result myResult = myDoc.load_file("./XML/instancesTL.xml");
xml_node instancesPL = myDoc.child("instancesPL");
//link parameters
xml_node_iterator seqLink_it;
for (seqLink_it=instancesPL.begin(); seqLink_it!=instancesPL.end(); ++seqLink_it){
xml_node_iterator link_node_it = seqLink_it->begin();
char* temp;
// Link NAME
string name = link_node_it->child_value();
l.setName(name);
// Link ID
link_node_it++;
temp = (char*) link_node_it->child_value();
unsigned int id = atoi(temp);
l.setId(id);
// Link PHYSICAL WIDTH
link_node_it++;
temp = (char*) link_node_it->child_value();
unsigned int physical_width = atoi(temp);
l.setPhysicalWidth(physical_width);
// Link TCOMM
link_node_it++;
temp = (char*) link_node_it->child_value();
float tc = (float) atof(temp);
sc_time tcomm(tc, SC_MS);
l.setTcomm(tcomm);
// Link TACOMM
link_node_it++;
temp = (char*) link_node_it->child_value();
float tac = (float) atof(temp);
sc_time tacomm(tac, SC_MS);
l.setTAcomm(tacomm);
// Link BANDWIDTH
link_node_it++;
temp = (char*) link_node_it->child_value();
unsigned int bandwidth = atoi(temp);
l.setBandwidth(bandwidth);
// Link a2 (coefficient needed to compute energy of the communication)
link_node_it++;
temp = (char*) link_node_it->child_value();
float a2 = (float) atof(temp);
l.seta2(a2);
// Link a1 (coefficient needed to compute energy of the communication)
link_node_it++;
temp = (char*) link_node_it->child_value();
float a1 = (float) atof(temp);
l.seta1(a1);
VPL.push_back(l);
}
return VPL;
}
#else
vector<PhysicalLink> SystemManager::generatePhysicalLinkInstances()
{
vector<PhysicalLink> VPL;
for (int i = 0; i < NPL; i++){
PhysicalLink pl;
pl.setId(i);
pl.setName("dummy");
pl.physical_width=1; // width of the physical link
pl.tcomm=sc_time(0, SC_MS); // LP: (bandwidth / phisycal_widht = 1/sec=hz (inverto)) ( per 1000) (non sforare i 5 ms)
pl.tacomm=sc_time(0, SC_MS); // LP: tcomm * K (es:K=1)
pl.bandwidth=0; // bandwidth in bit/s
pl.a2=0; // a2 coefficient of energy curve
pl.a1=0; // a1 coefficient of energy curve
VPL.push_back(pl);
}
return VPL;
}
#endif
#if defined(_TIMING_ENERGY_)
// Fill allocationPS data structure from xml file
void SystemManager:: mappingPS()
{
int exp_id = 0;
// parsing xml file
xml_document myDoc;
xml_parse_result myResult = myDoc.load_file(MAPPING_PS_BB);
xml_node mapping = myDoc.child("mapping");
//mapping parameters (process to processor)
xml_node_iterator mapping_it;
for (mapping_it=mapping.begin(); mapping_it!=mapping.end(); ++mapping_it){
xml_node_iterator child_mapping_it = mapping_it->begin();
int processId = child_mapping_it->attribute("PSid").as_int();
//string processorName = child_mapping_it->attribute("PRname").as_string();
string bbName = child_mapping_it->attribute("BBname").as_string();
int bbId = child_mapping_it->attribute("value").as_int();
int processingunitID = child_mapping_it->attribute("PUid").as_int(); //added **************
int partitionID = child_mapping_it->attribute("PTid").as_int(); //added **************
if(processId == exp_id){
allocationPS_BB.push_back(bbId);
exp_id++;
} else {
cout << "XML for allocation is corrupted\n";
exit(11);
}
}
}
#else
void SystemManager::mappingPS(){
for (int j = 0; j<NPS; j++){
int bbId = 0;
allocationPS_BB.push_back(bbId);
}
}
#endif
#if defined(_TIMING_ENERGY_)
// Fill allocationCH_PL data structure from xml file
void SystemManager::mappingCH()
{
int exp_id = 0;
// parsing xml file
xml_document myDoc;
xml_parse_result myResult = myDoc.load_file(MAPPING_LC_PL);
xml_node mapping = myDoc.child("mapping");
//mapping parameters (channel to link)
xml_node_iterator mapping_it;
for (mapping_it=mapping.begin(); mapping_it!=mapping.end(); ++mapping_it){
xml_node_iterator child_mapping_it = mapping_it->begin();
int channelId = child_mapping_it->attribute("CHid").as_int();
string linkName = child_mapping_it->attribute("Lname").as_string();
int linkId = child_mapping_it->attribute("value").as_int();
if(channelId == exp_id){
allocationCH_PL.push_back(linkId);
exp_id++;
} else {
cout << "XML for allocation is corrupted\n";
exit(11);
}
}
}
#else
void SystemManager::mappingCH(){
for (int j = 0; j < NCH; j++){
int linkId = 0;
allocationCH_PL.push_back(linkId);
}
}
#endif
///// OTHER METHODS ////////
// Evaluate the simulated time for the execution of a statement
/*
* for a given processID, returns the simulated time
* (the time needed by processor, for the allocated process, to
* to execute a statement)
*/
sc_time SystemManager:: updateSimulatedTime(int processId)
{
// Id representing process dominant datatype
int dataType = VPS[processId].getDataType();
//*********************VPU WAS CHANGED IN VBB**********************
float CC4Smin = VBB[allocationPS_BB[processId]].getProcessors()[0].getCC4S()[dataType][0]; // Average/min number of clock cycles needed by the PU to execute a C statement
float CC4Smax = VBB[allocationPS_BB[processId]].getProcessors()[0].getCC4S()[dataType][1]; // Average/max number of clock cycles needed by the PU to execute a C statement
// Affinity-based interpolation and round up of CC4CSaff
unsigned int CC4Saff = (unsigned int) ceil(CC4Smin + ((CC4Smax-CC4Smin)*(1-VPS[processId].getAffinityByName(VBB[allocationPS_BB[processId]].getProcessors()[0].getProcessorType()))));
float frequency = VBB[allocationPS_BB[processId]].getProcessors()[0].getFrequency(); // Frequency of the processor (MHz)
sc_time value((CC4Saff/(frequency*1000)), SC_MS); // Average time (ms) needed to execute a C statement
return value;
}
// The computation depends on the value setted for energyComputation (EPI or EPC)
float SystemManager:: updateEstimatedEnergy(int processId)
{
float J4CS;
float P;
if(energyComputation == "EPC") {
// EPC --> J4CS = CC4CSaff * EPC = CC4CSaff * (P/f)
// Id representing process dominant datatype
int dataType = VPS[processId].getDataType();
//I HAVE TO ADD A LOOP IN ORDER TO TAKE THE PARAMETERS OF EACH PROCESSOR (?) **********************
float CC4Smin = VBB[allocationPS_BB[processId]].getProcessors()[0].getCC4S()[dataType][0]; // Average/min number of clock cycles needed by the PU to execute a C statement
//float CC4Smin = VBB[allocationPS_BB[processId]].getCC4S()[dataType][0]; // Average/min number of clock cycles needed by the PU to execute a C statement
//float CC4Smax = VBB[allocationPS_BB[processId]].getCC4S()[dataType][1];
float CC4Smax = VBB[allocationPS_BB[processId]].getProcessors()[0].getCC4S()[dataType][1];// Average/max number of clock cycles needed by the PU to execute a C statement
// Affinity-based interpolation
float CC4Saff = CC4Smin + ((CC4Smax-CC4Smin)*(1-VPS[processId].getAffinityByName(VBB[allocationPS_BB[processId]].getProcessors()[0].getProcessorType())));
if(this->checkSPP(processId)) {
// if the process is on a SPP (HW) --> P = Vdd * Idd (V*A = W)
P = VBB[allocationPS_BB[processId]].getProcessors()[0].getVdd() * VBB[allocationPS_BB[processId]].getProcessors()[0].getIdd();
} else {
// if the process is on a GPP/DSP (SW) --> P (W)
P = VBB[allocationPS_BB[processId]].getProcessors()[0].getPower();
}
// EPC = P/f (W/MHz = uJ)
float EPC = P / VBB[allocationPS_BB[processId]].getProcessors()[0].getFrequency();
J4CS = CC4Saff * EPC; // uJ
} else {
// EPI
if(this->checkSPP(processId)) {
// if the process is on a SPP (HW) --> J4CS = CC4CSaff * P * (1/f)
// Id representing process dominant datatype
int dataType = VPS[processId].getDataType();
float CC4Smin = VBB[allocationPS_BB[processId]].getProcessors()[0].getCC4S()[dataType][0]; // Average/min number of clock cycles needed by the PU to execute a C statement
float CC4Smax = VBB[allocationPS_BB[processId]].getProcessors()[0].getCC4S()[dataType][1]; // Average/max number of clock cycles needed by the PU to execute a C statement
// Affinity-based interpolation
float CC4Saff = CC4Smin + ((CC4Smax-CC4Smin)*(1-VPS[processId].getAffinityByName(VBB[allocationPS_BB[processId]].getProcessors()[0].getProcessorType())));
// P = Vdd * Idd (V*A = W)
P = VBB[allocationPS_BB[processId]].getProcessors()[0].getVdd() * VBB[allocationPS_BB[processId]].getProcessors()[0].getIdd();
J4CS = CC4Saff * (P / VBB[allocationPS_BB[processId]].getProcessors()[0].getFrequency()); // uJ
} else {
// if the process is on a GPP/DSP (SW) --> J4CS = I4CSaff * EPI = I4CSaff * (P/MIPS)
float I4CSmin = VBB[allocationPS_BB[processId]].getProcessors()[0].getI4CSmin(); // Average/min number of assembly instructions to execute a C statement
float I4CSmax = VBB[allocationPS_BB[processId]].getProcessors()[0].getI4CSmax(); // Average/max number of assembly instructions to execute a C statement
// Affinity-based interpolation
float I4CSaff = I4CSmin + ((I4CSmax-I4CSmin)*(1-VPS[processId].getAffinityByName(VBB[allocationPS_BB[processId]].getProcessors()[0].getProcessorType())));
P = VBB[allocationPS_BB[processId]].getProcessors()[0].getPower(); // Watt
// EPI = P/MIPS (uJ/instr)
float EPI = P / VBB[allocationPS_BB[processId]].getProcessors()[0].getMIPS();
J4CS = I4CSaff * EPI; // uJ
}
}
return J4CS;
}
// Increase processTime for each statement
void SystemManager:: increaseSimulatedTime(int processId)
{
VPS[processId].processTime += updateSimulatedTime(processId); // Cumulated sum of the statement execution time
}
// Increase energy for each statement
void SystemManager:: increaseEstimatedEnergy(int processId)
{
VPS[processId].energy += updateEstimatedEnergy(processId); // Cumulated sum of the statement execution energy
}
// Increase processTime for the wait of the timers
void SystemManager::increaseTimer(int processId, sc_time delta)
{
VPS[processId].processTime += delta; // Cumulated sum of the statement execution time
}
// Energy XML Updates
void SystemManager::deleteConcXmlEnergy(){
char* temp;
int Id;
pugi::xml_document myDoc;
pugi::xml_parse_result myResult = myDoc.load_file("./XML/application.xml");
cout << "XML Delete result: " << myResult.description() << endl;
//method 2: use object/node structure
pugi::xml_node instancesPS = myDoc.child("instancesPS");
xml_node processes = instancesPS.child("process");
for(int i = 0; i < NPS; i++){
temp = (char*) processes.child_value("id");
Id = atoi(temp); //id process
xml_node energy = processes.child("energy");
for (pugi::xml_node processorId = energy.child("processorId"); processorId; processorId = processorId.next_sibling()) {
unsigned int processor_id_n = processorId.attribute("id").as_int();//
float process_load_value = processorId.attribute("value").as_float();//
if(allocationPS_BB[Id] == processor_id_n){
energy.remove_child(processorId);
}
}
processes = processes.next_sibling();
}
myDoc.save_file("./XML/application.xml");
cout<<endl;
/////////////////////////////////////
pugi::xml_document myDoc2;
pugi::xml_parse_result myResult2 = myDoc2.load_file("./XML/instancesTL.xml");
cout << "XML result: " << myResult2.description() << endl;
pugi::xml_node instancesBB = myDoc2.child("instancesBB");
xml_node basicBlock = instancesBB.child("basicBlock");
for(int i = 0; i < NBB; i++){
temp = (char*) basicBlock.child_value("id");
Id = atoi(temp); //id process
xml_node energyEst = basicBlock.child("energyEstimation");
for (pugi::xml_node energyTOT = energyEst.child("energyTOT"); energyTOT; energyTOT = energyTOT.next_sibling()) {
unsigned int processor_id_n = energyTOT.attribute("id").as_int();//
float energy_value = energyTOT.attribute("value").as_float();//
if(Id == allocationPS_BB[2]){
energyEst.remove_child(energyTOT);
}
}
basicBlock = basicBlock.next_sibling();
}
cout << "Saving result: " << myDoc2.save_file("./XML/instancesTL.xml") << endl;
cout<<endl;
}
void SystemManager:: updateXmlEnergy()
{
pugi::xml_document myDoc;
pugi::xml_parse_result myResult = myDoc.load_file("./XML/application.xml");
cout << "XML result: " << myResult.description() << endl;
//method 2: use object/node structure
pugi::xml_node instancesPS = myDoc.child("instancesPS");
/////////////////////// ENERGY //////////////////////////////
pugi::xml_node instancesPS2 = myDoc.child("instancesPS");
float sumEnergyTot=0;
for (xml_node_iterator seqProcess_it2=instancesPS2.begin(); seqProcess_it2!=instancesPS2.end(); ++seqProcess_it2){
int Id = atoi(seqProcess_it2->child_value("id"));
if(seqProcess_it2->child("energy")){
pugi::xml_node energy = seqProcess_it2->child("energy");
pugi::xml_node energy_it = energy.append_child("processorId");
energy_it.append_attribute("id").set_value(allocationPS_BB[Id]);
energy_it.append_attribute("value").set_value(VPS[Id].getEnergy());
}else{
pugi::xml_node energy = seqProcess_it2->append_child("energy");
pugi::xml_node energy_it = energy.append_child("processorId");
energy_it.append_attribute("id").set_value(allocationPS_BB[Id]);
energy_it.append_attribute("value").set_value(VPS[Id].getEnergy());
}
sumEnergyTot+=VPS[Id].getEnergy();
}
cout << "Saving result: " << myDoc.save_file("./XML/application.xml") << endl;
myDoc.reset();
cout<<endl;
pugi::xml_document myDoc2;
pugi::xml_parse_result myResult2 = myDoc2.load_file("./XML/instancesTL.xml");
cout << "XML result: " << myResult2.description() << endl;
xml_node instancesBB = myDoc2.child("instancesBB");
for (xml_node_iterator seqBB_it=instancesBB.begin(); seqBB_it!=instancesBB.end(); ++seqBB_it){
int Id = atoi(seqBB_it->child_value("id"));
///////////////////// ENERGY ////////////////////////
if(Id == allocationPS_BB[2]){
if(seqBB_it->child("energyEstimation")){
pugi::xml_node energyEstimation = seqBB_it->child("energyEstimation");
xml_node entot_node = energyEstimation.append_child("energyTOT");
entot_node.append_attribute("id").set_value(allocationPS_BB[2]);
entot_node.append_attribute("value").set_value(sumEnergyTot);
}else{
pugi::xml_node energyEstimation = seqBB_it->append_child("energyEstimation");
xml_node entot_node = energyEstimation.append_child("energyTOT");
entot_node.append_attribute("id").set_value(allocationPS_BB[2]);
entot_node.append_attribute("value").set_value(sumEnergyTot);
}
}
}
cout << "Saving result: " << myDoc2.save_file("./XML/instancesTL.xml") << endl;
myDoc2.reset();
cout<<endl;
}
// Load Metrics
sc_time SystemManager::getFRT(){
return this->FRT;
}
void SystemManager::setFRT(sc_time x){
FRT = x;
}
float* SystemManager:: loadEst(sc_time FRT_n){
for(unsigned i =2; i<VPS.size(); i++){
FRL[i] = (float) ((VPS[i].processTime/VPS[i].profiling)/(FRT_n/VPS[i].profiling)); //
}
return FRL;
}
float* SystemManager:: getFRL(){
return this->FRL;
}
// Load XML Updates
void SystemManager::deleteConcXmlLoad(){
char* temp;
int Id;
pugi::xml_document myDoc;
pugi::xml_parse_result myResult = myDoc.load_file("./XML/application.xml");
cout << "XML Delete result: " << myResult.description() << endl;
//method 2: use object/node structure
pugi::xml_node instancesPS = myDoc.child("instancesPS");
xml_node processes = instancesPS.child("process");
for(int i = 0; i < NPS; i++){
temp = (char*) processes.child_value("id");
Id = atoi(temp); //id process
xml_node load = processes.child("load");
for (pugi::xml_node processorId = load.child("processorId"); processorId; processorId = processorId.next_sibling()) {
unsigned int processor_id_n = processorId.attribute("id").as_int();//
float process_load_value = processorId.attribute("value").as_float();//
if(allocationPS_BB[Id] == processor_id_n){
load.remove_child(processorId);
}
}
/* xml_node WCET = processes.child("WCET");
for (pugi::xml_node processorId = WCET.child("processorId"); processorId; processorId = processorId.next_sibling()) {
WCET.remove_child(processorId);
}
xml_node Period = processes.child("Period");
for (pugi::xml_node processorId = Period.child("processorId"); processorId; processorId = processorId.next_sibling()) {
Period.remove_child(processorId);
}
xml_node Deadline = processes.child("Deadline");
for (pugi::xml_node processorId = Deadline.child("processorId"); processorId; processorId = processorId.next_sibling()) {
Deadline.remove_child(processorId);
} */
processes = processes.next_sibling();
}
myDoc.save_file("./XML/application.xml");
cout<<endl;
pugi::xml_document myDoc2;
pugi::xml_parse_result myResult2 = myDoc2.load_file("./XML/instancesTL.xml");
cout << "XML result: " << myResult2.description() << endl;
pugi::xml_node instancesBB = myDoc2.child("instancesBB");
xml_node basicBlock = instancesBB.child("basicBlock");
for(int i = 0; i < NBB; i++){
temp = (char*) basicBlock.child_value("id");
Id = atoi(temp); //id process
xml_node loadEst = basicBlock.child("loadEstimation");
for (pugi::xml_node loadTOT = loadEst.child("FreeRunningTime"); loadTOT; loadTOT = loadTOT.next_sibling()) {
unsigned int processor_id_n = loadTOT.attribute("id").as_int();//
float energy_value = loadTOT.attribute("value").as_float();//
if(Id == allocationPS_BB[2]){
loadEst.remove_child(loadTOT);
}
}
basicBlock = basicBlock.next_sibling();
}
cout << "Saving result: " << myDoc2.save_file("./XML/instancesTL.xml") << endl;
myDoc2.reset();
cout<<endl;
}
void SystemManager:: updateXmlLoad()
{
pugi::xml_document myDoc;
pugi::xml_parse_result myResult = myDoc.load_file("./XML/application.xml");
cout << "XML result: " << myResult.description() << endl;
//method 2: use object/node structure
pugi::xml_node instancesPS = myDoc.child("instancesPS");
for (xml_node_iterator seqProcess_it=instancesPS.begin(); seqProcess_it!=instancesPS.end(); ++seqProcess_it){
int Id = atoi(seqProcess_it->child_value("id"));
///////////////////// LOAD ////////////////////////////
if(seqProcess_it->child("load")){
pugi::xml_node load = seqProcess_it->child("load");
pugi::xml_node load_it = load.append_child("processorId");
load_it.append_attribute("id").set_value(allocationPS_BB[Id]);
load_it.append_attribute("value").set_value(FRL[Id]);
}else{
pugi::xml_node load = seqProcess_it->append_child("load");
pugi::xml_node load_it = load.append_child("processorId");
load_it.append_attribute("id").set_value(allocationPS_BB[Id]);
load_it.append_attribute("value").set_value(FRL[Id]);
}
}
/////////////////////// WCET //////////////////////////////
////method 2: use |
object/node structure
//pugi::xml_node instancesPS2 = myDoc.child("instancesPS");
//for (pugi::xml_node_iterator seqProcess_it=instancesPS2.begin(); seqProcess_it!=instancesPS2.end(); ++seqProcess_it){
// int Id = atoi(seqProcess_it->child_value("id"));
//
// if(seqProcess_it->child("WCET")){
// pugi::xml_node comunication = seqProcess_it->child("WCET");
// for (int i=0; i<NPS; i++){
// if(i!=Id){
// pugi::xml_node wcet_it = comunication.append_child("processorId");
// double wcet_task = (VPS[Id].processTime.to_seconds());
// wcet_it.append_attribute("id").set_value(i);
// wcet_it.append_attribute("value").set_value((wcet_task/VPS[Id].profiling)*1000000.0);
// }
// }
// }else{
// pugi::xml_node WCET = seqProcess_it->append_child("WCET");
// for (int i=0; i<VPU.size(); i++){
// if(i!=Id){
// pugi::xml_node wcet_it = WCET.append_child("processorId");
// double wcet_task = (VPS[Id].processTime.to_seconds());
// wcet_it.append_attribute("id").set_value(i);
// wcet_it.append_attribute("value").set_value((wcet_task/VPS[Id].profiling)*1000000.0);
// }
// }
// }
//}
/////////////////////// PERIOD //////////////////////////////
//pugi::xml_node instancesPS3 = myDoc.child("instancesPS");
//for (xml_node_iterator seqLink_it=instancesPS3.begin(); seqLink_it!=instancesPS3.end(); ++seqLink_it){
// int Id = atoi(seqLink_it->child_value("id"));
//
// if(seqLink_it->child("Period")){
// pugi::xml_node Period = seqLink_it->child("Period");
// for (int i=0; i<NPS; i++){
// if(i!=Id){
// pugi::xml_node period_it = Period.append_child("processorId");
// period_it.append_attribute("id").set_value(i);
// double period_value = (FRT.to_seconds());
// period_it.append_attribute("value").set_value((period_value/VPS[Id].profiling)*1000000.0);
// }
// }
// }else{
// pugi::xml_node Period = seqLink_it->append_child("Period");
// for (int i=0; i<NPS; i++){
// if(i!=Id){
// pugi::xml_node period_it = Period.append_child("processorId");
// period_it.append_attribute("id").set_value(i);
// double period_value = (FRT.to_seconds());
// period_it.append_attribute("value").set_value((period_value/VPS[Id].profiling)*1000000.0);
// }
// }
// }
//}
///////////////////////// DEADLINE //////////////////////////////
// pugi::xml_node instancesPS4 = myDoc.child("instancesPS");
//for (xml_node_iterator seqLink_it=instancesPS4.begin(); seqLink_it!=instancesPS4.end(); ++seqLink_it){
// int Id = atoi(seqLink_it->child_value("id"));
// if(seqLink_it->child("Deadline")){
// pugi::xml_node Deadline = seqLink_it->child("Deadline");
// for (int i=0; i<NPS; i++){
// if(i!=Id){
// pugi::xml_node dead_it = Deadline.append_child("processorId");
// dead_it.append_attribute("id").set_value(i);
// double deadline_value = (FRT.to_seconds());
// double dead_tot = (deadline_value/VPS[Id].profiling)*1000000.0;
// cout<<"VPS["<<Id<<"].profiling --> "<<VPS[Id].profiling<<endl;
// dead_it.append_attribute("value").set_value(dead_tot);
// }
// }
// }else{
// pugi::xml_node Deadline = seqLink_it->append_child("Deadline");
// for (int i=0; i<NPS; i++){
// if(i!=Id){
// pugi::xml_node dead_it = Deadline.append_child("processorId");
// dead_it.append_attribute("id").set_value(i);
// double deadline_value = (FRT.to_seconds());
// double dead_tot = (deadline_value/VPS[Id].profiling)*1000000.0;
// dead_it.append_attribute("value").set_value(dead_tot);
// }
// }
// }
//}
cout << "Saving result: " << myDoc.save_file("./XML/application.xml") << endl;
myDoc.reset();
cout<<endl;
/* pugi::xml_document myDoc2;
pugi::xml_parse_result myResult2 = myDoc2.load_file("./XML/instancesTL.xml");
cout << "XML result: " << myResult2.description() << endl;
xml_node instancesBB = myDoc2.child("instancesBB");
for (xml_node_iterator seqBB_it=instancesBB.begin(); seqBB_it!=instancesBB.end(); ++seqBB_it){
int Id = atoi(seqBB_it->child_value("id"));
///////////////////// LOAD ////////////////////////////
if(seqBB_it->child("loadEstimation")){
pugi::xml_node loadEstimation = seqBB_it->child("loadEstimation");
xml_node frl_node = loadEstimation.child("FreeRunningTime");
if(!(allocationPS_BB[Id] != Id))
{
sc_time local_frt = FRT;
//frl_node.attribute("value")=(local_frt.to_double()*1000); //another solution for the number conversion
frl_node.attribute("value")=(local_frt.to_seconds()*1000);
}
}else{
pugi::xml_node loadEstimation = seqBB_it->append_child("loadEstimation");
xml_node frl_node = loadEstimation.append_child("FreeRunningTime");
if(allocationPS_BB[Id] == Id)
{
sc_time local_frt = FRT;
//frl_node.attribute("value")=(local_frt.to_double()*1000); //another solution for the number conversion
frl_node.attribute("value")=(local_frt.to_seconds()*1000);
}
}
}
cout << "Saving result: " << myDoc2.save_file("./XML/instancesTL.xml") << endl;
myDoc2.reset();
cout<<endl; */
///////////////////////////////////////////////////
pugi::xml_document myDoc2;
pugi::xml_parse_result myResult2 = myDoc2.load_file("./XML/instancesTL.xml");
cout << "XML result: " << myResult2.description() << endl;
xml_node instancesBB = myDoc2.child("instancesBB");
for (xml_node_iterator seqBB_it=instancesBB.begin(); seqBB_it!=instancesBB.end(); ++seqBB_it){
int Id = atoi(seqBB_it->child_value("id"));
///////////////////// ENERGY ////////////////////////
if(Id == allocationPS_BB[2]){
if(seqBB_it->child("loadEstimation")){
pugi::xml_node energyEstimation = seqBB_it->child("loadEstimation");
xml_node entot_node = energyEstimation.append_child("FreeRunningTime");
entot_node.append_attribute("id").set_value(allocationPS_BB[2]);
sc_time local_frt = FRT;
entot_node.append_attribute("value").set_value(local_frt.to_seconds()*1000);
}else{
pugi::xml_node energyEstimation = seqBB_it->append_child("energyEstimation");
xml_node entot_node = energyEstimation.append_child("energyTOT");
entot_node.append_attribute("id").set_value(allocationPS_BB[2]);
sc_time local_frt = FRT;
entot_node.append_attribute("value").set_value(local_frt.to_seconds()*1000);
}
}
}
cout << "Saving result: " << myDoc2.save_file("./XML/instancesTL.xml") << endl;
myDoc2.reset();
cout<<endl;
}
|
/*
* Copyright (C) 2020 GreenWaves Technologies, SAS, ETH Zurich and
* University of Bologna
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
/*
* Authors: Germain Haugou, GreenWaves Technologies ([email protected])
*/
#include <gv/gvsoc.hpp>
#include <algorithm>
#include <dlfcn.h>
#include <string.h>
#include <stdio.h>
#include <unistd.h>
#include <vp/json.hpp>
#include "main_systemc.hpp"
int main(int argc, char *argv[])
{
char *config_path = NULL;
bool open_proxy = false;
for (int i=1; i<argc; i++)
{
if (strncmp(argv[i], "--config=", 9) == 0)
{
config_path = &argv[i][9];
}
else if (strcmp(argv[i], "--proxy") == 0)
{
open_proxy = true;
}
}
if (config_path == NULL)
{
fprintf(stderr, "No configuration specified, please specify through option --config=<config path>.\n");
return -1;
}
#ifdef VP_USE_SYSTEMC
// In case GVSOC was compiled with SystemC, check if we have at least one SystemC component
// and if so, forward the launch to the dedicated SystemC launcher
if (requires_systemc(config_path))
{
return systemc_launcher(config_path);
}
#endif
gv::GvsocConf conf = { .config_path=config_path };
gv::Gvsoc *gvsoc = gv::gvsoc_new(&conf);
gvsoc->open();
gvsoc->start();
if (conf.proxy_socket != -1)
{
printf("Opened proxy on socket %d\n", conf.proxy_socket);
}
else
{
gvsoc->run();
}
int retval = gvsoc->join();
gvsoc->stop();
gvsoc->close();
return retval;
} |
/********************************************************************************
* University of L'Aquila - HEPSYCODE Source Code License *
* *
* *
* (c) 2018-2019 Centre of Excellence DEWS All rights reserved *
********************************************************************************
* <one line to give the program's name and a brief idea of what it does.> *
* Copyright (C) 2022 Vittoriano Muttillo, Luigi Pomante * *
* *
* This program is free software: you can redistribute it and/or modify *
* it under the terms of the GNU General Public License as published by *
* the Free Software Foundation, either version 3 of the License, or *
* (at your option) any later version. *
* *
* This program is distributed in the hope that it will be useful, *
* but WITHOUT ANY WARRANTY; without even the implied warranty of *
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
* GNU General Public License for more details. *
* *
********************************************************************************
* *
* Created on: 09/May/2023 *
* Authors: Vittoriano Muttillo, Marco Santic, Luigi Pomante *
* *
* email: [email protected] *
* [email protected] *
* [email protected] *
* *
********************************************************************************
* This code has been developed from an HEPSYCODE model used as demonstrator by *
* University of L'Aquila. *
*******************************************************************************/
#include <systemc.h>
#include "../mainsystem.h"
#include <stdio.h>
#include <string.h>
#include <stdlib.h>
#include <math.h>
#include <unistd.h>
////////////////////////////// GENANN //////////////////
#ifdef __cplusplus
extern "C" {
#endif
#ifndef ann_01_GENANN_RANDOM
/* We use the following for uniform random numbers between 0 and 1.
* If you have a better function, redefine this macro. */
#define ann_01_GENANN_RANDOM() (((double)rand())/RAND_MAX)
#endif
struct ann_01_genann;
typedef double (*ann_01_genann_actfun)(const struct ann_01_genann *ann, double a);
typedef struct ann_01_genann {
/* How many inputs, outputs, and hidden neurons. */
int inputs, hidden_layers, hidden, outputs;
/* Which activation function to use for hidden neurons. Default: gennann_act_sigmoid_cached*/
ann_01_genann_actfun activation_hidden;
/* Which activation function to use for output. Default: gennann_act_sigmoid_cached*/
ann_01_genann_actfun activation_output;
/* Total number of weights, and size of weights buffer. */
int total_weights;
/* Total number of neurons + inputs and size of output buffer. */
int total_neurons;
/* All weights (total_weights long). */
double *weight;
/* Stores input array and output of each neuron (total_neurons long). */
double *output;
/* Stores delta of each hidden and output neuron (total_neurons - inputs long). */
double *delta;
} ann_01_genann;
#ifdef __cplusplus
}
#endif
///////////////////////////////////// GENANN ///////////////////////////
#ifndef ann_01_genann_act
#define ann_01_genann_act_hidden ann_01_genann_act_hidden_indirect
#define ann_01_genann_act_output ann_01_genann_act_output_indirect
#else
#define ann_01_genann_act_hidden ann_01_genann_act
#define ann_01_genann_act_output ann_01_genann_act
#endif
#define ann_01_LOOKUP_SIZE 4096
double ann_01_genann_act_hidden_indirect(const struct ann_01_genann *ann, double a) {
return ann->activation_hidden(ann, a);
}
double ann_01_genann_act_output_indirect(const struct ann_01_genann *ann, double a) {
return ann->activation_output(ann, a);
}
const double ann_01_sigmoid_dom_min = -15.0;
const double ann_01_sigmoid_dom_max = 15.0;
double ann_01_interval;
double ann_01_lookup[ann_01_LOOKUP_SIZE];
#ifdef __GNUC__
#define likely(x) __builtin_expect(!!(x), 1)
#define unlikely(x) __builtin_expect(!!(x), 0)
#define unused __attribute__((unused))
#else
#define likely(x) x
#define unlikely(x) x
#define unused
#pragma warning(disable : 4996) /* For fscanf */
#endif
double ann_01_genann_act_sigmoid(const ann_01_genann *ann unused, double a) {
if (a < -45.0) return 0;
if (a > 45.0) return 1;
return 1.0 / (1 + exp(-a));
}
void ann_01_genann_init_sigmoid_lookup(const ann_01_genann *ann) {
const double f = (ann_01_sigmoid_dom_max - ann_01_sigmoid_dom_min) / ann_01_LOOKUP_SIZE;
int i;
ann_01_interval = ann_01_LOOKUP_SIZE / (ann_01_sigmoid_dom_max - ann_01_sigmoid_dom_min);
for (i = 0; i < ann_01_LOOKUP_SIZE; ++i) {
ann_01_lookup[i] = ann_01_genann_act_sigmoid(ann, ann_01_sigmoid_dom_min + f * i);
}
}
double ann_01_genann_act_sigmoid_cached(const ann_01_genann *ann unused, double a) {
assert(!isnan(a));
if (a < ann_01_sigmoid_dom_min) return ann_01_lookup[0];
if (a >= ann_01_sigmoid_dom_max) return ann_01_lookup[ann_01_LOOKUP_SIZE - 1];
size_t j = (size_t)((a-ann_01_sigmoid_dom_min)*ann_01_interval+0.5);
/* Because floating point... */
if (unlikely(j >= ann_01_LOOKUP_SIZE)) return ann_01_lookup[ann_01_LOOKUP_SIZE - 1];
return ann_01_lookup[j];
}
double ann_01_genann_act_linear(const struct ann_01_genann *ann unused, double a) {
return a;
}
double ann_01_genann_act_threshold(const struct ann_01_genann *ann unused, double a) {
return a > 0;
}
void ann_01_genann_randomize(ann_01_genann *ann) {
int i;
for (i = 0; i < ann->total_weights; ++i) {
double r = ann_01_GENANN_RANDOM();
/* Sets weights from -0.5 to 0.5. */
ann->weight[i] = r - 0.5;
}
}
ann_01_genann *ann_01_genann_init(int inputs, int hidden_layers, int hidden, int outputs) {
if (hidden_layers < 0) return 0;
if (inputs < 1) return 0;
if (outputs < 1) return 0;
if (hidden_layers > 0 && hidden < 1) return 0;
const int hidden_weights = hidden_layers ? (inputs+1) * hidden + (hidden_layers-1) * (hidden+1) * hidden : 0;
const int output_weights = (hidden_layers ? (hidden+1) : (inputs+1)) * outputs;
const int total_weights = (hidden_weights + output_weights);
const int total_neurons = (inputs + hidden * hidden_layers + outputs);
/* Allocate extra size for weights, outputs, and deltas. */
const int size = sizeof(ann_01_genann) + sizeof(double) * (total_weights + total_neurons + (total_neurons - inputs));
ann_01_genann *ret = (ann_01_genann *)malloc(size);
if (!ret) return 0;
ret->inputs = inputs;
ret->hidden_layers = hidden_layers;
ret->hidden = hidden;
ret->outputs = outputs;
ret->total_weights = total_weights;
ret->total_neurons = total_neurons;
/* Set pointers. */
ret->weight = (double*)((char*)ret + sizeof(ann_01_genann));
ret->output = ret->weight + ret->total_weights;
ret->delta = ret->output + ret->total_neurons;
ann_01_genann_randomize(ret);
ret->activation_hidden = ann_01_genann_act_sigmoid_cached;
ret->activation_output = ann_01_genann_act_sigmoid_cached;
ann_01_genann_init_sigmoid_lookup(ret);
return ret;
}
void ann_01_genann_free(ann_01_genann *ann) {
/* The weight, output, and delta pointers go to the same buffer. */
free(ann);
}
//genann *genann_read(FILE *in)
//genann *genann_copy(genann const *ann)
double const *ann_01_genann_run(ann_01_genann const *ann, double const *inputs) {
double const *w = ann->weight;
double *o = ann->output + ann->inputs;
double const *i = ann->output;
/* Copy the inputs to the scratch area, where we also store each neuron's
* output, for consistency. This way the first layer isn't a special case. */
memcpy(ann->output, inputs, sizeof(double) * ann->inputs);
int h, j, k;
if (!ann->hidden_layers) {
double *ret = o;
for (j = 0; j < ann->outputs; ++j) {
double sum = *w++ * -1.0;
for (k = 0; k < ann->inputs; ++k) {
sum += *w++ * i[k];
}
*o++ = ann_01_genann_act_output(ann, sum);
}
return ret;
}
/* Figure input layer */
for (j = 0; j < ann->hidden; ++j) {
double sum = *w++ * -1.0;
for (k = 0; k < ann->inputs; ++k) {
sum += *w++ * i[k];
}
*o++ = ann_01_genann_act_hidden(ann, sum);
}
i += ann->inputs;
/* Figure hidden layers, if any. */
for (h = 1; h < ann->hidden_layers; ++h) {
for (j = 0; j < ann->hidden; ++j) {
double sum = *w++ * -1.0;
for (k = 0; k < ann->hidden; ++k) {
sum += *w++ * i[k];
}
*o++ = ann_01_genann_act_hidden(ann, sum);
}
i += ann->hidden;
}
double const *ret = o;
/* Figure output layer. */
for (j = 0; j < ann->outputs; ++j) {
double sum = *w++ * -1.0;
for (k = 0; k < ann->hidden; ++k) {
sum += *w++ * i[k];
}
*o++ = ann_01_genann_act_output(ann, sum);
}
/* Sanity check that we used all weights and wrote all outputs. */
assert(w - ann->weight == ann->total_weights);
assert(o - ann->output == ann->total_neurons);
return ret;
}
//void genann_train(genann const *ann, double const *inputs, double const *desired_outputs, double learning_rate)
//void genann_write(genann const *ann, FILE *out)
/////////////////////// ANN ////////////////////////
#define ann_01_NUM_DEV 1 // The equipment is composed of NUM_DEV devices ...
//-----------------------------------------------------------------------------
//
//-----------------------------------------------------------------------------
#define ann_01_MAX_ANN 100 // Maximum MAX_ANN ANN
#define ann_01_ANN_INPUTS 2 // Number of inputs
#define ann_01_ANN_HIDDEN_LAYERS 1 // Number of hidden layers
#define ann_01_ANN_HIDDEN_NEURONS 2 // Number of neurons of every hidden layer
#define ann_01_ANN_OUTPUTS 1 // Number of outputs
//-----------------------------------------------------------------------------
//
//-----------------------------------------------------------------------------
#define ann_01_ANN_EPOCHS 10000
#define ann_01_ANN_DATASET 6
#define ann_01_ANN_LEARNING_RATE 3 // ...
//-----------------------------------------------------------------------------
//
//-----------------------------------------------------------------------------
#define ann_01_MAX_ERROR 0.00756 // 0.009
//-----------------------------------------------------------------------------
//
//-----------------------------------------------------------------------------
static int ann_01_nANN = -1 ; // Number of ANN that have been created
static ann_01_genann * ann_01_ann[ann_01_MAX_ANN] ; // Now up to MAX_ANN ann
//static double ann_01_trainingInput[ann_01_ANN_DATASET][ann_01_ANN_INPUTS] = { {0, 0}, {0, 1}, {1, 0}, {1, 1}, {0, 1}, {0, 0} } ;
//static double ann_01_trainingExpected[ann_01_ANN_DATASET][ann_01_ANN_OUTPUTS] = { {0}, {1}, {1}, {0}, {1}, {0} } ;
static double ann_01_weights[] = {
-3.100438,
-7.155774,
-7.437955,
-8.132828,
-5.583678,
-5.327152,
5.564897,
-12.201226,
11.771879
} ;
// static double input[4][3] = {{0, 0, 1}, {0, 1, 1}, {1, 0, 1}, {1, 1, 1}};
// static double output[4] = {0, 1, 1, 0};
//-----------------------------------------------------------------------------
//
//-----------------------------------------------------------------------------
static int ann_01_annCheck(int index);
static int ann_01_annCreate(int n);
//-----------------------------------------------------------------------------
// Check the correctness of the index of the ANN
//-----------------------------------------------------------------------------
int ann_01_annCheck(int index)
{
if ( (index < 0) || (index >= ann_01_nANN) )
return( EXIT_FAILURE );
return( EXIT_SUCCESS );
}
//-----------------------------------------------------------------------------
// Create n ANN
//-----------------------------------------------------------------------------
int ann_01_annCreate(int n)
{
// If already created, or not legal number, or too many ANN, then error
if ( (ann_01_nANN != -1) || (n <= 0) || (n > ann_01_MAX_ANN) )
return( EXIT_FAILURE );
// Create the ANN's
for ( int i = 0; i < n; i++ )
{
// New ANN with ANN_INPUT inputs, ANN_HIDDEN_LAYER hidden layers all with ANN_HIDDEN_NEURON neurons, and ANN_OUTPUT outputs
ann_01_ann[i] = ann_01_genann_init(ann_01_ANN_INPUTS, ann_01_ANN_HIDDEN_LAYERS, ann_01_ANN_HIDDEN_NEURONS, ann_01_ANN_OUTPUTS);
if ( ann_01_ann[i] == 0 )
{
for (int j = 0; j < i; j++)
ann_01_genann_free(ann_01_ann[j]) ;
return( EXIT_FAILURE );
}
}
ann_01_nANN = n ;
return( EXIT_SUCCESS );
}
////-----------------------------------------------------------------------------
//// Create and train n identical ANN
////-----------------------------------------------------------------------------
//int annCreateAndTrain(int n)
//{
// if ( annCreate(n) != EXIT_SUCCESS )
// return( EXIT_FAILURE );
//
// // Train the ANN's
// for ( int index = 0; index < nANN; index++ )
// for ( int i = 0; i < ANN_EPOCHS; i++ )
// for ( int j = 0; j < ANN_DATASET; j++ )
// genann_train(ann[index], trainingInput[j], trainingExpected[j], ANN_LEARNING_RATE) ;
//
// return( EXIT_SUCCESS );
//}
//-----------------------------------------------------------------------------
// Create n identical ANN and set their weight
//-----------------------------------------------------------------------------
int ann_01_annCreateAndSetWeights(int n)
{
if ( ann_01_annCreate(n) != EXIT_SUCCESS )
return( EXIT_FAILURE );
// Set weights
for ( int index = 0; index < ann_01_nANN; index++ )
for ( int i = 0; i < ann_01_ann[index]->total_weights; ++i )
ann_01_ann[index]->weight[i] = ann_01_weights[i] ;
return( EXIT_SUCCESS );
}
//-----------------------------------------------------------------------------
// x[2] = x[0] XOR x[1]
//-----------------------------------------------------------------------------
int ann_01_annRun(int index, double x[ann_01_ANN_INPUTS + ann_01_ANN_OUTPUTS])
{
if ( ann_01_annCheck(index) != EXIT_SUCCESS )
return( EXIT_FAILURE ) ;
x[2] = * ann_01_genann_run(ann_01_ann[index], x) ;
return( EXIT_SUCCESS );
}
////-----------------------------------------------------------------------------
////
////-----------------------------------------------------------------------------
//int annPrintWeights(int index)
//{
// if ( annCheck(index) != EXIT_SUCCESS )
// return( EXIT_FAILURE ) ;
//
//
// printf("\n*** ANN index = %d\n", index) ;
// for ( int i = 0; i < ann[index]->total_weights; ++i )
// printf("*** w%d = %f\n", i, ann[index]->weight[i]) ;
//
// return( EXIT_SUCCESS );
//}
////-----------------------------------------------------------------------------
//// Run the index-th ANN k time on random input and return the number of error
////-----------------------------------------------------------------------------
//int annTest(int index, int k)
//{
// int x0; int x1; int y;
// double x[2];
// double xor_ex;
// int error = 0;
//
// if ( annCheck(index) != EXIT_SUCCESS )
// return( -1 ); // less than zero errors <==> the ANN isn't correctly created
//
// for (int i = 0; i < k; i++ )
// {
// x0 = rand() % 2; x[0] = (double)x0;
// x1 = rand() % 2; x[1] = (double)x1;
// y = x0 ^ x1 ;
//
// xor_ex = * genann_run(ann[index], x);
// if ( fabs(xor_ex - (double)y) > MAX_ERROR )
// {
// error++ ;
// printf("@@@ Error: ANN = %d, step = %d, x0 = %d, x1 = %d, y = %d, xor_ex = %f \n", index, i, x0, x1, y, xor_ex) ;
// }
// }
//
// if ( error )
// printf("@@@ ANN = %d: N� of errors = %d\n", index, error) ;
// else
// printf("*** ANN = %d: Test OK\n",index) ;
// return( error );
//}
//-----------------------------------------------------------------------------
//
//-----------------------------------------------------------------------------
void ann_01_annDestroy(void)
{
if ( ann_01_nANN == -1 )
return ;
for ( int index = 0; index < ann_01_nANN; index++ )
ann_01_genann_free(ann_01_ann[index]) ;
ann_01_nANN = -1 ;
}
void mainsystem::ann_01_main()
{
// datatype for channels
cleanData_xx_ann_xx_payload cleanData_xx_ann_xx_payload_var;
ann_xx_dataCollector_payload ann_xx_dataCollector_payload_var;
double x[ann_01_ANN_INPUTS + ann_01_ANN_OUTPUTS] ;
//int ann_01_index = 1;
if ( ann_01_annCreateAndSetWeights(ann_01_NUM_DEV) != EXIT_SUCCESS ){ // Create and init ANN
printf("Error Weights \n");
}
//implementation
HEPSY_S(ann_01_id) while(1)
{HEPSY_S(ann_01_id)
// content
cleanData_xx_ann_xx_payload_var = cleanData_01_ann_01_channel->read();
ann_xx_dataCollector_payload_var.dev = cleanData_xx_ann_xx_payload_var.dev;
ann_xx_dataCollector_payload_var.step = cleanData_xx_ann_xx_payload_var.step;
ann_xx_dataCollector_payload_var.ex_time = cleanData_xx_ann_xx_payload_var.ex_time;
ann_xx_dataCollector_payload_var.device_i = cleanData_xx_ann_xx_payload_var.device_i;
ann_xx_dataCollector_payload_var.device_v = cleanData_xx_ann_xx_payload_var.device_v;
ann_xx_dataCollector_payload_var.device_t = cleanData_xx_ann_xx_payload_var.device_t;
ann_xx_dataCollector_payload_var.device_r = cleanData_xx_ann_xx_payload_var.device_r;
x[0] = cleanData_xx_ann_xx_payload_var.x_0;
x[1] = cleanData_xx_ann_xx_payload_var.x_1;
x[2] = cleanData_xx_ann_xx_payload_var.x_2;
//u = cleanData_xx_ann_xx_payload_var.step;
ann_xx_dataCollector_payload_var.fault = cleanData_xx_ann_xx_payload_var.fault;
//RUN THE ANN...
// ### P R E D I C T (simple XOR)
// if ( annRun(index, x) != EXIT_SUCCESS ){
// printf("Step = %u Index = %d ANN error.\n", u, index) ;
// }else{
// device[index].fault = x[2] <= 0.5 ? 0 : 1 ;
// }
//u: cycle num
if ( ann_01_annRun(0, x) != EXIT_SUCCESS ){
printf("Step = %d Index = %d ANN error.\n", (int)ann_xx_dataCollector_payload_var.step, (int)ann_xx_dataCollector_payload_var.dev) ;
}else{
ann_xx_dataCollector_payload_var.fault = x[2] <= 0.5 ? 0 : 1 ;
}
ann_01_dataCollector_channel->write(ann_xx_dataCollector_payload_var);
HEPSY_P(ann_01_id)
}
}
// END
|
//****************************************************************************************
// MIT License
//****************************************************************************************
// Copyright (c) 2012-2020 University of Bremen, Germany.
// Copyright (c) 2015-2020 DFKI GmbH Bremen, Germany.
// Copyright (c) 2020 Johannes Kepler University Linz, Austria.
//
// Permission is hereby granted, free of charge, to any person obtaining a copy
// of this software and associated documentation files (the "Software"), to deal
// in the Software without restriction, including without limitation the rights
// to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
// copies of the Software, and to permit persons to whom the Software is
// furnished to do so, subject to the following conditions:
//
// The above copyright notice and this permission notice shall be included in all
// copies or substantial portions of the Software.
//
// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
// IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
// FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
// AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
// LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
// OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
// SOFTWARE.
//****************************************************************************************
#include <crave/SystemC.hpp>
#include <crave/ConstrainedRandom.hpp>
#include <systemc.h>
#include <boost/timer.hpp>
using crave::rand_obj;
using crave::randv;
using sc_dt::sc_bv;
using sc_dt::sc_uint;
struct ALU16 : public rand_obj {
randv<sc_bv<2> > op;
randv<sc_uint<16> > a, b;
ALU16(rand_obj* parent = 0) : rand_obj(parent), op(this), a(this), b(this) {
constraint((op() != 0x0) || (65535 >= a() + b()));
constraint((op() != 0x1) || ((65535 >= a() - b()) && (b() <= a())));
constraint((op() != 0x2) || (65535 >= a() * b()));
constraint((op() != 0x3) || (b() != 0));
}
friend std::ostream& operator<<(std::ostream& o, ALU16 const& alu) {
o << alu.op << ' ' << alu.a << ' ' << alu.b;
return o;
}
};
int sc_main(int argc, char** argv) {
crave::init("crave.cfg");
boost::timer timer;
ALU16 c;
CHECK(c.next());
std::cout << "first: " << timer.elapsed() << "\n";
for (int i = 0; i < 1000; ++i) {
CHECK(c.next());
}
std::cout << "complete: " << timer.elapsed() << "\n";
return 0;
}
|
/*
* @ASCK
*/
#include <systemc.h>
SC_MODULE (PC) {
sc_in <bool> clk;
sc_in <sc_uint<14>> prev_addr;
sc_out <sc_uint<14>> next_addr;
/*
** module global variables
*/
SC_CTOR (PC){
SC_METHOD (process);
sensitive << clk.pos();
}
void process () {
next_addr.write(prev_addr.read());
}
}; |
/*******************************************************************************
* tpencoder.cpp -- Copyright 2019 (c) Glenn Ramalho - RFIDo Design
*******************************************************************************
* Description:
* This is a testbench module to emulate a rotary quad encoder with a button.
* This encoder encodes the button by forcing pin B high.
*******************************************************************************
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*******************************************************************************
*/
#include <systemc.h>
#include "tpencoder.h"
void tpencoder::press(bool pb) {
if (pb) {
pinA.write(GN_LOGIC_1);
buttonpressed = true;
}
else {
pinA.write(GN_LOGIC_Z);
buttonpressed = false;
}
}
void tpencoder::turnleft(int pulses, bool pressbutton) {
/* We start by raising the button, if requested. */
if (pressbutton) press(true);
/* If the last was a left turn, we need to do the direction change glitch.
* Note that if the button is pressed, we only toggle pin B. */
if (!lastwasright) {
wait(speed, SC_MS);
pinB.write(GN_LOGIC_1);
wait(speed, SC_MS);
pinB.write(GN_LOGIC_Z);
}
/* And we apply the pulses, again, watching for the button. */
wait(phase, SC_MS);
while(pulses > 0) {
wait(speed-phase, SC_MS);
if (!buttonpressed) pinA.write(GN_LOGIC_1);
wait(phase, SC_MS);
pinB.write(GN_LOGIC_1);
wait(speed-phase, SC_MS);
if (!buttonpressed) pinA.write(GN_LOGIC_Z);
if (edges == 2) wait(phase, SC_MS);
pinB.write(GN_LOGIC_Z);
if (edges != 2) wait(phase, SC_MS);
pulses = pulses - 1;
}
/* If the customer requested us to press the button with a turn, we release
* it now.
*/
if (pressbutton) {
wait(speed, SC_MS);
press(false);
}
/* And we tag that the last was a right turn as when we shift to the left
* we can have some odd behaviour.
*/
lastwasright = true;
}
void tpencoder::turnright(int pulses, bool pressbutton) {
/* We start by raising the button, if requested. */
if (pressbutton) press(true);
/* If the last was a right turn, we need to do the direction change glitch.
* Note that if the button is pressed, we only toggle pin A. */
if (lastwasright) {
wait(speed, SC_MS);
if (!buttonpressed) pinA.write(GN_LOGIC_1);
wait(speed, SC_MS);
pinB.write(GN_LOGIC_1);
wait(speed, SC_MS);
pinB.write(GN_LOGIC_Z);
wait(speed, SC_MS);
if (!buttonpressed) pinA.write(GN_LOGIC_Z);
}
/* And we apply the pulses, again, watching for the button. */
wait(phase, SC_MS);
while(pulses > 0) {
wait(speed-phase, SC_MS);
pinB.write(GN_LOGIC_1);
wait(phase, SC_MS);
if (!buttonpressed) pinA.write(GN_LOGIC_1);
wait(speed-phase, SC_MS);
pinB.write(GN_LOGIC_Z);
if (edges == 2) wait(phase, SC_MS);
if (!buttonpressed) pinA.write(GN_LOGIC_Z);
if (edges != 2) wait(phase, SC_MS);
pulses = pulses - 1;
}
/* If the customer requested us to press the button with a turn, we release
* it now.
*/
if (pressbutton) {
wait(speed, SC_MS);
press(false);
}
/* And we tag that the last was a left turn, so we can do the left turn to
* right turn glitch.
*/
lastwasright = false;
}
void tpencoder::start_of_simulation() {
pinA.write(GN_LOGIC_Z);
pinB.write(GN_LOGIC_Z);
}
void tpencoder::trace(sc_trace_file *tf) {
sc_trace(tf, buttonpressed, buttonpressed.name());
sc_trace(tf, pinA, pinA.name());
sc_trace(tf, pinB, pinB.name());
}
|
//****************************************************************************************
// MIT License
//****************************************************************************************
// Copyright (c) 2012-2020 University of Bremen, Germany.
// Copyright (c) 2015-2020 DFKI GmbH Bremen, Germany.
// Copyright (c) 2020 Johannes Kepler University Linz, Austria.
//
// Permission is hereby granted, free of charge, to any person obtaining a copy
// of this software and associated documentation files (the "Software"), to deal
// in the Software without restriction, including without limitation the rights
// to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
// copies of the Software, and to permit persons to whom the Software is
// furnished to do so, subject to the following conditions:
//
// The above copyright notice and this permission notice shall be included in all
// copies or substantial portions of the Software.
//
// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
// IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
// FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
// AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
// LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
// OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
// SOFTWARE.
//****************************************************************************************
#include <crave/experimental/SystemC.hpp>
#include <crave/ConstrainedRandom.hpp>
#include <systemc.h>
#include <boost/timer.hpp>
#include <crave/experimental/Experimental.hpp>
using crave::crv_sequence_item;
using crave::crv_constraint;
using crave::crv_variable;
using crave::crv_object_name;
using sc_dt::sc_bv;
using sc_dt::sc_uint;
using crave::dist;
using crave::distribution;
using crave::reference;
struct ALU12 : public crv_sequence_item {
crv_variable<sc_bv<2> > op;
crv_variable<sc_uint<12> > a, b;
crv_constraint c_dist{ "dist" };
crv_constraint c_add{ "add" };
crv_constraint c_sub{ "sub" };
crv_constraint c_mul{ "mul" };
crv_constraint c_div{ "div" };
ALU12(crv_object_name) {
c_dist = { dist(op(), distribution<short>::simple_range(0, 3)) };
c_add = {(op() != 0x0) || (4095 >= a() + b()) };
c_sub = {(op() != 0x1) || ((4095 >= a() - b()) && (b() <= a())) };
c_mul = {(op() != 0x2) || (4095 >= a() * b()) };
c_div = {(op() != 0x3) || (b() != 0) };
}
friend std::ostream& operator<<(std::ostream& o, ALU12 const& alu) {
o << alu.op << ' ' << alu.a << ' ' << alu.b;
return o;
}
};
int sc_main(int argc, char** argv) {
crave::init("crave.cfg");
boost::timer timer;
ALU12 c("ALU");
CHECK(c.randomize());
std::cout << "first: " << timer.elapsed() << "\n";
for (int i = 0; i < 1000; ++i) {
CHECK(c.randomize());
std::cout << c << std::endl;
}
std::cout << "complete: " << timer.elapsed() << "\n";
return 0;
}
|
#ifndef USING_TLM_TB_EN
#define int64 systemc_int64
#define uint64 systemc_uint64
#include <systemc.h>
#undef int64
#undef uint64
#define int64 opencv_int64
#define uint64 opencv_uint64
#include <opencv2/opencv.hpp>
#undef int64
#undef uint64
#include "vga.hpp"
// Image path
#define IPS_IMG_PATH_TB "../../tools/datagen/src/imgs/car_rgb_noisy_image.jpg"
// Main clock frequency in Hz - 25.175 MHz
#define CLK_FREQ 25175000
// VGA settings
#define H_ACTIVE 640
#define H_FP 16
#define H_SYNC_PULSE 96
#define H_BP 48
#define V_ACTIVE 480
#define V_FP 10
#define V_SYNC_PULSE 2
#define V_BP 33
// Compute the total number of pixels
#define TOTAL_VERTICAL (H_ACTIVE + H_FP + H_SYNC_PULSE + H_BP)
#define TOTAL_HORIZONTAL (V_ACTIVE + V_FP + V_SYNC_PULSE + V_BP)
#define TOTAL_PIXELES (TOTAL_VERTICAL * TOTAL_HORIZONTAL)
// Number of bits for ADC, DAC and VGA
#define BITS 8
int sc_main(int, char*[])
{
// Read image
const std::string img_path = IPS_IMG_PATH_TB;
cv::Mat read_img = cv::imread(img_path, cv::IMREAD_COLOR);
// CV_8UC3 Type: 8-bit unsigned, 3 channels (e.g., for a color image)
cv::Mat tx_img;
read_img.convertTo(tx_img, CV_8UC3);
cv::Mat rx_data(TOTAL_HORIZONTAL, TOTAL_VERTICAL, CV_8UC3);
cv::Mat rx_img(tx_img.size(), CV_8UC3);
#ifdef IPS_DEBUG_EN
std::cout << "Loading image: " << img_path << std::endl;
#endif // IPS_DEBUG_EN
// Check if the image is loaded successfully
if (tx_img.empty())
{
std::cerr << "Error: Could not open or find the image!" << std::endl;
exit(EXIT_FAILURE);
}
#ifdef IPS_DEBUG_EN
std::cout << "TX image info: ";
std::cout << "rows = " << tx_img.rows;
std::cout << " cols = " << tx_img.cols;
std::cout << " channels = " << tx_img.channels() << std::endl;
std::cout << "RX data info: ";
std::cout << "rows = " << rx_data.rows;
std::cout << " cols = " << rx_data.cols;
std::cout << " channels = " << rx_data.channels() << std::endl;
std::cout << "RX image info: ";
std::cout << "rows = " << rx_img.rows;
std::cout << " cols = " << rx_img.cols;
std::cout << " channels = " << rx_img.channels() << std::endl;
#endif // IPS_DEBUG_EN
// Compute the clock time in seconds
const double CLK_TIME = 1.0 / static_cast<double>(CLK_FREQ);
// Compute the total simulation based on the total amount of pixels in the
// screen
const double SIM_TIME = CLK_TIME * static_cast<double>(TOTAL_PIXELES);
// Signals to use
// -- Inputs
sc_core::sc_clock clk("clk", CLK_TIME, sc_core::SC_SEC);
sc_core::sc_signal<sc_uint<8> > s_tx_red;
sc_core::sc_signal<sc_uint<8> > s_tx_green;
sc_core::sc_signal<sc_uint<8> > s_tx_blue;
// -- Outputs
sc_core::sc_signal<bool> s_hsync;
sc_core::sc_signal<bool> s_vsync;
sc_core::sc_signal<unsigned int> s_h_count;
sc_core::sc_signal<unsigned int> s_v_count;
sc_core::sc_signal<sc_uint<8> > s_rx_red;
sc_core::sc_signal<sc_uint<8> > s_rx_green;
sc_core::sc_signal<sc_uint<8> > s_rx_blue;
// VGA module instanciation and connections
vga<
BITS,
H_ACTIVE, H_FP, H_SYNC_PULSE, H_BP,
V_ACTIVE, V_FP, V_SYNC_PULSE, V_BP
> ips_vga("ips_vga");
ips_vga.clk(clk);
ips_vga.red(s_tx_red);
ips_vga.green(s_tx_green);
ips_vga.blue(s_tx_blue);
ips_vga.o_hsync(s_hsync);
ips_vga.o_vsync(s_vsync);
ips_vga.o_h_count(s_h_count);
ips_vga.o_v_count(s_v_count);
ips_vga.o_red(s_rx_red);
ips_vga.o_green(s_rx_green);
ips_vga.o_blue(s_rx_blue);
// Signals to dump
#ifdef IPS_DUMP_EN
sc_trace_file* wf = sc_create_vcd_trace_file("ips_vga");
sc_trace(wf, clk, "clk");
sc_trace(wf, s_tx_red, "tx_red");
sc_trace(wf, s_tx_green, "tx_green");
sc_trace(wf, s_tx_blue, "tx_blue");
sc_trace(wf, s_hsync, "hsync");
sc_trace(wf, s_vsync, "vsync");
sc_trace(wf, s_h_count, "h_count");
sc_trace(wf, s_v_count, "v_count");
sc_trace(wf, s_rx_red, "rx_red");
sc_trace(wf, s_rx_green, "rx_green");
sc_trace(wf, s_rx_blue, "rx_blue");
#endif // IPS_DUMP_EN
// Start time
std::cout << "@" << sc_time_stamp() << std::endl;
double total_sim_time = 0.0;
while (SIM_TIME > total_sim_time)
{
const int IMG_ROW = s_v_count.read() - (V_SYNC_PULSE + V_BP);
const int IMG_COL = s_h_count.read() - (H_SYNC_PULSE + H_BP);
#ifdef IPS_DEBUG_EN
std::cout << "TX image: ";
std::cout << "row = " << IMG_ROW;
std::cout << " col = " << IMG_COL;
#endif // IPS_DEBUG_EN
if ((IMG_ROW < 0) || (IMG_COL < 0) || (IMG_ROW >= V_ACTIVE) || (IMG_COL >= H_ACTIVE))
{
s_tx_red.write(0);
s_tx_green.write(0);
s_tx_blue.write(0);
#ifdef IPS_DEBUG_EN
std::cout << " dpixel = (0,0,0) " << std::endl;
#endif // IPS_DEBUG_EN
}
else
{
cv::Vec3b pixel = tx_img.at<cv::Vec3b>(IMG_ROW, IMG_COL, 0);
s_tx_red.write(static_cast<sc_uint<8> >(pixel[0]));
s_tx_green.write(static_cast<sc_uint<8> >(pixel[1]));
s_tx_blue.write(static_cast<sc_uint<8> >(pixel[2]));
#ifdef IPS_DEBUG_EN
std::cout << " ipixel = (" << static_cast<int>(pixel[0]) << ","
<< static_cast<int>(pixel[1]) << "," << static_cast<int>(pixel[2])
<< ")" << std::endl;
#endif // IPS_DEBUG_EN
}
total_sim_time += CLK_TIME;
sc_start(CLK_TIME, sc_core::SC_SEC);
if ((IMG_ROW < 0) || (IMG_COL < 0) || (IMG_ROW >= V_ACTIVE) || (IMG_COL >= H_ACTIVE))
{
cv::Vec3b pixel(0, 0, 0);
rx_data.at<cv::Vec3b>(s_v_count.read(), s_h_count.read()) = pixel;
}
else
{
cv::Vec3b pixel = cv::Vec3b(s_rx_red.read(), s_rx_green.read(), s_rx_blue.read());
rx_data.at<cv::Vec3b>(s_v_count.read(), s_h_count.read()) = pixel;
rx_img.at<cv::Vec3b>(IMG_ROW, IMG_COL) = pixel;
}
}
// End time
std::cout << "@" << sc_time_stamp() << std::endl;
#ifdef IPS_DUMP_EN
sc_close_vcd_trace_file(wf);
#endif // IPS_DUMP_EN
#ifdef IPS_IMSHOW
// Show the images in their respective windows
cv::imshow("TX image", tx_img);
cv::imshow("RX image", rx_img);
// Wait for a key press indefinitely to keep the windows open
cv::waitKey(0);
#endif // IPS_IMSHOW
return 0;
}
#endif // USING_TLM_TB_EN
|
/*
Problem 3 Design
*/
#include<systemc.h>
SC_MODULE(communicationInterface) {
sc_in<sc_uint<12> > inData;
sc_in<bool> clock , reset , clear;
sc_out<sc_uint<4> > payloadOut;
sc_out<sc_uint<8> > countOut , errorOut;
void validateData();
SC_CTOR(communicationInterface) {
SC_METHOD(validateData);
sensitive<<clock.pos();
}
};
void communicationInterface::validateData() {
cout<<"@ "<<sc_time_stamp()<<"----------Start validateData---------"<<endl;
if(reset.read() == false || clear.read() == true) {
payloadOut.write(0);
countOut.write(0);
errorOut.write(0);
return;
}
sc_uint<4> header = inData.read().range(11 , 8) , payload = inData.read().range(7 , 4);
sc_uint<1> parity = inData.read().range(0 , 0);
sc_uint<2> parityCheck = 0;
if(header == 1) {
payloadOut.write(payload);
countOut.write(countOut.read() + 1);
}
while(payload) {
parityCheck++;
payload &= payload - 1;
}
errorOut.write(errorOut.read() + (parityCheck%2 && parity ? 1 : 0));
} |
/*
* Created on: 21. jun. 2019
* Author: Jonathan Horsted Schougaard
*/
#ifdef HW_COSIM
//#define __GMP_WITHIN_CONFIGURE
#endif
#define DEBUG_SYSTEMC
#define SC_INCLUDE_FX
#include "hwcore/tb/pipes/tb_streamcircularlinebuffer.h"
#include <cstdlib>
#include <iostream>
#include <systemc.h>
unsigned errors = 0;
const char simulation_name[] = "streamcircularlinebuffer_tb";
void flush_io() { std::cout << "flush_io()" << std::flush; }
void flush_quick_io() { std::cout << "flush_quick_io()" << std::flush; }
int sc_main(int argc, char *argv[]) {
if (std::atexit(flush_io) != 0 || std::at_quick_exit(flush_quick_io) != 0) {
std::cout << "error setup flush at exit" << std::endl;
std::exit(1);
}
return errors ? 1 : 0;
cout << "INFO: Elaborating " << simulation_name << endl;
sc_core::sc_report_handler::set_actions("/IEEE_Std_1666/deprecated", sc_core::SC_DO_NOTHING);
sc_report_handler::set_actions(SC_ID_LOGIC_X_TO_BOOL_, SC_LOG);
sc_report_handler::set_actions(SC_ID_VECTOR_CONTAINS_LOGIC_VALUE_, SC_LOG);
// sc_report_handler::set_actions( SC_ID_OBJECT_EXISTS_, SC_LOG);
// sc_set_time_resolution(1,SC_PS);
// sc_set_default_time_unit(1,SC_NS);
// ModuleSingle modulesingle("modulesingle_i");
tb_top_streamcircularlinebuffer<sizeof(int) * 8, 3> top("tb_top_streamcircularlinebuffer");
cout << "INFO: Simulating " << simulation_name << endl;
sc_time time_out(1000, SC_US);
sc_start(time_out);
cout << "INFO: end time is: " << sc_time_stamp().to_string() << ", and max time is: " << time_out.to_string()
<< std::endl
<< std::flush;
sc_assert(sc_time_stamp() != time_out);
// assert(sc_time_stamp()!=sc_max_time());
cout << "INFO: Post-processing " << simulation_name << endl;
cout << "INFO: Simulation " << simulation_name << " " << (errors ? "FAILED" : "PASSED") << " with " << errors
<< " errors" << std::endl
<< std::flush;
#ifdef __RTL_SIMULATION__
cout << "HW cosim done" << endl;
#endif
return errors ? 1 : 0;
}
// test2 |
///////////////////////////////////////////////////////////////////////////////////
// __ _ _ _ //
// / _(_) | | | | //
// __ _ _ _ ___ ___ _ __ | |_ _ ___| | __| | //
// / _` | | | |/ _ \/ _ \ '_ \| _| |/ _ \ |/ _` | //
// | (_| | |_| | __/ __/ | | | | | | __/ | (_| | //
// \__, |\__,_|\___|\___|_| |_|_| |_|\___|_|\__,_| //
// | | //
// |_| //
// //
// //
// Peripheral-NTM for MPSoC //
// Neural Turing Machine for MPSoC //
// //
///////////////////////////////////////////////////////////////////////////////////
///////////////////////////////////////////////////////////////////////////////////
// //
// Copyright (c) 2020-2024 by the author(s) //
// //
// Permission is hereby granted, free of charge, to any person obtaining a copy //
// of this software and associated documentation files (the "Software"), to deal //
// in the Software without restriction, including without limitation the rights //
// to use, copy, modify, merge, publish, distribute, sublicense, and/or sell //
// copies of the Software, and to permit persons to whom the Software is //
// furnished to do so, subject to the following conditions: //
// //
// The above copyright notice and this permission notice shall be included in //
// all copies or substantial portions of the Software. //
// //
// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR //
// IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, //
// FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE //
// AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER //
// LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, //
// OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN //
// THE SOFTWARE. //
// //
// ============================================================================= //
// Author(s): //
// Paco Reina Campo <[email protected]> //
// //
///////////////////////////////////////////////////////////////////////////////////
#include "ntm_encoder_design.cpp"
#include "systemc.h"
int sc_main(int argc, char *argv[]) {
adder adder("ADDER");
sc_signal<int> Ain;
sc_signal<int> Bin;
sc_signal<bool> clock;
sc_signal<int> out;
adder(clock, Ain, Bin, out);
Ain = 1;
Bin = 2;
clock = 0;
sc_start(1, SC_NS);
clock = 1;
sc_start(1, SC_NS);
cout << "@" << sc_time_stamp() << ": A + B = " << out.read() << endl;
Ain = 2;
Bin = 2;
clock = 0;
sc_start(1, SC_NS);
clock = 1;
sc_start(1, SC_NS);
cout << "@" << sc_time_stamp() << ": A + B = " << out.read() << endl;
return 0;
}
|
// Copyright 2018 Evandro Luis Copercini
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#include "sdkconfig.h"
#include <cstdint>
#include <cstdio>
#include <cstdlib>
#include <cstring>
#include "esp_gap_bt_api.h"
#include "freertos/FreeRTOS.h"
#include "freertos/task.h"
#include <systemc.h>
#include "info.h"
#include "btmod.h"
#if defined(CONFIG_BT_ENABLED) && defined(CONFIG_BLUEDROID_ENABLED)
#ifdef ARDUINO_ARCH_ESP32
#include "esp32-hal-log.h"
#endif
#include "BluetoothSerial.h"
#include "esp_bt.h"
#include "esp_bt_main.h"
#include "esp_gap_bt_api.h"
#include "esp_bt_device.h"
#include "esp_spp_api.h"
#include <esp_log.h>
#include "esp32-hal-log.h"
const char * _spp_server_name = "ESP32SPP";
#define RX_QUEUE_SIZE 512
#define TX_QUEUE_SIZE 32
static uint32_t _spp_client = 0;
static boolean secondConnectionAttempt;
static esp_spp_cb_t * custom_spp_callback = NULL;
static BluetoothSerialDataCb custom_data_callback = NULL;
#define INQ_LEN 0x10
#define INQ_NUM_RSPS 20
#define READY_TIMEOUT (10 * 1000)
#define SCAN_TIMEOUT (INQ_LEN * 2 * 1000)
static esp_bd_addr_t _peer_bd_addr;
static char _remote_name[ESP_BT_GAP_MAX_BDNAME_LEN + 1];
static bool _isRemoteAddressSet;
static bool _isMaster;
static esp_bt_pin_code_t _pin_code;
static int _pin_len;
static bool _isPinSet;
static bool _enableSSP;
#define SPP_RUNNING 0x01
#define SPP_CONNECTED 0x02
#define SPP_CONGESTED 0x04
#define SPP_DISCONNECTED 0x08
typedef struct {
size_t len;
uint8_t data[];
} spp_packet_t;
#if (ARDUHAL_LOG_LEVEL >= ARDUHAL_LOG_LEVEL_INFO)
static char *bda2str(esp_bd_addr_t bda, char *str, size_t size)
{
if (bda == NULL || str == NULL || size < 18) {
return NULL;
}
uint8_t *p = bda;
sprintf(str, "%02x:%02x:%02x:%02x:%02x:%02x",
p[0], p[1], p[2], p[3], p[4], p[5]);
return str;
}
#endif
static bool get_name_from_eir(uint8_t *eir, char *bdname, uint8_t *bdname_len)
{
if (!eir || !bdname || !bdname_len) {
return false;
}
uint8_t *rmt_bdname, rmt_bdname_len;
*bdname = *bdname_len = rmt_bdname_len = 0;
rmt_bdname = esp_bt_gap_resolve_eir_data(eir, ESP_BT_EIR_TYPE_CMPL_LOCAL_NAME, &rmt_bdname_len);
if (!rmt_bdname) {
rmt_bdname = esp_bt_gap_resolve_eir_data(eir, ESP_BT_EIR_TYPE_SHORT_LOCAL_NAME, &rmt_bdname_len);
}
if (rmt_bdname) {
rmt_bdname_len = rmt_bdname_len > ESP_BT_GAP_MAX_BDNAME_LEN ? ESP_BT_GAP_MAX_BDNAME_LEN : rmt_bdname_len;
memcpy(bdname, rmt_bdname, rmt_bdname_len);
bdname[rmt_bdname_len] = 0;
*bdname_len = rmt_bdname_len;
return true;
}
return false;
}
static bool btSetPin() {
esp_bt_pin_type_t pin_type;
if (_isPinSet) {
if (_pin_len) {
log_i("pin set");
pin_type = ESP_BT_PIN_TYPE_FIXED;
} else {
_isPinSet = false;
log_i("pin reset");
pin_type = ESP_BT_PIN_TYPE_VARIABLE; // pin_code would be ignored (default)
}
return (esp_bt_gap_set_pin(pin_type, _pin_len, _pin_code) == ESP_OK);
}
return false;
}
static void esp_spp_cb(esp_spp_cb_event_t event, esp_spp_cb_param_t *param)
{
/*
switch (event)
{
case ESP_SPP_INIT_EVT:
log_i("ESP_SPP_INIT_EVT");
esp_bt_gap_set_scan_mode(ESP_BT_SCAN_MODE_CONNECTABLE_DISCOVERABLE);
if (!_isMaster) {
log_i("ESP_SPP_INIT_EVT: slave: start");
esp_spp_start_srv(ESP_SPP_SEC_NONE, ESP_SPP_ROLE_SLAVE, 0, _spp_server_name);
}
break;
case ESP_SPP_SRV_OPEN_EVT://Server connection open
log_i("ESP_SPP_SRV_OPEN_EVT");
if (!_spp_client){
_spp_client = param->open.handle;
} else {
secondConnectionAttempt = true;
esp_spp_disconnect(param->open.handle);
}
break;
case ESP_SPP_CLOSE_EVT://Client connection closed
log_i("ESP_SPP_CLOSE_EVT");
if(secondConnectionAttempt) {
secondConnectionAttempt = false;
} else {
_spp_client = 0;
}
break;
case ESP_SPP_CONG_EVT://connection congestion status changed
log_v("ESP_SPP_CONG_EVT: %s", param->cong.cong?"CONGESTED":"FREE");
break;
case ESP_SPP_WRITE_EVT://write operation completed
log_v("ESP_SPP_WRITE_EVT: %u %s", param->write.len, param->write.cong?"CONGESTED":"FREE");
break;
case ESP_SPP_DATA_IND_EVT://connection received data
log_v("ESP_SPP_DATA_IND_EVT len=%d handle=%d", param->data_ind.len, param->data_ind.handle);
//esp_log_buffer_hex("",param->data_ind.data,param->data_ind.len); //for low level debug
//ets_printf("r:%u\n", param->data_ind.len);
if(custom_data_callback){
custom_data_callback(param->data_ind.data, param->data_ind.len);
}
break;
case ESP_SPP_DISCOVERY_COMP_EVT://discovery complete
log_i("ESP_SPP_DISCOVERY_COMP_EVT");
if (param->disc_comp.status == ESP_SPP_SUCCESS) {
log_i("ESP_SPP_DISCOVERY_COMP_EVT: spp connect to remote");
esp_spp_connect(ESP_SPP_SEC_AUTHENTICATE, ESP_SPP_ROLE_MASTER, param->disc_comp.scn[0], _peer_bd_addr);
}
break;
case ESP_SPP_OPEN_EVT://Client connection open
log_i("ESP_SPP_OPEN_EVT");
if (!_spp_client){
_spp_client = param->open.handle;
} else {
secondConnectionAttempt = true;
esp_spp_disconnect(param->open.handle);
}
break;
case ESP_SPP_START_EVT://server started
log_i("ESP_SPP_START_EVT");
break;
case ESP_SPP_CL_INIT_EVT://client initiated a connection
log_i("ESP_SPP_CL_INIT_EVT");
break;
default:
break;
}
if(custom_spp_callback)(*custom_spp_callback)(event, param);
*/
}
void BluetoothSerial::onData(BluetoothSerialDataCb cb){
custom_data_callback = cb;
}
static void esp_bt_gap_cb(esp_bt_gap_cb_event_t event, esp_bt_gap_cb_param_t *param)
{
/*
switch(event){
case ESP_BT_GAP_DISC_RES_EVT:
log_i("ESP_BT_GAP_DISC_RES_EVT");
#if (ARDUHAL_LOG_LEVEL >= ARDUHAL_LOG_LEVEL_INFO)
char bda_str[18];
log_i("Scanned device: %s", bda2str(param->disc_res.bda, bda_str, 18));
#endif
for (int i = 0; i < param->disc_res.num_prop; i++) {
uint8_t peer_bdname_len;
char peer_bdname[ESP_BT_GAP_MAX_BDNAME_LEN + 1];
switch(param->disc_res.prop[i].type) {
case ESP_BT_GAP_DEV_PROP_EIR:
if (get_name_from_eir((uint8_t*)param->disc_res.prop[i].val, peer_bdname, &peer_bdname_len)) {
log_i("ESP_BT_GAP_DISC_RES_EVT : EIR : %s : %d", peer_bdname, peer_bdname_len);
if (strlen(_remote_name) == peer_bdname_len
&& strncmp(peer_bdname, _remote_name, peer_bdname_len) == 0) {
log_v("ESP_BT_GAP_DISC_RES_EVT : SPP_START_DISCOVERY_EIR : %s", peer_bdname, peer_bdname_len);
_isRemoteAddressSet = true;
memcpy(_peer_bd_addr, param->disc_res.bda, ESP_BD_ADDR_LEN);
esp_bt_gap_cancel_discovery();
esp_spp_start_discovery(_peer_bd_addr);
}
}
break;
case ESP_BT_GAP_DEV_PROP_BDNAME:
peer_bdname_len = param->disc_res.prop[i].len;
memcpy(peer_bdname, param->disc_res.prop[i].val, peer_bdname_len);
peer_bdname_len--; // len includes 0 terminator
log_v("ESP_BT_GAP_DISC_RES_EVT : BDNAME : %s : %d", peer_bdname, peer_bdname_len);
if (strlen(_remote_name) == peer_bdname_len
&& strncmp(peer_bdname, _remote_name, peer_bdname_len) == 0) {
log_i("ESP_BT_GAP_DISC_RES_EVT : SPP_START_DISCOVERY_BDNAME : %s", peer_bdname);
_isRemoteAddressSet = true;
memcpy(_peer_bd_addr, param->disc_res.bda, ESP_BD_ADDR_LEN);
esp_bt_gap_cancel_discovery();
esp_spp_start_discovery(_peer_bd_addr);
}
break;
case ESP_BT_GAP_DEV_PROP_COD:
log_d("ESP_BT_GAP_DEV_PROP_COD");
break;
case ESP_BT_GAP_DEV_PROP_RSSI:
log_d("ESP_BT_GAP_DEV_PROP_RSSI");
break;
default:
break;
}
if (_isRemoteAddressSet)
break;
}
break;
case ESP_BT_GAP_DISC_STATE_CHANGED_EVT:
log_i("ESP_BT_GAP_DISC_STATE_CHANGED_EVT");
break;
case ESP_BT_GAP_RMT_SRVCS_EVT:
log_i( "ESP_BT_GAP_RMT_SRVCS_EVT");
break;
case ESP_BT_GAP_RMT_SRVC_REC_EVT:
log_i("ESP_BT_GAP_RMT_SRVC_REC_EVT");
break;
case ESP_BT_GAP_AUTH_CMPL_EVT:
if (param->auth_cmpl.stat == ESP_BT_STATUS_SUCCESS) {
log_v("authentication success: %s", param->auth_cmpl.device_name);
} else {
log_e("authentication failed, status:%d", param->auth_cmpl.stat);
}
break;
case ESP_BT_GAP_PIN_REQ_EVT:
// default pairing pins
log_i("ESP_BT_GAP_PIN_REQ_EVT min_16_digit:%d", param->pin_req.min_16_digit);
if (param->pin_req.min_16_digit) {
log_i("Input pin code: 0000 0000 0000 0000");
esp_bt_pin_code_t pin_code;
memset(pin_code, '0', ESP_BT_PIN_CODE_LEN);
esp_bt_gap_pin_reply(param->pin_req.bda, true, 16, pin_code);
} else {
log_i("Input pin code: 1234");
esp_bt_pin_code_t pin_code;
memcpy(pin_code, "1234", 4);
esp_bt_gap_pin_reply(param->pin_req.bda, true, 4, pin_code);
}
break;
case ESP_BT_GAP_CFM_REQ_EVT:
log_i("ESP_BT_GAP_CFM_REQ_EVT Please compare the numeric value: %d", param->cfm_req.num_val);
esp_bt_gap_ssp_confirm_reply(param->cfm_req.bda, true);
break;
case ESP_BT_GAP_KEY_NOTIF_EVT:
log_i("ESP_BT_GAP_KEY_NOTIF_EVT passkey:%d", param->key_notif.passkey);
break;
case ESP_BT_GAP_KEY_REQ_EVT:
log_i("ESP_BT_GAP_KEY_REQ_EVT Please enter passkey!");
break;
default:
break;
}
*/
}
static bool _init_bt(const char *deviceName)
{
if (!btStarted() && !btStart()){
log_e("initialize controller failed");
return false;
}
esp_bluedroid_status_t bt_state = esp_bluedroid_get_status();
if (bt_state == ESP_BLUEDROID_STATUS_UNINITIALIZED){
if (esp_bluedroid_init()) {
log_e("initialize bluedroid failed");
return false;
}
}
if (bt_state != ESP_BLUEDROID_STATUS_ENABLED){
if (esp_bluedroid_enable()) {
log_e("enable bluedroid failed");
return false;
}
}
if (_isMaster && esp_bt_gap_register_callback(esp_bt_gap_cb) != ESP_OK) {
log_e("gap register failed");
return false;
}
/*
if (esp_spp_register_callback(esp_spp_cb) != ESP_OK){
log_e("spp register failed");
return false;
}
*/
/*
if (esp_spp_init(ESP_SPP_MODE_CB) != ESP_OK){
log_e("spp init failed");
return false;
}
*/
if (esp_bt_sleep_disable() != ESP_OK){
log_e("esp_bt_sleep_disable failed");
}
log_i("device name set");
//esp_bt_dev_set_device_name(deviceName);
if (_isPinSet) {
btSetPin();
}
if (_enableSSP) {
log_i("Simple Secure Pairing");
//esp_bt_sp_param_t param_type = ESP_BT_SP_IOCAP_MODE;
//esp_bt_io_cap_t iocap = ESP_BT_IO_CAP_IO;
//esp_bt_gap_set_security_param(param_type, &iocap, sizeof(uint8_t));
}
// the default BTA_DM_COD_LOUDSPEAKER does not work with the macOS BT stack
esp_bt_cod_t cod;
cod.major = 0b00001;
cod.minor = 0b000100;
cod.service = 0b00000010110;
if (esp_bt_gap_set_cod(cod, ESP_BT_INIT_COD) != ESP_OK) {
log_e("set cod failed");
return false;
}
return true;
}
static bool _stop_bt()
{
if (btStarted()){
/*
if(_spp_client)
esp_spp_disconnect(_spp_client);
esp_spp_deinit();
*/
esp_bluedroid_disable();
esp_bluedroid_deinit();
btStop();
}
_spp_client = 0;
return true;
}
static bool waitForConnect(int timeout) {
if(btptr == NULL) {
PRINTF_ERROR("BSER", "BTPTR not setup");
return false;
}
wait(sc_time(timeout, SC_MS), btptr->connected_ev);
if (btptr->connected_ev.triggered()) return true;
else return false;
}
/*
* Serial Bluetooth Arduino
*
* */
BluetoothSerial::BluetoothSerial()
{
local_name = "ESP32"; //default bluetooth name
}
BluetoothSerial::~BluetoothSerial(void)
{
_stop_bt();
}
bool BluetoothSerial::begin(String localName, bool isMaster)
{
_isMaster = isMaster;
if (localName.length()){
local_name = localName;
}
return _init_bt(local_name.c_str());
}
int BluetoothSerial::available(void)
{
if(btptr == NULL) {
PRINTF_ERROR("BSER", "BTPTR not setup");
return -1;
}
return BTserial.available();
}
int BluetoothSerial::peek(void)
{
if(btptr == NULL) {
PRINTF_ERROR("BSER", "BTPTR not setup");
return -1;
}
return BTserial.peek();
}
bool BluetoothSerial::hasClient(void)
{
return _spp_client > 0;
}
int BluetoothSerial::read(void)
{
if(btptr == NULL) {
PRINTF_ERROR("BSER", "BTPTR not setup");
return 0;
}
return BTserial.read();
}
size_t BluetoothSerial::write(uint8_t c)
{
if(btptr == NULL) {
PRINTF_ERROR("BSER", "BTPTR not setup");
return 0;
}
return BTserial.write(c);
}
size_t BluetoothSerial::write(const uint8_t *buffer, size_t size)
{
if (!_spp_client){
return 0;
}
if(btptr == NULL) {
PRINTF_ERROR("BSER", "BTPTR not setup");
return 0;
}
return BTserial.write((char *)buffer, size);
}
void BluetoothSerial::flush()
{
if(btptr == NULL) {
PRINTF_ERROR("BSER", "BTPTR not setup");
}
else BTserial.flush();
}
void BluetoothSerial::end()
{
_stop_bt();
}
esp_err_t BluetoothSerial::register_callback(esp_spp_cb_t * callback)
{
custom_spp_callback = callback;
return ESP_OK;
}
//Simple Secure Pairing
void BluetoothSerial::enableSSP() {
_enableSSP = true;
}
/*
* Set default parameters for Legacy Pairing
* Use fixed pin code
*/
bool BluetoothSerial::setPin(const char *pin) {
bool isEmpty = !(pin && *pin);
if (isEmpty && !_isPinSet) {
return true; // nothing to do
} else if (!isEmpty){
_pin_len = strlen(pin);
memcpy(_pin_code, pin, _pin_len);
} else {
_pin_len = 0; // resetting pin to none (default)
}
_pin_code[_pin_len] = 0;
_isPinSet = true;
if (isReady(false, READY_TIMEOUT)) {
btSetPin();
}
return true;
}
bool BluetoothSerial::connect(String remoteName)
{
if (!isReady(true, READY_TIMEOUT)) return false;
if (remoteName && remoteName.length() < 1) {
log_e("No remote name is provided");
return false;
}
disconnect();
_isRemoteAddressSet = false;
strncpy(_remote_name, remoteName.c_str(), ESP_BT_GAP_MAX_BDNAME_LEN);
_remote_name[ESP_BT_GAP_MAX_BDNAME_LEN] = 0;
log_i("master : remoteName");
// will first resolve name to address
//esp_bt_gap_set_scan_mode(ESP_BT_SCAN_MODE_CONNECTABLE_DISCOVERABLE);
//if (esp_bt_gap_start_discovery(ESP_BT_INQ_MODE_GENERAL_INQUIRY, INQ_LEN, INQ_NUM_RSPS) == ESP_OK) {
// return waitForConnect(SCAN_TIMEOUT);
//}
//return false;
return true;
}
bool BluetoothSerial::connect(uint8_t remoteAddress[])
{
if (!isReady(true, READY_TIMEOUT)) return false;
if (!remoteAddress) {
log_e("No remote address is provided");
return false;
}
disconnect();
_remote_name[0] = 0;
_isRemoteAddressSet = true;
memcpy(_peer_bd_addr, remoteAddress, ESP_BD_ADDR_LEN);
log_i("master : remoteAddress");
/*
if (esp_spp_start_discovery(_peer_bd_addr) == ESP_OK) {
return waitForConnect(READY_TIMEOUT);
}
return false;
*/
return true;
}
bool BluetoothSerial::connect()
{
if (!isReady(true, READY_TIMEOUT)) return false;
if (_isRemoteAddressSet){
disconnect();
// use resolved or set address first
log_i("master : remoteAddress");
//if (esp_spp_start_discovery(_peer_bd_addr) == ESP_OK) {
// return waitForConnect(READY_TIMEOUT);
//}
//return false;
return true;
} else if (_remote_name[0]) {
disconnect();
log_i("master : remoteName");
// will resolve name to address first - it may take a while
//esp_bt_gap_set_scan_mode(ESP_BT_SCAN_MODE_CONNECTABLE_DISCOVERABLE);
//if (esp_bt_gap_start_discovery(ESP_BT_INQ_MODE_GENERAL_INQUIRY, INQ_LEN, INQ_NUM_RSPS) == ESP_OK) {
// return waitForConnect(SCAN_TIMEOUT);
//}
//return false;
return true;
}
log_e("Neither Remote name nor address was provided");
return false;
}
bool BluetoothSerial::disconnect() {
/*
if (_spp_client) {
flush();
log_i("disconnecting");
if (esp_spp_disconnect(_spp_client) == ESP_OK) {
wait(sc_time(READY_TIMEOUT, SC_MS), btptr->disconnected_ev);
if (btptr->disconnected_ev.triggered()) return true;
else return false;
}
}
return false;
*/
return true;
}
bool BluetoothSerial::unpairDevice(uint8_t remoteAddress[]) {
if (isReady(false, READY_TIMEOUT)) {
log_i("removing bonded device");
return (esp_bt_gap_remove_bond_device(remoteAddress) == ESP_OK);
}
return false;
}
bool BluetoothSerial::connected(int timeout) {
return waitForConnect(timeout);
}
bool BluetoothSerial::isReady(bool checkMaster, int timeout) {
if (checkMaster && !_isMaster) {
log_e("Master mode is not active. Call begin(localName, true) to enable Master mode");
return false;
}
if (!btStarted()) {
log_e("BT is not initialized. Call begin() first");
return false;
}
wait(sc_time(timeout, SC_MS), btptr->running_ev);
if (btptr->running_ev.triggered()) return true;
else return false;
}
#endif
|
///////////////////////////////////////////////////////////////////////////////////
// __ _ _ _ //
// / _(_) | | | | //
// __ _ _ _ ___ ___ _ __ | |_ _ ___| | __| | //
// / _` | | | |/ _ \/ _ \ '_ \| _| |/ _ \ |/ _` | //
// | (_| | |_| | __/ __/ | | | | | | __/ | (_| | //
// \__, |\__,_|\___|\___|_| |_|_| |_|\___|_|\__,_| //
// | | //
// |_| //
// //
// //
// Peripheral-NTM for MPSoC //
// Neural Turing Machine for MPSoC //
// //
///////////////////////////////////////////////////////////////////////////////////
///////////////////////////////////////////////////////////////////////////////////
// //
// Copyright (c) 2020-2024 by the author(s) //
// //
// Permission is hereby granted, free of charge, to any person obtaining a copy //
// of this software and associated documentation files (the "Software"), to deal //
// in the Software without restriction, including without limitation the rights //
// to use, copy, modify, merge, publish, distribute, sublicense, and/or sell //
// copies of the Software, and to permit persons to whom the Software is //
// furnished to do so, subject to the following conditions: //
// //
// The above copyright notice and this permission notice shall be included in //
// all copies or substantial portions of the Software. //
// //
// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR //
// IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, //
// FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE //
// AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER //
// LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, //
// OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN //
// THE SOFTWARE. //
// //
// ============================================================================= //
// Author(s): //
// Paco Reina Campo <[email protected]> //
// //
///////////////////////////////////////////////////////////////////////////////////
#include "ntm_vector_divider_design.cpp"
#include "systemc.h"
int sc_main(int argc, char *argv[]) {
vector_divider vector_divider("VECTOR_DIVIDER");
sc_signal<bool> clock;
sc_signal<sc_int<64>> data_a_in[SIZE_I_IN];
sc_signal<sc_int<64>> data_b_in[SIZE_I_IN];
sc_signal<sc_int<64>> data_out[SIZE_I_IN];
vector_divider.clock(clock);
for (int i = 0; i < SIZE_I_IN; i++) {
vector_divider.data_a_in[i](data_a_in[i]);
vector_divider.data_b_in[i](data_b_in[i]);
vector_divider.data_out[i](data_out[i]);
}
for (int i = 0; i < SIZE_I_IN; i++) {
data_a_in[i] = i;
data_b_in[i] = i + 1;
}
clock = 0;
sc_start(1, SC_NS);
clock = 1;
sc_start(1, SC_NS);
for (int i = 0; i < SIZE_I_IN; i++) {
cout << "@" << sc_time_stamp() << ": data_out[" << i << "] = " << data_out[i].read() << endl;
}
return 0;
}
|
///////////////////////////////////////////////////////////////////////////////////
// __ _ _ _ //
// / _(_) | | | | //
// __ _ _ _ ___ ___ _ __ | |_ _ ___| | __| | //
// / _` | | | |/ _ \/ _ \ '_ \| _| |/ _ \ |/ _` | //
// | (_| | |_| | __/ __/ | | | | | | __/ | (_| | //
// \__, |\__,_|\___|\___|_| |_|_| |_|\___|_|\__,_| //
// | | //
// |_| //
// //
// //
// Peripheral-NTM for MPSoC //
// Neural Turing Machine for MPSoC //
// //
///////////////////////////////////////////////////////////////////////////////////
///////////////////////////////////////////////////////////////////////////////////
// //
// Copyright (c) 2020-2024 by the author(s) //
// //
// Permission is hereby granted, free of charge, to any person obtaining a copy //
// of this software and associated documentation files (the "Software"), to deal //
// in the Software without restriction, including without limitation the rights //
// to use, copy, modify, merge, publish, distribute, sublicense, and/or sell //
// copies of the Software, and to permit persons to whom the Software is //
// furnished to do so, subject to the following conditions: //
// //
// The above copyright notice and this permission notice shall be included in //
// all copies or substantial portions of the Software. //
// //
// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR //
// IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, //
// FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE //
// AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER //
// LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, //
// OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN //
// THE SOFTWARE. //
// //
// ============================================================================= //
// Author(s): //
// Paco Reina Campo <[email protected]> //
// //
///////////////////////////////////////////////////////////////////////////////////
#include "ntm_vector_convolution_design.cpp"
#include "systemc.h"
int sc_main(int argc, char *argv[]) {
vector_convolution vector_convolution("VECTOR_CONVOLUTION");
sc_signal<bool> clock;
sc_signal<sc_int<64>> data_a_in[SIZE_I_IN];
sc_signal<sc_int<64>> data_b_in[SIZE_I_IN];
sc_signal<sc_int<64>> data_out[SIZE_I_IN];
vector_convolution.clock(clock);
for (int i = 0; i < SIZE_I_IN; i++) {
vector_convolution.data_a_in[i](data_a_in[i]);
vector_convolution.data_b_in[i](data_b_in[i]);
vector_convolution.data_out[i](data_out[i]);
}
for (int i = 0; i < SIZE_I_IN; i++) {
data_a_in[i] = i;
data_b_in[i] = i;
}
clock = 0;
sc_start(1, SC_NS);
clock = 1;
sc_start(1, SC_NS);
for (int i = 0; i < SIZE_I_IN; i++) {
cout << "@" << sc_time_stamp() << ": data_out[" << i << "] = " << data_out[i].read() << endl;
}
return 0;
}
|
///////////////////////////////////////////////////////////////////////////////////
// __ _ _ _ //
// / _(_) | | | | //
// __ _ _ _ ___ ___ _ __ | |_ _ ___| | __| | //
// / _` | | | |/ _ \/ _ \ '_ \| _| |/ _ \ |/ _` | //
// | (_| | |_| | __/ __/ | | | | | | __/ | (_| | //
// \__, |\__,_|\___|\___|_| |_|_| |_|\___|_|\__,_| //
// | | //
// |_| //
// //
// //
// Peripheral-NTM for MPSoC //
// Neural Turing Machine for MPSoC //
// //
///////////////////////////////////////////////////////////////////////////////////
///////////////////////////////////////////////////////////////////////////////////
// //
// Copyright (c) 2020-2024 by the author(s) //
// //
// Permission is hereby granted, free of charge, to any person obtaining a copy //
// of this software and associated documentation files (the "Software"), to deal //
// in the Software without restriction, including without limitation the rights //
// to use, copy, modify, merge, publish, distribute, sublicense, and/or sell //
// copies of the Software, and to permit persons to whom the Software is //
// furnished to do so, subject to the following conditions: //
// //
// The above copyright notice and this permission notice shall be included in //
// all copies or substantial portions of the Software. //
// //
// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR //
// IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, //
// FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE //
// AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER //
// LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, //
// OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN //
// THE SOFTWARE. //
// //
// ============================================================================= //
// Author(s): //
// Paco Reina Campo <[email protected]> //
// //
///////////////////////////////////////////////////////////////////////////////////
#include "ntm_scalar_multiplication_design.cpp"
#include "systemc.h"
int sc_main(int argc, char *argv[]) {
adder adder("ADDER");
sc_signal<int> Ain;
sc_signal<int> Bin;
sc_signal<bool> clock;
sc_signal<int> out;
adder(clock, Ain, Bin, out);
Ain = 1;
Bin = 2;
clock = 0;
sc_start(1, SC_NS);
clock = 1;
sc_start(1, SC_NS);
cout << "@" << sc_time_stamp() << ": A + B = " << out.read() << endl;
Ain = 2;
Bin = 2;
clock = 0;
sc_start(1, SC_NS);
clock = 1;
sc_start(1, SC_NS);
cout << "@" << sc_time_stamp() << ": A + B = " << out.read() << endl;
return 0;
}
|
//
//------------------------------------------------------------//
// Copyright 2009-2012 Mentor Graphics Corporation //
// All Rights Reserved Worldwid //
// //
// Licensed under the Apache License, Version 2.0 (the //
// "License"); you may not use this file except in //
// compliance with the License. You may obtain a copy of //
// the License at //
// //
// http://www.apache.org/licenses/LICENSE-2.0 //
// //
// Unless required by applicable law or agreed to in //
// writing, software distributed under the License is //
// distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR //
// CONDITIONS OF ANY KIND, either express or implied. See //
// the License for the specific language governing //
// permissions and limitations under the License. //
//------------------------------------------------------------//
#ifndef PACKET_H
#define PACKET_H
#include <vector>
using std::vector;
#include <systemc.h>
#include <tlm.h>
using namespace sc_core;
class packet {
public:
short cmd;
int addr;
vector<char> data;
};
//------------------------------------------------------------------------------
// Begin UVMC-specific code
#include "uvmc.h"
using namespace uvmc;
UVMC_UTILS_3 (packet,cmd,addr,data)
#endif // PACKET_H
|
#include <pthread.h>
#include <systemc.h>
#include "sc_main.h"
#include "sc_run.h"
//#include "sc_config.h"
#include "sc_qt_adaptor.h"
//#include "sc_rst.h"
//#include "sc_clk.h"
//#include "sc_mux.h"
//#include "sc_tri.h"
//#include "sc_terminals.h"
//#include "sc_gates.h"
//#include "sc_gates_pv.h"
//#include "sc_reg.h"
//#include "sc_arith.h"
/* ????? what is this?
template <bool CLKEDGE = DEFAULT_CLKEDGE, flexinterface_t FLEXINT = DEFAULT_FLEXINT>
class U1block : public SyscFlexInt<CLKEDGE, FLEXINT>
{
public:
typedef sc_lv<32> data_t;
typedef sc_lv<1> sel_t;
// --------------------- Ports ---------------------
// Provided by base module scFlexModuleT
// sc_in_clk clock{"clock"}; // Clock input (FLEXINT: custom active edge)
// sc_in<rst_t> reset{"reset"}; // Asynchronous reset input (FLEXINT: possibly unmapped, custom active level)
// sc_in<ena_t> enable{"enable"}; // Synchronous enable input (FLEXINT: possibly unmapped, custom active level)
sc_out<data_t> q{"q"}; // Data output
sc_in<data_t> load{"load"}; // Load value (when mux selection = 1, d = load)
sc_in<data_t> incr{"incr"}; // Incr value (when mux selection = 0, d = q + incr)
sc_in<sel_t> sel{"sel"}; // Mux selection value
typedef SyscFlexInt<CLKEDGE, FLEXINT> BASE_MODULE;
typedef U1block<CLKEDGE, FLEXINT> SC_CURRENT_USER_MODULE;
private:
SyscMux<2,1,1,,1,1> u3;
SyscReg<32,CLKEDGE,FLEXINT> u2;
SyscAdd<2,32> a1;
sc_signal<sc_lv<32>> wire1{"u3.d0,a1.y"};
sc_signal<sc_lv<32>> wire2{"u3.y,u2.d"};
public:
U1block(::sc_core::sc_module_name name): SyscFlexInt<CLKEDGE,FLEXINT>(name)
, u3("u3"), u2("u2"), a1("a1")
{
u3.d[0]->bind(wire1);
u3.d[1]->bind(load);
u3.sel(sel);
u3.y(wire2);
a1.d[0]->bind(u2.q);
a1.d[1]->bind(incr);
a1.y(wire1);
u2.d.bind(wire2);
u2.reset.bind(BASE_MODULE::reset);
u2.clock.bind(BASE_MODULE::clock);
u2.q.bind(q);
}
};
*/
/*
* Create a separate thread to execute this code, the original systemc's main() code.
* @code return sc_core::sc_elab_and_sim(argc, argv); @endcode
*/
void *scSimMain(void *args)
{
(void)args;
scQtAdaptor ADAPTOR("QT<->SC_bridge");
sc_setRunResult(sc_core::sc_elab_and_sim(0, nullptr));
return nullptr;
}
int sc_main (int argc, char *argv[])
{
return 0;
}
/*
* Create design and run the simulation
(void)argc;
(void)argv;
// Inputs
//SyscIn<1> clk(1, 1, 0, SC_LOGIC_0, "clk");
sc_clock clk("clk");
//SyscIn<1> rst(4, 4, 0, SC_LOGIC_0, "rst");
sc_signal<sc_lv<1>> rst("rst");
//SyscIn<1> sel(2, 2, 0, SC_LOGIC_0, "sel");
sc_signal<sc_lv<1>> sel("sel");
//SyscIn<32> incr(4, 4, 0, SC_LOGIC_0, "incr");
sc_signal<sc_lv<32>> incr("incr");
//SyscIn<1> sel2(4, 4, 0, SC_LOGIC_0, "sel2");
sc_signal<sc_lv<1>> load("load");
//SyscIn<32> load(4, 4, 0, SC_LOGIC_0, "load");
sc_signal<sc_lv<32>> val("val");
// Outputs
//SyscOut<32> y("y");
sc_signal<sc_lv<32>> y("y");
// Components
SyscCnt<32, DEFAULT_CLKEDGE, RST_HIGH_NO_ENA> u4("u4");
SyscMux_pv<2,32,1> u5("u5");
U1block<true, RST_HIGH_NO_ENA> u1("u1");
// Additional wires
sc_signal<sc_lv<32>> wire1("u5.d0,u4.q");
sc_signal<sc_lv<32>> wire2("u5.d1,u1.q");
// Wiring/binding
u4.reset(rst);
u4.clock(clk);
u4.q(wire1);
u5.map(prefix, index, wire);
u5.sel(sel);
u5.d[0](wire1);
u5.d[1](wire2);
u5.y(y);
u1.sel(load);
u1.incr(incr);
u1.load(val);
u1.reset(rst);
u1.clock(clk);
u1.q(wire2);
sc_start(); // Run forever
return 0;
}
*/
|
/*
* Copyright (c) 2017-2018 OFFIS Institute for Information Technology
* Oldenburg, Germany
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "tvs/utils/report/report_base.h"
#include "tvs/utils/macros.h"
#include "tvs/utils/assert.h"
#include "tvs/utils/report.h"
#include "tvs/utils/report/macros_def.h"
#ifndef SYSX_NO_SYSTEMC
#include "tvs/utils/systemc.h"
#else
#include <iostream>
#include <stdexcept>
#endif
namespace sysx {
namespace report {
#if not defined(SYSX_NO_SYSTEMC)
/// local severity conversion function
inline static sc_core::sc_severity
sysx_severity_to_sc_severity(report_base::severity svrty);
#endif
report_base::report_base(const char* const msg_tpl,
severity s,
const char* const file,
int line)
: msg_(msg_tpl)
, active_(true)
, sev_(s)
, file_(file)
, line_(line)
, id_("<unknown>")
{}
message&
report_base::fill(const char* context)
{
// cache current ID - would be lost during trigger() called from destructor
id_ = this->get_id();
// include simulation context in message
if (context) {
msg_ << "\n";
#if not defined(SYSX_NO_SYSTEMC)
msg_ << "@" << ::sc_core::sc_time_stamp() << "~"
<< ::sc_core::sc_delta_count() << " "
<< sc_core::sc_get_current_process_handle().name();
#endif
msg_ << " in function " << context;
}
return msg_;
}
void
report_base::cancel()
{
active_ = false;
}
report_base::~report_base()
{
// cancel current message, another exception is on its way
if (std::uncaught_exception()) {
cancel();
}
this->trigger();
}
void
report_base::trigger() const
{
if (sysx_likely(active_)) {
using std::cerr;
using std::cout;
using std::endl;
#if 1
// is it a debug message?
if (sev_ & SYSX_SVRTY_DEBUG_) {
unsigned level = (sev_ ^ SYSX_SVRTY_DEBUG_);
if (level) { // write prefix, only if level is set
cout << lib_prefix << id_ << ": ";
}
// dump message
cout << msg_.combine();
if (level && file_ != file_unknown)
cout << "\n(file: " << file_ << ", line: " << line_ << ")";
cout << endl;
} else
#endif
{ // regular message
#if not defined(SYSX_NO_SYSTEMC)
sc_core::sc_severity scs = sysx_severity_to_sc_severity(sev_);
std::string msg_type(lib_prefix);
msg_type += id_;
// call SystemC report handler
sc_core::sc_report_handler::report(
scs, msg_type.c_str(), msg_.combine().c_str(), file_, line_);
#else // SYSX_NO_SYSTEMC -> print/throw run-time error
std::stringstream what;
std::ostream* out = NULL;
bool throw_msg = false;
switch (sev_) {
case SYSX_SVRTY_FATAL_:
case SYSX_SVRTY_ERROR_:
default:
out = &what;
throw_msg = true;
break;
case SYSX_SVRTY_WARNING_:
out = &std::cerr;
break;
case SYSX_SVRTY_INFO_:
case SYSX_SVRTY_DEBUG_:
out = &std::cout;
break;
}
*out << lib_prefix << id_ << ": " << msg_.combine();
if (file_ != file_unknown)
*out << "\n(file: " << file_ << ", line: " << line_ << ")";
if (throw_msg)
throw std::runtime_error(what.str());
#endif // SYSX_NO_SYSTEMC
}
}
}
#if not defined(SYSX_NO_SYSTEMC)
inline static sc_core::sc_severity
sysx_severity_to_sc_severity(report_base::severity svrty)
{
// match remaining debug messages to INFO severity
if (svrty & SYSX_SVRTY_DEBUG_)
svrty = SYSX_SVRTY_DEBUG_;
// translate to SystemC severity
sc_core::sc_severity scs = ::sc_core::SC_MAX_SEVERITY;
switch (svrty) {
#define SYSX_TRANSLATE_RPT_SVRTY_HELPER(sysx, sysc) \
case sysx: \
scs = ::sc_core::sysc; \
break
SYSX_TRANSLATE_RPT_SVRTY_HELPER(SYSX_SVRTY_FATAL_, SC_FATAL);
SYSX_TRANSLATE_RPT_SVRTY_HELPER(SYSX_SVRTY_ERROR_, SC_ERROR);
SYSX_TRANSLATE_RPT_SVRTY_HELPER(SYSX_SVRTY_WARNING_, SC_WARNING);
SYSX_TRANSLATE_RPT_SVRTY_HELPER(SYSX_SVRTY_INFO_, SC_INFO);
SYSX_TRANSLATE_RPT_SVRTY_HELPER(SYSX_SVRTY_DEBUG_, SC_INFO);
default:
SYSX_ASSERT(false && "Invalid report severity!");
#undef SYSX_TRANSLATE_RPT_SVRTY_HELPER
}
return scs;
}
#endif // not SYSX_NO_SYSTEMC
const char* const report_base::lib_prefix = SYSX_IMPL_REPORT_LIBRARY_PREFIX_;
const char* const report_base::file_unknown = "<unknown>";
const int report_base::line_unknown = -1;
} /* namespace report */
} /* namespace sysx */
/* Taf!
* :tag: (utils,s)
*/
|
///////////////////////////////////////////////////////////////////////////////////
// __ _ _ _ //
// / _(_) | | | | //
// __ _ _ _ ___ ___ _ __ | |_ _ ___| | __| | //
// / _` | | | |/ _ \/ _ \ '_ \| _| |/ _ \ |/ _` | //
// | (_| | |_| | __/ __/ | | | | | | __/ | (_| | //
// \__, |\__,_|\___|\___|_| |_|_| |_|\___|_|\__,_| //
// | | //
// |_| //
// //
// //
// Peripheral-NTM for MPSoC //
// Neural Turing Machine for MPSoC //
// //
///////////////////////////////////////////////////////////////////////////////////
///////////////////////////////////////////////////////////////////////////////////
// //
// Copyright (c) 2020-2024 by the author(s) //
// //
// Permission is hereby granted, free of charge, to any person obtaining a copy //
// of this software and associated documentation files (the "Software"), to deal //
// in the Software without restriction, including without limitation the rights //
// to use, copy, modify, merge, publish, distribute, sublicense, and/or sell //
// copies of the Software, and to permit persons to whom the Software is //
// furnished to do so, subject to the following conditions: //
// //
// The above copyright notice and this permission notice shall be included in //
// all copies or substantial portions of the Software. //
// //
// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR //
// IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, //
// FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE //
// AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER //
// LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, //
// OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN //
// THE SOFTWARE. //
// //
// ============================================================================= //
// Author(s): //
// Paco Reina Campo <[email protected]> //
// //
///////////////////////////////////////////////////////////////////////////////////
#include "ntm_state_vector_output_design.cpp"
#include "systemc.h"
int sc_main(int argc, char *argv[]) {
adder adder("ADDER");
sc_signal<int> Ain;
sc_signal<int> Bin;
sc_signal<bool> clock;
sc_signal<int> out;
adder(clock, Ain, Bin, out);
Ain = 1;
Bin = 2;
clock = 0;
sc_start(1, SC_NS);
clock = 1;
sc_start(1, SC_NS);
cout << "@" << sc_time_stamp() << ": A + B = " << out.read() << endl;
Ain = 2;
Bin = 2;
clock = 0;
sc_start(1, SC_NS);
clock = 1;
sc_start(1, SC_NS);
cout << "@" << sc_time_stamp() << ": A + B = " << out.read() << endl;
return 0;
}
|
///////////////////////////////////////////////////////////////////////////////////
// __ _ _ _ //
// / _(_) | | | | //
// __ _ _ _ ___ ___ _ __ | |_ _ ___| | __| | //
// / _` | | | |/ _ \/ _ \ '_ \| _| |/ _ \ |/ _` | //
// | (_| | |_| | __/ __/ | | | | | | __/ | (_| | //
// \__, |\__,_|\___|\___|_| |_|_| |_|\___|_|\__,_| //
// | | //
// |_| //
// //
// //
// Peripheral-NTM for MPSoC //
// Neural Turing Machine for MPSoC //
// //
///////////////////////////////////////////////////////////////////////////////////
///////////////////////////////////////////////////////////////////////////////////
// //
// Copyright (c) 2020-2024 by the author(s) //
// //
// Permission is hereby granted, free of charge, to any person obtaining a copy //
// of this software and associated documentation files (the "Software"), to deal //
// in the Software without restriction, including without limitation the rights //
// to use, copy, modify, merge, publish, distribute, sublicense, and/or sell //
// copies of the Software, and to permit persons to whom the Software is //
// furnished to do so, subject to the following conditions: //
// //
// The above copyright notice and this permission notice shall be included in //
// all copies or substantial portions of the Software. //
// //
// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR //
// IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, //
// FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE //
// AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER //
// LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, //
// OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN //
// THE SOFTWARE. //
// //
// ============================================================================= //
// Author(s): //
// Paco Reina Campo <[email protected]> //
// //
///////////////////////////////////////////////////////////////////////////////////
#include "ntm_state_matrix_feedforward_design.cpp"
#include "systemc.h"
int sc_main(int argc, char *argv[]) {
adder adder("ADDER");
sc_signal<int> Ain;
sc_signal<int> Bin;
sc_signal<bool> clock;
sc_signal<int> out;
adder(clock, Ain, Bin, out);
Ain = 1;
Bin = 2;
clock = 0;
sc_start(1, SC_NS);
clock = 1;
sc_start(1, SC_NS);
cout << "@" << sc_time_stamp() << ": A + B = " << out.read() << endl;
Ain = 2;
Bin = 2;
clock = 0;
sc_start(1, SC_NS);
clock = 1;
sc_start(1, SC_NS);
cout << "@" << sc_time_stamp() << ": A + B = " << out.read() << endl;
return 0;
}
|
///////////////////////////////////////////////////////////////////////////////////
// __ _ _ _ //
// / _(_) | | | | //
// __ _ _ _ ___ ___ _ __ | |_ _ ___| | __| | //
// / _` | | | |/ _ \/ _ \ '_ \| _| |/ _ \ |/ _` | //
// | (_| | |_| | __/ __/ | | | | | | __/ | (_| | //
// \__, |\__,_|\___|\___|_| |_|_| |_|\___|_|\__,_| //
// | | //
// |_| //
// //
// //
// Peripheral-NTM for MPSoC //
// Neural Turing Machine for MPSoC //
// //
///////////////////////////////////////////////////////////////////////////////////
///////////////////////////////////////////////////////////////////////////////////
// //
// Copyright (c) 2020-2024 by the author(s) //
// //
// Permission is hereby granted, free of charge, to any person obtaining a copy //
// of this software and associated documentation files (the "Software"), to deal //
// in the Software without restriction, including without limitation the rights //
// to use, copy, modify, merge, publish, distribute, sublicense, and/or sell //
// copies of the Software, and to permit persons to whom the Software is //
// furnished to do so, subject to the following conditions: //
// //
// The above copyright notice and this permission notice shall be included in //
// all copies or substantial portions of the Software. //
// //
// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR //
// IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, //
// FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE //
// AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER //
// LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, //
// OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN //
// THE SOFTWARE. //
// //
// ============================================================================= //
// Author(s): //
// Paco Reina Campo <[email protected]> //
// //
///////////////////////////////////////////////////////////////////////////////////
#include "dnc_memory_matrix_design.cpp"
#include "systemc.h"
int sc_main(int argc, char *argv[]) {
adder adder("ADDER");
sc_signal<int> Ain;
sc_signal<int> Bin;
sc_signal<bool> clock;
sc_signal<int> out;
adder(clock, Ain, Bin, out);
Ain = 1;
Bin = 2;
clock = 0;
sc_start(1, SC_NS);
clock = 1;
sc_start(1, SC_NS);
cout << "@" << sc_time_stamp() << ": A + B = " << out.read() << endl;
Ain = 2;
Bin = 2;
clock = 0;
sc_start(1, SC_NS);
clock = 1;
sc_start(1, SC_NS);
cout << "@" << sc_time_stamp() << ": A + B = " << out.read() << endl;
return 0;
}
|
/*****************************************************************************
Licensed to Accellera Systems Initiative Inc. (Accellera) under one or
more contributor license agreements. See the NOTICE file distributed
with this work for additional information regarding copyright ownership.
Accellera licenses this file to you under the Apache License, Version 2.0
(the "License"); you may not use this file except in compliance with the
License. You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
implied. See the License for the specific language governing
permissions and limitations under the License.
*****************************************************************************/
/*****************************************************************************
fetch.cpp -- Instruction Fetch Unit.
Original Author: Martin Wang, Synopsys, Inc.
*****************************************************************************/
/*****************************************************************************
MODIFICATION LOG - modifiers, enter your name, affiliation, date and
changes you are making here.
Name, Affiliation, Date:
Description of Modification:
*****************************************************************************/
#include "systemc.h"
#include "fetch.h"
#include "directive.h"
void fetch::entry()
{
unsigned addr_tmp=0;
unsigned datai_tmp=0;
unsigned lock_tmp = 0;
addr_tmp = 1;
// Now booting from default values
reset.write(true);
ram_cs.write(true);
ram_we.write(false);
address.write(addr_tmp);
wait(memory_latency); // For data to appear
do { wait(); } while ( !((bios_valid == true) || (icache_valid == true)) );
if (stall_fetch.read() == true) {
datai_tmp = 0;
} else {
datai_tmp = ramdata.read();
}
cout.setf(ios::hex,ios::basefield);
cout << "-----------------------" << endl;
cout << "IFU :" << " mem=0x" << datai_tmp << endl;
cout << "IFU : pc= " << addr_tmp ;
cout.setf(ios::dec,ios::basefield);
cout << " at CSIM " << sc_time_stamp() << endl;
cout << "-----------------------" << endl;
instruction_valid.write(true);
instruction.write(datai_tmp);
program_counter.write(addr_tmp);
ram_cs.write(false);
wait();
instruction_valid.write(false);
addr_tmp++;
wait();
while (true) {
if (addr_tmp == 5) {
reset.write(false);
}
if (interrupt.read() == true) {
ram_cs.write(true);
addr_tmp = int_vectno.read();
ram_we.write(false);
wait(memory_latency);
datai_tmp = ramdata.read();
printf("IF ALERT: **INTERRUPT**\n");
cout.setf(ios::hex,ios::basefield);
cout << "------------------------" << endl;
cout << "IFU :" << " mem=0x" << datai_tmp << endl;
cout << "IFU : pc= " << addr_tmp ;
cout.setf(ios::dec,ios::basefield);
cout << " at CSIM " << sc_time_stamp() << endl;
cout << "------------------------" << endl;
instruction_valid.write(true);
instruction.write(datai_tmp);
ram_cs.write(false);
interrupt_ack.write(true);
if (next_pc.read() == true) { addr_tmp++; }
wait();
instruction_valid.write(false);
interrupt_ack.write(false);
wait();
}
if (branch_valid.read() == true) {
printf("IFU ALERT: **BRANCH**\n");
lock_tmp ++;
ram_cs.write(true);
addr_tmp = branch_address.read();
ram_we.write(false);
wait(memory_latency);
do { wait(); } while ( !((bios_valid == true) || (icache_valid == true)) );
datai_tmp = ramdata.read();
cout.setf(ios::hex,ios::basefield);
cout << "------------------------" << endl;
cout << "IFU :" << " mem=0x" << datai_tmp << endl;
cout << "IFU : pc= " << addr_tmp ;
cout.setf(ios::dec,ios::basefield);
cout << " at CSIM " << sc_time_stamp() << endl;
cout << "------------------------" << endl;
instruction_valid.write(true);
instruction.write(datai_tmp);
ram_cs.write(false);
if (next_pc.read() == true) { addr_tmp++; }
wait();
instruction_valid.write(false);
wait();
} else {
lock_tmp = 0;
ram_cs.write(true);
address.write(addr_tmp);
ram_we.write(false);
wait(memory_latency); // For data to appear
do { wait(); } while ( !((bios_valid == true) || (icache_valid == true)) );
datai_tmp = ramdata.read();
cout.setf(ios::hex,ios::basefield);
cout << "------------------------" << endl;
cout << "IFU :" << " mem=0x" << datai_tmp << endl;
cout << "IFU : pc= " << addr_tmp ;
cout.setf(ios::dec,ios::basefield);
cout << " at CSIM " << sc_time_stamp() << endl;
cout << "------------------------" << endl;
instruction_valid.write(true);
instruction.write(datai_tmp);
program_counter.write(addr_tmp);
branch_clear.write(false);
ram_cs.write(false);
if (next_pc.read() == true) { addr_tmp++; }
wait();
instruction_valid.write(false);
wait();
}
if (lock_tmp == 1) {
branch_clear.write(true);
wait();
}
/* Unless you wanted to write to your instruction cache. Usually Instruction cache is read only.
// Write memory location first
chip_select.write(true);
write_enable.write(true);
address.write(addr);
instruction_write.write(datao);
printf("fetch: Data Written = %x at address %x\n", datao, addr);
wait(memory_latency); // To make all the outputs appear at the interface
// some process functionality not shown here during which chip
// chip select is deasserted and bus is tristated
chip_select.write(false);
instruction_write.write(0);
wait();
*/
}
} // end of entry function
|
/*****************************************************************************
Licensed to Accellera Systems Initiative Inc. (Accellera) under one or
more contributor license agreements. See the NOTICE file distributed
with this work for additional information regarding copyright ownership.
Accellera licenses this file to you under the Apache License, Version 2.0
(the "License"); you may not use this file except in compliance with the
License. You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
implied. See the License for the specific language governing
permissions and limitations under the License.
*****************************************************************************/
/*****************************************************************************
stimulus.cpp --
Original Author: Rocco Jonack, Synopsys, Inc.
*****************************************************************************/
/*****************************************************************************
MODIFICATION LOG - modifiers, enter your name, affiliation, date and
changes you are making here.
Name, Affiliation, Date:
Description of Modification:
*****************************************************************************/
#include <systemc.h>
#include "stimulus.h"
void stimulus::entry() {
cycle++;
// sending some reset values
if (cycle<4) {
reset.write(true);
input_valid.write(false);
} else {
reset.write(false);
input_valid.write( false );
// sending normal mode values
if (cycle%10==0) {
input_valid.write(true);
sample.write( (int)send_value1 );
cout << "Stimuli : " << (int)send_value1 << " at time "
/* << sc_time_stamp() << endl; */
<< sc_time_stamp().to_double() << endl;
send_value1++;
};
}
}
|
/*****************************************************************************
Licensed to Accellera Systems Initiative Inc. (Accellera) under one or
more contributor license agreements. See the NOTICE file distributed
with this work for additional information regarding copyright ownership.
Accellera licenses this file to you under the Apache License, Version 2.0
(the "License"); you may not use this file except in compliance with the
License. You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
implied. See the License for the specific language governing
permissions and limitations under the License.
*****************************************************************************/
/*****************************************************************************
stimulus.cpp --
Original Author: Rocco Jonack, Synopsys, Inc.
*****************************************************************************/
/*****************************************************************************
MODIFICATION LOG - modifiers, enter your name, affiliation, date and
changes you are making here.
Name, Affiliation, Date:
Description of Modification:
*****************************************************************************/
#include <systemc.h>
#include "stimulus.h"
void stimulus::entry() {
cycle++;
// sending some reset values
if (cycle<4) {
reset.write(true);
input_valid.write(false);
} else {
reset.write(false);
input_valid.write( false );
// sending normal mode values
if (cycle%10==0) {
input_valid.write(true);
sample.write( (int)send_value1 );
cout << "Stimuli : " << (int)send_value1 << " at time "
/* << sc_time_stamp() << endl; */
<< sc_time_stamp().to_double() << endl;
send_value1++;
};
}
}
|
///////////////////////////////////////////////////////////////////////////////////
// __ _ _ _ //
// / _(_) | | | | //
// __ _ _ _ ___ ___ _ __ | |_ _ ___| | __| | //
// / _` | | | |/ _ \/ _ \ '_ \| _| |/ _ \ |/ _` | //
// | (_| | |_| | __/ __/ | | | | | | __/ | (_| | //
// \__, |\__,_|\___|\___|_| |_|_| |_|\___|_|\__,_| //
// | | //
// |_| //
// //
// //
// Peripheral-NTM for MPSoC //
// Neural Turing Machine for MPSoC //
// //
///////////////////////////////////////////////////////////////////////////////////
///////////////////////////////////////////////////////////////////////////////////
// //
// Copyright (c) 2020-2024 by the author(s) //
// //
// Permission is hereby granted, free of charge, to any person obtaining a copy //
// of this software and associated documentation files (the "Software"), to deal //
// in the Software without restriction, including without limitation the rights //
// to use, copy, modify, merge, publish, distribute, sublicense, and/or sell //
// copies of the Software, and to permit persons to whom the Software is //
// furnished to do so, subject to the following conditions: //
// //
// The above copyright notice and this permission notice shall be included in //
// all copies or substantial portions of the Software. //
// //
// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR //
// IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, //
// FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE //
// AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER //
// LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, //
// OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN //
// THE SOFTWARE. //
// //
// ============================================================================= //
// Author(s): //
// Paco Reina Campo <[email protected]> //
// //
///////////////////////////////////////////////////////////////////////////////////
#include "ntm_lstm_activation_u_trainer_design.cpp"
#include "systemc.h"
int sc_main(int argc, char *argv[]) {
adder adder("ADDER");
sc_signal<int> Ain;
sc_signal<int> Bin;
sc_signal<bool> clock;
sc_signal<int> out;
adder(clock, Ain, Bin, out);
Ain = 1;
Bin = 2;
clock = 0;
sc_start(1, SC_NS);
clock = 1;
sc_start(1, SC_NS);
cout << "@" << sc_time_stamp() << ": A + B = " << out.read() << endl;
Ain = 2;
Bin = 2;
clock = 0;
sc_start(1, SC_NS);
clock = 1;
sc_start(1, SC_NS);
cout << "@" << sc_time_stamp() << ": A + B = " << out.read() << endl;
return 0;
}
|
///////////////////////////////////////////////////////////////////////////////////
// __ _ _ _ //
// / _(_) | | | | //
// __ _ _ _ ___ ___ _ __ | |_ _ ___| | __| | //
// / _` | | | |/ _ \/ _ \ '_ \| _| |/ _ \ |/ _` | //
// | (_| | |_| | __/ __/ | | | | | | __/ | (_| | //
// \__, |\__,_|\___|\___|_| |_|_| |_|\___|_|\__,_| //
// | | //
// |_| //
// //
// //
// Peripheral-NTM for MPSoC //
// Neural Turing Machine for MPSoC //
// //
///////////////////////////////////////////////////////////////////////////////////
///////////////////////////////////////////////////////////////////////////////////
// //
// Copyright (c) 2020-2024 by the author(s) //
// //
// Permission is hereby granted, free of charge, to any person obtaining a copy //
// of this software and associated documentation files (the "Software"), to deal //
// in the Software without restriction, including without limitation the rights //
// to use, copy, modify, merge, publish, distribute, sublicense, and/or sell //
// copies of the Software, and to permit persons to whom the Software is //
// furnished to do so, subject to the following conditions: //
// //
// The above copyright notice and this permission notice shall be included in //
// all copies or substantial portions of the Software. //
// //
// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR //
// IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, //
// FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE //
// AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER //
// LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, //
// OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN //
// THE SOFTWARE. //
// //
// ============================================================================= //
// Author(s): //
// Paco Reina Campo <[email protected]> //
// //
///////////////////////////////////////////////////////////////////////////////////
#include "ntm_lstm_activation_u_trainer_design.cpp"
#include "systemc.h"
int sc_main(int argc, char *argv[]) {
adder adder("ADDER");
sc_signal<int> Ain;
sc_signal<int> Bin;
sc_signal<bool> clock;
sc_signal<int> out;
adder(clock, Ain, Bin, out);
Ain = 1;
Bin = 2;
clock = 0;
sc_start(1, SC_NS);
clock = 1;
sc_start(1, SC_NS);
cout << "@" << sc_time_stamp() << ": A + B = " << out.read() << endl;
Ain = 2;
Bin = 2;
clock = 0;
sc_start(1, SC_NS);
clock = 1;
sc_start(1, SC_NS);
cout << "@" << sc_time_stamp() << ": A + B = " << out.read() << endl;
return 0;
}
|
/*
* @ASCK
*/
#include <systemc.h>
SC_MODULE (Memory) {
sc_in <bool> r_nw;
sc_in <sc_uint<13>> addr;
sc_in <sc_int<8>> data;
sc_out <sc_int<8>> out;
/*
** module global variables
*/
sc_int<8> mem[8192] = {0}; // 2^13 rows
bool done = false;
SC_CTOR (Memory){
SC_METHOD (process);
sensitive << r_nw << addr << data;
}
void process () {
if(done){
return;
}
if(addr.read() < 8192){
if(r_nw.read()){
out.write(mem[addr.read()]);
}
else{
mem[addr.read()] = data.read();
out.write(mem[addr.read()]);
}
}
else{
out.write(0);
}
}
}; |
///////////////////////////////////////////////////////////////////////////////////
// __ _ _ _ //
// / _(_) | | | | //
// __ _ _ _ ___ ___ _ __ | |_ _ ___| | __| | //
// / _` | | | |/ _ \/ _ \ '_ \| _| |/ _ \ |/ _` | //
// | (_| | |_| | __/ __/ | | | | | | __/ | (_| | //
// \__, |\__,_|\___|\___|_| |_|_| |_|\___|_|\__,_| //
// | | //
// |_| //
// //
// //
// Peripheral-NTM for MPSoC //
// Neural Turing Machine for MPSoC //
// //
///////////////////////////////////////////////////////////////////////////////////
///////////////////////////////////////////////////////////////////////////////////
// //
// Copyright (c) 2020-2024 by the author(s) //
// //
// Permission is hereby granted, free of charge, to any person obtaining a copy //
// of this software and associated documentation files (the "Software"), to deal //
// in the Software without restriction, including without limitation the rights //
// to use, copy, modify, merge, publish, distribute, sublicense, and/or sell //
// copies of the Software, and to permit persons to whom the Software is //
// furnished to do so, subject to the following conditions: //
// //
// The above copyright notice and this permission notice shall be included in //
// all copies or substantial portions of the Software. //
// //
// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR //
// IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, //
// FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE //
// AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER //
// LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, //
// OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN //
// THE SOFTWARE. //
// //
// ============================================================================= //
// Author(s): //
// Paco Reina Campo <[email protected]> //
// //
///////////////////////////////////////////////////////////////////////////////////
#include "ntm_lstm_activation_u_trainer_design.cpp"
#include "systemc.h"
int sc_main(int argc, char *argv[]) {
adder adder("ADDER");
sc_signal<int> Ain;
sc_signal<int> Bin;
sc_signal<bool> clock;
sc_signal<int> out;
adder(clock, Ain, Bin, out);
Ain = 1;
Bin = 2;
clock = 0;
sc_start(1, SC_NS);
clock = 1;
sc_start(1, SC_NS);
cout << "@" << sc_time_stamp() << ": A + B = " << out.read() << endl;
Ain = 2;
Bin = 2;
clock = 0;
sc_start(1, SC_NS);
clock = 1;
sc_start(1, SC_NS);
cout << "@" << sc_time_stamp() << ": A + B = " << out.read() << endl;
return 0;
}
|
///////////////////////////////////////////////////////////////////////////////////
// __ _ _ _ //
// / _(_) | | | | //
// __ _ _ _ ___ ___ _ __ | |_ _ ___| | __| | //
// / _` | | | |/ _ \/ _ \ '_ \| _| |/ _ \ |/ _` | //
// | (_| | |_| | __/ __/ | | | | | | __/ | (_| | //
// \__, |\__,_|\___|\___|_| |_|_| |_|\___|_|\__,_| //
// | | //
// |_| //
// //
// //
// Peripheral-NTM for MPSoC //
// Neural Turing Machine for MPSoC //
// //
///////////////////////////////////////////////////////////////////////////////////
///////////////////////////////////////////////////////////////////////////////////
// //
// Copyright (c) 2020-2024 by the author(s) //
// //
// Permission is hereby granted, free of charge, to any person obtaining a copy //
// of this software and associated documentation files (the "Software"), to deal //
// in the Software without restriction, including without limitation the rights //
// to use, copy, modify, merge, publish, distribute, sublicense, and/or sell //
// copies of the Software, and to permit persons to whom the Software is //
// furnished to do so, subject to the following conditions: //
// //
// The above copyright notice and this permission notice shall be included in //
// all copies or substantial portions of the Software. //
// //
// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR //
// IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, //
// FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE //
// AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER //
// LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, //
// OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN //
// THE SOFTWARE. //
// //
// ============================================================================= //
// Author(s): //
// Paco Reina Campo <[email protected]> //
// //
///////////////////////////////////////////////////////////////////////////////////
#include "ntm_lstm_activation_u_trainer_design.cpp"
#include "systemc.h"
int sc_main(int argc, char *argv[]) {
adder adder("ADDER");
sc_signal<int> Ain;
sc_signal<int> Bin;
sc_signal<bool> clock;
sc_signal<int> out;
adder(clock, Ain, Bin, out);
Ain = 1;
Bin = 2;
clock = 0;
sc_start(1, SC_NS);
clock = 1;
sc_start(1, SC_NS);
cout << "@" << sc_time_stamp() << ": A + B = " << out.read() << endl;
Ain = 2;
Bin = 2;
clock = 0;
sc_start(1, SC_NS);
clock = 1;
sc_start(1, SC_NS);
cout << "@" << sc_time_stamp() << ": A + B = " << out.read() << endl;
return 0;
}
|
/**********************************************************************
Filename: E_fir_pe.h
Purpose : FPGA Emulated PE of Systolic FIR filter
Author : [email protected]
History : Mar. 2024, First release
***********************************************************************/
#ifndef _E_FIR_PE_H_
#define _E_FIR_PE_H_
#include <systemc.h>
// Includes for accessing Arduino via serial port
#include <stdio.h>
#include <string.h>
#include <unistd.h>
#include <fcntl.h>
#include <termios.h>
SC_MODULE(E_fir_pe)
{
sc_in<bool> clk;
sc_in<bool> Rdy;
sc_out<bool> Vld;
sc_in<sc_uint<8> > Cin;
sc_in<sc_uint<4> > Xin;
sc_out<sc_uint<4> > Xout;
sc_in<sc_uint<4> > Yin;
sc_out<sc_uint<4> > Yout;
#define N_TX 3
#define N_RX 2
void pe_thread(void)
{
uint8_t x, y, txPacket[N_TX], rxPacket[N_RX];
while(true)
{
// Positive edge Clock
wait(clk.posedge_event());
txPacket[0] = (uint8_t)Cin.read(); // Cin
txPacket[1] = (uint8_t)(Yin.read())<<4 | (uint8_t)(Xin.read()); // Yin | Xin
txPacket[2] = (uint8_t)Rdy.read();
// Send to Emulator
for (int i=0; i<N_TX; i++)
{
x = txPacket[i];
while(write(fd, &x, 1)<=0) usleep(1);
}
// Receive from Emulator
for (int i=0; i<N_RX; i++)
{
while(read(fd, &y, 1)<=0) usleep(1);
rxPacket[i] = y;
}
Yout.write((sc_uint<4>)(rxPacket[0]>>4));
Xout.write((sc_uint<4>)(rxPacket[0] & 0x0F));
Vld.write(rxPacket[1]? true:false);
}
}
// Arduino Serial IF
int fd; // Serial port file descriptor
struct termios options; // Serial port setting
SC_CTOR(E_fir_pe):
clk("clk"),
Cin("Cin"), Xin("Xin"), Xout("Xout"),
Yin("Yin"), Yout("Yout")
{
SC_THREAD(pe_thread);
sensitive << clk;
// Arduino DUT
//fd = open("/dev/ttyACM0", O_RDWR | O_NDELAY | O_NOCTTY);
fd = open("/dev/ttyACM0", O_RDWR | O_NOCTTY);
if (fd < 0)
{
perror("Error opening serial port");
return;
}
// Set up serial port
options.c_cflag = B115200 | CS8 | CLOCAL | CREAD;
options.c_iflag = IGNPAR;
options.c_oflag = 0;
options.c_lflag = 0;
// Apply the settings
tcflush(fd, TCIFLUSH);
tcsetattr(fd, TCSANOW, &options);
// Establish Contact
int len = 0;
char rx;
while(!len)
len = read(fd, &rx, 1);
if (rx=='A')
write(fd, &rx, 1);
printf("Connection established...\n");
}
~E_fir_pe(void)
{
}
};
#endif
|
#include <systemc.h>
#ifndef CONSUMER_H_
#define CONSUMER_H_
SC_MODULE(Consumer){
sc_in<int> data;
int readNumber;
SC_CTOR(Consumer){
SC_METHOD(consume);
sensitive << data;
}
void consume()
{
readNumber = data.read();
//readNumber = data; //geht bei SC_SIGNAL auch
cout << "[" << sc_time_stamp() << " / " << sc_delta_count() << "](" << name() << "): read " << readNumber << endl;
}
};
#endif
|
/*******************************************************************************
* gpio_matrix.h -- Copyright 2019 (c) Glenn Ramalho - RFIDo Design
*******************************************************************************
* Description:
* Models the ESP32 GPIO Matrix
*******************************************************************************
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*******************************************************************************
*/
#ifndef _GPIO_MATRIX_H
#define _GPIO_MATRIX_H
#include <systemc.h>
#include "netcon.h"
#include "mux_in.h"
#include "mux_out.h"
#include "pcntbus.h"
#include "mux_pcnt.h"
#include "gn_mixed.h"
#include "io_mux.h"
struct gpio_matrix;
#include "soc/gpio_struct.h"
#define GPIOMATRIX_CNT 40
#define GPIOMATRIX_DIRECT 40
#define GPIOMATRIX_LOGIC0 41
#define GPIOMATRIX_LOGIC1 42
#define GPIOMATRIX_ALL 43
/* To make the functions easier to read, we make a shortcut to connecting
* a function.
*/
#define CONNECTFUNC(iomuxdg,fins,fens,fouts) { \
iomuxdg.fin(fins); \
iomuxdg.fen(fens); \
iomuxdg.fout(fouts); \
}
/* The out muxes too must have the exact same inputs in and each is connected
* to one GPIO.
*/
#define CONNECTOUTMUX(dg) { \
i_mux_out##dg.mout_o(mout_s[dg]); \
i_mux_out##dg.men_o(men_s[dg]); \
i_mux_out##dg.uart0tx_i(uart0tx_i); \
i_mux_out##dg.uart1tx_i(uart1tx_i); \
i_mux_out##dg.uart2tx_i(uart2tx_i); \
i_mux_out##dg.ledc_sig_hs_i(ledc_sig_hs_i); \
i_mux_out##dg.ledc_sig_ls_i(ledc_sig_ls_i); \
i_mux_out##dg.hspi_d_oen_i(hspi_d_oen_i); \
i_mux_out##dg.hspi_d_out_i(hspi_d_out_i); \
i_mux_out##dg.hspi_q_oen_i(hspi_q_oen_i); \
i_mux_out##dg.hspi_q_out_i(hspi_q_out_i); \
i_mux_out##dg.hspi_cs0_oen_i(hspi_cs0_oen_i); \
i_mux_out##dg.hspi_cs0_out_i(hspi_cs0_out_i); \
i_mux_out##dg.hspi_clk_oen_i(hspi_clk_oen_i); \
i_mux_out##dg.hspi_clk_out_i(hspi_clk_out_i); \
i_mux_out##dg.hspi_wp_oen_i(hspi_wp_oen_i); \
i_mux_out##dg.hspi_wp_out_i(hspi_wp_out_i); \
i_mux_out##dg.hspi_hd_oen_i(hspi_hd_oen_i); \
i_mux_out##dg.hspi_hd_out_i(hspi_hd_out_i); \
i_mux_out##dg.vspi_d_oen_i(vspi_d_oen_i); \
i_mux_out##dg.vspi_d_out_i(vspi_d_out_i); \
i_mux_out##dg.vspi_q_oen_i(vspi_q_oen_i); \
i_mux_out##dg.vspi_q_out_i(vspi_q_out_i); \
i_mux_out##dg.vspi_cs0_oen_i(vspi_cs0_oen_i); \
i_mux_out##dg.vspi_cs0_out_i(vspi_cs0_out_i); \
i_mux_out##dg.vspi_cs1_oen_i(vspi_cs1_oen_i); \
i_mux_out##dg.vspi_cs1_out_i(vspi_cs1_out_i); \
i_mux_out##dg.vspi_cs2_oen_i(vspi_cs2_oen_i); \
i_mux_out##dg.vspi_cs2_out_i(vspi_cs2_out_i); \
i_mux_out##dg.vspi_clk_oen_i(vspi_clk_oen_i); \
i_mux_out##dg.vspi_clk_out_i(vspi_clk_out_i); \
i_mux_out##dg.vspi_wp_oen_i(vspi_wp_oen_i); \
i_mux_out##dg.vspi_wp_out_i(vspi_wp_out_i); \
i_mux_out##dg.vspi_hd_oen_i(vspi_hd_oen_i); \
i_mux_out##dg.vspi_hd_out_i(vspi_hd_out_i); \
i_mux_out##dg.sda0_en_i(sda0_en_i); \
i_mux_out##dg.scl0_en_i(scl0_en_i); \
i_mux_out##dg.sda1_en_i(sda1_en_i); \
i_mux_out##dg.scl1_en_i(scl1_en_i); \
}
#define CONNECTINMUX(block, outsig, directsig) \
block.out_o(outsig); \
for(g = 0; g < GPIOMATRIX_CNT; g = g + 1) block.min_i(min_s[g]); \
block.min_i(directsig); \
block.min_i(logic_0); \
block.min_i(logic_1);
SC_MODULE(gpio_matrix) {
sc_inout<gn_mixed> d0_a11 {"d0_a11"}; /* BOOT button */
sc_inout<gn_mixed> d1 {"d1"};
sc_inout<gn_mixed> d2_a12 {"d2_a12"}; /* LED */
sc_inout<gn_mixed> d3 {"d3"};
sc_inout<gn_mixed> d4_a10 {"d4_a10"};
sc_inout<gn_mixed> d5 {"d5"};
sc_inout<gn_mixed> d12_a15 {"d12_a15"};
sc_inout<gn_mixed> d13_a14 {"d13_a14"};
sc_inout<gn_mixed> d14_a16 {"d14_a16"};
sc_inout<gn_mixed> d15_a13 {"d15_a13"};
sc_inout<gn_mixed> d16 {"d16"};
sc_inout<gn_mixed> d17 {"d17"};
sc_inout<gn_mixed> d18 {"d18"};
sc_inout<gn_mixed> d19 {"d19"};
sc_inout<gn_mixed> d21 {"d21"};
sc_inout<gn_mixed> d22 {"d22"};
sc_inout<gn_mixed> d23 {"d23"};
sc_inout<gn_mixed> d25_a18 {"d25_a18"};
sc_inout<gn_mixed> d26_a19 {"d26_a19"};
sc_inout<gn_mixed> d27_a17 {"d27_a17"};
sc_inout<gn_mixed> d32_a4 {"d32_a4"};
sc_inout<gn_mixed> d33_a5 {"d33_a5"};
sc_inout<gn_mixed> d34_a6 {"d34_a6"};
sc_inout<gn_mixed> d35_a7 {"d35_a7"};
sc_inout<gn_mixed> d36_a0 {"d36_a0"};
sc_inout<gn_mixed> d37_a1 {"d37_a1"};
sc_inout<gn_mixed> d38_a2 {"d38_a2"};
sc_inout<gn_mixed> d39_a3 {"d39_a3"};
/* PCNT and LEDC */
sc_port<sc_signal_out_if<pcntbus_t>,8> pcntbus_o;
sc_port<sc_signal_in_if<bool>,8> ledc_sig_hs_i;
sc_port<sc_signal_in_if<bool>,8> ledc_sig_ls_i;
/* UARTS */
sc_out<bool> uart0rx_o {"uart0rx_o"};
sc_in<bool> uart0tx_i {"uart0tx_i"};
sc_out<bool> uart1rx_o {"uart1rx_o"};
sc_in<bool> uart1tx_i {"uart1tx_i"};
sc_out<bool> uart2rx_o {"uart2rx_o"};
sc_in<bool> uart2tx_i {"uart2tx_i"};
/* SPI */
sc_in<bool> hspi_d_oen_i {"hspi_d_oen_i"};
sc_in<bool> hspi_d_out_i {"hspi_d_out_i"};
sc_out<bool> hspi_d_in_o {"hspi_d_in_o"};
sc_in<bool> hspi_q_oen_i {"hspi_q_oen_i"};
sc_in<bool> hspi_q_out_i {"hspi_q_out_i"};
sc_out<bool> hspi_q_in_o {"hspi_q_in_o"};
sc_in<bool> hspi_cs0_oen_i {"hspi_cs0_oen_i"};
sc_in<bool> hspi_cs0_out_i {"hspi_cs0_out_i"};
sc_out<bool> hspi_cs0_in_o {"hspi_cs0_in_o"};
sc_in<bool> hspi_clk_oen_i {"hspi_clk_oen_i"};
sc_in<bool> hspi_clk_out_i {"hspi_clk_out_i"};
sc_out<bool> hspi_clk_in_o {"hspi_clk_in_o"};
sc_in<bool> hspi_wp_oen_i {"hspi_wp_oen_i"};
sc_in<bool> hspi_wp_out_i {"hspi_wp_out_i"};
sc_out<bool> hspi_wp_in_o {"hspi_wp_in_o"};
sc_in<bool> hspi_hd_oen_i {"hspi_hd_oen_i"};
sc_in<bool> hspi_hd_out_i {"hspi_hd_out_i"};
sc_out<bool> hspi_hd_in_o {"hspi_hd_in_o"};
sc_in<bool> vspi_d_oen_i {"vspi_d_oen_i"};
sc_in<bool> vspi_d_out_i {"vspi_d_out_i"};
sc_out<bool> vspi_d_in_o {"vspi_d_in_o"};
sc_in<bool> vspi_q_oen_i {"vspi_q_oen_i"};
sc_in<bool> vspi_q_out_i {"vspi_q_out_i"};
sc_out<bool> vspi_q_in_o {"vspi_q_in_o"};
sc_in<bool> vspi_cs0_oen_i {"vspi_cs0_oen_i"};
sc_in<bool> vspi_cs0_out_i {"vspi_cs0_out_i"};
sc_out<bool> vspi_cs0_in_o {"vspi_cs0_in_o"};
sc_in<bool> vspi_cs1_oen_i {"vspi_cs1_oen_i"};
sc_in<bool> vspi_cs1_out_i {"vspi_cs1_out_i"};
sc_out<bool> vspi_cs1_in_o {"vspi_cs1_in_o"};
sc_in<bool> vspi_cs2_oen_i {"vspi_cs2_oen_i"};
sc_in<bool> vspi_cs2_out_i {"vspi_cs2_out_i"};
sc_out<bool> vspi_cs2_in_o {"vspi_cs2_in_o"};
sc_in<bool> vspi_clk_oen_i {"vspi_clk_oen_i"};
sc_in<bool> vspi_clk_out_i {"vspi_clk_out_i"};
sc_out<bool> vspi_clk_in_o {"vspi_clk_in_o"};
sc_in<bool> vspi_wp_oen_i {"vspi_wp_oen_i"};
sc_in<bool> vspi_wp_out_i {"vspi_wp_out_i"};
sc_out<bool> vspi_wp_in_o {"vspi_wp_in_o"};
sc_in<bool> vspi_hd_oen_i {"vspi_hd_oen_i"};
sc_in<bool> vspi_hd_out_i {"vspi_hd_out_i"};
sc_out<bool> vspi_hd_in_o {"vspi_hd_in_o"};
/* I2C */
sc_in<bool> sda0_en_i {"sda0_en_i"};
sc_in<bool> sda1_en_i {"sda1_en_i"};
sc_in<bool> scl0_en_i {"scl0_en_i"};
sc_in<bool> scl1_en_i {"scl1_en_i"};
sc_out<bool> scl0_o {"scl0_o"};
sc_out<bool> sda0_o {"sda0_o"};
sc_out<bool> scl1_o {"scl1_o"};
sc_out<bool> sda1_o {"sda1_o"};
/* Submodules */
mux_pcnt i_mux_pcnt {"i_mux_pcnt"};
mux_in i_mux_hspi_d {"i_mux_hspi_d", GPIOMATRIX_LOGIC1};
mux_in i_mux_hspi_q {"i_mux_hspi_q", GPIOMATRIX_LOGIC1};
mux_in i_mux_hspi_hd {"i_mux_hspi_hd", GPIOMATRIX_LOGIC1};
mux_in i_mux_hspi_wp {"i_mux_hspi_wp", GPIOMATRIX_LOGIC1};
mux_in i_mux_hspi_clk {"i_mux_hspi_clk", GPIOMATRIX_LOGIC1};
mux_in i_mux_hspi_cs0 {"i_mux_hspi_cs0", GPIOMATRIX_LOGIC1};
mux_in i_mux_vspi_d {"i_mux_vspi_d", GPIOMATRIX_LOGIC1};
mux_in i_mux_vspi_q {"i_mux_vspi_q", GPIOMATRIX_LOGIC1};
mux_in i_mux_vspi_hd {"i_mux_vspi_hd", GPIOMATRIX_LOGIC1};
mux_in i_mux_vspi_wp {"i_mux_vspi_wp", GPIOMATRIX_LOGIC1};
mux_in i_mux_vspi_clk {"i_mux_vspi_clk", GPIOMATRIX_LOGIC1};
mux_in i_mux_vspi_cs0 {"i_mux_vspi_cs0", GPIOMATRIX_LOGIC1};
mux_in i_mux_vspi_cs1 {"i_mux_vspi_cs1", GPIOMATRIX_LOGIC1};
mux_in i_mux_vspi_cs2 {"i_mux_vspi_cs2", GPIOMATRIX_LOGIC1};
mux_in i_mux_i2c_sda0 {"i_mux_i2c_sda0", GPIOMATRIX_LOGIC1};
mux_in i_mux_i2c_sda1 {"i_mux_i2c_sda1", GPIOMATRIX_LOGIC1};
mux_in i_mux_i2c_scl0 {"i_mux_i2c_scl0", GPIOMATRIX_LOGIC1};
mux_in i_mux_i2c_scl1 {"i_mux_i2c_scl1", GPIOMATRIX_LOGIC1};
mux_in i_mux_uart0 {"i_mux_uart0", GPIOMATRIX_LOGIC1};
mux_in i_mux_uart1 {"i_mux_uart1", GPIOMATRIX_LOGIC1};
mux_in i_mux_uart2 {"i_mux_uart2", GPIOMATRIX_LOGIC1};
mux_out i_mux_out0 {"i_mux_out0"};
mux_out i_mux_out1 {"i_mux_out1"};
mux_out i_mux_out2 {"i_mux_out2"};
mux_out i_mux_out3 {"i_mux_out3"};
mux_out i_mux_out4 {"i_mux_out4"};
mux_out i_mux_out5 {"i_mux_out5"};
mux_out i_mux_out12 {"i_mux_out12"};
mux_out i_mux_out13 {"i_mux_out13"};
mux_out i_mux_out14 {"i_mux_out14"};
mux_out i_mux_out15 {"i_mux_out15"};
mux_out i_mux_out16 {"i_mux_out16"};
mux_out i_mux_out17 {"i_mux_out17"};
mux_out i_mux_out18 {"i_mux_out18"};
mux_out i_mux_out19 {"i_mux_out19"};
mux_out i_mux_out21 {"i_mux_out21"};
mux_out i_mux_out22 {"i_mux_out22"};
mux_out i_mux_out23 {"i_mux_out23"};
mux_out i_mux_out25 {"i_mux_out25"};
mux_out i_mux_out26 {"i_mux_out26"};
mux_out i_mux_out27 {"i_mux_out27"};
mux_out i_mux_out32 {"i_mux_out32"};
mux_out i_mux_out33 {"i_mux_out33"};
mux_out i_mux_out34 {"i_mux_out34"};
mux_out i_mux_out35 {"i_mux_out35"};
mux_out i_mux_out36 {"i_mux_out36"};
mux_out i_mux_out37 {"i_mux_out37"};
mux_out i_mux_out38 {"i_mux_out38"};
mux_out i_mux_out39 {"i_mux_out39"};
mux_out *muxptr[40];
/* GPIOs */
io_mux i_mux_d0 {"i_mux_d0",
GPIOMODE_NONE | GPIOMODE_INPUT | GPIOMODE_OUTPUT | GPIOMODE_INOUT |
GPIOMODE_WPU | GPIOMODE_WPD | GPIOMODE_OD,
GPIOMODE_INPUT | GPIOMODE_WPU, false, 3};
io_mux i_mux_d1 {"i_mux_d1",
GPIOMODE_NONE | GPIOMODE_INPUT | GPIOMODE_OUTPUT | GPIOMODE_INOUT |
GPIOMODE_WPU | GPIOMODE_WPD | GPIOMODE_OD,
GPIOMODE_INPUT | GPIOMODE_WPU, false, 3};
io_mux i_mux_d2 {"i_mux_d2",
GPIOMODE_NONE | GPIOMODE_INPUT | GPIOMODE_OUTPUT | GPIOMODE_INOUT |
GPIOMODE_WPU | GPIOMODE_WPD | GPIOMODE_OD,
GPIOMODE_INPUT | GPIOMODE_WPD, false, 3};
io_mux i_mux_d3 {"i_mux_d3",
GPIOMODE_NONE | GPIOMODE_INPUT | GPIOMODE_OUTPUT | GPIOMODE_INOUT |
GPIOMODE_WPU | GPIOMODE_WPD | GPIOMODE_OD,
GPIOMODE_INPUT | GPIOMODE_WPU, false, 3};
io_mux i_mux_d4 {"i_mux_d4",
GPIOMODE_NONE | GPIOMODE_INPUT | GPIOMODE_OUTPUT | GPIOMODE_INOUT |
GPIOMODE_WPU | GPIOMODE_WPD | GPIOMODE_OD,
GPIOMODE_INPUT | GPIOMODE_WPD, false, 3};
io_mux i_mux_d5 {"i_mux_d5",
GPIOMODE_NONE | GPIOMODE_INPUT | GPIOMODE_OUTPUT | GPIOMODE_INOUT |
GPIOMODE_WPU | GPIOMODE_WPD | GPIOMODE_OD,
GPIOMODE_NONE, false, 3};
io_mux i_mux_d12 {"i_mux_d12",
GPIOMODE_NONE | GPIOMODE_INPUT | GPIOMODE_OUTPUT | GPIOMODE_INOUT |
GPIOMODE_WPU | GPIOMODE_WPD | GPIOMODE_OD,
GPIOMODE_INPUT | GPIOMODE_WPD, false, 3};
io_mux i_mux_d13{"i_mux_d13",
GPIOMODE_NONE | GPIOMODE_INPUT | GPIOMODE_OUTPUT | GPIOMODE_INOUT |
GPIOMODE_WPU | GPIOMODE_WPD | GPIOMODE_OD,
GPIOMODE_INPUT | GPIOMODE_WPU, false, 3}; /* Not quite, but ok for now */
io_mux i_mux_d14 {"i_mux_d14",
GPIOMODE_NONE | GPIOMODE_INPUT | GPIOMODE_OUTPUT | GPIOMODE_INOUT |
GPIOMODE_WPU | GPIOMODE_WPD | GPIOMODE_OD,
GPIOMODE_INPUT | GPIOMODE_WPD, false, 3}; /* Not quite, but ok for now */
io_mux i_mux_d15 {"i_mux_d15",
GPIOMODE_NONE | GPIOMODE_INPUT | GPIOMODE_OUTPUT | GPIOMODE_INOUT |
GPIOMODE_WPU | GPIOMODE_WPD | GPIOMODE_OD,
GPIOMODE_INPUT | GPIOMODE_WPU, false, 3};
io_mux i_mux_d16 {"i_mux_d16",
GPIOMODE_NONE | GPIOMODE_INPUT | GPIOMODE_OUTPUT | GPIOMODE_INOUT |
GPIOMODE_WPU | GPIOMODE_WPD | GPIOMODE_OD,
GPIOMODE_NONE, false, 3};
io_mux i_mux_d17 {"i_mux_d17",
GPIOMODE_NONE | GPIOMODE_INPUT | GPIOMODE_OUTPUT | GPIOMODE_INOUT |
GPIOMODE_WPU | GPIOMODE_WPD | GPIOMODE_OD,
GPIOMODE_NONE, false, 3};
io_mux i_mux_d18 {"i_mux_d18",
GPIOMODE_NONE | GPIOMODE_INPUT | GPIOMODE_OUTPUT | GPIOMODE_INOUT |
GPIOMODE_WPU | GPIOMODE_WPD | GPIOMODE_OD,
GPIOMODE_INPUT, false, 3};
io_mux i_mux_d19 {"i_mux_d19",
GPIOMODE_NONE | GPIOMODE_INPUT | GPIOMODE_OUTPUT | GPIOMODE_INOUT |
GPIOMODE_WPU | GPIOMODE_WPD | GPIOMODE_OD,
GPIOMODE_INPUT, false, 3};
/* There is no GPIO D20 */
io_mux i_mux_d21 {"i_mux_d21",
GPIOMODE_NONE | GPIOMODE_INPUT | GPIOMODE_OUTPUT | GPIOMODE_INOUT |
GPIOMODE_WPU | GPIOMODE_WPD | GPIOMODE_OD,
GPIOMODE_INPUT, false, 3};
io_mux i_mux_d22 {"i_mux_d22",
GPIOMODE_NONE | GPIOMODE_INPUT | GPIOMODE_OUTPUT | GPIOMODE_INOUT |
GPIOMODE_WPU | GPIOMODE_WPD | GPIOMODE_OD,
GPIOMODE_INPUT, false, 3};
io_mux i_mux_d23 {"i_mux_d23",
GPIOMODE_NONE | GPIOMODE_INPUT | GPIOMODE_OUTPUT | GPIOMODE_INOUT |
GPIOMODE_WPU | GPIOMODE_WPD | GPIOMODE_OD,
GPIOMODE_INPUT, false, 3};
/* There is no GPIO D24 */
io_mux i_mux_d25 {"i_mux_d25",
GPIOMODE_NONE | GPIOMODE_INPUT | GPIOMODE_OUTPUT | GPIOMODE_INOUT |
GPIOMODE_WPU | GPIOMODE_WPD | GPIOMODE_OD,
GPIOMODE_NONE, false, 3};
io_mux i_mux_d26 {"i_mux_d26",
GPIOMODE_NONE | GPIOMODE_INPUT | GPIOMODE_OUTPUT | GPIOMODE_INOUT |
GPIOMODE_WPU | GPIOMODE_WPD | GPIOMODE_OD,
GPIOMODE_NONE, false, 3};
io_mux i_mux_d27 {"i_mux_d27",
GPIOMODE_NONE | GPIOMODE_INPUT | GPIOMODE_OUTPUT | GPIOMODE_INOUT |
GPIOMODE_WPU | GPIOMODE_WPD | GPIOMODE_OD,
GPIOMODE_INPUT, false, 3};
/* There is no GPIO d28 */
/* There is no GPIO d29 */
/* There is no GPIO d30 */
/* There is no GPIO d31 */
io_mux i_mux_d32 {"i_mux_d32",
GPIOMODE_NONE | GPIOMODE_INPUT | GPIOMODE_OUTPUT | GPIOMODE_INOUT |
GPIOMODE_WPU | GPIOMODE_WPD | GPIOMODE_OD,
GPIOMODE_NONE, true, 3};
io_mux i_mux_d33 {"i_mux_d33",
GPIOMODE_NONE | GPIOMODE_INPUT | GPIOMODE_OUTPUT | GPIOMODE_INOUT |
GPIOMODE_WPU | GPIOMODE_WPD | GPIOMODE_OD,
GPIOMODE_NONE, true, 3};
io_mux i_mux_d34 {"i_mux_d34",
GPIOMODE_NONE | GPIOMODE_INPUT, GPIOMODE_NONE, true, 3};
io_mux i_mux_d35 {"i_mux_d35",
GPIOMODE_NONE | GPIOMODE_INPUT, GPIOMODE_NONE, true, 3};
io_mux i_mux_d36 {"i_mux_d36",
GPIOMODE_NONE | GPIOMODE_INPUT, GPIOMODE_NONE, true, 3};
io_mux i_mux_d37 {"i_mux_d37",
GPIOMODE_NONE | GPIOMODE_INPUT, GPIOMODE_NONE, true, 3};
io_mux i_mux_d38 {"i_mux_d38",
GPIOMODE_NONE | GPIOMODE_INPUT, GPIOMODE_NONE, true, 3};
io_mux i_mux_d39 {"i_mux_d39",
GPIOMODE_NONE | GPIOMODE_INPUT, GPIOMODE_NONE, true, 3};
/* Signals */
sc_signal<bool> d_hspi_d_in_s {"d_hspi_d_in_s"};
sc_signal<bool> d_hspi_q_in_s {"d_hspi_q_in_s"};
sc_signal<bool> d_hspi_clk_in_s {"d_hspi_clk_in_s"};
sc_signal<bool> d_hspi_hd_in_s {"d_hspi_hd_in_s"};
sc_signal<bool> d_hspi_wp_in_s {"d_hspi_wp_in_s"};
sc_signal<bool> d_hspi_cs0_in_s {"d_hspi_cs0_in_s"};
sc_signal<bool> d_vspi_d_in_s {"d_vspi_d_in_s"};
sc_signal<bool> d_vspi_q_in_s {"d_vspi_q_in_s"};
sc_signal<bool> d_vspi_clk_in_s {"d_vspi_clk_in_s"};
sc_signal<bool> d_vspi_hd_in_s {"d_vspi_hd_in_s"};
sc_signal<bool> d_vspi_wp_in_s {"d_vspi_wp_in_s"};
sc_signal<bool> d_vspi_cs0_in_s {"d_vspi_cs0_in_s"};
sc_signal<bool> d_vspi_cs1_in_s {"d_vspi_cs1_in_s"};
sc_signal<bool> d_vspi_cs2_in_s {"d_vspi_cs2_in_s"};
sc_signal<bool> d_u0rx_s {"d_u0rx_s"};
sc_signal<bool> d_u1rx_s {"d_u1rx_s"};
sc_signal<bool> d_u2rx_s {"d_u2rx_s"};
/* matrix interconnect function signals */
sc_signal<bool> men_s[GPIOMATRIX_CNT]; /* Output enable */
sc_signal<bool> mout_s[GPIOMATRIX_CNT]; /* Outgoing signal */
sc_signal<bool> min_s[GPIOMATRIX_CNT];/* Incomming signal */
sc_signal<uint64_t> gpio_out {"gpio_out"};
/* Unconnected signals */
sc_signal<bool> l0_f1 {"l0_f1", false};
sc_signal<bool> l0_f2 {"l0_f2", false};
sc_signal<bool> l0_f3 {"l0_f3", false};
sc_signal<bool> l0_f4 {"l0_f4", false};
sc_signal<bool> l0_f5 {"l0_f5", false};
sc_signal<bool> l0_f6 {"l0_f6", false};
sc_signal<bool> l0_f7 {"l0_f7", false};
sc_signal<bool> l1_f1 {"l1_f1", true};
sc_signal<bool> l1_f2 {"l1_f2", true};
sc_signal<bool> l1_f3 {"l1_f3", true};
sc_signal<bool> l1_f4 {"l1_f4", true};
sc_signal<bool> l1_f5 {"l1_f5", true};
sc_signal<bool> l1_f6 {"l1_f6", true};
sc_signal<bool> l1_f7 {"l1_f7", true};
sc_signal<bool> logic_0 {"logic_0", false};
sc_signal<bool> logic_1 {"logic_1", false};
/* Functions */
void setbits(uint32_t highbits, uint32_t lowbits);
void setoebits(uint32_t highbits, uint32_t lowbits);
void applycsbits();
void applyoecsbits();
/* Update calls */
/* Call if the struct was modified. */
void update();
/* Checks only OUT bits. Call only if you are sure only the OUT bits
* were changed. */
void updategpioreg();
/* Checks only OE bits. Call only if you are sure only the OE bits
* were changed. */
void updategpiooe();
mux_out *getmux(int pin);
void initptr();
/* Threads */
sc_event updategpioreg_ev;
sc_event updategpiooe_ev;
sc_event update_ev;
void updateth(void);
// Constructor
SC_CTOR(gpio_matrix) {
int g;
/* Pin Hookups */
/* GPIO 0 */
i_mux_d0.pin(d0_a11);
CONNECTFUNC(i_mux_d0, l0_f1, l1_f1, sig_open); /* F1 GPIO */
CONNECTFUNC(i_mux_d0, l0_f2, l1_f2, sig_open); /* F2 CLK_OUT1 */
CONNECTFUNC(i_mux_d0,mout_s[0],men_s[0],min_s[0]); /* F3 GPIO */
CONNECTFUNC(i_mux_d0, l0_f4, l1_f4, sig_open); /* F4 not used */
CONNECTFUNC(i_mux_d0, l0_f5, l1_f5, sig_open); /* F5 not used */
CONNECTFUNC(i_mux_d0, l0_f6, l1_f6, sig_open); /*F6 EMAC_TX_CLR*/
/* Commented out for now as the I2C is still using a CCHAN. */
CONNECTFUNC(i_mux_d0, l0_f7, l1_f7, sig_open); /* RTCF2 -- I2C_SDA */
//CONNECTFUNC(i_mux_d0, l1_f7, i2c_sda_tx, i2c_sda_rx); /* F7 */
CONNECTOUTMUX(0);
/* GPIO 1 */
i_mux_d1.pin(d1);
CONNECTFUNC(i_mux_d1, uart0tx_i, l1_f1, sig_open); /* F1 T0RX */
CONNECTFUNC(i_mux_d1, l0_f2, l1_f2, sig_open); /* F2 CLK_OUT2 */
CONNECTFUNC(i_mux_d1,mout_s[1],men_s[1],min_s[1]); /* F3 GPIO */
CONNECTOUTMUX(1);
/* GPIO 2 */
i_mux_d2.pin(d2_a12);
CONNECTFUNC(i_mux_d2, l0_f1, l1_f1, sig_open); /* F1 GPIO */
CONNECTFUNC(i_mux_d2, hspi_wp_out_i,
hspi_wp_oen_i,d_hspi_wp_in_s);/* F2 HSPI-WP*/
CONNECTFUNC(i_mux_d2,mout_s[2],men_s[2],min_s[2]); /* F3 GPIO */
/* F1: GPIO -- built-in */
/* F2: HSPIWP -- not yet supported */
/* F3: GPIO -- built-in */
/* F4: HS2_DATA0 -- not yet supported */
/* F5: SD_DATA0 -- not y |
et supported */
CONNECTOUTMUX(2);
/* GPIO 3 */
i_mux_d3.pin(d3);
CONNECTFUNC(i_mux_d3, l0_f1, l0_f1, d_u0rx_s); /* F1 U0RX */
CONNECTFUNC(i_mux_d3, l0_f2, l1_f2, sig_open); /* F2 CLK_OUT2*/
CONNECTFUNC(i_mux_d3, mout_s[3], men_s[3], min_s[3]); /* F3 GPIO */
/* F2: CLK_OUT2 -- not supported. */
/* F3: GPIO -- built-in to GPIO. */
CONNECTOUTMUX(3);
/* GPIO 4 */
i_mux_d4.pin(d4_a10);
CONNECTFUNC(i_mux_d4, l0_f1, l1_f1, sig_open); /* F1 skipped */
CONNECTFUNC(i_mux_d4, hspi_hd_out_i,
hspi_hd_oen_i,d_hspi_hd_in_s);/* F2 HSPI-HD*/
CONNECTFUNC(i_mux_d4,mout_s[4],men_s[4],min_s[4]); /* F3 GPIO */
CONNECTFUNC(i_mux_d4, l0_f4, l1_f4, sig_open); /* F4 HS2_DATA1 */
CONNECTFUNC(i_mux_d4, l0_f5, l1_f5, sig_open); /* F5 SD_DATA1 */
CONNECTFUNC(i_mux_d4, l0_f6, l1_f6, sig_open); /* F6 EMAC_TX_ER*/
/* Commented out for now as the I2C is still using a CCHAN. */
/* RTC FUNC 1: RTC_GPIO10 */
CONNECTFUNC(i_mux_d4, l0_f7, l1_f7, sig_open); /* RTC FUNC 2: I2CSCL */
//CONNECTFUNC(i_mux_d4, l0_f7, i2c_sda_tx, i2c_sda_rx); /* F7 */
CONNECTOUTMUX(4);
i_mux_d5.pin(d5);
CONNECTFUNC(i_mux_d5, l0_f1, l1_f1, sig_open); /* F1 skipped */
CONNECTFUNC(i_mux_d5, vspi_cs0_out_i,
vspi_cs0_oen_i,d_vspi_cs0_in_s);/* F2 VSPICS0 */
CONNECTFUNC(i_mux_d5,mout_s[5],men_s[5],min_s[5]); /* F3 GPIO */
/* F4: HS1_DATA6 -- not supported. */
CONNECTOUTMUX(5);
/* GPIO 6 -- not yet supported, implemented via the flash channel. */
/* GPIO 7 -- not yet supported, implemented via the flash channel. */
/* GPIO 8 -- not yet supported, implemented via the flash channel. */
/* GPIO 9 -- not yet supported, implemented via the flash channel. */
/* GPIO 10 -- not yet supported, implemented via the flash channel. */
/* GPIO 11 -- not yet supported, implemented via the flash channel. */
/* GPIO 12 */
i_mux_d12.pin(d12_a15);
CONNECTFUNC(i_mux_d12, l0_f1, l1_f1, sig_open); /* F1 MTDO */
CONNECTFUNC(i_mux_d12, hspi_q_out_i,
hspi_q_oen_i, d_hspi_q_in_s); /* F2 HSPIQ */
CONNECTFUNC(i_mux_d12,mout_s[12],men_s[12],min_s[12]); /* F3 GPIO */
/* F4: HS2_DATA2 -- not supported. */
/* F5: SD_DATA2 -- not supported. */
/* F6: EMAC_TXD3 */
CONNECTOUTMUX(12);
i_mux_d13.pin(d13_a14);
CONNECTFUNC(i_mux_d13, l0_f1, l1_f1, sig_open); /* F1 MTCK */
CONNECTFUNC(i_mux_d13, hspi_d_out_i,
hspi_d_oen_i, d_hspi_d_in_s); /* F2 HSPID */
CONNECTFUNC(i_mux_d13,mout_s[13],men_s[13],min_s[13]); /* F3 GPIO */
/* F4: HS2_DATA3 -- not supported. */
/* F5: SD_DATA3 -- not supported. */
/* F6: EMAC_RX_ER */
CONNECTOUTMUX(13);
i_mux_d14.pin(d14_a16);
CONNECTFUNC(i_mux_d14, l0_f1, l1_f1, sig_open); /* F1 MTMS */
CONNECTFUNC(i_mux_d14, hspi_clk_out_i,
hspi_clk_oen_i, d_hspi_clk_in_s);/* F2 HSPICLK */
CONNECTFUNC(i_mux_d14,mout_s[14],men_s[14],min_s[14]); /* F3 GPIO */
/* F4: HS2_CLK -- not supported. */
/* F5: SD_CLK -- not supported. */
/* F6: EMAC_TXD2 */
CONNECTOUTMUX(14);
i_mux_d15(d15_a13);
CONNECTFUNC(i_mux_d15, l0_f1, l1_f1, sig_open); /* F1 MTDO */
CONNECTFUNC(i_mux_d15, hspi_cs0_out_i,
hspi_cs0_oen_i, d_hspi_cs0_in_s);/* F2 HSPICS0 */
CONNECTFUNC(i_mux_d15,mout_s[15],men_s[15],min_s[15]); /* F3 GPIO */
/* F4: HS2_CMD -- not supported. */
/* F5: SD_CMD -- not supported. */
/* F6: EMAC_RXD3 */
CONNECTOUTMUX(15);
i_mux_d16.pin(d16);
CONNECTFUNC(i_mux_d16, l0_f1, l1_f1, sig_open); /* F1 GPIO */
CONNECTFUNC(i_mux_d16, l0_f2, l1_f2, sig_open); /* F2 not used */
CONNECTFUNC(i_mux_d16,mout_s[16],men_s[16],min_s[16]); /* F3 GPIO */
CONNECTFUNC(i_mux_d16, l0_f4, l1_f4, sig_open); /* F4 HS1_DATA4 */
CONNECTFUNC(i_mux_d16, l0_f5, l1_f5, d_u2rx_s); /* F5 U2RXD */
/* F6: EMAC_CLK_OUT */
CONNECTOUTMUX(16);
/* GPIO 17 */
i_mux_d17.pin(d17);
CONNECTFUNC(i_mux_d17, l0_f1, l1_f1, sig_open); /* F1 GPIO */
CONNECTFUNC(i_mux_d17, l0_f2, l1_f2, sig_open); /* F2 not used*/
CONNECTFUNC(i_mux_d17,mout_s[17],men_s[17],min_s[17]); /* F3 GPIO */
CONNECTFUNC(i_mux_d17, l0_f4, l1_f4, sig_open); /* F4 HS1_DATA5 */
CONNECTFUNC(i_mux_d17, uart2tx_i,l1_f5,sig_open); /* F5 U2TXD */
/* F6: EMAC_CLK_OUT_180 */
CONNECTOUTMUX(17);
i_mux_d18.pin(d18);
CONNECTFUNC(i_mux_d18, l0_f1, l1_f1, sig_open); /* F1 GPIO */
CONNECTFUNC(i_mux_d18, vspi_clk_out_i,
vspi_clk_oen_i, d_vspi_clk_in_s);/* F2 VSPICLK */
CONNECTFUNC(i_mux_d18,mout_s[18],men_s[18],min_s[18]); /* F3 GPIO */
/* F4: HS1_DATA7 -- not supported. */
CONNECTOUTMUX(18);
i_mux_d19.pin(d19);
CONNECTFUNC(i_mux_d19, l0_f1, l1_f1, sig_open); /* F1 GPIO */
CONNECTFUNC(i_mux_d19, vspi_q_out_i,
vspi_q_oen_i, d_vspi_q_in_s);/* F2 VSPIQ */
CONNECTFUNC(i_mux_d19,mout_s[19],men_s[19],min_s[19]); /* F3 GPIO */
/* F4: U0CTS -- not supported. */
/* F5: -- not used. */
/* F6: EMAC TXDO */
CONNECTOUTMUX(19);
i_mux_d21.pin(d21);
CONNECTFUNC(i_mux_d21, l0_f1, l1_f1, sig_open); /* F1 GPIO */
CONNECTFUNC(i_mux_d21, vspi_hd_out_i,
vspi_hd_oen_i, d_vspi_hd_in_s);/* F2 VSPIHD */
CONNECTFUNC(i_mux_d21,mout_s[21],men_s[21],min_s[21]); /* F3 GPIO */
/* F4: -- not used. */
/* F5: -- not used. */
/* F6: EMAC TX EN */
CONNECTOUTMUX(21);
i_mux_d22.pin(d22);
CONNECTFUNC(i_mux_d22, l0_f1, l1_f1, sig_open); /* F1 GPIO */
CONNECTFUNC(i_mux_d22, vspi_wp_out_i,
vspi_wp_oen_i, d_vspi_wp_in_s);/* F2 VSPIWP */
CONNECTFUNC(i_mux_d22,mout_s[22],men_s[22],min_s[22]); /* F3 GPIO */
/* F4: U0RTS -- not supported. */
/* F5: -- not used. */
/* F6: EMAC TXD1 */
CONNECTOUTMUX(22);
i_mux_d23.pin(d23);
CONNECTFUNC(i_mux_d23, l0_f1, l1_f1, sig_open); /* F1 GPIO */
CONNECTFUNC(i_mux_d23, vspi_d_out_i,
vspi_d_oen_i, d_vspi_d_in_s);/* F2 VSPID */
CONNECTFUNC(i_mux_d23,mout_s[23],men_s[23],min_s[23]); /* F3 GPIO */
/* F4: HS1_STROBE -- not supported. */
/* F5: -- not used. */
/* F6: -- not used. */
CONNECTOUTMUX(23);
i_mux_d25.pin(d25_a18);
CONNECTFUNC(i_mux_d25, l0_f1, l1_f1, sig_open); /* F1 GPIO */
CONNECTFUNC(i_mux_d25, l0_f2, l1_f2, sig_open); /* F2 not used */
CONNECTFUNC(i_mux_d25,mout_s[25],men_s[25],min_s[25]); /* F3 GPIO */
/* F4: -- not used. */
/* F5: -- not used. */
/* F6: EMAC RXD0 */
CONNECTOUTMUX(25);
i_mux_d26.pin(d26_a19);
CONNECTFUNC(i_mux_d26, l0_f1, l1_f1, sig_open); /* F1 GPIO */
CONNECTFUNC(i_mux_d26, l0_f2, l1_f2, sig_open); /* F2 not used */
CONNECTFUNC(i_mux_d26,mout_s[26],men_s[26],min_s[26]); /* F3 GPIO */
/* F4: -- not used. */
/* F5: -- not used. */
/* F6: EMAC RXD1 */
CONNECTOUTMUX(26);
i_mux_d27.pin(d27_a17);
CONNECTFUNC(i_mux_d27, l0_f1, l1_f1, sig_open); /* F1 GPIO */
CONNECTFUNC(i_mux_d27, l0_f2, l1_f2, sig_open); /* F2 not used */
CONNECTFUNC(i_mux_d27,mout_s[27],men_s[27],min_s[27]); /* F3 GPIO */
/* F4: -- not used. */
/* F5: -- not used. */
/* F6: EMAC RX_DV */
CONNECTOUTMUX(27);
/* These below, asside from the ADC do not have any supported additional
* functions.
*/
i_mux_d32.pin(d32_a4);
CONNECTFUNC(i_mux_d32, l0_f1, l1_f1, sig_open); /* F1 GPIO */
CONNECTFUNC(i_mux_d32, l0_f2, l1_f2, sig_open); /* F2 not used */
CONNECTFUNC(i_mux_d32,mout_s[32],men_s[32],min_s[32]); /* F3 GPIO */
CONNECTOUTMUX(32);
i_mux_d33.pin(d33_a5);
CONNECTFUNC(i_mux_d33, l0_f1, l1_f1, sig_open); /* F1 GPIO */
CONNECTFUNC(i_mux_d33, l0_f2, l1_f2, sig_open); /* F2 not used */
CONNECTFUNC(i_mux_d33,mout_s[33],men_s[33],min_s[33]); /* F3 GPIO */
CONNECTOUTMUX(33);
i_mux_d34.pin(d34_a6);
CONNECTFUNC(i_mux_d34, l0_f1, l1_f1, sig_open); /* F1 GPIO */
CONNECTFUNC(i_mux_d34, l0_f2, l1_f2, sig_open); /* F2 not used */
CONNECTFUNC(i_mux_d34,mout_s[34],men_s[34],min_s[34]); /* F3 GPIO */
CONNECTOUTMUX(34);
i_mux_d35.pin(d35_a7);
CONNECTFUNC(i_mux_d35, l0_f1, l1_f1, sig_open); /* F1 GPIO */
CONNECTFUNC(i_mux_d35, l0_f2, l1_f2, sig_open); /* F2 not used */
CONNECTFUNC(i_mux_d35,mout_s[35],men_s[35],min_s[35]); /* F3 GPIO */
CONNECTOUTMUX(35);
i_mux_d36.pin(d36_a0);
CONNECTFUNC(i_mux_d36, l0_f1, l1_f1, sig_open); /* F1 GPIO */
CONNECTFUNC(i_mux_d36, l0_f2, l1_f2, sig_open); /* F2 not used */
CONNECTFUNC(i_mux_d36,mout_s[36],men_s[36],min_s[36]); /* F3 GPIO */
CONNECTOUTMUX(36);
i_mux_d37.pin(d37_a1);
CONNECTFUNC(i_mux_d37, l0_f1, l1_f1, sig_open); /* F1 GPIO */
CONNECTFUNC(i_mux_d37, l0_f2, l1_f2, sig_open); /* F2 not used */
CONNECTFUNC(i_mux_d37,mout_s[37],men_s[37],min_s[37]); /* F3 GPIO */
CONNECTOUTMUX(37);
i_mux_d38.pin(d38_a2);
CONNECTFUNC(i_mux_d38, l0_f1, l1_f1, sig_open); /* F1 GPIO */
CONNECTFUNC(i_mux_d38, l0_f2, l1_f2, sig_open); /* F2 not used */
CONNECTFUNC(i_mux_d38,mout_s[38],men_s[38],min_s[38]); /* F3 GPIO */
CONNECTOUTMUX(38);
i_mux_d39.pin(d39_a3);
CONNECTFUNC(i_mux_d39, l0_f1, l1_f1, sig_open); /* F1 GPIO */
CONNECTFUNC(i_mux_d39, l0_f2, l1_f2, sig_open); /* F2 not used */
CONNECTFUNC(i_mux_d39,mout_s[39],men_s[39],min_s[39]); /* F3 GPIO */
CONNECTOUTMUX(39);
/* PCNT Mux */
i_mux_pcnt.pcntbus_o(pcntbus_o);
for(g = 0; g < GPIOMATRIX_CNT; g = g + 1) i_mux_pcnt.mout_i(min_s[g]);
i_mux_pcnt.mout_i(l0_f1); /* Direct signal */
i_mux_pcnt.mout_i(logic_0);
i_mux_pcnt.mout_i(logic_1);
/* HSPI Muxes */
CONNECTINMUX(i_mux_hspi_d, hspi_d_in_o, d_hspi_d_in_s);
CONNECTINMUX(i_mux_hspi_q, hspi_q_in_o, d_hspi_q_in_s);
CONNECTINMUX(i_mux_hspi_clk, hspi_clk_in_o, d_hspi_clk_in_s);
CONNECTINMUX(i_mux_hspi_hd, hspi_hd_in_o, d_hspi_hd_in_s);
CONNECTINMUX(i_mux_hspi_wp, hspi_wp_in_o, d_hspi_wp_in_s);
CONNECTINMUX(i_mux_hspi_cs0, hspi_cs0_in_o, d_hspi_cs0_in_s);
CONNECTINMUX(i_mux_vspi_d, vspi_d_in_o, d_vspi_d_in_s);
CONNECTINMUX(i_mux_vspi_q, vspi_q_in_o, d_vspi_q_in_s);
CONNECTINMUX(i_mux_vspi_clk, vspi_clk_in_o, d_vspi_clk_in_s);
CONNECTINMUX(i_mux_vspi_hd, vspi_hd_in_o, d_vspi_hd_in_s);
CONNECTINMUX(i_mux_vspi_wp, vspi_wp_in_o, d_vspi_wp_in_s);
CONNECTINMUX(i_mux_vspi_cs0, vspi_cs0_in_o, d_vspi_cs0_in_s);
CONNECTINMUX(i_mux_vspi_cs1, vspi_cs1_in_o, d_vspi_cs1_in_s);
CONNECTINMUX(i_mux_vspi_cs2, vspi_cs2_in_o, d_vspi_cs2_in_s);
/* I2C */
CONNECTINMUX(i_mux_i2c_sda0, sda0_o, l0_f1);
CONNECTINMUX(i_mux_i2c_sda1, sda1_o, l0_f1);
CONNECTINMUX(i_mux_i2c_scl0, scl0_o, l0_f1);
CONNECTINMUX(i_mux_i2c_scl1, scl1_o, l0_f1);
/* UART Muxes */
CONNECTINMUX(i_mux_uart0, uart0rx_o, d_u0rx_s);
CONNECTINMUX(i_mux_uart1, uart1rx_o, d_u1rx_s);
CONNECTINMUX(i_mux_uart2, uart2rx_o, d_u2rx_s);
initptr();
SC_THREAD(updateth);
sensitive << updategpioreg_ev << updategpiooe_ev << update_ev;
}
void start_of_simulation();
void trace(sc_trace_file *tf);
};
extern gpio_matrix *gpiomatrixptr;
#endif
|
/*******************************************************************************
* HelloServertest.h -- Copyright 2019 (c) Glenn Ramalho - RFIDo Design
*******************************************************************************
* Description:
* This is the main testbench header for the HelloServer.ino test. It
* describes how the model should be wired up and connected to any monitors.
*******************************************************************************
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*******************************************************************************
*/
#include <systemc.h>
#include <Arduino.h>
#include "doitesp32devkitv1.h"
#include "uartclient.h"
#include "webclient.h"
SC_MODULE(HelloServertest) {
/* Signals */
sc_signal<bool> led {"led"};
gn_signal_mix d13_a14 {"d13_a14"};
gn_signal_mix rx {"rx"};
gn_signal_mix tx {"tx"};
sc_signal<unsigned int> fromwifi {"fromwifi"};
sc_signal<unsigned int> towifi {"towifi"};
/* Note: these will soon be replaced with better interfaces. */
sc_signal<unsigned int> fromflash {"fromflash"};
sc_signal<unsigned int> toflash {"toflash"};
sc_signal<bool> fromi2c {"fromi2c"};
sc_signal<bool> toi2c {"toi2c"};
/* Unconnected signals */
gn_signal_mix logic_0 {"logic_0", GN_LOGIC_0};
/* blocks */
doitesp32devkitv1 i_esp{"i_esp"};
webclient i_webclient{"i_webclient"};
uartclient i_uartclient{"i_uartclient"};
netcon_mixtobool i_netcon{"i_netcon"};
/* Processes */
void testbench(void);
void serflush(void);
/* Tests */
unsigned int tn; /* Testcase number */
void t0();
// Constructor
SC_CTOR(HelloServertest) {
/* UART 0 - we connect the wires to the corresponding tasks. Yes, the
* RX and TX need to be switched.
*/
i_esp.d3(rx); i_uartclient.tx(rx);
i_esp.d1(tx); i_uartclient.rx(tx);
/* LED */
i_esp.d13_a14(d13_a14);
i_netcon.a(d13_a14);
i_netcon.b(led);
/* Other interfaces, none are used so they are just left floating. */
i_esp.wrx(fromwifi); i_webclient.tx(fromwifi);
i_esp.wtx(towifi); i_webclient.rx(towifi);
/* Note: these two will soon be replaced with the real flash and I2C
* interfaces, as soon as someone takes the time to implement them. */
i_esp.frx(fromflash); i_esp.ftx(toflash);
i_esp.irx(fromi2c); i_esp.itx(toi2c);
/* Pins not used in this simulation */
i_esp.d0_a11(logic_0); /* BOOT pin */
i_esp.d2_a12(logic_0); i_esp.d4_a10(logic_0); i_esp.d5(logic_0);
i_esp.d12_a15(logic_0); i_esp.d14_a16(logic_0);
i_esp.d15_a13(logic_0); i_esp.d16(logic_0);
i_esp.d17(logic_0); i_esp.d18(logic_0); i_esp.d19(logic_0);
i_esp.d21(logic_0); i_esp.d22(logic_0); i_esp.d23(logic_0);
i_esp.d25_a18(logic_0); i_esp.d26_a19(logic_0); i_esp.d27_a17(logic_0);
i_esp.d32_a4(logic_0); i_esp.d33_a5(logic_0); i_esp.d34_a6(logic_0);
i_esp.d35_a7(logic_0); i_esp.d36_a0(logic_0); i_esp.d37_a1(logic_0);
i_esp.d38_a2(logic_0); i_esp.d39_a3(logic_0);
SC_THREAD(testbench);
SC_THREAD(serflush);
}
void trace(sc_trace_file *tf);
};
|
/*******************************************************************************
* pcntmod.h -- Copyright 2019 (c) Glenn Ramalho - RFIDo Design
*******************************************************************************
* Description:
* Implements a SystemC module for the ESP32 Pulse Counter
*******************************************************************************
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*******************************************************************************
*/
#ifndef _PCNTMOD_H
#define _PCNTMOD_H
#include <systemc.h>
#include "pcntbus.h"
struct pcntmod;
#include "soc/pcnt_struct.h"
SC_MODULE(pcntmod) {
sc_signal<uint32_t> conf0[8];
sc_signal<uint32_t> conf1[8];
sc_signal<uint32_t> conf2[8];
sc_signal<uint16_t> cnt_unit[8];
sc_signal<uint32_t> int_raw[8];
sc_signal<uint32_t> int_st {"int_st"};
sc_signal<uint32_t> int_ena {"int_ena"};
sc_signal<uint32_t> status_unit[8];
sc_signal<uint32_t> ctrl {"ctrl"};
pcnt_dev_t sv;
sc_port<sc_signal_in_if<pcntbus_t>,0> pcntbus_i;
/* Functions */
void docnt(int un, bool siglvl, bool ctrllvl, int ch);
void update();
void initstruct();
/* Threads */
void capture(int un);
void count(int un);
void updateth(void);
void returnth(void);
/* Variables */
sc_time fctrl0[8];
sc_time fctrl1[8];
sc_event filtered_sig0[8];
sc_event filtered_sig1[8];
sc_event reset_un[8];
sc_event update_ev;
/* Sets initial drive condition. */
SC_CTOR(pcntmod) {
initstruct();
SC_THREAD(updateth);
sensitive << update_ev;
SC_THREAD(returnth);
}
void start_of_simulation();
void trace(sc_trace_file *tf);
};
extern pcntmod *pcntptr;
#endif
|
/*******************************************************************************
* SmallScreentest.h -- Copyright 2019 (c) Glenn Ramalho - RFIDo Design
*******************************************************************************
* Description:
* This is the main testbench header for the Blink.ino test. It describes how
* the model should be wired up and connected to any monitors.
*******************************************************************************
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*******************************************************************************
*/
#include <systemc.h>
#include <Arduino.h>
#include "doitesp32devkitv1.h"
#include "uartclient.h"
SC_MODULE(SmallScreentest) {
/* Signals */
sc_signal<bool> led {"led"};
gn_signal_mix d2_a12 {"d2_a12"};
gn_signal_mix rx {"rx"};
gn_signal_mix tx {"tx"};
sc_signal<unsigned int> fromwifi {"fromwifi"};
sc_signal<unsigned int> towifi {"towifi"};
/* Note: these will soon be replaced with better interfaces. */
sc_signal<unsigned int> fromflash {"fromflash"};
sc_signal<unsigned int> toflash {"toflash"};
sc_signal<bool> fromi2c {"fromi2c"};
sc_signal<bool> toi2c {"toi2c"};
/* Unconnected signals */
gn_signal_mix logic_0 {"logic_0", GN_LOGIC_0};
/* blocks */
doitesp32devkitv1 i_esp{"i_esp"};
uartclient i_uartclient{"i_uartclient"};
netcon_mixtobool i_netcon{"i_netcon"};
/* Processes */
void testbench(void);
void serflush(void);
/* Tests */
unsigned int tn; /* Testcase number */
void t0();
// Constructor
SC_CTOR(SmallScreentest) {
/* UART 0 - we connect the wires to the corresponding tasks. Yes, the
* RX and TX need to be switched.
*/
i_esp.d3(rx); i_uartclient.tx(rx);
i_esp.d1(tx); i_uartclient.rx(tx);
/* LED */
i_esp.d2_a12(d2_a12);
i_netcon.a(d2_a12);
i_netcon.b(led);
/* Other interfaces, none are used so they are just left floating. */
i_esp.wrx(fromwifi); i_esp.wtx(towifi);
/* Note: these two will soon be replaced with the real flash and I2C
* interfaces, as soon as someone takes the time to implement them. */
i_esp.frx(fromflash); i_esp.ftx(toflash);
i_esp.irx(fromi2c); i_esp.itx(toi2c);
/* Pins not used in this simulation */
i_esp.d0_a11(logic_0); /* BOOT pin */
i_esp.d4_a10(logic_0); i_esp.d5(logic_0);
i_esp.d12_a15(logic_0); i_esp.d13_a14(logic_0); i_esp.d14_a16(logic_0);
i_esp.d15_a13(logic_0); i_esp.d16(logic_0);
i_esp.d17(logic_0); i_esp.d18(logic_0); i_esp.d19(logic_0);
i_esp.d21(logic_0); i_esp.d22(logic_0); i_esp.d23(logic_0);
i_esp.d25_a18(logic_0); i_esp.d26_a19(logic_0); i_esp.d27_a17(logic_0);
i_esp.d32_a4(logic_0); i_esp.d33_a5(logic_0); i_esp.d34_a6(logic_0);
i_esp.d35_a7(logic_0); i_esp.d36_a0(logic_0); i_esp.d37_a1(logic_0);
i_esp.d38_a2(logic_0); i_esp.d39_a3(logic_0);
SC_THREAD(testbench);
SC_THREAD(serflush);
}
void trace(sc_trace_file *tf);
};
|
///////////////////////////////////////////////////////////////////////////////
//
// Copyright (c) 2017 Cadence Design Systems, Inc. All rights reserved worldwide.
//
// The code contained herein is the proprietary and confidential information
// of Cadence or its licensors, and is supplied subject to a previously
// executed license and maintenance agreement between Cadence and customer.
// This code is intended for use with Cadence high-level synthesis tools and
// may not be used with other high-level synthesis tools. Permission is only
// granted to distribute the code as indicated. Cadence grants permission for
// customer to distribute a copy of this code to any partner to aid in designing
// or verifying the customer's intellectual property, as long as such
// distribution includes a restriction of no additional distributions from the
// partner, unless the partner receives permission directly from Cadence.
//
// ALL CODE FURNISHED BY CADENCE IS PROVIDED "AS IS" WITHOUT WARRANTY OF ANY
// KIND, AND CADENCE SPECIFICALLY DISCLAIMS ANY WARRANTY OF NONINFRINGEMENT,
// FITNESS FOR A PARTICULAR PURPOSE OR MERCHANTABILITY. CADENCE SHALL NOT BE
// LIABLE FOR ANY COSTS OF PROCUREMENT OF SUBSTITUTES, LOSS OF PROFITS,
// INTERRUPTION OF BUSINESS, OR FOR ANY OTHER SPECIAL, CONSEQUENTIAL OR
// INCIDENTAL DAMAGES, HOWEVER CAUSED, WHETHER FOR BREACH OF WARRANTY,
// CONTRACT, TORT, NEGLIGENCE, STRICT LIABILITY OR OTHERWISE.
//
////////////////////////////////////////////////////////////////////////////////
#ifndef _SYSTEM_H_
#define _SYSTEM_H_
// Include some required files.
#include <systemc.h> // SystemC definitions.
#include <esc.h> // Cadence ESC functions and utilities.
#include <stratus_hls.h> // Cadence Stratus definitions.
#include <cynw_p2p.h> // The cynw_p2p communication channel.
#include "defines.h"
#include "tb.h"
#include "dut_wrap.h" // use the generated wrapper for all hls_modules
SC_MODULE( System )
{
// clock and reset signals
sc_clock clk_sig;
sc_signal< bool > rst_sig;
// cynw_p2p channels
// LAB EXERCISE: Add a second parameter to select TLM I/O
// OLD
cynw_p2p < input_t, CYN::TLM > chan1; // For data going into the design
cynw_p2p < output_t, CYN::TLM > chan2; // For data coming out of the design
// NEW
//cynw_p2p < input_t, ioConfig > chan1; // For data going into the design
//cynw_p2p < output_t, ioConfig > chan2; // For data coming out of the design
// The testbench and DUT modules.
dut_wrapper *m_dut; // use the generated wrapper for all hls_modules
tb *m_tb;
SC_CTOR( System )
: clk_sig( "clk_sig", CLOCK_PERIOD, SC_NS )
, rst_sig( "rst_sig" )
, chan1( "chan1" )
, chan2( "chan2" )
{
m_dut = new dut_wrapper( "dut_wrapper" );
// Connect the design module
m_dut->clk( clk_sig );
m_dut->rst( rst_sig );
m_dut->din( chan1 );
m_dut->dout( chan2 );
// Connect the testbench
m_tb = new tb( "tb" );
m_tb->clk( clk_sig );
m_tb->rst_out( rst_sig );
m_tb->dout( chan1 );
m_tb->din( chan2 );
}
~System()
{
delete m_tb;
delete m_dut;
}
};
#endif // _SYSTEM_H_
|
///////////////////////////////////////////////////////////////////////////////
//
// Copyright (c) 2017 Cadence Design Systems, Inc. All rights reserved worldwide.
//
// The code contained herein is the proprietary and confidential information
// of Cadence or its licensors, and is supplied subject to a previously
// executed license and maintenance agreement between Cadence and customer.
// This code is intended for use with Cadence high-level synthesis tools and
// may not be used with other high-level synthesis tools. Permission is only
// granted to distribute the code as indicated. Cadence grants permission for
// customer to distribute a copy of this code to any partner to aid in designing
// or verifying the customer's intellectual property, as long as such
// distribution includes a restriction of no additional distributions from the
// partner, unless the partner receives permission directly from Cadence.
//
// ALL CODE FURNISHED BY CADENCE IS PROVIDED "AS IS" WITHOUT WARRANTY OF ANY
// KIND, AND CADENCE SPECIFICALLY DISCLAIMS ANY WARRANTY OF NONINFRINGEMENT,
// FITNESS FOR A PARTICULAR PURPOSE OR MERCHANTABILITY. CADENCE SHALL NOT BE
// LIABLE FOR ANY COSTS OF PROCUREMENT OF SUBSTITUTES, LOSS OF PROFITS,
// INTERRUPTION OF BUSINESS, OR FOR ANY OTHER SPECIAL, CONSEQUENTIAL OR
// INCIDENTAL DAMAGES, HOWEVER CAUSED, WHETHER FOR BREACH OF WARRANTY,
// CONTRACT, TORT, NEGLIGENCE, STRICT LIABILITY OR OTHERWISE.
//
////////////////////////////////////////////////////////////////////////////////
#ifndef DUT_H
#define DUT_H
#include <systemc.h> // SystemC definitions.
#include <esc.h> // ESC functions and utilities.
#include <stratus_hls.h> // Cadence Stratus definitions.
#include <cynw_p2p.h> // The cynw_p2p communication channel.
#include "defines.h" // The type definitions for the input and output.
SC_MODULE( dut )
{
sc_in< bool > clk;
sc_in< bool > rst;
cynw_p2p< input_t >::in din; // TB to DUT, using struct input_t.
cynw_p2p< output_t >::out dout; // DUT to TB, using type output_t.
SC_CTOR( dut )
: clk( "clk" )
, rst( "rst" )
, din( "din" )
, dout( "dout" )
{
SC_CTHREAD( thread1, clk.pos() );
reset_signal_is( rst, false );
din.clk_rst( clk, rst );
dout.clk_rst( clk, rst );
}
void thread1();
};
#endif // DUT_H
|
/*
* @ASCK
*/
#include <systemc.h>
SC_MODULE (ID) {
sc_in_clk clk;
sc_in <sc_int<8>> prev_A;
sc_in <sc_int<8>> prev_B;
sc_in <sc_int<13>> prev_Imm;
sc_in <sc_uint<3>> prev_Sa;
sc_in <sc_uint<5>> prev_AluOp;
sc_in <bool> prev_r;
sc_in <bool> prev_w;
sc_in <bool> prev_AluMux;
sc_in <bool> prev_WbMux;
sc_in <bool> prev_call;
sc_in <bool> prev_regWrite;
sc_in <sc_uint<3>> prev_rd;
sc_out <sc_int<8>> next_A;
sc_out <sc_int<8>> next_B;
sc_out <sc_int<13>> next_Imm;
sc_out <sc_uint<3>> next_Sa;
sc_out <sc_uint<5>> next_AluOp;
sc_out <bool> next_r;
sc_out <bool> next_w;
sc_out <bool> next_AluMux;
sc_out <bool> next_WbMux;
sc_out <bool> next_call;
sc_out <bool> next_regWrite;
sc_out <sc_uint<3>> next_rd;
/*
** module global variables
*/
SC_CTOR (ID){
SC_THREAD (process);
sensitive << clk.pos();
}
void process () {
while(true){
wait();
if(now_is_call){
wait(micro_acc_ev);
}
next_A.write(prev_A.read());
next_B.write(prev_B.read());
next_Imm.write(prev_Imm.read());
next_Sa.write(prev_Sa.read());
next_AluOp.write(prev_AluOp.read());
next_AluMux.write(prev_AluMux.read());
next_r.write(prev_r.read());
next_w.write(prev_w.read());
next_WbMux.write(prev_WbMux.read());
next_call.write(prev_call.read());
next_regWrite.write(prev_regWrite);
next_rd.write(prev_rd.read());
}
}
}; |
#ifndef _SYSTEM_H_
#define _SYSTEM_H_
#include <systemc.h>
#include <esc.h>
#include <stratus_hls.h>
#include <cynw_p2p.h>
#include "tb.h"
#include "dut_wrap.h"
SC_MODULE(System)
{
sc_clock clk_sig;
sc_signal<bool> rst_sig;
sc_signal<bool> finish;
sc_int<32> A[10];
sc_int<32> B[10];
sc_int<32> D[10];
dut_wrapper *m_dut;
tb *m_tb;
SC_CTOR(System)
: clk_sig("clk_sig", CLOCK_PERIOD, SC_NS)
, rst_sig("rst_sig")
, finish("finish")
{
m_dut = new dut_wrapper("dut_wrapper", A, B, D);
m_dut->clk(clk_sig);
m_dut->rst(rst_sig);
m_dut->finish(finish);
m_tb = new tb("tb", A, B, D);
m_tb->clk(clk_sig);
m_tb->rst(rst_sig);
m_tb->finish(finish);
}
~System()
{
delete m_tb;
delete m_dut;
}
};
#endif // _SYSTEM_H_ |
/**
#define meta ...
prInt32f("%s\n", meta);
**/
/*
All rights reserved to Alireza Poshtkohi (c) 1999-2023.
Email: [email protected]
Website: http://www.poshtkohi.info
*/
#ifndef __s3_h__
#define __s3_h__
#include <systemc.h>
SC_MODULE(s3)
{
sc_in<sc_uint<6> > stage1_input;
sc_out<sc_uint<4> > stage1_output;
void s3_box();
SC_CTOR(s3)
{
SC_METHOD(s3_box);
sensitive << stage1_input;
}
};
#endif
|
/**
#define meta ...
prInt32f("%s\n", meta);
**/
/*
All rights reserved to Alireza Poshtkohi (c) 1999-2023.
Email: [email protected]
Website: http://www.poshtkohi.info
*/
#ifndef __s4_h__
#define __s4_h__
#include <systemc.h>
SC_MODULE(s4)
{
sc_in<sc_uint<6> > stage1_input;
sc_out<sc_uint<4> > stage1_output;
void s4_box();
SC_CTOR(s4)
{
SC_METHOD(s4_box);
sensitive << stage1_input;
}
};
#endif
|
/**
#define meta ...
prInt32f("%s\n", meta);
**/
/*
All rights reserved to Alireza Poshtkohi (c) 1999-2023.
Email: [email protected]
Website: http://www.poshtkohi.info
*/
#ifndef __des_h__
#define __des_h__
#include <systemc.h>
#include "round.h"
//S boxes
#include "s1.h"
#include "s2.h"
#include "s3.h"
#include "s4.h"
#include "s5.h"
#include "s6.h"
#include "s7.h"
#include "s8.h"
SC_MODULE(des)
{
sc_in<bool > clk;
sc_in<bool > reset;
sc_in<bool > load_i;
sc_in<bool > decrypt_i;
sc_in<sc_uint<64> > data_i;
sc_in<sc_uint<64> > key_i;
sc_out<sc_uint<64> > data_o;
sc_out<bool > ready_o;
//Registers for iteration counters
sc_signal<sc_uint<4> > stage1_iter, next_stage1_iter;
sc_signal<bool > next_ready_o;
sc_signal<sc_uint<64> > next_data_o;
sc_signal<bool > data_ready, next_data_ready;
//Conections to desround stage1
sc_signal<sc_uint<32> > stage1_L_i;
sc_signal<sc_uint<32> > stage1_R_i;
sc_signal<sc_uint<56> > stage1_round_key_i;
sc_signal<sc_uint<4> > stage1_iteration_i;
sc_signal<sc_uint<32> > stage1_R_o;
sc_signal<sc_uint<32> > stage1_L_o;
sc_signal<sc_uint<56> > stage1_round_key_o;
sc_signal<sc_uint<6> > s1_stag1_i, s2_stag1_i, s3_stag1_i, s4_stag1_i, s5_stag1_i, s6_stag1_i, s7_stag1_i, s8_stag1_i;
sc_signal<sc_uint<4> > s1_stag1_o, s2_stag1_o, s3_stag1_o, s4_stag1_o, s5_stag1_o, s6_stag1_o, s7_stag1_o, s8_stag1_o;
void des_proc();
void reg_signal();
desround *rd1;
s1 *sbox1;
s2 *sbox2;
s3 *sbox3;
s4 *sbox4;
s5 *sbox5;
s6 *sbox6;
s7 *sbox7;
s8 *sbox8;
SC_CTOR(des)
{
SC_METHOD(reg_signal);
sensitive << clk.pos();
sensitive << reset.neg();
SC_METHOD(des_proc);
sensitive << data_i << key_i << load_i << stage1_iter << data_ready;
sensitive << stage1_L_o << stage1_R_o << stage1_round_key_o;
rd1 = new desround("round1");
sbox1 = new s1("s1");
sbox2 = new s2("s2");
sbox3 = new s3("s3");
sbox4 = new s4("s4");
sbox5 = new s5("s5");
sbox6 = new s6("s6");
sbox7 = new s7("s7");
sbox8 = new s8("s8");
//For each stage in the pipe one instance
//First stage always present
rd1->clk(clk);
rd1->reset(reset);
rd1->iteration_i(stage1_iteration_i);
rd1->decrypt_i(decrypt_i);
rd1->R_i(stage1_R_i);
rd1->L_i(stage1_L_i);
rd1->Key_i(stage1_round_key_i);
rd1->R_o(stage1_R_o);
rd1->L_o(stage1_L_o);
rd1->Key_o(stage1_round_key_o);
rd1->s1_o(s1_stag1_i);
rd1->s2_o(s2_stag1_i);
rd1->s3_o(s3_stag1_i);
rd1->s4_o(s4_stag1_i);
rd1->s5_o(s5_stag1_i);
rd1->s6_o(s6_stag1_i);
rd1->s7_o(s7_stag1_i);
rd1->s8_o(s8_stag1_i);
rd1->s1_i(s1_stag1_o);
rd1->s2_i(s2_stag1_o);
rd1->s3_i(s3_stag1_o);
rd1->s4_i(s4_stag1_o);
rd1->s5_i(s5_stag1_o);
rd1->s6_i(s6_stag1_o);
rd1->s7_i(s7_stag1_o);
rd1->s8_i(s8_stag1_o);
sbox1->stage1_input(s1_stag1_i);
sbox1->stage1_output(s1_stag1_o);
sbox2->stage1_input(s2_stag1_i);
sbox2->stage1_output(s2_stag1_o);
sbox3->stage1_input(s3_stag1_i);
sbox3->stage1_output(s3_stag1_o);
sbox4->stage1_input(s4_stag1_i);
sbox4->stage1_output(s4_stag1_o);
sbox5->stage1_input(s5_stag1_i);
sbox5->stage1_output(s5_stag1_o);
sbox6->stage1_input(s6_stag1_i);
sbox6->stage1_output(s6_stag1_o);
sbox7->stage1_input(s7_stag1_i);
sbox7->stage1_output(s7_stag1_o);
sbox8->stage1_input(s8_stag1_i);
sbox8->stage1_output(s8_stag1_o);
}
};
#endif
|
// ================================================================
// NVDLA Open Source Project
//
// Copyright(c) 2016 - 2017 NVIDIA Corporation. Licensed under the
// NVDLA Open Hardware License; Check "LICENSE" which comes with
// this distribution for more information.
// ================================================================
// File Name: nvdla_sc2mac_data_monitor.h
#if !defined(_nvdla_sc2mac_data_monitor_H_)
#define _nvdla_sc2mac_data_monitor_H_
#include <systemc.h>
#include <stdint.h>
#ifndef _nvdla_stripe_info_struct_H_
#include "nvdla_stripe_info_struct.h"
#endif
// union nvdla_sc2mac_data_if_u {
// nvdla_stripe_info_t nvdla_stripe_info;
// };
typedef struct nvdla_sc2mac_data_monitor_s {
uint64_t mask [2] ;
int16_t data[128];
// union nvdla_sc2mac_data_if_u pd ;
nvdla_stripe_info_t nvdla_stripe_info;
} nvdla_sc2mac_data_monitor_t;
#endif // !defined(_nvdla_sc2mac_data_monitor_H_)
|
// ================================================================
// NVDLA Open Source Project
//
// Copyright(c) 2016 - 2017 NVIDIA Corporation. Licensed under the
// NVDLA Open Hardware License; Check "LICENSE" which comes with
// this distribution for more information.
// ================================================================
// File Name: nvdla_sc2mac_data_monitor.h
#if !defined(_nvdla_sc2mac_data_monitor_H_)
#define _nvdla_sc2mac_data_monitor_H_
#include <systemc.h>
#include <stdint.h>
#ifndef _nvdla_stripe_info_struct_H_
#include "nvdla_stripe_info_struct.h"
#endif
// union nvdla_sc2mac_data_if_u {
// nvdla_stripe_info_t nvdla_stripe_info;
// };
typedef struct nvdla_sc2mac_data_monitor_s {
uint64_t mask [2] ;
int16_t data[128];
// union nvdla_sc2mac_data_if_u pd ;
nvdla_stripe_info_t nvdla_stripe_info;
} nvdla_sc2mac_data_monitor_t;
#endif // !defined(_nvdla_sc2mac_data_monitor_H_)
|
///////////////////////////////////////////////////////////////////////////////
//
// Copyright (c) 2017 Cadence Design Systems, Inc. All rights reserved worldwide.
//
// The code contained herein is the proprietary and confidential information
// of Cadence or its licensors, and is supplied subject to a previously
// executed license and maintenance agreement between Cadence and customer.
// This code is intended for use with Cadence high-level synthesis tools and
// may not be used with other high-level synthesis tools. Permission is only
// granted to distribute the code as indicated. Cadence grants permission for
// customer to distribute a copy of this code to any partner to aid in designing
// or verifying the customer's intellectual property, as long as such
// distribution includes a restriction of no additional distributions from the
// partner, unless the partner receives permission directly from Cadence.
//
// ALL CODE FURNISHED BY CADENCE IS PROVIDED "AS IS" WITHOUT WARRANTY OF ANY
// KIND, AND CADENCE SPECIFICALLY DISCLAIMS ANY WARRANTY OF NONINFRINGEMENT,
// FITNESS FOR A PARTICULAR PURPOSE OR MERCHANTABILITY. CADENCE SHALL NOT BE
// LIABLE FOR ANY COSTS OF PROCUREMENT OF SUBSTITUTES, LOSS OF PROFITS,
// INTERRUPTION OF BUSINESS, OR FOR ANY OTHER SPECIAL, CONSEQUENTIAL OR
// INCIDENTAL DAMAGES, HOWEVER CAUSED, WHETHER FOR BREACH OF WARRANTY,
// CONTRACT, TORT, NEGLIGENCE, STRICT LIABILITY OR OTHERWISE.
//
////////////////////////////////////////////////////////////////////////////////
#ifndef DUT_H
#define DUT_H
#include <systemc.h> // SystemC definitions.
#include <esc.h> // ESC functions and utilities.
#include <stratus_hls.h> // Cadence Stratus definitions.
#include <cynw_p2p.h> // The cynw_p2p communication channel.
#include "defines.h" // The type definitions for the input and output.
SC_MODULE( dut )
{
sc_in< bool > clk;
sc_in< bool > rst;
cynw_p2p< input_t >::in din; // TB to DUT, using struct input_t.
cynw_p2p< output_t >::out dout; // DUT to TB, using type output_t.
SC_CTOR( dut )
: clk( "clk" )
, rst( "rst" )
, din( "din" )
, dout( "dout" )
{
SC_CTHREAD( thread1, clk.pos() );
reset_signal_is( rst, false );
din.clk_rst( clk, rst );
dout.clk_rst( clk, rst );
}
void thread1();
};
#endif // DUT_H
|
///////////////////////////////////////////////////////////////////////////////
//
// Copyright (c) 2017 Cadence Design Systems, Inc. All rights reserved worldwide.
//
// The code contained herein is the proprietary and confidential information
// of Cadence or its licensors, and is supplied subject to a previously
// executed license and maintenance agreement between Cadence and customer.
// This code is intended for use with Cadence high-level synthesis tools and
// may not be used with other high-level synthesis tools. Permission is only
// granted to distribute the code as indicated. Cadence grants permission for
// customer to distribute a copy of this code to any partner to aid in designing
// or verifying the customer's intellectual property, as long as such
// distribution includes a restriction of no additional distributions from the
// partner, unless the partner receives permission directly from Cadence.
//
// ALL CODE FURNISHED BY CADENCE IS PROVIDED "AS IS" WITHOUT WARRANTY OF ANY
// KIND, AND CADENCE SPECIFICALLY DISCLAIMS ANY WARRANTY OF NONINFRINGEMENT,
// FITNESS FOR A PARTICULAR PURPOSE OR MERCHANTABILITY. CADENCE SHALL NOT BE
// LIABLE FOR ANY COSTS OF PROCUREMENT OF SUBSTITUTES, LOSS OF PROFITS,
// INTERRUPTION OF BUSINESS, OR FOR ANY OTHER SPECIAL, CONSEQUENTIAL OR
// INCIDENTAL DAMAGES, HOWEVER CAUSED, WHETHER FOR BREACH OF WARRANTY,
// CONTRACT, TORT, NEGLIGENCE, STRICT LIABILITY OR OTHERWISE.
//
////////////////////////////////////////////////////////////////////////////////
#ifndef DUT_H
#define DUT_H
#include <systemc.h> // SystemC definitions.
#include <esc.h> // ESC functions and utilities.
#include <stratus_hls.h> // Cadence Stratus definitions.
#include <cynw_p2p.h> // The cynw_p2p communication channel.
#include "defines.h" // The type definitions for the input and output.
SC_MODULE( dut )
{
sc_in< bool > clk;
sc_in< bool > rst;
cynw_p2p< input_t >::in din; // TB to DUT, using struct input_t.
cynw_p2p< output_t >::out dout; // DUT to TB, using type output_t.
SC_CTOR( dut )
: clk( "clk" )
, rst( "rst" )
, din( "din" )
, dout( "dout" )
{
SC_CTHREAD( thread1, clk.pos() );
reset_signal_is( rst, false );
din.clk_rst( clk, rst );
dout.clk_rst( clk, rst );
}
void thread1();
};
#endif // DUT_H
|
///////////////////////////////////////////////////////////////////////////////
//
// Copyright (c) 2017 Cadence Design Systems, Inc. All rights reserved worldwide.
//
// The code contained herein is the proprietary and confidential information
// of Cadence or its licensors, and is supplied subject to a previously
// executed license and maintenance agreement between Cadence and customer.
// This code is intended for use with Cadence high-level synthesis tools and
// may not be used with other high-level synthesis tools. Permission is only
// granted to distribute the code as indicated. Cadence grants permission for
// customer to distribute a copy of this code to any partner to aid in designing
// or verifying the customer's intellectual property, as long as such
// distribution includes a restriction of no additional distributions from the
// partner, unless the partner receives permission directly from Cadence.
//
// ALL CODE FURNISHED BY CADENCE IS PROVIDED "AS IS" WITHOUT WARRANTY OF ANY
// KIND, AND CADENCE SPECIFICALLY DISCLAIMS ANY WARRANTY OF NONINFRINGEMENT,
// FITNESS FOR A PARTICULAR PURPOSE OR MERCHANTABILITY. CADENCE SHALL NOT BE
// LIABLE FOR ANY COSTS OF PROCUREMENT OF SUBSTITUTES, LOSS OF PROFITS,
// INTERRUPTION OF BUSINESS, OR FOR ANY OTHER SPECIAL, CONSEQUENTIAL OR
// INCIDENTAL DAMAGES, HOWEVER CAUSED, WHETHER FOR BREACH OF WARRANTY,
// CONTRACT, TORT, NEGLIGENCE, STRICT LIABILITY OR OTHERWISE.
//
////////////////////////////////////////////////////////////////////////////////
#ifndef DUT_H
#define DUT_H
#include <systemc.h> // SystemC definitions.
#include <esc.h> // ESC functions and utilities.
#include <stratus_hls.h> // Cadence Stratus definitions.
#include <cynw_p2p.h> // The cynw_p2p communication channel.
#include "defines.h" // The type definitions for the input and output.
SC_MODULE( dut )
{
sc_in< bool > clk;
sc_in< bool > rst;
cynw_p2p< input_t >::in din; // TB to DUT, using struct input_t.
cynw_p2p< output_t >::out dout; // DUT to TB, using type output_t.
SC_CTOR( dut )
: clk( "clk" )
, rst( "rst" )
, din( "din" )
, dout( "dout" )
{
SC_CTHREAD( thread1, clk.pos() );
reset_signal_is( rst, false );
din.clk_rst( clk, rst );
dout.clk_rst( clk, rst );
}
void thread1();
};
#endif // DUT_H
|
///////////////////////////////////////////////////////////////////////////////
//
// Copyright (c) 2017 Cadence Design Systems, Inc. All rights reserved worldwide.
//
// The code contained herein is the proprietary and confidential information
// of Cadence or its licensors, and is supplied subject to a previously
// executed license and maintenance agreement between Cadence and customer.
// This code is intended for use with Cadence high-level synthesis tools and
// may not be used with other high-level synthesis tools. Permission is only
// granted to distribute the code as indicated. Cadence grants permission for
// customer to distribute a copy of this code to any partner to aid in designing
// or verifying the customer's intellectual property, as long as such
// distribution includes a restriction of no additional distributions from the
// partner, unless the partner receives permission directly from Cadence.
//
// ALL CODE FURNISHED BY CADENCE IS PROVIDED "AS IS" WITHOUT WARRANTY OF ANY
// KIND, AND CADENCE SPECIFICALLY DISCLAIMS ANY WARRANTY OF NONINFRINGEMENT,
// FITNESS FOR A PARTICULAR PURPOSE OR MERCHANTABILITY. CADENCE SHALL NOT BE
// LIABLE FOR ANY COSTS OF PROCUREMENT OF SUBSTITUTES, LOSS OF PROFITS,
// INTERRUPTION OF BUSINESS, OR FOR ANY OTHER SPECIAL, CONSEQUENTIAL OR
// INCIDENTAL DAMAGES, HOWEVER CAUSED, WHETHER FOR BREACH OF WARRANTY,
// CONTRACT, TORT, NEGLIGENCE, STRICT LIABILITY OR OTHERWISE.
//
////////////////////////////////////////////////////////////////////////////////
#ifndef DUT_H
#define DUT_H
#include <systemc.h> // SystemC definitions.
#include <esc.h> // ESC functions and utilities.
#include <stratus_hls.h> // Cadence Stratus definitions.
#include <cynw_p2p.h> // The cynw_p2p communication channel.
#include "defines.h" // The type definitions for the input and output.
SC_MODULE( dut )
{
sc_in< bool > clk;
sc_in< bool > rst;
cynw_p2p< input_t >::in din; // TB to DUT, using struct input_t.
cynw_p2p< output_t >::out dout; // DUT to TB, using type output_t.
SC_CTOR( dut )
: clk( "clk" )
, rst( "rst" )
, din( "din" )
, dout( "dout" )
{
SC_CTHREAD( thread1, clk.pos() );
reset_signal_is( rst, false );
din.clk_rst( clk, rst );
dout.clk_rst( clk, rst );
}
void thread1();
};
#endif // DUT_H
|
#include <systemc.h>
class sc_clockx : sc_module, sc_interface
{
public:
sc_event edge;
sc_event change;
bool val;
bool _val;
int delta;
private:
int period;
SC_HAS_PROCESS(sc_clockx);
void run(void) {
int tmp = period/2;
edge.notify(SC_ZERO_TIME);
change.notify(SC_ZERO_TIME);
while(true) {
wait(tmp, SC_NS);
edge.notify(SC_ZERO_TIME);
change.notify(SC_ZERO_TIME);
val = !val;
}
}
public:
sc_clockx(sc_module_name name, int periodparam): sc_module(name)
{
SC_THREAD(run);
period = periodparam;
val = true;
_val = true;
}
bool read() {
return val;
}
void write(bool newval) {
_val = newval;
if (!(_val == val))
request_update();
}
void update() {
if (!(_val == val))
{
val = _val;
change.notify(SC_ZERO_TIME);
delta = sc_delta_count();
}
}
};
|
#pragma once
#include <systemc.h>
#include "constants.h"
#include "debug_util.h"
SC_MODULE(reg) {
// Reading Port :
sc_in<sc_uint<6>> RADR1_SD;
sc_in<sc_uint<6>> RADR2_SD;
sc_out<sc_uint<32>> RDATA1_SR;
sc_out<sc_uint<32>> RDATA2_SR;
// Writing Port :
sc_in<sc_uint<6>> WADR_SW;
sc_in<bool> WENABLE_SW;
sc_in<sc_uint<32>> WDATA_SW;
sc_in<sc_uint<32>> WRITE_PC_SD;
sc_in<bool> WRITE_PC_ENABLE_SD;
// PC Gestion :
sc_out<sc_uint<32>> READ_PC_SR;
// Global Interface :
sc_in_clk CLK;
sc_in<bool> RESET;
// Registres :
sc_signal<sc_uint<32>> REG_RR[32];
sc_signal<sc_uint<32>> PC_RR;
void read();
void write();
void trace(sc_trace_file * tf);
SC_CTOR(reg) {
SC_METHOD(read);
sensitive << RADR1_SD << RADR2_SD << RESET << PC_RR;
for (int i = 0; i < 32; i++)
sensitive << REG_RR[i];
SC_CTHREAD(write, reg::CLK.pos());
reset_signal_is(RESET, false);
}
}; |
/*
$Id: ticks.h,v 1.3 2010/11/23 22:42:02 scott Exp $
Description: Macros for timing
Usage: Define the timer call desired (e.g. #define FTIME, TIMEOFDAY, GETTIME)
before including "ticks.h"
Example:
#define TIMEOFDAY 1
#include "ticks.h"
void benchmark(void)
{
tick_t start, finish;
tget(start);
timed_section();
tget(finish);
printf("time in seconds:%f\n", tsec(finish, start));
}
$Log: ticks.h,v $
Revision 1.3 2010/11/23 22:42:02 scott
Add RDTSC (Read Time-Stamp Counter) option that uses the x86 instruction.
By default, use signed long for faster int to float conversion.
Change TICKS_SEC type to unsigned long (nUL).
Revision 1.2 2010/05/12 23:25:24 scott
Update comments for version control
*/
#ifndef _TICKS_H
#define _TICKS_H
/*
Casting the ticks to a signed value allows a more efficient
conversion to a float on x86 CPUs, but it limits the count to one
less high-order bit. Uncomment "unsigned" to use a full tick count.
*/
#define _uns /*unsigned*/
#if defined(FTIME)
/* deprecated */
#include <sys/timeb.h>
typedef struct timeb tick_t;
#define TICKS_SEC 1000U
#define tget(t) ftime(&(t))
#define tval(t) ((unsigned long long)t.time*TICKS_SEC+t.millitm)
#elif defined(TIMEOFDAY)
#include <sys/time.h>
typedef struct timeval tick_t;
#define TICKS_SEC 1000000UL
#define tget(t) gettimeofday(&(t),NULL)
#define tval(t) ((unsigned long long)t.tv_sec*TICKS_SEC+t.tv_usec)
#elif defined(GETTIME)
/* may need to link with lib -lrt */
#include <time.h>
typedef struct timespec tick_t;
#define TICKS_SEC 1000000000UL
#ifndef CLOCK_TYPE
#error CLOCK_TYPE must be defined as one of: \
CLOCK_REALTIME, CLOCK_MONOTONIC, CLOCK_PROCESS_CPUTIME_ID, CLOCK_THREAD_CPUTIME_ID
#endif
#define tget(t) clock_gettime(CLOCK_TYPE,&(t))
#define tval(t) ((unsigned long long)t.tv_sec*TICKS_SEC+t.tv_nsec)
#elif defined(RDTSC)
typedef union {
unsigned long long ui64;
struct {unsigned int lo, hi;} ui32;
} tick_t;
#ifndef TICKS_SEC
#error TICKS_SEC must be defined to match the CPU clock frequency
#endif
#define tget(t) __asm__ __volatile__ ("lfence\n\trdtsc" : "=a" ((t).ui32.lo), "=d"((t).ui32.hi))
#define tval(t) ((t).ui64)
#elif defined(XILTIME)
#include <xtime_l.h>
typedef XTime tick_t;
#ifndef TICKS_SEC
#define TICKS_SEC COUNTS_PER_SECOND
#endif
#define tget(t) XTime_GetTime(&(t))
#define tval(t) (t)
#elif defined(M5RPNS)
/* must link with m5op_<arch>.o */
#include <m5op.h>
typedef uint64_t tick_t;
#define TICKS_SEC 1000000000UL
#define tget(t) t = rpns()
#define tval(t) (t)
#elif defined(SYSTEMC)
#include <systemc.h>
typedef uint64 tick_t;
#define TICKS_SEC 1000000000000ULL
#define tget(t) t = sc_time_stamp().value()
#define tval(t) (t)
#else
#include <time.h>
typedef clock_t tick_t;
#define TICKS_SEC CLOCKS_PER_SEC
#define tget(t) t = clock()
#define tval(t) (t)
#endif
#define tinc(a,b) ((a) += (b))
#define tdec(a,b) ((a) -= (b))
#define tdiff(f,s) (tval(f)-tval(s))
#define tsec(f,s) ((_uns long long)tdiff(f,s)/(double)TICKS_SEC)
#define tvsec(v) ((_uns long long)(v)/(double)TICKS_SEC)
#endif /* _TICKS_H */
|
#pragma once
#include <systemc.h>
#include "../../UTIL/debug_util.h"
typedef enum // MAE STATES
{
IDLE = 0,
COMM = 1,
} states_fsm;
#define nb_slaves 1
#define nb_masters 1
#define ram_adr_deb 0x00000000
#define ram_adr_end 0xFFFFFFFF
SC_MODULE(wb_arbiter)
{
sc_in_clk CLK;
sc_in<bool> RESET_N;
//interface bus
sc_in<sc_uint<32>> ADR_I;
//interface master0
sc_in<bool> CYC_0_I;
sc_out<bool> GRANT_0_O;
//interface master1
sc_in<bool> CYC_1_I;
sc_out<bool> GRANT_1_O;
//interface slave0
sc_out<bool> CYC_O;
sc_out<bool> SEL_0_O;
//signals
sc_signal<sc_uint<1>> master_priority;
// slave memory const registers
sc_signal<sc_uint<32>> slave_deb_adr[nb_slaves];
sc_signal<sc_uint<32>> slave_end_adr[nb_slaves];
void master_selector();
void slave_selector();
void init_memory();
void trace(sc_trace_file*);
SC_CTOR(wb_arbiter)
{
SC_METHOD(master_selector);
sensitive << RESET_N << CYC_0_I << CYC_1_I;
SC_METHOD(slave_selector);
sensitive << ADR_I;
SC_METHOD(init_memory);
sensitive << RESET_N;
};
}; |
/**********************************************************************
Filename: sc_fir8_tb.h
Purpose : Testbench of 8-Tab Systolic FIR filter
Author : [email protected]
History : Mar. 2024, First release
***********************************************************************/
#ifndef _SC_FIR8_TB_H_
#define _SC_FIR8_TB_H_
#include <systemc.h>
#include "sc_fir8.h"
#ifdef VERILATED_CO_SIM
#include "Vfir8.h"
#include <verilated_vcd_sc.h>
#endif
SC_MODULE(sc_fir8_tb)
{
sc_clock clk;
sc_signal<sc_uint<8> > Xin;
sc_signal<sc_uint<8> > Xout;
sc_signal<sc_uint<16> > Yin;
sc_signal<sc_uint<16> > Yout;
sc_fir8* u_sc_fir8;
#ifdef VERILATED_CO_SIM
sc_signal<uint32_t> V_Xin;
sc_signal<uint32_t> V_Xout;
sc_signal<uint32_t> V_Yin;
sc_signal<uint32_t> V_Yout;
Vfir8* u_Vfir8;
VerilatedVcdSc* tfp; // Verilator VCD
#endif
// Test utilities
void Test_Gen();
void Test_Mon();
sc_uint<8> x[F_SAMPLE]; // Time seq. input
sc_uint<16> y[F_SAMPLE]; // Filter output
#ifdef VCD_TRACE_FIR8_TB
sc_trace_file* fp; // VCD file
#endif
SC_CTOR(sc_fir8_tb): clk("clk", 100, SC_NS, 0.5, 0.0, SC_NS, false)
{
SC_THREAD(Test_Gen);
sensitive << clk;
SC_THREAD(Test_Mon);
sensitive << clk;
// Instaltiate FIR8
u_sc_fir8 = new sc_fir8("u_sc_fir8");
u_sc_fir8->clk(clk);
u_sc_fir8->Xin(Xin);
u_sc_fir8->Xout(Xout);
u_sc_fir8->Yin(Yin);
u_sc_fir8->Yout(Yout);
#ifdef VERILATED_CO_SIM
u_Vfir8 = new Vfir8("u_Vfir8");
u_Vfir8->clk(clk);
u_Vfir8->Xin(V_Xin);
u_Vfir8->Xout(V_Xout);
u_Vfir8->Yin(V_Yin);
u_Vfir8->Yout(V_Yout);
Verilated::traceEverOn(true);
tfp = new VerilatedVcdSc;
sc_start(SC_ZERO_TIME);
u_Vfir8->trace(tfp, 3); // Trace levels of hierarchy
tfp->open("Vfir8.vcd");
#endif
#ifdef VCD_TRACE_FIR8_TB
// WAVE
fp = sc_create_vcd_trace_file("sc_fir8_tb");
fp->set_time_unit(100, SC_PS); // resolution (trace) ps
sc_trace(fp, clk, "clk");
sc_trace(fp, Xin, "Xin");
sc_trace(fp, Xout, "Xout");
sc_trace(fp, Yin, "Yin");
sc_trace(fp, Yout, "Yout");
#endif
}
~sc_fir8_tb(void)
{
}
};
#endif |
/**************************************************************************
* *
* Catapult(R) Machine Learning Reference Design Library *
* *
* Software Version: 1.8 *
* *
* Release Date : Sun Jul 16 19:01:51 PDT 2023 *
* Release Type : Production Release *
* Release Build : 1.8.0 *
* *
* Copyright 2021 Siemens *
* *
**************************************************************************
* Licensed under the Apache License, Version 2.0 (the "License"); *
* you may not use this file except in compliance with the License. *
* You may obtain a copy of the License at *
* *
* http://www.apache.org/licenses/LICENSE-2.0 *
* *
* Unless required by applicable law or agreed to in writing, software *
* distributed under the License is distributed on an "AS IS" BASIS, *
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or *
* implied. *
* See the License for the specific language governing permissions and *
* limitations under the License. *
**************************************************************************
* *
* The most recent version of this package is available at github. *
* *
*************************************************************************/
#pragma once
#include <systemc.h>
#include "rocket_subsystem.h"
SC_MODULE(rocket_wrapper)
{
//== Ports
sc_in<bool> clock;
sc_in<bool> reset;
sc_out<sc_lv<44>> periph_aw_msg;
sc_out<bool> periph_aw_valid;
sc_in<bool> periph_aw_ready;
sc_out<sc_lv<37>> periph_w_msg;
sc_out<bool> periph_w_valid;
sc_in<bool> periph_w_ready;
sc_in<sc_lv<6>> periph_b_msg;
sc_in<bool> periph_b_valid;
sc_out<bool> periph_b_ready;
sc_out<sc_lv<44>> periph_ar_msg;
sc_out<bool> periph_ar_valid;
sc_in<bool> periph_ar_ready;
sc_in<sc_lv<39>> periph_r_msg;
sc_in<bool> periph_r_valid;
sc_out<bool> periph_r_ready;
//== Signals
sc_signal<sc_logic> my_sc_clock;
sc_signal<sc_logic> my_sc_reset;
sc_signal<sc_lv<44>> sc_periph_aw_msg;
sc_signal<sc_logic> sc_periph_aw_valid;
sc_signal<sc_logic> sc_periph_aw_ready;
sc_signal<sc_lv<37>> sc_periph_w_msg;
sc_signal<sc_logic> sc_periph_w_valid;
sc_signal<sc_logic> sc_periph_w_ready;
sc_signal<sc_lv<6>> sc_periph_b_msg;
sc_signal<sc_logic> sc_periph_b_valid;
sc_signal<sc_logic> sc_periph_b_ready;
sc_signal<sc_lv<44>> sc_periph_ar_msg;
sc_signal<sc_logic> sc_periph_ar_valid;
sc_signal<sc_logic> sc_periph_ar_ready;
sc_signal<sc_lv<39>> sc_periph_r_msg;
sc_signal<sc_logic> sc_periph_r_valid;
sc_signal<sc_logic> sc_periph_r_ready;
//sc_logic sc_periph_r_ready;
//== Instances
sc_module_name rocket_sc_module_name{"rocket"};
rocket_subsystem rocket{rocket_sc_module_name, "rocket_subsystem"};
//== Assignment routines
void set_clock() { sc_logic e = (sc_logic) clock.read(); my_sc_clock.write(e); }
void set_reset() { sc_logic e = (sc_logic) reset.read(); my_sc_reset.write(e); }
void set_aw_msg() { sc_lv<44> e = sc_periph_aw_msg.read(); periph_aw_msg.write(e); }
void set_aw_vld() { sc_logic e = sc_periph_aw_valid.read(); periph_aw_valid.write(e.to_bool()); }
void set_aw_rdy() { sc_logic e = (sc_logic) periph_aw_ready.read(); sc_periph_aw_ready.write(e); }
void set_w_msg() { sc_lv<37> e = sc_periph_w_msg.read(); periph_w_msg.write(e); }
void set_w_vld() { sc_logic e = sc_periph_w_valid.read(); periph_w_valid.write(e.to_bool()); }
void set_w_rdy() { sc_logic e = (sc_logic) periph_w_ready.read(); sc_periph_w_ready.write(e); }
void set_b_msg() { sc_lv<6> e = periph_b_msg.read(); sc_periph_b_msg.write(e); }
void set_b_vld() { sc_logic e = (sc_logic) periph_b_valid.read(); sc_periph_b_valid.write(e); }
void set_b_rdy() { sc_logic e = sc_periph_b_ready.read(); periph_b_ready.write(e.to_bool()); }
void set_ar_msg() { sc_lv<44> e = sc_periph_ar_msg.read(); periph_ar_msg.write(e); }
void set_ar_vld() { sc_logic e = sc_periph_ar_valid.read(); periph_ar_valid.write(e.to_bool()); }
void set_ar_rdy() { sc_logic e = (sc_logic) periph_ar_ready.read(); sc_periph_ar_ready.write(e); }
void set_r_msg() { sc_lv<39> e = periph_r_msg.read(); sc_periph_r_msg.write(e); }
void set_r_vld() { sc_logic e = (sc_logic) periph_r_valid.read(); sc_periph_r_valid.write(e); }
void set_r_rdy() { sc_logic e = sc_periph_r_ready.read(); periph_r_ready.write(e.to_bool()); }
//== Constructor
SC_CTOR(rocket_wrapper)
{
rocket.clock(my_sc_clock);
rocket.reset(my_sc_reset);
rocket.periph_aw_msg (sc_periph_aw_msg);
rocket.periph_aw_valid (sc_periph_aw_valid);
rocket.periph_aw_ready (sc_periph_aw_ready);
rocket.periph_w_msg (sc_periph_w_msg);
rocket.periph_w_valid (sc_periph_w_valid);
rocket.periph_w_ready (sc_periph_w_ready);
rocket.periph_b_msg (sc_periph_b_msg);
rocket.periph_b_valid (sc_periph_b_valid);
rocket.periph_b_ready (sc_periph_b_ready);
rocket.periph_ar_msg (sc_periph_ar_msg);
rocket.periph_ar_valid (sc_periph_ar_valid);
rocket.periph_ar_ready (sc_periph_ar_ready);
rocket.periph_r_msg (sc_periph_r_msg);
rocket.periph_r_valid (sc_periph_r_valid);
rocket.periph_r_ready (sc_periph_r_ready);
SC_THREAD(set_clock); sensitive << clock;
SC_THREAD(set_reset); sensitive << reset;
SC_THREAD(set_aw_msg); sensitive << periph_aw_msg;
SC_THREAD(set_aw_vld); sensitive << periph_aw_valid;
SC_THREAD(set_aw_rdy); sensitive << sc_periph_aw_ready;
SC_THREAD(set_w_msg); sensitive << periph_w_msg;
SC_THREAD(set_w_vld); sensitive << periph_w_valid;
SC_THREAD(set_w_rdy); sensitive << sc_periph_w_ready;
SC_THREAD(set_b_msg); sensitive << sc_periph_b_msg;
SC_THREAD(set_b_vld); sensitive << sc_periph_b_valid;
SC_THREAD(set_b_rdy); sensitive << periph_b_ready;
SC_THREAD(set_ar_msg); sensitive << periph_ar_msg;
SC_THREAD(set_ar_vld); sensitive << periph_ar_valid;
SC_THREAD(set_ar_rdy); sensitive << sc_periph_ar_ready;
SC_THREAD(set_r_msg); sensitive << sc_periph_r_msg;
SC_THREAD(set_r_vld); sensitive << sc_periph_r_valid;
SC_THREAD(set_r_rdy); sensitive << periph_r_ready;
}
};
|
/*******************************************************************************
* Blinktest.h -- Copyright 2019 (c) Glenn Ramalho - RFIDo Design
*******************************************************************************
* Description:
* This is the main testbench header for the Blink.ino test. It describes how
* the model should be wired up and connected to any monitors.
*******************************************************************************
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*******************************************************************************
*/
#include <systemc.h>
#include <Arduino.h>
#include "doitesp32devkitv1.h"
#include "uartclient.h"
SC_MODULE(Blinktest) {
/* Signals */
sc_signal<bool> led {"led"};
gn_signal_mix d2_a12 {"d2_a12"};
gn_signal_mix rx {"rx"};
gn_signal_mix tx {"tx"};
sc_signal<unsigned int> fromwifi {"fromwifi"};
sc_signal<unsigned int> towifi {"towifi"};
/* Note: these will soon be replaced with better interfaces. */
sc_signal<unsigned int> fromflash {"fromflash"};
sc_signal<unsigned int> toflash {"toflash"};
sc_signal<bool> fromi2c {"fromi2c"};
sc_signal<bool> toi2c {"toi2c"};
/* Unconnected signals */
gn_signal_mix logic_0 {"logic_0", GN_LOGIC_0};
/* blocks */
doitesp32devkitv1 i_esp{"i_esp"};
uartclient i_uartclient{"i_uartclient"};
netcon_mixtobool i_netcon{"i_netcon"};
/* Processes */
void testbench(void);
void serflush(void);
/* Tests */
unsigned int tn; /* Testcase number */
void t0();
// Constructor
SC_CTOR(Blinktest) {
/* UART 0 - we connect the wires to the corresponding tasks. Yes, the
* RX and TX need to be switched.
*/
i_esp.d3(rx); i_uartclient.tx(rx);
i_esp.d1(tx); i_uartclient.rx(tx);
/* LED */
i_esp.d2_a12(d2_a12);
i_netcon.a(d2_a12);
i_netcon.b(led);
/* Other interfaces, none are used so they are just left floating. */
i_esp.wrx(fromwifi); i_esp.wtx(towifi);
/* Note: these two will soon be replaced with the real flash and I2C
* interfaces, as soon as someone takes the time to implement them. */
i_esp.frx(fromflash); i_esp.ftx(toflash);
i_esp.irx(fromi2c); i_esp.itx(toi2c);
/* Pins not used in this simulation */
i_esp.d0_a11(logic_0); /* BOOT pin */
i_esp.d4_a10(logic_0); i_esp.d5(logic_0);
i_esp.d12_a15(logic_0); i_esp.d13_a14(logic_0); i_esp.d14_a16(logic_0);
i_esp.d15_a13(logic_0); i_esp.d16(logic_0);
i_esp.d17(logic_0); i_esp.d18(logic_0); i_esp.d19(logic_0);
i_esp.d21(logic_0); i_esp.d22(logic_0); i_esp.d23(logic_0);
i_esp.d25_a18(logic_0); i_esp.d26_a19(logic_0); i_esp.d27_a17(logic_0);
i_esp.d32_a4(logic_0); i_esp.d33_a5(logic_0); i_esp.d34_a6(logic_0);
i_esp.d35_a7(logic_0); i_esp.d36_a0(logic_0); i_esp.d37_a1(logic_0);
i_esp.d38_a2(logic_0); i_esp.d39_a3(logic_0);
SC_THREAD(testbench);
SC_THREAD(serflush);
}
void trace(sc_trace_file *tf);
};
|
#ifndef SYSC_TYPES_H
#define SYSC_TYPES_H
#include <systemc.h>
typedef struct _DATA {
sc_uint<32> data;
bool tlast;
inline friend ostream &operator<<(ostream &os, const _DATA &v) {
cout << "data: " << v.data << " tlast: " << v.tlast;
return os;
}
} DATA;
typedef struct _SDATA {
sc_int<32> data;
bool tlast;
inline friend ostream &operator<<(ostream &os, const _SDATA &v) {
cout << "data: " << v.data << " tlast: " << v.tlast;
return os;
}
} SDATA;
#endif |
/**
#define meta ...
prInt32f("%s\n", meta);
**/
/*
All rights reserved to Alireza Poshtkohi (c) 1999-2023.
Email: [email protected]
Website: http://www.poshtkohi.info
*/
#ifndef __s5_h__
#define __s5_h__
#include <systemc.h>
SC_MODULE(s5)
{
sc_in<sc_uint<6> > stage1_input;
sc_out<sc_uint<4> > stage1_output;
void s5_box();
SC_CTOR(s5)
{
SC_METHOD(s5_box);
sensitive << stage1_input;
}
};
#endif
|
#pragma once
#include <systemc.h>
#include "../../UTIL/debug_util.h"
typedef enum // MAE STATES
{
R_IDLE = 0,
R_REQ = 1,
R_DC_READ = 2,
R_DC_END_BURST = 3,
R_DC_WRITE = 4,
R_IC = 5,
R_IC_END_BURST = 6
} river_states_fsm;
SC_MODULE(wb_river_mc)
{
sc_in_clk CLK;
sc_in<bool> RESET_N;
//interface with BUS
sc_in<sc_uint<32>> DAT_I;
sc_in<bool> ACK_I; // when asserted indicates the normal termination of a bus cycle
sc_out<sc_uint<32>> DAT_O;
sc_out<sc_uint<32>> ADR_O;
sc_out<sc_uint<2>> SEL_O; // select which words on DAT_O are valid
sc_out<bool> WE_O;
sc_out<bool> STB_O; // Master is talking on the bus
//interface with ICACHE
sc_in<sc_uint<32>> A_IC;
sc_in<bool> DTA_VALID_IC;
sc_out<sc_uint<32>> DT_IC;
sc_out<bool> ACK_IC;
//interface with DCACHE
sc_in<bool> DTA_VALID_DC;
sc_in<bool> READ_DC;
sc_in<bool> WRITE_DC;
sc_in<sc_uint<2>> SIZE_SEL_DC;
sc_in<sc_uint<32>> DT_DC;
sc_in<sc_uint<32>> A_DC;
sc_out<sc_uint<32>> DT_RM;
sc_out<bool> ACK_DC;
sc_out<bool> STALL_SW;
//interface with BCU
sc_in<bool> GRANT_I;
sc_out<bool> CYC_O;
//signals
sc_signal<sc_uint<3>> current_state;
sc_signal<sc_uint<3>> future_state;
void new_state();
void state_transition();
void mae_output();
void trace(sc_trace_file*);
SC_CTOR(wb_river_mc)
{
SC_METHOD(new_state);
sensitive << CLK.pos() << RESET_N;
SC_METHOD(state_transition);
sensitive << CLK.pos() << DTA_VALID_DC << DTA_VALID_IC
<< GRANT_I << WRITE_DC << READ_DC << ACK_I;
SC_METHOD(mae_output);
sensitive << current_state << DAT_I << ACK_I;
}
}; |
/**********************************************************************
Co-Simulation of Verilated+SystemC VPI+iVerilog
Filename: sc_fir8_tb.h
Purpose : Testbench of 8-Tab Systolic FIR filter
Author : [email protected]
History : Mar. 2024, First release
***********************************************************************/
#ifndef _SC_FIR8_TB_H_
#define _SC_FIR8_TB_H_
#include <systemc.h>
#include "sc_fir8.h"
SC_MODULE(sc_fir8_tb)
{
sc_in<bool> clk;
sc_in<sc_uint<4> > eXout;
sc_in<sc_uint<4> > eYout;
sc_in<bool> eVld;
sc_out<sc_uint<4> > eXin;
sc_out<sc_uint<4> > eYin;
sc_out<bool> eRdy;
sc_signal<sc_uint<4> > Xin;
sc_signal<sc_uint<4> > Yin;
sc_signal<bool> Rdy;
sc_fir8* u_sc_fir8;
bool sc_Stopped;
// Test utilities
void Test_Gen();
void Test_Mon();
sc_uint<8> x[F_SAMPLE]; // Time seq. input
sc_uint<16> y[F_SAMPLE]; // Filter output
sc_trace_file* fp; // VCD file
SC_CTOR(sc_fir8_tb): clk("clk"), sc_Stopped(false)
{
SC_THREAD(Test_Gen);
sensitive << clk;
SC_THREAD(Test_Mon);
sensitive << clk;
// Instaltiate FIR8
u_sc_fir8 = new sc_fir8("u_sc_fir8");
u_sc_fir8->clk(clk);
u_sc_fir8->Xin(Xin);
u_sc_fir8->Yin(Yin);
u_sc_fir8->Rdy(Rdy);
u_sc_fir8->Xout(eXin);
u_sc_fir8->Yout(eYin);
u_sc_fir8->Vld(eRdy);
// VCD Trace
fp = sc_create_vcd_trace_file("sc_fir8_tb");
fp->set_time_unit(100, SC_PS); // resolution (trace) ps
sc_trace(fp, clk, "clk");
sc_trace(fp, Xin, "Xin");
sc_trace(fp, Yin, "Yin");
sc_trace(fp, Rdy, "Rdy");
sc_trace(fp, eXin, "eXin");
sc_trace(fp, eYin, "eYin");
sc_trace(fp, eRdy, "eRdy");
sc_trace(fp, eXout, "eXout");
sc_trace(fp, eYout, "eYout");
sc_trace(fp, eVld, "eVld");
}
~sc_fir8_tb(void)
{
}
};
#endif |
/*****************************************************************************
Licensed to Accellera Systems Initiative Inc. (Accellera) under one or
more contributor license agreements. See the NOTICE file distributed
with this work for additional information regarding copyright ownership.
Accellera licenses this file to you under the Apache License, Version 2.0
(the "License"); you may not use this file except in compliance with the
License. You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
implied. See the License for the specific language governing
permissions and limitations under the License.
*****************************************************************************/
/*****************************************************************************
stimulus.cpp --
Original Author: Rocco Jonack, Synopsys, Inc.
*****************************************************************************/
/*****************************************************************************
MODIFICATION LOG - modifiers, enter your name, affiliation, date and
changes you are making here.
Name, Affiliation, Date:
Description of Modification:
*****************************************************************************/
#include <systemc.h>
#include "stimulus.h"
void stimulus::entry() {
cycle++;
// sending some reset values
if (cycle<4) {
reset.write(true);
input_valid.write(false);
} else {
reset.write(false);
input_valid.write( false );
// sending normal mode values
if (cycle%10==0) {
input_valid.write(true);
sample.write( (int)send_value1 );
cout << "Stimuli : " << (int)send_value1 << " at time "
/* << sc_time_stamp() << endl; */
<< sc_time_stamp().to_double() << endl;
send_value1++;
};
}
}
|
/*******************************************************************************
Vendor: GoodKook, [email protected]
Associated Filename: sc_shifter_TB.cpp
Purpose: Testbench
Revision History: Aug. 1, 2024
*******************************************************************************/
#ifndef _SC_SHIFTER_TB_H_
#define _SC_SHIFTER_TB_H_
#include <systemc.h>
#include "Vshifter.h" // Verilated DUT
SC_MODULE(sc_shifter_TB)
{
sc_clock clk;
sc_signal<bool> rst,
sc_signal<sc_bv<7> > rst, din, qout;
Vshifter* u_Vshifter;
sc_trace_file* fp; // SystemC VCD file
SC_CTOR(sc_shifter_TB): // constructor
clk("clk", 100, SC_NS, 0.5, 0.0, SC_NS, false)
{
// instantiate DUT
u_Vshifter = new Vshifter("u_Vshifter");
// Binding
u_Vshifter->clk(clk);
u_Vshifter->rst(rst);
u_Vshifter->din(din);
u_Vshifter->qout(qout);
SC_THREAD(test_generator);
sensitive << clk;
// VCD Trace
fp = sc_create_vcd_trace_file("sc_shifter_TB");
sc_trace(fp, clk, "clk");
sc_trace(fp, rst, "rst");
sc_trace(fp, din, "din");
sc_trace(fp, qout, "qout");
}
void test_generator()
{
int test_count =0;
din.write(0);
rst.write(0);
wait(clk.posedge_event());
wait(clk.posedge_event());
rst.write(1);
wait(clk.posedge_event());
while(true)
{
din.write(1);
wait(clk.posedge_event());
if (test_count>6)
{
sc_close_vcd_trace_file(fp);
sc_stop();
}
else
test_count++;
}
}
};
#endif
|
#ifndef D_CACHE
#define D_CACHE
#include <systemc.h>
#include "buffercache.h"
#include "../../UTIL/debug_util.h"
//cache N-way associatif, write through et buffet
// taille du cache 1024
// buffer de taille 2
// 2-way => 1024/2 => 512 / 4mots => 128 lignes
// index => 7 bits
// offset => 4 mots => 2 bits
// tag => 23 bits
//communication direct avec la MP (pas de bus ni BCU)
// C: cache M: memory P: MP
//acronym_X
#define WAY_SIZE 128
typedef enum // MAE STATES
{
IDLE = 0,
WAIT_MEM = 2,
UPDT = 3
} states_fsm;
SC_MODULE(dcache)
{
sc_in_clk CLK;
sc_in<bool> RESET_N;
// interface processeur
sc_in<sc_uint<32>> DATA_ADR_SM;
sc_in<sc_uint<32>> DATA_SM;
sc_in<bool> LOAD_SM;
sc_in<bool> STORE_SM;
sc_in<bool> VALID_ADR_SM;
sc_in<sc_uint<2>> MEM_SIZE_SM;
sc_out<sc_uint<32>> DATA_SC;
sc_out<bool> STALL_SC; // if stall donc miss else hit
// interface MP
sc_out<bool> DTA_VALID_SC;
sc_out<bool> READ_SC, WRITE_SC;
sc_out<sc_uint<2>> SIZE_SC;
sc_out<sc_uint<32>> DT_SC;
sc_out<sc_uint<32>> A_SC;
sc_in<sc_uint<32>> DT_SP;
sc_in<sc_uint<32>> A_SP;
sc_in<bool> SLAVE_ACK_SP; // slave answer (slave dt valid)
//signals
//parse address from CPU
sc_signal<sc_uint<21>> address_tag;
sc_signal<sc_uint<7>> address_index;
sc_signal<sc_uint<4>> address_offset;
//parse address from MP
sc_signal<sc_uint<21>> mp_address_tag;
sc_signal<sc_uint<7>> mp_address_index;
sc_signal<sc_uint<4>> mp_address_offset;
sc_signal<sc_uint<4>> mp_last_addr_offset;
sc_signal<bool> way0_hit;
sc_signal<bool> way1_hit;
sc_signal<bool> miss;
sc_signal<sc_uint<32>> selected_data;
sc_signal<bool> current_LRU; // false: 0, true: 1
// WAYS 128 lines
sc_signal<bool> LRU_bit_check[128]; // bit to compare least recently used
// WAY 0
sc_signal<sc_uint<32>> w0_word[128][4];
sc_signal<sc_uint<21>> w0_TAG[128];
sc_signal<bool> w0_LINE_VALIDATE[128];
//WAY 1
sc_signal<sc_uint<32>> w1_word[128][4];
sc_signal<sc_uint<21>> w1_TAG[128];
sc_signal<bool> w1_LINE_VALIDATE[128];
//buffer
sc_signal<bool> write_buff, read_buff;
sc_signal<bool> full, empty;
sc_signal<sc_uint<32>> adr_sc;
sc_signal<sc_uint<32>> dt_sc;
int burst_cpt;
sc_signal<sc_uint<32>> data_mask_sc;
//FMS signal debug
sc_signal<sc_uint<3>> current_state;
sc_signal<sc_uint<3>> future_state;
void adresse_parcer();
void miss_detection();
void new_state();
void state_transition();
void mae_output();
void buffer_manager();
void trace(sc_trace_file*);
buffercache buffcache_inst;
SC_CTOR(dcache) :
buffcache_inst("buffercache")
{
SC_METHOD(adresse_parcer);
sensitive << DATA_ADR_SM << A_SP;
SC_METHOD(miss_detection);
sensitive << address_tag
<< address_index
<< address_offset
<< LOAD_SM
<< STORE_SM
<< way0_hit
<< way1_hit
<< CLK.neg();
SC_METHOD(new_state);
sensitive << CLK.neg() << RESET_N;
SC_METHOD(state_transition);
sensitive << CLK.neg() << RESET_N;
SC_METHOD(mae_output);
sensitive << CLK.neg() << RESET_N << mp_address_tag
<< mp_address_index << mp_address_offset;
reset_signal_is(RESET_N, false);
buffcache_inst.RESET_N(RESET_N);
buffcache_inst.CLK(CLK);
buffcache_inst.WRITE_OBUFF(write_buff);
buffcache_inst.READ_OBUFF(read_buff);
buffcache_inst.DATA_C(DATA_SM);
buffcache_inst.ADR_C(DATA_ADR_SM);
buffcache_inst.STORE_C(STORE_SM);
buffcache_inst.LOAD_C(LOAD_SM);
buffcache_inst.SIZE_C(MEM_SIZE_SM);
buffcache_inst.FULL(full);
buffcache_inst.EMPTY(empty);
buffcache_inst.DATA_MP(DT_SC);
buffcache_inst.ADR_MP(A_SC);
buffcache_inst.STORE_MP(WRITE_SC);
buffcache_inst.LOAD_MP(READ_SC);
buffcache_inst.SIZE_MP(SIZE_SC);
}
};
#endif |
// ================================================================
// NVDLA Open Source Project
//
// Copyright(c) 2016 - 2017 NVIDIA Corporation. Licensed under the
// NVDLA Open Hardware License; Check "LICENSE" which comes with
// this distribution for more information.
// ================================================================
// File Name: nvdla_accu2pp_if_iface.h
#if !defined(_nvdla_accu2pp_if_iface_H_)
#define _nvdla_accu2pp_if_iface_H_
#include <systemc.h>
#include <stdint.h>
#ifndef _nvdla_cc2pp_pkg_struct_H_
#define _nvdla_cc2pp_pkg_struct_H_
typedef struct nvdla_cc2pp_pkg_s {
sc_int<32> data [16];
uint8_t batch_end ;
uint8_t layer_end ;
} nvdla_cc2pp_pkg_t;
#endif
// union nvdla_accu2pp_if_u {
struct nvdla_accu2pp_if_u {
nvdla_cc2pp_pkg_t nvdla_cc2pp_pkg;
};
typedef struct nvdla_accu2pp_if_s {
// union nvdla_accu2pp_if_u pd ;
nvdla_accu2pp_if_u pd ;
} nvdla_accu2pp_if_t;
#endif // !defined(_nvdla_accu2pp_if_iface_H_)
|
// ================================================================
// NVDLA Open Source Project
//
// Copyright(c) 2016 - 2017 NVIDIA Corporation. Licensed under the
// NVDLA Open Hardware License; Check "LICENSE" which comes with
// this distribution for more information.
// ================================================================
// File Name: nvdla_accu2pp_if_iface.h
#if !defined(_nvdla_accu2pp_if_iface_H_)
#define _nvdla_accu2pp_if_iface_H_
#include <systemc.h>
#include <stdint.h>
#ifndef _nvdla_cc2pp_pkg_struct_H_
#define _nvdla_cc2pp_pkg_struct_H_
typedef struct nvdla_cc2pp_pkg_s {
sc_int<32> data [16];
uint8_t batch_end ;
uint8_t layer_end ;
} nvdla_cc2pp_pkg_t;
#endif
// union nvdla_accu2pp_if_u {
struct nvdla_accu2pp_if_u {
nvdla_cc2pp_pkg_t nvdla_cc2pp_pkg;
};
typedef struct nvdla_accu2pp_if_s {
// union nvdla_accu2pp_if_u pd ;
nvdla_accu2pp_if_u pd ;
} nvdla_accu2pp_if_t;
#endif // !defined(_nvdla_accu2pp_if_iface_H_)
|
Subsets and Splits
No community queries yet
The top public SQL queries from the community will appear here once available.