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### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC0:
.string "w"
.align 3
.LC1:
.string "clients.dat"
.align 3
.LC2:
.string "File could not be opened"
.align 3
.LC3:
.string "Enter the account,name,and balance."
.align 3
.LC4:
.string "%d%s%lf"
.align 3
.LC5:
.string "%d %s %.2f\n"
.text
.align 2
.global main
.type main, %function
main:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -80]!
.cfi_def_cfa_offset 80
.cfi_offset 29, -80
.cfi_offset 30, -72
mov x29, sp
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 72]
mov x1, 0
adrp x0, .LC0
add x1, x0, :lo12:.LC0
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl fopen
str x0, [sp, 32]
ldr x0, [sp, 32]
cmp x0, 0
bne .L2
adrp x0, .LC2
add x0, x0, :lo12:.LC2
bl puts
b .L3
.L2:
adrp x0, .LC3
add x0, x0, :lo12:.LC3
bl puts
mov w0, 63
bl putchar
add x2, sp, 24
add x1, sp, 40
add x0, sp, 20
mov x3, x2
mov x2, x1
mov x1, x0
adrp x0, .LC4
add x0, x0, :lo12:.LC4
bl __isoc99_scanf
b .L4
.L5:
ldr w0, [sp, 20]
ldr d0, [sp, 24]
add x1, sp, 40
mov x3, x1
mov w2, w0
adrp x0, .LC5
add x1, x0, :lo12:.LC5
ldr x0, [sp, 32]
bl fprintf
mov w0, 63
bl putchar
add x2, sp, 24
add x1, sp, 40
add x0, sp, 20
mov x3, x2
mov x2, x1
mov x1, x0
adrp x0, .LC4
add x0, x0, :lo12:.LC4
bl __isoc99_scanf
.L4:
adrp x0, :got:stdin
ldr x0, [x0, #:got_lo12:stdin]
ldr x0, [x0]
bl feof
cmp w0, 0
beq .L5
ldr x0, [sp, 32]
bl fclose
.L3:
mov w0, 0
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 72]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L7
bl __stack_chk_fail
.L7:
mov w0, w1
ldp x29, x30, [sp], 80
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global vsprintf
.type vsprintf, %function
vsprintf:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -80]!
.cfi_def_cfa_offset 80
.cfi_offset 29, -80
.cfi_offset 30, -72
mov x29, sp
str x19, [sp, 16]
.cfi_offset 19, -64
str x0, [sp, 72]
str x1, [sp, 64]
mov x19, x2
add x0, sp, 32
mov x1, x19
ldp q0, q1, [x1]
stp q0, q1, [x0]
add x0, sp, 32
mov x3, x0
ldr x2, [sp, 64]
mov x1, -1
ldr x0, [sp, 72]
bl vsnprintf
ldr x19, [sp, 16]
ldp x29, x30, [sp], 80
.cfi_restore 30
.cfi_restore 29
.cfi_restore 19
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size vsprintf, .-vsprintf
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.local Is_Open
.comm Is_Open,4,4
.local descriptor_vdisk
.comm descriptor_vdisk,4,4
.local Disk_Path
.comm Disk_Path,8,8
.local Head
.comm Head,8,8
.local Tail
.comm Tail,8,8
.local Free_Space
.comm Free_Space,8,8
.local Offset
.comm Offset,8,8
.local N_Slots
.comm N_Slots,8,8
.align 2
.global is_unique
.type is_unique, %function
is_unique:
.LFB6:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
adrp x0, Head
add x0, x0, :lo12:Head
ldr x0, [x0]
str x0, [sp, 40]
b .L2
.L5:
ldr x0, [sp, 40]
mov x1, x0
ldr x0, [sp, 24]
bl strcmp
cmp w0, 0
bne .L3
mov w0, 0
b .L4
.L3:
ldr x0, [sp, 40]
ldr x0, [x0, 80]
str x0, [sp, 40]
.L2:
ldr x0, [sp, 40]
cmp x0, 0
bne .L5
mov w0, 1
.L4:
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE6:
.size is_unique, .-is_unique
.section .rodata
.align 3
.LC0:
.string "%s is already opened\n"
.align 3
.LC1:
.string "error with open"
.align 3
.LC2:
.string "error with ftruncate"
.text
.align 2
.global open_disk
.type open_disk, %function
open_disk:
.LFB7:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
adrp x0, Is_Open
add x0, x0, :lo12:Is_Open
ldr w0, [x0]
cmp w0, 0
beq .L7
adrp x0, Disk_Path
add x0, x0, :lo12:Disk_Path
ldr x0, [x0]
mov x1, x0
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl printf
b .L6
.L7:
mov w2, 420
mov w1, 194
ldr x0, [sp, 24]
bl open
mov w1, w0
adrp x0, descriptor_vdisk
add x0, x0, :lo12:descriptor_vdisk
str w1, [x0]
adrp x0, descriptor_vdisk
add x0, x0, :lo12:descriptor_vdisk
ldr w0, [x0]
cmn w0, #1
bne .L9
bl __errno_location
ldr w0, [x0]
str w0, [sp, 36]
ldr w0, [sp, 36]
cmp w0, 17
bne .L10
mov w1, 2
ldr x0, [sp, 24]
bl open
mov w1, w0
adrp x0, descriptor_vdisk
add x0, x0, :lo12:descriptor_vdisk
str w1, [x0]
adrp x0, descriptor_vdisk
add x0, x0, :lo12:descriptor_vdisk
ldr w0, [x0]
mov w2, 0
mov x1, 5120
bl lseek
adrp x0, descriptor_vdisk
add x0, x0, :lo12:descriptor_vdisk
ldr w3, [x0]
mov x2, 8
adrp x0, N_Slots
add x1, x0, :lo12:N_Slots
mov w0, w3
bl read
adrp x0, descriptor_vdisk
add x0, x0, :lo12:descriptor_vdisk
ldr w0, [x0]
mov w2, 0
mov x1, 0
bl lseek
adrp x0, Free_Space
add x0, x0, :lo12:Free_Space
mov x1, 8388608
str x1, [x0]
str wzr, [sp, 32]
b .L11
.L14:
mov x0, 88
bl malloc
str x0, [sp, 40]
adrp x0, descriptor_vdisk
add x0, x0, :lo12:descriptor_vdisk
ldr w0, [x0]
ldr x1, [sp, 40]
mov x2, 80
bl read
ldr x0, [sp, 40]
str xzr, [x0, 80]
adrp x0, Free_Space
add x0, x0, :lo12:Free_Space
ldr x1, [x0]
ldr x0, [sp, 40]
ldr x0, [x0, 64]
sub x1, x1, x0
adrp x0, Free_Space
add x0, x0, :lo12:Free_Space
str x1, [x0]
adrp x0, Head
add x0, x0, :lo12:Head
ldr x0, [x0]
cmp x0, 0
bne .L12
adrp x0, Head
add x0, x0, :lo12:Head
ldr x1, [sp, 40]
str x1, [x0]
adrp x0, Head
add x0, x0, :lo12:Head
ldr x1, [x0]
adrp x0, Tail
add x0, x0, :lo12:Tail
str x1, [x0]
b .L13
.L12:
adrp x0, Tail
add x0, x0, :lo12:Tail
ldr x0, [x0]
ldr x1, [sp, 40]
str x1, [x0, 80]
adrp x0, Tail
add x0, x0, :lo12:Tail
ldr x1, [sp, 40]
str x1, [x0]
.L13:
ldr w0, [sp, 32]
add w0, w0, 1
str w0, [sp, 32]
.L11:
ldrsw x1, [sp, 32]
adrp x0, N_Slots
add x0, x0, :lo12:N_Slots
ldr x0, [x0]
cmp x1, x0
bcc .L14
adrp x0, N_Slots
add x0, x0, :lo12:N_Slots
ldr x0, [x0]
cmp x0, 0
bne .L15
adrp x0, Offset
add x0, x0, :lo12:Offset
str xzr, [x0]
b .L16
.L15:
adrp x0, Tail
add x0, x0, :lo12:Tail
ldr x0, [x0]
ldr x1, [x0, 72]
adrp x0, Tail
add x0, x0, :lo12:Tail
ldr x0, [x0]
ldr x0, [x0, 64]
add x1, x1, x0
adrp x0, Offset
add x0, x0, :lo12:Offset
str x1, [x0]
.L16:
adrp x0, descriptor_vdisk
add x0, x0, :lo12:descriptor_vdisk
ldr w3, [x0]
adrp x0, Offset
add x0, x0, :lo12:Offset
ldr x0, [x0]
mov x1, x0
mov x0, 5128
add x0, x1, x0
mov w2, 0
mov x1, x0
mov w0, w3
bl lseek
adrp x0, Disk_Path
add x0, x0, :lo12:Disk_Path
ldr x1, [sp, 24]
str x1, [x0]
adrp x0, Is_Open
add x0, x0, :lo12:Is_Open
mov w1, 1
str w1, [x0]
b .L6
.L10:
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl perror
b .L6
.L9:
adrp x0, descriptor_vdisk
add x0, x0, :lo12:descriptor_vdisk
ldr w0, [x0]
mov x1, 5128
movk x1, 0x80, lsl 16
bl ftruncate
cmn w0, #1
bne .L17
adrp x0, .LC2
add x0, x0, :lo12:.LC2
bl perror
b .L6
.L17:
adrp x0, descriptor_vdisk
add x0, x0, :lo12:descriptor_vdisk
ldr w0, [x0]
mov w2, 0
mov x1, 5128
bl lseek
adrp x0, Disk_Path
add x0, x0, :lo12:Disk_Path
ldr x1, [sp, 24]
str x1, [x0]
adrp x0, Offset
add x0, x0, :lo12:Offset
str xzr, [x0]
adrp x0, N_Slots
add x0, x0, :lo12:N_Slots
str xzr, [x0]
adrp x0, Free_Space
add x0, x0, :lo12:Free_Space
mov x1, 8388608
str x1, [x0]
adrp x0, Tail
add x0, x0, :lo12:Tail
str xzr, [x0]
adrp x0, Tail
add x0, x0, :lo12:Tail
ldr x1, [x0]
adrp x0, Head
add x0, x0, :lo12:Head
str x1, [x0]
adrp x0, Is_Open
add x0, x0, :lo12:Is_Open
mov w1, 1
str w1, [x0]
.L6:
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE7:
.size open_disk, .-open_disk
.section .rodata
.align 3
.LC3:
.string "error with struct stat"
.align 3
.LC4:
.string "file number limit reached\n"
.align 3
.LC5:
.string " not enough free space\n"
.align 3
.LC6:
.string "%s: file name too long\n"
.align 3
.LC7:
.string "%s: file name already exists\n"
.align 3
.LC8:
.string "%s: operation completed successfully\n"
.text
.align 2
.global cp_sys_disk
.type cp_sys_disk, %function
cp_sys_disk:
.LFB8:
.cfi_startproc
stp x29, x30, [sp, -192]!
.cfi_def_cfa_offset 192
.cfi_offset 29, -192
.cfi_offset 30, -184
mov x29, sp
str x0, [sp, 24]
str x1, [sp, 16]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 184]
mov x1, 0
add x0, sp, 56
mov x1, x0
ldr x0, [sp, 24]
bl stat
cmn w0, #1
bne .L19
adrp x0, .LC3
add x0, x0, :lo12:.LC3
bl perror
b .L18
.L19:
adrp x0, N_Slots
add x0, x0, :lo12:N_Slots
ldr x0, [x0]
cmp x0, 64
bne .L21
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x0, [x0]
mov x3, x0
mov x2, 26
mov x1, 1
adrp x0, .LC4
add x0, x0, :lo12:.LC4
bl fwrite
b .L18
.L21:
ldr x1, [sp, 104]
adrp x0, Free_Space
add x0, x0, :lo12:Free_Space
ldr x0, [x0]
cmp x1, x0
ble .L22
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x0, [x0]
mov x3, x0
mov x2, 23
mov x1, 1
adrp x0, .LC5
add x0, x0, :lo12:.LC5
bl fwrite
b .L18
.L22:
ldr x0, [sp, 16]
bl strlen
cmp x0, 63
bls .L23
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x3, [x0]
ldr x2, [sp, 16]
adrp x0, .LC6
add x1, x0, :lo12:.LC6
mov x0, x3
bl fprintf
b .L18
.L23:
ldr x0, [sp, 16]
bl is_unique
cmp w0, 0
bne .L24
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x3, [x0]
ldr x2, [sp, 16]
adrp x0, .LC7
add x1, x0, :lo12:.LC7
mov x0, x3
bl fprintf
b .L18
.L24:
mov x0, 88
bl malloc
str x0, [sp, 40]
adrp x0, N_Slots
add x0, x0, :lo12:N_Slots
ldr x0, [x0]
add x1, x0, 1
adrp x0, N_Slots
add x0, x0, :lo12:N_Slots
str x1, [x0]
ldr x0, [sp, 40]
ldr x1, [sp, 16]
bl strcpy
ldr x1, [sp, 104]
ldr x0, [sp, 40]
str x1, [x0, 64]
adrp x0, Offset
add x0, x0, :lo12:Offset
ldr x1, [x0]
ldr x0, [sp, 40]
str x1, [x0, 72]
ldr x0, [sp, 40]
str xzr, [x0, 80]
adrp x0, Head
add x0, x0, :lo12:Head
ldr x0, [x0]
cmp x0, 0
bne .L25
adrp x0, Head
add x0, x0, :lo12:Head
ldr x1, [sp, 40]
str x1, [x0]
adrp x0, Head
add x0, x0, :lo12:Head
ldr x1, [x0]
adrp x0, Tail
add x0, x0, :lo12:Tail
str x1, [x0]
b .L26
.L25:
adrp x0, Tail
add x0, x0, :lo12:Tail
ldr x0, [x0]
ldr x1, [sp, 40]
str x1, [x0, 80]
adrp x0, Tail
add x0, x0, :lo12:Tail
ldr x1, [sp, 40]
str x1, [x0]
.L26:
mov w1, 0
ldr x0, [sp, 24]
bl open
str w0, [sp, 36]
ldr x0, [sp, 104]
bl malloc
str x0, [sp, 48]
ldr x0, [sp, 104]
mov x2, x0
ldr x1, [sp, 48]
ldr w0, [sp, 36]
bl read
adrp x0, descriptor_vdisk
add x0, x0, :lo12:descriptor_vdisk
ldr w0, [x0]
ldr x1, [sp, 104]
mov x2, x1
ldr x1, [sp, 48]
bl write
ldr x0, [sp, 48]
bl free
ldr w0, [sp, 36]
bl close
ldr x1, [sp, 104]
adrp x0, Offset
add x0, x0, :lo12:Offset
ldr x0, [x0]
add x1, x1, x0
adrp x0, Offset
add x0, x0, :lo12:Offset
str x1, [x0]
adrp x0, Free_Space
add x0, x0, :lo12:Free_Space
ldr x1, [x0]
ldr x0, [sp, 104]
sub x1, x1, x0
adrp x0, Free_Space
add x0, x0, :lo12:Free_Space
str x1, [x0]
ldr x1, [sp, 16]
adrp x0, .LC8
add x0, x0, :lo12:.LC8
bl printf
.L18:
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [sp, 184]
ldr x1, [x0]
subs x2, x2, x1
mov x1, 0
beq .L28
bl __stack_chk_fail
.L28:
ldp x29, x30, [sp], 192
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE8:
.size cp_sys_disk, .-cp_sys_disk
.section .rodata
.align 3
.LC9:
.string "disk is empty\n"
.align 3
.LC10:
.string "%s: file requested for copy does not exist\n"
.text
.align 2
.global cp_disk_sys
.type cp_disk_sys, %function
cp_disk_sys:
.LFB9:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str x0, [sp, 24]
str x1, [sp, 16]
adrp x0, N_Slots
add x0, x0, :lo12:N_Slots
ldr x0, [x0]
cmp x0, 0
bne .L30
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x0, [x0]
mov x3, x0
mov x2, 14
mov x1, 1
adrp x0, .LC9
add x0, x0, :lo12:.LC9
bl fwrite
b .L29
.L30:
ldr x0, [sp, 16]
bl strlen
cmp x0, 63
bls .L32
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x3, [x0]
ldr x2, [sp, 16]
adrp x0, .LC6
add x1, x0, :lo12:.LC6
mov x0, x3
bl fprintf
b .L29
.L32:
adrp x0, Head
add x0, x0, :lo12:Head
ldr x0, [x0]
str x0, [sp, 48]
b .L33
.L36:
ldr x0, [sp, 48]
mov x1, x0
ldr x0, [sp, 16]
bl strcmp
cmp w0, 0
bne .L34
mov w2, 420
mov w1, 577
ldr x0, [sp, 24]
bl open
str w0, [sp, 44]
ldr w0, [sp, 44]
cmn w0, #1
bne .L35
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl perror
b .L29
.L35:
ldr x0, [sp, 48]
ldr x0, [x0, 64]
bl malloc
str x0, [sp, 56]
adrp x0, descriptor_vdisk
add x0, x0, :lo12:descriptor_vdisk
ldr w4, [x0]
ldr x0, [sp, 48]
ldr x0, [x0, 64]
mov x2, x0
ldr x0, [sp, 48]
ldr x0, [x0, 72]
mov x1, x0
mov x0, 5128
add x0, x1, x0
mov x3, x0
ldr x1, [sp, 56]
mov w0, w4
bl pread
ldr x0, [sp, 48]
ldr x0, [x0, 64]
mov x2, x0
ldr x1, [sp, 56]
ldr w0, [sp, 44]
bl write
ldr x0, [sp, 56]
bl free
ldr w0, [sp, 44]
bl close
ldr x1, [sp, 16]
adrp x0, .LC8
add x0, x0, :lo12:.LC8
bl printf
b .L29
.L34:
ldr x0, [sp, 48]
ldr x0, [x0, 80]
str x0, [sp, 48]
.L33:
ldr x0, [sp, 48]
cmp x0, 0
bne .L36
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x3, [x0]
ldr x2, [sp, 16]
adrp x0, .LC10
add x1, x0, :lo12:.LC10
mov x0, x3
bl fprintf
.L29:
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE9:
.size cp_disk_sys, .-cp_disk_sys
.section .rodata
.align 3
.LC11:
.string "Disk is empty\n"
.align 3
.LC12:
.string "%s: removed successfully\n"
.align 3
.LC13:
.string "%s: file requested for removal not found\n"
.text
.align 2
.global remove_file
.type remove_file, %function
remove_file:
.LFB10:
.cfi_startproc
stp x29, x30, [sp, -80]!
.cfi_def_cfa_offset 80
.cfi_offset 29, -80
.cfi_offset 30, -72
mov x29, sp
str x0, [sp, 24]
adrp x0, N_Slots
add x0, x0, :lo12:N_Slots
ldr x0, [x0]
cmp x0, 0
bne .L38
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x0, [x0]
mov x3, x0
mov x2, 14
mov x1, 1
adrp x0, .LC11
add x0, x0, :lo12:.LC11
bl fwrite
b .L37
.L38:
ldr x0, [sp, 24]
bl strlen
cmp x0, 63
bls .L40
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x3, [x0]
ldr x2, [sp, 24]
adrp x0, .LC6
add x1, x0, :lo12:.LC6
mov x0, x3
bl fprintf
b .L37
.L40:
adrp x0, Head
add x0, x0, :lo12:Head
ldr x0, [x0]
str x0, [sp, 32]
str xzr, [sp, 40]
b .L41
.L52:
ldr x0, [sp, 32]
mov x1, x0
ldr x0, [sp, 24]
bl strcmp
cmp w0, 0
bne .L42
ldr x0, [sp, 32]
ldr x0, [x0, 80]
str x0, [sp, 48]
str xzr, [sp, 56]
ldr x0, [sp, 48]
cmp x0, 0
beq .L44
ldr x0, [sp, 48]
ldr x0, [x0, 72]
str x0, [sp, 64]
b .L44
.L45:
ldr x0, [sp, 48]
ldr x1, [x0, 72]
ldr x0, [sp, 32]
ldr x0, [x0, 64]
sub x1, x1, x0
ldr x0, [sp, 48]
str x1, [x0, 72]
ldr x0, [sp, 48]
ldr x0, [x0, 64]
ldr x1, [sp, 56]
add x0, x1, x0
str x0, [sp, 56]
ldr x0, [sp, 48]
ldr x0, [x0, 80]
str x0, [sp, 48]
.L44:
ldr x0, [sp, 48]
cmp x0, 0
bne .L45
ldr x0, [sp, 32]
ldr x0, [x0, 80]
cmp x0, 0
beq .L46
ldr x0, [sp, 56]
bl malloc
str x0, [sp, 72]
adrp x0, descriptor_vdisk
add x0, x0, :lo12:descriptor_vdisk
ldr w3, [x0]
ldr x1, [sp, 64]
mov x0, 5128
add x0, x1, x0
mov w2, 0
mov x1, x0
mov w0, w3
bl lseek
adrp x0, descriptor_vdisk
add x0, x0, :lo12:descriptor_vdisk
ldr w0, [x0]
ldr x1, [sp, 56]
mov x2, x1
ldr x1, [sp, 72]
bl read
adrp x0, descriptor_vdisk
add x0, x0, :lo12:descriptor_vdisk
ldr w3, [x0]
ldr x0, [sp, 32]
ldr x0, [x0, 72]
mov x1, x0
mov x0, 5128
add x0, x1, x0
mov w2, 0
mov x1, x0
mov w0, w3
bl lseek
adrp x0, descriptor_vdisk
add x0, x0, :lo12:descriptor_vdisk
ldr w0, [x0]
ldr x1, [sp, 56]
mov x2, x1
ldr x1, [sp, 72]
bl write
ldr x0, [sp, 72]
bl free
b .L47
.L46:
adrp x0, Tail
add x0, x0, :lo12:Tail
ldr x1, [sp, 40]
str x1, [x0]
.L47:
adrp x0, Tail
add x0, x0, :lo12:Tail
ldr x0, [x0]
cmp x0, 0
beq .L48
adrp x0, Tail
add x0, x0, :lo12:Tail
ldr x0, [x0]
ldr x1, [x0, 72]
adrp x0, Tail
add x0, x0, :lo12:Tail
ldr x0, [x0]
ldr x0, [x0, 64]
add x1, x1, x0
adrp x0, Offset
add x0, x0, :lo12:Offset
str x1, [x0]
b .L49
.L48:
adrp x0, Offset
add x0, x0, :lo12:Offset
str xzr, [x0]
.L49:
adrp x0, descriptor_vdisk
add x0, x0, :lo12:descriptor_vdisk
ldr w3, [x0]
adrp x0, Offset
add x0, x0, :lo12:Offset
ldr x0, [x0]
mov x1, x0
mov x0, 5128
add x0, x1, x0
mov w2, 0
mov x1, x0
mov w0, w3
bl lseek
ldr x0, [sp, 32]
ldr x1, [x0, 64]
adrp x0, Free_Space
add x0, x0, :lo12:Free_Space
ldr x0, [x0]
add x1, x1, x0
adrp x0, Free_Space
add x0, x0, :lo12:Free_Space
str x1, [x0]
adrp x0, N_Slots
add x0, x0, :lo12:N_Slots
ldr x0, [x0]
sub x1, x0, #1
adrp x0, N_Slots
add x0, x0, :lo12:N_Slots
str x1, [x0]
ldr x0, [sp, 40]
cmp x0, 0
beq .L50
ldr x0, [sp, 32]
ldr x1, [x0, 80]
ldr x0, [sp, 40]
str x1, [x0, 80]
b .L51
.L50:
ldr x0, [sp, 32]
ldr x1, [x0, 80]
adrp x0, Head
add x0, x0, :lo12:Head
str x1, [x0]
.L51:
ldr x0, [sp, 32]
bl free
ldr x1, [sp, 24]
adrp x0, .LC12
add x0, x0, :lo12:.LC12
bl printf
b .L37
.L42:
ldr x0, [sp, 32]
str x0, [sp, 40]
ldr x0, [sp, 32]
ldr x0, [x0, 80]
str x0, [sp, 32]
.L41:
ldr x0, [sp, 32]
cmp x0, 0
bne .L52
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x3, [x0]
ldr x2, [sp, 24]
adrp x0, .LC13
add x1, x0, :lo12:.LC13
mov x0, x3
bl fprintf
.L37:
ldp x29, x30, [sp], 80
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE10:
.size remove_file, .-remove_file
.align 2
.global close_disk
.type close_disk, %function
close_disk:
.LFB11:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
adrp x0, Head
add x0, x0, :lo12:Head
ldr x0, [x0]
str x0, [sp, 16]
adrp x0, descriptor_vdisk
add x0, x0, :lo12:descriptor_vdisk
ldr w0, [x0]
mov w2, 0
mov x1, 0
bl lseek
b .L54
.L55:
adrp x0, descriptor_vdisk
add x0, x0, :lo12:descriptor_vdisk
ldr w0, [x0]
ldr x1, [sp, 16]
mov x2, 80
bl write
ldr x0, [sp, 16]
str x0, [sp, 24]
ldr x0, [sp, 16]
ldr x0, [x0, 80]
str x0, [sp, 16]
ldr x0, [sp, 24]
bl free
.L54:
ldr x0, [sp, 16]
cmp x0, 0
bne .L55
adrp x0, Head
add x0, x0, :lo12:Head
str xzr, [x0]
adrp x0, Head
add x0, x0, :lo12:Head
ldr x1, [x0]
adrp x0, Tail
add x0, x0, :lo12:Tail
str x1, [x0]
adrp x0, descriptor_vdisk
add x0, x0, :lo12:descriptor_vdisk
ldr w0, [x0]
mov w2, 0
mov x1, 5120
bl lseek
adrp x0, descriptor_vdisk
add x0, x0, :lo12:descriptor_vdisk
ldr w3, [x0]
mov x2, 8
adrp x0, N_Slots
add x1, x0, :lo12:N_Slots
mov w0, w3
bl write
adrp x0, descriptor_vdisk
add x0, x0, :lo12:descriptor_vdisk
ldr w0, [x0]
bl close
adrp x0, Is_Open
add x0, x0, :lo12:Is_Open
str wzr, [x0]
nop
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE11:
.size close_disk, .-close_disk
.section .rodata
.align 3
.LC14:
.string "disk removed successfully"
.text
.align 2
.global remove_disk
.type remove_disk, %function
remove_disk:
.LFB12:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
adrp x0, descriptor_vdisk
add x0, x0, :lo12:descriptor_vdisk
ldr w0, [x0]
bl close
adrp x0, Disk_Path
add x0, x0, :lo12:Disk_Path
ldr x0, [x0]
bl unlink
adrp x0, Head
add x0, x0, :lo12:Head
ldr x0, [x0]
str x0, [sp, 16]
b .L57
.L58:
ldr x0, [sp, 16]
str x0, [sp, 24]
ldr x0, [sp, 16]
ldr x0, [x0, 80]
str x0, [sp, 16]
ldr x0, [sp, 24]
bl free
.L57:
ldr x0, [sp, 16]
cmp x0, 0
bne .L58
adrp x0, Tail
add x0, x0, :lo12:Tail
str xzr, [x0]
adrp x0, Tail
add x0, x0, :lo12:Tail
ldr x1, [x0]
adrp x0, Head
add x0, x0, :lo12:Head
str x1, [x0]
adrp x0, Is_Open
add x0, x0, :lo12:Is_Open
str wzr, [x0]
adrp x0, .LC14
add x0, x0, :lo12:.LC14
bl puts
nop
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE12:
.size remove_disk, .-remove_disk
.section .rodata
.align 3
.LC15:
.string "Files: %lu / %d\nAllocated space: %ld / %d bytes\n"
.align 3
.LC17:
.string "\n%-64s\t[SIZE]\t[OFFSET]\n\n"
.align 3
.LC18:
.string "%-64s\t%ld\t%ld\n"
.text
.align 2
.global ls_disk
.type ls_disk, %function
ls_disk:
.LFB13:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 40]
mov x1, 0
adrp x0, N_Slots
add x0, x0, :lo12:N_Slots
ldr x1, [x0]
adrp x0, Offset
add x0, x0, :lo12:Offset
ldr x0, [x0]
mov w4, 8388608
mov x3, x0
mov w2, 64
adrp x0, .LC15
add x0, x0, :lo12:.LC15
bl printf
adrp x0, Head
add x0, x0, :lo12:Head
ldr x0, [x0]
cmp x0, 0
beq .L64
adrp x0, .LC16
add x1, x0, :lo12:.LC16
add x0, sp, 32
ldr w2, [x1]
str w2, [x0]
ldr w1, [x1, 3]
str w1, [x0, 3]
add x0, sp, 32
mov x1, x0
adrp x0, .LC17
add x0, x0, :lo12:.LC17
bl printf
adrp x0, Head
add x0, x0, :lo12:Head
ldr x0, [x0]
str x0, [sp, 24]
b .L61
.L62:
ldr x1, [sp, 24]
ldr x0, [sp, 24]
ldr x2, [x0, 64]
ldr x0, [sp, 24]
ldr x0, [x0, 72]
mov x3, x0
adrp x0, .LC18
add x0, x0, :lo12:.LC18
bl printf
ldr x0, [sp, 24]
ldr x0, [x0, 80]
str x0, [sp, 24]
.L61:
ldr x0, [sp, 24]
cmp x0, 0
bne .L62
.L64:
nop
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [sp, 40]
ldr x1, [x0]
subs x2, x2, x1
mov x1, 0
beq .L63
bl __stack_chk_fail
.L63:
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE13:
.size ls_disk, .-ls_disk
.section .rodata
.align 3
.LC16:
.string "[NAME]"
.text
.section .rodata
.align 3
.LC19:
.string "[TYPE]\t[BEGIN]\t\t[END]\t\t[SIZE]\t\t[STATE]\n"
.align 3
.LC20:
.string "T\t0\t\t%lu\t\t%lu\t\tReserved\n"
.align 3
.LC21:
.string "D\t%lu\t\t%lu\t\t%ld\t\tUsed\n"
.align 3
.LC22:
.string "D\t%lu\t\t%lu\t\t%ld\t\tFree\n"
.text
.align 2
.global show_info
.type show_info, %function
show_info:
.LFB14:
.cfi_startproc
stp x29, x30, [sp, -16]!
.cfi_def_cfa_offset 16
.cfi_offset 29, -16
.cfi_offset 30, -8
mov x29, sp
adrp x0, .LC19
add x0, x0, :lo12:.LC19
bl puts
mov x2, 5128
mov x1, 5127
adrp x0, .LC20
add x0, x0, :lo12:.LC20
bl printf
adrp x0, Offset
add x0, x0, :lo12:Offset
ldr x0, [x0]
cmp x0, 0
beq .L66
adrp x0, Offset
add x0, x0, :lo12:Offset
ldr x0, [x0]
mov x1, x0
mov x0, 5127
add x1, x1, x0
adrp x0, Offset
add x0, x0, :lo12:Offset
ldr x0, [x0]
mov x3, x0
mov x2, x1
mov x1, 5128
adrp x0, .LC21
add x0, x0, :lo12:.LC21
bl printf
.L66:
adrp x0, Free_Space
add x0, x0, :lo12:Free_Space
ldr x0, [x0]
cmp x0, 0
beq .L68
adrp x0, Offset
add x0, x0, :lo12:Offset
ldr x0, [x0]
mov x1, x0
mov x0, 5128
add x1, x1, x0
adrp x0, Free_Space
add x0, x0, :lo12:Free_Space
ldr x0, [x0]
mov x3, x0
mov x2, 5127
movk x2, 0x80, lsl 16
adrp x0, .LC22
add x0, x0, :lo12:.LC22
bl printf
.L68:
nop
ldp x29, x30, [sp], 16
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE14:
.size show_info, .-show_info
.section .rodata
.align 3
.LC23:
.string "-ls"
.align 3
.LC24:
.string "-i"
.align 3
.LC25:
.string "-csd"
.align 3
.LC26:
.string "-cds"
.align 3
.LC27:
.string "-rmf"
.align 3
.LC28:
.string "-rmd"
.text
.align 2
.global main
.type main, %function
main:
.LFB15:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str w0, [sp, 28]
str x1, [sp, 16]
ldr x0, [sp, 16]
add x0, x0, 8
ldr x0, [x0]
bl open_disk
ldr x0, [sp, 16]
add x0, x0, 16
ldr x2, [x0]
adrp x0, .LC23
add x1, x0, :lo12:.LC23
mov x0, x2
bl strcmp
cmp w0, 0
bne .L70
bl ls_disk
b .L71
.L70:
ldr x0, [sp, 16]
add x0, x0, 16
ldr x2, [x0]
adrp x0, .LC24
add x1, x0, :lo12:.LC24
mov x0, x2
bl strcmp
cmp w0, 0
bne .L72
bl show_info
b .L71
.L72:
ldr x0, [sp, 16]
add x0, x0, 16
ldr x2, [x0]
adrp x0, .LC25
add x1, x0, :lo12:.LC25
mov x0, x2
bl strcmp
cmp w0, 0
bne .L73
ldr x0, [sp, 16]
add x0, x0, 24
ldr x2, [x0]
ldr x0, [sp, 16]
add x0, x0, 32
ldr x0, [x0]
mov x1, x0
mov x0, x2
bl cp_sys_disk
b .L71
.L73:
ldr x0, [sp, 16]
add x0, x0, 16
ldr x2, [x0]
adrp x0, .LC26
add x1, x0, :lo12:.LC26
mov x0, x2
bl strcmp
cmp w0, 0
bne .L74
ldr x0, [sp, 16]
add x0, x0, 24
ldr x2, [x0]
ldr x0, [sp, 16]
add x0, x0, 32
ldr x0, [x0]
mov x1, x0
mov x0, x2
bl cp_disk_sys
b .L71
.L74:
ldr x0, [sp, 16]
add x0, x0, 16
ldr x2, [x0]
adrp x0, .LC27
add x1, x0, :lo12:.LC27
mov x0, x2
bl strcmp
cmp w0, 0
bne .L75
ldr x0, [sp, 16]
add x0, x0, 24
ldr x0, [x0]
bl remove_file
b .L71
.L75:
ldr x0, [sp, 16]
add x0, x0, 16
ldr x2, [x0]
adrp x0, .LC28
add x1, x0, :lo12:.LC28
mov x0, x2
bl strcmp
cmp w0, 0
bne .L71
bl remove_disk
.L71:
adrp x0, Is_Open
add x0, x0, :lo12:Is_Open
ldr w0, [x0]
cmp w0, 0
beq .L76
bl close_disk
.L76:
mov w0, 0
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE15:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global main
.type main, %function
main:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 40]
mov x1, 0
adrp x0, .LC0
add x1, x0, :lo12:.LC0
add x0, sp, 24
ldr x2, [x1]
str x2, [x0]
ldrh w1, [x1, 8]
strh w1, [x0, 8]
str wzr, [sp, 20]
b .L2
.L4:
ldr w0, [sp, 20]
cmp w0, 9
bgt .L3
add x0, sp, 24
add x0, x0, 1
bl puts
ldrb w0, [sp, 27]
add w0, w0, 1
and w0, w0, 255
strb w0, [sp, 27]
.L3:
ldr w0, [sp, 20]
add w0, w0, 1
str w0, [sp, 20]
.L2:
ldr w1, [sp, 20]
mov w0, 9998
cmp w1, w0
ble .L4
mov w0, 0
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 40]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L6
bl __stack_chk_fail
.L6:
mov w0, w1
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size main, .-main
.section .rodata
.align 3
.LC0:
.string "0000HOWDY"
.text
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC0:
.string "%d"
.text
.align 2
.global main
.type main, %function
main:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -208]!
.cfi_def_cfa_offset 208
.cfi_offset 29, -208
.cfi_offset 30, -200
mov x29, sp
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 200]
mov x1, 0
str wzr, [sp, 32]
add x0, sp, 28
mov x1, x0
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl __isoc99_scanf
str wzr, [sp, 32]
b .L2
.L3:
add x1, sp, 40
ldrsw x0, [sp, 32]
lsl x0, x0, 2
add x0, x1, x0
mov x1, x0
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl __isoc99_scanf
ldr w0, [sp, 32]
add w0, w0, 1
str w0, [sp, 32]
.L2:
ldr w0, [sp, 28]
ldr w1, [sp, 32]
cmp w1, w0
blt .L3
mov w0, 1
str w0, [sp, 36]
.L14:
str wzr, [sp, 36]
str wzr, [sp, 32]
b .L4
.L7:
ldrsw x0, [sp, 32]
lsl x0, x0, 2
add x1, sp, 40
ldr w0, [x1, x0]
cmp w0, 1
bne .L5
mov w0, 1
str w0, [sp, 36]
b .L6
.L5:
ldr w0, [sp, 32]
add w0, w0, 1
str w0, [sp, 32]
.L4:
ldr w0, [sp, 28]
ldr w1, [sp, 32]
cmp w1, w0
blt .L7
.L6:
str wzr, [sp, 32]
b .L8
.L11:
ldrsw x0, [sp, 32]
lsl x0, x0, 2
add x1, sp, 40
ldr w0, [x1, x0]
cmp w0, 0
bne .L9
mov w0, 46
bl putchar
.L9:
ldrsw x0, [sp, 32]
lsl x0, x0, 2
add x1, sp, 40
ldr w0, [x1, x0]
cmp w0, 1
bne .L10
mov w0, 42
bl putchar
.L10:
ldr w0, [sp, 32]
add w0, w0, 1
str w0, [sp, 32]
.L8:
ldr w0, [sp, 28]
ldr w1, [sp, 32]
cmp w1, w0
blt .L11
mov w0, 10
bl putchar
ldr w2, [sp, 28]
add x1, sp, 120
add x0, sp, 40
bl next_generation
str wzr, [sp, 32]
b .L12
.L13:
ldrsw x0, [sp, 32]
lsl x0, x0, 2
add x1, sp, 120
ldr w2, [x1, x0]
ldrsw x0, [sp, 32]
lsl x0, x0, 2
add x1, sp, 40
str w2, [x1, x0]
ldr w0, [sp, 32]
add w0, w0, 1
str w0, [sp, 32]
.L12:
ldr w0, [sp, 28]
ldr w1, [sp, 32]
cmp w1, w0
blt .L13
ldr w0, [sp, 36]
cmp w0, 1
beq .L14
mov w0, 0
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 200]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L16
bl __stack_chk_fail
.L16:
mov w0, w1
ldp x29, x30, [sp], 208
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size main, .-main
.align 2
.global next_generation
.type next_generation, %function
next_generation:
.LFB1:
.cfi_startproc
sub sp, sp, #48
.cfi_def_cfa_offset 48
str x0, [sp, 24]
str x1, [sp, 16]
str w2, [sp, 12]
ldr x0, [sp, 24]
ldr w1, [x0]
ldr x0, [sp, 16]
str w1, [x0]
ldrsw x0, [sp, 12]
lsl x0, x0, 2
sub x0, x0, #4
ldr x1, [sp, 24]
add x1, x1, x0
ldrsw x0, [sp, 12]
lsl x0, x0, 2
sub x0, x0, #4
ldr x2, [sp, 16]
add x0, x2, x0
ldr w1, [x1]
str w1, [x0]
str wzr, [sp, 44]
b .L18
.L23:
ldrsw x0, [sp, 44]
lsl x0, x0, 2
sub x0, x0, #4
ldr x1, [sp, 24]
add x0, x1, x0
ldr w0, [x0]
cmp w0, 1
bne .L19
ldrsw x0, [sp, 44]
add x0, x0, 1
lsl x0, x0, 2
ldr x1, [sp, 24]
add x0, x1, x0
ldr w0, [x0]
cmp w0, 1
beq .L20
.L19:
ldrsw x0, [sp, 44]
lsl x0, x0, 2
sub x0, x0, #4
ldr x1, [sp, 24]
add x0, x1, x0
ldr w0, [x0]
cmp w0, 0
bne .L21
ldrsw x0, [sp, 44]
add x0, x0, 1
lsl x0, x0, 2
ldr x1, [sp, 24]
add x0, x1, x0
ldr w0, [x0]
cmp w0, 0
bne .L21
.L20:
ldrsw x0, [sp, 44]
lsl x0, x0, 2
ldr x1, [sp, 16]
add x0, x1, x0
str wzr, [x0]
b .L22
.L21:
ldrsw x0, [sp, 44]
lsl x0, x0, 2
ldr x1, [sp, 16]
add x0, x1, x0
mov w1, 1
str w1, [x0]
.L22:
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L18:
ldr w0, [sp, 12]
sub w0, w0, #1
ldr w1, [sp, 44]
cmp w1, w0
blt .L23
nop
nop
add sp, sp, 48
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE1:
.size next_generation, .-next_generation
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC0:
.string "In the vegas function, a = %d\n"
.text
.align 2
.global vegas
.type vegas, %function
vegas:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
mov w0, -10
str w0, [sp, 28]
ldr w1, [sp, 28]
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl printf
nop
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size vegas, .-vegas
.section .rodata
.align 3
.LC1:
.string "In the main funciton, a = %d\n"
.align 3
.LC2:
.string "In the main function, a = %d\n"
.text
.align 2
.global main
.type main, %function
main:
.LFB1:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
mov w0, 365
str w0, [sp, 28]
ldr w1, [sp, 28]
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl printf
bl vegas
ldr w1, [sp, 28]
adrp x0, .LC2
add x0, x0, :lo12:.LC2
bl printf
mov w0, 0
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE1:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global main
.type main, %function
main:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -16]!
.cfi_def_cfa_offset 16
.cfi_offset 29, -16
.cfi_offset 30, -8
mov x29, sp
bl chfchown32
bl chget_thread_area
bl chgetegid32
bl chgeteuid32
bl chgetgid32
bl chgetgroups32
bl chgetresgid32
bl chgetresuid32
bl chgetuid32
bl chlchown32
bl chmadvise1
bl chown32
bl chset_thread_area
bl chsetfsgid32
bl chsetfsuid32
bl chsetgid32
bl chsetgroups32
bl chsetregid32
bl chsetresgid32
bl chsetresuid32
bl chsetreuid32
bl chsetuid32
bl chsync_file_range
bl chvm86old
bl chvserver
bl newfstatat
bl SYS_truncate64
bl SYS_ftruncate64
bl SYS_sendfile64
bl SYS_fadvise64_64
bl SYS_fcntl64
bl SYS_mmap2
bl SYS_fstat64
bl SYS_stat64
bl SYS_lstat64
bl SYS_fstatat64
mov w0, 0
ldp x29, x30, [sp], 16
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC0:
.string "\nUsage: %s [options] <CAN interface>\n"
.align 3
.LC1:
.string "Options: -s <can_id> (source can_id. Use 8 digits for extended IDs)\n"
.align 3
.LC2:
.string " -d <can_id> (destination can_id. Use 8 digits for extended IDs)\n"
.align 3
.LC3:
.string " -x <addr> (extended addressing mode. Use 'any' for all addresses)\n"
.align 3
.LC4:
.string " -p <byte> (set and enable padding byte)\n"
.align 3
.LC5:
.string " -P <mode> (check padding in FC. (l)ength (c)ontent (a)ll)\n"
.align 3
.LC6:
.string " -t <time ns> (frame transmit time (N_As) in nanosecs)\n"
.align 3
.LC7:
.string " -f <time ns> (ignore FC and force local tx stmin value in nanosecs)\n"
.align 3
.LC8:
.string "\nCAN IDs and addresses are given and expected in hexadecimal values.\n"
.align 3
.LC9:
.string "The pdu data is expected on STDIN in space separated ASCII hex values.\n"
.text
.align 2
.global print_usage
.type print_usage, %function
print_usage:
.LFB6:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str x0, [sp, 24]
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x3, [x0]
ldr x2, [sp, 24]
adrp x0, .LC0
add x1, x0, :lo12:.LC0
mov x0, x3
bl fprintf
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x0, [x0]
mov x3, x0
mov x2, 69
mov x1, 1
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl fwrite
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x0, [x0]
mov x3, x0
mov x2, 74
mov x1, 1
adrp x0, .LC2
add x0, x0, :lo12:.LC2
bl fwrite
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x0, [x0]
mov x3, x0
mov x2, 78
mov x1, 1
adrp x0, .LC3
add x0, x0, :lo12:.LC3
bl fwrite
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x0, [x0]
mov x3, x0
mov x2, 52
mov x1, 1
adrp x0, .LC4
add x0, x0, :lo12:.LC4
bl fwrite
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x0, [x0]
mov x3, x0
mov x2, 70
mov x1, 1
adrp x0, .LC5
add x0, x0, :lo12:.LC5
bl fwrite
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x0, [x0]
mov x3, x0
mov x2, 63
mov x1, 1
adrp x0, .LC6
add x0, x0, :lo12:.LC6
bl fwrite
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x0, [x0]
mov x3, x0
mov x2, 77
mov x1, 1
adrp x0, .LC7
add x0, x0, :lo12:.LC7
bl fwrite
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x0, [x0]
mov x3, x0
mov x2, 69
mov x1, 1
adrp x0, .LC8
add x0, x0, :lo12:.LC8
bl fwrite
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x0, [x0]
mov x3, x0
mov x2, 71
mov x1, 1
adrp x0, .LC9
add x0, x0, :lo12:.LC9
bl fwrite
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x0, [x0]
mov x1, x0
mov w0, 10
bl fputc
nop
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE6:
.size print_usage, .-print_usage
.section .rodata
.align 3
.LC10:
.string "unknown padding check option '%c'.\n"
.align 3
.LC11:
.string "Unknown option %c\n"
.align 3
.LC12:
.string "s:d:x:p:P:t:f:?"
.align 3
.LC13:
.string "socket"
.align 3
.LC14:
.string "bind"
.align 3
.LC15:
.string "%hhx"
.text
.align 2
.global main
.type main, %function
main:
.LFB7:
.cfi_startproc
mov x12, 4224
sub sp, sp, x12
.cfi_def_cfa_offset 4224
stp x29, x30, [sp]
.cfi_offset 29, -4224
.cfi_offset 30, -4216
mov x29, sp
str w0, [sp, 28]
str x1, [sp, 16]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 4216]
mov x1, 0
str wzr, [sp, 40]
str wzr, [sp, 44]
mov w0, -1
str w0, [sp, 64]
ldr w0, [sp, 64]
str w0, [sp, 68]
b .L3
.L19:
ldr w0, [sp, 48]
cmp w0, 120
beq .L4
ldr w0, [sp, 48]
cmp w0, 120
bgt .L5
ldr w0, [sp, 48]
cmp w0, 116
beq .L6
ldr w0, [sp, 48]
cmp w0, 116
bgt .L5
ldr w0, [sp, 48]
cmp w0, 115
beq .L7
ldr w0, [sp, 48]
cmp w0, 115
bgt .L5
ldr w0, [sp, 48]
cmp w0, 112
beq .L8
ldr w0, [sp, 48]
cmp w0, 112
bgt .L5
ldr w0, [sp, 48]
cmp w0, 102
beq .L9
ldr w0, [sp, 48]
cmp w0, 102
bgt .L5
ldr w0, [sp, 48]
cmp w0, 100
beq .L10
ldr w0, [sp, 48]
cmp w0, 100
bgt .L5
ldr w0, [sp, 48]
cmp w0, 63
beq .L11
ldr w0, [sp, 48]
cmp w0, 80
beq .L12
b .L5
.L7:
adrp x0, :got:optarg
ldr x0, [x0, #:got_lo12:optarg]
ldr x0, [x0]
mov w2, 16
mov x1, 0
bl strtoul
str w0, [sp, 68]
adrp x0, :got:optarg
ldr x0, [x0, #:got_lo12:optarg]
ldr x0, [x0]
bl strlen
cmp x0, 7
bls .L3
ldr w0, [sp, 68]
orr w0, w0, -2147483648
str w0, [sp, 68]
b .L3
.L10:
adrp x0, :got:optarg
ldr x0, [x0, #:got_lo12:optarg]
ldr x0, [x0]
mov w2, 16
mov x1, 0
bl strtoul
str w0, [sp, 64]
adrp x0, :got:optarg
ldr x0, [x0, #:got_lo12:optarg]
ldr x0, [x0]
bl strlen
cmp x0, 7
bls .L3
ldr w0, [sp, 64]
orr w0, w0, -2147483648
str w0, [sp, 64]
b .L3
.L4:
adrp x0, opts.0
add x0, x0, :lo12:opts.0
ldr w0, [x0]
orr w1, w0, 2
adrp x0, opts.0
add x0, x0, :lo12:opts.0
str w1, [x0]
adrp x0, :got:optarg
ldr x0, [x0, #:got_lo12:optarg]
ldr x0, [x0]
mov w2, 16
mov x1, 0
bl strtoul
and w1, w0, 255
adrp x0, opts.0
add x0, x0, :lo12:opts.0
strb w1, [x0, 8]
b .L3
.L8:
adrp x0, opts.0
add x0, x0, :lo12:opts.0
ldr w0, [x0]
orr w1, w0, 4
adrp x0, opts.0
add x0, x0, :lo12:opts.0
str w1, [x0]
adrp x0, :got:optarg
ldr x0, [x0, #:got_lo12:optarg]
ldr x0, [x0]
mov w2, 16
mov x1, 0
bl strtoul
and w1, w0, 255
adrp x0, opts.0
add x0, x0, :lo12:opts.0
strb w1, [x0, 9]
b .L3
.L12:
adrp x0, :got:optarg
ldr x0, [x0, #:got_lo12:optarg]
ldr x0, [x0]
ldrb w0, [x0]
cmp w0, 108
bne .L15
adrp x0, opts.0
add x0, x0, :lo12:opts.0
ldr w0, [x0]
orr w1, w0, 16
adrp x0, opts.0
add x0, x0, :lo12:opts.0
str w1, [x0]
b .L3
.L15:
adrp x0, :got:optarg
ldr x0, [x0, #:got_lo12:optarg]
ldr x0, [x0]
ldrb w0, [x0]
cmp w0, 99
bne .L17
adrp x0, opts.0
add x0, x0, :lo12:opts.0
ldr w0, [x0]
orr w1, w0, 32
adrp x0, opts.0
add x0, x0, :lo12:opts.0
str w1, [x0]
b .L3
.L17:
adrp x0, :got:optarg
ldr x0, [x0, #:got_lo12:optarg]
ldr x0, [x0]
ldrb w0, [x0]
cmp w0, 97
bne .L18
adrp x0, opts.0
add x0, x0, :lo12:opts.0
ldr w0, [x0]
orr w1, w0, 32
adrp x0, opts.0
add x0, x0, :lo12:opts.0
str w1, [x0]
b .L3
.L18:
adrp x0, :got:optarg
ldr x0, [x0, #:got_lo12:optarg]
ldr x0, [x0]
ldrb w0, [x0]
mov w1, w0
adrp x0, .LC10
add x0, x0, :lo12:.LC10
bl printf
ldr x0, [sp, 16]
ldr x0, [x0]
bl __xpg_basename
bl print_usage
mov w0, 0
bl exit
.L6:
adrp x0, :got:optarg
ldr x0, [x0, #:got_lo12:optarg]
ldr x0, [x0]
mov w2, 10
mov x1, 0
bl strtoul
mov w1, w0
adrp x0, opts.0
add x0, x0, :lo12:opts.0
str w1, [x0, 4]
b .L3
.L9:
adrp x0, opts.0
add x0, x0, :lo12:opts.0
ldr w0, [x0]
orr w1, w0, 128
adrp x0, opts.0
add x0, x0, :lo12:opts.0
str w1, [x0]
adrp x0, :got:optarg
ldr x0, [x0, #:got_lo12:optarg]
ldr x0, [x0]
mov w2, 10
mov x1, 0
bl strtoul
str w0, [sp, 40]
b .L3
.L11:
ldr x0, [sp, 16]
ldr x0, [x0]
bl __xpg_basename
bl print_usage
mov w0, 0
bl exit
.L5:
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x3, [x0]
ldr w2, [sp, 48]
adrp x0, .LC11
add x1, x0, :lo12:.LC11
mov x0, x3
bl fprintf
ldr x0, [sp, 16]
ldr x0, [x0]
bl __xpg_basename
bl print_usage
mov w0, 1
bl exit
.L3:
adrp x0, .LC12
add x2, x0, :lo12:.LC12
ldr x1, [sp, 16]
ldr w0, [sp, 28]
bl getopt
str w0, [sp, 48]
ldr w0, [sp, 48]
cmn w0, #1
bne .L19
adrp x0, :got:optind
ldr x0, [x0, #:got_lo12:optind]
ldr w0, [x0]
ldr w1, [sp, 28]
sub w0, w1, w0
cmp w0, 1
bne .L20
ldr w0, [sp, 68]
cmn w0, #1
beq .L20
ldr w0, [sp, 64]
cmn w0, #1
bne .L21
.L20:
ldr x0, [sp, 16]
ldr x0, [x0]
bl __xpg_basename
bl print_usage
mov w0, 1
bl exit
.L21:
mov w2, 6
mov w1, 2
mov w0, 29
bl socket
str w0, [sp, 52]
ldr w0, [sp, 52]
cmp w0, 0
bge .L22
adrp x0, .LC13
add x0, x0, :lo12:.LC13
bl perror
mov w0, 1
bl exit
.L22:
mov w4, 12
adrp x0, opts.0
add x3, x0, :lo12:opts.0
mov w2, 1
mov w1, 106
ldr w0, [sp, 52]
bl setsockopt
adrp x0, opts.0
add x0, x0, :lo12:opts.0
ldr w0, [x0]
and w0, w0, 128
cmp w0, 0
beq .L23
add x0, sp, 40
mov w4, 4
mov x3, x0
mov w2, 3
mov w1, 106
ldr w0, [sp, 52]
bl setsockopt
.L23:
mov w0, 29
strh w0, [sp, 56]
adrp x0, :got:optind
ldr x0, [x0, #:got_lo12:optind]
ldr w0, [x0]
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 16]
add x0, x1, x0
ldr x1, [x0]
add x0, sp, 80
bl strcpy
add x0, sp, 80
mov x2, x0
mov x1, 35123
ldr w0, [sp, 52]
bl ioctl
ldr w0, [sp, 96]
str w0, [sp, 60]
add x0, sp, 56
mov w2, 24
mov x1, x0
ldr w0, [sp, 52]
bl bind
cmp w0, 0
bge .L25
adrp x0, .LC14
add x0, x0, :lo12:.LC14
bl perror
ldr w0, [sp, 52]
bl close
mov w0, 1
bl exit
.L27:
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L25:
ldr w0, [sp, 44]
cmp w0, 4095
bgt .L26
add x1, sp, 120
ldrsw x0, [sp, 44]
add x0, x1, x0
mov x1, x0
adrp x0, .LC15
add x0, x0, :lo12:.LC15
bl __isoc99_scanf
cmp w0, 1
beq .L27
.L26:
ldrsw x1, [sp, 44]
add x0, sp, 120
mov x2, x1
mov x1, x0
ldr w0, [sp, 52]
bl write
ldr w0, [sp, 52]
bl close
mov w0, 0
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 4216]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L29
bl __stack_chk_fail
.L29:
mov w0, w1
ldp x29, x30, [sp]
mov x12, 4224
add sp, sp, x12
.cfi_restore 29
.cfi_restore 30
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE7:
.size main, .-main
.local opts.0
.comm opts.0,12,8
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global mul8x3u_1A4
.type mul8x3u_1A4, %function
mul8x3u_1A4:
.LFB6:
.cfi_startproc
sub sp, sp, #128
.cfi_def_cfa_offset 128
str x0, [sp, 8]
str x1, [sp]
ldr x0, [sp]
lsr x1, x0, 2
ldr x0, [sp, 8]
lsr x0, x0, 5
and x0, x1, x0
and x0, x0, 1
str x0, [sp, 16]
ldr x0, [sp, 8]
lsr x1, x0, 6
ldr x0, [sp]
lsr x0, x0, 2
and x0, x1, x0
and x0, x0, 1
str x0, [sp, 24]
ldr x0, [sp, 8]
lsr x1, x0, 7
ldr x0, [sp]
lsr x0, x0, 2
and x0, x1, x0
and x0, x0, 1
str x0, [sp, 32]
ldr x0, [sp]
lsr x1, x0, 1
ldr x0, [sp, 8]
lsr x0, x0, 6
and x0, x1, x0
and x0, x0, 1
str x0, [sp, 40]
ldr x0, [sp]
lsr x1, x0, 1
ldr x0, [sp, 8]
lsr x0, x0, 7
and x0, x1, x0
and x0, x0, 1
str x0, [sp, 48]
ldr x1, [sp, 40]
ldr x0, [sp, 48]
orr x0, x1, x0
str x0, [sp, 56]
ldr x1, [sp, 48]
ldr x0, [sp, 24]
and x0, x1, x0
str x0, [sp, 64]
ldr x1, [sp, 48]
ldr x0, [sp, 24]
eor x0, x1, x0
str x0, [sp, 72]
ldr x1, [sp, 72]
ldr x0, [sp, 56]
eor x0, x1, x0
str x0, [sp, 80]
ldr x0, [sp]
lsr x1, x0, 1
ldr x0, [sp, 72]
and x0, x1, x0
and x0, x0, 1
str x0, [sp, 88]
ldr x1, [sp, 32]
ldr x0, [sp, 64]
eor x0, x1, x0
str x0, [sp, 96]
ldr x1, [sp, 96]
ldr x0, [sp, 88]
eor x0, x1, x0
str x0, [sp, 104]
ldr x1, [sp, 32]
ldr x0, [sp, 56]
and x0, x1, x0
str x0, [sp, 112]
str xzr, [sp, 120]
ldr x0, [sp, 16]
lsl x0, x0, 1
and x0, x0, 2
ldr x1, [sp, 120]
orr x0, x1, x0
str x0, [sp, 120]
ldr x0, [sp, 32]
lsl x0, x0, 2
and x0, x0, 4
ldr x1, [sp, 120]
orr x0, x1, x0
str x0, [sp, 120]
ldr x0, [sp, 96]
lsl x0, x0, 3
and x0, x0, 8
ldr x1, [sp, 120]
orr x0, x1, x0
str x0, [sp, 120]
ldr x0, [sp, 16]
lsl x0, x0, 5
and x0, x0, 32
ldr x1, [sp, 120]
orr x0, x1, x0
str x0, [sp, 120]
ldr x0, [sp, 80]
lsl x0, x0, 6
and x0, x0, 64
ldr x1, [sp, 120]
orr x0, x1, x0
str x0, [sp, 120]
ldr x0, [sp, 16]
lsl x0, x0, 7
and x0, x0, 255
ldr x1, [sp, 120]
orr x0, x1, x0
str x0, [sp, 120]
ldr x0, [sp, 80]
lsl x0, x0, 8
and x0, x0, 256
ldr x1, [sp, 120]
orr x0, x1, x0
str x0, [sp, 120]
ldr x0, [sp, 104]
lsl x0, x0, 9
and x0, x0, 512
ldr x1, [sp, 120]
orr x0, x1, x0
str x0, [sp, 120]
ldr x0, [sp, 112]
lsl x0, x0, 10
and x0, x0, 1024
ldr x1, [sp, 120]
orr x0, x1, x0
str x0, [sp, 120]
ldr x0, [sp, 120]
add sp, sp, 128
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE6:
.size mul8x3u_1A4, .-mul8x3u_1A4
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.global proc_sem
.bss
.align 3
.type proc_sem, %object
.size proc_sem, 8
proc_sem:
.zero 8
.global mutex
.align 3
.type mutex, %object
.size mutex, 8
mutex:
.zero 8
.global file_name_A
.section .rodata
.align 3
.LC0:
.string "output_A.txt"
.section .data.rel.local,"aw"
.align 3
.type file_name_A, %object
.size file_name_A, 8
file_name_A:
.xword .LC0
.global file_name_B
.section .rodata
.align 3
.LC1:
.string "output_B.txt"
.section .data.rel.local
.align 3
.type file_name_B, %object
.size file_name_B, 8
file_name_B:
.xword .LC1
.section .rodata
.align 3
.LC2:
.string "mmap"
.align 3
.LC3:
.string "sem_init"
.align 3
.LC4:
.string "ora avvio la soluzione_A()..."
.align 3
.LC5:
.string "\n"
.align 3
.LC6:
.string "ed ora avvio la soluzione_B()..."
.align 3
.LC7:
.string "sem_destroy"
.align 3
.LC8:
.string "bye!"
.text
.align 2
.global main
.type main, %function
main:
.LFB6:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str w0, [sp, 28]
str x1, [sp, 16]
mov x5, 0
mov w4, -1
mov w3, 33
mov w2, 3
mov x1, 64
mov x0, 0
bl mmap
mov x1, x0
adrp x0, proc_sem
add x0, x0, :lo12:proc_sem
str x1, [x0]
adrp x0, proc_sem
add x0, x0, :lo12:proc_sem
ldr x0, [x0]
cmn x0, #1
bne .L2
adrp x0, .LC2
add x0, x0, :lo12:.LC2
bl perror
mov w0, 1
bl exit
.L2:
adrp x0, proc_sem
add x0, x0, :lo12:proc_sem
ldr x0, [x0]
add x1, x0, 32
adrp x0, mutex
add x0, x0, :lo12:mutex
str x1, [x0]
adrp x0, proc_sem
add x0, x0, :lo12:proc_sem
ldr x0, [x0]
mov w2, 0
mov w1, 1
bl sem_init
str w0, [sp, 44]
ldr w0, [sp, 44]
cmn w0, #1
bne .L3
adrp x0, .LC3
add x0, x0, :lo12:.LC3
bl perror
mov w0, 1
bl exit
.L3:
adrp x0, mutex
add x0, x0, :lo12:mutex
ldr x0, [x0]
mov w2, 1
mov w1, 1
bl sem_init
str w0, [sp, 44]
ldr w0, [sp, 44]
cmn w0, #1
bne .L4
adrp x0, .LC3
add x0, x0, :lo12:.LC3
bl perror
mov w0, 1
bl exit
.L4:
adrp x0, .LC4
add x0, x0, :lo12:.LC4
bl puts
bl solution_A
adrp x0, .LC5
add x0, x0, :lo12:.LC5
bl puts
adrp x0, .LC6
add x0, x0, :lo12:.LC6
bl puts
bl solution_B
adrp x0, proc_sem
add x0, x0, :lo12:proc_sem
ldr x0, [x0]
bl sem_destroy
str w0, [sp, 44]
ldr w0, [sp, 44]
cmn w0, #1
bne .L5
adrp x0, .LC7
add x0, x0, :lo12:.LC7
bl perror
mov w0, 1
bl exit
.L5:
adrp x0, mutex
add x0, x0, :lo12:mutex
ldr x0, [x0]
bl sem_destroy
str w0, [sp, 44]
ldr w0, [sp, 44]
cmn w0, #1
bne .L6
adrp x0, .LC7
add x0, x0, :lo12:.LC7
bl perror
mov w0, 1
bl exit
.L6:
adrp x0, .LC8
add x0, x0, :lo12:.LC8
bl puts
mov w0, 0
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE6:
.size main, .-main
.section .rodata
.align 3
.LC9:
.string "fork()"
.align 3
.LC10:
.string "sem_post"
.align 3
.LC11:
.string "[parent] solution A - bye"
.text
.align 2
.global solution_A
.type solution_A, %function
solution_A:
.LFB7:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
adrp x0, file_name_A
add x0, x0, :lo12:file_name_A
ldr x0, [x0]
mov w1, 1048576
bl create_file_set_size
str wzr, [sp, 24]
b .L9
.L12:
bl fork
cmn w0, #1
beq .L10
cmp w0, 0
bne .L11
ldr w0, [sp, 24]
bl child_process_solution_A
b .L11
.L10:
adrp x0, .LC9
add x0, x0, :lo12:.LC9
bl perror
mov w0, 1
bl exit
.L11:
ldr w0, [sp, 24]
add w0, w0, 1
str w0, [sp, 24]
.L9:
ldr w0, [sp, 24]
cmp w0, 3
ble .L12
str wzr, [sp, 28]
b .L13
.L15:
adrp x0, proc_sem
add x0, x0, :lo12:proc_sem
ldr x0, [x0]
bl sem_post
cmn w0, #1
bne .L14
adrp x0, .LC10
add x0, x0, :lo12:.LC10
bl perror
mov w0, 1
bl exit
.L14:
ldr w0, [sp, 28]
add w0, w0, 1
str w0, [sp, 28]
.L13:
ldr w1, [sp, 28]
mov w0, 3
movk w0, 0x10, lsl 16
cmp w1, w0
ble .L15
nop
.L16:
mov x0, 0
bl wait
cmn w0, #1
bne .L16
adrp x0, .LC11
add x0, x0, :lo12:.LC11
bl puts
nop
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE7:
.size solution_A, .-solution_A
.section .rodata
.align 3
.LC12:
.string "mmap()"
.align 3
.LC13:
.string "sem_wait"
.align 3
.LC14:
.string "[child %d] EOF\n"
.align 3
.LC15:
.string "[child %d] bye write_counter=%d\n"
.align 3
.LC16:
.string "[parent] solution B - bye"
.text
.align 2
.global solution_B
.type solution_B, %function
solution_B:
.LFB8:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str wzr, [sp, 28]
str wzr, [sp, 32]
adrp x0, file_name_B
add x0, x0, :lo12:file_name_B
ldr x0, [x0]
mov w1, 1048576
bl create_file_set_size
adrp x0, file_name_B
add x0, x0, :lo12:file_name_B
ldr x0, [x0]
mov w1, 2
bl open
str w0, [sp, 44]
mov x5, 0
ldr w4, [sp, 44]
mov w3, 1
mov w2, 3
mov x1, 1048576
mov x0, 0
bl mmap
str x0, [sp, 56]
ldr x0, [sp, 56]
cmn x0, #1
bne .L18
adrp x0, .LC12
add x0, x0, :lo12:.LC12
bl perror
mov w0, 1
bl exit
.L18:
ldr w0, [sp, 44]
bl close
ldr x0, [sp, 56]
str x0, [sp, 48]
str wzr, [sp, 36]
b .L19
.L31:
bl fork
cmn w0, #1
beq .L20
cmp w0, 0
bne .L21
ldr w0, [sp, 36]
and w0, w0, 255
add w0, w0, 65
strb w0, [sp, 27]
b .L22
.L30:
adrp x0, proc_sem
add x0, x0, :lo12:proc_sem
ldr x0, [x0]
bl sem_wait
cmn w0, #1
bne .L23
adrp x0, .LC13
add x0, x0, :lo12:.LC13
bl perror
mov w0, 1
bl exit
.L23:
adrp x0, mutex
add x0, x0, :lo12:mutex
ldr x0, [x0]
bl sem_wait
cmn w0, #1
bne .L25
adrp x0, .LC13
add x0, x0, :lo12:.LC13
bl perror
mov w0, 1
bl exit
.L27:
ldr x0, [sp, 48]
add x0, x0, 1
str x0, [sp, 48]
.L25:
ldr x0, [sp, 48]
ldrb w0, [x0]
cmp w0, 0
beq .L26
ldr x1, [sp, 48]
ldr x0, [sp, 56]
sub x1, x1, x0
mov x0, 1048575
cmp x1, x0
ble .L27
.L26:
ldr x1, [sp, 48]
ldr x0, [sp, 56]
sub x0, x1, x0
cmp x0, 1048576
bne .L28
ldr w1, [sp, 36]
adrp x0, .LC14
add x0, x0, :lo12:.LC14
bl printf
mov w0, 1
str w0, [sp, 28]
b .L29
.L28:
ldr x0, [sp, 48]
ldrb w1, [sp, 27]
strb w1, [x0]
ldr x0, [sp, 48]
add x0, x0, 1
str x0, [sp, 48]
ldr w0, [sp, 32]
add w0, w0, 1
str w0, [sp, 32]
.L29:
adrp x0, mutex
add x0, x0, :lo12:mutex
ldr x0, [x0]
bl sem_post
cmn w0, #1
bne .L22
adrp x0, .LC10
add x0, x0, :lo12:.LC10
bl perror
mov w0, 1
bl exit
.L22:
ldr w0, [sp, 28]
cmp w0, 0
beq .L30
ldr w2, [sp, 32]
ldr w1, [sp, 36]
adrp x0, .LC15
add x0, x0, :lo12:.LC15
bl printf
mov w0, 0
bl exit
.L20:
adrp x0, .LC9
add x0, x0, :lo12:.LC9
bl perror
mov w0, 1
bl exit
.L21:
ldr w0, [sp, 36]
add w0, w0, 1
str w0, [sp, 36]
.L19:
ldr w0, [sp, 36]
cmp w0, 3
ble .L31
str wzr, [sp, 40]
b .L32
.L34:
adrp x0, proc_sem
add x0, x0, :lo12:proc_sem
ldr x0, [x0]
bl sem_post
cmn w0, #1
bne .L33
adrp x0, .LC10
add x0, x0, :lo12:.LC10
bl perror
mov w0, 1
bl exit
.L33:
ldr w0, [sp, 40]
add w0, w0, 1
str w0, [sp, 40]
.L32:
ldr w1, [sp, 40]
mov w0, 3
movk w0, 0x10, lsl 16
cmp w1, w0
ble .L34
nop
.L35:
mov x0, 0
bl wait
cmn w0, #1
bne .L35
adrp x0, .LC16
add x0, x0, :lo12:.LC16
bl puts
nop
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE8:
.size solution_B, .-solution_B
.section .rodata
.align 3
.LC17:
.string "open file"
.align 3
.LC18:
.string "ftruncate()"
.text
.align 2
.global create_file_set_size
.type create_file_set_size, %function
create_file_set_size:
.LFB9:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
str w1, [sp, 20]
mov w2, 384
mov w1, 578
ldr x0, [sp, 24]
bl open
str w0, [sp, 40]
ldr w0, [sp, 40]
cmn w0, #1
bne .L37
adrp x0, .LC17
add x0, x0, :lo12:.LC17
bl perror
mov w0, 1
bl exit
.L37:
ldr w0, [sp, 20]
mov x1, x0
ldr w0, [sp, 40]
bl ftruncate
str w0, [sp, 44]
ldr w0, [sp, 44]
cmn w0, #1
bne .L38
adrp x0, .LC18
add x0, x0, :lo12:.LC18
bl perror
mov w0, 1
bl exit
.L38:
ldr w0, [sp, 40]
bl close
nop
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE9:
.size create_file_set_size, .-create_file_set_size
.section .rodata
.align 3
.LC19:
.string "write()"
.text
.align 2
.global child_process_solution_A
.type child_process_solution_A, %function
child_process_solution_A:
.LFB10:
.cfi_startproc
stp x29, x30, [sp, -80]!
.cfi_def_cfa_offset 80
.cfi_offset 29, -80
.cfi_offset 30, -72
mov x29, sp
str w0, [sp, 28]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 72]
mov x1, 0
str wzr, [sp, 48]
str wzr, [sp, 52]
ldr w0, [sp, 28]
and w0, w0, 255
add w0, w0, 65
and w0, w0, 255
strb w0, [sp, 47]
adrp x0, file_name_A
add x0, x0, :lo12:file_name_A
ldr x0, [x0]
mov w1, 2
bl open
str w0, [sp, 56]
b .L40
.L48:
adrp x0, proc_sem
add x0, x0, :lo12:proc_sem
ldr x0, [x0]
bl sem_wait
cmn w0, #1
bne .L41
adrp x0, .LC13
add x0, x0, :lo12:.LC13
bl perror
mov w0, 1
bl exit
.L41:
adrp x0, mutex
add x0, x0, :lo12:mutex
ldr x0, [x0]
bl sem_wait
cmn w0, #1
bne .L50
adrp x0, .LC13
add x0, x0, :lo12:.LC13
bl perror
mov w0, 1
bl exit
.L50:
nop
.L44:
add x0, sp, 46
mov x2, 1
mov x1, x0
ldr w0, [sp, 56]
bl read
str w0, [sp, 60]
ldr w0, [sp, 60]
cmp w0, 0
ble .L43
ldrb w0, [sp, 46]
cmp w0, 0
bne .L44
.L43:
ldr w0, [sp, 60]
cmp w0, 1
bne .L45
mov w2, 1
mov x1, -1
ldr w0, [sp, 56]
bl lseek
str x0, [sp, 64]
add x0, sp, 47
mov x2, 1
mov x1, x0
ldr w0, [sp, 56]
bl write
str w0, [sp, 60]
ldr w0, [sp, 60]
cmn w0, #1
bne .L46
adrp x0, .LC19
add x0, x0, :lo12:.LC19
bl perror
mov w0, 1
bl exit
.L46:
ldr w0, [sp, 52]
add w0, w0, 1
str w0, [sp, 52]
b .L47
.L45:
ldr w1, [sp, 28]
adrp x0, .LC14
add x0, x0, :lo12:.LC14
bl printf
mov w0, 1
str w0, [sp, 48]
.L47:
adrp x0, mutex
add x0, x0, :lo12:mutex
ldr x0, [x0]
bl sem_post
cmn w0, #1
bne .L40
adrp x0, .LC10
add x0, x0, :lo12:.LC10
bl perror
mov w0, 1
bl exit
.L40:
ldr w0, [sp, 48]
cmp w0, 0
beq .L48
ldr w0, [sp, 56]
bl close
ldr w2, [sp, 52]
ldr w1, [sp, 28]
adrp x0, .LC15
add x0, x0, :lo12:.LC15
bl printf
mov w0, 0
bl exit
.cfi_endproc
.LFE10:
.size child_process_solution_A, .-child_process_solution_A
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC0:
.string "Port : %s\n"
.align 3
.LC1:
.string "Baud : %d\n"
.align 3
.LC2:
.string "Mode : %d\n"
.align 3
.LC3:
.string "error command"
.text
.align 2
.global main
.type main, %function
main:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str w0, [sp, 28]
str x1, [sp, 16]
ldr w0, [sp, 28]
cmp w0, 4
bne .L2
ldr x0, [sp, 16]
add x0, x0, 16
ldr x0, [x0]
mov w2, 10
mov x1, 0
bl strtol
str w0, [sp, 40]
ldr x0, [sp, 16]
add x0, x0, 24
ldr x0, [x0]
mov w2, 10
mov x1, 0
bl strtol
str w0, [sp, 44]
ldr x0, [sp, 16]
add x0, x0, 8
ldr x0, [x0]
mov x1, x0
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl printf
ldr w1, [sp, 40]
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl printf
ldr w1, [sp, 44]
adrp x0, .LC2
add x0, x0, :lo12:.LC2
bl printf
b .L3
.L2:
adrp x0, .LC3
add x0, x0, :lo12:.LC3
bl puts
.L3:
mov w0, 0
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global bubble_sort
.type bubble_sort, %function
bubble_sort:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
str w1, [sp, 20]
.L5:
str wzr, [sp, 44]
str wzr, [sp, 40]
b .L2
.L4:
ldrsw x0, [sp, 40]
lsl x0, x0, 2
ldr x1, [sp, 24]
add x0, x1, x0
ldr w1, [x0]
ldrsw x0, [sp, 40]
add x0, x0, 1
lsl x0, x0, 2
ldr x2, [sp, 24]
add x0, x2, x0
ldr w0, [x0]
cmp w1, w0
ble .L3
mov w0, 1
str w0, [sp, 44]
ldrsw x0, [sp, 40]
lsl x0, x0, 2
ldr x1, [sp, 24]
add x0, x1, x0
ldr w2, [x0]
ldrsw x0, [sp, 40]
add x0, x0, 1
lsl x0, x0, 2
ldr x1, [sp, 24]
add x0, x1, x0
ldr w0, [x0]
mov w1, w0
mov w0, w2
bl SWAP
.L3:
ldr w0, [sp, 40]
add w0, w0, 1
str w0, [sp, 40]
.L2:
ldr w0, [sp, 20]
sub w0, w0, #1
ldr w1, [sp, 40]
cmp w1, w0
blt .L4
ldr w0, [sp, 44]
cmp w0, 0
bne .L5
nop
nop
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size bubble_sort, .-bubble_sort
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC0:
.string "%d"
.align 3
.LC1:
.string "%d aparece %d vez(es)\n"
.text
.align 2
.global main
.type main, %function
main:
.LFB0:
.cfi_startproc
sub sp, sp, #65536
.cfi_def_cfa_offset 65536
str xzr, [sp, 1024]
mov x12, 14512
sub sp, sp, x12
.cfi_def_cfa_offset 80048
stp x29, x30, [sp]
.cfi_offset 29, -80048
.cfi_offset 30, -80040
mov x29, sp
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
add x1, sp, 65536
ldr x2, [x0]
str x2, [x1, 14504]
mov x2, 0
str wzr, [sp, 36]
add x0, sp, 24
mov x1, x0
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl __isoc99_scanf
mov w0, 1
str w0, [sp, 32]
b .L2
.L5:
add x0, sp, 28
mov x1, x0
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl __isoc99_scanf
ldr w0, [sp, 28]
ldr w1, [sp, 36]
cmp w1, w0
bge .L3
ldr w0, [sp, 28]
str w0, [sp, 36]
b .L4
.L3:
ldr w0, [sp, 28]
str w0, [sp, 28]
.L4:
ldr w0, [sp, 28]
sxtw x0, w0
lsl x0, x0, 2
add x1, sp, 40
ldr w0, [x1, x0]
ldr w1, [sp, 28]
add w2, w0, 1
sxtw x0, w1
lsl x0, x0, 2
add x1, sp, 40
str w2, [x1, x0]
ldr w0, [sp, 32]
add w0, w0, 1
str w0, [sp, 32]
.L2:
ldr w0, [sp, 24]
ldr w1, [sp, 32]
cmp w1, w0
ble .L5
mov w0, 1
str w0, [sp, 32]
b .L6
.L9:
ldrsw x0, [sp, 32]
lsl x0, x0, 2
add x1, sp, 40
ldr w0, [x1, x0]
cmp w0, 0
beq .L12
ldrsw x0, [sp, 32]
lsl x0, x0, 2
add x1, sp, 40
ldr w0, [x1, x0]
mov w2, w0
ldr w1, [sp, 32]
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl printf
b .L8
.L12:
nop
.L8:
ldr w0, [sp, 32]
add w0, w0, 1
str w0, [sp, 32]
.L6:
ldr w1, [sp, 32]
ldr w0, [sp, 36]
cmp w1, w0
ble .L9
mov w0, 0
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
add x3, sp, 65536
ldr x4, [x3, 14504]
ldr x2, [x0]
subs x4, x4, x2
mov x2, 0
beq .L11
bl __stack_chk_fail
.L11:
mov w0, w1
ldp x29, x30, [sp]
.cfi_restore 29
.cfi_restore 30
add sp, sp, 2224
.cfi_def_cfa_offset 77824
add sp, sp, 77824
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.global alert_pulseway_lua_z
.data
.align 3
.type alert_pulseway_lua_z, %object
.size alert_pulseway_lua_z, 2138
alert_pulseway_lua_z:
.string "x\234\355Y\337\217\3336\022~v\200\374\017\204\236\354\255Wq\222\303=\024Q\201\273\303\025\027\\\320\024\311\336S[\b\264D\255UK\242\217\244\272\361\025\311\337~3\303\037\242dy\355\340\202\2428\024X\254%r8\344\314|\363\rI\335\336VuW\262\206\253{\241\r[\266\374C\335\366-\223\025\253\273B1\016\235U\3374\360f\204\372\2057\253\360\304*\251XU7\202\204\352\226\337\013\266\345\305\276?\350\247O\032Y\240\004\364\346A>c\007\256x\253S\324\234\217\372\302"
.string "\230*?3\352\264\357\351\223\272\232\031\362\315&,{\334\361j2\332\354D\367\364\311b:\337\334D\242+\237>\361\253$[\317\3315\356\034\031vn\334L\347`\332\270=\266m\334\363j\252\300Yw2\351\354l\316\276\333[%L\266q\321\244\2310\3006\254L\356\275\304s'!\367\353\221D'M$\365\302I\331\326\365\031]/\317\314\346uY\007\202$\254}\203\203\356\352V"
.ascii "\nY[7M\255E!\273R3#\331\003\257\r3\320\310\314\256\326L\027\252"
.ascii ">\030\006O\252\357X'>\030\257\013\237\363b'\212}\336j\320\372"
.ascii "rs\363\347\315\315\363\315f3#q"
.string "\350\033-\036\370\021\335\0031q!\353\265P\035o\305\247,Ih\345\313\373Fny\223\267\242Mit\335i\303\273B\344JTJ\350]\226uu\303 e.\t\2762`_\332J\260_vu\001K\\\256V!\234v}f\213\221\374\025\336\031\013\343\3532\206bh\\\223\024.v\246\033\233\255\300\275\222\340\364S\tj\267\"\245\260>\255e7#\030\365\272)\321:gT\200Z\336\326]o\004\272\335HmT\335\335\003\351\230]Z5R\252\245Szn\324j\345TKSW\307\374\001|\222\313\252j\352n\326\270\031)\214UbT/\022\214ERq\210n\002:?\006\337\376\254\311<%\376\335\327J,\223r\217-\311*\b\250b\315v\306\034\3006\343\236\nY\n\367(\224r\243\201P\363^5\336&~\250\361\225\245)K\236\351\2436\242\325\311\232\202\270h\205\331I\f_\362\375\333\367w\t\032\271"
.string "\\\033\321\231\334\034\017h\\\302\017\207\246.8\372\367\031\255\210\244\016\340\304\222\033\016\022\330\230\212\016\327\302\226\200\020\320\r\340(A\007:\033Lf\037\311}\213-\327\200+\336\303\234\252\376\017\037\307\323#\233\326\371u\202?\256\347\300\265~\220\252Do\2417\220\\*\360\006\374:p.\246\231u!\234>\355\330-\346\240M\300\305\342R\202\2405\247)\302\276\032\347\365d9>\215a\360TL@\017J7\362~\231\374\343\356\356{\206A@FI\322\364\261\340\245i\302*\016\224U\262\207\332\354(\376\214\334\017]\0030h\020\376\245\001 02e\357\204\351U\007\t\020\272\bPo\336\344\177\177\367\356\355\273\325\234C#7]g\334\227\363&\225\b\353\244\357\240\213\271\361_\343\352/M\262\n\025\246\352\273\202"
.string "w"
.string "c\3151\307\271s\2006t/\035\227\257\211\254\326\214\267\262\357\300!\240\240o\314\312\302\315\311|c;#\3509b\004s\":q\322\317\2544y\024!K\n\221\272\261\301+X\330fJ^z\300\2601\022\261\246\317\t\320?\\.\366\373Z\224\371U\002\256\315MX\251\325\002\177\212\002\317\202\271V]T\204\277\365N\002\fZ?\301\017$\017\343\254\354\225M\330:(\230w\252\267}E\023\272\205\223\305\223y1M\037\211E\302"
.string "\031f\007Le\313$\374\275\370S\034\224\317UW\362#\362\336\027P\265\363j\376\007\035\300D\244e\0023\373\222Y\210x\204\270F7\030\341\241\223\020W\027\324I,\207\310\270\024uEi\251\373\355\317k\326\352\373\241\256|~Q7\265i\2606\2202ji\205\326\270\231\312P\265m\002\344"
.string "\315\233\343\240\307\267\374\366e\217\214wE\354\377\241\370\341\036uT"
.string "\177\2175\344\313\324\021\307\235\200@#\322Q\034Y\006\342u3\342\322Y1\366\353\307\210M\r\3376\0021-\224Y\316\310;t,\020\334\036\343\210j\213mFQ"
.ascii "U\2702\227lE\257T>\235sF3m\344g\204?9;\234\025\217\330\200G\337"
.ascii "\270\003\331\370T!\b\226\222p:I\376X*\265\206\215\232\034-\220"
.ascii "Y\241(\274\027XQx\307x\003\036\203*\007\307\t\260\203~yY\002"
.ascii "\361h8\002\301\271\347 \nP\005\200\202\027\202\236\200]WDEn["
.ascii "\214\250[\322\321k\315\020\335\242$\212\\\263\206C\006\333G\232"
.ascii "\212\236\035/z(S\273\300\271)\374\356\0204\315\242\314U\234\201"
.ascii "@\021\255q)\004\225\303\034\2576ge\003\013m=#\340Q1\261\032\310"
.ascii "\210h(\311d\t5'\016\267ni\235\264G_=\251\374n.\2670\334\021\216"
.ascii "\306\320m@\270\334x\304\036\177Ap\220\n\250\332dv\0031u\\\350"
.ascii "\217t\20564\356\207\327\376\355'\226\234\352w)\221\374\360/\365"
.ascii "WZ\324ODU\203\212\201\267\212\246\006\016\0348\215}'\201\245"
.ascii "\013\344E\032c\375I[\035k_\022fA\034\270\2638\314\365\006\336"
.ascii "\306C\374\bB\235\345\312h\373\021Aje\365\363{\351\234\021\020"
.ascii "\226eq\310\243P\016\261\031\257\342od\016\333\301\214\235\370"
.ascii "E(x*1'\342\353'\273es\233\372\253\306\307\367\016\321\206\317"
.ascii "\357x\321\031\226x\222K\336\243K1\353s\366c\222\234\017\304\217"
.ascii "\226\315c'[\212\277\303\273\013\233\342x\211\201\212\300/\340"
.ascii "\016%\260\241\013\013p\243\200y\240\223\364\234\006!\312_\253"
.ascii ">\ti7\227\311\237&\371\212\255\313\031\3015\033m_\342l\236R\300"
.ascii "T\345\243\373\2403\204'\367\237\313vk\242#?\016\345D\207\345"
.ascii "\246<\245A\271\367$xBvs\246;\266;Owl\305lq\030{\030\007\347x"
.ascii "\235u\221<\002\303}{\221\341^\377\301p3\fw&3\261\234\367\032"
.ascii "s\350\355?\007\222\263y}V\372\372tF\3058\026\367|r\237\262\277"
.ascii "P\n\023D)[E\301\001(.\221\261\371\013d\362\357>\215\027\361}"
.ascii "m\270\252\305+\332\370\246w\210\314\370\3167\302$\314\263\307"
.ascii "\273\353\370V\376fd\022u\265x\342\273\215\367\354\256\004\345"
.ascii "\003\317\222\244\275_\037\353\307\355\207\263\017\357\245\361"
.ascii "\306\371+\366\334\272\304\262\021"
.string "\304\315n\266\211Vd\327\034\341_!\340\237\267\001\302,[\224\360\226D\316\244\351F\024\020\357\304\350&r}\305\322\203\314I\373U\336\031\002d+\244;\305\\Z#\320\244[\3415\263\204I\340wz\364\240\353\031\360\321r\324\261\236F\203\316'\303\275\021\035=\360\2668mD\347\301,u\256\201\022\032\261\202\215\004\322\356\264\035\016\360\017p\n\224\017xPw\026\235\001d\274\203\230A\344\"\376\3643\302\344\370S\312\315\204\006\261\357*Tz\212\367l?\001f\314\310\031\263\330|\021\235\313\374\025\001\r\245\005\017\344\037\303\f\217\302\227P\026\016\005S\230\271\216+-^\215\313\215[h\004\266\307\026\013x\263K\275n\262h\256\331\363\3569\320M]\355Q7J\021\373\355)\370|`\266\367\004\240a\333\301l\271\324\304\343]\337n\241IV\217~\250\022t\322\366\200\243\205\241\346\327\264\345\033\276\265\002\022\201X"
.ascii "\321\037\030\236\036a\313\252!\027\032?\313\232m{\303\312\272"
.ascii "\252\240\272@"
.string "E\261\255\232\225\002\257\273\220\217\200\242l&\254\330\203`\005\357\350\352\302\336Y\321\3472\004\001445\354\223\216D\3330\277\335\207\016_\322xo$\270\022\316\251\rp\037~W\343\025\332\315C\342H\254k\235\200\375\230\221\203~\341m\306\304\253\330V\232\335\231\257~\247\2317\200\333y`\370\230)\311\343Y\366r\370\332Y\315}\273\373\224\331\373\211\361\256\206\321U\311\354\247\276"
.ascii "\330A\362\024\023s*\360\256\204\304\376\013\360xGI"
.global alert_pulseway_lua_z_len
.align 2
.type alert_pulseway_lua_z_len, %object
.size alert_pulseway_lua_z_len, 4
alert_pulseway_lua_z_len:
.word 2138
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC0:
.string "Calling function %s\n"
.align 3
.LC1:
.string "%s is NULL\n"
.align 3
.LC2:
.string "\nGetting address information for %s:%s\n"
.align 3
.LC3:
.string "dladdr"
.align 3
.LC4:
.string "Pathname of shared object:"
.align 3
.LC5:
.string "%20s %10s\n"
.align 3
.LC6:
.string "Address where shared object is loaded:"
.align 3
.LC7:
.string "%20s %10p\n"
.align 3
.LC8:
.string "NULL"
.align 3
.LC9:
.string "Name of symbol overlapping address:"
.align 3
.LC10:
.string "Exact address of symbol above:"
.text
.align 2
.global main
.type main, %function
main:
.LFB6:
.cfi_startproc
stp x29, x30, [sp, -112]!
.cfi_def_cfa_offset 112
.cfi_offset 29, -112
.cfi_offset 30, -104
mov x29, sp
str x19, [sp, 16]
.cfi_offset 19, -96
str w0, [sp, 44]
str x1, [sp, 32]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 104]
mov x1, 0
ldr w0, [sp, 44]
cmp w0, 3
beq .L2
ldr x0, [sp, 32]
ldr x0, [x0]
mov x1, x0
mov w0, 1
bl helpAndExit
.L2:
ldr x0, [sp, 32]
add x0, x0, 8
ldr x0, [x0]
mov w1, 1
bl dlopen
str x0, [sp, 56]
ldr x0, [sp, 56]
cmp x0, 0
bne .L3
bl dlerror
bl fatal
.L3:
bl dlerror
ldr x0, [sp, 32]
add x0, x0, 16
ldr x0, [x0]
add x19, sp, 48
mov x1, x0
ldr x0, [sp, 56]
bl dlsym
str x0, [x19]
bl dlerror
str x0, [sp, 64]
ldr x0, [sp, 64]
cmp x0, 0
beq .L4
ldr x0, [sp, 64]
bl fatal
.L4:
ldr x0, [sp, 32]
add x0, x0, 16
ldr x0, [x0]
mov x1, x0
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl printf
ldr x0, [sp, 48]
cmp x0, 0
bne .L5
ldr x0, [sp, 32]
add x0, x0, 16
ldr x0, [x0]
mov x1, x0
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl printf
b .L6
.L5:
ldr x0, [sp, 48]
blr x0
.L6:
ldr x0, [sp, 32]
add x0, x0, 8
ldr x1, [x0]
ldr x0, [sp, 32]
add x0, x0, 16
ldr x0, [x0]
mov x2, x0
adrp x0, .LC2
add x0, x0, :lo12:.LC2
bl printf
ldr x0, [sp, 48]
add x1, sp, 72
bl dladdr
cmp w0, 0
bne .L7
adrp x0, .LC3
add x0, x0, :lo12:.LC3
bl pexit
.L7:
ldr x0, [sp, 72]
mov x2, x0
adrp x0, .LC4
add x1, x0, :lo12:.LC4
adrp x0, .LC5
add x0, x0, :lo12:.LC5
bl printf
ldr x0, [sp, 80]
mov x2, x0
adrp x0, .LC6
add x1, x0, :lo12:.LC6
adrp x0, .LC7
add x0, x0, :lo12:.LC7
bl printf
ldr x0, [sp, 88]
cmp x0, 0
beq .L8
ldr x0, [sp, 88]
b .L9
.L8:
adrp x0, .LC8
add x0, x0, :lo12:.LC8
.L9:
mov x2, x0
adrp x0, .LC9
add x1, x0, :lo12:.LC9
adrp x0, .LC5
add x0, x0, :lo12:.LC5
bl printf
ldr x0, [sp, 96]
mov x2, x0
adrp x0, .LC10
add x1, x0, :lo12:.LC10
adrp x0, .LC7
add x0, x0, :lo12:.LC7
bl printf
mov w0, 0
bl exit
.cfi_endproc
.LFE6:
.size main, .-main
.align 2
.type fatal, %function
fatal:
.LFB7:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str x0, [sp, 24]
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x0, [x0]
ldr x1, [sp, 24]
bl fprintf
mov w0, 1
bl exit
.cfi_endproc
.LFE7:
.size fatal, .-fatal
.align 2
.type pexit, %function
pexit:
.LFB8:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str x0, [sp, 24]
ldr x0, [sp, 24]
bl perror
mov w0, 1
bl exit
.cfi_endproc
.LFE8:
.size pexit, .-pexit
.section .rodata
.align 3
.LC11:
.string "Usage: %s [lib-path] [func-name]\n"
.text
.align 2
.type helpAndExit, %function
helpAndExit:
.LFB9:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str w0, [sp, 28]
str x1, [sp, 16]
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x0, [x0]
str x0, [sp, 40]
ldr w0, [sp, 28]
cmp w0, 0
bne .L14
adrp x0, :got:stdout
ldr x0, [x0, #:got_lo12:stdout]
ldr x0, [x0]
str x0, [sp, 40]
.L14:
ldr x2, [sp, 16]
adrp x0, .LC11
add x1, x0, :lo12:.LC11
ldr x0, [sp, 40]
bl fprintf
ldr w0, [sp, 28]
bl exit
.cfi_endproc
.LFE9:
.size helpAndExit, .-helpAndExit
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC0:
.string "ldtest1 => %s\n"
.text
.align 2
.global ldtest1
.type ldtest1, %function
ldtest1:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str x0, [sp, 24]
ldr x1, [sp, 24]
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl printf
nop
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size ldtest1, .-ldtest1
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC0:
.string "Nhap so phan tu cua mang (0<=n<=40): "
.align 3
.LC1:
.string "%i"
.align 3
.LC2:
.string "Du lieu khong hop le. Vui long nhap so phan tu cua mang (0<=n<40): "
.text
.align 2
.global nhap
.type nhap, %function
nhap:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 24]
mov x1, 0
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl printf
add x0, sp, 20
mov x1, x0
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl __isoc99_scanf
b .L2
.L3:
adrp x0, .LC2
add x0, x0, :lo12:.LC2
bl printf
add x0, sp, 20
mov x1, x0
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl __isoc99_scanf
.L2:
ldr w0, [sp, 20]
cmp w0, 0
blt .L3
ldr w0, [sp, 20]
cmp w0, 40
bgt .L3
ldr w0, [sp, 20]
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 24]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L5
bl __stack_chk_fail
.L5:
mov w0, w1
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size nhap, .-nhap
.section .rodata
.align 3
.LC3:
.string "Nhap phan tu a[%i] = "
.text
.align 2
.global nhapMang
.type nhapMang, %function
nhapMang:
.LFB1:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
str w1, [sp, 20]
str wzr, [sp, 44]
b .L7
.L8:
ldr w0, [sp, 44]
add w0, w0, 1
mov w1, w0
adrp x0, .LC3
add x0, x0, :lo12:.LC3
bl printf
ldrsw x0, [sp, 44]
lsl x0, x0, 2
ldr x1, [sp, 24]
add x0, x1, x0
mov x1, x0
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl __isoc99_scanf
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L7:
ldr w1, [sp, 44]
ldr w0, [sp, 20]
cmp w1, w0
blt .L8
nop
nop
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE1:
.size nhapMang, .-nhapMang
.section .rodata
.align 3
.LC4:
.string "Cac phan tu trong mang la:"
.align 3
.LC5:
.string "%i "
.text
.align 2
.global xuatMang
.type xuatMang, %function
xuatMang:
.LFB2:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
str w1, [sp, 20]
adrp x0, .LC4
add x0, x0, :lo12:.LC4
bl puts
str wzr, [sp, 44]
b .L10
.L11:
ldrsw x0, [sp, 44]
lsl x0, x0, 2
ldr x1, [sp, 24]
add x0, x1, x0
ldr w0, [x0]
mov w1, w0
adrp x0, .LC5
add x0, x0, :lo12:.LC5
bl printf
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L10:
ldr w1, [sp, 44]
ldr w0, [sp, 20]
cmp w1, w0
blt .L11
mov w0, 10
bl putchar
nop
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE2:
.size xuatMang, .-xuatMang
.section .rodata
.align 3
.LC6:
.string "Co %i phan tu le trong mang a:\n"
.text
.align 2
.global le
.type le, %function
le:
.LFB3:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
str w1, [sp, 20]
str wzr, [sp, 36]
str wzr, [sp, 40]
b .L13
.L15:
ldrsw x0, [sp, 40]
lsl x0, x0, 2
ldr x1, [sp, 24]
add x0, x1, x0
ldr w0, [x0]
and w0, w0, 1
cmp w0, 0
beq .L14
ldr w0, [sp, 36]
add w0, w0, 1
str w0, [sp, 36]
.L14:
ldr w0, [sp, 40]
add w0, w0, 1
str w0, [sp, 40]
.L13:
ldr w1, [sp, 40]
ldr w0, [sp, 20]
cmp w1, w0
blt .L15
ldr w1, [sp, 36]
adrp x0, .LC6
add x0, x0, :lo12:.LC6
bl printf
str wzr, [sp, 44]
b .L16
.L18:
ldrsw x0, [sp, 44]
lsl x0, x0, 2
ldr x1, [sp, 24]
add x0, x1, x0
ldr w0, [x0]
and w0, w0, 1
cmp w0, 0
beq .L17
ldrsw x0, [sp, 44]
lsl x0, x0, 2
ldr x1, [sp, 24]
add x0, x1, x0
ldr w0, [x0]
mov w1, w0
adrp x0, .LC5
add x0, x0, :lo12:.LC5
bl printf
.L17:
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L16:
ldr w1, [sp, 44]
ldr w0, [sp, 20]
cmp w1, w0
blt .L18
mov w0, 10
bl putchar
nop
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE3:
.size le, .-le
.section .rodata
.align 3
.LC7:
.string "Trung binh cong cua cac phan tu duong chan trong mang la %f.\n"
.align 3
.LC8:
.string "Khong co phan tu duong chan nao trong mang."
.text
.align 2
.global tbcDuongChan
.type tbcDuongChan, %function
tbcDuongChan:
.LFB4:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
str w1, [sp, 20]
str wzr, [sp, 32]
str wzr, [sp, 36]
str wzr, [sp, 40]
b .L20
.L22:
ldrsw x0, [sp, 40]
lsl x0, x0, 2
ldr x1, [sp, 24]
add x0, x1, x0
ldr w0, [x0]
cmp w0, 0
blt .L21
ldrsw x0, [sp, 40]
lsl x0, x0, 2
ldr x1, [sp, 24]
add x0, x1, x0
ldr w0, [x0]
and w0, w0, 1
cmp w0, 0
bne .L21
ldr w0, [sp, 32]
add w0, w0, 1
str w0, [sp, 32]
ldrsw x0, [sp, 40]
lsl x0, x0, 2
ldr x1, [sp, 24]
add x0, x1, x0
ldr w0, [x0]
ldr w1, [sp, 36]
add w0, w1, w0
str w0, [sp, 36]
.L21:
ldr w0, [sp, 40]
add w0, w0, 1
str w0, [sp, 40]
.L20:
ldr w1, [sp, 40]
ldr w0, [sp, 20]
cmp w1, w0
blt .L22
ldr w0, [sp, 32]
cmp w0, 0
beq .L23
ldr s0, [sp, 36]
scvtf s1, s0
ldr s0, [sp, 32]
scvtf s0, s0
fdiv s0, s1, s0
str s0, [sp, 44]
ldr s0, [sp, 44]
fcvt d0, s0
adrp x0, .LC7
add x0, x0, :lo12:.LC7
bl printf
b .L25
.L23:
adrp x0, .LC8
add x0, x0, :lo12:.LC8
bl puts
.L25:
nop
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE4:
.size tbcDuongChan, .-tbcDuongChan
.align 2
.global main
.type main, %function
main:
.LFB5:
.cfi_startproc
stp x29, x30, [sp, -128]!
.cfi_def_cfa_offset 128
.cfi_offset 29, -128
.cfi_offset 30, -120
mov x29, sp
.cfi_def_cfa_register 29
stp x19, x20, [sp, 16]
stp x21, x22, [sp, 32]
stp x23, x24, [sp, 48]
stp x25, x26, [sp, 64]
str x27, [sp, 80]
sub sp, sp, #16
.cfi_offset 19, -112
.cfi_offset 20, -104
.cfi_offset 21, -96
.cfi_offset 22, -88
.cfi_offset 23, -80
.cfi_offset 24, -72
.cfi_offset 25, -64
.cfi_offset 26, -56
.cfi_offset 27, -48
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [x29, 120]
mov x1, 0
mov x0, sp
mov x19, x0
bl nhap
str w0, [x29, 100]
ldr w0, [x29, 100]
sxtw x1, w0
sub x1, x1, #1
str x1, [x29, 104]
sxtw x1, w0
mov x26, x1
mov x27, 0
lsr x1, x26, 59
lsl x23, x27, 5
orr x23, x1, x23
lsl x22, x26, 5
sxtw x1, w0
mov x24, x1
mov x25, 0
lsr x1, x24, 59
lsl x21, x25, 5
orr x21, x1, x21
lsl x20, x24, 5
sxtw x0, w0
lsl x0, x0, 2
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L27:
cmp sp, x1
beq .L28
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L27
.L28:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L29
str xzr, [sp, 1024]
.L29:
add x0, sp, 16
add x0, x0, 3
lsr x0, x0, 2
lsl x0, x0, 2
str x0, [x29, 112]
ldr w1, [x29, 100]
ldr x0, [x29, 112]
bl nhapMang
ldr w1, [x29, 100]
ldr x0, [x29, 112]
bl xuatMang
ldr w1, [x29, 100]
ldr x0, [x29, 112]
bl le
ldr w1, [x29, 100]
ldr x0, [x29, 112]
bl tbcDuongChan
mov w0, 0
mov sp, x19
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [x29, 120]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L31
bl __stack_chk_fail
.L31:
mov w0, w1
mov sp, x29
ldp x19, x20, [sp, 16]
ldp x21, x22, [sp, 32]
ldp x23, x24, [sp, 48]
ldp x25, x26, [sp, 64]
ldr x27, [sp, 80]
ldp x29, x30, [sp], 128
.cfi_restore 30
.cfi_restore 29
.cfi_restore 27
.cfi_restore 25
.cfi_restore 26
.cfi_restore 23
.cfi_restore 24
.cfi_restore 21
.cfi_restore 22
.cfi_restore 19
.cfi_restore 20
.cfi_def_cfa 31, 0
ret
.cfi_endproc
.LFE5:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC0:
.string "clean"
.align 3
.LC1:
.string "rewrite pdf file"
.align 3
.LC2:
.string "extract"
.align 3
.LC3:
.string "extract font and image resources"
.align 3
.LC4:
.string "info"
.align 3
.LC5:
.string "show information about pdf resources"
.align 3
.LC6:
.string "poster"
.align 3
.LC7:
.string "split large page into many tiles"
.align 3
.LC8:
.string "show"
.align 3
.LC9:
.string "show internal pdf objects"
.section .data.rel,"aw"
.align 3
.type tools, %object
.size tools, 120
tools:
.xword pdfclean_main
.xword .LC0
.xword .LC1
.xword pdfextract_main
.xword .LC2
.xword .LC3
.xword pdfinfo_main
.xword .LC4
.xword .LC5
.xword pdfposter_main
.xword .LC6
.xword .LC7
.xword pdfshow_main
.xword .LC8
.xword .LC9
.text
.align 2
.type namematch, %function
namematch:
.LFB6:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str x0, [sp, 40]
str x1, [sp, 32]
str x2, [sp, 24]
ldr x0, [sp, 24]
bl strlen
str w0, [sp, 60]
ldrsw x0, [sp, 60]
neg x0, x0
ldr x1, [sp, 40]
add x0, x1, x0
ldr x1, [sp, 32]
cmp x1, x0
bhi .L2
ldrsw x0, [sp, 60]
neg x0, x0
ldr x1, [sp, 40]
add x0, x1, x0
ldrsw x1, [sp, 60]
mov x2, x1
ldr x1, [sp, 24]
bl strncmp
cmp w0, 0
bne .L2
mov w0, 1
b .L4
.L2:
mov w0, 0
.L4:
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE6:
.size namematch, .-namematch
.section .rodata
.align 3
.LC10:
.string "No command name found!\n"
.align 3
.LC11:
.string "mupdf"
.align 3
.LC12:
.string "usage: mubusy <command> [options]\n"
.align 3
.LC13:
.string "\t%s\t-- %s\n"
.text
.align 2
.global main
.type main, %function
main:
.LFB7:
.cfi_startproc
stp x29, x30, [sp, -96]!
.cfi_def_cfa_offset 96
.cfi_offset 29, -96
.cfi_offset 30, -88
mov x29, sp
str w0, [sp, 28]
str x1, [sp, 16]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 88]
mov x1, 0
ldr w0, [sp, 28]
cmp w0, 0
bne .L6
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x0, [x0]
mov x3, x0
mov x2, 23
mov x1, 1
adrp x0, .LC10
add x0, x0, :lo12:.LC10
bl fwrite
mov w0, 1
b .L22
.L6:
ldr w0, [sp, 28]
cmp w0, 0
ble .L8
ldr x0, [sp, 16]
ldr x0, [x0]
str x0, [sp, 48]
ldr x0, [sp, 48]
str x0, [sp, 40]
b .L9
.L10:
ldr x0, [sp, 40]
add x0, x0, 1
str x0, [sp, 40]
.L9:
ldr x0, [sp, 40]
ldrb w0, [x0]
cmp w0, 0
bne .L10
ldr x0, [sp, 40]
sub x0, x0, #4
ldr x1, [sp, 48]
cmp x1, x0
bhi .L11
ldr x0, [sp, 40]
sub x0, x0, #4
ldrb w0, [x0]
cmp w0, 46
bne .L11
ldr x0, [sp, 40]
sub x0, x0, #3
ldrb w0, [x0]
cmp w0, 101
bne .L11
ldr x0, [sp, 40]
sub x0, x0, #2
ldrb w0, [x0]
cmp w0, 120
bne .L11
ldr x0, [sp, 40]
sub x0, x0, #1
ldrb w0, [x0]
cmp w0, 101
bne .L11
ldr x0, [sp, 40]
sub x0, x0, #4
str x0, [sp, 40]
.L11:
str wzr, [sp, 36]
b .L12
.L15:
add x2, sp, 56
adrp x0, .LC11
add x1, x0, :lo12:.LC11
mov x0, x2
ldr w2, [x1]
str w2, [x0]
ldrh w1, [x1, 4]
strh w1, [x0, 4]
adrp x0, tools
add x2, x0, :lo12:tools
ldrsw x1, [sp, 36]
mov x0, x1
lsl x0, x0, 1
add x0, x0, x1
lsl x0, x0, 3
add x0, x2, x0
ldr x1, [x0, 8]
add x0, sp, 56
bl strcat
add x0, sp, 56
mov x2, x0
ldr x1, [sp, 48]
ldr x0, [sp, 40]
bl namematch
cmp w0, 0
bne .L13
add x0, sp, 56
add x0, x0, 2
mov x2, x0
ldr x1, [sp, 48]
ldr x0, [sp, 40]
bl namematch
cmp w0, 0
beq .L14
.L13:
adrp x0, tools
add x2, x0, :lo12:tools
ldrsw x1, [sp, 36]
mov x0, x1
lsl x0, x0, 1
add x0, x0, x1
lsl x0, x0, 3
add x0, x2, x0
ldr x2, [x0]
ldr x1, [sp, 16]
ldr w0, [sp, 28]
blr x2
b .L22
.L14:
ldr w0, [sp, 36]
add w0, w0, 1
str w0, [sp, 36]
.L12:
ldr w0, [sp, 36]
cmp w0, 4
bls .L15
.L8:
ldr w0, [sp, 28]
cmp w0, 1
ble .L16
str wzr, [sp, 36]
b .L17
.L19:
adrp x0, tools
add x2, x0, :lo12:tools
ldrsw x1, [sp, 36]
mov x0, x1
lsl x0, x0, 1
add x0, x0, x1
lsl x0, x0, 3
add x0, x2, x0
ldr x2, [x0, 8]
ldr x0, [sp, 16]
add x0, x0, 8
ldr x0, [x0]
mov x1, x0
mov x0, x2
bl strcmp
cmp w0, 0
bne .L18
adrp x0, tools
add x2, x0, :lo12:tools
ldrsw x1, [sp, 36]
mov x0, x1
lsl x0, x0, 1
add x0, x0, x1
lsl x0, x0, 3
add x0, x2, x0
ldr x2, [x0]
ldr w0, [sp, 28]
sub w3, w0, #1
ldr x0, [sp, 16]
add x0, x0, 8
mov x1, x0
mov w0, w3
blr x2
b .L22
.L18:
ldr w0, [sp, 36]
add w0, w0, 1
str w0, [sp, 36]
.L17:
ldr w0, [sp, 36]
cmp w0, 4
bls .L19
.L16:
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x0, [x0]
mov x3, x0
mov x2, 34
mov x1, 1
adrp x0, .LC12
add x0, x0, :lo12:.LC12
bl fwrite
str wzr, [sp, 36]
b .L20
.L21:
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x4, [x0]
adrp x0, tools
add x2, x0, :lo12:tools
ldrsw x1, [sp, 36]
mov x0, x1
lsl x0, x0, 1
add x0, x0, x1
lsl x0, x0, 3
add x0, x2, x0
ldr x5, [x0, 8]
adrp x0, tools
add x2, x0, :lo12:tools
ldrsw x1, [sp, 36]
mov x0, x1
lsl x0, x0, 1
add x0, x0, x1
lsl x0, x0, 3
add x0, x2, x0
ldr x0, [x0, 16]
mov x3, x0
mov x2, x5
adrp x0, .LC13
add x1, x0, :lo12:.LC13
mov x0, x4
bl fprintf
ldr w0, [sp, 36]
add w0, w0, 1
str w0, [sp, 36]
.L20:
ldr w0, [sp, 36]
cmp w0, 4
bls .L21
mov w0, 1
.L22:
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 88]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L23
bl __stack_chk_fail
.L23:
mov w0, w1
ldp x29, x30, [sp], 96
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE7:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.global n
.bss
.align 2
.type n, %object
.size n, 4
n:
.zero 4
.section .rodata
.align 3
.LC0:
.string "%d"
.text
.align 2
.global getint
.type getint, %function
getint:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 24]
mov x1, 0
add x0, sp, 20
mov x1, x0
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl scanf
ldr w0, [sp, 20]
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 24]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L3
bl __stack_chk_fail
.L3:
mov w0, w1
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size getint, .-getint
.align 2
.global putint
.type putint, %function
putint:
.LFB1:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str w0, [sp, 28]
ldr w1, [sp, 28]
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl printf
nop
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE1:
.size putint, .-putint
.align 2
.global f
.type f, %function
f:
.LFB2:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str w0, [sp, 28]
ldr w0, [sp, 28]
bl putint
mov w0, 10
str w0, [sp, 28]
ldr w0, [sp, 28]
bl putchar
mov w0, 0
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE2:
.size f, .-f
.align 2
.global main
.type main, %function
main:
.LFB3:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
bl getint
mov w1, w0
adrp x0, n
add x0, x0, :lo12:n
str w1, [x0]
adrp x0, n
add x0, x0, :lo12:n
ldr w0, [x0]
cmp w0, 5
ble .L8
bl getint
str w0, [sp, 28]
ldr w0, [sp, 28]
bl f
b .L9
.L8:
bl getint
bl f
.L9:
adrp x0, n
add x0, x0, :lo12:n
ldr w0, [x0]
bl f
mov w0, 0
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE3:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global cstrcspn
.type cstrcspn, %function
cstrcspn:
.LFB6:
.cfi_startproc
sub sp, sp, #48
.cfi_def_cfa_offset 48
str x0, [sp, 8]
str x1, [sp]
ldr x0, [sp, 8]
str x0, [sp, 32]
b .L2
.L8:
ldr x0, [sp]
str x0, [sp, 40]
ldr x0, [sp, 32]
ldrb w0, [x0]
str w0, [sp, 28]
b .L3
.L5:
ldr x0, [sp, 40]
add x0, x0, 1
str x0, [sp, 40]
.L3:
ldr x0, [sp, 40]
ldrb w0, [x0]
cmp w0, 0
beq .L4
ldr x0, [sp, 40]
ldrb w1, [x0]
ldr w0, [sp, 28]
and w0, w0, 255
cmp w1, w0
bne .L5
.L4:
ldr x0, [sp, 40]
ldrb w0, [x0]
mov w1, w0
ldr w0, [sp, 28]
cmp w0, w1
bne .L6
ldr x1, [sp, 32]
ldr x0, [sp, 8]
sub x0, x1, x0
b .L7
.L6:
ldr x0, [sp, 32]
add x0, x0, 1
str x0, [sp, 32]
.L2:
ldr x0, [sp, 32]
ldrb w0, [x0]
cmp w0, 0
bne .L8
ldr x1, [sp, 32]
ldr x0, [sp, 8]
sub x0, x1, x0
.L7:
add sp, sp, 48
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE6:
.size cstrcspn, .-cstrcspn
.align 2
.global main
.type main, %function
main:
.LFB7:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
.cfi_def_cfa_register 29
sub sp, sp, #16
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [x29, 40]
mov x1, 0
bl __VERIFIER_nondet_int
str w0, [x29, 16]
bl __VERIFIER_nondet_int
str w0, [x29, 20]
ldr w0, [x29, 16]
cmp w0, 0
bgt .L10
mov w0, 1
str w0, [x29, 16]
.L10:
ldr w0, [x29, 20]
cmp w0, 0
bgt .L11
mov w0, 1
str w0, [x29, 20]
.L11:
ldrsw x0, [x29, 16]
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L12:
cmp sp, x1
beq .L13
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L12
.L13:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L14
str xzr, [sp, 1024]
.L14:
add x0, sp, 16
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
str x0, [x29, 24]
ldrsw x0, [x29, 20]
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L15:
cmp sp, x1
beq .L16
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L15
.L16:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L17
str xzr, [sp, 1024]
.L17:
add x0, sp, 16
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
str x0, [x29, 32]
ldrsw x0, [x29, 16]
sub x0, x0, #1
ldr x1, [x29, 24]
add x0, x1, x0
strb wzr, [x0]
ldrsw x0, [x29, 20]
sub x0, x0, #1
ldr x1, [x29, 32]
add x0, x1, x0
strb wzr, [x0]
ldr x1, [x29, 32]
ldr x0, [x29, 24]
bl cstrcspn
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [x29, 40]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L19
bl __stack_chk_fail
.L19:
mov w0, w1
mov sp, x29
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa 31, 0
ret
.cfi_endproc
.LFE7:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global foo
.type foo, %function
foo:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 40]
mov x1, 0
adrp x0, .LC0
add x1, x0, :lo12:.LC0
add x0, sp, 24
ldr x2, [x1]
str x2, [x0]
ldrb w1, [x1, 8]
strb w1, [x0, 8]
nop
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [sp, 40]
ldr x1, [x0]
subs x2, x2, x1
mov x1, 0
beq .L2
bl __stack_chk_fail
.L2:
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size foo, .-foo
.section .rodata
.align 3
.LC0:
.string "f\200\372b\200\343\200\340"
.text
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.global a
.bss
.align 3
.type a, %object
.size a, 200
a:
.zero 200
.global top
.data
.align 2
.type top, %object
.size top, 4
top:
.word -1
.text
.align 2
.global isFull
.type isFull, %function
isFull:
.LFB0:
.cfi_startproc
adrp x0, top
add x0, x0, :lo12:top
ldr w0, [x0]
cmp w0, 49
bne .L2
mov w0, 1
b .L3
.L2:
mov w0, 0
.L3:
ret
.cfi_endproc
.LFE0:
.size isFull, .-isFull
.align 2
.global isEmpty
.type isEmpty, %function
isEmpty:
.LFB1:
.cfi_startproc
adrp x0, top
add x0, x0, :lo12:top
ldr w0, [x0]
cmn w0, #1
bne .L5
mov w0, 1
b .L6
.L5:
mov w0, 0
.L6:
ret
.cfi_endproc
.LFE1:
.size isEmpty, .-isEmpty
.section .rodata
.align 3
.LC0:
.string "\nStack Overflow"
.text
.align 2
.global push
.type push, %function
push:
.LFB2:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str w0, [sp, 28]
bl isFull
cmp w0, 0
beq .L8
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl printf
b .L7
.L8:
adrp x0, top
add x0, x0, :lo12:top
ldr w0, [x0]
add w1, w0, 1
adrp x0, top
add x0, x0, :lo12:top
str w1, [x0]
adrp x0, top
add x0, x0, :lo12:top
ldr w1, [x0]
adrp x0, a
add x0, x0, :lo12:a
sxtw x1, w1
ldr w2, [sp, 28]
str w2, [x0, x1, lsl 2]
.L7:
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE2:
.size push, .-push
.section .rodata
.align 3
.LC1:
.string "\nStack Underflow"
.text
.align 2
.global pop
.type pop, %function
pop:
.LFB3:
.cfi_startproc
stp x29, x30, [sp, -16]!
.cfi_def_cfa_offset 16
.cfi_offset 29, -16
.cfi_offset 30, -8
mov x29, sp
bl isEmpty
cmp w0, 0
beq .L11
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl printf
b .L10
.L11:
adrp x0, top
add x0, x0, :lo12:top
ldr w0, [x0]
sub w1, w0, #1
adrp x0, top
add x0, x0, :lo12:top
str w1, [x0]
.L10:
ldp x29, x30, [sp], 16
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE3:
.size pop, .-pop
.align 2
.global getTop
.type getTop, %function
getTop:
.LFB4:
.cfi_startproc
adrp x0, top
add x0, x0, :lo12:top
ldr w1, [x0]
adrp x0, a
add x0, x0, :lo12:a
sxtw x1, w1
ldr w0, [x0, x1, lsl 2]
ret
.cfi_endproc
.LFE4:
.size getTop, .-getTop
.section .rodata
.align 3
.LC2:
.string "\nStack is: "
.align 3
.LC3:
.string "%d "
.text
.align 2
.global main
.type main, %function
main:
.LFB5:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
mov w0, 2
bl push
mov w0, 17
bl push
mov w0, 35
bl push
bl pop
mov w0, 12
bl push
adrp x0, .LC2
add x0, x0, :lo12:.LC2
bl printf
str wzr, [sp, 28]
b .L16
.L17:
adrp x0, a
add x0, x0, :lo12:a
ldrsw x1, [sp, 28]
ldr w0, [x0, x1, lsl 2]
mov w1, w0
adrp x0, .LC3
add x0, x0, :lo12:.LC3
bl printf
ldr w0, [sp, 28]
add w0, w0, 1
str w0, [sp, 28]
.L16:
adrp x0, top
add x0, x0, :lo12:top
ldr w0, [x0]
ldr w1, [sp, 28]
cmp w1, w0
ble .L17
mov w0, 0
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE5:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.data
.align 3
.type vector, %object
.size vector, 28
vector:
.word 0
.word 1088421888
.word 1065353216
.word 0
.word 0
.word 0
.word 0
.local xcp
.comm xcp,4,4
.local ycp
.comm ycp,4,4
.align 3
.type dev_cap, %object
.size dev_cap, 132
dev_cap:
.word 1082130432
.word 1065353216
.word 1065353216
.word 1132462080
.word 1065353216
.word 1077936128
.word 1065353216
.word 1065353216
.word 1065353216
.word 1065353216
.word 1065353216
.word 1065353216
.word 1073741824
.word 0
.word 0
.word 0
.word 0
.word 0
.word 1065353216
.word 1065353216
.word 0
.word 0
.word 1108082688
.word 1077936128
.word 1149222912
.word 1065353216
.word 0
.word 0
.word 0
.word 0
.word 1065353216
.word 1065353216
.word 1065353216
.align 2
.type ndc_xmax, %object
.size ndc_xmax, 4
ndc_xmax:
.word 1065353216
.align 2
.type ndc_ymax, %object
.size ndc_ymax, 4
ndc_ymax:
.word 1065353216
.local color_table
.comm color_table,3072,8
.align 3
.type default_color_table, %object
.size default_color_table, 96
default_color_table:
.word 0
.word 0
.word 0
.word 1065353216
.word 0
.word 0
.word 0
.word 1065353216
.word 0
.word 1065353216
.word 1065353216
.word 0
.word 0
.word 0
.word 1065353216
.word 1065353216
.word 0
.word 1065353216
.word 0
.word 1065353216
.word 1065353216
.word 1065353216
.word 1065353216
.word 1065353216
.local x_colors
.comm x_colors,1024,8
.local color_type
.comm color_type,4,4
.local def_bc_index
.comm def_bc_index,4,4
.local def_fc_index
.comm def_fc_index,4,4
.local svdicolors_base
.comm svdicolors_base,4,4
.local asp
.comm asp,4,4
.local just
.comm just,4,4
.local xpad
.comm xpad,4,4
.local ypad
.comm ypad,4,4
.local scale
.comm scale,4,4
.local draw_id
.comm draw_id,8,8
.local window_id
.comm window_id,8,8
.local window_stat
.comm window_stat,4,4
.local pixmap_id
.comm pixmap_id,8,8
.local buf_pic
.comm buf_pic,4,4
.local all_colors
.comm all_colors,4,4
.local display
.comm display,8,8
.local screen
.comm screen,4,4
.local screen_pnt
.comm screen_pnt,8,8
.local gc
.comm gc,8,8
.local gcontext
.comm gcontext,8,8
.local vlist
.comm vlist,4096,8
.local x11_nvert
.comm x11_nvert,4,4
.local x_width
.comm x_width,4,4
.local x_height
.comm x_height,4,4
.local x_depth
.comm x_depth,4,4
.local line_width
.comm line_width,4,4
.local cmap
.comm cmap,8,8
.local visual
.comm visual,8,8
.local ncolors
.comm ncolors,4,4
.local f_color
.comm f_color,4,4
.local b_color
.comm b_color,4,4
.local line_type
.comm line_type,4,4
.local font_info
.comm font_info,8,8
.section .rodata
.align 3
.LC0:
.string "fixed"
.section .data.rel.local,"aw"
.align 3
.type font_name, %object
.size font_name, 8
font_name:
.xword .LC0
.local font_id
.comm font_id,8,8
.local font_height
.comm font_height,4,4
.local font_width
.comm font_width,4,4
.text
.align 2
.global x11_vflush
.type x11_vflush, %function
x11_vflush:
.LFB6:
.cfi_startproc
stp x29, x30, [sp, -16]!
.cfi_def_cfa_offset 16
.cfi_offset 29, -16
.cfi_offset 30, -8
mov x29, sp
adrp x0, x11_nvert
add x0, x0, :lo12:x11_nvert
ldr w0, [x0]
cmp w0, 1
ble .L2
adrp x0, display
add x0, x0, :lo12:display
ldr x6, [x0]
adrp x0, draw_id
add x0, x0, :lo12:draw_id
ldr x1, [x0]
adrp x0, gc
add x0, x0, :lo12:gc
ldr x2, [x0]
adrp x0, x11_nvert
add x0, x0, :lo12:x11_nvert
ldr w0, [x0]
mov w5, 0
mov w4, w0
adrp x0, vlist
add x3, x0, :lo12:vlist
mov x0, x6
bl XDrawLines
.L2:
adrp x0, x11_nvert
add x0, x0, :lo12:x11_nvert
str wzr, [x0]
nop
ldp x29, x30, [sp], 16
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE6:
.size x11_vflush, .-x11_vflush
.section .rodata
.align 3
.LC1:
.string " SVDI Error Number %d, Severity Code %d\n"
.align 3
.LC2:
.string "svdi_x: cannot create window on %s\n"
.align 3
.LC3:
.string "BufferPic"
.align 3
.LC4:
.string "svdi"
.align 3
.LC5:
.string "on"
.align 3
.LC6:
.string "AllColors"
.align 3
.LC7:
.string "Geometry"
.align 3
.LC8:
.string "SVDI: Found a TRUECOLOR visual, trying it.....\n"
.align 3
.LC9:
.string "Default visual for this screen must be an "
.align 3
.LC10:
.string "8-bit PseudoColor or 24-bit TrueColor visual\n"
.align 3
.LC11:
.string "SVDI: Using full color visual with %d colors\n"
.align 3
.LC12:
.string "svdi_x: font request failed, using default\n"
.text
.align 2
.global wx11ii
.type wx11ii, %function
wx11ii:
.LFB7:
.cfi_startproc
mov x12, 4944
sub sp, sp, x12
.cfi_def_cfa_offset 4944
stp x29, x30, [sp, 32]
.cfi_offset 29, -4912
.cfi_offset 30, -4904
add x29, sp, 32
str x19, [sp, 48]
.cfi_offset 19, -4896
str x0, [sp, 72]
str x1, [sp, 64]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 4936]
mov x1, 0
str xzr, [sp, 136]
str xzr, [sp, 144]
str xzr, [sp, 152]
str wzr, [sp, 108]
ldr x0, [sp, 72]
ldr s0, [x0]
adrp x0, asp
add x0, x0, :lo12:asp
str s0, [x0]
ldr x0, [sp, 64]
ldr w1, [x0]
adrp x0, just
add x0, x0, :lo12:just
str w1, [x0]
adrp x0, asp
add x0, x0, :lo12:asp
ldr s0, [x0]
fcmpe s0, #0.0
bmi .L38
b .L4
.L38:
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x4, [x0]
mov w3, 5
mov w2, 721
adrp x0, .LC1
add x1, x0, :lo12:.LC1
mov x0, x4
bl fprintf
adrp x0, asp
add x0, x0, :lo12:asp
str wzr, [x0]
.L4:
adrp x0, just
add x0, x0, :lo12:just
ldr w0, [x0]
cmp w0, 0
blt .L6
adrp x0, just
add x0, x0, :lo12:just
ldr w0, [x0]
cmp w0, 9
ble .L7
.L6:
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x4, [x0]
mov w3, 5
mov w2, 720
adrp x0, .LC1
add x1, x0, :lo12:.LC1
mov x0, x4
bl fprintf
adrp x0, just
add x0, x0, :lo12:just
str wzr, [x0]
.L7:
mov x0, 0
bl XOpenDisplay
mov x1, x0
adrp x0, display
add x0, x0, :lo12:display
str x1, [x0]
adrp x0, display
add x0, x0, :lo12:display
ldr x0, [x0]
cmp x0, 0
bne .L8
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x19, [x0]
mov x0, 0
bl XDisplayName
mov x2, x0
adrp x0, .LC2
add x1, x0, :lo12:.LC2
mov x0, x19
bl fprintf
mov w0, 1
bl exit
.L8:
adrp x0, display
add x0, x0, :lo12:display
ldr x0, [x0]
ldr w1, [x0, 224]
adrp x0, screen
add x0, x0, :lo12:screen
str w1, [x0]
adrp x0, display
add x0, x0, :lo12:display
ldr x0, [x0]
ldr x1, [x0, 232]
adrp x0, display
add x0, x0, :lo12:display
ldr x0, [x0]
ldr w0, [x0, 224]
sxtw x0, w0
lsl x0, x0, 7
add x1, x1, x0
adrp x0, screen_pnt
add x0, x0, :lo12:screen_pnt
str x1, [x0]
adrp x0, display
add x0, x0, :lo12:display
ldr x3, [x0]
adrp x0, .LC3
add x2, x0, :lo12:.LC3
adrp x0, .LC4
add x1, x0, :lo12:.LC4
mov x0, x3
bl XGetDefault
str x0, [sp, 144]
ldr x0, [sp, 144]
cmp x0, 0
beq .L9
adrp x0, .LC5
add x1, x0, :lo12:.LC5
ldr x0, [sp, 144]
bl strcmp
cmp w0, 0
bne .L9
adrp x0, buf_pic
add x0, x0, :lo12:buf_pic
mov w1, 1
str w1, [x0]
.L9:
adrp x0, display
add x0, x0, :lo12:display
ldr x3, [x0]
adrp x0, .LC6
add x2, x0, :lo12:.LC6
adrp x0, .LC4
add x1, x0, :lo12:.LC4
mov x0, x3
bl XGetDefault
str x0, [sp, 152]
ldr x0, [sp, 152]
cmp x0, 0
beq .L10
adrp x0, .LC5
add x1, x0, :lo12:.LC5
ldr x0, [sp, 152]
bl strcmp
cmp w0, 0
bne .L10
adrp x0, all_colors
add x0, x0, :lo12:all_colors
mov w1, 1
str w1, [x0]
.L10:
adrp x0, display
add x0, x0, :lo12:display
ldr x0, [x0]
ldr x1, [x0, 232]
adrp x0, screen
add x0, x0, :lo12:screen
ldr w0, [x0]
sxtw x0, w0
lsl x0, x0, 7
add x0, x1, x0
ldr w0, [x0, 24]
str w0, [sp, 112]
adrp x0, display
add x0, x0, :lo12:display
ldr x0, [x0]
ldr x1, [x0, 232]
adrp x0, screen
add x0, x0, :lo12:screen
ldr w0, [x0]
sxtw x0, w0
lsl x0, x0, 7
add x0, x1, x0
ldr w0, [x0, 28]
str w0, [sp, 116]
mov x0, 10
str x0, [sp, 128]
adrp x0, display
add x0, x0, :lo12:display
ldr x0, [x0]
ldr x1, [x0, 232]
adrp x0, screen
add x0, x0, :lo12:screen
ldr w0, [x0]
sxtw x0, w0
lsl x0, x0, 7
add x0, x1, x0
ldr x0, [x0, 96]
str x0, [sp, 376]
adrp x0, display
add x0, x0, :lo12:display
ldr x0, [x0]
ldr x1, [x0, 232]
adrp x0, screen
add x0, x0, :lo12:screen
ldr w0, [x0]
sxtw x0, w0
lsl x0, x0, 7
add x0, x1, x0
ldr x0, [x0, 88]
str x0, [sp, 392]
adrp x0, screen_pnt
add x0, x0, :lo12:screen_pnt
ldr x0, [x0]
ldr w0, [x0, 112]
cmp w0, 0
beq .L11
ldr x0, [sp, 128]
orr x0, x0, 64
str x0, [sp, 128]
mov w0, 2
str w0, [sp, 408]
mov w0, 1
str w0, [sp, 108]
.L11:
ldr w0, [sp, 116]
ucvtf d0, w0
adrp x0, .LC13
ldr d1, [x0, #:lo12:.LC13]
fmul d0, d0, d1
fcvtzu w1, d0
adrp x0, x_height
add x0, x0, :lo12:x_height
str w1, [x0]
adrp x0, x_height
add x0, x0, :lo12:x_height
ldr w0, [x0]
ucvtf d0, w0
adrp x0, .LC14
ldr d1, [x0, #:lo12:.LC14]
fmul d0, d0, d1
fcvtzu w1, d0
adrp x0, x_width
add x0, x0, :lo12:x_width
str w1, [x0]
ldr w0, [sp, 112]
ucvtf d0, w0
mov x0, 3689348814741910323
movk x0, 0x3fd3, lsl 48
fmov d1, x0
fmul d0, d0, d1
fcvtzs w0, d0
str w0, [sp, 96]
ldr w0, [sp, 116]
ucvtf d0, w0
mov x0, 3689348814741910323
movk x0, 0x3fd3, lsl 48
fmov d1, x0
fmul d0, d0, d1
fcvtzs w0, d0
str w0, [sp, 100]
adrp x0, display
add x0, x0, :lo12:display
ldr x3, [x0]
adrp x0, .LC7
add x2, x0, :lo12:.LC7
adrp x0, .LC4
add x1, x0, :lo12:.LC4
mov x0, x3
bl XGetDefault
str x0, [sp, 136]
ldr x0, [sp, 136]
cmp x0, 0
beq .L12
add x2, sp, 100
add x1, sp, 96
adrp x0, x_height
add x4, x0, :lo12:x_height
adrp x0, x_width
add x3, x0, :lo12:x_width
ldr x0, [sp, 136]
bl XParseGeometry
.L12:
mov w0, 24
str w0, [sp, 244]
mov w0, 4
str w0, [sp, 248]
adrp x0, display
add x0, x0, :lo12:display
ldr x0, [x0]
add x2, sp, 104
add x1, sp, 224
mov x3, x2
mov x2, x1
mov x1, 12
bl XGetVisualInfo
adrp x0, display
add x0, x0, :lo12:display
ldr x5, [x0]
adrp x0, display
add x0, x0, :lo12:display
ldr x0, [x0]
ldr w0, [x0, 224]
add x1, sp, 224
mov x4, x1
mov w3, 4
mov w2, 24
mov w1, w0
mov x0, x5
bl XMatchVisualInfo
str w0, [sp, 88]
ldr w0, [sp, 104]
cmp w0, 0
ble .L13
ldr w0, [sp, 88]
cmp w0, 0
ble .L13
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x0, [x0]
mov x3, x0
mov x2, 47
mov x1, 1
adrp x0, .LC8
add x0, x0, :lo12:.LC8
bl fwrite
mov w0, 24
str w0, [sp, 120]
ldr x1, [sp, 224]
adrp x0, visual
add x0, x0, :lo12:visual
str x1, [x0]
ldr x1, [sp, 128]
mov x0, 8202
orr x0, x1, x0
str x0, [sp, 128]
adrp x0, display
add x0, x0, :lo12:display
ldr x19, [x0]
adrp x0, display
add x0, x0, :lo12:display
ldr x2, [x0]
adrp x0, screen
add x0, x0, :lo12:screen
ldr w0, [x0]
mov w1, w0
mov x0, x2
bl XRootWindow
mov x1, x0
adrp x0, visual
add x0, x0, :lo12:visual
ldr x0, [x0]
mov w3, 0
mov x2, x0
mov x0, x19
bl XCreateColormap
str x0, [sp, 464]
ldr x1, [sp, 464]
adrp x0, cmap
add x0, x0, :lo12:cmap
str x1, [x0]
adrp x0, display
add x0, x0, :lo12:display
ldr x0, [x0]
ldr x1, [x0, 232]
adrp x0, screen
add x0, x0, :lo12:screen
ldr w0, [x0]
sxtw x0, w0
lsl x0, x0, 7
add x0, x1, x0
ldr x0, [x0, 96]
str x0, [sp, 376]
adrp x0, display
add x0, x0, :lo12:display
ldr x0, [x0]
ldr x1, [x0, 232]
adrp x0, screen
add x0, x0, :lo12:screen
ldr w0, [x0]
sxtw x0, w0
lsl x0, x0, 7
add x0, x1, x0
ldr x0, [x0, 88]
str x0, [sp, 392]
adrp x0, display
add x0, x0, :lo12:display
ldr x8, [x0]
adrp x0, display
add x0, x0, :lo12:display
ldr x0, [x0]
ldr x1, [x0, 232]
adrp x0, screen
add x0, x0, :lo12:screen
ldr w0, [x0]
sxtw x0, w0
lsl x0, x0, 7
add x0, x1, x0
ldr x9, [x0, 16]
ldr w2, [sp, 96]
ldr w3, [sp, 100]
adrp x0, x_width
add x0, x0, :lo12:x_width
ldr w4, [x0]
adrp x0, x_height
add x0, x0, :lo12:x_height
ldr w5, [x0]
adrp x0, visual
add x0, x0, :lo12:visual
ldr x0, [x0]
add x1, sp, 368
str x1, [sp, 24]
ldr x1, [sp, 128]
str x1, [sp, 16]
str x0, [sp, 8]
mov w0, 1
str w0, [sp]
ldr w7, [sp, 120]
mov w6, 1
mov x1, x9
mov x0, x8
bl XCreateWindow
mov x1, x0
adrp x0, window_id
add x0, x0, :lo12:window_id
str x1, [x0]
b .L14
.L13:
mov w0, 16
str w0, [sp, 244]
mov w0, 4
str w0, [sp, 248]
adrp x0, display
add x0, x0, :lo12:display
ldr x0, [x0]
add x2, sp, 104
add x1, sp, 224
mov x3, x2
mov x2, x1
mov x1, 12
bl XGetVisualInfo
adrp x0, display
add x0, x0, :lo12:display
ldr x5, [x0]
adrp x0, display
add x0, x0, :lo12:display
ldr x0, [x0]
ldr w0, [x0, 224]
add x1, sp, 224
mov x4, x1
mov w3, 4
mov w2, 16
mov w1, w0
mov x0, x5
bl XMatchVisualInfo
str w0, [sp, 88]
ldr w0, [sp, 104]
cmp w0, 0
ble .L15
ldr w0, [sp, 88]
cmp w0, 0
ble .L15
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x0, [x0]
mov x3, x0
mov x2, 47
mov x1, 1
adrp x0, .LC8
add x0, x0, :lo12:.LC8
bl fwrite
mov w0, 16
str w0, [sp, 120]
ldr x1, [sp, 224]
adrp x0, visual
add x0, x0, :lo12:visual
str x1, [x0]
ldr x1, [sp, 128]
mov x0, 8202
orr x0, x1, x0
str x0, [sp, 128]
adrp x0, display
add x0, x0, :lo12:display
ldr x19, [x0]
adrp x0, display
add x0, x0, :lo12:display
ldr x2, [x0]
adrp x0, screen
add x0, x0, :lo12:screen
ldr w0, [x0]
mov w1, w0
mov x0, x2
bl XRootWindow
mov x1, x0
adrp x0, visual
add x0, x0, :lo12:visual
ldr x0, [x0]
mov w3, 0
mov x2, x0
mov x0, x19
bl XCreateColormap
str x0, [sp, 464]
ldr x1, [sp, 464]
adrp x0, cmap
add x0, x0, :lo12:cmap
str x1, [x0]
adrp x0, display
add x0, x0, :lo12:display
ldr x0, [x0]
ldr x1, [x0, 232]
adrp x0, screen
add x0, x0, :lo12:screen
ldr w0, [x0]
sxtw x0, w0
lsl x0, x0, 7
add x0, x1, x0
ldr x0, [x0, 96]
str x0, [sp, 376]
adrp x0, display
add x0, x0, :lo12:display
ldr x0, [x0]
ldr x1, [x0, 232]
adrp x0, screen
add x0, x0, :lo12:screen
ldr w0, [x0]
sxtw x0, w0
lsl x0, x0, 7
add x0, x1, x0
ldr x0, [x0, 88]
str x0, [sp, 392]
adrp x0, display
add x0, x0, :lo12:display
ldr x8, [x0]
adrp x0, display
add x0, x0, :lo12:display
ldr x0, [x0]
ldr x1, [x0, 232]
adrp x0, screen
add x0, x0, :lo12:screen
ldr w0, [x0]
sxtw x0, w0
lsl x0, x0, 7
add x0, x1, x0
ldr x9, [x0, 16]
ldr w2, [sp, 96]
ldr w3, [sp, 100]
adrp x0, x_width
add x0, x0, :lo12:x_width
ldr w4, [x0]
adrp x0, x_height
add x0, x0, :lo12:x_height
ldr w5, [x0]
adrp x0, visual
add x0, x0, :lo12:visual
ldr x0, [x0]
add x1, sp, 368
str x1, [sp, 24]
ldr x1, [sp, 128]
str x1, [sp, 16]
str x0, [sp, 8]
mov w0, 1
str w0, [sp]
ldr w7, [sp, 120]
mov w6, 1
mov x1, x9
mov x0, x8
bl XCreateWindow
mov x1, x0
adrp x0, window_id
add x0, x0, :lo12:window_id
str x1, [x0]
b .L14
.L15:
adrp x0, display
add x0, x0, :lo12:display
ldr x0, [x0]
ldr x1, [x0, 232]
adrp x0, screen
add x0, x0, :lo12:screen
ldr w0, [x0]
sxtw x0, w0
lsl x0, x0, 7
add x0, x1, x0
ldr x1, [x0, 80]
adrp x0, cmap
add x0, x0, :lo12:cmap
str x1, [x0]
adrp x0, display
add x0, x0, :lo12:display
ldr x0, [x0]
ldr x1, [x0, 232]
adrp x0, screen
add x0, x0, :lo12:screen
ldr w0, [x0]
sxtw x0, w0
lsl x0, x0, 7
add x0, x1, x0
ldr x1, [x0, 64]
adrp x0, visual
add x0, x0, :lo12:visual
str x1, [x0]
adrp x0, visual
add x0, x0, :lo12:visual
ldr x0, [x0]
bl XVisualIDFromVisual
str x0, [sp, 160]
ldr x0, [sp, 160]
str x0, [sp, 232]
mov w0, 8
str w0, [sp, 244]
mov w0, 3
str w0, [sp, 248]
adrp x0, display
add x0, x0, :lo12:display
ldr x0, [x0]
add x2, sp, 104
add x1, sp, 224
mov x3, x2
mov x2, x1
mov x1, 13
bl XGetVisualInfo
ldr w0, [sp, 104]
cmp w0, 0
bne .L16
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x0, [x0]
mov x3, x0
mov x2, 42
mov x1, 1
adrp x0, .LC9
add x0, x0, :lo12:.LC9
bl fwrite
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x0, [x0]
mov x3, x0
mov x2, 45
mov x1, 1
adrp x0, .LC10
add x0, x0, :lo12:.LC10
bl fwrite
mov w0, 1
bl exit
.L16:
adrp x0, display
add x0, x0, :lo12:display
ldr x8, [x0]
adrp x0, display
add x0, x0, :lo12:display
ldr x0, [x0]
ldr x1, [x0, 232]
adrp x0, screen
add x0, x0, :lo12:screen
ldr w0, [x0]
sxtw x0, w0
lsl x0, x0, 7
add x0, x1, x0
ldr x1, [x0, 16]
ldr w2, [sp, 96]
ldr w3, [sp, 100]
adrp x0, x_width
add x0, x0, :lo12:x_width
ldr w4, [x0]
adrp x0, x_height
add x0, x0, :lo12:x_height
ldr w5, [x0]
add x0, sp, 368
str x0, [sp, 24]
ldr x0, [sp, 128]
str x0, [sp, 16]
str xzr, [sp, 8]
mov w0, 1
str w0, [sp]
mov w7, 0
mov w6, 3
mov x0, x8
bl XCreateWindow
mov x1, x0
adrp x0, window_id
add x0, x0, :lo12:window_id
str x1, [x0]
.L14:
adrp x0, display
add x0, x0, :lo12:display
ldr x3, [x0]
adrp x0, window_id
add x0, x0, :lo12:window_id
ldr x0, [x0]
add x1, sp, 480
mov x2, x1
mov x1, x0
mov x0, x3
bl XGetWindowAttributes
ldr w1, [sp, 500]
adrp x0, x_depth
add x0, x0, :lo12:x_depth
str w1, [x0]
adrp x0, window_id
add x0, x0, :lo12:window_id
ldr x1, [x0]
adrp x0, draw_id
add x0, x0, :lo12:draw_id
str x1, [x0]
adrp x0, buf_pic
add x0, x0, :lo12:buf_pic
ldr w0, [x0]
cmp w0, 0
beq .L17
adrp x0, display
add x0, x0, :lo12:display
ldr x5, [x0]
adrp x0, window_id
add x0, x0, :lo12:window_id
ldr x1, [x0]
adrp x0, x_width
add x0, x0, :lo12:x_width
ldr w2, [x0]
adrp x0, x_height
add x0, x0, :lo12:x_height
ldr w3, [x0]
adrp x0, x_depth
add x0, x0, :lo12:x_depth
ldr w0, [x0]
mov w4, w0
mov x0, x5
bl XCreatePixmap
mov x1, x0
adrp x0, pixmap_id
add x0, x0, :lo12:pixmap_id
str x1, [x0]
adrp x0, pixmap_id
add x0, x0, :lo12:pixmap_id
ldr x1, [x0]
adrp x0, draw_id
add x0, x0, :lo12:draw_id
str x1, [x0]
.L17:
mov x0, 24
str x0, [sp, 288]
adrp x0, x_width
add x0, x0, :lo12:x_width
ldr w0, [x0]
str w0, [sp, 304]
adrp x0, x_height
add x0, x0, :lo12:x_height
ldr w0, [x0]
str w0, [sp, 308]
mov w0, 100
str w0, [sp, 312]
mov w0, 100
str w0, [sp, 316]
adrp x0, display
add x0, x0, :lo12:display
ldr x8, [x0]
adrp x0, window_id
add x0, x0, :lo12:window_id
ldr x1, [x0]
add x0, sp, 288
mov x7, x0
mov w6, 0
mov x5, 0
mov x4, 0
adrp x0, .LC4
add x3, x0, :lo12:.LC4
adrp x0, .LC4
add x2, x0, :lo12:.LC4
mov x0, x8
bl XSetStandardProperties
mov x0, 1
str x0, [sp, 168]
mov w0, 1
str w0, [sp, 176]
adrp x0, display
add x0, x0, :lo12:display
ldr x3, [x0]
adrp x0, window_id
add x0, x0, :lo12:window_id
ldr x0, [x0]
add x1, sp, 168
mov x2, x1
mov x1, x0
mov x0, x3
bl XSetWMHints
adrp x0, display
add x0, x0, :lo12:display
ldr x4, [x0]
adrp x0, draw_id
add x0, x0, :lo12:draw_id
ldr x0, [x0]
mov x3, 0
mov x2, 0
mov x1, x0
mov x0, x4
bl XCreateGC
mov x1, x0
adrp x0, gc
add x0, x0, :lo12:gc
str x1, [x0]
adrp x0, line_width
add x0, x0, :lo12:line_width
str wzr, [x0]
adrp x0, line_type
add x0, x0, :lo12:line_type
str wzr, [x0]
adrp x0, display
add x0, x0, :lo12:display
ldr x6, [x0]
adrp x0, gc
add x0, x0, :lo12:gc
ldr x1, [x0]
adrp x0, line_width
add x0, x0, :lo12:line_width
ldr w2, [x0]
adrp x0, line_type
add x0, x0, :lo12:line_type
ldr w0, [x0]
mov w5, 0
mov w4, 1
mov w3, w0
mov x0, x6
bl XSetLineAttributes
adrp x0, display
add x0, x0, :lo12:display
ldr x0, [x0]
ldr x1, [x0, 232]
adrp x0, screen
add x0, x0, :lo12:screen
ldr w0, [x0]
sxtw x0, w0
lsl x0, x0, 7
add x0, x1, x0
ldr x0, [x0, 64]
ldr w1, [x0, 52]
adrp x0, ncolors
add x0, x0, :lo12:ncolors
str w1, [x0]
adrp x0, ncolors
add x0, x0, :lo12:ncolors
ldr w0, [x0]
cmp w0, 256
ble .L18
adrp x0, ncolors
add x0, x0, :lo12:ncolors
mov w1, 256
str w1, [x0]
.L18:
adrp x0, visual
add x0, x0, :lo12:visual
ldr x0, [x0]
ldr w0, [x0, 16]
cmp w0, 4
beq .L19
adrp x0, visual
add x0, x0, :lo12:visual
ldr x0, [x0]
ldr w0, [x0, 16]
cmp w0, 5
beq .L19
adrp x0, visual
add x0, x0, :lo12:visual
ldr x0, [x0]
ldr w0, [x0, 16]
cmp w0, 3
bne .L20
adrp x0, ncolors
add x0, x0, :lo12:ncolors
ldr w0, [x0]
cmp w0, 7
ble .L20
.L19:
adrp x0, visual
add x0, x0, :lo12:visual
ldr x0, [x0]
ldr w0, [x0, 16]
cmp w0, 4
beq .L21
adrp x0, visual
add x0, x0, :lo12:visual
ldr x0, [x0]
ldr w0, [x0, 16]
cmp w0, 5
bne .L22
.L21:
adrp x0, color_type
add x0, x0, :lo12:color_type
mov w1, 2
str w1, [x0]
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x3, [x0]
adrp x0, ncolors
add x0, x0, :lo12:ncolors
ldr w0, [x0]
mov w2, w0
adrp x0, .LC11
add x1, x0, :lo12:.LC11
mov x0, x3
bl fprintf
b .L23
.L22:
adrp x0, color_type
add x0, x0, :lo12:color_type
mov w1, 1
str w1, [x0]
str wzr, [sp, 88]
b .L24
.L25:
ldr w1, [sp, 88]
ldr w0, [sp, 88]
sxtw x2, w1
sxtw x0, w0
lsl x0, x0, 4
add x1, sp, 840
str x2, [x1, x0]
ldr w0, [sp, 88]
add w0, w0, 1
str w0, [sp, 88]
.L24:
ldr w1, [sp, 88]
adrp x0, ncolors
add x0, x0, :lo12:ncolors
ldr w0, [x0]
cmp w1, w0
blt .L25
adrp x0, display
add x0, x0, :lo12:display
ldr x4, [x0]
adrp x0, cmap
add x0, x0, :lo12:cmap
ldr x1, [x0]
adrp x0, ncolors
add x0, x0, :lo12:ncolors
ldr w2, [x0]
add x0, sp, 840
mov w3, w2
mov x2, x0
mov x0, x4
bl XQueryColors
adrp x0, display
add x0, x0, :lo12:display
ldr x4, [x0]
adrp x0, window_id
add x0, x0, :lo12:window_id
ldr x1, [x0]
adrp x0, visual
add x0, x0, :lo12:visual
ldr x0, [x0]
mov w3, 1
mov x2, x0
mov x0, x4
bl XCreateColormap
mov x1, x0
adrp x0, cmap
add x0, x0, :lo12:cmap
str x1, [x0]
adrp x0, display
add x0, x0, :lo12:display
ldr x3, [x0]
adrp x0, window_id
add x0, x0, :lo12:window_id
ldr x1, [x0]
adrp x0, cmap
add x0, x0, :lo12:cmap
ldr x0, [x0]
mov x2, x0
mov x0, x3
bl XSetWindowColormap
adrp x0, display
add x0, x0, :lo12:display
ldr x4, [x0]
adrp x0, cmap
add x0, x0, :lo12:cmap
ldr x1, [x0]
adrp x0, ncolors
add x0, x0, :lo12:ncolors
ldr w2, [x0]
add x0, sp, 840
mov w3, w2
mov x2, x0
mov x0, x4
bl XStoreColors
adrp x0, all_colors
add x0, x0, :lo12:all_colors
ldr w0, [x0]
cmp w0, 0
beq .L26
adrp x0, svdicolors_base
add x0, x0, :lo12:svdicolors_base
str wzr, [x0]
b .L23
.L26:
adrp x0, ncolors
add x0, x0, :lo12:ncolors
ldr w0, [x0]
cmp w0, 15
bgt .L27
adrp x0, ncolors
add x0, x0, :lo12:ncolors
ldr w0, [x0]
sub w1, w0, #8
adrp x0, svdicolors_base
add x0, x0, :lo12:svdicolors_base
str w1, [x0]
adrp x0, ncolors
add x0, x0, :lo12:ncolors
mov w1, 8
str w1, [x0]
b .L23
.L27:
adrp x0, ncolors
add x0, x0, :lo12:ncolors
ldr w0, [x0]
cmp w0, 63
ble .L28
adrp x0, ncolors
add x0, x0, :lo12:ncolors
ldr w0, [x0]
add w1, w0, 15
cmp w0, 0
csel w0, w1, w0, lt
asr w0, w0, 4
b .L29
.L28:
mov w0, 4
.L29:
str w0, [sp, 124]
adrp x0, svdicolors_base
add x0, x0, :lo12:svdicolors_base
ldr w1, [sp, 124]
str w1, [x0]
adrp x0, ncolors
add x0, x0, :lo12:ncolors
ldr w1, [x0]
ldr w0, [sp, 124]
lsl w0, w0, 1
sub w1, w1, w0
adrp x0, ncolors
add x0, x0, :lo12:ncolors
str w1, [x0]
.L23:
adrp x0, ncolors
add x0, x0, :lo12:ncolors
ldr s0, [x0]
scvtf s0, s0
adrp x0, dev_cap
add x0, x0, :lo12:dev_cap
str s0, [x0, 12]
adrp x0, def_bc_index
add x0, x0, :lo12:def_bc_index
str wzr, [x0]
adrp x0, def_fc_index
add x0, x0, :lo12:def_fc_index
mov w1, 7
str w1, [x0]
str wzr, [sp, 88]
b .L30
.L31:
ldr w0, [sp, 88]
ldr w2, [sp, 88]
sxtw x0, w0
lsl x0, x0, 2
add x1, sp, 616
str w2, [x1, x0]
ldr w0, [sp, 88]
add w0, w0, 1
str w0, [sp, 88]
.L30:
ldr w0, [sp, 88]
cmp w0, 7
ble .L31
mov w0, 8
str w0, [sp, 88]
str wzr, [sp, 92]
add x0, sp, 92
add x1, sp, 616
add x4, sp, 88
mov x3, x0
adrp x0, default_color_table
add x2, x0, :lo12:default_color_table
mov x0, x4
bl wx11co
str wzr, [sp, 88]
add x0, sp, 88
bl wx11bc
mov w0, 7
str w0, [sp, 88]
add x0, sp, 88
bl wx11fc
b .L32
.L20:
adrp x0, color_type
add x0, x0, :lo12:color_type
str wzr, [x0]
adrp x0, ncolors
add x0, x0, :lo12:ncolors
mov w1, 2
str w1, [x0]
adrp x0, dev_cap
add x0, x0, :lo12:dev_cap
fmov s0, 2.0e+0
str s0, [x0, 12]
adrp x0, def_bc_index
add x0, x0, :lo12:def_bc_index
str wzr, [x0]
adrp x0, def_fc_index
add x0, x0, :lo12:def_fc_index
mov w1, 1
str w1, [x0]
adrp x0, color_table
add x0, x0, :lo12:color_table
str wzr, [x0]
adrp x0, color_table
add x0, x0, :lo12:color_table
str wzr, [x0, 4]
adrp x0, color_table
add x0, x0, :lo12:color_table
str wzr, [x0, 8]
adrp x0, display
add x0, x0, :lo12:display
ldr x0, [x0]
ldr x1, [x0, 232]
adrp x0, screen
add x0, x0, :lo12:screen
ldr w0, [x0]
sxtw x0, w0
lsl x0, x0, 7
add x0, x1, x0
ldr x0, [x0, 96]
mov w1, w0
adrp x0, b_color
add x0, x0, :lo12:b_color
str w1, [x0]
adrp x0, b_color
add x0, x0, :lo12:b_color
ldr w1, [x0]
adrp x0, x_colors
add x0, x0, :lo12:x_colors
str w1, [x0]
adrp x0, color_table
add x0, x0, :lo12:color_table
fmov s0, 1.0e+0
str s0, [x0, 12]
adrp x0, color_table
add x0, x0, :lo12:color_table
fmov s0, 1.0e+0
str s0, [x0, 16]
adrp x0, color_table
add x0, x0, :lo12:color_table
fmov s0, 1.0e+0
str s0, [x0, 20]
adrp x0, display
add x0, x0, :lo12:display
ldr x0, [x0]
ldr x1, [x0, 232]
adrp x0, screen
add x0, x0, :lo12:screen
ldr w0, [x0]
sxtw x0, w0
lsl x0, x0, 7
add x0, x1, x0
ldr x0, [x0, 88]
mov w1, w0
adrp x0, f_color
add x0, x0, :lo12:f_color
str w1, [x0]
adrp x0, f_color
add x0, x0, :lo12:f_color
ldr w1, [x0]
adrp x0, x_colors
add x0, x0, :lo12:x_colors
str w1, [x0, 4]
.L32:
adrp x0, display
add x0, x0, :lo12:display
ldr x2, [x0]
adrp x0, font_name
add x0, x0, :lo12:font_name
ldr x0, [x0]
mov x1, x0
mov x0, x2
bl XLoadQueryFont
mov x1, x0
adrp x0, font_info
add x0, x0, :lo12:font_info
str x1, [x0]
adrp x0, font_info
add x0, x0, :lo12:font_info
ldr x0, [x0]
cmp x0, 0
bne .L33
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x0, [x0]
mov x3, x0
mov x2, 43
mov x1, 1
adrp x0, .LC12
add x0, x0, :lo12:.LC12
bl fwrite
adrp x0, gc
add x0, x0, :lo12:gc
ldr x0, [x0]
bl XGContextFromGC
mov x1, x0
adrp x0, gcontext
add x0, x0, :lo12:gcontext
str x1, [x0]
adrp x0, display
add x0, x0, :lo12:display
ldr x2, [x0]
adrp x0, gcontext
add x0, x0, :lo12:gcontext
ldr x0, [x0]
mov x1, x0
mov x0, x2
bl XQueryFont
mov x1, x0
adrp x0, font_info
add x0, x0, :lo12:font_info
str x1, [x0]
b .L34
.L33:
adrp x0, font_info
add x0, x0, :lo12:font_info
ldr x0, [x0]
ldr x1, [x0, 8]
adrp x0, font_id
add x0, x0, :lo12:font_id
str x1, [x0]
adrp x0, display
add x0, x0, :lo12:display
ldr x3, [x0]
adrp x0, gc
add x0, x0, :lo12:gc
ldr x1, [x0]
adrp x0, font_id
add x0, x0, :lo12:font_id
ldr x0, [x0]
mov x2, x0
mov x0, x3
bl XSetFont
.L34:
adrp x0, font_info
add x0, x0, :lo12:font_info
ldr x0, [x0]
ldrsh w0, [x0, 74]
mov w1, w0
adrp x0, font_info
add x0, x0, :lo12:font_info
ldr x0, [x0]
ldrsh w0, [x0, 76]
add w1, w1, w0
adrp x0, font_height
add x0, x0, :lo12:font_height
str w1, [x0]
adrp x0, font_info
add x0, x0, :lo12:font_info
ldr x0, [x0]
ldrsh w0, [x0, 70]
mov w1, w0
adrp x0, font_info
add x0, x0, :lo12:font_info
ldr x0, [x0]
ldrsh w0, [x0, 56]
sub w1, w1, w0
adrp x0, font_width
add x0, x0, :lo12:font_width
str w1, [x0]
adrp x0, display
add x0, x0, :lo12:display
ldr x3, [x0]
adrp x0, window_id
add x0, x0, :lo12:window_id
ldr x0, [x0]
mov x2, 32773
movk x2, 0x2, lsl 16
mov x1, x0
mov x0, x3
bl XSelectInput
adrp x0, display
add x0, x0, :lo12:display
ldr x2, [x0]
adrp x0, window_id
add x0, x0, :lo12:window_id
ldr x0, [x0]
mov x1, x0
mov x0, x2
bl XMapWindow
ldr w0, [sp, 108]
cmp w0, 0
bne .L35
adrp x0, display
add x0, x0, :lo12:display
ldr x4, [x0]
adrp x0, window_id
add x0, x0, :lo12:window_id
ldr x0, [x0]
add x1, sp, 648
mov x3, x1
mov x2, 32768
mov x1, x0
mov x0, x4
bl XWindowEvent
.L35:
adrp x0, buf_pic
add x0, x0, :lo12:buf_pic
ldr w0, [x0]
cmp w0, 0
beq .L36
bl x_clear_pixmap
.L36:
mov w0, 1
bl x_dynamics
adrp x0, display
add x0, x0, :lo12:display
ldr x0, [x0]
mov w1, 1
bl XSync
nop
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [sp, 4936]
ldr x1, [x0]
subs x2, x2, x1
mov x1, 0
beq .L37
bl __stack_chk_fail
.L37:
ldr x19, [sp, 48]
ldp x29, x30, [sp, 32]
mov x12, 4944
add sp, sp, x12
.cfi_restore 29
.cfi_restore 30
.cfi_restore 19
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE7:
.size wx11ii, .-wx11ii
.align 2
.global x_dynamics
.type x_dynamics, %function
x_dynamics:
.LFB8:
.cfi_startproc
stp x29, x30, [sp, -192]!
.cfi_def_cfa_offset 192
.cfi_offset 29, -192
.cfi_offset 30, -184
mov x29, sp
str w0, [sp, 28]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 184]
mov x1, 0
adrp x0, asp
add x0, x0, :lo12:asp
ldr s0, [x0]
str s0, [sp, 32]
adrp x0, just
add x0, x0, :lo12:just
ldr w0, [x0]
str w0, [sp, 36]
adrp x0, display
add x0, x0, :lo12:display
ldr x3, [x0]
adrp x0, window_id
add x0, x0, :lo12:window_id
ldr x0, [x0]
add x1, sp, 48
mov x2, x1
mov x1, x0
mov x0, x3
bl XGetWindowAttributes
ldr w0, [sp, 28]
cmp w0, 0
bne .L40
ldr w0, [sp, 56]
mov w1, w0
adrp x0, x_width
add x0, x0, :lo12:x_width
ldr w0, [x0]
cmp w1, w0
bne .L40
ldr w0, [sp, 60]
mov w1, w0
adrp x0, x_height
add x0, x0, :lo12:x_height
ldr w0, [x0]
cmp w1, w0
beq .L66
.L40:
ldr w0, [sp, 56]
mov w1, w0
adrp x0, x_width
add x0, x0, :lo12:x_width
str w1, [x0]
ldr w0, [sp, 60]
mov w1, w0
adrp x0, x_height
add x0, x0, :lo12:x_height
str w1, [x0]
adrp x0, buf_pic
add x0, x0, :lo12:buf_pic
ldr w0, [x0]
cmp w0, 0
beq .L42
ldr w0, [sp, 28]
cmp w0, 0
bne .L42
adrp x0, display
add x0, x0, :lo12:display
ldr x2, [x0]
adrp x0, pixmap_id
add x0, x0, :lo12:pixmap_id
ldr x0, [x0]
mov x1, x0
mov x0, x2
bl XFreePixmap
adrp x0, display
add x0, x0, :lo12:display
ldr x5, [x0]
adrp x0, window_id
add x0, x0, :lo12:window_id
ldr x1, [x0]
adrp x0, x_width
add x0, x0, :lo12:x_width
ldr w2, [x0]
adrp x0, x_height
add x0, x0, :lo12:x_height
ldr w3, [x0]
adrp x0, x_depth
add x0, x0, :lo12:x_depth
ldr w0, [x0]
mov w4, w0
mov x0, x5
bl XCreatePixmap
mov x1, x0
adrp x0, pixmap_id
add x0, x0, :lo12:pixmap_id
str x1, [x0]
adrp x0, pixmap_id
add x0, x0, :lo12:pixmap_id
ldr x1, [x0]
adrp x0, draw_id
add x0, x0, :lo12:draw_id
str x1, [x0]
bl x_clear_pixmap
.L42:
adrp x0, x_width
add x0, x0, :lo12:x_width
ldr s0, [x0]
ucvtf s0, s0
adrp x0, dev_cap
add x0, x0, :lo12:dev_cap
str s0, [x0, 56]
adrp x0, x_height
add x0, x0, :lo12:x_height
ldr s0, [x0]
ucvtf s0, s0
adrp x0, dev_cap
add x0, x0, :lo12:dev_cap
str s0, [x0, 60]
ldr s0, [sp, 32]
fcmp s0, #0.0
bne .L43
adrp x0, x_width
add x0, x0, :lo12:x_width
ldr s0, [x0]
ucvtf s1, s0
adrp x0, x_height
add x0, x0, :lo12:x_height
ldr s0, [x0]
ucvtf s0, s0
fdiv s0, s1, s0
str s0, [sp, 32]
adrp x0, asp
add x0, x0, :lo12:asp
ldr s0, [sp, 32]
str s0, [x0]
.L43:
ldr s1, [sp, 32]
fmov s0, 1.0e+0
fcmpe s1, s0
bgt .L62
b .L64
.L62:
adrp x0, ndc_xmax
add x0, x0, :lo12:ndc_xmax
fmov s0, 1.0e+0
str s0, [x0]
ldr s0, [sp, 32]
fmov s1, 1.0e+0
fdiv s0, s1, s0
adrp x0, ndc_ymax
add x0, x0, :lo12:ndc_ymax
str s0, [x0]
b .L46
.L64:
adrp x0, ndc_xmax
add x0, x0, :lo12:ndc_xmax
ldr s0, [sp, 32]
str s0, [x0]
adrp x0, ndc_ymax
add x0, x0, :lo12:ndc_ymax
fmov s0, 1.0e+0
str s0, [x0]
.L46:
adrp x0, x_width
add x0, x0, :lo12:x_width
ldr w0, [x0]
sub w0, w0, #1
ucvtf s1, w0
adrp x0, ndc_xmax
add x0, x0, :lo12:ndc_xmax
ldr s0, [x0]
fdiv s1, s1, s0
adrp x0, x_height
add x0, x0, :lo12:x_height
ldr w0, [x0]
sub w0, w0, #1
ucvtf s2, w0
adrp x0, ndc_ymax
add x0, x0, :lo12:ndc_ymax
ldr s0, [x0]
fdiv s0, s2, s0
fcmpe s1, s0
bmi .L63
b .L65
.L63:
adrp x0, x_width
add x0, x0, :lo12:x_width
ldr w0, [x0]
sub w0, w0, #1
ucvtf s1, w0
adrp x0, ndc_xmax
add x0, x0, :lo12:ndc_xmax
ldr s0, [x0]
fdiv s0, s1, s0
b .L49
.L65:
adrp x0, x_height
add x0, x0, :lo12:x_height
ldr w0, [x0]
sub w0, w0, #1
ucvtf s1, w0
adrp x0, ndc_ymax
add x0, x0, :lo12:ndc_ymax
ldr s0, [x0]
fdiv s0, s1, s0
.L49:
adrp x0, scale
add x0, x0, :lo12:scale
str s0, [x0]
adrp x0, scale
add x0, x0, :lo12:scale
ldr s1, [x0]
adrp x0, ndc_xmax
add x0, x0, :lo12:ndc_xmax
ldr s0, [x0]
fmul s0, s1, s0
fcvtzs s0, s0
str s0, [sp, 40]
adrp x0, scale
add x0, x0, :lo12:scale
ldr s1, [x0]
adrp x0, ndc_ymax
add x0, x0, :lo12:ndc_ymax
ldr s0, [x0]
fmul s0, s1, s0
fcvtzs s0, s0
str s0, [sp, 44]
ldr w0, [sp, 36]
cmp w0, 0
bne .L50
mov w0, 5
str w0, [sp, 36]
.L50:
ldr w0, [sp, 36]
cmp w0, 3
bgt .L51
adrp x0, ypad
add x0, x0, :lo12:ypad
str wzr, [x0]
b .L52
.L51:
ldr w0, [sp, 36]
cmp w0, 6
bgt .L53
adrp x0, x_height
add x0, x0, :lo12:x_height
ldr w1, [x0]
ldr w0, [sp, 44]
sub w0, w1, w0
lsr w0, w0, 1
mov w1, w0
adrp x0, ypad
add x0, x0, :lo12:ypad
str w1, [x0]
b .L52
.L53:
adrp x0, x_height
add x0, x0, :lo12:x_height
ldr w1, [x0]
ldr w0, [sp, 44]
sub w0, w1, w0
mov w1, w0
adrp x0, ypad
add x0, x0, :lo12:ypad
str w1, [x0]
.L52:
ldr w0, [sp, 36]
cmp w0, 1
beq .L54
ldr w0, [sp, 36]
cmp w0, 4
beq .L54
ldr w0, [sp, 36]
cmp w0, 7
bne .L55
.L54:
adrp x0, xpad
add x0, x0, :lo12:xpad
str wzr, [x0]
b .L56
.L55:
ldr w0, [sp, 36]
cmp w0, 2
beq .L57
ldr w0, [sp, 36]
cmp w0, 5
beq .L57
ldr w0, [sp, 36]
cmp w0, 8
bne .L58
.L57:
adrp x0, x_width
add x0, x0, :lo12:x_width
ldr w1, [x0]
ldr w0, [sp, 40]
sub w0, w1, w0
lsr w0, w0, 1
mov w1, w0
adrp x0, xpad
add x0, x0, :lo12:xpad
str w1, [x0]
b .L56
.L58:
adrp x0, x_width
add x0, x0, :lo12:x_width
ldr w1, [x0]
ldr w0, [sp, 40]
sub w0, w1, w0
mov w1, w0
adrp x0, xpad
add x0, x0, :lo12:xpad
str w1, [x0]
.L56:
adrp x0, line_width
add x0, x0, :lo12:line_width
ldr w0, [x0]
cmp w0, 0
beq .L59
adrp x0, line_width
add x0, x0, :lo12:line_width
ldr s0, [x0]
ucvtf s0, s0
b .L60
.L59:
fmov s0, 1.0e+0
.L60:
adrp x0, scale
add x0, x0, :lo12:scale
ldr s1, [x0]
fdiv s0, s0, s1
mov w0, 1120403456
fmov s1, w0
fmul s0, s0, s1
adrp x0, vector
add x0, x0, :lo12:vector
str s0, [x0, 16]
adrp x0, font_height
add x0, x0, :lo12:font_height
ldr s0, [x0]
scvtf s1, s0
adrp x0, scale
add x0, x0, :lo12:scale
ldr s0, [x0]
fdiv s0, s1, s0
adrp x0, vector
add x0, x0, :lo12:vector
str s0, [x0, 20]
adrp x0, font_width
add x0, x0, :lo12:font_width
ldr s0, [x0]
scvtf s1, s0
adrp x0, scale
add x0, x0, :lo12:scale
ldr s0, [x0]
fdiv s0, s1, s0
adrp x0, vector
add x0, x0, :lo12:vector
str s0, [x0, 24]
b .L39
.L66:
nop
.L39:
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [sp, 184]
ldr x1, [x0]
subs x2, x2, x1
mov x1, 0
beq .L61
bl __stack_chk_fail
.L61:
ldp x29, x30, [sp], 192
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE8:
.size x_dynamics, .-x_dynamics
.align 2
.global wx1102
.type wx1102, %function
wx1102:
.LFB9:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str x0, [sp, 8]
nop
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE9:
.size wx1102, .-wx1102
.align 2
.global wx11it
.type wx11it, %function
wx11it:
.LFB10:
.cfi_startproc
stp x29, x30, [sp, -16]!
.cfi_def_cfa_offset 16
.cfi_offset 29, -16
.cfi_offset 30, -8
mov x29, sp
bl x11_vflush
adrp x0, display
add x0, x0, :lo12:display
ldr x2, [x0]
adrp x0, window_id
add x0, x0, :lo12:window_id
ldr x0, [x0]
mov x1, x0
mov x0, x2
bl XDestroyWindow
adrp x0, display
add x0, x0, :lo12:display
ldr x0, [x0]
bl XCloseDisplay
nop
ldp x29, x30, [sp], 16
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE10:
.size wx11it, .-wx11it
.align 2
.global wx11dc
.type wx11dc, %function
wx11dc:
.LFB11:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str x0, [sp, 24]
str x1, [sp, 16]
ldr x0, [sp, 24]
ldr w0, [x0]
cmp w0, 0
ble .L70
ldr x0, [sp, 24]
ldr w0, [x0]
cmp w0, 33
ble .L71
.L70:
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x4, [x0]
mov w3, 5
mov w2, 726
adrp x0, .LC1
add x1, x0, :lo12:.LC1
mov x0, x4
bl fprintf
b .L72
.L71:
ldr x0, [sp, 24]
ldr w0, [x0]
sub w1, w0, #1
adrp x0, dev_cap
add x0, x0, :lo12:dev_cap
sxtw x1, w1
ldr s0, [x0, x1, lsl 2]
ldr x0, [sp, 16]
str s0, [x0]
nop
.L72:
nop
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE11:
.size wx11dc, .-wx11dc
.align 2
.global wx11ig
.type wx11ig, %function
wx11ig:
.LFB12:
.cfi_startproc
stp x29, x30, [sp, -16]!
.cfi_def_cfa_offset 16
.cfi_offset 29, -16
.cfi_offset 30, -8
mov x29, sp
bl x11_vflush
bl x_check_window
adrp x0, window_stat
add x0, x0, :lo12:window_stat
str wzr, [x0]
adrp x0, buf_pic
add x0, x0, :lo12:buf_pic
ldr w0, [x0]
cmp w0, 0
beq .L74
bl wx11fl
bl x_clear_pixmap
b .L76
.L74:
adrp x0, display
add x0, x0, :lo12:display
ldr x2, [x0]
adrp x0, window_id
add x0, x0, :lo12:window_id
ldr x0, [x0]
mov x1, x0
mov x0, x2
bl XClearWindow
.L76:
nop
ldp x29, x30, [sp], 16
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE12:
.size wx11ig, .-wx11ig
.align 2
.global wx11be
.type wx11be, %function
wx11be:
.LFB13:
.cfi_startproc
stp x29, x30, [sp, -16]!
.cfi_def_cfa_offset 16
.cfi_offset 29, -16
.cfi_offset 30, -8
mov x29, sp
bl x11_vflush
adrp x0, display
add x0, x0, :lo12:display
ldr x0, [x0]
mov w1, 100
bl XBell
nop
ldp x29, x30, [sp], 16
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE13:
.size wx11be, .-wx11be
.align 2
.global wx11wt
.type wx11wt, %function
wx11wt:
.LFB14:
.cfi_startproc
stp x29, x30, [sp, -224]!
.cfi_def_cfa_offset 224
.cfi_offset 29, -224
.cfi_offset 30, -216
mov x29, sp
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 216]
mov x1, 0
bl wx11fl
adrp x0, display
add x0, x0, :lo12:display
ldr x0, [x0]
mov w1, 100
bl XBell
adrp x0, display
add x0, x0, :lo12:display
ldr x4, [x0]
adrp x0, window_id
add x0, x0, :lo12:window_id
ldr x0, [x0]
add x1, sp, 24
mov x3, x1
mov x2, 5
mov x1, x0
mov x0, x4
bl XWindowEvent
nop
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [sp, 216]
ldr x1, [x0]
subs x2, x2, x1
mov x1, 0
beq .L79
bl __stack_chk_fail
.L79:
ldp x29, x30, [sp], 224
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE14:
.size wx11wt, .-wx11wt
.align 2
.global wx11fl
.type wx11fl, %function
wx11fl:
.LFB15:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
stp x29, x30, [sp, 16]
.cfi_offset 29, -16
.cfi_offset 30, -8
add x29, sp, 16
bl x11_vflush
adrp x0, buf_pic
add x0, x0, :lo12:buf_pic
ldr w0, [x0]
cmp w0, 0
beq .L81
adrp x0, display
add x0, x0, :lo12:display
ldr x8, [x0]
adrp x0, pixmap_id
add x0, x0, :lo12:pixmap_id
ldr x1, [x0]
adrp x0, window_id
add x0, x0, :lo12:window_id
ldr x2, [x0]
adrp x0, gc
add x0, x0, :lo12:gc
ldr x3, [x0]
adrp x0, x_width
add x0, x0, :lo12:x_width
ldr w4, [x0]
adrp x0, x_height
add x0, x0, :lo12:x_height
ldr w0, [x0]
str wzr, [sp, 8]
str wzr, [sp]
mov w7, w0
mov w6, w4
mov w5, 0
mov w4, 0
mov x0, x8
bl XCopyArea
.L81:
adrp x0, display
add x0, x0, :lo12:display
ldr x0, [x0]
mov w1, 0
bl XSync
nop
ldp x29, x30, [sp, 16]
add sp, sp, 32
.cfi_restore 29
.cfi_restore 30
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE15:
.size wx11fl, .-wx11fl
.section .rodata
.align 3
.LC15:
.string "svdi_x: problem doing XAllocColor\n"
.align 3
.LC16:
.string " HLS option being phased out - not doing anything\n"
.align 3
.LC17:
.string " Contact Computer Graphics Group - Div. 2644\n"
.text
.align 2
.global wx11co
.type wx11co, %function
wx11co:
.LFB16:
.cfi_startproc
stp x29, x30, [sp, -80]!
.cfi_def_cfa_offset 80
.cfi_offset 29, -80
.cfi_offset 30, -72
mov x29, sp
str x0, [sp, 40]
str x1, [sp, 32]
str x2, [sp, 24]
str x3, [sp, 16]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 72]
mov x1, 0
adrp x0, color_type
add x0, x0, :lo12:color_type
ldr w0, [x0]
cmp w0, 0
beq .L101
ldr x0, [sp, 40]
ldr w0, [x0]
cmp w0, 0
bgt .L85
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x4, [x0]
mov w3, 5
mov w2, 723
adrp x0, .LC1
add x1, x0, :lo12:.LC1
mov x0, x4
bl fprintf
.L85:
ldr x0, [sp, 16]
ldr w0, [x0]
cmp w0, 0
beq .L86
ldr x0, [sp, 16]
ldr w0, [x0]
cmp w0, 1
beq .L86
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x4, [x0]
mov w3, 5
mov w2, 725
adrp x0, .LC1
add x1, x0, :lo12:.LC1
mov x0, x4
bl fprintf
.L86:
str wzr, [sp, 52]
b .L87
.L98:
ldrsw x0, [sp, 52]
lsl x0, x0, 2
ldr x1, [sp, 32]
add x0, x1, x0
ldr w0, [x0]
cmp w0, 0
blt .L88
ldrsw x0, [sp, 52]
lsl x0, x0, 2
ldr x1, [sp, 32]
add x0, x1, x0
ldr w0, [x0]
cmp w0, 255
ble .L89
.L88:
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x4, [x0]
mov w3, 5
mov w2, 724
adrp x0, .LC1
add x1, x0, :lo12:.LC1
mov x0, x4
bl fprintf
b .L90
.L89:
ldrsw x0, [sp, 52]
lsl x0, x0, 2
ldr x1, [sp, 32]
add x0, x1, x0
ldr w1, [x0]
adrp x0, ncolors
add x0, x0, :lo12:ncolors
ldr w0, [x0]
cmp w1, w0
bge .L90
ldr x0, [sp, 16]
ldr w0, [x0]
cmp w0, 0
bne .L91
ldrsw x1, [sp, 52]
mov x0, x1
lsl x0, x0, 1
add x0, x0, x1
lsl x0, x0, 2
mov x1, x0
ldr x0, [sp, 24]
add x0, x0, x1
ldr s0, [x0]
fcmpe s0, #0.0
bmi .L92
ldrsw x1, [sp, 52]
mov x0, x1
lsl x0, x0, 1
add x0, x0, x1
lsl x0, x0, 2
mov x1, x0
ldr x0, [sp, 24]
add x0, x0, x1
ldr s1, [x0]
fmov s0, 1.0e+0
fcmpe s1, s0
bgt .L92
ldrsw x1, [sp, 52]
mov x0, x1
lsl x0, x0, 1
add x0, x0, x1
lsl x0, x0, 2
mov x1, x0
ldr x0, [sp, 24]
add x0, x0, x1
ldr s0, [x0, 4]
fcmpe s0, #0.0
bmi .L92
ldrsw x1, [sp, 52]
mov x0, x1
lsl x0, x0, 1
add x0, x0, x1
lsl x0, x0, 2
mov x1, x0
ldr x0, [sp, 24]
add x0, x0, x1
ldr s1, [x0, 4]
fmov s0, 1.0e+0
fcmpe s1, s0
bgt .L92
ldrsw x1, [sp, 52]
mov x0, x1
lsl x0, x0, 1
add x0, x0, x1
lsl x0, x0, 2
mov x1, x0
ldr x0, [sp, 24]
add x0, x0, x1
ldr s0, [x0, 8]
fcmpe s0, #0.0
bmi .L92
ldrsw x1, [sp, 52]
mov x0, x1
lsl x0, x0, 1
add x0, x0, x1
lsl x0, x0, 2
mov x1, x0
ldr x0, [sp, 24]
add x0, x0, x1
ldr s1, [x0, 8]
fmov s0, 1.0e+0
fcmpe s1, s0
bgt .L92
b .L100
.L92:
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x4, [x0]
mov w3, 5
mov w2, 727
adrp x0, .LC1
add x1, x0, :lo12:.LC1
mov x0, x4
bl fprintf
b .L90
.L100:
ldrsw x1, [sp, 52]
mov x0, x1
lsl x0, x0, 1
add x0, x0, x1
lsl x0, x0, 2
mov x1, x0
ldr x0, [sp, 24]
add x0, x0, x1
ldrsw x1, [sp, 52]
lsl x1, x1, 2
ldr x2, [sp, 32]
add x1, x2, x1
ldr w1, [x1]
ldr s0, [x0]
adrp x0, color_table
add x2, x0, :lo12:color_table
sxtw x1, w1
mov x0, x1
lsl x0, x0, 1
add x0, x0, x1
lsl x0, x0, 2
add x0, x2, x0
str s0, [x0]
ldrsw x1, [sp, 52]
mov x0, x1
lsl x0, x0, 1
add x0, x0, x1
lsl x0, x0, 2
mov x1, x0
ldr x0, [sp, 24]
add x0, x0, x1
ldrsw x1, [sp, 52]
lsl x1, x1, 2
ldr x2, [sp, 32]
add x1, x2, x1
ldr w1, [x1]
ldr s0, [x0, 4]
adrp x0, color_table
add x2, x0, :lo12:color_table
sxtw x1, w1
mov x0, x1
lsl x0, x0, 1
add x0, x0, x1
lsl x0, x0, 2
add x0, x2, x0
str s0, [x0, 4]
ldrsw x1, [sp, 52]
mov x0, x1
lsl x0, x0, 1
add x0, x0, x1
lsl x0, x0, 2
mov x1, x0
ldr x0, [sp, 24]
add x0, x0, x1
ldrsw x1, [sp, 52]
lsl x1, x1, 2
ldr x2, [sp, 32]
add x1, x2, x1
ldr w1, [x1]
ldr s0, [x0, 8]
adrp x0, color_table
add x2, x0, :lo12:color_table
sxtw x1, w1
mov x0, x1
lsl x0, x0, 1
add x0, x0, x1
lsl x0, x0, 2
add x0, x2, x0
str s0, [x0, 8]
ldrsw x1, [sp, 52]
mov x0, x1
lsl x0, x0, 1
add x0, x0, x1
lsl x0, x0, 2
mov x1, x0
ldr x0, [sp, 24]
add x0, x0, x1
ldr s0, [x0]
mov w0, 65280
movk w0, 0x477f, lsl 16
fmov s1, w0
fmul s0, s0, s1
fcvtzu w0, s0
and w0, w0, 65535
strh w0, [sp, 64]
ldrsw x1, [sp, 52]
mov x0, x1
lsl x0, x0, 1
add x0, x0, x1
lsl x0, x0, 2
mov x1, x0
ldr x0, [sp, 24]
add x0, x0, x1
ldr s0, [x0, 4]
mov w0, 65280
movk w0, 0x477f, lsl 16
fmov s1, w0
fmul s0, s0, s1
fcvtzu w0, s0
and w0, w0, 65535
strh w0, [sp, 66]
ldrsw x1, [sp, 52]
mov x0, x1
lsl x0, x0, 1
add x0, x0, x1
lsl x0, x0, 2
mov x1, x0
ldr x0, [sp, 24]
add x0, x0, x1
ldr s0, [x0, 8]
mov w0, 65280
movk w0, 0x477f, lsl 16
fmov s1, w0
fmul s0, s0, s1
fcvtzu w0, s0
and w0, w0, 65535
strh w0, [sp, 68]
adrp x0, color_type
add x0, x0, :lo12:color_type
ldr w0, [x0]
cmp w0, 1
bne .L96
ldrsw x0, [sp, 52]
lsl x0, x0, 2
ldr x1, [sp, 32]
add x0, x1, x0
ldr w1, [x0]
adrp x0, svdicolors_base
add x0, x0, :lo12:svdicolors_base
ldr w0, [x0]
add w0, w1, w0
uxtw x0, w0
str x0, [sp, 56]
mov w0, 7
strb w0, [sp, 70]
adrp x0, display
add x0, x0, :lo12:display
ldr x3, [x0]
adrp x0, cmap
add x0, x0, :lo12:cmap
ldr x0, [x0]
add x1, sp, 56
mov x2, x1
mov x1, x0
mov x0, x3
bl XStoreColor
ldr x2, [sp, 56]
ldrsw x0, [sp, 52]
lsl x0, x0, 2
ldr x1, [sp, 32]
add x0, x1, x0
ldr w1, [x0]
adrp x0, x_colors
add x0, x0, :lo12:x_colors
sxtw x1, w1
str w2, [x0, x1, lsl 2]
b .L90
.L96:
adrp x0, display
add x0, x0, :lo12:display
ldr x3, [x0]
adrp x0, cmap
add x0, x0, :lo12:cmap
ldr x0, [x0]
add x1, sp, 56
mov x2, x1
mov x1, x0
mov x0, x3
bl XAllocColor
cmp w0, 0
bne .L97
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x0, [x0]
mov x3, x0
mov x2, 34
mov x1, 1
adrp x0, .LC15
add x0, x0, :lo12:.LC15
bl fwrite
.L97:
ldr x2, [sp, 56]
ldrsw x0, [sp, 52]
lsl x0, x0, 2
ldr x1, [sp, 32]
add x0, x1, x0
ldr w1, [x0]
adrp x0, x_colors
add x0, x0, :lo12:x_colors
sxtw x1, w1
str w2, [x0, x1, lsl 2]
b .L90
.L91:
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x0, [x0]
mov x3, x0
mov x2, 50
mov x1, 1
adrp x0, .LC16
add x0, x0, :lo12:.LC16
bl fwrite
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x0, [x0]
mov x3, x0
mov x2, 45
mov x1, 1
adrp x0, .LC17
add x0, x0, :lo12:.LC17
bl fwrite
.L90:
ldr w0, [sp, 52]
add w0, w0, 1
str w0, [sp, 52]
.L87:
ldr x0, [sp, 40]
ldr w0, [x0]
ldr w1, [sp, 52]
cmp w1, w0
blt .L98
b .L82
.L101:
nop
.L82:
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [sp, 72]
ldr x1, [x0]
subs x2, x2, x1
mov x1, 0
beq .L99
bl __stack_chk_fail
.L99:
ldp x29, x30, [sp], 80
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE16:
.size wx11co, .-wx11co
.section .rodata
.align 3
.LC18:
.string " HLS option being phased out - returning RGB values\n"
.text
.align 2
.global wx11ic
.type wx11ic, %function
wx11ic:
.LFB17:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str x0, [sp, 40]
str x1, [sp, 32]
str x2, [sp, 24]
str x3, [sp, 16]
ldr x0, [sp, 40]
ldr w0, [x0]
cmp w0, 0
bgt .L103
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x4, [x0]
mov w3, 5
mov w2, 723
adrp x0, .LC1
add x1, x0, :lo12:.LC1
mov x0, x4
bl fprintf
.L103:
ldr x0, [sp, 16]
ldr w0, [x0]
cmp w0, 0
beq .L104
ldr x0, [sp, 16]
ldr w0, [x0]
cmp w0, 1
beq .L104
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x4, [x0]
mov w3, 5
mov w2, 725
adrp x0, .LC1
add x1, x0, :lo12:.LC1
mov x0, x4
bl fprintf
.L104:
str wzr, [sp, 60]
b .L105
.L111:
ldrsw x0, [sp, 60]
lsl x0, x0, 2
ldr x1, [sp, 32]
add x0, x1, x0
ldr w0, [x0]
cmp w0, 0
blt .L106
ldrsw x0, [sp, 60]
lsl x0, x0, 2
ldr x1, [sp, 32]
add x0, x1, x0
ldr w1, [x0]
adrp x0, ncolors
add x0, x0, :lo12:ncolors
ldr w0, [x0]
cmp w1, w0
blt .L107
.L106:
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x4, [x0]
mov w3, 5
mov w2, 724
adrp x0, .LC1
add x1, x0, :lo12:.LC1
mov x0, x4
bl fprintf
b .L108
.L107:
ldrsw x0, [sp, 60]
lsl x0, x0, 2
ldr x1, [sp, 32]
add x0, x1, x0
ldr w1, [x0]
adrp x0, ncolors
add x0, x0, :lo12:ncolors
ldr w0, [x0]
cmp w1, w0
blt .L109
ldrsw x1, [sp, 60]
mov x0, x1
lsl x0, x0, 1
add x0, x0, x1
lsl x0, x0, 2
mov x1, x0
ldr x0, [sp, 24]
add x0, x0, x1
fmov s0, -1.0e+0
str s0, [x0]
b .L108
.L109:
ldr x0, [sp, 16]
ldr w0, [x0]
cmp w0, 0
bne .L110
ldrsw x0, [sp, 60]
lsl x0, x0, 2
ldr x1, [sp, 32]
add x0, x1, x0
ldr w4, [x0]
ldrsw x1, [sp, 60]
mov x0, x1
lsl x0, x0, 1
add x0, x0, x1
lsl x0, x0, 2
mov x1, x0
ldr x0, [sp, 24]
add x2, x0, x1
adrp x0, color_table
add x3, x0, :lo12:color_table
sxtw x1, w4
mov x0, x1
lsl x0, x0, 1
add x0, x0, x1
lsl x0, x0, 2
add x0, x3, x0
ldr s0, [x0]
str s0, [x2]
ldrsw x0, [sp, 60]
lsl x0, x0, 2
ldr x1, [sp, 32]
add x0, x1, x0
ldr w4, [x0]
ldrsw x1, [sp, 60]
mov x0, x1
lsl x0, x0, 1
add x0, x0, x1
lsl x0, x0, 2
mov x1, x0
ldr x0, [sp, 24]
add x2, x0, x1
adrp x0, color_table
add x3, x0, :lo12:color_table
sxtw x1, w4
mov x0, x1
lsl x0, x0, 1
add x0, x0, x1
lsl x0, x0, 2
add x0, x3, x0
ldr s0, [x0, 4]
str s0, [x2, 4]
ldrsw x0, [sp, 60]
lsl x0, x0, 2
ldr x1, [sp, 32]
add x0, x1, x0
ldr w4, [x0]
ldrsw x1, [sp, 60]
mov x0, x1
lsl x0, x0, 1
add x0, x0, x1
lsl x0, x0, 2
mov x1, x0
ldr x0, [sp, 24]
add x2, x0, x1
adrp x0, color_table
add x3, x0, :lo12:color_table
sxtw x1, w4
mov x0, x1
lsl x0, x0, 1
add x0, x0, x1
lsl x0, x0, 2
add x0, x3, x0
ldr s0, [x0, 8]
str s0, [x2, 8]
b .L108
.L110:
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x0, [x0]
mov x3, x0
mov x2, 52
mov x1, 1
adrp x0, .LC18
add x0, x0, :lo12:.LC18
bl fwrite
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x0, [x0]
mov x3, x0
mov x2, 45
mov x1, 1
adrp x0, .LC17
add x0, x0, :lo12:.LC17
bl fwrite
ldrsw x0, [sp, 60]
lsl x0, x0, 2
ldr x1, [sp, 32]
add x0, x1, x0
ldr w4, [x0]
ldrsw x1, [sp, 60]
mov x0, x1
lsl x0, x0, 1
add x0, x0, x1
lsl x0, x0, 2
mov x1, x0
ldr x0, [sp, 24]
add x2, x0, x1
adrp x0, color_table
add x3, x0, :lo12:color_table
sxtw x1, w4
mov x0, x1
lsl x0, x0, 1
add x0, x0, x1
lsl x0, x0, 2
add x0, x3, x0
ldr s0, [x0]
str s0, [x2]
ldrsw x0, [sp, 60]
lsl x0, x0, 2
ldr x1, [sp, 32]
add x0, x1, x0
ldr w4, [x0]
ldrsw x1, [sp, 60]
mov x0, x1
lsl x0, x0, 1
add x0, x0, x1
lsl x0, x0, 2
mov x1, x0
ldr x0, [sp, 24]
add x2, x0, x1
adrp x0, color_table
add x3, x0, :lo12:color_table
sxtw x1, w4
mov x0, x1
lsl x0, x0, 1
add x0, x0, x1
lsl x0, x0, 2
add x0, x3, x0
ldr s0, [x0, 4]
str s0, [x2, 4]
ldrsw x0, [sp, 60]
lsl x0, x0, 2
ldr x1, [sp, 32]
add x0, x1, x0
ldr w4, [x0]
ldrsw x1, [sp, 60]
mov x0, x1
lsl x0, x0, 1
add x0, x0, x1
lsl x0, x0, 2
mov x1, x0
ldr x0, [sp, 24]
add x2, x0, x1
adrp x0, color_table
add x3, x0, :lo12:color_table
sxtw x1, w4
mov x0, x1
lsl x0, x0, 1
add x0, x0, x1
lsl x0, x0, 2
add x0, x3, x0
ldr s0, [x0, 8]
str s0, [x2, 8]
.L108:
ldr w0, [sp, 60]
add w0, w0, 1
str w0, [sp, 60]
.L105:
ldr x0, [sp, 40]
ldr w0, [x0]
ldr w1, [sp, 60]
cmp w1, w0
blt .L111
nop
nop
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE17:
.size wx11ic, .-wx11ic
.align 2
.global wx11es
.type wx11es, %function
wx11es:
.LFB18:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 40]
str x1, [sp, 32]
str x2, [sp, 24]
bl x11_vflush
ldr x0, [sp, 32]
ldr w0, [x0]
cmp w0, 0
bge .L113
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x4, [x0]
mov w3, 5
mov w2, 802
adrp x0, .LC1
add x1, x0, :lo12:.LC1
mov x0, x4
bl fprintf
.L113:
ldr x0, [sp, 40]
ldr w0, [x0]
cmp w0, 3503
beq .L114
cmp w0, 3503
bgt .L120
cmp w0, 3502
beq .L116
cmp w0, 3502
bgt .L120
cmp w0, 3500
beq .L117
cmp w0, 3501
beq .L118
b .L120
.L117:
adrp x0, display
add x0, x0, :lo12:display
ldr x0, [x0]
mov w1, 1
bl XSync
b .L119
.L118:
bl x_check_window
adrp x0, window_stat
add x0, x0, :lo12:window_stat
ldr s0, [x0]
scvtf s0, s0
ldr x0, [sp, 24]
str s0, [x0]
adrp x0, window_stat
add x0, x0, :lo12:window_stat
str wzr, [x0]
b .L119
.L116:
adrp x0, buf_pic
add x0, x0, :lo12:buf_pic
mov w1, 1
str w1, [x0]
b .L119
.L114:
adrp x0, all_colors
add x0, x0, :lo12:all_colors
mov w1, 1
str w1, [x0]
b .L119
.L120:
nop
.L119:
nop
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE18:
.size wx11es, .-wx11es
.align 2
.global wx11ie
.type wx11ie, %function
wx11ie:
.LFB19:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str x0, [sp, 8]
str x1, [sp]
ldr x0, [sp, 8]
ldr w0, [x0]
cmp w0, 3503
beq .L122
cmp w0, 3503
bgt .L123
cmp w0, 3502
beq .L124
cmp w0, 3502
bgt .L123
cmp w0, 3500
beq .L125
cmp w0, 3501
beq .L126
b .L123
.L125:
ldr x0, [sp]
mov w1, 1
str w1, [x0]
b .L127
.L126:
ldr x0, [sp]
mov w1, 1
str w1, [x0]
b .L127
.L124:
ldr x0, [sp]
mov w1, 1
str w1, [x0]
b .L127
.L122:
ldr x0, [sp]
mov w1, 1
str w1, [x0]
b .L127
.L123:
ldr x0, [sp]
str wzr, [x0]
nop
.L127:
nop
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE19:
.size wx11ie, .-wx11ie
.align 2
.global wx11id
.type wx11id, %function
wx11id:
.LFB20:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str x0, [sp, 8]
str x1, [sp]
adrp x0, ndc_xmax
add x0, x0, :lo12:ndc_xmax
ldr s0, [x0]
ldr x0, [sp, 8]
str s0, [x0]
adrp x0, ndc_ymax
add x0, x0, :lo12:ndc_ymax
ldr s0, [x0]
ldr x0, [sp]
str s0, [x0]
nop
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE20:
.size wx11id, .-wx11id
.align 2
.global wx11im
.type wx11im, %function
wx11im:
.LFB21:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str x0, [sp, 24]
str x1, [sp, 16]
bl x11_vflush
ldr x0, [sp, 24]
ldr s0, [x0]
adrp x0, xcp
add x0, x0, :lo12:xcp
str s0, [x0]
ldr x0, [sp, 16]
ldr s0, [x0]
adrp x0, ycp
add x0, x0, :lo12:ycp
str s0, [x0]
nop
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE21:
.size wx11im, .-wx11im
.align 2
.global wx11il
.type wx11il, %function
wx11il:
.LFB22:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str x0, [sp, 24]
str x1, [sp, 16]
adrp x0, x11_nvert
add x0, x0, :lo12:x11_nvert
ldr w0, [x0]
cmp w0, 1023
ble .L131
bl x11_vflush
.L131:
adrp x0, x11_nvert
add x0, x0, :lo12:x11_nvert
ldr w0, [x0]
cmp w0, 0
bne .L132
adrp x0, xpad
add x0, x0, :lo12:xpad
ldr s0, [x0]
scvtf s1, s0
adrp x0, scale
add x0, x0, :lo12:scale
ldr s2, [x0]
adrp x0, xcp
add x0, x0, :lo12:xcp
ldr s0, [x0]
fmul s0, s2, s0
fadd s0, s1, s0
fcvtzs w0, s0
sxth w1, w0
adrp x0, vlist
add x0, x0, :lo12:vlist
strh w1, [x0]
adrp x0, x_height
add x0, x0, :lo12:x_height
ldr s0, [x0]
ucvtf s1, s0
adrp x0, ypad
add x0, x0, :lo12:ypad
ldr s0, [x0]
scvtf s2, s0
adrp x0, scale
add x0, x0, :lo12:scale
ldr s3, [x0]
adrp x0, ycp
add x0, x0, :lo12:ycp
ldr s0, [x0]
fmul s0, s3, s0
fadd s0, s2, s0
fsub s0, s1, s0
fcvtzs w0, s0
sxth w1, w0
adrp x0, vlist
add x0, x0, :lo12:vlist
strh w1, [x0, 2]
adrp x0, x11_nvert
add x0, x0, :lo12:x11_nvert
mov w1, 1
str w1, [x0]
.L132:
adrp x0, xpad
add x0, x0, :lo12:xpad
ldr s0, [x0]
scvtf s1, s0
ldr x0, [sp, 24]
ldr s2, [x0]
adrp x0, scale
add x0, x0, :lo12:scale
ldr s0, [x0]
fmul s0, s2, s0
fadd s0, s1, s0
fcvtzs w1, s0
adrp x0, x11_nvert
add x0, x0, :lo12:x11_nvert
ldr w3, [x0]
sxth w2, w1
adrp x0, vlist
add x1, x0, :lo12:vlist
sxtw x0, w3
lsl x0, x0, 2
add x0, x1, x0
mov w1, w2
strh w1, [x0]
adrp x0, x_height
add x0, x0, :lo12:x_height
ldr s0, [x0]
ucvtf s1, s0
adrp x0, ypad
add x0, x0, :lo12:ypad
ldr s0, [x0]
scvtf s2, s0
ldr x0, [sp, 16]
ldr s3, [x0]
adrp x0, scale
add x0, x0, :lo12:scale
ldr s0, [x0]
fmul s0, s3, s0
fadd s0, s2, s0
fsub s0, s1, s0
fcvtzs w1, s0
adrp x0, x11_nvert
add x0, x0, :lo12:x11_nvert
ldr w3, [x0]
sxth w2, w1
adrp x0, vlist
add x1, x0, :lo12:vlist
sxtw x0, w3
lsl x0, x0, 2
add x0, x1, x0
mov w1, w2
strh w1, [x0, 2]
adrp x0, x11_nvert
add x0, x0, :lo12:x11_nvert
ldr w2, [x0]
adrp x0, vlist
add x1, x0, :lo12:vlist
sxtw x0, w2
lsl x0, x0, 2
add x0, x1, x0
ldrsh w1, [x0]
adrp x0, x11_nvert
add x0, x0, :lo12:x11_nvert
ldr w0, [x0]
sub w3, w0, #1
adrp x0, vlist
add x2, x0, :lo12:vlist
sxtw x0, w3
lsl x0, x0, 2
add x0, x2, x0
ldrsh w0, [x0]
cmp w1, w0
bne .L133
adrp x0, x11_nvert
add x0, x0, :lo12:x11_nvert
ldr w2, [x0]
adrp x0, vlist
add x1, x0, :lo12:vlist
sxtw x0, w2
lsl x0, x0, 2
add x0, x1, x0
ldrsh w1, [x0, 2]
adrp x0, x11_nvert
add x0, x0, :lo12:x11_nvert
ldr w0, [x0]
sub w3, w0, #1
adrp x0, vlist
add x2, x0, :lo12:vlist
sxtw x0, w3
lsl x0, x0, 2
add x0, x2, x0
ldrsh w0, [x0, 2]
cmp w1, w0
beq .L134
.L133:
adrp x0, x11_nvert
add x0, x0, :lo12:x11_nvert
ldr w0, [x0]
add w1, w0, 1
adrp x0, x11_nvert
add x0, x0, :lo12:x11_nvert
str w1, [x0]
.L134:
ldr x0, [sp, 24]
ldr s0, [x0]
adrp x0, xcp
add x0, x0, :lo12:xcp
str s0, [x0]
ldr x0, [sp, 16]
ldr s0, [x0]
adrp x0, ycp
add x0, x0, :lo12:ycp
str s0, [x0]
nop
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE22:
.size wx11il, .-wx11il
.align 2
.global wx11ip
.type wx11ip, %function
wx11ip:
.LFB23:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
str x1, [sp, 16]
bl x11_vflush
adrp x0, xpad
add x0, x0, :lo12:xpad
ldr s0, [x0]
scvtf s1, s0
ldr x0, [sp, 24]
ldr s2, [x0]
adrp x0, scale
add x0, x0, :lo12:scale
ldr s0, [x0]
fmul s0, s2, s0
fadd s0, s1, s0
fcvtzs s0, s0
str s0, [sp, 40]
adrp x0, x_height
add x0, x0, :lo12:x_height
ldr s0, [x0]
ucvtf s1, s0
adrp x0, ypad
add x0, x0, :lo12:ypad
ldr s0, [x0]
scvtf s2, s0
ldr x0, [sp, 16]
ldr s3, [x0]
adrp x0, scale
add x0, x0, :lo12:scale
ldr s0, [x0]
fmul s0, s3, s0
fadd s0, s2, s0
fsub s0, s1, s0
fcvtzs s0, s0
str s0, [sp, 44]
adrp x0, display
add x0, x0, :lo12:display
ldr x7, [x0]
adrp x0, draw_id
add x0, x0, :lo12:draw_id
ldr x1, [x0]
adrp x0, gc
add x0, x0, :lo12:gc
ldr x2, [x0]
ldr w0, [sp, 40]
add w0, w0, 1
ldr w6, [sp, 44]
mov w5, w0
ldr w4, [sp, 44]
ldr w3, [sp, 40]
mov x0, x7
bl XDrawLine
ldr x0, [sp, 24]
ldr s0, [x0]
adrp x0, xcp
add x0, x0, :lo12:xcp
str s0, [x0]
ldr x0, [sp, 16]
ldr s0, [x0]
adrp x0, ycp
add x0, x0, :lo12:ycp
str s0, [x0]
nop
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE23:
.size wx11ip, .-wx11ip
.align 2
.global wx11ix
.type wx11ix, %function
wx11ix:
.LFB24:
.cfi_startproc
stp x29, x30, [sp, -208]!
.cfi_def_cfa_offset 208
.cfi_offset 29, -208
.cfi_offset 30, -200
mov x29, sp
str x0, [sp, 24]
str x1, [sp, 16]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 200]
mov x1, 0
ldr x0, [sp, 24]
ldr w0, [x0]
str w0, [sp, 44]
bl x11_vflush
ldr w0, [sp, 44]
cmp w0, 0
bgt .L137
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x4, [x0]
mov w3, 5
mov w2, 212
adrp x0, .LC1
add x1, x0, :lo12:.LC1
mov x0, x4
bl fprintf
.L137:
ldr w0, [sp, 44]
cmp w0, 136
ble .L138
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x4, [x0]
mov w3, 5
mov w2, 213
adrp x0, .LC1
add x1, x0, :lo12:.LC1
mov x0, x4
bl fprintf
mov w0, 136
str w0, [sp, 44]
.L138:
str wzr, [sp, 48]
str wzr, [sp, 52]
b .L139
.L149:
ldrsw x0, [sp, 52]
lsl x0, x0, 2
ldr x1, [sp, 16]
add x0, x1, x0
ldr w0, [x0]
cmp w0, 31
ble .L140
ldrsw x0, [sp, 52]
lsl x0, x0, 2
ldr x1, [sp, 16]
add x0, x1, x0
ldr w0, [x0]
cmp w0, 126
ble .L141
.L140:
ldr w0, [sp, 48]
cmp w0, 0
beq .L142
ldrsw x0, [sp, 48]
add x1, sp, 56
strb wzr, [x1, x0]
adrp x0, display
add x0, x0, :lo12:display
ldr x7, [x0]
adrp x0, draw_id
add x0, x0, :lo12:draw_id
ldr x1, [x0]
adrp x0, gc
add x0, x0, :lo12:gc
ldr x2, [x0]
adrp x0, xpad
add x0, x0, :lo12:xpad
ldr s0, [x0]
scvtf s1, s0
adrp x0, scale
add x0, x0, :lo12:scale
ldr s2, [x0]
adrp x0, xcp
add x0, x0, :lo12:xcp
ldr s0, [x0]
fmul s0, s2, s0
fadd s0, s1, s0
fcvtzs w3, s0
adrp x0, x_height
add x0, x0, :lo12:x_height
ldr s0, [x0]
ucvtf s1, s0
adrp x0, ypad
add x0, x0, :lo12:ypad
ldr s0, [x0]
scvtf s2, s0
adrp x0, scale
add x0, x0, :lo12:scale
ldr s3, [x0]
adrp x0, ycp
add x0, x0, :lo12:ycp
ldr s0, [x0]
fmul s0, s3, s0
fadd s0, s2, s0
fsub s0, s1, s0
fcvtzs w4, s0
add x0, sp, 56
ldr w6, [sp, 48]
mov x5, x0
mov x0, x7
bl XDrawString
adrp x0, font_info
add x0, x0, :lo12:font_info
ldr x0, [x0]
add x1, sp, 56
ldr w2, [sp, 48]
bl XTextWidth
scvtf s1, w0
adrp x0, scale
add x0, x0, :lo12:scale
ldr s0, [x0]
fdiv s1, s1, s0
adrp x0, xcp
add x0, x0, :lo12:xcp
ldr s0, [x0]
fadd s0, s1, s0
adrp x0, xcp
add x0, x0, :lo12:xcp
str s0, [x0]
str wzr, [sp, 48]
.L142:
ldrsw x0, [sp, 52]
lsl x0, x0, 2
ldr x1, [sp, 16]
add x0, x1, x0
ldr w0, [x0]
cmp w0, 13
beq .L143
cmp w0, 13
bgt .L144
cmp w0, 8
beq .L145
cmp w0, 10
beq .L146
b .L144
.L145:
adrp x0, xcp
add x0, x0, :lo12:xcp
ldr s1, [x0]
adrp x0, vector
add x0, x0, :lo12:vector
ldr s0, [x0, 24]
fsub s0, s1, s0
adrp x0, xcp
add x0, x0, :lo12:xcp
str s0, [x0]
b .L147
.L146:
adrp x0, ycp
add x0, x0, :lo12:ycp
ldr s1, [x0]
adrp x0, vector
add x0, x0, :lo12:vector
ldr s0, [x0, 20]
fsub s0, s1, s0
adrp x0, ycp
add x0, x0, :lo12:ycp
str s0, [x0]
b .L147
.L143:
adrp x0, xcp
add x0, x0, :lo12:xcp
str wzr, [x0]
b .L147
.L144:
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x4, [x0]
mov w3, 5
mov w2, 208
adrp x0, .LC1
add x1, x0, :lo12:.LC1
mov x0, x4
bl fprintf
nop
.L147:
b .L148
.L141:
ldrsw x0, [sp, 52]
lsl x0, x0, 2
ldr x1, [sp, 16]
add x0, x1, x0
ldr w2, [x0]
ldr w0, [sp, 48]
add w1, w0, 1
str w1, [sp, 48]
and w2, w2, 255
sxtw x0, w0
add x1, sp, 56
strb w2, [x1, x0]
.L148:
ldr w0, [sp, 52]
add w0, w0, 1
str w0, [sp, 52]
.L139:
ldr w1, [sp, 52]
ldr w0, [sp, 44]
cmp w1, w0
blt .L149
ldr w0, [sp, 48]
cmp w0, 0
beq .L150
ldrsw x0, [sp, 48]
add x1, sp, 56
strb wzr, [x1, x0]
adrp x0, display
add x0, x0, :lo12:display
ldr x7, [x0]
adrp x0, draw_id
add x0, x0, :lo12:draw_id
ldr x1, [x0]
adrp x0, gc
add x0, x0, :lo12:gc
ldr x2, [x0]
adrp x0, xpad
add x0, x0, :lo12:xpad
ldr s0, [x0]
scvtf s1, s0
adrp x0, scale
add x0, x0, :lo12:scale
ldr s2, [x0]
adrp x0, xcp
add x0, x0, :lo12:xcp
ldr s0, [x0]
fmul s0, s2, s0
fadd s0, s1, s0
fcvtzs w3, s0
adrp x0, x_height
add x0, x0, :lo12:x_height
ldr s0, [x0]
ucvtf s1, s0
adrp x0, ypad
add x0, x0, :lo12:ypad
ldr s0, [x0]
scvtf s2, s0
adrp x0, scale
add x0, x0, :lo12:scale
ldr s3, [x0]
adrp x0, ycp
add x0, x0, :lo12:ycp
ldr s0, [x0]
fmul s0, s3, s0
fadd s0, s2, s0
fsub s0, s1, s0
fcvtzs w4, s0
add x0, sp, 56
ldr w6, [sp, 48]
mov x5, x0
mov x0, x7
bl XDrawString
adrp x0, font_info
add x0, x0, :lo12:font_info
ldr x0, [x0]
add x1, sp, 56
ldr w2, [sp, 48]
bl XTextWidth
scvtf s1, w0
adrp x0, scale
add x0, x0, :lo12:scale
ldr s0, [x0]
fdiv s1, s1, s0
adrp x0, xcp
add x0, x0, :lo12:xcp
ldr s0, [x0]
fadd s0, s1, s0
adrp x0, xcp
add x0, x0, :lo12:xcp
str s0, [x0]
.L150:
adrp x0, ycp
add x1, x0, :lo12:ycp
adrp x0, xcp
add x0, x0, :lo12:xcp
bl wx11im
nop
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [sp, 200]
ldr x1, [x0]
subs x2, x2, x1
mov x1, 0
beq .L151
bl __stack_chk_fail
.L151:
ldp x29, x30, [sp], 208
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE24:
.size wx11ix, .-wx11ix
.align 2
.global wx1112
.type wx1112, %function
wx1112:
.LFB25:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str x0, [sp, 40]
str x1, [sp, 32]
str x2, [sp, 24]
ldr x0, [sp, 24]
ldr w0, [x0]
str w0, [sp, 56]
bl x11_vflush
ldr w0, [sp, 56]
cmp w0, 1024
ble .L153
mov w0, 1024
str w0, [sp, 56]
.L153:
str wzr, [sp, 60]
b .L154
.L155:
adrp x0, xpad
add x0, x0, :lo12:xpad
ldr s0, [x0]
scvtf s1, s0
ldrsw x0, [sp, 60]
lsl x0, x0, 2
ldr x1, [sp, 40]
add x0, x1, x0
ldr s2, [x0]
adrp x0, scale
add x0, x0, :lo12:scale
ldr s0, [x0]
fmul s0, s2, s0
fadd s0, s1, s0
fcvtzs w0, s0
sxth w2, w0
adrp x0, vlist
add x1, x0, :lo12:vlist
ldrsw x0, [sp, 60]
lsl x0, x0, 2
add x0, x1, x0
mov w1, w2
strh w1, [x0]
adrp x0, x_height
add x0, x0, :lo12:x_height
ldr s0, [x0]
ucvtf s1, s0
adrp x0, ypad
add x0, x0, :lo12:ypad
ldr s0, [x0]
scvtf s2, s0
ldrsw x0, [sp, 60]
lsl x0, x0, 2
ldr x1, [sp, 32]
add x0, x1, x0
ldr s3, [x0]
adrp x0, scale
add x0, x0, :lo12:scale
ldr s0, [x0]
fmul s0, s3, s0
fadd s0, s2, s0
fsub s0, s1, s0
fcvtzs w0, s0
sxth w2, w0
adrp x0, vlist
add x1, x0, :lo12:vlist
ldrsw x0, [sp, 60]
lsl x0, x0, 2
add x0, x1, x0
mov w1, w2
strh w1, [x0, 2]
ldr w0, [sp, 60]
add w0, w0, 1
str w0, [sp, 60]
.L154:
ldr w1, [sp, 60]
ldr w0, [sp, 56]
cmp w1, w0
blt .L155
adrp x0, display
add x0, x0, :lo12:display
ldr x7, [x0]
adrp x0, draw_id
add x0, x0, :lo12:draw_id
ldr x1, [x0]
adrp x0, gc
add x0, x0, :lo12:gc
ldr x2, [x0]
mov w6, 0
mov w5, 0
ldr w4, [sp, 56]
adrp x0, vlist
add x3, x0, :lo12:vlist
mov x0, x7
bl XFillPolygon
ldr x0, [sp, 40]
ldr s0, [x0]
adrp x0, xcp
add x0, x0, :lo12:xcp
str s0, [x0]
ldr x0, [sp, 32]
ldr s0, [x0]
adrp x0, ycp
add x0, x0, :lo12:ycp
str s0, [x0]
nop
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE25:
.size wx1112, .-wx1112
.align 2
.global wx11cp
.type wx11cp, %function
wx11cp:
.LFB26:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str x0, [sp, 8]
str x1, [sp]
adrp x0, xcp
add x0, x0, :lo12:xcp
ldr s0, [x0]
ldr x0, [sp, 8]
str s0, [x0]
adrp x0, ycp
add x0, x0, :lo12:ycp
ldr s0, [x0]
ldr x0, [sp]
str s0, [x0]
nop
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE26:
.size wx11cp, .-wx11cp
.align 2
.global wx11io
.type wx11io, %function
wx11io:
.LFB27:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str x0, [sp, 8]
str wzr, [sp, 28]
b .L158
.L159:
ldrsw x0, [sp, 28]
lsl x0, x0, 2
ldr x1, [sp, 8]
add x0, x1, x0
adrp x1, vector
add x1, x1, :lo12:vector
ldrsw x2, [sp, 28]
ldr s0, [x1, x2, lsl 2]
str s0, [x0]
ldr w0, [sp, 28]
add w0, w0, 1
str w0, [sp, 28]
.L158:
ldr w0, [sp, 28]
cmp w0, 6
ble .L159
nop
nop
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE27:
.size wx11io, .-wx11io
.align 2
.global wx11fc
.type wx11fc, %function
wx11fc:
.LFB28:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
ldr x0, [sp, 24]
ldr w0, [x0]
str w0, [sp, 44]
bl x11_vflush
ldr w0, [sp, 44]
cmp w0, 0
blt .L161
ldr w0, [sp, 44]
cmp w0, 255
ble .L162
.L161:
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x4, [x0]
mov w3, 5
mov w2, 724
adrp x0, .LC1
add x1, x0, :lo12:.LC1
mov x0, x4
bl fprintf
adrp x0, def_fc_index
add x0, x0, :lo12:def_fc_index
ldr w0, [x0]
str w0, [sp, 44]
.L162:
adrp x0, ncolors
add x0, x0, :lo12:ncolors
ldr w0, [x0]
ldr w1, [sp, 44]
cmp w1, w0
blt .L163
adrp x0, def_fc_index
add x0, x0, :lo12:def_fc_index
ldr w0, [x0]
str w0, [sp, 44]
.L163:
adrp x0, x_colors
add x0, x0, :lo12:x_colors
ldrsw x1, [sp, 44]
ldr w1, [x0, x1, lsl 2]
adrp x0, f_color
add x0, x0, :lo12:f_color
str w1, [x0]
adrp x0, display
add x0, x0, :lo12:display
ldr x3, [x0]
adrp x0, gc
add x0, x0, :lo12:gc
ldr x1, [x0]
adrp x0, f_color
add x0, x0, :lo12:f_color
ldr w0, [x0]
sxtw x0, w0
mov x2, x0
mov x0, x3
bl XSetForeground
ldr s0, [sp, 44]
scvtf s0, s0
adrp x0, vector
add x0, x0, :lo12:vector
str s0, [x0]
nop
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE28:
.size wx11fc, .-wx11fc
.align 2
.global wx11bc
.type wx11bc, %function
wx11bc:
.LFB29:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
ldr x0, [sp, 24]
ldr w0, [x0]
str w0, [sp, 44]
ldr w0, [sp, 44]
cmp w0, 0
blt .L165
ldr w0, [sp, 44]
cmp w0, 255
ble .L166
.L165:
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x4, [x0]
mov w3, 5
mov w2, 724
adrp x0, .LC1
add x1, x0, :lo12:.LC1
mov x0, x4
bl fprintf
adrp x0, def_bc_index
add x0, x0, :lo12:def_bc_index
ldr w0, [x0]
str w0, [sp, 44]
.L166:
adrp x0, ncolors
add x0, x0, :lo12:ncolors
ldr w0, [x0]
ldr w1, [sp, 44]
cmp w1, w0
blt .L167
adrp x0, def_bc_index
add x0, x0, :lo12:def_bc_index
ldr w0, [x0]
str w0, [sp, 44]
.L167:
adrp x0, x_colors
add x0, x0, :lo12:x_colors
ldrsw x1, [sp, 44]
ldr w1, [x0, x1, lsl 2]
adrp x0, b_color
add x0, x0, :lo12:b_color
str w1, [x0]
adrp x0, display
add x0, x0, :lo12:display
ldr x3, [x0]
adrp x0, window_id
add x0, x0, :lo12:window_id
ldr x1, [x0]
adrp x0, b_color
add x0, x0, :lo12:b_color
ldr w0, [x0]
sxtw x0, w0
mov x2, x0
mov x0, x3
bl XSetWindowBackground
ldr s0, [sp, 44]
scvtf s0, s0
adrp x0, vector
add x0, x0, :lo12:vector
str s0, [x0, 4]
nop
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE29:
.size wx11bc, .-wx11bc
.align 2
.global wx11in
.type wx11in, %function
wx11in:
.LFB30:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str x0, [sp, 24]
ldr x0, [sp, 24]
ldr s0, [x0]
fcmpe s0, #0.0
bmi .L169
ldr x0, [sp, 24]
ldr s1, [x0]
fmov s0, 1.0e+0
fcmpe s1, s0
bgt .L169
b .L172
.L169:
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x4, [x0]
mov w3, 2
mov w2, 401
adrp x0, .LC1
add x1, x0, :lo12:.LC1
mov x0, x4
bl fprintf
.L172:
nop
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE30:
.size wx11in, .-wx11in
.align 2
.global wx11ls
.type wx11ls, %function
wx11ls:
.LFB31:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str x0, [sp, 24]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 56]
mov x1, 0
str wzr, [sp, 44]
bl x11_vflush
ldr x0, [sp, 24]
ldr w0, [x0]
cmp w0, 0
blt .L174
ldr x0, [sp, 24]
ldr w0, [x0]
cmp w0, 5
ble .L175
.L174:
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x4, [x0]
mov w3, 3
mov w2, 401
adrp x0, .LC1
add x1, x0, :lo12:.LC1
mov x0, x4
bl fprintf
.L175:
ldr x0, [sp, 24]
ldr w0, [x0]
cmp w0, 5
beq .L176
cmp w0, 5
bgt .L177
cmp w0, 0
beq .L178
cmp w0, 1
beq .L179
b .L177
.L178:
adrp x0, line_type
add x0, x0, :lo12:line_type
str wzr, [x0]
b .L180
.L179:
adrp x0, line_type
add x0, x0, :lo12:line_type
mov w1, 1
str w1, [x0]
mov w0, 3
strb w0, [sp, 48]
mov w0, 1
strb w0, [sp, 49]
mov w0, 2
str w0, [sp, 44]
b .L180
.L176:
adrp x0, line_type
add x0, x0, :lo12:line_type
mov w1, 1
str w1, [x0]
mov w0, 4
strb w0, [sp, 48]
mov w0, 4
strb w0, [sp, 49]
mov w0, 2
str w0, [sp, 44]
b .L180
.L177:
adrp x0, line_type
add x0, x0, :lo12:line_type
mov w1, 1
str w1, [x0]
mov w0, 4
strb w0, [sp, 48]
mov w0, 4
strb w0, [sp, 49]
mov w0, 2
str w0, [sp, 44]
.L180:
adrp x0, display
add x0, x0, :lo12:display
ldr x6, [x0]
adrp x0, gc
add x0, x0, :lo12:gc
ldr x1, [x0]
adrp x0, line_width
add x0, x0, :lo12:line_width
ldr w2, [x0]
adrp x0, line_type
add x0, x0, :lo12:line_type
ldr w0, [x0]
mov w5, 0
mov w4, 1
mov w3, w0
mov x0, x6
bl XSetLineAttributes
adrp x0, line_type
add x0, x0, :lo12:line_type
ldr w0, [x0]
cmp w0, 0
beq .L181
adrp x0, display
add x0, x0, :lo12:display
ldr x5, [x0]
adrp x0, gc
add x0, x0, :lo12:gc
ldr x0, [x0]
add x1, sp, 48
ldr w4, [sp, 44]
mov x3, x1
mov w2, 0
mov x1, x0
mov x0, x5
bl XSetDashes
.L181:
ldr x0, [sp, 24]
ldr s0, [x0]
scvtf s0, s0
adrp x0, vector
add x0, x0, :lo12:vector
str s0, [x0, 12]
nop
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [sp, 56]
ldr x1, [x0]
subs x2, x2, x1
mov x1, 0
beq .L182
bl __stack_chk_fail
.L182:
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE31:
.size wx11ls, .-wx11ls
.align 2
.global wx11lw
.type wx11lw, %function
wx11lw:
.LFB32:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
bl x11_vflush
ldr x0, [sp, 24]
ldr s0, [x0]
fcmpe s0, #0.0
bmi .L184
ldr x0, [sp, 24]
ldr s1, [x0]
fmov s0, 1.0e+0
fcmpe s1, s0
bgt .L184
b .L185
.L184:
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x4, [x0]
mov w3, 1
mov w2, 401
adrp x0, .LC1
add x1, x0, :lo12:.LC1
mov x0, x4
bl fprintf
.L185:
ldr x0, [sp, 24]
ldr s0, [x0]
mov w0, 1120403456
fmov s1, w0
fdiv s0, s0, s1
str s0, [sp, 44]
adrp x0, scale
add x0, x0, :lo12:scale
ldr s1, [x0]
ldr s0, [sp, 44]
fmul s0, s1, s0
fcvtzs s0, s0
fmov w1, s0
adrp x0, line_width
add x0, x0, :lo12:line_width
str w1, [x0]
adrp x0, line_width
add x0, x0, :lo12:line_width
ldr w0, [x0]
cmp w0, 0
bne .L187
adrp x0, line_width
add x0, x0, :lo12:line_width
mov w1, 1
str w1, [x0]
.L187:
adrp x0, display
add x0, x0, :lo12:display
ldr x6, [x0]
adrp x0, gc
add x0, x0, :lo12:gc
ldr x1, [x0]
adrp x0, line_width
add x0, x0, :lo12:line_width
ldr w2, [x0]
adrp x0, line_type
add x0, x0, :lo12:line_type
ldr w0, [x0]
mov w5, 0
mov w4, 1
mov w3, w0
mov x0, x6
bl XSetLineAttributes
ldr x0, [sp, 24]
ldr s0, [x0]
adrp x0, vector
add x0, x0, :lo12:vector
str s0, [x0, 16]
nop
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE32:
.size wx11lw, .-wx11lw
.align 2
.global wx11cs
.type wx11cs, %function
wx11cs:
.LFB33:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str x0, [sp, 8]
nop
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE33:
.size wx11cs, .-wx11cs
.align 2
.global wx11bu
.type wx11bu, %function
wx11bu:
.LFB34:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str x0, [sp, 24]
bl wx11fl
nop
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE34:
.size wx11bu, .-wx11bu
.align 2
.global wx11lo
.type wx11lo, %function
wx11lo:
.LFB35:
.cfi_startproc
stp x29, x30, [sp, -240]!
.cfi_def_cfa_offset 240
.cfi_offset 29, -240
.cfi_offset 30, -232
mov x29, sp
str x0, [sp, 24]
str x1, [sp, 16]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 232]
mov x1, 0
bl wx11fl
adrp x0, display
add x0, x0, :lo12:display
ldr x4, [x0]
adrp x0, window_id
add x0, x0, :lo12:window_id
ldr x0, [x0]
add x1, sp, 40
mov x3, x1
mov x2, 4
mov x1, x0
mov x0, x4
bl XWindowEvent
ldr w1, [sp, 104]
adrp x0, xpad
add x0, x0, :lo12:xpad
ldr w0, [x0]
sub w0, w1, w0
scvtf s1, w0
adrp x0, scale
add x0, x0, :lo12:scale
ldr s0, [x0]
fdiv s0, s1, s0
ldr x0, [sp, 24]
str s0, [x0]
adrp x0, x_height
add x0, x0, :lo12:x_height
ldr w0, [x0]
ldr w1, [sp, 108]
sub w0, w0, w1
adrp x1, ypad
add x1, x1, :lo12:ypad
ldr w1, [x1]
sub w0, w0, w1
ucvtf s1, w0
adrp x0, scale
add x0, x0, :lo12:scale
ldr s0, [x0]
fdiv s0, s1, s0
ldr x0, [sp, 16]
str s0, [x0]
nop
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [sp, 232]
ldr x1, [x0]
subs x2, x2, x1
mov x1, 0
beq .L191
bl __stack_chk_fail
.L191:
ldp x29, x30, [sp], 240
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE35:
.size wx11lo, .-wx11lo
.align 2
.global wx11bl
.type wx11bl, %function
wx11bl:
.LFB36:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 40]
str x1, [sp, 32]
str x2, [sp, 24]
bl wx11fl
nop
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE36:
.size wx11bl, .-wx11bl
.align 2
.global wx11kl
.type wx11kl, %function
wx11kl:
.LFB37:
.cfi_startproc
stp x29, x30, [sp, -256]!
.cfi_def_cfa_offset 256
.cfi_offset 29, -256
.cfi_offset 30, -248
mov x29, sp
str x0, [sp, 40]
str x1, [sp, 32]
str x2, [sp, 24]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 248]
mov x1, 0
bl wx11fl
adrp x0, display
add x0, x0, :lo12:display
ldr x0, [x0]
mov w1, 1
bl XSync
adrp x0, display
add x0, x0, :lo12:display
ldr x4, [x0]
adrp x0, window_id
add x0, x0, :lo12:window_id
ldr x0, [x0]
add x1, sp, 56
mov x3, x1
mov x2, 5
mov x1, x0
mov x0, x4
bl XWindowEvent
ldr w0, [sp, 56]
cmp w0, 2
beq .L194
cmp w0, 4
bne .L197
ldr w1, [sp, 120]
adrp x0, xpad
add x0, x0, :lo12:xpad
ldr w0, [x0]
sub w0, w1, w0
scvtf s1, w0
adrp x0, scale
add x0, x0, :lo12:scale
ldr s0, [x0]
fdiv s0, s1, s0
ldr x0, [sp, 32]
str s0, [x0]
adrp x0, x_height
add x0, x0, :lo12:x_height
ldr w0, [x0]
ldr w1, [sp, 124]
sub w0, w0, w1
adrp x1, ypad
add x1, x1, :lo12:ypad
ldr w1, [x1]
sub w0, w0, w1
ucvtf s1, w0
adrp x0, scale
add x0, x0, :lo12:scale
ldr s0, [x0]
fdiv s0, s1, s0
ldr x0, [sp, 24]
str s0, [x0]
ldr x0, [sp, 40]
mov w1, 32
str w1, [x0]
b .L195
.L194:
ldr w1, [sp, 120]
adrp x0, xpad
add x0, x0, :lo12:xpad
ldr w0, [x0]
sub w0, w1, w0
scvtf s1, w0
adrp x0, scale
add x0, x0, :lo12:scale
ldr s0, [x0]
fdiv s0, s1, s0
ldr x0, [sp, 32]
str s0, [x0]
adrp x0, x_height
add x0, x0, :lo12:x_height
ldr w0, [x0]
ldr w1, [sp, 124]
sub w0, w0, w1
adrp x1, ypad
add x1, x1, :lo12:ypad
ldr w1, [x1]
sub w0, w0, w1
ucvtf s1, w0
adrp x0, scale
add x0, x0, :lo12:scale
ldr s0, [x0]
fdiv s0, s1, s0
ldr x0, [sp, 24]
str s0, [x0]
add x1, sp, 55
add x0, sp, 56
mov x4, 0
mov x3, 0
mov w2, 1
bl XLookupString
ldrb w0, [sp, 55]
mov w1, w0
ldr x0, [sp, 40]
str w1, [x0]
nop
.L195:
.L197:
nop
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [sp, 248]
ldr x1, [x0]
subs x2, x2, x1
mov x1, 0
beq .L196
bl __stack_chk_fail
.L196:
ldp x29, x30, [sp], 256
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE37:
.size wx11kl, .-wx11kl
.align 2
.global wx11la
.type wx11la, %function
wx11la:
.LFB38:
.cfi_startproc
sub sp, sp, #48
.cfi_def_cfa_offset 48
stp x29, x30, [sp, 16]
.cfi_offset 29, -32
.cfi_offset 30, -24
add x29, sp, 16
str x0, [sp, 40]
str x1, [sp, 32]
adrp x0, display
add x0, x0, :lo12:display
ldr x8, [x0]
adrp x0, window_id
add x0, x0, :lo12:window_id
ldr x1, [x0]
adrp x0, xpad
add x0, x0, :lo12:xpad
ldr s0, [x0]
scvtf s1, s0
ldr x0, [sp, 40]
ldr s2, [x0]
adrp x0, scale
add x0, x0, :lo12:scale
ldr s0, [x0]
fmul s0, s2, s0
fadd s0, s1, s0
fcvtzs w2, s0
adrp x0, x_height
add x0, x0, :lo12:x_height
ldr s0, [x0]
ucvtf s1, s0
adrp x0, ypad
add x0, x0, :lo12:ypad
ldr s0, [x0]
scvtf s2, s0
ldr x0, [sp, 32]
ldr s3, [x0]
adrp x0, scale
add x0, x0, :lo12:scale
ldr s0, [x0]
fmul s0, s3, s0
fadd s0, s2, s0
fsub s0, s1, s0
fcvtzs s0, s0
str s0, [sp]
mov w7, w2
mov w6, 0
mov w5, 0
mov w4, 0
mov w3, 0
mov x2, x1
mov x1, 0
mov x0, x8
bl XWarpPointer
nop
ldp x29, x30, [sp, 16]
add sp, sp, 48
.cfi_restore 29
.cfi_restore 30
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE38:
.size wx11la, .-wx11la
.align 2
.global wx11os
.type wx11os, %function
wx11os:
.LFB39:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 40]
mov x1, 0
ldr x0, [sp, 24]
ldr s0, [x0]
fcvtzs s0, s0
str s0, [sp, 36]
add x0, sp, 36
bl wx11fc
ldr x0, [sp, 24]
add x0, x0, 4
ldr s0, [x0]
fcvtzs s0, s0
str s0, [sp, 36]
add x0, sp, 36
bl wx11bc
ldr x0, [sp, 24]
add x0, x0, 8
bl wx11in
ldr x0, [sp, 24]
add x0, x0, 12
ldr s0, [x0]
fcvtzs s0, s0
str s0, [sp, 36]
add x0, sp, 36
bl wx11ls
ldr x0, [sp, 24]
add x0, x0, 16
bl wx11lw
ldr x0, [sp, 24]
add x0, x0, 20
bl wx11cs
nop
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [sp, 40]
ldr x1, [x0]
subs x2, x2, x1
mov x1, 0
beq .L200
bl __stack_chk_fail
.L200:
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE39:
.size wx11os, .-wx11os
.align 2
.global x_check_window
.type x_check_window, %function
x_check_window:
.LFB40:
.cfi_startproc
stp x29, x30, [sp, -224]!
.cfi_def_cfa_offset 224
.cfi_offset 29, -224
.cfi_offset 30, -216
mov x29, sp
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 216]
mov x1, 0
str wzr, [sp, 20]
b .L202
.L203:
mov w0, 1
str w0, [sp, 20]
.L202:
adrp x0, display
add x0, x0, :lo12:display
ldr x4, [x0]
adrp x0, window_id
add x0, x0, :lo12:window_id
ldr x0, [x0]
add x1, sp, 24
mov x3, x1
mov x2, 32768
movk x2, 0x2, lsl 16
mov x1, x0
mov x0, x4
bl XCheckWindowEvent
cmp w0, 0
bne .L203
ldr w0, [sp, 20]
cmp w0, 1
bne .L206
mov w0, 0
bl x_dynamics
adrp x0, window_stat
add x0, x0, :lo12:window_stat
mov w1, 1
str w1, [x0]
.L206:
nop
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [sp, 216]
ldr x1, [x0]
subs x2, x2, x1
mov x1, 0
beq .L205
bl __stack_chk_fail
.L205:
ldp x29, x30, [sp], 224
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE40:
.size x_check_window, .-x_check_window
.align 2
.global x_clear_pixmap
.type x_clear_pixmap, %function
x_clear_pixmap:
.LFB41:
.cfi_startproc
stp x29, x30, [sp, -16]!
.cfi_def_cfa_offset 16
.cfi_offset 29, -16
.cfi_offset 30, -8
mov x29, sp
adrp x0, display
add x0, x0, :lo12:display
ldr x3, [x0]
adrp x0, gc
add x0, x0, :lo12:gc
ldr x1, [x0]
adrp x0, b_color
add x0, x0, :lo12:b_color
ldr w0, [x0]
sxtw x0, w0
mov x2, x0
mov x0, x3
bl XSetForeground
adrp x0, display
add x0, x0, :lo12:display
ldr x7, [x0]
adrp x0, pixmap_id
add x0, x0, :lo12:pixmap_id
ldr x1, [x0]
adrp x0, gc
add x0, x0, :lo12:gc
ldr x2, [x0]
adrp x0, x_width
add x0, x0, :lo12:x_width
ldr w0, [x0]
add w3, w0, 1
adrp x0, x_height
add x0, x0, :lo12:x_height
ldr w0, [x0]
add w0, w0, 1
mov w6, w0
mov w5, w3
mov w4, 0
mov w3, 0
mov x0, x7
bl XFillRectangle
adrp x0, display
add x0, x0, :lo12:display
ldr x3, [x0]
adrp x0, gc
add x0, x0, :lo12:gc
ldr x1, [x0]
adrp x0, f_color
add x0, x0, :lo12:f_color
ldr w0, [x0]
sxtw x0, w0
mov x2, x0
mov x0, x3
bl XSetForeground
nop
ldp x29, x30, [sp], 16
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE41:
.size x_clear_pixmap, .-x_clear_pixmap
.align 2
.global wx11pt
.type wx11pt, %function
wx11pt:
.LFB42:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str x0, [sp, 24]
str x1, [sp, 16]
ldr x1, [sp, 16]
ldr x0, [sp, 24]
bl wx11ip
nop
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE42:
.size wx11pt, .-wx11pt
.align 2
.global wx11pg
.type wx11pg, %function
wx11pg:
.LFB43:
.cfi_startproc
stp x29, x30, [sp, -16]!
.cfi_def_cfa_offset 16
.cfi_offset 29, -16
.cfi_offset 30, -8
mov x29, sp
bl wx11ig
nop
ldp x29, x30, [sp], 16
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE43:
.size wx11pg, .-wx11pg
.align 2
.global wx11mv
.type wx11mv, %function
wx11mv:
.LFB44:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str x0, [sp, 24]
str x1, [sp, 16]
ldr x1, [sp, 16]
ldr x0, [sp, 24]
bl wx11im
nop
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE44:
.size wx11mv, .-wx11mv
.align 2
.global wx11mo
.type wx11mo, %function
wx11mo:
.LFB45:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str x0, [sp, 8]
nop
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE45:
.size wx11mo, .-wx11mo
.align 2
.global wx11le
.type wx11le, %function
wx11le:
.LFB46:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str x0, [sp, 8]
str x1, [sp]
nop
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE46:
.size wx11le, .-wx11le
.align 2
.global wx11er
.type wx11er, %function
wx11er:
.LFB47:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str x0, [sp, 8]
str x1, [sp]
nop
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE47:
.size wx11er, .-wx11er
.align 2
.global wx11ln
.type wx11ln, %function
wx11ln:
.LFB48:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str x0, [sp, 24]
str x1, [sp, 16]
ldr x1, [sp, 16]
ldr x0, [sp, 24]
bl wx11il
nop
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE48:
.size wx11ln, .-wx11ln
.align 2
.global wx11py
.type wx11py, %function
wx11py:
.LFB49:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 40]
str x1, [sp, 32]
str x2, [sp, 24]
ldr x2, [sp, 24]
ldr x1, [sp, 32]
ldr x0, [sp, 40]
bl wx1112
nop
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE49:
.size wx11py, .-wx11py
.align 2
.global wx11tr
.type wx11tr, %function
wx11tr:
.LFB50:
.cfi_startproc
stp x29, x30, [sp, -16]!
.cfi_def_cfa_offset 16
.cfi_offset 29, -16
.cfi_offset 30, -8
mov x29, sp
bl wx11it
nop
ldp x29, x30, [sp], 16
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE50:
.size wx11tr, .-wx11tr
.align 2
.global wx11nt
.type wx11nt, %function
wx11nt:
.LFB51:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str x0, [sp, 24]
str x1, [sp, 16]
ldr x1, [sp, 16]
ldr x0, [sp, 24]
bl wx11ii
nop
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE51:
.size wx11nt, .-wx11nt
.align 2
.global wx11tx
.type wx11tx, %function
wx11tx:
.LFB52:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str x0, [sp, 24]
str x1, [sp, 16]
ldr x1, [sp, 16]
ldr x0, [sp, 24]
bl wx11ix
nop
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE52:
.size wx11tx, .-wx11tx
.align 2
.global wx11fr
.type wx11fr, %function
wx11fr:
.LFB53:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str x0, [sp, 24]
ldr x0, [sp, 24]
bl wx1102
nop
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE53:
.size wx11fr, .-wx11fr
.align 2
.global wx11pk
.type wx11pk, %function
wx11pk:
.LFB54:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str x0, [sp, 8]
nop
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE54:
.size wx11pk, .-wx11pk
.align 2
.global wx11dv
.type wx11dv, %function
wx11dv:
.LFB55:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str x0, [sp, 8]
nop
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE55:
.size wx11dv, .-wx11dv
.align 2
.global wx11qp
.type wx11qp, %function
wx11qp:
.LFB56:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str x0, [sp, 8]
nop
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE56:
.size wx11qp, .-wx11qp
.align 2
.global wx11iv
.type wx11iv, %function
wx11iv:
.LFB57:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str x0, [sp, 8]
nop
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE57:
.size wx11iv, .-wx11iv
.align 2
.global wx11qr
.type wx11qr, %function
wx11qr:
.LFB58:
.cfi_startproc
nop
ret
.cfi_endproc
.LFE58:
.size wx11qr, .-wx11qr
.align 2
.global wx11mp
.type wx11mp, %function
wx11mp:
.LFB59:
.cfi_startproc
nop
ret
.cfi_endproc
.LFE59:
.size wx11mp, .-wx11mp
.align 2
.global wx11rs
.type wx11rs, %function
wx11rs:
.LFB60:
.cfi_startproc
nop
ret
.cfi_endproc
.LFE60:
.size wx11rs, .-wx11rs
.align 2
.global wx11rv
.type wx11rv, %function
wx11rv:
.LFB61:
.cfi_startproc
nop
ret
.cfi_endproc
.LFE61:
.size wx11rv, .-wx11rv
.align 2
.global wx11bg
.type wx11bg, %function
wx11bg:
.LFB62:
.cfi_startproc
nop
ret
.cfi_endproc
.LFE62:
.size wx11bg, .-wx11bg
.align 2
.global wx11fg
.type wx11fg, %function
wx11fg:
.LFB63:
.cfi_startproc
nop
ret
.cfi_endproc
.LFE63:
.size wx11fg, .-wx11fg
.align 2
.global wx11px
.type wx11px, %function
wx11px:
.LFB64:
.cfi_startproc
nop
ret
.cfi_endproc
.LFE64:
.size wx11px, .-wx11px
.align 2
.global wx11pi
.type wx11pi, %function
wx11pi:
.LFB65:
.cfi_startproc
nop
ret
.cfi_endproc
.LFE65:
.size wx11pi, .-wx11pi
.align 2
.global wx11rp
.type wx11rp, %function
wx11rp:
.LFB66:
.cfi_startproc
nop
ret
.cfi_endproc
.LFE66:
.size wx11rp, .-wx11rp
.align 2
.global wx11ri
.type wx11ri, %function
wx11ri:
.LFB67:
.cfi_startproc
nop
ret
.cfi_endproc
.LFE67:
.size wx11ri, .-wx11ri
.align 2
.global wx11rl
.type wx11rl, %function
wx11rl:
.LFB68:
.cfi_startproc
nop
ret
.cfi_endproc
.LFE68:
.size wx11rl, .-wx11rl
.align 2
.global wx11ci
.type wx11ci, %function
wx11ci:
.LFB69:
.cfi_startproc
nop
ret
.cfi_endproc
.LFE69:
.size wx11ci, .-wx11ci
.align 2
.global wx1101
.type wx1101, %function
wx1101:
.LFB70:
.cfi_startproc
nop
ret
.cfi_endproc
.LFE70:
.size wx1101, .-wx1101
.section .rodata
.align 3
.LC13:
.word -858993459
.word 1071959244
.align 3
.LC14:
.word -515396076
.word 1073353850
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC0:
.string "%d\n"
.text
.align 2
.global calculate_the_maximum
.type calculate_the_maximum, %function
calculate_the_maximum:
.LFB6:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str w0, [sp, 28]
str w1, [sp, 24]
str wzr, [sp, 52]
ldr w0, [sp, 52]
str w0, [sp, 48]
ldr w0, [sp, 48]
str w0, [sp, 44]
mov w0, 1
str w0, [sp, 56]
b .L2
.L11:
ldr w0, [sp, 56]
add w0, w0, 1
str w0, [sp, 60]
b .L3
.L10:
ldr w1, [sp, 56]
ldr w0, [sp, 60]
and w0, w1, w0
ldr w1, [sp, 44]
cmp w1, w0
bge .L4
ldr w1, [sp, 56]
ldr w0, [sp, 60]
and w0, w1, w0
ldr w1, [sp, 24]
cmp w1, w0
ble .L4
ldr w1, [sp, 56]
ldr w0, [sp, 60]
and w0, w1, w0
b .L5
.L4:
ldr w0, [sp, 44]
.L5:
str w0, [sp, 44]
ldr w1, [sp, 56]
ldr w0, [sp, 60]
orr w0, w1, w0
ldr w1, [sp, 48]
cmp w1, w0
bge .L6
ldr w1, [sp, 56]
ldr w0, [sp, 60]
orr w0, w1, w0
ldr w1, [sp, 24]
cmp w1, w0
ble .L6
ldr w1, [sp, 56]
ldr w0, [sp, 60]
orr w0, w1, w0
b .L7
.L6:
ldr w0, [sp, 48]
.L7:
str w0, [sp, 48]
ldr w1, [sp, 56]
ldr w0, [sp, 60]
eor w0, w1, w0
ldr w1, [sp, 52]
cmp w1, w0
bge .L8
ldr w1, [sp, 56]
ldr w0, [sp, 60]
eor w0, w1, w0
ldr w1, [sp, 24]
cmp w1, w0
ble .L8
ldr w1, [sp, 56]
ldr w0, [sp, 60]
eor w0, w1, w0
b .L9
.L8:
ldr w0, [sp, 52]
.L9:
str w0, [sp, 52]
ldr w0, [sp, 60]
add w0, w0, 1
str w0, [sp, 60]
.L3:
ldr w1, [sp, 60]
ldr w0, [sp, 28]
cmp w1, w0
ble .L10
ldr w0, [sp, 56]
add w0, w0, 1
str w0, [sp, 56]
.L2:
ldr w1, [sp, 56]
ldr w0, [sp, 28]
cmp w1, w0
blt .L11
ldr w1, [sp, 44]
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl printf
ldr w1, [sp, 48]
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl printf
ldr w1, [sp, 52]
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl printf
nop
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE6:
.size calculate_the_maximum, .-calculate_the_maximum
.section .rodata
.align 3
.LC1:
.string "%d %d"
.text
.align 2
.global main
.type main, %function
main:
.LFB7:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 24]
mov x1, 0
add x1, sp, 20
add x0, sp, 16
mov x2, x1
mov x1, x0
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl __isoc99_scanf
ldr w0, [sp, 16]
ldr w1, [sp, 20]
bl calculate_the_maximum
mov w0, 0
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 24]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L14
bl __stack_chk_fail
.L14:
mov w0, w1
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE7:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.global Pi
.section .rodata
.align 3
.type Pi, %object
.size Pi, 8
Pi:
.word 1413754136
.word 1074340347
.global Pih
.align 3
.type Pih, %object
.size Pih, 8
Pih:
.word 1413754136
.word 1073291771
.global Piq
.align 3
.type Piq, %object
.size Piq, 8
Piq:
.word 1413754136
.word 1072243195
.global Pi3h
.align 3
.type Pi3h, %object
.size Pi3h, 8
Pi3h:
.word 2134057426
.word 1074977148
.global TPi
.align 3
.type TPi, %object
.size TPi, 8
TPi:
.word 1413754136
.word 1075388923
.global FPi
.align 3
.type FPi, %object
.size FPi, 8
FPi:
.word 1413754136
.word 1076437499
.global iTPi
.align 3
.type iTPi, %object
.size iTPi, 8
iTPi:
.word 1841940611
.word 1069834032
.global SPi
.align 3
.type SPi, %object
.size SPi, 8
SPi:
.word -1850413205
.word 1073503224
.global STPi
.align 3
.type STPi, %object
.size STPi, 8
STPi:
.word 536225542
.word 1074007443
.global iSTPi
.align 3
.type iSTPi, %object
.size iSTPi, 8
iSTPi:
.word 869545552
.word 1071220805
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC0:
.string "what 's your name"
.align 3
.LC1:
.string "%s"
.align 3
.LC2:
.string "What a super marvelous name!"
.align 3
.LC3:
.string "Hello,%s. %s\n"
.text
.align 2
.global main
.type main, %function
main:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -80]!
.cfi_def_cfa_offset 80
.cfi_offset 29, -80
.cfi_offset 30, -72
mov x29, sp
str w0, [sp, 28]
str x1, [sp, 16]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 72]
mov x1, 0
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl puts
add x0, sp, 32
mov x1, x0
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl __isoc99_scanf
add x1, sp, 32
adrp x0, .LC2
add x2, x0, :lo12:.LC2
adrp x0, .LC3
add x0, x0, :lo12:.LC3
bl printf
mov w0, 0
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 72]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L3
bl __stack_chk_fail
.L3:
mov w0, w1
ldp x29, x30, [sp], 80
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global reach_error
.type reach_error, %function
reach_error:
.LFB0:
.cfi_startproc
nop
ret
.cfi_endproc
.LFE0:
.size reach_error, .-reach_error
.align 2
.global fibo1
.type fibo1, %function
fibo1:
.LFB1:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x19, [sp, 16]
.cfi_offset 19, -32
str w0, [sp, 44]
ldr w0, [sp, 44]
cmp w0, 0
bgt .L3
mov w0, 0
b .L4
.L3:
ldr w0, [sp, 44]
cmp w0, 1
bne .L5
mov w0, 1
b .L4
.L5:
ldr w0, [sp, 44]
sub w0, w0, #1
bl fibo2
mov w19, w0
ldr w0, [sp, 44]
sub w0, w0, #2
bl fibo2
add w0, w19, w0
.L4:
ldr x19, [sp, 16]
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_restore 19
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE1:
.size fibo1, .-fibo1
.align 2
.global fibo2
.type fibo2, %function
fibo2:
.LFB2:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x19, [sp, 16]
.cfi_offset 19, -32
str w0, [sp, 44]
ldr w0, [sp, 44]
cmp w0, 0
bgt .L7
mov w0, 0
b .L8
.L7:
ldr w0, [sp, 44]
cmp w0, 1
bne .L9
mov w0, 1
b .L8
.L9:
ldr w0, [sp, 44]
sub w0, w0, #1
bl fibo1
mov w19, w0
ldr w0, [sp, 44]
sub w0, w0, #2
bl fibo1
add w0, w19, w0
.L8:
ldr x19, [sp, 16]
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_restore 19
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE2:
.size fibo2, .-fibo2
.align 2
.global main
.type main, %function
main:
.LFB3:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
mov w0, 25
str w0, [sp, 24]
ldr w0, [sp, 24]
bl fibo1
str w0, [sp, 28]
ldr w1, [sp, 28]
mov w0, 9489
movk w0, 0x1, lsl 16
cmp w1, w0
beq .L11
nop
.L12:
bl reach_error
bl abort
.L11:
mov w0, 0
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE3:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC0:
.string "interrupt\n%% "
.text
.align 2
.global sig_int
.type sig_int, %function
sig_int:
.LFB6:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str w0, [sp, 28]
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl printf
nop
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE6:
.size sig_int, .-sig_int
.section .rodata
.align 3
.LC1:
.string "signal error"
.align 3
.LC2:
.string "%% "
.align 3
.LC3:
.string "fork error"
.align 3
.LC4:
.string "couldn't execute: %s\n"
.align 3
.LC5:
.string "waitpid error"
.text
.align 2
.global main
.type main, %function
main:
.LFB7:
.cfi_startproc
mov x12, 4144
sub sp, sp, x12
.cfi_def_cfa_offset 4144
stp x29, x30, [sp]
.cfi_offset 29, -4144
.cfi_offset 30, -4136
mov x29, sp
str w0, [sp, 28]
str x1, [sp, 16]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 4136]
mov x1, 0
adrp x0, sig_int
add x1, x0, :lo12:sig_int
mov w0, 2
bl signal
cmn x0, #1
bne .L3
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl printf
mov w0, -1
b .L10
.L3:
adrp x0, .LC2
add x0, x0, :lo12:.LC2
bl printf
b .L5
.L9:
add x0, sp, 40
bl strlen
sub x0, x0, #1
add x1, sp, 40
strb wzr, [x1, x0]
bl fork
str w0, [sp, 36]
ldr w0, [sp, 36]
cmp w0, 0
bge .L6
adrp x0, .LC3
add x0, x0, :lo12:.LC3
bl printf
b .L7
.L6:
ldr w0, [sp, 36]
cmp w0, 0
bne .L7
add x1, sp, 40
add x0, sp, 40
mov x2, 0
bl execlp
add x0, sp, 40
mov x1, x0
adrp x0, .LC4
add x0, x0, :lo12:.LC4
bl printf
mov w0, -1
b .L10
.L7:
add x0, sp, 32
mov w2, 0
mov x1, x0
ldr w0, [sp, 36]
bl waitpid
str w0, [sp, 36]
ldr w0, [sp, 36]
cmp w0, 0
bge .L8
adrp x0, .LC5
add x0, x0, :lo12:.LC5
bl printf
.L8:
adrp x0, .LC2
add x0, x0, :lo12:.LC2
bl printf
.L5:
adrp x0, :got:stdin
ldr x0, [x0, #:got_lo12:stdin]
ldr x1, [x0]
add x0, sp, 40
mov x2, x1
mov w1, 4096
bl fgets
cmp x0, 0
bne .L9
mov w0, 0
.L10:
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 4136]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L11
bl __stack_chk_fail
.L11:
mov w0, w1
ldp x29, x30, [sp]
mov x12, 4144
add sp, sp, x12
.cfi_restore 29
.cfi_restore 30
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE7:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global test_vshll_ns16
.type test_vshll_ns16, %function
test_vshll_ns16:
.LFB4340:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
ldr d0, [sp]
str d0, [sp, 8]
ldr d0, [sp, 8]
sshll v0.4s, v0.4h, 1
str q0, [sp, 16]
nop
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE4340:
.size test_vshll_ns16, .-test_vshll_ns16
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global test
.type test, %function
test:
.LFB0:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str w0, [sp, 12]
mov x0, -1
str x0, [sp, 24]
ldr w0, [sp, 12]
ldr x1, [sp, 24]
lsl x0, x1, x0
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size test, .-test
.align 2
.global main
.type main, %function
main:
.LFB1:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
mov w0, 32
str w0, [sp, 28]
ldr w0, [sp, 28]
bl test
cmp w0, 0
beq .L4
bl abort
.L4:
mov w0, 0
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE1:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.global v1
.section .rodata
.align 4
.type v1, %object
.size v1, 16
v1:
.word 10
.word 11
.word 12
.word 13
.global v2
.align 4
.type v2, %object
.size v2, 16
v2:
.word 20
.word 21
.word 22
.word 23
.text
.align 2
.global foo
.type foo, %function
foo:
.LFB6:
.cfi_startproc
stp x29, x30, [sp, -288]!
.cfi_def_cfa_offset 288
.cfi_offset 29, -288
.cfi_offset 30, -280
mov x29, sp
str w0, [sp, 28]
str x1, [sp, 232]
str x2, [sp, 240]
str x3, [sp, 248]
str x4, [sp, 256]
str x5, [sp, 264]
str x6, [sp, 272]
str x7, [sp, 280]
str q0, [sp, 96]
str q1, [sp, 112]
str q2, [sp, 128]
str q3, [sp, 144]
str q4, [sp, 160]
str q5, [sp, 176]
str q6, [sp, 192]
str q7, [sp, 208]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 88]
mov x1, 0
add x0, sp, 288
str x0, [sp, 56]
add x0, sp, 288
str x0, [sp, 64]
add x0, sp, 224
str x0, [sp, 72]
mov w0, -56
str w0, [sp, 80]
mov w0, -128
str w0, [sp, 84]
ldr w0, [sp, 84]
ldr x1, [sp, 56]
cmp w0, 0
blt .L2
add x0, x1, 15
and x0, x0, -16
add x1, x0, 23
and x1, x1, -8
str x1, [sp, 56]
b .L3
.L2:
add w2, w0, 16
str w2, [sp, 84]
ldr w2, [sp, 84]
cmp w2, 0
ble .L4
add x0, x1, 15
and x0, x0, -16
add x1, x0, 23
and x1, x1, -8
str x1, [sp, 56]
b .L3
.L4:
ldr x1, [sp, 72]
sxtw x0, w0
add x0, x1, x0
.L3:
ldr q0, [x0]
str q0, [sp, 32]
ldr w0, [sp, 28]
cmp w0, 1
bne .L6
add x3, sp, 32
mov x2, 16
adrp x0, v1
add x1, x0, :lo12:v1
mov x0, x3
bl memcmp
cmp w0, 0
beq .L7
.L6:
bl abort
.L7:
ldr w1, [sp, 80]
ldr x0, [sp, 56]
cmp w1, 0
blt .L8
add x1, x0, 11
and x1, x1, -8
str x1, [sp, 56]
b .L9
.L8:
add w2, w1, 8
str w2, [sp, 80]
ldr w2, [sp, 80]
cmp w2, 0
ble .L10
add x1, x0, 11
and x1, x1, -8
str x1, [sp, 56]
b .L9
.L10:
ldr x2, [sp, 64]
sxtw x0, w1
add x0, x2, x0
.L9:
ldr w0, [x0]
str w0, [sp, 28]
ldr w0, [sp, 28]
cmp w0, 2
beq .L12
bl abort
.L12:
ldr w0, [sp, 84]
ldr x1, [sp, 56]
cmp w0, 0
blt .L13
add x0, x1, 15
and x0, x0, -16
add x1, x0, 23
and x1, x1, -8
str x1, [sp, 56]
b .L14
.L13:
add w2, w0, 16
str w2, [sp, 84]
ldr w2, [sp, 84]
cmp w2, 0
ble .L15
add x0, x1, 15
and x0, x0, -16
add x1, x0, 23
and x1, x1, -8
str x1, [sp, 56]
b .L14
.L15:
ldr x1, [sp, 72]
sxtw x0, w0
add x0, x1, x0
.L14:
ldr q0, [x0]
str q0, [sp, 32]
add x3, sp, 32
mov x2, 16
adrp x0, v2
add x1, x0, :lo12:v2
mov x0, x3
bl memcmp
cmp w0, 0
beq .L19
bl abort
.L19:
nop
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [sp, 88]
ldr x1, [x0]
subs x2, x2, x1
mov x1, 0
beq .L18
bl __stack_chk_fail
.L18:
ldp x29, x30, [sp], 288
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE6:
.size foo, .-foo
.align 2
.global main
.type main, %function
main:
.LFB7:
.cfi_startproc
stp x29, x30, [sp, -16]!
.cfi_def_cfa_offset 16
.cfi_offset 29, -16
.cfi_offset 30, -8
mov x29, sp
adrp x0, .LC0
ldr q1, [x0, #:lo12:.LC0]
mov w1, 2
adrp x0, .LC1
ldr q0, [x0, #:lo12:.LC1]
mov w0, 1
bl foo
mov w0, 0
ldp x29, x30, [sp], 16
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE7:
.size main, .-main
.section .rodata
.align 4
.LC0:
.word 20
.word 21
.word 22
.word 23
.align 4
.LC1:
.word 10
.word 11
.word 12
.word 13
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global find
.type find, %function
find:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -80]!
.cfi_def_cfa_offset 80
.cfi_offset 29, -80
.cfi_offset 30, -72
mov x29, sp
.cfi_def_cfa_register 29
sub sp, sp, #16
adrp x8, :got:__stack_chk_guard
ldr x8, [x8, #:got_lo12:__stack_chk_guard]
ldr x9, [x8]
str x9, [x29, 72]
mov x9, 0
mov x8, sp
mov x9, x8
mov w8, 16960
movk w8, 0xf, lsl 16
str w8, [x29, 36]
ldrsw x8, [x29, 36]
sub x8, x8, #1
str x8, [x29, 56]
ldrsw x8, [x29, 36]
mov x6, x8
mov x7, 0
lsr x8, x6, 59
lsl x3, x7, 5
orr x3, x8, x3
lsl x2, x6, 5
ldrsw x2, [x29, 36]
mov x4, x2
mov x5, 0
lsr x2, x4, 59
lsl x1, x5, 5
orr x1, x2, x1
lsl x0, x4, 5
ldrsw x0, [x29, 36]
lsl x0, x0, 2
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L2:
cmp sp, x1
beq .L3
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L2
.L3:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L4
str xzr, [sp, 1024]
.L4:
add x0, sp, 16
add x0, x0, 3
lsr x0, x0, 2
lsl x0, x0, 2
str x0, [x29, 64]
mov x0, 1
str x0, [x29, 40]
str xzr, [x29, 40]
b .L5
.L6:
ldr x0, [x29, 64]
ldr x1, [x29, 40]
str wzr, [x0, x1, lsl 2]
ldr x0, [x29, 40]
add x0, x0, 1
str x0, [x29, 40]
.L5:
ldrsw x0, [x29, 36]
ldr x1, [x29, 40]
cmp x1, x0
blt .L6
mov x0, 2
str x0, [x29, 40]
b .L7
.L14:
str wzr, [x29, 28]
ldr x0, [x29, 40]
str x0, [x29, 48]
ldr x0, [x29, 40]
cmp x0, 1
bne .L9
str wzr, [x29, 28]
ldr x0, [x29, 40]
sub x1, x0, #1
ldr x0, [x29, 64]
str wzr, [x0, x1, lsl 2]
b .L9
.L13:
ldr x0, [x29, 48]
and x0, x0, 1
cmp x0, 0
bne .L10
ldr x0, [x29, 48]
lsr x1, x0, 63
add x0, x1, x0
asr x0, x0, 1
str x0, [x29, 48]
b .L11
.L10:
ldr x1, [x29, 48]
mov x0, x1
lsl x0, x0, 1
add x0, x0, x1
add x0, x0, 1
str x0, [x29, 48]
.L11:
ldr w0, [x29, 28]
add w0, w0, 1
str w0, [x29, 28]
ldrsw x0, [x29, 36]
ldr x1, [x29, 48]
cmp x1, x0
bgt .L9
ldr x0, [x29, 64]
ldr x1, [x29, 48]
ldr w0, [x0, x1, lsl 2]
cmp w0, 0
beq .L9
ldr x0, [x29, 48]
sub x1, x0, #1
ldr x0, [x29, 64]
ldr w0, [x0, x1, lsl 2]
ldr w1, [x29, 28]
add w0, w1, w0
str w0, [x29, 28]
b .L12
.L9:
ldr x0, [x29, 48]
cmp x0, 1
bne .L13
.L12:
ldr x0, [x29, 40]
sub x1, x0, #1
ldr x0, [x29, 64]
ldr w2, [x29, 28]
str w2, [x0, x1, lsl 2]
ldr x0, [x29, 40]
add x0, x0, 1
str x0, [x29, 40]
.L7:
ldrsw x0, [x29, 36]
ldr x1, [x29, 40]
cmp x1, x0
bne .L14
ldr x0, [x29, 64]
ldr w0, [x0]
str w0, [x29, 32]
str xzr, [x29, 40]
b .L15
.L17:
ldr x0, [x29, 64]
ldr x1, [x29, 40]
ldr w0, [x0, x1, lsl 2]
ldr w1, [x29, 32]
cmp w1, w0
bge .L16
ldr x0, [x29, 64]
ldr x1, [x29, 40]
ldr w0, [x0, x1, lsl 2]
str w0, [x29, 32]
.L16:
ldr x0, [x29, 40]
add x0, x0, 1
str x0, [x29, 40]
.L15:
ldrsw x0, [x29, 36]
ldr x1, [x29, 40]
cmp x1, x0
blt .L17
str xzr, [x29, 40]
b .L18
.L21:
ldr x0, [x29, 64]
ldr x1, [x29, 40]
ldr w0, [x0, x1, lsl 2]
ldr w1, [x29, 32]
cmp w1, w0
bne .L19
ldr x0, [x29, 40]
add w0, w0, 1
mov sp, x9
mov w1, w0
b .L1
.L19:
ldr x0, [x29, 40]
add x0, x0, 1
str x0, [x29, 40]
.L18:
ldrsw x0, [x29, 36]
ldr x1, [x29, 40]
cmp x1, x0
blt .L21
mov sp, x9
.L1:
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [x29, 72]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L22
bl __stack_chk_fail
.L22:
mov w0, w1
mov sp, x29
ldp x29, x30, [sp], 80
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa 31, 0
ret
.cfi_endproc
.LFE0:
.size find, .-find
.section .rodata
.align 3
.LC0:
.string "%d\n"
.text
.align 2
.global main
.type main, %function
main:
.LFB1:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
bl find
str w0, [sp, 28]
ldr w1, [sp, 28]
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl printf
mov w0, 0
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE1:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global foo
.type foo, %function
foo:
.LFB0:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
mov w0, 1
str w0, [sp, 4]
fmov d0, 2.0e+0
str d0, [sp, 8]
nop
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size foo, .-foo
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC0:
.string "%d\n"
.align 3
.LC1:
.string "%c"
.align 3
.LC2:
.string "Good String"
.align 3
.LC3:
.string "Not Good String"
.text
.align 2
.global main
.type main, %function
main:
.LFB6:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 56]
mov x1, 0
mov w0, 1
str w0, [sp, 36]
add x0, sp, 28
mov x1, x0
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl __isoc99_scanf
ldr w0, [sp, 28]
add w0, w0, 1
sxtw x0, w0
bl malloc
str x0, [sp, 40]
ldr w0, [sp, 28]
add w0, w0, 1
sxtw x0, w0
bl malloc
str x0, [sp, 48]
str wzr, [sp, 32]
b .L2
.L3:
ldrsw x0, [sp, 32]
ldr x1, [sp, 40]
add x0, x1, x0
mov x1, x0
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl __isoc99_scanf
ldr w0, [sp, 32]
add w0, w0, 1
str w0, [sp, 32]
.L2:
ldr w0, [sp, 28]
ldr w1, [sp, 32]
cmp w1, w0
blt .L3
ldr w0, [sp, 28]
sxtw x0, w0
ldr x1, [sp, 40]
add x0, x1, x0
strb wzr, [x0]
mov w0, 1
str w0, [sp, 36]
str wzr, [sp, 32]
b .L4
.L5:
ldrsw x0, [sp, 32]
ldr x1, [sp, 40]
add x1, x1, x0
ldr w0, [sp, 28]
sxtw x2, w0
ldrsw x0, [sp, 32]
sub x0, x2, x0
sub x0, x0, #1
ldr x2, [sp, 48]
add x0, x2, x0
ldrb w1, [x1]
strb w1, [x0]
ldr w0, [sp, 32]
add w0, w0, 1
str w0, [sp, 32]
.L4:
ldr w0, [sp, 28]
ldr w1, [sp, 32]
cmp w1, w0
blt .L5
mov w0, 1
str w0, [sp, 32]
b .L6
.L9:
ldrsw x0, [sp, 32]
ldr x1, [sp, 40]
add x0, x1, x0
ldrb w0, [x0]
mov w2, w0
ldrsw x0, [sp, 32]
sub x0, x0, #1
ldr x1, [sp, 40]
add x0, x1, x0
ldrb w0, [x0]
sub w0, w2, w0
cmp w0, 0
csneg w1, w0, w0, ge
ldrsw x0, [sp, 32]
ldr x2, [sp, 48]
add x0, x2, x0
ldrb w0, [x0]
mov w3, w0
ldrsw x0, [sp, 32]
sub x0, x0, #1
ldr x2, [sp, 48]
add x0, x2, x0
ldrb w0, [x0]
sub w0, w3, w0
cmp w0, 0
csneg w0, w0, w0, ge
cmp w1, w0
beq .L7
mov w0, -1
str w0, [sp, 36]
b .L8
.L7:
ldr w0, [sp, 32]
add w0, w0, 1
str w0, [sp, 32]
.L6:
ldr w0, [sp, 28]
ldr w1, [sp, 32]
cmp w1, w0
blt .L9
.L8:
ldr w0, [sp, 36]
cmp w0, 1
bne .L10
adrp x0, .LC2
add x0, x0, :lo12:.LC2
bl printf
b .L11
.L10:
adrp x0, .LC3
add x0, x0, :lo12:.LC3
bl printf
.L11:
mov w0, 0
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 56]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L13
bl __stack_chk_fail
.L13:
mov w0, w1
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE6:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global reverse
.type reverse, %function
reverse:
.LFB6:
.cfi_startproc
sub sp, sp, #48
.cfi_def_cfa_offset 48
str w0, [sp, 12]
ldr w0, [sp, 12]
cmp w0, 0
blt .L2
mov w0, 1
b .L3
.L2:
mov w0, -1
.L3:
str w0, [sp, 28]
ldr w0, [sp, 12]
cmp w0, 0
csneg w0, w0, w0, ge
sxtw x0, w0
str x0, [sp, 32]
str xzr, [sp, 40]
b .L4
.L5:
ldr x1, [sp, 40]
mov x0, x1
lsl x0, x0, 2
add x0, x0, x1
lsl x0, x0, 1
mov x3, x0
ldr x2, [sp, 32]
mov x0, 7378697629483820646
movk x0, 0x6667, lsl 0
smulh x0, x2, x0
asr x1, x0, 2
asr x0, x2, 63
sub x1, x1, x0
mov x0, x1
lsl x0, x0, 2
add x0, x0, x1
lsl x0, x0, 1
sub x1, x2, x0
add x0, x3, x1
str x0, [sp, 40]
ldr x0, [sp, 32]
mov x1, 7378697629483820646
movk x1, 0x6667, lsl 0
smulh x1, x0, x1
asr x1, x1, 2
asr x0, x0, 63
sub x0, x1, x0
str x0, [sp, 32]
.L4:
ldr x0, [sp, 32]
cmp x0, 0
bgt .L5
ldr x1, [sp, 40]
mov x0, -2147483648
cmp x1, x0
blt .L6
ldr x1, [sp, 40]
mov x0, 2147483647
cmp x1, x0
ble .L7
.L6:
mov w0, 0
b .L8
.L7:
ldr x0, [sp, 40]
mov w1, w0
ldr w0, [sp, 28]
mul w0, w1, w0
.L8:
add sp, sp, 48
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE6:
.size reverse, .-reverse
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC0:
.string "Preencha uma lista com 5 nomes \n"
.align 3
.LC1:
.string "\n NOME %d : "
.align 3
.LC2:
.string "\n"
.align 3
.LC3:
.string " [%d] = %s"
.align 3
.LC4:
.string "\n\n QUE NOME VOCE PROCURA ? "
.align 3
.LC5:
.string "\n O elemento %s esta na posicao : %d \n"
.text
.align 2
.global main
.type main, %function
main:
.LFB6:
.cfi_startproc
stp x29, x30, [sp, -224]!
.cfi_def_cfa_offset 224
.cfi_offset 29, -224
.cfi_offset 30, -216
mov x29, sp
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 216]
mov x1, 0
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl puts
str wzr, [sp, 28]
b .L2
.L3:
ldr w0, [sp, 28]
add w0, w0, 1
mov w1, w0
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl printf
add x2, sp, 32
ldrsw x1, [sp, 28]
mov x0, x1
lsl x0, x0, 4
sub x0, x0, x1
lsl x0, x0, 1
add x3, x2, x0
adrp x0, :got:stdin
ldr x0, [x0, #:got_lo12:stdin]
ldr x0, [x0]
mov x2, x0
mov w1, 30
mov x0, x3
bl fgets
ldr w0, [sp, 28]
add w0, w0, 1
str w0, [sp, 28]
.L2:
ldr w0, [sp, 28]
cmp w0, 4
ble .L3
adrp x0, .LC2
add x0, x0, :lo12:.LC2
bl puts
str wzr, [sp, 28]
b .L4
.L5:
ldr w0, [sp, 28]
add w3, w0, 1
add x2, sp, 32
ldrsw x1, [sp, 28]
mov x0, x1
lsl x0, x0, 4
sub x0, x0, x1
lsl x0, x0, 1
add x0, x2, x0
mov x2, x0
mov w1, w3
adrp x0, .LC3
add x0, x0, :lo12:.LC3
bl printf
ldr w0, [sp, 28]
add w0, w0, 1
str w0, [sp, 28]
.L4:
ldr w0, [sp, 28]
cmp w0, 4
ble .L5
adrp x0, .LC4
add x0, x0, :lo12:.LC4
bl printf
adrp x0, :got:stdin
ldr x0, [x0, #:got_lo12:stdin]
ldr x1, [x0]
add x0, sp, 184
mov x2, x1
mov w1, 30
bl fgets
str wzr, [sp, 28]
b .L6
.L8:
add x2, sp, 32
ldrsw x1, [sp, 28]
mov x0, x1
lsl x0, x0, 4
sub x0, x0, x1
lsl x0, x0, 1
add x1, x2, x0
add x0, sp, 184
bl strcmp
cmp w0, 0
bne .L7
ldr w0, [sp, 28]
add w1, w0, 1
add x0, sp, 184
mov w2, w1
mov x1, x0
adrp x0, .LC5
add x0, x0, :lo12:.LC5
bl printf
.L7:
ldr w0, [sp, 28]
add w0, w0, 1
str w0, [sp, 28]
.L6:
ldr w0, [sp, 28]
cmp w0, 4
ble .L8
mov w0, 0
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 216]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L10
bl __stack_chk_fail
.L10:
mov w0, w1
ldp x29, x30, [sp], 224
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE6:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC0:
.string "%d"
.text
.align 2
.global inputSize
.type inputSize, %function
inputSize:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 40]
mov x1, 0
add x0, sp, 36
mov x2, x0
adrp x0, .LC0
add x1, x0, :lo12:.LC0
ldr x0, [sp, 24]
bl __isoc99_fscanf
ldr w0, [sp, 36]
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 40]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L3
bl __stack_chk_fail
.L3:
mov w0, w1
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size inputSize, .-inputSize
.align 2
.global fileInput
.type fileInput, %function
fileInput:
.LFB1:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str x0, [sp, 40]
str w1, [sp, 36]
str x2, [sp, 24]
str wzr, [sp, 60]
b .L5
.L6:
ldrsw x0, [sp, 60]
lsl x0, x0, 2
ldr x1, [sp, 24]
add x0, x1, x0
mov x2, x0
adrp x0, .LC0
add x1, x0, :lo12:.LC0
ldr x0, [sp, 40]
bl __isoc99_fscanf
ldr w0, [sp, 60]
add w0, w0, 1
str w0, [sp, 60]
.L5:
ldr w1, [sp, 60]
ldr w0, [sp, 36]
cmp w1, w0
blt .L6
nop
nop
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE1:
.size fileInput, .-fileInput
.align 2
.global swapInts
.type swapInts, %function
swapInts:
.LFB2:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str x0, [sp, 8]
str x1, [sp]
ldr x0, [sp, 8]
ldr w0, [x0]
str w0, [sp, 28]
ldr x0, [sp]
ldr w1, [x0]
ldr x0, [sp, 8]
str w1, [x0]
ldr x0, [sp]
ldr w1, [sp, 28]
str w1, [x0]
nop
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE2:
.size swapInts, .-swapInts
.align 2
.global selectionSort
.type selectionSort, %function
selectionSort:
.LFB3:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
str w1, [sp, 20]
str wzr, [sp, 36]
b .L9
.L13:
ldr w0, [sp, 36]
str w0, [sp, 40]
ldr w0, [sp, 36]
add w0, w0, 1
str w0, [sp, 44]
b .L10
.L12:
ldrsw x0, [sp, 44]
lsl x0, x0, 2
ldr x1, [sp, 24]
add x0, x1, x0
ldr w1, [x0]
ldrsw x0, [sp, 40]
lsl x0, x0, 2
ldr x2, [sp, 24]
add x0, x2, x0
ldr w0, [x0]
cmp w1, w0
bge .L11
ldr w0, [sp, 44]
str w0, [sp, 40]
.L11:
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L10:
ldr w1, [sp, 44]
ldr w0, [sp, 20]
cmp w1, w0
blt .L12
ldrsw x0, [sp, 40]
lsl x0, x0, 2
ldr x1, [sp, 24]
add x2, x1, x0
ldrsw x0, [sp, 36]
lsl x0, x0, 2
ldr x1, [sp, 24]
add x0, x1, x0
mov x1, x0
mov x0, x2
bl swapInts
ldr w0, [sp, 36]
add w0, w0, 1
str w0, [sp, 36]
.L9:
ldr w1, [sp, 36]
ldr w0, [sp, 20]
cmp w1, w0
blt .L13
nop
nop
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE3:
.size selectionSort, .-selectionSort
.section .rodata
.align 3
.LC1:
.string "r"
.align 3
.LC2:
.string "input.txt"
.align 3
.LC3:
.string "Input File Successfully Opened !"
.align 3
.LC4:
.string "Input File Opening Failed."
.align 3
.LC5:
.string "Total elapsed time : %f\n"
.text
.align 2
.global main
.type main, %function
main:
.LFB4:
.cfi_startproc
stp x29, x30, [sp, -160]!
.cfi_def_cfa_offset 160
.cfi_offset 29, -160
.cfi_offset 30, -152
mov x29, sp
.cfi_def_cfa_register 29
stp x19, x20, [sp, 16]
stp x21, x22, [sp, 32]
stp x23, x24, [sp, 48]
stp x25, x26, [sp, 64]
str x27, [sp, 80]
sub sp, sp, #16
.cfi_offset 19, -144
.cfi_offset 20, -136
.cfi_offset 21, -128
.cfi_offset 22, -120
.cfi_offset 23, -112
.cfi_offset 24, -104
.cfi_offset 25, -96
.cfi_offset 26, -88
.cfi_offset 27, -80
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [x29, 152]
mov x1, 0
mov x0, sp
mov x19, x0
adrp x0, .LC1
add x1, x0, :lo12:.LC1
adrp x0, .LC2
add x0, x0, :lo12:.LC2
bl fopen
str x0, [x29, 112]
ldr x0, [x29, 112]
cmp x0, 0
beq .L15
adrp x0, .LC3
add x0, x0, :lo12:.LC3
bl puts
ldr x0, [x29, 112]
bl inputSize
str w0, [x29, 108]
ldr w0, [x29, 108]
sxtw x1, w0
sub x1, x1, #1
str x1, [x29, 120]
sxtw x1, w0
mov x26, x1
mov x27, 0
lsr x1, x26, 59
lsl x23, x27, 5
orr x23, x1, x23
lsl x22, x26, 5
sxtw x1, w0
mov x24, x1
mov x25, 0
lsr x1, x24, 59
lsl x21, x25, 5
orr x21, x1, x21
lsl x20, x24, 5
sxtw x0, w0
lsl x0, x0, 2
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
b .L18
.L15:
adrp x0, .LC4
add x0, x0, :lo12:.LC4
bl puts
mov w0, -1
b .L17
.L18:
cmp sp, x1
beq .L19
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L18
.L19:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L20
str xzr, [sp, 1024]
.L20:
add x0, sp, 16
add x0, x0, 3
lsr x0, x0, 2
lsl x0, x0, 2
str x0, [x29, 128]
ldr x2, [x29, 128]
ldr w1, [x29, 108]
ldr x0, [x29, 112]
bl fileInput
bl clock
str x0, [x29, 136]
ldr w1, [x29, 108]
ldr x0, [x29, 128]
bl selectionSort
bl clock
str x0, [x29, 144]
ldr x1, [x29, 144]
ldr x0, [x29, 136]
sub x0, x1, x0
fmov d0, x0
scvtf d0, d0
mov x0, 145685290680320
movk x0, 0x412e, lsl 48
fmov d1, x0
fdiv d0, d0, d1
adrp x0, .LC5
add x0, x0, :lo12:.LC5
bl printf
ldr x0, [x29, 112]
bl fclose
mov w0, 0
.L17:
mov sp, x19
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [x29, 152]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L22
bl __stack_chk_fail
.L22:
mov w0, w1
mov sp, x29
ldp x19, x20, [sp, 16]
ldp x21, x22, [sp, 32]
ldp x23, x24, [sp, 48]
ldp x25, x26, [sp, 64]
ldr x27, [sp, 80]
ldp x29, x30, [sp], 160
.cfi_restore 30
.cfi_restore 29
.cfi_restore 27
.cfi_restore 25
.cfi_restore 26
.cfi_restore 23
.cfi_restore 24
.cfi_restore 21
.cfi_restore 22
.cfi_restore 19
.cfi_restore 20
.cfi_def_cfa 31, 0
ret
.cfi_endproc
.LFE4:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global int_to_float
.type int_to_float, %function
int_to_float:
.LFB0:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str x0, [sp, 8]
str x1, [sp]
ldr x0, [sp]
ldr s0, [x0]
scvtf s0, s0
ldr x0, [sp, 8]
str s0, [x0]
nop
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size int_to_float, .-int_to_float
.align 2
.global int_to_double
.type int_to_double, %function
int_to_double:
.LFB1:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str x0, [sp, 8]
str x1, [sp]
ldr x0, [sp]
ldr w0, [x0]
scvtf d0, w0
ldr x0, [sp, 8]
str d0, [x0]
nop
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE1:
.size int_to_double, .-int_to_double
.align 2
.global uint_to_float
.type uint_to_float, %function
uint_to_float:
.LFB2:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str x0, [sp, 8]
str x1, [sp]
ldr x0, [sp]
ldr s0, [x0]
ucvtf s0, s0
ldr x0, [sp, 8]
str s0, [x0]
nop
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE2:
.size uint_to_float, .-uint_to_float
.align 2
.global uint_to_double
.type uint_to_double, %function
uint_to_double:
.LFB3:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str x0, [sp, 8]
str x1, [sp]
ldr x0, [sp]
ldr w0, [x0]
ucvtf d0, w0
ldr x0, [sp, 8]
str d0, [x0]
nop
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE3:
.size uint_to_double, .-uint_to_double
.align 2
.global llong_to_float
.type llong_to_float, %function
llong_to_float:
.LFB4:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str x0, [sp, 8]
str x1, [sp]
ldr x0, [sp]
ldr x0, [x0]
scvtf s0, x0
ldr x0, [sp, 8]
str s0, [x0]
nop
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE4:
.size llong_to_float, .-llong_to_float
.align 2
.global llong_to_double
.type llong_to_double, %function
llong_to_double:
.LFB5:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str x0, [sp, 8]
str x1, [sp]
ldr x0, [sp]
ldr d0, [x0]
scvtf d0, d0
ldr x0, [sp, 8]
str d0, [x0]
nop
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE5:
.size llong_to_double, .-llong_to_double
.align 2
.global ullong_to_float
.type ullong_to_float, %function
ullong_to_float:
.LFB6:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str x0, [sp, 8]
str x1, [sp]
ldr x0, [sp]
ldr x0, [x0]
ucvtf s0, x0
ldr x0, [sp, 8]
str s0, [x0]
nop
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE6:
.size ullong_to_float, .-ullong_to_float
.align 2
.global ullong_to_double
.type ullong_to_double, %function
ullong_to_double:
.LFB7:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str x0, [sp, 8]
str x1, [sp]
ldr x0, [sp]
ldr d0, [x0]
ucvtf d0, d0
ldr x0, [sp, 8]
str d0, [x0]
nop
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE7:
.size ullong_to_double, .-ullong_to_double
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global movsi
.type movsi, %function
movsi:
.LFB0:
.cfi_startproc
mov w0, 28784
ret
.cfi_endproc
.LFE0:
.size movsi, .-movsi
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.local _na_start
.comm _na_start,8,8
.local _na_cur
.comm _na_cur,8,8
.section .rodata
.align 3
.LC0:
.string "linuxmemchk: failed assertion: %s\n"
.text
.align 2
.type _na_assert, %function
_na_assert:
.LFB6:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str w0, [sp, 28]
str x1, [sp, 16]
ldr w0, [sp, 28]
cmp w0, 0
bne .L3
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x3, [x0]
ldr x2, [sp, 16]
adrp x0, .LC0
add x1, x0, :lo12:.LC0
mov x0, x3
bl fprintf
bl abort
.L3:
nop
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE6:
.size _na_assert, .-_na_assert
.section .rodata
.align 3
.LC1:
.string "corrupted na_start"
.align 3
.LC2:
.string "mprotect[1] failed"
.align 3
.LC3:
.string "corrupted s->npages"
.text
.align 2
.type _na_find, %function
_na_find:
.LFB7:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str x0, [sp, 24]
adrp x0, _na_start
add x0, x0, :lo12:_na_start
ldr x0, [x0]
add x0, x0, 4096
ldr x1, [sp, 24]
cmp x1, x0
bcc .L5
adrp x0, _na_start
add x0, x0, :lo12:_na_start
ldr x1, [x0]
mov x0, 134213632
add x0, x1, x0
ldr x1, [sp, 24]
cmp x1, x0
bcs .L5
mov w0, 1
b .L6
.L5:
mov w0, 0
.L6:
adrp x1, .LC1
add x1, x1, :lo12:.LC1
bl _na_assert
ldr x0, [sp, 24]
str x0, [sp, 48]
ldr x0, [sp, 48]
and x0, x0, -4096
str x0, [sp, 48]
ldr x0, [sp, 48]
sub x0, x0, #4096
str x0, [sp, 48]
ldr x0, [sp, 48]
mov w2, 3
mov x1, 4096
bl mprotect
str w0, [sp, 44]
ldr w0, [sp, 44]
cmp w0, 0
cset w0, eq
and w0, w0, 255
mov w2, w0
adrp x0, .LC2
add x1, x0, :lo12:.LC2
mov w0, w2
bl _na_assert
ldr x0, [sp, 48]
str x0, [sp, 56]
ldr x0, [sp, 56]
ldr w0, [x0, 8]
cmp w0, 0
cset w0, gt
and w0, w0, 255
mov w2, w0
adrp x0, .LC3
add x1, x0, :lo12:.LC3
mov w0, w2
bl _na_assert
ldr x0, [sp, 56]
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE7:
.size _na_find, .-_na_find
.section .rodata
.align 3
.LC4:
.string "initial mmap failed"
.align 3
.LC5:
.string "linuxmemchk.c: Nothing wrong so far, but we are running out\nlinuxmemchk.c: of mmap'ed memory. Increase MALLOC_BIGBUFFER.\n"
.align 3
.LC6:
.string "mprotect[2] failed"
.align 3
.LC7:
.string "mprotect[3] failed"
.text
.align 2
.global PyObject_Malloc
.type PyObject_Malloc, %function
PyObject_Malloc:
.LFB8:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str x0, [sp, 24]
ldr x0, [sp, 24]
add x0, x0, 4095
lsr x0, x0, 12
add w0, w0, 1
str w0, [sp, 40]
adrp x0, _na_start
add x0, x0, :lo12:_na_start
ldr x0, [x0]
cmp x0, 0
bne .L9
mov x5, 0
mov w4, -1
mov w3, 34
mov w2, 0
mov x1, 134217728
mov x0, 0
bl mmap
mov x1, x0
adrp x0, _na_start
add x0, x0, :lo12:_na_start
str x1, [x0]
adrp x0, _na_start
add x0, x0, :lo12:_na_start
ldr x0, [x0]
cmn x0, #1
cset w0, ne
and w0, w0, 255
mov w2, w0
adrp x0, .LC4
add x1, x0, :lo12:.LC4
mov w0, w2
bl _na_assert
adrp x0, _na_start
add x0, x0, :lo12:_na_start
ldr x1, [x0]
adrp x0, _na_cur
add x0, x0, :lo12:_na_cur
str x1, [x0]
.L9:
adrp x0, _na_cur
add x0, x0, :lo12:_na_cur
ldr x0, [x0]
str x0, [sp, 48]
adrp x0, _na_cur
add x0, x0, :lo12:_na_cur
ldr x1, [x0]
ldr w0, [sp, 40]
lsl w0, w0, 12
sxtw x0, w0
add x1, x1, x0
adrp x0, _na_cur
add x0, x0, :lo12:_na_cur
str x1, [x0]
adrp x0, _na_start
add x0, x0, :lo12:_na_start
ldr x1, [x0]
mov x0, 134217728
add x1, x1, x0
adrp x0, _na_cur
add x0, x0, :lo12:_na_cur
ldr x0, [x0]
cmp x1, x0
bhi .L10
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x0, [x0]
mov x3, x0
mov x2, 122
mov x1, 1
adrp x0, .LC5
add x0, x0, :lo12:.LC5
bl fwrite
bl abort
.L10:
ldr w0, [sp, 40]
lsl w0, w0, 12
sxtw x0, w0
mov w2, 7
mov x1, x0
ldr x0, [sp, 48]
bl mprotect
str w0, [sp, 44]
ldr w0, [sp, 44]
cmp w0, 0
cset w0, eq
and w0, w0, 255
mov w2, w0
adrp x0, .LC6
add x1, x0, :lo12:.LC6
mov w0, w2
bl _na_assert
adrp x0, _na_cur
add x0, x0, :lo12:_na_cur
ldr x1, [x0]
ldr x0, [sp, 24]
neg x0, x0
add x0, x1, x0
str x0, [sp, 56]
ldr x0, [sp, 48]
ldr x1, [sp, 56]
str x1, [x0]
ldr x0, [sp, 48]
ldr w1, [sp, 40]
str w1, [x0, 8]
mov w2, 0
mov x1, 4096
ldr x0, [sp, 48]
bl mprotect
str w0, [sp, 44]
ldr w0, [sp, 44]
cmp w0, 0
cset w0, eq
and w0, w0, 255
mov w2, w0
adrp x0, .LC7
add x1, x0, :lo12:.LC7
mov w0, w2
bl _na_assert
ldr x0, [sp, 56]
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE8:
.size PyObject_Malloc, .-PyObject_Malloc
.section .rodata
.align 3
.LC8:
.string "free got a pointer not returned by malloc"
.align 3
.LC9:
.string "mprotect[4] failed"
.text
.align 2
.global PyObject_Free
.type PyObject_Free, %function
PyObject_Free:
.LFB9:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
ldr x0, [sp, 24]
cmp x0, 0
beq .L15
ldr x0, [sp, 24]
bl _na_find
str x0, [sp, 40]
ldr x0, [sp, 40]
ldr x0, [x0]
ldr x1, [sp, 24]
cmp x1, x0
cset w0, eq
and w0, w0, 255
mov w2, w0
adrp x0, .LC8
add x1, x0, :lo12:.LC8
mov w0, w2
bl _na_assert
ldr x0, [sp, 40]
ldr w0, [x0, 8]
str w0, [sp, 32]
ldr x0, [sp, 40]
str wzr, [x0, 8]
ldr w0, [sp, 32]
lsl w0, w0, 12
sxtw x0, w0
mov w2, 0
mov x1, x0
ldr x0, [sp, 40]
bl mprotect
str w0, [sp, 36]
ldr w0, [sp, 36]
cmp w0, 0
cset w0, eq
and w0, w0, 255
mov w2, w0
adrp x0, .LC9
add x1, x0, :lo12:.LC9
mov w0, w2
bl _na_assert
b .L12
.L15:
nop
.L12:
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE9:
.size PyObject_Free, .-PyObject_Free
.section .rodata
.align 3
.LC10:
.string "realloc got a pointer not returned by malloc"
.text
.align 2
.global PyObject_Realloc
.type PyObject_Realloc, %function
PyObject_Realloc:
.LFB10:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str x0, [sp, 24]
str x1, [sp, 16]
ldr x0, [sp, 24]
bl _na_find
str x0, [sp, 40]
ldr x0, [sp, 16]
bl PyObject_Malloc
str x0, [sp, 48]
ldr x0, [sp, 40]
ldr x0, [x0]
ldr x1, [sp, 24]
cmp x1, x0
cset w0, eq
and w0, w0, 255
mov w2, w0
adrp x0, .LC10
add x1, x0, :lo12:.LC10
mov w0, w2
bl _na_assert
ldr x0, [sp, 40]
ldr w0, [x0, 8]
lsl w0, w0, 12
sxtw x0, w0
ldr x1, [sp, 40]
add x1, x1, x0
ldr x0, [sp, 24]
sub x0, x1, x0
str x0, [sp, 56]
ldr x0, [sp, 56]
ldr x2, [sp, 16]
ldr x1, [sp, 16]
cmp x2, x0
csel x0, x1, x0, ls
mov x2, x0
ldr x1, [sp, 24]
ldr x0, [sp, 48]
bl memcpy
ldr x0, [sp, 24]
bl PyObject_Free
ldr x0, [sp, 48]
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE10:
.size PyObject_Realloc, .-PyObject_Realloc
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.global x
.data
.align 2
.type x, %object
.size x, 4
x:
.word 1
.global y
.align 2
.type y, %object
.size y, 4
y:
.word 4
.text
.align 2
.global test
.type test, %function
test:
.LFB0:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str x0, [sp, 8]
mov w0, 1
strh w0, [sp, 30]
ldrsh x0, [sp, 30]
lsl x0, x0, 2
ldr x1, [sp, 8]
add x0, x1, x0
str x0, [sp, 8]
nop
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size test, .-test
.global test2b
.bss
.type test2b, %object
.size test2b, 1
test2b:
.zero 1
.text
.align 2
.global test2
.type test2, %function
test2:
.LFB1:
.cfi_startproc
mov w0, 0
ret
.cfi_endproc
.LFE1:
.size test2, .-test2
.align 2
.global test3
.type test3, %function
test3:
.LFB2:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
ldr x0, [sp, 8]
sub x0, x0, #1
str x0, [sp, 8]
nop
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE2:
.size test3, .-test3
.global t1
.data
.align 2
.type t1, %object
.size t1, 4
t1:
.word 1
.global t2
.align 2
.type t2, %object
.size t2, 4
t2:
.word 1
.text
.align 2
.global test4
.type test4, %function
test4:
.LFB3:
.cfi_startproc
adrp x0, t1
add x0, x0, :lo12:t1
mov w1, 1
str w1, [x0]
adrp x0, t2
add x0, x0, :lo12:t2
mov w1, 1
str w1, [x0]
adrp x0, t1
add x0, x0, :lo12:t1
mov w1, 1
str w1, [x0]
adrp x0, t2
add x0, x0, :lo12:t2
mov w1, 1
str w1, [x0]
nop
ret
.cfi_endproc
.LFE3:
.size test4, .-test4
.align 2
.global test5
.type test5, %function
test5:
.LFB4:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str s0, [sp, 12]
str s1, [sp, 8]
ldr s1, [sp, 12]
ldr s0, [sp, 8]
fcmp s1, s0
cset w0, pl
and w0, w0, 255
eor w0, w0, 1
and w0, w0, 255
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE4:
.size test5, .-test5
.align 2
.global ola
.type ola, %function
ola:
.LFB5:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
mov w0, 2
str w0, [sp, 12]
ldr w0, [sp, 12]
and w0, w0, 2
cmp w0, 0
beq .L9
mov w0, 1
b .L10
.L9:
mov w0, 2
.L10:
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE5:
.size ola, .-ola
.align 2
.global eMaisUma
.type eMaisUma, %function
eMaisUma:
.LFB6:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 24]
mov x1, 0
ldr d0, [sp, 16]
fcmp d0, #0.0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [sp, 24]
ldr x1, [x0]
subs x2, x2, x1
mov x1, 0
beq .L14
bl __stack_chk_fail
.L14:
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE6:
.size eMaisUma, .-eMaisUma
.align 2
.global f0
.type f0, %function
f0:
.LFB7:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str x0, [sp, 8]
str x1, [sp]
ldr x1, [sp, 8]
ldr x0, [sp]
sub x0, x1, x0
str w0, [sp, 28]
nop
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE7:
.size f0, .-f0
.align 2
.global bar
.type bar, %function
bar:
.LFB8:
.cfi_startproc
stp x29, x30, [sp, -16]!
.cfi_def_cfa_offset 16
.cfi_offset 29, -16
.cfi_offset 30, -8
mov x29, sp
bl foo
add w0, w0, 1
ldp x29, x30, [sp], 16
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE8:
.size bar, .-bar
.align 2
.global f1
.type f1, %function
f1:
.LFB9:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
adrp x0, :got:f2
ldr x0, [x0, #:got_lo12:f2]
str x0, [sp, 8]
ldr x0, [sp, 8]
add x0, x0, 1
str x0, [sp, 8]
ldr x0, [sp, 8]
add x0, x0, 1
str x0, [sp, 8]
ldr x0, [sp, 8]
sub x0, x0, #1
str x0, [sp, 8]
ldr x0, [sp, 8]
sub x0, x0, #1
str x0, [sp, 8]
ldr x0, [sp, 8]
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE9:
.size f1, .-f1
.align 2
.global f3
.type f3, %function
f3:
.LFB10:
.cfi_startproc
mov w0, 2
ret
.cfi_endproc
.LFE10:
.size f3, .-f3
.align 2
.global f4
.type f4, %function
f4:
.LFB11:
.cfi_startproc
fmov s0, 2.0e+0
movi v1.2s, #0
ret
.cfi_endproc
.LFE11:
.size f4, .-f4
.global f5_a
.bss
.align 3
.type f5_a, %object
.size f5_a, 4
f5_a:
.zero 4
.text
.align 2
.global f5
.type f5, %function
f5:
.LFB12:
.cfi_startproc
adrp x0, f5_a
add x0, x0, :lo12:f5_a
ldr w0, [x0]
ret
.cfi_endproc
.LFE12:
.size f5, .-f5
.align 2
.global f6
.type f6, %function
f6:
.LFB13:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str w0, [sp, 12]
str w1, [sp, 8]
str w2, [sp]
ldr w0, [sp, 12]
cmp w0, 0
beq .L27
ldr w0, [sp, 8]
b .L28
.L27:
ldr w0, [sp]
.L28:
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE13:
.size f6, .-f6
.align 2
.global f7
.type f7, %function
f7:
.LFB14:
.cfi_startproc
nop
ret
.cfi_endproc
.LFE14:
.size f7, .-f7
.align 2
.global f8
.type f8, %function
f8:
.LFB15:
.cfi_startproc
stp x29, x30, [sp, -16]!
.cfi_def_cfa_offset 16
.cfi_offset 29, -16
.cfi_offset 30, -8
mov x29, sp
bl foo
ldp x29, x30, [sp], 16
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE15:
.size f8, .-f8
.align 2
.global f9
.type f9, %function
f9:
.LFB16:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str x0, [sp, 24]
ldr x0, [sp, 24]
ldr x0, [x0, 8]
bl foo
nop
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE16:
.size f9, .-f9
.align 2
.global f10
.type f10, %function
f10:
.LFB17:
.cfi_startproc
nop
ret
.cfi_endproc
.LFE17:
.size f10, .-f10
.align 2
.global f11
.type f11, %function
f11:
.LFB18:
.cfi_startproc
stp x29, x30, [sp, -448]!
.cfi_def_cfa_offset 448
.cfi_offset 29, -448
.cfi_offset 30, -440
mov x29, sp
str x0, [sp, 24]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 440]
mov x1, 0
ldr x0, [sp, 24]
lsl x0, x0, 2
add x1, sp, 40
ldr w0, [x1, x0]
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 440]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L37
bl __stack_chk_fail
.L37:
mov w0, w1
ldp x29, x30, [sp], 448
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE18:
.size f11, .-f11
.align 2
.global f12
.type f12, %function
f12:
.LFB19:
.cfi_startproc
mov w0, 1
ret
.cfi_endproc
.LFE19:
.size f12, .-f12
.align 2
.global f13
.type f13, %function
f13:
.LFB20:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str d0, [sp, 8]
ldr d0, [sp, 8]
fneg d0, d0
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE20:
.size f13, .-f13
.align 2
.global f14
.type f14, %function
f14:
.LFB21:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str x0, [sp, 8]
nop
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE21:
.size f14, .-f14
.align 2
.global f15
.type f15, %function
f15:
.LFB22:
.cfi_startproc
stp x29, x30, [sp, -16]!
.cfi_def_cfa_offset 16
.cfi_offset 29, -16
.cfi_offset 30, -8
mov x29, sp
bl f15_start
bl f15_v
bl f15_v
bl f15_v
bl f15_v
cmp x0, 0
beq .L44
bl f15_v
b .L45
.L44:
bl f15_v
.L45:
bl f15_cv
bl f15_cv
bl f15_cv
bl f15_cv
cmp x0, 0
beq .L46
bl f15_cv
b .L47
.L46:
bl f15_cv
.L47:
bl f15_vv
bl f15_vv
bl f15_vv
bl f15_vv
cmp x0, 0
beq .L48
bl f15_vv
b .L50
.L48:
bl f15_vv
.L50:
nop
ldp x29, x30, [sp], 16
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE22:
.size f15, .-f15
.align 2
.global f16
.type f16, %function
f16:
.LFB23:
.cfi_startproc
nop
nop
ret
.L52:
.cfi_endproc
.LFE23:
.size f16, .-f16
.align 2
.global f17
.type f17, %function
f17:
.LFB24:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
mov x0, 2
mov x1, 0
stp x0, x1, [sp, 16]
ldp x0, x1, [sp, 16]
mov x4, -1
adds x5, x0, x4
mov x4, -1
adc x0, x1, x4
mov x2, x5
mov x3, x0
stp x2, x3, [sp, 16]
ldp x0, x1, [sp, 16]
bl extfunc
nop
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE24:
.size f17, .-f17
.align 2
.global f18
.type f18, %function
f18:
.LFB25:
.cfi_startproc
stp x29, x30, [sp, -16]!
.cfi_def_cfa_offset 16
.cfi_offset 29, -16
.cfi_offset 30, -8
mov x29, sp
bl returns_int
nop
ldp x29, x30, [sp], 16
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE25:
.size f18, .-f18
.align 2
.global f19
.type f19, %function
f19:
.LFB26:
.cfi_startproc
mov w0, 4
ret
.cfi_endproc
.LFE26:
.size f19, .-f19
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 2
.type PROTOCOL_VERSION, %object
.size PROTOCOL_VERSION, 4
PROTOCOL_VERSION:
.word 70226
.align 2
.type MIN_PEER_PROTO_VERSION_BEFORE_ENFORCEMENT, %object
.size MIN_PEER_PROTO_VERSION_BEFORE_ENFORCEMENT, 4
MIN_PEER_PROTO_VERSION_BEFORE_ENFORCEMENT:
.word 70225
.align 2
.type MIN_PEER_PROTO_VERSION_AFTER_ENFORCEMENT, %object
.size MIN_PEER_PROTO_VERSION_AFTER_ENFORCEMENT, 4
MIN_PEER_PROTO_VERSION_AFTER_ENFORCEMENT:
.word 70226
.align 2
.type CONSENSUS_FORK_PROTO, %object
.size CONSENSUS_FORK_PROTO, 4
CONSENSUS_FORK_PROTO:
.word 70226
.align 2
.type INIT_PROTO_VERSION, %object
.size INIT_PROTO_VERSION, 4
INIT_PROTO_VERSION:
.word 209
.align 2
.type CADDR_TIME_VERSION, %object
.size CADDR_TIME_VERSION, 4
CADDR_TIME_VERSION:
.word 31402
.align 2
.type BIP0031_VERSION, %object
.size BIP0031_VERSION, 4
BIP0031_VERSION:
.word 60000
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global main
.type main, %function
main:
.LFB0:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str wzr, [sp, 12]
mov w0, 0
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC0:
.string "Enter first word: "
.align 3
.LC1:
.string "Enter second word: "
.align 3
.LC2:
.string "The words are anagrams."
.align 3
.LC3:
.string "The words are not anagrams."
.text
.align 2
.global main
.type main, %function
main:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -240]!
.cfi_def_cfa_offset 240
.cfi_offset 29, -240
.cfi_offset 30, -232
mov x29, sp
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 232]
mov x1, 0
add x0, sp, 24
movi v0.4s, 0
stp q0, q0, [x0]
stp q0, q0, [x0, 32]
stp q0, q0, [x0, 64]
fmov x1, d0
str x1, [x0, 96]
add x0, sp, 128
movi v0.4s, 0
stp q0, q0, [x0]
stp q0, q0, [x0, 32]
stp q0, q0, [x0, 64]
fmov x1, d0
str x1, [x0, 96]
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl printf
add x0, sp, 24
bl read_word
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl printf
add x0, sp, 128
bl read_word
add x1, sp, 128
add x0, sp, 24
bl equal_array
and w0, w0, 255
cmp w0, 0
beq .L2
adrp x0, .LC2
add x0, x0, :lo12:.LC2
bl puts
b .L3
.L2:
adrp x0, .LC3
add x0, x0, :lo12:.LC3
bl puts
.L3:
mov w0, 0
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 232]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L5
bl __stack_chk_fail
.L5:
mov w0, w1
ldp x29, x30, [sp], 240
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size main, .-main
.align 2
.global read_word
.type read_word, %function
read_word:
.LFB1:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
bl getchar
strb w0, [sp, 47]
ldrb w0, [sp, 47]
bl toupper
strb w0, [sp, 47]
b .L7
.L9:
bl __ctype_b_loc
ldr x1, [x0]
ldrb w0, [sp, 47]
lsl x0, x0, 1
add x0, x1, x0
ldrh w0, [x0]
and w0, w0, 1024
cmp w0, 0
beq .L8
ldrb w0, [sp, 47]
lsl x0, x0, 2
sub x0, x0, #260
ldr x1, [sp, 24]
add x0, x1, x0
ldr w1, [x0]
add w1, w1, 1
str w1, [x0]
.L8:
bl getchar
strb w0, [sp, 47]
ldrb w0, [sp, 47]
bl toupper
strb w0, [sp, 47]
.L7:
ldrb w0, [sp, 47]
cmp w0, 10
bne .L9
nop
nop
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE1:
.size read_word, .-read_word
.align 2
.global equal_array
.type equal_array, %function
equal_array:
.LFB2:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str x0, [sp, 8]
str x1, [sp]
str xzr, [sp, 24]
b .L11
.L14:
ldr x0, [sp, 24]
lsl x0, x0, 2
ldr x1, [sp, 8]
add x0, x1, x0
ldr w1, [x0]
ldr x0, [sp, 24]
lsl x0, x0, 2
ldr x2, [sp]
add x0, x2, x0
ldr w0, [x0]
cmp w1, w0
beq .L12
mov w0, 0
b .L13
.L12:
ldr x0, [sp, 24]
add x0, x0, 1
str x0, [sp, 24]
.L11:
ldr x0, [sp, 24]
cmp x0, 26
bne .L14
mov w0, 1
.L13:
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE2:
.size equal_array, .-equal_array
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 2
.type ZERO, %object
.size ZERO, 4
ZERO:
.zero 4
.align 3
.type DZERO, %object
.size DZERO, 8
DZERO:
.zero 8
.global a
.bss
.align 3
.type a, %object
.size a, 8
a:
.zero 8
.global b
.align 2
.type b, %object
.size b, 4
b:
.zero 4
.global c
.align 3
.type c, %object
.size c, 8
c:
.zero 8
.text
.align 2
.global foo
.type foo, %function
foo:
.LFB0:
.cfi_startproc
adrp x0, a
add x0, x0, :lo12:a
ldr x0, [x0]
ldr w1, [x0]
adrp x0, b
add x0, x0, :lo12:b
str w1, [x0]
adrp x0, a
add x0, x0, :lo12:a
ldr x1, [x0]
adrp x0, c
add x0, x0, :lo12:c
str x1, [x0]
adrp x0, a
add x0, x0, :lo12:a
ldr x0, [x0]
ldr w1, [x0]
adrp x0, b
add x0, x0, :lo12:b
str w1, [x0]
adrp x0, a
add x0, x0, :lo12:a
ldr x1, [x0]
adrp x0, c
add x0, x0, :lo12:c
str x1, [x0]
adrp x0, a
add x0, x0, :lo12:a
ldr x1, [x0]
adrp x0, c
add x0, x0, :lo12:c
str x1, [x0]
adrp x0, a
add x0, x0, :lo12:a
ldr x0, [x0]
ldr w1, [x0]
adrp x0, b
add x0, x0, :lo12:b
str w1, [x0]
adrp x0, a
add x0, x0, :lo12:a
ldr x1, [x0]
adrp x0, c
add x0, x0, :lo12:c
str x1, [x0]
adrp x0, a
add x0, x0, :lo12:a
ldr x0, [x0]
ldr w1, [x0]
adrp x0, b
add x0, x0, :lo12:b
str w1, [x0]
adrp x0, a
add x0, x0, :lo12:a
ldr x1, [x0]
adrp x0, c
add x0, x0, :lo12:c
str x1, [x0]
adrp x0, a
add x0, x0, :lo12:a
ldr x0, [x0]
ldr w1, [x0]
adrp x0, b
add x0, x0, :lo12:b
str w1, [x0]
adrp x0, a
add x0, x0, :lo12:a
ldr x1, [x0]
adrp x0, c
add x0, x0, :lo12:c
str x1, [x0]
adrp x0, a
add x0, x0, :lo12:a
ldr x0, [x0]
ldr w1, [x0]
adrp x0, b
add x0, x0, :lo12:b
str w1, [x0]
adrp x0, a
add x0, x0, :lo12:a
ldr x1, [x0]
adrp x0, c
add x0, x0, :lo12:c
str x1, [x0]
adrp x0, a
add x0, x0, :lo12:a
ldr x0, [x0]
ldr w1, [x0]
adrp x0, b
add x0, x0, :lo12:b
str w1, [x0]
adrp x0, a
add x0, x0, :lo12:a
ldr x1, [x0]
adrp x0, c
add x0, x0, :lo12:c
str x1, [x0]
adrp x0, a
add x0, x0, :lo12:a
ldr x1, [x0]
adrp x0, c
add x0, x0, :lo12:c
str x1, [x0]
adrp x0, a
add x0, x0, :lo12:a
ldr x1, [x0]
adrp x0, c
add x0, x0, :lo12:c
str x1, [x0]
adrp x0, a
add x0, x0, :lo12:a
ldr x1, [x0]
adrp x0, c
add x0, x0, :lo12:c
str x1, [x0]
nop
ret
.cfi_endproc
.LFE0:
.size foo, .-foo
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.global s5k4ca_preview
.data
.align 3
.type s5k4ca_preview, %object
.size s5k4ca_preview, 84
s5k4ca_preview:
.hword -772
.hword -12288
.zero 2
.hword 40
.hword 28672
.zero 2
.hword 42
.hword 1672
.zero 2
.hword 3858
.hword 12544
.zero 2
.hword 42
.hword 1706
.zero 2
.hword 3858
.hword 11520
.zero 2
.hword 42
.hword 1740
.zero 2
.hword 3858
.hword 8192
.zero 2
.hword -772
.hword -12288
.zero 2
.hword 40
.hword 28672
.zero 2
.hword 42
.hword 694
.zero 2
.hword 3858
.hword 0
.zero 2
.hword 3858
.hword 1
.zero 2
.hword -1
.hword -1
.zero 2
.global s5k4ca_init0
.align 3
.type s5k4ca_init0, %object
.size s5k4ca_init0, 36
s5k4ca_init0:
.hword 40
.hword -12288
.zero 2
.hword 42
.hword 4144
.zero 2
.hword 3858
.hword 0
.zero 2
.hword 42
.hword 20
.zero 2
.hword 3858
.hword 1
.zero 2
.hword -1
.hword -1
.zero 2
.global s5k4ca_init1
.align 3
.type s5k4ca_init1, %object
.size s5k4ca_init1, 13080
s5k4ca_init1:
.hword 40
.hword 28672
.zero 2
.hword 42
.hword 9984
.zero 2
.hword 3858
.hword -19184
.zero 2
.hword 3858
.hword -4096
.zero 2
.hword 3858
.hword -1911
.zero 2
.hword 3858
.hword -17392
.zero 2
.hword 3858
.hword -17400
.zero 2
.hword 3858
.hword 18200
.zero 2
.hword 3858
.hword -19088
.zero 2
.hword 3858
.hword 21
.zero 2
.hword 3858
.hword 12
.zero 2
.hword 3858
.hword 17
.zero 2
.hword 3858
.hword -4096
.zero 2
.hword 3858
.hword -1852
.zero 2
.hword 3858
.hword 18765
.zero 2
.hword 3858
.hword 168
.zero 2
.hword 3858
.hword 20492
.zero 2
.hword 3858
.hword -17296
.zero 2
.hword 3858
.hword -17400
.zero 2
.hword 3858
.hword 18200
.zero 2
.hword 3858
.hword 2
.zero 2
.hword 3858
.hword 18508
.zero 2
.hword 3858
.hword 18762
.zero 2
.hword 3858
.hword -6161
.zero 2
.hword 3858
.hword -19184
.zero 2
.hword 3858
.hword -30718
.zero 2
.hword 3858
.hword 4
.zero 2
.hword 3858
.hword 18762
.zero 2
.hword 3858
.hword 7248
.zero 2
.hword 3858
.hword -32736
.zero 2
.hword 3858
.hword 18505
.zero 2
.hword 3858
.hword -2049
.zero 2
.hword 3858
.hword -25
.zero 2
.hword 3858
.hword -30686
.zero 2
.hword 3858
.hword 18760
.zero 2
.hword 3858
.hword 7248
.zero 2
.hword 3858
.hword -32736
.zero 2
.hword 3858
.hword 18502
.zero 2
.hword 3858
.hword 7296
.zero 2
.hword 3858
.hword -2049
.zero 2
.hword 3858
.hword -33
.zero 2
.hword 3858
.hword -30686
.zero 2
.hword 3858
.hword 18757
.zero 2
.hword 3858
.hword 7248
.zero 2
.hword 3858
.hword -32736
.zero 2
.hword 3858
.hword 18498
.zero 2
.hword 3858
.hword 7424
.zero 2
.hword 3858
.hword -2049
.zero 2
.hword 3858
.hword -41
.zero 2
.hword 3858
.hword -30686
.zero 2
.hword 3858
.hword 18754
.zero 2
.hword 3858
.hword 7248
.zero 2
.hword 3858
.hword -32736
.zero 2
.hword 3858
.hword 8419
.zero 2
.hword 3858
.hword 384
.zero 2
.hword 3858
.hword -2049
.zero 2
.hword 3858
.hword -49
.zero 2
.hword 3858
.hword -30686
.zero 2
.hword 3858
.hword 18751
.zero 2
.hword 3858
.hword 7248
.zero 2
.hword 3858
.hword -32736
.zero 2
.hword 3858
.hword 18490
.zero 2
.hword 3858
.hword 12296
.zero 2
.hword 3858
.hword -2049
.zero 2
.hword 3858
.hword -57
.zero 2
.hword 3858
.hword -17392
.zero 2
.hword 3858
.hword -17400
.zero 2
.hword 3858
.hword 18200
.zero 2
.hword 3858
.hword 18747
.zero 2
.hword 3858
.hword -18959
.zero 2
.hword 3858
.hword -30712
.zero 2
.hword 3858
.hword -30646
.zero 2
.hword 3858
.hword -20348
.zero 2
.hword 3858
.hword 8984
.zero 2
.hword 3858
.hword 17232
.zero 2
.hword 3858
.hword -28672
.zero 2
.hword 3858
.hword 18488
.zero 2
.hword 3858
.hword 9472
.zero 2
.hword 3858
.hword 24258
.zero 2
.hword 3858
.hword 8988
.zero 2
.hword 3858
.hword -28159
.zero 2
.hword 3858
.hword 24258
.zero 2
.hword 3858
.hword 8992
.zero 2
.hword 3858
.hword 9216
.zero 2
.hword 3858
.hword -28158
.zero 2
.hword 3858
.hword 24256
.zero 2
.hword 3858
.hword -28669
.zero 2
.hword 3858
.hword 18484
.zero 2
.hword 3858
.hword -30713
.zero 2
.hword 3858
.hword 18481
.zero 2
.hword 3858
.hword 166
.zero 2
.hword 3858
.hword 6192
.zero 2
.hword 3858
.hword 12543
.zero 2
.hword 3858
.hword 12353
.zero 2
.hword 3858
.hword 26880
.zero 2
.hword 3858
.hword -26368
.zero 2
.hword 3858
.hword 17272
.zero 2
.hword 3858
.hword 2560
.zero 2
.hword 3858
.hword -4096
.zero 2
.hword 3858
.hword -1930
.zero 2
.hword 3858
.hword 18990
.zero 2
.hword 3858
.hword 1024
.zero 2
.hword 3858
.hword 97
.zero 2
.hword 3858
.hword 6281
.zero 2
.hword 3858
.hword 3072
.zero 2
.hword 3858
.hword -31800
.zero 2
.hword 3858
.hword -22271
.zero 2
.hword 3858
.hword 22921
.zero 2
.hword 3858
.hword 7268
.zero 2
.hword 3858
.hword 17224
.zero 2
.hword 3858
.hword 6469
.zero 2
.hword 3858
.hword 11267
.zero 2
.hword 3858
.hword -11289
.zero 2
.hword 3858
.hword 13696
.zero 2
.hword 3858
.hword 552
.zero 2
.hword 3858
.hword 3072
.zero 2
.hword 3858
.hword -32624
.zero 2
.hword 3858
.hword -26364
.zero 2
.hword 3858
.hword 8447
.zero 2
.hword 3858
.hword 7232
.zero 2
.hword 3858
.hword 24584
.zero 2
.hword 3858
.hword -20475
.zero 2
.hword 3858
.hword -17168
.zero 2
.hword 3858
.hword -17400
.zero 2
.hword 3858
.hword 18200
.zero 2
.hword 3858
.hword -19088
.zero 2
.hword 3858
.hword 19490
.zero 2
.hword 3858
.hword 19747
.zero 2
.hword 3858
.hword 30752
.zero 2
.hword 3858
.hword 10240
.zero 2
.hword 3858
.hword -12028
.zero 2
.hword 3858
.hword -30296
.zero 2
.hword 3858
.hword 10240
.zero 2
.hword 3858
.hword -12287
.zero 2
.hword 3858
.hword -4096
.zero 2
.hword 3858
.hword -1960
.zero 2
.hword 3858
.hword -30296
.zero 2
.hword 3858
.hword 18719
.zero 2
.hword 3858
.hword 28704
.zero 2
.hword 3858
.hword -30232
.zero 2
.hword 3858
.hword 28680
.zero 2
.hword 3858
.hword -6270
.zero 2
.hword 3858
.hword 8192
.zero 2
.hword 3858
.hword 8449
.zero 2
.hword 3858
.hword -19192
.zero 2
.hword 3858
.hword -28416
.zero 2
.hword 3858
.hword -2049
.zero 2
.hword 3858
.hword -128
.zero 2
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.global s5k4ca_flashcapture
.align 3
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.global s5k4ca_snapshot_low
.align 3
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.global s5k4ca_flashcapture_low
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.align 3
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.align 3
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.global s5k4ca_nightmode_off
.align 3
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.hword 512
.zero 2
.hword 3858
.hword 1248
.zero 2
.hword 3858
.hword 256
.zero 2
.hword 42
.hword 2964
.zero 2
.hword 3858
.hword 1
.zero 2
.hword 42
.hword 1030
.zero 2
.hword 3858
.hword 4000
.zero 2
.hword 3858
.hword 0
.zero 2
.hword 42
.hword 1022
.zero 2
.hword 3858
.hword 114
.zero 2
.hword 42
.hword 1026
.zero 2
.hword 3858
.hword 0
.zero 2
.hword 3858
.hword 2
.zero 2
.hword 42
.hword 738
.zero 2
.hword 3858
.hword 0
.zero 2
.hword 42
.hword 742
.zero 2
.hword 3858
.hword 1
.zero 2
.hword 42
.hword 702
.zero 2
.hword 3858
.hword 1
.zero 2
.hword 42
.hword 740
.zero 2
.hword 3858
.hword 1
.zero 2
.hword -1
.hword -1
.zero 2
.global s5k4ca_fps_nonfix
.align 3
.type s5k4ca_fps_nonfix, %object
.size s5k4ca_fps_nonfix, 96
s5k4ca_fps_nonfix:
.hword -772
.hword -12288
.zero 2
.hword 40
.hword 28672
.zero 2
.hword 42
.hword 828
.zero 2
.hword 3858
.hword 1666
.zero 2
.hword 3858
.hword 683
.zero 2
.hword 42
.hword 824
.zero 2
.hword 3858
.hword 0
.zero 2
.hword 42
.hword 738
.zero 2
.hword 3858
.hword 0
.zero 2
.hword 42
.hword 742
.zero 2
.hword 3858
.hword 1
.zero 2
.hword 42
.hword 702
.zero 2
.hword 3858
.hword 1
.zero 2
.hword 42
.hword 740
.zero 2
.hword 3858
.hword 1
.zero 2
.hword -1
.hword -1
.zero 2
.global s5k4ca_fps_15fix
.align 3
.type s5k4ca_fps_15fix, %object
.size s5k4ca_fps_15fix, 96
s5k4ca_fps_15fix:
.hword -772
.hword -12288
.zero 2
.hword 40
.hword 28672
.zero 2
.hword 42
.hword 828
.zero 2
.hword 3858
.hword 683
.zero 2
.hword 3858
.hword 683
.zero 2
.hword 42
.hword 824
.zero 2
.hword 3858
.hword 0
.zero 2
.hword 42
.hword 738
.zero 2
.hword 3858
.hword 0
.zero 2
.hword 42
.hword 742
.zero 2
.hword 3858
.hword 1
.zero 2
.hword 42
.hword 702
.zero 2
.hword 3858
.hword 1
.zero 2
.hword 42
.hword 740
.zero 2
.hword 3858
.hword 1
.zero 2
.hword -1
.hword -1
.zero 2
.global s5k4ca_fps_7fix
.align 3
.type s5k4ca_fps_7fix, %object
.size s5k4ca_fps_7fix, 96
s5k4ca_fps_7fix:
.hword -772
.hword -12288
.zero 2
.hword 40
.hword 28672
.zero 2
.hword 42
.hword 828
.zero 2
.hword 3858
.hword 1280
.zero 2
.hword 3858
.hword 1280
.zero 2
.hword 42
.hword 824
.zero 2
.hword 3858
.hword 0
.zero 2
.hword 42
.hword 738
.zero 2
.hword 3858
.hword 0
.zero 2
.hword 42
.hword 742
.zero 2
.hword 3858
.hword 1
.zero 2
.hword 42
.hword 702
.zero 2
.hword 3858
.hword 1
.zero 2
.hword 42
.hword 740
.zero 2
.hword 3858
.hword 1
.zero 2
.hword -1
.hword -1
.zero 2
.global s5k4ca_effect_off
.align 3
.type s5k4ca_effect_off, %object
.size s5k4ca_effect_off, 30
s5k4ca_effect_off:
.hword -772
.hword -12288
.zero 2
.hword 40
.hword 28672
.zero 2
.hword 42
.hword 688
.zero 2
.hword 3858
.hword 0
.zero 2
.hword -1
.hword -1
.zero 2
.global s5k4ca_effect_gray
.align 3
.type s5k4ca_effect_gray, %object
.size s5k4ca_effect_gray, 30
s5k4ca_effect_gray:
.hword -772
.hword -12288
.zero 2
.hword 40
.hword 28672
.zero 2
.hword 42
.hword 688
.zero 2
.hword 3858
.hword 1
.zero 2
.hword -1
.hword -1
.zero 2
.global s5k4ca_effect_negative
.align 3
.type s5k4ca_effect_negative, %object
.size s5k4ca_effect_negative, 30
s5k4ca_effect_negative:
.hword -772
.hword -12288
.zero 2
.hword 40
.hword 28672
.zero 2
.hword 42
.hword 688
.zero 2
.hword 3858
.hword 2
.zero 2
.hword -1
.hword -1
.zero 2
.global s5k4ca_effect_sepia
.align 3
.type s5k4ca_effect_sepia, %object
.size s5k4ca_effect_sepia, 30
s5k4ca_effect_sepia:
.hword -772
.hword -12288
.zero 2
.hword 40
.hword 28672
.zero 2
.hword 42
.hword 688
.zero 2
.hword 3858
.hword 3
.zero 2
.hword -1
.hword -1
.zero 2
.global s5k4ca_effect_aqua
.align 3
.type s5k4ca_effect_aqua, %object
.size s5k4ca_effect_aqua, 30
s5k4ca_effect_aqua:
.hword -772
.hword -12288
.zero 2
.hword 40
.hword 28672
.zero 2
.hword 42
.hword 688
.zero 2
.hword 3858
.hword 4
.zero 2
.hword -1
.hword -1
.zero 2
.global s5k4ca_effect_sketch
.align 3
.type s5k4ca_effect_sketch, %object
.size s5k4ca_effect_sketch, 30
s5k4ca_effect_sketch:
.hword -772
.hword -12288
.zero 2
.hword 40
.hword 28672
.zero 2
.hword 42
.hword 688
.zero 2
.hword 3858
.hword 5
.zero 2
.hword -1
.hword -1
.zero 2
.global s5k4ca_wb_auto
.align 3
.type s5k4ca_wb_auto, %object
.size s5k4ca_wb_auto, 168
s5k4ca_wb_auto:
.hword -772
.hword -12288
.zero 2
.hword 40
.hword 28672
.zero 2
.hword 42
.hword 3300
.zero 2
.hword 3858
.hword 869
.zero 2
.hword 3858
.hword 908
.zero 2
.hword 3858
.hword 780
.zero 2
.hword 3858
.hword 907
.zero 2
.hword 3858
.hword 736
.zero 2
.hword 3858
.hword 893
.zero 2
.hword 3858
.hword 715
.zero 2
.hword 3858
.hword 878
.zero 2
.hword 3858
.hword 698
.zero 2
.hword 3858
.hword 848
.zero 2
.hword 3858
.hword 683
.zero 2
.hword 3858
.hword 817
.zero 2
.hword 42
.hword 3460
.zero 2
.hword 3858
.hword 4
.zero 2
.hword 42
.hword 3464
.zero 2
.hword 3858
.hword 27
.zero 2
.hword 42
.hword 3468
.zero 2
.hword 3858
.hword 338
.zero 2
.hword 42
.hword 4448
.zero 2
.hword 3858
.hword 0
.zero 2
.hword 3858
.hword 0
.zero 2
.hword 42
.hword 4264
.zero 2
.hword 3858
.hword 0
.zero 2
.hword 3858
.hword 0
.zero 2
.hword -1
.hword -1
.zero 2
.global s5k4ca_wb_sunny
.align 3
.type s5k4ca_wb_sunny, %object
.size s5k4ca_wb_sunny, 180
s5k4ca_wb_sunny:
.hword -772
.hword -12288
.zero 2
.hword 40
.hword 28672
.zero 2
.hword 42
.hword 4866
.zero 2
.hword 3858
.hword 1621
.zero 2
.hword 3858
.hword 1024
.zero 2
.hword 3858
.hword 1251
.zero 2
.hword 42
.hword 3300
.zero 2
.hword 3858
.hword 501
.zero 2
.hword 3858
.hword 555
.zero 2
.hword 3858
.hword 485
.zero 2
.hword 3858
.hword 583
.zero 2
.hword 3858
.hword 480
.zero 2
.hword 3858
.hword 585
.zero 2
.hword 3858
.hword 491
.zero 2
.hword 3858
.hword 579
.zero 2
.hword 3858
.hword 505
.zero 2
.hword 3858
.hword 568
.zero 2
.hword 42
.hword 3460
.zero 2
.hword 3858
.hword 4
.zero 2
.hword 42
.hword 3464
.zero 2
.hword 3858
.hword 5
.zero 2
.hword 42
.hword 3468
.zero 2
.hword 3858
.hword 655
.zero 2
.hword 42
.hword 4448
.zero 2
.hword 3858
.hword 0
.zero 2
.hword 3858
.hword 0
.zero 2
.hword 42
.hword 4264
.zero 2
.hword 3858
.hword 1
.zero 2
.hword 3858
.hword 2
.zero 2
.hword -1
.hword -1
.zero 2
.global s5k4ca_wb_cloudy
.align 3
.type s5k4ca_wb_cloudy, %object
.size s5k4ca_wb_cloudy, 180
s5k4ca_wb_cloudy:
.hword -772
.hword -12288
.zero 2
.hword 40
.hword 28672
.zero 2
.hword 42
.hword 4866
.zero 2
.hword 3858
.hword 1621
.zero 2
.hword 3858
.hword 1024
.zero 2
.hword 3858
.hword 1251
.zero 2
.hword 42
.hword 3300
.zero 2
.hword 3858
.hword 501
.zero 2
.hword 3858
.hword 555
.zero 2
.hword 3858
.hword 485
.zero 2
.hword 3858
.hword 583
.zero 2
.hword 3858
.hword 480
.zero 2
.hword 3858
.hword 585
.zero 2
.hword 3858
.hword 491
.zero 2
.hword 3858
.hword 579
.zero 2
.hword 3858
.hword 505
.zero 2
.hword 3858
.hword 568
.zero 2
.hword 42
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.zero 2
.hword 3858
.hword 4
.zero 2
.hword 42
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.zero 2
.hword 3858
.hword 5
.zero 2
.hword 42
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.zero 2
.hword 3858
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.zero 2
.hword 42
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.zero 2
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.zero 2
.hword 3858
.hword 0
.zero 2
.hword 42
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.zero 2
.hword 3858
.hword 1
.zero 2
.hword 3858
.hword 2
.zero 2
.hword -1
.hword -1
.zero 2
.global s5k4ca_wb_tungsten
.align 3
.type s5k4ca_wb_tungsten, %object
.size s5k4ca_wb_tungsten, 180
s5k4ca_wb_tungsten:
.hword -772
.hword -12288
.zero 2
.hword 40
.hword 28672
.zero 2
.hword 42
.hword 4866
.zero 2
.hword 3858
.hword 1028
.zero 2
.hword 3858
.hword 1024
.zero 2
.hword 3858
.hword 2141
.zero 2
.hword 42
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.zero 2
.hword 3858
.hword 794
.zero 2
.hword 3858
.hword 848
.zero 2
.hword 3858
.hword 778
.zero 2
.hword 3858
.hword 875
.zero 2
.hword 3858
.hword 773
.zero 2
.hword 3858
.hword 878
.zero 2
.hword 3858
.hword 784
.zero 2
.hword 3858
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.zero 2
.hword 3858
.hword 798
.zero 2
.hword 3858
.hword 861
.zero 2
.hword 42
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.zero 2
.hword 3858
.hword 4
.zero 2
.hword 42
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.zero 2
.hword 3858
.hword 5
.zero 2
.hword 42
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.zero 2
.hword 3858
.hword 365
.zero 2
.hword 42
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.zero 2
.hword 3858
.hword -80
.zero 2
.hword 3858
.hword 0
.zero 2
.hword 42
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.zero 2
.hword 3858
.hword 1
.zero 2
.hword 3858
.hword 2
.zero 2
.hword -1
.hword -1
.zero 2
.global s5k4ca_wb_fluorescent
.align 3
.type s5k4ca_wb_fluorescent, %object
.size s5k4ca_wb_fluorescent, 180
s5k4ca_wb_fluorescent:
.hword -772
.hword -12288
.zero 2
.hword 40
.hword 28672
.zero 2
.hword 42
.hword 4866
.zero 2
.hword 3858
.hword 1348
.zero 2
.hword 3858
.hword 1024
.zero 2
.hword 3858
.hword 1802
.zero 2
.hword 42
.hword 3300
.zero 2
.hword 3858
.hword 632
.zero 2
.hword 3858
.hword 687
.zero 2
.hword 3858
.hword 617
.zero 2
.hword 3858
.hword 714
.zero 2
.hword 3858
.hword 612
.zero 2
.hword 3858
.hword 717
.zero 2
.hword 3858
.hword 622
.zero 2
.hword 3858
.hword 711
.zero 2
.hword 3858
.hword 636
.zero 2
.hword 3858
.hword 699
.zero 2
.hword 42
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.zero 2
.hword 3858
.hword 4
.zero 2
.hword 42
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.zero 2
.hword 3858
.hword 5
.zero 2
.hword 42
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.zero 2
.hword 3858
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.zero 2
.hword 42
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.zero 2
.hword 3858
.hword 0
.zero 2
.hword 3858
.hword 0
.zero 2
.hword 42
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.zero 2
.hword 3858
.hword 1
.zero 2
.hword 3858
.hword 2
.zero 2
.hword -1
.hword -1
.zero 2
.global s5k4ca_br_minus4
.align 3
.type s5k4ca_br_minus4, %object
.size s5k4ca_br_minus4, 36
s5k4ca_br_minus4:
.hword -772
.hword -12288
.zero 2
.hword 40
.hword 28672
.zero 2
.hword 42
.hword 678
.zero 2
.hword 3858
.hword -128
.zero 2
.hword 3858
.hword -123
.zero 2
.hword -1
.hword -1
.zero 2
.global s5k4ca_br_minus3
.align 3
.type s5k4ca_br_minus3, %object
.size s5k4ca_br_minus3, 36
s5k4ca_br_minus3:
.hword -772
.hword -12288
.zero 2
.hword 40
.hword 28672
.zero 2
.hword 42
.hword 678
.zero 2
.hword 3858
.hword -64
.zero 2
.hword 3858
.hword -56
.zero 2
.hword -1
.hword -1
.zero 2
.global s5k4ca_br_minus2
.align 3
.type s5k4ca_br_minus2, %object
.size s5k4ca_br_minus2, 36
s5k4ca_br_minus2:
.hword -772
.hword -12288
.zero 2
.hword 40
.hword 28672
.zero 2
.hword 42
.hword 678
.zero 2
.hword 3858
.hword -48
.zero 2
.hword 3858
.hword -28
.zero 2
.hword -1
.hword -1
.zero 2
.global s5k4ca_br_minus1
.align 3
.type s5k4ca_br_minus1, %object
.size s5k4ca_br_minus1, 36
s5k4ca_br_minus1:
.hword -772
.hword -12288
.zero 2
.hword 40
.hword 28672
.zero 2
.hword 42
.hword 678
.zero 2
.hword 3858
.hword -32
.zero 2
.hword 3858
.hword -28
.zero 2
.hword -1
.hword -1
.zero 2
.global s5k4ca_br_zero
.align 3
.type s5k4ca_br_zero, %object
.size s5k4ca_br_zero, 36
s5k4ca_br_zero:
.hword -772
.hword -12288
.zero 2
.hword 40
.hword 28672
.zero 2
.hword 42
.hword 678
.zero 2
.hword 3858
.hword 0
.zero 2
.hword 3858
.hword 0
.zero 2
.hword -1
.hword -1
.zero 2
.global s5k4ca_br_plus1
.align 3
.type s5k4ca_br_plus1, %object
.size s5k4ca_br_plus1, 36
s5k4ca_br_plus1:
.hword -772
.hword -12288
.zero 2
.hword 40
.hword 28672
.zero 2
.hword 42
.hword 678
.zero 2
.hword 3858
.hword 48
.zero 2
.hword 3858
.hword 0
.zero 2
.hword -1
.hword -1
.zero 2
.global s5k4ca_br_plus2
.align 3
.type s5k4ca_br_plus2, %object
.size s5k4ca_br_plus2, 36
s5k4ca_br_plus2:
.hword -772
.hword -12288
.zero 2
.hword 40
.hword 28672
.zero 2
.hword 42
.hword 678
.zero 2
.hword 3858
.hword 64
.zero 2
.hword 3858
.hword 0
.zero 2
.hword -1
.hword -1
.zero 2
.global s5k4ca_br_plus3
.align 3
.type s5k4ca_br_plus3, %object
.size s5k4ca_br_plus3, 36
s5k4ca_br_plus3:
.hword -772
.hword -12288
.zero 2
.hword 40
.hword 28672
.zero 2
.hword 42
.hword 678
.zero 2
.hword 3858
.hword 96
.zero 2
.hword 3858
.hword 0
.zero 2
.hword -1
.hword -1
.zero 2
.global s5k4ca_br_plus4
.align 3
.type s5k4ca_br_plus4, %object
.size s5k4ca_br_plus4, 36
s5k4ca_br_plus4:
.hword -772
.hword -12288
.zero 2
.hword 40
.hword 28672
.zero 2
.hword 42
.hword 678
.zero 2
.hword 3858
.hword 127
.zero 2
.hword 3858
.hword 16
.zero 2
.hword -1
.hword -1
.zero 2
.global s5k4ca_iso_auto
.align 3
.type s5k4ca_iso_auto, %object
.size s5k4ca_iso_auto, 60
s5k4ca_iso_auto:
.hword -772
.hword -12288
.zero 2
.hword 40
.hword 28672
.zero 2
.hword 42
.hword 1168
.zero 2
.hword 3858
.hword 0
.zero 2
.hword 42
.hword 1558
.zero 2
.hword 3858
.hword 1408
.zero 2
.hword 3858
.hword 256
.zero 2
.hword 42
.hword 1166
.zero 2
.hword 3858
.hword 12500
.zero 2
.hword -1
.hword -1
.zero 2
.global s5k4ca_iso50
.align 3
.type s5k4ca_iso50, %object
.size s5k4ca_iso50, 60
s5k4ca_iso50:
.hword -772
.hword -12288
.zero 2
.hword 40
.hword 28672
.zero 2
.hword 42
.hword 1168
.zero 2
.hword 3858
.hword 256
.zero 2
.hword 42
.hword 1558
.zero 2
.hword 3858
.hword 256
.zero 2
.hword 3858
.hword 512
.zero 2
.hword 42
.hword 1166
.zero 2
.hword 3858
.hword 12500
.zero 2
.hword -1
.hword -1
.zero 2
.global s5k4ca_iso100
.align 3
.type s5k4ca_iso100, %object
.size s5k4ca_iso100, 60
s5k4ca_iso100:
.hword -772
.hword -12288
.zero 2
.hword 40
.hword 28672
.zero 2
.hword 42
.hword 1168
.zero 2
.hword 3858
.hword 512
.zero 2
.hword 42
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.zero 2
.hword 3858
.hword 512
.zero 2
.hword 3858
.hword 512
.zero 2
.hword 42
.hword 1166
.zero 2
.hword 3858
.hword 12500
.zero 2
.hword -1
.hword -1
.zero 2
.global s5k4ca_iso200
.align 3
.type s5k4ca_iso200, %object
.size s5k4ca_iso200, 60
s5k4ca_iso200:
.hword -772
.hword -12288
.zero 2
.hword 40
.hword 28672
.zero 2
.hword 42
.hword 1168
.zero 2
.hword 3858
.hword 640
.zero 2
.hword 42
.hword 1558
.zero 2
.hword 3858
.hword 640
.zero 2
.hword 3858
.hword 512
.zero 2
.hword 42
.hword 1166
.zero 2
.hword 3858
.hword 12500
.zero 2
.hword -1
.hword -1
.zero 2
.global s5k4ca_iso400
.align 3
.type s5k4ca_iso400, %object
.size s5k4ca_iso400, 60
s5k4ca_iso400:
.hword -772
.hword -12288
.zero 2
.hword 40
.hword 28672
.zero 2
.hword 42
.hword 1168
.zero 2
.hword 3858
.hword 716
.zero 2
.hword 42
.hword 1558
.zero 2
.hword 3858
.hword 716
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.zero 2
.hword 42
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.zero 2
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.zero 2
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.hword -1
.zero 2
.global s5k4ca_scene_portrait_off
.align 3
.type s5k4ca_scene_portrait_off, %object
.size s5k4ca_scene_portrait_off, 30
s5k4ca_scene_portrait_off:
.hword -772
.hword -12288
.zero 2
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.hword 28672
.zero 2
.hword 42
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.zero 2
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.hword 0
.zero 2
.hword -1
.hword -1
.zero 2
.global s5k4ca_scene_landscape_off
.align 3
.type s5k4ca_scene_landscape_off, %object
.size s5k4ca_scene_landscape_off, 42
s5k4ca_scene_landscape_off:
.hword -772
.hword -12288
.zero 2
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.zero 2
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.zero 2
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.hword 0
.zero 2
.hword 42
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.zero 2
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.hword 0
.zero 2
.hword -1
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.zero 2
.global s5k4ca_scene_sports_off
.align 3
.type s5k4ca_scene_sports_off, %object
.size s5k4ca_scene_sports_off, 30
s5k4ca_scene_sports_off:
.hword -772
.hword -12288
.zero 2
.hword 40
.hword 28672
.zero 2
.hword 42
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.zero 2
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.hword 256
.zero 2
.hword -1
.hword -1
.zero 2
.global s5k4ca_scene_sunset_off
.align 3
.type s5k4ca_scene_sunset_off, %object
.size s5k4ca_scene_sunset_off, 30
s5k4ca_scene_sunset_off:
.hword -772
.hword -12288
.zero 2
.hword 40
.hword 28672
.zero 2
.hword 42
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.zero 2
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.hword 0
.zero 2
.hword -1
.hword -1
.zero 2
.global s5k4ca_scene_dawn_off
.align 3
.type s5k4ca_scene_dawn_off, %object
.size s5k4ca_scene_dawn_off, 30
s5k4ca_scene_dawn_off:
.hword -772
.hword -12288
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.zero 2
.hword 42
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.zero 2
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.hword -8
.zero 2
.hword -1
.hword -1
.zero 2
.global s5k4ca_scene_againstlight_off
.align 3
.type s5k4ca_scene_againstlight_off, %object
.size s5k4ca_scene_againstlight_off, 240
s5k4ca_scene_againstlight_off:
.hword -772
.hword -12288
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.zero 2
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.zero 2
.global s5k4ca_scene_text_off
.align 3
.type s5k4ca_scene_text_off, %object
.size s5k4ca_scene_text_off, 30
s5k4ca_scene_text_off:
.hword -772
.hword -12288
.zero 2
.hword 40
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.zero 2
.hword 42
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.zero 2
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.hword 0
.zero 2
.hword -1
.hword -1
.zero 2
.global s5k4ca_contrast_m2
.align 3
.type s5k4ca_contrast_m2, %object
.size s5k4ca_contrast_m2, 30
s5k4ca_contrast_m2:
.hword -772
.hword -12288
.zero 2
.hword 40
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.zero 2
.hword 42
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.zero 2
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.zero 2
.hword -1
.hword -1
.zero 2
.global s5k4ca_contrast_m1
.align 3
.type s5k4ca_contrast_m1, %object
.size s5k4ca_contrast_m1, 30
s5k4ca_contrast_m1:
.hword -772
.hword -12288
.zero 2
.hword 40
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.zero 2
.hword 42
.hword 680
.zero 2
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.hword -32
.zero 2
.hword -1
.hword -1
.zero 2
.global s5k4ca_contrast_0
.align 3
.type s5k4ca_contrast_0, %object
.size s5k4ca_contrast_0, 30
s5k4ca_contrast_0:
.hword -772
.hword -12288
.zero 2
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.zero 2
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.zero 2
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.hword 0
.zero 2
.hword -1
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.zero 2
.global s5k4ca_contrast_p1
.align 3
.type s5k4ca_contrast_p1, %object
.size s5k4ca_contrast_p1, 30
s5k4ca_contrast_p1:
.hword -772
.hword -12288
.zero 2
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.zero 2
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.zero 2
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.hword 32
.zero 2
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.zero 2
.global s5k4ca_contrast_P2
.align 3
.type s5k4ca_contrast_P2, %object
.size s5k4ca_contrast_P2, 30
s5k4ca_contrast_P2:
.hword -772
.hword -12288
.zero 2
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.zero 2
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.zero 2
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.hword 64
.zero 2
.hword -1
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.zero 2
.global s5k4ca_Saturation_m2
.align 3
.type s5k4ca_Saturation_m2, %object
.size s5k4ca_Saturation_m2, 30
s5k4ca_Saturation_m2:
.hword -772
.hword -12288
.zero 2
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.zero 2
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.zero 2
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.hword -32
.zero 2
.hword -1
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.zero 2
.global s5k4ca_Saturation_m1
.align 3
.type s5k4ca_Saturation_m1, %object
.size s5k4ca_Saturation_m1, 30
s5k4ca_Saturation_m1:
.hword -772
.hword -12288
.zero 2
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.zero 2
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.zero 2
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.hword -16
.zero 2
.hword -1
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.zero 2
.global s5k4ca_Saturation_0
.align 3
.type s5k4ca_Saturation_0, %object
.size s5k4ca_Saturation_0, 30
s5k4ca_Saturation_0:
.hword -772
.hword -12288
.zero 2
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.zero 2
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.hword 0
.zero 2
.hword -1
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.zero 2
.global s5k4ca_Saturation_p1
.align 3
.type s5k4ca_Saturation_p1, %object
.size s5k4ca_Saturation_p1, 30
s5k4ca_Saturation_p1:
.hword -772
.hword -12288
.zero 2
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.zero 2
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.hword 16
.zero 2
.hword -1
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.zero 2
.global s5k4ca_Saturation_P2
.align 3
.type s5k4ca_Saturation_P2, %object
.size s5k4ca_Saturation_P2, 30
s5k4ca_Saturation_P2:
.hword -772
.hword -12288
.zero 2
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.zero 2
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.zero 2
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.hword 32
.zero 2
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.zero 2
.global s5k4ca_Sharpness_m2
.align 3
.type s5k4ca_Sharpness_m2, %object
.size s5k4ca_Sharpness_m2, 36
s5k4ca_Sharpness_m2:
.hword -772
.hword -12288
.zero 2
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.zero 2
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.zero 2
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.zero 2
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.zero 2
.hword -1
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.zero 2
.global s5k4ca_Sharpness_m1
.align 3
.type s5k4ca_Sharpness_m1, %object
.size s5k4ca_Sharpness_m1, 36
s5k4ca_Sharpness_m1:
.hword -772
.hword -12288
.zero 2
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.zero 2
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.zero 2
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.zero 2
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.hword 16
.zero 2
.hword -1
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.zero 2
.global s5k4ca_Sharpness_0
.align 3
.type s5k4ca_Sharpness_0, %object
.size s5k4ca_Sharpness_0, 36
s5k4ca_Sharpness_0:
.hword -772
.hword -12288
.zero 2
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.zero 2
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.zero 2
.global s5k4ca_Sharpness_p1
.align 3
.type s5k4ca_Sharpness_p1, %object
.size s5k4ca_Sharpness_p1, 36
s5k4ca_Sharpness_p1:
.hword -772
.hword -12288
.zero 2
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.zero 2
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.zero 2
.global s5k4ca_Sharpness_P2
.align 3
.type s5k4ca_Sharpness_P2, %object
.size s5k4ca_Sharpness_P2, 36
s5k4ca_Sharpness_P2:
.hword -772
.hword -12288
.zero 2
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.zero 2
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.zero 2
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.zero 2
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.zero 2
.global s5k4ca_scene_portrait_on
.align 3
.type s5k4ca_scene_portrait_on, %object
.size s5k4ca_scene_portrait_on, 30
s5k4ca_scene_portrait_on:
.hword -772
.hword -12288
.zero 2
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.zero 2
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.zero 2
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.zero 2
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.zero 2
.global s5k4ca_scene_landscape_on
.align 3
.type s5k4ca_scene_landscape_on, %object
.size s5k4ca_scene_landscape_on, 48
s5k4ca_scene_landscape_on:
.hword -772
.hword -12288
.zero 2
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.zero 2
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.zero 2
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.zero 2
.global s5k4ca_scene_sports_on
.align 3
.type s5k4ca_scene_sports_on, %object
.size s5k4ca_scene_sports_on, 30
s5k4ca_scene_sports_on:
.hword -772
.hword -12288
.zero 2
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.zero 2
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.hword 512
.zero 2
.hword -1
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.zero 2
.global s5k4ca_scene_sunset_on
.align 3
.type s5k4ca_scene_sunset_on, %object
.size s5k4ca_scene_sunset_on, 30
s5k4ca_scene_sunset_on:
.hword -772
.hword -12288
.zero 2
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.zero 2
.hword 42
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.zero 2
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.hword 256
.zero 2
.hword -1
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.zero 2
.global s5k4ca_scene_dawn_on
.align 3
.type s5k4ca_scene_dawn_on, %object
.size s5k4ca_scene_dawn_on, 30
s5k4ca_scene_dawn_on:
.hword -772
.hword -12288
.zero 2
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.zero 2
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.zero 2
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.hword 256
.zero 2
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.zero 2
.global s5k4ca_scene_againstlight_on
.align 3
.type s5k4ca_scene_againstlight_on, %object
.size s5k4ca_scene_againstlight_on, 234
s5k4ca_scene_againstlight_on:
.hword -772
.hword -12288
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.zero 2
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.zero 2
.global s5k4ca_scene_text_on
.align 3
.type s5k4ca_scene_text_on, %object
.size s5k4ca_scene_text_on, 30
s5k4ca_scene_text_on:
.hword -772
.hword -12288
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.zero 2
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.zero 2
.hword -1
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.zero 2
.global s5k4ca_measure_brightness_spot
.align 3
.type s5k4ca_measure_brightness_spot, %object
.size s5k4ca_measure_brightness_spot, 240
s5k4ca_measure_brightness_spot:
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.hword -12288
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.global s5k4ca_measure_brightness_default
.align 3
.type s5k4ca_measure_brightness_default, %object
.size s5k4ca_measure_brightness_default, 240
s5k4ca_measure_brightness_default:
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.zero 2
.global s5k4ca_measure_brightness_center
.align 3
.type s5k4ca_measure_brightness_center, %object
.size s5k4ca_measure_brightness_center, 240
s5k4ca_measure_brightness_center:
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.global s5k4ca_reg
.bss
.align 3
.type s5k4ca_reg, %object
.size s5k4ca_reg, 0
s5k4ca_reg:
.global s5k4ca_reg_vga
.align 3
.type s5k4ca_reg_vga, %object
.size s5k4ca_reg_vga, 0
s5k4ca_reg_vga:
.global s5k4ca_reg_svga
.align 3
.type s5k4ca_reg_svga, %object
.size s5k4ca_reg_svga, 0
s5k4ca_reg_svga:
.global s5k4ca_reg_sxga
.align 3
.type s5k4ca_reg_sxga, %object
.size s5k4ca_reg_sxga, 0
s5k4ca_reg_sxga:
.global s5k4ca_reg_uxga
.align 3
.type s5k4ca_reg_uxga, %object
.size s5k4ca_reg_uxga, 0
s5k4ca_reg_uxga:
.global s5k4ca_reg_qsvga
.align 3
.type s5k4ca_reg_qsvga, %object
.size s5k4ca_reg_qsvga, 0
s5k4ca_reg_qsvga:
.global s5k4ca_preview_04
.data
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.size s5k4ca_preview_04, 414
s5k4ca_preview_04:
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.global s5k4ca_init0_04
.align 3
.type s5k4ca_init0_04, %object
.size s5k4ca_init0_04, 42
s5k4ca_init0_04:
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.global s5k4ca_init1_04
.align 3
.type s5k4ca_init1_04, %object
.size s5k4ca_init1_04, 19044
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.align 3
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s5k4ca_nightmode_off_04:
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.align 3
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s5k4ca_fps_nonfix_04:
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.align 3
.type s5k4ca_fps_15fix_04, %object
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s5k4ca_fps_15fix_04:
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.global s5k4ca_fps_7fix_04
.align 3
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s5k4ca_fps_7fix_04:
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.align 3
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s5k4ca_effect_off_04:
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.align 3
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s5k4ca_effect_gray_04:
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.align 3
.type s5k4ca_effect_negative_04, %object
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s5k4ca_effect_negative_04:
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.align 3
.type s5k4ca_effect_sepia_04, %object
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s5k4ca_effect_sepia_04:
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.align 3
.type s5k4ca_effect_aqua_04, %object
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s5k4ca_effect_aqua_04:
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.align 3
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s5k4ca_effect_sketch_04:
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.align 3
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s5k4ca_wb_auto_04:
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.align 3
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s5k4ca_wb_sunny_04:
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.align 3
.type s5k4ca_wb_cloudy_04, %object
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s5k4ca_wb_cloudy_04:
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.align 3
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s5k4ca_wb_tungsten_04:
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s5k4ca_wb_fluorescent_04:
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s5k4ca_br_minus4_04:
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s5k4ca_br_minus3_04:
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s5k4ca_br_minus2_04:
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s5k4ca_br_minus1_04:
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.align 3
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s5k4ca_br_zero_04:
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s5k4ca_br_plus1_04:
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s5k4ca_br_plus2_04:
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s5k4ca_br_plus3_04:
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s5k4ca_br_plus4_04:
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.align 3
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s5k4ca_iso_auto_04:
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.align 3
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s5k4ca_iso50_04:
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.align 3
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s5k4ca_iso100_04:
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.align 3
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s5k4ca_iso200_04:
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.align 3
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s5k4ca_iso400_04:
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.align 3
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.hword 1400
.zero 2
.hword 3858
.hword 127
.zero 2
.hword -1
.hword -1
.zero 2
.global s5k4ca_measure_brightness_spot_04
.align 3
.type s5k4ca_measure_brightness_spot_04, %object
.size s5k4ca_measure_brightness_spot_04, 240
s5k4ca_measure_brightness_spot_04:
.hword -772
.hword -12288
.zero 2
.hword 40
.hword 28672
.zero 2
.hword 42
.hword 5250
.zero 2
.hword 3858
.hword 0
.zero 2
.hword 3858
.hword 0
.zero 2
.hword 3858
.hword 0
.zero 2
.hword 3858
.hword 0
.zero 2
.hword 3858
.hword 0
.zero 2
.hword 3858
.hword 0
.zero 2
.hword 3858
.hword 0
.zero 2
.hword 3858
.hword 0
.zero 2
.hword 3858
.hword 0
.zero 2
.hword 3858
.hword 0
.zero 2
.hword 3858
.hword 0
.zero 2
.hword 3858
.hword 0
.zero 2
.hword 3858
.hword 0
.zero 2
.hword 3858
.hword 3840
.zero 2
.hword 3858
.hword 15
.zero 2
.hword 3858
.hword 0
.zero 2
.hword 3858
.hword 0
.zero 2
.hword 3858
.hword 3840
.zero 2
.hword 3858
.hword 15
.zero 2
.hword 3858
.hword 0
.zero 2
.hword 3858
.hword 0
.zero 2
.hword 3858
.hword 0
.zero 2
.hword 3858
.hword 0
.zero 2
.hword 3858
.hword 0
.zero 2
.hword 3858
.hword 0
.zero 2
.hword 3858
.hword 0
.zero 2
.hword 3858
.hword 0
.zero 2
.hword 3858
.hword 0
.zero 2
.hword 3858
.hword 0
.zero 2
.hword 3858
.hword 0
.zero 2
.hword 3858
.hword 0
.zero 2
.hword 3858
.hword 0
.zero 2
.hword 42
.hword 1404
.zero 2
.hword 3858
.hword 1
.zero 2
.hword 42
.hword 1404
.zero 2
.hword 3858
.hword 1
.zero 2
.hword -1
.hword -1
.zero 2
.global s5k4ca_measure_brightness_default_04
.align 3
.type s5k4ca_measure_brightness_default_04, %object
.size s5k4ca_measure_brightness_default_04, 240
s5k4ca_measure_brightness_default_04:
.hword -772
.hword -12288
.zero 2
.hword 40
.hword 28672
.zero 2
.hword 42
.hword 5250
.zero 2
.hword 3858
.hword 257
.zero 2
.hword 3858
.hword 257
.zero 2
.hword 3858
.hword 257
.zero 2
.hword 3858
.hword 257
.zero 2
.hword 3858
.hword 257
.zero 2
.hword 3858
.hword 257
.zero 2
.hword 3858
.hword 257
.zero 2
.hword 3858
.hword 257
.zero 2
.hword 3858
.hword 257
.zero 2
.hword 3858
.hword 257
.zero 2
.hword 3858
.hword 257
.zero 2
.hword 3858
.hword 257
.zero 2
.hword 3858
.hword 257
.zero 2
.hword 3858
.hword 257
.zero 2
.hword 3858
.hword 257
.zero 2
.hword 3858
.hword 257
.zero 2
.hword 3858
.hword 257
.zero 2
.hword 3858
.hword 257
.zero 2
.hword 3858
.hword 257
.zero 2
.hword 3858
.hword 257
.zero 2
.hword 3858
.hword 257
.zero 2
.hword 3858
.hword 257
.zero 2
.hword 3858
.hword 257
.zero 2
.hword 3858
.hword 257
.zero 2
.hword 3858
.hword 257
.zero 2
.hword 3858
.hword 257
.zero 2
.hword 3858
.hword 257
.zero 2
.hword 3858
.hword 257
.zero 2
.hword 3858
.hword 257
.zero 2
.hword 3858
.hword 257
.zero 2
.hword 3858
.hword 257
.zero 2
.hword 3858
.hword 257
.zero 2
.hword 42
.hword 1404
.zero 2
.hword 3858
.hword 1
.zero 2
.hword 42
.hword 1404
.zero 2
.hword 3858
.hword 1
.zero 2
.hword -1
.hword -1
.zero 2
.global s5k4ca_ae_awb_unlock
.align 3
.type s5k4ca_ae_awb_unlock, %object
.size s5k4ca_ae_awb_unlock, 30
s5k4ca_ae_awb_unlock:
.hword -772
.hword -12288
.zero 2
.hword 40
.hword 28672
.zero 2
.hword 42
.hword 1400
.zero 2
.hword 3858
.hword 127
.zero 2
.hword -1
.hword -1
.zero 2
.global s5k4ca_ae_mwb_unlock
.align 3
.type s5k4ca_ae_mwb_unlock, %object
.size s5k4ca_ae_mwb_unlock, 30
s5k4ca_ae_mwb_unlock:
.hword -772
.hword -12288
.zero 2
.hword 40
.hword 28672
.zero 2
.hword 42
.hword 1400
.zero 2
.hword 3858
.hword 119
.zero 2
.hword -1
.hword -1
.zero 2
.global s5k4ca_ae_awb_lock
.align 3
.type s5k4ca_ae_awb_lock, %object
.size s5k4ca_ae_awb_lock, 30
s5k4ca_ae_awb_lock:
.hword -772
.hword -12288
.zero 2
.hword 40
.hword 28672
.zero 2
.hword 42
.hword 1400
.zero 2
.hword 3858
.hword 117
.zero 2
.hword -1
.hword -1
.zero 2
.global s5k4ca_af_low_lux_val
.align 3
.type s5k4ca_af_low_lux_val, %object
.size s5k4ca_af_low_lux_val, 12
s5k4ca_af_low_lux_val:
.hword 40
.hword 28672
.zero 2
.hword -1
.hword -1
.zero 2
.global s5k4ca_af_normal_lux_val
.align 3
.type s5k4ca_af_normal_lux_val, %object
.size s5k4ca_af_normal_lux_val, 12
s5k4ca_af_normal_lux_val:
.hword 40
.hword 28672
.zero 2
.hword -1
.hword -1
.zero 2
.global s5k4ca_measure_brightness_center_04
.align 3
.type s5k4ca_measure_brightness_center_04, %object
.size s5k4ca_measure_brightness_center_04, 240
s5k4ca_measure_brightness_center_04:
.hword -772
.hword -12288
.zero 2
.hword 40
.hword 28672
.zero 2
.hword 42
.hword 5250
.zero 2
.hword 3858
.hword 0
.zero 2
.hword 3858
.hword 0
.zero 2
.hword 3858
.hword 0
.zero 2
.hword 3858
.hword 0
.zero 2
.hword 3858
.hword 257
.zero 2
.hword 3858
.hword 257
.zero 2
.hword 3858
.hword 257
.zero 2
.hword 3858
.hword 257
.zero 2
.hword 3858
.hword 257
.zero 2
.hword 3858
.hword 257
.zero 2
.hword 3858
.hword 257
.zero 2
.hword 3858
.hword 257
.zero 2
.hword 3858
.hword 257
.zero 2
.hword 3858
.hword 1025
.zero 2
.hword 3858
.hword 260
.zero 2
.hword 3858
.hword 257
.zero 2
.hword 3858
.hword 257
.zero 2
.hword 3858
.hword 1025
.zero 2
.hword 3858
.hword 260
.zero 2
.hword 3858
.hword 257
.zero 2
.hword 3858
.hword 257
.zero 2
.hword 3858
.hword 513
.zero 2
.hword 3858
.hword 258
.zero 2
.hword 3858
.hword 257
.zero 2
.hword 3858
.hword 257
.zero 2
.hword 3858
.hword 513
.zero 2
.hword 3858
.hword 258
.zero 2
.hword 3858
.hword 257
.zero 2
.hword 3858
.hword 257
.zero 2
.hword 3858
.hword 257
.zero 2
.hword 3858
.hword 257
.zero 2
.hword 3858
.hword 257
.zero 2
.hword 42
.hword 1404
.zero 2
.hword 3858
.hword 1
.zero 2
.hword 42
.hword 1404
.zero 2
.hword 3858
.hword 1
.zero 2
.hword -1
.hword -1
.zero 2
.global s5k4ca_metering_spot
.align 3
.type s5k4ca_metering_spot, %object
.size s5k4ca_metering_spot, 240
s5k4ca_metering_spot:
.hword -772
.hword -12288
.zero 2
.hword 40
.hword 28672
.zero 2
.hword 42
.hword 5250
.zero 2
.hword 3858
.hword 0
.zero 2
.hword 3858
.hword 0
.zero 2
.hword 3858
.hword 0
.zero 2
.hword 3858
.hword 0
.zero 2
.hword 3858
.hword 0
.zero 2
.hword 3858
.hword 0
.zero 2
.hword 3858
.hword 0
.zero 2
.hword 3858
.hword 0
.zero 2
.hword 3858
.hword 0
.zero 2
.hword 3858
.hword 0
.zero 2
.hword 3858
.hword 0
.zero 2
.hword 3858
.hword 0
.zero 2
.hword 3858
.hword 0
.zero 2
.hword 3858
.hword 3840
.zero 2
.hword 3858
.hword 15
.zero 2
.hword 3858
.hword 0
.zero 2
.hword 3858
.hword 0
.zero 2
.hword 3858
.hword 3840
.zero 2
.hword 3858
.hword 15
.zero 2
.hword 3858
.hword 0
.zero 2
.hword 3858
.hword 0
.zero 2
.hword 3858
.hword 0
.zero 2
.hword 3858
.hword 0
.zero 2
.hword 3858
.hword 0
.zero 2
.hword 3858
.hword 0
.zero 2
.hword 3858
.hword 0
.zero 2
.hword 3858
.hword 0
.zero 2
.hword 3858
.hword 0
.zero 2
.hword 3858
.hword 0
.zero 2
.hword 3858
.hword 0
.zero 2
.hword 3858
.hword 0
.zero 2
.hword 3858
.hword 0
.zero 2
.hword 42
.hword 1404
.zero 2
.hword 3858
.hword 1
.zero 2
.hword 42
.hword 1404
.zero 2
.hword 3858
.hword 1
.zero 2
.hword -1
.hword -1
.zero 2
.global s5k4ca_metering_matrix
.align 3
.type s5k4ca_metering_matrix, %object
.size s5k4ca_metering_matrix, 240
s5k4ca_metering_matrix:
.hword -772
.hword -12288
.zero 2
.hword 40
.hword 28672
.zero 2
.hword 42
.hword 5250
.zero 2
.hword 3858
.hword 257
.zero 2
.hword 3858
.hword 257
.zero 2
.hword 3858
.hword 257
.zero 2
.hword 3858
.hword 257
.zero 2
.hword 3858
.hword 257
.zero 2
.hword 3858
.hword 257
.zero 2
.hword 3858
.hword 257
.zero 2
.hword 3858
.hword 257
.zero 2
.hword 3858
.hword 257
.zero 2
.hword 3858
.hword 257
.zero 2
.hword 3858
.hword 257
.zero 2
.hword 3858
.hword 257
.zero 2
.hword 3858
.hword 257
.zero 2
.hword 3858
.hword 257
.zero 2
.hword 3858
.hword 257
.zero 2
.hword 3858
.hword 257
.zero 2
.hword 3858
.hword 257
.zero 2
.hword 3858
.hword 257
.zero 2
.hword 3858
.hword 257
.zero 2
.hword 3858
.hword 257
.zero 2
.hword 3858
.hword 257
.zero 2
.hword 3858
.hword 257
.zero 2
.hword 3858
.hword 257
.zero 2
.hword 3858
.hword 257
.zero 2
.hword 3858
.hword 257
.zero 2
.hword 3858
.hword 257
.zero 2
.hword 3858
.hword 257
.zero 2
.hword 3858
.hword 257
.zero 2
.hword 3858
.hword 257
.zero 2
.hword 3858
.hword 257
.zero 2
.hword 3858
.hword 257
.zero 2
.hword 3858
.hword 257
.zero 2
.hword 42
.hword 1404
.zero 2
.hword 3858
.hword 1
.zero 2
.hword 42
.hword 1404
.zero 2
.hword 3858
.hword 1
.zero 2
.hword -1
.hword -1
.zero 2
.global s5k4ca_metering_center
.align 3
.type s5k4ca_metering_center, %object
.size s5k4ca_metering_center, 240
s5k4ca_metering_center:
.hword -772
.hword -12288
.zero 2
.hword 40
.hword 28672
.zero 2
.hword 42
.hword 5250
.zero 2
.hword 3858
.hword 0
.zero 2
.hword 3858
.hword 0
.zero 2
.hword 3858
.hword 0
.zero 2
.hword 3858
.hword 0
.zero 2
.hword 3858
.hword 257
.zero 2
.hword 3858
.hword 257
.zero 2
.hword 3858
.hword 257
.zero 2
.hword 3858
.hword 257
.zero 2
.hword 3858
.hword 257
.zero 2
.hword 3858
.hword 257
.zero 2
.hword 3858
.hword 257
.zero 2
.hword 3858
.hword 257
.zero 2
.hword 3858
.hword 257
.zero 2
.hword 3858
.hword 1025
.zero 2
.hword 3858
.hword 260
.zero 2
.hword 3858
.hword 257
.zero 2
.hword 3858
.hword 257
.zero 2
.hword 3858
.hword 1025
.zero 2
.hword 3858
.hword 260
.zero 2
.hword 3858
.hword 257
.zero 2
.hword 3858
.hword 257
.zero 2
.hword 3858
.hword 513
.zero 2
.hword 3858
.hword 258
.zero 2
.hword 3858
.hword 257
.zero 2
.hword 3858
.hword 257
.zero 2
.hword 3858
.hword 513
.zero 2
.hword 3858
.hword 258
.zero 2
.hword 3858
.hword 257
.zero 2
.hword 3858
.hword 257
.zero 2
.hword 3858
.hword 257
.zero 2
.hword 3858
.hword 257
.zero 2
.hword 3858
.hword 257
.zero 2
.hword 42
.hword 1404
.zero 2
.hword 3858
.hword 1
.zero 2
.hword 42
.hword 1404
.zero 2
.hword 3858
.hword 1
.zero 2
.hword -1
.hword -1
.zero 2
.global s5k4ca_reg_04
.bss
.align 3
.type s5k4ca_reg_04, %object
.size s5k4ca_reg_04, 0
s5k4ca_reg_04:
.global s5k4ca_reg_vga_04
.align 3
.type s5k4ca_reg_vga_04, %object
.size s5k4ca_reg_vga_04, 0
s5k4ca_reg_vga_04:
.global s5k4ca_reg_svga_04
.align 3
.type s5k4ca_reg_svga_04, %object
.size s5k4ca_reg_svga_04, 0
s5k4ca_reg_svga_04:
.global s5k4ca_reg_sxga_04
.align 3
.type s5k4ca_reg_sxga_04, %object
.size s5k4ca_reg_sxga_04, 0
s5k4ca_reg_sxga_04:
.global s5k4ca_reg_uxga_04
.align 3
.type s5k4ca_reg_uxga_04, %object
.size s5k4ca_reg_uxga_04, 0
s5k4ca_reg_uxga_04:
.global s5k4ca_reg_qsvga_04
.align 3
.type s5k4ca_reg_qsvga_04, %object
.size s5k4ca_reg_qsvga_04, 0
s5k4ca_reg_qsvga_04:
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global main
.type main, %function
main:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str w0, [sp, 28]
str x1, [sp, 16]
ldr x1, [sp, 16]
ldr w0, [sp, 28]
bl charybdis_main
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC0:
.string "Usage: dmesg [OPTION]"
.align 3
.LC1:
.string " -c clear the ring buffer"
.align 3
.LC2:
.string " -s buffer size (1 = 1 char)"
.align 3
.LC3:
.string "hcs:"
.text
.align 2
.global main
.type main, %function
main:
.LFB6:
.cfi_startproc
stp x29, x30, [sp, -160]!
.cfi_def_cfa_offset 160
.cfi_offset 29, -160
.cfi_offset 30, -152
mov x29, sp
.cfi_def_cfa_register 29
stp x19, x20, [sp, 16]
stp x21, x22, [sp, 32]
stp x23, x24, [sp, 48]
stp x25, x26, [sp, 64]
str x27, [sp, 80]
sub sp, sp, #16
.cfi_offset 19, -144
.cfi_offset 20, -136
.cfi_offset 21, -128
.cfi_offset 22, -120
.cfi_offset 23, -112
.cfi_offset 24, -104
.cfi_offset 25, -96
.cfi_offset 26, -88
.cfi_offset 27, -80
str w0, [x29, 108]
str x1, [x29, 96]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [x29, 152]
mov x1, 0
mov w2, 0
mov x1, 0
mov w0, 10
bl klogctl
sxtw x0, w0
str x0, [x29, 120]
str xzr, [x29, 128]
str wzr, [x29, 112]
b .L2
.L7:
ldr w0, [x29, 116]
cmp w0, 115
beq .L3
ldr w0, [x29, 116]
cmp w0, 115
bgt .L17
ldr w0, [x29, 116]
cmp w0, 99
beq .L5
ldr w0, [x29, 116]
cmp w0, 104
beq .L6
b .L4
.L5:
mov w0, 1
str w0, [x29, 112]
b .L2
.L3:
adrp x0, :got:optarg
ldr x0, [x0, #:got_lo12:optarg]
ldr x0, [x0]
bl atoi
sxtw x0, w0
str x0, [x29, 120]
b .L2
.L6:
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl puts
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl puts
adrp x0, .LC2
add x0, x0, :lo12:.LC2
bl puts
mov w0, 0
bl exit
.L4:
.L17:
nop
.L2:
adrp x0, .LC3
add x2, x0, :lo12:.LC3
ldr x1, [x29, 96]
ldr w0, [x29, 108]
bl getopt
str w0, [x29, 116]
ldr w0, [x29, 116]
cmn w0, #1
bne .L7
ldr x0, [x29, 120]
mov x1, sp
mov x19, x1
mov x1, x0
sub x1, x1, #1
str x1, [x29, 136]
mov x26, x0
mov x27, 0
lsr x1, x26, 61
lsl x23, x27, 3
orr x23, x1, x23
lsl x22, x26, 3
mov x24, x0
mov x25, 0
lsr x1, x24, 61
lsl x21, x25, 3
orr x21, x1, x21
lsl x20, x24, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L8:
cmp sp, x1
beq .L9
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L8
.L9:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L10
str xzr, [sp, 1024]
.L10:
add x0, sp, 16
add x0, x0, 0
str x0, [x29, 144]
ldr x0, [x29, 120]
mov w2, w0
ldr x1, [x29, 144]
mov w0, 3
bl klogctl
b .L11
.L13:
ldr x1, [x29, 144]
ldr x0, [x29, 128]
add x0, x1, x0
ldrb w0, [x0]
bl putchar
ldr x1, [x29, 144]
ldr x0, [x29, 128]
add x0, x1, x0
ldrb w0, [x0]
cmp w0, 10
bne .L12
ldr x0, [x29, 128]
add x0, x0, 3
str x0, [x29, 128]
.L12:
ldr x0, [x29, 128]
add x0, x0, 1
str x0, [x29, 128]
.L11:
ldr x1, [x29, 144]
ldr x0, [x29, 128]
add x0, x1, x0
ldrb w0, [x0]
cmp w0, 0
bne .L13
ldr w0, [x29, 112]
cmp w0, 1
bne .L14
ldr x0, [x29, 120]
mov w2, w0
mov x1, 0
mov w0, 5
bl klogctl
.L14:
mov w0, 0
mov sp, x19
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [x29, 152]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L16
bl __stack_chk_fail
.L16:
mov w0, w1
mov sp, x29
ldp x19, x20, [sp, 16]
ldp x21, x22, [sp, 32]
ldp x23, x24, [sp, 48]
ldp x25, x26, [sp, 64]
ldr x27, [sp, 80]
ldp x29, x30, [sp], 160
.cfi_restore 30
.cfi_restore 29
.cfi_restore 27
.cfi_restore 25
.cfi_restore 26
.cfi_restore 23
.cfi_restore 24
.cfi_restore 21
.cfi_restore 22
.cfi_restore 19
.cfi_restore 20
.cfi_def_cfa 31, 0
ret
.cfi_endproc
.LFE6:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.global errcode
.bss
.align 2
.type errcode, %object
.size errcode, 4
errcode:
.zero 4
.section .rodata
.align 3
.LC0:
.string "rm: unknown option %s\n"
.align 3
.LC1:
.string ".."
.align 3
.LC2:
.string "rm: cannot remove `..'\n"
.text
.align 2
.global main
.type main, %function
main:
.LFB6:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str x19, [sp, 16]
.cfi_offset 19, -48
str w0, [sp, 44]
str x1, [sp, 32]
str wzr, [sp, 52]
mov w0, 0
bl isatty
cmp w0, 0
bne .L2
ldr w0, [sp, 52]
add w0, w0, 1
str w0, [sp, 52]
.L2:
str wzr, [sp, 56]
str wzr, [sp, 60]
ldr w0, [sp, 44]
cmp w0, 1
ble .L10
ldr x0, [sp, 32]
add x0, x0, 8
ldr x0, [x0]
ldrb w0, [x0]
cmp w0, 45
bne .L10
ldr x0, [sp, 32]
add x0, x0, 8
str x0, [sp, 32]
ldr x0, [sp, 32]
ldr x19, [x0]
ldr w0, [sp, 44]
sub w0, w0, #1
str w0, [sp, 44]
b .L4
.L9:
ldrb w0, [x19]
cmp w0, 114
beq .L5
cmp w0, 114
bgt .L6
cmp w0, 102
beq .L7
cmp w0, 105
beq .L8
b .L6
.L7:
ldr w0, [sp, 52]
add w0, w0, 1
str w0, [sp, 52]
b .L4
.L8:
ldr w0, [sp, 56]
add w0, w0, 1
str w0, [sp, 56]
b .L4
.L5:
ldr w0, [sp, 60]
add w0, w0, 1
str w0, [sp, 60]
b .L4
.L6:
ldr x0, [sp, 32]
ldr x0, [x0]
mov x1, x0
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl printf
mov w0, 1
bl exit
.L4:
add x19, x19, 1
ldrb w0, [x19]
cmp w0, 0
bne .L9
b .L10
.L12:
ldr x0, [sp, 32]
add x0, x0, 8
str x0, [sp, 32]
ldr x0, [sp, 32]
ldr x2, [x0]
adrp x0, .LC1
add x1, x0, :lo12:.LC1
mov x0, x2
bl strcmp
cmp w0, 0
bne .L11
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x0, [x0]
mov x3, x0
mov x2, 23
mov x1, 1
adrp x0, .LC2
add x0, x0, :lo12:.LC2
bl fwrite
b .L10
.L11:
ldr x0, [sp, 32]
ldr x0, [x0]
mov w4, 0
ldr w3, [sp, 56]
ldr w2, [sp, 60]
ldr w1, [sp, 52]
bl rm
.L10:
ldr w0, [sp, 44]
sub w0, w0, #1
str w0, [sp, 44]
ldr w0, [sp, 44]
cmp w0, 0
bgt .L12
adrp x0, errcode
add x0, x0, :lo12:errcode
ldr w0, [x0]
bl exit
.cfi_endproc
.LFE6:
.size main, .-main
.section .rodata
.align 3
.LC3:
.string "rm: %s nonexistent\n"
.align 3
.LC4:
.string "%s not changed\n"
.align 3
.LC5:
.string "directory %s: "
.align 3
.LC6:
.string "%s/%.14s"
.align 3
.LC7:
.string "rm: %s directory\n"
.align 3
.LC8:
.string "%s: "
.align 3
.LC9:
.string "rm: %s %o mode "
.align 3
.LC10:
.string "rm: %s not removed\n"
.text
.align 2
.global rm
.type rm, %function
rm:
.LFB7:
.cfi_startproc
stp x29, x30, [sp, -304]!
.cfi_def_cfa_offset 304
.cfi_offset 29, -304
.cfi_offset 30, -296
mov x29, sp
str x0, [sp, 40]
str w1, [sp, 36]
str w2, [sp, 32]
str w3, [sp, 28]
str w4, [sp, 24]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 296]
mov x1, 0
add x0, sp, 64
mov x1, x0
ldr x0, [sp, 40]
bl stat
cmp w0, 0
beq .L14
ldr w0, [sp, 36]
cmp w0, 0
bne .L30
ldr x1, [sp, 40]
adrp x0, .LC3
add x0, x0, :lo12:.LC3
bl printf
adrp x0, errcode
add x0, x0, :lo12:errcode
ldr w0, [x0]
add w1, w0, 1
adrp x0, errcode
add x0, x0, :lo12:errcode
str w1, [x0]
b .L30
.L14:
ldr w0, [sp, 80]
and w0, w0, 61440
cmp w0, 16384
bne .L17
ldr w0, [sp, 32]
cmp w0, 0
beq .L18
mov w1, 2
ldr x0, [sp, 40]
bl access
cmp w0, 0
bge .L19
ldr w0, [sp, 36]
cmp w0, 0
bne .L20
ldr x1, [sp, 40]
adrp x0, .LC4
add x0, x0, :lo12:.LC4
bl printf
.L20:
adrp x0, errcode
add x0, x0, :lo12:errcode
ldr w0, [x0]
add w1, w0, 1
adrp x0, errcode
add x0, x0, :lo12:errcode
str w1, [x0]
b .L13
.L19:
ldr w0, [sp, 28]
cmp w0, 0
beq .L21
ldr w0, [sp, 24]
cmp w0, 0
beq .L21
ldr x1, [sp, 40]
adrp x0, .LC5
add x0, x0, :lo12:.LC5
bl printf
bl yes
cmp w0, 0
beq .L31
.L21:
ldr x0, [sp, 40]
bl opendir
str x0, [sp, 48]
b .L22
.L23:
ldr x0, [sp, 56]
ldr x0, [x0]
cmp x0, 0
beq .L22
ldr x0, [sp, 56]
add x0, x0, 19
bl dotname
cmp w0, 0
bne .L22
ldr x0, [sp, 56]
add x0, x0, 19
add x4, sp, 192
mov x3, x0
ldr x2, [sp, 40]
adrp x0, .LC6
add x1, x0, :lo12:.LC6
mov x0, x4
bl sprintf
ldr w0, [sp, 24]
add w1, w0, 1
add x0, sp, 192
mov w4, w1
ldr w3, [sp, 28]
ldr w2, [sp, 32]
ldr w1, [sp, 36]
bl rm
.L22:
ldr x0, [sp, 48]
bl readdir
str x0, [sp, 56]
ldr x0, [sp, 56]
cmp x0, 0
bne .L23
ldr x0, [sp, 48]
bl closedir
ldr w1, [sp, 28]
ldr x0, [sp, 40]
bl rmdir_rm
mov w1, w0
adrp x0, errcode
add x0, x0, :lo12:errcode
ldr w0, [x0]
add w1, w1, w0
adrp x0, errcode
add x0, x0, :lo12:errcode
str w1, [x0]
b .L13
.L18:
ldr x1, [sp, 40]
adrp x0, .LC7
add x0, x0, :lo12:.LC7
bl printf
adrp x0, errcode
add x0, x0, :lo12:errcode
ldr w0, [x0]
add w1, w0, 1
adrp x0, errcode
add x0, x0, :lo12:errcode
str w1, [x0]
b .L13
.L17:
ldr w0, [sp, 28]
cmp w0, 0
beq .L24
ldr x1, [sp, 40]
adrp x0, .LC8
add x0, x0, :lo12:.LC8
bl printf
bl yes
cmp w0, 0
bne .L25
b .L13
.L24:
ldr w0, [sp, 36]
cmp w0, 0
bne .L25
mov w1, 2
ldr x0, [sp, 40]
bl access
cmp w0, 0
bge .L25
ldr w0, [sp, 80]
and w0, w0, 511
mov w2, w0
ldr x1, [sp, 40]
adrp x0, .LC9
add x0, x0, :lo12:.LC9
bl printf
bl yes
cmp w0, 0
beq .L32
.L25:
ldr x0, [sp, 40]
bl unlink
cmp w0, 0
beq .L13
ldr w0, [sp, 36]
cmp w0, 0
beq .L27
ldr w0, [sp, 28]
cmp w0, 0
beq .L13
.L27:
ldr x1, [sp, 40]
adrp x0, .LC10
add x0, x0, :lo12:.LC10
bl printf
adrp x0, errcode
add x0, x0, :lo12:errcode
ldr w0, [x0]
add w1, w0, 1
adrp x0, errcode
add x0, x0, :lo12:errcode
str w1, [x0]
b .L13
.L30:
nop
b .L13
.L31:
nop
b .L13
.L32:
nop
.L13:
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [sp, 296]
ldr x1, [x0]
subs x2, x2, x1
mov x1, 0
beq .L29
bl __stack_chk_fail
.L29:
ldp x29, x30, [sp], 304
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE7:
.size rm, .-rm
.align 2
.global dotname
.type dotname, %function
dotname:
.LFB8:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str x0, [sp, 8]
ldr x0, [sp, 8]
ldrb w0, [x0]
cmp w0, 46
bne .L34
ldr x0, [sp, 8]
add x0, x0, 1
ldrb w0, [x0]
cmp w0, 46
bne .L35
ldr x0, [sp, 8]
add x0, x0, 2
ldrb w0, [x0]
cmp w0, 0
bne .L36
mov w0, 1
b .L37
.L36:
mov w0, 0
b .L37
.L35:
ldr x0, [sp, 8]
add x0, x0, 1
ldrb w0, [x0]
cmp w0, 0
bne .L34
mov w0, 1
b .L37
.L34:
mov w0, 0
.L37:
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE8:
.size dotname, .-dotname
.align 2
.global rmdir_rm
.type rmdir_rm, %function
rmdir_rm:
.LFB9:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str x0, [sp, 24]
str w1, [sp, 20]
ldr x0, [sp, 24]
bl dotname
cmp w0, 0
beq .L39
mov w0, 0
b .L40
.L39:
ldr w0, [sp, 20]
cmp w0, 0
beq .L41
ldr x1, [sp, 24]
adrp x0, .LC8
add x0, x0, :lo12:.LC8
bl printf
bl yes
cmp w0, 0
bne .L41
mov w0, 0
b .L40
.L41:
ldr x0, [sp, 24]
bl rmdir
cmp w0, 0
cset w0, ne
and w0, w0, 255
.L40:
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE9:
.size rmdir_rm, .-rmdir_rm
.align 2
.global yes
.type yes, %function
yes:
.LFB10:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
bl getchar
str w0, [sp, 24]
ldr w0, [sp, 24]
str w0, [sp, 28]
b .L43
.L45:
bl getchar
str w0, [sp, 24]
.L43:
ldr w0, [sp, 24]
cmp w0, 10
beq .L44
ldr w0, [sp, 24]
cmn w0, #1
bne .L45
.L44:
ldr w0, [sp, 28]
cmp w0, 121
cset w0, eq
and w0, w0, 255
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE10:
.size yes, .-yes
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global mul16s_HDG
.type mul16s_HDG, %function
mul16s_HDG:
.LFB6:
.cfi_startproc
sub sp, sp, #1680
.cfi_def_cfa_offset 1680
strh w0, [sp, 14]
strh w1, [sp, 12]
strb wzr, [sp, 19]
strb wzr, [sp, 20]
ldrh w0, [sp, 12]
lsr w0, w0, 1
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 1
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 21]
ldrh w0, [sp, 12]
lsr w0, w0, 4
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 14
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 22]
ldrh w0, [sp, 12]
lsr w0, w0, 4
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 15
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 23]
ldrh w0, [sp, 12]
lsr w0, w0, 13
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 6
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 24]
ldrh w0, [sp, 12]
lsr w0, w0, 14
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 5
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 25]
ldrh w0, [sp, 12]
lsr w0, w0, 15
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 4
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 26]
ldrh w0, [sp, 12]
lsr w0, w0, 12
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 7
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 27]
ldrh w0, [sp, 12]
lsr w0, w0, 11
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 8
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 28]
ldrh w0, [sp, 12]
lsr w0, w0, 10
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 9
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 29]
ldrh w0, [sp, 12]
lsr w0, w0, 3
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 3
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 30]
ldrh w0, [sp, 12]
lsr w0, w0, 9
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 10
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 31]
ldrh w0, [sp, 12]
lsr w0, w0, 8
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 11
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 32]
ldrh w0, [sp, 12]
lsr w0, w0, 7
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 12
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 33]
ldrh w0, [sp, 12]
lsr w0, w0, 6
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 13
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 34]
ldrh w0, [sp, 12]
lsr w0, w0, 5
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 14
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 35]
ldrh w0, [sp, 12]
lsr w0, w0, 5
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 1
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 36]
ldrh w0, [sp, 12]
lsr w0, w0, 5
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 15
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 37]
ldrh w0, [sp, 12]
lsr w0, w0, 4
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 2
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 38]
ldrh w0, [sp, 12]
lsr w0, w0, 2
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 4
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 39]
ldrh w0, [sp, 12]
lsr w0, w0, 1
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 5
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 40]
ldrh w0, [sp, 12]
lsr w0, w0, 15
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 5
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 41]
ldrh w0, [sp, 12]
lsr w0, w0, 14
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 6
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 42]
ldrh w0, [sp, 12]
lsr w0, w0, 13
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 7
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 43]
ldrh w0, [sp, 12]
lsr w0, w0, 12
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 8
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 44]
ldrh w0, [sp, 12]
lsr w0, w0, 11
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 9
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 45]
ldrh w0, [sp, 12]
lsr w0, w0, 10
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 10
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 46]
ldrh w0, [sp, 12]
lsr w0, w0, 9
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 11
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 47]
ldrh w0, [sp, 12]
lsr w0, w0, 8
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 12
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 48]
ldrh w0, [sp, 12]
lsr w0, w0, 7
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 13
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 49]
ldrh w0, [sp, 12]
lsr w0, w0, 6
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 14
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 50]
ldrh w0, [sp, 12]
lsr w0, w0, 6
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 15
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 51]
ldrh w0, [sp, 12]
lsr w0, w0, 13
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 8
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 52]
ldrh w0, [sp, 12]
lsr w0, w0, 14
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 7
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 53]
ldrh w0, [sp, 12]
lsr w0, w0, 15
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 6
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 54]
ldrh w0, [sp, 12]
lsr w0, w0, 12
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 9
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 55]
ldrh w0, [sp, 12]
lsr w0, w0, 11
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 10
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 56]
ldrh w0, [sp, 12]
lsr w0, w0, 10
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 11
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 57]
ldrh w0, [sp, 12]
lsr w0, w0, 9
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 12
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 58]
ldrh w0, [sp, 12]
lsr w0, w0, 8
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 13
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 59]
ldrh w0, [sp, 12]
lsr w0, w0, 7
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 14
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 60]
ldrh w0, [sp, 12]
lsr w0, w0, 7
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 15
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 61]
ldrh w0, [sp, 12]
lsr w0, w0, 15
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 7
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 62]
ldrh w0, [sp, 12]
lsr w0, w0, 14
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 8
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 63]
ldrh w0, [sp, 12]
lsr w0, w0, 13
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 9
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 64]
ldrh w0, [sp, 12]
lsr w0, w0, 12
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 10
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 65]
ldrh w0, [sp, 12]
lsr w0, w0, 11
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 11
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 66]
ldrh w0, [sp, 12]
lsr w0, w0, 10
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 12
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 67]
ldrh w0, [sp, 12]
lsr w0, w0, 9
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 13
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 68]
ldrh w0, [sp, 12]
lsr w0, w0, 8
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 14
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 69]
ldrh w0, [sp, 12]
lsr w0, w0, 8
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 15
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 70]
ldrh w0, [sp, 12]
lsr w0, w0, 4
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 3
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 71]
ldrh w0, [sp, 12]
lsr w0, w0, 6
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 1
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 72]
ldrh w0, [sp, 12]
lsr w0, w0, 13
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 10
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 73]
ldrh w0, [sp, 12]
lsr w0, w0, 14
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 9
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 74]
ldrh w0, [sp, 12]
lsr w0, w0, 5
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 2
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 75]
ldrh w0, [sp, 12]
lsr w0, w0, 15
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 8
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 76]
ldrh w0, [sp, 12]
lsr w0, w0, 12
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 11
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 77]
ldrh w0, [sp, 12]
lsr w0, w0, 11
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 12
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 78]
ldrh w0, [sp, 12]
lsr w0, w0, 10
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 13
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 79]
ldrh w0, [sp, 12]
lsr w0, w0, 9
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 14
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 80]
ldrh w0, [sp, 12]
lsr w0, w0, 3
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 4
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 81]
ldrh w0, [sp, 12]
lsr w0, w0, 2
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 5
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 82]
ldrh w0, [sp, 12]
lsr w0, w0, 9
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 15
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 83]
ldrh w0, [sp, 12]
lsr w0, w0, 1
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 6
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 84]
ldrh w0, [sp, 12]
lsr w0, w0, 15
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 9
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 85]
ldrh w0, [sp, 12]
lsr w0, w0, 14
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 10
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 86]
ldrh w0, [sp, 12]
lsr w0, w0, 13
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 11
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 87]
ldrh w0, [sp, 12]
lsr w0, w0, 12
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 12
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 88]
ldrh w0, [sp, 12]
lsr w0, w0, 11
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 13
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 89]
ldrh w0, [sp, 12]
lsr w0, w0, 10
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 14
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 90]
ldrh w0, [sp, 12]
lsr w0, w0, 10
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 15
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 91]
ldrh w0, [sp, 12]
lsr w0, w0, 13
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 12
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 92]
ldrh w0, [sp, 12]
lsr w0, w0, 14
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 11
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 93]
ldrh w0, [sp, 12]
lsr w0, w0, 15
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 10
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 94]
ldrh w0, [sp, 12]
lsr w0, w0, 12
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 13
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 95]
ldrh w0, [sp, 12]
lsr w0, w0, 11
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 14
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 96]
ldrh w0, [sp, 12]
lsr w0, w0, 11
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 15
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 97]
ldrh w0, [sp, 12]
lsr w0, w0, 15
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 11
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 98]
ldrh w0, [sp, 12]
lsr w0, w0, 14
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 12
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 99]
ldrh w0, [sp, 12]
lsr w0, w0, 13
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 13
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 100]
ldrh w0, [sp, 12]
lsr w0, w0, 12
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 14
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 101]
ldrh w0, [sp, 12]
lsr w0, w0, 12
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 15
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 102]
ldrh w0, [sp, 12]
lsr w0, w0, 13
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 14
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 103]
ldrh w0, [sp, 12]
lsr w0, w0, 14
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 13
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 104]
ldrh w0, [sp, 12]
lsr w0, w0, 15
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 12
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 105]
ldrh w0, [sp, 12]
lsr w0, w0, 13
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 15
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 106]
ldrh w0, [sp, 12]
lsr w0, w0, 15
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 13
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 107]
ldrh w0, [sp, 12]
lsr w0, w0, 14
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 14
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 108]
ldrh w0, [sp, 12]
lsr w0, w0, 14
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 15
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 109]
ldrh w0, [sp, 12]
lsr w0, w0, 15
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 14
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 110]
ldrh w0, [sp, 12]
lsr w0, w0, 15
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 15
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 111]
ldrh w0, [sp, 12]
lsr w0, w0, 5
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 3
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 112]
ldrh w0, [sp, 12]
lsr w0, w0, 7
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 1
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 113]
ldrh w0, [sp, 12]
lsr w0, w0, 6
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 2
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 114]
ldrh w0, [sp, 12]
lsr w0, w0, 4
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 4
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 115]
ldrh w0, [sp, 12]
lsr w0, w0, 3
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 5
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 116]
ldrh w0, [sp, 12]
lsr w0, w0, 2
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 6
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 117]
ldrh w0, [sp, 12]
lsr w0, w0, 1
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 7
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 118]
ldrh w0, [sp, 12]
lsr w0, w0, 6
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 3
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 119]
ldrh w0, [sp, 12]
lsr w0, w0, 8
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 1
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 120]
ldrh w0, [sp, 12]
lsr w0, w0, 7
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 2
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 121]
ldrh w0, [sp, 12]
lsr w0, w0, 5
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 4
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 122]
ldrh w0, [sp, 12]
lsr w0, w0, 4
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 5
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 123]
ldrh w0, [sp, 12]
lsr w0, w0, 3
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 6
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 124]
ldrh w0, [sp, 12]
lsr w0, w0, 2
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 7
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 125]
ldrh w0, [sp, 12]
lsr w0, w0, 1
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 8
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 126]
ldrh w0, [sp, 12]
lsr w0, w0, 7
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 3
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 127]
ldrh w0, [sp, 12]
lsr w0, w0, 9
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 1
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 128]
ldrh w0, [sp, 12]
lsr w0, w0, 8
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 2
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 129]
ldrh w0, [sp, 12]
lsr w0, w0, 6
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 4
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 130]
ldrh w0, [sp, 12]
lsr w0, w0, 5
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 5
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 131]
ldrh w0, [sp, 12]
lsr w0, w0, 4
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 6
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 132]
ldrh w0, [sp, 12]
lsr w0, w0, 3
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 7
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 133]
ldrh w0, [sp, 12]
lsr w0, w0, 2
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 8
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 134]
ldrh w0, [sp, 12]
lsr w0, w0, 1
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 9
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 135]
ldrh w0, [sp, 12]
lsr w0, w0, 8
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 3
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 136]
ldrh w0, [sp, 12]
lsr w0, w0, 10
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 1
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 137]
ldrh w0, [sp, 12]
lsr w0, w0, 9
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 2
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 138]
ldrh w0, [sp, 12]
lsr w0, w0, 7
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 4
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 139]
ldrh w0, [sp, 12]
lsr w0, w0, 6
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 5
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 140]
ldrh w0, [sp, 12]
lsr w0, w0, 5
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 6
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 141]
ldrh w0, [sp, 12]
lsr w0, w0, 4
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 7
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 142]
ldrh w0, [sp, 12]
lsr w0, w0, 3
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 8
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 143]
ldrh w0, [sp, 12]
lsr w0, w0, 2
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 9
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 144]
ldrh w0, [sp, 12]
lsr w0, w0, 1
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 10
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 145]
ldrh w0, [sp, 12]
lsr w0, w0, 9
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 3
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 146]
ldrh w0, [sp, 12]
lsr w0, w0, 11
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 1
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 147]
ldrh w0, [sp, 12]
lsr w0, w0, 10
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 2
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 148]
ldrh w0, [sp, 12]
lsr w0, w0, 8
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 4
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 149]
ldrh w0, [sp, 12]
lsr w0, w0, 7
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 5
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 150]
ldrh w0, [sp, 12]
lsr w0, w0, 6
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 6
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 151]
ldrh w0, [sp, 12]
lsr w0, w0, 5
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 7
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 152]
ldrh w0, [sp, 12]
lsr w0, w0, 4
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 8
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 153]
ldrh w0, [sp, 12]
lsr w0, w0, 3
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 9
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 154]
ldrh w0, [sp, 12]
lsr w0, w0, 2
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 10
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 155]
ldrh w0, [sp, 12]
lsr w0, w0, 1
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 11
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 156]
ldrh w0, [sp, 12]
lsr w0, w0, 10
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 3
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 157]
ldrh w0, [sp, 12]
lsr w0, w0, 12
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 1
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 158]
ldrh w0, [sp, 12]
lsr w0, w0, 11
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 2
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 159]
ldrh w0, [sp, 12]
lsr w0, w0, 9
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 4
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 160]
ldrh w0, [sp, 12]
lsr w0, w0, 8
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 5
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 161]
ldrh w0, [sp, 12]
lsr w0, w0, 7
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 6
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 162]
ldrh w0, [sp, 12]
lsr w0, w0, 6
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 7
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 163]
ldrh w0, [sp, 12]
lsr w0, w0, 5
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 8
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 164]
ldrh w0, [sp, 12]
lsr w0, w0, 4
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 9
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 165]
ldrh w0, [sp, 12]
lsr w0, w0, 3
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 10
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 166]
ldrh w0, [sp, 12]
lsr w0, w0, 2
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 11
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 167]
ldrh w0, [sp, 12]
lsr w0, w0, 1
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 12
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 168]
ldrh w0, [sp, 12]
lsr w0, w0, 11
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 3
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 169]
ldrh w0, [sp, 12]
lsr w0, w0, 13
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 1
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 170]
ldrh w0, [sp, 12]
lsr w0, w0, 12
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 2
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 171]
ldrh w0, [sp, 12]
lsr w0, w0, 10
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 4
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 172]
ldrh w0, [sp, 12]
lsr w0, w0, 9
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 5
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 173]
ldrh w0, [sp, 12]
lsr w0, w0, 8
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 6
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 174]
ldrh w0, [sp, 12]
lsr w0, w0, 7
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 7
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 175]
ldrh w0, [sp, 12]
lsr w0, w0, 6
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 8
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 176]
ldrh w0, [sp, 12]
lsr w0, w0, 5
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 9
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 177]
ldrh w0, [sp, 12]
lsr w0, w0, 4
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 10
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 178]
ldrh w0, [sp, 12]
lsr w0, w0, 3
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 11
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 179]
ldrh w0, [sp, 12]
lsr w0, w0, 2
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 12
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 180]
ldrh w0, [sp, 12]
lsr w0, w0, 1
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 13
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 181]
ldrh w0, [sp, 12]
lsr w0, w0, 12
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 3
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 182]
ldrh w0, [sp, 12]
lsr w0, w0, 14
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 1
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 183]
ldrh w0, [sp, 12]
lsr w0, w0, 13
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 2
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 184]
ldrh w0, [sp, 12]
lsr w0, w0, 11
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 4
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 185]
ldrh w0, [sp, 12]
lsr w0, w0, 10
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 5
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 186]
ldrh w0, [sp, 12]
lsr w0, w0, 9
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 6
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 187]
ldrh w0, [sp, 12]
lsr w0, w0, 8
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 7
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 188]
ldrh w0, [sp, 12]
lsr w0, w0, 7
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 8
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 189]
ldrh w0, [sp, 12]
lsr w0, w0, 6
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 9
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 190]
ldrh w0, [sp, 12]
lsr w0, w0, 5
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 10
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 191]
ldrh w0, [sp, 12]
lsr w0, w0, 4
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 11
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 192]
ldrh w0, [sp, 12]
lsr w0, w0, 3
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 12
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 193]
ldrh w0, [sp, 12]
lsr w0, w0, 2
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 13
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 194]
ldrh w0, [sp, 12]
lsr w0, w0, 1
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 14
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 195]
ldrh w0, [sp, 12]
lsr w0, w0, 2
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 2
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 196]
ldrh w0, [sp, 12]
lsr w0, w0, 1
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 15
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 197]
ldrh w0, [sp, 12]
lsr w0, w0, 1
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 2
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 198]
ldrh w0, [sp, 12]
lsr w0, w0, 2
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 1
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 199]
ldrh w0, [sp, 12]
lsr w0, w0, 1
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 3
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 200]
ldrh w0, [sp, 12]
lsr w0, w0, 3
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 1
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 201]
ldrh w0, [sp, 12]
lsr w0, w0, 13
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 3
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 202]
ldrh w0, [sp, 12]
lsr w0, w0, 15
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 1
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 203]
ldrh w0, [sp, 12]
lsr w0, w0, 14
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 2
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 204]
ldrh w0, [sp, 12]
lsr w0, w0, 12
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 4
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 205]
ldrh w0, [sp, 12]
lsr w0, w0, 11
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 5
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 206]
ldrh w0, [sp, 12]
lsr w0, w0, 10
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 6
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 207]
ldrh w0, [sp, 12]
lsr w0, w0, 9
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 7
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 208]
ldrh w0, [sp, 12]
lsr w0, w0, 8
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 8
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 209]
ldrh w0, [sp, 12]
lsr w0, w0, 7
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 9
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 210]
ldrh w0, [sp, 12]
lsr w0, w0, 6
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 10
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 211]
ldrh w0, [sp, 12]
lsr w0, w0, 5
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 11
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 212]
ldrh w0, [sp, 12]
lsr w0, w0, 4
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 12
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 213]
ldrh w0, [sp, 12]
lsr w0, w0, 3
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 13
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 214]
ldrh w0, [sp, 12]
lsr w0, w0, 2
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 14
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 215]
ldrh w0, [sp, 12]
lsr w0, w0, 2
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 15
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 216]
ldrh w0, [sp, 12]
lsr w0, w0, 2
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 3
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 217]
ldrh w0, [sp, 12]
lsr w0, w0, 14
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 3
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 218]
ldrh w0, [sp, 12]
lsr w0, w0, 15
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 2
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 219]
ldrh w0, [sp, 12]
lsr w0, w0, 13
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 4
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 220]
ldrh w0, [sp, 12]
lsr w0, w0, 12
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 5
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 221]
ldrh w0, [sp, 12]
lsr w0, w0, 11
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 6
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 222]
ldrh w0, [sp, 12]
lsr w0, w0, 10
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 7
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 223]
ldrh w0, [sp, 12]
lsr w0, w0, 9
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 8
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 224]
ldrh w0, [sp, 12]
lsr w0, w0, 8
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 9
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 225]
ldrh w0, [sp, 12]
lsr w0, w0, 7
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 10
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 226]
ldrh w0, [sp, 12]
lsr w0, w0, 6
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 11
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 227]
ldrh w0, [sp, 12]
lsr w0, w0, 5
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 12
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 228]
ldrh w0, [sp, 12]
lsr w0, w0, 4
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 13
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 229]
ldrh w0, [sp, 12]
lsr w0, w0, 3
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 14
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 230]
ldrh w0, [sp, 12]
lsr w0, w0, 4
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 1
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 231]
ldrh w0, [sp, 12]
lsr w0, w0, 3
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 15
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 232]
ldrh w0, [sp, 12]
lsr w0, w0, 3
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 2
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 233]
ldrh w0, [sp, 12]
lsr w0, w0, 1
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 4
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 234]
ldrh w0, [sp, 12]
lsr w0, w0, 13
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 5
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 235]
ldrh w0, [sp, 12]
lsr w0, w0, 14
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 4
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 236]
ldrh w0, [sp, 14]
lsr w0, w0, 3
and w0, w0, 65535
and w1, w0, 255
ldrh w0, [sp, 14]
lsr w0, w0, 2
and w0, w0, 65535
and w0, w0, 255
orr w0, w1, w0
and w0, w0, 255
and w0, w0, 1
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 237]
ldrh w0, [sp, 12]
lsr w0, w0, 12
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 6
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 238]
ldrh w0, [sp, 12]
lsr w0, w0, 11
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 7
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 239]
ldrh w0, [sp, 12]
lsr w0, w0, 10
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 8
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 240]
ldrh w0, [sp, 12]
lsr w0, w0, 9
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 9
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 241]
ldrh w0, [sp, 12]
lsr w0, w0, 8
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 10
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 242]
ldrh w0, [sp, 12]
lsr w0, w0, 7
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 11
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 243]
ldrh w0, [sp, 12]
lsr w0, w0, 6
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 12
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 244]
ldrh w0, [sp, 12]
lsr w0, w0, 5
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrh w0, [sp, 14]
lsr w0, w0, 13
and w0, w0, 65535
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 245]
ldrb w1, [sp, 233]
ldrb w0, [sp, 231]
and w0, w1, w0
strb w0, [sp, 246]
ldrb w1, [sp, 38]
ldrb w0, [sp, 36]
eor w0, w1, w0
strb w0, [sp, 247]
ldrb w1, [sp, 38]
ldrb w0, [sp, 36]
and w0, w1, w0
strb w0, [sp, 248]
ldrb w1, [sp, 75]
ldrb w0, [sp, 72]
eor w0, w1, w0
strb w0, [sp, 249]
ldrb w1, [sp, 75]
ldrb w0, [sp, 72]
and w0, w1, w0
strb w0, [sp, 250]
ldrb w1, [sp, 114]
ldrb w0, [sp, 113]
eor w0, w1, w0
strb w0, [sp, 251]
ldrb w1, [sp, 114]
ldrb w0, [sp, 113]
and w0, w1, w0
strb w0, [sp, 252]
ldrb w1, [sp, 121]
ldrb w0, [sp, 120]
eor w0, w1, w0
strb w0, [sp, 253]
ldrb w1, [sp, 121]
ldrb w0, [sp, 120]
and w0, w1, w0
strb w0, [sp, 254]
ldrb w1, [sp, 129]
ldrb w0, [sp, 128]
eor w0, w1, w0
strb w0, [sp, 255]
ldrb w1, [sp, 129]
ldrb w0, [sp, 128]
and w0, w1, w0
strb w0, [sp, 256]
ldrb w1, [sp, 138]
ldrb w0, [sp, 137]
eor w0, w1, w0
strb w0, [sp, 257]
ldrb w1, [sp, 138]
ldrb w0, [sp, 137]
and w0, w1, w0
strb w0, [sp, 258]
ldrb w1, [sp, 148]
ldrb w0, [sp, 147]
eor w0, w1, w0
strb w0, [sp, 259]
ldrb w1, [sp, 148]
ldrb w0, [sp, 147]
and w0, w1, w0
strb w0, [sp, 260]
ldrb w1, [sp, 159]
ldrb w0, [sp, 158]
eor w0, w1, w0
strb w0, [sp, 261]
ldrb w1, [sp, 159]
ldrb w0, [sp, 158]
and w0, w1, w0
strb w0, [sp, 262]
ldrb w1, [sp, 171]
ldrb w0, [sp, 170]
eor w0, w1, w0
strb w0, [sp, 263]
ldrb w1, [sp, 171]
ldrb w0, [sp, 170]
and w0, w1, w0
strb w0, [sp, 264]
ldrb w1, [sp, 184]
ldrb w0, [sp, 183]
eor w0, w1, w0
strb w0, [sp, 265]
ldrb w1, [sp, 196]
ldrb w0, [sp, 21]
and w0, w1, w0
strb w0, [sp, 266]
ldrb w1, [sp, 199]
ldrb w0, [sp, 198]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 267]
ldrb w1, [sp, 201]
ldrb w0, [sp, 196]
eor w0, w1, w0
strb w0, [sp, 268]
ldrb w1, [sp, 184]
ldrb w0, [sp, 183]
and w0, w1, w0
strb w0, [sp, 269]
ldrb w1, [sp, 204]
ldrb w0, [sp, 203]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 270]
ldrb w1, [sp, 201]
ldrb w0, [sp, 196]
and w0, w1, w0
strb w0, [sp, 271]
ldrsb w0, [sp, 203]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 204]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 272]
ldrb w1, [sp, 233]
ldrb w0, [sp, 231]
eor w0, w1, w0
strb w0, [sp, 273]
ldrb w1, [sp, 218]
ldrb w0, [sp, 219]
and w0, w1, w0
strb w0, [sp, 274]
ldrh w0, [sp, 12]
lsr w0, w0, 15
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrsb w0, [sp, 237]
mvn w0, w0
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 275]
ldrh w0, [sp, 14]
lsr w0, w0, 3
and w0, w0, 65535
and w1, w0, 255
ldrb w0, [sp, 219]
and w0, w1, w0
and w0, w0, 255
and w0, w0, 1
strb w0, [sp, 276]
ldrb w1, [sp, 267]
ldrb w0, [sp, 266]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 277]
ldrb w1, [sp, 217]
ldrb w0, [sp, 271]
and w0, w1, w0
strb w0, [sp, 278]
ldrb w1, [sp, 217]
ldrb w0, [sp, 273]
and w0, w1, w0
strb w0, [sp, 279]
ldrb w1, [sp, 273]
ldrb w0, [sp, 271]
and w0, w1, w0
strb w0, [sp, 280]
ldrb w1, [sp, 30]
ldrb w0, [sp, 246]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 281]
ldrb w1, [sp, 26]
ldrb w0, [sp, 275]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 282]
ldrh w0, [sp, 14]
lsr w0, w0, 4
and w0, w0, 65535
and w1, w0, 255
ldrb w0, [sp, 275]
and w0, w1, w0
and w0, w0, 255
and w0, w0, 1
strb w0, [sp, 283]
ldrb w1, [sp, 30]
ldrb w0, [sp, 246]
and w0, w1, w0
strb w0, [sp, 284]
ldrb w1, [sp, 30]
ldrb w0, [sp, 247]
and w0, w1, w0
strb w0, [sp, 285]
ldrb w1, [sp, 247]
ldrb w0, [sp, 246]
and w0, w1, w0
strb w0, [sp, 286]
ldrb w1, [sp, 71]
ldrb w0, [sp, 248]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 287]
ldrb w1, [sp, 71]
ldrb w0, [sp, 248]
and w0, w1, w0
strb w0, [sp, 288]
ldrb w1, [sp, 71]
ldrb w0, [sp, 249]
and w0, w1, w0
strb w0, [sp, 289]
ldrb w1, [sp, 249]
ldrb w0, [sp, 248]
and w0, w1, w0
strb w0, [sp, 290]
ldrb w1, [sp, 112]
ldrb w0, [sp, 250]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 291]
ldrb w1, [sp, 112]
ldrb w0, [sp, 250]
and w0, w1, w0
strb w0, [sp, 292]
ldrb w1, [sp, 112]
ldrb w0, [sp, 251]
and w0, w1, w0
strb w0, [sp, 293]
ldrb w1, [sp, 251]
ldrb w0, [sp, 250]
and w0, w1, w0
strb w0, [sp, 294]
ldrb w1, [sp, 119]
ldrb w0, [sp, 252]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 295]
ldrb w1, [sp, 119]
ldrb w0, [sp, 252]
and w0, w1, w0
strb w0, [sp, 296]
ldrb w1, [sp, 119]
ldrb w0, [sp, 253]
and w0, w1, w0
strb w0, [sp, 297]
ldrb w1, [sp, 253]
ldrb w0, [sp, 252]
and w0, w1, w0
strb w0, [sp, 298]
ldrb w1, [sp, 127]
ldrb w0, [sp, 254]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 299]
ldrb w1, [sp, 127]
ldrb w0, [sp, 254]
and w0, w1, w0
strb w0, [sp, 300]
ldrb w1, [sp, 127]
ldrb w0, [sp, 255]
and w0, w1, w0
strb w0, [sp, 301]
ldrb w1, [sp, 255]
ldrb w0, [sp, 254]
and w0, w1, w0
strb w0, [sp, 302]
ldrb w1, [sp, 136]
ldrb w0, [sp, 256]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 303]
ldrb w1, [sp, 136]
ldrb w0, [sp, 256]
and w0, w1, w0
strb w0, [sp, 304]
ldrb w1, [sp, 136]
ldrb w0, [sp, 257]
and w0, w1, w0
strb w0, [sp, 305]
ldrb w1, [sp, 257]
ldrb w0, [sp, 256]
and w0, w1, w0
strb w0, [sp, 306]
ldrb w1, [sp, 146]
ldrb w0, [sp, 258]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 307]
ldrb w1, [sp, 146]
ldrb w0, [sp, 258]
and w0, w1, w0
strb w0, [sp, 308]
ldrb w1, [sp, 146]
ldrb w0, [sp, 259]
and w0, w1, w0
strb w0, [sp, 309]
ldrb w1, [sp, 259]
ldrb w0, [sp, 258]
and w0, w1, w0
strb w0, [sp, 310]
ldrb w1, [sp, 157]
ldrb w0, [sp, 260]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 311]
ldrb w1, [sp, 157]
ldrb w0, [sp, 260]
and w0, w1, w0
strb w0, [sp, 312]
ldrb w1, [sp, 157]
ldrb w0, [sp, 261]
and w0, w1, w0
strb w0, [sp, 313]
ldrb w1, [sp, 261]
ldrb w0, [sp, 260]
and w0, w1, w0
strb w0, [sp, 314]
ldrb w1, [sp, 169]
ldrb w0, [sp, 262]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 315]
ldrb w1, [sp, 169]
ldrb w0, [sp, 262]
and w0, w1, w0
strb w0, [sp, 316]
ldrb w1, [sp, 169]
ldrb w0, [sp, 263]
and w0, w1, w0
strb w0, [sp, 317]
ldrb w1, [sp, 263]
ldrb w0, [sp, 262]
and w0, w1, w0
strb w0, [sp, 318]
ldrb w1, [sp, 182]
ldrb w0, [sp, 264]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 319]
ldrb w1, [sp, 200]
ldrb w0, [sp, 266]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 320]
ldrb w1, [sp, 182]
ldrb w0, [sp, 264]
and w0, w1, w0
strb w0, [sp, 321]
ldrb w1, [sp, 182]
ldrb w0, [sp, 265]
and w0, w1, w0
strb w0, [sp, 322]
ldrb w1, [sp, 265]
ldrb w0, [sp, 264]
and w0, w1, w0
strb w0, [sp, 323]
ldrb w1, [sp, 202]
ldrb w0, [sp, 269]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 324]
ldrb w1, [sp, 200]
ldrb w0, [sp, 266]
and w0, w1, w0
strb w0, [sp, 325]
ldrb w1, [sp, 200]
ldrb w0, [sp, 268]
and w0, w1, w0
strb w0, [sp, 326]
ldrb w1, [sp, 268]
ldrb w0, [sp, 266]
and w0, w1, w0
strb w0, [sp, 327]
ldrb w1, [sp, 217]
ldrb w0, [sp, 271]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 328]
ldrb w1, [sp, 202]
ldrb w0, [sp, 269]
and w0, w1, w0
strb w0, [sp, 329]
ldrb w1, [sp, 202]
ldrb w0, [sp, 270]
and w0, w1, w0
strb w0, [sp, 330]
ldrb w1, [sp, 270]
ldrb w0, [sp, 269]
and w0, w1, w0
strb w0, [sp, 331]
ldrb w1, [sp, 218]
ldrb w0, [sp, 272]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 332]
ldrb w1, [sp, 218]
ldrb w0, [sp, 272]
and w0, w1, w0
strb w0, [sp, 333]
ldrb w1, [sp, 219]
ldrb w0, [sp, 272]
and w0, w1, w0
strb w0, [sp, 334]
ldrsb w0, [sp, 276]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 275]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 335]
ldrb w1, [sp, 268]
ldrb w0, [sp, 320]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 336]
ldrb w1, [sp, 279]
ldrb w0, [sp, 278]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 337]
ldrb w1, [sp, 247]
ldrb w0, [sp, 281]
eor w0, w1, w0
strb w0, [sp, 338]
ldrb w1, [sp, 236]
ldrb w0, [sp, 335]
and w0, w1, w0
strb w0, [sp, 339]
ldrb w1, [sp, 283]
ldrb w0, [sp, 282]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 340]
ldrb w1, [sp, 41]
ldrb w0, [sp, 282]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 341]
ldrsb w0, [sp, 41]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 282]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 342]
ldrb w1, [sp, 285]
ldrb w0, [sp, 284]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 343]
ldrb w1, [sp, 249]
ldrb w0, [sp, 287]
eor w0, w1, w0
strb w0, [sp, 344]
ldrb w1, [sp, 289]
ldrb w0, [sp, 288]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 345]
ldrb w1, [sp, 251]
ldrb w0, [sp, 291]
eor w0, w1, w0
strb w0, [sp, 346]
ldrb w1, [sp, 293]
ldrb w0, [sp, 292]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 347]
ldrb w1, [sp, 253]
ldrb w0, [sp, 295]
eor w0, w1, w0
strb w0, [sp, 348]
ldrb w1, [sp, 297]
ldrb w0, [sp, 296]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 349]
ldrb w1, [sp, 255]
ldrb w0, [sp, 299]
eor w0, w1, w0
strb w0, [sp, 350]
ldrb w1, [sp, 301]
ldrb w0, [sp, 300]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 351]
ldrb w1, [sp, 257]
ldrb w0, [sp, 303]
eor w0, w1, w0
strb w0, [sp, 352]
ldrb w1, [sp, 305]
ldrb w0, [sp, 304]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 353]
ldrb w1, [sp, 259]
ldrb w0, [sp, 307]
eor w0, w1, w0
strb w0, [sp, 354]
ldrb w1, [sp, 309]
ldrb w0, [sp, 308]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 355]
ldrb w1, [sp, 261]
ldrb w0, [sp, 311]
eor w0, w1, w0
strb w0, [sp, 356]
ldrb w1, [sp, 313]
ldrb w0, [sp, 312]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 357]
ldrb w1, [sp, 263]
ldrb w0, [sp, 315]
eor w0, w1, w0
strb w0, [sp, 358]
ldrb w1, [sp, 317]
ldrb w0, [sp, 316]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 359]
ldrb w1, [sp, 265]
ldrb w0, [sp, 319]
eor w0, w1, w0
strb w0, [sp, 360]
ldrb w1, [sp, 322]
ldrb w0, [sp, 321]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 361]
ldrb w1, [sp, 270]
ldrb w0, [sp, 324]
eor w0, w1, w0
strb w0, [sp, 362]
ldrb w1, [sp, 326]
ldrb w0, [sp, 325]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 363]
ldrb w1, [sp, 273]
ldrb w0, [sp, 328]
eor w0, w1, w0
strb w0, [sp, 364]
ldrb w1, [sp, 330]
ldrb w0, [sp, 329]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 365]
ldrb w1, [sp, 219]
ldrb w0, [sp, 332]
eor w0, w1, w0
strb w0, [sp, 366]
ldrb w1, [sp, 274]
ldrb w0, [sp, 333]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 367]
ldrsb w0, [sp, 280]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 337]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 368]
ldrb w1, [sp, 25]
ldrb w0, [sp, 340]
and w0, w1, w0
strb w0, [sp, 369]
ldrb w1, [sp, 42]
ldrb w0, [sp, 341]
and w0, w1, w0
strb w0, [sp, 370]
ldrsb w0, [sp, 54]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 342]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 371]
ldrsb w0, [sp, 338]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 39]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 372]
ldrh w0, [sp, 14]
lsr w0, w0, 6
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrsb w0, [sp, 342]
mvn w0, w0
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 373]
ldrsb w0, [sp, 286]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 343]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 374]
ldrsb w0, [sp, 344]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 81]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 375]
ldrsb w0, [sp, 290]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 345]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 376]
ldrsb w0, [sp, 346]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 115]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 377]
ldrsb w0, [sp, 294]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 347]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 378]
ldrsb w0, [sp, 348]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 122]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 379]
ldrsb w0, [sp, 298]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 349]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 380]
ldrsb w0, [sp, 350]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 130]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 381]
ldrsb w0, [sp, 302]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 351]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 382]
ldrsb w0, [sp, 352]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 139]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 383]
ldrsb w0, [sp, 306]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 353]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 384]
ldrsb w0, [sp, 354]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 149]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 385]
ldrsb w0, [sp, 310]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 355]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 386]
ldrsb w0, [sp, 356]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 160]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 387]
ldrsb w0, [sp, 314]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 357]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 388]
ldrsb w0, [sp, 358]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 172]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 389]
ldrsb w0, [sp, 318]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 359]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 390]
ldrsb w0, [sp, 360]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 185]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 391]
ldrsb w0, [sp, 323]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 361]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 392]
ldrsb w0, [sp, 327]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 363]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 393]
ldrsb w0, [sp, 362]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 205]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 394]
ldrsb w0, [sp, 331]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 365]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 395]
ldrsb w0, [sp, 366]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 220]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 396]
ldrsb w0, [sp, 364]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 234]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 397]
ldrsb w0, [sp, 334]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 367]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 398]
ldrb w1, [sp, 338]
ldrb w0, [sp, 368]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 399]
ldrsb w0, [sp, 398]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 236]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 400]
ldrsb w0, [sp, 398]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 335]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 401]
ldrb w1, [sp, 338]
ldrb w0, [sp, 368]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 402]
ldrb w1, [sp, 373]
ldrb w0, [sp, 371]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 403]
ldrsb w0, [sp, 368]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 39]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 404]
ldrb w1, [sp, 344]
ldrb w0, [sp, 374]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 405]
ldrb w1, [sp, 62]
ldrb w0, [sp, 371]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 406]
ldrsb w0, [sp, 62]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 371]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 407]
ldrb w1, [sp, 344]
ldrb w0, [sp, 374]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 408]
ldrsb w0, [sp, 374]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 81]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 409]
ldrb w1, [sp, 346]
ldrb w0, [sp, 376]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 410]
ldrb w1, [sp, 346]
ldrb w0, [sp, 376]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 411]
ldrsb w0, [sp, 376]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 115]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 412]
ldrb w1, [sp, 348]
ldrb w0, [sp, 378]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 413]
ldrb w1, [sp, 348]
ldrb w0, [sp, 378]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 414]
ldrsb w0, [sp, 378]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 122]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 415]
ldrb w1, [sp, 350]
ldrb w0, [sp, 380]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 416]
ldrb w1, [sp, 350]
ldrb w0, [sp, 380]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 417]
ldrsb w0, [sp, 380]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 130]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 418]
ldrb w1, [sp, 352]
ldrb w0, [sp, 382]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 419]
ldrb w1, [sp, 352]
ldrb w0, [sp, 382]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 420]
ldrsb w0, [sp, 382]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 139]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 421]
ldrb w1, [sp, 354]
ldrb w0, [sp, 384]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 422]
ldrb w1, [sp, 354]
ldrb w0, [sp, 384]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 423]
ldrsb w0, [sp, 384]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 149]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 424]
ldrb w1, [sp, 356]
ldrb w0, [sp, 386]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 425]
ldrb w1, [sp, 356]
ldrb w0, [sp, 386]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 426]
ldrsb w0, [sp, 386]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 160]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 427]
ldrb w1, [sp, 358]
ldrb w0, [sp, 388]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 428]
ldrb w1, [sp, 358]
ldrb w0, [sp, 388]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 429]
ldrsb w0, [sp, 388]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 172]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 430]
ldrb w1, [sp, 360]
ldrb w0, [sp, 390]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 431]
ldrb w1, [sp, 360]
ldrb w0, [sp, 390]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 432]
ldrsb w0, [sp, 390]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 185]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 433]
ldrb w1, [sp, 362]
ldrb w0, [sp, 392]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 434]
ldrb w1, [sp, 364]
ldrb w0, [sp, 393]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 435]
ldrb w1, [sp, 362]
ldrb w0, [sp, 392]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 436]
ldrsb w0, [sp, 392]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 205]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 437]
ldrb w1, [sp, 366]
ldrb w0, [sp, 395]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 438]
ldrb w1, [sp, 364]
ldrb w0, [sp, 393]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 439]
ldrb w1, [sp, 366]
ldrb w0, [sp, 395]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 440]
ldrsb w0, [sp, 395]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 220]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 441]
ldrb w1, [sp, 236]
ldrb w0, [sp, 398]
eor w0, w1, w0
strb w0, [sp, 442]
ldrsb w0, [sp, 393]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 234]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 443]
ldrb w1, [sp, 234]
ldrb w0, [sp, 435]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 444]
ldrb w1, [sp, 39]
ldrb w0, [sp, 399]
eor w0, w1, w0
strb w0, [sp, 445]
ldrb w1, [sp, 339]
ldrb w0, [sp, 400]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 446]
ldrb w1, [sp, 372]
ldrb w0, [sp, 402]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 447]
ldrb w1, [sp, 81]
ldrb w0, [sp, 405]
eor w0, w1, w0
strb w0, [sp, 448]
ldrb w1, [sp, 53]
ldrb w0, [sp, 403]
and w0, w1, w0
strb w0, [sp, 449]
ldrb w1, [sp, 63]
ldrb w0, [sp, 406]
and w0, w1, w0
strb w0, [sp, 450]
ldrsb w0, [sp, 76]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 407]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 451]
ldrh w0, [sp, 14]
lsr w0, w0, 8
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrsb w0, [sp, 407]
mvn w0, w0
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 452]
ldrb w1, [sp, 375]
ldrb w0, [sp, 408]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 453]
ldrb w1, [sp, 115]
ldrb w0, [sp, 410]
eor w0, w1, w0
strb w0, [sp, 454]
ldrb w1, [sp, 377]
ldrb w0, [sp, 411]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 455]
ldrb w1, [sp, 122]
ldrb w0, [sp, 413]
eor w0, w1, w0
strb w0, [sp, 456]
ldrb w1, [sp, 379]
ldrb w0, [sp, 414]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 457]
ldrb w1, [sp, 130]
ldrb w0, [sp, 416]
eor w0, w1, w0
strb w0, [sp, 458]
ldrb w1, [sp, 381]
ldrb w0, [sp, 417]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 459]
ldrb w1, [sp, 139]
ldrb w0, [sp, 419]
eor w0, w1, w0
strb w0, [sp, 460]
ldrb w1, [sp, 383]
ldrb w0, [sp, 420]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 461]
ldrb w1, [sp, 149]
ldrb w0, [sp, 422]
eor w0, w1, w0
strb w0, [sp, 462]
ldrb w1, [sp, 385]
ldrb w0, [sp, 423]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 463]
ldrb w1, [sp, 160]
ldrb w0, [sp, 425]
eor w0, w1, w0
strb w0, [sp, 464]
ldrb w1, [sp, 387]
ldrb w0, [sp, 426]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 465]
ldrb w1, [sp, 172]
ldrb w0, [sp, 428]
eor w0, w1, w0
strb w0, [sp, 466]
ldrb w1, [sp, 389]
ldrb w0, [sp, 429]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 467]
ldrb w1, [sp, 185]
ldrb w0, [sp, 431]
eor w0, w1, w0
strb w0, [sp, 468]
ldrb w1, [sp, 391]
ldrb w0, [sp, 432]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 469]
ldrb w1, [sp, 205]
ldrb w0, [sp, 434]
eor w0, w1, w0
strb w0, [sp, 470]
ldrb w1, [sp, 394]
ldrb w0, [sp, 436]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 471]
ldrb w1, [sp, 220]
ldrb w0, [sp, 438]
eor w0, w1, w0
strb w0, [sp, 472]
ldrb w1, [sp, 397]
ldrb w0, [sp, 439]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 473]
ldrb w1, [sp, 396]
ldrb w0, [sp, 440]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 474]
ldrb w1, [sp, 335]
ldrb w0, [sp, 442]
eor w0, w1, w0
strb w0, [sp, 475]
ldrsb w0, [sp, 475]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 235]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 476]
ldrsb w0, [sp, 401]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 446]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 477]
ldrsb w0, [sp, 445]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 40]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 478]
ldrsb w0, [sp, 404]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 447]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 479]
ldrb w1, [sp, 452]
ldrb w0, [sp, 451]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 480]
ldrb w1, [sp, 85]
ldrb w0, [sp, 451]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 481]
ldrsb w0, [sp, 85]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 451]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 482]
ldrsb w0, [sp, 448]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 82]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 483]
ldrsb w0, [sp, 409]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 453]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 484]
ldrsb w0, [sp, 454]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 116]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 485]
ldrsb w0, [sp, 412]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 455]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 486]
ldrsb w0, [sp, 456]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 123]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 487]
ldrsb w0, [sp, 415]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 457]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 488]
ldrsb w0, [sp, 458]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 131]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 489]
ldrsb w0, [sp, 418]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 459]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 490]
ldrsb w0, [sp, 460]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 140]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 491]
ldrsb w0, [sp, 421]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 461]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 492]
ldrsb w0, [sp, 462]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 150]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 493]
ldrsb w0, [sp, 424]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 463]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 494]
ldrsb w0, [sp, 464]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 161]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 495]
ldrsb w0, [sp, 427]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 465]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 496]
ldrsb w0, [sp, 466]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 173]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 497]
ldrsb w0, [sp, 430]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 467]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 498]
ldrsb w0, [sp, 468]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 186]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 499]
ldrsb w0, [sp, 433]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 469]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 500]
ldrsb w0, [sp, 470]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 206]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 501]
ldrsb w0, [sp, 437]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 471]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 502]
ldrsb w0, [sp, 443]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 473]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 503]
ldrsb w0, [sp, 472]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 221]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 504]
ldrsb w0, [sp, 441]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 474]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 505]
ldrsb w0, [sp, 505]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 235]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 506]
ldrb w1, [sp, 475]
ldrb w0, [sp, 505]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 507]
ldrb w1, [sp, 25]
ldrb w0, [sp, 477]
eor w0, w1, w0
strb w0, [sp, 508]
ldrsb w0, [sp, 477]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 25]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 509]
ldrsb w0, [sp, 477]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 340]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 510]
ldrb w1, [sp, 445]
ldrb w0, [sp, 503]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 511]
ldrsb w0, [sp, 503]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 40]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 512]
ldrb w1, [sp, 448]
ldrb w0, [sp, 479]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 513]
ldrb w1, [sp, 74]
ldrb w0, [sp, 480]
and w0, w1, w0
strb w0, [sp, 514]
ldrb w1, [sp, 86]
ldrb w0, [sp, 481]
and w0, w1, w0
strb w0, [sp, 515]
ldrsb w0, [sp, 94]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 482]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 516]
ldrh w0, [sp, 14]
lsr w0, w0, 10
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrsb w0, [sp, 482]
mvn w0, w0
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 517]
ldrb w1, [sp, 448]
ldrb w0, [sp, 479]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 518]
ldrsb w0, [sp, 479]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 82]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 519]
ldrb w1, [sp, 454]
ldrb w0, [sp, 484]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 520]
ldrb w1, [sp, 454]
ldrb w0, [sp, 484]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 521]
ldrsb w0, [sp, 484]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 116]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 522]
ldrb w1, [sp, 456]
ldrb w0, [sp, 486]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 523]
ldrb w1, [sp, 456]
ldrb w0, [sp, 486]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 524]
ldrsb w0, [sp, 486]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 123]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 525]
ldrb w1, [sp, 458]
ldrb w0, [sp, 488]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 526]
ldrb w1, [sp, 458]
ldrb w0, [sp, 488]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 527]
ldrsb w0, [sp, 488]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 131]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 528]
ldrb w1, [sp, 460]
ldrb w0, [sp, 490]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 529]
ldrb w1, [sp, 460]
ldrb w0, [sp, 490]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 530]
ldrsb w0, [sp, 490]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 140]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 531]
ldrb w1, [sp, 462]
ldrb w0, [sp, 492]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 532]
ldrb w1, [sp, 462]
ldrb w0, [sp, 492]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 533]
ldrsb w0, [sp, 492]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 150]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 534]
ldrb w1, [sp, 464]
ldrb w0, [sp, 494]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 535]
ldrb w1, [sp, 464]
ldrb w0, [sp, 494]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 536]
ldrsb w0, [sp, 494]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 161]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 537]
ldrb w1, [sp, 466]
ldrb w0, [sp, 496]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 538]
ldrb w1, [sp, 466]
ldrb w0, [sp, 496]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 539]
ldrsb w0, [sp, 496]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 173]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 540]
ldrb w1, [sp, 468]
ldrb w0, [sp, 498]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 541]
ldrb w1, [sp, 468]
ldrb w0, [sp, 498]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 542]
ldrsb w0, [sp, 498]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 186]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 543]
ldrb w1, [sp, 470]
ldrb w0, [sp, 500]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 544]
ldrb w1, [sp, 470]
ldrb w0, [sp, 500]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 545]
ldrsb w0, [sp, 500]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 206]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 546]
ldrb w1, [sp, 472]
ldrb w0, [sp, 502]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 547]
ldrb w1, [sp, 445]
ldrb w0, [sp, 503]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 548]
ldrb w1, [sp, 472]
ldrb w0, [sp, 502]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 549]
ldrsb w0, [sp, 502]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 221]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 550]
ldrb w1, [sp, 235]
ldrb w0, [sp, 505]
eor w0, w1, w0
strb w0, [sp, 551]
ldrb w1, [sp, 40]
ldrb w0, [sp, 548]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 552]
ldrb w1, [sp, 476]
ldrb w0, [sp, 506]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 553]
ldrb w1, [sp, 340]
ldrb w0, [sp, 508]
eor w0, w1, w0
strb w0, [sp, 554]
ldrb w1, [sp, 369]
ldrb w0, [sp, 509]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 555]
ldrb w1, [sp, 512]
ldrb w0, [sp, 511]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 556]
ldrb w1, [sp, 82]
ldrb w0, [sp, 513]
eor w0, w1, w0
strb w0, [sp, 557]
ldrb w1, [sp, 517]
ldrb w0, [sp, 516]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 558]
ldrb w1, [sp, 519]
ldrb w0, [sp, 518]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 559]
ldrb w1, [sp, 98]
ldrb w0, [sp, 516]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 560]
ldrb w1, [sp, 116]
ldrb w0, [sp, 520]
eor w0, w1, w0
strb w0, [sp, 561]
ldrsb w0, [sp, 98]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 516]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 562]
ldrb w1, [sp, 522]
ldrb w0, [sp, 521]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 563]
ldrb w1, [sp, 123]
ldrb w0, [sp, 523]
eor w0, w1, w0
strb w0, [sp, 564]
ldrb w1, [sp, 525]
ldrb w0, [sp, 524]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 565]
ldrb w1, [sp, 131]
ldrb w0, [sp, 526]
eor w0, w1, w0
strb w0, [sp, 566]
ldrb w1, [sp, 528]
ldrb w0, [sp, 527]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 567]
ldrb w1, [sp, 140]
ldrb w0, [sp, 529]
eor w0, w1, w0
strb w0, [sp, 568]
ldrb w1, [sp, 531]
ldrb w0, [sp, 530]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 569]
ldrb w1, [sp, 150]
ldrb w0, [sp, 532]
eor w0, w1, w0
strb w0, [sp, 570]
ldrb w1, [sp, 534]
ldrb w0, [sp, 533]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 571]
ldrb w1, [sp, 161]
ldrb w0, [sp, 535]
eor w0, w1, w0
strb w0, [sp, 572]
ldrb w1, [sp, 537]
ldrb w0, [sp, 536]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 573]
ldrb w1, [sp, 173]
ldrb w0, [sp, 538]
eor w0, w1, w0
strb w0, [sp, 574]
ldrb w1, [sp, 540]
ldrb w0, [sp, 539]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 575]
ldrb w1, [sp, 186]
ldrb w0, [sp, 541]
eor w0, w1, w0
strb w0, [sp, 576]
ldrb w1, [sp, 543]
ldrb w0, [sp, 542]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 577]
ldrb w1, [sp, 206]
ldrb w0, [sp, 544]
eor w0, w1, w0
strb w0, [sp, 578]
ldrb w1, [sp, 546]
ldrb w0, [sp, 545]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 579]
ldrb w1, [sp, 221]
ldrb w0, [sp, 547]
eor w0, w1, w0
strb w0, [sp, 580]
ldrb w1, [sp, 550]
ldrb w0, [sp, 549]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 581]
ldrb w1, [sp, 475]
ldrb w0, [sp, 551]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 582]
ldrsb w0, [sp, 582]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 238]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 583]
ldrsb w0, [sp, 507]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 553]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 584]
ldrsb w0, [sp, 554]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 24]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 585]
ldrsb w0, [sp, 478]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 556]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 586]
ldrsb w0, [sp, 510]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 555]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 587]
ldrsb w0, [sp, 557]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 84]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 588]
ldrsb w0, [sp, 483]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 559]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 589]
ldrb w1, [sp, 93]
ldrb w0, [sp, 558]
and w0, w1, w0
strb w0, [sp, 590]
ldrb w1, [sp, 99]
ldrb w0, [sp, 560]
and w0, w1, w0
strb w0, [sp, 591]
ldrsb w0, [sp, 105]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 562]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 592]
ldrh w0, [sp, 14]
lsr w0, w0, 12
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrsb w0, [sp, 562]
mvn w0, w0
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 593]
ldrsb w0, [sp, 561]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 117]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 594]
ldrsb w0, [sp, 485]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 563]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 595]
ldrsb w0, [sp, 564]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 124]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 596]
ldrsb w0, [sp, 487]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 565]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 597]
ldrsb w0, [sp, 566]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 132]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 598]
ldrsb w0, [sp, 489]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 567]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 599]
ldrsb w0, [sp, 568]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 141]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 600]
ldrsb w0, [sp, 491]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 569]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 601]
ldrsb w0, [sp, 570]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 151]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 602]
ldrsb w0, [sp, 493]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 571]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 603]
ldrsb w0, [sp, 572]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 162]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 604]
ldrsb w0, [sp, 495]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 573]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 605]
ldrsb w0, [sp, 574]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 174]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 606]
ldrsb w0, [sp, 497]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 575]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 607]
ldrsb w0, [sp, 576]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 187]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 608]
ldrsb w0, [sp, 499]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 577]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 609]
ldrsb w0, [sp, 578]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 207]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 610]
ldrsb w0, [sp, 501]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 579]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 611]
ldrsb w0, [sp, 580]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 222]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 612]
ldrsb w0, [sp, 504]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 581]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 613]
ldrb w1, [sp, 582]
ldrb w0, [sp, 613]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 614]
ldrsb w0, [sp, 613]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 238]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 615]
ldrb w1, [sp, 24]
ldrb w0, [sp, 584]
eor w0, w1, w0
strb w0, [sp, 616]
ldrb w1, [sp, 557]
ldrb w0, [sp, 586]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 617]
ldrsb w0, [sp, 584]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 24]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 618]
ldrb w1, [sp, 554]
ldrb w0, [sp, 584]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 619]
ldrb w1, [sp, 341]
ldrb w0, [sp, 587]
eor w0, w1, w0
strb w0, [sp, 620]
ldrsb w0, [sp, 587]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 341]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 621]
ldrsb w0, [sp, 587]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 42]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 622]
ldrb w1, [sp, 557]
ldrb w0, [sp, 586]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 623]
ldrsb w0, [sp, 586]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 84]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 624]
ldrb w1, [sp, 561]
ldrb w0, [sp, 589]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 625]
ldrb w1, [sp, 593]
ldrb w0, [sp, 592]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 626]
ldrb w1, [sp, 107]
ldrb w0, [sp, 592]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 627]
ldrsb w0, [sp, 107]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 592]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 628]
ldrb w1, [sp, 561]
ldrb w0, [sp, 589]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 629]
ldrsb w0, [sp, 589]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 117]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 630]
ldrb w1, [sp, 564]
ldrb w0, [sp, 595]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 631]
ldrb w1, [sp, 564]
ldrb w0, [sp, 595]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 632]
ldrsb w0, [sp, 595]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 124]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 633]
ldrb w1, [sp, 566]
ldrb w0, [sp, 597]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 634]
ldrb w1, [sp, 566]
ldrb w0, [sp, 597]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 635]
ldrsb w0, [sp, 597]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 132]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 636]
ldrb w1, [sp, 568]
ldrb w0, [sp, 599]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 637]
ldrb w1, [sp, 568]
ldrb w0, [sp, 599]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 638]
ldrsb w0, [sp, 599]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 141]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 639]
ldrb w1, [sp, 570]
ldrb w0, [sp, 601]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 640]
ldrb w1, [sp, 570]
ldrb w0, [sp, 601]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 641]
ldrsb w0, [sp, 601]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 151]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 642]
ldrb w1, [sp, 572]
ldrb w0, [sp, 603]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 643]
ldrb w1, [sp, 572]
ldrb w0, [sp, 603]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 644]
ldrsb w0, [sp, 603]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 162]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 645]
ldrb w1, [sp, 574]
ldrb w0, [sp, 605]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 646]
ldrb w1, [sp, 574]
ldrb w0, [sp, 605]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 647]
ldrsb w0, [sp, 605]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 174]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 648]
ldrb w1, [sp, 576]
ldrb w0, [sp, 607]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 649]
ldrb w1, [sp, 576]
ldrb w0, [sp, 607]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 650]
ldrsb w0, [sp, 607]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 187]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 651]
ldrb w1, [sp, 578]
ldrb w0, [sp, 609]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 652]
ldrb w1, [sp, 578]
ldrb w0, [sp, 609]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 653]
ldrsb w0, [sp, 609]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 207]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 654]
ldrb w1, [sp, 580]
ldrb w0, [sp, 611]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 655]
ldrb w1, [sp, 580]
ldrb w0, [sp, 611]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 656]
ldrsb w0, [sp, 611]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 222]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 657]
ldrb w1, [sp, 582]
ldrb w0, [sp, 613]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 658]
ldrb w1, [sp, 84]
ldrb w0, [sp, 617]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 659]
ldrb w1, [sp, 583]
ldrb w0, [sp, 614]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 660]
ldrb w1, [sp, 554]
ldrb w0, [sp, 616]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 661]
ldrb w1, [sp, 585]
ldrb w0, [sp, 618]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 662]
ldrb w1, [sp, 42]
ldrb w0, [sp, 620]
eor w0, w1, w0
strb w0, [sp, 663]
ldrb w1, [sp, 370]
ldrb w0, [sp, 621]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 664]
ldrb w1, [sp, 624]
ldrb w0, [sp, 623]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 665]
ldrb w1, [sp, 117]
ldrb w0, [sp, 625]
eor w0, w1, w0
strb w0, [sp, 666]
ldrb w1, [sp, 104]
ldrb w0, [sp, 626]
and w0, w1, w0
strb w0, [sp, 667]
ldrb w1, [sp, 108]
ldrb w0, [sp, 627]
and w0, w1, w0
strb w0, [sp, 668]
ldrsb w0, [sp, 110]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 628]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 669]
ldrh w0, [sp, 14]
lsr w0, w0, 14
and w0, w0, 65535
sxtb w0, w0
and w0, w0, 1
sxtb w1, w0
ldrsb w0, [sp, 628]
mvn w0, w0
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 670]
ldrb w1, [sp, 630]
ldrb w0, [sp, 629]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 671]
ldrb w1, [sp, 124]
ldrb w0, [sp, 631]
eor w0, w1, w0
strb w0, [sp, 672]
ldrb w1, [sp, 633]
ldrb w0, [sp, 632]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 673]
ldrb w1, [sp, 132]
ldrb w0, [sp, 634]
eor w0, w1, w0
strb w0, [sp, 674]
ldrb w1, [sp, 636]
ldrb w0, [sp, 635]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 675]
ldrb w1, [sp, 141]
ldrb w0, [sp, 637]
eor w0, w1, w0
strb w0, [sp, 676]
ldrb w1, [sp, 639]
ldrb w0, [sp, 638]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 677]
ldrb w1, [sp, 151]
ldrb w0, [sp, 640]
eor w0, w1, w0
strb w0, [sp, 678]
ldrb w1, [sp, 642]
ldrb w0, [sp, 641]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 679]
ldrb w1, [sp, 162]
ldrb w0, [sp, 643]
eor w0, w1, w0
strb w0, [sp, 680]
ldrb w1, [sp, 645]
ldrb w0, [sp, 644]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 681]
ldrb w1, [sp, 174]
ldrb w0, [sp, 646]
eor w0, w1, w0
strb w0, [sp, 682]
ldrb w1, [sp, 648]
ldrb w0, [sp, 647]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 683]
ldrb w1, [sp, 187]
ldrb w0, [sp, 649]
eor w0, w1, w0
strb w0, [sp, 684]
ldrb w1, [sp, 651]
ldrb w0, [sp, 650]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 685]
ldrb w1, [sp, 207]
ldrb w0, [sp, 652]
eor w0, w1, w0
strb w0, [sp, 686]
ldrb w1, [sp, 654]
ldrb w0, [sp, 653]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 687]
ldrb w1, [sp, 222]
ldrb w0, [sp, 655]
eor w0, w1, w0
strb w0, [sp, 688]
ldrb w1, [sp, 657]
ldrb w0, [sp, 656]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 689]
ldrb w1, [sp, 238]
ldrb w0, [sp, 658]
eor w0, w1, w0
strb w0, [sp, 690]
ldrsb w0, [sp, 690]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 239]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 691]
ldrsb w0, [sp, 615]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 660]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 692]
ldrsb w0, [sp, 661]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 27]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 693]
ldrsb w0, [sp, 619]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 662]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 694]
ldrsb w0, [sp, 663]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 43]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 695]
ldrsb w0, [sp, 622]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 664]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 696]
ldrsb w0, [sp, 588]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 665]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 697]
ldrb w1, [sp, 670]
ldrb w0, [sp, 669]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 698]
ldrb w1, [sp, 111]
ldrb w0, [sp, 669]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 699]
ldrb w1, [sp, 111]
ldrb w0, [sp, 669]
and w0, w1, w0
strb w0, [sp, 700]
ldrsb w0, [sp, 666]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 118]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 701]
ldrsb w0, [sp, 594]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 671]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 702]
ldrsb w0, [sp, 672]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 125]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 703]
ldrsb w0, [sp, 596]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 673]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 704]
ldrsb w0, [sp, 674]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 133]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 705]
ldrsb w0, [sp, 598]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 675]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 706]
ldrsb w0, [sp, 676]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 142]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 707]
ldrsb w0, [sp, 600]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 677]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 708]
ldrsb w0, [sp, 678]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 152]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 709]
ldrsb w0, [sp, 602]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 679]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 710]
ldrsb w0, [sp, 680]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 163]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 711]
ldrsb w0, [sp, 604]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 681]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 712]
ldrsb w0, [sp, 682]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 175]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 713]
ldrsb w0, [sp, 606]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 683]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 714]
ldrsb w0, [sp, 684]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 188]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 715]
ldrsb w0, [sp, 608]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 685]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 716]
ldrsb w0, [sp, 686]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 208]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 717]
ldrsb w0, [sp, 610]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 687]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 718]
ldrsb w0, [sp, 688]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 223]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 719]
ldrsb w0, [sp, 612]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 689]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 720]
ldrb w1, [sp, 690]
ldrb w0, [sp, 720]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 721]
ldrsb w0, [sp, 720]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 239]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 722]
ldrb w1, [sp, 661]
ldrb w0, [sp, 692]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 723]
ldrb w1, [sp, 661]
ldrb w0, [sp, 692]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 724]
ldrsb w0, [sp, 692]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 27]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 725]
ldrb w1, [sp, 663]
ldrb w0, [sp, 694]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 726]
ldrb w1, [sp, 663]
ldrb w0, [sp, 694]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 727]
ldrsb w0, [sp, 694]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 43]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 728]
ldrb w1, [sp, 53]
ldrb w0, [sp, 696]
eor w0, w1, w0
strb w0, [sp, 729]
ldrsb w0, [sp, 696]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 53]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 730]
ldrsb w0, [sp, 696]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 403]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 731]
ldrb w1, [sp, 666]
ldrb w0, [sp, 697]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 732]
ldrsb w0, [sp, 109]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 698]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 733]
ldrb w1, [sp, 666]
ldrb w0, [sp, 697]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 734]
ldrsb w0, [sp, 697]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 118]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 735]
ldrb w1, [sp, 672]
ldrb w0, [sp, 702]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 736]
ldrb w1, [sp, 672]
ldrb w0, [sp, 702]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 737]
ldrsb w0, [sp, 702]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 125]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 738]
ldrb w1, [sp, 674]
ldrb w0, [sp, 704]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 739]
ldrb w1, [sp, 674]
ldrb w0, [sp, 704]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 740]
ldrsb w0, [sp, 704]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 133]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 741]
ldrb w1, [sp, 676]
ldrb w0, [sp, 706]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 742]
ldrb w1, [sp, 676]
ldrb w0, [sp, 706]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 743]
ldrsb w0, [sp, 706]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 142]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 744]
ldrb w1, [sp, 678]
ldrb w0, [sp, 708]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 745]
ldrb w1, [sp, 678]
ldrb w0, [sp, 708]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 746]
ldrsb w0, [sp, 708]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 152]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 747]
ldrb w1, [sp, 680]
ldrb w0, [sp, 710]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 748]
ldrb w1, [sp, 680]
ldrb w0, [sp, 710]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 749]
ldrsb w0, [sp, 710]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 163]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 750]
ldrb w1, [sp, 682]
ldrb w0, [sp, 712]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 751]
ldrb w1, [sp, 682]
ldrb w0, [sp, 712]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 752]
ldrsb w0, [sp, 712]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 175]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 753]
ldrb w1, [sp, 684]
ldrb w0, [sp, 714]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 754]
ldrb w1, [sp, 684]
ldrb w0, [sp, 714]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 755]
ldrsb w0, [sp, 714]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 188]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 756]
ldrb w1, [sp, 686]
ldrb w0, [sp, 716]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 757]
ldrb w1, [sp, 686]
ldrb w0, [sp, 716]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 758]
ldrsb w0, [sp, 716]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 208]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 759]
ldrb w1, [sp, 688]
ldrb w0, [sp, 718]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 760]
ldrb w1, [sp, 688]
ldrb w0, [sp, 718]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 761]
ldrsb w0, [sp, 718]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 223]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 762]
ldrb w1, [sp, 690]
ldrb w0, [sp, 720]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 763]
ldrb w1, [sp, 118]
ldrb w0, [sp, 732]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 764]
ldrb w1, [sp, 691]
ldrb w0, [sp, 721]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 765]
ldrb w1, [sp, 27]
ldrb w0, [sp, 723]
eor w0, w1, w0
strb w0, [sp, 766]
ldrb w1, [sp, 693]
ldrb w0, [sp, 724]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 767]
ldrb w1, [sp, 43]
ldrb w0, [sp, 726]
eor w0, w1, w0
strb w0, [sp, 768]
ldrb w1, [sp, 695]
ldrb w0, [sp, 727]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 769]
ldrb w1, [sp, 403]
ldrb w0, [sp, 729]
eor w0, w1, w0
strb w0, [sp, 770]
ldrb w1, [sp, 449]
ldrb w0, [sp, 730]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 771]
ldrb w1, [sp, 735]
ldrb w0, [sp, 734]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 772]
ldrb w1, [sp, 125]
ldrb w0, [sp, 736]
eor w0, w1, w0
strb w0, [sp, 773]
ldrb w1, [sp, 738]
ldrb w0, [sp, 737]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 774]
ldrb w1, [sp, 133]
ldrb w0, [sp, 739]
eor w0, w1, w0
strb w0, [sp, 775]
ldrb w1, [sp, 741]
ldrb w0, [sp, 740]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 776]
ldrb w1, [sp, 142]
ldrb w0, [sp, 742]
eor w0, w1, w0
strb w0, [sp, 777]
ldrb w1, [sp, 744]
ldrb w0, [sp, 743]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 778]
ldrb w1, [sp, 152]
ldrb w0, [sp, 745]
eor w0, w1, w0
strb w0, [sp, 779]
ldrb w1, [sp, 747]
ldrb w0, [sp, 746]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 780]
ldrb w1, [sp, 163]
ldrb w0, [sp, 748]
eor w0, w1, w0
strb w0, [sp, 781]
ldrb w1, [sp, 750]
ldrb w0, [sp, 749]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 782]
ldrb w1, [sp, 175]
ldrb w0, [sp, 751]
eor w0, w1, w0
strb w0, [sp, 783]
ldrb w1, [sp, 753]
ldrb w0, [sp, 752]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 784]
ldrb w1, [sp, 188]
ldrb w0, [sp, 754]
eor w0, w1, w0
strb w0, [sp, 785]
ldrb w1, [sp, 756]
ldrb w0, [sp, 755]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 786]
ldrb w1, [sp, 208]
ldrb w0, [sp, 757]
eor w0, w1, w0
strb w0, [sp, 787]
ldrb w1, [sp, 759]
ldrb w0, [sp, 758]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 788]
ldrb w1, [sp, 223]
ldrb w0, [sp, 760]
eor w0, w1, w0
strb w0, [sp, 789]
ldrb w1, [sp, 762]
ldrb w0, [sp, 761]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 790]
ldrb w1, [sp, 239]
ldrb w0, [sp, 763]
eor w0, w1, w0
strb w0, [sp, 791]
ldrsb w0, [sp, 791]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 240]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 792]
ldrsb w0, [sp, 722]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 765]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 793]
ldrsb w0, [sp, 766]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 28]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 794]
ldrsb w0, [sp, 725]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 767]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 795]
ldrsb w0, [sp, 768]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 44]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 796]
ldrsb w0, [sp, 728]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 769]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 797]
ldrsb w0, [sp, 770]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 52]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 798]
ldrsb w0, [sp, 731]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 771]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 799]
ldrsb w0, [sp, 701]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 772]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 800]
ldrsb w0, [sp, 773]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 126]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 801]
ldrsb w0, [sp, 703]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 774]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 802]
ldrsb w0, [sp, 775]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 134]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 803]
ldrsb w0, [sp, 705]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 776]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 804]
ldrsb w0, [sp, 777]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 143]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 805]
ldrsb w0, [sp, 707]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 778]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 806]
ldrsb w0, [sp, 779]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 153]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 807]
ldrsb w0, [sp, 709]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 780]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 808]
ldrsb w0, [sp, 781]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 164]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 809]
ldrsb w0, [sp, 711]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 782]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 810]
ldrsb w0, [sp, 783]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 176]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 811]
ldrsb w0, [sp, 713]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 784]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 812]
ldrsb w0, [sp, 785]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 189]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 813]
ldrsb w0, [sp, 715]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 786]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 814]
ldrsb w0, [sp, 787]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 209]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 815]
ldrsb w0, [sp, 717]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 788]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 816]
ldrsb w0, [sp, 789]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 224]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 817]
ldrsb w0, [sp, 719]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 790]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 818]
ldrb w1, [sp, 791]
ldrb w0, [sp, 818]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 819]
ldrsb w0, [sp, 818]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 240]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 820]
ldrb w1, [sp, 766]
ldrb w0, [sp, 793]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 821]
ldrb w1, [sp, 766]
ldrb w0, [sp, 793]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 822]
ldrsb w0, [sp, 793]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 28]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 823]
ldrb w1, [sp, 768]
ldrb w0, [sp, 795]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 824]
ldrb w1, [sp, 768]
ldrb w0, [sp, 795]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 825]
ldrsb w0, [sp, 795]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 44]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 826]
ldrb w1, [sp, 52]
ldrb w0, [sp, 797]
eor w0, w1, w0
strb w0, [sp, 827]
ldrsb w0, [sp, 797]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 52]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 828]
ldrb w1, [sp, 770]
ldrb w0, [sp, 797]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 829]
ldrb w1, [sp, 406]
ldrb w0, [sp, 799]
eor w0, w1, w0
strb w0, [sp, 830]
ldrsb w0, [sp, 799]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 406]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 831]
ldrsb w0, [sp, 799]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 63]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 832]
ldrb w1, [sp, 773]
ldrb w0, [sp, 800]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 833]
ldrb w1, [sp, 773]
ldrb w0, [sp, 800]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 834]
ldrsb w0, [sp, 800]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 126]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 835]
ldrb w1, [sp, 775]
ldrb w0, [sp, 802]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 836]
ldrb w1, [sp, 775]
ldrb w0, [sp, 802]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 837]
ldrsb w0, [sp, 802]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 134]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 838]
ldrb w1, [sp, 777]
ldrb w0, [sp, 804]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 839]
ldrb w1, [sp, 777]
ldrb w0, [sp, 804]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 840]
ldrsb w0, [sp, 804]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 143]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 841]
ldrb w1, [sp, 779]
ldrb w0, [sp, 806]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 842]
ldrb w1, [sp, 779]
ldrb w0, [sp, 806]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 843]
ldrsb w0, [sp, 806]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 153]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 844]
ldrb w1, [sp, 781]
ldrb w0, [sp, 808]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 845]
ldrb w1, [sp, 781]
ldrb w0, [sp, 808]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 846]
ldrsb w0, [sp, 808]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 164]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 847]
ldrb w1, [sp, 783]
ldrb w0, [sp, 810]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 848]
ldrb w1, [sp, 783]
ldrb w0, [sp, 810]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 849]
ldrsb w0, [sp, 810]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 176]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 850]
ldrb w1, [sp, 785]
ldrb w0, [sp, 812]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 851]
ldrb w1, [sp, 785]
ldrb w0, [sp, 812]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 852]
ldrsb w0, [sp, 812]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 189]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 853]
ldrb w1, [sp, 787]
ldrb w0, [sp, 814]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 854]
ldrb w1, [sp, 787]
ldrb w0, [sp, 814]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 855]
ldrsb w0, [sp, 814]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 209]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 856]
ldrb w1, [sp, 789]
ldrb w0, [sp, 816]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 857]
ldrb w1, [sp, 789]
ldrb w0, [sp, 816]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 858]
ldrsb w0, [sp, 816]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 224]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 859]
ldrb w1, [sp, 791]
ldrb w0, [sp, 818]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 860]
ldrb w1, [sp, 126]
ldrb w0, [sp, 833]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 861]
ldrb w1, [sp, 792]
ldrb w0, [sp, 819]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 862]
ldrb w1, [sp, 28]
ldrb w0, [sp, 821]
eor w0, w1, w0
strb w0, [sp, 863]
ldrb w1, [sp, 794]
ldrb w0, [sp, 822]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 864]
ldrb w1, [sp, 44]
ldrb w0, [sp, 824]
eor w0, w1, w0
strb w0, [sp, 865]
ldrb w1, [sp, 796]
ldrb w0, [sp, 825]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 866]
ldrb w1, [sp, 770]
ldrb w0, [sp, 827]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 867]
ldrb w1, [sp, 798]
ldrb w0, [sp, 828]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 868]
ldrb w1, [sp, 63]
ldrb w0, [sp, 830]
eor w0, w1, w0
strb w0, [sp, 869]
ldrb w1, [sp, 450]
ldrb w0, [sp, 831]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 870]
ldrb w1, [sp, 835]
ldrb w0, [sp, 834]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 871]
ldrb w1, [sp, 134]
ldrb w0, [sp, 836]
eor w0, w1, w0
strb w0, [sp, 872]
ldrb w1, [sp, 838]
ldrb w0, [sp, 837]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 873]
ldrb w1, [sp, 143]
ldrb w0, [sp, 839]
eor w0, w1, w0
strb w0, [sp, 874]
ldrb w1, [sp, 841]
ldrb w0, [sp, 840]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 875]
ldrb w1, [sp, 153]
ldrb w0, [sp, 842]
eor w0, w1, w0
strb w0, [sp, 876]
ldrb w1, [sp, 844]
ldrb w0, [sp, 843]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 877]
ldrb w1, [sp, 164]
ldrb w0, [sp, 845]
eor w0, w1, w0
strb w0, [sp, 878]
ldrb w1, [sp, 847]
ldrb w0, [sp, 846]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 879]
ldrb w1, [sp, 176]
ldrb w0, [sp, 848]
eor w0, w1, w0
strb w0, [sp, 880]
ldrb w1, [sp, 850]
ldrb w0, [sp, 849]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 881]
ldrb w1, [sp, 189]
ldrb w0, [sp, 851]
eor w0, w1, w0
strb w0, [sp, 882]
ldrb w1, [sp, 853]
ldrb w0, [sp, 852]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 883]
ldrb w1, [sp, 209]
ldrb w0, [sp, 854]
eor w0, w1, w0
strb w0, [sp, 884]
ldrb w1, [sp, 856]
ldrb w0, [sp, 855]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 885]
ldrb w1, [sp, 224]
ldrb w0, [sp, 857]
eor w0, w1, w0
strb w0, [sp, 886]
ldrb w1, [sp, 859]
ldrb w0, [sp, 858]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 887]
ldrb w1, [sp, 240]
ldrb w0, [sp, 860]
eor w0, w1, w0
strb w0, [sp, 888]
ldrsb w0, [sp, 888]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 241]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 889]
ldrsb w0, [sp, 820]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 862]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 890]
ldrsb w0, [sp, 863]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 29]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 891]
ldrsb w0, [sp, 823]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 864]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 892]
ldrsb w0, [sp, 865]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 45]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 893]
ldrsb w0, [sp, 826]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 866]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 894]
ldrsb w0, [sp, 867]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 55]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 895]
ldrsb w0, [sp, 829]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 868]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 896]
ldrsb w0, [sp, 869]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 64]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 897]
ldrsb w0, [sp, 832]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 870]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 898]
ldrsb w0, [sp, 801]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 871]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 899]
ldrsb w0, [sp, 872]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 135]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 900]
ldrsb w0, [sp, 803]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 873]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 901]
ldrsb w0, [sp, 874]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 144]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 902]
ldrsb w0, [sp, 805]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 875]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 903]
ldrsb w0, [sp, 876]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 154]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 904]
ldrsb w0, [sp, 807]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 877]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 905]
ldrsb w0, [sp, 878]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 165]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 906]
ldrsb w0, [sp, 809]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 879]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 907]
ldrsb w0, [sp, 880]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 177]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 908]
ldrsb w0, [sp, 811]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 881]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 909]
ldrsb w0, [sp, 882]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 190]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 910]
ldrsb w0, [sp, 813]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 883]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 911]
ldrsb w0, [sp, 884]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 210]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 912]
ldrsb w0, [sp, 815]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 885]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 913]
ldrsb w0, [sp, 886]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 225]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 914]
ldrsb w0, [sp, 817]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 887]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 915]
ldrb w1, [sp, 888]
ldrb w0, [sp, 915]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 916]
ldrsb w0, [sp, 915]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 241]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 917]
ldrb w1, [sp, 863]
ldrb w0, [sp, 890]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 918]
ldrb w1, [sp, 863]
ldrb w0, [sp, 890]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 919]
ldrsb w0, [sp, 890]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 29]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 920]
ldrb w1, [sp, 865]
ldrb w0, [sp, 892]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 921]
ldrb w1, [sp, 865]
ldrb w0, [sp, 892]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 922]
ldrsb w0, [sp, 892]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 45]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 923]
ldrb w1, [sp, 867]
ldrb w0, [sp, 894]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 924]
ldrb w1, [sp, 867]
ldrb w0, [sp, 894]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 925]
ldrsb w0, [sp, 894]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 55]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 926]
ldrb w1, [sp, 869]
ldrb w0, [sp, 896]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 927]
ldrb w1, [sp, 869]
ldrb w0, [sp, 896]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 928]
ldrsb w0, [sp, 896]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 64]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 929]
ldrb w1, [sp, 74]
ldrb w0, [sp, 898]
eor w0, w1, w0
strb w0, [sp, 930]
ldrsb w0, [sp, 898]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 74]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 931]
ldrsb w0, [sp, 898]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 480]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 932]
ldrb w1, [sp, 872]
ldrb w0, [sp, 899]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 933]
ldrb w1, [sp, 872]
ldrb w0, [sp, 899]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 934]
ldrsb w0, [sp, 899]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 135]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 935]
ldrb w1, [sp, 874]
ldrb w0, [sp, 901]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 936]
ldrb w1, [sp, 874]
ldrb w0, [sp, 901]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 937]
ldrsb w0, [sp, 901]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 144]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 938]
ldrb w1, [sp, 876]
ldrb w0, [sp, 903]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 939]
ldrb w1, [sp, 876]
ldrb w0, [sp, 903]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 940]
ldrsb w0, [sp, 903]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 154]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 941]
ldrb w1, [sp, 878]
ldrb w0, [sp, 905]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 942]
ldrb w1, [sp, 878]
ldrb w0, [sp, 905]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 943]
ldrsb w0, [sp, 905]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 165]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 944]
ldrb w1, [sp, 880]
ldrb w0, [sp, 907]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 945]
ldrb w1, [sp, 880]
ldrb w0, [sp, 907]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 946]
ldrsb w0, [sp, 907]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 177]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 947]
ldrb w1, [sp, 882]
ldrb w0, [sp, 909]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 948]
ldrb w1, [sp, 882]
ldrb w0, [sp, 909]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 949]
ldrsb w0, [sp, 909]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 190]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 950]
ldrb w1, [sp, 884]
ldrb w0, [sp, 911]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 951]
ldrb w1, [sp, 884]
ldrb w0, [sp, 911]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 952]
ldrsb w0, [sp, 911]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 210]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 953]
ldrb w1, [sp, 886]
ldrb w0, [sp, 913]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 954]
ldrb w1, [sp, 886]
ldrb w0, [sp, 913]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 955]
ldrsb w0, [sp, 913]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 225]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 956]
ldrb w1, [sp, 888]
ldrb w0, [sp, 915]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 957]
ldrb w1, [sp, 135]
ldrb w0, [sp, 933]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 958]
ldrb w1, [sp, 889]
ldrb w0, [sp, 916]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 959]
ldrb w1, [sp, 29]
ldrb w0, [sp, 918]
eor w0, w1, w0
strb w0, [sp, 960]
ldrb w1, [sp, 891]
ldrb w0, [sp, 919]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 961]
ldrb w1, [sp, 45]
ldrb w0, [sp, 921]
eor w0, w1, w0
strb w0, [sp, 962]
ldrb w1, [sp, 893]
ldrb w0, [sp, 922]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 963]
ldrb w1, [sp, 55]
ldrb w0, [sp, 924]
eor w0, w1, w0
strb w0, [sp, 964]
ldrb w1, [sp, 895]
ldrb w0, [sp, 925]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 965]
ldrb w1, [sp, 64]
ldrb w0, [sp, 927]
eor w0, w1, w0
strb w0, [sp, 966]
ldrb w1, [sp, 897]
ldrb w0, [sp, 928]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 967]
ldrb w1, [sp, 480]
ldrb w0, [sp, 930]
eor w0, w1, w0
strb w0, [sp, 968]
ldrb w1, [sp, 514]
ldrb w0, [sp, 931]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 969]
ldrb w1, [sp, 935]
ldrb w0, [sp, 934]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 970]
ldrb w1, [sp, 144]
ldrb w0, [sp, 936]
eor w0, w1, w0
strb w0, [sp, 971]
ldrb w1, [sp, 938]
ldrb w0, [sp, 937]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 972]
ldrb w1, [sp, 154]
ldrb w0, [sp, 939]
eor w0, w1, w0
strb w0, [sp, 973]
ldrb w1, [sp, 941]
ldrb w0, [sp, 940]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 974]
ldrb w1, [sp, 165]
ldrb w0, [sp, 942]
eor w0, w1, w0
strb w0, [sp, 975]
ldrb w1, [sp, 944]
ldrb w0, [sp, 943]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 976]
ldrb w1, [sp, 177]
ldrb w0, [sp, 945]
eor w0, w1, w0
strb w0, [sp, 977]
ldrb w1, [sp, 947]
ldrb w0, [sp, 946]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 978]
ldrb w1, [sp, 190]
ldrb w0, [sp, 948]
eor w0, w1, w0
strb w0, [sp, 979]
ldrb w1, [sp, 950]
ldrb w0, [sp, 949]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 980]
ldrb w1, [sp, 210]
ldrb w0, [sp, 951]
eor w0, w1, w0
strb w0, [sp, 981]
ldrb w1, [sp, 953]
ldrb w0, [sp, 952]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 982]
ldrb w1, [sp, 225]
ldrb w0, [sp, 954]
eor w0, w1, w0
strb w0, [sp, 983]
ldrb w1, [sp, 956]
ldrb w0, [sp, 955]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 984]
ldrb w1, [sp, 241]
ldrb w0, [sp, 957]
eor w0, w1, w0
strb w0, [sp, 985]
ldrsb w0, [sp, 985]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 242]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 986]
ldrsb w0, [sp, 917]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 959]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 987]
ldrsb w0, [sp, 960]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 31]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 988]
ldrsb w0, [sp, 920]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 961]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 989]
ldrsb w0, [sp, 962]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 46]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 990]
ldrsb w0, [sp, 923]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 963]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 991]
ldrsb w0, [sp, 964]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 56]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 992]
ldrsb w0, [sp, 926]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 965]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 993]
ldrsb w0, [sp, 966]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 65]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 994]
ldrsb w0, [sp, 929]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 967]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 995]
ldrsb w0, [sp, 968]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 73]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 996]
ldrsb w0, [sp, 932]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 969]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 997]
ldrsb w0, [sp, 900]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 970]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 998]
ldrsb w0, [sp, 971]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 145]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 999]
ldrsb w0, [sp, 902]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 972]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1000]
ldrsb w0, [sp, 973]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 155]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1001]
ldrsb w0, [sp, 904]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 974]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1002]
ldrsb w0, [sp, 975]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 166]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1003]
ldrsb w0, [sp, 906]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 976]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1004]
ldrsb w0, [sp, 977]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 178]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1005]
ldrsb w0, [sp, 908]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 978]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1006]
ldrsb w0, [sp, 979]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 191]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1007]
ldrsb w0, [sp, 910]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 980]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1008]
ldrsb w0, [sp, 981]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 211]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1009]
ldrsb w0, [sp, 912]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 982]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1010]
ldrsb w0, [sp, 983]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 226]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1011]
ldrsb w0, [sp, 914]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 984]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1012]
ldrb w1, [sp, 985]
ldrb w0, [sp, 1012]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1013]
ldrsb w0, [sp, 1012]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 242]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1014]
ldrb w1, [sp, 960]
ldrb w0, [sp, 987]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1015]
ldrb w1, [sp, 960]
ldrb w0, [sp, 987]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1016]
ldrsb w0, [sp, 987]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 31]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1017]
ldrb w1, [sp, 962]
ldrb w0, [sp, 989]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1018]
ldrb w1, [sp, 962]
ldrb w0, [sp, 989]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1019]
ldrsb w0, [sp, 989]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 46]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1020]
ldrb w1, [sp, 964]
ldrb w0, [sp, 991]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1021]
ldrb w1, [sp, 964]
ldrb w0, [sp, 991]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1022]
ldrsb w0, [sp, 991]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 56]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1023]
ldrb w1, [sp, 966]
ldrb w0, [sp, 993]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1024]
ldrb w1, [sp, 966]
ldrb w0, [sp, 993]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1025]
ldrsb w0, [sp, 993]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 65]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1026]
ldrb w1, [sp, 73]
ldrb w0, [sp, 995]
eor w0, w1, w0
strb w0, [sp, 1027]
ldrsb w0, [sp, 995]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 73]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1028]
ldrb w1, [sp, 968]
ldrb w0, [sp, 995]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1029]
ldrb w1, [sp, 481]
ldrb w0, [sp, 997]
eor w0, w1, w0
strb w0, [sp, 1030]
ldrsb w0, [sp, 997]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 481]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1031]
ldrsb w0, [sp, 997]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 86]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1032]
ldrb w1, [sp, 971]
ldrb w0, [sp, 998]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1033]
ldrb w1, [sp, 971]
ldrb w0, [sp, 998]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1034]
ldrsb w0, [sp, 998]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 145]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1035]
ldrb w1, [sp, 973]
ldrb w0, [sp, 1000]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1036]
ldrb w1, [sp, 973]
ldrb w0, [sp, 1000]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1037]
ldrsb w0, [sp, 1000]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 155]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1038]
ldrb w1, [sp, 975]
ldrb w0, [sp, 1002]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1039]
ldrb w1, [sp, 975]
ldrb w0, [sp, 1002]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1040]
ldrsb w0, [sp, 1002]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 166]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1041]
ldrb w1, [sp, 977]
ldrb w0, [sp, 1004]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1042]
ldrb w1, [sp, 977]
ldrb w0, [sp, 1004]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1043]
ldrsb w0, [sp, 1004]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 178]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1044]
ldrb w1, [sp, 979]
ldrb w0, [sp, 1006]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1045]
ldrb w1, [sp, 979]
ldrb w0, [sp, 1006]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1046]
ldrsb w0, [sp, 1006]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 191]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1047]
ldrb w1, [sp, 981]
ldrb w0, [sp, 1008]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1048]
ldrb w1, [sp, 981]
ldrb w0, [sp, 1008]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1049]
ldrsb w0, [sp, 1008]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 211]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1050]
ldrb w1, [sp, 983]
ldrb w0, [sp, 1010]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1051]
ldrb w1, [sp, 983]
ldrb w0, [sp, 1010]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1052]
ldrsb w0, [sp, 1010]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 226]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1053]
ldrb w1, [sp, 985]
ldrb w0, [sp, 1012]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1054]
ldrb w1, [sp, 145]
ldrb w0, [sp, 1033]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1055]
ldrb w1, [sp, 986]
ldrb w0, [sp, 1013]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1056]
ldrb w1, [sp, 31]
ldrb w0, [sp, 1015]
eor w0, w1, w0
strb w0, [sp, 1057]
ldrb w1, [sp, 988]
ldrb w0, [sp, 1016]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1058]
ldrb w1, [sp, 46]
ldrb w0, [sp, 1018]
eor w0, w1, w0
strb w0, [sp, 1059]
ldrb w1, [sp, 990]
ldrb w0, [sp, 1019]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1060]
ldrb w1, [sp, 56]
ldrb w0, [sp, 1021]
eor w0, w1, w0
strb w0, [sp, 1061]
ldrb w1, [sp, 992]
ldrb w0, [sp, 1022]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1062]
ldrb w1, [sp, 65]
ldrb w0, [sp, 1024]
eor w0, w1, w0
strb w0, [sp, 1063]
ldrb w1, [sp, 994]
ldrb w0, [sp, 1025]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1064]
ldrb w1, [sp, 968]
ldrb w0, [sp, 1027]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1065]
ldrb w1, [sp, 996]
ldrb w0, [sp, 1028]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1066]
ldrb w1, [sp, 86]
ldrb w0, [sp, 1030]
eor w0, w1, w0
strb w0, [sp, 1067]
ldrb w1, [sp, 515]
ldrb w0, [sp, 1031]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1068]
ldrb w1, [sp, 1035]
ldrb w0, [sp, 1034]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1069]
ldrb w1, [sp, 155]
ldrb w0, [sp, 1036]
eor w0, w1, w0
strb w0, [sp, 1070]
ldrb w1, [sp, 1038]
ldrb w0, [sp, 1037]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1071]
ldrb w1, [sp, 166]
ldrb w0, [sp, 1039]
eor w0, w1, w0
strb w0, [sp, 1072]
ldrb w1, [sp, 1041]
ldrb w0, [sp, 1040]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1073]
ldrb w1, [sp, 178]
ldrb w0, [sp, 1042]
eor w0, w1, w0
strb w0, [sp, 1074]
ldrb w1, [sp, 1044]
ldrb w0, [sp, 1043]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1075]
ldrb w1, [sp, 191]
ldrb w0, [sp, 1045]
eor w0, w1, w0
strb w0, [sp, 1076]
ldrb w1, [sp, 1047]
ldrb w0, [sp, 1046]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1077]
ldrb w1, [sp, 211]
ldrb w0, [sp, 1048]
eor w0, w1, w0
strb w0, [sp, 1078]
ldrb w1, [sp, 1050]
ldrb w0, [sp, 1049]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1079]
ldrb w1, [sp, 226]
ldrb w0, [sp, 1051]
eor w0, w1, w0
strb w0, [sp, 1080]
ldrb w1, [sp, 1053]
ldrb w0, [sp, 1052]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1081]
ldrb w1, [sp, 242]
ldrb w0, [sp, 1054]
eor w0, w1, w0
strb w0, [sp, 1082]
ldrsb w0, [sp, 1082]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 243]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1083]
ldrsb w0, [sp, 1014]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 1056]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1084]
ldrsb w0, [sp, 1057]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 32]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1085]
ldrsb w0, [sp, 1017]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 1058]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1086]
ldrsb w0, [sp, 1059]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 47]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1087]
ldrsb w0, [sp, 1020]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 1060]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1088]
ldrsb w0, [sp, 1061]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 57]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1089]
ldrsb w0, [sp, 1023]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 1062]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1090]
ldrsb w0, [sp, 1063]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 66]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1091]
ldrsb w0, [sp, 1026]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 1064]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1092]
ldrsb w0, [sp, 1065]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 77]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1093]
ldrsb w0, [sp, 1029]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 1066]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1094]
ldrsb w0, [sp, 1067]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 87]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1095]
ldrsb w0, [sp, 1032]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 1068]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1096]
ldrsb w0, [sp, 999]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 1069]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1097]
ldrsb w0, [sp, 1070]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 156]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1098]
ldrsb w0, [sp, 1001]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 1071]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1099]
ldrsb w0, [sp, 1072]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 167]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1100]
ldrsb w0, [sp, 1003]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 1073]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1101]
ldrsb w0, [sp, 1074]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 179]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1102]
ldrsb w0, [sp, 1005]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 1075]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1103]
ldrsb w0, [sp, 1076]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 192]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1104]
ldrsb w0, [sp, 1007]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 1077]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1105]
ldrsb w0, [sp, 1078]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 212]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1106]
ldrsb w0, [sp, 1009]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 1079]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1107]
ldrsb w0, [sp, 1080]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 227]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1108]
ldrsb w0, [sp, 1011]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 1081]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1109]
ldrb w1, [sp, 1082]
ldrb w0, [sp, 1109]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1110]
ldrsb w0, [sp, 1109]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 243]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1111]
ldrb w1, [sp, 1057]
ldrb w0, [sp, 1084]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1112]
ldrb w1, [sp, 1057]
ldrb w0, [sp, 1084]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1113]
ldrsb w0, [sp, 1084]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 32]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1114]
ldrb w1, [sp, 1059]
ldrb w0, [sp, 1086]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1115]
ldrb w1, [sp, 1059]
ldrb w0, [sp, 1086]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1116]
ldrsb w0, [sp, 1086]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 47]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1117]
ldrb w1, [sp, 1061]
ldrb w0, [sp, 1088]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1118]
ldrb w1, [sp, 1061]
ldrb w0, [sp, 1088]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1119]
ldrsb w0, [sp, 1088]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 57]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1120]
ldrb w1, [sp, 1063]
ldrb w0, [sp, 1090]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1121]
ldrb w1, [sp, 1063]
ldrb w0, [sp, 1090]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1122]
ldrsb w0, [sp, 1090]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 66]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1123]
ldrb w1, [sp, 1065]
ldrb w0, [sp, 1092]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1124]
ldrb w1, [sp, 1065]
ldrb w0, [sp, 1092]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1125]
ldrsb w0, [sp, 1092]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 77]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1126]
ldrb w1, [sp, 1067]
ldrb w0, [sp, 1094]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1127]
ldrb w1, [sp, 1067]
ldrb w0, [sp, 1094]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1128]
ldrsb w0, [sp, 1094]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 87]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1129]
ldrb w1, [sp, 93]
ldrb w0, [sp, 1096]
eor w0, w1, w0
strb w0, [sp, 1130]
ldrsb w0, [sp, 1096]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 93]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1131]
ldrsb w0, [sp, 1096]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 558]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1132]
ldrb w1, [sp, 1070]
ldrb w0, [sp, 1097]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1133]
ldrb w1, [sp, 1070]
ldrb w0, [sp, 1097]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1134]
ldrsb w0, [sp, 1097]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 156]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1135]
ldrb w1, [sp, 1072]
ldrb w0, [sp, 1099]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1136]
ldrb w1, [sp, 1072]
ldrb w0, [sp, 1099]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1137]
ldrsb w0, [sp, 1099]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 167]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1138]
ldrb w1, [sp, 1074]
ldrb w0, [sp, 1101]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1139]
ldrb w1, [sp, 1074]
ldrb w0, [sp, 1101]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1140]
ldrsb w0, [sp, 1101]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 179]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1141]
ldrb w1, [sp, 1076]
ldrb w0, [sp, 1103]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1142]
ldrb w1, [sp, 1076]
ldrb w0, [sp, 1103]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1143]
ldrsb w0, [sp, 1103]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 192]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1144]
ldrb w1, [sp, 1078]
ldrb w0, [sp, 1105]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1145]
ldrb w1, [sp, 1078]
ldrb w0, [sp, 1105]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1146]
ldrsb w0, [sp, 1105]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 212]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1147]
ldrb w1, [sp, 1080]
ldrb w0, [sp, 1107]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1148]
ldrb w1, [sp, 1080]
ldrb w0, [sp, 1107]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1149]
ldrsb w0, [sp, 1107]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 227]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1150]
ldrb w1, [sp, 1082]
ldrb w0, [sp, 1109]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1151]
ldrb w1, [sp, 156]
ldrb w0, [sp, 1133]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1152]
ldrb w1, [sp, 1083]
ldrb w0, [sp, 1110]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1153]
ldrb w1, [sp, 32]
ldrb w0, [sp, 1112]
eor w0, w1, w0
strb w0, [sp, 1154]
ldrb w1, [sp, 1085]
ldrb w0, [sp, 1113]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1155]
ldrb w1, [sp, 47]
ldrb w0, [sp, 1115]
eor w0, w1, w0
strb w0, [sp, 1156]
ldrb w1, [sp, 1087]
ldrb w0, [sp, 1116]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1157]
ldrb w1, [sp, 57]
ldrb w0, [sp, 1118]
eor w0, w1, w0
strb w0, [sp, 1158]
ldrb w1, [sp, 1089]
ldrb w0, [sp, 1119]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1159]
ldrb w1, [sp, 66]
ldrb w0, [sp, 1121]
eor w0, w1, w0
strb w0, [sp, 1160]
ldrb w1, [sp, 1091]
ldrb w0, [sp, 1122]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1161]
ldrb w1, [sp, 77]
ldrb w0, [sp, 1124]
eor w0, w1, w0
strb w0, [sp, 1162]
ldrb w1, [sp, 1093]
ldrb w0, [sp, 1125]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1163]
ldrb w1, [sp, 87]
ldrb w0, [sp, 1127]
eor w0, w1, w0
strb w0, [sp, 1164]
ldrb w1, [sp, 1095]
ldrb w0, [sp, 1128]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1165]
ldrb w1, [sp, 558]
ldrb w0, [sp, 1130]
eor w0, w1, w0
strb w0, [sp, 1166]
ldrb w1, [sp, 590]
ldrb w0, [sp, 1131]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1167]
ldrb w1, [sp, 1135]
ldrb w0, [sp, 1134]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1168]
ldrb w1, [sp, 167]
ldrb w0, [sp, 1136]
eor w0, w1, w0
strb w0, [sp, 1169]
ldrb w1, [sp, 1138]
ldrb w0, [sp, 1137]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1170]
ldrb w1, [sp, 179]
ldrb w0, [sp, 1139]
eor w0, w1, w0
strb w0, [sp, 1171]
ldrb w1, [sp, 1141]
ldrb w0, [sp, 1140]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1172]
ldrb w1, [sp, 192]
ldrb w0, [sp, 1142]
eor w0, w1, w0
strb w0, [sp, 1173]
ldrb w1, [sp, 1144]
ldrb w0, [sp, 1143]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1174]
ldrb w1, [sp, 212]
ldrb w0, [sp, 1145]
eor w0, w1, w0
strb w0, [sp, 1175]
ldrb w1, [sp, 1147]
ldrb w0, [sp, 1146]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1176]
ldrb w1, [sp, 227]
ldrb w0, [sp, 1148]
eor w0, w1, w0
strb w0, [sp, 1177]
ldrb w1, [sp, 1150]
ldrb w0, [sp, 1149]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1178]
ldrb w1, [sp, 243]
ldrb w0, [sp, 1151]
eor w0, w1, w0
strb w0, [sp, 1179]
ldrsb w0, [sp, 1179]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 244]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1180]
ldrsb w0, [sp, 1111]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 1153]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1181]
ldrsb w0, [sp, 1154]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 33]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1182]
ldrsb w0, [sp, 1114]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 1155]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1183]
ldrsb w0, [sp, 1156]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 48]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1184]
ldrsb w0, [sp, 1117]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 1157]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1185]
ldrsb w0, [sp, 1158]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 58]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1186]
ldrsb w0, [sp, 1120]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 1159]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1187]
ldrsb w0, [sp, 1160]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 67]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1188]
ldrsb w0, [sp, 1123]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 1161]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1189]
ldrsb w0, [sp, 1162]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 78]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1190]
ldrsb w0, [sp, 1126]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 1163]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1191]
ldrsb w0, [sp, 1164]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 88]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1192]
ldrsb w0, [sp, 1129]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 1165]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1193]
ldrsb w0, [sp, 1166]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 92]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1194]
ldrsb w0, [sp, 1132]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 1167]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1195]
ldrsb w0, [sp, 1098]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 1168]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1196]
ldrsb w0, [sp, 1169]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 168]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1197]
ldrsb w0, [sp, 1100]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 1170]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1198]
ldrsb w0, [sp, 1171]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 180]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1199]
ldrsb w0, [sp, 1102]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 1172]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1200]
ldrsb w0, [sp, 1173]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 193]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1201]
ldrsb w0, [sp, 1104]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 1174]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1202]
ldrsb w0, [sp, 1175]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 213]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1203]
ldrsb w0, [sp, 1106]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 1176]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1204]
ldrsb w0, [sp, 1177]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 228]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1205]
ldrsb w0, [sp, 1108]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 1178]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1206]
ldrb w1, [sp, 1179]
ldrb w0, [sp, 1206]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1207]
ldrsb w0, [sp, 1206]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 244]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1208]
ldrb w1, [sp, 1154]
ldrb w0, [sp, 1181]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1209]
ldrb w1, [sp, 1154]
ldrb w0, [sp, 1181]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1210]
ldrsb w0, [sp, 1181]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 33]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1211]
ldrb w1, [sp, 1156]
ldrb w0, [sp, 1183]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1212]
ldrb w1, [sp, 1156]
ldrb w0, [sp, 1183]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1213]
ldrsb w0, [sp, 1183]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 48]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1214]
ldrb w1, [sp, 1158]
ldrb w0, [sp, 1185]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1215]
ldrb w1, [sp, 1158]
ldrb w0, [sp, 1185]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1216]
ldrsb w0, [sp, 1185]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 58]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1217]
ldrb w1, [sp, 1160]
ldrb w0, [sp, 1187]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1218]
ldrb w1, [sp, 1160]
ldrb w0, [sp, 1187]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1219]
ldrsb w0, [sp, 1187]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 67]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1220]
ldrb w1, [sp, 1162]
ldrb w0, [sp, 1189]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1221]
ldrb w1, [sp, 1162]
ldrb w0, [sp, 1189]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1222]
ldrsb w0, [sp, 1189]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 78]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1223]
ldrb w1, [sp, 1164]
ldrb w0, [sp, 1191]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1224]
ldrb w1, [sp, 1164]
ldrb w0, [sp, 1191]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1225]
ldrsb w0, [sp, 1191]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 88]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1226]
ldrb w1, [sp, 92]
ldrb w0, [sp, 1193]
eor w0, w1, w0
strb w0, [sp, 1227]
ldrsb w0, [sp, 1193]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 92]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1228]
ldrb w1, [sp, 1166]
ldrb w0, [sp, 1193]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1229]
ldrb w1, [sp, 560]
ldrb w0, [sp, 1195]
eor w0, w1, w0
strb w0, [sp, 1230]
ldrsb w0, [sp, 1195]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 560]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1231]
ldrsb w0, [sp, 1195]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 99]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1232]
ldrb w1, [sp, 1169]
ldrb w0, [sp, 1196]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1233]
ldrb w1, [sp, 1169]
ldrb w0, [sp, 1196]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1234]
ldrsb w0, [sp, 1196]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 168]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1235]
ldrb w1, [sp, 1171]
ldrb w0, [sp, 1198]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1236]
ldrb w1, [sp, 1171]
ldrb w0, [sp, 1198]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1237]
ldrsb w0, [sp, 1198]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 180]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1238]
ldrb w1, [sp, 1173]
ldrb w0, [sp, 1200]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1239]
ldrb w1, [sp, 1173]
ldrb w0, [sp, 1200]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1240]
ldrsb w0, [sp, 1200]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 193]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1241]
ldrb w1, [sp, 1175]
ldrb w0, [sp, 1202]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1242]
ldrb w1, [sp, 1175]
ldrb w0, [sp, 1202]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1243]
ldrsb w0, [sp, 1202]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 213]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1244]
ldrb w1, [sp, 1177]
ldrb w0, [sp, 1204]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1245]
ldrb w1, [sp, 1177]
ldrb w0, [sp, 1204]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1246]
ldrsb w0, [sp, 1204]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 228]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1247]
ldrb w1, [sp, 1179]
ldrb w0, [sp, 1206]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1248]
ldrb w1, [sp, 168]
ldrb w0, [sp, 1233]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1249]
ldrb w1, [sp, 1180]
ldrb w0, [sp, 1207]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1250]
ldrb w1, [sp, 33]
ldrb w0, [sp, 1209]
eor w0, w1, w0
strb w0, [sp, 1251]
ldrb w1, [sp, 1182]
ldrb w0, [sp, 1210]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1252]
ldrb w1, [sp, 48]
ldrb w0, [sp, 1212]
eor w0, w1, w0
strb w0, [sp, 1253]
ldrb w1, [sp, 1184]
ldrb w0, [sp, 1213]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1254]
ldrb w1, [sp, 58]
ldrb w0, [sp, 1215]
eor w0, w1, w0
strb w0, [sp, 1255]
ldrb w1, [sp, 1186]
ldrb w0, [sp, 1216]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1256]
ldrb w1, [sp, 67]
ldrb w0, [sp, 1218]
eor w0, w1, w0
strb w0, [sp, 1257]
ldrb w1, [sp, 1188]
ldrb w0, [sp, 1219]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1258]
ldrb w1, [sp, 78]
ldrb w0, [sp, 1221]
eor w0, w1, w0
strb w0, [sp, 1259]
ldrb w1, [sp, 1190]
ldrb w0, [sp, 1222]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1260]
ldrb w1, [sp, 88]
ldrb w0, [sp, 1224]
eor w0, w1, w0
strb w0, [sp, 1261]
ldrb w1, [sp, 1192]
ldrb w0, [sp, 1225]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1262]
ldrb w1, [sp, 1166]
ldrb w0, [sp, 1227]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1263]
ldrb w1, [sp, 1194]
ldrb w0, [sp, 1228]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1264]
ldrb w1, [sp, 99]
ldrb w0, [sp, 1230]
eor w0, w1, w0
strb w0, [sp, 1265]
ldrb w1, [sp, 591]
ldrb w0, [sp, 1231]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1266]
ldrb w1, [sp, 1235]
ldrb w0, [sp, 1234]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1267]
ldrb w1, [sp, 180]
ldrb w0, [sp, 1236]
eor w0, w1, w0
strb w0, [sp, 1268]
ldrb w1, [sp, 1238]
ldrb w0, [sp, 1237]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1269]
ldrb w1, [sp, 193]
ldrb w0, [sp, 1239]
eor w0, w1, w0
strb w0, [sp, 1270]
ldrb w1, [sp, 1241]
ldrb w0, [sp, 1240]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1271]
ldrb w1, [sp, 213]
ldrb w0, [sp, 1242]
eor w0, w1, w0
strb w0, [sp, 1272]
ldrb w1, [sp, 1244]
ldrb w0, [sp, 1243]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1273]
ldrb w1, [sp, 228]
ldrb w0, [sp, 1245]
eor w0, w1, w0
strb w0, [sp, 1274]
ldrb w1, [sp, 1247]
ldrb w0, [sp, 1246]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1275]
ldrb w1, [sp, 244]
ldrb w0, [sp, 1248]
eor w0, w1, w0
strb w0, [sp, 1276]
ldrsb w0, [sp, 1276]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 245]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1277]
ldrsb w0, [sp, 1208]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 1250]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1278]
ldrsb w0, [sp, 1251]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 34]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1279]
ldrsb w0, [sp, 1211]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 1252]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1280]
ldrsb w0, [sp, 1253]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 49]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1281]
ldrsb w0, [sp, 1214]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 1254]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1282]
ldrsb w0, [sp, 1255]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 59]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1283]
ldrsb w0, [sp, 1217]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 1256]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1284]
ldrsb w0, [sp, 1257]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 68]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1285]
ldrsb w0, [sp, 1220]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 1258]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1286]
ldrsb w0, [sp, 1259]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 79]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1287]
ldrsb w0, [sp, 1223]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 1260]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1288]
ldrsb w0, [sp, 1261]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 89]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1289]
ldrsb w0, [sp, 1226]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 1262]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1290]
ldrsb w0, [sp, 1263]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 95]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1291]
ldrsb w0, [sp, 1229]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 1264]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1292]
ldrsb w0, [sp, 1265]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 100]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1293]
ldrsb w0, [sp, 1232]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 1266]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1294]
ldrsb w0, [sp, 1197]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 1267]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1295]
ldrsb w0, [sp, 1268]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 181]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1296]
ldrsb w0, [sp, 1199]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 1269]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1297]
ldrsb w0, [sp, 1270]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 194]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1298]
ldrsb w0, [sp, 1201]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 1271]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1299]
ldrsb w0, [sp, 1272]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 214]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1300]
ldrsb w0, [sp, 1203]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 1273]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1301]
ldrsb w0, [sp, 1274]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 229]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1302]
ldrsb w0, [sp, 1205]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 1275]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1303]
ldrb w1, [sp, 1276]
ldrb w0, [sp, 1303]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1304]
ldrsb w0, [sp, 1303]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 245]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1305]
ldrb w1, [sp, 1251]
ldrb w0, [sp, 1278]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1306]
ldrb w1, [sp, 1251]
ldrb w0, [sp, 1278]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1307]
ldrsb w0, [sp, 1278]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 34]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1308]
ldrb w1, [sp, 1253]
ldrb w0, [sp, 1280]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1309]
ldrb w1, [sp, 1253]
ldrb w0, [sp, 1280]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1310]
ldrsb w0, [sp, 1280]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 49]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1311]
ldrb w1, [sp, 1255]
ldrb w0, [sp, 1282]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1312]
ldrb w1, [sp, 1255]
ldrb w0, [sp, 1282]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1313]
ldrsb w0, [sp, 1282]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 59]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1314]
ldrb w1, [sp, 1257]
ldrb w0, [sp, 1284]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1315]
ldrb w1, [sp, 1257]
ldrb w0, [sp, 1284]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1316]
ldrsb w0, [sp, 1284]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 68]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1317]
ldrb w1, [sp, 1259]
ldrb w0, [sp, 1286]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1318]
ldrb w1, [sp, 1259]
ldrb w0, [sp, 1286]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1319]
ldrsb w0, [sp, 1286]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 79]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1320]
ldrb w1, [sp, 1261]
ldrb w0, [sp, 1288]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1321]
ldrb w1, [sp, 1261]
ldrb w0, [sp, 1288]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1322]
ldrsb w0, [sp, 1288]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 89]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1323]
ldrb w1, [sp, 1263]
ldrb w0, [sp, 1290]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1324]
ldrb w1, [sp, 1263]
ldrb w0, [sp, 1290]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1325]
ldrsb w0, [sp, 1290]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 95]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1326]
ldrb w1, [sp, 1265]
ldrb w0, [sp, 1292]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1327]
ldrb w1, [sp, 1265]
ldrb w0, [sp, 1292]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1328]
ldrsb w0, [sp, 1292]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 100]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1329]
ldrb w1, [sp, 104]
ldrb w0, [sp, 1294]
eor w0, w1, w0
strb w0, [sp, 1330]
ldrsb w0, [sp, 1294]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 104]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1331]
ldrsb w0, [sp, 1294]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 626]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1332]
ldrb w1, [sp, 1268]
ldrb w0, [sp, 1295]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1333]
ldrb w1, [sp, 1268]
ldrb w0, [sp, 1295]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1334]
ldrsb w0, [sp, 1295]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 181]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1335]
ldrb w1, [sp, 1270]
ldrb w0, [sp, 1297]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1336]
ldrb w1, [sp, 1270]
ldrb w0, [sp, 1297]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1337]
ldrsb w0, [sp, 1297]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 194]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1338]
ldrb w1, [sp, 1272]
ldrb w0, [sp, 1299]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1339]
ldrb w1, [sp, 1272]
ldrb w0, [sp, 1299]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1340]
ldrsb w0, [sp, 1299]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 214]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1341]
ldrb w1, [sp, 1274]
ldrb w0, [sp, 1301]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1342]
ldrb w1, [sp, 1274]
ldrb w0, [sp, 1301]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1343]
ldrsb w0, [sp, 1301]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 229]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1344]
ldrb w1, [sp, 1276]
ldrb w0, [sp, 1303]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1345]
ldrb w1, [sp, 181]
ldrb w0, [sp, 1333]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1346]
ldrb w1, [sp, 1277]
ldrb w0, [sp, 1304]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1347]
ldrb w1, [sp, 34]
ldrb w0, [sp, 1306]
eor w0, w1, w0
strb w0, [sp, 1348]
ldrb w1, [sp, 1279]
ldrb w0, [sp, 1307]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1349]
ldrb w1, [sp, 49]
ldrb w0, [sp, 1309]
eor w0, w1, w0
strb w0, [sp, 1350]
ldrb w1, [sp, 1281]
ldrb w0, [sp, 1310]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1351]
ldrb w1, [sp, 59]
ldrb w0, [sp, 1312]
eor w0, w1, w0
strb w0, [sp, 1352]
ldrb w1, [sp, 1283]
ldrb w0, [sp, 1313]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1353]
ldrb w1, [sp, 68]
ldrb w0, [sp, 1315]
eor w0, w1, w0
strb w0, [sp, 1354]
ldrb w1, [sp, 1285]
ldrb w0, [sp, 1316]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1355]
ldrb w1, [sp, 79]
ldrb w0, [sp, 1318]
eor w0, w1, w0
strb w0, [sp, 1356]
ldrb w1, [sp, 1287]
ldrb w0, [sp, 1319]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1357]
ldrb w1, [sp, 89]
ldrb w0, [sp, 1321]
eor w0, w1, w0
strb w0, [sp, 1358]
ldrb w1, [sp, 1289]
ldrb w0, [sp, 1322]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1359]
ldrb w1, [sp, 95]
ldrb w0, [sp, 1324]
eor w0, w1, w0
strb w0, [sp, 1360]
ldrb w1, [sp, 1291]
ldrb w0, [sp, 1325]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1361]
ldrb w1, [sp, 100]
ldrb w0, [sp, 1327]
eor w0, w1, w0
strb w0, [sp, 1362]
ldrb w1, [sp, 1293]
ldrb w0, [sp, 1328]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1363]
ldrb w1, [sp, 626]
ldrb w0, [sp, 1330]
eor w0, w1, w0
strb w0, [sp, 1364]
ldrb w1, [sp, 667]
ldrb w0, [sp, 1331]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1365]
ldrb w1, [sp, 1335]
ldrb w0, [sp, 1334]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1366]
ldrb w1, [sp, 194]
ldrb w0, [sp, 1336]
eor w0, w1, w0
strb w0, [sp, 1367]
ldrb w1, [sp, 1338]
ldrb w0, [sp, 1337]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1368]
ldrb w1, [sp, 214]
ldrb w0, [sp, 1339]
eor w0, w1, w0
strb w0, [sp, 1369]
ldrb w1, [sp, 1341]
ldrb w0, [sp, 1340]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1370]
ldrb w1, [sp, 229]
ldrb w0, [sp, 1342]
eor w0, w1, w0
strb w0, [sp, 1371]
ldrb w1, [sp, 1344]
ldrb w0, [sp, 1343]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1372]
ldrb w1, [sp, 245]
ldrb w0, [sp, 1345]
eor w0, w1, w0
strb w0, [sp, 1373]
ldrsb w0, [sp, 1373]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 22]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1374]
ldrsb w0, [sp, 1305]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 1347]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1375]
ldrsb w0, [sp, 1348]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 35]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1376]
ldrsb w0, [sp, 1308]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 1349]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1377]
ldrsb w0, [sp, 1350]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 50]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1378]
ldrsb w0, [sp, 1311]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 1351]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1379]
ldrsb w0, [sp, 1352]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 60]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1380]
ldrsb w0, [sp, 1314]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 1353]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1381]
ldrsb w0, [sp, 1354]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 69]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1382]
ldrsb w0, [sp, 1317]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 1355]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1383]
ldrsb w0, [sp, 1356]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 80]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1384]
ldrsb w0, [sp, 1320]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 1357]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1385]
ldrsb w0, [sp, 1358]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 90]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1386]
ldrsb w0, [sp, 1323]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 1359]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1387]
ldrsb w0, [sp, 1360]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 96]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1388]
ldrsb w0, [sp, 1326]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 1361]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1389]
ldrsb w0, [sp, 1362]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 101]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1390]
ldrsb w0, [sp, 1329]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 1363]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1391]
ldrsb w0, [sp, 1364]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 103]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1392]
ldrsb w0, [sp, 1332]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 1365]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1393]
ldrsb w0, [sp, 1296]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 1366]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1394]
ldrsb w0, [sp, 1367]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 195]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1395]
ldrsb w0, [sp, 1298]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 1368]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1396]
ldrsb w0, [sp, 1369]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 215]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1397]
ldrsb w0, [sp, 1300]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 1370]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1398]
ldrsb w0, [sp, 1371]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 230]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1399]
ldrsb w0, [sp, 1302]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 1372]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1400]
ldrb w1, [sp, 1373]
ldrb w0, [sp, 1400]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1401]
ldrsb w0, [sp, 1400]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 22]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1402]
ldrb w1, [sp, 1348]
ldrb w0, [sp, 1375]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1403]
ldrb w1, [sp, 1348]
ldrb w0, [sp, 1375]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1404]
ldrsb w0, [sp, 1375]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 35]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1405]
ldrb w1, [sp, 1350]
ldrb w0, [sp, 1377]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1406]
ldrb w1, [sp, 1350]
ldrb w0, [sp, 1377]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1407]
ldrsb w0, [sp, 1377]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 50]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1408]
ldrb w1, [sp, 1352]
ldrb w0, [sp, 1379]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1409]
ldrb w1, [sp, 1352]
ldrb w0, [sp, 1379]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1410]
ldrsb w0, [sp, 1379]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 60]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1411]
ldrb w1, [sp, 1354]
ldrb w0, [sp, 1381]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1412]
ldrb w1, [sp, 1354]
ldrb w0, [sp, 1381]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1413]
ldrsb w0, [sp, 1381]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 69]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1414]
ldrb w1, [sp, 1356]
ldrb w0, [sp, 1383]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1415]
ldrb w1, [sp, 1356]
ldrb w0, [sp, 1383]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1416]
ldrsb w0, [sp, 1383]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 80]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1417]
ldrb w1, [sp, 1358]
ldrb w0, [sp, 1385]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1418]
ldrb w1, [sp, 1358]
ldrb w0, [sp, 1385]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1419]
ldrsb w0, [sp, 1385]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 90]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1420]
ldrb w1, [sp, 1360]
ldrb w0, [sp, 1387]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1421]
ldrb w1, [sp, 1360]
ldrb w0, [sp, 1387]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1422]
ldrsb w0, [sp, 1387]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 96]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1423]
ldrb w1, [sp, 1362]
ldrb w0, [sp, 1389]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1424]
ldrb w1, [sp, 1362]
ldrb w0, [sp, 1389]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1425]
ldrsb w0, [sp, 1389]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 101]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1426]
ldrb w1, [sp, 103]
ldrb w0, [sp, 1391]
eor w0, w1, w0
strb w0, [sp, 1427]
ldrsb w0, [sp, 1391]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 103]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1428]
ldrb w1, [sp, 1364]
ldrb w0, [sp, 1391]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1429]
ldrb w1, [sp, 627]
ldrb w0, [sp, 1393]
eor w0, w1, w0
strb w0, [sp, 1430]
ldrsb w0, [sp, 1393]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 627]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1431]
ldrsb w0, [sp, 1393]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 108]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1432]
ldrb w1, [sp, 1367]
ldrb w0, [sp, 1394]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1433]
ldrb w1, [sp, 1367]
ldrb w0, [sp, 1394]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1434]
ldrsb w0, [sp, 1394]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 195]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1435]
ldrb w1, [sp, 1369]
ldrb w0, [sp, 1396]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1436]
ldrb w1, [sp, 1369]
ldrb w0, [sp, 1396]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1437]
ldrsb w0, [sp, 1396]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 215]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1438]
ldrb w1, [sp, 1371]
ldrb w0, [sp, 1398]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1439]
ldrb w1, [sp, 1371]
ldrb w0, [sp, 1398]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1440]
ldrsb w0, [sp, 1398]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 230]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1441]
ldrb w1, [sp, 1373]
ldrb w0, [sp, 1400]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1442]
ldrb w1, [sp, 195]
ldrb w0, [sp, 1433]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1443]
ldrb w1, [sp, 1374]
ldrb w0, [sp, 1401]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1444]
ldrb w1, [sp, 35]
ldrb w0, [sp, 1403]
eor w0, w1, w0
strb w0, [sp, 1445]
ldrb w1, [sp, 1376]
ldrb w0, [sp, 1404]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1446]
ldrb w1, [sp, 50]
ldrb w0, [sp, 1406]
eor w0, w1, w0
strb w0, [sp, 1447]
ldrb w1, [sp, 1378]
ldrb w0, [sp, 1407]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1448]
ldrb w1, [sp, 60]
ldrb w0, [sp, 1409]
eor w0, w1, w0
strb w0, [sp, 1449]
ldrb w1, [sp, 1380]
ldrb w0, [sp, 1410]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1450]
ldrb w1, [sp, 69]
ldrb w0, [sp, 1412]
eor w0, w1, w0
strb w0, [sp, 1451]
ldrb w1, [sp, 1382]
ldrb w0, [sp, 1413]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1452]
ldrb w1, [sp, 80]
ldrb w0, [sp, 1415]
eor w0, w1, w0
strb w0, [sp, 1453]
ldrb w1, [sp, 1384]
ldrb w0, [sp, 1416]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1454]
ldrb w1, [sp, 90]
ldrb w0, [sp, 1418]
eor w0, w1, w0
strb w0, [sp, 1455]
ldrb w1, [sp, 1386]
ldrb w0, [sp, 1419]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1456]
ldrb w1, [sp, 96]
ldrb w0, [sp, 1421]
eor w0, w1, w0
strb w0, [sp, 1457]
ldrb w1, [sp, 1388]
ldrb w0, [sp, 1422]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1458]
ldrb w1, [sp, 101]
ldrb w0, [sp, 1424]
eor w0, w1, w0
strb w0, [sp, 1459]
ldrb w1, [sp, 1390]
ldrb w0, [sp, 1425]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1460]
ldrb w1, [sp, 1364]
ldrb w0, [sp, 1427]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1461]
ldrb w1, [sp, 1392]
ldrb w0, [sp, 1428]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1462]
ldrb w1, [sp, 108]
ldrb w0, [sp, 1430]
eor w0, w1, w0
strb w0, [sp, 1463]
ldrb w1, [sp, 668]
ldrb w0, [sp, 1431]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1464]
ldrb w1, [sp, 1435]
ldrb w0, [sp, 1434]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1465]
ldrb w1, [sp, 215]
ldrb w0, [sp, 1436]
eor w0, w1, w0
strb w0, [sp, 1466]
ldrb w1, [sp, 1438]
ldrb w0, [sp, 1437]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1467]
ldrb w1, [sp, 230]
ldrb w0, [sp, 1439]
eor w0, w1, w0
strb w0, [sp, 1468]
ldrb w1, [sp, 1441]
ldrb w0, [sp, 1440]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1469]
ldrb w1, [sp, 22]
ldrb w0, [sp, 1442]
eor w0, w1, w0
strb w0, [sp, 1470]
ldrb w1, [sp, 232]
ldrb w0, [sp, 1470]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1471]
ldrsb w0, [sp, 1402]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 1444]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1472]
ldrb w1, [sp, 23]
ldrb w0, [sp, 1445]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1473]
ldrsb w0, [sp, 1405]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 1446]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1474]
ldrb w1, [sp, 37]
ldrb w0, [sp, 1447]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1475]
ldrsb w0, [sp, 1408]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 1448]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1476]
ldrb w1, [sp, 51]
ldrb w0, [sp, 1449]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1477]
ldrsb w0, [sp, 1411]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 1450]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1478]
ldrb w1, [sp, 61]
ldrb w0, [sp, 1451]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1479]
ldrsb w0, [sp, 1414]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 1452]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1480]
ldrb w1, [sp, 70]
ldrb w0, [sp, 1453]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1481]
ldrsb w0, [sp, 1417]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 1454]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1482]
ldrb w1, [sp, 83]
ldrb w0, [sp, 1455]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1483]
ldrsb w0, [sp, 1420]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 1456]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1484]
ldrb w1, [sp, 91]
ldrb w0, [sp, 1457]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1485]
ldrsb w0, [sp, 1423]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 1458]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1486]
ldrb w1, [sp, 97]
ldrb w0, [sp, 1459]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1487]
ldrsb w0, [sp, 1426]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 1460]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1488]
ldrb w1, [sp, 102]
ldrb w0, [sp, 1461]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1489]
ldrsb w0, [sp, 1429]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 1462]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1490]
ldrb w1, [sp, 106]
ldrb w0, [sp, 1463]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1491]
ldrsb w0, [sp, 1432]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 1464]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1492]
ldrsb w0, [sp, 1395]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 1465]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1493]
ldrb w1, [sp, 197]
ldrb w0, [sp, 1466]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1494]
ldrsb w0, [sp, 1397]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 1467]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1495]
ldrb w1, [sp, 216]
ldrb w0, [sp, 1468]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1496]
ldrsb w0, [sp, 1399]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 1469]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1497]
ldrb w1, [sp, 232]
ldrb w0, [sp, 1497]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1498]
ldrb w1, [sp, 1470]
ldrb w0, [sp, 1497]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1499]
ldrb w1, [sp, 23]
ldrb w0, [sp, 1472]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1500]
ldrb w1, [sp, 23]
ldrb w0, [sp, 1472]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1501]
ldrb w1, [sp, 1445]
ldrb w0, [sp, 1472]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1502]
ldrb w1, [sp, 37]
ldrb w0, [sp, 1474]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1503]
ldrb w1, [sp, 37]
ldrb w0, [sp, 1474]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1504]
ldrb w1, [sp, 1447]
ldrb w0, [sp, 1474]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1505]
ldrb w1, [sp, 51]
ldrb w0, [sp, 1476]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1506]
ldrb w1, [sp, 51]
ldrb w0, [sp, 1476]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1507]
ldrb w1, [sp, 1449]
ldrb w0, [sp, 1476]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1508]
ldrb w1, [sp, 61]
ldrb w0, [sp, 1478]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1509]
ldrb w1, [sp, 61]
ldrb w0, [sp, 1478]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1510]
ldrb w1, [sp, 1451]
ldrb w0, [sp, 1478]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1511]
ldrb w1, [sp, 70]
ldrb w0, [sp, 1480]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1512]
ldrb w1, [sp, 70]
ldrb w0, [sp, 1480]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1513]
ldrb w1, [sp, 1453]
ldrb w0, [sp, 1480]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1514]
ldrb w1, [sp, 83]
ldrb w0, [sp, 1482]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1515]
ldrb w1, [sp, 83]
ldrb w0, [sp, 1482]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1516]
ldrb w1, [sp, 1455]
ldrb w0, [sp, 1482]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1517]
ldrb w1, [sp, 91]
ldrb w0, [sp, 1484]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1518]
ldrb w1, [sp, 91]
ldrb w0, [sp, 1484]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1519]
ldrb w1, [sp, 1457]
ldrb w0, [sp, 1484]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1520]
ldrb w1, [sp, 97]
ldrb w0, [sp, 1486]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1521]
ldrb w1, [sp, 97]
ldrb w0, [sp, 1486]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1522]
ldrb w1, [sp, 1459]
ldrb w0, [sp, 1486]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1523]
ldrb w1, [sp, 102]
ldrb w0, [sp, 1488]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1524]
ldrb w1, [sp, 102]
ldrb w0, [sp, 1488]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1525]
ldrb w1, [sp, 1461]
ldrb w0, [sp, 1488]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1526]
ldrb w1, [sp, 106]
ldrb w0, [sp, 1490]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1527]
ldrb w1, [sp, 106]
ldrb w0, [sp, 1490]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1528]
ldrb w1, [sp, 1463]
ldrb w0, [sp, 1490]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1529]
ldrb w1, [sp, 109]
ldrb w0, [sp, 1492]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1530]
ldrb w1, [sp, 109]
ldrb w0, [sp, 1492]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1531]
ldrsb w0, [sp, 1492]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 698]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1532]
ldrb w1, [sp, 197]
ldrb w0, [sp, 1493]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1533]
ldrb w1, [sp, 197]
ldrb w0, [sp, 1493]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1534]
ldrb w1, [sp, 1466]
ldrb w0, [sp, 1493]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1535]
ldrb w1, [sp, 216]
ldrb w0, [sp, 1495]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1536]
ldrb w1, [sp, 216]
ldrb w0, [sp, 1495]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1537]
ldrb w1, [sp, 1468]
ldrb w0, [sp, 1495]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1538]
ldrb w1, [sp, 232]
ldrb w0, [sp, 1497]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1539]
ldrb w1, [sp, 1466]
ldrb w0, [sp, 1533]
eor w0, w1, w0
strb w0, [sp, 1540]
ldrb w1, [sp, 1471]
ldrb w0, [sp, 1498]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1541]
ldrb w1, [sp, 1445]
ldrb w0, [sp, 1500]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1542]
ldrb w1, [sp, 1473]
ldrb w0, [sp, 1501]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1543]
ldrb w1, [sp, 1447]
ldrb w0, [sp, 1503]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1544]
ldrb w1, [sp, 1475]
ldrb w0, [sp, 1504]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1545]
ldrb w1, [sp, 1449]
ldrb w0, [sp, 1506]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1546]
ldrb w1, [sp, 1477]
ldrb w0, [sp, 1507]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1547]
ldrb w1, [sp, 1451]
ldrb w0, [sp, 1509]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1548]
ldrb w1, [sp, 1479]
ldrb w0, [sp, 1510]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1549]
ldrb w1, [sp, 1453]
ldrb w0, [sp, 1512]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1550]
ldrb w1, [sp, 1481]
ldrb w0, [sp, 1513]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1551]
ldrb w1, [sp, 1455]
ldrb w0, [sp, 1515]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1552]
ldrb w1, [sp, 1483]
ldrb w0, [sp, 1516]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1553]
ldrb w1, [sp, 1457]
ldrb w0, [sp, 1518]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1554]
ldrb w1, [sp, 1485]
ldrb w0, [sp, 1519]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1555]
ldrb w1, [sp, 1459]
ldrb w0, [sp, 1521]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1556]
ldrb w1, [sp, 1487]
ldrb w0, [sp, 1522]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1557]
ldrb w1, [sp, 1461]
ldrb w0, [sp, 1524]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1558]
ldrb w1, [sp, 1489]
ldrb w0, [sp, 1525]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1559]
ldrb w1, [sp, 1463]
ldrb w0, [sp, 1527]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1560]
ldrb w1, [sp, 1491]
ldrb w0, [sp, 1528]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1561]
ldrb w1, [sp, 698]
ldrb w0, [sp, 1530]
eor w0, w1, w0
strb w0, [sp, 1562]
ldrb w1, [sp, 733]
ldrb w0, [sp, 1531]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1563]
ldrb w1, [sp, 1494]
ldrb w0, [sp, 1534]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1564]
ldrb w1, [sp, 1468]
ldrb w0, [sp, 1536]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1565]
ldrb w1, [sp, 1496]
ldrb w0, [sp, 1537]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1566]
ldrb w1, [sp, 1470]
ldrb w0, [sp, 1539]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1567]
ldrsb w0, [sp, 1499]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 1541]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1568]
ldrsb w0, [sp, 1502]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 1543]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1569]
ldrsb w0, [sp, 1505]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 1545]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1570]
ldrsb w0, [sp, 1508]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 1547]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1571]
ldrsb w0, [sp, 1511]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 1549]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1572]
ldrsb w0, [sp, 1514]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 1551]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1573]
ldrsb w0, [sp, 1517]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 1553]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1574]
ldrsb w0, [sp, 1520]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 1555]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1575]
ldrsb w0, [sp, 1523]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 1557]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1576]
ldrsb w0, [sp, 1526]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 1559]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1577]
ldrsb w0, [sp, 1529]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 1561]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1578]
ldrsb w0, [sp, 1532]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 1563]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1579]
ldrsb w0, [sp, 1535]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 1564]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1580]
ldrsb w0, [sp, 1538]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 1566]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1581]
ldrb w1, [sp, 1565]
ldrb w0, [sp, 1580]
eor w0, w1, w0
strb w0, [sp, 1582]
ldrb w1, [sp, 1567]
ldrb w0, [sp, 1581]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1583]
ldrb w1, [sp, 1542]
ldrb w0, [sp, 1568]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1584]
ldrb w1, [sp, 1544]
ldrb w0, [sp, 1569]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1585]
ldrb w1, [sp, 1546]
ldrb w0, [sp, 1570]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1586]
ldrb w1, [sp, 1548]
ldrb w0, [sp, 1571]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1587]
ldrb w1, [sp, 1550]
ldrb w0, [sp, 1572]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1588]
ldrb w1, [sp, 1552]
ldrb w0, [sp, 1573]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1589]
ldrb w1, [sp, 1554]
ldrb w0, [sp, 1574]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1590]
ldrb w1, [sp, 1556]
ldrb w0, [sp, 1575]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1591]
ldrb w1, [sp, 1558]
ldrb w0, [sp, 1576]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1592]
ldrb w1, [sp, 1560]
ldrb w0, [sp, 1577]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1593]
ldrb w1, [sp, 1562]
ldrb w0, [sp, 1578]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1594]
ldrb w1, [sp, 699]
ldrb w0, [sp, 1579]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1595]
ldrb w1, [sp, 1565]
ldrb w0, [sp, 1580]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1596]
ldrb w1, [sp, 1567]
ldrb w0, [sp, 1581]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1597]
ldrb w1, [sp, 1597]
ldrb w0, [sp, 1596]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1598]
ldrsb w0, [sp, 1567]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 1596]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1599]
ldrsb w0, [sp, 1581]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 1596]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1600]
ldrb w1, [sp, 700]
ldrb w0, [sp, 1595]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1601]
ldrb w1, [sp, 1583]
ldrb w0, [sp, 1599]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1602]
ldrsb w0, [sp, 1600]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 1602]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1603]
ldrb w1, [sp, 1568]
ldrb w0, [sp, 1603]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1604]
ldrb w1, [sp, 1568]
ldrb w0, [sp, 1603]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1605]
ldrb w1, [sp, 1542]
ldrb w0, [sp, 1603]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1606]
ldrb w1, [sp, 1542]
ldrb w0, [sp, 1604]
eor w0, w1, w0
strb w0, [sp, 1607]
ldrb w1, [sp, 1584]
ldrb w0, [sp, 1605]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1608]
ldrsb w0, [sp, 1606]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 1608]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1609]
ldrb w1, [sp, 1569]
ldrb w0, [sp, 1609]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1610]
ldrb w1, [sp, 1569]
ldrb w0, [sp, 1609]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1611]
ldrb w1, [sp, 1544]
ldrb w0, [sp, 1609]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1612]
ldrb w1, [sp, 1544]
ldrb w0, [sp, 1610]
eor w0, w1, w0
strb w0, [sp, 1613]
ldrb w1, [sp, 1585]
ldrb w0, [sp, 1611]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1614]
ldrsb w0, [sp, 1612]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 1614]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1615]
ldrb w1, [sp, 1570]
ldrb w0, [sp, 1615]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1616]
ldrb w1, [sp, 1570]
ldrb w0, [sp, 1615]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1617]
ldrb w1, [sp, 1546]
ldrb w0, [sp, 1615]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1618]
ldrb w1, [sp, 1546]
ldrb w0, [sp, 1616]
eor w0, w1, w0
strb w0, [sp, 1619]
ldrb w1, [sp, 1586]
ldrb w0, [sp, 1617]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1620]
ldrsb w0, [sp, 1618]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 1620]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1621]
ldrb w1, [sp, 1571]
ldrb w0, [sp, 1621]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1622]
ldrb w1, [sp, 1571]
ldrb w0, [sp, 1621]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1623]
ldrb w1, [sp, 1548]
ldrb w0, [sp, 1621]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1624]
ldrb w1, [sp, 1548]
ldrb w0, [sp, 1622]
eor w0, w1, w0
strb w0, [sp, 1625]
ldrb w1, [sp, 1587]
ldrb w0, [sp, 1623]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1626]
ldrsb w0, [sp, 1624]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 1626]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1627]
ldrb w1, [sp, 1572]
ldrb w0, [sp, 1627]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1628]
ldrb w1, [sp, 1572]
ldrb w0, [sp, 1627]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1629]
ldrb w1, [sp, 1550]
ldrb w0, [sp, 1627]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1630]
ldrb w1, [sp, 1550]
ldrb w0, [sp, 1628]
eor w0, w1, w0
strb w0, [sp, 1631]
ldrb w1, [sp, 1588]
ldrb w0, [sp, 1629]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1632]
ldrsb w0, [sp, 1630]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 1632]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1633]
ldrb w1, [sp, 1573]
ldrb w0, [sp, 1633]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1634]
ldrb w1, [sp, 1573]
ldrb w0, [sp, 1633]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1635]
ldrb w1, [sp, 1552]
ldrb w0, [sp, 1633]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1636]
ldrb w1, [sp, 1552]
ldrb w0, [sp, 1634]
eor w0, w1, w0
strb w0, [sp, 1637]
ldrb w1, [sp, 1589]
ldrb w0, [sp, 1635]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1638]
ldrsb w0, [sp, 1636]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 1638]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1639]
ldrb w1, [sp, 1574]
ldrb w0, [sp, 1639]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1640]
ldrb w1, [sp, 1574]
ldrb w0, [sp, 1639]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1641]
ldrb w1, [sp, 1554]
ldrb w0, [sp, 1639]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1642]
ldrb w1, [sp, 1554]
ldrb w0, [sp, 1640]
eor w0, w1, w0
strb w0, [sp, 1643]
ldrb w1, [sp, 1590]
ldrb w0, [sp, 1641]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1644]
ldrsb w0, [sp, 1642]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 1644]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1645]
ldrb w1, [sp, 1575]
ldrb w0, [sp, 1645]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1646]
ldrb w1, [sp, 1575]
ldrb w0, [sp, 1645]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1647]
ldrb w1, [sp, 1556]
ldrb w0, [sp, 1645]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1648]
ldrb w1, [sp, 1556]
ldrb w0, [sp, 1646]
eor w0, w1, w0
strb w0, [sp, 1649]
ldrb w1, [sp, 1591]
ldrb w0, [sp, 1647]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1650]
ldrsb w0, [sp, 1648]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 1650]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1651]
ldrb w1, [sp, 1576]
ldrb w0, [sp, 1651]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1652]
ldrb w1, [sp, 1576]
ldrb w0, [sp, 1651]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1653]
ldrb w1, [sp, 1558]
ldrb w0, [sp, 1651]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1654]
ldrb w1, [sp, 1558]
ldrb w0, [sp, 1652]
eor w0, w1, w0
strb w0, [sp, 1655]
ldrb w1, [sp, 1592]
ldrb w0, [sp, 1653]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1656]
ldrsb w0, [sp, 1654]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 1656]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1657]
ldrb w1, [sp, 1577]
ldrb w0, [sp, 1657]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1658]
ldrb w1, [sp, 1577]
ldrb w0, [sp, 1657]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1659]
ldrb w1, [sp, 1560]
ldrb w0, [sp, 1657]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1660]
ldrb w1, [sp, 1560]
ldrb w0, [sp, 1658]
eor w0, w1, w0
strb w0, [sp, 1661]
ldrb w1, [sp, 1593]
ldrb w0, [sp, 1659]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1662]
ldrsb w0, [sp, 1660]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 1662]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1663]
ldrb w1, [sp, 1578]
ldrb w0, [sp, 1663]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1664]
ldrb w1, [sp, 1578]
ldrb w0, [sp, 1663]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1665]
ldrb w1, [sp, 1562]
ldrb w0, [sp, 1663]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1666]
ldrb w1, [sp, 1562]
ldrb w0, [sp, 1664]
eor w0, w1, w0
strb w0, [sp, 1667]
ldrb w1, [sp, 1594]
ldrb w0, [sp, 1665]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1668]
ldrsb w0, [sp, 1666]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 1668]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1669]
ldrb w1, [sp, 1579]
ldrb w0, [sp, 1669]
eor w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1670]
ldrb w1, [sp, 1579]
ldrb w0, [sp, 1669]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1671]
ldrb w1, [sp, 699]
ldrb w0, [sp, 1669]
orr w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 1672]
ldrb w1, [sp, 699]
ldrb w0, [sp, 1670]
eor w0, w1, w0
strb w0, [sp, 1673]
ldrsb w0, [sp, 1671]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 1601]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1674]
ldrsb w0, [sp, 1672]
mvn w0, w0
sxtb w1, w0
ldrsb w0, [sp, 1674]
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 1675]
ldrb w1, [sp, 19]
ldrb w0, [sp, 20]
lsl w0, w0, 1
orr w1, w1, w0
ldrb w0, [sp, 21]
lsl w0, w0, 2
orr w1, w1, w0
ldrb w0, [sp, 277]
lsl w0, w0, 3
orr w1, w1, w0
ldrb w0, [sp, 336]
lsl w0, w0, 4
orr w1, w1, w0
ldrb w0, [sp, 444]
lsl w0, w0, 5
orr w1, w1, w0
ldrb w0, [sp, 552]
lsl w0, w0, 6
orr w1, w1, w0
ldrb w0, [sp, 659]
lsl w0, w0, 7
orr w1, w1, w0
ldrb w0, [sp, 764]
lsl w0, w0, 8
orr w1, w1, w0
ldrb w0, [sp, 861]
lsl w0, w0, 9
orr w1, w1, w0
ldrb w0, [sp, 958]
lsl w0, w0, 10
orr w1, w1, w0
ldrb w0, [sp, 1055]
lsl w0, w0, 11
orr w1, w1, w0
ldrb w0, [sp, 1152]
lsl w0, w0, 12
orr w1, w1, w0
ldrb w0, [sp, 1249]
lsl w0, w0, 13
orr w1, w1, w0
ldrb w0, [sp, 1346]
lsl w0, w0, 14
orr w1, w1, w0
ldrb w0, [sp, 1443]
lsl w0, w0, 15
orr w1, w1, w0
ldrb w0, [sp, 1540]
lsl w0, w0, 16
orr w1, w1, w0
ldrb w0, [sp, 1582]
lsl w0, w0, 17
orr w1, w1, w0
ldrb w0, [sp, 1598]
lsl w0, w0, 18
orr w1, w1, w0
ldrb w0, [sp, 1607]
lsl w0, w0, 19
orr w1, w1, w0
ldrb w0, [sp, 1613]
lsl w0, w0, 20
orr w1, w1, w0
ldrb w0, [sp, 1619]
lsl w0, w0, 21
orr w1, w1, w0
ldrb w0, [sp, 1625]
lsl w0, w0, 22
orr w1, w1, w0
ldrb w0, [sp, 1631]
lsl w0, w0, 23
orr w1, w1, w0
ldrb w0, [sp, 1637]
lsl w0, w0, 24
orr w1, w1, w0
ldrb w0, [sp, 1643]
lsl w0, w0, 25
orr w1, w1, w0
ldrb w0, [sp, 1649]
lsl w0, w0, 26
orr w1, w1, w0
ldrb w0, [sp, 1655]
lsl w0, w0, 27
orr w1, w1, w0
ldrb w0, [sp, 1661]
lsl w0, w0, 28
orr w1, w1, w0
ldrb w0, [sp, 1667]
lsl w0, w0, 29
orr w1, w1, w0
ldrb w0, [sp, 1673]
lsl w0, w0, 30
orr w1, w1, w0
ldrb w0, [sp, 1675]
lsl w0, w0, 31
orr w0, w1, w0
str w0, [sp, 1676]
ldr w0, [sp, 1676]
add sp, sp, 1680
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE6:
.size mul16s_HDG, .-mul16s_HDG
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.type findMin, %function
findMin:
.LFB6:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str x0, [sp, 8]
str w1, [sp, 4]
ldr w0, [sp, 4]
cmp w0, 1
bne .L2
ldr x0, [sp, 8]
ldr w0, [x0]
b .L3
.L2:
mov w0, 1
str w0, [sp, 28]
b .L4
.L6:
ldrsw x0, [sp, 28]
lsl x0, x0, 2
ldr x1, [sp, 8]
add x0, x1, x0
ldr w1, [x0]
ldrsw x0, [sp, 28]
lsl x0, x0, 2
sub x0, x0, #4
ldr x2, [sp, 8]
add x0, x2, x0
ldr w0, [x0]
cmp w1, w0
bge .L5
ldrsw x0, [sp, 28]
lsl x0, x0, 2
ldr x1, [sp, 8]
add x0, x1, x0
ldr w0, [x0]
b .L3
.L5:
ldr w0, [sp, 28]
add w0, w0, 1
str w0, [sp, 28]
.L4:
ldr w1, [sp, 28]
ldr w0, [sp, 4]
cmp w1, w0
blt .L6
ldr x0, [sp, 8]
ldr w0, [x0]
.L3:
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE6:
.size findMin, .-findMin
.section .rodata
.align 3
.LC0:
.string "%d\n"
.text
.align 2
.global main
.type main, %function
main:
.LFB7:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str x19, [sp, 16]
.cfi_offset 19, -48
str w0, [sp, 44]
str x1, [sp, 32]
ldr w0, [sp, 44]
sub w0, w0, #1
str w0, [sp, 52]
ldrsw x0, [sp, 52]
lsl x0, x0, 2
bl malloc
str x0, [sp, 56]
str wzr, [sp, 48]
b .L8
.L9:
ldrsw x0, [sp, 48]
add x0, x0, 1
lsl x0, x0, 3
ldr x1, [sp, 32]
add x0, x1, x0
ldr x2, [x0]
ldrsw x0, [sp, 48]
lsl x0, x0, 2
ldr x1, [sp, 56]
add x19, x1, x0
mov x0, x2
bl atoi
str w0, [x19]
ldr w0, [sp, 48]
add w0, w0, 1
str w0, [sp, 48]
.L8:
ldr w1, [sp, 48]
ldr w0, [sp, 52]
cmp w1, w0
blt .L9
ldr w1, [sp, 52]
ldr x0, [sp, 56]
bl findMin
mov w1, w0
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl printf
mov w0, 0
ldr x19, [sp, 16]
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_restore 19
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE7:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC0:
.string "error: zero divisor"
.align 3
.LC1:
.string "Error: no variable name"
.align 3
.LC2:
.string "\t%.8g\n"
.align 3
.LC3:
.string "Error: unknown command %s\n"
.text
.align 2
.global main
.type main, %function
main:
.LFB6:
.cfi_startproc
stp x29, x30, [sp, -384]!
.cfi_def_cfa_offset 384
.cfi_offset 29, -384
.cfi_offset 30, -376
mov x29, sp
str x19, [sp, 16]
str d8, [sp, 24]
.cfi_offset 19, -368
.cfi_offset 72, -360
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 376]
mov x1, 0
str wzr, [sp, 40]
str wzr, [sp, 36]
b .L2
.L3:
ldrsw x0, [sp, 36]
lsl x0, x0, 3
add x1, sp, 64
str xzr, [x1, x0]
ldr w0, [sp, 36]
add w0, w0, 1
str w0, [sp, 36]
.L2:
ldr w0, [sp, 36]
cmp w0, 25
ble .L3
b .L4
.L21:
ldr w0, [sp, 44]
cmp w0, 61
beq .L5
ldr w0, [sp, 44]
cmp w0, 61
bgt .L6
ldr w0, [sp, 44]
cmp w0, 48
beq .L7
ldr w0, [sp, 44]
cmp w0, 48
bgt .L6
ldr w0, [sp, 44]
cmp w0, 47
beq .L8
ldr w0, [sp, 44]
cmp w0, 47
bgt .L6
ldr w0, [sp, 44]
cmp w0, 45
beq .L9
ldr w0, [sp, 44]
cmp w0, 45
bgt .L6
ldr w0, [sp, 44]
cmp w0, 43
beq .L10
ldr w0, [sp, 44]
cmp w0, 43
bgt .L6
ldr w0, [sp, 44]
cmp w0, 10
beq .L11
ldr w0, [sp, 44]
cmp w0, 42
beq .L12
b .L6
.L7:
add x0, sp, 272
bl atof
bl push
b .L13
.L10:
bl pop
fmov d8, d0
bl pop
fadd d0, d8, d0
bl push
b .L13
.L12:
bl pop
fmov d8, d0
bl pop
fmul d0, d8, d0
bl push
b .L13
.L9:
bl pop
str d0, [sp, 56]
bl pop
fmov d1, d0
ldr d0, [sp, 56]
fsub d0, d1, d0
bl push
b .L13
.L8:
bl pop
str d0, [sp, 56]
ldr d0, [sp, 56]
fcmp d0, #0.0
beq .L14
bl pop
fmov d1, d0
ldr d0, [sp, 56]
fdiv d0, d1, d0
bl push
b .L13
.L14:
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl puts
b .L13
.L5:
bl pop
ldr w0, [sp, 40]
cmp w0, 64
ble .L16
ldr w0, [sp, 40]
cmp w0, 90
bgt .L16
ldr w0, [sp, 40]
sub w19, w0, #65
bl pop
sxtw x0, w19
lsl x0, x0, 3
add x1, sp, 64
str d0, [x1, x0]
b .L13
.L16:
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl puts
b .L13
.L11:
bl pop
str d0, [sp, 48]
ldr d0, [sp, 48]
adrp x0, .LC2
add x0, x0, :lo12:.LC2
bl printf
b .L13
.L6:
ldr w0, [sp, 44]
cmp w0, 64
ble .L18
ldr w0, [sp, 44]
cmp w0, 90
bgt .L18
ldr w0, [sp, 44]
sub w0, w0, #65
sxtw x0, w0
lsl x0, x0, 3
add x1, sp, 64
ldr d0, [x1, x0]
bl push
b .L24
.L18:
ldr w0, [sp, 44]
cmp w0, 118
bne .L20
ldr d0, [sp, 48]
bl push
b .L24
.L20:
add x0, sp, 272
mov x1, x0
adrp x0, .LC3
add x0, x0, :lo12:.LC3
bl printf
.L24:
nop
.L13:
ldr w0, [sp, 44]
str w0, [sp, 40]
.L4:
add x0, sp, 272
bl getop
str w0, [sp, 44]
ldr w0, [sp, 44]
cmn w0, #1
bne .L21
mov w0, 0
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 376]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L23
bl __stack_chk_fail
.L23:
mov w0, w1
ldr d8, [sp, 24]
ldr x19, [sp, 16]
ldp x29, x30, [sp], 384
.cfi_restore 30
.cfi_restore 29
.cfi_restore 19
.cfi_restore 72
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE6:
.size main, .-main
.align 2
.global getop
.type getop, %function
getop:
.LFB7:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str x19, [sp, 16]
.cfi_offset 19, -48
str x0, [sp, 40]
nop
.L26:
bl getch
str w0, [sp, 56]
ldr w0, [sp, 56]
and w1, w0, 255
ldr x0, [sp, 40]
strb w1, [x0]
ldr x0, [sp, 40]
ldrb w0, [x0]
cmp w0, 32
beq .L26
ldr w0, [sp, 56]
cmp w0, 9
beq .L26
ldr x0, [sp, 40]
add x0, x0, 1
strb wzr, [x0]
str wzr, [sp, 60]
bl __ctype_b_loc
ldr x1, [x0]
ldrsw x0, [sp, 56]
lsl x0, x0, 1
add x0, x1, x0
ldrh w0, [x0]
and w0, w0, 512
cmp w0, 0
beq .L27
nop
.L28:
bl __ctype_b_loc
ldr x19, [x0]
bl getch
str w0, [sp, 56]
ldr w0, [sp, 60]
add w0, w0, 1
str w0, [sp, 60]
ldrsw x0, [sp, 60]
ldr x1, [sp, 40]
add x0, x1, x0
ldr w1, [sp, 56]
and w1, w1, 255
strb w1, [x0]
ldrb w0, [x0]
and x0, x0, 255
lsl x0, x0, 1
add x0, x19, x0
ldrh w0, [x0]
and w0, w0, 512
cmp w0, 0
bne .L28
ldrsw x0, [sp, 60]
ldr x1, [sp, 40]
add x0, x1, x0
strb wzr, [x0]
ldr w0, [sp, 56]
cmn w0, #1
beq .L29
ldr w0, [sp, 56]
bl ungetch
.L29:
ldr x0, [sp, 40]
bl strlen
cmp x0, 1
bls .L30
mov w0, 110
b .L31
.L30:
ldr x0, [sp, 40]
ldrb w0, [x0]
b .L31
.L27:
bl __ctype_b_loc
ldr x1, [x0]
ldrsw x0, [sp, 56]
lsl x0, x0, 1
add x0, x1, x0
ldrh w0, [x0]
and w0, w0, 2048
cmp w0, 0
bne .L32
ldr w0, [sp, 56]
cmp w0, 46
beq .L32
ldr w0, [sp, 56]
b .L31
.L32:
bl __ctype_b_loc
ldr x1, [x0]
ldrsw x0, [sp, 56]
lsl x0, x0, 1
add x0, x1, x0
ldrh w0, [x0]
and w0, w0, 2048
cmp w0, 0
beq .L33
nop
.L34:
bl __ctype_b_loc
ldr x19, [x0]
bl getch
str w0, [sp, 56]
ldr w0, [sp, 60]
add w0, w0, 1
str w0, [sp, 60]
ldrsw x0, [sp, 60]
ldr x1, [sp, 40]
add x0, x1, x0
ldr w1, [sp, 56]
and w1, w1, 255
strb w1, [x0]
ldrb w0, [x0]
and x0, x0, 255
lsl x0, x0, 1
add x0, x19, x0
ldrh w0, [x0]
and w0, w0, 2048
cmp w0, 0
bne .L34
.L33:
ldr w0, [sp, 56]
cmp w0, 46
bne .L35
nop
.L36:
bl __ctype_b_loc
ldr x19, [x0]
bl getch
str w0, [sp, 56]
ldr w0, [sp, 60]
add w0, w0, 1
str w0, [sp, 60]
ldrsw x0, [sp, 60]
ldr x1, [sp, 40]
add x0, x1, x0
ldr w1, [sp, 56]
and w1, w1, 255
strb w1, [x0]
ldrb w0, [x0]
and x0, x0, 255
lsl x0, x0, 1
add x0, x19, x0
ldrh w0, [x0]
and w0, w0, 2048
cmp w0, 0
bne .L36
.L35:
ldrsw x0, [sp, 60]
ldr x1, [sp, 40]
add x0, x1, x0
strb wzr, [x0]
ldr w0, [sp, 56]
cmn w0, #1
beq .L37
ldr w0, [sp, 56]
bl ungetch
.L37:
mov w0, 48
.L31:
ldr x19, [sp, 16]
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_restore 19
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE7:
.size getop, .-getop
.global sp
.bss
.align 2
.type sp, %object
.size sp, 4
sp:
.zero 4
.global val
.align 3
.type val, %object
.size val, 800
val:
.zero 800
.section .rodata
.align 3
.LC4:
.string "error: stack full, can't push %g\n"
.text
.align 2
.global push
.type push, %function
push:
.LFB8:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str d0, [sp, 24]
adrp x0, sp
add x0, x0, :lo12:sp
ldr w0, [x0]
cmp w0, 99
bgt .L39
adrp x0, sp
add x0, x0, :lo12:sp
ldr w0, [x0]
add w2, w0, 1
adrp x1, sp
add x1, x1, :lo12:sp
str w2, [x1]
adrp x1, val
add x1, x1, :lo12:val
sxtw x0, w0
ldr d0, [sp, 24]
str d0, [x1, x0, lsl 3]
b .L41
.L39:
ldr d0, [sp, 24]
adrp x0, .LC4
add x0, x0, :lo12:.LC4
bl printf
.L41:
nop
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE8:
.size push, .-push
.section .rodata
.align 3
.LC5:
.string "error: stack empty"
.text
.align 2
.global pop
.type pop, %function
pop:
.LFB9:
.cfi_startproc
stp x29, x30, [sp, -16]!
.cfi_def_cfa_offset 16
.cfi_offset 29, -16
.cfi_offset 30, -8
mov x29, sp
adrp x0, sp
add x0, x0, :lo12:sp
ldr w0, [x0]
cmp w0, 0
ble .L43
adrp x0, sp
add x0, x0, :lo12:sp
ldr w0, [x0]
sub w1, w0, #1
adrp x0, sp
add x0, x0, :lo12:sp
str w1, [x0]
adrp x0, sp
add x0, x0, :lo12:sp
ldr w1, [x0]
adrp x0, val
add x0, x0, :lo12:val
sxtw x1, w1
ldr d0, [x0, x1, lsl 3]
b .L44
.L43:
adrp x0, .LC5
add x0, x0, :lo12:.LC5
bl puts
movi d0, #0
.L44:
ldp x29, x30, [sp], 16
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE9:
.size pop, .-pop
.global buf
.bss
.align 3
.type buf, %object
.size buf, 100
buf:
.zero 100
.global bufp
.align 2
.type bufp, %object
.size bufp, 4
bufp:
.zero 4
.text
.align 2
.global getch
.type getch, %function
getch:
.LFB10:
.cfi_startproc
stp x29, x30, [sp, -16]!
.cfi_def_cfa_offset 16
.cfi_offset 29, -16
.cfi_offset 30, -8
mov x29, sp
adrp x0, bufp
add x0, x0, :lo12:bufp
ldr w0, [x0]
cmp w0, 0
ble .L46
adrp x0, bufp
add x0, x0, :lo12:bufp
ldr w0, [x0]
sub w1, w0, #1
adrp x0, bufp
add x0, x0, :lo12:bufp
str w1, [x0]
adrp x0, bufp
add x0, x0, :lo12:bufp
ldr w2, [x0]
adrp x0, buf
add x1, x0, :lo12:buf
sxtw x0, w2
ldrb w0, [x1, x0]
b .L48
.L46:
bl getchar
.L48:
ldp x29, x30, [sp], 16
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE10:
.size getch, .-getch
.section .rodata
.align 3
.LC6:
.string "ungetch: too many characters"
.text
.align 2
.global ungetch
.type ungetch, %function
ungetch:
.LFB11:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str w0, [sp, 28]
adrp x0, bufp
add x0, x0, :lo12:bufp
ldr w0, [x0]
cmp w0, 99
ble .L50
adrp x0, .LC6
add x0, x0, :lo12:.LC6
bl puts
b .L52
.L50:
adrp x0, bufp
add x0, x0, :lo12:bufp
ldr w0, [x0]
add w2, w0, 1
adrp x1, bufp
add x1, x1, :lo12:bufp
str w2, [x1]
ldr w1, [sp, 28]
and w2, w1, 255
adrp x1, buf
add x1, x1, :lo12:buf
sxtw x0, w0
strb w2, [x1, x0]
.L52:
nop
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE11:
.size ungetch, .-ungetch
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.global __clz_tab
.section .rodata
.align 3
.type __clz_tab, %object
.size __clz_tab, 256
__clz_tab:
.string ""
.ascii "\001\002\002\003\003\003\003\004\004\004\004\004\004\004\004"
.ascii "\005\005\005\005\005\005\005\005\005\005\005\005\005\005\005"
.ascii "\005\006\006\006\006\006\006\006\006\006\006\006\006\006\006"
.ascii "\006\006\006\006\006\006\006\006\006\006\006\006\006\006\006"
.ascii "\006\006\006\007\007\007\007\007\007\007\007\007\007\007\007"
.ascii "\007\007\007\007\007\007\007\007\007\007\007\007\007\007\007"
.ascii "\007\007\007\007\007\007\007\007\007\007\007\007\007\007\007"
.ascii "\007\007\007\007\007\007\007\007\007\007\007\007\007\007\007"
.ascii "\007\007\007\007\007\007\007\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b"
.ascii "\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b"
.ascii "\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b"
.ascii "\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b"
.ascii "\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b"
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global fiat_pasta_fq_addcarryx_u64
.type fiat_pasta_fq_addcarryx_u64, %function
fiat_pasta_fq_addcarryx_u64:
.LFB0:
.cfi_startproc
sub sp, sp, #64
.cfi_def_cfa_offset 64
str x0, [sp, 40]
str x1, [sp, 32]
strb w2, [sp, 31]
str x3, [sp, 16]
str x4, [sp, 8]
ldrb w0, [sp, 31]
ldr x1, [sp, 8]
add x0, x1, x0
str x0, [sp, 56]
ldr x1, [sp, 16]
ldr x0, [sp, 56]
add x1, x1, x0
ldr x0, [sp, 40]
str x1, [x0]
ldr x0, [sp, 40]
ldr x0, [x0]
ldr x1, [sp, 16]
cmp x1, x0
cset w0, hi
and w1, w0, 255
ldr x2, [sp, 8]
ldr x0, [sp, 56]
cmp x2, x0
cset w0, hi
and w0, w0, 255
orr w0, w1, w0
and w0, w0, 255
mov w1, w0
ldr x0, [sp, 32]
strb w1, [x0]
nop
add sp, sp, 64
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size fiat_pasta_fq_addcarryx_u64, .-fiat_pasta_fq_addcarryx_u64
.align 2
.global fiat_pasta_fq_subborrowx_u64
.type fiat_pasta_fq_subborrowx_u64, %function
fiat_pasta_fq_subborrowx_u64:
.LFB1:
.cfi_startproc
sub sp, sp, #64
.cfi_def_cfa_offset 64
str x0, [sp, 40]
str x1, [sp, 32]
strb w2, [sp, 31]
str x3, [sp, 16]
str x4, [sp, 8]
ldrb w0, [sp, 31]
ldr x1, [sp, 8]
add x0, x1, x0
str x0, [sp, 56]
ldr x1, [sp, 16]
ldr x0, [sp, 56]
sub x1, x1, x0
ldr x0, [sp, 40]
str x1, [x0]
ldr x0, [sp, 40]
ldr x0, [x0]
ldr x1, [sp, 16]
cmp x1, x0
cset w0, cc
and w1, w0, 255
ldr x2, [sp, 8]
ldr x0, [sp, 56]
cmp x2, x0
cset w0, hi
and w0, w0, 255
orr w0, w1, w0
and w0, w0, 255
mov w1, w0
ldr x0, [sp, 32]
strb w1, [x0]
nop
add sp, sp, 64
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE1:
.size fiat_pasta_fq_subborrowx_u64, .-fiat_pasta_fq_subborrowx_u64
.align 2
.global fiat_pasta_fq_mulx_u64
.type fiat_pasta_fq_mulx_u64, %function
fiat_pasta_fq_mulx_u64:
.LFB2:
.cfi_startproc
sub sp, sp, #112
.cfi_def_cfa_offset 112
str x0, [sp, 24]
str x1, [sp, 16]
str x2, [sp, 8]
str x3, [sp]
ldr x0, [sp, 8]
uxtw x0, w0
str x0, [sp, 32]
ldr x0, [sp, 8]
lsr x0, x0, 32
str x0, [sp, 40]
ldr x0, [sp]
uxtw x0, w0
str x0, [sp, 48]
ldr x0, [sp]
lsr x0, x0, 32
str x0, [sp, 56]
ldr x1, [sp, 40]
ldr x0, [sp, 56]
mul x0, x1, x0
str x0, [sp, 64]
ldr x1, [sp, 40]
ldr x0, [sp, 48]
mul x0, x1, x0
str x0, [sp, 72]
ldr x1, [sp, 56]
ldr x0, [sp, 32]
mul x0, x1, x0
str x0, [sp, 80]
ldr x1, [sp, 32]
ldr x0, [sp, 48]
mul x0, x1, x0
str x0, [sp, 88]
ldr x0, [sp, 72]
uxtw x1, w0
ldr x0, [sp, 80]
uxtw x0, w0
add x1, x1, x0
ldr x0, [sp, 88]
lsr x0, x0, 32
add x0, x1, x0
lsr x0, x0, 32
str x0, [sp, 96]
ldr x0, [sp, 72]
lsr x1, x0, 32
ldr x0, [sp, 64]
add x1, x1, x0
ldr x0, [sp, 80]
lsr x0, x0, 32
add x0, x1, x0
ldr x1, [sp, 96]
add x0, x1, x0
str x0, [sp, 104]
ldr x0, [sp, 16]
ldr x1, [sp, 104]
str x1, [x0]
ldr x1, [sp, 8]
ldr x0, [sp]
mul x1, x1, x0
ldr x0, [sp, 24]
str x1, [x0]
nop
add sp, sp, 112
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE2:
.size fiat_pasta_fq_mulx_u64, .-fiat_pasta_fq_mulx_u64
.align 2
.global fiat_pasta_fq_cmovznz_u64
.type fiat_pasta_fq_cmovznz_u64, %function
fiat_pasta_fq_cmovznz_u64:
.LFB3:
.cfi_startproc
sub sp, sp, #64
.cfi_def_cfa_offset 64
str x0, [sp, 24]
strb w1, [sp, 23]
str x2, [sp, 8]
str x3, [sp]
ldrb w0, [sp, 23]
cmp w0, 0
cset w0, ne
and w0, w0, 255
strb w0, [sp, 47]
ldrb w0, [sp, 47]
neg w0, w0
and w0, w0, 255
sxtb w0, w0
sxtb x0, w0
str x0, [sp, 48]
ldr x1, [sp, 48]
ldr x0, [sp]
and x1, x1, x0
ldr x0, [sp, 48]
mvn x2, x0
ldr x0, [sp, 8]
and x0, x2, x0
orr x0, x1, x0
str x0, [sp, 56]
ldr x0, [sp, 24]
ldr x1, [sp, 56]
str x1, [x0]
nop
add sp, sp, 64
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE3:
.size fiat_pasta_fq_cmovznz_u64, .-fiat_pasta_fq_cmovznz_u64
.align 2
.global fiat_pasta_fq_mul
.type fiat_pasta_fq_mul, %function
fiat_pasta_fq_mul:
.LFB4:
.cfi_startproc
sub sp, sp, #1232
.cfi_def_cfa_offset 1232
stp x29, x30, [sp]
.cfi_offset 29, -1232
.cfi_offset 30, -1224
mov x29, sp
str x0, [sp, 40]
str x1, [sp, 32]
str x2, [sp, 24]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 1224]
mov x1, 0
ldr x0, [sp, 32]
add x0, x0, 8
ldr x0, [x0]
str x0, [sp, 1104]
ldr x0, [sp, 32]
add x0, x0, 16
ldr x0, [x0]
str x0, [sp, 1112]
ldr x0, [sp, 32]
add x0, x0, 24
ldr x0, [x0]
str x0, [sp, 1120]
ldr x0, [sp, 32]
ldr x0, [x0]
str x0, [sp, 1128]
ldr x0, [sp, 24]
add x0, x0, 24
ldr x2, [x0]
add x1, sp, 120
add x0, sp, 112
mov x3, x2
ldr x2, [sp, 1128]
bl fiat_pasta_fq_mulx_u64
ldr x0, [sp, 24]
add x0, x0, 16
ldr x2, [x0]
add x1, sp, 136
add x0, sp, 128
mov x3, x2
ldr x2, [sp, 1128]
bl fiat_pasta_fq_mulx_u64
ldr x0, [sp, 24]
add x0, x0, 8
ldr x2, [x0]
add x1, sp, 152
add x0, sp, 144
mov x3, x2
ldr x2, [sp, 1128]
bl fiat_pasta_fq_mulx_u64
ldr x0, [sp, 24]
ldr x2, [x0]
add x1, sp, 168
add x0, sp, 160
mov x3, x2
ldr x2, [sp, 1128]
bl fiat_pasta_fq_mulx_u64
ldr x2, [sp, 168]
ldr x3, [sp, 144]
add x1, sp, 56
add x0, sp, 176
mov x4, x3
mov x3, x2
mov w2, 0
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 56]
ldr x2, [sp, 152]
ldr x3, [sp, 128]
add x1, sp, 57
add x0, sp, 184
mov x4, x3
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 57]
ldr x2, [sp, 136]
ldr x3, [sp, 112]
add x1, sp, 58
add x0, sp, 192
mov x4, x3
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
ldrb w0, [sp, 58]
and x1, x0, 255
ldr x0, [sp, 120]
add x0, x1, x0
str x0, [sp, 1136]
ldr x2, [sp, 160]
add x1, sp, 208
add x0, sp, 200
mov x3, -22948010262529
movk x3, 0x8c46, lsl 48
bl fiat_pasta_fq_mulx_u64
ldr x2, [sp, 200]
add x1, sp, 224
add x0, sp, 216
mov x3, 4611686018427387904
bl fiat_pasta_fq_mulx_u64
ldr x2, [sp, 200]
add x1, sp, 240
add x0, sp, 232
mov x3, 43229
movk x3, 0x994, lsl 16
movk x3, 0x98fc, lsl 32
movk x3, 0x2246, lsl 48
bl fiat_pasta_fq_mulx_u64
ldr x2, [sp, 200]
add x1, sp, 256
add x0, sp, 248
mov x3, 1
movk x3, 0xeb21, lsl 32
movk x3, 0x8c46, lsl 48
bl fiat_pasta_fq_mulx_u64
ldr x2, [sp, 256]
ldr x3, [sp, 232]
add x1, sp, 59
add x0, sp, 264
mov x4, x3
mov x3, x2
mov w2, 0
bl fiat_pasta_fq_addcarryx_u64
ldrb w0, [sp, 59]
and x1, x0, 255
ldr x0, [sp, 240]
add x0, x1, x0
str x0, [sp, 1144]
ldr x2, [sp, 160]
ldr x3, [sp, 248]
add x1, sp, 60
add x0, sp, 272
mov x4, x3
mov x3, x2
mov w2, 0
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 60]
ldr x2, [sp, 176]
ldr x3, [sp, 264]
add x1, sp, 61
add x0, sp, 280
mov x4, x3
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 61]
ldr x2, [sp, 184]
add x1, sp, 62
add x0, sp, 288
ldr x4, [sp, 1144]
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 62]
ldr x2, [sp, 192]
ldr x3, [sp, 216]
add x1, sp, 63
add x0, sp, 296
mov x4, x3
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 63]
ldr x2, [sp, 224]
add x1, sp, 64
add x0, sp, 304
mov x4, x2
ldr x3, [sp, 1136]
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
ldr x0, [sp, 24]
add x0, x0, 24
ldr x2, [x0]
add x1, sp, 320
add x0, sp, 312
mov x3, x2
ldr x2, [sp, 1104]
bl fiat_pasta_fq_mulx_u64
ldr x0, [sp, 24]
add x0, x0, 16
ldr x2, [x0]
add x1, sp, 336
add x0, sp, 328
mov x3, x2
ldr x2, [sp, 1104]
bl fiat_pasta_fq_mulx_u64
ldr x0, [sp, 24]
add x0, x0, 8
ldr x2, [x0]
add x1, sp, 352
add x0, sp, 344
mov x3, x2
ldr x2, [sp, 1104]
bl fiat_pasta_fq_mulx_u64
ldr x0, [sp, 24]
ldr x2, [x0]
add x1, sp, 368
add x0, sp, 360
mov x3, x2
ldr x2, [sp, 1104]
bl fiat_pasta_fq_mulx_u64
ldr x2, [sp, 368]
ldr x3, [sp, 344]
add x1, sp, 65
add x0, sp, 376
mov x4, x3
mov x3, x2
mov w2, 0
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 65]
ldr x2, [sp, 352]
ldr x3, [sp, 328]
add x1, sp, 66
add x0, sp, 384
mov x4, x3
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 66]
ldr x2, [sp, 336]
ldr x3, [sp, 312]
add x1, sp, 67
add x0, sp, 392
mov x4, x3
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
ldrb w0, [sp, 67]
and x1, x0, 255
ldr x0, [sp, 320]
add x0, x1, x0
str x0, [sp, 1152]
ldr x2, [sp, 280]
ldr x3, [sp, 360]
add x1, sp, 68
add x0, sp, 400
mov x4, x3
mov x3, x2
mov w2, 0
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 68]
ldr x2, [sp, 288]
ldr x3, [sp, 376]
add x1, sp, 69
add x0, sp, 408
mov x4, x3
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 69]
ldr x2, [sp, 296]
ldr x3, [sp, 384]
add x1, sp, 70
add x0, sp, 416
mov x4, x3
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 70]
ldr x2, [sp, 304]
ldr x3, [sp, 392]
add x1, sp, 71
add x0, sp, 424
mov x4, x3
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 71]
ldrb w0, [sp, 64]
and x2, x0, 255
add x1, sp, 72
add x0, sp, 432
ldr x4, [sp, 1152]
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
ldr x2, [sp, 400]
add x1, sp, 448
add x0, sp, 440
mov x3, -22948010262529
movk x3, 0x8c46, lsl 48
bl fiat_pasta_fq_mulx_u64
ldr x2, [sp, 440]
add x1, sp, 464
add x0, sp, 456
mov x3, 4611686018427387904
bl fiat_pasta_fq_mulx_u64
ldr x2, [sp, 440]
add x1, sp, 480
add x0, sp, 472
mov x3, 43229
movk x3, 0x994, lsl 16
movk x3, 0x98fc, lsl 32
movk x3, 0x2246, lsl 48
bl fiat_pasta_fq_mulx_u64
ldr x2, [sp, 440]
add x1, sp, 496
add x0, sp, 488
mov x3, 1
movk x3, 0xeb21, lsl 32
movk x3, 0x8c46, lsl 48
bl fiat_pasta_fq_mulx_u64
ldr x2, [sp, 496]
ldr x3, [sp, 472]
add x1, sp, 73
add x0, sp, 504
mov x4, x3
mov x3, x2
mov w2, 0
bl fiat_pasta_fq_addcarryx_u64
ldrb w0, [sp, 73]
and x1, x0, 255
ldr x0, [sp, 480]
add x0, x1, x0
str x0, [sp, 1160]
ldr x2, [sp, 400]
ldr x3, [sp, 488]
add x1, sp, 74
add x0, sp, 512
mov x4, x3
mov x3, x2
mov w2, 0
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 74]
ldr x2, [sp, 408]
ldr x3, [sp, 504]
add x1, sp, 75
add x0, sp, 520
mov x4, x3
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 75]
ldr x2, [sp, 416]
add x1, sp, 76
add x0, sp, 528
ldr x4, [sp, 1160]
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 76]
ldr x2, [sp, 424]
ldr x3, [sp, 456]
add x1, sp, 77
add x0, sp, 536
mov x4, x3
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 77]
ldr x2, [sp, 432]
ldr x3, [sp, 464]
add x1, sp, 78
add x0, sp, 544
mov x4, x3
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
ldrb w0, [sp, 78]
and x1, x0, 255
ldrb w0, [sp, 72]
and x0, x0, 255
add x0, x1, x0
str x0, [sp, 1168]
ldr x0, [sp, 24]
add x0, x0, 24
ldr x2, [x0]
add x1, sp, 560
add x0, sp, 552
mov x3, x2
ldr x2, [sp, 1112]
bl fiat_pasta_fq_mulx_u64
ldr x0, [sp, 24]
add x0, x0, 16
ldr x2, [x0]
add x1, sp, 576
add x0, sp, 568
mov x3, x2
ldr x2, [sp, 1112]
bl fiat_pasta_fq_mulx_u64
ldr x0, [sp, 24]
add x0, x0, 8
ldr x2, [x0]
add x1, sp, 592
add x0, sp, 584
mov x3, x2
ldr x2, [sp, 1112]
bl fiat_pasta_fq_mulx_u64
ldr x0, [sp, 24]
ldr x2, [x0]
add x1, sp, 608
add x0, sp, 600
mov x3, x2
ldr x2, [sp, 1112]
bl fiat_pasta_fq_mulx_u64
ldr x2, [sp, 608]
ldr x3, [sp, 584]
add x1, sp, 79
add x0, sp, 616
mov x4, x3
mov x3, x2
mov w2, 0
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 79]
ldr x2, [sp, 592]
ldr x3, [sp, 568]
add x1, sp, 80
add x0, sp, 624
mov x4, x3
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 80]
ldr x2, [sp, 576]
ldr x3, [sp, 552]
add x1, sp, 81
add x0, sp, 632
mov x4, x3
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
ldrb w0, [sp, 81]
and x1, x0, 255
ldr x0, [sp, 560]
add x0, x1, x0
str x0, [sp, 1176]
ldr x2, [sp, 520]
ldr x3, [sp, 600]
add x1, sp, 82
add x0, sp, 640
mov x4, x3
mov x3, x2
mov w2, 0
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 82]
ldr x2, [sp, 528]
ldr x3, [sp, 616]
add x1, sp, 83
add x0, sp, 648
mov x4, x3
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 83]
ldr x2, [sp, 536]
ldr x3, [sp, 624]
add x1, sp, 84
add x0, sp, 656
mov x4, x3
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 84]
ldr x2, [sp, 544]
ldr x3, [sp, 632]
add x1, sp, 85
add x0, sp, 664
mov x4, x3
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
ldrb w2, [sp, 85]
add x1, sp, 86
add x0, sp, 672
ldr x4, [sp, 1176]
ldr x3, [sp, 1168]
bl fiat_pasta_fq_addcarryx_u64
ldr x2, [sp, 640]
add x1, sp, 688
add x0, sp, 680
mov x3, -22948010262529
movk x3, 0x8c46, lsl 48
bl fiat_pasta_fq_mulx_u64
ldr x2, [sp, 680]
add x1, sp, 704
add x0, sp, 696
mov x3, 4611686018427387904
bl fiat_pasta_fq_mulx_u64
ldr x2, [sp, 680]
add x1, sp, 720
add x0, sp, 712
mov x3, 43229
movk x3, 0x994, lsl 16
movk x3, 0x98fc, lsl 32
movk x3, 0x2246, lsl 48
bl fiat_pasta_fq_mulx_u64
ldr x2, [sp, 680]
add x1, sp, 736
add x0, sp, 728
mov x3, 1
movk x3, 0xeb21, lsl 32
movk x3, 0x8c46, lsl 48
bl fiat_pasta_fq_mulx_u64
ldr x2, [sp, 736]
ldr x3, [sp, 712]
add x1, sp, 87
add x0, sp, 744
mov x4, x3
mov x3, x2
mov w2, 0
bl fiat_pasta_fq_addcarryx_u64
ldrb w0, [sp, 87]
and x1, x0, 255
ldr x0, [sp, 720]
add x0, x1, x0
str x0, [sp, 1184]
ldr x2, [sp, 640]
ldr x3, [sp, 728]
add x1, sp, 88
add x0, sp, 752
mov x4, x3
mov x3, x2
mov w2, 0
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 88]
ldr x2, [sp, 648]
ldr x3, [sp, 744]
add x1, sp, 89
add x0, sp, 760
mov x4, x3
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 89]
ldr x2, [sp, 656]
add x1, sp, 90
add x0, sp, 768
ldr x4, [sp, 1184]
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 90]
ldr x2, [sp, 664]
ldr x3, [sp, 696]
add x1, sp, 91
add x0, sp, 776
mov x4, x3
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 91]
ldr x2, [sp, 672]
ldr x3, [sp, 704]
add x1, sp, 92
add x0, sp, 784
mov x4, x3
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
ldrb w0, [sp, 92]
and x1, x0, 255
ldrb w0, [sp, 86]
and x0, x0, 255
add x0, x1, x0
str x0, [sp, 1192]
ldr x0, [sp, 24]
add x0, x0, 24
ldr x2, [x0]
add x1, sp, 800
add x0, sp, 792
mov x3, x2
ldr x2, [sp, 1120]
bl fiat_pasta_fq_mulx_u64
ldr x0, [sp, 24]
add x0, x0, 16
ldr x2, [x0]
add x1, sp, 816
add x0, sp, 808
mov x3, x2
ldr x2, [sp, 1120]
bl fiat_pasta_fq_mulx_u64
ldr x0, [sp, 24]
add x0, x0, 8
ldr x2, [x0]
add x1, sp, 832
add x0, sp, 824
mov x3, x2
ldr x2, [sp, 1120]
bl fiat_pasta_fq_mulx_u64
ldr x0, [sp, 24]
ldr x2, [x0]
add x1, sp, 848
add x0, sp, 840
mov x3, x2
ldr x2, [sp, 1120]
bl fiat_pasta_fq_mulx_u64
ldr x2, [sp, 848]
ldr x3, [sp, 824]
add x1, sp, 93
add x0, sp, 856
mov x4, x3
mov x3, x2
mov w2, 0
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 93]
ldr x2, [sp, 832]
ldr x3, [sp, 808]
add x1, sp, 94
add x0, sp, 864
mov x4, x3
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 94]
ldr x2, [sp, 816]
ldr x3, [sp, 792]
add x1, sp, 95
add x0, sp, 872
mov x4, x3
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
ldrb w0, [sp, 95]
and x1, x0, 255
ldr x0, [sp, 800]
add x0, x1, x0
str x0, [sp, 1200]
ldr x2, [sp, 760]
ldr x3, [sp, 840]
add x1, sp, 96
add x0, sp, 880
mov x4, x3
mov x3, x2
mov w2, 0
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 96]
ldr x2, [sp, 768]
ldr x3, [sp, 856]
add x1, sp, 97
add x0, sp, 888
mov x4, x3
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 97]
ldr x2, [sp, 776]
ldr x3, [sp, 864]
add x1, sp, 98
add x0, sp, 896
mov x4, x3
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 98]
ldr x2, [sp, 784]
ldr x3, [sp, 872]
add x1, sp, 99
add x0, sp, 904
mov x4, x3
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
ldrb w2, [sp, 99]
add x1, sp, 100
add x0, sp, 912
ldr x4, [sp, 1200]
ldr x3, [sp, 1192]
bl fiat_pasta_fq_addcarryx_u64
ldr x2, [sp, 880]
add x1, sp, 928
add x0, sp, 920
mov x3, -22948010262529
movk x3, 0x8c46, lsl 48
bl fiat_pasta_fq_mulx_u64
ldr x2, [sp, 920]
add x1, sp, 944
add x0, sp, 936
mov x3, 4611686018427387904
bl fiat_pasta_fq_mulx_u64
ldr x2, [sp, 920]
add x1, sp, 960
add x0, sp, 952
mov x3, 43229
movk x3, 0x994, lsl 16
movk x3, 0x98fc, lsl 32
movk x3, 0x2246, lsl 48
bl fiat_pasta_fq_mulx_u64
ldr x2, [sp, 920]
add x1, sp, 976
add x0, sp, 968
mov x3, 1
movk x3, 0xeb21, lsl 32
movk x3, 0x8c46, lsl 48
bl fiat_pasta_fq_mulx_u64
ldr x2, [sp, 976]
ldr x3, [sp, 952]
add x1, sp, 101
add x0, sp, 984
mov x4, x3
mov x3, x2
mov w2, 0
bl fiat_pasta_fq_addcarryx_u64
ldrb w0, [sp, 101]
and x1, x0, 255
ldr x0, [sp, 960]
add x0, x1, x0
str x0, [sp, 1208]
ldr x2, [sp, 880]
ldr x3, [sp, 968]
add x1, sp, 102
add x0, sp, 992
mov x4, x3
mov x3, x2
mov w2, 0
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 102]
ldr x2, [sp, 888]
ldr x3, [sp, 984]
add x1, sp, 103
add x0, sp, 1000
mov x4, x3
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 103]
ldr x2, [sp, 896]
add x1, sp, 104
add x0, sp, 1008
ldr x4, [sp, 1208]
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 104]
ldr x2, [sp, 904]
ldr x3, [sp, 936]
add x1, sp, 105
add x0, sp, 1016
mov x4, x3
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 105]
ldr x2, [sp, 912]
ldr x3, [sp, 944]
add x1, sp, 106
add x0, sp, 1024
mov x4, x3
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
ldrb w0, [sp, 106]
and x1, x0, 255
ldrb w0, [sp, 100]
and x0, x0, 255
add x0, x1, x0
str x0, [sp, 1216]
ldr x2, [sp, 1000]
add x1, sp, 107
add x0, sp, 1032
mov x4, 1
movk x4, 0xeb21, lsl 32
movk x4, 0x8c46, lsl 48
mov x3, x2
mov w2, 0
bl fiat_pasta_fq_subborrowx_u64
ldrb w5, [sp, 107]
ldr x2, [sp, 1008]
add x1, sp, 108
add x0, sp, 1040
mov x4, 43229
movk x4, 0x994, lsl 16
movk x4, 0x98fc, lsl 32
movk x4, 0x2246, lsl 48
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_subborrowx_u64
ldrb w5, [sp, 108]
ldr x2, [sp, 1016]
add x1, sp, 109
add x0, sp, 1048
mov x4, 0
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_subborrowx_u64
ldrb w5, [sp, 109]
ldr x2, [sp, 1024]
add x1, sp, 110
add x0, sp, 1056
mov x4, 4611686018427387904
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_subborrowx_u64
ldrb w2, [sp, 110]
add x1, sp, 111
add x0, sp, 1064
mov x4, 0
ldr x3, [sp, 1216]
bl fiat_pasta_fq_subborrowx_u64
ldrb w4, [sp, 111]
ldr x1, [sp, 1032]
ldr x2, [sp, 1000]
add x0, sp, 1072
mov x3, x2
mov x2, x1
mov w1, w4
bl fiat_pasta_fq_cmovznz_u64
ldrb w4, [sp, 111]
ldr x1, [sp, 1040]
ldr x2, [sp, 1008]
add x0, sp, 1080
mov x3, x2
mov x2, x1
mov w1, w4
bl fiat_pasta_fq_cmovznz_u64
ldrb w4, [sp, 111]
ldr x1, [sp, 1048]
ldr x2, [sp, 1016]
add x0, sp, 1088
mov x3, x2
mov x2, x1
mov w1, w4
bl fiat_pasta_fq_cmovznz_u64
ldrb w4, [sp, 111]
ldr x1, [sp, 1056]
ldr x2, [sp, 1024]
add x0, sp, 1096
mov x3, x2
mov x2, x1
mov w1, w4
bl fiat_pasta_fq_cmovznz_u64
ldr x1, [sp, 1072]
ldr x0, [sp, 40]
str x1, [x0]
ldr x0, [sp, 40]
add x0, x0, 8
ldr x1, [sp, 1080]
str x1, [x0]
ldr x0, [sp, 40]
add x0, x0, 16
ldr x1, [sp, 1088]
str x1, [x0]
ldr x0, [sp, 40]
add x0, x0, 24
ldr x1, [sp, 1096]
str x1, [x0]
nop
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [sp, 1224]
ldr x1, [x0]
subs x2, x2, x1
mov x1, 0
beq .L6
bl __stack_chk_fail
.L6:
ldp x29, x30, [sp]
add sp, sp, 1232
.cfi_restore 29
.cfi_restore 30
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE4:
.size fiat_pasta_fq_mul, .-fiat_pasta_fq_mul
.align 2
.global fiat_pasta_fq_square
.type fiat_pasta_fq_square, %function
fiat_pasta_fq_square:
.LFB5:
.cfi_startproc
sub sp, sp, #1216
.cfi_def_cfa_offset 1216
stp x29, x30, [sp]
.cfi_offset 29, -1216
.cfi_offset 30, -1208
mov x29, sp
str x0, [sp, 24]
str x1, [sp, 16]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 1208]
mov x1, 0
ldr x0, [sp, 16]
add x0, x0, 8
ldr x0, [x0]
str x0, [sp, 1088]
ldr x0, [sp, 16]
add x0, x0, 16
ldr x0, [x0]
str x0, [sp, 1096]
ldr x0, [sp, 16]
add x0, x0, 24
ldr x0, [x0]
str x0, [sp, 1104]
ldr x0, [sp, 16]
ldr x0, [x0]
str x0, [sp, 1112]
ldr x0, [sp, 16]
add x0, x0, 24
ldr x2, [x0]
add x1, sp, 104
add x0, sp, 96
mov x3, x2
ldr x2, [sp, 1112]
bl fiat_pasta_fq_mulx_u64
ldr x0, [sp, 16]
add x0, x0, 16
ldr x2, [x0]
add x1, sp, 120
add x0, sp, 112
mov x3, x2
ldr x2, [sp, 1112]
bl fiat_pasta_fq_mulx_u64
ldr x0, [sp, 16]
add x0, x0, 8
ldr x2, [x0]
add x1, sp, 136
add x0, sp, 128
mov x3, x2
ldr x2, [sp, 1112]
bl fiat_pasta_fq_mulx_u64
ldr x0, [sp, 16]
ldr x2, [x0]
add x1, sp, 152
add x0, sp, 144
mov x3, x2
ldr x2, [sp, 1112]
bl fiat_pasta_fq_mulx_u64
ldr x2, [sp, 152]
ldr x3, [sp, 128]
add x1, sp, 40
add x0, sp, 160
mov x4, x3
mov x3, x2
mov w2, 0
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 40]
ldr x2, [sp, 136]
ldr x3, [sp, 112]
add x1, sp, 41
add x0, sp, 168
mov x4, x3
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 41]
ldr x2, [sp, 120]
ldr x3, [sp, 96]
add x1, sp, 42
add x0, sp, 176
mov x4, x3
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
ldrb w0, [sp, 42]
and x1, x0, 255
ldr x0, [sp, 104]
add x0, x1, x0
str x0, [sp, 1120]
ldr x2, [sp, 144]
add x1, sp, 192
add x0, sp, 184
mov x3, -22948010262529
movk x3, 0x8c46, lsl 48
bl fiat_pasta_fq_mulx_u64
ldr x2, [sp, 184]
add x1, sp, 208
add x0, sp, 200
mov x3, 4611686018427387904
bl fiat_pasta_fq_mulx_u64
ldr x2, [sp, 184]
add x1, sp, 224
add x0, sp, 216
mov x3, 43229
movk x3, 0x994, lsl 16
movk x3, 0x98fc, lsl 32
movk x3, 0x2246, lsl 48
bl fiat_pasta_fq_mulx_u64
ldr x2, [sp, 184]
add x1, sp, 240
add x0, sp, 232
mov x3, 1
movk x3, 0xeb21, lsl 32
movk x3, 0x8c46, lsl 48
bl fiat_pasta_fq_mulx_u64
ldr x2, [sp, 240]
ldr x3, [sp, 216]
add x1, sp, 43
add x0, sp, 248
mov x4, x3
mov x3, x2
mov w2, 0
bl fiat_pasta_fq_addcarryx_u64
ldrb w0, [sp, 43]
and x1, x0, 255
ldr x0, [sp, 224]
add x0, x1, x0
str x0, [sp, 1128]
ldr x2, [sp, 144]
ldr x3, [sp, 232]
add x1, sp, 44
add x0, sp, 256
mov x4, x3
mov x3, x2
mov w2, 0
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 44]
ldr x2, [sp, 160]
ldr x3, [sp, 248]
add x1, sp, 45
add x0, sp, 264
mov x4, x3
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 45]
ldr x2, [sp, 168]
add x1, sp, 46
add x0, sp, 272
ldr x4, [sp, 1128]
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 46]
ldr x2, [sp, 176]
ldr x3, [sp, 200]
add x1, sp, 47
add x0, sp, 280
mov x4, x3
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 47]
ldr x2, [sp, 208]
add x1, sp, 48
add x0, sp, 288
mov x4, x2
ldr x3, [sp, 1120]
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
ldr x0, [sp, 16]
add x0, x0, 24
ldr x2, [x0]
add x1, sp, 304
add x0, sp, 296
mov x3, x2
ldr x2, [sp, 1088]
bl fiat_pasta_fq_mulx_u64
ldr x0, [sp, 16]
add x0, x0, 16
ldr x2, [x0]
add x1, sp, 320
add x0, sp, 312
mov x3, x2
ldr x2, [sp, 1088]
bl fiat_pasta_fq_mulx_u64
ldr x0, [sp, 16]
add x0, x0, 8
ldr x2, [x0]
add x1, sp, 336
add x0, sp, 328
mov x3, x2
ldr x2, [sp, 1088]
bl fiat_pasta_fq_mulx_u64
ldr x0, [sp, 16]
ldr x2, [x0]
add x1, sp, 352
add x0, sp, 344
mov x3, x2
ldr x2, [sp, 1088]
bl fiat_pasta_fq_mulx_u64
ldr x2, [sp, 352]
ldr x3, [sp, 328]
add x1, sp, 49
add x0, sp, 360
mov x4, x3
mov x3, x2
mov w2, 0
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 49]
ldr x2, [sp, 336]
ldr x3, [sp, 312]
add x1, sp, 50
add x0, sp, 368
mov x4, x3
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 50]
ldr x2, [sp, 320]
ldr x3, [sp, 296]
add x1, sp, 51
add x0, sp, 376
mov x4, x3
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
ldrb w0, [sp, 51]
and x1, x0, 255
ldr x0, [sp, 304]
add x0, x1, x0
str x0, [sp, 1136]
ldr x2, [sp, 264]
ldr x3, [sp, 344]
add x1, sp, 52
add x0, sp, 384
mov x4, x3
mov x3, x2
mov w2, 0
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 52]
ldr x2, [sp, 272]
ldr x3, [sp, 360]
add x1, sp, 53
add x0, sp, 392
mov x4, x3
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 53]
ldr x2, [sp, 280]
ldr x3, [sp, 368]
add x1, sp, 54
add x0, sp, 400
mov x4, x3
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 54]
ldr x2, [sp, 288]
ldr x3, [sp, 376]
add x1, sp, 55
add x0, sp, 408
mov x4, x3
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 55]
ldrb w0, [sp, 48]
and x2, x0, 255
add x1, sp, 56
add x0, sp, 416
ldr x4, [sp, 1136]
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
ldr x2, [sp, 384]
add x1, sp, 432
add x0, sp, 424
mov x3, -22948010262529
movk x3, 0x8c46, lsl 48
bl fiat_pasta_fq_mulx_u64
ldr x2, [sp, 424]
add x1, sp, 448
add x0, sp, 440
mov x3, 4611686018427387904
bl fiat_pasta_fq_mulx_u64
ldr x2, [sp, 424]
add x1, sp, 464
add x0, sp, 456
mov x3, 43229
movk x3, 0x994, lsl 16
movk x3, 0x98fc, lsl 32
movk x3, 0x2246, lsl 48
bl fiat_pasta_fq_mulx_u64
ldr x2, [sp, 424]
add x1, sp, 480
add x0, sp, 472
mov x3, 1
movk x3, 0xeb21, lsl 32
movk x3, 0x8c46, lsl 48
bl fiat_pasta_fq_mulx_u64
ldr x2, [sp, 480]
ldr x3, [sp, 456]
add x1, sp, 57
add x0, sp, 488
mov x4, x3
mov x3, x2
mov w2, 0
bl fiat_pasta_fq_addcarryx_u64
ldrb w0, [sp, 57]
and x1, x0, 255
ldr x0, [sp, 464]
add x0, x1, x0
str x0, [sp, 1144]
ldr x2, [sp, 384]
ldr x3, [sp, 472]
add x1, sp, 58
add x0, sp, 496
mov x4, x3
mov x3, x2
mov w2, 0
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 58]
ldr x2, [sp, 392]
ldr x3, [sp, 488]
add x1, sp, 59
add x0, sp, 504
mov x4, x3
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 59]
ldr x2, [sp, 400]
add x1, sp, 60
add x0, sp, 512
ldr x4, [sp, 1144]
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 60]
ldr x2, [sp, 408]
ldr x3, [sp, 440]
add x1, sp, 61
add x0, sp, 520
mov x4, x3
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 61]
ldr x2, [sp, 416]
ldr x3, [sp, 448]
add x1, sp, 62
add x0, sp, 528
mov x4, x3
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
ldrb w0, [sp, 62]
and x1, x0, 255
ldrb w0, [sp, 56]
and x0, x0, 255
add x0, x1, x0
str x0, [sp, 1152]
ldr x0, [sp, 16]
add x0, x0, 24
ldr x2, [x0]
add x1, sp, 544
add x0, sp, 536
mov x3, x2
ldr x2, [sp, 1096]
bl fiat_pasta_fq_mulx_u64
ldr x0, [sp, 16]
add x0, x0, 16
ldr x2, [x0]
add x1, sp, 560
add x0, sp, 552
mov x3, x2
ldr x2, [sp, 1096]
bl fiat_pasta_fq_mulx_u64
ldr x0, [sp, 16]
add x0, x0, 8
ldr x2, [x0]
add x1, sp, 576
add x0, sp, 568
mov x3, x2
ldr x2, [sp, 1096]
bl fiat_pasta_fq_mulx_u64
ldr x0, [sp, 16]
ldr x2, [x0]
add x1, sp, 592
add x0, sp, 584
mov x3, x2
ldr x2, [sp, 1096]
bl fiat_pasta_fq_mulx_u64
ldr x2, [sp, 592]
ldr x3, [sp, 568]
add x1, sp, 63
add x0, sp, 600
mov x4, x3
mov x3, x2
mov w2, 0
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 63]
ldr x2, [sp, 576]
ldr x3, [sp, 552]
add x1, sp, 64
add x0, sp, 608
mov x4, x3
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 64]
ldr x2, [sp, 560]
ldr x3, [sp, 536]
add x1, sp, 65
add x0, sp, 616
mov x4, x3
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
ldrb w0, [sp, 65]
and x1, x0, 255
ldr x0, [sp, 544]
add x0, x1, x0
str x0, [sp, 1160]
ldr x2, [sp, 504]
ldr x3, [sp, 584]
add x1, sp, 66
add x0, sp, 624
mov x4, x3
mov x3, x2
mov w2, 0
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 66]
ldr x2, [sp, 512]
ldr x3, [sp, 600]
add x1, sp, 67
add x0, sp, 632
mov x4, x3
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 67]
ldr x2, [sp, 520]
ldr x3, [sp, 608]
add x1, sp, 68
add x0, sp, 640
mov x4, x3
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 68]
ldr x2, [sp, 528]
ldr x3, [sp, 616]
add x1, sp, 69
add x0, sp, 648
mov x4, x3
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
ldrb w2, [sp, 69]
add x1, sp, 70
add x0, sp, 656
ldr x4, [sp, 1160]
ldr x3, [sp, 1152]
bl fiat_pasta_fq_addcarryx_u64
ldr x2, [sp, 624]
add x1, sp, 672
add x0, sp, 664
mov x3, -22948010262529
movk x3, 0x8c46, lsl 48
bl fiat_pasta_fq_mulx_u64
ldr x2, [sp, 664]
add x1, sp, 688
add x0, sp, 680
mov x3, 4611686018427387904
bl fiat_pasta_fq_mulx_u64
ldr x2, [sp, 664]
add x1, sp, 704
add x0, sp, 696
mov x3, 43229
movk x3, 0x994, lsl 16
movk x3, 0x98fc, lsl 32
movk x3, 0x2246, lsl 48
bl fiat_pasta_fq_mulx_u64
ldr x2, [sp, 664]
add x1, sp, 720
add x0, sp, 712
mov x3, 1
movk x3, 0xeb21, lsl 32
movk x3, 0x8c46, lsl 48
bl fiat_pasta_fq_mulx_u64
ldr x2, [sp, 720]
ldr x3, [sp, 696]
add x1, sp, 71
add x0, sp, 728
mov x4, x3
mov x3, x2
mov w2, 0
bl fiat_pasta_fq_addcarryx_u64
ldrb w0, [sp, 71]
and x1, x0, 255
ldr x0, [sp, 704]
add x0, x1, x0
str x0, [sp, 1168]
ldr x2, [sp, 624]
ldr x3, [sp, 712]
add x1, sp, 72
add x0, sp, 736
mov x4, x3
mov x3, x2
mov w2, 0
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 72]
ldr x2, [sp, 632]
ldr x3, [sp, 728]
add x1, sp, 73
add x0, sp, 744
mov x4, x3
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 73]
ldr x2, [sp, 640]
add x1, sp, 74
add x0, sp, 752
ldr x4, [sp, 1168]
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 74]
ldr x2, [sp, 648]
ldr x3, [sp, 680]
add x1, sp, 75
add x0, sp, 760
mov x4, x3
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 75]
ldr x2, [sp, 656]
ldr x3, [sp, 688]
add x1, sp, 76
add x0, sp, 768
mov x4, x3
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
ldrb w0, [sp, 76]
and x1, x0, 255
ldrb w0, [sp, 70]
and x0, x0, 255
add x0, x1, x0
str x0, [sp, 1176]
ldr x0, [sp, 16]
add x0, x0, 24
ldr x2, [x0]
add x1, sp, 784
add x0, sp, 776
mov x3, x2
ldr x2, [sp, 1104]
bl fiat_pasta_fq_mulx_u64
ldr x0, [sp, 16]
add x0, x0, 16
ldr x2, [x0]
add x1, sp, 800
add x0, sp, 792
mov x3, x2
ldr x2, [sp, 1104]
bl fiat_pasta_fq_mulx_u64
ldr x0, [sp, 16]
add x0, x0, 8
ldr x2, [x0]
add x1, sp, 816
add x0, sp, 808
mov x3, x2
ldr x2, [sp, 1104]
bl fiat_pasta_fq_mulx_u64
ldr x0, [sp, 16]
ldr x2, [x0]
add x1, sp, 832
add x0, sp, 824
mov x3, x2
ldr x2, [sp, 1104]
bl fiat_pasta_fq_mulx_u64
ldr x2, [sp, 832]
ldr x3, [sp, 808]
add x1, sp, 77
add x0, sp, 840
mov x4, x3
mov x3, x2
mov w2, 0
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 77]
ldr x2, [sp, 816]
ldr x3, [sp, 792]
add x1, sp, 78
add x0, sp, 848
mov x4, x3
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 78]
ldr x2, [sp, 800]
ldr x3, [sp, 776]
add x1, sp, 79
add x0, sp, 856
mov x4, x3
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
ldrb w0, [sp, 79]
and x1, x0, 255
ldr x0, [sp, 784]
add x0, x1, x0
str x0, [sp, 1184]
ldr x2, [sp, 744]
ldr x3, [sp, 824]
add x1, sp, 80
add x0, sp, 864
mov x4, x3
mov x3, x2
mov w2, 0
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 80]
ldr x2, [sp, 752]
ldr x3, [sp, 840]
add x1, sp, 81
add x0, sp, 872
mov x4, x3
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 81]
ldr x2, [sp, 760]
ldr x3, [sp, 848]
add x1, sp, 82
add x0, sp, 880
mov x4, x3
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 82]
ldr x2, [sp, 768]
ldr x3, [sp, 856]
add x1, sp, 83
add x0, sp, 888
mov x4, x3
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
ldrb w2, [sp, 83]
add x1, sp, 84
add x0, sp, 896
ldr x4, [sp, 1184]
ldr x3, [sp, 1176]
bl fiat_pasta_fq_addcarryx_u64
ldr x2, [sp, 864]
add x1, sp, 912
add x0, sp, 904
mov x3, -22948010262529
movk x3, 0x8c46, lsl 48
bl fiat_pasta_fq_mulx_u64
ldr x2, [sp, 904]
add x1, sp, 928
add x0, sp, 920
mov x3, 4611686018427387904
bl fiat_pasta_fq_mulx_u64
ldr x2, [sp, 904]
add x1, sp, 944
add x0, sp, 936
mov x3, 43229
movk x3, 0x994, lsl 16
movk x3, 0x98fc, lsl 32
movk x3, 0x2246, lsl 48
bl fiat_pasta_fq_mulx_u64
ldr x2, [sp, 904]
add x1, sp, 960
add x0, sp, 952
mov x3, 1
movk x3, 0xeb21, lsl 32
movk x3, 0x8c46, lsl 48
bl fiat_pasta_fq_mulx_u64
ldr x2, [sp, 960]
ldr x3, [sp, 936]
add x1, sp, 85
add x0, sp, 968
mov x4, x3
mov x3, x2
mov w2, 0
bl fiat_pasta_fq_addcarryx_u64
ldrb w0, [sp, 85]
and x1, x0, 255
ldr x0, [sp, 944]
add x0, x1, x0
str x0, [sp, 1192]
ldr x2, [sp, 864]
ldr x3, [sp, 952]
add x1, sp, 86
add x0, sp, 976
mov x4, x3
mov x3, x2
mov w2, 0
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 86]
ldr x2, [sp, 872]
ldr x3, [sp, 968]
add x1, sp, 87
add x0, sp, 984
mov x4, x3
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 87]
ldr x2, [sp, 880]
add x1, sp, 88
add x0, sp, 992
ldr x4, [sp, 1192]
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 88]
ldr x2, [sp, 888]
ldr x3, [sp, 920]
add x1, sp, 89
add x0, sp, 1000
mov x4, x3
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 89]
ldr x2, [sp, 896]
ldr x3, [sp, 928]
add x1, sp, 90
add x0, sp, 1008
mov x4, x3
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
ldrb w0, [sp, 90]
and x1, x0, 255
ldrb w0, [sp, 84]
and x0, x0, 255
add x0, x1, x0
str x0, [sp, 1200]
ldr x2, [sp, 984]
add x1, sp, 91
add x0, sp, 1016
mov x4, 1
movk x4, 0xeb21, lsl 32
movk x4, 0x8c46, lsl 48
mov x3, x2
mov w2, 0
bl fiat_pasta_fq_subborrowx_u64
ldrb w5, [sp, 91]
ldr x2, [sp, 992]
add x1, sp, 92
add x0, sp, 1024
mov x4, 43229
movk x4, 0x994, lsl 16
movk x4, 0x98fc, lsl 32
movk x4, 0x2246, lsl 48
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_subborrowx_u64
ldrb w5, [sp, 92]
ldr x2, [sp, 1000]
add x1, sp, 93
add x0, sp, 1032
mov x4, 0
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_subborrowx_u64
ldrb w5, [sp, 93]
ldr x2, [sp, 1008]
add x1, sp, 94
add x0, sp, 1040
mov x4, 4611686018427387904
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_subborrowx_u64
ldrb w2, [sp, 94]
add x1, sp, 95
add x0, sp, 1048
mov x4, 0
ldr x3, [sp, 1200]
bl fiat_pasta_fq_subborrowx_u64
ldrb w4, [sp, 95]
ldr x1, [sp, 1016]
ldr x2, [sp, 984]
add x0, sp, 1056
mov x3, x2
mov x2, x1
mov w1, w4
bl fiat_pasta_fq_cmovznz_u64
ldrb w4, [sp, 95]
ldr x1, [sp, 1024]
ldr x2, [sp, 992]
add x0, sp, 1064
mov x3, x2
mov x2, x1
mov w1, w4
bl fiat_pasta_fq_cmovznz_u64
ldrb w4, [sp, 95]
ldr x1, [sp, 1032]
ldr x2, [sp, 1000]
add x0, sp, 1072
mov x3, x2
mov x2, x1
mov w1, w4
bl fiat_pasta_fq_cmovznz_u64
ldrb w4, [sp, 95]
ldr x1, [sp, 1040]
ldr x2, [sp, 1008]
add x0, sp, 1080
mov x3, x2
mov x2, x1
mov w1, w4
bl fiat_pasta_fq_cmovznz_u64
ldr x1, [sp, 1056]
ldr x0, [sp, 24]
str x1, [x0]
ldr x0, [sp, 24]
add x0, x0, 8
ldr x1, [sp, 1064]
str x1, [x0]
ldr x0, [sp, 24]
add x0, x0, 16
ldr x1, [sp, 1072]
str x1, [x0]
ldr x0, [sp, 24]
add x0, x0, 24
ldr x1, [sp, 1080]
str x1, [x0]
nop
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [sp, 1208]
ldr x1, [x0]
subs x2, x2, x1
mov x1, 0
beq .L8
bl __stack_chk_fail
.L8:
ldp x29, x30, [sp]
add sp, sp, 1216
.cfi_restore 29
.cfi_restore 30
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE5:
.size fiat_pasta_fq_square, .-fiat_pasta_fq_square
.align 2
.global fiat_pasta_fq_add
.type fiat_pasta_fq_add, %function
fiat_pasta_fq_add:
.LFB6:
.cfi_startproc
stp x29, x30, [sp, -176]!
.cfi_def_cfa_offset 176
.cfi_offset 29, -176
.cfi_offset 30, -168
mov x29, sp
str x0, [sp, 40]
str x1, [sp, 32]
str x2, [sp, 24]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 168]
mov x1, 0
ldr x0, [sp, 32]
ldr x2, [x0]
ldr x0, [sp, 24]
ldr x3, [x0]
add x1, sp, 55
add x0, sp, 64
mov x4, x3
mov x3, x2
mov w2, 0
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 55]
ldr x0, [sp, 32]
add x0, x0, 8
ldr x2, [x0]
ldr x0, [sp, 24]
add x0, x0, 8
ldr x3, [x0]
add x1, sp, 56
add x0, sp, 72
mov x4, x3
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 56]
ldr x0, [sp, 32]
add x0, x0, 16
ldr x2, [x0]
ldr x0, [sp, 24]
add x0, x0, 16
ldr x3, [x0]
add x1, sp, 57
add x0, sp, 80
mov x4, x3
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 57]
ldr x0, [sp, 32]
add x0, x0, 24
ldr x2, [x0]
ldr x0, [sp, 24]
add x0, x0, 24
ldr x3, [x0]
add x1, sp, 58
add x0, sp, 88
mov x4, x3
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
ldr x2, [sp, 64]
add x1, sp, 59
add x0, sp, 96
mov x4, 1
movk x4, 0xeb21, lsl 32
movk x4, 0x8c46, lsl 48
mov x3, x2
mov w2, 0
bl fiat_pasta_fq_subborrowx_u64
ldrb w5, [sp, 59]
ldr x2, [sp, 72]
add x1, sp, 60
add x0, sp, 104
mov x4, 43229
movk x4, 0x994, lsl 16
movk x4, 0x98fc, lsl 32
movk x4, 0x2246, lsl 48
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_subborrowx_u64
ldrb w5, [sp, 60]
ldr x2, [sp, 80]
add x1, sp, 61
add x0, sp, 112
mov x4, 0
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_subborrowx_u64
ldrb w5, [sp, 61]
ldr x2, [sp, 88]
add x1, sp, 62
add x0, sp, 120
mov x4, 4611686018427387904
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_subborrowx_u64
ldrb w5, [sp, 62]
ldrb w0, [sp, 58]
and x2, x0, 255
add x1, sp, 63
add x0, sp, 128
mov x4, 0
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_subborrowx_u64
ldrb w4, [sp, 63]
ldr x1, [sp, 96]
ldr x2, [sp, 64]
add x0, sp, 136
mov x3, x2
mov x2, x1
mov w1, w4
bl fiat_pasta_fq_cmovznz_u64
ldrb w4, [sp, 63]
ldr x1, [sp, 104]
ldr x2, [sp, 72]
add x0, sp, 144
mov x3, x2
mov x2, x1
mov w1, w4
bl fiat_pasta_fq_cmovznz_u64
ldrb w4, [sp, 63]
ldr x1, [sp, 112]
ldr x2, [sp, 80]
add x0, sp, 152
mov x3, x2
mov x2, x1
mov w1, w4
bl fiat_pasta_fq_cmovznz_u64
ldrb w4, [sp, 63]
ldr x1, [sp, 120]
ldr x2, [sp, 88]
add x0, sp, 160
mov x3, x2
mov x2, x1
mov w1, w4
bl fiat_pasta_fq_cmovznz_u64
ldr x1, [sp, 136]
ldr x0, [sp, 40]
str x1, [x0]
ldr x0, [sp, 40]
add x0, x0, 8
ldr x1, [sp, 144]
str x1, [x0]
ldr x0, [sp, 40]
add x0, x0, 16
ldr x1, [sp, 152]
str x1, [x0]
ldr x0, [sp, 40]
add x0, x0, 24
ldr x1, [sp, 160]
str x1, [x0]
nop
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [sp, 168]
ldr x1, [x0]
subs x2, x2, x1
mov x1, 0
beq .L10
bl __stack_chk_fail
.L10:
ldp x29, x30, [sp], 176
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE6:
.size fiat_pasta_fq_add, .-fiat_pasta_fq_add
.align 2
.global fiat_pasta_fq_sub
.type fiat_pasta_fq_sub, %function
fiat_pasta_fq_sub:
.LFB7:
.cfi_startproc
stp x29, x30, [sp, -144]!
.cfi_def_cfa_offset 144
.cfi_offset 29, -144
.cfi_offset 30, -136
mov x29, sp
str x0, [sp, 40]
str x1, [sp, 32]
str x2, [sp, 24]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 136]
mov x1, 0
ldr x0, [sp, 32]
ldr x2, [x0]
ldr x0, [sp, 24]
ldr x3, [x0]
add x1, sp, 56
add x0, sp, 64
mov x4, x3
mov x3, x2
mov w2, 0
bl fiat_pasta_fq_subborrowx_u64
ldrb w5, [sp, 56]
ldr x0, [sp, 32]
add x0, x0, 8
ldr x2, [x0]
ldr x0, [sp, 24]
add x0, x0, 8
ldr x3, [x0]
add x1, sp, 57
add x0, sp, 72
mov x4, x3
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_subborrowx_u64
ldrb w5, [sp, 57]
ldr x0, [sp, 32]
add x0, x0, 16
ldr x2, [x0]
ldr x0, [sp, 24]
add x0, x0, 16
ldr x3, [x0]
add x1, sp, 58
add x0, sp, 80
mov x4, x3
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_subborrowx_u64
ldrb w5, [sp, 58]
ldr x0, [sp, 32]
add x0, x0, 24
ldr x2, [x0]
ldr x0, [sp, 24]
add x0, x0, 24
ldr x3, [x0]
add x1, sp, 59
add x0, sp, 88
mov x4, x3
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_subborrowx_u64
ldrb w1, [sp, 59]
add x0, sp, 96
mov x3, -1
mov x2, 0
bl fiat_pasta_fq_cmovznz_u64
ldr x2, [sp, 64]
ldr x1, [sp, 96]
mov x0, 1
movk x0, 0xeb21, lsl 32
movk x0, 0x8c46, lsl 48
and x3, x1, x0
add x1, sp, 60
add x0, sp, 104
mov x4, x3
mov x3, x2
mov w2, 0
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 60]
ldr x2, [sp, 72]
ldr x1, [sp, 96]
mov x0, 43229
movk x0, 0x994, lsl 16
movk x0, 0x98fc, lsl 32
movk x0, 0x2246, lsl 48
and x3, x1, x0
add x1, sp, 61
add x0, sp, 112
mov x4, x3
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 61]
ldr x2, [sp, 80]
add x1, sp, 62
add x0, sp, 120
mov x4, 0
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 62]
ldr x2, [sp, 88]
ldr x0, [sp, 96]
and x3, x0, 4611686018427387904
add x1, sp, 63
add x0, sp, 128
mov x4, x3
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
ldr x1, [sp, 104]
ldr x0, [sp, 40]
str x1, [x0]
ldr x0, [sp, 40]
add x0, x0, 8
ldr x1, [sp, 112]
str x1, [x0]
ldr x0, [sp, 40]
add x0, x0, 16
ldr x1, [sp, 120]
str x1, [x0]
ldr x0, [sp, 40]
add x0, x0, 24
ldr x1, [sp, 128]
str x1, [x0]
nop
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [sp, 136]
ldr x1, [x0]
subs x2, x2, x1
mov x1, 0
beq .L12
bl __stack_chk_fail
.L12:
ldp x29, x30, [sp], 144
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE7:
.size fiat_pasta_fq_sub, .-fiat_pasta_fq_sub
.align 2
.global fiat_pasta_fq_opp
.type fiat_pasta_fq_opp, %function
fiat_pasta_fq_opp:
.LFB8:
.cfi_startproc
stp x29, x30, [sp, -128]!
.cfi_def_cfa_offset 128
.cfi_offset 29, -128
.cfi_offset 30, -120
mov x29, sp
str x0, [sp, 24]
str x1, [sp, 16]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 120]
mov x1, 0
ldr x0, [sp, 16]
ldr x2, [x0]
add x1, sp, 40
add x0, sp, 48
mov x4, x2
mov x3, 0
mov w2, 0
bl fiat_pasta_fq_subborrowx_u64
ldrb w5, [sp, 40]
ldr x0, [sp, 16]
add x0, x0, 8
ldr x2, [x0]
add x1, sp, 41
add x0, sp, 56
mov x4, x2
mov x3, 0
mov w2, w5
bl fiat_pasta_fq_subborrowx_u64
ldrb w5, [sp, 41]
ldr x0, [sp, 16]
add x0, x0, 16
ldr x2, [x0]
add x1, sp, 42
add x0, sp, 64
mov x4, x2
mov x3, 0
mov w2, w5
bl fiat_pasta_fq_subborrowx_u64
ldrb w5, [sp, 42]
ldr x0, [sp, 16]
add x0, x0, 24
ldr x2, [x0]
add x1, sp, 43
add x0, sp, 72
mov x4, x2
mov x3, 0
mov w2, w5
bl fiat_pasta_fq_subborrowx_u64
ldrb w1, [sp, 43]
add x0, sp, 80
mov x3, -1
mov x2, 0
bl fiat_pasta_fq_cmovznz_u64
ldr x2, [sp, 48]
ldr x1, [sp, 80]
mov x0, 1
movk x0, 0xeb21, lsl 32
movk x0, 0x8c46, lsl 48
and x3, x1, x0
add x1, sp, 44
add x0, sp, 88
mov x4, x3
mov x3, x2
mov w2, 0
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 44]
ldr x2, [sp, 56]
ldr x1, [sp, 80]
mov x0, 43229
movk x0, 0x994, lsl 16
movk x0, 0x98fc, lsl 32
movk x0, 0x2246, lsl 48
and x3, x1, x0
add x1, sp, 45
add x0, sp, 96
mov x4, x3
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 45]
ldr x2, [sp, 64]
add x1, sp, 46
add x0, sp, 104
mov x4, 0
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 46]
ldr x2, [sp, 72]
ldr x0, [sp, 80]
and x3, x0, 4611686018427387904
add x1, sp, 47
add x0, sp, 112
mov x4, x3
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
ldr x1, [sp, 88]
ldr x0, [sp, 24]
str x1, [x0]
ldr x0, [sp, 24]
add x0, x0, 8
ldr x1, [sp, 96]
str x1, [x0]
ldr x0, [sp, 24]
add x0, x0, 16
ldr x1, [sp, 104]
str x1, [x0]
ldr x0, [sp, 24]
add x0, x0, 24
ldr x1, [sp, 112]
str x1, [x0]
nop
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [sp, 120]
ldr x1, [x0]
subs x2, x2, x1
mov x1, 0
beq .L14
bl __stack_chk_fail
.L14:
ldp x29, x30, [sp], 128
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE8:
.size fiat_pasta_fq_opp, .-fiat_pasta_fq_opp
.align 2
.global fiat_pasta_fq_from_montgomery
.type fiat_pasta_fq_from_montgomery, %function
fiat_pasta_fq_from_montgomery:
.LFB9:
.cfi_startproc
sub sp, sp, #624
.cfi_def_cfa_offset 624
stp x29, x30, [sp]
.cfi_offset 29, -624
.cfi_offset 30, -616
mov x29, sp
str x0, [sp, 24]
str x1, [sp, 16]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 616]
mov x1, 0
ldr x0, [sp, 16]
ldr x0, [x0]
str x0, [sp, 600]
add x1, sp, 80
add x0, sp, 72
mov x3, -22948010262529
movk x3, 0x8c46, lsl 48
ldr x2, [sp, 600]
bl fiat_pasta_fq_mulx_u64
ldr x2, [sp, 72]
add x1, sp, 96
add x0, sp, 88
mov x3, 4611686018427387904
bl fiat_pasta_fq_mulx_u64
ldr x2, [sp, 72]
add x1, sp, 112
add x0, sp, 104
mov x3, 43229
movk x3, 0x994, lsl 16
movk x3, 0x98fc, lsl 32
movk x3, 0x2246, lsl 48
bl fiat_pasta_fq_mulx_u64
ldr x2, [sp, 72]
add x1, sp, 128
add x0, sp, 120
mov x3, 1
movk x3, 0xeb21, lsl 32
movk x3, 0x8c46, lsl 48
bl fiat_pasta_fq_mulx_u64
ldr x2, [sp, 128]
ldr x3, [sp, 104]
add x1, sp, 42
add x0, sp, 136
mov x4, x3
mov x3, x2
mov w2, 0
bl fiat_pasta_fq_addcarryx_u64
ldr x2, [sp, 120]
add x1, sp, 43
add x0, sp, 144
mov x4, x2
ldr x3, [sp, 600]
mov w2, 0
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 43]
ldr x2, [sp, 136]
add x1, sp, 44
add x0, sp, 152
mov x4, x2
mov x3, 0
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
ldr x2, [sp, 152]
ldr x0, [sp, 16]
add x0, x0, 8
ldr x3, [x0]
add x1, sp, 45
add x0, sp, 160
mov x4, x3
mov x3, x2
mov w2, 0
bl fiat_pasta_fq_addcarryx_u64
ldr x2, [sp, 160]
add x1, sp, 176
add x0, sp, 168
mov x3, -22948010262529
movk x3, 0x8c46, lsl 48
bl fiat_pasta_fq_mulx_u64
ldr x2, [sp, 168]
add x1, sp, 192
add x0, sp, 184
mov x3, 4611686018427387904
bl fiat_pasta_fq_mulx_u64
ldr x2, [sp, 168]
add x1, sp, 208
add x0, sp, 200
mov x3, 43229
movk x3, 0x994, lsl 16
movk x3, 0x98fc, lsl 32
movk x3, 0x2246, lsl 48
bl fiat_pasta_fq_mulx_u64
ldr x2, [sp, 168]
add x1, sp, 224
add x0, sp, 216
mov x3, 1
movk x3, 0xeb21, lsl 32
movk x3, 0x8c46, lsl 48
bl fiat_pasta_fq_mulx_u64
ldr x2, [sp, 224]
ldr x3, [sp, 200]
add x1, sp, 46
add x0, sp, 232
mov x4, x3
mov x3, x2
mov w2, 0
bl fiat_pasta_fq_addcarryx_u64
ldr x2, [sp, 160]
ldr x3, [sp, 216]
add x1, sp, 47
add x0, sp, 240
mov x4, x3
mov x3, x2
mov w2, 0
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 47]
ldrb w0, [sp, 45]
and x1, x0, 255
ldrb w0, [sp, 44]
and x2, x0, 255
ldrb w0, [sp, 42]
and x3, x0, 255
ldr x0, [sp, 112]
add x0, x3, x0
add x0, x2, x0
add x2, x1, x0
ldr x3, [sp, 232]
add x1, sp, 48
add x0, sp, 248
mov x4, x3
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 48]
ldr x2, [sp, 88]
ldrb w0, [sp, 46]
and x1, x0, 255
ldr x0, [sp, 208]
add x3, x1, x0
add x1, sp, 49
add x0, sp, 256
mov x4, x3
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 49]
ldr x2, [sp, 96]
ldr x3, [sp, 184]
add x1, sp, 50
add x0, sp, 264
mov x4, x3
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
ldr x2, [sp, 248]
ldr x0, [sp, 16]
add x0, x0, 16
ldr x3, [x0]
add x1, sp, 51
add x0, sp, 272
mov x4, x3
mov x3, x2
mov w2, 0
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 51]
ldr x2, [sp, 256]
add x1, sp, 52
add x0, sp, 280
mov x4, 0
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 52]
ldr x2, [sp, 264]
add x1, sp, 53
add x0, sp, 288
mov x4, 0
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
ldr x2, [sp, 272]
add x1, sp, 304
add x0, sp, 296
mov x3, -22948010262529
movk x3, 0x8c46, lsl 48
bl fiat_pasta_fq_mulx_u64
ldr x2, [sp, 296]
add x1, sp, 320
add x0, sp, 312
mov x3, 4611686018427387904
bl fiat_pasta_fq_mulx_u64
ldr x2, [sp, 296]
add x1, sp, 336
add x0, sp, 328
mov x3, 43229
movk x3, 0x994, lsl 16
movk x3, 0x98fc, lsl 32
movk x3, 0x2246, lsl 48
bl fiat_pasta_fq_mulx_u64
ldr x2, [sp, 296]
add x1, sp, 352
add x0, sp, 344
mov x3, 1
movk x3, 0xeb21, lsl 32
movk x3, 0x8c46, lsl 48
bl fiat_pasta_fq_mulx_u64
ldr x2, [sp, 352]
ldr x3, [sp, 328]
add x1, sp, 54
add x0, sp, 360
mov x4, x3
mov x3, x2
mov w2, 0
bl fiat_pasta_fq_addcarryx_u64
ldr x2, [sp, 272]
ldr x3, [sp, 344]
add x1, sp, 55
add x0, sp, 368
mov x4, x3
mov x3, x2
mov w2, 0
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 55]
ldr x2, [sp, 280]
ldr x3, [sp, 360]
add x1, sp, 56
add x0, sp, 376
mov x4, x3
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 56]
ldr x2, [sp, 288]
ldrb w0, [sp, 54]
and x1, x0, 255
ldr x0, [sp, 336]
add x3, x1, x0
add x1, sp, 57
add x0, sp, 384
mov x4, x3
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 57]
ldrb w0, [sp, 53]
and x1, x0, 255
ldrb w0, [sp, 50]
and x2, x0, 255
ldr x0, [sp, 192]
add x0, x2, x0
add x2, x1, x0
ldr x3, [sp, 312]
add x1, sp, 58
add x0, sp, 392
mov x4, x3
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
ldr x2, [sp, 376]
ldr x0, [sp, 16]
add x0, x0, 24
ldr x3, [x0]
add x1, sp, 59
add x0, sp, 400
mov x4, x3
mov x3, x2
mov w2, 0
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 59]
ldr x2, [sp, 384]
add x1, sp, 60
add x0, sp, 408
mov x4, 0
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 60]
ldr x2, [sp, 392]
add x1, sp, 61
add x0, sp, 416
mov x4, 0
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
ldr x2, [sp, 400]
add x1, sp, 432
add x0, sp, 424
mov x3, -22948010262529
movk x3, 0x8c46, lsl 48
bl fiat_pasta_fq_mulx_u64
ldr x2, [sp, 424]
add x1, sp, 448
add x0, sp, 440
mov x3, 4611686018427387904
bl fiat_pasta_fq_mulx_u64
ldr x2, [sp, 424]
add x1, sp, 464
add x0, sp, 456
mov x3, 43229
movk x3, 0x994, lsl 16
movk x3, 0x98fc, lsl 32
movk x3, 0x2246, lsl 48
bl fiat_pasta_fq_mulx_u64
ldr x2, [sp, 424]
add x1, sp, 480
add x0, sp, 472
mov x3, 1
movk x3, 0xeb21, lsl 32
movk x3, 0x8c46, lsl 48
bl fiat_pasta_fq_mulx_u64
ldr x2, [sp, 480]
ldr x3, [sp, 456]
add x1, sp, 62
add x0, sp, 488
mov x4, x3
mov x3, x2
mov w2, 0
bl fiat_pasta_fq_addcarryx_u64
ldr x2, [sp, 400]
ldr x3, [sp, 472]
add x1, sp, 63
add x0, sp, 496
mov x4, x3
mov x3, x2
mov w2, 0
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 63]
ldr x2, [sp, 408]
ldr x3, [sp, 488]
add x1, sp, 64
add x0, sp, 504
mov x4, x3
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 64]
ldr x2, [sp, 416]
ldrb w0, [sp, 62]
and x1, x0, 255
ldr x0, [sp, 464]
add x3, x1, x0
add x1, sp, 65
add x0, sp, 512
mov x4, x3
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 65]
ldrb w0, [sp, 61]
and x1, x0, 255
ldrb w0, [sp, 58]
and x2, x0, 255
ldr x0, [sp, 320]
add x0, x2, x0
add x2, x1, x0
ldr x3, [sp, 440]
add x1, sp, 66
add x0, sp, 520
mov x4, x3
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
ldrb w0, [sp, 66]
and x1, x0, 255
ldr x0, [sp, 448]
add x0, x1, x0
str x0, [sp, 608]
ldr x2, [sp, 504]
add x1, sp, 67
add x0, sp, 528
mov x4, 1
movk x4, 0xeb21, lsl 32
movk x4, 0x8c46, lsl 48
mov x3, x2
mov w2, 0
bl fiat_pasta_fq_subborrowx_u64
ldrb w5, [sp, 67]
ldr x2, [sp, 512]
add x1, sp, 68
add x0, sp, 536
mov x4, 43229
movk x4, 0x994, lsl 16
movk x4, 0x98fc, lsl 32
movk x4, 0x2246, lsl 48
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_subborrowx_u64
ldrb w5, [sp, 68]
ldr x2, [sp, 520]
add x1, sp, 69
add x0, sp, 544
mov x4, 0
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_subborrowx_u64
ldrb w2, [sp, 69]
add x1, sp, 70
add x0, sp, 552
mov x4, 4611686018427387904
ldr x3, [sp, 608]
bl fiat_pasta_fq_subborrowx_u64
ldrb w2, [sp, 70]
add x1, sp, 71
add x0, sp, 560
mov x4, 0
mov x3, 0
bl fiat_pasta_fq_subborrowx_u64
ldrb w4, [sp, 71]
ldr x1, [sp, 528]
ldr x2, [sp, 504]
add x0, sp, 568
mov x3, x2
mov x2, x1
mov w1, w4
bl fiat_pasta_fq_cmovznz_u64
ldrb w4, [sp, 71]
ldr x1, [sp, 536]
ldr x2, [sp, 512]
add x0, sp, 576
mov x3, x2
mov x2, x1
mov w1, w4
bl fiat_pasta_fq_cmovznz_u64
ldrb w4, [sp, 71]
ldr x1, [sp, 544]
ldr x2, [sp, 520]
add x0, sp, 584
mov x3, x2
mov x2, x1
mov w1, w4
bl fiat_pasta_fq_cmovznz_u64
ldrb w4, [sp, 71]
ldr x1, [sp, 552]
add x0, sp, 592
ldr x3, [sp, 608]
mov x2, x1
mov w1, w4
bl fiat_pasta_fq_cmovznz_u64
ldr x1, [sp, 568]
ldr x0, [sp, 24]
str x1, [x0]
ldr x0, [sp, 24]
add x0, x0, 8
ldr x1, [sp, 576]
str x1, [x0]
ldr x0, [sp, 24]
add x0, x0, 16
ldr x1, [sp, 584]
str x1, [x0]
ldr x0, [sp, 24]
add x0, x0, 24
ldr x1, [sp, 592]
str x1, [x0]
nop
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [sp, 616]
ldr x1, [x0]
subs x2, x2, x1
mov x1, 0
beq .L16
bl __stack_chk_fail
.L16:
ldp x29, x30, [sp]
add sp, sp, 624
.cfi_restore 29
.cfi_restore 30
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE9:
.size fiat_pasta_fq_from_montgomery, .-fiat_pasta_fq_from_montgomery
.align 2
.global fiat_pasta_fq_to_montgomery
.type fiat_pasta_fq_to_montgomery, %function
fiat_pasta_fq_to_montgomery:
.LFB10:
.cfi_startproc
sub sp, sp, #1072
.cfi_def_cfa_offset 1072
stp x29, x30, [sp]
.cfi_offset 29, -1072
.cfi_offset 30, -1064
mov x29, sp
str x0, [sp, 24]
str x1, [sp, 16]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 1064]
mov x1, 0
ldr x0, [sp, 16]
add x0, x0, 8
ldr x0, [x0]
str x0, [sp, 1024]
ldr x0, [sp, 16]
add x0, x0, 16
ldr x0, [x0]
str x0, [sp, 1032]
ldr x0, [sp, 16]
add x0, x0, 24
ldr x0, [x0]
str x0, [sp, 1040]
ldr x0, [sp, 16]
ldr x0, [x0]
str x0, [sp, 1048]
add x1, sp, 96
add x0, sp, 88
mov x3, 55977
movk x3, 0x7ccf, lsl 16
movk x3, 0x41af, lsl 32
movk x3, 0x96d, lsl 48
ldr x2, [sp, 1048]
bl fiat_pasta_fq_mulx_u64
add x1, sp, 112
add x0, sp, 104
mov x3, 62864
movk x3, 0x4cc, lsl 16
movk x3, 0x2310, lsl 32
movk x3, 0x7fae, lsl 48
ldr x2, [sp, 1048]
bl fiat_pasta_fq_mulx_u64
add x1, sp, 128
add x0, sp, 120
mov x3, 5859
movk x3, 0x891a, lsl 16
movk x3, 0x433d, lsl 32
movk x3, 0x67bb, lsl 48
ldr x2, [sp, 1048]
bl fiat_pasta_fq_mulx_u64
add x1, sp, 144
add x0, sp, 136
mov x3, 15
movk x3, 0x78ff, lsl 32
movk x3, 0xfc96, lsl 48
ldr x2, [sp, 1048]
bl fiat_pasta_fq_mulx_u64
ldr x2, [sp, 144]
ldr x3, [sp, 120]
add x1, sp, 39
add x0, sp, 152
mov x4, x3
mov x3, x2
mov w2, 0
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 39]
ldr x2, [sp, 128]
ldr x3, [sp, 104]
add x1, sp, 40
add x0, sp, 160
mov x4, x3
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 40]
ldr x2, [sp, 112]
ldr x3, [sp, 88]
add x1, sp, 41
add x0, sp, 168
mov x4, x3
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
ldr x2, [sp, 136]
add x1, sp, 184
add x0, sp, 176
mov x3, -22948010262529
movk x3, 0x8c46, lsl 48
bl fiat_pasta_fq_mulx_u64
ldr x2, [sp, 176]
add x1, sp, 200
add x0, sp, 192
mov x3, 4611686018427387904
bl fiat_pasta_fq_mulx_u64
ldr x2, [sp, 176]
add x1, sp, 216
add x0, sp, 208
mov x3, 43229
movk x3, 0x994, lsl 16
movk x3, 0x98fc, lsl 32
movk x3, 0x2246, lsl 48
bl fiat_pasta_fq_mulx_u64
ldr x2, [sp, 176]
add x1, sp, 232
add x0, sp, 224
mov x3, 1
movk x3, 0xeb21, lsl 32
movk x3, 0x8c46, lsl 48
bl fiat_pasta_fq_mulx_u64
ldr x2, [sp, 232]
ldr x3, [sp, 208]
add x1, sp, 42
add x0, sp, 240
mov x4, x3
mov x3, x2
mov w2, 0
bl fiat_pasta_fq_addcarryx_u64
ldr x2, [sp, 136]
ldr x3, [sp, 224]
add x1, sp, 43
add x0, sp, 248
mov x4, x3
mov x3, x2
mov w2, 0
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 43]
ldr x2, [sp, 152]
ldr x3, [sp, 240]
add x1, sp, 44
add x0, sp, 256
mov x4, x3
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 44]
ldr x2, [sp, 160]
ldrb w0, [sp, 42]
and x1, x0, 255
ldr x0, [sp, 216]
add x3, x1, x0
add x1, sp, 45
add x0, sp, 264
mov x4, x3
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 45]
ldr x2, [sp, 168]
ldr x3, [sp, 192]
add x1, sp, 46
add x0, sp, 272
mov x4, x3
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
add x1, sp, 288
add x0, sp, 280
mov x3, 55977
movk x3, 0x7ccf, lsl 16
movk x3, 0x41af, lsl 32
movk x3, 0x96d, lsl 48
ldr x2, [sp, 1024]
bl fiat_pasta_fq_mulx_u64
add x1, sp, 304
add x0, sp, 296
mov x3, 62864
movk x3, 0x4cc, lsl 16
movk x3, 0x2310, lsl 32
movk x3, 0x7fae, lsl 48
ldr x2, [sp, 1024]
bl fiat_pasta_fq_mulx_u64
add x1, sp, 320
add x0, sp, 312
mov x3, 5859
movk x3, 0x891a, lsl 16
movk x3, 0x433d, lsl 32
movk x3, 0x67bb, lsl 48
ldr x2, [sp, 1024]
bl fiat_pasta_fq_mulx_u64
add x1, sp, 336
add x0, sp, 328
mov x3, 15
movk x3, 0x78ff, lsl 32
movk x3, 0xfc96, lsl 48
ldr x2, [sp, 1024]
bl fiat_pasta_fq_mulx_u64
ldr x2, [sp, 336]
ldr x3, [sp, 312]
add x1, sp, 47
add x0, sp, 344
mov x4, x3
mov x3, x2
mov w2, 0
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 47]
ldr x2, [sp, 320]
ldr x3, [sp, 296]
add x1, sp, 48
add x0, sp, 352
mov x4, x3
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 48]
ldr x2, [sp, 304]
ldr x3, [sp, 280]
add x1, sp, 49
add x0, sp, 360
mov x4, x3
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
ldr x2, [sp, 256]
ldr x3, [sp, 328]
add x1, sp, 50
add x0, sp, 368
mov x4, x3
mov x3, x2
mov w2, 0
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 50]
ldr x2, [sp, 264]
ldr x3, [sp, 344]
add x1, sp, 51
add x0, sp, 376
mov x4, x3
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 51]
ldr x2, [sp, 272]
ldr x3, [sp, 352]
add x1, sp, 52
add x0, sp, 384
mov x4, x3
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 52]
ldrb w0, [sp, 46]
and x1, x0, 255
ldrb w0, [sp, 41]
and x2, x0, 255
ldr x0, [sp, 96]
add x0, x2, x0
add x1, x1, x0
ldr x0, [sp, 200]
add x2, x1, x0
ldr x3, [sp, 360]
add x1, sp, 53
add x0, sp, 392
mov x4, x3
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
ldr x2, [sp, 368]
add x1, sp, 408
add x0, sp, 400
mov x3, -22948010262529
movk x3, 0x8c46, lsl 48
bl fiat_pasta_fq_mulx_u64
ldr x2, [sp, 400]
add x1, sp, 424
add x0, sp, 416
mov x3, 4611686018427387904
bl fiat_pasta_fq_mulx_u64
ldr x2, [sp, 400]
add x1, sp, 440
add x0, sp, 432
mov x3, 43229
movk x3, 0x994, lsl 16
movk x3, 0x98fc, lsl 32
movk x3, 0x2246, lsl 48
bl fiat_pasta_fq_mulx_u64
ldr x2, [sp, 400]
add x1, sp, 456
add x0, sp, 448
mov x3, 1
movk x3, 0xeb21, lsl 32
movk x3, 0x8c46, lsl 48
bl fiat_pasta_fq_mulx_u64
ldr x2, [sp, 456]
ldr x3, [sp, 432]
add x1, sp, 54
add x0, sp, 464
mov x4, x3
mov x3, x2
mov w2, 0
bl fiat_pasta_fq_addcarryx_u64
ldr x2, [sp, 368]
ldr x3, [sp, 448]
add x1, sp, 55
add x0, sp, 472
mov x4, x3
mov x3, x2
mov w2, 0
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 55]
ldr x2, [sp, 376]
ldr x3, [sp, 464]
add x1, sp, 56
add x0, sp, 480
mov x4, x3
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 56]
ldr x2, [sp, 384]
ldrb w0, [sp, 54]
and x1, x0, 255
ldr x0, [sp, 440]
add x3, x1, x0
add x1, sp, 57
add x0, sp, 488
mov x4, x3
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 57]
ldr x2, [sp, 392]
ldr x3, [sp, 416]
add x1, sp, 58
add x0, sp, 496
mov x4, x3
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
add x1, sp, 512
add x0, sp, 504
mov x3, 55977
movk x3, 0x7ccf, lsl 16
movk x3, 0x41af, lsl 32
movk x3, 0x96d, lsl 48
ldr x2, [sp, 1032]
bl fiat_pasta_fq_mulx_u64
add x1, sp, 528
add x0, sp, 520
mov x3, 62864
movk x3, 0x4cc, lsl 16
movk x3, 0x2310, lsl 32
movk x3, 0x7fae, lsl 48
ldr x2, [sp, 1032]
bl fiat_pasta_fq_mulx_u64
add x1, sp, 544
add x0, sp, 536
mov x3, 5859
movk x3, 0x891a, lsl 16
movk x3, 0x433d, lsl 32
movk x3, 0x67bb, lsl 48
ldr x2, [sp, 1032]
bl fiat_pasta_fq_mulx_u64
add x1, sp, 560
add x0, sp, 552
mov x3, 15
movk x3, 0x78ff, lsl 32
movk x3, 0xfc96, lsl 48
ldr x2, [sp, 1032]
bl fiat_pasta_fq_mulx_u64
ldr x2, [sp, 560]
ldr x3, [sp, 536]
add x1, sp, 59
add x0, sp, 568
mov x4, x3
mov x3, x2
mov w2, 0
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 59]
ldr x2, [sp, 544]
ldr x3, [sp, 520]
add x1, sp, 60
add x0, sp, 576
mov x4, x3
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 60]
ldr x2, [sp, 528]
ldr x3, [sp, 504]
add x1, sp, 61
add x0, sp, 584
mov x4, x3
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
ldr x2, [sp, 480]
ldr x3, [sp, 552]
add x1, sp, 62
add x0, sp, 592
mov x4, x3
mov x3, x2
mov w2, 0
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 62]
ldr x2, [sp, 488]
ldr x3, [sp, 568]
add x1, sp, 63
add x0, sp, 600
mov x4, x3
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 63]
ldr x2, [sp, 496]
ldr x3, [sp, 576]
add x1, sp, 64
add x0, sp, 608
mov x4, x3
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 64]
ldrb w0, [sp, 58]
and x1, x0, 255
ldrb w0, [sp, 53]
and x2, x0, 255
ldrb w0, [sp, 49]
and x3, x0, 255
ldr x0, [sp, 288]
add x0, x3, x0
add x0, x2, x0
add x1, x1, x0
ldr x0, [sp, 424]
add x2, x1, x0
ldr x3, [sp, 584]
add x1, sp, 65
add x0, sp, 616
mov x4, x3
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
ldr x2, [sp, 592]
add x1, sp, 632
add x0, sp, 624
mov x3, -22948010262529
movk x3, 0x8c46, lsl 48
bl fiat_pasta_fq_mulx_u64
ldr x2, [sp, 624]
add x1, sp, 648
add x0, sp, 640
mov x3, 4611686018427387904
bl fiat_pasta_fq_mulx_u64
ldr x2, [sp, 624]
add x1, sp, 664
add x0, sp, 656
mov x3, 43229
movk x3, 0x994, lsl 16
movk x3, 0x98fc, lsl 32
movk x3, 0x2246, lsl 48
bl fiat_pasta_fq_mulx_u64
ldr x2, [sp, 624]
add x1, sp, 680
add x0, sp, 672
mov x3, 1
movk x3, 0xeb21, lsl 32
movk x3, 0x8c46, lsl 48
bl fiat_pasta_fq_mulx_u64
ldr x2, [sp, 680]
ldr x3, [sp, 656]
add x1, sp, 66
add x0, sp, 688
mov x4, x3
mov x3, x2
mov w2, 0
bl fiat_pasta_fq_addcarryx_u64
ldr x2, [sp, 592]
ldr x3, [sp, 672]
add x1, sp, 67
add x0, sp, 696
mov x4, x3
mov x3, x2
mov w2, 0
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 67]
ldr x2, [sp, 600]
ldr x3, [sp, 688]
add x1, sp, 68
add x0, sp, 704
mov x4, x3
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 68]
ldr x2, [sp, 608]
ldrb w0, [sp, 66]
and x1, x0, 255
ldr x0, [sp, 664]
add x3, x1, x0
add x1, sp, 69
add x0, sp, 712
mov x4, x3
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 69]
ldr x2, [sp, 616]
ldr x3, [sp, 640]
add x1, sp, 70
add x0, sp, 720
mov x4, x3
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
add x1, sp, 736
add x0, sp, 728
mov x3, 55977
movk x3, 0x7ccf, lsl 16
movk x3, 0x41af, lsl 32
movk x3, 0x96d, lsl 48
ldr x2, [sp, 1040]
bl fiat_pasta_fq_mulx_u64
add x1, sp, 752
add x0, sp, 744
mov x3, 62864
movk x3, 0x4cc, lsl 16
movk x3, 0x2310, lsl 32
movk x3, 0x7fae, lsl 48
ldr x2, [sp, 1040]
bl fiat_pasta_fq_mulx_u64
add x1, sp, 768
add x0, sp, 760
mov x3, 5859
movk x3, 0x891a, lsl 16
movk x3, 0x433d, lsl 32
movk x3, 0x67bb, lsl 48
ldr x2, [sp, 1040]
bl fiat_pasta_fq_mulx_u64
add x1, sp, 784
add x0, sp, 776
mov x3, 15
movk x3, 0x78ff, lsl 32
movk x3, 0xfc96, lsl 48
ldr x2, [sp, 1040]
bl fiat_pasta_fq_mulx_u64
ldr x2, [sp, 784]
ldr x3, [sp, 760]
add x1, sp, 71
add x0, sp, 792
mov x4, x3
mov x3, x2
mov w2, 0
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 71]
ldr x2, [sp, 768]
ldr x3, [sp, 744]
add x1, sp, 72
add x0, sp, 800
mov x4, x3
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 72]
ldr x2, [sp, 752]
ldr x3, [sp, 728]
add x1, sp, 73
add x0, sp, 808
mov x4, x3
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
ldr x2, [sp, 704]
ldr x3, [sp, 776]
add x1, sp, 74
add x0, sp, 816
mov x4, x3
mov x3, x2
mov w2, 0
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 74]
ldr x2, [sp, 712]
ldr x3, [sp, 792]
add x1, sp, 75
add x0, sp, 824
mov x4, x3
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 75]
ldr x2, [sp, 720]
ldr x3, [sp, 800]
add x1, sp, 76
add x0, sp, 832
mov x4, x3
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 76]
ldrb w0, [sp, 70]
and x1, x0, 255
ldrb w0, [sp, 65]
and x2, x0, 255
ldrb w0, [sp, 61]
and x3, x0, 255
ldr x0, [sp, 512]
add x0, x3, x0
add x0, x2, x0
add x1, x1, x0
ldr x0, [sp, 648]
add x2, x1, x0
ldr x3, [sp, 808]
add x1, sp, 77
add x0, sp, 840
mov x4, x3
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
ldr x2, [sp, 816]
add x1, sp, 856
add x0, sp, 848
mov x3, -22948010262529
movk x3, 0x8c46, lsl 48
bl fiat_pasta_fq_mulx_u64
ldr x2, [sp, 848]
add x1, sp, 872
add x0, sp, 864
mov x3, 4611686018427387904
bl fiat_pasta_fq_mulx_u64
ldr x2, [sp, 848]
add x1, sp, 888
add x0, sp, 880
mov x3, 43229
movk x3, 0x994, lsl 16
movk x3, 0x98fc, lsl 32
movk x3, 0x2246, lsl 48
bl fiat_pasta_fq_mulx_u64
ldr x2, [sp, 848]
add x1, sp, 904
add x0, sp, 896
mov x3, 1
movk x3, 0xeb21, lsl 32
movk x3, 0x8c46, lsl 48
bl fiat_pasta_fq_mulx_u64
ldr x2, [sp, 904]
ldr x3, [sp, 880]
add x1, sp, 78
add x0, sp, 912
mov x4, x3
mov x3, x2
mov w2, 0
bl fiat_pasta_fq_addcarryx_u64
ldr x2, [sp, 816]
ldr x3, [sp, 896]
add x1, sp, 79
add x0, sp, 920
mov x4, x3
mov x3, x2
mov w2, 0
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 79]
ldr x2, [sp, 824]
ldr x3, [sp, 912]
add x1, sp, 80
add x0, sp, 928
mov x4, x3
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 80]
ldr x2, [sp, 832]
ldrb w0, [sp, 78]
and x1, x0, 255
ldr x0, [sp, 888]
add x3, x1, x0
add x1, sp, 81
add x0, sp, 936
mov x4, x3
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 81]
ldr x2, [sp, 840]
ldr x3, [sp, 864]
add x1, sp, 82
add x0, sp, 944
mov x4, x3
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
ldrb w0, [sp, 82]
and x1, x0, 255
ldrb w0, [sp, 77]
and x2, x0, 255
ldrb w0, [sp, 73]
and x3, x0, 255
ldr x0, [sp, 736]
add x0, x3, x0
add x0, x2, x0
add x1, x1, x0
ldr x0, [sp, 872]
add x0, x1, x0
str x0, [sp, 1056]
ldr x2, [sp, 928]
add x1, sp, 83
add x0, sp, 952
mov x4, 1
movk x4, 0xeb21, lsl 32
movk x4, 0x8c46, lsl 48
mov x3, x2
mov w2, 0
bl fiat_pasta_fq_subborrowx_u64
ldrb w5, [sp, 83]
ldr x2, [sp, 936]
add x1, sp, 84
add x0, sp, 960
mov x4, 43229
movk x4, 0x994, lsl 16
movk x4, 0x98fc, lsl 32
movk x4, 0x2246, lsl 48
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_subborrowx_u64
ldrb w5, [sp, 84]
ldr x2, [sp, 944]
add x1, sp, 85
add x0, sp, 968
mov x4, 0
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_subborrowx_u64
ldrb w2, [sp, 85]
add x1, sp, 86
add x0, sp, 976
mov x4, 4611686018427387904
ldr x3, [sp, 1056]
bl fiat_pasta_fq_subborrowx_u64
ldrb w2, [sp, 86]
add x1, sp, 87
add x0, sp, 984
mov x4, 0
mov x3, 0
bl fiat_pasta_fq_subborrowx_u64
ldrb w4, [sp, 87]
ldr x1, [sp, 952]
ldr x2, [sp, 928]
add x0, sp, 992
mov x3, x2
mov x2, x1
mov w1, w4
bl fiat_pasta_fq_cmovznz_u64
ldrb w4, [sp, 87]
ldr x1, [sp, 960]
ldr x2, [sp, 936]
add x0, sp, 1000
mov x3, x2
mov x2, x1
mov w1, w4
bl fiat_pasta_fq_cmovznz_u64
ldrb w4, [sp, 87]
ldr x1, [sp, 968]
ldr x2, [sp, 944]
add x0, sp, 1008
mov x3, x2
mov x2, x1
mov w1, w4
bl fiat_pasta_fq_cmovznz_u64
ldrb w4, [sp, 87]
ldr x1, [sp, 976]
add x0, sp, 1016
ldr x3, [sp, 1056]
mov x2, x1
mov w1, w4
bl fiat_pasta_fq_cmovznz_u64
ldr x1, [sp, 992]
ldr x0, [sp, 24]
str x1, [x0]
ldr x0, [sp, 24]
add x0, x0, 8
ldr x1, [sp, 1000]
str x1, [x0]
ldr x0, [sp, 24]
add x0, x0, 16
ldr x1, [sp, 1008]
str x1, [x0]
ldr x0, [sp, 24]
add x0, x0, 24
ldr x1, [sp, 1016]
str x1, [x0]
nop
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [sp, 1064]
ldr x1, [x0]
subs x2, x2, x1
mov x1, 0
beq .L18
bl __stack_chk_fail
.L18:
ldp x29, x30, [sp]
add sp, sp, 1072
.cfi_restore 29
.cfi_restore 30
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE10:
.size fiat_pasta_fq_to_montgomery, .-fiat_pasta_fq_to_montgomery
.align 2
.global fiat_pasta_fq_nonzero
.type fiat_pasta_fq_nonzero, %function
fiat_pasta_fq_nonzero:
.LFB11:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str x0, [sp, 8]
str x1, [sp]
ldr x0, [sp]
ldr x1, [x0]
ldr x0, [sp]
add x0, x0, 8
ldr x2, [x0]
ldr x0, [sp]
add x0, x0, 16
ldr x3, [x0]
ldr x0, [sp]
add x0, x0, 24
ldr x0, [x0]
orr x0, x3, x0
orr x0, x2, x0
orr x0, x1, x0
str x0, [sp, 24]
ldr x0, [sp, 8]
ldr x1, [sp, 24]
str x1, [x0]
nop
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE11:
.size fiat_pasta_fq_nonzero, .-fiat_pasta_fq_nonzero
.align 2
.global fiat_pasta_fq_selectznz
.type fiat_pasta_fq_selectznz, %function
fiat_pasta_fq_selectznz:
.LFB12:
.cfi_startproc
stp x29, x30, [sp, -96]!
.cfi_def_cfa_offset 96
.cfi_offset 29, -96
.cfi_offset 30, -88
mov x29, sp
str x0, [sp, 40]
strb w1, [sp, 39]
str x2, [sp, 24]
str x3, [sp, 16]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 88]
mov x1, 0
ldr x0, [sp, 24]
ldr x1, [x0]
ldr x0, [sp, 16]
ldr x2, [x0]
add x0, sp, 56
mov x3, x2
mov x2, x1
ldrb w1, [sp, 39]
bl fiat_pasta_fq_cmovznz_u64
ldr x0, [sp, 24]
add x0, x0, 8
ldr x1, [x0]
ldr x0, [sp, 16]
add x0, x0, 8
ldr x2, [x0]
add x0, sp, 64
mov x3, x2
mov x2, x1
ldrb w1, [sp, 39]
bl fiat_pasta_fq_cmovznz_u64
ldr x0, [sp, 24]
add x0, x0, 16
ldr x1, [x0]
ldr x0, [sp, 16]
add x0, x0, 16
ldr x2, [x0]
add x0, sp, 72
mov x3, x2
mov x2, x1
ldrb w1, [sp, 39]
bl fiat_pasta_fq_cmovznz_u64
ldr x0, [sp, 24]
add x0, x0, 24
ldr x1, [x0]
ldr x0, [sp, 16]
add x0, x0, 24
ldr x2, [x0]
add x0, sp, 80
mov x3, x2
mov x2, x1
ldrb w1, [sp, 39]
bl fiat_pasta_fq_cmovznz_u64
ldr x1, [sp, 56]
ldr x0, [sp, 40]
str x1, [x0]
ldr x0, [sp, 40]
add x0, x0, 8
ldr x1, [sp, 64]
str x1, [x0]
ldr x0, [sp, 40]
add x0, x0, 16
ldr x1, [sp, 72]
str x1, [x0]
ldr x0, [sp, 40]
add x0, x0, 24
ldr x1, [sp, 80]
str x1, [x0]
nop
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [sp, 88]
ldr x1, [x0]
subs x2, x2, x1
mov x1, 0
beq .L21
bl __stack_chk_fail
.L21:
ldp x29, x30, [sp], 96
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE12:
.size fiat_pasta_fq_selectznz, .-fiat_pasta_fq_selectznz
.align 2
.global fiat_pasta_fq_to_bytes
.type fiat_pasta_fq_to_bytes, %function
fiat_pasta_fq_to_bytes:
.LFB13:
.cfi_startproc
sub sp, sp, #272
.cfi_def_cfa_offset 272
str x0, [sp, 8]
str x1, [sp]
ldr x0, [sp]
add x0, x0, 24
ldr x0, [x0]
str x0, [sp, 48]
ldr x0, [sp]
add x0, x0, 16
ldr x0, [x0]
str x0, [sp, 56]
ldr x0, [sp]
add x0, x0, 8
ldr x0, [x0]
str x0, [sp, 64]
ldr x0, [sp]
ldr x0, [x0]
str x0, [sp, 72]
ldr x0, [sp, 72]
strb w0, [sp, 16]
ldr x0, [sp, 72]
lsr x0, x0, 8
str x0, [sp, 80]
ldr x0, [sp, 80]
strb w0, [sp, 17]
ldr x0, [sp, 80]
lsr x0, x0, 8
str x0, [sp, 88]
ldr x0, [sp, 88]
strb w0, [sp, 18]
ldr x0, [sp, 88]
lsr x0, x0, 8
str x0, [sp, 96]
ldr x0, [sp, 96]
strb w0, [sp, 19]
ldr x0, [sp, 96]
lsr x0, x0, 8
str x0, [sp, 104]
ldr x0, [sp, 104]
strb w0, [sp, 20]
ldr x0, [sp, 104]
lsr x0, x0, 8
str x0, [sp, 112]
ldr x0, [sp, 112]
strb w0, [sp, 21]
ldr x0, [sp, 112]
lsr x0, x0, 8
str x0, [sp, 120]
ldr x0, [sp, 120]
strb w0, [sp, 22]
ldr x0, [sp, 120]
lsr x0, x0, 8
strb w0, [sp, 23]
ldr x0, [sp, 64]
strb w0, [sp, 24]
ldr x0, [sp, 64]
lsr x0, x0, 8
str x0, [sp, 128]
ldr x0, [sp, 128]
strb w0, [sp, 25]
ldr x0, [sp, 128]
lsr x0, x0, 8
str x0, [sp, 136]
ldr x0, [sp, 136]
strb w0, [sp, 26]
ldr x0, [sp, 136]
lsr x0, x0, 8
str x0, [sp, 144]
ldr x0, [sp, 144]
strb w0, [sp, 27]
ldr x0, [sp, 144]
lsr x0, x0, 8
str x0, [sp, 152]
ldr x0, [sp, 152]
strb w0, [sp, 28]
ldr x0, [sp, 152]
lsr x0, x0, 8
str x0, [sp, 160]
ldr x0, [sp, 160]
strb w0, [sp, 29]
ldr x0, [sp, 160]
lsr x0, x0, 8
str x0, [sp, 168]
ldr x0, [sp, 168]
strb w0, [sp, 30]
ldr x0, [sp, 168]
lsr x0, x0, 8
strb w0, [sp, 31]
ldr x0, [sp, 56]
strb w0, [sp, 32]
ldr x0, [sp, 56]
lsr x0, x0, 8
str x0, [sp, 176]
ldr x0, [sp, 176]
strb w0, [sp, 33]
ldr x0, [sp, 176]
lsr x0, x0, 8
str x0, [sp, 184]
ldr x0, [sp, 184]
strb w0, [sp, 34]
ldr x0, [sp, 184]
lsr x0, x0, 8
str x0, [sp, 192]
ldr x0, [sp, 192]
strb w0, [sp, 35]
ldr x0, [sp, 192]
lsr x0, x0, 8
str x0, [sp, 200]
ldr x0, [sp, 200]
strb w0, [sp, 36]
ldr x0, [sp, 200]
lsr x0, x0, 8
str x0, [sp, 208]
ldr x0, [sp, 208]
strb w0, [sp, 37]
ldr x0, [sp, 208]
lsr x0, x0, 8
str x0, [sp, 216]
ldr x0, [sp, 216]
strb w0, [sp, 38]
ldr x0, [sp, 216]
lsr x0, x0, 8
strb w0, [sp, 39]
ldr x0, [sp, 48]
strb w0, [sp, 40]
ldr x0, [sp, 48]
lsr x0, x0, 8
str x0, [sp, 224]
ldr x0, [sp, 224]
strb w0, [sp, 41]
ldr x0, [sp, 224]
lsr x0, x0, 8
str x0, [sp, 232]
ldr x0, [sp, 232]
strb w0, [sp, 42]
ldr x0, [sp, 232]
lsr x0, x0, 8
str x0, [sp, 240]
ldr x0, [sp, 240]
strb w0, [sp, 43]
ldr x0, [sp, 240]
lsr x0, x0, 8
str x0, [sp, 248]
ldr x0, [sp, 248]
strb w0, [sp, 44]
ldr x0, [sp, 248]
lsr x0, x0, 8
str x0, [sp, 256]
ldr x0, [sp, 256]
strb w0, [sp, 45]
ldr x0, [sp, 256]
lsr x0, x0, 8
str x0, [sp, 264]
ldr x0, [sp, 264]
strb w0, [sp, 46]
ldr x0, [sp, 264]
lsr x0, x0, 8
strb w0, [sp, 47]
ldr x0, [sp, 8]
ldrb w1, [sp, 16]
strb w1, [x0]
ldr x0, [sp, 8]
add x0, x0, 1
ldrb w1, [sp, 17]
strb w1, [x0]
ldr x0, [sp, 8]
add x0, x0, 2
ldrb w1, [sp, 18]
strb w1, [x0]
ldr x0, [sp, 8]
add x0, x0, 3
ldrb w1, [sp, 19]
strb w1, [x0]
ldr x0, [sp, 8]
add x0, x0, 4
ldrb w1, [sp, 20]
strb w1, [x0]
ldr x0, [sp, 8]
add x0, x0, 5
ldrb w1, [sp, 21]
strb w1, [x0]
ldr x0, [sp, 8]
add x0, x0, 6
ldrb w1, [sp, 22]
strb w1, [x0]
ldr x0, [sp, 8]
add x0, x0, 7
ldrb w1, [sp, 23]
strb w1, [x0]
ldr x0, [sp, 8]
add x0, x0, 8
ldrb w1, [sp, 24]
strb w1, [x0]
ldr x0, [sp, 8]
add x0, x0, 9
ldrb w1, [sp, 25]
strb w1, [x0]
ldr x0, [sp, 8]
add x0, x0, 10
ldrb w1, [sp, 26]
strb w1, [x0]
ldr x0, [sp, 8]
add x0, x0, 11
ldrb w1, [sp, 27]
strb w1, [x0]
ldr x0, [sp, 8]
add x0, x0, 12
ldrb w1, [sp, 28]
strb w1, [x0]
ldr x0, [sp, 8]
add x0, x0, 13
ldrb w1, [sp, 29]
strb w1, [x0]
ldr x0, [sp, 8]
add x0, x0, 14
ldrb w1, [sp, 30]
strb w1, [x0]
ldr x0, [sp, 8]
add x0, x0, 15
ldrb w1, [sp, 31]
strb w1, [x0]
ldr x0, [sp, 8]
add x0, x0, 16
ldrb w1, [sp, 32]
strb w1, [x0]
ldr x0, [sp, 8]
add x0, x0, 17
ldrb w1, [sp, 33]
strb w1, [x0]
ldr x0, [sp, 8]
add x0, x0, 18
ldrb w1, [sp, 34]
strb w1, [x0]
ldr x0, [sp, 8]
add x0, x0, 19
ldrb w1, [sp, 35]
strb w1, [x0]
ldr x0, [sp, 8]
add x0, x0, 20
ldrb w1, [sp, 36]
strb w1, [x0]
ldr x0, [sp, 8]
add x0, x0, 21
ldrb w1, [sp, 37]
strb w1, [x0]
ldr x0, [sp, 8]
add x0, x0, 22
ldrb w1, [sp, 38]
strb w1, [x0]
ldr x0, [sp, 8]
add x0, x0, 23
ldrb w1, [sp, 39]
strb w1, [x0]
ldr x0, [sp, 8]
add x0, x0, 24
ldrb w1, [sp, 40]
strb w1, [x0]
ldr x0, [sp, 8]
add x0, x0, 25
ldrb w1, [sp, 41]
strb w1, [x0]
ldr x0, [sp, 8]
add x0, x0, 26
ldrb w1, [sp, 42]
strb w1, [x0]
ldr x0, [sp, 8]
add x0, x0, 27
ldrb w1, [sp, 43]
strb w1, [x0]
ldr x0, [sp, 8]
add x0, x0, 28
ldrb w1, [sp, 44]
strb w1, [x0]
ldr x0, [sp, 8]
add x0, x0, 29
ldrb w1, [sp, 45]
strb w1, [x0]
ldr x0, [sp, 8]
add x0, x0, 30
ldrb w1, [sp, 46]
strb w1, [x0]
ldr x0, [sp, 8]
add x0, x0, 31
ldrb w1, [sp, 47]
strb w1, [x0]
nop
add sp, sp, 272
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE13:
.size fiat_pasta_fq_to_bytes, .-fiat_pasta_fq_to_bytes
.align 2
.global fiat_pasta_fq_from_bytes
.type fiat_pasta_fq_from_bytes, %function
fiat_pasta_fq_from_bytes:
.LFB14:
.cfi_startproc
sub sp, sp, #480
.cfi_def_cfa_offset 480
str x0, [sp, 8]
str x1, [sp]
ldr x0, [sp]
add x0, x0, 31
ldrb w0, [x0]
and x0, x0, 255
lsl x0, x0, 56
str x0, [sp, 32]
ldr x0, [sp]
add x0, x0, 30
ldrb w0, [x0]
and x0, x0, 255
lsl x0, x0, 48
str x0, [sp, 40]
ldr x0, [sp]
add x0, x0, 29
ldrb w0, [x0]
and x0, x0, 255
lsl x0, x0, 40
str x0, [sp, 48]
ldr x0, [sp]
add x0, x0, 28
ldrb w0, [x0]
and x0, x0, 255
lsl x0, x0, 32
str x0, [sp, 56]
ldr x0, [sp]
add x0, x0, 27
ldrb w0, [x0]
and x0, x0, 255
lsl x0, x0, 24
str x0, [sp, 64]
ldr x0, [sp]
add x0, x0, 26
ldrb w0, [x0]
and x0, x0, 255
lsl x0, x0, 16
str x0, [sp, 72]
ldr x0, [sp]
add x0, x0, 25
ldrb w0, [x0]
and x0, x0, 255
lsl x0, x0, 8
str x0, [sp, 80]
ldr x0, [sp]
add x0, x0, 24
ldrb w0, [x0]
strb w0, [sp, 28]
ldr x0, [sp]
add x0, x0, 23
ldrb w0, [x0]
and x0, x0, 255
lsl x0, x0, 56
str x0, [sp, 88]
ldr x0, [sp]
add x0, x0, 22
ldrb w0, [x0]
and x0, x0, 255
lsl x0, x0, 48
str x0, [sp, 96]
ldr x0, [sp]
add x0, x0, 21
ldrb w0, [x0]
and x0, x0, 255
lsl x0, x0, 40
str x0, [sp, 104]
ldr x0, [sp]
add x0, x0, 20
ldrb w0, [x0]
and x0, x0, 255
lsl x0, x0, 32
str x0, [sp, 112]
ldr x0, [sp]
add x0, x0, 19
ldrb w0, [x0]
and x0, x0, 255
lsl x0, x0, 24
str x0, [sp, 120]
ldr x0, [sp]
add x0, x0, 18
ldrb w0, [x0]
and x0, x0, 255
lsl x0, x0, 16
str x0, [sp, 128]
ldr x0, [sp]
add x0, x0, 17
ldrb w0, [x0]
and x0, x0, 255
lsl x0, x0, 8
str x0, [sp, 136]
ldr x0, [sp]
add x0, x0, 16
ldrb w0, [x0]
strb w0, [sp, 29]
ldr x0, [sp]
add x0, x0, 15
ldrb w0, [x0]
and x0, x0, 255
lsl x0, x0, 56
str x0, [sp, 144]
ldr x0, [sp]
add x0, x0, 14
ldrb w0, [x0]
and x0, x0, 255
lsl x0, x0, 48
str x0, [sp, 152]
ldr x0, [sp]
add x0, x0, 13
ldrb w0, [x0]
and x0, x0, 255
lsl x0, x0, 40
str x0, [sp, 160]
ldr x0, [sp]
add x0, x0, 12
ldrb w0, [x0]
and x0, x0, 255
lsl x0, x0, 32
str x0, [sp, 168]
ldr x0, [sp]
add x0, x0, 11
ldrb w0, [x0]
and x0, x0, 255
lsl x0, x0, 24
str x0, [sp, 176]
ldr x0, [sp]
add x0, x0, 10
ldrb w0, [x0]
and x0, x0, 255
lsl x0, x0, 16
str x0, [sp, 184]
ldr x0, [sp]
add x0, x0, 9
ldrb w0, [x0]
and x0, x0, 255
lsl x0, x0, 8
str x0, [sp, 192]
ldr x0, [sp]
add x0, x0, 8
ldrb w0, [x0]
strb w0, [sp, 30]
ldr x0, [sp]
add x0, x0, 7
ldrb w0, [x0]
and x0, x0, 255
lsl x0, x0, 56
str x0, [sp, 200]
ldr x0, [sp]
add x0, x0, 6
ldrb w0, [x0]
and x0, x0, 255
lsl x0, x0, 48
str x0, [sp, 208]
ldr x0, [sp]
add x0, x0, 5
ldrb w0, [x0]
and x0, x0, 255
lsl x0, x0, 40
str x0, [sp, 216]
ldr x0, [sp]
add x0, x0, 4
ldrb w0, [x0]
and x0, x0, 255
lsl x0, x0, 32
str x0, [sp, 224]
ldr x0, [sp]
add x0, x0, 3
ldrb w0, [x0]
and x0, x0, 255
lsl x0, x0, 24
str x0, [sp, 232]
ldr x0, [sp]
add x0, x0, 2
ldrb w0, [x0]
and x0, x0, 255
lsl x0, x0, 16
str x0, [sp, 240]
ldr x0, [sp]
add x0, x0, 1
ldrb w0, [x0]
and x0, x0, 255
lsl x0, x0, 8
str x0, [sp, 248]
ldr x0, [sp]
ldrb w0, [x0]
strb w0, [sp, 31]
ldrb w0, [sp, 31]
ldr x1, [sp, 248]
add x0, x1, x0
str x0, [sp, 256]
ldr x1, [sp, 240]
ldr x0, [sp, 256]
add x0, x1, x0
str x0, [sp, 264]
ldr x1, [sp, 232]
ldr x0, [sp, 264]
add x0, x1, x0
str x0, [sp, 272]
ldr x1, [sp, 224]
ldr x0, [sp, 272]
add x0, x1, x0
str x0, [sp, 280]
ldr x1, [sp, 216]
ldr x0, [sp, 280]
add x0, x1, x0
str x0, [sp, 288]
ldr x1, [sp, 208]
ldr x0, [sp, 288]
add x0, x1, x0
str x0, [sp, 296]
ldr x1, [sp, 200]
ldr x0, [sp, 296]
add x0, x1, x0
str x0, [sp, 304]
ldrb w0, [sp, 30]
ldr x1, [sp, 192]
add x0, x1, x0
str x0, [sp, 312]
ldr x1, [sp, 184]
ldr x0, [sp, 312]
add x0, x1, x0
str x0, [sp, 320]
ldr x1, [sp, 176]
ldr x0, [sp, 320]
add x0, x1, x0
str x0, [sp, 328]
ldr x1, [sp, 168]
ldr x0, [sp, 328]
add x0, x1, x0
str x0, [sp, 336]
ldr x1, [sp, 160]
ldr x0, [sp, 336]
add x0, x1, x0
str x0, [sp, 344]
ldr x1, [sp, 152]
ldr x0, [sp, 344]
add x0, x1, x0
str x0, [sp, 352]
ldr x1, [sp, 144]
ldr x0, [sp, 352]
add x0, x1, x0
str x0, [sp, 360]
ldrb w0, [sp, 29]
ldr x1, [sp, 136]
add x0, x1, x0
str x0, [sp, 368]
ldr x1, [sp, 128]
ldr x0, [sp, 368]
add x0, x1, x0
str x0, [sp, 376]
ldr x1, [sp, 120]
ldr x0, [sp, 376]
add x0, x1, x0
str x0, [sp, 384]
ldr x1, [sp, 112]
ldr x0, [sp, 384]
add x0, x1, x0
str x0, [sp, 392]
ldr x1, [sp, 104]
ldr x0, [sp, 392]
add x0, x1, x0
str x0, [sp, 400]
ldr x1, [sp, 96]
ldr x0, [sp, 400]
add x0, x1, x0
str x0, [sp, 408]
ldr x1, [sp, 88]
ldr x0, [sp, 408]
add x0, x1, x0
str x0, [sp, 416]
ldrb w0, [sp, 28]
ldr x1, [sp, 80]
add x0, x1, x0
str x0, [sp, 424]
ldr x1, [sp, 72]
ldr x0, [sp, 424]
add x0, x1, x0
str x0, [sp, 432]
ldr x1, [sp, 64]
ldr x0, [sp, 432]
add x0, x1, x0
str x0, [sp, 440]
ldr x1, [sp, 56]
ldr x0, [sp, 440]
add x0, x1, x0
str x0, [sp, 448]
ldr x1, [sp, 48]
ldr x0, [sp, 448]
add x0, x1, x0
str x0, [sp, 456]
ldr x1, [sp, 40]
ldr x0, [sp, 456]
add x0, x1, x0
str x0, [sp, 464]
ldr x1, [sp, 32]
ldr x0, [sp, 464]
add x0, x1, x0
str x0, [sp, 472]
ldr x0, [sp, 8]
ldr x1, [sp, 304]
str x1, [x0]
ldr x0, [sp, 8]
add x0, x0, 8
ldr x1, [sp, 360]
str x1, [x0]
ldr x0, [sp, 8]
add x0, x0, 16
ldr x1, [sp, 416]
str x1, [x0]
ldr x0, [sp, 8]
add x0, x0, 24
ldr x1, [sp, 472]
str x1, [x0]
nop
add sp, sp, 480
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE14:
.size fiat_pasta_fq_from_bytes, .-fiat_pasta_fq_from_bytes
.align 2
.global fiat_pasta_fq_set_one
.type fiat_pasta_fq_set_one, %function
fiat_pasta_fq_set_one:
.LFB15:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str x0, [sp, 8]
ldr x0, [sp, 8]
mov x1, -3
movk x1, 0x3e9c, lsl 32
movk x1, 0x5b2b, lsl 48
str x1, [x0]
ldr x0, [sp, 8]
add x0, x0, 8
mov x1, 1383
movk x1, 0xe342, lsl 16
movk x1, 0x350b, lsl 32
movk x1, 0x992c, lsl 48
str x1, [x0]
ldr x0, [sp, 8]
add x0, x0, 16
mov x1, -1
str x1, [x0]
ldr x0, [sp, 8]
add x0, x0, 24
mov x1, 4611686018427387903
str x1, [x0]
nop
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE15:
.size fiat_pasta_fq_set_one, .-fiat_pasta_fq_set_one
.align 2
.global fiat_pasta_fq_msat
.type fiat_pasta_fq_msat, %function
fiat_pasta_fq_msat:
.LFB16:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str x0, [sp, 8]
ldr x0, [sp, 8]
mov x1, 1
movk x1, 0xeb21, lsl 32
movk x1, 0x8c46, lsl 48
str x1, [x0]
ldr x0, [sp, 8]
add x0, x0, 8
mov x1, 43229
movk x1, 0x994, lsl 16
movk x1, 0x98fc, lsl 32
movk x1, 0x2246, lsl 48
str x1, [x0]
ldr x0, [sp, 8]
add x0, x0, 16
str xzr, [x0]
ldr x0, [sp, 8]
add x0, x0, 24
mov x1, 4611686018427387904
str x1, [x0]
ldr x0, [sp, 8]
add x0, x0, 32
str xzr, [x0]
nop
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE16:
.size fiat_pasta_fq_msat, .-fiat_pasta_fq_msat
.align 2
.global fiat_pasta_fq_divstep_precomp
.type fiat_pasta_fq_divstep_precomp, %function
fiat_pasta_fq_divstep_precomp:
.LFB17:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str x0, [sp, 8]
ldr x0, [sp, 8]
mov x1, 10642
movk x1, 0xdccd, lsl 16
movk x1, 0x3b32, lsl 32
movk x1, 0xe608, lsl 48
str x1, [x0]
ldr x0, [sp, 8]
add x0, x0, 8
mov x1, 55990
movk x1, 0x4f3b, lsl 16
movk x1, 0x5358, lsl 32
movk x1, 0x6244, lsl 48
str x1, [x0]
ldr x0, [sp, 8]
add x0, x0, 16
mov x1, 49294
movk x1, 0xc5d2, lsl 16
movk x1, 0x67a9, lsl 32
movk x1, 0xba63, lsl 48
str x1, [x0]
ldr x0, [sp, 8]
add x0, x0, 24
mov x1, 45999
movk x1, 0xb19a, lsl 16
movk x1, 0xdbac, lsl 32
movk x1, 0x1468, lsl 48
str x1, [x0]
nop
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE17:
.size fiat_pasta_fq_divstep_precomp, .-fiat_pasta_fq_divstep_precomp
.align 2
.global fiat_pasta_fq_divstep
.type fiat_pasta_fq_divstep, %function
fiat_pasta_fq_divstep:
.LFB18:
.cfi_startproc
sub sp, sp, #832
.cfi_def_cfa_offset 832
stp x29, x30, [sp]
.cfi_offset 29, -832
.cfi_offset 30, -824
mov x29, sp
str x0, [sp, 88]
str x1, [sp, 80]
str x2, [sp, 72]
str x3, [sp, 64]
str x4, [sp, 56]
str x5, [sp, 48]
str x6, [sp, 40]
str x7, [sp, 32]
ldr x0, [sp, 832]
str x0, [sp, 24]
ldr x0, [sp, 840]
str x0, [sp, 16]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 824]
mov x1, 0
ldr x0, [sp, 48]
mvn x2, x0
add x1, sp, 103
add x0, sp, 144
mov x4, 1
mov x3, x2
mov w2, 0
bl fiat_pasta_fq_addcarryx_u64
ldr x0, [sp, 144]
lsr x0, x0, 63
sxtb w1, w0
ldr x0, [sp, 32]
ldr x0, [x0]
sxtb w0, w0
and w0, w0, 1
sxtb w0, w0
and w0, w1, w0
sxtb w0, w0
strb w0, [sp, 142]
ldr x0, [sp, 48]
mvn x2, x0
add x1, sp, 104
add x0, sp, 152
mov x4, 1
mov x3, x2
mov w2, 0
bl fiat_pasta_fq_addcarryx_u64
ldr x1, [sp, 152]
add x0, sp, 160
mov x3, x1
ldr x2, [sp, 48]
ldrb w1, [sp, 142]
bl fiat_pasta_fq_cmovznz_u64
ldr x0, [sp, 40]
ldr x1, [x0]
ldr x0, [sp, 32]
ldr x2, [x0]
add x0, sp, 168
mov x3, x2
mov x2, x1
ldrb w1, [sp, 142]
bl fiat_pasta_fq_cmovznz_u64
ldr x0, [sp, 40]
add x0, x0, 8
ldr x1, [x0]
ldr x0, [sp, 32]
add x0, x0, 8
ldr x2, [x0]
add x0, sp, 176
mov x3, x2
mov x2, x1
ldrb w1, [sp, 142]
bl fiat_pasta_fq_cmovznz_u64
ldr x0, [sp, 40]
add x0, x0, 16
ldr x1, [x0]
ldr x0, [sp, 32]
add x0, x0, 16
ldr x2, [x0]
add x0, sp, 184
mov x3, x2
mov x2, x1
ldrb w1, [sp, 142]
bl fiat_pasta_fq_cmovznz_u64
ldr x0, [sp, 40]
add x0, x0, 24
ldr x1, [x0]
ldr x0, [sp, 32]
add x0, x0, 24
ldr x2, [x0]
add x0, sp, 192
mov x3, x2
mov x2, x1
ldrb w1, [sp, 142]
bl fiat_pasta_fq_cmovznz_u64
ldr x0, [sp, 40]
add x0, x0, 32
ldr x1, [x0]
ldr x0, [sp, 32]
add x0, x0, 32
ldr x2, [x0]
add x0, sp, 200
mov x3, x2
mov x2, x1
ldrb w1, [sp, 142]
bl fiat_pasta_fq_cmovznz_u64
ldr x0, [sp, 40]
ldr x0, [x0]
mvn x2, x0
add x1, sp, 105
add x0, sp, 208
mov x4, x2
mov x3, 1
mov w2, 0
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 105]
ldr x0, [sp, 40]
add x0, x0, 8
ldr x0, [x0]
mvn x2, x0
add x1, sp, 106
add x0, sp, 216
mov x4, x2
mov x3, 0
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 106]
ldr x0, [sp, 40]
add x0, x0, 16
ldr x0, [x0]
mvn x2, x0
add x1, sp, 107
add x0, sp, 224
mov x4, x2
mov x3, 0
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 107]
ldr x0, [sp, 40]
add x0, x0, 24
ldr x0, [x0]
mvn x2, x0
add x1, sp, 108
add x0, sp, 232
mov x4, x2
mov x3, 0
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 108]
ldr x0, [sp, 40]
add x0, x0, 32
ldr x0, [x0]
mvn x2, x0
add x1, sp, 109
add x0, sp, 240
mov x4, x2
mov x3, 0
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
ldr x0, [sp, 32]
ldr x1, [x0]
ldr x2, [sp, 208]
add x0, sp, 248
mov x3, x2
mov x2, x1
ldrb w1, [sp, 142]
bl fiat_pasta_fq_cmovznz_u64
ldr x0, [sp, 32]
add x0, x0, 8
ldr x1, [x0]
ldr x2, [sp, 216]
add x0, sp, 256
mov x3, x2
mov x2, x1
ldrb w1, [sp, 142]
bl fiat_pasta_fq_cmovznz_u64
ldr x0, [sp, 32]
add x0, x0, 16
ldr x1, [x0]
ldr x2, [sp, 224]
add x0, sp, 264
mov x3, x2
mov x2, x1
ldrb w1, [sp, 142]
bl fiat_pasta_fq_cmovznz_u64
ldr x0, [sp, 32]
add x0, x0, 24
ldr x1, [x0]
ldr x2, [sp, 232]
add x0, sp, 272
mov x3, x2
mov x2, x1
ldrb w1, [sp, 142]
bl fiat_pasta_fq_cmovznz_u64
ldr x0, [sp, 32]
add x0, x0, 32
ldr x1, [x0]
ldr x2, [sp, 240]
add x0, sp, 280
mov x3, x2
mov x2, x1
ldrb w1, [sp, 142]
bl fiat_pasta_fq_cmovznz_u64
ldr x0, [sp, 24]
ldr x1, [x0]
ldr x0, [sp, 16]
ldr x2, [x0]
add x0, sp, 288
mov x3, x2
mov x2, x1
ldrb w1, [sp, 142]
bl fiat_pasta_fq_cmovznz_u64
ldr x0, [sp, 24]
add x0, x0, 8
ldr x1, [x0]
ldr x0, [sp, 16]
add x0, x0, 8
ldr x2, [x0]
add x0, sp, 296
mov x3, x2
mov x2, x1
ldrb w1, [sp, 142]
bl fiat_pasta_fq_cmovznz_u64
ldr x0, [sp, 24]
add x0, x0, 16
ldr x1, [x0]
ldr x0, [sp, 16]
add x0, x0, 16
ldr x2, [x0]
add x0, sp, 304
mov x3, x2
mov x2, x1
ldrb w1, [sp, 142]
bl fiat_pasta_fq_cmovznz_u64
ldr x0, [sp, 24]
add x0, x0, 24
ldr x1, [x0]
ldr x0, [sp, 16]
add x0, x0, 24
ldr x2, [x0]
add x0, sp, 312
mov x3, x2
mov x2, x1
ldrb w1, [sp, 142]
bl fiat_pasta_fq_cmovznz_u64
ldr x2, [sp, 288]
ldr x3, [sp, 288]
add x1, sp, 110
add x0, sp, 320
mov x4, x3
mov x3, x2
mov w2, 0
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 110]
ldr x2, [sp, 296]
ldr x3, [sp, 296]
add x1, sp, 111
add x0, sp, 328
mov x4, x3
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 111]
ldr x2, [sp, 304]
ldr x3, [sp, 304]
add x1, sp, 112
add x0, sp, 336
mov x4, x3
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 112]
ldr x2, [sp, 312]
ldr x3, [sp, 312]
add x1, sp, 113
add x0, sp, 344
mov x4, x3
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
ldr x2, [sp, 320]
add x1, sp, 114
add x0, sp, 352
mov x4, 1
movk x4, 0xeb21, lsl 32
movk x4, 0x8c46, lsl 48
mov x3, x2
mov w2, 0
bl fiat_pasta_fq_subborrowx_u64
ldrb w5, [sp, 114]
ldr x2, [sp, 328]
add x1, sp, 115
add x0, sp, 360
mov x4, 43229
movk x4, 0x994, lsl 16
movk x4, 0x98fc, lsl 32
movk x4, 0x2246, lsl 48
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_subborrowx_u64
ldrb w5, [sp, 115]
ldr x2, [sp, 336]
add x1, sp, 116
add x0, sp, 368
mov x4, 0
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_subborrowx_u64
ldrb w5, [sp, 116]
ldr x2, [sp, 344]
add x1, sp, 117
add x0, sp, 376
mov x4, 4611686018427387904
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_subborrowx_u64
ldrb w5, [sp, 117]
ldrb w0, [sp, 113]
and x2, x0, 255
add x1, sp, 118
add x0, sp, 384
mov x4, 0
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_subborrowx_u64
ldr x0, [sp, 24]
add x0, x0, 24
ldr x0, [x0]
str x0, [sp, 752]
ldr x0, [sp, 24]
add x0, x0, 16
ldr x0, [x0]
str x0, [sp, 760]
ldr x0, [sp, 24]
add x0, x0, 8
ldr x0, [x0]
str x0, [sp, 768]
ldr x0, [sp, 24]
ldr x0, [x0]
str x0, [sp, 776]
add x1, sp, 119
add x0, sp, 392
ldr x4, [sp, 776]
mov x3, 0
mov w2, 0
bl fiat_pasta_fq_subborrowx_u64
ldrb w2, [sp, 119]
add x1, sp, 120
add x0, sp, 400
ldr x4, [sp, 768]
mov x3, 0
bl fiat_pasta_fq_subborrowx_u64
ldrb w2, [sp, 120]
add x1, sp, 121
add x0, sp, 408
ldr x4, [sp, 760]
mov x3, 0
bl fiat_pasta_fq_subborrowx_u64
ldrb w2, [sp, 121]
add x1, sp, 122
add x0, sp, 416
ldr x4, [sp, 752]
mov x3, 0
bl fiat_pasta_fq_subborrowx_u64
ldrb w1, [sp, 122]
add x0, sp, 424
mov x3, -1
mov x2, 0
bl fiat_pasta_fq_cmovznz_u64
ldr x2, [sp, 392]
ldr x1, [sp, 424]
mov x0, 1
movk x0, 0xeb21, lsl 32
movk x0, 0x8c46, lsl 48
and x3, x1, x0
add x1, sp, 123
add x0, sp, 432
mov x4, x3
mov x3, x2
mov w2, 0
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 123]
ldr x2, [sp, 400]
ldr x1, [sp, 424]
mov x0, 43229
movk x0, 0x994, lsl 16
movk x0, 0x98fc, lsl 32
movk x0, 0x2246, lsl 48
and x3, x1, x0
add x1, sp, 124
add x0, sp, 440
mov x4, x3
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 124]
ldr x2, [sp, 408]
add x1, sp, 125
add x0, sp, 448
mov x4, 0
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 125]
ldr x2, [sp, 416]
ldr x0, [sp, 424]
and x3, x0, 4611686018427387904
add x1, sp, 126
add x0, sp, 456
mov x4, x3
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
ldr x0, [sp, 16]
ldr x1, [x0]
ldr x2, [sp, 432]
add x0, sp, 464
mov x3, x2
mov x2, x1
ldrb w1, [sp, 142]
bl fiat_pasta_fq_cmovznz_u64
ldr x0, [sp, 16]
add x0, x0, 8
ldr x1, [x0]
ldr x2, [sp, 440]
add x0, sp, 472
mov x3, x2
mov x2, x1
ldrb w1, [sp, 142]
bl fiat_pasta_fq_cmovznz_u64
ldr x0, [sp, 16]
add x0, x0, 16
ldr x1, [x0]
ldr x2, [sp, 448]
add x0, sp, 480
mov x3, x2
mov x2, x1
ldrb w1, [sp, 142]
bl fiat_pasta_fq_cmovznz_u64
ldr x0, [sp, 16]
add x0, x0, 24
ldr x1, [x0]
ldr x2, [sp, 456]
add x0, sp, 488
mov x3, x2
mov x2, x1
ldrb w1, [sp, 142]
bl fiat_pasta_fq_cmovznz_u64
ldr x0, [sp, 248]
and w0, w0, 255
and w0, w0, 1
strb w0, [sp, 143]
ldr x1, [sp, 168]
add x0, sp, 496
mov x3, x1
mov x2, 0
ldrb w1, [sp, 143]
bl fiat_pasta_fq_cmovznz_u64
ldr x1, [sp, 176]
add x0, sp, 504
mov x3, x1
mov x2, 0
ldrb w1, [sp, 143]
bl fiat_pasta_fq_cmovznz_u64
ldr x1, [sp, 184]
add x0, sp, 512
mov x3, x1
mov x2, 0
ldrb w1, [sp, 143]
bl fiat_pasta_fq_cmovznz_u64
ldr x1, [sp, 192]
add x0, sp, 520
mov x3, x1
mov x2, 0
ldrb w1, [sp, 143]
bl fiat_pasta_fq_cmovznz_u64
ldr x1, [sp, 200]
add x0, sp, 528
mov x3, x1
mov x2, 0
ldrb w1, [sp, 143]
bl fiat_pasta_fq_cmovznz_u64
ldr x2, [sp, 248]
ldr x3, [sp, 496]
add x1, sp, 127
add x0, sp, 536
mov x4, x3
mov x3, x2
mov w2, 0
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 127]
ldr x2, [sp, 256]
ldr x3, [sp, 504]
add x1, sp, 128
add x0, sp, 544
mov x4, x3
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 128]
ldr x2, [sp, 264]
ldr x3, [sp, 512]
add x1, sp, 129
add x0, sp, 552
mov x4, x3
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 129]
ldr x2, [sp, 272]
ldr x3, [sp, 520]
add x1, sp, 130
add x0, sp, 560
mov x4, x3
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 130]
ldr x2, [sp, 280]
ldr x3, [sp, 528]
add x1, sp, 131
add x0, sp, 568
mov x4, x3
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
ldr x1, [sp, 288]
add x0, sp, 576
mov x3, x1
mov x2, 0
ldrb w1, [sp, 143]
bl fiat_pasta_fq_cmovznz_u64
ldr x1, [sp, 296]
add x0, sp, 584
mov x3, x1
mov x2, 0
ldrb w1, [sp, 143]
bl fiat_pasta_fq_cmovznz_u64
ldr x1, [sp, 304]
add x0, sp, 592
mov x3, x1
mov x2, 0
ldrb w1, [sp, 143]
bl fiat_pasta_fq_cmovznz_u64
ldr x1, [sp, 312]
add x0, sp, 600
mov x3, x1
mov x2, 0
ldrb w1, [sp, 143]
bl fiat_pasta_fq_cmovznz_u64
ldr x2, [sp, 464]
ldr x3, [sp, 576]
add x1, sp, 132
add x0, sp, 608
mov x4, x3
mov x3, x2
mov w2, 0
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 132]
ldr x2, [sp, 472]
ldr x3, [sp, 584]
add x1, sp, 133
add x0, sp, 616
mov x4, x3
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 133]
ldr x2, [sp, 480]
ldr x3, [sp, 592]
add x1, sp, 134
add x0, sp, 624
mov x4, x3
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
ldrb w5, [sp, 134]
ldr x2, [sp, 488]
ldr x3, [sp, 600]
add x1, sp, 135
add x0, sp, 632
mov x4, x3
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_addcarryx_u64
ldr x2, [sp, 608]
add x1, sp, 136
add x0, sp, 640
mov x4, 1
movk x4, 0xeb21, lsl 32
movk x4, 0x8c46, lsl 48
mov x3, x2
mov w2, 0
bl fiat_pasta_fq_subborrowx_u64
ldrb w5, [sp, 136]
ldr x2, [sp, 616]
add x1, sp, 137
add x0, sp, 648
mov x4, 43229
movk x4, 0x994, lsl 16
movk x4, 0x98fc, lsl 32
movk x4, 0x2246, lsl 48
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_subborrowx_u64
ldrb w5, [sp, 137]
ldr x2, [sp, 624]
add x1, sp, 138
add x0, sp, 656
mov x4, 0
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_subborrowx_u64
ldrb w5, [sp, 138]
ldr x2, [sp, 632]
add x1, sp, 139
add x0, sp, 664
mov x4, 4611686018427387904
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_subborrowx_u64
ldrb w5, [sp, 139]
ldrb w0, [sp, 135]
and x2, x0, 255
add x1, sp, 140
add x0, sp, 672
mov x4, 0
mov x3, x2
mov w2, w5
bl fiat_pasta_fq_subborrowx_u64
ldr x2, [sp, 160]
add x1, sp, 141
add x0, sp, 680
mov x4, 1
mov x3, x2
mov w2, 0
bl fiat_pasta_fq_addcarryx_u64
ldr x0, [sp, 536]
lsr x1, x0, 1
ldr x0, [sp, 544]
lsl x0, x0, 63
orr x0, x1, x0
str x0, [sp, 784]
ldr x0, [sp, 544]
lsr x1, x0, 1
ldr x0, [sp, 552]
lsl x0, x0, 63
orr x0, x1, x0
str x0, [sp, 792]
ldr x0, [sp, 552]
lsr x1, x0, 1
ldr x0, [sp, 560]
lsl x0, x0, 63
orr x0, x1, x0
str x0, [sp, 800]
ldr x0, [sp, 560]
lsr x1, x0, 1
ldr x0, [sp, 568]
lsl x0, x0, 63
orr x0, x1, x0
str x0, [sp, 808]
ldr x0, [sp, 568]
and x1, x0, -9223372036854775808
ldr x0, [sp, 568]
lsr x0, x0, 1
orr x0, x1, x0
str x0, [sp, 816]
ldrb w4, [sp, 118]
ldr x1, [sp, 352]
ldr x2, [sp, 320]
add x0, sp, 688
mov x3, x2
mov x2, x1
mov w1, w4
bl fiat_pasta_fq_cmovznz_u64
ldrb w4, [sp, 118]
ldr x1, [sp, 360]
ldr x2, [sp, 328]
add x0, sp, 696
mov x3, x2
mov x2, x1
mov w1, w4
bl fiat_pasta_fq_cmovznz_u64
ldrb w4, [sp, 118]
ldr x1, [sp, 368]
ldr x2, [sp, 336]
add x0, sp, 704
mov x3, x2
mov x2, x1
mov w1, w4
bl fiat_pasta_fq_cmovznz_u64
ldrb w4, [sp, 118]
ldr x1, [sp, 376]
ldr x2, [sp, 344]
add x0, sp, 712
mov x3, x2
mov x2, x1
mov w1, w4
bl fiat_pasta_fq_cmovznz_u64
ldrb w4, [sp, 140]
ldr x1, [sp, 640]
ldr x2, [sp, 608]
add x0, sp, 720
mov x3, x2
mov x2, x1
mov w1, w4
bl fiat_pasta_fq_cmovznz_u64
ldrb w4, [sp, 140]
ldr x1, [sp, 648]
ldr x2, [sp, 616]
add x0, sp, 728
mov x3, x2
mov x2, x1
mov w1, w4
bl fiat_pasta_fq_cmovznz_u64
ldrb w4, [sp, 140]
ldr x1, [sp, 656]
ldr x2, [sp, 624]
add x0, sp, 736
mov x3, x2
mov x2, x1
mov w1, w4
bl fiat_pasta_fq_cmovznz_u64
ldrb w4, [sp, 140]
ldr x1, [sp, 664]
ldr x2, [sp, 632]
add x0, sp, 744
mov x3, x2
mov x2, x1
mov w1, w4
bl fiat_pasta_fq_cmovznz_u64
ldr x1, [sp, 680]
ldr x0, [sp, 88]
str x1, [x0]
ldr x1, [sp, 168]
ldr x0, [sp, 80]
str x1, [x0]
ldr x0, [sp, 80]
add x0, x0, 8
ldr x1, [sp, 176]
str x1, [x0]
ldr x0, [sp, 80]
add x0, x0, 16
ldr x1, [sp, 184]
str x1, [x0]
ldr x0, [sp, 80]
add x0, x0, 24
ldr x1, [sp, 192]
str x1, [x0]
ldr x0, [sp, 80]
add x0, x0, 32
ldr x1, [sp, 200]
str x1, [x0]
ldr x0, [sp, 72]
ldr x1, [sp, 784]
str x1, [x0]
ldr x0, [sp, 72]
add x0, x0, 8
ldr x1, [sp, 792]
str x1, [x0]
ldr x0, [sp, 72]
add x0, x0, 16
ldr x1, [sp, 800]
str x1, [x0]
ldr x0, [sp, 72]
add x0, x0, 24
ldr x1, [sp, 808]
str x1, [x0]
ldr x0, [sp, 72]
add x0, x0, 32
ldr x1, [sp, 816]
str x1, [x0]
ldr x1, [sp, 688]
ldr x0, [sp, 64]
str x1, [x0]
ldr x0, [sp, 64]
add x0, x0, 8
ldr x1, [sp, 696]
str x1, [x0]
ldr x0, [sp, 64]
add x0, x0, 16
ldr x1, [sp, 704]
str x1, [x0]
ldr x0, [sp, 64]
add x0, x0, 24
ldr x1, [sp, 712]
str x1, [x0]
ldr x1, [sp, 720]
ldr x0, [sp, 56]
str x1, [x0]
ldr x0, [sp, 56]
add x0, x0, 8
ldr x1, [sp, 728]
str x1, [x0]
ldr x0, [sp, 56]
add x0, x0, 16
ldr x1, [sp, 736]
str x1, [x0]
ldr x0, [sp, 56]
add x0, x0, 24
ldr x1, [sp, 744]
str x1, [x0]
nop
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [sp, 824]
ldr x1, [x0]
subs x2, x2, x1
mov x1, 0
beq .L28
bl __stack_chk_fail
.L28:
ldp x29, x30, [sp]
add sp, sp, 832
.cfi_restore 29
.cfi_restore 30
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE18:
.size fiat_pasta_fq_divstep, .-fiat_pasta_fq_divstep
.section .rodata
.align 3
.LC0:
.string "[ "
.align 3
.LC1:
.string "0x%lx, "
.align 3
.LC2:
.string "] "
.text
.align 2
.global fiat_pasta_fq_print
.type fiat_pasta_fq_print, %function
fiat_pasta_fq_print:
.LFB19:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl printf
str xzr, [sp, 40]
b .L30
.L31:
ldr x0, [sp, 40]
lsl x0, x0, 3
ldr x1, [sp, 24]
add x0, x1, x0
ldr x0, [x0]
mov x1, x0
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl printf
ldr x0, [sp, 40]
add x0, x0, 1
str x0, [sp, 40]
.L30:
ldr x0, [sp, 40]
cmp x0, 3
bls .L31
adrp x0, .LC2
add x0, x0, :lo12:.LC2
bl puts
nop
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE19:
.size fiat_pasta_fq_print, .-fiat_pasta_fq_print
.align 2
.global fiat_pasta_fq_equals
.type fiat_pasta_fq_equals, %function
fiat_pasta_fq_equals:
.LFB20:
.cfi_startproc
stp x29, x30, [sp, -80]!
.cfi_def_cfa_offset 80
.cfi_offset 29, -80
.cfi_offset 30, -72
mov x29, sp
str x0, [sp, 24]
str x1, [sp, 16]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 72]
mov x1, 0
add x0, sp, 40
ldr x2, [sp, 16]
ldr x1, [sp, 24]
bl fiat_pasta_fq_sub
add x1, sp, 40
add x0, sp, 32
bl fiat_pasta_fq_nonzero
ldr x0, [sp, 32]
cmp x0, 0
beq .L33
mov w0, 0
b .L35
.L33:
mov w0, 1
.L35:
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 72]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L36
bl __stack_chk_fail
.L36:
mov w0, w1
ldp x29, x30, [sp], 80
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE20:
.size fiat_pasta_fq_equals, .-fiat_pasta_fq_equals
.align 2
.global fiat_pasta_fq_copy
.type fiat_pasta_fq_copy, %function
fiat_pasta_fq_copy:
.LFB21:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str x0, [sp, 8]
str x1, [sp]
str xzr, [sp, 24]
b .L38
.L39:
ldr x0, [sp, 24]
lsl x0, x0, 3
ldr x1, [sp]
add x1, x1, x0
ldr x0, [sp, 24]
lsl x0, x0, 3
ldr x2, [sp, 8]
add x0, x2, x0
ldr x1, [x1]
str x1, [x0]
ldr x0, [sp, 24]
add x0, x0, 1
str x0, [sp, 24]
.L38:
ldr x0, [sp, 24]
cmp x0, 3
bls .L39
nop
nop
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE21:
.size fiat_pasta_fq_copy, .-fiat_pasta_fq_copy
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.local filetype
.comm filetype,4,4
.section .rodata
.align 3
.LC0:
.string "set"
.align 3
.LC1:
.string "clear"
.text
.align 2
.type decode_events, %function
decode_events:
.LFB6:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str w0, [sp, 12]
ldr w0, [sp, 12]
cmp w0, 0
beq .L2
adrp x0, .LC0
add x0, x0, :lo12:.LC0
b .L4
.L2:
adrp x0, .LC1
add x0, x0, :lo12:.LC1
.L4:
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE6:
.size decode_events, .-decode_events
.section .rodata
.align 3
.LC2:
.string "ok %-2d "
.align 3
.LC3:
.string "not ok %-2d"
.align 3
.LC4:
.string "Sock"
.align 3
.LC5:
.string "FIFO"
.align 3
.LC6:
.string "Pipe"
.align 3
.LC7:
.string " %s state %s: expected %s; got %s\n"
.text
.align 2
.type report, %function
report:
.LFB7:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
stp x19, x20, [sp, 16]
.cfi_offset 19, -48
.cfi_offset 20, -40
str w0, [sp, 60]
str x1, [sp, 48]
str w2, [sp, 56]
str w3, [sp, 44]
ldr w0, [sp, 56]
cmp w0, 0
cset w0, ne
and w1, w0, 255
ldr w0, [sp, 44]
cmp w0, 0
cset w0, eq
and w0, w0, 255
eor w0, w1, w0
and w0, w0, 255
cmp w0, 0
beq .L6
ldr w1, [sp, 60]
adrp x0, .LC2
add x0, x0, :lo12:.LC2
bl printf
b .L7
.L6:
ldr w1, [sp, 60]
adrp x0, .LC3
add x0, x0, :lo12:.LC3
bl printf
.L7:
adrp x0, filetype
add x0, x0, :lo12:filetype
ldr w0, [x0]
cmp w0, 0
beq .L8
adrp x0, filetype
add x0, x0, :lo12:filetype
ldr w0, [x0]
cmp w0, 1
bne .L9
adrp x0, .LC4
add x19, x0, :lo12:.LC4
b .L11
.L9:
adrp x0, .LC5
add x19, x0, :lo12:.LC5
b .L11
.L8:
adrp x0, .LC6
add x19, x0, :lo12:.LC6
.L11:
ldr w0, [sp, 56]
bl decode_events
mov x20, x0
ldr w0, [sp, 44]
bl decode_events
mov x4, x0
mov x3, x20
ldr x2, [sp, 48]
mov x1, x19
adrp x0, .LC7
add x0, x0, :lo12:.LC7
bl printf
adrp x0, :got:stdout
ldr x0, [x0, #:got_lo12:stdout]
ldr x0, [x0]
bl fflush
nop
ldp x19, x20, [sp, 16]
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_restore 19
.cfi_restore 20
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE7:
.size report, .-report
.local cpid
.comm cpid,4,4
.local ppid
.comm ppid,4,4
.local state
.comm state,4,4
.align 2
.type catch, %function
catch:
.LFB8:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str w0, [sp, 12]
adrp x0, state
add x0, x0, :lo12:state
ldr w0, [x0]
add w1, w0, 1
adrp x0, state
add x0, x0, :lo12:state
str w1, [x0]
nop
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE8:
.size catch, .-catch
.section .rodata
.align 3
.LC8:
.string "fifo.tmp"
.align 3
.LC9:
.string "open for read"
.align 3
.LC10:
.string "fd = %d too large for select()"
.align 3
.LC11:
.string "select"
.align 3
.LC12:
.string "0"
.align 3
.LC13:
.string "1"
.align 3
.LC14:
.string "2"
.align 3
.LC15:
.string "read"
.align 3
.LC16:
.string "2a"
.align 3
.LC17:
.string "3"
.align 3
.LC18:
.string "4"
.align 3
.LC19:
.string "5"
.align 3
.LC20:
.string "6"
.align 3
.LC21:
.string "6a"
.align 3
.LC22:
.string "6b"
.align 3
.LC23:
.string "6c"
.align 3
.LC24:
.string "6d"
.text
.align 2
.type child, %function
child:
.LFB9:
.cfi_startproc
sub sp, sp, #592
.cfi_def_cfa_offset 592
stp x29, x30, [sp]
.cfi_offset 29, -592
.cfi_offset 30, -584
mov x29, sp
str w0, [sp, 28]
str w1, [sp, 24]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 584]
mov x1, 0
adrp x0, filetype
add x0, x0, :lo12:filetype
ldr w0, [x0]
cmp w0, 2
bne .L14
mov w1, 2048
adrp x0, .LC8
add x0, x0, :lo12:.LC8
bl open
str w0, [sp, 28]
ldr w0, [sp, 28]
cmp w0, 0
bge .L14
adrp x0, .LC9
add x1, x0, :lo12:.LC9
mov w0, 1
bl err
.L14:
ldr w0, [sp, 28]
cmp w0, 1023
ble .L15
ldr w2, [sp, 28]
adrp x0, .LC10
add x1, x0, :lo12:.LC10
mov w0, 1
bl errx
.L15:
adrp x0, filetype
add x0, x0, :lo12:filetype
ldr w0, [x0]
cmp w0, 2
bne .L16
add x0, sp, 200
str x0, [sp, 88]
str wzr, [sp, 32]
b .L17
.L18:
ldr x0, [sp, 88]
ldr w1, [sp, 32]
str xzr, [x0, x1, lsl 3]
ldr w0, [sp, 32]
add w0, w0, 1
str w0, [sp, 32]
.L17:
ldr w0, [sp, 32]
cmp w0, 15
bls .L18
ldr w0, [sp, 28]
add w1, w0, 63
cmp w0, 0
csel w0, w1, w0, lt
asr w0, w0, 6
mov w3, w0
sxtw x0, w3
lsl x0, x0, 3
add x1, sp, 200
ldr x0, [x1, x0]
ldr w1, [sp, 28]
and w1, w1, 63
mov x2, 1
lsl x1, x2, x1
orr x2, x0, x1
sxtw x0, w3
lsl x0, x0, 3
add x1, sp, 200
str x2, [x1, x0]
str xzr, [sp, 184]
str xzr, [sp, 192]
ldr w0, [sp, 28]
add w0, w0, 1
add x2, sp, 184
add x1, sp, 200
mov x4, x2
mov x3, 0
mov x2, 0
bl select
cmp w0, 0
bge .L19
adrp x0, .LC11
add x1, x0, :lo12:.LC11
mov w0, 1
bl err
.L19:
ldr w4, [sp, 24]
add w0, w4, 1
str w0, [sp, 24]
ldr w0, [sp, 28]
add w1, w0, 63
cmp w0, 0
csel w0, w1, w0, lt
asr w0, w0, 6
sxtw x0, w0
lsl x0, x0, 3
add x1, sp, 200
ldr x0, [x1, x0]
ldr w1, [sp, 28]
and w1, w1, 63
mov x2, 1
lsl x1, x2, x1
and x0, x0, x1
cmp x0, 0
cset w0, ne
and w0, w0, 255
mov w3, w0
mov w2, 1
adrp x0, .LC12
add x1, x0, :lo12:.LC12
mov w0, w4
bl report
.L16:
adrp x0, ppid
add x0, x0, :lo12:ppid
ldr w0, [x0]
mov w1, 10
bl kill
mov w0, 1
bl usleep
nop
.L20:
adrp x0, state
add x0, x0, :lo12:state
ldr w0, [x0]
cmp w0, 1
bne .L20
adrp x0, filetype
add x0, x0, :lo12:filetype
ldr w0, [x0]
cmp w0, 2
beq .L21
adrp x0, state
add x0, x0, :lo12:state
mov w1, 4
str w1, [x0]
b .L22
.L21:
add x0, sp, 200
str x0, [sp, 96]
str wzr, [sp, 36]
b .L23
.L24:
ldr x0, [sp, 96]
ldr w1, [sp, 36]
str xzr, [x0, x1, lsl 3]
ldr w0, [sp, 36]
add w0, w0, 1
str w0, [sp, 36]
.L23:
ldr w0, [sp, 36]
cmp w0, 15
bls .L24
ldr w0, [sp, 28]
add w1, w0, 63
cmp w0, 0
csel w0, w1, w0, lt
asr w0, w0, 6
mov w3, w0
sxtw x0, w3
lsl x0, x0, 3
add x1, sp, 200
ldr x0, [x1, x0]
ldr w1, [sp, 28]
and w1, w1, 63
mov x2, 1
lsl x1, x2, x1
orr x2, x0, x1
sxtw x0, w3
lsl x0, x0, 3
add x1, sp, 200
str x2, [x1, x0]
str xzr, [sp, 184]
str xzr, [sp, 192]
ldr w0, [sp, 28]
add w0, w0, 1
add x2, sp, 184
add x1, sp, 200
mov x4, x2
mov x3, 0
mov x2, 0
bl select
cmp w0, 0
bge .L25
adrp x0, .LC11
add x1, x0, :lo12:.LC11
mov w0, 1
bl err
.L25:
ldr w4, [sp, 24]
add w0, w4, 1
str w0, [sp, 24]
ldr w0, [sp, 28]
add w1, w0, 63
cmp w0, 0
csel w0, w1, w0, lt
asr w0, w0, 6
sxtw x0, w0
lsl x0, x0, 3
add x1, sp, 200
ldr x0, [x1, x0]
ldr w1, [sp, 28]
and w1, w1, 63
mov x2, 1
lsl x1, x2, x1
and x0, x0, x1
cmp x0, 0
cset w0, ne
and w0, w0, 255
mov w3, w0
mov w2, 0
adrp x0, .LC13
add x1, x0, :lo12:.LC13
mov w0, w4
bl report
adrp x0, ppid
add x0, x0, :lo12:ppid
ldr w0, [x0]
mov w1, 10
bl kill
mov w0, 1
bl usleep
nop
.L26:
adrp x0, state
add x0, x0, :lo12:state
ldr w0, [x0]
cmp w0, 2
bne .L26
add x0, sp, 200
str x0, [sp, 104]
str wzr, [sp, 40]
b .L27
.L28:
ldr x0, [sp, 104]
ldr w1, [sp, 40]
str xzr, [x0, x1, lsl 3]
ldr w0, [sp, 40]
add w0, w0, 1
str w0, [sp, 40]
.L27:
ldr w0, [sp, 40]
cmp w0, 15
bls .L28
ldr w0, [sp, 28]
add w1, w0, 63
cmp w0, 0
csel w0, w1, w0, lt
asr w0, w0, 6
mov w3, w0
sxtw x0, w3
lsl x0, x0, 3
add x1, sp, 200
ldr x0, [x1, x0]
ldr w1, [sp, 28]
and w1, w1, 63
mov x2, 1
lsl x1, x2, x1
orr x2, x0, x1
sxtw x0, w3
lsl x0, x0, 3
add x1, sp, 200
str x2, [x1, x0]
str xzr, [sp, 184]
str xzr, [sp, 192]
ldr w0, [sp, 28]
add w0, w0, 1
add x2, sp, 184
add x1, sp, 200
mov x4, x2
mov x3, 0
mov x2, 0
bl select
cmp w0, 0
bge .L29
adrp x0, .LC11
add x1, x0, :lo12:.LC11
mov w0, 1
bl err
.L29:
ldr w4, [sp, 24]
add w0, w4, 1
str w0, [sp, 24]
ldr w0, [sp, 28]
add w1, w0, 63
cmp w0, 0
csel w0, w1, w0, lt
asr w0, w0, 6
sxtw x0, w0
lsl x0, x0, 3
add x1, sp, 200
ldr x0, [x1, x0]
ldr w1, [sp, 28]
and w1, w1, 63
mov x2, 1
lsl x1, x2, x1
and x0, x0, x1
cmp x0, 0
cset w0, ne
and w0, w0, 255
mov w3, w0
mov w2, 1
adrp x0, .LC14
add x1, x0, :lo12:.LC14
mov w0, w4
bl report
add x0, sp, 328
mov x2, 256
mov x1, x0
ldr w0, [sp, 28]
bl read
cmp x0, 1
beq .L30
adrp x0, .LC15
add x1, x0, :lo12:.LC15
mov w0, 1
bl err
.L30:
add x0, sp, 200
str x0, [sp, 112]
str wzr, [sp, 44]
b .L31
.L32:
ldr x0, [sp, 112]
ldr w1, [sp, 44]
str xzr, [x0, x1, lsl 3]
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L31:
ldr w0, [sp, 44]
cmp w0, 15
bls .L32
ldr w0, [sp, 28]
add w1, w0, 63
cmp w0, 0
csel w0, w1, w0, lt
asr w0, w0, 6
mov w3, w0
sxtw x0, w3
lsl x0, x0, 3
add x1, sp, 200
ldr x0, [x1, x0]
ldr w1, [sp, 28]
and w1, w1, 63
mov x2, 1
lsl x1, x2, x1
orr x2, x0, x1
sxtw x0, w3
lsl x0, x0, 3
add x1, sp, 200
str x2, [x1, x0]
str xzr, [sp, 184]
str xzr, [sp, 192]
ldr w0, [sp, 28]
add w0, w0, 1
add x2, sp, 184
add x1, sp, 200
mov x4, x2
mov x3, 0
mov x2, 0
bl select
cmp w0, 0
bge .L33
adrp x0, .LC11
add x1, x0, :lo12:.LC11
mov w0, 1
bl err
.L33:
ldr w4, [sp, 24]
add w0, w4, 1
str w0, [sp, 24]
ldr w0, [sp, 28]
add w1, w0, 63
cmp w0, 0
csel w0, w1, w0, lt
asr w0, w0, 6
sxtw x0, w0
lsl x0, x0, 3
add x1, sp, 200
ldr x0, [x1, x0]
ldr w1, [sp, 28]
and w1, w1, 63
mov x2, 1
lsl x1, x2, x1
and x0, x0, x1
cmp x0, 0
cset w0, ne
and w0, w0, 255
mov w3, w0
mov w2, 0
adrp x0, .LC16
add x1, x0, :lo12:.LC16
mov w0, w4
bl report
adrp x0, ppid
add x0, x0, :lo12:ppid
ldr w0, [x0]
mov w1, 10
bl kill
mov w0, 1
bl usleep
nop
.L34:
adrp x0, state
add x0, x0, :lo12:state
ldr w0, [x0]
cmp w0, 3
bne .L34
add x0, sp, 200
str x0, [sp, 120]
str wzr, [sp, 48]
b .L35
.L36:
ldr x0, [sp, 120]
ldr w1, [sp, 48]
str xzr, [x0, x1, lsl 3]
ldr w0, [sp, 48]
add w0, w0, 1
str w0, [sp, 48]
.L35:
ldr w0, [sp, 48]
cmp w0, 15
bls .L36
ldr w0, [sp, 28]
add w1, w0, 63
cmp w0, 0
csel w0, w1, w0, lt
asr w0, w0, 6
mov w3, w0
sxtw x0, w3
lsl x0, x0, 3
add x1, sp, 200
ldr x0, [x1, x0]
ldr w1, [sp, 28]
and w1, w1, 63
mov x2, 1
lsl x1, x2, x1
orr x2, x0, x1
sxtw x0, w3
lsl x0, x0, 3
add x1, sp, 200
str x2, [x1, x0]
str xzr, [sp, 184]
str xzr, [sp, 192]
ldr w0, [sp, 28]
add w0, w0, 1
add x2, sp, 184
add x1, sp, 200
mov x4, x2
mov x3, 0
mov x2, 0
bl select
cmp w0, 0
bge .L37
adrp x0, .LC11
add x1, x0, :lo12:.LC11
mov w0, 1
bl err
.L37:
ldr w4, [sp, 24]
add w0, w4, 1
str w0, [sp, 24]
ldr w0, [sp, 28]
add w1, w0, 63
cmp w0, 0
csel w0, w1, w0, lt
asr w0, w0, 6
sxtw x0, w0
lsl x0, x0, 3
add x1, sp, 200
ldr x0, [x1, x0]
ldr w1, [sp, 28]
and w1, w1, 63
mov x2, 1
lsl x1, x2, x1
and x0, x0, x1
cmp x0, 0
cset w0, ne
and w0, w0, 255
mov w3, w0
mov w2, 1
adrp x0, .LC17
add x1, x0, :lo12:.LC17
mov w0, w4
bl report
adrp x0, ppid
add x0, x0, :lo12:ppid
ldr w0, [x0]
mov w1, 10
bl kill
mov w0, 1
bl usleep
nop
.L38:
adrp x0, state
add x0, x0, :lo12:state
ldr w0, [x0]
cmp w0, 4
bne .L38
nop
.L22:
add x0, sp, 200
str x0, [sp, 128]
str wzr, [sp, 52]
b .L39
.L40:
ldr x0, [sp, 128]
ldr w1, [sp, 52]
str xzr, [x0, x1, lsl 3]
ldr w0, [sp, 52]
add w0, w0, 1
str w0, [sp, 52]
.L39:
ldr w0, [sp, 52]
cmp w0, 15
bls .L40
ldr w0, [sp, 28]
add w1, w0, 63
cmp w0, 0
csel w0, w1, w0, lt
asr w0, w0, 6
mov w3, w0
sxtw x0, w3
lsl x0, x0, 3
add x1, sp, 200
ldr x0, [x1, x0]
ldr w1, [sp, 28]
and w1, w1, 63
mov x2, 1
lsl x1, x2, x1
orr x2, x0, x1
sxtw x0, w3
lsl x0, x0, 3
add x1, sp, 200
str x2, [x1, x0]
str xzr, [sp, 184]
str xzr, [sp, 192]
ldr w0, [sp, 28]
add w0, w0, 1
add x2, sp, 184
add x1, sp, 200
mov x4, x2
mov x3, 0
mov x2, 0
bl select
cmp w0, 0
bge .L41
adrp x0, .LC11
add x1, x0, :lo12:.LC11
mov w0, 1
bl err
.L41:
ldr w4, [sp, 24]
add w0, w4, 1
str w0, [sp, 24]
ldr w0, [sp, 28]
add w1, w0, 63
cmp w0, 0
csel w0, w1, w0, lt
asr w0, w0, 6
sxtw x0, w0
lsl x0, x0, 3
add x1, sp, 200
ldr x0, [x1, x0]
ldr w1, [sp, 28]
and w1, w1, 63
mov x2, 1
lsl x1, x2, x1
and x0, x0, x1
cmp x0, 0
cset w0, ne
and w0, w0, 255
mov w3, w0
mov w2, 0
adrp x0, .LC18
add x1, x0, :lo12:.LC18
mov w0, w4
bl report
adrp x0, ppid
add x0, x0, :lo12:ppid
ldr w0, [x0]
mov w1, 10
bl kill
mov w0, 1
bl usleep
nop
.L42:
adrp x0, state
add x0, x0, :lo12:state
ldr w0, [x0]
cmp w0, 5
bne .L42
add x0, sp, 200
str x0, [sp, 136]
str wzr, [sp, 56]
b .L43
.L44:
ldr x0, [sp, 136]
ldr w1, [sp, 56]
str xzr, [x0, x1, lsl 3]
ldr w0, [sp, 56]
add w0, w0, 1
str w0, [sp, 56]
.L43:
ldr w0, [sp, 56]
cmp w0, 15
bls .L44
ldr w0, [sp, 28]
add w1, w0, 63
cmp w0, 0
csel w0, w1, w0, lt
asr w0, w0, 6
mov w3, w0
sxtw x0, w3
lsl x0, x0, 3
add x1, sp, 200
ldr x0, [x1, x0]
ldr w1, [sp, 28]
and w1, w1, 63
mov x2, 1
lsl x1, x2, x1
orr x2, x0, x1
sxtw x0, w3
lsl x0, x0, 3
add x1, sp, 200
str x2, [x1, x0]
str xzr, [sp, 184]
str xzr, [sp, 192]
ldr w0, [sp, 28]
add w0, w0, 1
add x2, sp, 184
add x1, sp, 200
mov x4, x2
mov x3, 0
mov x2, 0
bl select
cmp w0, 0
bge .L45
adrp x0, .LC11
add x1, x0, :lo12:.LC11
mov w0, 1
bl err
.L45:
ldr w4, [sp, 24]
add w0, w4, 1
str w0, [sp, 24]
ldr w0, [sp, 28]
add w1, w0, 63
cmp w0, 0
csel w0, w1, w0, lt
asr w0, w0, 6
sxtw x0, w0
lsl x0, x0, 3
add x1, sp, 200
ldr x0, [x1, x0]
ldr w1, [sp, 28]
and w1, w1, 63
mov x2, 1
lsl x1, x2, x1
and x0, x0, x1
cmp x0, 0
cset w0, ne
and w0, w0, 255
mov w3, w0
mov w2, 1
adrp x0, .LC19
add x1, x0, :lo12:.LC19
mov w0, w4
bl report
adrp x0, ppid
add x0, x0, :lo12:ppid
ldr w0, [x0]
mov w1, 10
bl kill
mov w0, 1
bl usleep
nop
.L46:
adrp x0, state
add x0, x0, :lo12:state
ldr w0, [x0]
cmp w0, 6
bne .L46
add x0, sp, 200
str x0, [sp, 144]
str wzr, [sp, 60]
b .L47
.L48:
ldr x0, [sp, 144]
ldr w1, [sp, 60]
str xzr, [x0, x1, lsl 3]
ldr w0, [sp, 60]
add w0, w0, 1
str w0, [sp, 60]
.L47:
ldr w0, [sp, 60]
cmp w0, 15
bls .L48
ldr w0, [sp, 28]
add w1, w0, 63
cmp w0, 0
csel w0, w1, w0, lt
asr w0, w0, 6
mov w3, w0
sxtw x0, w3
lsl x0, x0, 3
add x1, sp, 200
ldr x0, [x1, x0]
ldr w1, [sp, 28]
and w1, w1, 63
mov x2, 1
lsl x1, x2, x1
orr x2, x0, x1
sxtw x0, w3
lsl x0, x0, 3
add x1, sp, 200
str x2, [x1, x0]
str xzr, [sp, 184]
str xzr, [sp, 192]
ldr w0, [sp, 28]
add w0, w0, 1
add x2, sp, 184
add x1, sp, 200
mov x4, x2
mov x3, 0
mov x2, 0
bl select
cmp w0, 0
bge .L49
adrp x0, .LC11
add x1, x0, :lo12:.LC11
mov w0, 1
bl err
.L49:
ldr w4, [sp, 24]
add w0, w4, 1
str w0, [sp, 24]
ldr w0, [sp, 28]
add w1, w0, 63
cmp w0, 0
csel w0, w1, w0, lt
asr w0, w0, 6
sxtw x0, w0
lsl x0, x0, 3
add x1, sp, 200
ldr x0, [x1, x0]
ldr w1, [sp, 28]
and w1, w1, 63
mov x2, 1
lsl x1, x2, x1
and x0, x0, x1
cmp x0, 0
cset w0, ne
and w0, w0, 255
mov w3, w0
mov w2, 1
adrp x0, .LC20
add x1, x0, :lo12:.LC20
mov w0, w4
bl report
add x0, sp, 328
mov x2, 256
mov x1, x0
ldr w0, [sp, 28]
bl read
cmp x0, 1
beq .L50
adrp x0, .LC15
add x1, x0, :lo12:.LC15
mov w0, 1
bl err
.L50:
add x0, sp, 200
str x0, [sp, 152]
str wzr, [sp, 64]
b .L51
.L52:
ldr x0, [sp, 152]
ldr w1, [sp, 64]
str xzr, [x0, x1, lsl 3]
ldr w0, [sp, 64]
add w0, w0, 1
str w0, [sp, 64]
.L51:
ldr w0, [sp, 64]
cmp w0, 15
bls .L52
ldr w0, [sp, 28]
add w1, w0, 63
cmp w0, 0
csel w0, w1, w0, lt
asr w0, w0, 6
mov w3, w0
sxtw x0, w3
lsl x0, x0, 3
add x1, sp, 200
ldr x0, [x1, x0]
ldr w1, [sp, 28]
and w1, w1, 63
mov x2, 1
lsl x1, x2, x1
orr x2, x0, x1
sxtw x0, w3
lsl x0, x0, 3
add x1, sp, 200
str x2, [x1, x0]
str xzr, [sp, 184]
str xzr, [sp, 192]
ldr w0, [sp, 28]
add w0, w0, 1
add x2, sp, 184
add x1, sp, 200
mov x4, x2
mov x3, 0
mov x2, 0
bl select
cmp w0, 0
bge .L53
adrp x0, .LC11
add x1, x0, :lo12:.LC11
mov w0, 1
bl err
.L53:
ldr w4, [sp, 24]
add w0, w4, 1
str w0, [sp, 24]
ldr w0, [sp, 28]
add w1, w0, 63
cmp w0, 0
csel w0, w1, w0, lt
asr w0, w0, 6
sxtw x0, w0
lsl x0, x0, 3
add x1, sp, 200
ldr x0, [x1, x0]
ldr w1, [sp, 28]
and w1, w1, 63
mov x2, 1
lsl x1, x2, x1
and x0, x0, x1
cmp x0, 0
cset w0, ne
and w0, w0, 255
mov w3, w0
mov w2, 1
adrp x0, .LC21
add x1, x0, :lo12:.LC21
mov w0, w4
bl report
adrp x0, filetype
add x0, x0, :lo12:filetype
ldr w0, [x0]
cmp w0, 2
bne .L54
mov w1, 2048
adrp x0, .LC8
add x0, x0, :lo12:.LC8
bl open
str w0, [sp, 80]
ldr w0, [sp, 80]
cmp w0, 0
bge .L55
adrp x0, .LC9
add x1, x0, :lo12:.LC9
mov w0, 1
bl err
.L55:
ldr w0, [sp, 28]
str w0, [sp, 84]
ldr w0, [sp, 80]
str w0, [sp, 28]
add x0, sp, 200
str x0, [sp, 160]
str wzr, [sp, 68]
b .L56
.L57:
ldr x0, [sp, 160]
ldr w1, [sp, 68]
str xzr, [x0, x1, lsl 3]
ldr w0, [sp, 68]
add w0, w0, 1
str w0, [sp, 68]
.L56:
ldr w0, [sp, 68]
cmp w0, 15
bls .L57
ldr w0, [sp, 28]
add w1, w0, 63
cmp w0, 0
csel w0, w1, w0, lt
asr w0, w0, 6
mov w3, w0
sxtw x0, w3
lsl x0, x0, 3
add x1, sp, 200
ldr x0, [x1, x0]
ldr w1, [sp, 28]
and w1, w1, 63
mov x2, 1
lsl x1, x2, x1
orr x2, x0, x1
sxtw x0, w3
lsl x0, x0, 3
add x1, sp, 200
str x2, [x1, x0]
str xzr, [sp, 184]
str xzr, [sp, 192]
ldr w0, [sp, 28]
add w0, w0, 1
add x2, sp, 184
add x1, sp, 200
mov x4, x2
mov x3, 0
mov x2, 0
bl select
cmp w0, 0
bge .L58
adrp x0, .LC11
add x1, x0, :lo12:.LC11
mov w0, 1
bl err
.L58:
ldr w4, [sp, 24]
add w0, w4, 1
str w0, [sp, 24]
ldr w0, [sp, 28]
add w1, w0, 63
cmp w0, 0
csel w0, w1, w0, lt
asr w0, w0, 6
sxtw x0, w0
lsl x0, x0, 3
add x1, sp, 200
ldr x0, [x1, x0]
ldr w1, [sp, 28]
and w1, w1, 63
mov x2, 1
lsl x1, x2, x1
and x0, x0, x1
cmp x0, 0
cset w0, ne
and w0, w0, 255
mov w3, w0
mov w2, 1
adrp x0, .LC22
add x1, x0, :lo12:.LC22
mov w0, w4
bl report
ldr w0, [sp, 84]
str w0, [sp, 28]
add x0, sp, 200
str x0, [sp, 168]
str wzr, [sp, 72]
b .L59
.L60:
ldr x0, [sp, 168]
ldr w1, [sp, 72]
str xzr, [x0, x1, lsl 3]
ldr w0, [sp, 72]
add w0, w0, 1
str w0, [sp, 72]
.L59:
ldr w0, [sp, 72]
cmp w0, 15
bls .L60
ldr w0, [sp, 28]
add w1, w0, 63
cmp w0, 0
csel w0, w1, w0, lt
asr w0, w0, 6
mov w3, w0
sxtw x0, w3
lsl x0, x0, 3
add x1, sp, 200
ldr x0, [x1, x0]
ldr w1, [sp, 28]
and w1, w1, 63
mov x2, 1
lsl x1, x2, x1
orr x2, x0, x1
sxtw x0, w3
lsl x0, x0, 3
add x1, sp, 200
str x2, [x1, x0]
str xzr, [sp, 184]
str xzr, [sp, 192]
ldr w0, [sp, 28]
add w0, w0, 1
add x2, sp, 184
add x1, sp, 200
mov x4, x2
mov x3, 0
mov x2, 0
bl select
cmp w0, 0
bge .L61
adrp x0, .LC11
add x1, x0, :lo12:.LC11
mov w0, 1
bl err
.L61:
ldr w4, [sp, 24]
add w0, w4, 1
str w0, [sp, 24]
ldr w0, [sp, 28]
add w1, w0, 63
cmp w0, 0
csel w0, w1, w0, lt
asr w0, w0, 6
sxtw x0, w0
lsl x0, x0, 3
add x1, sp, 200
ldr x0, [x1, x0]
ldr w1, [sp, 28]
and w1, w1, 63
mov x2, 1
lsl x1, x2, x1
and x0, x0, x1
cmp x0, 0
cset w0, ne
and w0, w0, 255
mov w3, w0
mov w2, 1
adrp x0, .LC23
add x1, x0, :lo12:.LC23
mov w0, w4
bl report
ldr w0, [sp, 80]
bl close
add x0, sp, 200
str x0, [sp, 176]
str wzr, [sp, 76]
b .L62
.L63:
ldr x0, [sp, 176]
ldr w1, [sp, 76]
str xzr, [x0, x1, lsl 3]
ldr w0, [sp, 76]
add w0, w0, 1
str w0, [sp, 76]
.L62:
ldr w0, [sp, 76]
cmp w0, 15
bls .L63
ldr w0, [sp, 28]
add w1, w0, 63
cmp w0, 0
csel w0, w1, w0, lt
asr w0, w0, 6
mov w3, w0
sxtw x0, w3
lsl x0, x0, 3
add x1, sp, 200
ldr x0, [x1, x0]
ldr w1, [sp, 28]
and w1, w1, 63
mov x2, 1
lsl x1, x2, x1
orr x2, x0, x1
sxtw x0, w3
lsl x0, x0, 3
add x1, sp, 200
str x2, [x1, x0]
str xzr, [sp, 184]
str xzr, [sp, 192]
ldr w0, [sp, 28]
add w0, w0, 1
add x2, sp, 184
add x1, sp, 200
mov x4, x2
mov x3, 0
mov x2, 0
bl select
cmp w0, 0
bge .L64
adrp x0, .LC11
add x1, x0, :lo12:.LC11
mov w0, 1
bl err
.L64:
ldr w4, [sp, 24]
add w0, w4, 1
str w0, [sp, 24]
ldr w0, [sp, 28]
add w1, w0, 63
cmp w0, 0
csel w0, w1, w0, lt
asr w0, w0, 6
sxtw x0, w0
lsl x0, x0, 3
add x1, sp, 200
ldr x0, [x1, x0]
ldr w1, [sp, 28]
and w1, w1, 63
mov x2, 1
lsl x1, x2, x1
and x0, x0, x1
cmp x0, 0
cset w0, ne
and w0, w0, 255
mov w3, w0
mov w2, 1
adrp x0, .LC24
add x1, x0, :lo12:.LC24
mov w0, w4
bl report
.L54:
ldr w0, [sp, 28]
bl close
adrp x0, ppid
add x0, x0, :lo12:ppid
ldr w0, [x0]
mov w1, 10
bl kill
mov w0, 0
bl exit
.cfi_endproc
.LFE9:
.size child, .-child
.section .rodata
.align 3
.LC25:
.string "open for write"
.align 3
.LC26:
.string ""
.align 3
.LC27:
.string "write"
.align 3
.LC28:
.string "close for write"
.text
.align 2
.type parent, %function
parent:
.LFB10:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str w0, [sp, 28]
mov w0, 1
bl usleep
nop
.L67:
adrp x0, state
add x0, x0, :lo12:state
ldr w0, [x0]
cmp w0, 1
bne .L67
adrp x0, filetype
add x0, x0, :lo12:filetype
ldr w0, [x0]
cmp w0, 2
bne .L68
mov w1, 2049
adrp x0, .LC8
add x0, x0, :lo12:.LC8
bl open
str w0, [sp, 28]
ldr w0, [sp, 28]
cmp w0, 0
bge .L68
adrp x0, .LC25
add x1, x0, :lo12:.LC25
mov w0, 1
bl err
.L68:
adrp x0, cpid
add x0, x0, :lo12:cpid
ldr w0, [x0]
mov w1, 10
bl kill
mov w0, 1
bl usleep
nop
.L69:
adrp x0, state
add x0, x0, :lo12:state
ldr w0, [x0]
cmp w0, 2
bne .L69
mov x2, 1
adrp x0, .LC26
add x1, x0, :lo12:.LC26
ldr w0, [sp, 28]
bl write
cmp x0, 1
beq .L70
adrp x0, .LC27
add x1, x0, :lo12:.LC27
mov w0, 1
bl err
.L70:
adrp x0, cpid
add x0, x0, :lo12:cpid
ldr w0, [x0]
mov w1, 10
bl kill
mov w0, 1
bl usleep
nop
.L71:
adrp x0, state
add x0, x0, :lo12:state
ldr w0, [x0]
cmp w0, 3
bne .L71
ldr w0, [sp, 28]
bl close
cmp w0, 0
beq .L72
adrp x0, .LC28
add x1, x0, :lo12:.LC28
mov w0, 1
bl err
.L72:
adrp x0, cpid
add x0, x0, :lo12:cpid
ldr w0, [x0]
mov w1, 10
bl kill
mov w0, 1
bl usleep
nop
.L73:
adrp x0, state
add x0, x0, :lo12:state
ldr w0, [x0]
cmp w0, 4
bne .L73
adrp x0, filetype
add x0, x0, :lo12:filetype
ldr w0, [x0]
cmp w0, 2
bne .L82
mov w1, 2049
adrp x0, .LC8
add x0, x0, :lo12:.LC8
bl open
str w0, [sp, 28]
ldr w0, [sp, 28]
cmp w0, 0
bge .L76
adrp x0, .LC25
add x1, x0, :lo12:.LC25
mov w0, 1
bl err
.L76:
adrp x0, cpid
add x0, x0, :lo12:cpid
ldr w0, [x0]
mov w1, 10
bl kill
mov w0, 1
bl usleep
nop
.L77:
adrp x0, state
add x0, x0, :lo12:state
ldr w0, [x0]
cmp w0, 5
bne .L77
mov x2, 1
adrp x0, .LC26
add x1, x0, :lo12:.LC26
ldr w0, [sp, 28]
bl write
cmp x0, 1
beq .L78
adrp x0, .LC27
add x1, x0, :lo12:.LC27
mov w0, 1
bl err
.L78:
adrp x0, cpid
add x0, x0, :lo12:cpid
ldr w0, [x0]
mov w1, 10
bl kill
mov w0, 1
bl usleep
nop
.L79:
adrp x0, state
add x0, x0, :lo12:state
ldr w0, [x0]
cmp w0, 6
bne .L79
ldr w0, [sp, 28]
bl close
cmp w0, 0
beq .L80
adrp x0, .LC28
add x1, x0, :lo12:.LC28
mov w0, 1
bl err
.L80:
adrp x0, cpid
add x0, x0, :lo12:cpid
ldr w0, [x0]
mov w1, 10
bl kill
mov w0, 1
bl usleep
nop
.L81:
adrp x0, state
add x0, x0, :lo12:state
ldr w0, [x0]
cmp w0, 7
bne .L81
b .L66
.L82:
nop
.L66:
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE10:
.size parent, .-parent
.section .rodata
.align 3
.LC29:
.string "1..20"
.align 3
.LC30:
.string "mkfifo"
.align 3
.LC31:
.string "socketpair"
.align 3
.LC32:
.string "pipe"
.align 3
.LC33:
.string "fork"
.text
.align 2
.global main
.type main, %function
main:
.LFB11:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 40]
mov x1, 0
mov w0, 1
str w0, [sp, 28]
adrp x0, .LC29
add x0, x0, :lo12:.LC29
bl puts
adrp x0, :got:stdout
ldr x0, [x0, #:got_lo12:stdout]
ldr x0, [x0]
bl fflush
adrp x0, catch
add x1, x0, :lo12:catch
mov w0, 10
bl signal
bl getpid
mov w1, w0
adrp x0, ppid
add x0, x0, :lo12:ppid
str w1, [x0]
adrp x0, filetype
add x0, x0, :lo12:filetype
str wzr, [x0]
b .L84
.L98:
adrp x0, filetype
add x0, x0, :lo12:filetype
ldr w0, [x0]
cmp w0, 2
beq .L85
cmp w0, 2
bgt .L86
cmp w0, 0
beq .L87
cmp w0, 1
beq .L88
b .L86
.L85:
mov w1, 438
adrp x0, .LC8
add x0, x0, :lo12:.LC8
bl mkfifo
cmp w0, 0
beq .L89
adrp x0, .LC30
add x1, x0, :lo12:.LC30
mov w0, 1
bl err
.L89:
mov w0, -1
str w0, [sp, 32]
mov w0, -1
str w0, [sp, 36]
b .L86
.L88:
add x0, sp, 32
mov x3, x0
mov w2, 0
mov w1, 1
mov w0, 1
bl socketpair
cmp w0, 0
beq .L102
adrp x0, .LC31
add x1, x0, :lo12:.LC31
mov w0, 1
bl err
.L87:
add x0, sp, 32
bl pipe
cmp w0, 0
beq .L103
adrp x0, .LC32
add x1, x0, :lo12:.LC32
mov w0, 1
bl err
.L102:
nop
b .L86
.L103:
nop
.L86:
adrp x0, state
add x0, x0, :lo12:state
str wzr, [x0]
bl fork
mov w1, w0
adrp x0, cpid
add x0, x0, :lo12:cpid
str w1, [x0]
adrp x0, cpid
add x0, x0, :lo12:cpid
ldr w0, [x0]
cmn w0, #1
beq .L92
cmp w0, 0
beq .L93
b .L101
.L92:
adrp x0, .LC33
add x1, x0, :lo12:.LC33
mov w0, 1
bl err
.L93:
ldr w0, [sp, 36]
bl close
ldr w0, [sp, 32]
ldr w1, [sp, 28]
bl child
b .L95
.L101:
ldr w0, [sp, 32]
bl close
ldr w0, [sp, 36]
bl parent
nop
.L95:
adrp x0, filetype
add x0, x0, :lo12:filetype
ldr w0, [x0]
cmp w0, 2
bne .L96
mov w0, 12
b .L97
.L96:
mov w0, 4
.L97:
ldr w1, [sp, 28]
add w0, w1, w0
str w0, [sp, 28]
adrp x0, filetype
add x0, x0, :lo12:filetype
ldr w0, [x0]
add w1, w0, 1
adrp x0, filetype
add x0, x0, :lo12:filetype
str w1, [x0]
.L84:
adrp x0, filetype
add x0, x0, :lo12:filetype
ldr w0, [x0]
cmp w0, 2
ble .L98
adrp x0, .LC8
add x0, x0, :lo12:.LC8
bl unlink
mov w0, 0
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 40]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L100
bl __stack_chk_fail
.L100:
mov w0, w1
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE11:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC0:
.string "/dev/chardev"
.align 3
.LC1:
.string "Usage: ioctl <newmaxmegabytes (1-16)>\n"
.align 3
.LC2:
.string "E.g.: ioctl 8\n"
.align 3
.LC3:
.string "Invalid value for <newmaxmegabytes>(%s)\n"
.align 3
.LC4:
.string "New Maximum Bytes: %d\n"
.align 3
.LC5:
.string "Could not open file %s, exiting!\n"
.align 3
.LC6:
.string "The result of the ioctl() call was %d\n"
.text
.align 2
.global main
.type main, %function
main:
.LFB6:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str w0, [sp, 28]
str x1, [sp, 16]
adrp x0, .LC0
add x0, x0, :lo12:.LC0
str x0, [sp, 56]
ldr w0, [sp, 28]
cmp w0, 2
beq .L2
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x0, [x0]
mov x3, x0
mov x2, 38
mov x1, 1
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl fwrite
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x0, [x0]
mov x3, x0
mov x2, 14
mov x1, 1
adrp x0, .LC2
add x0, x0, :lo12:.LC2
bl fwrite
mov w0, 1
bl exit
.L2:
ldr x0, [sp, 16]
add x0, x0, 8
ldr x0, [x0]
bl atoi
str w0, [sp, 44]
ldr w0, [sp, 44]
cmp w0, 0
ble .L3
ldr w0, [sp, 44]
cmp w0, 16
ble .L4
.L3:
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x3, [x0]
ldr x0, [sp, 16]
add x0, x0, 8
ldr x0, [x0]
mov x2, x0
adrp x0, .LC3
add x1, x0, :lo12:.LC3
mov x0, x3
bl fprintf
mov w0, 1
bl exit
.L4:
ldr w0, [sp, 44]
lsl w0, w0, 20
str w0, [sp, 44]
ldr w1, [sp, 44]
adrp x0, .LC4
add x0, x0, :lo12:.LC4
bl printf
mov w1, 0
ldr x0, [sp, 56]
bl open
str w0, [sp, 48]
ldr w0, [sp, 48]
cmn w0, #1
bne .L5
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x3, [x0]
ldr x2, [sp, 56]
adrp x0, .LC5
add x1, x0, :lo12:.LC5
mov x0, x3
bl fprintf
mov w0, 1
bl exit
.L5:
ldr w2, [sp, 44]
mov x1, 0
ldr w0, [sp, 48]
bl ioctl
str w0, [sp, 52]
ldr w1, [sp, 52]
adrp x0, .LC6
add x0, x0, :lo12:.LC6
bl printf
ldr w0, [sp, 48]
bl close
mov w0, 0
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE6:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global foo
.type foo, %function
foo:
.LFB0:
.cfi_startproc
nop
ret
.cfi_endproc
.LFE0:
.size foo, .-foo
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.global RoomDir
.bss
.align 3
.type RoomDir, %object
.size RoomDir, 64
RoomDir:
.zero 64
.global TempBuf
.align 3
.type TempBuf, %object
.size TempBuf, 8
TempBuf:
.zero 8
.global WriteBuf
.align 3
.type WriteBuf, %object
.size WriteBuf, 256
WriteBuf:
.zero 256
.global PathStr
.align 3
.type PathStr, %object
.size PathStr, 4096
PathStr:
.zero 4096
.global GameMutex
.align 3
.type GameMutex, %object
.size GameMutex, 48
GameMutex:
.zero 48
.global TempFile
.data
.align 3
.type TempFile, %object
.size TempFile, 9
TempFile:
.string "Pathfile"
.section .rodata
.align 3
.LC1:
.string "program.c"
.align 3
.LC2:
.string "0 == pthreadResult"
.align 3
.LC3:
.string "%s"
.text
.align 2
.global main
.type main, %function
main:
.LFB6:
.cfi_startproc
stp x29, x30, [sp, -208]!
.cfi_def_cfa_offset 208
.cfi_offset 29, -208
.cfi_offset 30, -200
mov x29, sp
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 200]
mov x1, 0
str wzr, [sp, 24]
adrp x0, .LC0
add x1, x0, :lo12:.LC0
add x0, sp, 64
ldr w2, [x1]
str w2, [x0]
ldrh w1, [x1, 4]
strh w1, [x0, 4]
mov x1, 0
adrp x0, GameMutex
add x0, x0, :lo12:GameMutex
bl pthread_mutex_init
mov x2, 64
mov w1, 0
adrp x0, RoomDir
add x0, x0, :lo12:RoomDir
bl memset
add x0, sp, 72
mov x2, 128
mov w1, 0
bl memset
add x4, sp, 48
adrp x0, RoomDir
add x3, x0, :lo12:RoomDir
adrp x0, FindRoomsDir
add x2, x0, :lo12:FindRoomsDir
mov x1, 0
mov x0, x4
bl pthread_create
str w0, [sp, 28]
ldr w0, [sp, 28]
cmp w0, 0
beq .L2
adrp x0, __PRETTY_FUNCTION__.3
add x3, x0, :lo12:__PRETTY_FUNCTION__.3
mov w2, 98
adrp x0, .LC1
add x1, x0, :lo12:.LC1
adrp x0, .LC2
add x0, x0, :lo12:.LC2
bl __assert_fail
.L2:
adrp x0, RoomDir
add x0, x0, :lo12:RoomDir
bl FindRoomsDir
adrp x0, RoomDir
add x0, x0, :lo12:RoomDir
bl FindStartRoom
add x3, sp, 72
mov x2, x0
adrp x0, .LC3
add x1, x0, :lo12:.LC3
mov x0, x3
bl sprintf
add x2, sp, 72
adrp x0, TempFile
add x1, x0, :lo12:TempFile
mov x0, x2
bl CreatePath
adrp x0, GameMutex
add x0, x0, :lo12:GameMutex
bl pthread_mutex_lock
adrp x0, GameMutex
add x0, x0, :lo12:GameMutex
str x0, [sp, 32]
str wzr, [sp, 40]
add x1, sp, 32
add x0, sp, 48
add x4, x0, 8
mov x3, x1
adrp x0, MakeTime
add x2, x0, :lo12:MakeTime
mov x1, 0
mov x0, x4
bl pthread_create
str w0, [sp, 28]
ldr w0, [sp, 28]
cmp w0, 0
beq .L3
adrp x0, __PRETTY_FUNCTION__.3
add x3, x0, :lo12:__PRETTY_FUNCTION__.3
mov w2, 111
adrp x0, .LC1
add x1, x0, :lo12:.LC1
adrp x0, .LC2
add x0, x0, :lo12:.LC2
bl __assert_fail
.L3:
str wzr, [sp, 24]
adrp x0, GameMutex
add x0, x0, :lo12:GameMutex
bl pthread_mutex_unlock
add x0, sp, 72
bl RenderRoom
str w0, [sp, 24]
adrp x0, TempFile
add x1, x0, :lo12:TempFile
ldr w0, [sp, 24]
bl RenderGameOver
adrp x0, TempFile
add x0, x0, :lo12:TempFile
bl remove
adrp x0, GameMutex
add x0, x0, :lo12:GameMutex
bl pthread_mutex_destroy
mov w0, 0
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 200]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L5
bl __stack_chk_fail
.L5:
mov w0, w1
ldp x29, x30, [sp], 208
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE6:
.size main, .-main
.section .rodata
.align 3
.LC0:
.string "_room"
.text
.section .rodata
.align 3
.LC4:
.string "string"
.text
.align 2
.global stripLeadingAndTrailingSpaces
.type stripLeadingAndTrailingSpaces, %function
stripLeadingAndTrailingSpaces:
.LFB7:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str x0, [sp, 24]
ldr x0, [sp, 24]
cmp x0, 0
bne .L7
adrp x0, __PRETTY_FUNCTION__.2
add x3, x0, :lo12:__PRETTY_FUNCTION__.2
mov w2, 172
adrp x0, .LC1
add x1, x0, :lo12:.LC1
adrp x0, .LC4
add x0, x0, :lo12:.LC4
bl __assert_fail
.L7:
ldr x0, [sp, 24]
str x0, [sp, 40]
b .L8
.L10:
ldr x0, [sp, 40]
add x0, x0, 1
str x0, [sp, 40]
.L8:
ldr x0, [sp, 40]
ldrb w0, [x0]
cmp w0, 0
beq .L9
ldr x0, [sp, 40]
ldrb w0, [x0]
bl isspace
cmp w0, 0
bne .L10
.L9:
ldr x0, [sp, 40]
bl strlen
add x0, x0, 1
str x0, [sp, 56]
ldr x2, [sp, 56]
ldr x1, [sp, 40]
ldr x0, [sp, 24]
bl memmove
ldr x1, [sp, 24]
ldr x0, [sp, 56]
add x0, x1, x0
str x0, [sp, 48]
b .L11
.L13:
ldr x0, [sp, 48]
sub x0, x0, #1
str x0, [sp, 48]
.L11:
ldr x1, [sp, 24]
ldr x0, [sp, 48]
cmp x1, x0
bcs .L12
ldr x0, [sp, 48]
ldrb w0, [x0]
bl isspace
cmp w0, 0
bne .L13
.L12:
ldr x0, [sp, 48]
strb wzr, [x0]
nop
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE7:
.size stripLeadingAndTrailingSpaces, .-stripLeadingAndTrailingSpaces
.section .rodata
.align 3
.LC6:
.string "."
.text
.align 2
.global FindRoomsDir
.type FindRoomsDir, %function
FindRoomsDir:
.LFB8:
.cfi_startproc
stp x29, x30, [sp, -224]!
.cfi_def_cfa_offset 224
.cfi_offset 29, -224
.cfi_offset 30, -216
mov x29, sp
str x0, [sp, 24]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 216]
mov x1, 0
mov w0, -1
str w0, [sp, 36]
adrp x0, .LC5
add x1, x0, :lo12:.LC5
add x0, sp, 184
ldr x2, [x1]
str x2, [x0]
ldr x1, [x1, 7]
str x1, [x0, 7]
add x0, sp, 7
stp xzr, xzr, [x0, 192]
strb wzr, [sp, 215]
adrp x0, GameMutex
add x0, x0, :lo12:GameMutex
bl pthread_mutex_lock
adrp x0, .LC6
add x0, x0, :lo12:.LC6
bl opendir
str x0, [sp, 40]
ldr x0, [sp, 40]
cmp x0, 0
beq .L15
b .L16
.L17:
ldr x0, [sp, 48]
add x0, x0, 19
add x1, sp, 184
bl strstr
cmp x0, 0
beq .L16
ldr x0, [sp, 48]
add x0, x0, 19
add x1, sp, 56
bl stat
ldr x0, [sp, 144]
mov w1, w0
ldr w0, [sp, 36]
cmp w0, w1
bge .L16
ldr x0, [sp, 144]
str w0, [sp, 36]
mov x2, 8
mov w1, 0
ldr x0, [sp, 24]
bl memset
ldr x0, [sp, 48]
add x0, x0, 19
mov x1, x0
ldr x0, [sp, 24]
bl strcpy
.L16:
ldr x0, [sp, 40]
bl readdir
str x0, [sp, 48]
ldr x0, [sp, 48]
cmp x0, 0
bne .L17
.L15:
ldr x0, [sp, 40]
bl closedir
adrp x0, GameMutex
add x0, x0, :lo12:GameMutex
bl pthread_mutex_unlock
nop
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [sp, 216]
ldr x1, [x0]
subs x2, x2, x1
mov x1, 0
beq .L18
bl __stack_chk_fail
.L18:
ldp x29, x30, [sp], 224
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE8:
.size FindRoomsDir, .-FindRoomsDir
.section .rodata
.align 3
.LC5:
.string "reitanc.rooms."
.zero 17
.text
.section .rodata
.align 3
.LC7:
.string ""
.align 3
.LC8:
.string "START_ROOM"
.text
.align 2
.global FindStartRoom
.type FindStartRoom, %function
FindStartRoom:
.LFB9:
.cfi_startproc
stp x29, x30, [sp, -80]!
.cfi_def_cfa_offset 80
.cfi_offset 29, -80
.cfi_offset 30, -72
mov x29, sp
str x0, [sp, 24]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 72]
mov x1, 0
adrp x0, .LC0
add x1, x0, :lo12:.LC0
add x0, sp, 64
ldr w2, [x1]
str w2, [x0]
ldrh w1, [x1, 4]
strh w1, [x0, 4]
adrp x0, .LC7
add x0, x0, :lo12:.LC7
str x0, [sp, 48]
adrp x0, .LC7
add x0, x0, :lo12:.LC7
str x0, [sp, 40]
adrp x0, RoomDir
add x0, x0, :lo12:RoomDir
bl strlen
cmp x0, 1
bls .L20
adrp x0, RoomDir
add x0, x0, :lo12:RoomDir
bl opendir
str x0, [sp, 32]
b .L21
.L20:
ldr x0, [sp, 24]
bl strlen
cmp x0, 1
bls .L21
ldr x0, [sp, 24]
bl opendir
str x0, [sp, 32]
.L21:
ldr x0, [sp, 32]
cmp x0, 0
beq .L22
b .L23
.L26:
ldr x0, [sp, 56]
add x0, x0, 19
str x0, [sp, 48]
add x0, sp, 64
mov x1, x0
ldr x0, [sp, 48]
bl strstr
cmp x0, 0
beq .L23
ldr x0, [sp, 48]
bl GetRoomType
mov x2, x0
adrp x0, .LC8
add x1, x0, :lo12:.LC8
mov x0, x2
bl strcmp
cmp w0, 0
bne .L24
ldr x0, [sp, 48]
bl GetRoomName
b .L25
.L24:
adrp x0, .LC7
add x0, x0, :lo12:.LC7
.L25:
str x0, [sp, 40]
.L23:
ldr x0, [sp, 32]
bl readdir
str x0, [sp, 56]
ldr x0, [sp, 56]
cmp x0, 0
beq .L22
ldr x0, [sp, 40]
ldrb w0, [x0]
cmp w0, 0
beq .L26
.L22:
ldr x0, [sp, 32]
bl closedir
ldr x0, [sp, 40]
mov x1, x0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 72]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L28
bl __stack_chk_fail
.L28:
mov x0, x1
ldp x29, x30, [sp], 80
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE9:
.size FindStartRoom, .-FindStartRoom
.section .rodata
.align 3
.LC10:
.string ":\n"
.text
.align 2
.global GetRoomName
.type GetRoomName, %function
GetRoomName:
.LFB10:
.cfi_startproc
stp x29, x30, [sp, -336]!
.cfi_def_cfa_offset 336
.cfi_offset 29, -336
.cfi_offset 30, -328
mov x29, sp
str x0, [sp, 24]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 328]
mov x1, 0
adrp x0, .LC9
add x0, x0, :lo12:.LC9
ldp x0, x1, [x0]
stp x0, x1, [sp, 56]
ldr x0, [sp, 24]
bl GetRoomFile
str w0, [sp, 36]
ldr w0, [sp, 36]
cmn w0, #1
beq .L30
add x0, sp, 72
mov x2, 256
mov w1, 0
bl memset
add x0, sp, 72
mov x2, 256
mov x1, x0
ldr w0, [sp, 36]
bl read
ldr w0, [sp, 36]
bl close
add x2, sp, 72
adrp x0, .LC10
add x1, x0, :lo12:.LC10
mov x0, x2
bl strtok
str x0, [sp, 40]
b .L31
.L34:
add x0, sp, 56
mov x1, x0
ldr x0, [sp, 40]
bl strcmp
cmp w0, 0
bne .L32
adrp x0, .LC10
add x1, x0, :lo12:.LC10
mov x0, 0
bl strtok
str x0, [sp, 40]
adrp x0, TempBuf
add x0, x0, :lo12:TempBuf
adrp x1, .LC7
add x1, x1, :lo12:.LC7
str x1, [x0]
adrp x0, TempBuf
add x0, x0, :lo12:TempBuf
ldr x1, [sp, 40]
str x1, [x0]
adrp x0, TempBuf
add x0, x0, :lo12:TempBuf
ldr x0, [x0]
bl stripLeadingAndTrailingSpaces
adrp x0, TempBuf
add x0, x0, :lo12:TempBuf
ldr x0, [x0]
str x0, [sp, 48]
ldr x0, [sp, 48]
b .L35
.L32:
adrp x0, .LC10
add x1, x0, :lo12:.LC10
mov x0, 0
bl strtok
str x0, [sp, 40]
.L31:
ldr x0, [sp, 40]
cmp x0, 0
bne .L34
.L30:
ldr x0, [sp, 48]
.L35:
mov x1, x0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 328]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L36
bl __stack_chk_fail
.L36:
mov x0, x1
ldp x29, x30, [sp], 336
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE10:
.size GetRoomName, .-GetRoomName
.section .rodata
.align 3
.LC9:
.string "ROOM NAME"
.zero 6
.text
.align 2
.global GetRoomType
.type GetRoomType, %function
GetRoomType:
.LFB11:
.cfi_startproc
stp x29, x30, [sp, -336]!
.cfi_def_cfa_offset 336
.cfi_offset 29, -336
.cfi_offset 30, -328
mov x29, sp
str x0, [sp, 24]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 328]
mov x1, 0
ldr x0, [sp, 24]
bl GetRoomFile
str w0, [sp, 36]
adrp x0, .LC11
add x0, x0, :lo12:.LC11
ldp x0, x1, [x0]
stp x0, x1, [sp, 56]
ldr w0, [sp, 36]
cmn w0, #1
beq .L38
add x0, sp, 72
mov x2, 256
mov w1, 0
bl memset
add x0, sp, 72
mov x2, 256
mov x1, x0
ldr w0, [sp, 36]
bl read
ldr w0, [sp, 36]
bl close
add x2, sp, 72
adrp x0, .LC10
add x1, x0, :lo12:.LC10
mov x0, x2
bl strtok
str x0, [sp, 40]
b .L39
.L42:
add x0, sp, 56
mov x1, x0
ldr x0, [sp, 40]
bl strcmp
cmp w0, 0
bne .L40
adrp x0, .LC10
add x1, x0, :lo12:.LC10
mov x0, 0
bl strtok
str x0, [sp, 40]
adrp x0, TempBuf
add x0, x0, :lo12:TempBuf
adrp x1, .LC7
add x1, x1, :lo12:.LC7
str x1, [x0]
adrp x0, TempBuf
add x0, x0, :lo12:TempBuf
ldr x1, [sp, 40]
str x1, [x0]
adrp x0, TempBuf
add x0, x0, :lo12:TempBuf
ldr x0, [x0]
bl stripLeadingAndTrailingSpaces
adrp x0, TempBuf
add x0, x0, :lo12:TempBuf
ldr x0, [x0]
str x0, [sp, 48]
ldr x0, [sp, 48]
b .L43
.L40:
adrp x0, .LC10
add x1, x0, :lo12:.LC10
mov x0, 0
bl strtok
str x0, [sp, 40]
.L39:
ldr x0, [sp, 40]
cmp x0, 0
bne .L42
.L38:
ldr x0, [sp, 48]
.L43:
mov x1, x0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 328]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L44
bl __stack_chk_fail
.L44:
mov x0, x1
ldp x29, x30, [sp], 336
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE11:
.size GetRoomType, .-GetRoomType
.section .rodata
.align 3
.LC11:
.string "ROOM TYPE"
.zero 6
.text
.section .rodata
.align 3
.LC12:
.string "CONNECTION %i"
.text
.align 2
.global GetRoomConnection
.type GetRoomConnection, %function
GetRoomConnection:
.LFB12:
.cfi_startproc
stp x29, x30, [sp, -352]!
.cfi_def_cfa_offset 352
.cfi_offset 29, -352
.cfi_offset 30, -344
mov x29, sp
str x0, [sp, 24]
str w1, [sp, 20]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 344]
mov x1, 0
ldr x0, [sp, 24]
bl GetRoomFile
str w0, [sp, 36]
adrp x0, .LC7
add x0, x0, :lo12:.LC7
str x0, [sp, 48]
ldr x0, [sp, 24]
ldrb w0, [x0]
cmp w0, 0
beq .L46
ldr x0, [sp, 24]
cmp x0, 0
bne .L47
.L46:
adrp x0, .LC7
add x0, x0, :lo12:.LC7
str x0, [sp, 48]
ldr x0, [sp, 48]
b .L53
.L47:
ldr w2, [sp, 20]
ldr w1, [sp, 20]
mov w0, 1
cmp w2, 0
csel w0, w1, w0, gt
str w0, [sp, 20]
ldr w0, [sp, 36]
cmn w0, #1
beq .L49
add x0, sp, 88
mov x2, 256
mov w1, 0
bl memset
add x0, sp, 88
mov x2, 256
mov x1, x0
ldr w0, [sp, 36]
bl read
ldr w0, [sp, 36]
bl close
add x0, sp, 56
mov x2, 32
mov w1, 0
bl memset
add x3, sp, 56
ldr w2, [sp, 20]
adrp x0, .LC12
add x1, x0, :lo12:.LC12
mov x0, x3
bl sprintf
add x2, sp, 88
adrp x0, .LC10
add x1, x0, :lo12:.LC10
mov x0, x2
bl strtok
str x0, [sp, 40]
b .L50
.L52:
add x0, sp, 56
mov x1, x0
ldr x0, [sp, 40]
bl strcmp
cmp w0, 0
bne .L51
adrp x0, .LC10
add x1, x0, :lo12:.LC10
mov x0, 0
bl strtok
str x0, [sp, 40]
adrp x0, TempBuf
add x0, x0, :lo12:TempBuf
adrp x1, .LC7
add x1, x1, :lo12:.LC7
str x1, [x0]
adrp x0, TempBuf
add x0, x0, :lo12:TempBuf
ldr x1, [sp, 40]
str x1, [x0]
adrp x0, TempBuf
add x0, x0, :lo12:TempBuf
ldr x0, [x0]
bl stripLeadingAndTrailingSpaces
adrp x0, TempBuf
add x0, x0, :lo12:TempBuf
ldr x0, [x0]
str x0, [sp, 48]
ldr x0, [sp, 48]
b .L53
.L51:
adrp x0, .LC10
add x1, x0, :lo12:.LC10
mov x0, 0
bl strtok
str x0, [sp, 40]
.L50:
ldr x0, [sp, 40]
cmp x0, 0
bne .L52
.L49:
ldr x0, [sp, 48]
.L53:
mov x1, x0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 344]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L54
bl __stack_chk_fail
.L54:
mov x0, x1
ldp x29, x30, [sp], 352
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE12:
.size GetRoomConnection, .-GetRoomConnection
.section .rodata
.align 3
.LC13:
.string "%s/%s%s"
.align 3
.LC14:
.string "ERROR - Unable to Open Room File: %s"
.text
.align 2
.global GetRoomFile
.type GetRoomFile, %function
GetRoomFile:
.LFB13:
.cfi_startproc
stp x29, x30, [sp, -144]!
.cfi_def_cfa_offset 144
.cfi_offset 29, -144
.cfi_offset 30, -136
mov x29, sp
.cfi_def_cfa_register 29
stp x19, x20, [sp, 16]
stp x21, x22, [sp, 32]
stp x23, x24, [sp, 48]
stp x25, x26, [sp, 64]
str x27, [sp, 80]
sub sp, sp, #16
.cfi_offset 19, -128
.cfi_offset 20, -120
.cfi_offset 21, -112
.cfi_offset 22, -104
.cfi_offset 23, -96
.cfi_offset 24, -88
.cfi_offset 25, -80
.cfi_offset 26, -72
.cfi_offset 27, -64
str x0, [x29, 104]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [x29, 136]
mov x1, 0
mov x0, sp
mov x19, x0
ldr x0, [x29, 104]
bl strlen
add x0, x0, 65
mov x1, x0
sub x1, x1, #1
str x1, [x29, 120]
mov x26, x0
mov x27, 0
lsr x1, x26, 61
lsl x23, x27, 3
orr x23, x1, x23
lsl x22, x26, 3
mov x24, x0
mov x25, 0
lsr x1, x24, 61
lsl x21, x25, 3
orr x21, x1, x21
lsl x20, x24, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L56:
cmp sp, x1
beq .L57
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L56
.L57:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L58
str xzr, [sp, 1024]
.L58:
add x0, sp, 16
add x0, x0, 0
str x0, [x29, 128]
ldr x0, [x29, 104]
ldrb w0, [x0]
cmp w0, 0
beq .L59
ldr x0, [x29, 104]
cmp x0, 0
bne .L60
.L59:
mov w0, -1
b .L61
.L60:
adrp x0, .LC0
add x1, x0, :lo12:.LC0
ldr x0, [x29, 104]
bl strstr
cmp x0, 0
bne .L62
adrp x0, .LC0
add x0, x0, :lo12:.LC0
b .L63
.L62:
adrp x0, .LC7
add x0, x0, :lo12:.LC7
.L63:
mov x4, x0
ldr x3, [x29, 104]
adrp x0, RoomDir
add x2, x0, :lo12:RoomDir
adrp x0, .LC13
add x1, x0, :lo12:.LC13
ldr x0, [x29, 128]
bl sprintf
mov w1, 0
ldr x0, [x29, 128]
bl open
str w0, [x29, 116]
ldr w0, [x29, 116]
cmn w0, #1
bne .L64
ldr x1, [x29, 104]
adrp x0, .LC14
add x0, x0, :lo12:.LC14
bl printf
.L64:
ldr w0, [x29, 116]
.L61:
mov sp, x19
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [x29, 136]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L66
bl __stack_chk_fail
.L66:
mov w0, w1
mov sp, x29
ldp x19, x20, [sp, 16]
ldp x21, x22, [sp, 32]
ldp x23, x24, [sp, 48]
ldp x25, x26, [sp, 64]
ldr x27, [sp, 80]
ldp x29, x30, [sp], 144
.cfi_restore 30
.cfi_restore 29
.cfi_restore 27
.cfi_restore 25
.cfi_restore 26
.cfi_restore 23
.cfi_restore 24
.cfi_restore 21
.cfi_restore 22
.cfi_restore 19
.cfi_restore 20
.cfi_def_cfa 31, 0
ret
.cfi_endproc
.LFE13:
.size GetRoomFile, .-GetRoomFile
.align 2
.global IsValidConnection
.type IsValidConnection, %function
IsValidConnection:
.LFB14:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
str x1, [sp, 16]
str wzr, [sp, 36]
mov w0, 1
str w0, [sp, 32]
b .L68
.L72:
adrp x0, .LC7
add x0, x0, :lo12:.LC7
str x0, [sp, 40]
ldr w1, [sp, 32]
ldr x0, [sp, 24]
bl GetRoomConnection
str x0, [sp, 40]
ldr x0, [sp, 40]
ldrb w0, [x0]
cmp w0, 0
beq .L69
ldr x1, [sp, 16]
ldr x0, [sp, 40]
bl strcmp
cmp w0, 0
bne .L69
mov w0, 1
b .L70
.L69:
ldr x0, [sp, 40]
ldrb w0, [x0]
cmp w0, 0
bne .L71
mov w0, 0
b .L70
.L71:
ldr w0, [sp, 32]
add w0, w0, 1
str w0, [sp, 32]
.L68:
ldr w0, [sp, 32]
cmp w0, 6
ble .L72
ldr w0, [sp, 36]
.L70:
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE14:
.size IsValidConnection, .-IsValidConnection
.align 2
.global ValidConnection
.type ValidConnection, %function
ValidConnection:
.LFB15:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
str w1, [sp, 20]
str wzr, [sp, 36]
adrp x0, .LC7
add x0, x0, :lo12:.LC7
str x0, [sp, 40]
ldr w1, [sp, 20]
ldr x0, [sp, 24]
bl GetRoomConnection
str x0, [sp, 40]
ldr x0, [sp, 40]
ldrb w0, [x0]
cmp w0, 0
beq .L74
ldr x0, [sp, 40]
ldrb w0, [x0]
cmp w0, 0
beq .L74
mov w0, 1
b .L75
.L74:
ldr x0, [sp, 40]
ldrb w0, [x0]
cmp w0, 0
beq .L76
ldr x0, [sp, 40]
ldrb w0, [x0]
cmp w0, 0
bne .L77
.L76:
mov w0, 0
b .L75
.L77:
ldr w0, [sp, 36]
.L75:
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE15:
.size ValidConnection, .-ValidConnection
.section .rodata
.align 3
.LC15:
.string "\nCURRENT LOCATION: %s\n"
.align 3
.LC16:
.string "POSSIBLE CONNECTIONS: "
.align 3
.LC17:
.string ", %s"
.align 3
.LC18:
.string "WHERE TO? >"
.align 3
.LC19:
.string "time"
.align 3
.LC20:
.string "\nHAL 9000 SAYS, 'I'M SORRY I AM AFRAID I JUST CAN'T DO THAT.' TRY AGAIN."
.text
.align 2
.global RenderRoom
.type RenderRoom, %function
RenderRoom:
.LFB16:
.cfi_startproc
sub sp, sp, #768
.cfi_def_cfa_offset 768
stp x29, x30, [sp]
.cfi_offset 29, -768
.cfi_offset 30, -760
mov x29, sp
str x0, [sp, 24]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 760]
mov x1, 0
str wzr, [sp, 36]
str wzr, [sp, 48]
str wzr, [sp, 44]
str wzr, [sp, 52]
add x3, sp, 120
ldr x2, [sp, 24]
adrp x0, .LC3
add x1, x0, :lo12:.LC3
mov x0, x3
bl sprintf
.L86:
add x0, sp, 120
bl GetRoomName
mov x1, x0
adrp x0, .LC15
add x0, x0, :lo12:.LC15
bl printf
adrp x0, .LC16
add x0, x0, :lo12:.LC16
bl printf
mov w0, 1
str w0, [sp, 40]
b .L79
.L82:
add x0, sp, 120
ldr w1, [sp, 40]
bl ValidConnection
str w0, [sp, 48]
ldr w0, [sp, 48]
cmp w0, 0
beq .L80
add x0, sp, 56
mov x2, 64
mov w1, 0
bl memset
add x0, sp, 120
ldr w1, [sp, 40]
bl GetRoomConnection
add x3, sp, 56
mov x2, x0
adrp x0, .LC3
add x1, x0, :lo12:.LC3
mov x0, x3
bl sprintf
ldr w0, [sp, 40]
cmp w0, 1
bne .L81
add x0, sp, 56
mov x1, x0
adrp x0, .LC3
add x0, x0, :lo12:.LC3
bl printf
b .L80
.L81:
add x0, sp, 56
mov x1, x0
adrp x0, .LC17
add x0, x0, :lo12:.LC17
bl printf
nop
.L80:
ldr w0, [sp, 40]
add w0, w0, 1
str w0, [sp, 40]
.L79:
ldr w0, [sp, 40]
cmp w0, 6
ble .L82
adrp x0, .LC6
add x0, x0, :lo12:.LC6
bl puts
adrp x0, .LC18
add x0, x0, :lo12:.LC18
bl printf
add x0, sp, 248
mov x2, 256
mov w1, 0
bl memset
add x0, sp, 248
mov x1, x0
adrp x0, .LC3
add x0, x0, :lo12:.LC3
bl __isoc99_scanf
add x0, sp, 504
mov x2, 256
mov w1, 0
bl memset
add x1, sp, 248
add x0, sp, 504
bl sprintf
add x2, sp, 248
adrp x0, .LC19
add x1, x0, :lo12:.LC19
mov x0, x2
bl strcmp
cmp w0, 0
bne .L83
adrp x0, GameMutex
add x0, x0, :lo12:GameMutex
bl pthread_mutex_unlock
mov w1, 1
adrp x0, GameMutex
add x0, x0, :lo12:GameMutex
bl MakeTime
adrp x0, GameMutex
add x0, x0, :lo12:GameMutex
bl pthread_mutex_lock
b .L84
.L83:
add x1, sp, 504
add x0, sp, 120
bl IsValidConnection
cmp w0, 0
beq .L85
add x0, sp, 120
mov x2, 128
mov w1, 0
bl memset
add x0, sp, 504
add x3, sp, 120
mov x2, x0
adrp x0, .LC3
add x1, x0, :lo12:.LC3
mov x0, x3
bl sprintf
add x2, sp, 120
adrp x0, TempFile
add x1, x0, :lo12:TempFile
mov x0, x2
bl WritePath
ldr w0, [sp, 36]
add w0, w0, 1
str w0, [sp, 36]
add x0, sp, 120
bl IsGameOver
str w0, [sp, 44]
b .L84
.L85:
adrp x0, .LC20
add x0, x0, :lo12:.LC20
bl puts
.L84:
ldr w0, [sp, 44]
cmp w0, 0
beq .L86
ldr w0, [sp, 36]
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 760]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L88
bl __stack_chk_fail
.L88:
mov w0, w1
ldp x29, x30, [sp]
add sp, sp, 768
.cfi_restore 29
.cfi_restore 30
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE16:
.size RenderRoom, .-RenderRoom
.section .rodata
.align 3
.LC21:
.string "END_ROOM"
.text
.align 2
.global IsGameOver
.type IsGameOver, %function
IsGameOver:
.LFB17:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str x0, [sp, 24]
ldr x0, [sp, 24]
bl GetRoomType
mov x2, x0
adrp x0, .LC21
add x1, x0, :lo12:.LC21
mov x0, x2
bl strcmp
cmp w0, 0
cset w0, eq
and w0, w0, 255
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE17:
.size IsGameOver, .-IsGameOver
.section .rodata
.align 3
.LC22:
.string "strlen(RoomFile)>0 && strlen(FileName)>0"
.align 3
.LC23:
.string "%s\n"
.align 3
.LC24:
.string "ERROR: Unable to Open or Create temp path file."
.text
.align 2
.global CreatePath
.type CreatePath, %function
CreatePath:
.LFB18:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
str x1, [sp, 16]
ldr x0, [sp, 24]
ldrb w0, [x0]
cmp w0, 0
beq .L92
ldr x0, [sp, 16]
ldrb w0, [x0]
cmp w0, 0
bne .L97
.L92:
adrp x0, __PRETTY_FUNCTION__.1
add x3, x0, :lo12:__PRETTY_FUNCTION__.1
mov w2, 559
adrp x0, .LC1
add x1, x0, :lo12:.LC1
adrp x0, .LC22
add x0, x0, :lo12:.LC22
bl __assert_fail
.L97:
mov w2, 502
mov w1, 577
ldr x0, [sp, 16]
bl open
str w0, [sp, 44]
ldr w0, [sp, 44]
cmn w0, #1
beq .L94
ldr x0, [sp, 24]
bl strlen
add x0, x0, 1
mov x2, x0
mov w1, 0
adrp x0, WriteBuf
add x0, x0, :lo12:WriteBuf
bl memset
ldr x2, [sp, 24]
adrp x0, .LC23
add x1, x0, :lo12:.LC23
adrp x0, WriteBuf
add x0, x0, :lo12:WriteBuf
bl sprintf
adrp x0, WriteBuf
add x0, x0, :lo12:WriteBuf
bl strlen
mov x2, x0
adrp x0, WriteBuf
add x1, x0, :lo12:WriteBuf
ldr w0, [sp, 44]
bl write
str w0, [sp, 40]
ldr w0, [sp, 44]
bl close
b .L95
.L94:
adrp x0, .LC24
add x0, x0, :lo12:.LC24
bl printf
.L95:
ldr w0, [sp, 40]
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE18:
.size CreatePath, .-CreatePath
.align 2
.global WritePath
.type WritePath, %function
WritePath:
.LFB19:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
str x1, [sp, 16]
ldr x0, [sp, 24]
ldrb w0, [x0]
cmp w0, 0
beq .L99
ldr x0, [sp, 16]
ldrb w0, [x0]
cmp w0, 0
bne .L104
.L99:
adrp x0, __PRETTY_FUNCTION__.0
add x3, x0, :lo12:__PRETTY_FUNCTION__.0
mov w2, 580
adrp x0, .LC1
add x1, x0, :lo12:.LC1
adrp x0, .LC22
add x0, x0, :lo12:.LC22
bl __assert_fail
.L104:
mov w2, 502
mov w1, 1025
ldr x0, [sp, 16]
bl open
str w0, [sp, 44]
ldr w0, [sp, 44]
cmn w0, #1
beq .L101
ldr x0, [sp, 24]
bl strlen
add x0, x0, 1
mov x2, x0
mov w1, 0
adrp x0, WriteBuf
add x0, x0, :lo12:WriteBuf
bl memset
ldr x2, [sp, 24]
adrp x0, .LC23
add x1, x0, :lo12:.LC23
adrp x0, WriteBuf
add x0, x0, :lo12:WriteBuf
bl sprintf
adrp x0, WriteBuf
add x0, x0, :lo12:WriteBuf
bl strlen
mov x2, x0
adrp x0, WriteBuf
add x1, x0, :lo12:WriteBuf
ldr w0, [sp, 44]
bl write
str w0, [sp, 40]
ldr w0, [sp, 44]
bl close
b .L102
.L101:
adrp x0, .LC24
add x0, x0, :lo12:.LC24
bl printf
.L102:
ldr w0, [sp, 40]
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE19:
.size WritePath, .-WritePath
.section .rodata
.align 3
.LC25:
.string "\nYOU HAVE FOUND THE END ROOM. CONGRATULATIONS!"
.align 3
.LC26:
.string "S"
.align 3
.LC27:
.string "YOU TOOK %d STEP%s. YOUR PATH TO VICTORY WAS:\n"
.align 3
.LC28:
.string "ERROR: Unable to Open or Access temp path file."
.text
.align 2
.global RenderGameOver
.type RenderGameOver, %function
RenderGameOver:
.LFB20:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str w0, [sp, 28]
str x1, [sp, 16]
adrp x0, .LC25
add x0, x0, :lo12:.LC25
bl puts
ldr w0, [sp, 28]
cmp w0, 1
ble .L106
adrp x0, .LC26
add x0, x0, :lo12:.LC26
b .L107
.L106:
adrp x0, .LC7
add x0, x0, :lo12:.LC7
.L107:
mov x2, x0
ldr w1, [sp, 28]
adrp x0, .LC27
add x0, x0, :lo12:.LC27
bl printf
mov w1, 0
ldr x0, [sp, 16]
bl open
str w0, [sp, 44]
ldr w0, [sp, 44]
cmn w0, #1
beq .L108
mov x2, 4096
adrp x0, PathStr
add x1, x0, :lo12:PathStr
ldr w0, [sp, 44]
bl read
ldr w0, [sp, 44]
bl close
adrp x0, PathStr
add x0, x0, :lo12:PathStr
bl puts
b .L105
.L108:
adrp x0, .LC28
add x0, x0, :lo12:.LC28
bl printf
nop
.L105:
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE20:
.size RenderGameOver, .-RenderGameOver
.section .rodata
.align 3
.LC29:
.string " %I:%M%p, %A, %B %d, %Y"
.align 3
.LC30:
.string "\n%s\n"
.align 3
.LC31:
.string "currentTime.txt"
.align 3
.LC32:
.string "ERROR: Unable to open the file currentTime.txt for writing."
.text
.align 2
.global MakeTime
.type MakeTime, %function
MakeTime:
.LFB21:
.cfi_startproc
stp x29, x30, [sp, -176]!
.cfi_def_cfa_offset 176
.cfi_offset 29, -176
.cfi_offset 30, -168
mov x29, sp
str x0, [sp, 24]
str w1, [sp, 20]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 168]
mov x1, 0
stp xzr, xzr, [sp, 64]
add x0, sp, 80
movi v0.4s, 0
stp q0, q0, [x0]
stp q0, q0, [x0, 32]
str q0, [x0, 64]
fmov w1, s0
str w1, [x0, 80]
ldr w0, [sp, 20]
cmp w0, 0
beq .L112
add x0, sp, 48
bl time
add x0, sp, 48
bl localtime
str x0, [sp, 56]
add x4, sp, 64
ldr x3, [sp, 56]
adrp x0, .LC29
add x2, x0, :lo12:.LC29
mov x1, 100
mov x0, x4
bl strftime
add x0, sp, 64
mov x1, x0
adrp x0, .LC30
add x0, x0, :lo12:.LC30
bl printf
ldr x0, [sp, 24]
bl pthread_mutex_lock
mov w2, 502
mov w1, 65
adrp x0, .LC31
add x0, x0, :lo12:.LC31
bl open
str w0, [sp, 44]
ldr w0, [sp, 44]
cmn w0, #1
beq .L113
add x0, sp, 64
bl strlen
mov x1, x0
add x0, sp, 64
mov x2, x1
mov x1, x0
ldr w0, [sp, 44]
bl write
ldr w0, [sp, 44]
bl close
ldr x0, [sp, 24]
bl pthread_mutex_unlock
b .L112
.L113:
adrp x0, .LC32
add x0, x0, :lo12:.LC32
bl printf
mov w0, 1
b .L116
.L112:
mov w0, 0
.L116:
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 168]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L117
bl __stack_chk_fail
.L117:
mov w0, w1
ldp x29, x30, [sp], 176
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE21:
.size MakeTime, .-MakeTime
.section .rodata
.align 3
.type __PRETTY_FUNCTION__.3, %object
.size __PRETTY_FUNCTION__.3, 5
__PRETTY_FUNCTION__.3:
.string "main"
.align 3
.type __PRETTY_FUNCTION__.2, %object
.size __PRETTY_FUNCTION__.2, 30
__PRETTY_FUNCTION__.2:
.string "stripLeadingAndTrailingSpaces"
.align 3
.type __PRETTY_FUNCTION__.1, %object
.size __PRETTY_FUNCTION__.1, 11
__PRETTY_FUNCTION__.1:
.string "CreatePath"
.align 3
.type __PRETTY_FUNCTION__.0, %object
.size __PRETTY_FUNCTION__.0, 10
__PRETTY_FUNCTION__.0:
.string "WritePath"
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global sort
.type sort, %function
sort:
.LFB6:
.cfi_startproc
stp x29, x30, [sp, -80]!
.cfi_def_cfa_offset 80
.cfi_offset 29, -80
.cfi_offset 30, -72
mov x29, sp
.cfi_def_cfa_register 29
sub sp, sp, #16
str x0, [x29, 24]
str w1, [x29, 20]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [x29, 72]
mov x1, 0
mov x0, sp
mov x10, x0
str wzr, [x29, 36]
str wzr, [x29, 40]
str wzr, [x29, 44]
ldr w0, [x29, 20]
sxtw x1, w0
sub x1, x1, #1
str x1, [x29, 56]
sxtw x1, w0
mov x8, x1
mov x9, 0
lsr x1, x8, 59
lsl x5, x9, 5
orr x5, x1, x5
lsl x4, x8, 5
sxtw x1, w0
mov x6, x1
mov x7, 0
lsr x1, x6, 59
lsl x3, x7, 5
orr x3, x1, x3
lsl x2, x6, 5
sxtw x0, w0
lsl x0, x0, 2
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L2:
cmp sp, x1
beq .L3
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L2
.L3:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L4
str xzr, [sp, 1024]
.L4:
add x0, sp, 16
add x0, x0, 3
lsr x0, x0, 2
lsl x0, x0, 2
str x0, [x29, 64]
str wzr, [x29, 48]
b .L5
.L9:
ldrsw x0, [x29, 48]
lsl x0, x0, 2
ldr x1, [x29, 24]
add x0, x1, x0
ldr w0, [x0]
str w0, [x29, 36]
str wzr, [x29, 52]
b .L6
.L8:
ldrsw x0, [x29, 52]
lsl x0, x0, 2
ldr x1, [x29, 24]
add x0, x1, x0
ldr w0, [x0]
ldr w1, [x29, 36]
cmp w1, w0
bgt .L7
ldrsw x0, [x29, 52]
lsl x0, x0, 2
ldr x1, [x29, 24]
add x0, x1, x0
ldr w0, [x0]
str w0, [x29, 36]
ldr w0, [x29, 52]
str w0, [x29, 40]
.L7:
ldr w0, [x29, 52]
add w0, w0, 1
str w0, [x29, 52]
.L6:
ldr w1, [x29, 52]
ldr w0, [x29, 20]
cmp w1, w0
blt .L8
ldrsw x0, [x29, 40]
lsl x0, x0, 2
ldr x1, [x29, 24]
add x0, x1, x0
ldr w2, [x0]
ldr x0, [x29, 64]
ldrsw x1, [x29, 44]
str w2, [x0, x1, lsl 2]
ldrsw x0, [x29, 40]
lsl x0, x0, 2
ldr x1, [x29, 24]
add x0, x1, x0
str wzr, [x0]
str wzr, [x29, 40]
ldr w0, [x29, 44]
add w0, w0, 1
str w0, [x29, 44]
ldr w0, [x29, 48]
add w0, w0, 1
str w0, [x29, 48]
.L5:
ldr w1, [x29, 48]
ldr w0, [x29, 20]
cmp w1, w0
blt .L9
mov sp, x10
nop
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [x29, 72]
ldr x1, [x0]
subs x2, x2, x1
mov x1, 0
beq .L10
bl __stack_chk_fail
.L10:
mov sp, x29
ldp x29, x30, [sp], 80
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa 31, 0
ret
.cfi_endproc
.LFE6:
.size sort, .-sort
.align 2
.global bucked_sort
.type bucked_sort, %function
bucked_sort:
.LFB7:
.cfi_startproc
stp x29, x30, [sp, -192]!
.cfi_def_cfa_offset 192
.cfi_offset 29, -192
.cfi_offset 30, -184
mov x29, sp
.cfi_def_cfa_register 29
stp x19, x20, [sp, 16]
stp x21, x22, [sp, 32]
stp x23, x24, [sp, 48]
stp x25, x26, [sp, 64]
stp x27, x28, [sp, 80]
sub sp, sp, #16
.cfi_offset 19, -176
.cfi_offset 20, -168
.cfi_offset 21, -160
.cfi_offset 22, -152
.cfi_offset 23, -144
.cfi_offset 24, -136
.cfi_offset 25, -128
.cfi_offset 26, -120
.cfi_offset 27, -112
.cfi_offset 28, -104
str x0, [x29, 104]
str w1, [x29, 100]
str w2, [x29, 96]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [x29, 184]
mov x1, 0
mov x0, sp
mov x28, x0
ldr w0, [x29, 100]
sxtw x1, w0
sub x1, x1, #1
str x1, [x29, 136]
sxtw x1, w0
mov x26, x1
mov x27, 0
lsr x1, x26, 59
lsl x15, x27, 5
orr x15, x1, x15
lsl x14, x26, 5
sxtw x1, w0
mov x24, x1
mov x25, 0
lsr x1, x24, 59
lsl x13, x25, 5
orr x13, x1, x13
lsl x12, x24, 5
sxtw x0, w0
lsl x0, x0, 2
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L12:
cmp sp, x1
beq .L13
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L12
.L13:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L14
str xzr, [sp, 1024]
.L14:
add x0, sp, 16
add x0, x0, 3
lsr x0, x0, 2
lsl x0, x0, 2
str x0, [x29, 144]
ldr w0, [x29, 100]
sxtw x1, w0
sub x1, x1, #1
str x1, [x29, 152]
sxtw x1, w0
mov x22, x1
mov x23, 0
lsr x1, x22, 59
lsl x11, x23, 5
orr x11, x1, x11
lsl x10, x22, 5
sxtw x1, w0
mov x20, x1
mov x21, 0
lsr x1, x20, 59
lsl x9, x21, 5
orr x9, x1, x9
lsl x8, x20, 5
sxtw x0, w0
lsl x0, x0, 2
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L15:
cmp sp, x1
beq .L16
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L15
.L16:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L17
str xzr, [sp, 1024]
.L17:
add x0, sp, 16
add x0, x0, 3
lsr x0, x0, 2
lsl x0, x0, 2
str x0, [x29, 160]
ldr w0, [x29, 100]
sxtw x1, w0
sub x1, x1, #1
str x1, [x29, 168]
sxtw x1, w0
mov x18, x1
mov x19, 0
lsr x1, x18, 59
lsl x7, x19, 5
orr x7, x1, x7
lsl x6, x18, 5
sxtw x1, w0
mov x16, x1
mov x17, 0
lsr x1, x16, 59
lsl x5, x17, 5
orr x5, x1, x5
lsl x4, x16, 5
sxtw x0, w0
lsl x0, x0, 2
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L18:
cmp sp, x1
beq .L19
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L18
.L19:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L20
str xzr, [sp, 1024]
.L20:
add x0, sp, 16
add x0, x0, 3
lsr x0, x0, 2
lsl x0, x0, 2
str x0, [x29, 176]
str wzr, [x29, 120]
str wzr, [x29, 124]
str wzr, [x29, 128]
str wzr, [x29, 132]
b .L21
.L25:
ldrsw x0, [x29, 132]
lsl x0, x0, 2
ldr x1, [x29, 104]
add x0, x1, x0
ldr w1, [x0]
ldr w0, [x29, 96]
mov w2, 21846
movk w2, 0x5555, lsl 16
smull x2, w0, w2
lsr x2, x2, 32
asr w0, w0, 31
sub w0, w2, w0
cmp w1, w0
bge .L22
ldrsw x0, [x29, 132]
lsl x0, x0, 2
ldr x1, [x29, 104]
add x0, x1, x0
ldr w2, [x0]
ldr x0, [x29, 144]
ldrsw x1, [x29, 120]
str w2, [x0, x1, lsl 2]
ldr w0, [x29, 120]
add w0, w0, 1
str w0, [x29, 120]
b .L23
.L22:
ldrsw x0, [x29, 132]
lsl x0, x0, 2
ldr x1, [x29, 104]
add x0, x1, x0
ldr w1, [x0]
ldr w0, [x29, 96]
lsr w2, w0, 31
add w0, w2, w0
asr w0, w0, 1
cmp w1, w0
bge .L24
ldrsw x0, [x29, 132]
lsl x0, x0, 2
ldr x1, [x29, 104]
add x0, x1, x0
ldr w2, [x0]
ldr x0, [x29, 160]
ldrsw x1, [x29, 124]
str w2, [x0, x1, lsl 2]
ldr w0, [x29, 124]
add w0, w0, 1
str w0, [x29, 124]
b .L23
.L24:
ldrsw x0, [x29, 132]
lsl x0, x0, 2
ldr x1, [x29, 104]
add x0, x1, x0
ldr w0, [x0]
ldr w1, [x29, 96]
cmp w1, w0
blt .L23
ldrsw x0, [x29, 132]
lsl x0, x0, 2
ldr x1, [x29, 104]
add x0, x1, x0
ldr w2, [x0]
ldr x0, [x29, 176]
ldrsw x1, [x29, 128]
str w2, [x0, x1, lsl 2]
ldr w0, [x29, 128]
add w0, w0, 1
str w0, [x29, 128]
.L23:
ldr w0, [x29, 132]
add w0, w0, 1
str w0, [x29, 132]
.L21:
ldr w1, [x29, 132]
ldr w0, [x29, 100]
cmp w1, w0
blt .L25
ldr w1, [x29, 120]
ldr x0, [x29, 144]
bl sort
ldr w1, [x29, 124]
ldr x0, [x29, 160]
bl sort
ldr w1, [x29, 128]
ldr x0, [x29, 176]
bl sort
mov sp, x28
nop
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [x29, 184]
ldr x1, [x0]
subs x2, x2, x1
mov x1, 0
beq .L26
bl __stack_chk_fail
.L26:
mov sp, x29
ldp x19, x20, [sp, 16]
ldp x21, x22, [sp, 32]
ldp x23, x24, [sp, 48]
ldp x25, x26, [sp, 64]
ldp x27, x28, [sp, 80]
ldp x29, x30, [sp], 192
.cfi_restore 30
.cfi_restore 29
.cfi_restore 27
.cfi_restore 28
.cfi_restore 25
.cfi_restore 26
.cfi_restore 23
.cfi_restore 24
.cfi_restore 21
.cfi_restore 22
.cfi_restore 19
.cfi_restore 20
.cfi_def_cfa 31, 0
ret
.cfi_endproc
.LFE7:
.size bucked_sort, .-bucked_sort
.align 2
.global main
.type main, %function
main:
.LFB8:
.cfi_startproc
stp x29, x30, [sp, -160]!
.cfi_def_cfa_offset 160
.cfi_offset 29, -160
.cfi_offset 30, -152
mov x29, sp
.cfi_def_cfa_register 29
stp x19, x20, [sp, 16]
stp x21, x22, [sp, 32]
stp x23, x24, [sp, 48]
stp x25, x26, [sp, 64]
str x27, [sp, 80]
sub sp, sp, #16
.cfi_offset 19, -144
.cfi_offset 20, -136
.cfi_offset 21, -128
.cfi_offset 22, -120
.cfi_offset 23, -112
.cfi_offset 24, -104
.cfi_offset 25, -96
.cfi_offset 26, -88
.cfi_offset 27, -80
str w0, [x29, 108]
str x1, [x29, 96]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [x29, 152]
mov x1, 0
mov x0, sp
mov x19, x0
ldr x0, [x29, 96]
add x0, x0, 8
ldr x0, [x0]
bl atoi
str w0, [x29, 132]
ldr w0, [x29, 132]
sxtw x1, w0
sub x1, x1, #1
str x1, [x29, 136]
sxtw x1, w0
mov x26, x1
mov x27, 0
lsr x1, x26, 59
lsl x23, x27, 5
orr x23, x1, x23
lsl x22, x26, 5
sxtw x1, w0
mov x24, x1
mov x25, 0
lsr x1, x24, 59
lsl x21, x25, 5
orr x21, x1, x21
lsl x20, x24, 5
sxtw x0, w0
lsl x0, x0, 2
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L28:
cmp sp, x1
beq .L29
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L28
.L29:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L30
str xzr, [sp, 1024]
.L30:
add x0, sp, 16
add x0, x0, 3
lsr x0, x0, 2
lsl x0, x0, 2
str x0, [x29, 144]
str wzr, [x29, 116]
mov w0, 2
str w0, [x29, 120]
b .L31
.L32:
ldrsw x0, [x29, 120]
lsl x0, x0, 3
ldr x1, [x29, 96]
add x0, x1, x0
ldr x0, [x0]
bl atoi
mov w2, w0
ldr x0, [x29, 144]
ldrsw x1, [x29, 116]
str w2, [x0, x1, lsl 2]
ldr w0, [x29, 116]
add w0, w0, 1
str w0, [x29, 116]
ldr w0, [x29, 120]
add w0, w0, 1
str w0, [x29, 120]
.L31:
ldr w1, [x29, 120]
ldr w0, [x29, 108]
cmp w1, w0
blt .L32
str wzr, [x29, 116]
str wzr, [x29, 124]
str wzr, [x29, 128]
b .L33
.L35:
ldr x0, [x29, 144]
ldrsw x1, [x29, 128]
ldr w0, [x0, x1, lsl 2]
ldr w1, [x29, 124]
cmp w1, w0
bge .L34
ldr x0, [x29, 144]
ldrsw x1, [x29, 128]
ldr w0, [x0, x1, lsl 2]
str w0, [x29, 124]
.L34:
ldr w0, [x29, 128]
add w0, w0, 1
str w0, [x29, 128]
.L33:
ldr w1, [x29, 128]
ldr w0, [x29, 132]
cmp w1, w0
blt .L35
ldr w2, [x29, 124]
ldr w1, [x29, 132]
ldr x0, [x29, 144]
bl bucked_sort
mov w0, 0
mov sp, x19
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [x29, 152]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L37
bl __stack_chk_fail
.L37:
mov w0, w1
mov sp, x29
ldp x19, x20, [sp, 16]
ldp x21, x22, [sp, 32]
ldp x23, x24, [sp, 48]
ldp x25, x26, [sp, 64]
ldr x27, [sp, 80]
ldp x29, x30, [sp], 160
.cfi_restore 30
.cfi_restore 29
.cfi_restore 27
.cfi_restore 25
.cfi_restore 26
.cfi_restore 23
.cfi_restore 24
.cfi_restore 21
.cfi_restore 22
.cfi_restore 19
.cfi_restore 20
.cfi_def_cfa 31, 0
ret
.cfi_endproc
.LFE8:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC0:
.string "unknown"
.align 3
.LC1:
.string "low"
.align 3
.LC2:
.string "full"
.align 3
.LC3:
.string "high"
.align 3
.LC4:
.string "??"
.text
.align 2
.type speed, %function
speed:
.LFB6:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str w0, [sp, 12]
ldr w0, [sp, 12]
cmp w0, 3
beq .L2
ldr w0, [sp, 12]
cmp w0, 3
bhi .L3
ldr w0, [sp, 12]
cmp w0, 2
beq .L4
ldr w0, [sp, 12]
cmp w0, 2
bhi .L3
ldr w0, [sp, 12]
cmp w0, 0
beq .L5
ldr w0, [sp, 12]
cmp w0, 1
beq .L6
b .L3
.L5:
adrp x0, .LC0
add x0, x0, :lo12:.LC0
b .L7
.L6:
adrp x0, .LC1
add x0, x0, :lo12:.LC1
b .L7
.L4:
adrp x0, .LC2
add x0, x0, :lo12:.LC2
b .L7
.L2:
adrp x0, .LC3
add x0, x0, :lo12:.LC3
b .L7
.L3:
adrp x0, .LC4
add x0, x0, :lo12:.LC4
.L7:
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE6:
.size speed, .-speed
.local testdevs
.comm testdevs,8,8
.align 2
.type is_testdev, %function
is_testdev:
.LFB7:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str x0, [sp, 8]
ldr x0, [sp, 8]
ldrh w0, [x0, 8]
cmp w0, 1351
bne .L9
ldr x0, [sp, 8]
ldrh w1, [x0, 10]
mov w0, 4098
cmp w1, w0
bne .L9
mov w0, 1
b .L10
.L9:
ldr x0, [sp, 8]
ldrh w0, [x0, 8]
cmp w0, 1351
bne .L11
ldr x0, [sp, 8]
ldrh w1, [x0, 10]
mov w0, 8757
cmp w1, w0
bne .L11
mov w0, 1
b .L10
.L11:
ldr x0, [sp, 8]
ldrh w0, [x0, 8]
cmp w0, 1204
bne .L12
ldr x0, [sp, 8]
ldrh w1, [x0, 10]
mov w0, 34323
cmp w1, w0
bne .L12
mov w0, 1
b .L10
.L12:
ldr x0, [sp, 8]
ldrh w0, [x0, 8]
cmp w0, 1351
bne .L13
ldr x0, [sp, 8]
ldrh w0, [x0, 10]
cmp w0, 128
bne .L13
mov w0, 1
b .L10
.L13:
ldr x0, [sp, 8]
ldrh w0, [x0, 8]
cmp w0, 1741
bne .L14
ldr x0, [sp, 8]
ldrh w0, [x0, 10]
cmp w0, 267
bne .L14
mov w0, 1
b .L10
.L14:
ldr x0, [sp, 8]
ldrh w0, [x0, 8]
cmp w0, 1317
bne .L15
ldr x0, [sp, 8]
ldrh w1, [x0, 10]
mov w0, 42144
cmp w1, w0
bne .L15
mov w0, 1
b .L10
.L15:
ldr x0, [sp, 8]
ldrh w0, [x0, 8]
cmp w0, 1317
bne .L16
ldr x0, [sp, 8]
ldrh w1, [x0, 10]
mov w0, 42148
cmp w1, w0
bne .L16
mov w0, 1
b .L10
.L16:
ldr x0, [sp, 8]
ldrh w0, [x0, 8]
cmp w0, 1317
bne .L17
ldr x0, [sp, 8]
ldrh w1, [x0, 10]
mov w0, 42147
cmp w1, w0
bne .L17
mov w0, 1
b .L10
.L17:
ldr x0, [sp, 8]
ldrh w1, [x0, 8]
mov w0, 65520
cmp w1, w0
bne .L18
ldr x0, [sp, 8]
ldrh w1, [x0, 10]
mov w0, 65520
cmp w1, w0
bne .L18
mov w0, 1
b .L10
.L18:
ldr x0, [sp, 8]
ldrh w0, [x0, 8]
cmp w0, 2914
bne .L19
ldr x0, [sp, 8]
ldrh w0, [x0, 10]
cmp w0, 89
bne .L19
mov w0, 1
b .L10
.L19:
mov w0, 0
.L10:
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE7:
.size is_testdev, .-is_testdev
.section .rodata
.align 3
.LC5:
.string "can't open dev file r/o"
.align 3
.LC6:
.string "short devfile read!\n"
.align 3
.LC7:
.string "no mem!\n"
.align 3
.LC8:
.string "%s speed\t%s\n"
.text
.align 2
.type find_testdev, %function
find_testdev:
.LFB8:
.cfi_startproc
stp x29, x30, [sp, -112]!
.cfi_def_cfa_offset 112
.cfi_offset 29, -112
.cfi_offset 30, -104
mov x29, sp
str x19, [sp, 16]
.cfi_offset 19, -96
str x0, [sp, 56]
str x1, [sp, 48]
str w2, [sp, 44]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 104]
mov x1, 0
ldr w0, [sp, 44]
cmp w0, 0
beq .L21
mov w0, 0
b .L29
.L21:
mov w1, 47
ldr x0, [sp, 56]
bl strrchr
add x0, x0, 1
ldrb w0, [x0]
cmp w0, 100
bne .L23
mov w0, 0
b .L29
.L23:
mov w1, 0
ldr x0, [sp, 56]
bl open
str w0, [sp, 68]
ldr w0, [sp, 68]
cmp w0, 0
bge .L24
adrp x0, .LC5
add x0, x0, :lo12:.LC5
bl perror
mov w0, 0
b .L29
.L24:
add x0, sp, 80
mov x2, 18
mov x1, x0
ldr w0, [sp, 68]
bl read
cmp x0, 18
beq .L25
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x0, [x0]
mov x3, x0
mov x2, 20
mov x1, 1
adrp x0, .LC6
add x0, x0, :lo12:.LC6
bl fwrite
b .L26
.L25:
add x0, sp, 80
bl is_testdev
cmp w0, 0
beq .L31
mov x1, 80
mov x0, 1
bl calloc
str x0, [sp, 72]
ldr x0, [sp, 72]
cmp x0, 0
bne .L27
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x0, [x0]
mov x3, x0
mov x2, 8
mov x1, 1
adrp x0, .LC7
add x0, x0, :lo12:.LC7
bl fwrite
b .L26
.L27:
ldr x0, [sp, 56]
bl strdup
mov x1, x0
ldr x0, [sp, 72]
str x1, [x0, 8]
ldr x0, [sp, 72]
ldr x0, [x0, 8]
cmp x0, 0
bne .L28
ldr x0, [sp, 72]
bl free
b .L26
.L28:
ldr x0, [sp, 72]
strb wzr, [x0, 28]
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x19, [x0]
ldr x0, [sp, 72]
ldr w0, [x0, 24]
bl speed
mov x1, x0
ldr x0, [sp, 72]
ldr x0, [x0, 8]
mov x3, x0
mov x2, x1
adrp x0, .LC8
add x1, x0, :lo12:.LC8
mov x0, x19
bl fprintf
adrp x0, testdevs
add x0, x0, :lo12:testdevs
ldr x1, [x0]
ldr x0, [sp, 72]
str x1, [x0]
adrp x0, testdevs
add x0, x0, :lo12:testdevs
ldr x1, [sp, 72]
str x1, [x0]
b .L26
.L31:
nop
.L26:
ldr w0, [sp, 68]
bl close
mov w0, 0
.L29:
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 104]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L30
bl __stack_chk_fail
.L30:
mov w0, w1
ldr x19, [sp, 16]
ldp x29, x30, [sp], 112
.cfi_restore 30
.cfi_restore 29
.cfi_restore 19
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE8:
.size find_testdev, .-find_testdev
.align 2
.type usbdev_ioctl, %function
usbdev_ioctl:
.LFB9:
.cfi_startproc
stp x29, x30, [sp, -80]!
.cfi_def_cfa_offset 80
.cfi_offset 29, -80
.cfi_offset 30, -72
mov x29, sp
str w0, [sp, 44]
str w1, [sp, 40]
str w2, [sp, 36]
str x3, [sp, 24]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 72]
mov x1, 0
ldr w0, [sp, 40]
str w0, [sp, 56]
ldr w0, [sp, 36]
str w0, [sp, 60]
ldr x0, [sp, 24]
str x0, [sp, 64]
add x0, sp, 56
mov x2, x0
mov x1, 21778
movk x1, 0xc010, lsl 16
ldr w0, [sp, 44]
bl ioctl
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 72]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L34
bl __stack_chk_fail
.L34:
mov w0, w1
ldp x29, x30, [sp], 80
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE9:
.size usbdev_ioctl, .-usbdev_ioctl
.section .rodata
.align 3
.LC9:
.string "can't open dev file r/w"
.align 3
.LC10:
.string "error %d"
.align 3
.LC11:
.string "%s test %d --> %d (%s)\n"
.align 3
.LC12:
.string "%s test %d, %4d.%.06d secs\n"
.text
.align 2
.type handle_testdev, %function
handle_testdev:
.LFB10:
.cfi_startproc
stp x29, x30, [sp, -160]!
.cfi_def_cfa_offset 160
.cfi_offset 29, -160
.cfi_offset 30, -152
mov x29, sp
str x19, [sp, 16]
.cfi_offset 19, -144
str x0, [sp, 40]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 152]
mov x1, 0
ldr x0, [sp, 40]
str x0, [sp, 64]
ldr x0, [sp, 64]
ldr x0, [x0, 8]
mov w1, 2
bl open
str w0, [sp, 52]
ldr w0, [sp, 52]
cmp w0, 0
bge .L48
adrp x0, .LC9
add x0, x0, :lo12:.LC9
bl perror
mov x0, 0
b .L37
.L48:
nop
.L36:
str wzr, [sp, 48]
b .L38
.L45:
ldr x0, [sp, 64]
ldr w0, [x0, 32]
cmn w0, #1
beq .L39
ldr x0, [sp, 64]
ldr w0, [x0, 32]
ldr w1, [sp, 48]
cmp w1, w0
bne .L49
.L39:
ldr w1, [sp, 48]
ldr x0, [sp, 64]
str w1, [x0, 40]
ldr x0, [sp, 64]
ldrb w0, [x0, 28]
mov w1, w0
ldr x0, [sp, 64]
add x0, x0, 40
mov x3, x0
mov w2, 21860
movk w2, 0xc028, lsl 16
ldr w0, [sp, 52]
bl usbdev_ioctl
str w0, [sp, 56]
ldr w0, [sp, 56]
cmp w0, 0
bge .L41
bl __errno_location
ldr w0, [x0]
cmp w0, 95
beq .L50
.L41:
ldr w0, [sp, 56]
cmp w0, 0
bge .L42
bl __errno_location
ldr w0, [x0]
str w0, [sp, 60]
bl __errno_location
ldr w0, [x0]
add x1, sp, 72
mov x2, 80
bl __xpg_strerror_r
cmp w0, 0
beq .L43
add x4, sp, 72
ldr w3, [sp, 60]
adrp x0, .LC10
add x2, x0, :lo12:.LC10
mov x1, 80
mov x0, x4
bl snprintf
bl __errno_location
mov x1, x0
ldr w0, [sp, 60]
str w0, [x1]
.L43:
ldr x0, [sp, 64]
ldr x19, [x0, 8]
bl __errno_location
ldr w0, [x0]
add x1, sp, 72
mov x4, x1
mov w3, w0
ldr w2, [sp, 48]
mov x1, x19
adrp x0, .LC11
add x0, x0, :lo12:.LC11
bl printf
b .L44
.L42:
ldr x0, [sp, 64]
ldr x1, [x0, 8]
ldr x0, [sp, 64]
ldr x0, [x0, 64]
mov w2, w0
ldr x0, [sp, 64]
ldr x0, [x0, 72]
mov w4, w0
mov w3, w2
ldr w2, [sp, 48]
adrp x0, .LC12
add x0, x0, :lo12:.LC12
bl printf
.L44:
adrp x0, :got:stdout
ldr x0, [x0, #:got_lo12:stdout]
ldr x0, [x0]
bl fflush
b .L40
.L49:
nop
b .L40
.L50:
nop
.L40:
ldr w0, [sp, 48]
add w0, w0, 1
str w0, [sp, 48]
.L38:
ldr w0, [sp, 48]
cmp w0, 29
ble .L45
ldr x0, [sp, 64]
ldrh w0, [x0, 28]
and w0, w0, 256
and w0, w0, 65535
cmp w0, 0
beq .L46
b .L36
.L46:
ldr w0, [sp, 52]
bl close
ldr x0, [sp, 40]
.L37:
mov x1, x0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 152]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L47
bl __stack_chk_fail
.L47:
mov x0, x1
ldr x19, [sp, 16]
ldp x29, x30, [sp], 160
.cfi_restore 30
.cfi_restore 29
.cfi_restore 19
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE10:
.size handle_testdev, .-handle_testdev
.section .rodata
.align 3
.LC13:
.string "DEVICE"
.align 3
.LC14:
.string "usage: %s [-an] [-D dev]\n\t[-c iterations] [-t testnum]\n\t[-s packetsize] [-g sglen] [-v vary]\n"
.align 3
.LC15:
.string "D:ac:g:hns:t:v:"
.align 3
.LC16:
.string "must specify '-a' or '-D dev', or DEVICE=/proc/bus/usb/BBB/DDD in env\n"
.align 3
.LC17:
.string "/proc/bus/usb/devices"
.align 3
.LC18:
.string "usbfs files are missing\n"
.align 3
.LC19:
.string "/proc/bus/usb"
.align 3
.LC20:
.string "ftw failed; is usbfs missing?\n"
.align 3
.LC21:
.string "no test devices recognized\n"
.align 3
.LC22:
.string "pthread_create"
.align 3
.LC23:
.string "%s: %s may see only control tests\n"
.align 3
.LC24:
.string "pthread_join"
.text
.align 2
.global main
.type main, %function
main:
.LFB11:
.cfi_startproc
stp x29, x30, [sp, -208]!
.cfi_def_cfa_offset 208
.cfi_offset 29, -208
.cfi_offset 30, -200
mov x29, sp
str w0, [sp, 28]
str x1, [sp, 16]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 200]
mov x1, 0
str wzr, [sp, 40]
str wzr, [sp, 44]
str wzr, [sp, 48]
mov w0, -1
str w0, [sp, 52]
mov w0, 1000
str w0, [sp, 84]
mov w0, 512
str w0, [sp, 88]
mov w0, 512
str w0, [sp, 92]
mov w0, 32
str w0, [sp, 96]
adrp x0, .LC13
add x0, x0, :lo12:.LC13
bl getenv
str x0, [sp, 72]
b .L52
.L65:
ldr w0, [sp, 56]
cmp w0, 118
beq .L53
ldr w0, [sp, 56]
cmp w0, 118
bgt .L54
ldr w0, [sp, 56]
cmp w0, 116
beq .L55
ldr w0, [sp, 56]
cmp w0, 116
bgt .L54
ldr w0, [sp, 56]
cmp w0, 115
beq .L56
ldr w0, [sp, 56]
cmp w0, 115
bgt .L54
ldr w0, [sp, 56]
cmp w0, 110
beq .L57
ldr w0, [sp, 56]
cmp w0, 110
bgt .L54
ldr w0, [sp, 56]
cmp w0, 108
beq .L58
ldr w0, [sp, 56]
cmp w0, 108
bgt .L54
ldr w0, [sp, 56]
cmp w0, 103
beq .L59
ldr w0, [sp, 56]
cmp w0, 103
bgt .L54
ldr w0, [sp, 56]
cmp w0, 99
beq .L60
ldr w0, [sp, 56]
cmp w0, 99
bgt .L54
ldr w0, [sp, 56]
cmp w0, 68
beq .L61
ldr w0, [sp, 56]
cmp w0, 97
beq .L62
b .L54
.L61:
adrp x0, :got:optarg
ldr x0, [x0, #:got_lo12:optarg]
ldr x0, [x0]
str x0, [sp, 72]
b .L52
.L62:
str xzr, [sp, 72]
mov w0, 1
str w0, [sp, 40]
b .L52
.L60:
adrp x0, :got:optarg
ldr x0, [x0, #:got_lo12:optarg]
ldr x0, [x0]
bl atoi
str w0, [sp, 84]
b .L52
.L59:
adrp x0, :got:optarg
ldr x0, [x0, #:got_lo12:optarg]
ldr x0, [x0]
bl atoi
str w0, [sp, 96]
b .L52
.L58:
mov w0, 1
str w0, [sp, 44]
b .L52
.L57:
mov w0, 1
str w0, [sp, 48]
b .L52
.L56:
adrp x0, :got:optarg
ldr x0, [x0, #:got_lo12:optarg]
ldr x0, [x0]
bl atoi
str w0, [sp, 88]
b .L52
.L55:
adrp x0, :got:optarg
ldr x0, [x0, #:got_lo12:optarg]
ldr x0, [x0]
bl atoi
str w0, [sp, 52]
ldr w0, [sp, 52]
cmp w0, 0
blt .L84
b .L52
.L53:
adrp x0, :got:optarg
ldr x0, [x0, #:got_lo12:optarg]
ldr x0, [x0]
bl atoi
str w0, [sp, 92]
b .L52
.L84:
nop
b .L54
.L85:
nop
.L54:
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x3, [x0]
ldr x0, [sp, 16]
ldr x0, [x0]
mov x2, x0
adrp x0, .LC14
add x1, x0, :lo12:.LC14
mov x0, x3
bl fprintf
mov w0, 1
b .L82
.L52:
adrp x0, .LC15
add x2, x0, :lo12:.LC15
ldr x1, [sp, 16]
ldr w0, [sp, 28]
bl getopt
str w0, [sp, 56]
ldr w0, [sp, 56]
cmn w0, #1
bne .L65
adrp x0, :got:optind
ldr x0, [x0, #:got_lo12:optind]
ldr w0, [x0]
ldr w1, [sp, 28]
cmp w1, w0
bne .L85
ldr w0, [sp, 40]
cmp w0, 0
bne .L67
ldr x0, [sp, 72]
cmp x0, 0
bne .L67
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x0, [x0]
mov x3, x0
mov x2, 70
mov x1, 1
adrp x0, .LC16
add x0, x0, :lo12:.LC16
bl fwrite
b .L54
.L67:
mov w1, 0
adrp x0, .LC17
add x0, x0, :lo12:.LC17
bl open
str w0, [sp, 56]
ldr w0, [sp, 56]
cmp w0, 0
bge .L68
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x0, [x0]
mov x3, x0
mov x2, 24
mov x1, 1
adrp x0, .LC18
add x0, x0, :lo12:.LC18
bl fwrite
mov w0, -1
b .L82
.L68:
mov w2, 3
adrp x0, find_testdev
add x1, x0, :lo12:find_testdev
adrp x0, .LC19
add x0, x0, :lo12:.LC19
bl ftw
cmp w0, 0
beq .L69
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x0, [x0]
mov x3, x0
mov x2, 30
mov x1, 1
adrp x0, .LC20
add x0, x0, :lo12:.LC20
bl fwrite
mov w0, -1
b .L82
.L69:
adrp x0, testdevs
add x0, x0, :lo12:testdevs
ldr x0, [x0]
cmp x0, 0
bne .L70
ldr x0, [sp, 72]
cmp x0, 0
bne .L70
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x0, [x0]
mov x3, x0
mov x2, 27
mov x1, 1
adrp x0, .LC21
add x0, x0, :lo12:.LC21
bl fwrite
mov w0, -1
b .L82
.L70:
ldr w0, [sp, 48]
cmp w0, 0
beq .L71
mov w0, 0
b .L82
.L71:
adrp x0, testdevs
add x0, x0, :lo12:testdevs
ldr x0, [x0]
cmp x0, 0
beq .L72
adrp x0, testdevs
add x0, x0, :lo12:testdevs
ldr x0, [x0]
ldr x0, [x0]
cmp x0, 0
bne .L72
ldr x0, [sp, 72]
cmp x0, 0
bne .L72
adrp x0, testdevs
add x0, x0, :lo12:testdevs
ldr x0, [x0]
ldr x0, [x0, 8]
str x0, [sp, 72]
.L72:
adrp x0, testdevs
add x0, x0, :lo12:testdevs
ldr x0, [x0]
str x0, [sp, 64]
b .L73
.L77:
ldr x0, [sp, 64]
add x0, x0, 40
mov x1, x0
add x0, sp, 80
ldp q0, q1, [x0]
stp q0, q1, [x1]
ldr x0, [x0, 32]
str x0, [x1, 32]
ldr w0, [sp, 44]
and w0, w0, 1
and w2, w0, 255
ldr x1, [sp, 64]
ldrh w0, [x1, 28]
bfi w0, w2, 8, 1
strh w0, [x1, 28]
ldr x0, [sp, 64]
ldr w1, [sp, 52]
str w1, [x0, 32]
ldr x0, [sp, 72]
cmp x0, 0
beq .L74
ldr x0, [sp, 64]
ldr x0, [x0, 8]
ldr x1, [sp, 72]
bl strcmp
cmp w0, 0
bne .L86
ldr x0, [sp, 64]
bl handle_testdev
mov x1, x0
ldr x0, [sp, 64]
cmp x0, x1
cset w0, ne
and w0, w0, 255
b .L82
.L74:
ldr x0, [sp, 64]
add x4, x0, 16
ldr x3, [sp, 64]
adrp x0, handle_testdev
add x2, x0, :lo12:handle_testdev
mov x1, 0
mov x0, x4
bl pthread_create
str w0, [sp, 60]
ldr w0, [sp, 60]
cmp w0, 0
beq .L76
adrp x0, .LC22
add x0, x0, :lo12:.LC22
bl perror
b .L76
.L86:
nop
.L76:
ldr x0, [sp, 64]
ldr x0, [x0]
str x0, [sp, 64]
.L73:
ldr x0, [sp, 64]
cmp x0, 0
bne .L77
ldr x0, [sp, 72]
cmp x0, 0
beq .L78
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x4, [x0]
ldr x0, [sp, 16]
ldr x0, [x0]
ldr x3, [sp, 72]
mov x2, x0
adrp x0, .LC23
add x1, x0, :lo12:.LC23
mov x0, x4
bl fprintf
add x0, sp, 120
mov x2, 80
mov w1, 0
bl memset
ldr x0, [sp, 72]
str x0, [sp, 128]
add x0, sp, 160
add x1, sp, 80
ldp q0, q1, [x1]
stp q0, q1, [x0]
ldr x1, [x1, 32]
str x1, [x0, 32]
ldr w0, [sp, 44]
and w0, w0, 1
and w1, w0, 255
ldrh w0, [sp, 148]
bfi w0, w1, 8, 1
strh w0, [sp, 148]
ldr w0, [sp, 52]
str w0, [sp, 152]
add x0, sp, 120
bl handle_testdev
mov x1, x0
add x0, sp, 120
cmp x1, x0
cset w0, ne
and w0, w0, 255
b .L82
.L78:
adrp x0, testdevs
add x0, x0, :lo12:testdevs
ldr x0, [x0]
str x0, [sp, 64]
b .L79
.L81:
ldr x0, [sp, 64]
ldr x0, [x0, 16]
add x1, sp, 120
bl pthread_join
cmp w0, 0
beq .L80
adrp x0, .LC24
add x0, x0, :lo12:.LC24
bl perror
.L80:
ldr x0, [sp, 64]
ldr x0, [x0]
str x0, [sp, 64]
.L79:
ldr x0, [sp, 64]
cmp x0, 0
bne .L81
mov w0, 0
.L82:
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 200]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L83
bl __stack_chk_fail
.L83:
mov w0, w1
ldp x29, x30, [sp], 208
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE11:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global celToFahr
.type celToFahr, %function
celToFahr:
.LFB0:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str w0, [sp, 12]
ldr w0, [sp, 12]
scvtf d0, w0
adrp x0, .LC0
ldr d1, [x0, #:lo12:.LC0]
fmul d0, d0, d1
mov x0, 4629700416936869888
fmov d1, x0
fadd d0, d0, d1
fcvt s0, d0
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size celToFahr, .-celToFahr
.section .rodata
.align 3
.LC1:
.string "Celcius\t Fahr"
.align 3
.LC2:
.string "%3d\t%6.f\n"
.text
.align 2
.global main
.type main, %function
main:
.LFB1:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl puts
mov w0, -10
str w0, [sp, 28]
b .L4
.L5:
ldr w0, [sp, 28]
bl celToFahr
fcvt d0, s0
ldr w1, [sp, 28]
adrp x0, .LC2
add x0, x0, :lo12:.LC2
bl printf
ldr w0, [sp, 28]
add w0, w0, 5
str w0, [sp, 28]
.L4:
ldr w0, [sp, 28]
cmp w0, 40
ble .L5
mov w0, 0
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE1:
.size main, .-main
.section .rodata
.align 3
.LC0:
.word -858993459
.word 1073532108
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC0:
.string ", "
.text
.align 2
.global printComma
.type printComma, %function
printComma:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -16]!
.cfi_def_cfa_offset 16
.cfi_offset 29, -16
.cfi_offset 30, -8
mov x29, sp
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl printf
nop
ldp x29, x30, [sp], 16
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size printComma, .-printComma
.section .rodata
.align 3
.LC1:
.string "Hello"
.align 3
.LC2:
.string "world!"
.text
.align 2
.global main
.type main, %function
main:
.LFB1:
.cfi_startproc
stp x29, x30, [sp, -16]!
.cfi_def_cfa_offset 16
.cfi_offset 29, -16
.cfi_offset 30, -8
mov x29, sp
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl printf
bl printComma
adrp x0, .LC2
add x0, x0, :lo12:.LC2
bl puts
mov w0, 0
ldp x29, x30, [sp], 16
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE1:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC0:
.string "Escreva o nome do %do doador: "
.align 3
.LC1:
.string "%s"
.align 3
.LC2:
.string "Qual o tipo sanguineo do doador? "
.align 3
.LC3:
.string "O peso do doador: "
.align 3
.LC4:
.string "%f"
.align 3
.LC5:
.string "Quantos meses desde a ultima doacao? "
.align 3
.LC6:
.string "%d"
.align 3
.LC7:
.string "-----------------------------"
.align 3
.LC8:
.string "o doador %s pode doar e tem eh do tipo %s\n"
.align 3
.LC9:
.string "o doador %s nao pode doar\n"
.text
.align 2
.global main
.type main, %function
main:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -80]!
.cfi_def_cfa_offset 80
.cfi_offset 29, -80
.cfi_offset 30, -72
mov x29, sp
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 72]
mov x1, 0
mov w0, 1
str w0, [sp, 36]
b .L2
.L6:
ldr w1, [sp, 36]
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl printf
add x0, sp, 48
mov x1, x0
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl __isoc99_scanf
adrp x0, .LC2
add x0, x0, :lo12:.LC2
bl printf
add x0, sp, 40
mov x1, x0
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl __isoc99_scanf
adrp x0, .LC3
add x0, x0, :lo12:.LC3
bl printf
add x0, sp, 32
mov x1, x0
adrp x0, .LC4
add x0, x0, :lo12:.LC4
bl __isoc99_scanf
adrp x0, .LC5
add x0, x0, :lo12:.LC5
bl printf
add x0, sp, 28
mov x1, x0
adrp x0, .LC6
add x0, x0, :lo12:.LC6
bl __isoc99_scanf
adrp x0, .LC7
add x0, x0, :lo12:.LC7
bl puts
ldr s0, [sp, 32]
mov w0, 1112014848
fmov s1, w0
fcmpe s0, s1
bge .L9
b .L3
.L9:
ldr w0, [sp, 28]
cmp w0, 5
ble .L3
add x1, sp, 40
add x0, sp, 48
mov x2, x1
mov x1, x0
adrp x0, .LC8
add x0, x0, :lo12:.LC8
bl printf
adrp x0, .LC7
add x0, x0, :lo12:.LC7
bl puts
b .L5
.L3:
add x0, sp, 48
mov x1, x0
adrp x0, .LC9
add x0, x0, :lo12:.LC9
bl printf
adrp x0, .LC7
add x0, x0, :lo12:.LC7
bl puts
.L5:
ldr w0, [sp, 36]
add w0, w0, 1
str w0, [sp, 36]
.L2:
ldr w0, [sp, 36]
cmp w0, 5
ble .L6
mov w0, 0
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 72]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L8
bl __stack_chk_fail
.L8:
mov w0, w1
ldp x29, x30, [sp], 80
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.global dim_version
.section .rodata
.align 3
.type dim_version, %object
.size dim_version, 8
dim_version:
.string "DIM/1.0"
.global dim_request_kw
.align 3
.type dim_request_kw, %object
.size dim_request_kw, 8
dim_request_kw:
.string "CONTENT"
.global dim_request_par
.align 3
.type dim_request_par, %object
.size dim_request_par, 6
dim_request_par:
.string "Path:"
.global dim_del
.align 3
.type dim_del, %object
.size dim_del, 3
dim_del:
.string "\r\n"
.global dim_end
.align 3
.type dim_end, %object
.size dim_end, 5
dim_end:
.string "\r\n\r\n"
.global dim_request_format
.align 3
.type dim_request_format, %object
.size dim_request_format, 15
dim_request_format:
.string "%s %s%s%s %s%s"
.global dim_response_header_format
.align 3
.type dim_response_header_format, %object
.size dim_response_header_format, 8
dim_response_header_format:
.string "%s %d%s"
.global dim_request_pattern
.align 3
.type dim_request_pattern, %object
.size dim_request_pattern, 19
dim_request_pattern:
.string "^%s %s%s%s (.*)%s$"
.global dim_response_pattern
.align 3
.type dim_response_pattern, %object
.size dim_response_pattern, 26
dim_response_pattern:
.string "^%s ([0-9]{1,2})%s(.*)%s$"
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global helper
.type helper, %function
helper:
.LFB6:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str x0, [sp, 8]
str x1, [sp]
str wzr, [sp, 28]
mov w0, 1
str w0, [sp, 16]
b .L2
.L8:
str wzr, [sp, 24]
ldr w0, [sp, 16]
str w0, [sp, 20]
b .L3
.L6:
ldrsw x0, [sp, 20]
ldr x1, [sp, 8]
add x0, x1, x0
ldrb w1, [x0]
ldrsw x0, [sp, 24]
ldr x2, [sp]
add x0, x2, x0
ldrb w0, [x0]
cmp w1, w0
bne .L10
ldr w0, [sp, 24]
add w0, w0, 1
str w0, [sp, 24]
ldr w0, [sp, 20]
add w0, w0, 1
str w0, [sp, 20]
.L3:
ldrsw x0, [sp, 20]
ldr x1, [sp, 8]
add x0, x1, x0
ldrb w0, [x0]
cmp w0, 0
beq .L5
ldrsw x0, [sp, 24]
ldr x1, [sp]
add x0, x1, x0
ldrb w0, [x0]
cmp w0, 0
bne .L6
b .L5
.L10:
nop
.L5:
ldr w1, [sp, 24]
ldr w0, [sp, 28]
cmp w1, w0
ble .L7
ldr w0, [sp, 24]
str w0, [sp, 28]
.L7:
ldr w0, [sp, 16]
add w0, w0, 1
str w0, [sp, 16]
.L2:
ldrsw x0, [sp, 16]
ldr x1, [sp, 8]
add x0, x1, x0
ldrb w0, [x0]
cmp w0, 0
bne .L8
ldr w0, [sp, 28]
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE6:
.size helper, .-helper
.align 2
.global append
.type append, %function
append:
.LFB7:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 40]
str x1, [sp, 32]
str w2, [sp, 28]
ldrsw x0, [sp, 28]
ldr x1, [sp, 40]
add x0, x1, x0
strb wzr, [x0]
mov x2, 10000
ldr x1, [sp, 32]
ldr x0, [sp, 40]
bl strncat
ldr x0, [sp, 32]
strb wzr, [x0]
nop
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE7:
.size append, .-append
.section .rodata
.align 3
.LC0:
.string "%lu\n"
.text
.align 2
.global super
.type super, %function
super:
.LFB8:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str x0, [sp, 24]
str w1, [sp, 20]
mov w0, 1
str w0, [sp, 32]
b .L13
.L19:
mov w0, -1
str w0, [sp, 36]
str wzr, [sp, 48]
b .L14
.L18:
str wzr, [sp, 52]
b .L15
.L17:
ldr w1, [sp, 48]
ldr w0, [sp, 52]
cmp w1, w0
beq .L16
ldrsw x0, [sp, 48]
lsl x0, x0, 3
ldr x1, [sp, 24]
add x0, x1, x0
ldr x0, [x0]
ldrb w0, [x0]
cmp w0, 0
beq .L16
ldrsw x0, [sp, 52]
lsl x0, x0, 3
ldr x1, [sp, 24]
add x0, x1, x0
ldr x0, [x0]
ldrb w0, [x0]
cmp w0, 0
beq .L16
ldrsw x0, [sp, 48]
lsl x0, x0, 3
ldr x1, [sp, 24]
add x0, x1, x0
ldr x2, [x0]
ldrsw x0, [sp, 52]
lsl x0, x0, 3
ldr x1, [sp, 24]
add x0, x1, x0
ldr x0, [x0]
mov x1, x0
mov x0, x2
bl helper
str w0, [sp, 60]
ldr w1, [sp, 60]
ldr w0, [sp, 36]
cmp w1, w0
ble .L16
ldr w0, [sp, 60]
str w0, [sp, 36]
ldr w0, [sp, 48]
str w0, [sp, 40]
ldr w0, [sp, 52]
str w0, [sp, 44]
.L16:
ldr w0, [sp, 52]
add w0, w0, 1
str w0, [sp, 52]
.L15:
ldr w1, [sp, 52]
ldr w0, [sp, 20]
cmp w1, w0
blt .L17
ldr w0, [sp, 48]
add w0, w0, 1
str w0, [sp, 48]
.L14:
ldr w1, [sp, 48]
ldr w0, [sp, 20]
cmp w1, w0
blt .L18
ldrsw x0, [sp, 40]
lsl x0, x0, 3
ldr x1, [sp, 24]
add x0, x1, x0
ldr x0, [x0]
bl strlen
mov w1, w0
ldr w0, [sp, 36]
sub w0, w1, w0
str w0, [sp, 56]
ldrsw x0, [sp, 40]
lsl x0, x0, 3
ldr x1, [sp, 24]
add x0, x1, x0
ldr x3, [x0]
ldrsw x0, [sp, 44]
lsl x0, x0, 3
ldr x1, [sp, 24]
add x0, x1, x0
ldr x0, [x0]
ldr w2, [sp, 56]
mov x1, x0
mov x0, x3
bl append
ldr w0, [sp, 32]
add w0, w0, 1
str w0, [sp, 32]
.L13:
ldr w1, [sp, 32]
ldr w0, [sp, 20]
cmp w1, w0
blt .L19
ldrsw x0, [sp, 40]
lsl x0, x0, 3
ldr x1, [sp, 24]
add x0, x1, x0
ldr x0, [x0]
bl strlen
mov x1, x0
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl printf
mov w0, 0
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE8:
.size super, .-super
.section .rodata
.align 3
.LC1:
.string "%d"
.align 3
.LC2:
.string "%s"
.text
.align 2
.global main
.type main, %function
main:
.LFB9:
.cfi_startproc
stp x29, x30, [sp, -80]!
.cfi_def_cfa_offset 80
.cfi_offset 29, -80
.cfi_offset 30, -72
mov x29, sp
str x19, [sp, 16]
.cfi_offset 19, -64
str w0, [sp, 44]
str x1, [sp, 32]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 72]
mov x1, 0
add x0, sp, 56
mov x1, x0
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl __isoc99_scanf
ldr w0, [sp, 56]
sxtw x0, w0
lsl x0, x0, 3
bl malloc
str x0, [sp, 64]
str wzr, [sp, 60]
b .L22
.L23:
ldrsw x0, [sp, 60]
lsl x0, x0, 3
ldr x1, [sp, 64]
add x19, x1, x0
mov x0, 10000
bl malloc
str x0, [x19]
ldrsw x0, [sp, 60]
lsl x0, x0, 3
ldr x1, [sp, 64]
add x0, x1, x0
ldr x0, [x0]
mov x1, x0
adrp x0, .LC2
add x0, x0, :lo12:.LC2
bl __isoc99_scanf
ldr w0, [sp, 60]
add w0, w0, 1
str w0, [sp, 60]
.L22:
ldr w0, [sp, 56]
ldr w1, [sp, 60]
cmp w1, w0
blt .L23
ldr w0, [sp, 56]
mov w1, w0
ldr x0, [sp, 64]
bl super
str wzr, [sp, 60]
b .L24
.L25:
ldrsw x0, [sp, 60]
lsl x0, x0, 3
ldr x1, [sp, 64]
add x0, x1, x0
ldr x0, [x0]
bl free
ldr w0, [sp, 60]
add w0, w0, 1
str w0, [sp, 60]
.L24:
ldr w0, [sp, 56]
ldr w1, [sp, 60]
cmp w1, w0
blt .L25
ldr x0, [sp, 64]
bl free
mov w0, 0
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 72]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L27
bl __stack_chk_fail
.L27:
mov w0, w1
ldr x19, [sp, 16]
ldp x29, x30, [sp], 80
.cfi_restore 30
.cfi_restore 29
.cfi_restore 19
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE9:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC0:
.string "Portuguese"
.align 3
.LC1:
.string "Nota do Aluno 1: "
.align 3
.LC2:
.string "%f"
.align 3
.LC3:
.string "Nota do Aluno 2: "
.align 3
.LC4:
.string "Aluno Aprovado"
.align 3
.LC5:
.string "Parab\303\251ns"
.align 3
.LC6:
.string "Aluno de exame"
.align 3
.LC7:
.string "Aproveite esta oportunidade"
.align 3
.LC8:
.string "Aluno Reprovado"
.align 3
.LC9:
.string "Estude mais"
.text
.align 2
.global main
.type main, %function
main:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 40]
mov x1, 0
str wzr, [sp, 36]
adrp x0, .LC0
add x1, x0, :lo12:.LC0
mov w0, 6
bl setlocale
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl printf
add x0, sp, 28
mov x1, x0
adrp x0, .LC2
add x0, x0, :lo12:.LC2
bl __isoc99_scanf
adrp x0, .LC3
add x0, x0, :lo12:.LC3
bl printf
add x0, sp, 32
mov x1, x0
adrp x0, .LC2
add x0, x0, :lo12:.LC2
bl __isoc99_scanf
ldr s1, [sp, 28]
ldr s0, [sp, 32]
fadd s1, s1, s0
fmov s0, 2.0e+0
fdiv s0, s1, s0
str s0, [sp, 36]
ldr s1, [sp, 36]
fmov s0, 7.0e+0
fcmpe s1, s0
bge .L10
b .L13
.L10:
adrp x0, .LC4
add x0, x0, :lo12:.LC4
bl puts
adrp x0, .LC5
add x0, x0, :lo12:.LC5
bl puts
b .L4
.L13:
ldr s1, [sp, 36]
fmov s0, 5.0e+0
fcmpe s1, s0
bge .L11
b .L5
.L11:
ldr s1, [sp, 36]
fmov s0, 7.0e+0
fcmpe s1, s0
bmi .L12
b .L5
.L12:
adrp x0, .LC6
add x0, x0, :lo12:.LC6
bl puts
adrp x0, .LC7
add x0, x0, :lo12:.LC7
bl puts
b .L4
.L5:
adrp x0, .LC8
add x0, x0, :lo12:.LC8
bl puts
adrp x0, .LC9
add x0, x0, :lo12:.LC9
bl puts
.L4:
mov w0, 0
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 40]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L9
bl __stack_chk_fail
.L9:
mov w0, w1
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global main
.type main, %function
main:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -16]!
.cfi_def_cfa_offset 16
.cfi_offset 29, -16
.cfi_offset 30, -8
mov x29, sp
bl imp_lib1
ldp x29, x30, [sp], 16
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC0:
.string "%i"
.text
.align 2
.global main
.type main, %function
main:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
mov w0, -1
str w0, [sp, 28]
ldr w1, [sp, 28]
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl printf
nop
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC0:
.string "Enter numerical grade: "
.align 3
.LC1:
.string "%d"
.align 3
.LC2:
.string "ERROR: Invalid Grade"
.align 3
.LC3:
.string "Letter Grade: "
.align 3
.LC4:
.string "A"
.align 3
.LC5:
.string "B"
.align 3
.LC6:
.string "C"
.align 3
.LC7:
.string "D"
.align 3
.LC8:
.string "F"
.text
.align 2
.global main
.type main, %function
main:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 24]
mov x1, 0
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl printf
add x0, sp, 20
mov x1, x0
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl __isoc99_scanf
ldr w0, [sp, 20]
cmp w0, 0
blt .L2
ldr w0, [sp, 20]
cmp w0, 100
ble .L3
.L2:
adrp x0, .LC2
add x0, x0, :lo12:.LC2
bl puts
b .L4
.L3:
adrp x0, .LC3
add x0, x0, :lo12:.LC3
bl printf
ldr w0, [sp, 20]
mov w1, 26215
movk w1, 0x6666, lsl 16
smull x1, w0, w1
lsr x1, x1, 32
asr w1, w1, 2
asr w0, w0, 31
sub w0, w1, w0
cmp w0, 10
bgt .L5
cmp w0, 9
bge .L6
cmp w0, 8
beq .L7
cmp w0, 8
bgt .L5
cmp w0, 6
beq .L8
cmp w0, 7
beq .L9
b .L5
.L6:
adrp x0, .LC4
add x0, x0, :lo12:.LC4
bl puts
b .L4
.L7:
adrp x0, .LC5
add x0, x0, :lo12:.LC5
bl puts
b .L4
.L9:
adrp x0, .LC6
add x0, x0, :lo12:.LC6
bl puts
b .L4
.L8:
adrp x0, .LC7
add x0, x0, :lo12:.LC7
bl puts
b .L4
.L5:
adrp x0, .LC8
add x0, x0, :lo12:.LC8
bl puts
nop
.L4:
mov w0, 0
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 24]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L11
bl __stack_chk_fail
.L11:
mov w0, w1
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global example
.type example, %function
example:
.LFB0:
.cfi_startproc
sub sp, sp, #48
.cfi_def_cfa_offset 48
str x0, [sp, 24]
str x1, [sp, 16]
str w2, [sp, 12]
str wzr, [sp, 40]
str wzr, [sp, 44]
b .L2
.L3:
ldr w0, [sp, 40]
lsl x0, x0, 2
ldr x1, [sp, 24]
add x0, x1, x0
ldr s1, [x0]
ldr w0, [sp, 44]
lsl x0, x0, 2
ldr x1, [sp, 16]
add x0, x1, x0
fmov s0, 1.0e+0
fadd s0, s1, s0
str s0, [x0]
ldr w0, [sp, 40]
add w0, w0, 1
str w0, [sp, 40]
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L2:
ldr w1, [sp, 44]
ldr w0, [sp, 12]
cmp w1, w0
bcc .L3
nop
nop
add sp, sp, 48
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size example, .-example
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global main
.type main, %function
main:
.LFB0:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
mov w0, -1
strb w0, [sp, 14]
mov w0, 35
strb w0, [sp, 14]
mov w0, 1
strb w0, [sp, 14]
mov w0, 1
strb w0, [sp, 14]
mov w0, 65
strb w0, [sp, 14]
mov w0, -1
strb w0, [sp, 15]
mov w0, 35
strb w0, [sp, 15]
mov w0, 1
strb w0, [sp, 15]
mov w0, 1
strb w0, [sp, 15]
mov w0, 65
strb w0, [sp, 15]
mov w0, 0
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC0:
.string "program.c"
.align 3
.LC1:
.string "next == 4660046610375530309ULL"
.text
.align 2
.global main
.type main, %function
main:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str xzr, [sp, 24]
mov x0, 1
str x0, [sp, 32]
str xzr, [sp, 40]
b .L2
.L3:
ldr x1, [sp, 24]
ldr x0, [sp, 32]
add x0, x1, x0
str x0, [sp, 40]
ldr x0, [sp, 32]
str x0, [sp, 24]
ldr x0, [sp, 40]
str x0, [sp, 32]
.L2:
ldr x1, [sp, 40]
mov x0, 4611686018427387903
cmp x1, x0
bls .L3
ldr x1, [sp, 40]
mov x0, 22341
movk x0, 0xc032, lsl 16
movk x0, 0xcfb3, lsl 32
movk x0, 0x40ab, lsl 48
cmp x1, x0
beq .L4
adrp x0, __PRETTY_FUNCTION__.0
add x3, x0, :lo12:__PRETTY_FUNCTION__.0
mov w2, 13
adrp x0, .LC0
add x1, x0, :lo12:.LC0
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl __assert_fail
.L4:
mov w0, 0
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size main, .-main
.section .rodata
.align 3
.type __PRETTY_FUNCTION__.0, %object
.size __PRETTY_FUNCTION__.0, 5
__PRETTY_FUNCTION__.0:
.string "main"
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global rsnset
.type rsnset, %function
rsnset:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -80]!
.cfi_def_cfa_offset 80
.cfi_offset 29, -80
.cfi_offset 30, -72
mov x29, sp
str d8, [sp, 16]
.cfi_offset 72, -64
str s0, [sp, 60]
str s1, [sp, 56]
str s2, [sp, 52]
str s3, [sp, 48]
str s4, [sp, 44]
str x0, [sp, 32]
ldr s0, [sp, 44]
fcmp s0, #0.0
bne .L2
ldr x0, [sp, 32]
add x0, x0, 16
str wzr, [x0]
ldr x0, [sp, 32]
add x0, x0, 12
str wzr, [x0]
.L2:
ldr s0, [sp, 52]
fcvt d0, s0
adrp x0, .LC0
ldr d1, [x0, #:lo12:.LC0]
fmul d1, d0, d1
ldr s0, [sp, 60]
fcvt d0, s0
fdiv d0, d1, d0
bl exp
ldr x0, [sp, 32]
add x0, x0, 8
fcvt s0, d0
str s0, [x0]
ldr x0, [sp, 32]
add x0, x0, 8
ldr s0, [x0]
fmov s1, 1.0e+0
fsub s0, s1, s0
str s0, [sp, 72]
ldr x0, [sp, 32]
add x0, x0, 8
ldr s1, [x0]
fmov s0, 1.0e+0
fadd s0, s1, s0
str s0, [sp, 76]
ldr x0, [sp, 32]
add x0, x0, 8
ldr s0, [x0]
fcvt d1, s0
fmov d0, 4.0e+0
fmul d1, d1, d0
ldr s0, [sp, 76]
fcvt d0, s0
fdiv d8, d1, d0
ldr s0, [sp, 56]
fcvt d0, s0
adrp x0, .LC1
ldr d1, [x0, #:lo12:.LC1]
fmul d1, d0, d1
ldr s0, [sp, 60]
fcvt d0, s0
fdiv d0, d1, d0
bl cos
fcvt s0, d0
fcvt d0, s0
fmul d0, d8, d0
ldr x0, [sp, 32]
add x0, x0, 4
fcvt s0, d0
str s0, [x0]
ldr s0, [sp, 48]
fcmpe s0, #0.0
bmi .L7
b .L3
.L7:
ldr x0, [sp, 32]
fmov s0, 1.0e+0
str s0, [x0]
.L3:
ldr s0, [sp, 48]
fcmp s0, #0.0
beq .L5
ldr s0, [sp, 76]
ldr s1, [sp, 72]
fdiv s1, s1, s0
ldr s0, [sp, 76]
fmul s2, s0, s0
ldr x0, [sp, 32]
add x0, x0, 4
ldr s3, [x0]
ldr x0, [sp, 32]
add x0, x0, 4
ldr s0, [x0]
fmul s0, s3, s0
fsub s0, s2, s0
fmul s0, s1, s0
fcvt d0, s0
bl sqrt
fcvt s0, d0
ldr x0, [sp, 32]
str s0, [x0]
.L5:
ldr s0, [sp, 48]
fcmp s0, #0.0
bne .L8
ldr s0, [sp, 72]
fcvt d8, s0
ldr x0, [sp, 32]
add x0, x0, 4
ldr s1, [x0]
ldr x0, [sp, 32]
add x0, x0, 4
ldr s0, [x0]
fmul s0, s1, s0
fcvt d1, s0
ldr x0, [sp, 32]
add x0, x0, 8
ldr s0, [x0]
fcvt d2, s0
fmov d0, 4.0e+0
fmul d0, d2, d0
fdiv d0, d1, d0
fmov d1, 1.0e+0
fsub d0, d1, d0
bl sqrt
fmul d0, d8, d0
fcvt s0, d0
ldr x0, [sp, 32]
str s0, [x0]
.L8:
nop
ldr d8, [sp, 16]
ldp x29, x30, [sp], 80
.cfi_restore 30
.cfi_restore 29
.cfi_restore 72
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size rsnset, .-rsnset
.section .rodata
.align 3
.LC0:
.word 1413754136
.word -1072094725
.align 3
.LC1:
.word 1413754136
.word 1075388923
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.global n
.section .rodata
.align 2
.type n, %object
.size n, 4
n:
.word 23
.global prime
.data
.align 3
.type prime, %object
.size prime, 100
prime:
.word 2
.word 3
.word 5
.word 7
.word 11
.word 13
.word 17
.word 19
.word 23
.word 29
.word 31
.word 37
.word 41
.word 43
.word 47
.word 53
.word 59
.word 61
.word 67
.word 71
.word 73
.word 79
.word 83
.word 89
.word 97
.text
.align 2
.global checkprime
.type checkprime, %function
checkprime:
.LFB0:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str w0, [sp, 12]
str wzr, [sp, 28]
b .L2
.L6:
adrp x0, prime
add x0, x0, :lo12:prime
ldr w1, [sp, 28]
ldr w1, [x0, x1, lsl 2]
ldr w0, [sp, 12]
udiv w2, w0, w1
mul w1, w2, w1
sub w0, w0, w1
cmp w0, 0
bne .L3
mov w0, 0
b .L4
.L3:
ldr w0, [sp, 28]
add w0, w0, 1
str w0, [sp, 28]
.L2:
ldr w0, [sp, 28]
cmp w0, 24
bhi .L5
adrp x0, prime
add x0, x0, :lo12:prime
ldr w1, [sp, 28]
ldr w1, [x0, x1, lsl 2]
adrp x0, prime
add x0, x0, :lo12:prime
ldr w2, [sp, 28]
ldr w0, [x0, x2, lsl 2]
mul w0, w1, w0
ldr w1, [sp, 12]
cmp w1, w0
bcs .L6
.L5:
mov w0, 1
.L4:
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size checkprime, .-checkprime
.section .rodata
.align 3
.LC0:
.string "\320\247\320\270\321\201\320\273\320\276\321\202\320\276 %u \320\265 \320\277\321\200\320\276\321\201\321\202\320\276. \n"
.align 3
.LC1:
.string "\320\247\320\270\321\201\320\273\320\276\321\202\320\276 %u \320\265 \321\201\321\212\321\201\321\202\320\260\320\262\320\275\320\276. \n"
.text
.align 2
.global main
.type main, %function
main:
.LFB1:
.cfi_startproc
stp x29, x30, [sp, -16]!
.cfi_def_cfa_offset 16
.cfi_offset 29, -16
.cfi_offset 30, -8
mov x29, sp
mov w0, 23
bl checkprime
and w0, w0, 255
cmp w0, 0
beq .L8
mov w0, 23
mov w1, w0
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl printf
b .L9
.L8:
mov w0, 23
mov w1, w0
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl printf
.L9:
mov w0, 0
ldp x29, x30, [sp], 16
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE1:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC0:
.string "%c\n"
.text
.align 2
.global main
.type main, %function
main:
.LFB6:
.cfi_startproc
stp x29, x30, [sp, -96]!
.cfi_def_cfa_offset 96
.cfi_offset 29, -96
.cfi_offset 30, -88
mov x29, sp
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 88]
mov x1, 0
str wzr, [sp, 40]
str wzr, [sp, 36]
b .L2
.L5:
bl getchar
mov w2, w0
ldrsw x0, [sp, 40]
lsl x0, x0, 2
add x1, sp, 48
str w2, [x1, x0]
ldrsw x0, [sp, 40]
lsl x0, x0, 2
add x1, sp, 48
ldr w0, [x1, x0]
cmp w0, 10
bne .L3
mov w0, 1
str w0, [sp, 36]
b .L4
.L3:
ldr w0, [sp, 40]
add w0, w0, 1
str w0, [sp, 40]
.L4:
ldr w0, [sp, 40]
cmp w0, 10
bne .L2
mov w0, 1
str w0, [sp, 36]
.L2:
ldr w0, [sp, 36]
cmp w0, 1
bne .L5
ldr w0, [sp, 40]
sub w0, w0, #1
str w0, [sp, 40]
str wzr, [sp, 28]
b .L6
.L10:
ldr w0, [sp, 28]
add w0, w0, 1
str w0, [sp, 32]
b .L7
.L9:
ldrsw x0, [sp, 28]
lsl x0, x0, 2
add x1, sp, 48
ldr w1, [x1, x0]
ldrsw x0, [sp, 32]
lsl x0, x0, 2
add x2, sp, 48
ldr w0, [x2, x0]
cmp w1, w0
ble .L8
ldrsw x0, [sp, 28]
lsl x0, x0, 2
add x1, sp, 48
ldr w0, [x1, x0]
str w0, [sp, 44]
ldrsw x0, [sp, 32]
lsl x0, x0, 2
add x1, sp, 48
ldr w2, [x1, x0]
ldrsw x0, [sp, 28]
lsl x0, x0, 2
add x1, sp, 48
str w2, [x1, x0]
ldrsw x0, [sp, 32]
lsl x0, x0, 2
add x1, sp, 48
ldr w2, [sp, 44]
str w2, [x1, x0]
.L8:
ldr w0, [sp, 32]
add w0, w0, 1
str w0, [sp, 32]
.L7:
ldr w1, [sp, 32]
ldr w0, [sp, 40]
cmp w1, w0
ble .L9
ldr w0, [sp, 28]
add w0, w0, 1
str w0, [sp, 28]
.L6:
ldr w1, [sp, 28]
ldr w0, [sp, 40]
cmp w1, w0
blt .L10
str wzr, [sp, 28]
b .L11
.L12:
ldrsw x0, [sp, 28]
lsl x0, x0, 2
add x1, sp, 48
ldr w0, [x1, x0]
mov w1, w0
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl printf
ldr w0, [sp, 28]
add w0, w0, 1
str w0, [sp, 28]
.L11:
ldr w1, [sp, 28]
ldr w0, [sp, 40]
cmp w1, w0
ble .L12
mov w0, 0
bl exit
.cfi_endproc
.LFE6:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.global SYNCMGR_OBJECTID_QueryBeforeActivate
.section .rodata
.align 3
.type SYNCMGR_OBJECTID_QueryBeforeActivate, %object
.size SYNCMGR_OBJECTID_QueryBeforeActivate, 24
SYNCMGR_OBJECTID_QueryBeforeActivate:
.xword 3632453643
.hword -6230
.hword 18925
.ascii "\206\267\346\341\367\024\315\376"
.zero 4
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC0:
.string "Creazione file fallita"
.align 3
.LC1:
.string "Scrittura fallita."
.text
.align 2
.global main
.type main, %function
main:
.LFB6:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str w0, [sp, 28]
str x1, [sp, 16]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 56]
mov x1, 0
ldr x0, [sp, 16]
add x0, x0, 8
ldr x0, [x0]
mov w1, 66
bl open
str w0, [sp, 40]
ldr w0, [sp, 40]
cmn w0, #1
bne .L2
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl perror
b .L3
.L2:
mov w0, 97
strb w0, [sp, 48]
mov w0, 1
str w0, [sp, 36]
b .L4
.L6:
add x0, sp, 48
mov x2, 1
mov x1, x0
ldr w0, [sp, 40]
bl write
str w0, [sp, 44]
ldr w0, [sp, 44]
cmn w0, #1
bne .L5
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl perror
.L5:
ldr w0, [sp, 36]
add w0, w0, 1
str w0, [sp, 36]
.L4:
ldr w0, [sp, 36]
cmp w0, 1000
ble .L6
ldr w0, [sp, 40]
bl close
.L3:
mov w0, 0
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 56]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L8
bl __stack_chk_fail
.L8:
mov w0, w1
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE6:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global second
.type second, %function
second:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -16]!
.cfi_def_cfa_offset 16
.cfi_offset 29, -16
.cfi_offset 30, -8
mov x29, sp
bl fork
mov w0, 12
ldp x29, x30, [sp], 16
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size second, .-second
.align 2
.global first
.type first, %function
first:
.LFB1:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str wzr, [sp, 28]
b .L4
.L5:
bl do_nothing
ldr w0, [sp, 28]
add w0, w0, 1
str w0, [sp, 28]
.L4:
ldr w0, [sp, 28]
cmp w0, 1
ble .L5
bl second
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE1:
.size first, .-first
.align 2
.global main
.type main, %function
main:
.LFB2:
.cfi_startproc
stp x29, x30, [sp, -16]!
.cfi_def_cfa_offset 16
.cfi_offset 29, -16
.cfi_offset 30, -8
mov x29, sp
bl do_nothing
bl first
ldp x29, x30, [sp], 16
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE2:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC0:
.string "program.c"
.align 3
.LC1:
.string "ret == 0"
.align 3
.LC2:
.string " \"getres\": [\"%lli\", \"%lli\"],\n"
.align 3
.LC3:
.string " \"gettime\": ["
.align 3
.LC4:
.string ""
.align 3
.LC5:
.string ","
.align 3
.LC6:
.string " [\"%lli\", \"%lli\"]%s\n"
.align 3
.LC7:
.string " ]"
.text
.align 2
.type dump_clock, %function
dump_clock:
.LFB6:
.cfi_startproc
stp x29, x30, [sp, -80]!
.cfi_def_cfa_offset 80
.cfi_offset 29, -80
.cfi_offset 30, -72
mov x29, sp
str x0, [sp, 24]
str w1, [sp, 20]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 72]
mov x1, 0
add x0, sp, 56
mov x1, x0
ldr w0, [sp, 20]
bl clock_getres
str w0, [sp, 48]
ldr w0, [sp, 48]
cmp w0, 0
beq .L2
adrp x0, __PRETTY_FUNCTION__.0
add x3, x0, :lo12:__PRETTY_FUNCTION__.0
mov w2, 19
adrp x0, .LC0
add x1, x0, :lo12:.LC0
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl __assert_fail
.L2:
ldr x0, [sp, 56]
ldr x1, [sp, 64]
mov x2, x1
mov x1, x0
adrp x0, .LC2
add x0, x0, :lo12:.LC2
bl printf
adrp x0, .LC3
add x0, x0, :lo12:.LC3
bl puts
mov w0, 5
str w0, [sp, 52]
str wzr, [sp, 44]
b .L3
.L8:
ldr w0, [sp, 44]
cmp w0, 0
beq .L4
mov w0, 1000
bl usleep
.L4:
add x0, sp, 56
mov x1, x0
ldr w0, [sp, 20]
bl clock_gettime
str w0, [sp, 48]
ldr w0, [sp, 48]
cmp w0, 0
beq .L5
adrp x0, __PRETTY_FUNCTION__.0
add x3, x0, :lo12:__PRETTY_FUNCTION__.0
mov w2, 32
adrp x0, .LC0
add x1, x0, :lo12:.LC0
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl __assert_fail
.L5:
ldr x4, [sp, 56]
ldr x2, [sp, 64]
ldr w0, [sp, 52]
sub w0, w0, #1
ldr w1, [sp, 44]
cmp w1, w0
bne .L6
adrp x0, .LC4
add x0, x0, :lo12:.LC4
b .L7
.L6:
adrp x0, .LC5
add x0, x0, :lo12:.LC5
.L7:
mov x3, x0
mov x1, x4
adrp x0, .LC6
add x0, x0, :lo12:.LC6
bl printf
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L3:
ldr w1, [sp, 44]
ldr w0, [sp, 52]
cmp w1, w0
blt .L8
adrp x0, .LC7
add x0, x0, :lo12:.LC7
bl puts
nop
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [sp, 72]
ldr x1, [x0]
subs x2, x2, x1
mov x1, 0
beq .L9
bl __stack_chk_fail
.L9:
ldp x29, x30, [sp], 80
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE6:
.size dump_clock, .-dump_clock
.section .rodata
.align 3
.LC8:
.string "Usage: clock <source>\n"
.align 3
.LC9:
.string "{"
.align 3
.LC10:
.string "realtime"
.align 3
.LC11:
.string "monotonic"
.align 3
.LC12:
.string "unknown mode '%s'\n"
.align 3
.LC13:
.string "}"
.text
.align 2
.global main
.type main, %function
main:
.LFB7:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str w0, [sp, 28]
str x1, [sp, 16]
ldr w0, [sp, 28]
cmp w0, 2
beq .L11
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x0, [x0]
mov x3, x0
mov x2, 22
mov x1, 1
adrp x0, .LC8
add x0, x0, :lo12:.LC8
bl fwrite
bl abort
.L11:
ldr x0, [sp, 16]
ldr x0, [x0, 8]
str x0, [sp, 40]
adrp x0, .LC9
add x0, x0, :lo12:.LC9
bl puts
adrp x0, .LC10
add x1, x0, :lo12:.LC10
ldr x0, [sp, 40]
bl strcmp
cmp w0, 0
bne .L12
mov w1, 0
adrp x0, .LC10
add x0, x0, :lo12:.LC10
bl dump_clock
b .L13
.L12:
adrp x0, .LC11
add x1, x0, :lo12:.LC11
ldr x0, [sp, 40]
bl strcmp
cmp w0, 0
bne .L14
mov w1, 1
adrp x0, .LC11
add x0, x0, :lo12:.LC11
bl dump_clock
b .L13
.L14:
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x3, [x0]
ldr x2, [sp, 40]
adrp x0, .LC12
add x1, x0, :lo12:.LC12
mov x0, x3
bl fprintf
bl abort
.L13:
adrp x0, .LC13
add x0, x0, :lo12:.LC13
bl puts
mov w0, 0
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE7:
.size main, .-main
.section .rodata
.align 3
.type __PRETTY_FUNCTION__.0, %object
.size __PRETTY_FUNCTION__.0, 11
__PRETTY_FUNCTION__.0:
.string "dump_clock"
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC0:
.string "program.c"
.align 3
.LC1:
.string "result == rd"
.text
.align 2
.global main
.type main, %function
main:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
mov w0, -1
str w0, [sp, 16]
mov w0, 255
str w0, [sp, 20]
mov w0, -256
str w0, [sp, 24]
ldr w0, [sp, 16]
ldr w1, [sp, 20]
#APP
// 12 "program.c" 1
modsub x0, x0, x1
// 0 "" 2
#NO_APP
str w0, [sp, 28]
ldr w1, [sp, 24]
ldr w0, [sp, 28]
cmp w1, w0
beq .L2
adrp x0, __PRETTY_FUNCTION__.0
add x3, x0, :lo12:__PRETTY_FUNCTION__.0
mov w2, 17
adrp x0, .LC0
add x1, x0, :lo12:.LC0
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl __assert_fail
.L2:
str wzr, [sp, 16]
mov w0, 8191
movk w0, 0xcd, lsl 16
str w0, [sp, 20]
mov w0, 52511
str w0, [sp, 24]
ldr w0, [sp, 16]
ldr w1, [sp, 20]
#APP
// 22 "program.c" 1
modsub x0, x0, x1
// 0 "" 2
#NO_APP
str w0, [sp, 28]
ldr w1, [sp, 24]
ldr w0, [sp, 28]
cmp w1, w0
beq .L3
adrp x0, __PRETTY_FUNCTION__.0
add x3, x0, :lo12:__PRETTY_FUNCTION__.0
mov w2, 27
adrp x0, .LC0
add x1, x0, :lo12:.LC0
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl __assert_fail
.L3:
mov w0, 0
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size main, .-main
.section .rodata
.align 3
.type __PRETTY_FUNCTION__.0, %object
.size __PRETTY_FUNCTION__.0, 5
__PRETTY_FUNCTION__.0:
.string "main"
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC0:
.string "%.2g"
.align 3
.LC1:
.string "%+.2gi"
.align 3
.LC2:
.string ""
.align 3
.LC3:
.string "-i"
.align 3
.LC4:
.string "i"
.align 3
.LC5:
.string "\n"
.align 3
.LC6:
.string ", "
.text
.align 2
.global main
.type main, %function
main:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
adrp x0, .LC7
ldr d0, [x0, #:lo12:.LC7]
str d0, [sp, 48]
mov w0, 1
str w0, [sp, 24]
b .L2
.L19:
str wzr, [sp, 28]
b .L3
.L18:
str xzr, [sp, 40]
ldr d0, [sp, 40]
str d0, [sp, 32]
ldr w0, [sp, 28]
cmp w0, 0
bne .L4
fmov d0, 1.0e+0
str d0, [sp, 32]
b .L5
.L4:
ldr w0, [sp, 28]
lsl w0, w0, 2
ldr w1, [sp, 24]
cmp w1, w0
bne .L6
fmov d0, 1.0e+0
str d0, [sp, 40]
b .L5
.L6:
ldr w0, [sp, 28]
lsl w0, w0, 1
ldr w1, [sp, 24]
cmp w1, w0
bne .L7
fmov d0, -1.0e+0
str d0, [sp, 32]
b .L5
.L7:
ldr w1, [sp, 24]
mov w0, w1
lsl w0, w0, 1
add w1, w0, w1
ldr w0, [sp, 28]
lsl w0, w0, 2
cmp w1, w0
bne .L8
fmov d0, -1.0e+0
str d0, [sp, 40]
b .L5
.L8:
ldr w0, [sp, 28]
scvtf d1, w0
ldr d0, [sp, 48]
fmul d1, d1, d0
ldr w0, [sp, 24]
scvtf d0, w0
fdiv d0, d1, d0
str d0, [sp, 56]
ldr d0, [sp, 56]
bl cos
str d0, [sp, 32]
ldr d0, [sp, 56]
bl sin
str d0, [sp, 40]
.L5:
ldr d0, [sp, 32]
fcmp d0, #0.0
beq .L9
ldr d0, [sp, 32]
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl printf
.L9:
ldr d1, [sp, 40]
fmov d0, 1.0e+0
fcmp d1, d0
beq .L10
ldr d1, [sp, 40]
fmov d0, -1.0e+0
fcmp d1, d0
beq .L11
ldr d0, [sp, 40]
fcmp d0, #0.0
beq .L12
adrp x0, .LC1
add x0, x0, :lo12:.LC1
b .L15
.L12:
adrp x0, .LC2
add x0, x0, :lo12:.LC2
b .L15
.L11:
adrp x0, .LC3
add x0, x0, :lo12:.LC3
b .L15
.L10:
adrp x0, .LC4
add x0, x0, :lo12:.LC4
.L15:
ldr d0, [sp, 40]
bl printf
ldr w0, [sp, 24]
sub w0, w0, #1
ldr w1, [sp, 28]
cmp w1, w0
bne .L16
adrp x0, .LC5
add x0, x0, :lo12:.LC5
b .L17
.L16:
adrp x0, .LC6
add x0, x0, :lo12:.LC6
.L17:
bl printf
ldr w0, [sp, 28]
add w0, w0, 1
str w0, [sp, 28]
.L3:
ldr w1, [sp, 28]
ldr w0, [sp, 24]
cmp w1, w0
blt .L18
ldr w0, [sp, 24]
add w0, w0, 1
str w0, [sp, 24]
.L2:
ldr w0, [sp, 24]
cmp w0, 9
ble .L19
mov w0, 0
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size main, .-main
.section .rodata
.align 3
.LC7:
.word 1413754136
.word 1075388923
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.global A
.bss
.align 3
.type A, %object
.size A, 16
A:
.zero 16
.global B
.align 3
.type B, %object
.size B, 16
B:
.zero 16
.global C
.align 3
.type C, %object
.size C, 16
C:
.zero 16
.section .rodata
.align 3
.LC0:
.string "A: "
.align 3
.LC1:
.string " %d "
.align 3
.LC2:
.string "B: "
.align 3
.LC3:
.string "C: "
.align 3
.LC4:
.string "------------------------------------------"
.text
.align 2
.global PrintAll
.type PrintAll, %function
PrintAll:
.LFB6:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl printf
str wzr, [sp, 28]
b .L2
.L3:
adrp x0, A
add x0, x0, :lo12:A
ldrsw x1, [sp, 28]
ldr w0, [x0, x1, lsl 2]
mov w1, w0
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl printf
ldr w0, [sp, 28]
add w0, w0, 1
str w0, [sp, 28]
.L2:
ldr w0, [sp, 28]
cmp w0, 3
ble .L3
mov w0, 10
bl putchar
adrp x0, .LC2
add x0, x0, :lo12:.LC2
bl printf
str wzr, [sp, 28]
b .L4
.L5:
adrp x0, B
add x0, x0, :lo12:B
ldrsw x1, [sp, 28]
ldr w0, [x0, x1, lsl 2]
mov w1, w0
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl printf
ldr w0, [sp, 28]
add w0, w0, 1
str w0, [sp, 28]
.L4:
ldr w0, [sp, 28]
cmp w0, 3
ble .L5
mov w0, 10
bl putchar
adrp x0, .LC3
add x0, x0, :lo12:.LC3
bl printf
str wzr, [sp, 28]
b .L6
.L7:
adrp x0, C
add x0, x0, :lo12:C
ldrsw x1, [sp, 28]
ldr w0, [x0, x1, lsl 2]
mov w1, w0
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl printf
ldr w0, [sp, 28]
add w0, w0, 1
str w0, [sp, 28]
.L6:
ldr w0, [sp, 28]
cmp w0, 3
ble .L7
mov w0, 10
bl putchar
adrp x0, .LC4
add x0, x0, :lo12:.LC4
bl puts
nop
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE6:
.size PrintAll, .-PrintAll
.align 2
.global Move
.type Move, %function
Move:
.LFB7:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
str x1, [sp, 16]
b .L10
.L12:
ldr w0, [sp, 40]
add w0, w0, 1
str w0, [sp, 40]
.L10:
ldr w0, [sp, 40]
cmp w0, 3
bgt .L13
ldrsw x0, [sp, 40]
lsl x0, x0, 2
ldr x1, [sp, 24]
add x0, x1, x0
ldr w0, [x0]
cmp w0, 0
beq .L12
b .L13
.L15:
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L13:
ldr w0, [sp, 44]
cmp w0, 3
bgt .L14
ldrsw x0, [sp, 44]
lsl x0, x0, 2
ldr x1, [sp, 16]
add x0, x1, x0
ldr w0, [x0]
cmp w0, 0
beq .L15
.L14:
ldrsw x0, [sp, 40]
lsl x0, x0, 2
ldr x1, [sp, 24]
add x1, x1, x0
ldrsw x0, [sp, 44]
lsl x0, x0, 2
sub x0, x0, #4
ldr x2, [sp, 16]
add x0, x2, x0
ldr w1, [x1]
str w1, [x0]
ldrsw x0, [sp, 40]
lsl x0, x0, 2
ldr x1, [sp, 24]
add x0, x1, x0
str wzr, [x0]
bl PrintAll
ldrsw x0, [sp, 44]
lsl x0, x0, 2
sub x0, x0, #4
ldr x1, [sp, 16]
add x0, x1, x0
ldr w0, [x0]
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE7:
.size Move, .-Move
.align 2
.global Hanoi
.type Hanoi, %function
Hanoi:
.LFB8:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str w0, [sp, 44]
str x1, [sp, 32]
str x2, [sp, 24]
str x3, [sp, 16]
ldr w0, [sp, 44]
cmp w0, 1
bne .L18
ldr x1, [sp, 24]
ldr x0, [sp, 32]
bl Move
b .L17
.L18:
ldr w0, [sp, 44]
sub w0, w0, #1
ldr x3, [sp, 24]
ldr x2, [sp, 16]
ldr x1, [sp, 32]
bl Hanoi
ldr x1, [sp, 24]
ldr x0, [sp, 32]
bl Move
ldr w0, [sp, 44]
sub w0, w0, #1
ldr x3, [sp, 32]
ldr x2, [sp, 24]
ldr x1, [sp, 16]
bl Hanoi
nop
.L17:
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE8:
.size Hanoi, .-Hanoi
.section .rodata
.align 3
.LC5:
.string "Solution of Tower of Hanoi Problem with %d Disks\n\n"
.align 3
.LC6:
.string "Starting state:"
.align 3
.LC7:
.string "\n\nSubsequent states:\n"
.text
.align 2
.global main
.type main, %function
main:
.LFB9:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str wzr, [sp, 28]
b .L21
.L22:
ldr w0, [sp, 28]
add w2, w0, 1
adrp x0, A
add x0, x0, :lo12:A
ldrsw x1, [sp, 28]
str w2, [x0, x1, lsl 2]
ldr w0, [sp, 28]
add w0, w0, 1
str w0, [sp, 28]
.L21:
ldr w0, [sp, 28]
cmp w0, 3
ble .L22
str wzr, [sp, 28]
b .L23
.L24:
adrp x0, B
add x0, x0, :lo12:B
ldrsw x1, [sp, 28]
str wzr, [x0, x1, lsl 2]
ldr w0, [sp, 28]
add w0, w0, 1
str w0, [sp, 28]
.L23:
ldr w0, [sp, 28]
cmp w0, 3
ble .L24
str wzr, [sp, 28]
b .L25
.L26:
adrp x0, C
add x0, x0, :lo12:C
ldrsw x1, [sp, 28]
str wzr, [x0, x1, lsl 2]
ldr w0, [sp, 28]
add w0, w0, 1
str w0, [sp, 28]
.L25:
ldr w0, [sp, 28]
cmp w0, 3
ble .L26
mov w1, 4
adrp x0, .LC5
add x0, x0, :lo12:.LC5
bl printf
adrp x0, .LC6
add x0, x0, :lo12:.LC6
bl puts
bl PrintAll
adrp x0, .LC7
add x0, x0, :lo12:.LC7
bl puts
adrp x0, C
add x3, x0, :lo12:C
adrp x0, B
add x2, x0, :lo12:B
adrp x0, A
add x1, x0, :lo12:A
mov w0, 4
bl Hanoi
mov w0, 0
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE9:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global identity
.type identity, %function
identity:
.LFB0:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str w0, [sp, 12]
ldr w0, [sp, 12]
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size identity, .-identity
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global push
.type push, %function
push:
.LFB6:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
strb w1, [sp, 23]
ldr x0, [sp, 24]
ldr x0, [x0]
str x0, [sp, 40]
mov x0, 16
bl malloc
mov x1, x0
ldr x0, [sp, 24]
str x1, [x0]
ldr x0, [sp, 24]
ldr x0, [x0]
ldr x1, [sp, 40]
str x1, [x0]
ldr x0, [sp, 24]
ldr x0, [x0]
ldrb w1, [sp, 23]
strb w1, [x0, 8]
ldr x0, [sp, 24]
ldr w0, [x0, 8]
add w1, w0, 1
ldr x0, [sp, 24]
str w1, [x0, 8]
nop
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE6:
.size push, .-push
.align 2
.global pop
.type pop, %function
pop:
.LFB7:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
ldr x0, [sp, 24]
ldr x0, [x0]
ldrb w0, [x0, 8]
strb w0, [sp, 39]
ldr x0, [sp, 24]
ldr x0, [x0]
ldr x0, [x0]
str x0, [sp, 40]
ldr x0, [sp, 24]
ldr x0, [x0]
bl free
ldr x0, [sp, 24]
ldr x1, [sp, 40]
str x1, [x0]
ldr x0, [sp, 24]
ldr w0, [x0, 8]
sub w1, w0, #1
ldr x0, [sp, 24]
str w1, [x0, 8]
ldrb w0, [sp, 39]
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE7:
.size pop, .-pop
.align 2
.global matches
.type matches, %function
matches:
.LFB8:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
strb w0, [sp, 15]
strb w1, [sp, 14]
ldrb w0, [sp, 15]
cmp w0, 123
beq .L5
cmp w0, 123
bgt .L6
cmp w0, 40
beq .L7
cmp w0, 91
beq .L8
b .L6
.L7:
ldrb w0, [sp, 14]
cmp w0, 41
bne .L8
mov w0, 1
b .L9
.L8:
ldrb w0, [sp, 14]
cmp w0, 93
bne .L5
mov w0, 1
b .L9
.L5:
ldrb w0, [sp, 14]
cmp w0, 125
bne .L6
mov w0, 1
b .L9
.L6:
mov w0, 0
.L9:
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE8:
.size matches, .-matches
.align 2
.global opener
.type opener, %function
opener:
.LFB9:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
strb w0, [sp, 15]
ldrb w0, [sp, 15]
cmp w0, 123
beq .L11
cmp w0, 123
bgt .L12
cmp w0, 40
beq .L11
cmp w0, 91
bne .L12
.L11:
mov w0, 1
b .L13
.L12:
mov w0, 0
.L13:
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE9:
.size opener, .-opener
.section .rodata
.align 3
.LC0:
.string "False"
.align 3
.LC1:
.string "%c"
.align 3
.LC2:
.string "True"
.text
.align 2
.global main
.type main, %function
main:
.LFB10:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 40]
mov x1, 0
mov x0, 16
bl malloc
str x0, [sp, 32]
b .L15
.L18:
ldrb w0, [sp, 31]
bl opener
cmp w0, 0
beq .L16
ldrb w0, [sp, 31]
mov w1, w0
ldr x0, [sp, 32]
bl push
b .L15
.L16:
ldr x0, [sp, 32]
bl pop
and w0, w0, 255
ldrb w1, [sp, 31]
bl matches
cmp w0, 0
bne .L15
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl printf
mov w0, 0
b .L21
.L15:
add x0, sp, 31
mov x1, x0
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl __isoc99_scanf
cmp w0, 0
bgt .L18
ldr x0, [sp, 32]
ldr w0, [x0, 8]
cmp w0, 0
beq .L19
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl printf
b .L20
.L19:
adrp x0, .LC2
add x0, x0, :lo12:.LC2
bl printf
.L20:
mov w0, 0
.L21:
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 40]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L22
bl __stack_chk_fail
.L22:
mov w0, w1
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE10:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global main
.type main, %function
main:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
mov w1, 3
mov w0, 2
bl sum
str w0, [sp, 28]
mov w0, 0
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size main, .-main
.align 2
.global sum
.type sum, %function
sum:
.LFB1:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str w0, [sp, 12]
str w1, [sp, 8]
ldr w1, [sp, 12]
ldr w0, [sp, 8]
add w0, w1, w0
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE1:
.size sum, .-sum
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.type GetRandom, %function
GetRandom:
.LFB0:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str x0, [sp, 8]
str x1, [sp]
ldr x0, [sp, 8]
ldr w0, [x0]
and w1, w0, 65535
mov w0, 36969
mul w1, w1, w0
ldr x0, [sp, 8]
ldr w0, [x0]
lsr w0, w0, 16
add w1, w1, w0
ldr x0, [sp, 8]
str w1, [x0]
ldr x0, [sp]
ldr w0, [x0]
and w1, w0, 65535
mov w0, 18000
mul w1, w1, w0
ldr x0, [sp]
ldr w0, [x0]
lsr w0, w0, 16
add w1, w1, w0
ldr x0, [sp]
str w1, [x0]
ldr x0, [sp, 8]
ldr w0, [x0]
lsl w1, w0, 16
ldr x0, [sp]
ldr w0, [x0]
add w0, w1, w0
str w0, [sp, 28]
ldr w0, [sp, 28]
and w0, w0, 8388607
orr w0, w0, 1073741824
str w0, [sp, 24]
ldr s1, [sp, 24]
fmov s0, 2.0e+0
fsub s1, s1, s0
fmov s0, 2.0e+0
fdiv s0, s1, s0
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size GetRandom, .-GetRandom
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC0:
.string "/sem-mutex"
.align 3
.LC1:
.string "sem_open"
.align 3
.LC2:
.string "/posix-shared-mem-example"
.align 3
.LC3:
.string "shm_open"
.align 3
.LC4:
.string "mmap"
.align 3
.LC5:
.string "/sem-buffer-count"
.align 3
.LC6:
.string "/sem-spool-signal"
.align 3
.LC7:
.string "Please type a message: "
.align 3
.LC8:
.string "sem_wait: buffer_count_sem"
.align 3
.LC9:
.string "sem_wait: mutex_sem"
.align 3
.LC10:
.string "%d: %s %s\n"
.align 3
.LC11:
.string "sem_post: mutex_sem"
.align 3
.LC12:
.string "sem_post: (spool_signal_sem"
.align 3
.LC13:
.string "munmap"
.text
.align 2
.global main
.type main, %function
main:
.LFB6:
.cfi_startproc
stp x29, x30, [sp, -384]!
.cfi_def_cfa_offset 384
.cfi_offset 29, -384
.cfi_offset 30, -376
mov x29, sp
str x19, [sp, 16]
.cfi_offset 19, -368
str w0, [sp, 44]
str x1, [sp, 32]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 376]
mov x1, 0
mov w3, 0
mov w2, 0
mov w1, 0
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl sem_open
str x0, [sp, 80]
ldr x0, [sp, 80]
cmp x0, 0
bne .L2
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl error
.L2:
mov w2, 0
mov w1, 2
adrp x0, .LC2
add x0, x0, :lo12:.LC2
bl shm_open
str w0, [sp, 60]
ldr w0, [sp, 60]
cmn w0, #1
bne .L3
adrp x0, .LC3
add x0, x0, :lo12:.LC3
bl error
.L3:
mov x5, 0
ldr w4, [sp, 60]
mov w3, 1
mov w2, 3
mov x1, 2568
mov x0, 0
bl mmap
str x0, [sp, 88]
ldr x0, [sp, 88]
cmn x0, #1
bne .L4
adrp x0, .LC4
add x0, x0, :lo12:.LC4
bl error
.L4:
mov w3, 0
mov w2, 0
mov w1, 0
adrp x0, .LC5
add x0, x0, :lo12:.LC5
bl sem_open
str x0, [sp, 96]
ldr x0, [sp, 96]
cmp x0, 0
bne .L5
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl error
.L5:
mov w3, 0
mov w2, 0
mov w1, 0
adrp x0, .LC6
add x0, x0, :lo12:.LC6
bl sem_open
str x0, [sp, 104]
ldr x0, [sp, 104]
cmp x0, 0
bne .L6
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl error
.L6:
adrp x0, .LC7
add x0, x0, :lo12:.LC7
bl printf
b .L7
.L15:
add x0, sp, 120
bl strlen
str w0, [sp, 64]
ldr w0, [sp, 64]
sub w0, w0, #1
sxtw x0, w0
add x1, sp, 120
ldrb w0, [x1, x0]
cmp w0, 10
bne .L8
ldr w0, [sp, 64]
sub w0, w0, #1
sxtw x0, w0
add x1, sp, 120
strb wzr, [x1, x0]
.L8:
ldr x0, [sp, 96]
bl sem_wait
cmn w0, #1
bne .L9
adrp x0, .LC8
add x0, x0, :lo12:.LC8
bl error
.L9:
ldr x0, [sp, 80]
bl sem_wait
cmn w0, #1
bne .L10
adrp x0, .LC9
add x0, x0, :lo12:.LC9
bl error
.L10:
mov x0, 0
bl time
str x0, [sp, 72]
add x0, sp, 72
bl ctime
str x0, [sp, 112]
ldr x0, [sp, 112]
bl strlen
str w0, [sp, 68]
ldrsw x0, [sp, 68]
sub x0, x0, #1
ldr x1, [sp, 112]
add x0, x1, x0
ldrb w0, [x0]
cmp w0, 10
bne .L11
ldrsw x0, [sp, 68]
sub x0, x0, #1
ldr x1, [sp, 112]
add x0, x1, x0
strb wzr, [x0]
.L11:
ldr x0, [sp, 88]
ldr w0, [x0, 2560]
sxtw x0, w0
lsl x0, x0, 8
ldr x1, [sp, 88]
add x19, x1, x0
bl getpid
mov w1, w0
add x0, sp, 120
mov x4, x0
ldr x3, [sp, 112]
mov w2, w1
adrp x0, .LC10
add x1, x0, :lo12:.LC10
mov x0, x19
bl sprintf
ldr x0, [sp, 88]
ldr w0, [x0, 2560]
add w1, w0, 1
ldr x0, [sp, 88]
str w1, [x0, 2560]
ldr x0, [sp, 88]
ldr w0, [x0, 2560]
cmp w0, 10
bne .L12
ldr x0, [sp, 88]
str wzr, [x0, 2560]
.L12:
ldr x0, [sp, 80]
bl sem_post
cmn w0, #1
bne .L13
adrp x0, .LC11
add x0, x0, :lo12:.LC11
bl error
.L13:
ldr x0, [sp, 104]
bl sem_post
cmn w0, #1
bne .L14
adrp x0, .LC12
add x0, x0, :lo12:.LC12
bl error
.L14:
adrp x0, .LC7
add x0, x0, :lo12:.LC7
bl printf
.L7:
adrp x0, :got:stdin
ldr x0, [x0, #:got_lo12:stdin]
ldr x1, [x0]
add x0, sp, 120
mov x2, x1
mov w1, 198
bl fgets
cmp x0, 0
bne .L15
mov x1, 2568
ldr x0, [sp, 88]
bl munmap
cmn w0, #1
bne .L16
adrp x0, .LC13
add x0, x0, :lo12:.LC13
bl error
.L16:
mov w0, 0
bl exit
.cfi_endproc
.LFE6:
.size main, .-main
.align 2
.global error
.type error, %function
error:
.LFB7:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str x0, [sp, 24]
ldr x0, [sp, 24]
bl perror
mov w0, 1
bl exit
.cfi_endproc
.LFE7:
.size error, .-error
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.global stub_amd64_darwin_macho_entry
.data
.align 3
.type stub_amd64_darwin_macho_entry, %object
.size stub_amd64_darwin_macho_entry, 9044
stub_amd64_darwin_macho_entry:
.string "\177ELF\002\001\001"
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\001"
.string ">"
.string "\001"
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\340\027"
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "@"
.string ""
.string ""
.string ""
.string ""
.string "@"
.string "\025"
.string "\022"
.string "\350"
.string ""
.string ""
.string ""
.string "USQRH\001\376VH\211\376H\211\3271\3331\311H\203\315\377\350P"
.string ""
.string ""
.string "\001\333t\002\363\303\213\036H\203\356\374\021\333\212\026\363\303H\215\004/\203\371\005\212\020v!H\203\375\374w\033\203\351\004\213\020H\203\300\004\203\351\004\211\027H\215\177\004s\357\203\301\004\212\020t\020H\377\300\210\027\203\351\001\212\020H\215\177\001u\360\363\303\374A[A\200\370\bt\r\351\254"
.string ""
.string ""
.string "H\377\306\210\027H\377\307\212\026\001\333u\n\213\036H\203\356\374\021\333\212\026r\346\215A\001\353\007\377\310A\377\323\021\300A\377\323\021\300\001\333u\n\213\036H\203\356\374\021\333\212\026s\344\203\350\003r\035\301\340\b\017\266\322\t\320H\377\306\203\360\377\017\204"
.string ""
.string ""
.string ""
.string "\321\370Hc\350r8\353\016\001\333u\b\213\036H\203\356\374\021\333r(\377\301\001\333u\b\213\036H\203\356\374\021\333r\030A\377\323\021\311\001\333u\b\213\036H\203\356\374\021\333s\355\203\301\002\353\005A\377\323\021\311H\201\375"
.string "\373\377\377\203\321\002\350"
.string ""
.string ""
.string ""
.string "\351\\\377\377\377A\200\370\005t\r\351\223"
.string ""
.string ""
.string "H\377\306\210\027H\377\307\212\026\001\333u\n\213\036H\203\356\374\021\333\212\026r\346\215A\001\353\007\377\310A\377\323\021\300A\377\323\021\300\001\333u\n\213\036H\203\356\374\021\333\212\026s\344\203\350\003r\033\301\340\b\017\266\322\t\320H\377\306\203\360\377\017\204"
.string ""
.string ""
.string ""
.string "\321\370Hc\350\353\003A\377\323\021\311A\377\323\021\311u\030\377\301A\377\323\021\311\001\333u\b\213\036H\203\356\374\021\333s\355\203\301\002H\201\375"
.string "\373\377\377\203\321\001\350"
.string ""
.string ""
.string ""
.string "\351u\377\377\377A\200\370\002t\r\351\205"
.string ""
.string ""
.string "H\377\306\210\027H\377\307\212\026\001\333u\n\213\036H\203\356\374\021\333\212\026r\346\215A\001A\377\323\021\300\001\333u\n\213\036H\203\356\374\021\333\212\026s\353\203\350\003r\027\301\340\b\017\266\322\t\320H\377\306\203\360\377\017\204"
.string ""
.string ""
.string ""
.string "Hc\350\215A\001A\377\323\021\311A\377\323\021\311u\030\211\301\203\300\002A\377\323\021\311\001\333u\b\213\036H\203\356\374\021\333s\355H\201\375"
.string "\363\377\377\021\301\350"
.string ""
.string ""
.string ""
.string "\353\203A\200\370\016\017\205"
.string ""
.string ""
.string ""
.string "UH\211\345D\213\tI\211\320H\211\362H\215w\002V\212\007\377\312\210\301$\007\300\351\003H\307\303"
.string "\375\377\377H\323\343\210\301H\215\234\\\210\361\377\377H\203\343\300j"
.string "H9\334u\371SH\215{\b\212N\377\377\312\210G\002\210\310\300\351\004\210O\001$\017\210\007H\215O\374PAWH\215G\004E1\377AVA\276\001"
.string ""
.string ""
.string "AUE1\355ATUSH\211L$\360H\211D$\330\270\001"
.string ""
.string ""
.string "H\211t$\370L\211D$\350\211\303D\211L$\344\017\266O\002\323\343\211\331H\213\\$8\377\311\211L$\324\017\266O\001\323\340H\213L$\360\377\310\211D$\320\017\266\007\307\001"
.string ""
.string ""
.string ""
.string "\307D$\310"
.string ""
.string ""
.string ""
.string "\307D$\304\001"
.string ""
.string ""
.string "\307D$\300\001"
.string ""
.string ""
.string "\307D$\274\001"
.string ""
.string ""
.string "\307\003"
.string ""
.string ""
.string ""
.string "\211D$\314\017\266O\001\001\301\270"
.string "\003"
.string ""
.string "\323\3401\311\215\2706\007"
.string ""
.string "A9\377s\023H\213\\$\330\211\310\377\3019\371f\307\004C"
.string "\004\353\353H\213|$\370\211\320E1\322A\203\313\3771\322I\211\374I\001\304L9\347\017\204\357\b"
.string ""
.string "\017\266\007A\301\342\b\377\302H\377\307A\t\302\203\372\004~\343D;|$\344\017\203\332\b"
.string ""
.string "\213D$\324Hc\\$\310H\213T$\330D!\370\211D$\270Hcl$\270H\211\330H\301\340\004H\001\350A\201\373\377\377\377"
.string "L\215\fBw\032L9\347\017\204\226\b"
.string ""
.string "\017\266\007A\301\342\bA\301\343\bH\377\307A\t\302A\017\267\021D\211\330\301\350\013\017\267\312\017\257\301A9\302\017\203\305\001"
.string ""
.string "A\211\303\270"
.string "\b"
.string ""
.string "H\213\\$\330)\310\017\266L$\314\276\001"
.string ""
.string ""
.string "\301\370\005\215\004\002A\017\266\325fA\211\001\213D$\320D!\370\323\340\271\b"
.string ""
.string ""
.string "+L$\314\323\372\001\320i\300"
.string "\003"
.string ""
.string "\203|$\310\006\211\300L\215\214Cl\016"
.string ""
.string "\017\216\270"
.string ""
.string ""
.string "H\213T$\350D\211\370D)\360\017\266,\002\001\355Hc\326\211\353\201\343"
.string "\001"
.string ""
.string "A\201\373\377\377\377"
.string "Hc\303I\215\004AL\215\004Pw\032L9\347\017\204\333\007"
.string ""
.string "\017\266\007A\301\342\bA\301\343\bH\377\307A\t\302A\017\267\220"
.string "\002"
.string ""
.string "D\211\330\301\350\013\017\267\312\017\257\301A9\302s A\211\303\270"
.string "\b"
.string ""
.string "\001\366)\310\301\370\005\205\333\215\004\002fA\211\200"
.string "\002"
.string ""
.string "t!\353-A)\303A)\302\211\320f\301\350\005\215t6\001f)\302\205\333fA\211\220"
.string "\002"
.string ""
.string "t\016\201\376\377"
.string ""
.string ""
.string "\017\216a\377\377\377\353x\201\376\377"
.string ""
.string ""
.string "\177pHc\306A\201\373\377\377\377"
.string "M\215\004Aw\032L9\347\017\204C\007"
.string ""
.string "\017\266\007A\301\342\bA\301\343\bH\377\307A\t\302A\017\267\020D\211\330\301\350\013\017\267\312\017\257\301A9\302s\030A\211\303\270"
.string "\b"
.string ""
.string "\001\366)\310\301\370\005\215\004\002fA\211"
.string "\353\241A)\303A)\302\211\320f\301\350\005\215t6\001f)\302fA\211\020\353\210H\213L$\350D\211\370A\377\307A\211\365@\2104\001\203|$\310\003\177\r\307D$\310"
.string ""
.string ""
.string ""
.string "\351\246\006"
.string ""
.string "\213T$\310\213D$\310\203\352\003\203\350\006\203|$\310\t\017O\320\211T$\310\351\207\006"
.string ""
.string "A)\303A)\302\211\320f\301\350\005f)\302H\213D$\330A\201\373\377\377\377"
.string "fA\211\021H\2154Xw\032L9\347\017\204y\006"
.string ""
.string "\017\266\007A\301\342\bA\301\343\bH\377\307A\t\302\017\267\226\200\001"
.string ""
.string "D\211\330\301\350\013\017\267\312\017\257\301A9\302sNA\211\303\270"
.string "\b"
.string ""
.string "L\213L$\330)\310\213L$\304D\211t$\304\301\370\005\215\004\002\213T$\300\211L$\300f\211\206\200\001"
.string ""
.string "1\300\203|$\310\006\211T$\274\017\237\300I\201\301d\006"
.string ""
.string "\215\004@\211D$\310\351T\002"
.string ""
.string "A)\303A)\302\211\320f\301\350\005f)\302A\201\373\377\377\377"
.string "f\211\226\200\001"
.string ""
.string "w\032L9\347\017\204\332\005"
.string ""
.string "\017\266\007A\301\342\bA\301\343\bH\377\307A\t\302\017\267\226\230\001"
.string ""
.string "D\211\330\301\350\013\017\267\312\017\257\301A9\302\017\203\320"
.string ""
.string ""
.string "A\270"
.string "\b"
.string ""
.string "A\211\303H\301\343\005D\211\300)\310\301\370\005\215\004\002f\211\206\230\001"
.string ""
.string "H\213D$\330H\001\330A\201\373\377\377\377"
.string "H\2154hw\032L9\347\017\204p\005"
.string ""
.string "\017\266\007A\301\342\bA\301\343\bH\377\307A\t\302\017\267\226\340\001"
.string ""
.string "D\211\330\301\350\013\017\267\312\017\257\301A9\302sOA)\310A\211\303A\301\370\005E\205\377B\215\004\002f\211\206\340\001"
.string ""
.string "\017\204)\005"
.string ""
.string "1\300\203|$\310\006H\213\\$\350\017\237\300\215D"
.string "\t\211D$\310D\211\370D)\360D\017\266,\003D\211\370A\377\307D\210,\003\351\330\004"
.string ""
.string "A)\303A)\302\211\320f\301\350\005f)\302f\211\226\340\001"
.string ""
.string "\351\021\001"
.string ""
.string "A)\303A)\302\211\320f\301\350\005f)\302A\201\373\377\377\377"
.string "f\211\226\230\001"
.string ""
.string "w\032L9\347\017\204\265\004"
.string ""
.string "\017\266\007A\301\342\bA\301\343\bH\377\307A\t\302\017\267\226\260\001"
.string ""
.string "D\211\330\301\350\013\017\267\312\017\257\301A9\302s A\211\303\270"
.string "\b"
.string ""
.string ")\310\301\370\005\215\004\002f\211\206\260\001"
.string ""
.string "\213D$\304\351\230"
.string ""
.string ""
.string "A)\303A)\302\211\320f\301\350\005f)\302A\201\373\377\377\377"
.string "f\211\226\260\001"
.string ""
.string "w\032L9\347\017\204D\004"
.string ""
.string "\017\266\007A\301\342\bA\301\343\bH\377\307A\t\302\017\267\226\310\001"
.string ""
.string "D\211\330\301\350\013\017\267\312\017\257\301A9\302s\035A\211\303\270"
.string "\b"
.string ""
.string ")\310\301\370\005\215\004\002f\211\206\310\001"
.string ""
.string "\213D$\300\353\"A)\303A)\302\211\320f\301\350\005f)\302\213D$\274f\211\226\310\001"
.string ""
.string "\213T$\300\211T$\274\213L$\304\211L$\300D\211t$\304A\211\3061\300\203|$\310\006L\213L$\330\017\237\300I\201\301h\n"
.string ""
.string "\215D@\b\211D$\310A\201\373\377\377\377"
.string "w\032L9\347\017\204\234\003"
.string ""
.string "\017\266\007A\301\342\bA\301\343\bH\377\307A\t\302A\017\267\021D\211\330\301\350\013\017\267\312\017\257\301A9\302s'A\211\303\270"
.string "\b"
.string ""
.string "E1\355)\310\301\370\005\215\004\002fA\211\001HcD$\270H\301\340\004M\215D\001\004\353xA)\303A)\302\211\320f\301\350\005f)\302A\201\373\377\377\377"
.string "fA\211\021w\032L9\347\017\204*\003"
.string ""
.string "\017\266\007A\301\342\bA\301\343\bH\377\307A\t\302A\017\267Q\002D\211\330\301\350\013\017\267\312\017\257\301A9\302s4A\211\303\270"
.string "\b"
.string ""
.string "A\275\b"
.string ""
.string ""
.string ")\310\301\370\005\215\004\002fA\211A\002HcD$\270H\301\340\004M\215\204\001\004\001"
.string ""
.string "A\271\003"
.string ""
.string ""
.string "\353'A)\303A)\302\211\320f\301\350\005M\215\201\004\002"
.string ""
.string "A\275\020"
.string ""
.string ""
.string "f)\302fA\211Q\002A\271\b"
.string ""
.string ""
.string "D\211\313\275\001"
.string ""
.string ""
.string "Hc\305A\201\373\377\377\377"
.string "I\2154@w\032L9\347\017\204\207\002"
.string ""
.string "\017\266\007A\301\342\bA\301\343\bH\377\307A\t\302\017\267\016D\211\330\301\350\013\017\267\321\017\257\302A9\302s\027A\211\303\270"
.string "\b"
.string ""
.string "\001\355)\320\301\370\005\215\004\001f\211\006\353\026A)\303A)\302\211\310f\301\350\005\215l-\001f)\301f\211\016\377\313u\221\270\001"
.string ""
.string ""
.string "D\211\311\323\340)\305D\001\355\203|$\310\003\017\217\302\001"
.string ""
.string "\203D$\310\007\270\003"
.string ""
.string ""
.string "\203\375\004\017L\305H\213\\$\330A\270\001"
.string ""
.string ""
.string "H\230H\301\340\007L\215\214\003`\003"
.string ""
.string "\273\006"
.string ""
.string ""
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.string "I\2154Aw\032L9\347\017\204\320\001"
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.string ""
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.string ""
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.string "w\032L9\347\017\204\031\001"
.string ""
.string "\017\266\007A\301\342\bA\301\343\bH\377\307A\t\302A\321\353E\001\366E9\332r\007E)\332A\203\316\001\377\316u\307L\213L$\330A\301\346\004\276\004"
.string ""
.string ""
.string "I\201\301D\006"
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.string ""
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.string "\273\001"
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.string "Hc\303A\201\373\377\377\377"
.string "M\215\004Aw\032L9\347\017\204\271"
.string ""
.string ""
.string "\017\266\007A\301\342\bA\301\343\bH\377\307A\t\302A\017\267\020D\211\330\301\350\013\017\267\312\017\257\301A9\302s\030A\211\303\270"
.string "\b"
.string ""
.string "\001\333)\310\301\370\005\215\004\002fA\211"
.string "\353\032A)\303A)\302\211\320f\301\350\005\215\\\033\001E\t\356f)\302fA\211\020E\001\355\377\316u\210A\377\306t@\203\305\002E9\376wMH\213T$\350D\211\370D)\360D\017\266,\002D\211\370A\377\307\377\315D\210,\002\017\225\3021\300D;|$\344\017\222\300\205\302u\323D;|$\344\017\202E\367\377\377A\201\373\377\377\377"
.string "w\026L9\347\270\001"
.string ""
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.string ""
.string ""
.string "\353\032H\377\307\211\370+D$\370H\213L$\360H\213\\$8\211\001D\211;1\300[]A\\A]A^A_AWH\215G\004E1\377AVA\276\001"
.string ""
.string ""
.string "AUE1\355ATUSH\211L$\360H\211D$\330\270\001"
.string ""
.string ""
.string "H\211t$\370L\211D$\350\211\303D\211L$\344\017\266O\002\323\343\211\331H\213\\$8\377\311\211L$\324\017\266O\001\323\340H\213L$\360\377\310\211D$\320\017\266\007\307\001"
.string ""
.string ""
.string ""
.string "\307D$\310"
.string ""
.string ""
.string ""
.string "\307D$\304\001"
.string ""
.string ""
.string "\307D$\300\001"
.string ""
.string ""
.string "\307D$\274\001"
.string ""
.string ""
.string "\307\003"
.string ""
.string ""
.string ""
.string "\211D$\314\017\266O\001\001\301\270"
.string "\003"
.string ""
.string "\323\3401\311\215\2706\007"
.string ""
.string "A9\377s\023H\213\\$\330\211\310\377\3019\371f\307\004C"
.string "\004\353\353H\213|$\370\211\320E1\322A\203\313\3771\322I\211\374I\001\304L9\347\017\204\357\b"
.string ""
.string "\017\266\007A\301\342\b\377\302H\377\307A\t\302\203\372\004~\343D;|$\344\017\203\332\b"
.string ""
.string "\213D$\324Hc\\$\310H\213T$\330D!\370\211D$\270Hcl$\270H\211\330H\301\340\004H\001\350A\201\373\377\377\377"
.string "L\215\fBw\032L9\347\017\204\226\b"
.string ""
.string "\017\266\007A\301\342\bA\301\343\bH\377\307A\t\302A\017\267\021D\211\330\301\350\013\017\267\312\017\257\301A9\302\017\203\305\001"
.string ""
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.string "\b"
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.string ""
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.string "\301\370\005\215\004\002A\017\266\325fA\211\001\213D$\320D!\370\323\340\271\b"
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.string ""
.string "+L$\314\323\372\001\320i\300"
.string "\003"
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.string "\203|$\310\006\211\300L\215\214Cl\016"
.string ""
.string "\017\216\270"
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.string ""
.string "H\213T$\350D\211\370D)\360\017\266,\002\001\355Hc\326\211\353\201\343"
.string "\001"
.string ""
.string "A\201\373\377\377\377"
.string "Hc\303I\215\004AL\215\004Pw\032L9\347\017\204\333\007"
.string ""
.string "\017\266\007A\301\342\bA\301\343\bH\377\307A\t\302A\017\267\220"
.string "\002"
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.string "D\211\330\301\350\013\017\267\312\017\257\301A9\302s A\211\303\270"
.string "\b"
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.string "\001\366)\310\301\370\005\205\333\215\004\002fA\211\200"
.string "\002"
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.string "\002"
.string ""
.string "t\016\201\376\377"
.string ""
.string ""
.string "\017\216a\377\377\377\353x\201\376\377"
.string ""
.string ""
.string "\177pHc\306A\201\373\377\377\377"
.string "M\215\004Aw\032L9\347\017\204C\007"
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.ascii "\017\266\007A\301\342\bA\301\343\bH\377\307A\t\302A\017\267\020"
.ascii "D\211\330\301\350\013\017\267\312\017\257\301A9\302"
.string "s\030A\211\303\270"
.string "\b"
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.string "\353\241A)\303A)\302\211\320f\301\350\005\215t6\001f)\302fA\211\020\353\210H\213L$\350D\211\370A\377\307A\211\365@\2104\001\203|$\310\003\177\r\307D$\310"
.string ""
.string ""
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.string "\351\246\006"
.string ""
.string "\213T$\310\213D$\310\203\352\003\203\350\006\203|$\310\t\017O\320\211T$\310\351\207\006"
.string ""
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.string "\017\266\007A\301\342\bA\301\343\bH\377\307A\t\302\017\267\226\200\001"
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.string "\b"
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.string "1\300\203|$\310\006\211T$\274\017\237\300I\201\301d\006"
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.string "w\032L9\347\017\204\332\005"
.string ""
.string "\017\266\007A\301\342\bA\301\343\bH\377\307A\t\302\017\267\226\230\001"
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.string "D\211\330\301\350\013\017\267\312\017\257\301A9\302\017\203\320"
.string ""
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.string "A\270"
.string "\b"
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.string "A\211\303H\301\343\005D\211\300)\310\301\370\005\215\004\002f\211\206\230\001"
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.string "H\213D$\330H\001\330A\201\373\377\377\377"
.string "H\2154hw\032L9\347\017\204p\005"
.string ""
.string "\017\266\007A\301\342\bA\301\343\bH\377\307A\t\302\017\267\226\340\001"
.string ""
.string "D\211\330\301\350\013\017\267\312\017\257\301A9\302sOA)\310A\211\303A\301\370\005E\205\377B\215\004\002f\211\206\340\001"
.string ""
.string "\017\204)\005"
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.string "1\300\203|$\310\006H\213\\$\350\017\237\300\215D"
.string "\t\211D$\310D\211\370D)\360D\017\266,\003D\211\370A\377\307D\210,\003\351\330\004"
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.string "\351\021\001"
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.string ""
.string "\017\266\007A\301\342\bA\301\343\bH\377\307A\t\302\017\267\226\260\001"
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.string "D\211\330\301\350\013\017\267\312\017\257\301A9\302s A\211\303\270"
.string "\b"
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.string ")\310\301\370\005\215\004\002f\211\206\260\001"
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.string "\213D$\304\351\230"
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.string "f\211\226\260\001"
.string ""
.string "w\032L9\347\017\204D\004"
.string ""
.string "\017\266\007A\301\342\bA\301\343\bH\377\307A\t\302\017\267\226\310\001"
.string ""
.string "D\211\330\301\350\013\017\267\312\017\257\301A9\302s\035A\211\303\270"
.string "\b"
.string ""
.string ")\310\301\370\005\215\004\002f\211\206\310\001"
.string ""
.string "\213D$\300\353\"A)\303A)\302\211\320f\301\350\005f)\302\213D$\274f\211\226\310\001"
.string ""
.string "\213T$\300\211T$\274\213L$\304\211L$\300D\211t$\304A\211\3061\300\203|$\310\006L\213L$\330\017\237\300I\201\301h\n"
.string ""
.string "\215D@\b\211D$\310A\201\373\377\377\377"
.string "w\032L9\347\017\204\234\003"
.string ""
.string "\017\266\007A\301\342\bA\301\343\bH\377\307A\t\302A\017\267\021D\211\330\301\350\013\017\267\312\017\257\301A9\302s'A\211\303\270"
.string "\b"
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.string "E1\355)\310\301\370\005\215\004\002fA\211\001HcD$\270H\301\340\004M\215D\001\004\353xA)\303A)\302\211\320f\301\350\005f)\302A\201\373\377\377\377"
.string "fA\211\021w\032L9\347\017\204*\003"
.string ""
.string "\017\266\007A\301\342\bA\301\343\bH\377\307A\t\302A\017\267Q\002D\211\330\301\350\013\017\267\312\017\257\301A9\302s4A\211\303\270"
.string "\b"
.string ""
.string "A\275\b"
.string ""
.string ""
.string ")\310\301\370\005\215\004\002fA\211A\002HcD$\270H\301\340\004M\215\204\001\004\001"
.string ""
.string "A\271\003"
.string ""
.string ""
.string "\353'A)\303A)\302\211\320f\301\350\005M\215\201\004\002"
.string ""
.string "A\275\020"
.string ""
.string ""
.string "f)\302fA\211Q\002A\271\b"
.string ""
.string ""
.string "D\211\313\275\001"
.string ""
.string ""
.string "Hc\305A\201\373\377\377\377"
.string "I\2154@w\032L9\347\017\204\207\002"
.string ""
.string "\017\266\007A\301\342\bA\301\343\bH\377\307A\t\302\017\267\016D\211\330\301\350\013\017\267\321\017\257\302A9\302s\027A\211\303\270"
.string "\b"
.string ""
.string "\001\355)\320\301\370\005\215\004\001f\211\006\353\026A)\303A)\302\211\310f\301\350\005\215l-\001f)\301f\211\016\377\313u\221\270\001"
.string ""
.string ""
.string "D\211\311\323\340)\305D\001\355\203|$\310\003\017\217\302\001"
.string ""
.string "\203D$\310\007\270\003"
.string ""
.string ""
.string "\203\375\004\017L\305H\213\\$\330A\270\001"
.string ""
.string ""
.string "H\230H\301\340\007L\215\214\003`\003"
.string ""
.string "\273\006"
.string ""
.string ""
.string "Ic\300A\201\373\377\377\377"
.string "I\2154Aw\032L9\347\017\204\320\001"
.string ""
.string "\017\266\007A\301\342\bA\301\343\bH\377\307A\t\302\017\267\026D\211\330\301\350\013\017\267\312\017\257\301A9\302s\030A\211\303\270"
.string "\b"
.string ""
.string "E\001\300)\310\301\370\005\215\004\002f\211\006\353\027A)\303A)\302\211\320f\301\350\005G\215D"
.string "\001f)\302f\211\026\377\313u\217A\203\350@A\203\370\003E\211\306\017\216\r\001"
.string ""
.string "A\203\346\001D\211\300\321\370A\203\316\002A\203\370\r\215p\377\177#\211\361H\213\\$\330Ic\300A\323\346H\001\300D\211\362H\215\024SH)\302L\215\212^\005"
.string ""
.string "\353Q\215p\373A\201\373\377\377\377"
.string "w\032L9\347\017\204\031\001"
.string ""
.string "\017\266\007A\301\342\bA\301\343\bH\377\307A\t\302A\321\353E\001\366E9\332r\007E)\332A\203\316\001\377\316u\307L\213L$\330A\301\346\004\276\004"
.string ""
.string ""
.string "I\201\301D\006"
.string ""
.string "A\275\001"
.string ""
.string ""
.string "\273\001"
.string ""
.string ""
.string "Hc\303A\201\373\377\377\377"
.string "M\215\004Aw\032L9\347\017\204\271"
.string ""
.string ""
.string "\017\266\007A\301\342\bA\301\343\bH\377\307A\t\302A\017\267\020D\211\330\301\350\013\017\267\312\017\257\301A9\302s\030A\211\303\270"
.string "\b"
.string ""
.string "\001\333)\310\301\370\005\215\004\002fA\211"
.string "\353\032A)\303A)\302\211\320f\301\350\005\215\\\033\001E\t\356f)\302fA\211\020E\001\355\377\316u\210A\377\306t@\203\305\002E9\376wMH\213T$\350D\211\370D)\360D\017\266,\002D\211\370A\377\307\377\315D\210,\002\017\225\3021\300D;|$\344\017\222\300\205\302u\323D;|$\344\017\202E\367\377\377A\201\373\377\377\377"
.string "w\026L9\347\270\001"
.string ""
.string ""
.string "t#\353\007\270\001"
.string ""
.string ""
.ascii "\353\032H\377\307\211\370+D$\370H\213L$\360H\213\\$8\211\001"
.ascii "D\211;1\300[]A\\A]A^A_H\213u\370H\213}\020\213K\004H\001\316"
.ascii "\213\023H\001\327\311YH\211\360H)\310ZH)\327Y\2119[]\303^\213"
.ascii "F\004H\215D\006\fPH\211\302\374\255PH\211\341\255\227\255D\017"
.ascii "\266\300H\207\376\377\325Y\303]H\215]\367\350\325\377\377\377"
.ascii "file format elf64-x86-64\n\nSections:\nIdx Name "
.ascii "Size VMA LMA File off Algn"
.ascii " Flags\n 0 MACHMAINX 0000000d 0000000000000000 00000"
.ascii "00000000000 00000040 2**0 CONTENTS, RELOC, READONLY\n 1 "
.ascii "NRV_HEAD 00000066 0000000000000000 0000000000000000 "
.ascii "0000004d 2**0 CONTENTS, READONLY\n 2 NRV2E 000000"
.ascii "b7 0000000000000000 0000000000000000 000000b3 2**0 CONT"
.ascii "ENTS, RELOC, READONLY\n 3 NRV2D 0000009e 000000000"
.ascii "0000000 0000000000000000 0000016a 2**0 CONTENTS, RELOC, "
.ascii "READONLY\n 4 NRV2B 00000090 0000000000000000 0000"
.ascii "000000000000 00000208 2**0 CONTENTS, RELOC, READONLY\n 5"
.ascii " LZMA_ELF00 00000064 0000000000000000 0000000000000000 "
.ascii " 00000298 2**0 CONTENTS, RELOC, READONLY\n 6 LZMA_DEC10 "
.ascii " 000009f7 0000000000000000 0000000000000000 000002fc 2*"
.ascii "*0 CONTENTS, READONLY\n 7 LZMA_DEC20 000009f7 00000000"
.ascii "00000000 0000000000000000 00000cf3 2**0 CONTENTS, READON"
.ascii "LY\n 8 LZMA_DEC30 00000014 0000000000000000 0000000000"
.ascii "000000 000016ea 2**0 CONTENTS, READONLY\n 9 NRV_TAIL "
.ascii " 00000000 0000000000000000 0000000000000000 000016fe 2*"
.ascii "*0 CONTENTS, READONLY\n 10 MACHMAINY 00000011 00000000"
.ascii "00000000 0000000000000000 000016fe 2**0 CONTENTS, READON"
.ascii "LY\n 11 MACHMAINZ 0000002b 0000000000000000 0000000000"
.ascii "000000 0000170f 2**0 CONTENTS, READONLY\nSYMBOL TABLE:\n0"
.ascii "000000000000000 l d NRV_HEAD\t0000000000000000 NRV_HEAD\n"
.ascii "0000000000000000 l d LZMA_DEC30\t0000000000000000 LZMA_D"
.ascii "EC30\n0000000000000000 l d MACHMAINY\t0000000000000000 M"
.ascii "ACHMAINY\n0000000000000000 l d MACHMAINZ\t00000000000000"
.ascii "00 MACHMAINZ\n0000000000000000 l d MACHMAINX\t0000000000"
.ascii "000000 MACHMAINX\n0000000000000000 l d NRV2E\t0000000000"
.ascii "000000 NRV2E\n0000000000000000 l d NRV2D\t00000000000000"
.ascii "00 NRV2D\n0000000000000000 l d NRV2B\t0000000000000000 N"
.ascii "RV2B\n0000000000000000 l d LZMA_ELF00\t0000000000000000 "
.ascii "LZMA_ELF00\n0000000000000000 l d LZMA_DEC10\t00000000000"
.ascii "00000 LZMA_DEC10\n0000000000000000 l d LZMA_DEC20\t00000"
.ascii "00000000000 LZMA_DEC20\n0000000000000000 l d NRV_TA"
.ascii "IL\t0000000000000000 NRV_TAIL\n0000000000000000 g MACH"
.ascii "MAINX\t0000000000000000 _start\n0000000000000011 g MAC"
.ascii "HMAINY\t0000000000000000 end_decompress\n\nRELOCATION RECORD"
.ascii "S FOR [MACHMAINX]:\nOFFSET TYPE VALUE"
.ascii "\n0000000000000001 R_X86_64_PC32 MACHMAINZ+0x00000000000"
.ascii "0001d\n\nRELOCATION RECORDS FOR [NRV2E]:\nOFFSET T"
.ascii "YPE VALUE\n00000000000000ae R_X86_64_PC32 N"
.ascii "RV_HEAD+0x0000000000000021\n000000000000005b R_X86_64_PC32 "
.ascii " MACHMAINY+0xfffffffffffffffc\n\nRELOCATION RECORDS FOR [N"
.ascii "RV2D]:\nOFFSET TYPE VALUE\n0000000000"
.ascii "000095 R_X86_64_PC32 NRV_HEAD+0x0000000000000021\n000000"
.ascii "000000005b R_X86_64_PC32 MACHMAINY+0xfffffffffffffffc\n\n"
.ascii "RELOCATION RECORDS FOR [NRV2B]:\nOFFSET TYPE "
.ascii " VALUE\n000000000000008a R_X86_64_PC32 NRV_HEAD+0"
.ascii "x0000000000000021\n0000000000000052 R_X86_64_PC32 MACHMA"
.ascii "INY+0xfffffffffffffffc\n\nRELOCATION RECORDS FOR [LZMA_ELF00"
.ascii "]:\nOFFSET TYPE VALUE\n00000000000000"
.ascii "06 R_X86_64_PC32 LZMA_DEC30+0x0000000000000010\n"
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.global kNoRepeat
.section .rodata
.align 1
.type kNoRepeat, %object
.size kNoRepeat, 2
kNoRepeat:
.zero 2
.global kSingleRepeat
.align 1
.type kSingleRepeat, %object
.size kSingleRepeat, 2
kSingleRepeat:
.hword 1
.global kAiwaRcT501Bits
.align 1
.type kAiwaRcT501Bits, %object
.size kAiwaRcT501Bits, 2
kAiwaRcT501Bits:
.hword 15
.global kAiwaRcT501MinRepeats
.align 1
.type kAiwaRcT501MinRepeats, %object
.size kAiwaRcT501MinRepeats, 2
kAiwaRcT501MinRepeats:
.hword 1
.global kArgoStateLength
.align 1
.type kArgoStateLength, %object
.size kArgoStateLength, 2
kArgoStateLength:
.hword 12
.global kArgoDefaultRepeat
.align 1
.type kArgoDefaultRepeat, %object
.size kArgoDefaultRepeat, 2
kArgoDefaultRepeat:
.zero 2
.global kCoolixBits
.align 1
.type kCoolixBits, %object
.size kCoolixBits, 2
kCoolixBits:
.hword 24
.global kCoolixDefaultRepeat
.align 1
.type kCoolixDefaultRepeat, %object
.size kCoolixDefaultRepeat, 2
kCoolixDefaultRepeat:
.hword 1
.global kCarrierAcBits
.align 1
.type kCarrierAcBits, %object
.size kCarrierAcBits, 2
kCarrierAcBits:
.hword 32
.global kCarrierAcMinRepeat
.align 1
.type kCarrierAcMinRepeat, %object
.size kCarrierAcMinRepeat, 2
kCarrierAcMinRepeat:
.zero 2
.global kDaikinStateLength
.align 1
.type kDaikinStateLength, %object
.size kDaikinStateLength, 2
kDaikinStateLength:
.hword 35
.global kDaikinBits
.align 1
.type kDaikinBits, %object
.size kDaikinBits, 2
kDaikinBits:
.hword 280
.global kDaikinStateLengthShort
.align 1
.type kDaikinStateLengthShort, %object
.size kDaikinStateLengthShort, 2
kDaikinStateLengthShort:
.hword 27
.global kDaikinBitsShort
.align 1
.type kDaikinBitsShort, %object
.size kDaikinBitsShort, 2
kDaikinBitsShort:
.hword 216
.global kDaikinDefaultRepeat
.align 1
.type kDaikinDefaultRepeat, %object
.size kDaikinDefaultRepeat, 2
kDaikinDefaultRepeat:
.zero 2
.global kDaikin2StateLength
.align 1
.type kDaikin2StateLength, %object
.size kDaikin2StateLength, 2
kDaikin2StateLength:
.hword 39
.global kDaikin2Bits
.align 1
.type kDaikin2Bits, %object
.size kDaikin2Bits, 2
kDaikin2Bits:
.hword 312
.global kDaikin2DefaultRepeat
.align 1
.type kDaikin2DefaultRepeat, %object
.size kDaikin2DefaultRepeat, 2
kDaikin2DefaultRepeat:
.zero 2
.global kDaikin216StateLength
.align 1
.type kDaikin216StateLength, %object
.size kDaikin216StateLength, 2
kDaikin216StateLength:
.hword 27
.global kDaikin216Bits
.align 1
.type kDaikin216Bits, %object
.size kDaikin216Bits, 2
kDaikin216Bits:
.hword 216
.global kDaikin216DefaultRepeat
.align 1
.type kDaikin216DefaultRepeat, %object
.size kDaikin216DefaultRepeat, 2
kDaikin216DefaultRepeat:
.zero 2
.global kDenonBits
.align 1
.type kDenonBits, %object
.size kDenonBits, 2
kDenonBits:
.hword 15
.global kDenonLegacyBits
.align 1
.type kDenonLegacyBits, %object
.size kDenonLegacyBits, 2
kDenonLegacyBits:
.hword 14
.global kDishBits
.align 1
.type kDishBits, %object
.size kDishBits, 2
kDishBits:
.hword 16
.global kDishMinRepeat
.align 1
.type kDishMinRepeat, %object
.size kDishMinRepeat, 2
kDishMinRepeat:
.hword 3
.global kElectraAcStateLength
.align 1
.type kElectraAcStateLength, %object
.size kElectraAcStateLength, 2
kElectraAcStateLength:
.hword 13
.global kElectraAcBits
.align 1
.type kElectraAcBits, %object
.size kElectraAcBits, 2
kElectraAcBits:
.hword 104
.global kFujitsuAcMinRepeat
.align 1
.type kFujitsuAcMinRepeat, %object
.size kFujitsuAcMinRepeat, 2
kFujitsuAcMinRepeat:
.zero 2
.global kFujitsuAcStateLength
.align 1
.type kFujitsuAcStateLength, %object
.size kFujitsuAcStateLength, 2
kFujitsuAcStateLength:
.hword 16
.global kFujitsuAcStateLengthShort
.align 1
.type kFujitsuAcStateLengthShort, %object
.size kFujitsuAcStateLengthShort, 2
kFujitsuAcStateLengthShort:
.hword 7
.global kFujitsuAcBits
.align 1
.type kFujitsuAcBits, %object
.size kFujitsuAcBits, 2
kFujitsuAcBits:
.hword 128
.global kFujitsuAcMinBits
.align 1
.type kFujitsuAcMinBits, %object
.size kFujitsuAcMinBits, 2
kFujitsuAcMinBits:
.hword 48
.global kGicableBits
.align 1
.type kGicableBits, %object
.size kGicableBits, 2
kGicableBits:
.hword 16
.global kGicableMinRepeat
.align 1
.type kGicableMinRepeat, %object
.size kGicableMinRepeat, 2
kGicableMinRepeat:
.hword 1
.global kGreeStateLength
.align 1
.type kGreeStateLength, %object
.size kGreeStateLength, 2
kGreeStateLength:
.hword 8
.global kGreeBits
.align 1
.type kGreeBits, %object
.size kGreeBits, 2
kGreeBits:
.hword 64
.global kGreeDefaultRepeat
.align 1
.type kGreeDefaultRepeat, %object
.size kGreeDefaultRepeat, 2
kGreeDefaultRepeat:
.zero 2
.global kHaierACStateLength
.align 1
.type kHaierACStateLength, %object
.size kHaierACStateLength, 2
kHaierACStateLength:
.hword 9
.global kHaierACBits
.align 1
.type kHaierACBits, %object
.size kHaierACBits, 2
kHaierACBits:
.hword 72
.global kHaierAcDefaultRepeat
.align 1
.type kHaierAcDefaultRepeat, %object
.size kHaierAcDefaultRepeat, 2
kHaierAcDefaultRepeat:
.zero 2
.global kHaierACYRW02StateLength
.align 1
.type kHaierACYRW02StateLength, %object
.size kHaierACYRW02StateLength, 2
kHaierACYRW02StateLength:
.hword 14
.global kHaierACYRW02Bits
.align 1
.type kHaierACYRW02Bits, %object
.size kHaierACYRW02Bits, 2
kHaierACYRW02Bits:
.hword 112
.global kHaierAcYrw02DefaultRepeat
.align 1
.type kHaierAcYrw02DefaultRepeat, %object
.size kHaierAcYrw02DefaultRepeat, 2
kHaierAcYrw02DefaultRepeat:
.zero 2
.global kHitachiAcStateLength
.align 1
.type kHitachiAcStateLength, %object
.size kHitachiAcStateLength, 2
kHitachiAcStateLength:
.hword 28
.global kHitachiAcBits
.align 1
.type kHitachiAcBits, %object
.size kHitachiAcBits, 2
kHitachiAcBits:
.hword 224
.global kHitachiAcDefaultRepeat
.align 1
.type kHitachiAcDefaultRepeat, %object
.size kHitachiAcDefaultRepeat, 2
kHitachiAcDefaultRepeat:
.zero 2
.global kHitachiAc1StateLength
.align 1
.type kHitachiAc1StateLength, %object
.size kHitachiAc1StateLength, 2
kHitachiAc1StateLength:
.hword 13
.global kHitachiAc1Bits
.align 1
.type kHitachiAc1Bits, %object
.size kHitachiAc1Bits, 2
kHitachiAc1Bits:
.hword 104
.global kHitachiAc2StateLength
.align 1
.type kHitachiAc2StateLength, %object
.size kHitachiAc2StateLength, 2
kHitachiAc2StateLength:
.hword 53
.global kHitachiAc2Bits
.align 1
.type kHitachiAc2Bits, %object
.size kHitachiAc2Bits, 2
kHitachiAc2Bits:
.hword 424
.global kJvcBits
.align 1
.type kJvcBits, %object
.size kJvcBits, 2
kJvcBits:
.hword 16
.global kKelvinatorStateLength
.align 1
.type kKelvinatorStateLength, %object
.size kKelvinatorStateLength, 2
kKelvinatorStateLength:
.hword 16
.global kKelvinatorBits
.align 1
.type kKelvinatorBits, %object
.size kKelvinatorBits, 2
kKelvinatorBits:
.hword 128
.global kKelvinatorDefaultRepeat
.align 1
.type kKelvinatorDefaultRepeat, %object
.size kKelvinatorDefaultRepeat, 2
kKelvinatorDefaultRepeat:
.zero 2
.global kLasertagBits
.align 1
.type kLasertagBits, %object
.size kLasertagBits, 2
kLasertagBits:
.hword 13
.global kLasertagMinRepeat
.align 1
.type kLasertagMinRepeat, %object
.size kLasertagMinRepeat, 2
kLasertagMinRepeat:
.zero 2
.global kLegoPfBits
.align 1
.type kLegoPfBits, %object
.size kLegoPfBits, 2
kLegoPfBits:
.hword 16
.global kLegoPfMinRepeat
.align 1
.type kLegoPfMinRepeat, %object
.size kLegoPfMinRepeat, 2
kLegoPfMinRepeat:
.zero 2
.global kLgBits
.align 1
.type kLgBits, %object
.size kLgBits, 2
kLgBits:
.hword 28
.global kLg32Bits
.align 1
.type kLg32Bits, %object
.size kLg32Bits, 2
kLg32Bits:
.hword 32
.global kLutronBits
.align 1
.type kLutronBits, %object
.size kLutronBits, 2
kLutronBits:
.hword 35
.global kMagiquestBits
.align 1
.type kMagiquestBits, %object
.size kMagiquestBits, 2
kMagiquestBits:
.hword 56
.global kMideaBits
.align 1
.type kMideaBits, %object
.size kMideaBits, 2
kMideaBits:
.hword 48
.global kMideaMinRepeat
.align 1
.type kMideaMinRepeat, %object
.size kMideaMinRepeat, 2
kMideaMinRepeat:
.zero 2
.global kMitsubishiBits
.align 1
.type kMitsubishiBits, %object
.size kMitsubishiBits, 2
kMitsubishiBits:
.hword 16
.global kMitsubishiMinRepeat
.align 1
.type kMitsubishiMinRepeat, %object
.size kMitsubishiMinRepeat, 2
kMitsubishiMinRepeat:
.hword 1
.global kMitsubishiACStateLength
.align 1
.type kMitsubishiACStateLength, %object
.size kMitsubishiACStateLength, 2
kMitsubishiACStateLength:
.hword 18
.global kMitsubishiACBits
.align 1
.type kMitsubishiACBits, %object
.size kMitsubishiACBits, 2
kMitsubishiACBits:
.hword 144
.global kMitsubishiACMinRepeat
.align 1
.type kMitsubishiACMinRepeat, %object
.size kMitsubishiACMinRepeat, 2
kMitsubishiACMinRepeat:
.hword 1
.global kMitsubishiHeavy88StateLength
.align 1
.type kMitsubishiHeavy88StateLength, %object
.size kMitsubishiHeavy88StateLength, 2
kMitsubishiHeavy88StateLength:
.hword 11
.global kMitsubishiHeavy88Bits
.align 1
.type kMitsubishiHeavy88Bits, %object
.size kMitsubishiHeavy88Bits, 2
kMitsubishiHeavy88Bits:
.hword 88
.global kMitsubishiHeavy88MinRepeat
.align 1
.type kMitsubishiHeavy88MinRepeat, %object
.size kMitsubishiHeavy88MinRepeat, 2
kMitsubishiHeavy88MinRepeat:
.zero 2
.global kMitsubishiHeavy152StateLength
.align 1
.type kMitsubishiHeavy152StateLength, %object
.size kMitsubishiHeavy152StateLength, 2
kMitsubishiHeavy152StateLength:
.hword 19
.global kMitsubishiHeavy152Bits
.align 1
.type kMitsubishiHeavy152Bits, %object
.size kMitsubishiHeavy152Bits, 2
kMitsubishiHeavy152Bits:
.hword 152
.global kMitsubishiHeavy152MinRepeat
.align 1
.type kMitsubishiHeavy152MinRepeat, %object
.size kMitsubishiHeavy152MinRepeat, 2
kMitsubishiHeavy152MinRepeat:
.zero 2
.global kNikaiBits
.align 1
.type kNikaiBits, %object
.size kNikaiBits, 2
kNikaiBits:
.hword 24
.global kNECBits
.align 1
.type kNECBits, %object
.size kNECBits, 2
kNECBits:
.hword 32
.global kPanasonicBits
.align 1
.type kPanasonicBits, %object
.size kPanasonicBits, 2
kPanasonicBits:
.hword 48
.global kPanasonicManufacturer
.align 2
.type kPanasonicManufacturer, %object
.size kPanasonicManufacturer, 4
kPanasonicManufacturer:
.word 16388
.global kPanasonicAcStateLength
.align 1
.type kPanasonicAcStateLength, %object
.size kPanasonicAcStateLength, 2
kPanasonicAcStateLength:
.hword 27
.global kPanasonicAcStateShortLength
.align 1
.type kPanasonicAcStateShortLength, %object
.size kPanasonicAcStateShortLength, 2
kPanasonicAcStateShortLength:
.hword 16
.global kPanasonicAcBits
.align 1
.type kPanasonicAcBits, %object
.size kPanasonicAcBits, 2
kPanasonicAcBits:
.hword 216
.global kPanasonicAcShortBits
.align 1
.type kPanasonicAcShortBits, %object
.size kPanasonicAcShortBits, 2
kPanasonicAcShortBits:
.hword 128
.global kPanasonicAcDefaultRepeat
.align 1
.type kPanasonicAcDefaultRepeat, %object
.size kPanasonicAcDefaultRepeat, 2
kPanasonicAcDefaultRepeat:
.zero 2
.global kPioneerBits
.align 1
.type kPioneerBits, %object
.size kPioneerBits, 2
kPioneerBits:
.hword 64
.global kProntoMinLength
.align 1
.type kProntoMinLength, %object
.size kProntoMinLength, 2
kProntoMinLength:
.hword 6
.global kRC5RawBits
.align 1
.type kRC5RawBits, %object
.size kRC5RawBits, 2
kRC5RawBits:
.hword 14
.global kRC5Bits
.align 1
.type kRC5Bits, %object
.size kRC5Bits, 2
kRC5Bits:
.hword 12
.global kRC5XBits
.align 1
.type kRC5XBits, %object
.size kRC5XBits, 2
kRC5XBits:
.hword 13
.global kRC6Mode0Bits
.align 1
.type kRC6Mode0Bits, %object
.size kRC6Mode0Bits, 2
kRC6Mode0Bits:
.hword 20
.global kRC6_36Bits
.align 1
.type kRC6_36Bits, %object
.size kRC6_36Bits, 2
kRC6_36Bits:
.hword 36
.global kRCMMBits
.align 1
.type kRCMMBits, %object
.size kRCMMBits, 2
kRCMMBits:
.hword 24
.global kSamsungBits
.align 1
.type kSamsungBits, %object
.size kSamsungBits, 2
kSamsungBits:
.hword 32
.global kSamsung36Bits
.align 1
.type kSamsung36Bits, %object
.size kSamsung36Bits, 2
kSamsung36Bits:
.hword 36
.global kSamsungAcStateLength
.align 1
.type kSamsungAcStateLength, %object
.size kSamsungAcStateLength, 2
kSamsungAcStateLength:
.hword 14
.global kSamsungAcBits
.align 1
.type kSamsungAcBits, %object
.size kSamsungAcBits, 2
kSamsungAcBits:
.hword 112
.global kSamsungAcExtendedStateLength
.align 1
.type kSamsungAcExtendedStateLength, %object
.size kSamsungAcExtendedStateLength, 2
kSamsungAcExtendedStateLength:
.hword 21
.global kSamsungAcExtendedBits
.align 1
.type kSamsungAcExtendedBits, %object
.size kSamsungAcExtendedBits, 2
kSamsungAcExtendedBits:
.hword 168
.global kSamsungAcDefaultRepeat
.align 1
.type kSamsungAcDefaultRepeat, %object
.size kSamsungAcDefaultRepeat, 2
kSamsungAcDefaultRepeat:
.zero 2
.global kSanyoSA8650BBits
.align 1
.type kSanyoSA8650BBits, %object
.size kSanyoSA8650BBits, 2
kSanyoSA8650BBits:
.hword 12
.global kSanyoLC7461AddressBits
.align 1
.type kSanyoLC7461AddressBits, %object
.size kSanyoLC7461AddressBits, 2
kSanyoLC7461AddressBits:
.hword 13
.global kSanyoLC7461CommandBits
.align 1
.type kSanyoLC7461CommandBits, %object
.size kSanyoLC7461CommandBits, 2
kSanyoLC7461CommandBits:
.hword 8
.global kSanyoLC7461Bits
.align 1
.type kSanyoLC7461Bits, %object
.size kSanyoLC7461Bits, 2
kSanyoLC7461Bits:
.hword 42
.global kSharpAddressBits
.type kSharpAddressBits, %object
.size kSharpAddressBits, 1
kSharpAddressBits:
.byte 5
.global kSharpCommandBits
.type kSharpCommandBits, %object
.size kSharpCommandBits, 1
kSharpCommandBits:
.byte 8
.global kSharpBits
.align 1
.type kSharpBits, %object
.size kSharpBits, 2
kSharpBits:
.hword 15
.global kSherwoodBits
.type kSherwoodBits, %object
.size kSherwoodBits, 1
kSherwoodBits:
.byte 32
.global kSherwoodMinRepeat
.align 1
.type kSherwoodMinRepeat, %object
.size kSherwoodMinRepeat, 2
kSherwoodMinRepeat:
.hword 1
.global kSony12Bits
.align 1
.type kSony12Bits, %object
.size kSony12Bits, 2
kSony12Bits:
.hword 12
.global kSony15Bits
.align 1
.type kSony15Bits, %object
.size kSony15Bits, 2
kSony15Bits:
.hword 15
.global kSony20Bits
.align 1
.type kSony20Bits, %object
.size kSony20Bits, 2
kSony20Bits:
.hword 20
.global kSonyMinBits
.align 1
.type kSonyMinBits, %object
.size kSonyMinBits, 2
kSonyMinBits:
.hword 12
.global kSonyMinRepeat
.align 1
.type kSonyMinRepeat, %object
.size kSonyMinRepeat, 2
kSonyMinRepeat:
.hword 2
.global kTcl112AcStateLength
.align 1
.type kTcl112AcStateLength, %object
.size kTcl112AcStateLength, 2
kTcl112AcStateLength:
.hword 14
.global kTcl112AcBits
.align 1
.type kTcl112AcBits, %object
.size kTcl112AcBits, 2
kTcl112AcBits:
.hword 112
.global kTcl112AcDefaultRepeat
.align 1
.type kTcl112AcDefaultRepeat, %object
.size kTcl112AcDefaultRepeat, 2
kTcl112AcDefaultRepeat:
.zero 2
.global kTecoBits
.align 1
.type kTecoBits, %object
.size kTecoBits, 2
kTecoBits:
.hword 35
.global kTecoDefaultRepeat
.align 1
.type kTecoDefaultRepeat, %object
.size kTecoDefaultRepeat, 2
kTecoDefaultRepeat:
.zero 2
.global kToshibaACStateLength
.align 1
.type kToshibaACStateLength, %object
.size kToshibaACStateLength, 2
kToshibaACStateLength:
.hword 9
.global kToshibaACBits
.align 1
.type kToshibaACBits, %object
.size kToshibaACBits, 2
kToshibaACBits:
.hword 72
.global kToshibaACMinRepeat
.align 1
.type kToshibaACMinRepeat, %object
.size kToshibaACMinRepeat, 2
kToshibaACMinRepeat:
.hword 1
.global kTrotecStateLength
.align 1
.type kTrotecStateLength, %object
.size kTrotecStateLength, 2
kTrotecStateLength:
.hword 9
.global kTrotecDefaultRepeat
.align 1
.type kTrotecDefaultRepeat, %object
.size kTrotecDefaultRepeat, 2
kTrotecDefaultRepeat:
.zero 2
.global kWhirlpoolAcStateLength
.align 1
.type kWhirlpoolAcStateLength, %object
.size kWhirlpoolAcStateLength, 2
kWhirlpoolAcStateLength:
.hword 21
.global kWhirlpoolAcBits
.align 1
.type kWhirlpoolAcBits, %object
.size kWhirlpoolAcBits, 2
kWhirlpoolAcBits:
.hword 168
.global kWhirlpoolAcDefaultRepeat
.align 1
.type kWhirlpoolAcDefaultRepeat, %object
.size kWhirlpoolAcDefaultRepeat, 2
kWhirlpoolAcDefaultRepeat:
.zero 2
.global kWhynterBits
.align 1
.type kWhynterBits, %object
.size kWhynterBits, 2
kWhynterBits:
.hword 32
.global kVestelAcBits
.type kVestelAcBits, %object
.size kVestelAcBits, 1
kVestelAcBits:
.byte 56
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global even_sel
.type even_sel, %function
even_sel:
.LFB6:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str w0, [sp, 12]
ldr w0, [sp, 12]
and w0, w0, 1
cmp w0, 0
cset w0, eq
and w0, w0, 255
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE6:
.size even_sel, .-even_sel
.align 2
.global tri_sel
.type tri_sel, %function
tri_sel:
.LFB7:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str w0, [sp, 12]
ldr w1, [sp, 12]
mov w0, 21846
movk w0, 0x5555, lsl 16
smull x0, w1, w0
lsr x2, x0, 32
asr w0, w1, 31
sub w2, w2, w0
mov w0, w2
lsl w0, w0, 1
add w0, w0, w2
sub w2, w1, w0
mov w0, w2
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE7:
.size tri_sel, .-tri_sel
.align 2
.global grep
.type grep, %function
grep:
.LFB8:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str x0, [sp, 40]
str w1, [sp, 36]
str x2, [sp, 24]
str x3, [sp, 16]
str w4, [sp, 32]
ldr w0, [sp, 32]
cmp w0, 0
beq .L6
ldr x0, [sp, 40]
str x0, [sp, 56]
b .L7
.L6:
ldrsw x0, [sp, 36]
lsl x0, x0, 2
bl malloc
str x0, [sp, 56]
.L7:
str wzr, [sp, 52]
ldr w0, [sp, 52]
str w0, [sp, 48]
b .L8
.L10:
ldrsw x0, [sp, 48]
lsl x0, x0, 2
ldr x1, [sp, 40]
add x0, x1, x0
ldr w0, [x0]
ldr x1, [sp, 16]
blr x1
cmp w0, 0
beq .L9
ldrsw x0, [sp, 48]
lsl x0, x0, 2
ldr x1, [sp, 40]
add x1, x1, x0
ldr w0, [sp, 52]
add w2, w0, 1
str w2, [sp, 52]
sxtw x0, w0
lsl x0, x0, 2
ldr x2, [sp, 56]
add x0, x2, x0
ldr w1, [x1]
str w1, [x0]
.L9:
ldr w0, [sp, 48]
add w0, w0, 1
str w0, [sp, 48]
.L8:
ldr w1, [sp, 48]
ldr w0, [sp, 36]
cmp w1, w0
blt .L10
ldr w0, [sp, 32]
cmp w0, 0
bne .L11
ldr w1, [sp, 52]
ldr w0, [sp, 36]
cmp w1, w0
bge .L11
ldrsw x0, [sp, 52]
lsl x0, x0, 2
mov x1, x0
ldr x0, [sp, 56]
bl realloc
str x0, [sp, 56]
.L11:
ldr x0, [sp, 24]
ldr w1, [sp, 52]
str w1, [x0]
ldr x0, [sp, 56]
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE8:
.size grep, .-grep
.section .rodata
.align 3
.LC1:
.string "Filtered even:"
.align 3
.LC2:
.string " %d"
.align 3
.LC3:
.string "In-place filtered not multiple of 3:"
.text
.align 2
.global main
.type main, %function
main:
.LFB9:
.cfi_startproc
stp x29, x30, [sp, -80]!
.cfi_def_cfa_offset 80
.cfi_offset 29, -80
.cfi_offset 30, -72
mov x29, sp
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 72]
mov x1, 0
adrp x0, .LC0
add x1, x0, :lo12:.LC0
add x0, sp, 32
ldp q0, q1, [x1]
stp q0, q1, [x0]
ldr x1, [x1, 32]
str x1, [x0, 32]
add x1, sp, 16
add x5, sp, 32
mov w4, 0
adrp x0, even_sel
add x3, x0, :lo12:even_sel
mov x2, x1
mov w1, 10
mov x0, x5
bl grep
str x0, [sp, 24]
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl printf
str wzr, [sp, 20]
b .L14
.L15:
ldrsw x0, [sp, 20]
lsl x0, x0, 2
ldr x1, [sp, 24]
add x0, x1, x0
ldr w0, [x0]
mov w1, w0
adrp x0, .LC2
add x0, x0, :lo12:.LC2
bl printf
ldr w0, [sp, 20]
add w0, w0, 1
str w0, [sp, 20]
.L14:
ldr w0, [sp, 16]
ldr w1, [sp, 20]
cmp w1, w0
blt .L15
mov w0, 10
bl putchar
add x1, sp, 16
add x5, sp, 32
mov w4, 1
adrp x0, tri_sel
add x3, x0, :lo12:tri_sel
mov x2, x1
mov w1, 8
mov x0, x5
bl grep
adrp x0, .LC3
add x0, x0, :lo12:.LC3
bl printf
str wzr, [sp, 20]
b .L16
.L17:
ldrsw x0, [sp, 20]
lsl x0, x0, 2
add x1, sp, 32
ldr w0, [x1, x0]
mov w1, w0
adrp x0, .LC2
add x0, x0, :lo12:.LC2
bl printf
ldr w0, [sp, 20]
add w0, w0, 1
str w0, [sp, 20]
.L16:
ldr w0, [sp, 16]
ldr w1, [sp, 20]
cmp w1, w0
blt .L17
mov w0, 10
bl putchar
mov w0, 0
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 72]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L19
bl __stack_chk_fail
.L19:
mov w0, w1
ldp x29, x30, [sp], 80
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE9:
.size main, .-main
.section .rodata
.align 3
.LC0:
.word 1
.word 2
.word 3
.word 4
.word 5
.word 6
.word 7
.word 8
.word 9
.word 10
.text
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .stack,"aw"
.align 3
.type stack, %object
.size stack, 1024
stack:
.zero 1024
.section .heap,"aw"
.align 3
.type heap, %object
.size heap, 3072
heap:
.zero 3072
.global __Vectors
.section .vectors,"aw"
.align 3
.type __Vectors, %object
.size __Vectors, 448
__Vectors:
.xword __StackTop
.xword Reset_Handler
.xword NMI_Handler
.xword HardFault_Handler
.xword MemManage_Handler
.xword BusFault_Handler
.xword UsageFault_Handler
.xword Default_Handler
.xword Default_Handler
.xword Default_Handler
.xword Default_Handler
.xword SVC_Handler
.xword DebugMon_Handler
.xword Default_Handler
.xword PendSV_Handler
.xword SysTick_Handler
.xword DMA_IRQHandler
.xword GPIO_EVEN_IRQHandler
.xword TIMER0_IRQHandler
.xword USART0_RX_IRQHandler
.xword USART0_TX_IRQHandler
.xword USB_IRQHandler
.xword ACMP0_IRQHandler
.xword ADC0_IRQHandler
.xword DAC0_IRQHandler
.xword I2C0_IRQHandler
.xword I2C1_IRQHandler
.xword GPIO_ODD_IRQHandler
.xword TIMER1_IRQHandler
.xword TIMER2_IRQHandler
.xword TIMER3_IRQHandler
.xword USART1_RX_IRQHandler
.xword USART1_TX_IRQHandler
.xword LESENSE_IRQHandler
.xword USART2_RX_IRQHandler
.xword USART2_TX_IRQHandler
.xword UART0_RX_IRQHandler
.xword UART0_TX_IRQHandler
.xword UART1_RX_IRQHandler
.xword UART1_TX_IRQHandler
.xword LEUART0_IRQHandler
.xword LEUART1_IRQHandler
.xword LETIMER0_IRQHandler
.xword PCNT0_IRQHandler
.xword PCNT1_IRQHandler
.xword PCNT2_IRQHandler
.xword RTC_IRQHandler
.xword BURTC_IRQHandler
.xword CMU_IRQHandler
.xword VCMP_IRQHandler
.xword LCD_IRQHandler
.xword MSC_IRQHandler
.xword AES_IRQHandler
.xword EBI_IRQHandler
.xword EMU_IRQHandler
.xword FPUEH_IRQHandler
.text
.align 2
.global Reset_Handler
.type Reset_Handler, %function
Reset_Handler:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
bl SystemInit
adrp x0, :got:__etext
ldr x0, [x0, #:got_lo12:__etext]
str x0, [sp, 16]
adrp x0, :got:__data_start__
ldr x0, [x0, #:got_lo12:__data_start__]
str x0, [sp, 24]
b .L2
.L3:
ldr x1, [sp, 16]
add x0, x1, 4
str x0, [sp, 16]
ldr x0, [sp, 24]
add x2, x0, 4
str x2, [sp, 24]
ldr w1, [x1]
str w1, [x0]
.L2:
ldr x1, [sp, 24]
adrp x0, :got:__data_end__
ldr x0, [x0, #:got_lo12:__data_end__]
cmp x1, x0
bcc .L3
bl _start
.cfi_endproc
.LFE0:
.size Reset_Handler, .-Reset_Handler
.align 2
.global Default_Handler
.type Default_Handler, %function
Default_Handler:
.LFB1:
.cfi_startproc
.L5:
b .L5
.cfi_endproc
.LFE1:
.size Default_Handler, .-Default_Handler
.weak FPUEH_IRQHandler
.set FPUEH_IRQHandler,Default_Handler
.weak EMU_IRQHandler
.set EMU_IRQHandler,Default_Handler
.weak EBI_IRQHandler
.set EBI_IRQHandler,Default_Handler
.weak AES_IRQHandler
.set AES_IRQHandler,Default_Handler
.weak MSC_IRQHandler
.set MSC_IRQHandler,Default_Handler
.weak LCD_IRQHandler
.set LCD_IRQHandler,Default_Handler
.weak VCMP_IRQHandler
.set VCMP_IRQHandler,Default_Handler
.weak CMU_IRQHandler
.set CMU_IRQHandler,Default_Handler
.weak BURTC_IRQHandler
.set BURTC_IRQHandler,Default_Handler
.weak RTC_IRQHandler
.set RTC_IRQHandler,Default_Handler
.weak PCNT2_IRQHandler
.set PCNT2_IRQHandler,Default_Handler
.weak PCNT1_IRQHandler
.set PCNT1_IRQHandler,Default_Handler
.weak PCNT0_IRQHandler
.set PCNT0_IRQHandler,Default_Handler
.weak LETIMER0_IRQHandler
.set LETIMER0_IRQHandler,Default_Handler
.weak LEUART1_IRQHandler
.set LEUART1_IRQHandler,Default_Handler
.weak LEUART0_IRQHandler
.set LEUART0_IRQHandler,Default_Handler
.weak UART1_TX_IRQHandler
.set UART1_TX_IRQHandler,Default_Handler
.weak UART1_RX_IRQHandler
.set UART1_RX_IRQHandler,Default_Handler
.weak UART0_TX_IRQHandler
.set UART0_TX_IRQHandler,Default_Handler
.weak UART0_RX_IRQHandler
.set UART0_RX_IRQHandler,Default_Handler
.weak USART2_TX_IRQHandler
.set USART2_TX_IRQHandler,Default_Handler
.weak USART2_RX_IRQHandler
.set USART2_RX_IRQHandler,Default_Handler
.weak LESENSE_IRQHandler
.set LESENSE_IRQHandler,Default_Handler
.weak USART1_TX_IRQHandler
.set USART1_TX_IRQHandler,Default_Handler
.weak USART1_RX_IRQHandler
.set USART1_RX_IRQHandler,Default_Handler
.weak TIMER3_IRQHandler
.set TIMER3_IRQHandler,Default_Handler
.weak TIMER2_IRQHandler
.set TIMER2_IRQHandler,Default_Handler
.weak TIMER1_IRQHandler
.set TIMER1_IRQHandler,Default_Handler
.weak GPIO_ODD_IRQHandler
.set GPIO_ODD_IRQHandler,Default_Handler
.weak I2C1_IRQHandler
.set I2C1_IRQHandler,Default_Handler
.weak I2C0_IRQHandler
.set I2C0_IRQHandler,Default_Handler
.weak DAC0_IRQHandler
.set DAC0_IRQHandler,Default_Handler
.weak ADC0_IRQHandler
.set ADC0_IRQHandler,Default_Handler
.weak ACMP0_IRQHandler
.set ACMP0_IRQHandler,Default_Handler
.weak USB_IRQHandler
.set USB_IRQHandler,Default_Handler
.weak USART0_TX_IRQHandler
.set USART0_TX_IRQHandler,Default_Handler
.weak USART0_RX_IRQHandler
.set USART0_RX_IRQHandler,Default_Handler
.weak TIMER0_IRQHandler
.set TIMER0_IRQHandler,Default_Handler
.weak GPIO_EVEN_IRQHandler
.set GPIO_EVEN_IRQHandler,Default_Handler
.weak DMA_IRQHandler
.set DMA_IRQHandler,Default_Handler
.weak SysTick_Handler
.set SysTick_Handler,Default_Handler
.weak PendSV_Handler
.set PendSV_Handler,Default_Handler
.weak SVC_Handler
.set SVC_Handler,Default_Handler
.weak DebugMon_Handler
.set DebugMon_Handler,Default_Handler
.weak UsageFault_Handler
.set UsageFault_Handler,Default_Handler
.weak BusFault_Handler
.set BusFault_Handler,Default_Handler
.weak MemManage_Handler
.set MemManage_Handler,Default_Handler
.weak HardFault_Handler
.set HardFault_Handler,Default_Handler
.weak NMI_Handler
.set NMI_Handler,Default_Handler
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global mlsb
.type mlsb, %function
mlsb:
.LFB0:
.cfi_startproc
stp x19, x20, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 19, -48
.cfi_offset 20, -40
str x0, [sp, 24]
mov x2, x1
mov w19, 0
b .L2
.L5:
#APP
// 20 "program.c" 1
addl3 r8,*4(fp),r0
// 0 "" 2
// 21 "program.c" 1
emul r10,(r11),r0,-60(fp)
// 0 "" 2
#NO_APP
ldr x0, [sp, 32]
mov w19, w0
ldr x0, [sp, 40]
mov w20, w0
mov w0, w20
uxtw x0, w0
and x1, x0, 1073741823
ldr x0, [sp, 24]
str x1, [x0]
lsl w19, w19, 2
cmp w20, 0
bge .L3
add w19, w19, 2
.L3:
and w0, w20, 1073741824
cmp w0, 0
beq .L4
add w19, w19, 1
.L4:
ldr x0, [sp, 24]
sub x0, x0, #8
str x0, [sp, 24]
.L2:
ldr x0, [sp, 24]
cmp x0, x2
bcs .L5
sxtw x0, w19
ldp x19, x20, [sp], 48
.cfi_restore 20
.cfi_restore 19
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size mlsb, .-mlsb
.align 2
.global adback
.type adback, %function
adback:
.LFB1:
.cfi_startproc
stp x19, x20, [sp, -16]!
.cfi_def_cfa_offset 16
.cfi_offset 19, -16
.cfi_offset 20, -8
mov x3, x1
mov x1, x2
mov w19, 0
b .L8
.L11:
sub x1, x1, #8
ldr x2, [x1]
mov w4, w2
mov w2, w19
add w2, w4, w2
mov w19, w2
ldr x2, [x0]
mov w4, w2
mov w2, w19
add w2, w4, w2
mov w19, w2
mov w2, w19
uxtw x2, w2
and x2, x2, 1073741823
str x2, [x0]
mov w20, w19
mov w19, 0
cmp w20, 0
bge .L9
sub w19, w19, #2
.L9:
and w2, w20, 1073741824
cmp w2, 0
beq .L10
add w19, w19, 1
.L10:
sub x0, x0, #8
.L8:
cmp x0, x3
bcs .L11
sxtw x0, w19
ldp x19, x20, [sp], 16
.cfi_restore 20
.cfi_restore 19
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE1:
.size adback, .-adback
.align 2
.global dsdiv
.type dsdiv, %function
dsdiv:
.LFB2:
.cfi_startproc
stp x19, x20, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 19, -32
.cfi_offset 20, -24
mov x2, x0
mov x0, x1
mov x19, 0
b .L14
.L17:
ldr x20, [x0]
and x1, x19, 1
cmp x1, 0
beq .L15
orr x20, x20, 1073741824
.L15:
and x1, x19, 2
cmp x1, 0
beq .L16
orr x20, x20, 2147483648
.L16:
asr x19, x19, 2
str x20, [sp, 24]
str x19, [sp, 16]
#APP
// 66 "program.c" 1
ediv r10,-60(fp),(r11),r8
// 0 "" 2
#NO_APP
add x0, x0, 8
.L14:
cmp x0, x2
bls .L17
mov x0, x19
ldp x19, x20, [sp], 32
.cfi_restore 20
.cfi_restore 19
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE2:
.size dsdiv, .-dsdiv
.align 2
.global dsadd1
.type dsadd1, %function
dsadd1:
.LFB3:
.cfi_startproc
stp x19, x20, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 19, -48
.cfi_offset 20, -40
str x21, [sp, 16]
.cfi_offset 21, -32
str x0, [sp, 40]
str x1, [sp, 32]
mov x20, 0
ldr x19, [sp, 40]
b .L20
.L23:
ldr x0, [x19]
add x21, x20, x0
and x0, x21, 1073741823
str x0, [x19]
mov x20, 0
and x0, x21, 1073741824
cmp x0, 0
beq .L21
add x20, x20, 1
.L21:
and x0, x21, 2147483648
cmp x0, 0
beq .L22
sub x20, x20, #2
.L22:
sub x19, x19, #8
.L20:
ldr x0, [sp, 32]
cmp x19, x0
bcs .L23
add x0, x19, 8
str x21, [x0]
nop
ldr x21, [sp, 16]
ldp x19, x20, [sp], 48
.cfi_restore 20
.cfi_restore 19
.cfi_restore 21
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE3:
.size dsadd1, .-dsadd1
.align 2
.global dsrsh
.type dsrsh, %function
dsrsh:
.LFB4:
.cfi_startproc
stp x19, x20, [sp, -96]!
.cfi_def_cfa_offset 96
.cfi_offset 19, -96
.cfi_offset 20, -88
stp x21, x22, [sp, 16]
stp x23, x24, [sp, 32]
.cfi_offset 21, -80
.cfi_offset 22, -72
.cfi_offset 23, -64
.cfi_offset 24, -56
str x0, [sp, 72]
str x1, [sp, 64]
str x2, [sp, 56]
str x3, [sp, 48]
ldr x20, [sp, 64]
ldr x0, [sp, 56]
neg w0, w0
mov w23, w0
ldr x0, [sp, 56]
add w0, w0, 30
mov w24, w0
mov w21, 0
ldr x0, [sp, 48]
mvn x0, x0
str x0, [sp, 88]
b .L25
.L26:
ldr x0, [x20]
mov w19, w0
mov w22, w19
ldr x0, [sp, 88]
and w22, w22, w0
asr w19, w19, w23
lsl w21, w21, w24
orr w19, w19, w21
mov x0, x20
add x20, x0, 8
sxtw x1, w19
str x1, [x0]
mov w21, w22
.L25:
ldr x0, [sp, 72]
cmp x20, x0
bls .L26
sxtw x0, w21
ldp x21, x22, [sp, 16]
ldp x23, x24, [sp, 32]
ldp x19, x20, [sp], 96
.cfi_restore 20
.cfi_restore 19
.cfi_restore 23
.cfi_restore 24
.cfi_restore 21
.cfi_restore 22
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE4:
.size dsrsh, .-dsrsh
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global array2d_create
.type array2d_create, %function
array2d_create:
.LFB6:
.cfi_startproc
stp x29, x30, [sp, -80]!
.cfi_def_cfa_offset 80
.cfi_offset 29, -80
.cfi_offset 30, -72
mov x29, sp
str x19, [sp, 16]
.cfi_offset 19, -64
mov x19, x8
str w0, [sp, 44]
str w1, [sp, 40]
ldrsw x0, [sp, 44]
mov w1, w0
ldrsw x0, [sp, 40]
mul w0, w1, w0
lsl w0, w0, 2
str w0, [sp, 52]
ldr w0, [sp, 44]
str w0, [sp, 56]
ldr w0, [sp, 40]
str w0, [sp, 60]
ldrsw x0, [sp, 52]
bl malloc
str x0, [sp, 64]
ldr w1, [sp, 52]
ldr w0, [sp, 44]
sdiv w0, w1, w0
sxtw x0, w0
bl malloc
str x0, [sp, 72]
ldr x0, [sp, 64]
ldrsw x1, [sp, 52]
mov x2, x1
mov w1, 0
bl memset
ldr x3, [sp, 72]
ldr w1, [sp, 52]
ldr w0, [sp, 44]
sdiv w0, w1, w0
sxtw x0, w0
mov x2, x0
mov w1, 0
mov x0, x3
bl memset
mov x3, x19
add x2, sp, 56
ldp x0, x1, [x2]
stp x0, x1, [x3]
ldr x0, [x2, 16]
str x0, [x3, 16]
ldr x19, [sp, 16]
ldp x29, x30, [sp], 80
.cfi_restore 30
.cfi_restore 29
.cfi_restore 19
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE6:
.size array2d_create, .-array2d_create
.align 2
.global array2d_count_digits
.type array2d_count_digits, %function
array2d_count_digits:
.LFB7:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str w0, [sp, 12]
str wzr, [sp, 20]
ldr w0, [sp, 12]
str w0, [sp, 24]
str wzr, [sp, 28]
str wzr, [sp, 20]
.L6:
ldr w0, [sp, 24]
mov w1, 26215
movk w1, 0x6666, lsl 16
smull x1, w0, w1
lsr x1, x1, 32
asr w1, w1, 2
asr w0, w0, 31
sub w0, w1, w0
str w0, [sp, 24]
ldr w0, [sp, 24]
cmp w0, 0
beq .L10
ldr w0, [sp, 20]
add w0, w0, 1
str w0, [sp, 20]
b .L6
.L10:
nop
ldr w0, [sp, 20]
add w0, w0, 1
str w0, [sp, 28]
ldr w0, [sp, 12]
cmp w0, 0
bge .L7
ldr w0, [sp, 28]
add w0, w0, 1
str w0, [sp, 28]
.L7:
ldr w0, [sp, 28]
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE7:
.size array2d_count_digits, .-array2d_count_digits
.align 2
.global array2d_set
.type array2d_set, %function
array2d_set:
.LFB8:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str x19, [sp, 16]
.cfi_offset 19, -48
mov x19, x0
str w1, [sp, 44]
str w2, [sp, 40]
str w3, [sp, 36]
ldr x1, [x19, 8]
ldr w2, [x19, 4]
ldr w0, [sp, 44]
mul w2, w2, w0
ldr w0, [sp, 40]
add w0, w2, w0
sxtw x0, w0
lsl x0, x0, 2
add x0, x1, x0
ldr w1, [sp, 36]
str w1, [x0]
ldr w0, [sp, 36]
bl array2d_count_digits
str w0, [sp, 60]
ldr x1, [x19, 16]
ldrsw x0, [sp, 40]
lsl x0, x0, 2
add x0, x1, x0
ldr w0, [x0]
ldr w1, [sp, 60]
cmp w1, w0
ble .L13
ldr x1, [x19, 16]
ldrsw x0, [sp, 40]
lsl x0, x0, 2
add x0, x1, x0
ldr w1, [sp, 60]
str w1, [x0]
.L13:
nop
ldr x19, [sp, 16]
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_restore 19
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE8:
.size array2d_set, .-array2d_set
.align 2
.global array2d_get
.type array2d_get, %function
array2d_get:
.LFB9:
.cfi_startproc
str x19, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 19, -32
mov x19, x0
str w1, [sp, 28]
str w2, [sp, 24]
ldr x1, [x19, 8]
ldr w2, [x19, 4]
ldr w0, [sp, 28]
mul w2, w2, w0
ldr w0, [sp, 24]
add w0, w2, w0
sxtw x0, w0
lsl x0, x0, 2
add x0, x1, x0
ldr w0, [x0]
ldr x19, [sp], 32
.cfi_restore 19
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE9:
.size array2d_get, .-array2d_get
.section .rodata
.align 3
.LC0:
.string "+"
.text
.align 2
.global array2d_display_horizontal_line
.type array2d_display_horizontal_line, %function
array2d_display_horizontal_line:
.LFB10:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x19, [sp, 16]
.cfi_offset 19, -32
mov x19, x0
str wzr, [sp, 40]
str wzr, [sp, 44]
str wzr, [sp, 40]
b .L17
.L20:
mov w0, 43
bl putchar
str wzr, [sp, 44]
b .L18
.L19:
mov w0, 45
bl putchar
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L18:
ldr x1, [x19, 16]
ldrsw x0, [sp, 40]
lsl x0, x0, 2
add x0, x1, x0
ldr w0, [x0]
ldr w1, [sp, 44]
cmp w1, w0
blt .L19
ldr w0, [sp, 40]
add w0, w0, 1
str w0, [sp, 40]
.L17:
ldr w0, [x19, 4]
ldr w1, [sp, 40]
cmp w1, w0
blt .L20
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl puts
nop
ldr x19, [sp, 16]
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_restore 19
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE10:
.size array2d_display_horizontal_line, .-array2d_display_horizontal_line
.section .rodata
.align 3
.LC2:
.string "%%-%dd"
.align 3
.LC3:
.string "|"
.text
.align 2
.global array2d_display_row
.type array2d_display_row, %function
array2d_display_row:
.LFB11:
.cfi_startproc
stp x29, x30, [sp, -112]!
.cfi_def_cfa_offset 112
.cfi_offset 29, -112
.cfi_offset 30, -104
mov x29, sp
str x19, [sp, 16]
.cfi_offset 19, -96
mov x19, x0
str w1, [sp, 76]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 104]
mov x1, 0
str wzr, [sp, 84]
adrp x0, .LC1
add x0, x0, :lo12:.LC1
ldrh w0, [x0]
strh w0, [sp, 88]
str xzr, [sp, 90]
str wzr, [sp, 84]
b .L22
.L23:
mov w0, 124
bl putchar
ldr x1, [x19, 16]
ldrsw x0, [sp, 84]
lsl x0, x0, 2
add x0, x1, x0
ldr w0, [x0]
add x3, sp, 88
mov w2, w0
adrp x0, .LC2
add x1, x0, :lo12:.LC2
mov x0, x3
bl sprintf
add x2, sp, 32
mov x3, x19
ldp x0, x1, [x3]
stp x0, x1, [x2]
ldr x0, [x3, 16]
str x0, [x2, 16]
add x0, sp, 32
ldr w2, [sp, 84]
ldr w1, [sp, 76]
bl array2d_get
mov w1, w0
add x0, sp, 88
bl printf
ldr w0, [sp, 84]
add w0, w0, 1
str w0, [sp, 84]
.L22:
ldr w0, [x19, 4]
ldr w1, [sp, 84]
cmp w1, w0
blt .L23
adrp x0, .LC3
add x0, x0, :lo12:.LC3
bl puts
nop
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [sp, 104]
ldr x1, [x0]
subs x2, x2, x1
mov x1, 0
beq .L24
bl __stack_chk_fail
.L24:
ldr x19, [sp, 16]
ldp x29, x30, [sp], 112
.cfi_restore 30
.cfi_restore 29
.cfi_restore 19
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE11:
.size array2d_display_row, .-array2d_display_row
.section .rodata
.align 3
.LC1:
.string ""
.string ""
.zero 8
.text
.align 2
.global array2d_display
.type array2d_display, %function
array2d_display:
.LFB12:
.cfi_startproc
stp x29, x30, [sp, -80]!
.cfi_def_cfa_offset 80
.cfi_offset 29, -80
.cfi_offset 30, -72
mov x29, sp
str x19, [sp, 16]
.cfi_offset 19, -64
mov x19, x0
str wzr, [sp, 68]
str wzr, [sp, 72]
str wzr, [sp, 76]
str wzr, [sp, 68]
b .L26
.L27:
add x2, sp, 32
mov x3, x19
ldp x0, x1, [x3]
stp x0, x1, [x2]
ldr x0, [x3, 16]
str x0, [x2, 16]
add x0, sp, 32
bl array2d_display_horizontal_line
add x2, sp, 32
mov x3, x19
ldp x0, x1, [x3]
stp x0, x1, [x2]
ldr x0, [x3, 16]
str x0, [x2, 16]
add x0, sp, 32
ldr w1, [sp, 68]
bl array2d_display_row
ldr w0, [sp, 68]
add w0, w0, 1
str w0, [sp, 68]
.L26:
ldr w0, [x19]
ldr w1, [sp, 68]
cmp w1, w0
blt .L27
add x2, sp, 32
mov x3, x19
ldp x0, x1, [x3]
stp x0, x1, [x2]
ldr x0, [x3, 16]
str x0, [x2, 16]
add x0, sp, 32
bl array2d_display_horizontal_line
nop
ldr x19, [sp, 16]
ldp x29, x30, [sp], 80
.cfi_restore 30
.cfi_restore 29
.cfi_restore 19
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE12:
.size array2d_display, .-array2d_display
.align 2
.global array2d_destroy
.type array2d_destroy, %function
array2d_destroy:
.LFB13:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str x19, [sp, 16]
.cfi_offset 19, -16
mov x19, x0
str wzr, [x19]
str wzr, [x19, 4]
ldr x0, [x19, 8]
bl free
ldr x0, [x19, 16]
bl free
nop
ldr x19, [sp, 16]
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_restore 19
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE13:
.size array2d_destroy, .-array2d_destroy
.align 2
.global main
.type main, %function
main:
.LFB14:
.cfi_startproc
stp x29, x30, [sp, -80]!
.cfi_def_cfa_offset 80
.cfi_offset 29, -80
.cfi_offset 30, -72
mov x29, sp
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 72]
mov x1, 0
add x0, sp, 48
mov x8, x0
mov w1, 3
mov w0, 2
bl array2d_create
add x2, sp, 16
add x3, sp, 48
ldp x0, x1, [x3]
stp x0, x1, [x2]
ldr x0, [x3, 16]
str x0, [x2, 16]
add x0, sp, 16
mov w3, 39
mov w2, 0
mov w1, 0
bl array2d_set
add x2, sp, 16
add x3, sp, 48
ldp x0, x1, [x3]
stp x0, x1, [x2]
ldr x0, [x3, 16]
str x0, [x2, 16]
add x0, sp, 16
mov w3, -21
mov w2, 1
mov w1, 0
bl array2d_set
add x2, sp, 16
add x3, sp, 48
ldp x0, x1, [x3]
stp x0, x1, [x2]
ldr x0, [x3, 16]
str x0, [x2, 16]
add x0, sp, 16
mov w3, 11
mov w2, 2
mov w1, 0
bl array2d_set
add x2, sp, 16
add x3, sp, 48
ldp x0, x1, [x3]
stp x0, x1, [x2]
ldr x0, [x3, 16]
str x0, [x2, 16]
add x0, sp, 16
mov w3, -4632
mov w2, 0
mov w1, 1
bl array2d_set
add x2, sp, 16
add x3, sp, 48
ldp x0, x1, [x3]
stp x0, x1, [x2]
ldr x0, [x3, 16]
str x0, [x2, 16]
add x0, sp, 16
mov w3, 51219
movk w3, 0xe, lsl 16
mov w2, 1
mov w1, 1
bl array2d_set
add x2, sp, 16
add x3, sp, 48
ldp x0, x1, [x3]
stp x0, x1, [x2]
ldr x0, [x3, 16]
str x0, [x2, 16]
add x0, sp, 16
mov w3, 701
mov w2, 2
mov w1, 1
bl array2d_set
add x2, sp, 16
add x3, sp, 48
ldp x0, x1, [x3]
stp x0, x1, [x2]
ldr x0, [x3, 16]
str x0, [x2, 16]
add x0, sp, 16
bl array2d_display
add x2, sp, 16
add x3, sp, 48
ldp x0, x1, [x3]
stp x0, x1, [x2]
ldr x0, [x3, 16]
str x0, [x2, 16]
add x0, sp, 16
bl array2d_destroy
mov w0, 0
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 72]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L31
bl __stack_chk_fail
.L31:
mov w0, w1
ldp x29, x30, [sp], 80
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE14:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.global GUID_PCIEXPRESS_ASPM_POLICY
.section .rodata
.align 3
.type GUID_PCIEXPRESS_ASPM_POLICY, %object
.size GUID_PCIEXPRESS_ASPM_POLICY, 24
GUID_PCIEXPRESS_ASPM_POLICY:
.xword 3994220806
.hword -11657
.hword 16459
.ascii "\266\332\345\372\032Wm\365"
.zero 4
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global lo_pattern_match
.type lo_pattern_match, %function
lo_pattern_match:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str x0, [sp, 24]
str x1, [sp, 16]
b .L2
.L58:
ldr x0, [sp, 24]
ldrb w0, [x0]
cmp w0, 0
bne .L3
ldr x0, [sp, 16]
ldrb w0, [x0]
cmp w0, 42
beq .L3
mov w0, 0
b .L4
.L3:
ldr x0, [sp, 16]
add x1, x0, 1
str x1, [sp, 16]
ldrb w0, [x0]
strb w0, [sp, 39]
ldrb w0, [sp, 39]
cmp w0, 123
beq .L5
cmp w0, 123
bgt .L6
cmp w0, 91
beq .L7
cmp w0, 91
bgt .L6
cmp w0, 42
beq .L10
cmp w0, 63
beq .L9
b .L6
.L12:
ldr x0, [sp, 16]
add x0, x0, 1
str x0, [sp, 16]
.L10:
ldr x0, [sp, 16]
ldrb w0, [x0]
cmp w0, 42
bne .L11
ldr x0, [sp, 16]
ldrb w0, [x0]
cmp w0, 47
bne .L12
.L11:
ldr x0, [sp, 16]
ldrb w0, [x0]
cmp w0, 0
bne .L13
mov w0, 1
b .L4
.L13:
ldr x0, [sp, 16]
ldrb w0, [x0]
cmp w0, 63
beq .L17
ldr x0, [sp, 16]
ldrb w0, [x0]
cmp w0, 91
beq .L17
ldr x0, [sp, 16]
ldrb w0, [x0]
cmp w0, 123
beq .L17
b .L15
.L16:
ldr x0, [sp, 24]
add x0, x0, 1
str x0, [sp, 24]
.L15:
ldr x0, [sp, 24]
ldrb w0, [x0]
cmp w0, 0
beq .L17
ldr x0, [sp, 16]
ldrb w1, [x0]
ldr x0, [sp, 24]
ldrb w0, [x0]
cmp w1, w0
bne .L16
b .L17
.L19:
ldr x1, [sp, 16]
ldr x0, [sp, 24]
bl lo_pattern_match
cmp w0, 0
beq .L18
mov w0, 1
b .L4
.L18:
ldr x0, [sp, 24]
add x0, x0, 1
str x0, [sp, 24]
.L17:
ldr x0, [sp, 24]
ldrb w0, [x0]
cmp w0, 0
bne .L19
mov w0, 0
b .L4
.L9:
ldr x0, [sp, 24]
ldrb w0, [x0]
cmp w0, 0
bne .L59
mov w0, 0
b .L4
.L7:
ldr x0, [sp, 16]
ldrb w0, [x0]
cmp w0, 33
beq .L22
str wzr, [sp, 40]
b .L23
.L22:
mov w0, 1
str w0, [sp, 40]
ldr x0, [sp, 16]
add x0, x0, 1
str x0, [sp, 16]
.L23:
str wzr, [sp, 44]
b .L24
.L34:
ldr x0, [sp, 16]
ldrb w0, [x0]
cmp w0, 0
bne .L25
mov w0, 0
b .L4
.L25:
ldr x0, [sp, 16]
ldrb w0, [x0]
cmp w0, 45
bne .L26
ldr x0, [sp, 16]
add x0, x0, 1
str x0, [sp, 16]
ldr x0, [sp, 16]
ldrb w0, [x0]
cmp w0, 0
bne .L27
mov w0, 0
b .L4
.L27:
ldr x0, [sp, 16]
ldrb w0, [x0]
cmp w0, 93
beq .L28
ldr x0, [sp, 24]
ldrb w0, [x0]
ldrb w1, [sp, 39]
cmp w1, w0
beq .L29
ldr x0, [sp, 24]
ldrb w1, [x0]
ldr x0, [sp, 16]
ldrb w0, [x0]
cmp w1, w0
beq .L29
ldr x0, [sp, 24]
ldrb w0, [x0]
ldrb w1, [sp, 39]
cmp w1, w0
bcs .L24
ldr x0, [sp, 24]
ldrb w1, [x0]
ldr x0, [sp, 16]
ldrb w0, [x0]
cmp w1, w0
bcs .L24
.L29:
mov w0, 1
str w0, [sp, 44]
b .L24
.L28:
ldr x0, [sp, 24]
ldrb w0, [x0]
ldrb w1, [sp, 39]
cmp w1, w0
bhi .L60
mov w0, 1
str w0, [sp, 44]
b .L60
.L26:
ldr x0, [sp, 24]
ldrb w0, [x0]
ldrb w1, [sp, 39]
cmp w1, w0
bne .L32
mov w0, 1
str w0, [sp, 44]
.L32:
ldr x0, [sp, 16]
ldrb w0, [x0]
cmp w0, 93
beq .L61
ldr x0, [sp, 16]
ldrb w1, [x0]
ldr x0, [sp, 24]
ldrb w0, [x0]
cmp w1, w0
bne .L24
mov w0, 1
str w0, [sp, 44]
.L24:
ldr w0, [sp, 44]
cmp w0, 0
bne .L31
ldr x0, [sp, 16]
add x1, x0, 1
str x1, [sp, 16]
ldrb w0, [x0]
strb w0, [sp, 39]
ldrb w0, [sp, 39]
cmp w0, 0
bne .L34
b .L31
.L60:
nop
b .L31
.L61:
nop
.L31:
ldr w1, [sp, 40]
ldr w0, [sp, 44]
cmp w1, w0
bne .L36
mov w0, 0
b .L4
.L38:
ldr x0, [sp, 16]
add x0, x0, 1
str x0, [sp, 16]
.L36:
ldr x0, [sp, 16]
ldrb w0, [x0]
cmp w0, 0
beq .L37
ldr x0, [sp, 16]
ldrb w0, [x0]
cmp w0, 93
bne .L38
.L37:
ldr x0, [sp, 16]
add x1, x0, 1
str x1, [sp, 16]
ldrb w0, [x0]
cmp w0, 0
bne .L62
mov w0, 0
b .L4
.L5:
ldr x0, [sp, 24]
str x0, [sp, 56]
ldr x0, [sp, 16]
str x0, [sp, 48]
b .L40
.L42:
ldr x0, [sp, 48]
add x0, x0, 1
str x0, [sp, 48]
.L40:
ldr x0, [sp, 48]
ldrb w0, [x0]
cmp w0, 0
beq .L41
ldr x0, [sp, 48]
ldrb w0, [x0]
cmp w0, 125
bne .L42
.L41:
ldr x0, [sp, 48]
add x1, x0, 1
str x1, [sp, 48]
ldrb w0, [x0]
cmp w0, 0
bne .L43
mov w0, 0
b .L4
.L43:
ldr x0, [sp, 16]
add x1, x0, 1
str x1, [sp, 16]
ldrb w0, [x0]
strb w0, [sp, 39]
b .L44
.L56:
ldrb w0, [sp, 39]
cmp w0, 44
bne .L45
ldr x1, [sp, 48]
ldr x0, [sp, 24]
bl lo_pattern_match
cmp w0, 0
beq .L46
mov w0, 1
b .L4
.L46:
ldr x0, [sp, 56]
str x0, [sp, 24]
ldr x0, [sp, 16]
add x1, x0, 1
str x1, [sp, 16]
ldrb w0, [x0]
cmp w0, 0
bne .L47
mov w0, 0
b .L4
.L45:
ldrb w0, [sp, 39]
cmp w0, 125
bne .L48
ldr x0, [sp, 16]
ldrb w0, [x0]
cmp w0, 0
bne .L49
ldr x0, [sp, 24]
ldrb w0, [x0]
cmp w0, 0
bne .L49
mov w0, 1
b .L4
.L49:
ldr x0, [sp, 24]
sub x0, x0, #1
str x0, [sp, 24]
nop
b .L21
.L48:
ldr x0, [sp, 24]
ldrb w0, [x0]
ldrb w1, [sp, 39]
cmp w1, w0
bne .L51
ldr x0, [sp, 24]
add x0, x0, 1
str x0, [sp, 24]
ldr x0, [sp, 24]
ldrb w0, [x0]
cmp w0, 0
bne .L47
ldr x0, [sp, 48]
ldrb w0, [x0]
cmp w0, 0
beq .L47
mov w0, 0
b .L4
.L51:
ldr x0, [sp, 56]
str x0, [sp, 24]
b .L52
.L54:
ldr x0, [sp, 16]
add x0, x0, 1
str x0, [sp, 16]
.L52:
ldr x0, [sp, 16]
ldrb w0, [x0]
cmp w0, 44
beq .L53
ldr x0, [sp, 16]
ldrb w0, [x0]
cmp w0, 125
beq .L53
ldr x0, [sp, 16]
ldrb w0, [x0]
cmp w0, 0
bne .L54
.L53:
ldr x0, [sp, 16]
ldrb w0, [x0]
cmp w0, 44
bne .L55
ldr x0, [sp, 16]
add x0, x0, 1
str x0, [sp, 16]
b .L47
.L55:
ldr x0, [sp, 16]
ldrb w0, [x0]
cmp w0, 125
bne .L47
mov w0, 0
b .L4
.L47:
ldr x0, [sp, 16]
add x1, x0, 1
str x1, [sp, 16]
ldrb w0, [x0]
strb w0, [sp, 39]
.L44:
ldrb w0, [sp, 39]
cmp w0, 0
bne .L56
b .L21
.L6:
ldr x0, [sp, 24]
ldrb w0, [x0]
ldrb w1, [sp, 39]
cmp w1, w0
beq .L63
mov w0, 0
b .L4
.L59:
nop
b .L21
.L62:
nop
b .L21
.L63:
nop
.L21:
ldr x0, [sp, 24]
add x0, x0, 1
str x0, [sp, 24]
.L2:
ldr x0, [sp, 16]
ldrb w0, [x0]
cmp w0, 0
bne .L58
ldr x0, [sp, 24]
ldrb w0, [x0]
cmp w0, 0
cset w0, eq
and w0, w0, 255
.L4:
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size lo_pattern_match, .-lo_pattern_match
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC0:
.string "++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++"
.align 3
.LC1:
.string "Fibonacci series upto first 40 elemets: "
.align 3
.LC2:
.string "%d "
.align 3
.LC3:
.string "\n++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++"
.text
.align 2
.global main
.type main, %function
main:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -192]!
.cfi_def_cfa_offset 192
.cfi_offset 29, -192
.cfi_offset 30, -184
mov x29, sp
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 184]
mov x1, 0
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl puts
add x0, sp, 24
movi v0.4s, 0
stp q0, q0, [x0]
stp q0, q0, [x0, 32]
stp q0, q0, [x0, 64]
stp q0, q0, [x0, 96]
stp q0, q0, [x0, 128]
mov w0, 1
str w0, [sp, 28]
mov w0, 2
str w0, [sp, 16]
b .L2
.L3:
ldr w0, [sp, 16]
sub w0, w0, #1
sxtw x0, w0
lsl x0, x0, 2
add x1, sp, 24
ldr w1, [x1, x0]
ldr w0, [sp, 16]
sub w0, w0, #2
sxtw x0, w0
lsl x0, x0, 2
add x2, sp, 24
ldr w0, [x2, x0]
add w2, w1, w0
ldrsw x0, [sp, 16]
lsl x0, x0, 2
add x1, sp, 24
str w2, [x1, x0]
ldr w0, [sp, 16]
add w0, w0, 1
str w0, [sp, 16]
.L2:
ldr w0, [sp, 16]
cmp w0, 39
ble .L3
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl printf
str wzr, [sp, 20]
b .L4
.L5:
ldrsw x0, [sp, 20]
lsl x0, x0, 2
add x1, sp, 24
ldr w0, [x1, x0]
mov w1, w0
adrp x0, .LC2
add x0, x0, :lo12:.LC2
bl printf
ldr w0, [sp, 20]
add w0, w0, 1
str w0, [sp, 20]
.L4:
ldr w0, [sp, 20]
cmp w0, 39
ble .L5
adrp x0, .LC3
add x0, x0, :lo12:.LC3
bl puts
mov w0, 0
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 184]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L7
bl __stack_chk_fail
.L7:
mov w0, w1
ldp x29, x30, [sp], 192
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.type vga_entry_color, %function
vga_entry_color:
.LFB0:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str w0, [sp, 12]
str w1, [sp, 8]
ldr w0, [sp, 8]
lsl w1, w0, 4
ldr w0, [sp, 12]
orr w0, w1, w0
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size vga_entry_color, .-vga_entry_color
.align 2
.type vga_entry, %function
vga_entry:
.LFB1:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
strb w0, [sp, 15]
str w1, [sp, 8]
ldrb w1, [sp, 15]
ldr w0, [sp, 8]
lsl w0, w0, 8
orr w0, w1, w0
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE1:
.size vga_entry, .-vga_entry
.align 2
.global strlen
.type strlen, %function
strlen:
.LFB2:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str x0, [sp, 8]
str xzr, [sp, 24]
b .L6
.L7:
ldr x0, [sp, 24]
add x0, x0, 1
str x0, [sp, 24]
.L6:
ldr x1, [sp, 8]
ldr x0, [sp, 24]
add x0, x1, x0
ldrb w0, [x0]
cmp w0, 0
bne .L7
ldr x0, [sp, 24]
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE2:
.size strlen, .-strlen
.section .rodata
.align 3
.type VGA_WIDTH, %object
.size VGA_WIDTH, 8
VGA_WIDTH:
.xword 80
.align 3
.type VGA_HEIGHT, %object
.size VGA_HEIGHT, 8
VGA_HEIGHT:
.xword 25
.global terminal_row
.bss
.align 3
.type terminal_row, %object
.size terminal_row, 8
terminal_row:
.zero 8
.global terminal_column
.align 3
.type terminal_column, %object
.size terminal_column, 8
terminal_column:
.zero 8
.global terminal_color
.align 2
.type terminal_color, %object
.size terminal_color, 4
terminal_color:
.zero 4
.global terminal_buffer
.align 3
.type terminal_buffer, %object
.size terminal_buffer, 8
terminal_buffer:
.zero 8
.text
.align 2
.global terminal_initialize
.type terminal_initialize, %function
terminal_initialize:
.LFB3:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str x19, [sp, 16]
.cfi_offset 19, -48
adrp x0, terminal_row
add x0, x0, :lo12:terminal_row
str xzr, [x0]
adrp x0, terminal_column
add x0, x0, :lo12:terminal_column
str xzr, [x0]
mov w1, 0
mov w0, 2
bl vga_entry_color
mov w1, w0
adrp x0, terminal_color
add x0, x0, :lo12:terminal_color
str w1, [x0]
adrp x0, terminal_buffer
add x0, x0, :lo12:terminal_buffer
mov x1, 32768
movk x1, 0xb, lsl 16
str x1, [x0]
str xzr, [sp, 40]
b .L10
.L13:
str xzr, [sp, 48]
b .L11
.L12:
mov x1, 80
ldr x0, [sp, 40]
mul x0, x1, x0
ldr x1, [sp, 48]
add x0, x1, x0
str x0, [sp, 56]
adrp x0, terminal_color
add x0, x0, :lo12:terminal_color
ldr w2, [x0]
adrp x0, terminal_buffer
add x0, x0, :lo12:terminal_buffer
ldr x1, [x0]
ldr x0, [sp, 56]
lsl x0, x0, 2
add x19, x1, x0
mov w1, w2
mov w0, 32
bl vga_entry
str w0, [x19]
ldr x0, [sp, 48]
add x0, x0, 1
str x0, [sp, 48]
.L11:
mov x0, 80
ldr x1, [sp, 48]
cmp x1, x0
bcc .L12
ldr x0, [sp, 40]
add x0, x0, 1
str x0, [sp, 40]
.L10:
mov x0, 25
ldr x1, [sp, 40]
cmp x1, x0
bcc .L13
nop
nop
ldr x19, [sp, 16]
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_restore 19
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE3:
.size terminal_initialize, .-terminal_initialize
.align 2
.global terminal_setcolor
.type terminal_setcolor, %function
terminal_setcolor:
.LFB4:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str w0, [sp, 12]
adrp x0, terminal_color
add x0, x0, :lo12:terminal_color
ldr w1, [sp, 12]
str w1, [x0]
nop
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE4:
.size terminal_setcolor, .-terminal_setcolor
.align 2
.global terminal_putentryat
.type terminal_putentryat, %function
terminal_putentryat:
.LFB5:
.cfi_startproc
stp x29, x30, [sp, -80]!
.cfi_def_cfa_offset 80
.cfi_offset 29, -80
.cfi_offset 30, -72
mov x29, sp
str x19, [sp, 16]
.cfi_offset 19, -64
strb w0, [sp, 63]
str w1, [sp, 56]
str x2, [sp, 48]
str x3, [sp, 40]
mov x1, 80
ldr x0, [sp, 40]
mul x0, x1, x0
ldr x1, [sp, 48]
add x0, x1, x0
str x0, [sp, 72]
adrp x0, terminal_buffer
add x0, x0, :lo12:terminal_buffer
ldr x1, [x0]
ldr x0, [sp, 72]
lsl x0, x0, 2
add x19, x1, x0
ldr w1, [sp, 56]
ldrb w0, [sp, 63]
bl vga_entry
str w0, [x19]
nop
ldr x19, [sp, 16]
ldp x29, x30, [sp], 80
.cfi_restore 30
.cfi_restore 29
.cfi_restore 19
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE5:
.size terminal_putentryat, .-terminal_putentryat
.align 2
.global terminal_putchar
.type terminal_putchar, %function
terminal_putchar:
.LFB6:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
strb w0, [sp, 31]
adrp x0, terminal_color
add x0, x0, :lo12:terminal_color
ldr w1, [x0]
adrp x0, terminal_column
add x0, x0, :lo12:terminal_column
ldr x2, [x0]
adrp x0, terminal_row
add x0, x0, :lo12:terminal_row
ldr x0, [x0]
mov x3, x0
ldrb w0, [sp, 31]
bl terminal_putentryat
adrp x0, terminal_column
add x0, x0, :lo12:terminal_column
ldr x0, [x0]
add x1, x0, 1
adrp x0, terminal_column
add x0, x0, :lo12:terminal_column
str x1, [x0]
adrp x0, terminal_column
add x0, x0, :lo12:terminal_column
ldr x1, [x0]
mov x0, 80
cmp x1, x0
bne .L18
adrp x0, terminal_column
add x0, x0, :lo12:terminal_column
str xzr, [x0]
adrp x0, terminal_row
add x0, x0, :lo12:terminal_row
ldr x0, [x0]
add x1, x0, 1
adrp x0, terminal_row
add x0, x0, :lo12:terminal_row
str x1, [x0]
adrp x0, terminal_row
add x0, x0, :lo12:terminal_row
ldr x1, [x0]
mov x0, 25
cmp x1, x0
bne .L18
adrp x0, terminal_row
add x0, x0, :lo12:terminal_row
str xzr, [x0]
.L18:
nop
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE6:
.size terminal_putchar, .-terminal_putchar
.align 2
.global terminal_write
.type terminal_write, %function
terminal_write:
.LFB7:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
str x1, [sp, 16]
str xzr, [sp, 40]
b .L20
.L21:
ldr x1, [sp, 24]
ldr x0, [sp, 40]
add x0, x1, x0
ldrb w0, [x0]
bl terminal_putchar
ldr x0, [sp, 40]
add x0, x0, 1
str x0, [sp, 40]
.L20:
ldr x1, [sp, 40]
ldr x0, [sp, 16]
cmp x1, x0
bcc .L21
nop
nop
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE7:
.size terminal_write, .-terminal_write
.align 2
.global terminal_writestring
.type terminal_writestring, %function
terminal_writestring:
.LFB8:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str x0, [sp, 24]
ldr x0, [sp, 24]
bl strlen
mov x1, x0
ldr x0, [sp, 24]
bl terminal_write
nop
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE8:
.size terminal_writestring, .-terminal_writestring
.section .rodata
.align 3
.LC0:
.string "Hello, kernel World!\n"
.text
.align 2
.global kernel_main
.type kernel_main, %function
kernel_main:
.LFB9:
.cfi_startproc
stp x29, x30, [sp, -16]!
.cfi_def_cfa_offset 16
.cfi_offset 29, -16
.cfi_offset 30, -8
mov x29, sp
bl terminal_initialize
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl terminal_writestring
nop
ldp x29, x30, [sp], 16
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE9:
.size kernel_main, .-kernel_main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global gcd
.type gcd, %function
gcd:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str w0, [sp, 28]
str w1, [sp, 24]
ldr w0, [sp, 28]
cmp w0, 0
bne .L2
ldr w0, [sp, 24]
b .L3
.L2:
ldr w0, [sp, 24]
ldr w1, [sp, 28]
sdiv w2, w0, w1
ldr w1, [sp, 28]
mul w1, w2, w1
sub w0, w0, w1
ldr w1, [sp, 28]
bl gcd
.L3:
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size gcd, .-gcd
.align 2
.global lcm
.type lcm, %function
lcm:
.LFB1:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x19, [sp, 16]
.cfi_offset 19, -32
str w0, [sp, 44]
str w1, [sp, 40]
ldr w1, [sp, 44]
ldr w0, [sp, 40]
mul w19, w1, w0
ldr w1, [sp, 40]
ldr w0, [sp, 44]
bl gcd
sdiv w0, w19, w0
ldr x19, [sp, 16]
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_restore 19
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE1:
.size lcm, .-lcm
.section .rodata
.align 3
.LC0:
.string "%d"
.align 3
.LC1:
.string "%d%d%d%d"
.align 3
.LC2:
.string "%d\n"
.text
.align 2
.global main
.type main, %function
main:
.LFB2:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 56]
mov x1, 0
add x0, sp, 28
mov x1, x0
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl __isoc99_scanf
b .L7
.L14:
str wzr, [sp, 48]
add x3, sp, 44
add x2, sp, 40
add x1, sp, 36
add x0, sp, 32
mov x4, x3
mov x3, x2
mov x2, x1
mov x1, x0
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl __isoc99_scanf
mov w0, 1
str w0, [sp, 52]
b .L8
.L13:
ldr w1, [sp, 36]
ldr w0, [sp, 52]
sdiv w2, w0, w1
mul w1, w2, w1
sub w0, w0, w1
cmp w0, 0
bne .L9
ldr w0, [sp, 36]
ldr w1, [sp, 40]
bl lcm
mov w1, w0
ldr w0, [sp, 52]
sdiv w2, w0, w1
mul w1, w2, w1
sub w0, w0, w1
cmp w0, 0
beq .L9
ldr w0, [sp, 36]
ldr w1, [sp, 44]
bl lcm
mov w1, w0
ldr w0, [sp, 52]
sdiv w2, w0, w1
mul w1, w2, w1
sub w0, w0, w1
cmp w0, 0
beq .L9
ldr w0, [sp, 36]
ldr w1, [sp, 40]
bl lcm
mov w2, w0
ldr w0, [sp, 44]
mov w1, w0
mov w0, w2
bl lcm
mov w1, w0
ldr w0, [sp, 52]
sdiv w2, w0, w1
mul w1, w2, w1
sub w0, w0, w1
cmp w0, 0
beq .L9
ldr w0, [sp, 48]
add w0, w0, 1
str w0, [sp, 48]
b .L10
.L9:
ldr w1, [sp, 40]
ldr w0, [sp, 52]
sdiv w2, w0, w1
mul w1, w2, w1
sub w0, w0, w1
cmp w0, 0
bne .L11
ldr w0, [sp, 36]
ldr w1, [sp, 40]
bl lcm
mov w1, w0
ldr w0, [sp, 52]
sdiv w2, w0, w1
mul w1, w2, w1
sub w0, w0, w1
cmp w0, 0
beq .L11
ldr w0, [sp, 40]
ldr w1, [sp, 44]
bl lcm
mov w1, w0
ldr w0, [sp, 52]
sdiv w2, w0, w1
mul w1, w2, w1
sub w0, w0, w1
cmp w0, 0
beq .L11
ldr w0, [sp, 36]
ldr w1, [sp, 40]
bl lcm
mov w2, w0
ldr w0, [sp, 44]
mov w1, w0
mov w0, w2
bl lcm
mov w1, w0
ldr w0, [sp, 52]
sdiv w2, w0, w1
mul w1, w2, w1
sub w0, w0, w1
cmp w0, 0
beq .L11
ldr w0, [sp, 48]
add w0, w0, 1
str w0, [sp, 48]
b .L10
.L11:
ldr w1, [sp, 44]
ldr w0, [sp, 52]
sdiv w2, w0, w1
mul w1, w2, w1
sub w0, w0, w1
cmp w0, 0
bne .L10
ldr w0, [sp, 44]
ldr w1, [sp, 40]
bl lcm
mov w1, w0
ldr w0, [sp, 52]
sdiv w2, w0, w1
mul w1, w2, w1
sub w0, w0, w1
cmp w0, 0
beq .L10
ldr w0, [sp, 36]
ldr w1, [sp, 44]
bl lcm
mov w1, w0
ldr w0, [sp, 52]
sdiv w2, w0, w1
mul w1, w2, w1
sub w0, w0, w1
cmp w0, 0
beq .L10
ldr w0, [sp, 36]
ldr w1, [sp, 40]
bl lcm
mov w2, w0
ldr w0, [sp, 44]
mov w1, w0
mov w0, w2
bl lcm
mov w1, w0
ldr w0, [sp, 52]
sdiv w2, w0, w1
mul w1, w2, w1
sub w0, w0, w1
cmp w0, 0
beq .L10
ldr w0, [sp, 48]
add w0, w0, 1
str w0, [sp, 48]
.L10:
ldr w0, [sp, 52]
add w0, w0, 1
str w0, [sp, 52]
.L8:
ldr w0, [sp, 32]
ldr w1, [sp, 52]
cmp w1, w0
ble .L13
ldr w1, [sp, 48]
adrp x0, .LC2
add x0, x0, :lo12:.LC2
bl printf
ldr w0, [sp, 28]
sub w0, w0, #1
str w0, [sp, 28]
.L7:
ldr w0, [sp, 28]
cmp w0, 0
bgt .L14
mov w0, 0
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 56]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L16
bl __stack_chk_fail
.L16:
mov w0, w1
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE2:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global constructor
.type constructor, %function
constructor:
.LFB0:
.cfi_startproc
sub sp, sp, #48
.cfi_def_cfa_offset 48
mov x3, x8
str w0, [sp, 12]
str x1, [sp]
str w2, [sp, 8]
ldr w0, [sp, 12]
str w0, [sp, 24]
ldr x0, [sp]
str x0, [sp, 32]
ldr w0, [sp, 8]
str w0, [sp, 40]
add x2, sp, 24
ldp x0, x1, [x2]
stp x0, x1, [x3]
ldr x0, [x2, 16]
str x0, [x3, 16]
add sp, sp, 48
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size constructor, .-constructor
.align 2
.global hashCode
.type hashCode, %function
hashCode:
.LFB1:
.cfi_startproc
str x19, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 19, -32
mov x19, x0
ldr w0, [x19]
str w0, [sp, 28]
ldr w1, [sp, 28]
mov w0, w1
lsl w0, w0, 5
sub w1, w0, w1
ldr x0, [x19, 8]
mov w2, w0
ldr x0, [x19, 8]
asr x0, x0, 32
eor w0, w2, w0
add w0, w1, w0
str w0, [sp, 28]
ldr w1, [sp, 28]
mov w0, w1
lsl w0, w0, 5
sub w1, w0, w1
ldr w0, [x19, 16]
add w0, w1, w0
str w0, [sp, 28]
ldr w0, [sp, 28]
ldr x19, [sp], 32
.cfi_restore 19
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE1:
.size hashCode, .-hashCode
.section .rodata
.align 3
.LC0:
.string "Solved hash collision 1"
.text
.align 2
.global testCollision1
.type testCollision1, %function
testCollision1:
.LFB2:
.cfi_startproc
stp x29, x30, [sp, -160]!
.cfi_def_cfa_offset 160
.cfi_offset 29, -160
.cfi_offset 30, -152
mov x29, sp
str x19, [sp, 16]
.cfi_offset 19, -144
str w0, [sp, 92]
str x1, [sp, 80]
str w2, [sp, 88]
str w3, [sp, 76]
str x4, [sp, 64]
str w5, [sp, 72]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 152]
mov x1, 0
add x0, sp, 104
mov x8, x0
ldr w2, [sp, 88]
ldr x1, [sp, 80]
ldr w0, [sp, 92]
bl constructor
add x0, sp, 128
mov x8, x0
ldr w2, [sp, 72]
ldr x1, [sp, 64]
ldr w0, [sp, 76]
bl constructor
add x2, sp, 32
add x3, sp, 104
ldp x0, x1, [x3]
stp x0, x1, [x2]
ldr x0, [x3, 16]
str x0, [x2, 16]
add x0, sp, 32
bl hashCode
mov w19, w0
add x2, sp, 32
add x3, sp, 128
ldp x0, x1, [x3]
stp x0, x1, [x2]
ldr x0, [x3, 16]
str x0, [x2, 16]
add x0, sp, 32
bl hashCode
cmp w19, w0
bne .L8
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl puts
.L8:
nop
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [sp, 152]
ldr x1, [x0]
subs x2, x2, x1
mov x1, 0
beq .L7
bl __stack_chk_fail
.L7:
ldr x19, [sp, 16]
ldp x29, x30, [sp], 160
.cfi_restore 30
.cfi_restore 29
.cfi_restore 19
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE2:
.size testCollision1, .-testCollision1
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global test_vmovls8
.type test_vmovls8, %function
test_vmovls8:
.LFB4340:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
ldr d0, [sp]
str d0, [sp, 8]
ldr d0, [sp, 8]
sxtl v0.8h, v0.8b
str q0, [sp, 16]
nop
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE4340:
.size test_vmovls8, .-test_vmovls8
``` |