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### Human: Write a random program in ARM assembly### Assistant: ``` .text .align 2 .global _vsnprintf .type _vsnprintf, %function _vsnprintf: .LFB0: .cfi_startproc stp x29, x30, [sp, -96]! .cfi_def_cfa_offset 96 .cfi_offset 29, -96 .cfi_offset 30, -88 mov x29, sp str x19, [sp, 16] .cfi_offset 19, -80 str x0, [sp, 88] str x1, [sp, 80] str x2, [sp, 72] mov x19, x3 add x0, sp, 32 mov x1, x19 ldp q0, q1, [x1] stp q0, q1, [x0] add x0, sp, 32 mov x3, x0 ldr x2, [sp, 72] ldr x1, [sp, 80] ldr x0, [sp, 88] bl vsnprintf ldr x19, [sp, 16] ldp x29, x30, [sp], 96 .cfi_restore 30 .cfi_restore 29 .cfi_restore 19 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE0: .size _vsnprintf, .-_vsnprintf ```
### Human: Write a random program in ARM assembly### Assistant: ``` .text .section .rodata .align 3 .LC0: .string "%d %d\n" .text .align 2 .global flatten_code01 .type flatten_code01, %function flatten_code01: .LFB0: .cfi_startproc stp x29, x30, [sp, -32]! .cfi_def_cfa_offset 32 .cfi_offset 29, -32 .cfi_offset 30, -24 mov x29, sp mov w0, 1 str w0, [sp, 20] ldr w0, [sp, 20] add w0, w0, 1 str w0, [sp, 20] mov w0, 2 str w0, [sp, 24] ldr w0, [sp, 24] add w0, w0, 1 str w0, [sp, 24] mov w0, 1 str w0, [sp, 28] ldr w0, [sp, 28] str w0, [sp, 20] ldr w2, [sp, 28] ldr w1, [sp, 20] adrp x0, .LC0 add x0, x0, :lo12:.LC0 bl printf nop ldp x29, x30, [sp], 32 .cfi_restore 30 .cfi_restore 29 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE0: .size flatten_code01, .-flatten_code01 .align 2 .global main .type main, %function main: .LFB1: .cfi_startproc stp x29, x30, [sp, -32]! .cfi_def_cfa_offset 32 .cfi_offset 29, -32 .cfi_offset 30, -24 mov x29, sp str w0, [sp, 28] str x1, [sp, 16] bl flatten_code01 mov w0, 0 ldp x29, x30, [sp], 32 .cfi_restore 30 .cfi_restore 29 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE1: .size main, .-main ```
### Human: Write a random program in ARM assembly### Assistant: ``` .text .data .align 3 .type letters, %object .size letters, 26 letters: .ascii "ABCDEFGHIJKLMNOPQRSTUVWXYZ" .section .rodata .align 3 .LC0: .string "Letters %s!\n" .text .align 2 .global main .type main, %function main: .LFB0: .cfi_startproc stp x29, x30, [sp, -16]! .cfi_def_cfa_offset 16 .cfi_offset 29, -16 .cfi_offset 30, -8 mov x29, sp adrp x0, letters add x1, x0, :lo12:letters adrp x0, .LC0 add x0, x0, :lo12:.LC0 bl printf mov w0, 0 ldp x29, x30, [sp], 16 .cfi_restore 30 .cfi_restore 29 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE0: .size main, .-main ```
### Human: Write a random program in ARM assembly### Assistant: ``` .text .local u1 .comm u1,80,16 .local u2 .comm u2,80,16 .align 2 .global test .type test, %function test: .LFB0: .cfi_startproc stp x29, x30, [sp, -64]! .cfi_def_cfa_offset 64 .cfi_offset 29, -64 .cfi_offset 30, -56 mov x29, sp str x0, [sp, 40] str x1, [sp, 32] str x2, [sp, 24] str w3, [sp, 20] ldr x2, [sp, 24] ldr x1, [sp, 32] ldr x0, [sp, 40] bl strncmp str w0, [sp, 60] ldr w0, [sp, 20] cmp w0, 0 bge .L2 ldr w0, [sp, 60] cmp w0, 0 blt .L2 bl abort .L2: ldr w0, [sp, 20] cmp w0, 0 bne .L3 ldr w0, [sp, 60] cmp w0, 0 beq .L3 bl abort .L3: ldr w0, [sp, 20] cmp w0, 0 ble .L5 ldr w0, [sp, 60] cmp w0, 0 bgt .L5 bl abort .L5: nop ldp x29, x30, [sp], 64 .cfi_restore 30 .cfi_restore 29 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE0: .size test, .-test .align 2 .global main .type main, %function main: .LFB1: .cfi_startproc stp x29, x30, [sp, -96]! .cfi_def_cfa_offset 96 .cfi_offset 29, -96 .cfi_offset 30, -88 mov x29, sp str xzr, [sp, 16] b .L7 .L24: str xzr, [sp, 24] b .L8 .L23: str xzr, [sp, 32] b .L9 .L22: adrp x0, u1 add x0, x0, :lo12:u1 str x0, [sp, 48] str xzr, [sp, 40] b .L10 .L11: ldr x0, [sp, 48] add x1, x0, 1 str x1, [sp, 48] strb wzr, [x0] ldr x0, [sp, 40] add x0, x0, 1 str x0, [sp, 40] .L10: ldr x1, [sp, 40] ldr x0, [sp, 16] cmp x1, x0 bcc .L11 ldr x0, [sp, 48] str x0, [sp, 64] str xzr, [sp, 40] b .L12 .L13: ldr x0, [sp, 48] add x1, x0, 1 str x1, [sp, 48] mov w1, 97 strb w1, [x0] ldr x0, [sp, 40] add x0, x0, 1 str x0, [sp, 40] .L12: ldr x1, [sp, 40] ldr x0, [sp, 32] cmp x1, x0 bcc .L13 ldr x0, [sp, 48] str x0, [sp, 72] str xzr, [sp, 40] b .L14 .L15: ldr x0, [sp, 48] add x1, x0, 1 str x1, [sp, 48] mov w1, 120 strb w1, [x0] ldr x0, [sp, 40] add x0, x0, 1 str x0, [sp, 40] .L14: ldr x0, [sp, 40] cmp x0, 7 bls .L15 adrp x0, u2 add x0, x0, :lo12:u2 str x0, [sp, 56] str xzr, [sp, 40] b .L16 .L17: ldr x0, [sp, 56] add x1, x0, 1 str x1, [sp, 56] strb wzr, [x0] ldr x0, [sp, 40] add x0, x0, 1 str x0, [sp, 40] .L16: ldr x1, [sp, 40] ldr x0, [sp, 24] cmp x1, x0 bcc .L17 ldr x0, [sp, 56] str x0, [sp, 80] str xzr, [sp, 40] b .L18 .L19: ldr x0, [sp, 56] add x1, x0, 1 str x1, [sp, 56] mov w1, 97 strb w1, [x0] ldr x0, [sp, 40] add x0, x0, 1 str x0, [sp, 40] .L18: ldr x1, [sp, 40] ldr x0, [sp, 32] cmp x1, x0 bcc .L19 ldr x0, [sp, 56] str x0, [sp, 88] str xzr, [sp, 40] b .L20 .L21: ldr x0, [sp, 56] add x1, x0, 1 str x1, [sp, 56] mov w1, 120 strb w1, [x0] ldr x0, [sp, 40] add x0, x0, 1 str x0, [sp, 40] .L20: ldr x0, [sp, 40] cmp x0, 7 bls .L21 ldr x0, [sp, 72] strb wzr, [x0] ldr x0, [sp, 88] strb wzr, [x0] mov w3, 0 mov x2, 80 ldr x1, [sp, 80] ldr x0, [sp, 64] bl test mov w3, 0 ldr x2, [sp, 32] ldr x1, [sp, 80] ldr x0, [sp, 64] bl test ldr x0, [sp, 72] mov w1, 97 strb w1, [x0] ldr x0, [sp, 72] add x0, x0, 1 strb wzr, [x0] ldr x0, [sp, 88] strb wzr, [x0] mov w3, 1 mov x2, 80 ldr x1, [sp, 80] ldr x0, [sp, 64] bl test mov w3, 0 ldr x2, [sp, 32] ldr x1, [sp, 80] ldr x0, [sp, 64] bl test ldr x0, [sp, 72] strb wzr, [x0] ldr x0, [sp, 88] mov w1, 97 strb w1, [x0] ldr x0, [sp, 88] add x0, x0, 1 strb wzr, [x0] mov w3, -1 mov x2, 80 ldr x1, [sp, 80] ldr x0, [sp, 64] bl test mov w3, 0 ldr x2, [sp, 32] ldr x1, [sp, 80] ldr x0, [sp, 64] bl test ldr x0, [sp, 72] mov w1, 98 strb w1, [x0] ldr x0, [sp, 72] add x0, x0, 1 strb wzr, [x0] ldr x0, [sp, 88] mov w1, 99 strb w1, [x0] ldr x0, [sp, 88] add x0, x0, 1 strb wzr, [x0] mov w3, -1 mov x2, 80 ldr x1, [sp, 80] ldr x0, [sp, 64] bl test mov w3, 0 ldr x2, [sp, 32] ldr x1, [sp, 80] ldr x0, [sp, 64] bl test ldr x0, [sp, 72] mov w1, 99 strb w1, [x0] ldr x0, [sp, 72] add x0, x0, 1 strb wzr, [x0] ldr x0, [sp, 88] mov w1, 98 strb w1, [x0] ldr x0, [sp, 88] add x0, x0, 1 strb wzr, [x0] mov w3, 1 mov x2, 80 ldr x1, [sp, 80] ldr x0, [sp, 64] bl test mov w3, 0 ldr x2, [sp, 32] ldr x1, [sp, 80] ldr x0, [sp, 64] bl test ldr x0, [sp, 72] mov w1, 98 strb w1, [x0] ldr x0, [sp, 72] add x0, x0, 1 strb wzr, [x0] ldr x0, [sp, 88] mov w1, -87 strb w1, [x0] ldr x0, [sp, 88] add x0, x0, 1 strb wzr, [x0] mov w3, -1 mov x2, 80 ldr x1, [sp, 80] ldr x0, [sp, 64] bl test mov w3, 0 ldr x2, [sp, 32] ldr x1, [sp, 80] ldr x0, [sp, 64] bl test ldr x0, [sp, 72] mov w1, -87 strb w1, [x0] ldr x0, [sp, 72] add x0, x0, 1 strb wzr, [x0] ldr x0, [sp, 88] mov w1, 98 strb w1, [x0] ldr x0, [sp, 88] add x0, x0, 1 strb wzr, [x0] mov w3, 1 mov x2, 80 ldr x1, [sp, 80] ldr x0, [sp, 64] bl test mov w3, 0 ldr x2, [sp, 32] ldr x1, [sp, 80] ldr x0, [sp, 64] bl test ldr x0, [sp, 72] mov w1, -87 strb w1, [x0] ldr x0, [sp, 72] add x0, x0, 1 strb wzr, [x0] ldr x0, [sp, 88] mov w1, -86 strb w1, [x0] ldr x0, [sp, 88] add x0, x0, 1 strb wzr, [x0] mov w3, -1 mov x2, 80 ldr x1, [sp, 80] ldr x0, [sp, 64] bl test mov w3, 0 ldr x2, [sp, 32] ldr x1, [sp, 80] ldr x0, [sp, 64] bl test ldr x0, [sp, 72] mov w1, -86 strb w1, [x0] ldr x0, [sp, 72] add x0, x0, 1 strb wzr, [x0] ldr x0, [sp, 88] mov w1, -87 strb w1, [x0] ldr x0, [sp, 88] add x0, x0, 1 strb wzr, [x0] mov w3, 1 mov x2, 80 ldr x1, [sp, 80] ldr x0, [sp, 64] bl test mov w3, 0 ldr x2, [sp, 32] ldr x1, [sp, 80] ldr x0, [sp, 64] bl test ldr x0, [sp, 32] add x0, x0, 1 str x0, [sp, 32] .L9: ldr x0, [sp, 32] cmp x0, 63 bls .L22 ldr x0, [sp, 24] add x0, x0, 1 str x0, [sp, 24] .L8: ldr x0, [sp, 24] cmp x0, 7 bls .L23 ldr x0, [sp, 16] add x0, x0, 1 str x0, [sp, 16] .L7: ldr x0, [sp, 16] cmp x0, 7 bls .L24 mov w0, 0 bl exit .cfi_endproc .LFE1: .size main, .-main ```
### Human: Write a random program in ARM assembly### Assistant: ``` .text .align 2 .global add .type add, %function add: .LFB0: .cfi_startproc sub sp, sp, #16 .cfi_def_cfa_offset 16 str w0, [sp, 12] str w1, [sp, 8] ldr w1, [sp, 8] ldr w0, [sp, 12] add w0, w1, w0 add sp, sp, 16 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE0: .size add, .-add ```
### Human: Write a random program in ARM assembly### Assistant: ``` .text .section .rodata .align 3 .LC0: .string "Input the characters: " .align 3 .LC1: .string "is" .align 3 .LC2: .string "not" .align 3 .LC3: .string "%c : %s digit\n" .text .align 2 .global main .type main, %function main: .LFB0: .cfi_startproc stp x29, x30, [sp, -32]! .cfi_def_cfa_offset 32 .cfi_offset 29, -32 .cfi_offset 30, -24 mov x29, sp adrp x0, .LC0 add x0, x0, :lo12:.LC0 bl puts .L4: bl getchar str w0, [sp, 28] bl __ctype_b_loc ldr x1, [x0] ldrsw x0, [sp, 28] lsl x0, x0, 1 add x0, x1, x0 ldrh w0, [x0] and w0, w0, 2048 cmp w0, 0 beq .L2 adrp x0, .LC1 add x0, x0, :lo12:.LC1 b .L3 .L2: adrp x0, .LC2 add x0, x0, :lo12:.LC2 .L3: mov x2, x0 ldr w1, [sp, 28] adrp x0, .LC3 add x0, x0, :lo12:.LC3 bl printf b .L4 .cfi_endproc .LFE0: .size main, .-main ```
### Human: Write a random program in ARM assembly### Assistant: ``` .text .global xtensa_regmap_table .section .rodata .align 3 .LC0: .string "scompare1" .section .data.rel.ro.local,"aw" .align 3 .type xtensa_regmap_table, %object .size xtensa_regmap_table, 80 xtensa_regmap_table: .word 44 .word 176 .word 0 .word 0 .word 4 .word -1 .word 524 .zero 4 .xword .LC0 .word 0 .zero 36 ```
### Human: Write a random program in ARM assembly### Assistant: ``` .text .section .rodata .align 3 .LC0: .string "%d%c" .text .align 2 .global main .type main, %function main: .LFB8: .cfi_startproc stp x29, x30, [sp, -80]! .cfi_def_cfa_offset 80 .cfi_offset 29, -80 .cfi_offset 30, -72 mov x29, sp adrp x0, :got:__stack_chk_guard ldr x0, [x0, #:got_lo12:__stack_chk_guard] ldr x1, [x0] str x1, [sp, 72] mov x1, 0 stp xzr, xzr, [sp, 32] stp xzr, xzr, [sp, 48] str xzr, [sp, 64] str wzr, [sp, 28] b .L2 .L3: ldr w0, [sp, 28] add w0, w0, 1 str w0, [sp, 28] mov w0, 10 bl one_of_n mov w3, w0 sxtw x0, w3 lsl x0, x0, 2 add x1, sp, 32 ldr w0, [x1, x0] add w2, w0, 1 sxtw x0, w3 lsl x0, x0, 2 add x1, sp, 32 str w2, [x1, x0] .L2: ldr w1, [sp, 28] mov w0, 16959 movk w0, 0xf, lsl 16 cmp w1, w0 ble .L3 str wzr, [sp, 28] b .L4 .L7: ldrsw x0, [sp, 28] lsl x0, x0, 2 add x1, sp, 32 ldr w1, [x1, x0] ldr w0, [sp, 28] cmp w0, 9 bne .L5 mov w0, 10 b .L6 .L5: mov w0, 32 .L6: mov w2, w0 adrp x0, .LC0 add x0, x0, :lo12:.LC0 bl printf ldr w0, [sp, 28] add w0, w0, 1 str w0, [sp, 28] .L4: ldr w0, [sp, 28] cmp w0, 9 ble .L7 mov w0, 0 mov w1, w0 adrp x0, :got:__stack_chk_guard ldr x0, [x0, #:got_lo12:__stack_chk_guard] ldr x3, [sp, 72] ldr x2, [x0] subs x3, x3, x2 mov x2, 0 beq .L9 bl __stack_chk_fail .L9: mov w0, w1 ldp x29, x30, [sp], 80 .cfi_restore 30 .cfi_restore 29 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE8: .size main, .-main ```
### Human: Write a random program in ARM assembly### Assistant: ``` .text .section .rodata .align 3 .LC0: .string "." .align 3 .LC1: .string "pass" .text .align 2 .global main .type main, %function main: .LFB6: .cfi_startproc stp x29, x30, [sp, -160]! .cfi_def_cfa_offset 160 .cfi_offset 29, -160 .cfi_offset 30, -152 mov x29, sp adrp x0, :got:__stack_chk_guard ldr x0, [x0, #:got_lo12:__stack_chk_guard] ldr x1, [x0] str x1, [sp, 152] mov x1, 0 add x0, sp, 24 mov x1, x0 adrp x0, .LC0 add x0, x0, :lo12:.LC0 bl stat cmp w0, 0 bne .L2 ldr w0, [sp, 40] and w0, w0, 61440 cmp w0, 16384 beq .L3 .L2: bl abort .L3: adrp x0, .LC1 add x0, x0, :lo12:.LC1 bl puts mov w0, 0 bl exit .cfi_endproc .LFE6: .size main, .-main ```
### Human: Write a random program in ARM assembly### Assistant: ``` .text .align 2 .global main .type main, %function main: .LFB6: .cfi_startproc stp x29, x30, [sp, -48]! .cfi_def_cfa_offset 48 .cfi_offset 29, -48 .cfi_offset 30, -40 mov x29, sp str w0, [sp, 28] str x1, [sp, 16] mov w0, 1 str w0, [sp, 40] mov w0, 8 str w0, [sp, 44] bl clock bl srand ldr w0, [sp, 28] cmp w0, 2 beq .L2 ldr w0, [sp, 28] cmp w0, 3 bne .L3 ldr x0, [sp, 16] add x0, x0, 16 ldr x0, [x0] bl atoi str w0, [sp, 40] .L2: ldr x0, [sp, 16] add x0, x0, 8 ldr x0, [x0] bl atoi str w0, [sp, 44] .L3: mov w0, 1 str w0, [sp, 36] b .L4 .L7: mov w0, 1 str w0, [sp, 32] b .L5 .L6: bl rand mov w1, 16733 movk w1, 0xae4c, lsl 16 smull x1, w0, w1 lsr x1, x1, 32 add w1, w0, w1 asr w2, w1, 6 asr w1, w0, 31 sub w1, w2, w1 mov w2, 94 mul w1, w1, w2 sub w1, w0, w1 add w0, w1, 33 bl putchar ldr w0, [sp, 32] add w0, w0, 1 str w0, [sp, 32] .L5: ldr w1, [sp, 32] ldr w0, [sp, 44] cmp w1, w0 ble .L6 mov w0, 10 bl putchar ldr w0, [sp, 36] add w0, w0, 1 str w0, [sp, 36] .L4: ldr w1, [sp, 36] ldr w0, [sp, 40] cmp w1, w0 ble .L7 mov w0, 0 ldp x29, x30, [sp], 48 .cfi_restore 30 .cfi_restore 29 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE6: .size main, .-main ```
### Human: Write a random program in ARM assembly### Assistant: ``` .text .global vars .bss .align 3 .type vars, %object .size vars, 12 vars: .zero 12 .global atom_1_r1_1 .align 2 .type atom_1_r1_1, %object .size atom_1_r1_1, 4 atom_1_r1_1: .zero 4 .global atom_1_r9_0 .align 2 .type atom_1_r9_0, %object .size atom_1_r9_0, 4 atom_1_r9_0: .zero 4 .text .align 2 .global t0 .type t0, %function t0: .LFB0: .cfi_startproc stp x29, x30, [sp, -64]! .cfi_def_cfa_offset 64 .cfi_offset 29, -64 .cfi_offset 30, -56 mov x29, sp str x0, [sp, 24] adrp x0, :got:__stack_chk_guard ldr x0, [x0, #:got_lo12:__stack_chk_guard] ldr x1, [x0] str x1, [sp, 56] mov x1, 0 .L2: adrp x0, vars add x0, x0, :lo12:vars str x0, [sp, 40] mov w0, 1 str w0, [sp, 36] ldr w0, [sp, 36] mov w1, w0 ldr x0, [sp, 40] stlr w1, [x0] adrp x0, vars+4 add x0, x0, :lo12:vars+4 str x0, [sp, 48] mov w0, 1 str w0, [sp, 36] ldr w0, [sp, 36] mov w1, w0 ldr x0, [sp, 48] stlr w1, [x0] mov x0, 0 mov x1, x0 adrp x0, :got:__stack_chk_guard ldr x0, [x0, #:got_lo12:__stack_chk_guard] ldr x3, [sp, 56] ldr x2, [x0] subs x3, x3, x2 mov x2, 0 beq .L4 bl __stack_chk_fail .L4: mov x0, x1 ldp x29, x30, [sp], 64 .cfi_restore 30 .cfi_restore 29 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE0: .size t0, .-t0 .align 2 .global t1 .type t1, %function t1: .LFB1: .cfi_startproc stp x29, x30, [sp, -160]! .cfi_def_cfa_offset 160 .cfi_offset 29, -160 .cfi_offset 30, -152 mov x29, sp str x0, [sp, 24] adrp x0, :got:__stack_chk_guard ldr x0, [x0, #:got_lo12:__stack_chk_guard] ldr x1, [x0] str x1, [sp, 152] mov x1, 0 .L6: adrp x0, vars+4 add x0, x0, :lo12:vars+4 str x0, [sp, 80] ldr x0, [sp, 80] ldar w0, [x0] str w0, [sp, 36] ldr w0, [sp, 36] str w0, [sp, 40] adrp x0, vars+4 add x0, x0, :lo12:vars+4 str x0, [sp, 88] ldr x0, [sp, 88] ldar w0, [x0] str w0, [sp, 36] ldr w0, [sp, 36] str w0, [sp, 44] str wzr, [sp, 48] ldr w0, [sp, 48] add w0, w0, 1 str w0, [sp, 52] adrp x0, vars+8 add x0, x0, :lo12:vars+8 str x0, [sp, 96] ldr w0, [sp, 52] str w0, [sp, 36] ldr w0, [sp, 36] mov w1, w0 ldr x0, [sp, 96] stlr w1, [x0] adrp x0, vars+8 add x0, x0, :lo12:vars+8 str x0, [sp, 104] ldr x0, [sp, 104] ldar w0, [x0] str w0, [sp, 36] ldr w0, [sp, 36] str w0, [sp, 56] adrp x0, vars+8 add x0, x0, :lo12:vars+8 str x0, [sp, 112] mov w0, 2 str w0, [sp, 36] ldr w0, [sp, 36] mov w1, w0 ldr x0, [sp, 112] stlr w1, [x0] adrp x0, vars+8 add x0, x0, :lo12:vars+8 str x0, [sp, 120] ldr x0, [sp, 120] ldar w0, [x0] str w0, [sp, 36] ldr w0, [sp, 36] str w0, [sp, 60] mov w0, 1 str w0, [sp, 64] ldr w0, [sp, 64] cmp w0, 0 nop .L8: adrp x0, vars add x0, x0, :lo12:vars str x0, [sp, 128] ldr x0, [sp, 128] ldar w0, [x0] str w0, [sp, 36] ldr w0, [sp, 36] str w0, [sp, 68] ldr w0, [sp, 40] cmp w0, 1 cset w0, eq and w0, w0, 255 str w0, [sp, 72] adrp x0, atom_1_r1_1 add x0, x0, :lo12:atom_1_r1_1 str x0, [sp, 136] ldr w0, [sp, 72] str w0, [sp, 36] ldr w0, [sp, 36] mov w1, w0 ldr x0, [sp, 136] stlr w1, [x0] ldr w0, [sp, 68] cmp w0, 0 cset w0, eq and w0, w0, 255 str w0, [sp, 76] adrp x0, atom_1_r9_0 add x0, x0, :lo12:atom_1_r9_0 str x0, [sp, 144] ldr w0, [sp, 76] str w0, [sp, 36] ldr w0, [sp, 36] mov w1, w0 ldr x0, [sp, 144] stlr w1, [x0] mov x0, 0 mov x1, x0 adrp x0, :got:__stack_chk_guard ldr x0, [x0, #:got_lo12:__stack_chk_guard] ldr x3, [sp, 152] ldr x2, [x0] subs x3, x3, x2 mov x2, 0 beq .L10 bl __stack_chk_fail .L10: mov x0, x1 ldp x29, x30, [sp], 160 .cfi_restore 30 .cfi_restore 29 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE1: .size t1, .-t1 .section .rodata .align 3 .LC0: .string "program.c" .align 3 .LC1: .string "0" .text .align 2 .global main .type main, %function main: .LFB2: .cfi_startproc stp x29, x30, [sp, -160]! .cfi_def_cfa_offset 160 .cfi_offset 29, -160 .cfi_offset 30, -152 mov x29, sp str w0, [sp, 28] str x1, [sp, 16] adrp x0, :got:__stack_chk_guard ldr x0, [x0, #:got_lo12:__stack_chk_guard] ldr x1, [x0] str x1, [sp, 152] mov x1, 0 adrp x0, vars+4 add x0, x0, :lo12:vars+4 str x0, [sp, 88] str wzr, [sp, 80] ldr w0, [sp, 80] mov w1, w0 ldr x0, [sp, 88] str w1, [x0] adrp x0, vars+8 add x0, x0, :lo12:vars+8 str x0, [sp, 96] str wzr, [sp, 80] ldr w0, [sp, 80] mov w1, w0 ldr x0, [sp, 96] str w1, [x0] adrp x0, vars add x0, x0, :lo12:vars str x0, [sp, 104] str wzr, [sp, 80] ldr w0, [sp, 80] mov w1, w0 ldr x0, [sp, 104] str w1, [x0] adrp x0, atom_1_r1_1 add x0, x0, :lo12:atom_1_r1_1 str x0, [sp, 112] str wzr, [sp, 80] ldr w0, [sp, 80] mov w1, w0 ldr x0, [sp, 112] str w1, [x0] adrp x0, atom_1_r9_0 add x0, x0, :lo12:atom_1_r9_0 str x0, [sp, 120] str wzr, [sp, 80] ldr w0, [sp, 80] mov w1, w0 ldr x0, [sp, 120] str w1, [x0] add x4, sp, 72 mov x3, 0 adrp x0, t0 add x2, x0, :lo12:t0 mov x1, 0 mov x0, x4 bl pthread_create add x4, sp, 80 mov x3, 0 adrp x0, t1 add x2, x0, :lo12:t1 mov x1, 0 mov x0, x4 bl pthread_create ldr x0, [sp, 72] mov x1, 0 bl pthread_join ldr x0, [sp, 80] mov x1, 0 bl pthread_join adrp x0, vars+8 add x0, x0, :lo12:vars+8 str x0, [sp, 128] ldr x0, [sp, 128] ldar w0, [x0] str w0, [sp, 44] ldr w0, [sp, 44] str w0, [sp, 48] ldr w0, [sp, 48] cmp w0, 2 cset w0, eq and w0, w0, 255 str w0, [sp, 52] adrp x0, atom_1_r1_1 add x0, x0, :lo12:atom_1_r1_1 str x0, [sp, 136] ldr x0, [sp, 136] ldar w0, [x0] str w0, [sp, 44] ldr w0, [sp, 44] str w0, [sp, 56] adrp x0, atom_1_r9_0 add x0, x0, :lo12:atom_1_r9_0 str x0, [sp, 144] ldr x0, [sp, 144] ldar w0, [x0] str w0, [sp, 44] ldr w0, [sp, 44] str w0, [sp, 60] ldr w1, [sp, 56] ldr w0, [sp, 60] and w0, w1, w0 str w0, [sp, 64] ldr w1, [sp, 52] ldr w0, [sp, 64] and w0, w1, w0 str w0, [sp, 68] ldr w0, [sp, 68] cmp w0, 1 bne .L12 adrp x0, __PRETTY_FUNCTION__.0 add x3, x0, :lo12:__PRETTY_FUNCTION__.0 mov w2, 65 adrp x0, .LC0 add x1, x0, :lo12:.LC0 adrp x0, .LC1 add x0, x0, :lo12:.LC1 bl __assert_fail .L12: mov w0, 0 mov w1, w0 adrp x0, :got:__stack_chk_guard ldr x0, [x0, #:got_lo12:__stack_chk_guard] ldr x3, [sp, 152] ldr x2, [x0] subs x3, x3, x2 mov x2, 0 beq .L14 bl __stack_chk_fail .L14: mov w0, w1 ldp x29, x30, [sp], 160 .cfi_restore 30 .cfi_restore 29 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE2: .size main, .-main .section .rodata .align 3 .type __PRETTY_FUNCTION__.0, %object .size __PRETTY_FUNCTION__.0, 5 __PRETTY_FUNCTION__.0: .string "main" ```
### Human: Write a random program in ARM assembly### Assistant: ``` .text .align 2 .global assert .type assert, %function assert: .LFB0: .cfi_startproc sub sp, sp, #16 .cfi_def_cfa_offset 16 str w0, [sp, 12] ldr w0, [sp, 12] cmp w0, 0 bne .L1 nop .L3: nop .L1: add sp, sp, 16 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE0: .size assert, .-assert .align 2 .global main .type main, %function main: .LFB1: .cfi_startproc stp x29, x30, [sp, -32]! .cfi_def_cfa_offset 32 .cfi_offset 29, -32 .cfi_offset 30, -24 mov x29, sp str wzr, [sp, 20] str wzr, [sp, 24] str wzr, [sp, 28] b .L5 .L10: bl __VERIFIER_nondet_int str w0, [sp, 20] ldr w0, [sp, 20] cmn w0, #10 blt .L6 ldr w0, [sp, 20] cmp w0, 10 bgt .L6 mov w0, 1 b .L7 .L6: mov w0, 0 .L7: bl __VERIFIER_assume nop .L8: bl __VERIFIER_nondet_int cmp w0, 0 bne .L8 ldr w0, [sp, 20] cmp w0, 1 bne .L9 ldr w0, [sp, 20] str w0, [sp, 24] b .L5 .L9: ldr w0, [sp, 20] cmn w0, #1 bne .L5 ldr w0, [sp, 20] neg w0, w0 str w0, [sp, 28] .L5: bl __VERIFIER_nondet_int cmp w0, 0 bne .L10 mov w0, 1 bl assert mov w0, 0 ldp x29, x30, [sp], 32 .cfi_restore 30 .cfi_restore 29 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE1: .size main, .-main ```
### Human: Write a random program in ARM assembly### Assistant: ``` .text .align 2 .global getNextLarger .type getNextLarger, %function getNextLarger: .LFB0: .cfi_startproc sub sp, sp, #48 .cfi_def_cfa_offset 48 str x0, [sp, 8] ldr x0, [sp, 8] neg x0, x0 ldr x1, [sp, 8] and x0, x1, x0 str x0, [sp, 24] ldr x1, [sp, 8] ldr x0, [sp, 24] add x0, x1, x0 str x0, [sp, 32] ldr x1, [sp, 8] ldr x0, [sp, 32] eor x0, x1, x0 str x0, [sp, 40] ldr x1, [sp, 40] ldr x0, [sp, 24] udiv x0, x1, x0 str x0, [sp, 40] ldr x0, [sp, 40] lsr x0, x0, 2 str x0, [sp, 40] ldr x1, [sp, 32] ldr x0, [sp, 40] orr x0, x1, x0 add sp, sp, 48 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE0: .size getNextLarger, .-getNextLarger ```
### Human: Write a random program in ARM assembly### Assistant: ``` .text .global SENSOR_PROPERTY_DESCRIPTION .section .rodata .align 3 .type SENSOR_PROPERTY_DESCRIPTION, %object .size SENSOR_PROPERTY_DESCRIPTION, 24 SENSOR_PROPERTY_DESCRIPTION: .xword 2139325420 .hword -11284 .hword 18780 .ascii "\250\317\270\273\350\\) " .zero 4 ```
### Human: Write a random program in ARM assembly### Assistant: ``` .text .align 2 .global main .type main, %function main: .LFB0: .cfi_startproc stp x29, x30, [sp, -16]! .cfi_def_cfa_offset 16 .cfi_offset 29, -16 .cfi_offset 30, -8 mov x29, sp bl gdb2029 bl optimized_1 mov w0, 0 ldp x29, x30, [sp], 16 .cfi_restore 30 .cfi_restore 29 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE0: .size main, .-main .align 2 .global optimized_1_marker .type optimized_1_marker, %function optimized_1_marker: .LFB1: .cfi_startproc nop ret .cfi_endproc .LFE1: .size optimized_1_marker, .-optimized_1_marker .align 2 .global gdb2029_marker .type gdb2029_marker, %function gdb2029_marker: .LFB2: .cfi_startproc nop ret .cfi_endproc .LFE2: .size gdb2029_marker, .-gdb2029_marker #APP .text .p2align 3 gdb2029: mflr %r0 std %r0,16(%r1) std %r31,-8(%r1) stdu %r1,-128(%r1) mr %r31,%r1 mr %r9,%r3 stw %r9,176(%r31) lwz %r9,176(%r31) bl gdb2029_marker nop mr %r9,%r3 mr %r3,%r9 addi %r1,%r31,128 ld %r0,16(%r1) mtlr %r0 ld %r31,-8(%r1) blr .text .p2align 3 optimized_1: stdu %r1,-32(%r1) lis %r9,-16342 lis %r11,-16342 mflr %r0 addi %r11,%r11,3776 std %r30,12(%r1) addi %r31,%r9,3152 cmplw %cr7,%r31,%r11 std %r0,36(%r1) mr %r30,%r3 bl optimized_1_marker nop ld %r0,36(%r1) mtlr %r0 ld %r30,12(%r1) addi %r1,%r1,32 blr ```
### Human: Write a random program in ARM assembly### Assistant: ``` .text .section .rodata .align 3 .LC0: .string "%10d\n" .text .align 2 .global main .type main, %function main: .LFB0: .cfi_startproc stp x29, x30, [sp, -48]! .cfi_def_cfa_offset 48 .cfi_offset 29, -48 .cfi_offset 30, -40 mov x29, sp str d8, [sp, 16] .cfi_offset 72, -32 mov w0, 100 str w0, [sp, 32] .L7: mov w0, 2 str w0, [sp, 36] str wzr, [sp, 40] .L5: ldr w0, [sp, 32] ldr w1, [sp, 36] sdiv w2, w0, w1 ldr w1, [sp, 36] mul w1, w2, w1 sub w0, w0, w1 str w0, [sp, 44] ldr w0, [sp, 44] cmp w0, 0 bne .L2 mov w0, 1 str w0, [sp, 40] b .L3 .L2: ldr w0, [sp, 36] add w0, w0, 1 str w0, [sp, 36] .L3: ldr w0, [sp, 40] cmp w0, 0 bne .L4 ldr w0, [sp, 36] scvtf d8, w0 ldr w0, [sp, 32] scvtf d0, w0 bl sqrt fcmpe d8, d0 bls .L5 .L4: ldr w0, [sp, 40] cmp w0, 0 bne .L6 ldr w1, [sp, 32] adrp x0, .LC0 add x0, x0, :lo12:.LC0 bl printf .L6: ldr w0, [sp, 32] add w0, w0, 1 str w0, [sp, 32] ldr w0, [sp, 32] cmp w0, 200 ble .L7 mov w0, 0 ldr d8, [sp, 16] ldp x29, x30, [sp], 48 .cfi_restore 30 .cfi_restore 29 .cfi_restore 72 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE0: .size main, .-main ```
### Human: Write a random program in ARM assembly### Assistant: ``` .text .align 2 .global __VERIFIER_nondet_bool .type __VERIFIER_nondet_bool, %function __VERIFIER_nondet_bool: .LFB0: .cfi_startproc stp x29, x30, [sp, -16]! .cfi_def_cfa_offset 16 .cfi_offset 29, -16 .cfi_offset 30, -8 mov x29, sp bl __VERIFIER_nondet_int cmp w0, 0 cset w0, ne and w0, w0, 255 ldp x29, x30, [sp], 16 .cfi_restore 30 .cfi_restore 29 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE0: .size __VERIFIER_nondet_bool, .-__VERIFIER_nondet_bool .global p6_l3 .bss .type p6_l3, %object .size p6_l3, 1 p6_l3: .zero 1 .global _x_p6_l3 .type _x_p6_l3, %object .size _x_p6_l3, 1 _x_p6_l3: .zero 1 .global p6_l2 .type p6_l2, %object .size p6_l2, 1 p6_l2: .zero 1 .global _x_p6_l2 .type _x_p6_l2, %object .size _x_p6_l2, 1 _x_p6_l2: .zero 1 .global p6_l1 .type p6_l1, %object .size p6_l1, 1 p6_l1: .zero 1 .global _x_p6_l1 .type _x_p6_l1, %object .size _x_p6_l1, 1 _x_p6_l1: .zero 1 .global p6_l0 .type p6_l0, %object .size p6_l0, 1 p6_l0: .zero 1 .global _x_p6_l0 .type _x_p6_l0, %object .size _x_p6_l0, 1 _x_p6_l0: .zero 1 .global p6_evt .type p6_evt, %object .size p6_evt, 1 p6_evt: .zero 1 .global _x_p6_evt .type _x_p6_evt, %object .size _x_p6_evt, 1 _x_p6_evt: .zero 1 .global p6_c .align 2 .type p6_c, %object .size p6_c, 4 p6_c: .zero 4 .global _x_p6_c .align 2 .type _x_p6_c, %object .size _x_p6_c, 4 _x_p6_c: .zero 4 .global p5_l3 .type p5_l3, %object .size p5_l3, 1 p5_l3: .zero 1 .global _x_p5_l3 .type _x_p5_l3, %object .size _x_p5_l3, 1 _x_p5_l3: .zero 1 .global p5_l2 .type p5_l2, %object .size p5_l2, 1 p5_l2: .zero 1 .global _x_p5_l2 .type _x_p5_l2, %object .size _x_p5_l2, 1 _x_p5_l2: .zero 1 .global p5_l1 .type p5_l1, %object .size p5_l1, 1 p5_l1: .zero 1 .global _x_p5_l1 .type _x_p5_l1, %object .size _x_p5_l1, 1 _x_p5_l1: .zero 1 .global p5_l0 .type p5_l0, %object .size p5_l0, 1 p5_l0: .zero 1 .global _x_p5_l0 .type _x_p5_l0, %object .size _x_p5_l0, 1 _x_p5_l0: .zero 1 .global p4_l3 .type p4_l3, %object .size p4_l3, 1 p4_l3: .zero 1 .global _x_p4_l3 .type _x_p4_l3, %object .size _x_p4_l3, 1 _x_p4_l3: .zero 1 .global p4_l2 .type p4_l2, %object .size p4_l2, 1 p4_l2: .zero 1 .global _x_p4_l2 .type _x_p4_l2, %object .size _x_p4_l2, 1 _x_p4_l2: .zero 1 .global p4_l1 .type p4_l1, %object .size p4_l1, 1 p4_l1: .zero 1 .global _x_p4_l1 .type _x_p4_l1, %object .size _x_p4_l1, 1 _x_p4_l1: .zero 1 .global p4_l0 .type p4_l0, %object .size p4_l0, 1 p4_l0: .zero 1 .global _x_p4_l0 .type _x_p4_l0, %object .size _x_p4_l0, 1 _x_p4_l0: .zero 1 .global p3_l1 .type p3_l1, %object .size p3_l1, 1 p3_l1: .zero 1 .global _x_p3_l1 .type _x_p3_l1, %object .size _x_p3_l1, 1 _x_p3_l1: .zero 1 .global p3_l0 .type p3_l0, %object .size p3_l0, 1 p3_l0: .zero 1 .global _x_p3_l0 .type _x_p3_l0, %object .size _x_p3_l0, 1 _x_p3_l0: .zero 1 .global p2_l3 .type p2_l3, %object .size p2_l3, 1 p2_l3: .zero 1 .global _x_p2_l3 .type _x_p2_l3, %object .size _x_p2_l3, 1 _x_p2_l3: .zero 1 .global p3_evt .type p3_evt, %object .size p3_evt, 1 p3_evt: .zero 1 .global _x_p3_evt .type _x_p3_evt, %object .size _x_p3_evt, 1 _x_p3_evt: .zero 1 .global proposed6 .align 2 .type proposed6, %object .size proposed6, 4 proposed6: .zero 4 .global _x_proposed6 .align 2 .type _x_proposed6, %object .size _x_proposed6, 4 _x_proposed6: .zero 4 .global p3_c .align 2 .type p3_c, %object .size p3_c, 4 p3_c: .zero 4 .global _x_p3_c .align 2 .type _x_p3_c, %object .size _x_p3_c, 4 _x_p3_c: .zero 4 .global proposed5 .align 2 .type proposed5, %object .size proposed5, 4 proposed5: .zero 4 .global _x_proposed5 .align 2 .type _x_proposed5, %object .size _x_proposed5, 4 _x_proposed5: .zero 4 .global proposed4 .align 2 .type proposed4, %object .size proposed4, 4 proposed4: .zero 4 .global _x_proposed4 .align 2 .type _x_proposed4, %object .size _x_proposed4, 4 _x_proposed4: .zero 4 .global p1_l3 .type p1_l3, %object .size p1_l3, 1 p1_l3: .zero 1 .global _x_p1_l3 .type _x_p1_l3, %object .size _x_p1_l3, 1 _x_p1_l3: .zero 1 .global proposed3 .align 2 .type proposed3, %object .size proposed3, 4 proposed3: .zero 4 .global _x_proposed3 .align 2 .type _x_proposed3, %object .size _x_proposed3, 4 _x_proposed3: .zero 4 .global p1_l2 .type p1_l2, %object .size p1_l2, 1 p1_l2: .zero 1 .global _x_p1_l2 .type _x_p1_l2, %object .size _x_p1_l2, 1 _x_p1_l2: .zero 1 .global p4_evt .type p4_evt, %object .size p4_evt, 1 p4_evt: .zero 1 .global _x_p4_evt .type _x_p4_evt, %object .size _x_p4_evt, 1 _x_p4_evt: .zero 1 .global proposed2 .align 2 .type proposed2, %object .size proposed2, 4 proposed2: .zero 4 .global _x_proposed2 .align 2 .type _x_proposed2, %object .size _x_proposed2, 4 _x_proposed2: .zero 4 .global p1_evt .type p1_evt, %object .size p1_evt, 1 p1_evt: .zero 1 .global _x_p1_evt .type _x_p1_evt, %object .size _x_p1_evt, 1 _x_p1_evt: .zero 1 .global p1_l1 .type p1_l1, %object .size p1_l1, 1 p1_l1: .zero 1 .global _x_p1_l1 .type _x_p1_l1, %object .size _x_p1_l1, 1 _x_p1_l1: .zero 1 .global p4_c .align 2 .type p4_c, %object .size p4_c, 4 p4_c: .zero 4 .global _x_p4_c .align 2 .type _x_p4_c, %object .size _x_p4_c, 4 _x_p4_c: .zero 4 .global proposed1 .align 2 .type proposed1, %object .size proposed1, 4 proposed1: .zero 4 .global _x_proposed1 .align 2 .type _x_proposed1, %object .size _x_proposed1, 4 _x_proposed1: .zero 4 .global p1_c .align 2 .type p1_c, %object .size p1_c, 4 p1_c: .zero 4 .global _x_p1_c .align 2 .type _x_p1_c, %object .size _x_p1_c, 4 _x_p1_c: .zero 4 .global p1_l0 .type p1_l0, %object .size p1_l0, 1 p1_l0: .zero 1 .global _x_p1_l0 .type _x_p1_l0, %object .size _x_p1_l0, 1 _x_p1_l0: .zero 1 .global _diverge_delta .align 2 .type _diverge_delta, %object .size _diverge_delta, 4 _diverge_delta: .zero 4 .global _x__diverge_delta .align 2 .type _x__diverge_delta, %object .size _x__diverge_delta, 4 _x__diverge_delta: .zero 4 .global p2_l2 .type p2_l2, %object .size p2_l2, 1 p2_l2: .zero 1 .global _x_p2_l2 .type _x_p2_l2, %object .size _x_p2_l2, 1 _x_p2_l2: .zero 1 .global proposed0 .align 2 .type proposed0, %object .size proposed0, 4 proposed0: .zero 4 .global _x_proposed0 .align 2 .type _x_proposed0, %object .size _x_proposed0, 4 _x_proposed0: .zero 4 .global p2_l1 .type p2_l1, %object .size p2_l1, 1 p2_l1: .zero 1 .global _x_p2_l1 .type _x_p2_l1, %object .size _x_p2_l1, 1 _x_p2_l1: .zero 1 .global inc_max_prop .type inc_max_prop, %object .size inc_max_prop, 1 inc_max_prop: .zero 1 .global _x_inc_max_prop .type _x_inc_max_prop, %object .size _x_inc_max_prop, 1 _x_inc_max_prop: .zero 1 .global p2_l0 .type p2_l0, %object .size p2_l0, 1 p2_l0: .zero 1 .global _x_p2_l0 .type _x_p2_l0, %object .size _x_p2_l0, 1 _x_p2_l0: .zero 1 .global p3_l2 .type p3_l2, %object .size p3_l2, 1 p3_l2: .zero 1 .global _x_p3_l2 .type _x_p3_l2, %object .size _x_p3_l2, 1 _x_p3_l2: .zero 1 .global p0_c .align 2 .type p0_c, %object .size p0_c, 4 p0_c: .zero 4 .global _x_p0_c .align 2 .type _x_p0_c, %object .size _x_p0_c, 4 _x_p0_c: .zero 4 .global p0_l0 .type p0_l0, %object .size p0_l0, 1 p0_l0: .zero 1 .global _x_p0_l0 .type _x_p0_l0, %object .size _x_p0_l0, 1 _x_p0_l0: .zero 1 .global p5_evt .type p5_evt, %object .size p5_evt, 1 p5_evt: .zero 1 .global _x_p5_evt .type _x_p5_evt, %object .size _x_p5_evt, 1 _x_p5_evt: .zero 1 .global max_prop .align 2 .type max_prop, %object .size max_prop, 4 max_prop: .zero 4 .global _x_max_prop .align 2 .type _x_max_prop, %object .size _x_max_prop, 4 _x_max_prop: .zero 4 .global p5_c .align 2 .type p5_c, %object .size p5_c, 4 p5_c: .zero 4 .global _x_p5_c .align 2 .type _x_p5_c, %object .size _x_p5_c, 4 _x_p5_c: .zero 4 .global v2 .type v2, %object .size v2, 1 v2: .zero 1 .global _x_v2 .type _x_v2, %object .size _x_v2, 1 _x_v2: .zero 1 .global v1 .align 2 .type v1, %object .size v1, 4 v1: .zero 4 .global _x_v1 .align 2 .type _x_v1, %object .size _x_v1, 4 _x_v1: .zero 4 .global delta .align 2 .type delta, %object .size delta, 4 delta: .zero 4 .global _x_delta .align 2 .type _x_delta, %object .size _x_delta, 4 _x_delta: .zero 4 .global p3_l3 .type p3_l3, %object .size p3_l3, 1 p3_l3: .zero 1 .global _x_p3_l3 .type _x_p3_l3, %object .size _x_p3_l3, 1 _x_p3_l3: .zero 1 .global p0_evt .type p0_evt, %object .size p0_evt, 1 p0_evt: .zero 1 .global _x_p0_evt .type _x_p0_evt, %object .size _x_p0_evt, 1 _x_p0_evt: .zero 1 .global p2_c .align 2 .type p2_c, %object .size p2_c, 4 p2_c: .zero 4 .global _x_p2_c .align 2 .type _x_p2_c, %object .size _x_p2_c, 4 _x_p2_c: .zero 4 .global p0_l1 .type p0_l1, %object .size p0_l1, 1 p0_l1: .zero 1 .global _x_p0_l1 .type _x_p0_l1, %object .size _x_p0_l1, 1 _x_p0_l1: .zero 1 .global p2_evt .type p2_evt, %object .size p2_evt, 1 p2_evt: .zero 1 .global _x_p2_evt .type _x_p2_evt, %object .size _x_p2_evt, 1 _x_p2_evt: .zero 1 .global p0_l2 .type p0_l2, %object .size p0_l2, 1 p0_l2: .zero 1 .global _x_p0_l2 .type _x_p0_l2, %object .size _x_p0_l2, 1 _x_p0_l2: .zero 1 .global p0_l3 .type p0_l3, %object .size p0_l3, 1 p0_l3: .zero 1 .global _x_p0_l3 .type _x_p0_l3, %object .size _x_p0_l3, 1 _x_p0_l3: .zero 1 .text .align 2 .global main .type main, %function main: .LFB1: .cfi_startproc stp x29, x30, [sp, -32]! .cfi_def_cfa_offset 32 .cfi_offset 29, -32 .cfi_offset 30, -24 mov x29, sp bl __VERIFIER_nondet_bool and w1, w0, 255 adrp x0, p6_l3 add x0, x0, :lo12:p6_l3 strb w1, [x0] bl __VERIFIER_nondet_bool and w1, w0, 255 adrp x0, p6_l2 add x0, x0, :lo12:p6_l2 strb w1, [x0] bl __VERIFIER_nondet_bool and w1, w0, 255 adrp x0, p6_l1 add x0, x0, :lo12:p6_l1 strb w1, [x0] bl __VERIFIER_nondet_bool and w1, w0, 255 adrp x0, p6_l0 add x0, x0, :lo12:p6_l0 strb w1, [x0] bl __VERIFIER_nondet_bool and w1, w0, 255 adrp x0, p6_evt add x0, x0, :lo12:p6_evt strb w1, [x0] bl __VERIFIER_nondet_float adrp x0, p6_c add x0, x0, :lo12:p6_c str s0, [x0] bl __VERIFIER_nondet_bool and w1, w0, 255 adrp x0, p5_l3 add x0, x0, :lo12:p5_l3 strb w1, [x0] bl __VERIFIER_nondet_bool and w1, w0, 255 adrp x0, p5_l2 add x0, x0, :lo12:p5_l2 strb w1, [x0] bl __VERIFIER_nondet_bool and w1, w0, 255 adrp x0, p5_l1 add x0, x0, :lo12:p5_l1 strb w1, [x0] bl __VERIFIER_nondet_bool and w1, w0, 255 adrp x0, p5_l0 add x0, x0, :lo12:p5_l0 strb w1, [x0] bl __VERIFIER_nondet_bool and w1, w0, 255 adrp x0, p4_l3 add x0, x0, :lo12:p4_l3 strb w1, [x0] bl __VERIFIER_nondet_bool and w1, w0, 255 adrp x0, p4_l2 add x0, x0, :lo12:p4_l2 strb w1, [x0] bl __VERIFIER_nondet_bool and w1, w0, 255 adrp x0, p4_l1 add x0, x0, :lo12:p4_l1 strb w1, [x0] bl __VERIFIER_nondet_bool and w1, w0, 255 adrp x0, p4_l0 add x0, x0, :lo12:p4_l0 strb w1, [x0] bl __VERIFIER_nondet_bool and w1, w0, 255 adrp x0, p3_l1 add x0, x0, :lo12:p3_l1 strb w1, [x0] bl __VERIFIER_nondet_bool and w1, w0, 255 adrp x0, p3_l0 add x0, x0, :lo12:p3_l0 strb w1, [x0] bl __VERIFIER_nondet_bool and w1, w0, 255 adrp x0, p2_l3 add x0, x0, :lo12:p2_l3 strb w1, [x0] bl __VERIFIER_nondet_bool and w1, w0, 255 adrp x0, p3_evt add x0, x0, :lo12:p3_evt strb w1, [x0] bl __VERIFIER_nondet_float adrp x0, proposed6 add x0, x0, :lo12:proposed6 str s0, [x0] bl __VERIFIER_nondet_float adrp x0, p3_c add x0, x0, :lo12:p3_c str s0, [x0] bl __VERIFIER_nondet_float adrp x0, proposed5 add x0, x0, :lo12:proposed5 str s0, [x0] bl __VERIFIER_nondet_float adrp x0, proposed4 add x0, x0, :lo12:proposed4 str s0, [x0] bl __VERIFIER_nondet_bool and w1, w0, 255 adrp x0, p1_l3 add x0, x0, :lo12:p1_l3 strb w1, [x0] bl __VERIFIER_nondet_float adrp x0, proposed3 add x0, x0, :lo12:proposed3 str s0, [x0] bl __VERIFIER_nondet_bool and w1, w0, 255 adrp x0, p1_l2 add x0, x0, :lo12:p1_l2 strb w1, [x0] bl __VERIFIER_nondet_bool and w1, w0, 255 adrp x0, p4_evt add x0, x0, :lo12:p4_evt strb w1, [x0] bl __VERIFIER_nondet_float adrp x0, proposed2 add x0, x0, :lo12:proposed2 str s0, [x0] bl __VERIFIER_nondet_bool and w1, w0, 255 adrp x0, p1_evt add x0, x0, :lo12:p1_evt strb w1, [x0] bl __VERIFIER_nondet_bool and w1, w0, 255 adrp x0, p1_l1 add x0, x0, :lo12:p1_l1 strb w1, [x0] bl __VERIFIER_nondet_float adrp x0, p4_c add x0, x0, :lo12:p4_c str s0, [x0] bl __VERIFIER_nondet_float adrp x0, proposed1 add x0, x0, :lo12:proposed1 str s0, [x0] bl __VERIFIER_nondet_float adrp x0, p1_c add x0, x0, :lo12:p1_c str s0, [x0] bl __VERIFIER_nondet_bool and w1, w0, 255 adrp x0, p1_l0 add x0, x0, :lo12:p1_l0 strb w1, [x0] bl __VERIFIER_nondet_float adrp x0, _diverge_delta add x0, x0, :lo12:_diverge_delta str s0, [x0] bl __VERIFIER_nondet_bool and w1, w0, 255 adrp x0, p2_l2 add x0, x0, :lo12:p2_l2 strb w1, [x0] bl __VERIFIER_nondet_float adrp x0, proposed0 add x0, x0, :lo12:proposed0 str s0, [x0] bl __VERIFIER_nondet_bool and w1, w0, 255 adrp x0, p2_l1 add x0, x0, :lo12:p2_l1 strb w1, [x0] bl __VERIFIER_nondet_bool and w1, w0, 255 adrp x0, inc_max_prop add x0, x0, :lo12:inc_max_prop strb w1, [x0] bl __VERIFIER_nondet_bool and w1, w0, 255 adrp x0, p2_l0 add x0, x0, :lo12:p2_l0 strb w1, [x0] bl __VERIFIER_nondet_bool and w1, w0, 255 adrp x0, p3_l2 add x0, x0, :lo12:p3_l2 strb w1, [x0] bl __VERIFIER_nondet_float adrp x0, p0_c add x0, x0, :lo12:p0_c str s0, [x0] bl __VERIFIER_nondet_bool and w1, w0, 255 adrp x0, p0_l0 add x0, x0, :lo12:p0_l0 strb w1, [x0] bl __VERIFIER_nondet_bool and w1, w0, 255 adrp x0, p5_evt add x0, x0, :lo12:p5_evt strb w1, [x0] bl __VERIFIER_nondet_float adrp x0, max_prop add x0, x0, :lo12:max_prop str s0, [x0] bl __VERIFIER_nondet_float adrp x0, p5_c add x0, x0, :lo12:p5_c str s0, [x0] bl __VERIFIER_nondet_bool and w1, w0, 255 adrp x0, v2 add x0, x0, :lo12:v2 strb w1, [x0] bl __VERIFIER_nondet_int mov w1, w0 adrp x0, v1 add x0, x0, :lo12:v1 str w1, [x0] bl __VERIFIER_nondet_float adrp x0, delta add x0, x0, :lo12:delta str s0, [x0] bl __VERIFIER_nondet_bool and w1, w0, 255 adrp x0, p3_l3 add x0, x0, :lo12:p3_l3 strb w1, [x0] bl __VERIFIER_nondet_bool and w1, w0, 255 adrp x0, p0_evt add x0, x0, :lo12:p0_evt strb w1, [x0] bl __VERIFIER_nondet_float adrp x0, p2_c add x0, x0, :lo12:p2_c str s0, [x0] bl __VERIFIER_nondet_bool and w1, w0, 255 adrp x0, p0_l1 add x0, x0, :lo12:p0_l1 strb w1, [x0] bl __VERIFIER_nondet_bool and w1, w0, 255 adrp x0, p2_evt add x0, x0, :lo12:p2_evt strb w1, [x0] bl __VERIFIER_nondet_bool and w1, w0, 255 adrp x0, p0_l2 add x0, x0, :lo12:p0_l2 strb w1, [x0] bl __VERIFIER_nondet_bool and w1, w0, 255 adrp x0, p0_l3 add x0, x0, :lo12:p0_l3 strb w1, [x0] adrp x0, p6_l3 add x0, x0, :lo12:p6_l3 ldrb w0, [x0] cmp w0, 0 beq .L4 adrp x0, p6_l2 add x0, x0, :lo12:p6_l2 ldrb w0, [x0] cmp w0, 0 bne .L4 adrp x0, p6_l0 add x0, x0, :lo12:p6_l0 ldrb w0, [x0] cmp w0, 0 bne .L4 adrp x0, p6_l1 add x0, x0, :lo12:p6_l1 ldrb w0, [x0] cmp w0, 0 beq .L5 .L4: adrp x0, p6_l3 add x0, x0, :lo12:p6_l3 ldrb w0, [x0] cmp w0, 0 bne .L6 adrp x0, p6_l2 add x0, x0, :lo12:p6_l2 ldrb w0, [x0] cmp w0, 0 beq .L6 adrp x0, p6_l0 add x0, x0, :lo12:p6_l0 ldrb w0, [x0] cmp w0, 0 beq .L6 adrp x0, p6_l1 add x0, x0, :lo12:p6_l1 ldrb w0, [x0] cmp w0, 0 bne .L5 .L6: adrp x0, p6_l3 add x0, x0, :lo12:p6_l3 ldrb w0, [x0] cmp w0, 0 bne .L7 adrp x0, p6_l2 add x0, x0, :lo12:p6_l2 ldrb w0, [x0] cmp w0, 0 beq .L7 adrp x0, p6_l1 add x0, x0, :lo12:p6_l1 ldrb w0, [x0] cmp w0, 0 beq .L7 adrp x0, p6_l0 add x0, x0, :lo12:p6_l0 ldrb w0, [x0] cmp w0, 0 beq .L5 .L7: adrp x0, p6_l3 add x0, x0, :lo12:p6_l3 ldrb w0, [x0] cmp w0, 0 bne .L8 adrp x0, p6_l2 add x0, x0, :lo12:p6_l2 ldrb w0, [x0] cmp w0, 0 beq .L8 adrp x0, p6_l0 add x0, x0, :lo12:p6_l0 ldrb w0, [x0] cmp w0, 0 beq .L8 adrp x0, p6_l1 add x0, x0, :lo12:p6_l1 ldrb w0, [x0] cmp w0, 0 beq .L5 .L8: adrp x0, p6_l3 add x0, x0, :lo12:p6_l3 ldrb w0, [x0] cmp w0, 0 bne .L9 adrp x0, p6_l2 add x0, x0, :lo12:p6_l2 ldrb w0, [x0] cmp w0, 0 beq .L9 adrp x0, p6_l0 add x0, x0, :lo12:p6_l0 ldrb w0, [x0] cmp w0, 0 bne .L9 adrp x0, p6_l1 add x0, x0, :lo12:p6_l1 ldrb w0, [x0] cmp w0, 0 beq .L5 .L9: adrp x0, p6_l3 add x0, x0, :lo12:p6_l3 ldrb w0, [x0] cmp w0, 0 bne .L10 adrp x0, p6_l2 add x0, x0, :lo12:p6_l2 ldrb w0, [x0] cmp w0, 0 bne .L10 adrp x0, p6_l0 add x0, x0, :lo12:p6_l0 ldrb w0, [x0] cmp w0, 0 beq .L10 adrp x0, p6_l1 add x0, x0, :lo12:p6_l1 ldrb w0, [x0] cmp w0, 0 bne .L5 .L10: adrp x0, p6_l3 add x0, x0, :lo12:p6_l3 ldrb w0, [x0] cmp w0, 0 bne .L11 adrp x0, p6_l2 add x0, x0, :lo12:p6_l2 ldrb w0, [x0] cmp w0, 0 bne .L11 adrp x0, p6_l1 add x0, x0, :lo12:p6_l1 ldrb w0, [x0] cmp w0, 0 beq .L11 adrp x0, p6_l0 add x0, x0, :lo12:p6_l0 ldrb w0, [x0] cmp w0, 0 beq .L5 .L11: adrp x0, p6_l3 add x0, x0, :lo12:p6_l3 ldrb w0, [x0] cmp w0, 0 bne .L12 adrp x0, p6_l2 add x0, x0, :lo12:p6_l2 ldrb w0, [x0] cmp w0, 0 bne .L12 adrp x0, p6_l0 add x0, x0, :lo12:p6_l0 ldrb w0, [x0] cmp w0, 0 bne .L12 adrp x0, p6_l1 add x0, x0, :lo12:p6_l1 ldrb w0, [x0] cmp w0, 0 beq .L5 .L12: adrp x0, p6_l3 add x0, x0, :lo12:p6_l3 ldrb w0, [x0] cmp w0, 0 bne .L13 adrp x0, p6_l2 add x0, x0, :lo12:p6_l2 ldrb w0, [x0] cmp w0, 0 bne .L13 adrp x0, p6_l0 add x0, x0, :lo12:p6_l0 ldrb w0, [x0] cmp w0, 0 beq .L13 adrp x0, p6_l1 add x0, x0, :lo12:p6_l1 ldrb w0, [x0] cmp w0, 0 bne .L13 .L5: adrp x0, p6_l3 add x0, x0, :lo12:p6_l3 ldrb w0, [x0] cmp w0, 0 bne .L13 adrp x0, p6_l2 add x0, x0, :lo12:p6_l2 ldrb w0, [x0] cmp w0, 0 bne .L13 adrp x0, p6_l0 add x0, x0, :lo12:p6_l0 ldrb w0, [x0] cmp w0, 0 bne .L13 adrp x0, p6_l1 add x0, x0, :lo12:p6_l1 ldrb w0, [x0] cmp w0, 0 bne .L13 adrp x0, p6_c add x0, x0, :lo12:p6_c ldr s0, [x0] fcmp s0, #0.0 bne .L13 adrp x0, p6_c add x0, x0, :lo12:p6_c ldr s1, [x0] adrp x0, proposed6 add x0, x0, :lo12:proposed6 ldr s0, [x0] fcmpe s1, s0 bls .L14 adrp x0, p6_l3 add x0, x0, :lo12:p6_l3 ldrb w0, [x0] cmp w0, 0 bne .L15 adrp x0, p6_l2 add x0, x0, :lo12:p6_l2 ldrb w0, [x0] cmp w0, 0 bne .L15 adrp x0, p6_l0 add x0, x0, :lo12:p6_l0 ldrb w0, [x0] cmp w0, 0 beq .L15 adrp x0, p6_l1 add x0, x0, :lo12:p6_l1 ldrb w0, [x0] cmp w0, 0 beq .L13 .L15: adrp x0, p6_l3 add x0, x0, :lo12:p6_l3 ldrb w0, [x0] cmp w0, 0 bne .L16 adrp x0, p6_l2 add x0, x0, :lo12:p6_l2 ldrb w0, [x0] cmp w0, 0 beq .L16 adrp x0, p6_l0 add x0, x0, :lo12:p6_l0 ldrb w0, [x0] cmp w0, 0 bne .L16 adrp x0, p6_l1 add x0, x0, :lo12:p6_l1 ldrb w0, [x0] cmp w0, 0 beq .L13 .L16: adrp x0, p6_l3 add x0, x0, :lo12:p6_l3 ldrb w0, [x0] cmp w0, 0 bne .L17 adrp x0, p6_l2 add x0, x0, :lo12:p6_l2 ldrb w0, [x0] cmp w0, 0 beq .L17 adrp x0, p6_l0 add x0, x0, :lo12:p6_l0 ldrb w0, [x0] cmp w0, 0 beq .L17 adrp x0, p6_l1 add x0, x0, :lo12:p6_l1 ldrb w0, [x0] cmp w0, 0 bne .L13 .L17: adrp x0, p6_l3 add x0, x0, :lo12:p6_l3 ldrb w0, [x0] cmp w0, 0 beq .L14 adrp x0, p6_l2 add x0, x0, :lo12:p6_l2 ldrb w0, [x0] cmp w0, 0 bne .L14 adrp x0, p6_l0 add x0, x0, :lo12:p6_l0 ldrb w0, [x0] cmp w0, 0 bne .L14 adrp x0, p6_l1 add x0, x0, :lo12:p6_l1 ldrb w0, [x0] cmp w0, 0 beq .L13 .L14: adrp x0, p5_l3 add x0, x0, :lo12:p5_l3 ldrb w0, [x0] cmp w0, 0 beq .L18 adrp x0, p5_l2 add x0, x0, :lo12:p5_l2 ldrb w0, [x0] cmp w0, 0 bne .L18 adrp x0, p5_l0 add x0, x0, :lo12:p5_l0 ldrb w0, [x0] cmp w0, 0 bne .L18 adrp x0, p5_l1 add x0, x0, :lo12:p5_l1 ldrb w0, [x0] cmp w0, 0 beq .L19 .L18: adrp x0, p5_l3 add x0, x0, :lo12:p5_l3 ldrb w0, [x0] cmp w0, 0 bne .L20 adrp x0, p5_l2 add x0, x0, :lo12:p5_l2 ldrb w0, [x0] cmp w0, 0 beq .L20 adrp x0, p5_l0 add x0, x0, :lo12:p5_l0 ldrb w0, [x0] cmp w0, 0 beq .L20 adrp x0, p5_l1 add x0, x0, :lo12:p5_l1 ldrb w0, [x0] cmp w0, 0 bne .L19 .L20: adrp x0, p5_l3 add x0, x0, :lo12:p5_l3 ldrb w0, [x0] cmp w0, 0 bne .L21 adrp x0, p5_l2 add x0, x0, :lo12:p5_l2 ldrb w0, [x0] cmp w0, 0 beq .L21 adrp x0, p5_l1 add x0, x0, :lo12:p5_l1 ldrb w0, [x0] cmp w0, 0 beq .L21 adrp x0, p5_l0 add x0, x0, :lo12:p5_l0 ldrb w0, [x0] cmp w0, 0 beq .L19 .L21: adrp x0, p5_l3 add x0, x0, :lo12:p5_l3 ldrb w0, [x0] cmp w0, 0 bne .L22 adrp x0, p5_l2 add x0, x0, :lo12:p5_l2 ldrb w0, [x0] cmp w0, 0 beq .L22 adrp x0, p5_l0 add x0, x0, :lo12:p5_l0 ldrb w0, [x0] cmp w0, 0 beq .L22 adrp x0, p5_l1 add x0, x0, :lo12:p5_l1 ldrb w0, [x0] cmp w0, 0 beq .L19 .L22: adrp x0, p5_l3 add x0, x0, :lo12:p5_l3 ldrb w0, [x0] cmp w0, 0 bne .L23 adrp x0, p5_l2 add x0, x0, :lo12:p5_l2 ldrb w0, [x0] cmp w0, 0 beq .L23 adrp x0, p5_l0 add x0, x0, :lo12:p5_l0 ldrb w0, [x0] cmp w0, 0 bne .L23 adrp x0, p5_l1 add x0, x0, :lo12:p5_l1 ldrb w0, [x0] cmp w0, 0 beq .L19 .L23: adrp x0, p5_l3 add x0, x0, :lo12:p5_l3 ldrb w0, [x0] cmp w0, 0 bne .L24 adrp x0, p5_l2 add x0, x0, :lo12:p5_l2 ldrb w0, [x0] cmp w0, 0 bne .L24 adrp x0, p5_l0 add x0, x0, :lo12:p5_l0 ldrb w0, [x0] cmp w0, 0 beq .L24 adrp x0, p5_l1 add x0, x0, :lo12:p5_l1 ldrb w0, [x0] cmp w0, 0 bne .L19 .L24: adrp x0, p5_l3 add x0, x0, :lo12:p5_l3 ldrb w0, [x0] cmp w0, 0 bne .L25 adrp x0, p5_l2 add x0, x0, :lo12:p5_l2 ldrb w0, [x0] cmp w0, 0 bne .L25 adrp x0, p5_l1 add x0, x0, :lo12:p5_l1 ldrb w0, [x0] cmp w0, 0 beq .L25 adrp x0, p5_l0 add x0, x0, :lo12:p5_l0 ldrb w0, [x0] cmp w0, 0 beq .L19 .L25: adrp x0, p5_l3 add x0, x0, :lo12:p5_l3 ldrb w0, [x0] cmp w0, 0 bne .L26 adrp x0, p5_l2 add x0, x0, :lo12:p5_l2 ldrb w0, [x0] cmp w0, 0 bne .L26 adrp x0, p5_l0 add x0, x0, :lo12:p5_l0 ldrb w0, [x0] cmp w0, 0 bne .L26 adrp x0, p5_l1 add x0, x0, :lo12:p5_l1 ldrb w0, [x0] cmp w0, 0 beq .L19 .L26: adrp x0, p5_l3 add x0, x0, :lo12:p5_l3 ldrb w0, [x0] cmp w0, 0 bne .L13 adrp x0, p5_l2 add x0, x0, :lo12:p5_l2 ldrb w0, [x0] cmp w0, 0 bne .L13 adrp x0, p5_l0 add x0, x0, :lo12:p5_l0 ldrb w0, [x0] cmp w0, 0 beq .L13 adrp x0, p5_l1 add x0, x0, :lo12:p5_l1 ldrb w0, [x0] cmp w0, 0 bne .L13 .L19: adrp x0, p5_l3 add x0, x0, :lo12:p5_l3 ldrb w0, [x0] cmp w0, 0 bne .L13 adrp x0, p5_l2 add x0, x0, :lo12:p5_l2 ldrb w0, [x0] cmp w0, 0 bne .L13 adrp x0, p5_l0 add x0, x0, :lo12:p5_l0 ldrb w0, [x0] cmp w0, 0 bne .L13 adrp x0, p5_l1 add x0, x0, :lo12:p5_l1 ldrb w0, [x0] cmp w0, 0 bne .L13 adrp x0, p5_c add x0, x0, :lo12:p5_c ldr s0, [x0] fcmp s0, #0.0 bne .L13 adrp x0, p5_c add x0, x0, :lo12:p5_c ldr s1, [x0] adrp x0, proposed5 add x0, x0, :lo12:proposed5 ldr s0, [x0] fcmpe s1, s0 bls .L27 adrp x0, p5_l3 add x0, x0, :lo12:p5_l3 ldrb w0, [x0] cmp w0, 0 bne .L28 adrp x0, p5_l2 add x0, x0, :lo12:p5_l2 ldrb w0, [x0] cmp w0, 0 bne .L28 adrp x0, p5_l0 add x0, x0, :lo12:p5_l0 ldrb w0, [x0] cmp w0, 0 beq .L28 adrp x0, p5_l1 add x0, x0, :lo12:p5_l1 ldrb w0, [x0] cmp w0, 0 beq .L13 .L28: adrp x0, p5_l3 add x0, x0, :lo12:p5_l3 ldrb w0, [x0] cmp w0, 0 bne .L29 adrp x0, p5_l2 add x0, x0, :lo12:p5_l2 ldrb w0, [x0] cmp w0, 0 beq .L29 adrp x0, p5_l0 add x0, x0, :lo12:p5_l0 ldrb w0, [x0] cmp w0, 0 bne .L29 adrp x0, p5_l1 add x0, x0, :lo12:p5_l1 ldrb w0, [x0] cmp w0, 0 beq .L13 .L29: adrp x0, p5_l3 add x0, x0, :lo12:p5_l3 ldrb w0, [x0] cmp w0, 0 bne .L30 adrp x0, p5_l2 add x0, x0, :lo12:p5_l2 ldrb w0, [x0] cmp w0, 0 beq .L30 adrp x0, p5_l0 add x0, x0, :lo12:p5_l0 ldrb w0, [x0] cmp w0, 0 beq .L30 adrp x0, p5_l1 add x0, x0, :lo12:p5_l1 ldrb w0, [x0] cmp w0, 0 bne .L13 .L30: adrp x0, p5_l3 add x0, x0, :lo12:p5_l3 ldrb w0, [x0] cmp w0, 0 beq .L27 adrp x0, p5_l2 add x0, x0, :lo12:p5_l2 ldrb w0, [x0] cmp w0, 0 bne .L27 adrp x0, p5_l0 add x0, x0, :lo12:p5_l0 ldrb w0, [x0] cmp w0, 0 bne .L27 adrp x0, p5_l1 add x0, x0, :lo12:p5_l1 ldrb w0, [x0] cmp w0, 0 beq .L13 .L27: adrp x0, p4_l3 add x0, x0, :lo12:p4_l3 ldrb w0, [x0] cmp w0, 0 beq .L31 adrp x0, p4_l2 add x0, x0, :lo12:p4_l2 ldrb w0, [x0] cmp w0, 0 bne .L31 adrp x0, p4_l0 add x0, x0, :lo12:p4_l0 ldrb w0, [x0] cmp w0, 0 bne .L31 adrp x0, p4_l1 add x0, x0, :lo12:p4_l1 ldrb w0, [x0] cmp w0, 0 beq .L32 .L31: adrp x0, p4_l3 add x0, x0, :lo12:p4_l3 ldrb w0, [x0] cmp w0, 0 bne .L33 adrp x0, p4_l2 add x0, x0, :lo12:p4_l2 ldrb w0, [x0] cmp w0, 0 beq .L33 adrp x0, p4_l0 add x0, x0, :lo12:p4_l0 ldrb w0, [x0] cmp w0, 0 beq .L33 adrp x0, p4_l1 add x0, x0, :lo12:p4_l1 ldrb w0, [x0] cmp w0, 0 bne .L32 .L33: adrp x0, p4_l3 add x0, x0, :lo12:p4_l3 ldrb w0, [x0] cmp w0, 0 bne .L34 adrp x0, p4_l2 add x0, x0, :lo12:p4_l2 ldrb w0, [x0] cmp w0, 0 beq .L34 adrp x0, p4_l1 add x0, x0, :lo12:p4_l1 ldrb w0, [x0] cmp w0, 0 beq .L34 adrp x0, p4_l0 add x0, x0, :lo12:p4_l0 ldrb w0, [x0] cmp w0, 0 beq .L32 .L34: adrp x0, p4_l3 add x0, x0, :lo12:p4_l3 ldrb w0, [x0] cmp w0, 0 bne .L35 adrp x0, p4_l2 add x0, x0, :lo12:p4_l2 ldrb w0, [x0] cmp w0, 0 beq .L35 adrp x0, p4_l0 add x0, x0, :lo12:p4_l0 ldrb w0, [x0] cmp w0, 0 beq .L35 adrp x0, p4_l1 add x0, x0, :lo12:p4_l1 ldrb w0, [x0] cmp w0, 0 beq .L32 .L35: adrp x0, p4_l3 add x0, x0, :lo12:p4_l3 ldrb w0, [x0] cmp w0, 0 bne .L36 adrp x0, p4_l2 add x0, x0, :lo12:p4_l2 ldrb w0, [x0] cmp w0, 0 beq .L36 adrp x0, p4_l0 add x0, x0, :lo12:p4_l0 ldrb w0, [x0] cmp w0, 0 bne .L36 adrp x0, p4_l1 add x0, x0, :lo12:p4_l1 ldrb w0, [x0] cmp w0, 0 beq .L32 .L36: adrp x0, p4_l3 add x0, x0, :lo12:p4_l3 ldrb w0, [x0] cmp w0, 0 bne .L37 adrp x0, p4_l2 add x0, x0, :lo12:p4_l2 ldrb w0, [x0] cmp w0, 0 bne .L37 adrp x0, p4_l0 add x0, x0, :lo12:p4_l0 ldrb w0, [x0] cmp w0, 0 beq .L37 adrp x0, p4_l1 add x0, x0, :lo12:p4_l1 ldrb w0, [x0] cmp w0, 0 bne .L32 .L37: adrp x0, p4_l3 add x0, x0, :lo12:p4_l3 ldrb w0, [x0] cmp w0, 0 bne .L38 adrp x0, p4_l2 add x0, x0, :lo12:p4_l2 ldrb w0, [x0] cmp w0, 0 bne .L38 adrp x0, p4_l1 add x0, x0, :lo12:p4_l1 ldrb w0, [x0] cmp w0, 0 beq .L38 adrp x0, p4_l0 add x0, x0, :lo12:p4_l0 ldrb w0, [x0] cmp w0, 0 beq .L32 .L38: adrp x0, p4_l3 add x0, x0, :lo12:p4_l3 ldrb w0, [x0] cmp w0, 0 bne .L39 adrp x0, p4_l2 add x0, x0, :lo12:p4_l2 ldrb w0, [x0] cmp w0, 0 bne .L39 adrp x0, p4_l0 add x0, x0, :lo12:p4_l0 ldrb w0, [x0] cmp w0, 0 bne .L39 adrp x0, p4_l1 add x0, x0, :lo12:p4_l1 ldrb w0, [x0] cmp w0, 0 beq .L32 .L39: adrp x0, p4_l3 add x0, x0, :lo12:p4_l3 ldrb w0, [x0] cmp w0, 0 bne .L13 adrp x0, p4_l2 add x0, x0, :lo12:p4_l2 ldrb w0, [x0] cmp w0, 0 bne .L13 adrp x0, p4_l0 add x0, x0, :lo12:p4_l0 ldrb w0, [x0] cmp w0, 0 beq .L13 adrp x0, p4_l1 add x0, x0, :lo12:p4_l1 ldrb w0, [x0] cmp w0, 0 bne .L13 .L32: adrp x0, p4_l3 add x0, x0, :lo12:p4_l3 ldrb w0, [x0] cmp w0, 0 bne .L13 adrp x0, p4_l2 add x0, x0, :lo12:p4_l2 ldrb w0, [x0] cmp w0, 0 bne .L13 adrp x0, p4_l0 add x0, x0, :lo12:p4_l0 ldrb w0, [x0] cmp w0, 0 bne .L13 adrp x0, p4_l1 add x0, x0, :lo12:p4_l1 ldrb w0, [x0] cmp w0, 0 bne .L13 adrp x0, p4_c add x0, x0, :lo12:p4_c ldr s0, [x0] fcmp s0, #0.0 bne .L13 adrp x0, p4_c add x0, x0, :lo12:p4_c ldr s1, [x0] adrp x0, proposed4 add x0, x0, :lo12:proposed4 ldr s0, [x0] fcmpe s1, s0 bls .L40 adrp x0, p4_l3 add x0, x0, :lo12:p4_l3 ldrb w0, [x0] cmp w0, 0 bne .L41 adrp x0, p4_l2 add x0, x0, :lo12:p4_l2 ldrb w0, [x0] cmp w0, 0 bne .L41 adrp x0, p4_l0 add x0, x0, :lo12:p4_l0 ldrb w0, [x0] cmp w0, 0 beq .L41 adrp x0, p4_l1 add x0, x0, :lo12:p4_l1 ldrb w0, [x0] cmp w0, 0 beq .L13 .L41: adrp x0, p4_l3 add x0, x0, :lo12:p4_l3 ldrb w0, [x0] cmp w0, 0 bne .L42 adrp x0, p4_l2 add x0, x0, :lo12:p4_l2 ldrb w0, [x0] cmp w0, 0 beq .L42 adrp x0, p4_l0 add x0, x0, :lo12:p4_l0 ldrb w0, [x0] cmp w0, 0 bne .L42 adrp x0, p4_l1 add x0, x0, :lo12:p4_l1 ldrb w0, [x0] cmp w0, 0 beq .L13 .L42: adrp x0, p4_l3 add x0, x0, :lo12:p4_l3 ldrb w0, [x0] cmp w0, 0 bne .L43 adrp x0, p4_l2 add x0, x0, :lo12:p4_l2 ldrb w0, [x0] cmp w0, 0 beq .L43 adrp x0, p4_l0 add x0, x0, :lo12:p4_l0 ldrb w0, [x0] cmp w0, 0 beq .L43 adrp x0, p4_l1 add x0, x0, :lo12:p4_l1 ldrb w0, [x0] cmp w0, 0 bne .L13 .L43: adrp x0, p4_l3 add x0, x0, :lo12:p4_l3 ldrb w0, [x0] cmp w0, 0 beq .L40 adrp x0, p4_l2 add x0, x0, :lo12:p4_l2 ldrb w0, [x0] cmp w0, 0 bne .L40 adrp x0, p4_l0 add x0, x0, :lo12:p4_l0 ldrb w0, [x0] cmp w0, 0 bne .L40 adrp x0, p4_l1 add x0, x0, :lo12:p4_l1 ldrb w0, [x0] cmp w0, 0 beq .L13 .L40: adrp x0, p3_l3 add x0, x0, :lo12:p3_l3 ldrb w0, [x0] cmp w0, 0 beq .L44 adrp x0, p3_l2 add x0, x0, :lo12:p3_l2 ldrb w0, [x0] cmp w0, 0 bne .L44 adrp x0, p3_l0 add x0, x0, :lo12:p3_l0 ldrb w0, [x0] cmp w0, 0 bne .L44 adrp x0, p3_l1 add x0, x0, :lo12:p3_l1 ldrb w0, [x0] cmp w0, 0 beq .L45 .L44: adrp x0, p3_l3 add x0, x0, :lo12:p3_l3 ldrb w0, [x0] cmp w0, 0 bne .L46 adrp x0, p3_l2 add x0, x0, :lo12:p3_l2 ldrb w0, [x0] cmp w0, 0 beq .L46 adrp x0, p3_l0 add x0, x0, :lo12:p3_l0 ldrb w0, [x0] cmp w0, 0 beq .L46 adrp x0, p3_l1 add x0, x0, :lo12:p3_l1 ldrb w0, [x0] cmp w0, 0 bne .L45 .L46: adrp x0, p3_l3 add x0, x0, :lo12:p3_l3 ldrb w0, [x0] cmp w0, 0 bne .L47 adrp x0, p3_l2 add x0, x0, :lo12:p3_l2 ldrb w0, [x0] cmp w0, 0 beq .L47 adrp x0, p3_l1 add x0, x0, :lo12:p3_l1 ldrb w0, [x0] cmp w0, 0 beq .L47 adrp x0, p3_l0 add x0, x0, :lo12:p3_l0 ldrb w0, [x0] cmp w0, 0 beq .L45 .L47: adrp x0, p3_l3 add x0, x0, :lo12:p3_l3 ldrb w0, [x0] cmp w0, 0 bne .L48 adrp x0, p3_l2 add x0, x0, :lo12:p3_l2 ldrb w0, [x0] cmp w0, 0 beq .L48 adrp x0, p3_l0 add x0, x0, :lo12:p3_l0 ldrb w0, [x0] cmp w0, 0 beq .L48 adrp x0, p3_l1 add x0, x0, :lo12:p3_l1 ldrb w0, [x0] cmp w0, 0 beq .L45 .L48: adrp x0, p3_l3 add x0, x0, :lo12:p3_l3 ldrb w0, [x0] cmp w0, 0 bne .L49 adrp x0, p3_l2 add x0, x0, :lo12:p3_l2 ldrb w0, [x0] cmp w0, 0 beq .L49 adrp x0, p3_l0 add x0, x0, :lo12:p3_l0 ldrb w0, [x0] cmp w0, 0 bne .L49 adrp x0, p3_l1 add x0, x0, :lo12:p3_l1 ldrb w0, [x0] cmp w0, 0 beq .L45 .L49: adrp x0, p3_l3 add x0, x0, :lo12:p3_l3 ldrb w0, [x0] cmp w0, 0 bne .L50 adrp x0, p3_l2 add x0, x0, :lo12:p3_l2 ldrb w0, [x0] cmp w0, 0 bne .L50 adrp x0, p3_l0 add x0, x0, :lo12:p3_l0 ldrb w0, [x0] cmp w0, 0 beq .L50 adrp x0, p3_l1 add x0, x0, :lo12:p3_l1 ldrb w0, [x0] cmp w0, 0 bne .L45 .L50: adrp x0, p3_l3 add x0, x0, :lo12:p3_l3 ldrb w0, [x0] cmp w0, 0 bne .L51 adrp x0, p3_l2 add x0, x0, :lo12:p3_l2 ldrb w0, [x0] cmp w0, 0 bne .L51 adrp x0, p3_l1 add x0, x0, :lo12:p3_l1 ldrb w0, [x0] cmp w0, 0 beq .L51 adrp x0, p3_l0 add x0, x0, :lo12:p3_l0 ldrb w0, [x0] cmp w0, 0 beq .L45 .L51: adrp x0, p3_l3 add x0, x0, :lo12:p3_l3 ldrb w0, [x0] cmp w0, 0 bne .L52 adrp x0, p3_l2 add x0, x0, :lo12:p3_l2 ldrb w0, [x0] cmp w0, 0 bne .L52 adrp x0, p3_l0 add x0, x0, :lo12:p3_l0 ldrb w0, [x0] cmp w0, 0 bne .L52 adrp x0, p3_l1 add x0, x0, :lo12:p3_l1 ldrb w0, [x0] cmp w0, 0 beq .L45 .L52: adrp x0, p3_l3 add x0, x0, :lo12:p3_l3 ldrb w0, [x0] cmp w0, 0 bne .L13 adrp x0, p3_l2 add x0, x0, :lo12:p3_l2 ldrb w0, [x0] cmp w0, 0 bne .L13 adrp x0, p3_l0 add x0, x0, :lo12:p3_l0 ldrb w0, [x0] cmp w0, 0 beq .L13 adrp x0, p3_l1 add x0, x0, :lo12:p3_l1 ldrb w0, [x0] cmp w0, 0 bne .L13 .L45: adrp x0, p3_l3 add x0, x0, :lo12:p3_l3 ldrb w0, [x0] cmp w0, 0 bne .L13 adrp x0, p3_l2 add x0, x0, :lo12:p3_l2 ldrb w0, [x0] cmp w0, 0 bne .L13 adrp x0, p3_l0 add x0, x0, :lo12:p3_l0 ldrb w0, [x0] cmp w0, 0 bne .L13 adrp x0, p3_l1 add x0, x0, :lo12:p3_l1 ldrb w0, [x0] cmp w0, 0 bne .L13 adrp x0, p3_c add x0, x0, :lo12:p3_c ldr s0, [x0] fcmp s0, #0.0 bne .L13 adrp x0, p3_c add x0, x0, :lo12:p3_c ldr s1, [x0] adrp x0, proposed3 add x0, x0, :lo12:proposed3 ldr s0, [x0] fcmpe s1, s0 bls .L53 adrp x0, p3_l3 add x0, x0, :lo12:p3_l3 ldrb w0, [x0] cmp w0, 0 bne .L54 adrp x0, p3_l2 add x0, x0, :lo12:p3_l2 ldrb w0, [x0] cmp w0, 0 bne .L54 adrp x0, p3_l0 add x0, x0, :lo12:p3_l0 ldrb w0, [x0] cmp w0, 0 beq .L54 adrp x0, p3_l1 add x0, x0, :lo12:p3_l1 ldrb w0, [x0] cmp w0, 0 beq .L13 .L54: adrp x0, p3_l3 add x0, x0, :lo12:p3_l3 ldrb w0, [x0] cmp w0, 0 bne .L55 adrp x0, p3_l2 add x0, x0, :lo12:p3_l2 ldrb w0, [x0] cmp w0, 0 beq .L55 adrp x0, p3_l0 add x0, x0, :lo12:p3_l0 ldrb w0, [x0] cmp w0, 0 bne .L55 adrp x0, p3_l1 add x0, x0, :lo12:p3_l1 ldrb w0, [x0] cmp w0, 0 beq .L13 .L55: adrp x0, p3_l3 add x0, x0, :lo12:p3_l3 ldrb w0, [x0] cmp w0, 0 bne .L56 adrp x0, p3_l2 add x0, x0, :lo12:p3_l2 ldrb w0, [x0] cmp w0, 0 beq .L56 adrp x0, p3_l0 add x0, x0, :lo12:p3_l0 ldrb w0, [x0] cmp w0, 0 beq .L56 adrp x0, p3_l1 add x0, x0, :lo12:p3_l1 ldrb w0, [x0] cmp w0, 0 bne .L13 .L56: adrp x0, p3_l3 add x0, x0, :lo12:p3_l3 ldrb w0, [x0] cmp w0, 0 beq .L53 adrp x0, p3_l2 add x0, x0, :lo12:p3_l2 ldrb w0, [x0] cmp w0, 0 bne .L53 adrp x0, p3_l0 add x0, x0, :lo12:p3_l0 ldrb w0, [x0] cmp w0, 0 bne .L53 adrp x0, p3_l1 add x0, x0, :lo12:p3_l1 ldrb w0, [x0] cmp w0, 0 beq .L13 .L53: adrp x0, p2_l3 add x0, x0, :lo12:p2_l3 ldrb w0, [x0] cmp w0, 0 beq .L57 adrp x0, p2_l2 add x0, x0, :lo12:p2_l2 ldrb w0, [x0] cmp w0, 0 bne .L57 adrp x0, p2_l0 add x0, x0, :lo12:p2_l0 ldrb w0, [x0] cmp w0, 0 bne .L57 adrp x0, p2_l1 add x0, x0, :lo12:p2_l1 ldrb w0, [x0] cmp w0, 0 beq .L58 .L57: adrp x0, p2_l3 add x0, x0, :lo12:p2_l3 ldrb w0, [x0] cmp w0, 0 bne .L59 adrp x0, p2_l2 add x0, x0, :lo12:p2_l2 ldrb w0, [x0] cmp w0, 0 beq .L59 adrp x0, p2_l0 add x0, x0, :lo12:p2_l0 ldrb w0, [x0] cmp w0, 0 beq .L59 adrp x0, p2_l1 add x0, x0, :lo12:p2_l1 ldrb w0, [x0] cmp w0, 0 bne .L58 .L59: adrp x0, p2_l3 add x0, x0, :lo12:p2_l3 ldrb w0, [x0] cmp w0, 0 bne .L60 adrp x0, p2_l2 add x0, x0, :lo12:p2_l2 ldrb w0, [x0] cmp w0, 0 beq .L60 adrp x0, p2_l1 add x0, x0, :lo12:p2_l1 ldrb w0, [x0] cmp w0, 0 beq .L60 adrp x0, p2_l0 add x0, x0, :lo12:p2_l0 ldrb w0, [x0] cmp w0, 0 beq .L58 .L60: adrp x0, p2_l3 add x0, x0, :lo12:p2_l3 ldrb w0, [x0] cmp w0, 0 bne .L61 adrp x0, p2_l2 add x0, x0, :lo12:p2_l2 ldrb w0, [x0] cmp w0, 0 beq .L61 adrp x0, p2_l0 add x0, x0, :lo12:p2_l0 ldrb w0, [x0] cmp w0, 0 beq .L61 adrp x0, p2_l1 add x0, x0, :lo12:p2_l1 ldrb w0, [x0] cmp w0, 0 beq .L58 .L61: adrp x0, p2_l3 add x0, x0, :lo12:p2_l3 ldrb w0, [x0] cmp w0, 0 bne .L62 adrp x0, p2_l2 add x0, x0, :lo12:p2_l2 ldrb w0, [x0] cmp w0, 0 beq .L62 adrp x0, p2_l0 add x0, x0, :lo12:p2_l0 ldrb w0, [x0] cmp w0, 0 bne .L62 adrp x0, p2_l1 add x0, x0, :lo12:p2_l1 ldrb w0, [x0] cmp w0, 0 beq .L58 .L62: adrp x0, p2_l3 add x0, x0, :lo12:p2_l3 ldrb w0, [x0] cmp w0, 0 bne .L63 adrp x0, p2_l2 add x0, x0, :lo12:p2_l2 ldrb w0, [x0] cmp w0, 0 bne .L63 adrp x0, p2_l0 add x0, x0, :lo12:p2_l0 ldrb w0, [x0] cmp w0, 0 beq .L63 adrp x0, p2_l1 add x0, x0, :lo12:p2_l1 ldrb w0, [x0] cmp w0, 0 bne .L58 .L63: adrp x0, p2_l3 add x0, x0, :lo12:p2_l3 ldrb w0, [x0] cmp w0, 0 bne .L64 adrp x0, p2_l2 add x0, x0, :lo12:p2_l2 ldrb w0, [x0] cmp w0, 0 bne .L64 adrp x0, p2_l1 add x0, x0, :lo12:p2_l1 ldrb w0, [x0] cmp w0, 0 beq .L64 adrp x0, p2_l0 add x0, x0, :lo12:p2_l0 ldrb w0, [x0] cmp w0, 0 beq .L58 .L64: adrp x0, p2_l3 add x0, x0, :lo12:p2_l3 ldrb w0, [x0] cmp w0, 0 bne .L65 adrp x0, p2_l2 add x0, x0, :lo12:p2_l2 ldrb w0, [x0] cmp w0, 0 bne .L65 adrp x0, p2_l0 add x0, x0, :lo12:p2_l0 ldrb w0, [x0] cmp w0, 0 bne .L65 adrp x0, p2_l1 add x0, x0, :lo12:p2_l1 ldrb w0, [x0] cmp w0, 0 beq .L58 .L65: adrp x0, p2_l3 add x0, x0, :lo12:p2_l3 ldrb w0, [x0] cmp w0, 0 bne .L13 adrp x0, p2_l2 add x0, x0, :lo12:p2_l2 ldrb w0, [x0] cmp w0, 0 bne .L13 adrp x0, p2_l0 add x0, x0, :lo12:p2_l0 ldrb w0, [x0] cmp w0, 0 beq .L13 adrp x0, p2_l1 add x0, x0, :lo12:p2_l1 ldrb w0, [x0] cmp w0, 0 bne .L13 .L58: adrp x0, p2_l3 add x0, x0, :lo12:p2_l3 ldrb w0, [x0] cmp w0, 0 bne .L13 adrp x0, p2_l2 add x0, x0, :lo12:p2_l2 ldrb w0, [x0] cmp w0, 0 bne .L13 adrp x0, p2_l0 add x0, x0, :lo12:p2_l0 ldrb w0, [x0] cmp w0, 0 bne .L13 adrp x0, p2_l1 add x0, x0, :lo12:p2_l1 ldrb w0, [x0] cmp w0, 0 bne .L13 adrp x0, p2_c add x0, x0, :lo12:p2_c ldr s0, [x0] fcmp s0, #0.0 bne .L13 adrp x0, p2_c add x0, x0, :lo12:p2_c ldr s1, [x0] adrp x0, proposed2 add x0, x0, :lo12:proposed2 ldr s0, [x0] fcmpe s1, s0 bls .L66 adrp x0, p2_l3 add x0, x0, :lo12:p2_l3 ldrb w0, [x0] cmp w0, 0 bne .L67 adrp x0, p2_l2 add x0, x0, :lo12:p2_l2 ldrb w0, [x0] cmp w0, 0 bne .L67 adrp x0, p2_l0 add x0, x0, :lo12:p2_l0 ldrb w0, [x0] cmp w0, 0 beq .L67 adrp x0, p2_l1 add x0, x0, :lo12:p2_l1 ldrb w0, [x0] cmp w0, 0 beq .L13 .L67: adrp x0, p2_l3 add x0, x0, :lo12:p2_l3 ldrb w0, [x0] cmp w0, 0 bne .L68 adrp x0, p2_l2 add x0, x0, :lo12:p2_l2 ldrb w0, [x0] cmp w0, 0 beq .L68 adrp x0, p2_l0 add x0, x0, :lo12:p2_l0 ldrb w0, [x0] cmp w0, 0 bne .L68 adrp x0, p2_l1 add x0, x0, :lo12:p2_l1 ldrb w0, [x0] cmp w0, 0 beq .L13 .L68: adrp x0, p2_l3 add x0, x0, :lo12:p2_l3 ldrb w0, [x0] cmp w0, 0 bne .L69 adrp x0, p2_l2 add x0, x0, :lo12:p2_l2 ldrb w0, [x0] cmp w0, 0 beq .L69 adrp x0, p2_l0 add x0, x0, :lo12:p2_l0 ldrb w0, [x0] cmp w0, 0 beq .L69 adrp x0, p2_l1 add x0, x0, :lo12:p2_l1 ldrb w0, [x0] cmp w0, 0 bne .L13 .L69: adrp x0, p2_l3 add x0, x0, :lo12:p2_l3 ldrb w0, [x0] cmp w0, 0 beq .L66 adrp x0, p2_l2 add x0, x0, :lo12:p2_l2 ldrb w0, [x0] cmp w0, 0 bne .L66 adrp x0, p2_l0 add x0, x0, :lo12:p2_l0 ldrb w0, [x0] cmp w0, 0 bne .L66 adrp x0, p2_l1 add x0, x0, :lo12:p2_l1 ldrb w0, [x0] cmp w0, 0 beq .L13 .L66: adrp x0, p1_l3 add x0, x0, :lo12:p1_l3 ldrb w0, [x0] cmp w0, 0 beq .L70 adrp x0, p1_l2 add x0, x0, :lo12:p1_l2 ldrb w0, [x0] cmp w0, 0 bne .L70 adrp x0, p1_l0 add x0, x0, :lo12:p1_l0 ldrb w0, [x0] cmp w0, 0 bne .L70 adrp x0, p1_l1 add x0, x0, :lo12:p1_l1 ldrb w0, [x0] cmp w0, 0 beq .L71 .L70: adrp x0, p1_l3 add x0, x0, :lo12:p1_l3 ldrb w0, [x0] cmp w0, 0 bne .L72 adrp x0, p1_l2 add x0, x0, :lo12:p1_l2 ldrb w0, [x0] cmp w0, 0 beq .L72 adrp x0, p1_l0 add x0, x0, :lo12:p1_l0 ldrb w0, [x0] cmp w0, 0 beq .L72 adrp x0, p1_l1 add x0, x0, :lo12:p1_l1 ldrb w0, [x0] cmp w0, 0 bne .L71 .L72: adrp x0, p1_l3 add x0, x0, :lo12:p1_l3 ldrb w0, [x0] cmp w0, 0 bne .L73 adrp x0, p1_l2 add x0, x0, :lo12:p1_l2 ldrb w0, [x0] cmp w0, 0 beq .L73 adrp x0, p1_l1 add x0, x0, :lo12:p1_l1 ldrb w0, [x0] cmp w0, 0 beq .L73 adrp x0, p1_l0 add x0, x0, :lo12:p1_l0 ldrb w0, [x0] cmp w0, 0 beq .L71 .L73: adrp x0, p1_l3 add x0, x0, :lo12:p1_l3 ldrb w0, [x0] cmp w0, 0 bne .L74 adrp x0, p1_l2 add x0, x0, :lo12:p1_l2 ldrb w0, [x0] cmp w0, 0 beq .L74 adrp x0, p1_l0 add x0, x0, :lo12:p1_l0 ldrb w0, [x0] cmp w0, 0 beq .L74 adrp x0, p1_l1 add x0, x0, :lo12:p1_l1 ldrb w0, [x0] cmp w0, 0 beq .L71 .L74: adrp x0, p1_l3 add x0, x0, :lo12:p1_l3 ldrb w0, [x0] cmp w0, 0 bne .L75 adrp x0, p1_l2 add x0, x0, :lo12:p1_l2 ldrb w0, [x0] cmp w0, 0 beq .L75 adrp x0, p1_l0 add x0, x0, :lo12:p1_l0 ldrb w0, [x0] cmp w0, 0 bne .L75 adrp x0, p1_l1 add x0, x0, :lo12:p1_l1 ldrb w0, [x0] cmp w0, 0 beq .L71 .L75: adrp x0, p1_l3 add x0, x0, :lo12:p1_l3 ldrb w0, [x0] cmp w0, 0 bne .L76 adrp x0, p1_l2 add x0, x0, :lo12:p1_l2 ldrb w0, [x0] cmp w0, 0 bne .L76 adrp x0, p1_l0 add x0, x0, :lo12:p1_l0 ldrb w0, [x0] cmp w0, 0 beq .L76 adrp x0, p1_l1 add x0, x0, :lo12:p1_l1 ldrb w0, [x0] cmp w0, 0 bne .L71 .L76: adrp x0, p1_l3 add x0, x0, :lo12:p1_l3 ldrb w0, [x0] cmp w0, 0 bne .L77 adrp x0, p1_l2 add x0, x0, :lo12:p1_l2 ldrb w0, [x0] cmp w0, 0 bne .L77 adrp x0, p1_l1 add x0, x0, :lo12:p1_l1 ldrb w0, [x0] cmp w0, 0 beq .L77 adrp x0, p1_l0 add x0, x0, :lo12:p1_l0 ldrb w0, [x0] cmp w0, 0 beq .L71 .L77: adrp x0, p1_l3 add x0, x0, :lo12:p1_l3 ldrb w0, [x0] cmp w0, 0 bne .L78 adrp x0, p1_l2 add x0, x0, :lo12:p1_l2 ldrb w0, [x0] cmp w0, 0 bne .L78 adrp x0, p1_l0 add x0, x0, :lo12:p1_l0 ldrb w0, [x0] cmp w0, 0 bne .L78 adrp x0, p1_l1 add x0, x0, :lo12:p1_l1 ldrb w0, [x0] cmp w0, 0 beq .L71 .L78: adrp x0, p1_l3 add x0, x0, :lo12:p1_l3 ldrb w0, [x0] cmp w0, 0 bne .L13 adrp x0, p1_l2 add x0, x0, :lo12:p1_l2 ldrb w0, [x0] cmp w0, 0 bne .L13 adrp x0, p1_l0 add x0, x0, :lo12:p1_l0 ldrb w0, [x0] cmp w0, 0 beq .L13 adrp x0, p1_l1 add x0, x0, :lo12:p1_l1 ldrb w0, [x0] cmp w0, 0 bne .L13 .L71: adrp x0, p1_l3 add x0, x0, :lo12:p1_l3 ldrb w0, [x0] cmp w0, 0 bne .L13 adrp x0, p1_l2 add x0, x0, :lo12:p1_l2 ldrb w0, [x0] cmp w0, 0 bne .L13 adrp x0, p1_l0 add x0, x0, :lo12:p1_l0 ldrb w0, [x0] cmp w0, 0 bne .L13 adrp x0, p1_l1 add x0, x0, :lo12:p1_l1 ldrb w0, [x0] cmp w0, 0 bne .L13 adrp x0, p1_c add x0, x0, :lo12:p1_c ldr s0, [x0] fcmp s0, #0.0 bne .L13 adrp x0, p1_c add x0, x0, :lo12:p1_c ldr s1, [x0] adrp x0, proposed1 add x0, x0, :lo12:proposed1 ldr s0, [x0] fcmpe s1, s0 bls .L79 adrp x0, p1_l3 add x0, x0, :lo12:p1_l3 ldrb w0, [x0] cmp w0, 0 bne .L80 adrp x0, p1_l2 add x0, x0, :lo12:p1_l2 ldrb w0, [x0] cmp w0, 0 bne .L80 adrp x0, p1_l0 add x0, x0, :lo12:p1_l0 ldrb w0, [x0] cmp w0, 0 beq .L80 adrp x0, p1_l1 add x0, x0, :lo12:p1_l1 ldrb w0, [x0] cmp w0, 0 beq .L13 .L80: adrp x0, p1_l3 add x0, x0, :lo12:p1_l3 ldrb w0, [x0] cmp w0, 0 bne .L81 adrp x0, p1_l2 add x0, x0, :lo12:p1_l2 ldrb w0, [x0] cmp w0, 0 beq .L81 adrp x0, p1_l0 add x0, x0, :lo12:p1_l0 ldrb w0, [x0] cmp w0, 0 bne .L81 adrp x0, p1_l1 add x0, x0, :lo12:p1_l1 ldrb w0, [x0] cmp w0, 0 beq .L13 .L81: adrp x0, p1_l3 add x0, x0, :lo12:p1_l3 ldrb w0, [x0] cmp w0, 0 bne .L82 adrp x0, p1_l2 add x0, x0, :lo12:p1_l2 ldrb w0, [x0] cmp w0, 0 beq .L82 adrp x0, p1_l0 add x0, x0, :lo12:p1_l0 ldrb w0, [x0] cmp w0, 0 beq .L82 adrp x0, p1_l1 add x0, x0, :lo12:p1_l1 ldrb w0, [x0] cmp w0, 0 bne .L13 .L82: adrp x0, p1_l3 add x0, x0, :lo12:p1_l3 ldrb w0, [x0] cmp w0, 0 beq .L79 adrp x0, p1_l2 add x0, x0, :lo12:p1_l2 ldrb w0, [x0] cmp w0, 0 bne .L79 adrp x0, p1_l0 add x0, x0, :lo12:p1_l0 ldrb w0, [x0] cmp w0, 0 bne .L79 adrp x0, p1_l1 add x0, x0, :lo12:p1_l1 ldrb w0, [x0] cmp w0, 0 beq .L13 .L79: adrp x0, p0_l3 add x0, x0, :lo12:p0_l3 ldrb w0, [x0] cmp w0, 0 beq .L83 adrp x0, p0_l2 add x0, x0, :lo12:p0_l2 ldrb w0, [x0] cmp w0, 0 bne .L83 adrp x0, p0_l0 add x0, x0, :lo12:p0_l0 ldrb w0, [x0] cmp w0, 0 bne .L83 adrp x0, p0_l1 add x0, x0, :lo12:p0_l1 ldrb w0, [x0] cmp w0, 0 beq .L84 .L83: adrp x0, p0_l3 add x0, x0, :lo12:p0_l3 ldrb w0, [x0] cmp w0, 0 bne .L85 adrp x0, p0_l2 add x0, x0, :lo12:p0_l2 ldrb w0, [x0] cmp w0, 0 beq .L85 adrp x0, p0_l0 add x0, x0, :lo12:p0_l0 ldrb w0, [x0] cmp w0, 0 beq .L85 adrp x0, p0_l1 add x0, x0, :lo12:p0_l1 ldrb w0, [x0] cmp w0, 0 bne .L84 .L85: adrp x0, p0_l3 add x0, x0, :lo12:p0_l3 ldrb w0, [x0] cmp w0, 0 bne .L86 adrp x0, p0_l2 add x0, x0, :lo12:p0_l2 ldrb w0, [x0] cmp w0, 0 beq .L86 adrp x0, p0_l1 add x0, x0, :lo12:p0_l1 ldrb w0, [x0] cmp w0, 0 beq .L86 adrp x0, p0_l0 add x0, x0, :lo12:p0_l0 ldrb w0, [x0] cmp w0, 0 beq .L84 .L86: adrp x0, p0_l3 add x0, x0, :lo12:p0_l3 ldrb w0, [x0] cmp w0, 0 bne .L87 adrp x0, p0_l2 add x0, x0, :lo12:p0_l2 ldrb w0, [x0] cmp w0, 0 beq .L87 adrp x0, p0_l0 add x0, x0, :lo12:p0_l0 ldrb w0, [x0] cmp w0, 0 beq .L87 adrp x0, p0_l1 add x0, x0, :lo12:p0_l1 ldrb w0, [x0] cmp w0, 0 beq .L84 .L87: adrp x0, p0_l3 add x0, x0, :lo12:p0_l3 ldrb w0, [x0] cmp w0, 0 bne .L88 adrp x0, p0_l2 add x0, x0, :lo12:p0_l2 ldrb w0, [x0] cmp w0, 0 beq .L88 adrp x0, p0_l0 add x0, x0, :lo12:p0_l0 ldrb w0, [x0] cmp w0, 0 bne .L88 adrp x0, p0_l1 add x0, x0, :lo12:p0_l1 ldrb w0, [x0] cmp w0, 0 beq .L84 .L88: adrp x0, p0_l3 add x0, x0, :lo12:p0_l3 ldrb w0, [x0] cmp w0, 0 bne .L89 adrp x0, p0_l2 add x0, x0, :lo12:p0_l2 ldrb w0, [x0] cmp w0, 0 bne .L89 adrp x0, p0_l0 add x0, x0, :lo12:p0_l0 ldrb w0, [x0] cmp w0, 0 beq .L89 adrp x0, p0_l1 add x0, x0, :lo12:p0_l1 ldrb w0, [x0] cmp w0, 0 bne .L84 .L89: adrp x0, p0_l3 add x0, x0, :lo12:p0_l3 ldrb w0, [x0] cmp w0, 0 bne .L90 adrp x0, p0_l2 add x0, x0, :lo12:p0_l2 ldrb w0, [x0] cmp w0, 0 bne .L90 adrp x0, p0_l1 add x0, x0, :lo12:p0_l1 ldrb w0, [x0] cmp w0, 0 beq .L90 adrp x0, p0_l0 add x0, x0, :lo12:p0_l0 ldrb w0, [x0] cmp w0, 0 beq .L84 .L90: adrp x0, p0_l3 add x0, x0, :lo12:p0_l3 ldrb w0, [x0] cmp w0, 0 bne .L91 adrp x0, p0_l2 add x0, x0, :lo12:p0_l2 ldrb w0, [x0] cmp w0, 0 bne .L91 adrp x0, p0_l0 add x0, x0, :lo12:p0_l0 ldrb w0, [x0] cmp w0, 0 bne .L91 adrp x0, p0_l1 add x0, x0, :lo12:p0_l1 ldrb w0, [x0] cmp w0, 0 beq .L84 .L91: adrp x0, p0_l3 add x0, x0, :lo12:p0_l3 ldrb w0, [x0] cmp w0, 0 bne .L13 adrp x0, p0_l2 add x0, x0, :lo12:p0_l2 ldrb w0, [x0] cmp w0, 0 bne .L13 adrp x0, p0_l0 add x0, x0, :lo12:p0_l0 ldrb w0, [x0] cmp w0, 0 beq .L13 adrp x0, p0_l1 add x0, x0, :lo12:p0_l1 ldrb w0, [x0] cmp w0, 0 bne .L13 .L84: adrp x0, p0_l3 add x0, x0, :lo12:p0_l3 ldrb w0, [x0] cmp w0, 0 bne .L13 adrp x0, p0_l2 add x0, x0, :lo12:p0_l2 ldrb w0, [x0] cmp w0, 0 bne .L13 adrp x0, p0_l0 add x0, x0, :lo12:p0_l0 ldrb w0, [x0] cmp w0, 0 bne .L13 adrp x0, p0_l1 add x0, x0, :lo12:p0_l1 ldrb w0, [x0] cmp w0, 0 bne .L13 adrp x0, p0_c add x0, x0, :lo12:p0_c ldr s0, [x0] fcmp s0, #0.0 bne .L13 adrp x0, p0_c add x0, x0, :lo12:p0_c ldr s1, [x0] adrp x0, proposed0 add x0, x0, :lo12:proposed0 ldr s0, [x0] fcmpe s1, s0 bls .L92 adrp x0, p0_l3 add x0, x0, :lo12:p0_l3 ldrb w0, [x0] cmp w0, 0 bne .L93 adrp x0, p0_l2 add x0, x0, :lo12:p0_l2 ldrb w0, [x0] cmp w0, 0 bne .L93 adrp x0, p0_l0 add x0, x0, :lo12:p0_l0 ldrb w0, [x0] cmp w0, 0 beq .L93 adrp x0, p0_l1 add x0, x0, :lo12:p0_l1 ldrb w0, [x0] cmp w0, 0 beq .L13 .L93: adrp x0, p0_l3 add x0, x0, :lo12:p0_l3 ldrb w0, [x0] cmp w0, 0 bne .L94 adrp x0, p0_l2 add x0, x0, :lo12:p0_l2 ldrb w0, [x0] cmp w0, 0 beq .L94 adrp x0, p0_l0 add x0, x0, :lo12:p0_l0 ldrb w0, [x0] cmp w0, 0 bne .L94 adrp x0, p0_l1 add x0, x0, :lo12:p0_l1 ldrb w0, [x0] cmp w0, 0 beq .L13 .L94: adrp x0, p0_l3 add x0, x0, :lo12:p0_l3 ldrb w0, [x0] cmp w0, 0 bne .L95 adrp x0, p0_l2 add x0, x0, :lo12:p0_l2 ldrb w0, [x0] cmp w0, 0 beq .L95 adrp x0, p0_l0 add x0, x0, :lo12:p0_l0 ldrb w0, [x0] cmp w0, 0 beq .L95 adrp x0, p0_l1 add x0, x0, :lo12:p0_l1 ldrb w0, [x0] cmp w0, 0 bne .L13 .L95: adrp x0, p0_l3 add x0, x0, :lo12:p0_l3 ldrb w0, [x0] cmp w0, 0 beq .L92 adrp x0, p0_l2 add x0, x0, :lo12:p0_l2 ldrb w0, [x0] cmp w0, 0 bne .L92 adrp x0, p0_l0 add x0, x0, :lo12:p0_l0 ldrb w0, [x0] cmp w0, 0 bne .L92 adrp x0, p0_l1 add x0, x0, :lo12:p0_l1 ldrb w0, [x0] cmp w0, 0 beq .L13 .L92: adrp x0, inc_max_prop add x0, x0, :lo12:inc_max_prop ldrb w0, [x0] cmp w0, 0 beq .L13 adrp x0, v1 add x0, x0, :lo12:v1 ldr w0, [x0] cmp w0, 7 beq .L96 adrp x0, v1 add x0, x0, :lo12:v1 ldr w0, [x0] cmp w0, 6 beq .L96 adrp x0, v1 add x0, x0, :lo12:v1 ldr w0, [x0] cmp w0, 5 beq .L96 adrp x0, v1 add x0, x0, :lo12:v1 ldr w0, [x0] cmp w0, 4 beq .L96 adrp x0, v1 add x0, x0, :lo12:v1 ldr w0, [x0] cmp w0, 3 beq .L96 adrp x0, v1 add x0, x0, :lo12:v1 ldr w0, [x0] cmp w0, 2 beq .L96 adrp x0, v1 add x0, x0, :lo12:v1 ldr w0, [x0] cmp w0, 0 beq .L96 adrp x0, v1 add x0, x0, :lo12:v1 ldr w0, [x0] cmp w0, 1 bne .L13 .L96: adrp x0, proposed0 add x0, x0, :lo12:proposed0 ldr s1, [x0] fmov s0, 1.6e+1 fcmp s1, s0 bne .L13 adrp x0, proposed1 add x0, x0, :lo12:proposed1 ldr s1, [x0] fmov s0, 1.6e+1 fcmp s1, s0 bne .L13 adrp x0, proposed2 add x0, x0, :lo12:proposed2 ldr s1, [x0] fmov s0, 1.6e+1 fcmp s1, s0 bne .L13 adrp x0, proposed3 add x0, x0, :lo12:proposed3 ldr s1, [x0] fmov s0, 1.6e+1 fcmp s1, s0 bne .L13 adrp x0, proposed4 add x0, x0, :lo12:proposed4 ldr s1, [x0] fmov s0, 1.6e+1 fcmp s1, s0 bne .L13 adrp x0, proposed5 add x0, x0, :lo12:proposed5 ldr s1, [x0] fmov s0, 1.6e+1 fcmp s1, s0 bne .L13 adrp x0, proposed6 add x0, x0, :lo12:proposed6 ldr s1, [x0] fmov s0, 1.6e+1 fcmp s1, s0 bne .L13 adrp x0, delta add x0, x0, :lo12:delta ldr s0, [x0] fcmpe s0, #0.0 bge .L462 b .L13 .L462: adrp x0, proposed0 add x0, x0, :lo12:proposed0 ldr s0, [x0] fcmpe s0, #0.0 cset w0, ls and w0, w0, 255 eor w0, w0, 1 and w0, w0, 255 cmp w0, 0 beq .L13 adrp x0, proposed0 add x0, x0, :lo12:proposed0 ldr s1, [x0] adrp x0, max_prop add x0, x0, :lo12:max_prop ldr s0, [x0] fcmpe s1, s0 bls .L463 b .L13 .L463: adrp x0, proposed1 add x0, x0, :lo12:proposed1 ldr s0, [x0] fcmpe s0, #0.0 cset w0, ls and w0, w0, 255 eor w0, w0, 1 and w0, w0, 255 cmp w0, 0 beq .L13 adrp x0, proposed1 add x0, x0, :lo12:proposed1 ldr s1, [x0] adrp x0, max_prop add x0, x0, :lo12:max_prop ldr s0, [x0] fcmpe s1, s0 bls .L464 b .L13 .L464: adrp x0, proposed2 add x0, x0, :lo12:proposed2 ldr s0, [x0] fcmpe s0, #0.0 cset w0, ls and w0, w0, 255 eor w0, w0, 1 and w0, w0, 255 cmp w0, 0 beq .L13 adrp x0, proposed2 add x0, x0, :lo12:proposed2 ldr s1, [x0] adrp x0, max_prop add x0, x0, :lo12:max_prop ldr s0, [x0] fcmpe s1, s0 bls .L465 b .L13 .L465: adrp x0, proposed3 add x0, x0, :lo12:proposed3 ldr s0, [x0] fcmpe s0, #0.0 cset w0, ls and w0, w0, 255 eor w0, w0, 1 and w0, w0, 255 cmp w0, 0 beq .L13 adrp x0, proposed3 add x0, x0, :lo12:proposed3 ldr s1, [x0] adrp x0, max_prop add x0, x0, :lo12:max_prop ldr s0, [x0] fcmpe s1, s0 bls .L466 b .L13 .L466: adrp x0, proposed4 add x0, x0, :lo12:proposed4 ldr s0, [x0] fcmpe s0, #0.0 cset w0, ls and w0, w0, 255 eor w0, w0, 1 and w0, w0, 255 cmp w0, 0 beq .L13 adrp x0, proposed4 add x0, x0, :lo12:proposed4 ldr s1, [x0] adrp x0, max_prop add x0, x0, :lo12:max_prop ldr s0, [x0] fcmpe s1, s0 bls .L467 b .L13 .L467: adrp x0, proposed5 add x0, x0, :lo12:proposed5 ldr s0, [x0] fcmpe s0, #0.0 cset w0, ls and w0, w0, 255 eor w0, w0, 1 and w0, w0, 255 cmp w0, 0 beq .L13 adrp x0, proposed5 add x0, x0, :lo12:proposed5 ldr s1, [x0] adrp x0, max_prop add x0, x0, :lo12:max_prop ldr s0, [x0] fcmpe s1, s0 bls .L468 b .L13 .L468: adrp x0, proposed6 add x0, x0, :lo12:proposed6 ldr s0, [x0] fcmpe s0, #0.0 cset w0, ls and w0, w0, 255 eor w0, w0, 1 and w0, w0, 255 cmp w0, 0 beq .L13 adrp x0, proposed6 add x0, x0, :lo12:proposed6 ldr s1, [x0] adrp x0, max_prop add x0, x0, :lo12:max_prop ldr s0, [x0] fcmpe s1, s0 bls .L469 b .L13 .L469: adrp x0, max_prop add x0, x0, :lo12:max_prop ldr s1, [x0] adrp x0, proposed0 add x0, x0, :lo12:proposed0 ldr s0, [x0] fcmp s1, s0 beq .L105 adrp x0, max_prop add x0, x0, :lo12:max_prop ldr s1, [x0] adrp x0, proposed1 add x0, x0, :lo12:proposed1 ldr s0, [x0] fcmp s1, s0 beq .L105 adrp x0, max_prop add x0, x0, :lo12:max_prop ldr s1, [x0] adrp x0, proposed2 add x0, x0, :lo12:proposed2 ldr s0, [x0] fcmp s1, s0 beq .L105 adrp x0, max_prop add x0, x0, :lo12:max_prop ldr s1, [x0] adrp x0, proposed3 add x0, x0, :lo12:proposed3 ldr s0, [x0] fcmp s1, s0 beq .L105 adrp x0, max_prop add x0, x0, :lo12:max_prop ldr s1, [x0] adrp x0, proposed4 add x0, x0, :lo12:proposed4 ldr s0, [x0] fcmp s1, s0 beq .L105 adrp x0, max_prop add x0, x0, :lo12:max_prop ldr s1, [x0] adrp x0, proposed5 add x0, x0, :lo12:proposed5 ldr s0, [x0] fcmp s1, s0 beq .L105 adrp x0, max_prop add x0, x0, :lo12:max_prop ldr s1, [x0] adrp x0, proposed6 add x0, x0, :lo12:proposed6 ldr s0, [x0] fcmp s1, s0 bne .L13 .L105: adrp x0, delta add x0, x0, :lo12:delta ldr s1, [x0] adrp x0, _diverge_delta add x0, x0, :lo12:_diverge_delta ldr s0, [x0] fcmp s1, s0 bne .L13 mov w0, 1 b .L106 .L13: mov w0, 0 .L106: str w0, [sp, 28] b .L107 .L460: bl __VERIFIER_nondet_bool and w1, w0, 255 adrp x0, _x_p6_l3 add x0, x0, :lo12:_x_p6_l3 strb w1, [x0] bl __VERIFIER_nondet_bool and w1, w0, 255 adrp x0, _x_p6_l2 add x0, x0, :lo12:_x_p6_l2 strb w1, [x0] bl __VERIFIER_nondet_bool and w1, w0, 255 adrp x0, _x_p6_l1 add x0, x0, :lo12:_x_p6_l1 strb w1, [x0] bl __VERIFIER_nondet_bool and w1, w0, 255 adrp x0, _x_p6_l0 add x0, x0, :lo12:_x_p6_l0 strb w1, [x0] bl __VERIFIER_nondet_bool and w1, w0, 255 adrp x0, _x_p6_evt add x0, x0, :lo12:_x_p6_evt strb w1, [x0] bl __VERIFIER_nondet_float adrp x0, _x_p6_c add x0, x0, :lo12:_x_p6_c str s0, [x0] bl __VERIFIER_nondet_bool and w1, w0, 255 adrp x0, _x_p5_l3 add x0, x0, :lo12:_x_p5_l3 strb w1, [x0] bl __VERIFIER_nondet_bool and w1, w0, 255 adrp x0, _x_p5_l2 add x0, x0, :lo12:_x_p5_l2 strb w1, [x0] bl __VERIFIER_nondet_bool and w1, w0, 255 adrp x0, _x_p5_l1 add x0, x0, :lo12:_x_p5_l1 strb w1, [x0] bl __VERIFIER_nondet_bool and w1, w0, 255 adrp x0, _x_p5_l0 add x0, x0, :lo12:_x_p5_l0 strb w1, [x0] bl __VERIFIER_nondet_bool and w1, w0, 255 adrp x0, _x_p4_l3 add x0, x0, :lo12:_x_p4_l3 strb w1, [x0] bl __VERIFIER_nondet_bool and w1, w0, 255 adrp x0, _x_p4_l2 add x0, x0, :lo12:_x_p4_l2 strb w1, [x0] bl __VERIFIER_nondet_bool and w1, w0, 255 adrp x0, _x_p4_l1 add x0, x0, :lo12:_x_p4_l1 strb w1, [x0] bl __VERIFIER_nondet_bool and w1, w0, 255 adrp x0, _x_p4_l0 add x0, x0, :lo12:_x_p4_l0 strb w1, [x0] bl __VERIFIER_nondet_bool and w1, w0, 255 adrp x0, _x_p3_l1 add x0, x0, :lo12:_x_p3_l1 strb w1, [x0] bl __VERIFIER_nondet_bool and w1, w0, 255 adrp x0, _x_p3_l0 add x0, x0, :lo12:_x_p3_l0 strb w1, [x0] bl __VERIFIER_nondet_bool and w1, w0, 255 adrp x0, _x_p2_l3 add x0, x0, :lo12:_x_p2_l3 strb w1, [x0] bl __VERIFIER_nondet_bool and w1, w0, 255 adrp x0, _x_p3_evt add x0, x0, :lo12:_x_p3_evt strb w1, [x0] bl __VERIFIER_nondet_float adrp x0, _x_proposed6 add x0, x0, :lo12:_x_proposed6 str s0, [x0] bl __VERIFIER_nondet_float adrp x0, _x_p3_c add x0, x0, :lo12:_x_p3_c str s0, [x0] bl __VERIFIER_nondet_float adrp x0, _x_proposed5 add x0, x0, :lo12:_x_proposed5 str s0, [x0] bl __VERIFIER_nondet_float adrp x0, _x_proposed4 add x0, x0, :lo12:_x_proposed4 str s0, [x0] bl __VERIFIER_nondet_bool and w1, w0, 255 adrp x0, _x_p1_l3 add x0, x0, :lo12:_x_p1_l3 strb w1, [x0] bl __VERIFIER_nondet_float adrp x0, _x_proposed3 add x0, x0, :lo12:_x_proposed3 str s0, [x0] bl __VERIFIER_nondet_bool and w1, w0, 255 adrp x0, _x_p1_l2 add x0, x0, :lo12:_x_p1_l2 strb w1, [x0] bl __VERIFIER_nondet_bool and w1, w0, 255 adrp x0, _x_p4_evt add x0, x0, :lo12:_x_p4_evt strb w1, [x0] bl __VERIFIER_nondet_float adrp x0, _x_proposed2 add x0, x0, :lo12:_x_proposed2 str s0, [x0] bl __VERIFIER_nondet_bool and w1, w0, 255 adrp x0, _x_p1_evt add x0, x0, :lo12:_x_p1_evt strb w1, [x0] bl __VERIFIER_nondet_bool and w1, w0, 255 adrp x0, _x_p1_l1 add x0, x0, :lo12:_x_p1_l1 strb w1, [x0] bl __VERIFIER_nondet_float adrp x0, _x_p4_c add x0, x0, :lo12:_x_p4_c str s0, [x0] bl __VERIFIER_nondet_float adrp x0, _x_proposed1 add x0, x0, :lo12:_x_proposed1 str s0, [x0] bl __VERIFIER_nondet_float adrp x0, _x_p1_c add x0, x0, :lo12:_x_p1_c str s0, [x0] bl __VERIFIER_nondet_bool and w1, w0, 255 adrp x0, _x_p1_l0 add x0, x0, :lo12:_x_p1_l0 strb w1, [x0] bl __VERIFIER_nondet_float adrp x0, _x__diverge_delta add x0, x0, :lo12:_x__diverge_delta str s0, [x0] bl __VERIFIER_nondet_bool and w1, w0, 255 adrp x0, _x_p2_l2 add x0, x0, :lo12:_x_p2_l2 strb w1, [x0] bl __VERIFIER_nondet_float adrp x0, _x_proposed0 add x0, x0, :lo12:_x_proposed0 str s0, [x0] bl __VERIFIER_nondet_bool and w1, w0, 255 adrp x0, _x_p2_l1 add x0, x0, :lo12:_x_p2_l1 strb w1, [x0] bl __VERIFIER_nondet_bool and w1, w0, 255 adrp x0, _x_inc_max_prop add x0, x0, :lo12:_x_inc_max_prop strb w1, [x0] bl __VERIFIER_nondet_bool and w1, w0, 255 adrp x0, _x_p2_l0 add x0, x0, :lo12:_x_p2_l0 strb w1, [x0] bl __VERIFIER_nondet_bool and w1, w0, 255 adrp x0, _x_p3_l2 add x0, x0, :lo12:_x_p3_l2 strb w1, [x0] bl __VERIFIER_nondet_float adrp x0, _x_p0_c add x0, x0, :lo12:_x_p0_c str s0, [x0] bl __VERIFIER_nondet_bool and w1, w0, 255 adrp x0, _x_p0_l0 add x0, x0, :lo12:_x_p0_l0 strb w1, [x0] bl __VERIFIER_nondet_bool and w1, w0, 255 adrp x0, _x_p5_evt add x0, x0, :lo12:_x_p5_evt strb w1, [x0] bl __VERIFIER_nondet_float adrp x0, _x_max_prop add x0, x0, :lo12:_x_max_prop str s0, [x0] bl __VERIFIER_nondet_float adrp x0, _x_p5_c add x0, x0, :lo12:_x_p5_c str s0, [x0] bl __VERIFIER_nondet_bool and w1, w0, 255 adrp x0, _x_v2 add x0, x0, :lo12:_x_v2 strb w1, [x0] bl __VERIFIER_nondet_int mov w1, w0 adrp x0, _x_v1 add x0, x0, :lo12:_x_v1 str w1, [x0] bl __VERIFIER_nondet_float adrp x0, _x_delta add x0, x0, :lo12:_x_delta str s0, [x0] bl __VERIFIER_nondet_bool and w1, w0, 255 adrp x0, _x_p3_l3 add x0, x0, :lo12:_x_p3_l3 strb w1, [x0] bl __VERIFIER_nondet_bool and w1, w0, 255 adrp x0, _x_p0_evt add x0, x0, :lo12:_x_p0_evt strb w1, [x0] bl __VERIFIER_nondet_float adrp x0, _x_p2_c add x0, x0, :lo12:_x_p2_c str s0, [x0] bl __VERIFIER_nondet_bool and w1, w0, 255 adrp x0, _x_p0_l1 add x0, x0, :lo12:_x_p0_l1 strb w1, [x0] bl __VERIFIER_nondet_bool and w1, w0, 255 adrp x0, _x_p2_evt add x0, x0, :lo12:_x_p2_evt strb w1, [x0] bl __VERIFIER_nondet_bool and w1, w0, 255 adrp x0, _x_p0_l2 add x0, x0, :lo12:_x_p0_l2 strb w1, [x0] bl __VERIFIER_nondet_bool and w1, w0, 255 adrp x0, _x_p0_l3 add x0, x0, :lo12:_x_p0_l3 strb w1, [x0] adrp x0, _x_p6_l3 add x0, x0, :lo12:_x_p6_l3 ldrb w0, [x0] cmp w0, 0 beq .L108 adrp x0, _x_p6_l2 add x0, x0, :lo12:_x_p6_l2 ldrb w0, [x0] cmp w0, 0 bne .L108 adrp x0, _x_p6_l0 add x0, x0, :lo12:_x_p6_l0 ldrb w0, [x0] cmp w0, 0 bne .L108 adrp x0, _x_p6_l1 add x0, x0, :lo12:_x_p6_l1 ldrb w0, [x0] cmp w0, 0 beq .L109 .L108: adrp x0, _x_p6_l3 add x0, x0, :lo12:_x_p6_l3 ldrb w0, [x0] cmp w0, 0 bne .L110 adrp x0, _x_p6_l2 add x0, x0, :lo12:_x_p6_l2 ldrb w0, [x0] cmp w0, 0 beq .L110 adrp x0, _x_p6_l0 add x0, x0, :lo12:_x_p6_l0 ldrb w0, [x0] cmp w0, 0 beq .L110 adrp x0, _x_p6_l1 add x0, x0, :lo12:_x_p6_l1 ldrb w0, [x0] cmp w0, 0 bne .L109 .L110: adrp x0, _x_p6_l3 add x0, x0, :lo12:_x_p6_l3 ldrb w0, [x0] cmp w0, 0 bne .L111 adrp x0, _x_p6_l2 add x0, x0, :lo12:_x_p6_l2 ldrb w0, [x0] cmp w0, 0 beq .L111 adrp x0, _x_p6_l1 add x0, x0, :lo12:_x_p6_l1 ldrb w0, [x0] cmp w0, 0 beq .L111 adrp x0, _x_p6_l0 add x0, x0, :lo12:_x_p6_l0 ldrb w0, [x0] cmp w0, 0 beq .L109 .L111: adrp x0, _x_p6_l3 add x0, x0, :lo12:_x_p6_l3 ldrb w0, [x0] cmp w0, 0 bne .L112 adrp x0, _x_p6_l2 add x0, x0, :lo12:_x_p6_l2 ldrb w0, [x0] cmp w0, 0 beq .L112 adrp x0, _x_p6_l0 add x0, x0, :lo12:_x_p6_l0 ldrb w0, [x0] cmp w0, 0 beq .L112 adrp x0, _x_p6_l1 add x0, x0, :lo12:_x_p6_l1 ldrb w0, [x0] cmp w0, 0 beq .L109 .L112: adrp x0, _x_p6_l3 add x0, x0, :lo12:_x_p6_l3 ldrb w0, [x0] cmp w0, 0 bne .L113 adrp x0, _x_p6_l2 add x0, x0, :lo12:_x_p6_l2 ldrb w0, [x0] cmp w0, 0 beq .L113 adrp x0, _x_p6_l0 add x0, x0, :lo12:_x_p6_l0 ldrb w0, [x0] cmp w0, 0 bne .L113 adrp x0, _x_p6_l1 add x0, x0, :lo12:_x_p6_l1 ldrb w0, [x0] cmp w0, 0 beq .L109 .L113: adrp x0, _x_p6_l3 add x0, x0, :lo12:_x_p6_l3 ldrb w0, [x0] cmp w0, 0 bne .L114 adrp x0, _x_p6_l2 add x0, x0, :lo12:_x_p6_l2 ldrb w0, [x0] cmp w0, 0 bne .L114 adrp x0, _x_p6_l0 add x0, x0, :lo12:_x_p6_l0 ldrb w0, [x0] cmp w0, 0 beq .L114 adrp x0, _x_p6_l1 add x0, x0, :lo12:_x_p6_l1 ldrb w0, [x0] cmp w0, 0 bne .L109 .L114: adrp x0, _x_p6_l3 add x0, x0, :lo12:_x_p6_l3 ldrb w0, [x0] cmp w0, 0 bne .L115 adrp x0, _x_p6_l2 add x0, x0, :lo12:_x_p6_l2 ldrb w0, [x0] cmp w0, 0 bne .L115 adrp x0, _x_p6_l1 add x0, x0, :lo12:_x_p6_l1 ldrb w0, [x0] cmp w0, 0 beq .L115 adrp x0, _x_p6_l0 add x0, x0, :lo12:_x_p6_l0 ldrb w0, [x0] cmp w0, 0 beq .L109 .L115: adrp x0, _x_p6_l3 add x0, x0, :lo12:_x_p6_l3 ldrb w0, [x0] cmp w0, 0 bne .L116 adrp x0, _x_p6_l2 add x0, x0, :lo12:_x_p6_l2 ldrb w0, [x0] cmp w0, 0 bne .L116 adrp x0, _x_p6_l0 add x0, x0, :lo12:_x_p6_l0 ldrb w0, [x0] cmp w0, 0 bne .L116 adrp x0, _x_p6_l1 add x0, x0, :lo12:_x_p6_l1 ldrb w0, [x0] cmp w0, 0 beq .L109 .L116: adrp x0, _x_p6_l3 add x0, x0, :lo12:_x_p6_l3 ldrb w0, [x0] cmp w0, 0 bne .L117 adrp x0, _x_p6_l2 add x0, x0, :lo12:_x_p6_l2 ldrb w0, [x0] cmp w0, 0 bne .L117 adrp x0, _x_p6_l0 add x0, x0, :lo12:_x_p6_l0 ldrb w0, [x0] cmp w0, 0 beq .L117 adrp x0, _x_p6_l1 add x0, x0, :lo12:_x_p6_l1 ldrb w0, [x0] cmp w0, 0 bne .L117 .L109: adrp x0, _x_p6_c add x0, x0, :lo12:_x_p6_c ldr s1, [x0] adrp x0, _x_proposed6 add x0, x0, :lo12:_x_proposed6 ldr s0, [x0] fcmpe s1, s0 bls .L118 adrp x0, _x_p6_l3 add x0, x0, :lo12:_x_p6_l3 ldrb w0, [x0] cmp w0, 0 bne .L119 adrp x0, _x_p6_l2 add x0, x0, :lo12:_x_p6_l2 ldrb w0, [x0] cmp w0, 0 bne .L119 adrp x0, _x_p6_l0 add x0, x0, :lo12:_x_p6_l0 ldrb w0, [x0] cmp w0, 0 beq .L119 adrp x0, _x_p6_l1 add x0, x0, :lo12:_x_p6_l1 ldrb w0, [x0] cmp w0, 0 beq .L117 .L119: adrp x0, _x_p6_l3 add x0, x0, :lo12:_x_p6_l3 ldrb w0, [x0] cmp w0, 0 bne .L120 adrp x0, _x_p6_l2 add x0, x0, :lo12:_x_p6_l2 ldrb w0, [x0] cmp w0, 0 beq .L120 adrp x0, _x_p6_l0 add x0, x0, :lo12:_x_p6_l0 ldrb w0, [x0] cmp w0, 0 bne .L120 adrp x0, _x_p6_l1 add x0, x0, :lo12:_x_p6_l1 ldrb w0, [x0] cmp w0, 0 beq .L117 .L120: adrp x0, _x_p6_l3 add x0, x0, :lo12:_x_p6_l3 ldrb w0, [x0] cmp w0, 0 bne .L121 adrp x0, _x_p6_l2 add x0, x0, :lo12:_x_p6_l2 ldrb w0, [x0] cmp w0, 0 beq .L121 adrp x0, _x_p6_l0 add x0, x0, :lo12:_x_p6_l0 ldrb w0, [x0] cmp w0, 0 beq .L121 adrp x0, _x_p6_l1 add x0, x0, :lo12:_x_p6_l1 ldrb w0, [x0] cmp w0, 0 bne .L117 .L121: adrp x0, _x_p6_l3 add x0, x0, :lo12:_x_p6_l3 ldrb w0, [x0] cmp w0, 0 beq .L118 adrp x0, _x_p6_l2 add x0, x0, :lo12:_x_p6_l2 ldrb w0, [x0] cmp w0, 0 bne .L118 adrp x0, _x_p6_l0 add x0, x0, :lo12:_x_p6_l0 ldrb w0, [x0] cmp w0, 0 bne .L118 adrp x0, _x_p6_l1 add x0, x0, :lo12:_x_p6_l1 ldrb w0, [x0] cmp w0, 0 beq .L117 .L118: adrp x0, p6_l0 add x0, x0, :lo12:p6_l0 ldrb w0, [x0] cmp w0, 0 cset w0, eq and w1, w0, 255 adrp x0, _x_p6_l0 add x0, x0, :lo12:_x_p6_l0 ldrb w0, [x0] cmp w0, 0 cset w0, ne and w0, w0, 255 eor w0, w1, w0 and w0, w0, 255 cmp w0, 0 beq .L122 adrp x0, p6_l1 add x0, x0, :lo12:p6_l1 ldrb w0, [x0] cmp w0, 0 cset w0, eq and w1, w0, 255 adrp x0, _x_p6_l1 add x0, x0, :lo12:_x_p6_l1 ldrb w0, [x0] cmp w0, 0 cset w0, ne and w0, w0, 255 eor w0, w1, w0 and w0, w0, 255 cmp w0, 0 beq .L122 adrp x0, p6_l2 add x0, x0, :lo12:p6_l2 ldrb w0, [x0] cmp w0, 0 cset w0, eq and w1, w0, 255 adrp x0, _x_p6_l2 add x0, x0, :lo12:_x_p6_l2 ldrb w0, [x0] cmp w0, 0 cset w0, ne and w0, w0, 255 eor w0, w1, w0 and w0, w0, 255 cmp w0, 0 beq .L122 adrp x0, p6_l3 add x0, x0, :lo12:p6_l3 ldrb w0, [x0] cmp w0, 0 cset w0, eq and w1, w0, 255 adrp x0, _x_p6_l3 add x0, x0, :lo12:_x_p6_l3 ldrb w0, [x0] cmp w0, 0 cset w0, ne and w0, w0, 255 eor w0, w1, w0 and w0, w0, 255 cmp w0, 0 beq .L122 adrp x0, delta add x0, x0, :lo12:delta ldr s0, [x0] fcvt d1, s0 adrp x0, p6_c add x0, x0, :lo12:p6_c ldr s0, [x0] fcvt d2, s0 adrp x0, _x_p6_c add x0, x0, :lo12:_x_p6_c ldr s0, [x0] fcvt d0, s0 fsub d0, d2, d0 fadd d0, d1, d0 fcmp d0, #0.0 bne .L122 adrp x0, proposed6 add x0, x0, :lo12:proposed6 ldr s1, [x0] adrp x0, _x_proposed6 add x0, x0, :lo12:_x_proposed6 ldr s0, [x0] fcmp s1, s0 beq .L123 .L122: adrp x0, delta add x0, x0, :lo12:delta ldr s0, [x0] fcmpe s0, #0.0 bls .L470 b .L117 .L470: adrp x0, p6_evt add x0, x0, :lo12:p6_evt ldrb w0, [x0] cmp w0, 0 beq .L117 .L123: adrp x0, v1 add x0, x0, :lo12:v1 ldr w0, [x0] cmp w0, 0 bne .L125 adrp x0, _x_p6_l3 add x0, x0, :lo12:_x_p6_l3 ldrb w0, [x0] cmp w0, 0 bne .L125 adrp x0, _x_p6_l2 add x0, x0, :lo12:_x_p6_l2 ldrb w0, [x0] cmp w0, 0 bne .L125 adrp x0, _x_p6_l0 add x0, x0, :lo12:_x_p6_l0 ldrb w0, [x0] cmp w0, 0 beq .L125 adrp x0, _x_p6_l1 add x0, x0, :lo12:_x_p6_l1 ldrb w0, [x0] cmp w0, 0 bne .L125 adrp x0, v2 add x0, x0, :lo12:v2 ldrb w0, [x0] cmp w0, 0 cset w0, eq and w1, w0, 255 adrp x0, _x_v2 add x0, x0, :lo12:_x_v2 ldrb w0, [x0] cmp w0, 0 cset w0, ne and w0, w0, 255 eor w0, w1, w0 and w0, w0, 255 cmp w0, 0 beq .L125 adrp x0, _x_p6_c add x0, x0, :lo12:_x_p6_c ldr s0, [x0] fcmp s0, #0.0 bne .L125 adrp x0, v1 add x0, x0, :lo12:v1 ldr w1, [x0] adrp x0, _x_v1 add x0, x0, :lo12:_x_v1 ldr w0, [x0] cmp w1, w0 bne .L125 adrp x0, proposed6 add x0, x0, :lo12:proposed6 ldr s1, [x0] adrp x0, _x_proposed6 add x0, x0, :lo12:_x_proposed6 ldr s0, [x0] fcmp s1, s0 beq .L126 .L125: adrp x0, p6_l3 add x0, x0, :lo12:p6_l3 ldrb w0, [x0] cmp w0, 0 bne .L126 adrp x0, p6_l2 add x0, x0, :lo12:p6_l2 ldrb w0, [x0] cmp w0, 0 bne .L126 adrp x0, p6_l0 add x0, x0, :lo12:p6_l0 ldrb w0, [x0] cmp w0, 0 bne .L126 adrp x0, p6_l1 add x0, x0, :lo12:p6_l1 ldrb w0, [x0] cmp w0, 0 bne .L126 adrp x0, delta add x0, x0, :lo12:delta ldr s0, [x0] fcmp s0, #0.0 bne .L126 adrp x0, p6_evt add x0, x0, :lo12:p6_evt ldrb w0, [x0] cmp w0, 0 bne .L117 .L126: adrp x0, proposed6 add x0, x0, :lo12:proposed6 ldr s1, [x0] adrp x0, _x_proposed6 add x0, x0, :lo12:_x_proposed6 ldr s0, [x0] fcmp s1, s0 bne .L127 adrp x0, v2 add x0, x0, :lo12:v2 ldrb w0, [x0] cmp w0, 0 cset w0, eq and w1, w0, 255 adrp x0, _x_v2 add x0, x0, :lo12:_x_v2 ldrb w0, [x0] cmp w0, 0 cset w0, ne and w0, w0, 255 eor w0, w1, w0 and w0, w0, 255 cmp w0, 0 beq .L127 adrp x0, _x_p6_c add x0, x0, :lo12:_x_p6_c ldr s0, [x0] fcmp s0, #0.0 bne .L127 adrp x0, _x_p6_l3 add x0, x0, :lo12:_x_p6_l3 ldrb w0, [x0] cmp w0, 0 bne .L127 adrp x0, _x_p6_l2 add x0, x0, :lo12:_x_p6_l2 ldrb w0, [x0] cmp w0, 0 bne .L127 adrp x0, _x_p6_l1 add x0, x0, :lo12:_x_p6_l1 ldrb w0, [x0] cmp w0, 0 beq .L127 adrp x0, _x_p6_l0 add x0, x0, :lo12:_x_p6_l0 ldrb w0, [x0] cmp w0, 0 bne .L127 adrp x0, _x_v1 add x0, x0, :lo12:_x_v1 ldr w0, [x0] cmp w0, 7 beq .L128 .L127: adrp x0, p6_l3 add x0, x0, :lo12:p6_l3 ldrb w0, [x0] cmp w0, 0 bne .L128 adrp x0, p6_l2 add x0, x0, :lo12:p6_l2 ldrb w0, [x0] cmp w0, 0 bne .L128 adrp x0, p6_l0 add x0, x0, :lo12:p6_l0 ldrb w0, [x0] cmp w0, 0 beq .L128 adrp x0, p6_l1 add x0, x0, :lo12:p6_l1 ldrb w0, [x0] cmp w0, 0 bne .L128 adrp x0, delta add x0, x0, :lo12:delta ldr s0, [x0] fcmp s0, #0.0 bne .L128 adrp x0, p6_evt add x0, x0, :lo12:p6_evt ldrb w0, [x0] cmp w0, 0 bne .L117 .L128: adrp x0, v2 add x0, x0, :lo12:v2 ldrb w0, [x0] cmp w0, 0 cset w0, eq and w1, w0, 255 adrp x0, _x_v2 add x0, x0, :lo12:_x_v2 ldrb w0, [x0] cmp w0, 0 cset w0, ne and w0, w0, 255 eor w0, w1, w0 and w0, w0, 255 cmp w0, 0 beq .L129 adrp x0, v1 add x0, x0, :lo12:v1 ldr w1, [x0] adrp x0, _x_v1 add x0, x0, :lo12:_x_v1 ldr w0, [x0] cmp w1, w0 bne .L129 adrp x0, _x_p6_l3 add x0, x0, :lo12:_x_p6_l3 ldrb w0, [x0] cmp w0, 0 bne .L130 adrp x0, _x_p6_l2 add x0, x0, :lo12:_x_p6_l2 ldrb w0, [x0] cmp w0, 0 bne .L130 adrp x0, _x_p6_l0 add x0, x0, :lo12:_x_p6_l0 ldrb w0, [x0] cmp w0, 0 bne .L130 adrp x0, _x_p6_l1 add x0, x0, :lo12:_x_p6_l1 ldrb w0, [x0] cmp w0, 0 beq .L131 .L130: adrp x0, _x_p6_l3 add x0, x0, :lo12:_x_p6_l3 ldrb w0, [x0] cmp w0, 0 bne .L129 adrp x0, _x_p6_l2 add x0, x0, :lo12:_x_p6_l2 ldrb w0, [x0] cmp w0, 0 bne .L129 adrp x0, _x_p6_l0 add x0, x0, :lo12:_x_p6_l0 ldrb w0, [x0] cmp w0, 0 beq .L129 adrp x0, _x_p6_l1 add x0, x0, :lo12:_x_p6_l1 ldrb w0, [x0] cmp w0, 0 beq .L129 .L131: adrp x0, p6_c add x0, x0, :lo12:p6_c ldr s1, [x0] adrp x0, _x_p6_c add x0, x0, :lo12:_x_p6_c ldr s0, [x0] fcmp s1, s0 beq .L132 .L129: adrp x0, p6_l3 add x0, x0, :lo12:p6_l3 ldrb w0, [x0] cmp w0, 0 bne .L132 adrp x0, p6_l2 add x0, x0, :lo12:p6_l2 ldrb w0, [x0] cmp w0, 0 bne .L132 adrp x0, p6_l1 add x0, x0, :lo12:p6_l1 ldrb w0, [x0] cmp w0, 0 beq .L132 adrp x0, p6_l0 add x0, x0, :lo12:p6_l0 ldrb w0, [x0] cmp w0, 0 bne .L132 adrp x0, delta add x0, x0, :lo12:delta ldr s0, [x0] fcmp s0, #0.0 bne .L132 adrp x0, p6_evt add x0, x0, :lo12:p6_evt ldrb w0, [x0] cmp w0, 0 bne .L117 .L132: adrp x0, proposed6 add x0, x0, :lo12:proposed6 ldr s1, [x0] adrp x0, _x_proposed6 add x0, x0, :lo12:_x_proposed6 ldr s0, [x0] fcmp s1, s0 bne .L133 adrp x0, v1 add x0, x0, :lo12:v1 ldr w0, [x0] cmp w0, 7 bne .L134 .L133: adrp x0, delta add x0, x0, :lo12:delta ldr s0, [x0] fcmp s0, #0.0 bne .L134 adrp x0, p6_evt add x0, x0, :lo12:p6_evt ldrb w0, [x0] cmp w0, 0 beq .L134 adrp x0, _x_p6_l3 add x0, x0, :lo12:_x_p6_l3 ldrb w0, [x0] cmp w0, 0 bne .L134 adrp x0, _x_p6_l2 add x0, x0, :lo12:_x_p6_l2 ldrb w0, [x0] cmp w0, 0 bne .L134 adrp x0, _x_p6_l0 add x0, x0, :lo12:_x_p6_l0 ldrb w0, [x0] cmp w0, 0 bne .L134 adrp x0, _x_p6_l1 add x0, x0, :lo12:_x_p6_l1 ldrb w0, [x0] cmp w0, 0 bne .L134 adrp x0, p6_l3 add x0, x0, :lo12:p6_l3 ldrb w0, [x0] cmp w0, 0 bne .L134 adrp x0, p6_l2 add x0, x0, :lo12:p6_l2 ldrb w0, [x0] cmp w0, 0 bne .L134 adrp x0, p6_l1 add x0, x0, :lo12:p6_l1 ldrb w0, [x0] cmp w0, 0 beq .L134 adrp x0, p6_l0 add x0, x0, :lo12:p6_l0 ldrb w0, [x0] cmp w0, 0 beq .L117 .L134: adrp x0, v1 add x0, x0, :lo12:v1 ldr w0, [x0] cmp w0, 7 bne .L135 adrp x0, p6_c add x0, x0, :lo12:p6_c ldr s1, [x0] adrp x0, max_prop add x0, x0, :lo12:max_prop ldr s0, [x0] fcmpe s1, s0 cset w0, ls and w0, w0, 255 eor w0, w0, 1 and w0, w0, 255 cmp w0, 0 beq .L135 adrp x0, proposed6 add x0, x0, :lo12:proposed6 ldr s1, [x0] adrp x0, _x_proposed6 add x0, x0, :lo12:_x_proposed6 ldr s0, [x0] fcmpe s1, s0 cset w0, ls and w0, w0, 255 eor w0, w0, 1 and w0, w0, 255 cmp w0, 0 bne .L136 .L135: adrp x0, delta add x0, x0, :lo12:delta ldr s0, [x0] fcmp s0, #0.0 bne .L136 adrp x0, p6_evt add x0, x0, :lo12:p6_evt ldrb w0, [x0] cmp w0, 0 beq .L136 adrp x0, p6_l3 add x0, x0, :lo12:p6_l3 ldrb w0, [x0] cmp w0, 0 bne .L136 adrp x0, p6_l2 add x0, x0, :lo12:p6_l2 ldrb w0, [x0] cmp w0, 0 bne .L136 adrp x0, p6_l1 add x0, x0, :lo12:p6_l1 ldrb w0, [x0] cmp w0, 0 beq .L136 adrp x0, p6_l0 add x0, x0, :lo12:p6_l0 ldrb w0, [x0] cmp w0, 0 bne .L136 adrp x0, _x_p6_l3 add x0, x0, :lo12:_x_p6_l3 ldrb w0, [x0] cmp w0, 0 bne .L136 adrp x0, _x_p6_l2 add x0, x0, :lo12:_x_p6_l2 ldrb w0, [x0] cmp w0, 0 bne .L136 adrp x0, _x_p6_l0 add x0, x0, :lo12:_x_p6_l0 ldrb w0, [x0] cmp w0, 0 beq .L136 adrp x0, _x_p6_l1 add x0, x0, :lo12:_x_p6_l1 ldrb w0, [x0] cmp w0, 0 bne .L117 .L136: adrp x0, v2 add x0, x0, :lo12:v2 ldrb w0, [x0] cmp w0, 0 cset w0, eq and w1, w0, 255 adrp x0, _x_v2 add x0, x0, :lo12:_x_v2 ldrb w0, [x0] cmp w0, 0 cset w0, ne and w0, w0, 255 eor w0, w1, w0 and w0, w0, 255 cmp w0, 0 beq .L137 adrp x0, v1 add x0, x0, :lo12:v1 ldr w1, [x0] adrp x0, _x_v1 add x0, x0, :lo12:_x_v1 ldr w0, [x0] cmp w1, w0 bne .L137 adrp x0, proposed6 add x0, x0, :lo12:proposed6 ldr s1, [x0] adrp x0, _x_proposed6 add x0, x0, :lo12:_x_proposed6 ldr s0, [x0] fcmp s1, s0 bne .L137 adrp x0, _x_p6_l3 add x0, x0, :lo12:_x_p6_l3 ldrb w0, [x0] cmp w0, 0 bne .L138 adrp x0, _x_p6_l2 add x0, x0, :lo12:_x_p6_l2 ldrb w0, [x0] cmp w0, 0 bne .L138 adrp x0, _x_p6_l0 add x0, x0, :lo12:_x_p6_l0 ldrb w0, [x0] cmp w0, 0 bne .L138 adrp x0, _x_p6_l1 add x0, x0, :lo12:_x_p6_l1 ldrb w0, [x0] cmp w0, 0 beq .L139 .L138: adrp x0, _x_p6_l3 add x0, x0, :lo12:_x_p6_l3 ldrb w0, [x0] cmp w0, 0 bne .L137 adrp x0, _x_p6_l2 add x0, x0, :lo12:_x_p6_l2 ldrb w0, [x0] cmp w0, 0 beq .L137 adrp x0, _x_p6_l0 add x0, x0, :lo12:_x_p6_l0 ldrb w0, [x0] cmp w0, 0 bne .L137 adrp x0, _x_p6_l1 add x0, x0, :lo12:_x_p6_l1 ldrb w0, [x0] cmp w0, 0 beq .L139 .L137: adrp x0, p6_l3 add x0, x0, :lo12:p6_l3 ldrb w0, [x0] cmp w0, 0 bne .L139 adrp x0, p6_l2 add x0, x0, :lo12:p6_l2 ldrb w0, [x0] cmp w0, 0 bne .L139 adrp x0, p6_l0 add x0, x0, :lo12:p6_l0 ldrb w0, [x0] cmp w0, 0 beq .L139 adrp x0, p6_l1 add x0, x0, :lo12:p6_l1 ldrb w0, [x0] cmp w0, 0 beq .L139 adrp x0, delta add x0, x0, :lo12:delta ldr s0, [x0] fcmp s0, #0.0 bne .L139 adrp x0, p6_evt add x0, x0, :lo12:p6_evt ldrb w0, [x0] cmp w0, 0 bne .L117 .L139: adrp x0, v2 add x0, x0, :lo12:v2 ldrb w0, [x0] cmp w0, 0 beq .L140 adrp x0, p6_c add x0, x0, :lo12:p6_c ldr s1, [x0] adrp x0, _x_p6_c add x0, x0, :lo12:_x_p6_c ldr s0, [x0] fcmp s1, s0 beq .L141 .L140: adrp x0, delta add x0, x0, :lo12:delta ldr s0, [x0] fcmp s0, #0.0 bne .L141 adrp x0, p6_evt add x0, x0, :lo12:p6_evt ldrb w0, [x0] cmp w0, 0 beq .L141 adrp x0, _x_p6_l3 add x0, x0, :lo12:_x_p6_l3 ldrb w0, [x0] cmp w0, 0 bne .L141 adrp x0, _x_p6_l2 add x0, x0, :lo12:_x_p6_l2 ldrb w0, [x0] cmp w0, 0 bne .L141 adrp x0, _x_p6_l0 add x0, x0, :lo12:_x_p6_l0 ldrb w0, [x0] cmp w0, 0 bne .L141 adrp x0, _x_p6_l1 add x0, x0, :lo12:_x_p6_l1 ldrb w0, [x0] cmp w0, 0 bne .L141 adrp x0, p6_l3 add x0, x0, :lo12:p6_l3 ldrb w0, [x0] cmp w0, 0 bne .L141 adrp x0, p6_l2 add x0, x0, :lo12:p6_l2 ldrb w0, [x0] cmp w0, 0 bne .L141 adrp x0, p6_l0 add x0, x0, :lo12:p6_l0 ldrb w0, [x0] cmp w0, 0 beq .L141 adrp x0, p6_l1 add x0, x0, :lo12:p6_l1 ldrb w0, [x0] cmp w0, 0 bne .L117 .L141: adrp x0, v2 add x0, x0, :lo12:v2 ldrb w0, [x0] cmp w0, 0 bne .L142 adrp x0, _x_p6_c add x0, x0, :lo12:_x_p6_c ldr s0, [x0] fcmp s0, #0.0 beq .L143 .L142: adrp x0, delta add x0, x0, :lo12:delta ldr s0, [x0] fcmp s0, #0.0 bne .L143 adrp x0, p6_evt add x0, x0, :lo12:p6_evt ldrb w0, [x0] cmp w0, 0 beq .L143 adrp x0, p6_l3 add x0, x0, :lo12:p6_l3 ldrb w0, [x0] cmp w0, 0 bne .L143 adrp x0, p6_l2 add x0, x0, :lo12:p6_l2 ldrb w0, [x0] cmp w0, 0 bne .L143 adrp x0, p6_l0 add x0, x0, :lo12:p6_l0 ldrb w0, [x0] cmp w0, 0 beq .L143 adrp x0, p6_l1 add x0, x0, :lo12:p6_l1 ldrb w0, [x0] cmp w0, 0 beq .L143 adrp x0, _x_p6_l3 add x0, x0, :lo12:_x_p6_l3 ldrb w0, [x0] cmp w0, 0 bne .L143 adrp x0, _x_p6_l2 add x0, x0, :lo12:_x_p6_l2 ldrb w0, [x0] cmp w0, 0 beq .L143 adrp x0, _x_p6_l0 add x0, x0, :lo12:_x_p6_l0 ldrb w0, [x0] cmp w0, 0 bne .L143 adrp x0, _x_p6_l1 add x0, x0, :lo12:_x_p6_l1 ldrb w0, [x0] cmp w0, 0 beq .L117 .L143: adrp x0, v1 add x0, x0, :lo12:v1 ldr w1, [x0] adrp x0, _x_v1 add x0, x0, :lo12:_x_v1 ldr w0, [x0] cmp w1, w0 bne .L144 adrp x0, proposed6 add x0, x0, :lo12:proposed6 ldr s1, [x0] adrp x0, _x_proposed6 add x0, x0, :lo12:_x_proposed6 ldr s0, [x0] fcmp s1, s0 bne .L144 adrp x0, _x_p6_c add x0, x0, :lo12:_x_p6_c ldr s0, [x0] fcmp s0, #0.0 bne .L144 adrp x0, _x_v2 add x0, x0, :lo12:_x_v2 ldrb w0, [x0] cmp w0, 0 beq .L144 adrp x0, _x_p6_l3 add x0, x0, :lo12:_x_p6_l3 ldrb w0, [x0] cmp w0, 0 bne .L144 adrp x0, _x_p6_l2 add x0, x0, :lo12:_x_p6_l2 ldrb w0, [x0] cmp w0, 0 beq .L144 adrp x0, _x_p6_l0 add x0, x0, :lo12:_x_p6_l0 ldrb w0, [x0] cmp w0, 0 beq .L144 adrp x0, _x_p6_l1 add x0, x0, :lo12:_x_p6_l1 ldrb w0, [x0] cmp w0, 0 beq .L145 .L144: adrp x0, p6_l3 add x0, x0, :lo12:p6_l3 ldrb w0, [x0] cmp w0, 0 bne .L145 adrp x0, p6_l2 add x0, x0, :lo12:p6_l2 ldrb w0, [x0] cmp w0, 0 beq .L145 adrp x0, p6_l0 add x0, x0, :lo12:p6_l0 ldrb w0, [x0] cmp w0, 0 bne .L145 adrp x0, p6_l1 add x0, x0, :lo12:p6_l1 ldrb w0, [x0] cmp w0, 0 bne .L145 adrp x0, delta add x0, x0, :lo12:delta ldr s0, [x0] fcmp s0, #0.0 bne .L145 adrp x0, p6_evt add x0, x0, :lo12:p6_evt ldrb w0, [x0] cmp w0, 0 bne .L117 .L145: adrp x0, proposed6 add x0, x0, :lo12:proposed6 ldr s1, [x0] adrp x0, _x_proposed6 add x0, x0, :lo12:_x_proposed6 ldr s0, [x0] fcmp s1, s0 bne .L146 adrp x0, v2 add x0, x0, :lo12:v2 ldrb w0, [x0] cmp w0, 0 cset w0, eq and w1, w0, 255 adrp x0, _x_v2 add x0, x0, :lo12:_x_v2 ldrb w0, [x0] cmp w0, 0 cset w0, ne and w0, w0, 255 eor w0, w1, w0 and w0, w0, 255 cmp w0, 0 beq .L146 adrp x0, v1 add x0, x0, :lo12:v1 ldr w1, [x0] adrp x0, _x_v1 add x0, x0, :lo12:_x_v1 ldr w0, [x0] cmp w1, w0 bne .L146 adrp x0, p6_c add x0, x0, :lo12:p6_c ldr s1, [x0] adrp x0, _x_p6_c add x0, x0, :lo12:_x_p6_c ldr s0, [x0] fcmp s1, s0 bne .L146 adrp x0, _x_p6_l3 add x0, x0, :lo12:_x_p6_l3 ldrb w0, [x0] cmp w0, 0 bne .L147 adrp x0, _x_p6_l2 add x0, x0, :lo12:_x_p6_l2 ldrb w0, [x0] cmp w0, 0 bne .L147 adrp x0, _x_p6_l0 add x0, x0, :lo12:_x_p6_l0 ldrb w0, [x0] cmp w0, 0 bne .L147 adrp x0, _x_p6_l1 add x0, x0, :lo12:_x_p6_l1 ldrb w0, [x0] cmp w0, 0 beq .L148 .L147: adrp x0, _x_p6_l3 add x0, x0, :lo12:_x_p6_l3 ldrb w0, [x0] cmp w0, 0 bne .L146 adrp x0, _x_p6_l2 add x0, x0, :lo12:_x_p6_l2 ldrb w0, [x0] cmp w0, 0 beq .L146 adrp x0, _x_p6_l1 add x0, x0, :lo12:_x_p6_l1 ldrb w0, [x0] cmp w0, 0 beq .L146 adrp x0, _x_p6_l0 add x0, x0, :lo12:_x_p6_l0 ldrb w0, [x0] cmp w0, 0 beq .L148 .L146: adrp x0, p6_l3 add x0, x0, :lo12:p6_l3 ldrb w0, [x0] cmp w0, 0 bne .L148 adrp x0, p6_l2 add x0, x0, :lo12:p6_l2 ldrb w0, [x0] cmp w0, 0 beq .L148 adrp x0, p6_l0 add x0, x0, :lo12:p6_l0 ldrb w0, [x0] cmp w0, 0 beq .L148 adrp x0, p6_l1 add x0, x0, :lo12:p6_l1 ldrb w0, [x0] cmp w0, 0 bne .L148 adrp x0, delta add x0, x0, :lo12:delta ldr s0, [x0] fcmp s0, #0.0 bne .L148 adrp x0, p6_evt add x0, x0, :lo12:p6_evt ldrb w0, [x0] cmp w0, 0 bne .L117 .L148: adrp x0, v1 add x0, x0, :lo12:v1 ldr w0, [x0] cmp w0, 7 bne .L149 adrp x0, delta add x0, x0, :lo12:delta ldr s0, [x0] fcmp s0, #0.0 bne .L149 adrp x0, p6_evt add x0, x0, :lo12:p6_evt ldrb w0, [x0] cmp w0, 0 beq .L149 adrp x0, _x_p6_l3 add x0, x0, :lo12:_x_p6_l3 ldrb w0, [x0] cmp w0, 0 bne .L149 adrp x0, _x_p6_l2 add x0, x0, :lo12:_x_p6_l2 ldrb w0, [x0] cmp w0, 0 bne .L149 adrp x0, _x_p6_l0 add x0, x0, :lo12:_x_p6_l0 ldrb w0, [x0] cmp w0, 0 bne .L149 adrp x0, _x_p6_l1 add x0, x0, :lo12:_x_p6_l1 ldrb w0, [x0] cmp w0, 0 bne .L149 adrp x0, p6_l3 add x0, x0, :lo12:p6_l3 ldrb w0, [x0] cmp w0, 0 bne .L149 adrp x0, p6_l2 add x0, x0, :lo12:p6_l2 ldrb w0, [x0] cmp w0, 0 beq .L149 adrp x0, p6_l0 add x0, x0, :lo12:p6_l0 ldrb w0, [x0] cmp w0, 0 beq .L149 adrp x0, p6_l1 add x0, x0, :lo12:p6_l1 ldrb w0, [x0] cmp w0, 0 beq .L117 .L149: adrp x0, v1 add x0, x0, :lo12:v1 ldr w0, [x0] cmp w0, 7 beq .L150 adrp x0, delta add x0, x0, :lo12:delta ldr s0, [x0] fcmp s0, #0.0 bne .L150 adrp x0, p6_evt add x0, x0, :lo12:p6_evt ldrb w0, [x0] cmp w0, 0 beq .L150 adrp x0, p6_l3 add x0, x0, :lo12:p6_l3 ldrb w0, [x0] cmp w0, 0 bne .L150 adrp x0, p6_l2 add x0, x0, :lo12:p6_l2 ldrb w0, [x0] cmp w0, 0 beq .L150 adrp x0, p6_l0 add x0, x0, :lo12:p6_l0 ldrb w0, [x0] cmp w0, 0 beq .L150 adrp x0, p6_l1 add x0, x0, :lo12:p6_l1 ldrb w0, [x0] cmp w0, 0 bne .L150 adrp x0, _x_p6_l3 add x0, x0, :lo12:_x_p6_l3 ldrb w0, [x0] cmp w0, 0 bne .L150 adrp x0, _x_p6_l2 add x0, x0, :lo12:_x_p6_l2 ldrb w0, [x0] cmp w0, 0 beq .L150 adrp x0, _x_p6_l1 add x0, x0, :lo12:_x_p6_l1 ldrb w0, [x0] cmp w0, 0 beq .L150 adrp x0, _x_p6_l0 add x0, x0, :lo12:_x_p6_l0 ldrb w0, [x0] cmp w0, 0 beq .L117 .L150: adrp x0, proposed6 add x0, x0, :lo12:proposed6 ldr s1, [x0] adrp x0, _x_proposed6 add x0, x0, :lo12:_x_proposed6 ldr s0, [x0] fcmp s1, s0 bne .L151 adrp x0, v2 add x0, x0, :lo12:v2 ldrb w0, [x0] cmp w0, 0 cset w0, eq and w1, w0, 255 adrp x0, _x_v2 add x0, x0, :lo12:_x_v2 ldrb w0, [x0] cmp w0, 0 cset w0, ne and w0, w0, 255 eor w0, w1, w0 and w0, w0, 255 cmp w0, 0 beq .L151 adrp x0, v1 add x0, x0, :lo12:v1 ldr w1, [x0] adrp x0, _x_v1 add x0, x0, :lo12:_x_v1 ldr w0, [x0] cmp w1, w0 bne .L151 adrp x0, _x_p6_l3 add x0, x0, :lo12:_x_p6_l3 ldrb w0, [x0] cmp w0, 0 bne .L151 adrp x0, _x_p6_l2 add x0, x0, :lo12:_x_p6_l2 ldrb w0, [x0] cmp w0, 0 beq .L151 adrp x0, _x_p6_l0 add x0, x0, :lo12:_x_p6_l0 ldrb w0, [x0] cmp w0, 0 beq .L151 adrp x0, _x_p6_l1 add x0, x0, :lo12:_x_p6_l1 ldrb w0, [x0] cmp w0, 0 beq .L151 adrp x0, _x_p6_c add x0, x0, :lo12:_x_p6_c ldr s0, [x0] fcmp s0, #0.0 beq .L152 .L151: adrp x0, p6_l3 add x0, x0, :lo12:p6_l3 ldrb w0, [x0] cmp w0, 0 bne .L152 adrp x0, p6_l2 add x0, x0, :lo12:p6_l2 ldrb w0, [x0] cmp w0, 0 beq .L152 adrp x0, p6_l1 add x0, x0, :lo12:p6_l1 ldrb w0, [x0] cmp w0, 0 beq .L152 adrp x0, p6_l0 add x0, x0, :lo12:p6_l0 ldrb w0, [x0] cmp w0, 0 bne .L152 adrp x0, delta add x0, x0, :lo12:delta ldr s0, [x0] fcmp s0, #0.0 bne .L152 adrp x0, p6_evt add x0, x0, :lo12:p6_evt ldrb w0, [x0] cmp w0, 0 bne .L117 .L152: adrp x0, proposed6 add x0, x0, :lo12:proposed6 ldr s1, [x0] adrp x0, _x_proposed6 add x0, x0, :lo12:_x_proposed6 ldr s0, [x0] fcmp s1, s0 bne .L153 adrp x0, _x_v2 add x0, x0, :lo12:_x_v2 ldrb w0, [x0] cmp w0, 0 bne .L153 adrp x0, _x_p6_l3 add x0, x0, :lo12:_x_p6_l3 ldrb w0, [x0] cmp w0, 0 beq .L153 adrp x0, _x_p6_l2 add x0, x0, :lo12:_x_p6_l2 ldrb w0, [x0] cmp w0, 0 bne .L153 adrp x0, _x_p6_l0 add x0, x0, :lo12:_x_p6_l0 ldrb w0, [x0] cmp w0, 0 bne .L153 adrp x0, _x_p6_l1 add x0, x0, :lo12:_x_p6_l1 ldrb w0, [x0] cmp w0, 0 bne .L153 adrp x0, v1 add x0, x0, :lo12:v1 ldr w1, [x0] adrp x0, _x_v1 add x0, x0, :lo12:_x_v1 ldr w0, [x0] cmp w1, w0 bne .L153 adrp x0, _x_p6_c add x0, x0, :lo12:_x_p6_c ldr s0, [x0] fcmp s0, #0.0 beq .L154 .L153: adrp x0, p6_l3 add x0, x0, :lo12:p6_l3 ldrb w0, [x0] cmp w0, 0 bne .L154 adrp x0, p6_l2 add x0, x0, :lo12:p6_l2 ldrb w0, [x0] cmp w0, 0 beq .L154 adrp x0, p6_l0 add x0, x0, :lo12:p6_l0 ldrb w0, [x0] cmp w0, 0 beq .L154 adrp x0, p6_l1 add x0, x0, :lo12:p6_l1 ldrb w0, [x0] cmp w0, 0 beq .L154 adrp x0, delta add x0, x0, :lo12:delta ldr s0, [x0] fcmp s0, #0.0 bne .L154 adrp x0, p6_evt add x0, x0, :lo12:p6_evt ldrb w0, [x0] cmp w0, 0 bne .L117 .L154: adrp x0, proposed6 add x0, x0, :lo12:proposed6 ldr s1, [x0] adrp x0, _x_proposed6 add x0, x0, :lo12:_x_proposed6 ldr s0, [x0] fcmp s1, s0 bne .L155 adrp x0, _x_v1 add x0, x0, :lo12:_x_v1 ldr w0, [x0] cmp w0, 0 bne .L155 adrp x0, _x_p6_l3 add x0, x0, :lo12:_x_p6_l3 ldrb w0, [x0] cmp w0, 0 bne .L155 adrp x0, _x_p6_l2 add x0, x0, :lo12:_x_p6_l2 ldrb w0, [x0] cmp w0, 0 bne .L155 adrp x0, _x_p6_l0 add x0, x0, :lo12:_x_p6_l0 ldrb w0, [x0] cmp w0, 0 bne .L155 adrp x0, _x_p6_l1 add x0, x0, :lo12:_x_p6_l1 ldrb w0, [x0] cmp w0, 0 bne .L155 adrp x0, v2 add x0, x0, :lo12:v2 ldrb w0, [x0] cmp w0, 0 cset w0, eq and w1, w0, 255 adrp x0, _x_v2 add x0, x0, :lo12:_x_v2 ldrb w0, [x0] cmp w0, 0 cset w0, ne and w0, w0, 255 eor w0, w1, w0 and w0, w0, 255 cmp w0, 0 beq .L155 adrp x0, p6_c add x0, x0, :lo12:p6_c ldr s1, [x0] adrp x0, _x_p6_c add x0, x0, :lo12:_x_p6_c ldr s0, [x0] fcmp s1, s0 beq .L156 .L155: adrp x0, p6_l3 add x0, x0, :lo12:p6_l3 ldrb w0, [x0] cmp w0, 0 beq .L156 adrp x0, p6_l2 add x0, x0, :lo12:p6_l2 ldrb w0, [x0] cmp w0, 0 bne .L156 adrp x0, p6_l0 add x0, x0, :lo12:p6_l0 ldrb w0, [x0] cmp w0, 0 bne .L156 adrp x0, p6_l1 add x0, x0, :lo12:p6_l1 ldrb w0, [x0] cmp w0, 0 bne .L156 adrp x0, delta add x0, x0, :lo12:delta ldr s0, [x0] fcmp s0, #0.0 bne .L156 adrp x0, p6_evt add x0, x0, :lo12:p6_evt ldrb w0, [x0] cmp w0, 0 bne .L117 .L156: adrp x0, _x_p5_l3 add x0, x0, :lo12:_x_p5_l3 ldrb w0, [x0] cmp w0, 0 beq .L157 adrp x0, _x_p5_l2 add x0, x0, :lo12:_x_p5_l2 ldrb w0, [x0] cmp w0, 0 bne .L157 adrp x0, _x_p5_l0 add x0, x0, :lo12:_x_p5_l0 ldrb w0, [x0] cmp w0, 0 bne .L157 adrp x0, _x_p5_l1 add x0, x0, :lo12:_x_p5_l1 ldrb w0, [x0] cmp w0, 0 beq .L158 .L157: adrp x0, _x_p5_l3 add x0, x0, :lo12:_x_p5_l3 ldrb w0, [x0] cmp w0, 0 bne .L159 adrp x0, _x_p5_l2 add x0, x0, :lo12:_x_p5_l2 ldrb w0, [x0] cmp w0, 0 beq .L159 adrp x0, _x_p5_l0 add x0, x0, :lo12:_x_p5_l0 ldrb w0, [x0] cmp w0, 0 beq .L159 adrp x0, _x_p5_l1 add x0, x0, :lo12:_x_p5_l1 ldrb w0, [x0] cmp w0, 0 bne .L158 .L159: adrp x0, _x_p5_l3 add x0, x0, :lo12:_x_p5_l3 ldrb w0, [x0] cmp w0, 0 bne .L160 adrp x0, _x_p5_l2 add x0, x0, :lo12:_x_p5_l2 ldrb w0, [x0] cmp w0, 0 beq .L160 adrp x0, _x_p5_l1 add x0, x0, :lo12:_x_p5_l1 ldrb w0, [x0] cmp w0, 0 beq .L160 adrp x0, _x_p5_l0 add x0, x0, :lo12:_x_p5_l0 ldrb w0, [x0] cmp w0, 0 beq .L158 .L160: adrp x0, _x_p5_l3 add x0, x0, :lo12:_x_p5_l3 ldrb w0, [x0] cmp w0, 0 bne .L161 adrp x0, _x_p5_l2 add x0, x0, :lo12:_x_p5_l2 ldrb w0, [x0] cmp w0, 0 beq .L161 adrp x0, _x_p5_l0 add x0, x0, :lo12:_x_p5_l0 ldrb w0, [x0] cmp w0, 0 beq .L161 adrp x0, _x_p5_l1 add x0, x0, :lo12:_x_p5_l1 ldrb w0, [x0] cmp w0, 0 beq .L158 .L161: adrp x0, _x_p5_l3 add x0, x0, :lo12:_x_p5_l3 ldrb w0, [x0] cmp w0, 0 bne .L162 adrp x0, _x_p5_l2 add x0, x0, :lo12:_x_p5_l2 ldrb w0, [x0] cmp w0, 0 beq .L162 adrp x0, _x_p5_l0 add x0, x0, :lo12:_x_p5_l0 ldrb w0, [x0] cmp w0, 0 bne .L162 adrp x0, _x_p5_l1 add x0, x0, :lo12:_x_p5_l1 ldrb w0, [x0] cmp w0, 0 beq .L158 .L162: adrp x0, _x_p5_l3 add x0, x0, :lo12:_x_p5_l3 ldrb w0, [x0] cmp w0, 0 bne .L163 adrp x0, _x_p5_l2 add x0, x0, :lo12:_x_p5_l2 ldrb w0, [x0] cmp w0, 0 bne .L163 adrp x0, _x_p5_l0 add x0, x0, :lo12:_x_p5_l0 ldrb w0, [x0] cmp w0, 0 beq .L163 adrp x0, _x_p5_l1 add x0, x0, :lo12:_x_p5_l1 ldrb w0, [x0] cmp w0, 0 bne .L158 .L163: adrp x0, _x_p5_l3 add x0, x0, :lo12:_x_p5_l3 ldrb w0, [x0] cmp w0, 0 bne .L164 adrp x0, _x_p5_l2 add x0, x0, :lo12:_x_p5_l2 ldrb w0, [x0] cmp w0, 0 bne .L164 adrp x0, _x_p5_l1 add x0, x0, :lo12:_x_p5_l1 ldrb w0, [x0] cmp w0, 0 beq .L164 adrp x0, _x_p5_l0 add x0, x0, :lo12:_x_p5_l0 ldrb w0, [x0] cmp w0, 0 beq .L158 .L164: adrp x0, _x_p5_l3 add x0, x0, :lo12:_x_p5_l3 ldrb w0, [x0] cmp w0, 0 bne .L165 adrp x0, _x_p5_l2 add x0, x0, :lo12:_x_p5_l2 ldrb w0, [x0] cmp w0, 0 bne .L165 adrp x0, _x_p5_l0 add x0, x0, :lo12:_x_p5_l0 ldrb w0, [x0] cmp w0, 0 bne .L165 adrp x0, _x_p5_l1 add x0, x0, :lo12:_x_p5_l1 ldrb w0, [x0] cmp w0, 0 beq .L158 .L165: adrp x0, _x_p5_l3 add x0, x0, :lo12:_x_p5_l3 ldrb w0, [x0] cmp w0, 0 bne .L117 adrp x0, _x_p5_l2 add x0, x0, :lo12:_x_p5_l2 ldrb w0, [x0] cmp w0, 0 bne .L117 adrp x0, _x_p5_l0 add x0, x0, :lo12:_x_p5_l0 ldrb w0, [x0] cmp w0, 0 beq .L117 adrp x0, _x_p5_l1 add x0, x0, :lo12:_x_p5_l1 ldrb w0, [x0] cmp w0, 0 bne .L117 .L158: adrp x0, _x_p5_c add x0, x0, :lo12:_x_p5_c ldr s1, [x0] adrp x0, _x_proposed5 add x0, x0, :lo12:_x_proposed5 ldr s0, [x0] fcmpe s1, s0 bls .L166 adrp x0, _x_p5_l3 add x0, x0, :lo12:_x_p5_l3 ldrb w0, [x0] cmp w0, 0 bne .L167 adrp x0, _x_p5_l2 add x0, x0, :lo12:_x_p5_l2 ldrb w0, [x0] cmp w0, 0 bne .L167 adrp x0, _x_p5_l0 add x0, x0, :lo12:_x_p5_l0 ldrb w0, [x0] cmp w0, 0 beq .L167 adrp x0, _x_p5_l1 add x0, x0, :lo12:_x_p5_l1 ldrb w0, [x0] cmp w0, 0 beq .L117 .L167: adrp x0, _x_p5_l3 add x0, x0, :lo12:_x_p5_l3 ldrb w0, [x0] cmp w0, 0 bne .L168 adrp x0, _x_p5_l2 add x0, x0, :lo12:_x_p5_l2 ldrb w0, [x0] cmp w0, 0 beq .L168 adrp x0, _x_p5_l0 add x0, x0, :lo12:_x_p5_l0 ldrb w0, [x0] cmp w0, 0 bne .L168 adrp x0, _x_p5_l1 add x0, x0, :lo12:_x_p5_l1 ldrb w0, [x0] cmp w0, 0 beq .L117 .L168: adrp x0, _x_p5_l3 add x0, x0, :lo12:_x_p5_l3 ldrb w0, [x0] cmp w0, 0 bne .L169 adrp x0, _x_p5_l2 add x0, x0, :lo12:_x_p5_l2 ldrb w0, [x0] cmp w0, 0 beq .L169 adrp x0, _x_p5_l0 add x0, x0, :lo12:_x_p5_l0 ldrb w0, [x0] cmp w0, 0 beq .L169 adrp x0, _x_p5_l1 add x0, x0, :lo12:_x_p5_l1 ldrb w0, [x0] cmp w0, 0 bne .L117 .L169: adrp x0, _x_p5_l3 add x0, x0, :lo12:_x_p5_l3 ldrb w0, [x0] cmp w0, 0 beq .L166 adrp x0, _x_p5_l2 add x0, x0, :lo12:_x_p5_l2 ldrb w0, [x0] cmp w0, 0 bne .L166 adrp x0, _x_p5_l0 add x0, x0, :lo12:_x_p5_l0 ldrb w0, [x0] cmp w0, 0 bne .L166 adrp x0, _x_p5_l1 add x0, x0, :lo12:_x_p5_l1 ldrb w0, [x0] cmp w0, 0 beq .L117 .L166: adrp x0, p5_l0 add x0, x0, :lo12:p5_l0 ldrb w0, [x0] cmp w0, 0 cset w0, eq and w1, w0, 255 adrp x0, _x_p5_l0 add x0, x0, :lo12:_x_p5_l0 ldrb w0, [x0] cmp w0, 0 cset w0, ne and w0, w0, 255 eor w0, w1, w0 and w0, w0, 255 cmp w0, 0 beq .L170 adrp x0, p5_l1 add x0, x0, :lo12:p5_l1 ldrb w0, [x0] cmp w0, 0 cset w0, eq and w1, w0, 255 adrp x0, _x_p5_l1 add x0, x0, :lo12:_x_p5_l1 ldrb w0, [x0] cmp w0, 0 cset w0, ne and w0, w0, 255 eor w0, w1, w0 and w0, w0, 255 cmp w0, 0 beq .L170 adrp x0, p5_l2 add x0, x0, :lo12:p5_l2 ldrb w0, [x0] cmp w0, 0 cset w0, eq and w1, w0, 255 adrp x0, _x_p5_l2 add x0, x0, :lo12:_x_p5_l2 ldrb w0, [x0] cmp w0, 0 cset w0, ne and w0, w0, 255 eor w0, w1, w0 and w0, w0, 255 cmp w0, 0 beq .L170 adrp x0, p5_l3 add x0, x0, :lo12:p5_l3 ldrb w0, [x0] cmp w0, 0 cset w0, eq and w1, w0, 255 adrp x0, _x_p5_l3 add x0, x0, :lo12:_x_p5_l3 ldrb w0, [x0] cmp w0, 0 cset w0, ne and w0, w0, 255 eor w0, w1, w0 and w0, w0, 255 cmp w0, 0 beq .L170 adrp x0, delta add x0, x0, :lo12:delta ldr s0, [x0] fcvt d1, s0 adrp x0, p5_c add x0, x0, :lo12:p5_c ldr s0, [x0] fcvt d2, s0 adrp x0, _x_p5_c add x0, x0, :lo12:_x_p5_c ldr s0, [x0] fcvt d0, s0 fsub d0, d2, d0 fadd d0, d1, d0 fcmp d0, #0.0 bne .L170 adrp x0, proposed5 add x0, x0, :lo12:proposed5 ldr s1, [x0] adrp x0, _x_proposed5 add x0, x0, :lo12:_x_proposed5 ldr s0, [x0] fcmp s1, s0 beq .L171 .L170: adrp x0, delta add x0, x0, :lo12:delta ldr s0, [x0] fcmpe s0, #0.0 bls .L471 b .L117 .L471: adrp x0, p5_evt add x0, x0, :lo12:p5_evt ldrb w0, [x0] cmp w0, 0 beq .L117 .L171: adrp x0, v1 add x0, x0, :lo12:v1 ldr w0, [x0] cmp w0, 0 bne .L173 adrp x0, _x_p5_l3 add x0, x0, :lo12:_x_p5_l3 ldrb w0, [x0] cmp w0, 0 bne .L173 adrp x0, _x_p5_l2 add x0, x0, :lo12:_x_p5_l2 ldrb w0, [x0] cmp w0, 0 bne .L173 adrp x0, _x_p5_l0 add x0, x0, :lo12:_x_p5_l0 ldrb w0, [x0] cmp w0, 0 beq .L173 adrp x0, _x_p5_l1 add x0, x0, :lo12:_x_p5_l1 ldrb w0, [x0] cmp w0, 0 bne .L173 adrp x0, v2 add x0, x0, :lo12:v2 ldrb w0, [x0] cmp w0, 0 cset w0, eq and w1, w0, 255 adrp x0, _x_v2 add x0, x0, :lo12:_x_v2 ldrb w0, [x0] cmp w0, 0 cset w0, ne and w0, w0, 255 eor w0, w1, w0 and w0, w0, 255 cmp w0, 0 beq .L173 adrp x0, _x_p5_c add x0, x0, :lo12:_x_p5_c ldr s0, [x0] fcmp s0, #0.0 bne .L173 adrp x0, v1 add x0, x0, :lo12:v1 ldr w1, [x0] adrp x0, _x_v1 add x0, x0, :lo12:_x_v1 ldr w0, [x0] cmp w1, w0 bne .L173 adrp x0, proposed5 add x0, x0, :lo12:proposed5 ldr s1, [x0] adrp x0, _x_proposed5 add x0, x0, :lo12:_x_proposed5 ldr s0, [x0] fcmp s1, s0 beq .L174 .L173: adrp x0, p5_l3 add x0, x0, :lo12:p5_l3 ldrb w0, [x0] cmp w0, 0 bne .L174 adrp x0, p5_l2 add x0, x0, :lo12:p5_l2 ldrb w0, [x0] cmp w0, 0 bne .L174 adrp x0, p5_l0 add x0, x0, :lo12:p5_l0 ldrb w0, [x0] cmp w0, 0 bne .L174 adrp x0, p5_l1 add x0, x0, :lo12:p5_l1 ldrb w0, [x0] cmp w0, 0 bne .L174 adrp x0, delta add x0, x0, :lo12:delta ldr s0, [x0] fcmp s0, #0.0 bne .L174 adrp x0, p5_evt add x0, x0, :lo12:p5_evt ldrb w0, [x0] cmp w0, 0 bne .L117 .L174: adrp x0, proposed5 add x0, x0, :lo12:proposed5 ldr s1, [x0] adrp x0, _x_proposed5 add x0, x0, :lo12:_x_proposed5 ldr s0, [x0] fcmp s1, s0 bne .L175 adrp x0, v2 add x0, x0, :lo12:v2 ldrb w0, [x0] cmp w0, 0 cset w0, eq and w1, w0, 255 adrp x0, _x_v2 add x0, x0, :lo12:_x_v2 ldrb w0, [x0] cmp w0, 0 cset w0, ne and w0, w0, 255 eor w0, w1, w0 and w0, w0, 255 cmp w0, 0 beq .L175 adrp x0, _x_p5_c add x0, x0, :lo12:_x_p5_c ldr s0, [x0] fcmp s0, #0.0 bne .L175 adrp x0, _x_p5_l3 add x0, x0, :lo12:_x_p5_l3 ldrb w0, [x0] cmp w0, 0 bne .L175 adrp x0, _x_p5_l2 add x0, x0, :lo12:_x_p5_l2 ldrb w0, [x0] cmp w0, 0 bne .L175 adrp x0, _x_p5_l1 add x0, x0, :lo12:_x_p5_l1 ldrb w0, [x0] cmp w0, 0 beq .L175 adrp x0, _x_p5_l0 add x0, x0, :lo12:_x_p5_l0 ldrb w0, [x0] cmp w0, 0 bne .L175 adrp x0, _x_v1 add x0, x0, :lo12:_x_v1 ldr w0, [x0] cmp w0, 6 beq .L176 .L175: adrp x0, p5_l3 add x0, x0, :lo12:p5_l3 ldrb w0, [x0] cmp w0, 0 bne .L176 adrp x0, p5_l2 add x0, x0, :lo12:p5_l2 ldrb w0, [x0] cmp w0, 0 bne .L176 adrp x0, p5_l0 add x0, x0, :lo12:p5_l0 ldrb w0, [x0] cmp w0, 0 beq .L176 adrp x0, p5_l1 add x0, x0, :lo12:p5_l1 ldrb w0, [x0] cmp w0, 0 bne .L176 adrp x0, delta add x0, x0, :lo12:delta ldr s0, [x0] fcmp s0, #0.0 bne .L176 adrp x0, p5_evt add x0, x0, :lo12:p5_evt ldrb w0, [x0] cmp w0, 0 bne .L117 .L176: adrp x0, v2 add x0, x0, :lo12:v2 ldrb w0, [x0] cmp w0, 0 cset w0, eq and w1, w0, 255 adrp x0, _x_v2 add x0, x0, :lo12:_x_v2 ldrb w0, [x0] cmp w0, 0 cset w0, ne and w0, w0, 255 eor w0, w1, w0 and w0, w0, 255 cmp w0, 0 beq .L177 adrp x0, v1 add x0, x0, :lo12:v1 ldr w1, [x0] adrp x0, _x_v1 add x0, x0, :lo12:_x_v1 ldr w0, [x0] cmp w1, w0 bne .L177 adrp x0, _x_p5_l3 add x0, x0, :lo12:_x_p5_l3 ldrb w0, [x0] cmp w0, 0 bne .L178 adrp x0, _x_p5_l2 add x0, x0, :lo12:_x_p5_l2 ldrb w0, [x0] cmp w0, 0 bne .L178 adrp x0, _x_p5_l0 add x0, x0, :lo12:_x_p5_l0 ldrb w0, [x0] cmp w0, 0 bne .L178 adrp x0, _x_p5_l1 add x0, x0, :lo12:_x_p5_l1 ldrb w0, [x0] cmp w0, 0 beq .L179 .L178: adrp x0, _x_p5_l3 add x0, x0, :lo12:_x_p5_l3 ldrb w0, [x0] cmp w0, 0 bne .L177 adrp x0, _x_p5_l2 add x0, x0, :lo12:_x_p5_l2 ldrb w0, [x0] cmp w0, 0 bne .L177 adrp x0, _x_p5_l0 add x0, x0, :lo12:_x_p5_l0 ldrb w0, [x0] cmp w0, 0 beq .L177 adrp x0, _x_p5_l1 add x0, x0, :lo12:_x_p5_l1 ldrb w0, [x0] cmp w0, 0 beq .L177 .L179: adrp x0, p5_c add x0, x0, :lo12:p5_c ldr s1, [x0] adrp x0, _x_p5_c add x0, x0, :lo12:_x_p5_c ldr s0, [x0] fcmp s1, s0 beq .L180 .L177: adrp x0, p5_l3 add x0, x0, :lo12:p5_l3 ldrb w0, [x0] cmp w0, 0 bne .L180 adrp x0, p5_l2 add x0, x0, :lo12:p5_l2 ldrb w0, [x0] cmp w0, 0 bne .L180 adrp x0, p5_l1 add x0, x0, :lo12:p5_l1 ldrb w0, [x0] cmp w0, 0 beq .L180 adrp x0, p5_l0 add x0, x0, :lo12:p5_l0 ldrb w0, [x0] cmp w0, 0 bne .L180 adrp x0, delta add x0, x0, :lo12:delta ldr s0, [x0] fcmp s0, #0.0 bne .L180 adrp x0, p5_evt add x0, x0, :lo12:p5_evt ldrb w0, [x0] cmp w0, 0 bne .L117 .L180: adrp x0, proposed5 add x0, x0, :lo12:proposed5 ldr s1, [x0] adrp x0, _x_proposed5 add x0, x0, :lo12:_x_proposed5 ldr s0, [x0] fcmp s1, s0 bne .L181 adrp x0, v1 add x0, x0, :lo12:v1 ldr w0, [x0] cmp w0, 6 bne .L182 .L181: adrp x0, delta add x0, x0, :lo12:delta ldr s0, [x0] fcmp s0, #0.0 bne .L182 adrp x0, p5_evt add x0, x0, :lo12:p5_evt ldrb w0, [x0] cmp w0, 0 beq .L182 adrp x0, _x_p5_l3 add x0, x0, :lo12:_x_p5_l3 ldrb w0, [x0] cmp w0, 0 bne .L182 adrp x0, _x_p5_l2 add x0, x0, :lo12:_x_p5_l2 ldrb w0, [x0] cmp w0, 0 bne .L182 adrp x0, _x_p5_l0 add x0, x0, :lo12:_x_p5_l0 ldrb w0, [x0] cmp w0, 0 bne .L182 adrp x0, _x_p5_l1 add x0, x0, :lo12:_x_p5_l1 ldrb w0, [x0] cmp w0, 0 bne .L182 adrp x0, p5_l3 add x0, x0, :lo12:p5_l3 ldrb w0, [x0] cmp w0, 0 bne .L182 adrp x0, p5_l2 add x0, x0, :lo12:p5_l2 ldrb w0, [x0] cmp w0, 0 bne .L182 adrp x0, p5_l1 add x0, x0, :lo12:p5_l1 ldrb w0, [x0] cmp w0, 0 beq .L182 adrp x0, p5_l0 add x0, x0, :lo12:p5_l0 ldrb w0, [x0] cmp w0, 0 beq .L117 .L182: adrp x0, v1 add x0, x0, :lo12:v1 ldr w0, [x0] cmp w0, 6 bne .L183 adrp x0, p5_c add x0, x0, :lo12:p5_c ldr s1, [x0] adrp x0, max_prop add x0, x0, :lo12:max_prop ldr s0, [x0] fcmpe s1, s0 cset w0, ls and w0, w0, 255 eor w0, w0, 1 and w0, w0, 255 cmp w0, 0 beq .L183 adrp x0, proposed5 add x0, x0, :lo12:proposed5 ldr s1, [x0] adrp x0, _x_proposed5 add x0, x0, :lo12:_x_proposed5 ldr s0, [x0] fcmpe s1, s0 cset w0, ls and w0, w0, 255 eor w0, w0, 1 and w0, w0, 255 cmp w0, 0 bne .L184 .L183: adrp x0, delta add x0, x0, :lo12:delta ldr s0, [x0] fcmp s0, #0.0 bne .L184 adrp x0, p5_evt add x0, x0, :lo12:p5_evt ldrb w0, [x0] cmp w0, 0 beq .L184 adrp x0, p5_l3 add x0, x0, :lo12:p5_l3 ldrb w0, [x0] cmp w0, 0 bne .L184 adrp x0, p5_l2 add x0, x0, :lo12:p5_l2 ldrb w0, [x0] cmp w0, 0 bne .L184 adrp x0, p5_l1 add x0, x0, :lo12:p5_l1 ldrb w0, [x0] cmp w0, 0 beq .L184 adrp x0, p5_l0 add x0, x0, :lo12:p5_l0 ldrb w0, [x0] cmp w0, 0 bne .L184 adrp x0, _x_p5_l3 add x0, x0, :lo12:_x_p5_l3 ldrb w0, [x0] cmp w0, 0 bne .L184 adrp x0, _x_p5_l2 add x0, x0, :lo12:_x_p5_l2 ldrb w0, [x0] cmp w0, 0 bne .L184 adrp x0, _x_p5_l0 add x0, x0, :lo12:_x_p5_l0 ldrb w0, [x0] cmp w0, 0 beq .L184 adrp x0, _x_p5_l1 add x0, x0, :lo12:_x_p5_l1 ldrb w0, [x0] cmp w0, 0 bne .L117 .L184: adrp x0, v2 add x0, x0, :lo12:v2 ldrb w0, [x0] cmp w0, 0 cset w0, eq and w1, w0, 255 adrp x0, _x_v2 add x0, x0, :lo12:_x_v2 ldrb w0, [x0] cmp w0, 0 cset w0, ne and w0, w0, 255 eor w0, w1, w0 and w0, w0, 255 cmp w0, 0 beq .L185 adrp x0, v1 add x0, x0, :lo12:v1 ldr w1, [x0] adrp x0, _x_v1 add x0, x0, :lo12:_x_v1 ldr w0, [x0] cmp w1, w0 bne .L185 adrp x0, proposed5 add x0, x0, :lo12:proposed5 ldr s1, [x0] adrp x0, _x_proposed5 add x0, x0, :lo12:_x_proposed5 ldr s0, [x0] fcmp s1, s0 bne .L185 adrp x0, _x_p5_l3 add x0, x0, :lo12:_x_p5_l3 ldrb w0, [x0] cmp w0, 0 bne .L186 adrp x0, _x_p5_l2 add x0, x0, :lo12:_x_p5_l2 ldrb w0, [x0] cmp w0, 0 bne .L186 adrp x0, _x_p5_l0 add x0, x0, :lo12:_x_p5_l0 ldrb w0, [x0] cmp w0, 0 bne .L186 adrp x0, _x_p5_l1 add x0, x0, :lo12:_x_p5_l1 ldrb w0, [x0] cmp w0, 0 beq .L187 .L186: adrp x0, _x_p5_l3 add x0, x0, :lo12:_x_p5_l3 ldrb w0, [x0] cmp w0, 0 bne .L185 adrp x0, _x_p5_l2 add x0, x0, :lo12:_x_p5_l2 ldrb w0, [x0] cmp w0, 0 beq .L185 adrp x0, _x_p5_l0 add x0, x0, :lo12:_x_p5_l0 ldrb w0, [x0] cmp w0, 0 bne .L185 adrp x0, _x_p5_l1 add x0, x0, :lo12:_x_p5_l1 ldrb w0, [x0] cmp w0, 0 beq .L187 .L185: adrp x0, p5_l3 add x0, x0, :lo12:p5_l3 ldrb w0, [x0] cmp w0, 0 bne .L187 adrp x0, p5_l2 add x0, x0, :lo12:p5_l2 ldrb w0, [x0] cmp w0, 0 bne .L187 adrp x0, p5_l0 add x0, x0, :lo12:p5_l0 ldrb w0, [x0] cmp w0, 0 beq .L187 adrp x0, p5_l1 add x0, x0, :lo12:p5_l1 ldrb w0, [x0] cmp w0, 0 beq .L187 adrp x0, delta add x0, x0, :lo12:delta ldr s0, [x0] fcmp s0, #0.0 bne .L187 adrp x0, p5_evt add x0, x0, :lo12:p5_evt ldrb w0, [x0] cmp w0, 0 bne .L117 .L187: adrp x0, v2 add x0, x0, :lo12:v2 ldrb w0, [x0] cmp w0, 0 beq .L188 adrp x0, p5_c add x0, x0, :lo12:p5_c ldr s1, [x0] adrp x0, _x_p5_c add x0, x0, :lo12:_x_p5_c ldr s0, [x0] fcmp s1, s0 beq .L189 .L188: adrp x0, delta add x0, x0, :lo12:delta ldr s0, [x0] fcmp s0, #0.0 bne .L189 adrp x0, p5_evt add x0, x0, :lo12:p5_evt ldrb w0, [x0] cmp w0, 0 beq .L189 adrp x0, _x_p5_l3 add x0, x0, :lo12:_x_p5_l3 ldrb w0, [x0] cmp w0, 0 bne .L189 adrp x0, _x_p5_l2 add x0, x0, :lo12:_x_p5_l2 ldrb w0, [x0] cmp w0, 0 bne .L189 adrp x0, _x_p5_l0 add x0, x0, :lo12:_x_p5_l0 ldrb w0, [x0] cmp w0, 0 bne .L189 adrp x0, _x_p5_l1 add x0, x0, :lo12:_x_p5_l1 ldrb w0, [x0] cmp w0, 0 bne .L189 adrp x0, p5_l3 add x0, x0, :lo12:p5_l3 ldrb w0, [x0] cmp w0, 0 bne .L189 adrp x0, p5_l2 add x0, x0, :lo12:p5_l2 ldrb w0, [x0] cmp w0, 0 bne .L189 adrp x0, p5_l0 add x0, x0, :lo12:p5_l0 ldrb w0, [x0] cmp w0, 0 beq .L189 adrp x0, p5_l1 add x0, x0, :lo12:p5_l1 ldrb w0, [x0] cmp w0, 0 bne .L117 .L189: adrp x0, v2 add x0, x0, :lo12:v2 ldrb w0, [x0] cmp w0, 0 bne .L190 adrp x0, _x_p5_c add x0, x0, :lo12:_x_p5_c ldr s0, [x0] fcmp s0, #0.0 beq .L191 .L190: adrp x0, delta add x0, x0, :lo12:delta ldr s0, [x0] fcmp s0, #0.0 bne .L191 adrp x0, p5_evt add x0, x0, :lo12:p5_evt ldrb w0, [x0] cmp w0, 0 beq .L191 adrp x0, p5_l3 add x0, x0, :lo12:p5_l3 ldrb w0, [x0] cmp w0, 0 bne .L191 adrp x0, p5_l2 add x0, x0, :lo12:p5_l2 ldrb w0, [x0] cmp w0, 0 bne .L191 adrp x0, p5_l0 add x0, x0, :lo12:p5_l0 ldrb w0, [x0] cmp w0, 0 beq .L191 adrp x0, p5_l1 add x0, x0, :lo12:p5_l1 ldrb w0, [x0] cmp w0, 0 beq .L191 adrp x0, _x_p5_l3 add x0, x0, :lo12:_x_p5_l3 ldrb w0, [x0] cmp w0, 0 bne .L191 adrp x0, _x_p5_l2 add x0, x0, :lo12:_x_p5_l2 ldrb w0, [x0] cmp w0, 0 beq .L191 adrp x0, _x_p5_l0 add x0, x0, :lo12:_x_p5_l0 ldrb w0, [x0] cmp w0, 0 bne .L191 adrp x0, _x_p5_l1 add x0, x0, :lo12:_x_p5_l1 ldrb w0, [x0] cmp w0, 0 beq .L117 .L191: adrp x0, v1 add x0, x0, :lo12:v1 ldr w1, [x0] adrp x0, _x_v1 add x0, x0, :lo12:_x_v1 ldr w0, [x0] cmp w1, w0 bne .L192 adrp x0, proposed5 add x0, x0, :lo12:proposed5 ldr s1, [x0] adrp x0, _x_proposed5 add x0, x0, :lo12:_x_proposed5 ldr s0, [x0] fcmp s1, s0 bne .L192 adrp x0, _x_p5_c add x0, x0, :lo12:_x_p5_c ldr s0, [x0] fcmp s0, #0.0 bne .L192 adrp x0, _x_v2 add x0, x0, :lo12:_x_v2 ldrb w0, [x0] cmp w0, 0 beq .L192 adrp x0, _x_p5_l3 add x0, x0, :lo12:_x_p5_l3 ldrb w0, [x0] cmp w0, 0 bne .L192 adrp x0, _x_p5_l2 add x0, x0, :lo12:_x_p5_l2 ldrb w0, [x0] cmp w0, 0 beq .L192 adrp x0, _x_p5_l0 add x0, x0, :lo12:_x_p5_l0 ldrb w0, [x0] cmp w0, 0 beq .L192 adrp x0, _x_p5_l1 add x0, x0, :lo12:_x_p5_l1 ldrb w0, [x0] cmp w0, 0 beq .L193 .L192: adrp x0, p5_l3 add x0, x0, :lo12:p5_l3 ldrb w0, [x0] cmp w0, 0 bne .L193 adrp x0, p5_l2 add x0, x0, :lo12:p5_l2 ldrb w0, [x0] cmp w0, 0 beq .L193 adrp x0, p5_l0 add x0, x0, :lo12:p5_l0 ldrb w0, [x0] cmp w0, 0 bne .L193 adrp x0, p5_l1 add x0, x0, :lo12:p5_l1 ldrb w0, [x0] cmp w0, 0 bne .L193 adrp x0, delta add x0, x0, :lo12:delta ldr s0, [x0] fcmp s0, #0.0 bne .L193 adrp x0, p5_evt add x0, x0, :lo12:p5_evt ldrb w0, [x0] cmp w0, 0 bne .L117 .L193: adrp x0, proposed5 add x0, x0, :lo12:proposed5 ldr s1, [x0] adrp x0, _x_proposed5 add x0, x0, :lo12:_x_proposed5 ldr s0, [x0] fcmp s1, s0 bne .L194 adrp x0, v2 add x0, x0, :lo12:v2 ldrb w0, [x0] cmp w0, 0 cset w0, eq and w1, w0, 255 adrp x0, _x_v2 add x0, x0, :lo12:_x_v2 ldrb w0, [x0] cmp w0, 0 cset w0, ne and w0, w0, 255 eor w0, w1, w0 and w0, w0, 255 cmp w0, 0 beq .L194 adrp x0, v1 add x0, x0, :lo12:v1 ldr w1, [x0] adrp x0, _x_v1 add x0, x0, :lo12:_x_v1 ldr w0, [x0] cmp w1, w0 bne .L194 adrp x0, p5_c add x0, x0, :lo12:p5_c ldr s1, [x0] adrp x0, _x_p5_c add x0, x0, :lo12:_x_p5_c ldr s0, [x0] fcmp s1, s0 bne .L194 adrp x0, _x_p5_l3 add x0, x0, :lo12:_x_p5_l3 ldrb w0, [x0] cmp w0, 0 bne .L195 adrp x0, _x_p5_l2 add x0, x0, :lo12:_x_p5_l2 ldrb w0, [x0] cmp w0, 0 bne .L195 adrp x0, _x_p5_l0 add x0, x0, :lo12:_x_p5_l0 ldrb w0, [x0] cmp w0, 0 bne .L195 adrp x0, _x_p5_l1 add x0, x0, :lo12:_x_p5_l1 ldrb w0, [x0] cmp w0, 0 beq .L196 .L195: adrp x0, _x_p5_l3 add x0, x0, :lo12:_x_p5_l3 ldrb w0, [x0] cmp w0, 0 bne .L194 adrp x0, _x_p5_l2 add x0, x0, :lo12:_x_p5_l2 ldrb w0, [x0] cmp w0, 0 beq .L194 adrp x0, _x_p5_l1 add x0, x0, :lo12:_x_p5_l1 ldrb w0, [x0] cmp w0, 0 beq .L194 adrp x0, _x_p5_l0 add x0, x0, :lo12:_x_p5_l0 ldrb w0, [x0] cmp w0, 0 beq .L196 .L194: adrp x0, p5_l3 add x0, x0, :lo12:p5_l3 ldrb w0, [x0] cmp w0, 0 bne .L196 adrp x0, p5_l2 add x0, x0, :lo12:p5_l2 ldrb w0, [x0] cmp w0, 0 beq .L196 adrp x0, p5_l0 add x0, x0, :lo12:p5_l0 ldrb w0, [x0] cmp w0, 0 beq .L196 adrp x0, p5_l1 add x0, x0, :lo12:p5_l1 ldrb w0, [x0] cmp w0, 0 bne .L196 adrp x0, delta add x0, x0, :lo12:delta ldr s0, [x0] fcmp s0, #0.0 bne .L196 adrp x0, p5_evt add x0, x0, :lo12:p5_evt ldrb w0, [x0] cmp w0, 0 bne .L117 .L196: adrp x0, v1 add x0, x0, :lo12:v1 ldr w0, [x0] cmp w0, 6 bne .L197 adrp x0, delta add x0, x0, :lo12:delta ldr s0, [x0] fcmp s0, #0.0 bne .L197 adrp x0, p5_evt add x0, x0, :lo12:p5_evt ldrb w0, [x0] cmp w0, 0 beq .L197 adrp x0, _x_p5_l3 add x0, x0, :lo12:_x_p5_l3 ldrb w0, [x0] cmp w0, 0 bne .L197 adrp x0, _x_p5_l2 add x0, x0, :lo12:_x_p5_l2 ldrb w0, [x0] cmp w0, 0 bne .L197 adrp x0, _x_p5_l0 add x0, x0, :lo12:_x_p5_l0 ldrb w0, [x0] cmp w0, 0 bne .L197 adrp x0, _x_p5_l1 add x0, x0, :lo12:_x_p5_l1 ldrb w0, [x0] cmp w0, 0 bne .L197 adrp x0, p5_l3 add x0, x0, :lo12:p5_l3 ldrb w0, [x0] cmp w0, 0 bne .L197 adrp x0, p5_l2 add x0, x0, :lo12:p5_l2 ldrb w0, [x0] cmp w0, 0 beq .L197 adrp x0, p5_l0 add x0, x0, :lo12:p5_l0 ldrb w0, [x0] cmp w0, 0 beq .L197 adrp x0, p5_l1 add x0, x0, :lo12:p5_l1 ldrb w0, [x0] cmp w0, 0 beq .L117 .L197: adrp x0, v1 add x0, x0, :lo12:v1 ldr w0, [x0] cmp w0, 6 beq .L198 adrp x0, delta add x0, x0, :lo12:delta ldr s0, [x0] fcmp s0, #0.0 bne .L198 adrp x0, p5_evt add x0, x0, :lo12:p5_evt ldrb w0, [x0] cmp w0, 0 beq .L198 adrp x0, p5_l3 add x0, x0, :lo12:p5_l3 ldrb w0, [x0] cmp w0, 0 bne .L198 adrp x0, p5_l2 add x0, x0, :lo12:p5_l2 ldrb w0, [x0] cmp w0, 0 beq .L198 adrp x0, p5_l0 add x0, x0, :lo12:p5_l0 ldrb w0, [x0] cmp w0, 0 beq .L198 adrp x0, p5_l1 add x0, x0, :lo12:p5_l1 ldrb w0, [x0] cmp w0, 0 bne .L198 adrp x0, _x_p5_l3 add x0, x0, :lo12:_x_p5_l3 ldrb w0, [x0] cmp w0, 0 bne .L198 adrp x0, _x_p5_l2 add x0, x0, :lo12:_x_p5_l2 ldrb w0, [x0] cmp w0, 0 beq .L198 adrp x0, _x_p5_l1 add x0, x0, :lo12:_x_p5_l1 ldrb w0, [x0] cmp w0, 0 beq .L198 adrp x0, _x_p5_l0 add x0, x0, :lo12:_x_p5_l0 ldrb w0, [x0] cmp w0, 0 beq .L117 .L198: adrp x0, proposed5 add x0, x0, :lo12:proposed5 ldr s1, [x0] adrp x0, _x_proposed5 add x0, x0, :lo12:_x_proposed5 ldr s0, [x0] fcmp s1, s0 bne .L199 adrp x0, v2 add x0, x0, :lo12:v2 ldrb w0, [x0] cmp w0, 0 cset w0, eq and w1, w0, 255 adrp x0, _x_v2 add x0, x0, :lo12:_x_v2 ldrb w0, [x0] cmp w0, 0 cset w0, ne and w0, w0, 255 eor w0, w1, w0 and w0, w0, 255 cmp w0, 0 beq .L199 adrp x0, v1 add x0, x0, :lo12:v1 ldr w1, [x0] adrp x0, _x_v1 add x0, x0, :lo12:_x_v1 ldr w0, [x0] cmp w1, w0 bne .L199 adrp x0, _x_p5_l3 add x0, x0, :lo12:_x_p5_l3 ldrb w0, [x0] cmp w0, 0 bne .L199 adrp x0, _x_p5_l2 add x0, x0, :lo12:_x_p5_l2 ldrb w0, [x0] cmp w0, 0 beq .L199 adrp x0, _x_p5_l0 add x0, x0, :lo12:_x_p5_l0 ldrb w0, [x0] cmp w0, 0 beq .L199 adrp x0, _x_p5_l1 add x0, x0, :lo12:_x_p5_l1 ldrb w0, [x0] cmp w0, 0 beq .L199 adrp x0, _x_p5_c add x0, x0, :lo12:_x_p5_c ldr s0, [x0] fcmp s0, #0.0 beq .L200 .L199: adrp x0, p5_l3 add x0, x0, :lo12:p5_l3 ldrb w0, [x0] cmp w0, 0 bne .L200 adrp x0, p5_l2 add x0, x0, :lo12:p5_l2 ldrb w0, [x0] cmp w0, 0 beq .L200 adrp x0, p5_l1 add x0, x0, :lo12:p5_l1 ldrb w0, [x0] cmp w0, 0 beq .L200 adrp x0, p5_l0 add x0, x0, :lo12:p5_l0 ldrb w0, [x0] cmp w0, 0 bne .L200 adrp x0, delta add x0, x0, :lo12:delta ldr s0, [x0] fcmp s0, #0.0 bne .L200 adrp x0, p5_evt add x0, x0, :lo12:p5_evt ldrb w0, [x0] cmp w0, 0 bne .L117 .L200: adrp x0, proposed5 add x0, x0, :lo12:proposed5 ldr s1, [x0] adrp x0, _x_proposed5 add x0, x0, :lo12:_x_proposed5 ldr s0, [x0] fcmp s1, s0 bne .L201 adrp x0, _x_v2 add x0, x0, :lo12:_x_v2 ldrb w0, [x0] cmp w0, 0 bne .L201 adrp x0, _x_p5_l3 add x0, x0, :lo12:_x_p5_l3 ldrb w0, [x0] cmp w0, 0 beq .L201 adrp x0, _x_p5_l2 add x0, x0, :lo12:_x_p5_l2 ldrb w0, [x0] cmp w0, 0 bne .L201 adrp x0, _x_p5_l0 add x0, x0, :lo12:_x_p5_l0 ldrb w0, [x0] cmp w0, 0 bne .L201 adrp x0, _x_p5_l1 add x0, x0, :lo12:_x_p5_l1 ldrb w0, [x0] cmp w0, 0 bne .L201 adrp x0, v1 add x0, x0, :lo12:v1 ldr w1, [x0] adrp x0, _x_v1 add x0, x0, :lo12:_x_v1 ldr w0, [x0] cmp w1, w0 bne .L201 adrp x0, _x_p5_c add x0, x0, :lo12:_x_p5_c ldr s0, [x0] fcmp s0, #0.0 beq .L202 .L201: adrp x0, p5_l3 add x0, x0, :lo12:p5_l3 ldrb w0, [x0] cmp w0, 0 bne .L202 adrp x0, p5_l2 add x0, x0, :lo12:p5_l2 ldrb w0, [x0] cmp w0, 0 beq .L202 adrp x0, p5_l0 add x0, x0, :lo12:p5_l0 ldrb w0, [x0] cmp w0, 0 beq .L202 adrp x0, p5_l1 add x0, x0, :lo12:p5_l1 ldrb w0, [x0] cmp w0, 0 beq .L202 adrp x0, delta add x0, x0, :lo12:delta ldr s0, [x0] fcmp s0, #0.0 bne .L202 adrp x0, p5_evt add x0, x0, :lo12:p5_evt ldrb w0, [x0] cmp w0, 0 bne .L117 .L202: adrp x0, proposed5 add x0, x0, :lo12:proposed5 ldr s1, [x0] adrp x0, _x_proposed5 add x0, x0, :lo12:_x_proposed5 ldr s0, [x0] fcmp s1, s0 bne .L203 adrp x0, _x_v1 add x0, x0, :lo12:_x_v1 ldr w0, [x0] cmp w0, 0 bne .L203 adrp x0, _x_p5_l3 add x0, x0, :lo12:_x_p5_l3 ldrb w0, [x0] cmp w0, 0 bne .L203 adrp x0, _x_p5_l2 add x0, x0, :lo12:_x_p5_l2 ldrb w0, [x0] cmp w0, 0 bne .L203 adrp x0, _x_p5_l0 add x0, x0, :lo12:_x_p5_l0 ldrb w0, [x0] cmp w0, 0 bne .L203 adrp x0, _x_p5_l1 add x0, x0, :lo12:_x_p5_l1 ldrb w0, [x0] cmp w0, 0 bne .L203 adrp x0, v2 add x0, x0, :lo12:v2 ldrb w0, [x0] cmp w0, 0 cset w0, eq and w1, w0, 255 adrp x0, _x_v2 add x0, x0, :lo12:_x_v2 ldrb w0, [x0] cmp w0, 0 cset w0, ne and w0, w0, 255 eor w0, w1, w0 and w0, w0, 255 cmp w0, 0 beq .L203 adrp x0, p5_c add x0, x0, :lo12:p5_c ldr s1, [x0] adrp x0, _x_p5_c add x0, x0, :lo12:_x_p5_c ldr s0, [x0] fcmp s1, s0 beq .L204 .L203: adrp x0, p5_l3 add x0, x0, :lo12:p5_l3 ldrb w0, [x0] cmp w0, 0 beq .L204 adrp x0, p5_l2 add x0, x0, :lo12:p5_l2 ldrb w0, [x0] cmp w0, 0 bne .L204 adrp x0, p5_l0 add x0, x0, :lo12:p5_l0 ldrb w0, [x0] cmp w0, 0 bne .L204 adrp x0, p5_l1 add x0, x0, :lo12:p5_l1 ldrb w0, [x0] cmp w0, 0 bne .L204 adrp x0, delta add x0, x0, :lo12:delta ldr s0, [x0] fcmp s0, #0.0 bne .L204 adrp x0, p5_evt add x0, x0, :lo12:p5_evt ldrb w0, [x0] cmp w0, 0 bne .L117 .L204: adrp x0, _x_p4_l3 add x0, x0, :lo12:_x_p4_l3 ldrb w0, [x0] cmp w0, 0 beq .L205 adrp x0, _x_p4_l2 add x0, x0, :lo12:_x_p4_l2 ldrb w0, [x0] cmp w0, 0 bne .L205 adrp x0, _x_p4_l0 add x0, x0, :lo12:_x_p4_l0 ldrb w0, [x0] cmp w0, 0 bne .L205 adrp x0, _x_p4_l1 add x0, x0, :lo12:_x_p4_l1 ldrb w0, [x0] cmp w0, 0 beq .L206 .L205: adrp x0, _x_p4_l3 add x0, x0, :lo12:_x_p4_l3 ldrb w0, [x0] cmp w0, 0 bne .L207 adrp x0, _x_p4_l2 add x0, x0, :lo12:_x_p4_l2 ldrb w0, [x0] cmp w0, 0 beq .L207 adrp x0, _x_p4_l0 add x0, x0, :lo12:_x_p4_l0 ldrb w0, [x0] cmp w0, 0 beq .L207 adrp x0, _x_p4_l1 add x0, x0, :lo12:_x_p4_l1 ldrb w0, [x0] cmp w0, 0 bne .L206 .L207: adrp x0, _x_p4_l3 add x0, x0, :lo12:_x_p4_l3 ldrb w0, [x0] cmp w0, 0 bne .L208 adrp x0, _x_p4_l2 add x0, x0, :lo12:_x_p4_l2 ldrb w0, [x0] cmp w0, 0 beq .L208 adrp x0, _x_p4_l1 add x0, x0, :lo12:_x_p4_l1 ldrb w0, [x0] cmp w0, 0 beq .L208 adrp x0, _x_p4_l0 add x0, x0, :lo12:_x_p4_l0 ldrb w0, [x0] cmp w0, 0 beq .L206 .L208: adrp x0, _x_p4_l3 add x0, x0, :lo12:_x_p4_l3 ldrb w0, [x0] cmp w0, 0 bne .L209 adrp x0, _x_p4_l2 add x0, x0, :lo12:_x_p4_l2 ldrb w0, [x0] cmp w0, 0 beq .L209 adrp x0, _x_p4_l0 add x0, x0, :lo12:_x_p4_l0 ldrb w0, [x0] cmp w0, 0 beq .L209 adrp x0, _x_p4_l1 add x0, x0, :lo12:_x_p4_l1 ldrb w0, [x0] cmp w0, 0 beq .L206 .L209: adrp x0, _x_p4_l3 add x0, x0, :lo12:_x_p4_l3 ldrb w0, [x0] cmp w0, 0 bne .L210 adrp x0, _x_p4_l2 add x0, x0, :lo12:_x_p4_l2 ldrb w0, [x0] cmp w0, 0 beq .L210 adrp x0, _x_p4_l0 add x0, x0, :lo12:_x_p4_l0 ldrb w0, [x0] cmp w0, 0 bne .L210 adrp x0, _x_p4_l1 add x0, x0, :lo12:_x_p4_l1 ldrb w0, [x0] cmp w0, 0 beq .L206 .L210: adrp x0, _x_p4_l3 add x0, x0, :lo12:_x_p4_l3 ldrb w0, [x0] cmp w0, 0 bne .L211 adrp x0, _x_p4_l2 add x0, x0, :lo12:_x_p4_l2 ldrb w0, [x0] cmp w0, 0 bne .L211 adrp x0, _x_p4_l0 add x0, x0, :lo12:_x_p4_l0 ldrb w0, [x0] cmp w0, 0 beq .L211 adrp x0, _x_p4_l1 add x0, x0, :lo12:_x_p4_l1 ldrb w0, [x0] cmp w0, 0 bne .L206 .L211: adrp x0, _x_p4_l3 add x0, x0, :lo12:_x_p4_l3 ldrb w0, [x0] cmp w0, 0 bne .L212 adrp x0, _x_p4_l2 add x0, x0, :lo12:_x_p4_l2 ldrb w0, [x0] cmp w0, 0 bne .L212 adrp x0, _x_p4_l1 add x0, x0, :lo12:_x_p4_l1 ldrb w0, [x0] cmp w0, 0 beq .L212 adrp x0, _x_p4_l0 add x0, x0, :lo12:_x_p4_l0 ldrb w0, [x0] cmp w0, 0 beq .L206 .L212: adrp x0, _x_p4_l3 add x0, x0, :lo12:_x_p4_l3 ldrb w0, [x0] cmp w0, 0 bne .L213 adrp x0, _x_p4_l2 add x0, x0, :lo12:_x_p4_l2 ldrb w0, [x0] cmp w0, 0 bne .L213 adrp x0, _x_p4_l0 add x0, x0, :lo12:_x_p4_l0 ldrb w0, [x0] cmp w0, 0 bne .L213 adrp x0, _x_p4_l1 add x0, x0, :lo12:_x_p4_l1 ldrb w0, [x0] cmp w0, 0 beq .L206 .L213: adrp x0, _x_p4_l3 add x0, x0, :lo12:_x_p4_l3 ldrb w0, [x0] cmp w0, 0 bne .L117 adrp x0, _x_p4_l2 add x0, x0, :lo12:_x_p4_l2 ldrb w0, [x0] cmp w0, 0 bne .L117 adrp x0, _x_p4_l0 add x0, x0, :lo12:_x_p4_l0 ldrb w0, [x0] cmp w0, 0 beq .L117 adrp x0, _x_p4_l1 add x0, x0, :lo12:_x_p4_l1 ldrb w0, [x0] cmp w0, 0 bne .L117 .L206: adrp x0, _x_p4_c add x0, x0, :lo12:_x_p4_c ldr s1, [x0] adrp x0, _x_proposed4 add x0, x0, :lo12:_x_proposed4 ldr s0, [x0] fcmpe s1, s0 bls .L214 adrp x0, _x_p4_l3 add x0, x0, :lo12:_x_p4_l3 ldrb w0, [x0] cmp w0, 0 bne .L215 adrp x0, _x_p4_l2 add x0, x0, :lo12:_x_p4_l2 ldrb w0, [x0] cmp w0, 0 bne .L215 adrp x0, _x_p4_l0 add x0, x0, :lo12:_x_p4_l0 ldrb w0, [x0] cmp w0, 0 beq .L215 adrp x0, _x_p4_l1 add x0, x0, :lo12:_x_p4_l1 ldrb w0, [x0] cmp w0, 0 beq .L117 .L215: adrp x0, _x_p4_l3 add x0, x0, :lo12:_x_p4_l3 ldrb w0, [x0] cmp w0, 0 bne .L216 adrp x0, _x_p4_l2 add x0, x0, :lo12:_x_p4_l2 ldrb w0, [x0] cmp w0, 0 beq .L216 adrp x0, _x_p4_l0 add x0, x0, :lo12:_x_p4_l0 ldrb w0, [x0] cmp w0, 0 bne .L216 adrp x0, _x_p4_l1 add x0, x0, :lo12:_x_p4_l1 ldrb w0, [x0] cmp w0, 0 beq .L117 .L216: adrp x0, _x_p4_l3 add x0, x0, :lo12:_x_p4_l3 ldrb w0, [x0] cmp w0, 0 bne .L217 adrp x0, _x_p4_l2 add x0, x0, :lo12:_x_p4_l2 ldrb w0, [x0] cmp w0, 0 beq .L217 adrp x0, _x_p4_l0 add x0, x0, :lo12:_x_p4_l0 ldrb w0, [x0] cmp w0, 0 beq .L217 adrp x0, _x_p4_l1 add x0, x0, :lo12:_x_p4_l1 ldrb w0, [x0] cmp w0, 0 bne .L117 .L217: adrp x0, _x_p4_l3 add x0, x0, :lo12:_x_p4_l3 ldrb w0, [x0] cmp w0, 0 beq .L214 adrp x0, _x_p4_l2 add x0, x0, :lo12:_x_p4_l2 ldrb w0, [x0] cmp w0, 0 bne .L214 adrp x0, _x_p4_l0 add x0, x0, :lo12:_x_p4_l0 ldrb w0, [x0] cmp w0, 0 bne .L214 adrp x0, _x_p4_l1 add x0, x0, :lo12:_x_p4_l1 ldrb w0, [x0] cmp w0, 0 beq .L117 .L214: adrp x0, p4_l0 add x0, x0, :lo12:p4_l0 ldrb w0, [x0] cmp w0, 0 cset w0, eq and w1, w0, 255 adrp x0, _x_p4_l0 add x0, x0, :lo12:_x_p4_l0 ldrb w0, [x0] cmp w0, 0 cset w0, ne and w0, w0, 255 eor w0, w1, w0 and w0, w0, 255 cmp w0, 0 beq .L218 adrp x0, p4_l1 add x0, x0, :lo12:p4_l1 ldrb w0, [x0] cmp w0, 0 cset w0, eq and w1, w0, 255 adrp x0, _x_p4_l1 add x0, x0, :lo12:_x_p4_l1 ldrb w0, [x0] cmp w0, 0 cset w0, ne and w0, w0, 255 eor w0, w1, w0 and w0, w0, 255 cmp w0, 0 beq .L218 adrp x0, p4_l2 add x0, x0, :lo12:p4_l2 ldrb w0, [x0] cmp w0, 0 cset w0, eq and w1, w0, 255 adrp x0, _x_p4_l2 add x0, x0, :lo12:_x_p4_l2 ldrb w0, [x0] cmp w0, 0 cset w0, ne and w0, w0, 255 eor w0, w1, w0 and w0, w0, 255 cmp w0, 0 beq .L218 adrp x0, p4_l3 add x0, x0, :lo12:p4_l3 ldrb w0, [x0] cmp w0, 0 cset w0, eq and w1, w0, 255 adrp x0, _x_p4_l3 add x0, x0, :lo12:_x_p4_l3 ldrb w0, [x0] cmp w0, 0 cset w0, ne and w0, w0, 255 eor w0, w1, w0 and w0, w0, 255 cmp w0, 0 beq .L218 adrp x0, delta add x0, x0, :lo12:delta ldr s0, [x0] fcvt d1, s0 adrp x0, p4_c add x0, x0, :lo12:p4_c ldr s0, [x0] fcvt d2, s0 adrp x0, _x_p4_c add x0, x0, :lo12:_x_p4_c ldr s0, [x0] fcvt d0, s0 fsub d0, d2, d0 fadd d0, d1, d0 fcmp d0, #0.0 bne .L218 adrp x0, proposed4 add x0, x0, :lo12:proposed4 ldr s1, [x0] adrp x0, _x_proposed4 add x0, x0, :lo12:_x_proposed4 ldr s0, [x0] fcmp s1, s0 beq .L219 .L218: adrp x0, delta add x0, x0, :lo12:delta ldr s0, [x0] fcmpe s0, #0.0 bls .L472 b .L117 .L472: adrp x0, p4_evt add x0, x0, :lo12:p4_evt ldrb w0, [x0] cmp w0, 0 beq .L117 .L219: adrp x0, v1 add x0, x0, :lo12:v1 ldr w0, [x0] cmp w0, 0 bne .L221 adrp x0, _x_p4_l3 add x0, x0, :lo12:_x_p4_l3 ldrb w0, [x0] cmp w0, 0 bne .L221 adrp x0, _x_p4_l2 add x0, x0, :lo12:_x_p4_l2 ldrb w0, [x0] cmp w0, 0 bne .L221 adrp x0, _x_p4_l0 add x0, x0, :lo12:_x_p4_l0 ldrb w0, [x0] cmp w0, 0 beq .L221 adrp x0, _x_p4_l1 add x0, x0, :lo12:_x_p4_l1 ldrb w0, [x0] cmp w0, 0 bne .L221 adrp x0, v2 add x0, x0, :lo12:v2 ldrb w0, [x0] cmp w0, 0 cset w0, eq and w1, w0, 255 adrp x0, _x_v2 add x0, x0, :lo12:_x_v2 ldrb w0, [x0] cmp w0, 0 cset w0, ne and w0, w0, 255 eor w0, w1, w0 and w0, w0, 255 cmp w0, 0 beq .L221 adrp x0, _x_p4_c add x0, x0, :lo12:_x_p4_c ldr s0, [x0] fcmp s0, #0.0 bne .L221 adrp x0, v1 add x0, x0, :lo12:v1 ldr w1, [x0] adrp x0, _x_v1 add x0, x0, :lo12:_x_v1 ldr w0, [x0] cmp w1, w0 bne .L221 adrp x0, proposed4 add x0, x0, :lo12:proposed4 ldr s1, [x0] adrp x0, _x_proposed4 add x0, x0, :lo12:_x_proposed4 ldr s0, [x0] fcmp s1, s0 beq .L222 .L221: adrp x0, p4_l3 add x0, x0, :lo12:p4_l3 ldrb w0, [x0] cmp w0, 0 bne .L222 adrp x0, p4_l2 add x0, x0, :lo12:p4_l2 ldrb w0, [x0] cmp w0, 0 bne .L222 adrp x0, p4_l0 add x0, x0, :lo12:p4_l0 ldrb w0, [x0] cmp w0, 0 bne .L222 adrp x0, p4_l1 add x0, x0, :lo12:p4_l1 ldrb w0, [x0] cmp w0, 0 bne .L222 adrp x0, delta add x0, x0, :lo12:delta ldr s0, [x0] fcmp s0, #0.0 bne .L222 adrp x0, p4_evt add x0, x0, :lo12:p4_evt ldrb w0, [x0] cmp w0, 0 bne .L117 .L222: adrp x0, proposed4 add x0, x0, :lo12:proposed4 ldr s1, [x0] adrp x0, _x_proposed4 add x0, x0, :lo12:_x_proposed4 ldr s0, [x0] fcmp s1, s0 bne .L223 adrp x0, v2 add x0, x0, :lo12:v2 ldrb w0, [x0] cmp w0, 0 cset w0, eq and w1, w0, 255 adrp x0, _x_v2 add x0, x0, :lo12:_x_v2 ldrb w0, [x0] cmp w0, 0 cset w0, ne and w0, w0, 255 eor w0, w1, w0 and w0, w0, 255 cmp w0, 0 beq .L223 adrp x0, _x_p4_c add x0, x0, :lo12:_x_p4_c ldr s0, [x0] fcmp s0, #0.0 bne .L223 adrp x0, _x_p4_l3 add x0, x0, :lo12:_x_p4_l3 ldrb w0, [x0] cmp w0, 0 bne .L223 adrp x0, _x_p4_l2 add x0, x0, :lo12:_x_p4_l2 ldrb w0, [x0] cmp w0, 0 bne .L223 adrp x0, _x_p4_l1 add x0, x0, :lo12:_x_p4_l1 ldrb w0, [x0] cmp w0, 0 beq .L223 adrp x0, _x_p4_l0 add x0, x0, :lo12:_x_p4_l0 ldrb w0, [x0] cmp w0, 0 bne .L223 adrp x0, _x_v1 add x0, x0, :lo12:_x_v1 ldr w0, [x0] cmp w0, 5 beq .L224 .L223: adrp x0, p4_l3 add x0, x0, :lo12:p4_l3 ldrb w0, [x0] cmp w0, 0 bne .L224 adrp x0, p4_l2 add x0, x0, :lo12:p4_l2 ldrb w0, [x0] cmp w0, 0 bne .L224 adrp x0, p4_l0 add x0, x0, :lo12:p4_l0 ldrb w0, [x0] cmp w0, 0 beq .L224 adrp x0, p4_l1 add x0, x0, :lo12:p4_l1 ldrb w0, [x0] cmp w0, 0 bne .L224 adrp x0, delta add x0, x0, :lo12:delta ldr s0, [x0] fcmp s0, #0.0 bne .L224 adrp x0, p4_evt add x0, x0, :lo12:p4_evt ldrb w0, [x0] cmp w0, 0 bne .L117 .L224: adrp x0, v2 add x0, x0, :lo12:v2 ldrb w0, [x0] cmp w0, 0 cset w0, eq and w1, w0, 255 adrp x0, _x_v2 add x0, x0, :lo12:_x_v2 ldrb w0, [x0] cmp w0, 0 cset w0, ne and w0, w0, 255 eor w0, w1, w0 and w0, w0, 255 cmp w0, 0 beq .L225 adrp x0, v1 add x0, x0, :lo12:v1 ldr w1, [x0] adrp x0, _x_v1 add x0, x0, :lo12:_x_v1 ldr w0, [x0] cmp w1, w0 bne .L225 adrp x0, _x_p4_l3 add x0, x0, :lo12:_x_p4_l3 ldrb w0, [x0] cmp w0, 0 bne .L226 adrp x0, _x_p4_l2 add x0, x0, :lo12:_x_p4_l2 ldrb w0, [x0] cmp w0, 0 bne .L226 adrp x0, _x_p4_l0 add x0, x0, :lo12:_x_p4_l0 ldrb w0, [x0] cmp w0, 0 bne .L226 adrp x0, _x_p4_l1 add x0, x0, :lo12:_x_p4_l1 ldrb w0, [x0] cmp w0, 0 beq .L227 .L226: adrp x0, _x_p4_l3 add x0, x0, :lo12:_x_p4_l3 ldrb w0, [x0] cmp w0, 0 bne .L225 adrp x0, _x_p4_l2 add x0, x0, :lo12:_x_p4_l2 ldrb w0, [x0] cmp w0, 0 bne .L225 adrp x0, _x_p4_l0 add x0, x0, :lo12:_x_p4_l0 ldrb w0, [x0] cmp w0, 0 beq .L225 adrp x0, _x_p4_l1 add x0, x0, :lo12:_x_p4_l1 ldrb w0, [x0] cmp w0, 0 beq .L225 .L227: adrp x0, p4_c add x0, x0, :lo12:p4_c ldr s1, [x0] adrp x0, _x_p4_c add x0, x0, :lo12:_x_p4_c ldr s0, [x0] fcmp s1, s0 beq .L228 .L225: adrp x0, p4_l3 add x0, x0, :lo12:p4_l3 ldrb w0, [x0] cmp w0, 0 bne .L228 adrp x0, p4_l2 add x0, x0, :lo12:p4_l2 ldrb w0, [x0] cmp w0, 0 bne .L228 adrp x0, p4_l1 add x0, x0, :lo12:p4_l1 ldrb w0, [x0] cmp w0, 0 beq .L228 adrp x0, p4_l0 add x0, x0, :lo12:p4_l0 ldrb w0, [x0] cmp w0, 0 bne .L228 adrp x0, delta add x0, x0, :lo12:delta ldr s0, [x0] fcmp s0, #0.0 bne .L228 adrp x0, p4_evt add x0, x0, :lo12:p4_evt ldrb w0, [x0] cmp w0, 0 bne .L117 .L228: adrp x0, proposed4 add x0, x0, :lo12:proposed4 ldr s1, [x0] adrp x0, _x_proposed4 add x0, x0, :lo12:_x_proposed4 ldr s0, [x0] fcmp s1, s0 bne .L229 adrp x0, v1 add x0, x0, :lo12:v1 ldr w0, [x0] cmp w0, 5 bne .L230 .L229: adrp x0, delta add x0, x0, :lo12:delta ldr s0, [x0] fcmp s0, #0.0 bne .L230 adrp x0, p4_evt add x0, x0, :lo12:p4_evt ldrb w0, [x0] cmp w0, 0 beq .L230 adrp x0, _x_p4_l3 add x0, x0, :lo12:_x_p4_l3 ldrb w0, [x0] cmp w0, 0 bne .L230 adrp x0, _x_p4_l2 add x0, x0, :lo12:_x_p4_l2 ldrb w0, [x0] cmp w0, 0 bne .L230 adrp x0, _x_p4_l0 add x0, x0, :lo12:_x_p4_l0 ldrb w0, [x0] cmp w0, 0 bne .L230 adrp x0, _x_p4_l1 add x0, x0, :lo12:_x_p4_l1 ldrb w0, [x0] cmp w0, 0 bne .L230 adrp x0, p4_l3 add x0, x0, :lo12:p4_l3 ldrb w0, [x0] cmp w0, 0 bne .L230 adrp x0, p4_l2 add x0, x0, :lo12:p4_l2 ldrb w0, [x0] cmp w0, 0 bne .L230 adrp x0, p4_l1 add x0, x0, :lo12:p4_l1 ldrb w0, [x0] cmp w0, 0 beq .L230 adrp x0, p4_l0 add x0, x0, :lo12:p4_l0 ldrb w0, [x0] cmp w0, 0 beq .L117 .L230: adrp x0, v1 add x0, x0, :lo12:v1 ldr w0, [x0] cmp w0, 5 bne .L231 adrp x0, p4_c add x0, x0, :lo12:p4_c ldr s1, [x0] adrp x0, max_prop add x0, x0, :lo12:max_prop ldr s0, [x0] fcmpe s1, s0 cset w0, ls and w0, w0, 255 eor w0, w0, 1 and w0, w0, 255 cmp w0, 0 beq .L231 adrp x0, proposed4 add x0, x0, :lo12:proposed4 ldr s1, [x0] adrp x0, _x_proposed4 add x0, x0, :lo12:_x_proposed4 ldr s0, [x0] fcmpe s1, s0 cset w0, ls and w0, w0, 255 eor w0, w0, 1 and w0, w0, 255 cmp w0, 0 bne .L232 .L231: adrp x0, delta add x0, x0, :lo12:delta ldr s0, [x0] fcmp s0, #0.0 bne .L232 adrp x0, p4_evt add x0, x0, :lo12:p4_evt ldrb w0, [x0] cmp w0, 0 beq .L232 adrp x0, p4_l3 add x0, x0, :lo12:p4_l3 ldrb w0, [x0] cmp w0, 0 bne .L232 adrp x0, p4_l2 add x0, x0, :lo12:p4_l2 ldrb w0, [x0] cmp w0, 0 bne .L232 adrp x0, p4_l1 add x0, x0, :lo12:p4_l1 ldrb w0, [x0] cmp w0, 0 beq .L232 adrp x0, p4_l0 add x0, x0, :lo12:p4_l0 ldrb w0, [x0] cmp w0, 0 bne .L232 adrp x0, _x_p4_l3 add x0, x0, :lo12:_x_p4_l3 ldrb w0, [x0] cmp w0, 0 bne .L232 adrp x0, _x_p4_l2 add x0, x0, :lo12:_x_p4_l2 ldrb w0, [x0] cmp w0, 0 bne .L232 adrp x0, _x_p4_l0 add x0, x0, :lo12:_x_p4_l0 ldrb w0, [x0] cmp w0, 0 beq .L232 adrp x0, _x_p4_l1 add x0, x0, :lo12:_x_p4_l1 ldrb w0, [x0] cmp w0, 0 bne .L117 .L232: adrp x0, v2 add x0, x0, :lo12:v2 ldrb w0, [x0] cmp w0, 0 cset w0, eq and w1, w0, 255 adrp x0, _x_v2 add x0, x0, :lo12:_x_v2 ldrb w0, [x0] cmp w0, 0 cset w0, ne and w0, w0, 255 eor w0, w1, w0 and w0, w0, 255 cmp w0, 0 beq .L233 adrp x0, v1 add x0, x0, :lo12:v1 ldr w1, [x0] adrp x0, _x_v1 add x0, x0, :lo12:_x_v1 ldr w0, [x0] cmp w1, w0 bne .L233 adrp x0, proposed4 add x0, x0, :lo12:proposed4 ldr s1, [x0] adrp x0, _x_proposed4 add x0, x0, :lo12:_x_proposed4 ldr s0, [x0] fcmp s1, s0 bne .L233 adrp x0, _x_p4_l3 add x0, x0, :lo12:_x_p4_l3 ldrb w0, [x0] cmp w0, 0 bne .L234 adrp x0, _x_p4_l2 add x0, x0, :lo12:_x_p4_l2 ldrb w0, [x0] cmp w0, 0 bne .L234 adrp x0, _x_p4_l0 add x0, x0, :lo12:_x_p4_l0 ldrb w0, [x0] cmp w0, 0 bne .L234 adrp x0, _x_p4_l1 add x0, x0, :lo12:_x_p4_l1 ldrb w0, [x0] cmp w0, 0 beq .L235 .L234: adrp x0, _x_p4_l3 add x0, x0, :lo12:_x_p4_l3 ldrb w0, [x0] cmp w0, 0 bne .L233 adrp x0, _x_p4_l2 add x0, x0, :lo12:_x_p4_l2 ldrb w0, [x0] cmp w0, 0 beq .L233 adrp x0, _x_p4_l0 add x0, x0, :lo12:_x_p4_l0 ldrb w0, [x0] cmp w0, 0 bne .L233 adrp x0, _x_p4_l1 add x0, x0, :lo12:_x_p4_l1 ldrb w0, [x0] cmp w0, 0 beq .L235 .L233: adrp x0, p4_l3 add x0, x0, :lo12:p4_l3 ldrb w0, [x0] cmp w0, 0 bne .L235 adrp x0, p4_l2 add x0, x0, :lo12:p4_l2 ldrb w0, [x0] cmp w0, 0 bne .L235 adrp x0, p4_l0 add x0, x0, :lo12:p4_l0 ldrb w0, [x0] cmp w0, 0 beq .L235 adrp x0, p4_l1 add x0, x0, :lo12:p4_l1 ldrb w0, [x0] cmp w0, 0 beq .L235 adrp x0, delta add x0, x0, :lo12:delta ldr s0, [x0] fcmp s0, #0.0 bne .L235 adrp x0, p4_evt add x0, x0, :lo12:p4_evt ldrb w0, [x0] cmp w0, 0 bne .L117 .L235: adrp x0, v2 add x0, x0, :lo12:v2 ldrb w0, [x0] cmp w0, 0 beq .L236 adrp x0, p4_c add x0, x0, :lo12:p4_c ldr s1, [x0] adrp x0, _x_p4_c add x0, x0, :lo12:_x_p4_c ldr s0, [x0] fcmp s1, s0 beq .L237 .L236: adrp x0, delta add x0, x0, :lo12:delta ldr s0, [x0] fcmp s0, #0.0 bne .L237 adrp x0, p4_evt add x0, x0, :lo12:p4_evt ldrb w0, [x0] cmp w0, 0 beq .L237 adrp x0, _x_p4_l3 add x0, x0, :lo12:_x_p4_l3 ldrb w0, [x0] cmp w0, 0 bne .L237 adrp x0, _x_p4_l2 add x0, x0, :lo12:_x_p4_l2 ldrb w0, [x0] cmp w0, 0 bne .L237 adrp x0, _x_p4_l0 add x0, x0, :lo12:_x_p4_l0 ldrb w0, [x0] cmp w0, 0 bne .L237 adrp x0, _x_p4_l1 add x0, x0, :lo12:_x_p4_l1 ldrb w0, [x0] cmp w0, 0 bne .L237 adrp x0, p4_l3 add x0, x0, :lo12:p4_l3 ldrb w0, [x0] cmp w0, 0 bne .L237 adrp x0, p4_l2 add x0, x0, :lo12:p4_l2 ldrb w0, [x0] cmp w0, 0 bne .L237 adrp x0, p4_l0 add x0, x0, :lo12:p4_l0 ldrb w0, [x0] cmp w0, 0 beq .L237 adrp x0, p4_l1 add x0, x0, :lo12:p4_l1 ldrb w0, [x0] cmp w0, 0 bne .L117 .L237: adrp x0, v2 add x0, x0, :lo12:v2 ldrb w0, [x0] cmp w0, 0 bne .L238 adrp x0, _x_p4_c add x0, x0, :lo12:_x_p4_c ldr s0, [x0] fcmp s0, #0.0 beq .L239 .L238: adrp x0, delta add x0, x0, :lo12:delta ldr s0, [x0] fcmp s0, #0.0 bne .L239 adrp x0, p4_evt add x0, x0, :lo12:p4_evt ldrb w0, [x0] cmp w0, 0 beq .L239 adrp x0, p4_l3 add x0, x0, :lo12:p4_l3 ldrb w0, [x0] cmp w0, 0 bne .L239 adrp x0, p4_l2 add x0, x0, :lo12:p4_l2 ldrb w0, [x0] cmp w0, 0 bne .L239 adrp x0, p4_l0 add x0, x0, :lo12:p4_l0 ldrb w0, [x0] cmp w0, 0 beq .L239 adrp x0, p4_l1 add x0, x0, :lo12:p4_l1 ldrb w0, [x0] cmp w0, 0 beq .L239 adrp x0, _x_p4_l3 add x0, x0, :lo12:_x_p4_l3 ldrb w0, [x0] cmp w0, 0 bne .L239 adrp x0, _x_p4_l2 add x0, x0, :lo12:_x_p4_l2 ldrb w0, [x0] cmp w0, 0 beq .L239 adrp x0, _x_p4_l0 add x0, x0, :lo12:_x_p4_l0 ldrb w0, [x0] cmp w0, 0 bne .L239 adrp x0, _x_p4_l1 add x0, x0, :lo12:_x_p4_l1 ldrb w0, [x0] cmp w0, 0 beq .L117 .L239: adrp x0, v1 add x0, x0, :lo12:v1 ldr w1, [x0] adrp x0, _x_v1 add x0, x0, :lo12:_x_v1 ldr w0, [x0] cmp w1, w0 bne .L240 adrp x0, proposed4 add x0, x0, :lo12:proposed4 ldr s1, [x0] adrp x0, _x_proposed4 add x0, x0, :lo12:_x_proposed4 ldr s0, [x0] fcmp s1, s0 bne .L240 adrp x0, _x_p4_c add x0, x0, :lo12:_x_p4_c ldr s0, [x0] fcmp s0, #0.0 bne .L240 adrp x0, _x_v2 add x0, x0, :lo12:_x_v2 ldrb w0, [x0] cmp w0, 0 beq .L240 adrp x0, _x_p4_l3 add x0, x0, :lo12:_x_p4_l3 ldrb w0, [x0] cmp w0, 0 bne .L240 adrp x0, _x_p4_l2 add x0, x0, :lo12:_x_p4_l2 ldrb w0, [x0] cmp w0, 0 beq .L240 adrp x0, _x_p4_l0 add x0, x0, :lo12:_x_p4_l0 ldrb w0, [x0] cmp w0, 0 beq .L240 adrp x0, _x_p4_l1 add x0, x0, :lo12:_x_p4_l1 ldrb w0, [x0] cmp w0, 0 beq .L241 .L240: adrp x0, p4_l3 add x0, x0, :lo12:p4_l3 ldrb w0, [x0] cmp w0, 0 bne .L241 adrp x0, p4_l2 add x0, x0, :lo12:p4_l2 ldrb w0, [x0] cmp w0, 0 beq .L241 adrp x0, p4_l0 add x0, x0, :lo12:p4_l0 ldrb w0, [x0] cmp w0, 0 bne .L241 adrp x0, p4_l1 add x0, x0, :lo12:p4_l1 ldrb w0, [x0] cmp w0, 0 bne .L241 adrp x0, delta add x0, x0, :lo12:delta ldr s0, [x0] fcmp s0, #0.0 bne .L241 adrp x0, p4_evt add x0, x0, :lo12:p4_evt ldrb w0, [x0] cmp w0, 0 bne .L117 .L241: adrp x0, proposed4 add x0, x0, :lo12:proposed4 ldr s1, [x0] adrp x0, _x_proposed4 add x0, x0, :lo12:_x_proposed4 ldr s0, [x0] fcmp s1, s0 bne .L242 adrp x0, v2 add x0, x0, :lo12:v2 ldrb w0, [x0] cmp w0, 0 cset w0, eq and w1, w0, 255 adrp x0, _x_v2 add x0, x0, :lo12:_x_v2 ldrb w0, [x0] cmp w0, 0 cset w0, ne and w0, w0, 255 eor w0, w1, w0 and w0, w0, 255 cmp w0, 0 beq .L242 adrp x0, v1 add x0, x0, :lo12:v1 ldr w1, [x0] adrp x0, _x_v1 add x0, x0, :lo12:_x_v1 ldr w0, [x0] cmp w1, w0 bne .L242 adrp x0, p4_c add x0, x0, :lo12:p4_c ldr s1, [x0] adrp x0, _x_p4_c add x0, x0, :lo12:_x_p4_c ldr s0, [x0] fcmp s1, s0 bne .L242 adrp x0, _x_p4_l3 add x0, x0, :lo12:_x_p4_l3 ldrb w0, [x0] cmp w0, 0 bne .L243 adrp x0, _x_p4_l2 add x0, x0, :lo12:_x_p4_l2 ldrb w0, [x0] cmp w0, 0 bne .L243 adrp x0, _x_p4_l0 add x0, x0, :lo12:_x_p4_l0 ldrb w0, [x0] cmp w0, 0 bne .L243 adrp x0, _x_p4_l1 add x0, x0, :lo12:_x_p4_l1 ldrb w0, [x0] cmp w0, 0 beq .L244 .L243: adrp x0, _x_p4_l3 add x0, x0, :lo12:_x_p4_l3 ldrb w0, [x0] cmp w0, 0 bne .L242 adrp x0, _x_p4_l2 add x0, x0, :lo12:_x_p4_l2 ldrb w0, [x0] cmp w0, 0 beq .L242 adrp x0, _x_p4_l1 add x0, x0, :lo12:_x_p4_l1 ldrb w0, [x0] cmp w0, 0 beq .L242 adrp x0, _x_p4_l0 add x0, x0, :lo12:_x_p4_l0 ldrb w0, [x0] cmp w0, 0 beq .L244 .L242: adrp x0, p4_l3 add x0, x0, :lo12:p4_l3 ldrb w0, [x0] cmp w0, 0 bne .L244 adrp x0, p4_l2 add x0, x0, :lo12:p4_l2 ldrb w0, [x0] cmp w0, 0 beq .L244 adrp x0, p4_l0 add x0, x0, :lo12:p4_l0 ldrb w0, [x0] cmp w0, 0 beq .L244 adrp x0, p4_l1 add x0, x0, :lo12:p4_l1 ldrb w0, [x0] cmp w0, 0 bne .L244 adrp x0, delta add x0, x0, :lo12:delta ldr s0, [x0] fcmp s0, #0.0 bne .L244 adrp x0, p4_evt add x0, x0, :lo12:p4_evt ldrb w0, [x0] cmp w0, 0 bne .L117 .L244: adrp x0, v1 add x0, x0, :lo12:v1 ldr w0, [x0] cmp w0, 5 bne .L245 adrp x0, delta add x0, x0, :lo12:delta ldr s0, [x0] fcmp s0, #0.0 bne .L245 adrp x0, p4_evt add x0, x0, :lo12:p4_evt ldrb w0, [x0] cmp w0, 0 beq .L245 adrp x0, _x_p4_l3 add x0, x0, :lo12:_x_p4_l3 ldrb w0, [x0] cmp w0, 0 bne .L245 adrp x0, _x_p4_l2 add x0, x0, :lo12:_x_p4_l2 ldrb w0, [x0] cmp w0, 0 bne .L245 adrp x0, _x_p4_l0 add x0, x0, :lo12:_x_p4_l0 ldrb w0, [x0] cmp w0, 0 bne .L245 adrp x0, _x_p4_l1 add x0, x0, :lo12:_x_p4_l1 ldrb w0, [x0] cmp w0, 0 bne .L245 adrp x0, p4_l3 add x0, x0, :lo12:p4_l3 ldrb w0, [x0] cmp w0, 0 bne .L245 adrp x0, p4_l2 add x0, x0, :lo12:p4_l2 ldrb w0, [x0] cmp w0, 0 beq .L245 adrp x0, p4_l0 add x0, x0, :lo12:p4_l0 ldrb w0, [x0] cmp w0, 0 beq .L245 adrp x0, p4_l1 add x0, x0, :lo12:p4_l1 ldrb w0, [x0] cmp w0, 0 beq .L117 .L245: adrp x0, v1 add x0, x0, :lo12:v1 ldr w0, [x0] cmp w0, 5 beq .L246 adrp x0, delta add x0, x0, :lo12:delta ldr s0, [x0] fcmp s0, #0.0 bne .L246 adrp x0, p4_evt add x0, x0, :lo12:p4_evt ldrb w0, [x0] cmp w0, 0 beq .L246 adrp x0, p4_l3 add x0, x0, :lo12:p4_l3 ldrb w0, [x0] cmp w0, 0 bne .L246 adrp x0, p4_l2 add x0, x0, :lo12:p4_l2 ldrb w0, [x0] cmp w0, 0 beq .L246 adrp x0, p4_l0 add x0, x0, :lo12:p4_l0 ldrb w0, [x0] cmp w0, 0 beq .L246 adrp x0, p4_l1 add x0, x0, :lo12:p4_l1 ldrb w0, [x0] cmp w0, 0 bne .L246 adrp x0, _x_p4_l3 add x0, x0, :lo12:_x_p4_l3 ldrb w0, [x0] cmp w0, 0 bne .L246 adrp x0, _x_p4_l2 add x0, x0, :lo12:_x_p4_l2 ldrb w0, [x0] cmp w0, 0 beq .L246 adrp x0, _x_p4_l1 add x0, x0, :lo12:_x_p4_l1 ldrb w0, [x0] cmp w0, 0 beq .L246 adrp x0, _x_p4_l0 add x0, x0, :lo12:_x_p4_l0 ldrb w0, [x0] cmp w0, 0 beq .L117 .L246: adrp x0, proposed4 add x0, x0, :lo12:proposed4 ldr s1, [x0] adrp x0, _x_proposed4 add x0, x0, :lo12:_x_proposed4 ldr s0, [x0] fcmp s1, s0 bne .L247 adrp x0, v2 add x0, x0, :lo12:v2 ldrb w0, [x0] cmp w0, 0 cset w0, eq and w1, w0, 255 adrp x0, _x_v2 add x0, x0, :lo12:_x_v2 ldrb w0, [x0] cmp w0, 0 cset w0, ne and w0, w0, 255 eor w0, w1, w0 and w0, w0, 255 cmp w0, 0 beq .L247 adrp x0, v1 add x0, x0, :lo12:v1 ldr w1, [x0] adrp x0, _x_v1 add x0, x0, :lo12:_x_v1 ldr w0, [x0] cmp w1, w0 bne .L247 adrp x0, _x_p4_l3 add x0, x0, :lo12:_x_p4_l3 ldrb w0, [x0] cmp w0, 0 bne .L247 adrp x0, _x_p4_l2 add x0, x0, :lo12:_x_p4_l2 ldrb w0, [x0] cmp w0, 0 beq .L247 adrp x0, _x_p4_l0 add x0, x0, :lo12:_x_p4_l0 ldrb w0, [x0] cmp w0, 0 beq .L247 adrp x0, _x_p4_l1 add x0, x0, :lo12:_x_p4_l1 ldrb w0, [x0] cmp w0, 0 beq .L247 adrp x0, _x_p4_c add x0, x0, :lo12:_x_p4_c ldr s0, [x0] fcmp s0, #0.0 beq .L248 .L247: adrp x0, p4_l3 add x0, x0, :lo12:p4_l3 ldrb w0, [x0] cmp w0, 0 bne .L248 adrp x0, p4_l2 add x0, x0, :lo12:p4_l2 ldrb w0, [x0] cmp w0, 0 beq .L248 adrp x0, p4_l1 add x0, x0, :lo12:p4_l1 ldrb w0, [x0] cmp w0, 0 beq .L248 adrp x0, p4_l0 add x0, x0, :lo12:p4_l0 ldrb w0, [x0] cmp w0, 0 bne .L248 adrp x0, delta add x0, x0, :lo12:delta ldr s0, [x0] fcmp s0, #0.0 bne .L248 adrp x0, p4_evt add x0, x0, :lo12:p4_evt ldrb w0, [x0] cmp w0, 0 bne .L117 .L248: adrp x0, proposed4 add x0, x0, :lo12:proposed4 ldr s1, [x0] adrp x0, _x_proposed4 add x0, x0, :lo12:_x_proposed4 ldr s0, [x0] fcmp s1, s0 bne .L249 adrp x0, _x_v2 add x0, x0, :lo12:_x_v2 ldrb w0, [x0] cmp w0, 0 bne .L249 adrp x0, _x_p4_l3 add x0, x0, :lo12:_x_p4_l3 ldrb w0, [x0] cmp w0, 0 beq .L249 adrp x0, _x_p4_l2 add x0, x0, :lo12:_x_p4_l2 ldrb w0, [x0] cmp w0, 0 bne .L249 adrp x0, _x_p4_l0 add x0, x0, :lo12:_x_p4_l0 ldrb w0, [x0] cmp w0, 0 bne .L249 adrp x0, _x_p4_l1 add x0, x0, :lo12:_x_p4_l1 ldrb w0, [x0] cmp w0, 0 bne .L249 adrp x0, v1 add x0, x0, :lo12:v1 ldr w1, [x0] adrp x0, _x_v1 add x0, x0, :lo12:_x_v1 ldr w0, [x0] cmp w1, w0 bne .L249 adrp x0, _x_p4_c add x0, x0, :lo12:_x_p4_c ldr s0, [x0] fcmp s0, #0.0 beq .L250 .L249: adrp x0, p4_l3 add x0, x0, :lo12:p4_l3 ldrb w0, [x0] cmp w0, 0 bne .L250 adrp x0, p4_l2 add x0, x0, :lo12:p4_l2 ldrb w0, [x0] cmp w0, 0 beq .L250 adrp x0, p4_l0 add x0, x0, :lo12:p4_l0 ldrb w0, [x0] cmp w0, 0 beq .L250 adrp x0, p4_l1 add x0, x0, :lo12:p4_l1 ldrb w0, [x0] cmp w0, 0 beq .L250 adrp x0, delta add x0, x0, :lo12:delta ldr s0, [x0] fcmp s0, #0.0 bne .L250 adrp x0, p4_evt add x0, x0, :lo12:p4_evt ldrb w0, [x0] cmp w0, 0 bne .L117 .L250: adrp x0, proposed4 add x0, x0, :lo12:proposed4 ldr s1, [x0] adrp x0, _x_proposed4 add x0, x0, :lo12:_x_proposed4 ldr s0, [x0] fcmp s1, s0 bne .L251 adrp x0, _x_v1 add x0, x0, :lo12:_x_v1 ldr w0, [x0] cmp w0, 0 bne .L251 adrp x0, _x_p4_l3 add x0, x0, :lo12:_x_p4_l3 ldrb w0, [x0] cmp w0, 0 bne .L251 adrp x0, _x_p4_l2 add x0, x0, :lo12:_x_p4_l2 ldrb w0, [x0] cmp w0, 0 bne .L251 adrp x0, _x_p4_l0 add x0, x0, :lo12:_x_p4_l0 ldrb w0, [x0] cmp w0, 0 bne .L251 adrp x0, _x_p4_l1 add x0, x0, :lo12:_x_p4_l1 ldrb w0, [x0] cmp w0, 0 bne .L251 adrp x0, v2 add x0, x0, :lo12:v2 ldrb w0, [x0] cmp w0, 0 cset w0, eq and w1, w0, 255 adrp x0, _x_v2 add x0, x0, :lo12:_x_v2 ldrb w0, [x0] cmp w0, 0 cset w0, ne and w0, w0, 255 eor w0, w1, w0 and w0, w0, 255 cmp w0, 0 beq .L251 adrp x0, p4_c add x0, x0, :lo12:p4_c ldr s1, [x0] adrp x0, _x_p4_c add x0, x0, :lo12:_x_p4_c ldr s0, [x0] fcmp s1, s0 beq .L252 .L251: adrp x0, p4_l3 add x0, x0, :lo12:p4_l3 ldrb w0, [x0] cmp w0, 0 beq .L252 adrp x0, p4_l2 add x0, x0, :lo12:p4_l2 ldrb w0, [x0] cmp w0, 0 bne .L252 adrp x0, p4_l0 add x0, x0, :lo12:p4_l0 ldrb w0, [x0] cmp w0, 0 bne .L252 adrp x0, p4_l1 add x0, x0, :lo12:p4_l1 ldrb w0, [x0] cmp w0, 0 bne .L252 adrp x0, delta add x0, x0, :lo12:delta ldr s0, [x0] fcmp s0, #0.0 bne .L252 adrp x0, p4_evt add x0, x0, :lo12:p4_evt ldrb w0, [x0] cmp w0, 0 bne .L117 .L252: adrp x0, _x_p3_l3 add x0, x0, :lo12:_x_p3_l3 ldrb w0, [x0] cmp w0, 0 beq .L253 adrp x0, _x_p3_l2 add x0, x0, :lo12:_x_p3_l2 ldrb w0, [x0] cmp w0, 0 bne .L253 adrp x0, _x_p3_l0 add x0, x0, :lo12:_x_p3_l0 ldrb w0, [x0] cmp w0, 0 bne .L253 adrp x0, _x_p3_l1 add x0, x0, :lo12:_x_p3_l1 ldrb w0, [x0] cmp w0, 0 beq .L254 .L253: adrp x0, _x_p3_l3 add x0, x0, :lo12:_x_p3_l3 ldrb w0, [x0] cmp w0, 0 bne .L255 adrp x0, _x_p3_l2 add x0, x0, :lo12:_x_p3_l2 ldrb w0, [x0] cmp w0, 0 beq .L255 adrp x0, _x_p3_l0 add x0, x0, :lo12:_x_p3_l0 ldrb w0, [x0] cmp w0, 0 beq .L255 adrp x0, _x_p3_l1 add x0, x0, :lo12:_x_p3_l1 ldrb w0, [x0] cmp w0, 0 bne .L254 .L255: adrp x0, _x_p3_l3 add x0, x0, :lo12:_x_p3_l3 ldrb w0, [x0] cmp w0, 0 bne .L256 adrp x0, _x_p3_l2 add x0, x0, :lo12:_x_p3_l2 ldrb w0, [x0] cmp w0, 0 beq .L256 adrp x0, _x_p3_l1 add x0, x0, :lo12:_x_p3_l1 ldrb w0, [x0] cmp w0, 0 beq .L256 adrp x0, _x_p3_l0 add x0, x0, :lo12:_x_p3_l0 ldrb w0, [x0] cmp w0, 0 beq .L254 .L256: adrp x0, _x_p3_l3 add x0, x0, :lo12:_x_p3_l3 ldrb w0, [x0] cmp w0, 0 bne .L257 adrp x0, _x_p3_l2 add x0, x0, :lo12:_x_p3_l2 ldrb w0, [x0] cmp w0, 0 beq .L257 adrp x0, _x_p3_l0 add x0, x0, :lo12:_x_p3_l0 ldrb w0, [x0] cmp w0, 0 beq .L257 adrp x0, _x_p3_l1 add x0, x0, :lo12:_x_p3_l1 ldrb w0, [x0] cmp w0, 0 beq .L254 .L257: adrp x0, _x_p3_l3 add x0, x0, :lo12:_x_p3_l3 ldrb w0, [x0] cmp w0, 0 bne .L258 adrp x0, _x_p3_l2 add x0, x0, :lo12:_x_p3_l2 ldrb w0, [x0] cmp w0, 0 beq .L258 adrp x0, _x_p3_l0 add x0, x0, :lo12:_x_p3_l0 ldrb w0, [x0] cmp w0, 0 bne .L258 adrp x0, _x_p3_l1 add x0, x0, :lo12:_x_p3_l1 ldrb w0, [x0] cmp w0, 0 beq .L254 .L258: adrp x0, _x_p3_l3 add x0, x0, :lo12:_x_p3_l3 ldrb w0, [x0] cmp w0, 0 bne .L259 adrp x0, _x_p3_l2 add x0, x0, :lo12:_x_p3_l2 ldrb w0, [x0] cmp w0, 0 bne .L259 adrp x0, _x_p3_l0 add x0, x0, :lo12:_x_p3_l0 ldrb w0, [x0] cmp w0, 0 beq .L259 adrp x0, _x_p3_l1 add x0, x0, :lo12:_x_p3_l1 ldrb w0, [x0] cmp w0, 0 bne .L254 .L259: adrp x0, _x_p3_l3 add x0, x0, :lo12:_x_p3_l3 ldrb w0, [x0] cmp w0, 0 bne .L260 adrp x0, _x_p3_l2 add x0, x0, :lo12:_x_p3_l2 ldrb w0, [x0] cmp w0, 0 bne .L260 adrp x0, _x_p3_l1 add x0, x0, :lo12:_x_p3_l1 ldrb w0, [x0] cmp w0, 0 beq .L260 adrp x0, _x_p3_l0 add x0, x0, :lo12:_x_p3_l0 ldrb w0, [x0] cmp w0, 0 beq .L254 .L260: adrp x0, _x_p3_l3 add x0, x0, :lo12:_x_p3_l3 ldrb w0, [x0] cmp w0, 0 bne .L261 adrp x0, _x_p3_l2 add x0, x0, :lo12:_x_p3_l2 ldrb w0, [x0] cmp w0, 0 bne .L261 adrp x0, _x_p3_l0 add x0, x0, :lo12:_x_p3_l0 ldrb w0, [x0] cmp w0, 0 bne .L261 adrp x0, _x_p3_l1 add x0, x0, :lo12:_x_p3_l1 ldrb w0, [x0] cmp w0, 0 beq .L254 .L261: adrp x0, _x_p3_l3 add x0, x0, :lo12:_x_p3_l3 ldrb w0, [x0] cmp w0, 0 bne .L117 adrp x0, _x_p3_l2 add x0, x0, :lo12:_x_p3_l2 ldrb w0, [x0] cmp w0, 0 bne .L117 adrp x0, _x_p3_l0 add x0, x0, :lo12:_x_p3_l0 ldrb w0, [x0] cmp w0, 0 beq .L117 adrp x0, _x_p3_l1 add x0, x0, :lo12:_x_p3_l1 ldrb w0, [x0] cmp w0, 0 bne .L117 .L254: adrp x0, _x_p3_c add x0, x0, :lo12:_x_p3_c ldr s1, [x0] adrp x0, _x_proposed3 add x0, x0, :lo12:_x_proposed3 ldr s0, [x0] fcmpe s1, s0 bls .L262 adrp x0, _x_p3_l3 add x0, x0, :lo12:_x_p3_l3 ldrb w0, [x0] cmp w0, 0 bne .L263 adrp x0, _x_p3_l2 add x0, x0, :lo12:_x_p3_l2 ldrb w0, [x0] cmp w0, 0 bne .L263 adrp x0, _x_p3_l0 add x0, x0, :lo12:_x_p3_l0 ldrb w0, [x0] cmp w0, 0 beq .L263 adrp x0, _x_p3_l1 add x0, x0, :lo12:_x_p3_l1 ldrb w0, [x0] cmp w0, 0 beq .L117 .L263: adrp x0, _x_p3_l3 add x0, x0, :lo12:_x_p3_l3 ldrb w0, [x0] cmp w0, 0 bne .L264 adrp x0, _x_p3_l2 add x0, x0, :lo12:_x_p3_l2 ldrb w0, [x0] cmp w0, 0 beq .L264 adrp x0, _x_p3_l0 add x0, x0, :lo12:_x_p3_l0 ldrb w0, [x0] cmp w0, 0 bne .L264 adrp x0, _x_p3_l1 add x0, x0, :lo12:_x_p3_l1 ldrb w0, [x0] cmp w0, 0 beq .L117 .L264: adrp x0, _x_p3_l3 add x0, x0, :lo12:_x_p3_l3 ldrb w0, [x0] cmp w0, 0 bne .L265 adrp x0, _x_p3_l2 add x0, x0, :lo12:_x_p3_l2 ldrb w0, [x0] cmp w0, 0 beq .L265 adrp x0, _x_p3_l0 add x0, x0, :lo12:_x_p3_l0 ldrb w0, [x0] cmp w0, 0 beq .L265 adrp x0, _x_p3_l1 add x0, x0, :lo12:_x_p3_l1 ldrb w0, [x0] cmp w0, 0 bne .L117 .L265: adrp x0, _x_p3_l3 add x0, x0, :lo12:_x_p3_l3 ldrb w0, [x0] cmp w0, 0 beq .L262 adrp x0, _x_p3_l2 add x0, x0, :lo12:_x_p3_l2 ldrb w0, [x0] cmp w0, 0 bne .L262 adrp x0, _x_p3_l0 add x0, x0, :lo12:_x_p3_l0 ldrb w0, [x0] cmp w0, 0 bne .L262 adrp x0, _x_p3_l1 add x0, x0, :lo12:_x_p3_l1 ldrb w0, [x0] cmp w0, 0 beq .L117 .L262: adrp x0, p3_l0 add x0, x0, :lo12:p3_l0 ldrb w0, [x0] cmp w0, 0 cset w0, eq and w1, w0, 255 adrp x0, _x_p3_l0 add x0, x0, :lo12:_x_p3_l0 ldrb w0, [x0] cmp w0, 0 cset w0, ne and w0, w0, 255 eor w0, w1, w0 and w0, w0, 255 cmp w0, 0 beq .L266 adrp x0, p3_l1 add x0, x0, :lo12:p3_l1 ldrb w0, [x0] cmp w0, 0 cset w0, eq and w1, w0, 255 adrp x0, _x_p3_l1 add x0, x0, :lo12:_x_p3_l1 ldrb w0, [x0] cmp w0, 0 cset w0, ne and w0, w0, 255 eor w0, w1, w0 and w0, w0, 255 cmp w0, 0 beq .L266 adrp x0, p3_l2 add x0, x0, :lo12:p3_l2 ldrb w0, [x0] cmp w0, 0 cset w0, eq and w1, w0, 255 adrp x0, _x_p3_l2 add x0, x0, :lo12:_x_p3_l2 ldrb w0, [x0] cmp w0, 0 cset w0, ne and w0, w0, 255 eor w0, w1, w0 and w0, w0, 255 cmp w0, 0 beq .L266 adrp x0, p3_l3 add x0, x0, :lo12:p3_l3 ldrb w0, [x0] cmp w0, 0 cset w0, eq and w1, w0, 255 adrp x0, _x_p3_l3 add x0, x0, :lo12:_x_p3_l3 ldrb w0, [x0] cmp w0, 0 cset w0, ne and w0, w0, 255 eor w0, w1, w0 and w0, w0, 255 cmp w0, 0 beq .L266 adrp x0, delta add x0, x0, :lo12:delta ldr s0, [x0] fcvt d1, s0 adrp x0, p3_c add x0, x0, :lo12:p3_c ldr s0, [x0] fcvt d2, s0 adrp x0, _x_p3_c add x0, x0, :lo12:_x_p3_c ldr s0, [x0] fcvt d0, s0 fsub d0, d2, d0 fadd d0, d1, d0 fcmp d0, #0.0 bne .L266 adrp x0, proposed3 add x0, x0, :lo12:proposed3 ldr s1, [x0] adrp x0, _x_proposed3 add x0, x0, :lo12:_x_proposed3 ldr s0, [x0] fcmp s1, s0 beq .L267 .L266: adrp x0, delta add x0, x0, :lo12:delta ldr s0, [x0] fcmpe s0, #0.0 bls .L473 b .L117 .L473: adrp x0, p3_evt add x0, x0, :lo12:p3_evt ldrb w0, [x0] cmp w0, 0 beq .L117 .L267: adrp x0, v1 add x0, x0, :lo12:v1 ldr w0, [x0] cmp w0, 0 bne .L269 adrp x0, _x_p3_l3 add x0, x0, :lo12:_x_p3_l3 ldrb w0, [x0] cmp w0, 0 bne .L269 adrp x0, _x_p3_l2 add x0, x0, :lo12:_x_p3_l2 ldrb w0, [x0] cmp w0, 0 bne .L269 adrp x0, _x_p3_l0 add x0, x0, :lo12:_x_p3_l0 ldrb w0, [x0] cmp w0, 0 beq .L269 adrp x0, _x_p3_l1 add x0, x0, :lo12:_x_p3_l1 ldrb w0, [x0] cmp w0, 0 bne .L269 adrp x0, v2 add x0, x0, :lo12:v2 ldrb w0, [x0] cmp w0, 0 cset w0, eq and w1, w0, 255 adrp x0, _x_v2 add x0, x0, :lo12:_x_v2 ldrb w0, [x0] cmp w0, 0 cset w0, ne and w0, w0, 255 eor w0, w1, w0 and w0, w0, 255 cmp w0, 0 beq .L269 adrp x0, _x_p3_c add x0, x0, :lo12:_x_p3_c ldr s0, [x0] fcmp s0, #0.0 bne .L269 adrp x0, v1 add x0, x0, :lo12:v1 ldr w1, [x0] adrp x0, _x_v1 add x0, x0, :lo12:_x_v1 ldr w0, [x0] cmp w1, w0 bne .L269 adrp x0, proposed3 add x0, x0, :lo12:proposed3 ldr s1, [x0] adrp x0, _x_proposed3 add x0, x0, :lo12:_x_proposed3 ldr s0, [x0] fcmp s1, s0 beq .L270 .L269: adrp x0, p3_l3 add x0, x0, :lo12:p3_l3 ldrb w0, [x0] cmp w0, 0 bne .L270 adrp x0, p3_l2 add x0, x0, :lo12:p3_l2 ldrb w0, [x0] cmp w0, 0 bne .L270 adrp x0, p3_l0 add x0, x0, :lo12:p3_l0 ldrb w0, [x0] cmp w0, 0 bne .L270 adrp x0, p3_l1 add x0, x0, :lo12:p3_l1 ldrb w0, [x0] cmp w0, 0 bne .L270 adrp x0, delta add x0, x0, :lo12:delta ldr s0, [x0] fcmp s0, #0.0 bne .L270 adrp x0, p3_evt add x0, x0, :lo12:p3_evt ldrb w0, [x0] cmp w0, 0 bne .L117 .L270: adrp x0, proposed3 add x0, x0, :lo12:proposed3 ldr s1, [x0] adrp x0, _x_proposed3 add x0, x0, :lo12:_x_proposed3 ldr s0, [x0] fcmp s1, s0 bne .L271 adrp x0, v2 add x0, x0, :lo12:v2 ldrb w0, [x0] cmp w0, 0 cset w0, eq and w1, w0, 255 adrp x0, _x_v2 add x0, x0, :lo12:_x_v2 ldrb w0, [x0] cmp w0, 0 cset w0, ne and w0, w0, 255 eor w0, w1, w0 and w0, w0, 255 cmp w0, 0 beq .L271 adrp x0, _x_p3_c add x0, x0, :lo12:_x_p3_c ldr s0, [x0] fcmp s0, #0.0 bne .L271 adrp x0, _x_p3_l3 add x0, x0, :lo12:_x_p3_l3 ldrb w0, [x0] cmp w0, 0 bne .L271 adrp x0, _x_p3_l2 add x0, x0, :lo12:_x_p3_l2 ldrb w0, [x0] cmp w0, 0 bne .L271 adrp x0, _x_p3_l1 add x0, x0, :lo12:_x_p3_l1 ldrb w0, [x0] cmp w0, 0 beq .L271 adrp x0, _x_p3_l0 add x0, x0, :lo12:_x_p3_l0 ldrb w0, [x0] cmp w0, 0 bne .L271 adrp x0, _x_v1 add x0, x0, :lo12:_x_v1 ldr w0, [x0] cmp w0, 4 beq .L272 .L271: adrp x0, p3_l3 add x0, x0, :lo12:p3_l3 ldrb w0, [x0] cmp w0, 0 bne .L272 adrp x0, p3_l2 add x0, x0, :lo12:p3_l2 ldrb w0, [x0] cmp w0, 0 bne .L272 adrp x0, p3_l0 add x0, x0, :lo12:p3_l0 ldrb w0, [x0] cmp w0, 0 beq .L272 adrp x0, p3_l1 add x0, x0, :lo12:p3_l1 ldrb w0, [x0] cmp w0, 0 bne .L272 adrp x0, delta add x0, x0, :lo12:delta ldr s0, [x0] fcmp s0, #0.0 bne .L272 adrp x0, p3_evt add x0, x0, :lo12:p3_evt ldrb w0, [x0] cmp w0, 0 bne .L117 .L272: adrp x0, v2 add x0, x0, :lo12:v2 ldrb w0, [x0] cmp w0, 0 cset w0, eq and w1, w0, 255 adrp x0, _x_v2 add x0, x0, :lo12:_x_v2 ldrb w0, [x0] cmp w0, 0 cset w0, ne and w0, w0, 255 eor w0, w1, w0 and w0, w0, 255 cmp w0, 0 beq .L273 adrp x0, v1 add x0, x0, :lo12:v1 ldr w1, [x0] adrp x0, _x_v1 add x0, x0, :lo12:_x_v1 ldr w0, [x0] cmp w1, w0 bne .L273 adrp x0, _x_p3_l3 add x0, x0, :lo12:_x_p3_l3 ldrb w0, [x0] cmp w0, 0 bne .L274 adrp x0, _x_p3_l2 add x0, x0, :lo12:_x_p3_l2 ldrb w0, [x0] cmp w0, 0 bne .L274 adrp x0, _x_p3_l0 add x0, x0, :lo12:_x_p3_l0 ldrb w0, [x0] cmp w0, 0 bne .L274 adrp x0, _x_p3_l1 add x0, x0, :lo12:_x_p3_l1 ldrb w0, [x0] cmp w0, 0 beq .L275 .L274: adrp x0, _x_p3_l3 add x0, x0, :lo12:_x_p3_l3 ldrb w0, [x0] cmp w0, 0 bne .L273 adrp x0, _x_p3_l2 add x0, x0, :lo12:_x_p3_l2 ldrb w0, [x0] cmp w0, 0 bne .L273 adrp x0, _x_p3_l0 add x0, x0, :lo12:_x_p3_l0 ldrb w0, [x0] cmp w0, 0 beq .L273 adrp x0, _x_p3_l1 add x0, x0, :lo12:_x_p3_l1 ldrb w0, [x0] cmp w0, 0 beq .L273 .L275: adrp x0, p3_c add x0, x0, :lo12:p3_c ldr s1, [x0] adrp x0, _x_p3_c add x0, x0, :lo12:_x_p3_c ldr s0, [x0] fcmp s1, s0 beq .L276 .L273: adrp x0, p3_l3 add x0, x0, :lo12:p3_l3 ldrb w0, [x0] cmp w0, 0 bne .L276 adrp x0, p3_l2 add x0, x0, :lo12:p3_l2 ldrb w0, [x0] cmp w0, 0 bne .L276 adrp x0, p3_l1 add x0, x0, :lo12:p3_l1 ldrb w0, [x0] cmp w0, 0 beq .L276 adrp x0, p3_l0 add x0, x0, :lo12:p3_l0 ldrb w0, [x0] cmp w0, 0 bne .L276 adrp x0, delta add x0, x0, :lo12:delta ldr s0, [x0] fcmp s0, #0.0 bne .L276 adrp x0, p3_evt add x0, x0, :lo12:p3_evt ldrb w0, [x0] cmp w0, 0 bne .L117 .L276: adrp x0, proposed3 add x0, x0, :lo12:proposed3 ldr s1, [x0] adrp x0, _x_proposed3 add x0, x0, :lo12:_x_proposed3 ldr s0, [x0] fcmp s1, s0 bne .L277 adrp x0, v1 add x0, x0, :lo12:v1 ldr w0, [x0] cmp w0, 4 bne .L278 .L277: adrp x0, delta add x0, x0, :lo12:delta ldr s0, [x0] fcmp s0, #0.0 bne .L278 adrp x0, p3_evt add x0, x0, :lo12:p3_evt ldrb w0, [x0] cmp w0, 0 beq .L278 adrp x0, _x_p3_l3 add x0, x0, :lo12:_x_p3_l3 ldrb w0, [x0] cmp w0, 0 bne .L278 adrp x0, _x_p3_l2 add x0, x0, :lo12:_x_p3_l2 ldrb w0, [x0] cmp w0, 0 bne .L278 adrp x0, _x_p3_l0 add x0, x0, :lo12:_x_p3_l0 ldrb w0, [x0] cmp w0, 0 bne .L278 adrp x0, _x_p3_l1 add x0, x0, :lo12:_x_p3_l1 ldrb w0, [x0] cmp w0, 0 bne .L278 adrp x0, p3_l3 add x0, x0, :lo12:p3_l3 ldrb w0, [x0] cmp w0, 0 bne .L278 adrp x0, p3_l2 add x0, x0, :lo12:p3_l2 ldrb w0, [x0] cmp w0, 0 bne .L278 adrp x0, p3_l1 add x0, x0, :lo12:p3_l1 ldrb w0, [x0] cmp w0, 0 beq .L278 adrp x0, p3_l0 add x0, x0, :lo12:p3_l0 ldrb w0, [x0] cmp w0, 0 beq .L117 .L278: adrp x0, v1 add x0, x0, :lo12:v1 ldr w0, [x0] cmp w0, 4 bne .L279 adrp x0, p3_c add x0, x0, :lo12:p3_c ldr s1, [x0] adrp x0, max_prop add x0, x0, :lo12:max_prop ldr s0, [x0] fcmpe s1, s0 cset w0, ls and w0, w0, 255 eor w0, w0, 1 and w0, w0, 255 cmp w0, 0 beq .L279 adrp x0, proposed3 add x0, x0, :lo12:proposed3 ldr s1, [x0] adrp x0, _x_proposed3 add x0, x0, :lo12:_x_proposed3 ldr s0, [x0] fcmpe s1, s0 cset w0, ls and w0, w0, 255 eor w0, w0, 1 and w0, w0, 255 cmp w0, 0 bne .L280 .L279: adrp x0, delta add x0, x0, :lo12:delta ldr s0, [x0] fcmp s0, #0.0 bne .L280 adrp x0, p3_evt add x0, x0, :lo12:p3_evt ldrb w0, [x0] cmp w0, 0 beq .L280 adrp x0, p3_l3 add x0, x0, :lo12:p3_l3 ldrb w0, [x0] cmp w0, 0 bne .L280 adrp x0, p3_l2 add x0, x0, :lo12:p3_l2 ldrb w0, [x0] cmp w0, 0 bne .L280 adrp x0, p3_l1 add x0, x0, :lo12:p3_l1 ldrb w0, [x0] cmp w0, 0 beq .L280 adrp x0, p3_l0 add x0, x0, :lo12:p3_l0 ldrb w0, [x0] cmp w0, 0 bne .L280 adrp x0, _x_p3_l3 add x0, x0, :lo12:_x_p3_l3 ldrb w0, [x0] cmp w0, 0 bne .L280 adrp x0, _x_p3_l2 add x0, x0, :lo12:_x_p3_l2 ldrb w0, [x0] cmp w0, 0 bne .L280 adrp x0, _x_p3_l0 add x0, x0, :lo12:_x_p3_l0 ldrb w0, [x0] cmp w0, 0 beq .L280 adrp x0, _x_p3_l1 add x0, x0, :lo12:_x_p3_l1 ldrb w0, [x0] cmp w0, 0 bne .L117 .L280: adrp x0, v2 add x0, x0, :lo12:v2 ldrb w0, [x0] cmp w0, 0 cset w0, eq and w1, w0, 255 adrp x0, _x_v2 add x0, x0, :lo12:_x_v2 ldrb w0, [x0] cmp w0, 0 cset w0, ne and w0, w0, 255 eor w0, w1, w0 and w0, w0, 255 cmp w0, 0 beq .L281 adrp x0, v1 add x0, x0, :lo12:v1 ldr w1, [x0] adrp x0, _x_v1 add x0, x0, :lo12:_x_v1 ldr w0, [x0] cmp w1, w0 bne .L281 adrp x0, proposed3 add x0, x0, :lo12:proposed3 ldr s1, [x0] adrp x0, _x_proposed3 add x0, x0, :lo12:_x_proposed3 ldr s0, [x0] fcmp s1, s0 bne .L281 adrp x0, _x_p3_l3 add x0, x0, :lo12:_x_p3_l3 ldrb w0, [x0] cmp w0, 0 bne .L282 adrp x0, _x_p3_l2 add x0, x0, :lo12:_x_p3_l2 ldrb w0, [x0] cmp w0, 0 bne .L282 adrp x0, _x_p3_l0 add x0, x0, :lo12:_x_p3_l0 ldrb w0, [x0] cmp w0, 0 bne .L282 adrp x0, _x_p3_l1 add x0, x0, :lo12:_x_p3_l1 ldrb w0, [x0] cmp w0, 0 beq .L283 .L282: adrp x0, _x_p3_l3 add x0, x0, :lo12:_x_p3_l3 ldrb w0, [x0] cmp w0, 0 bne .L281 adrp x0, _x_p3_l2 add x0, x0, :lo12:_x_p3_l2 ldrb w0, [x0] cmp w0, 0 beq .L281 adrp x0, _x_p3_l0 add x0, x0, :lo12:_x_p3_l0 ldrb w0, [x0] cmp w0, 0 bne .L281 adrp x0, _x_p3_l1 add x0, x0, :lo12:_x_p3_l1 ldrb w0, [x0] cmp w0, 0 beq .L283 .L281: adrp x0, p3_l3 add x0, x0, :lo12:p3_l3 ldrb w0, [x0] cmp w0, 0 bne .L283 adrp x0, p3_l2 add x0, x0, :lo12:p3_l2 ldrb w0, [x0] cmp w0, 0 bne .L283 adrp x0, p3_l0 add x0, x0, :lo12:p3_l0 ldrb w0, [x0] cmp w0, 0 beq .L283 adrp x0, p3_l1 add x0, x0, :lo12:p3_l1 ldrb w0, [x0] cmp w0, 0 beq .L283 adrp x0, delta add x0, x0, :lo12:delta ldr s0, [x0] fcmp s0, #0.0 bne .L283 adrp x0, p3_evt add x0, x0, :lo12:p3_evt ldrb w0, [x0] cmp w0, 0 bne .L117 .L283: adrp x0, v2 add x0, x0, :lo12:v2 ldrb w0, [x0] cmp w0, 0 beq .L284 adrp x0, p3_c add x0, x0, :lo12:p3_c ldr s1, [x0] adrp x0, _x_p3_c add x0, x0, :lo12:_x_p3_c ldr s0, [x0] fcmp s1, s0 beq .L285 .L284: adrp x0, delta add x0, x0, :lo12:delta ldr s0, [x0] fcmp s0, #0.0 bne .L285 adrp x0, p3_evt add x0, x0, :lo12:p3_evt ldrb w0, [x0] cmp w0, 0 beq .L285 adrp x0, _x_p3_l3 add x0, x0, :lo12:_x_p3_l3 ldrb w0, [x0] cmp w0, 0 bne .L285 adrp x0, _x_p3_l2 add x0, x0, :lo12:_x_p3_l2 ldrb w0, [x0] cmp w0, 0 bne .L285 adrp x0, _x_p3_l0 add x0, x0, :lo12:_x_p3_l0 ldrb w0, [x0] cmp w0, 0 bne .L285 adrp x0, _x_p3_l1 add x0, x0, :lo12:_x_p3_l1 ldrb w0, [x0] cmp w0, 0 bne .L285 adrp x0, p3_l3 add x0, x0, :lo12:p3_l3 ldrb w0, [x0] cmp w0, 0 bne .L285 adrp x0, p3_l2 add x0, x0, :lo12:p3_l2 ldrb w0, [x0] cmp w0, 0 bne .L285 adrp x0, p3_l0 add x0, x0, :lo12:p3_l0 ldrb w0, [x0] cmp w0, 0 beq .L285 adrp x0, p3_l1 add x0, x0, :lo12:p3_l1 ldrb w0, [x0] cmp w0, 0 bne .L117 .L285: adrp x0, v2 add x0, x0, :lo12:v2 ldrb w0, [x0] cmp w0, 0 bne .L286 adrp x0, _x_p3_c add x0, x0, :lo12:_x_p3_c ldr s0, [x0] fcmp s0, #0.0 beq .L287 .L286: adrp x0, delta add x0, x0, :lo12:delta ldr s0, [x0] fcmp s0, #0.0 bne .L287 adrp x0, p3_evt add x0, x0, :lo12:p3_evt ldrb w0, [x0] cmp w0, 0 beq .L287 adrp x0, p3_l3 add x0, x0, :lo12:p3_l3 ldrb w0, [x0] cmp w0, 0 bne .L287 adrp x0, p3_l2 add x0, x0, :lo12:p3_l2 ldrb w0, [x0] cmp w0, 0 bne .L287 adrp x0, p3_l0 add x0, x0, :lo12:p3_l0 ldrb w0, [x0] cmp w0, 0 beq .L287 adrp x0, p3_l1 add x0, x0, :lo12:p3_l1 ldrb w0, [x0] cmp w0, 0 beq .L287 adrp x0, _x_p3_l3 add x0, x0, :lo12:_x_p3_l3 ldrb w0, [x0] cmp w0, 0 bne .L287 adrp x0, _x_p3_l2 add x0, x0, :lo12:_x_p3_l2 ldrb w0, [x0] cmp w0, 0 beq .L287 adrp x0, _x_p3_l0 add x0, x0, :lo12:_x_p3_l0 ldrb w0, [x0] cmp w0, 0 bne .L287 adrp x0, _x_p3_l1 add x0, x0, :lo12:_x_p3_l1 ldrb w0, [x0] cmp w0, 0 beq .L117 .L287: adrp x0, v1 add x0, x0, :lo12:v1 ldr w1, [x0] adrp x0, _x_v1 add x0, x0, :lo12:_x_v1 ldr w0, [x0] cmp w1, w0 bne .L288 adrp x0, proposed3 add x0, x0, :lo12:proposed3 ldr s1, [x0] adrp x0, _x_proposed3 add x0, x0, :lo12:_x_proposed3 ldr s0, [x0] fcmp s1, s0 bne .L288 adrp x0, _x_p3_c add x0, x0, :lo12:_x_p3_c ldr s0, [x0] fcmp s0, #0.0 bne .L288 adrp x0, _x_v2 add x0, x0, :lo12:_x_v2 ldrb w0, [x0] cmp w0, 0 beq .L288 adrp x0, _x_p3_l3 add x0, x0, :lo12:_x_p3_l3 ldrb w0, [x0] cmp w0, 0 bne .L288 adrp x0, _x_p3_l2 add x0, x0, :lo12:_x_p3_l2 ldrb w0, [x0] cmp w0, 0 beq .L288 adrp x0, _x_p3_l0 add x0, x0, :lo12:_x_p3_l0 ldrb w0, [x0] cmp w0, 0 beq .L288 adrp x0, _x_p3_l1 add x0, x0, :lo12:_x_p3_l1 ldrb w0, [x0] cmp w0, 0 beq .L289 .L288: adrp x0, p3_l3 add x0, x0, :lo12:p3_l3 ldrb w0, [x0] cmp w0, 0 bne .L289 adrp x0, p3_l2 add x0, x0, :lo12:p3_l2 ldrb w0, [x0] cmp w0, 0 beq .L289 adrp x0, p3_l0 add x0, x0, :lo12:p3_l0 ldrb w0, [x0] cmp w0, 0 bne .L289 adrp x0, p3_l1 add x0, x0, :lo12:p3_l1 ldrb w0, [x0] cmp w0, 0 bne .L289 adrp x0, delta add x0, x0, :lo12:delta ldr s0, [x0] fcmp s0, #0.0 bne .L289 adrp x0, p3_evt add x0, x0, :lo12:p3_evt ldrb w0, [x0] cmp w0, 0 bne .L117 .L289: adrp x0, proposed3 add x0, x0, :lo12:proposed3 ldr s1, [x0] adrp x0, _x_proposed3 add x0, x0, :lo12:_x_proposed3 ldr s0, [x0] fcmp s1, s0 bne .L290 adrp x0, v2 add x0, x0, :lo12:v2 ldrb w0, [x0] cmp w0, 0 cset w0, eq and w1, w0, 255 adrp x0, _x_v2 add x0, x0, :lo12:_x_v2 ldrb w0, [x0] cmp w0, 0 cset w0, ne and w0, w0, 255 eor w0, w1, w0 and w0, w0, 255 cmp w0, 0 beq .L290 adrp x0, v1 add x0, x0, :lo12:v1 ldr w1, [x0] adrp x0, _x_v1 add x0, x0, :lo12:_x_v1 ldr w0, [x0] cmp w1, w0 bne .L290 adrp x0, p3_c add x0, x0, :lo12:p3_c ldr s1, [x0] adrp x0, _x_p3_c add x0, x0, :lo12:_x_p3_c ldr s0, [x0] fcmp s1, s0 bne .L290 adrp x0, _x_p3_l3 add x0, x0, :lo12:_x_p3_l3 ldrb w0, [x0] cmp w0, 0 bne .L291 adrp x0, _x_p3_l2 add x0, x0, :lo12:_x_p3_l2 ldrb w0, [x0] cmp w0, 0 bne .L291 adrp x0, _x_p3_l0 add x0, x0, :lo12:_x_p3_l0 ldrb w0, [x0] cmp w0, 0 bne .L291 adrp x0, _x_p3_l1 add x0, x0, :lo12:_x_p3_l1 ldrb w0, [x0] cmp w0, 0 beq .L292 .L291: adrp x0, _x_p3_l3 add x0, x0, :lo12:_x_p3_l3 ldrb w0, [x0] cmp w0, 0 bne .L290 adrp x0, _x_p3_l2 add x0, x0, :lo12:_x_p3_l2 ldrb w0, [x0] cmp w0, 0 beq .L290 adrp x0, _x_p3_l1 add x0, x0, :lo12:_x_p3_l1 ldrb w0, [x0] cmp w0, 0 beq .L290 adrp x0, _x_p3_l0 add x0, x0, :lo12:_x_p3_l0 ldrb w0, [x0] cmp w0, 0 beq .L292 .L290: adrp x0, p3_l3 add x0, x0, :lo12:p3_l3 ldrb w0, [x0] cmp w0, 0 bne .L292 adrp x0, p3_l2 add x0, x0, :lo12:p3_l2 ldrb w0, [x0] cmp w0, 0 beq .L292 adrp x0, p3_l0 add x0, x0, :lo12:p3_l0 ldrb w0, [x0] cmp w0, 0 beq .L292 adrp x0, p3_l1 add x0, x0, :lo12:p3_l1 ldrb w0, [x0] cmp w0, 0 bne .L292 adrp x0, delta add x0, x0, :lo12:delta ldr s0, [x0] fcmp s0, #0.0 bne .L292 adrp x0, p3_evt add x0, x0, :lo12:p3_evt ldrb w0, [x0] cmp w0, 0 bne .L117 .L292: adrp x0, v1 add x0, x0, :lo12:v1 ldr w0, [x0] cmp w0, 4 bne .L293 adrp x0, delta add x0, x0, :lo12:delta ldr s0, [x0] fcmp s0, #0.0 bne .L293 adrp x0, p3_evt add x0, x0, :lo12:p3_evt ldrb w0, [x0] cmp w0, 0 beq .L293 adrp x0, _x_p3_l3 add x0, x0, :lo12:_x_p3_l3 ldrb w0, [x0] cmp w0, 0 bne .L293 adrp x0, _x_p3_l2 add x0, x0, :lo12:_x_p3_l2 ldrb w0, [x0] cmp w0, 0 bne .L293 adrp x0, _x_p3_l0 add x0, x0, :lo12:_x_p3_l0 ldrb w0, [x0] cmp w0, 0 bne .L293 adrp x0, _x_p3_l1 add x0, x0, :lo12:_x_p3_l1 ldrb w0, [x0] cmp w0, 0 bne .L293 adrp x0, p3_l3 add x0, x0, :lo12:p3_l3 ldrb w0, [x0] cmp w0, 0 bne .L293 adrp x0, p3_l2 add x0, x0, :lo12:p3_l2 ldrb w0, [x0] cmp w0, 0 beq .L293 adrp x0, p3_l0 add x0, x0, :lo12:p3_l0 ldrb w0, [x0] cmp w0, 0 beq .L293 adrp x0, p3_l1 add x0, x0, :lo12:p3_l1 ldrb w0, [x0] cmp w0, 0 beq .L117 .L293: adrp x0, v1 add x0, x0, :lo12:v1 ldr w0, [x0] cmp w0, 4 beq .L294 adrp x0, delta add x0, x0, :lo12:delta ldr s0, [x0] fcmp s0, #0.0 bne .L294 adrp x0, p3_evt add x0, x0, :lo12:p3_evt ldrb w0, [x0] cmp w0, 0 beq .L294 adrp x0, p3_l3 add x0, x0, :lo12:p3_l3 ldrb w0, [x0] cmp w0, 0 bne .L294 adrp x0, p3_l2 add x0, x0, :lo12:p3_l2 ldrb w0, [x0] cmp w0, 0 beq .L294 adrp x0, p3_l0 add x0, x0, :lo12:p3_l0 ldrb w0, [x0] cmp w0, 0 beq .L294 adrp x0, p3_l1 add x0, x0, :lo12:p3_l1 ldrb w0, [x0] cmp w0, 0 bne .L294 adrp x0, _x_p3_l3 add x0, x0, :lo12:_x_p3_l3 ldrb w0, [x0] cmp w0, 0 bne .L294 adrp x0, _x_p3_l2 add x0, x0, :lo12:_x_p3_l2 ldrb w0, [x0] cmp w0, 0 beq .L294 adrp x0, _x_p3_l1 add x0, x0, :lo12:_x_p3_l1 ldrb w0, [x0] cmp w0, 0 beq .L294 adrp x0, _x_p3_l0 add x0, x0, :lo12:_x_p3_l0 ldrb w0, [x0] cmp w0, 0 beq .L117 .L294: adrp x0, proposed3 add x0, x0, :lo12:proposed3 ldr s1, [x0] adrp x0, _x_proposed3 add x0, x0, :lo12:_x_proposed3 ldr s0, [x0] fcmp s1, s0 bne .L295 adrp x0, v2 add x0, x0, :lo12:v2 ldrb w0, [x0] cmp w0, 0 cset w0, eq and w1, w0, 255 adrp x0, _x_v2 add x0, x0, :lo12:_x_v2 ldrb w0, [x0] cmp w0, 0 cset w0, ne and w0, w0, 255 eor w0, w1, w0 and w0, w0, 255 cmp w0, 0 beq .L295 adrp x0, v1 add x0, x0, :lo12:v1 ldr w1, [x0] adrp x0, _x_v1 add x0, x0, :lo12:_x_v1 ldr w0, [x0] cmp w1, w0 bne .L295 adrp x0, _x_p3_l3 add x0, x0, :lo12:_x_p3_l3 ldrb w0, [x0] cmp w0, 0 bne .L295 adrp x0, _x_p3_l2 add x0, x0, :lo12:_x_p3_l2 ldrb w0, [x0] cmp w0, 0 beq .L295 adrp x0, _x_p3_l0 add x0, x0, :lo12:_x_p3_l0 ldrb w0, [x0] cmp w0, 0 beq .L295 adrp x0, _x_p3_l1 add x0, x0, :lo12:_x_p3_l1 ldrb w0, [x0] cmp w0, 0 beq .L295 adrp x0, _x_p3_c add x0, x0, :lo12:_x_p3_c ldr s0, [x0] fcmp s0, #0.0 beq .L296 .L295: adrp x0, p3_l3 add x0, x0, :lo12:p3_l3 ldrb w0, [x0] cmp w0, 0 bne .L296 adrp x0, p3_l2 add x0, x0, :lo12:p3_l2 ldrb w0, [x0] cmp w0, 0 beq .L296 adrp x0, p3_l1 add x0, x0, :lo12:p3_l1 ldrb w0, [x0] cmp w0, 0 beq .L296 adrp x0, p3_l0 add x0, x0, :lo12:p3_l0 ldrb w0, [x0] cmp w0, 0 bne .L296 adrp x0, delta add x0, x0, :lo12:delta ldr s0, [x0] fcmp s0, #0.0 bne .L296 adrp x0, p3_evt add x0, x0, :lo12:p3_evt ldrb w0, [x0] cmp w0, 0 bne .L117 .L296: adrp x0, proposed3 add x0, x0, :lo12:proposed3 ldr s1, [x0] adrp x0, _x_proposed3 add x0, x0, :lo12:_x_proposed3 ldr s0, [x0] fcmp s1, s0 bne .L297 adrp x0, _x_v2 add x0, x0, :lo12:_x_v2 ldrb w0, [x0] cmp w0, 0 bne .L297 adrp x0, _x_p3_l3 add x0, x0, :lo12:_x_p3_l3 ldrb w0, [x0] cmp w0, 0 beq .L297 adrp x0, _x_p3_l2 add x0, x0, :lo12:_x_p3_l2 ldrb w0, [x0] cmp w0, 0 bne .L297 adrp x0, _x_p3_l0 add x0, x0, :lo12:_x_p3_l0 ldrb w0, [x0] cmp w0, 0 bne .L297 adrp x0, _x_p3_l1 add x0, x0, :lo12:_x_p3_l1 ldrb w0, [x0] cmp w0, 0 bne .L297 adrp x0, v1 add x0, x0, :lo12:v1 ldr w1, [x0] adrp x0, _x_v1 add x0, x0, :lo12:_x_v1 ldr w0, [x0] cmp w1, w0 bne .L297 adrp x0, _x_p3_c add x0, x0, :lo12:_x_p3_c ldr s0, [x0] fcmp s0, #0.0 beq .L298 .L297: adrp x0, p3_l3 add x0, x0, :lo12:p3_l3 ldrb w0, [x0] cmp w0, 0 bne .L298 adrp x0, p3_l2 add x0, x0, :lo12:p3_l2 ldrb w0, [x0] cmp w0, 0 beq .L298 adrp x0, p3_l0 add x0, x0, :lo12:p3_l0 ldrb w0, [x0] cmp w0, 0 beq .L298 adrp x0, p3_l1 add x0, x0, :lo12:p3_l1 ldrb w0, [x0] cmp w0, 0 beq .L298 adrp x0, delta add x0, x0, :lo12:delta ldr s0, [x0] fcmp s0, #0.0 bne .L298 adrp x0, p3_evt add x0, x0, :lo12:p3_evt ldrb w0, [x0] cmp w0, 0 bne .L117 .L298: adrp x0, proposed3 add x0, x0, :lo12:proposed3 ldr s1, [x0] adrp x0, _x_proposed3 add x0, x0, :lo12:_x_proposed3 ldr s0, [x0] fcmp s1, s0 bne .L299 adrp x0, _x_v1 add x0, x0, :lo12:_x_v1 ldr w0, [x0] cmp w0, 0 bne .L299 adrp x0, _x_p3_l3 add x0, x0, :lo12:_x_p3_l3 ldrb w0, [x0] cmp w0, 0 bne .L299 adrp x0, _x_p3_l2 add x0, x0, :lo12:_x_p3_l2 ldrb w0, [x0] cmp w0, 0 bne .L299 adrp x0, _x_p3_l0 add x0, x0, :lo12:_x_p3_l0 ldrb w0, [x0] cmp w0, 0 bne .L299 adrp x0, _x_p3_l1 add x0, x0, :lo12:_x_p3_l1 ldrb w0, [x0] cmp w0, 0 bne .L299 adrp x0, v2 add x0, x0, :lo12:v2 ldrb w0, [x0] cmp w0, 0 cset w0, eq and w1, w0, 255 adrp x0, _x_v2 add x0, x0, :lo12:_x_v2 ldrb w0, [x0] cmp w0, 0 cset w0, ne and w0, w0, 255 eor w0, w1, w0 and w0, w0, 255 cmp w0, 0 beq .L299 adrp x0, p3_c add x0, x0, :lo12:p3_c ldr s1, [x0] adrp x0, _x_p3_c add x0, x0, :lo12:_x_p3_c ldr s0, [x0] fcmp s1, s0 beq .L300 .L299: adrp x0, p3_l3 add x0, x0, :lo12:p3_l3 ldrb w0, [x0] cmp w0, 0 beq .L300 adrp x0, p3_l2 add x0, x0, :lo12:p3_l2 ldrb w0, [x0] cmp w0, 0 bne .L300 adrp x0, p3_l0 add x0, x0, :lo12:p3_l0 ldrb w0, [x0] cmp w0, 0 bne .L300 adrp x0, p3_l1 add x0, x0, :lo12:p3_l1 ldrb w0, [x0] cmp w0, 0 bne .L300 adrp x0, delta add x0, x0, :lo12:delta ldr s0, [x0] fcmp s0, #0.0 bne .L300 adrp x0, p3_evt add x0, x0, :lo12:p3_evt ldrb w0, [x0] cmp w0, 0 bne .L117 .L300: adrp x0, _x_p2_l3 add x0, x0, :lo12:_x_p2_l3 ldrb w0, [x0] cmp w0, 0 beq .L301 adrp x0, _x_p2_l2 add x0, x0, :lo12:_x_p2_l2 ldrb w0, [x0] cmp w0, 0 bne .L301 adrp x0, _x_p2_l0 add x0, x0, :lo12:_x_p2_l0 ldrb w0, [x0] cmp w0, 0 bne .L301 adrp x0, _x_p2_l1 add x0, x0, :lo12:_x_p2_l1 ldrb w0, [x0] cmp w0, 0 beq .L302 .L301: adrp x0, _x_p2_l3 add x0, x0, :lo12:_x_p2_l3 ldrb w0, [x0] cmp w0, 0 bne .L303 adrp x0, _x_p2_l2 add x0, x0, :lo12:_x_p2_l2 ldrb w0, [x0] cmp w0, 0 beq .L303 adrp x0, _x_p2_l0 add x0, x0, :lo12:_x_p2_l0 ldrb w0, [x0] cmp w0, 0 beq .L303 adrp x0, _x_p2_l1 add x0, x0, :lo12:_x_p2_l1 ldrb w0, [x0] cmp w0, 0 bne .L302 .L303: adrp x0, _x_p2_l3 add x0, x0, :lo12:_x_p2_l3 ldrb w0, [x0] cmp w0, 0 bne .L304 adrp x0, _x_p2_l2 add x0, x0, :lo12:_x_p2_l2 ldrb w0, [x0] cmp w0, 0 beq .L304 adrp x0, _x_p2_l1 add x0, x0, :lo12:_x_p2_l1 ldrb w0, [x0] cmp w0, 0 beq .L304 adrp x0, _x_p2_l0 add x0, x0, :lo12:_x_p2_l0 ldrb w0, [x0] cmp w0, 0 beq .L302 .L304: adrp x0, _x_p2_l3 add x0, x0, :lo12:_x_p2_l3 ldrb w0, [x0] cmp w0, 0 bne .L305 adrp x0, _x_p2_l2 add x0, x0, :lo12:_x_p2_l2 ldrb w0, [x0] cmp w0, 0 beq .L305 adrp x0, _x_p2_l0 add x0, x0, :lo12:_x_p2_l0 ldrb w0, [x0] cmp w0, 0 beq .L305 adrp x0, _x_p2_l1 add x0, x0, :lo12:_x_p2_l1 ldrb w0, [x0] cmp w0, 0 beq .L302 .L305: adrp x0, _x_p2_l3 add x0, x0, :lo12:_x_p2_l3 ldrb w0, [x0] cmp w0, 0 bne .L306 adrp x0, _x_p2_l2 add x0, x0, :lo12:_x_p2_l2 ldrb w0, [x0] cmp w0, 0 beq .L306 adrp x0, _x_p2_l0 add x0, x0, :lo12:_x_p2_l0 ldrb w0, [x0] cmp w0, 0 bne .L306 adrp x0, _x_p2_l1 add x0, x0, :lo12:_x_p2_l1 ldrb w0, [x0] cmp w0, 0 beq .L302 .L306: adrp x0, _x_p2_l3 add x0, x0, :lo12:_x_p2_l3 ldrb w0, [x0] cmp w0, 0 bne .L307 adrp x0, _x_p2_l2 add x0, x0, :lo12:_x_p2_l2 ldrb w0, [x0] cmp w0, 0 bne .L307 adrp x0, _x_p2_l0 add x0, x0, :lo12:_x_p2_l0 ldrb w0, [x0] cmp w0, 0 beq .L307 adrp x0, _x_p2_l1 add x0, x0, :lo12:_x_p2_l1 ldrb w0, [x0] cmp w0, 0 bne .L302 .L307: adrp x0, _x_p2_l3 add x0, x0, :lo12:_x_p2_l3 ldrb w0, [x0] cmp w0, 0 bne .L308 adrp x0, _x_p2_l2 add x0, x0, :lo12:_x_p2_l2 ldrb w0, [x0] cmp w0, 0 bne .L308 adrp x0, _x_p2_l1 add x0, x0, :lo12:_x_p2_l1 ldrb w0, [x0] cmp w0, 0 beq .L308 adrp x0, _x_p2_l0 add x0, x0, :lo12:_x_p2_l0 ldrb w0, [x0] cmp w0, 0 beq .L302 .L308: adrp x0, _x_p2_l3 add x0, x0, :lo12:_x_p2_l3 ldrb w0, [x0] cmp w0, 0 bne .L309 adrp x0, _x_p2_l2 add x0, x0, :lo12:_x_p2_l2 ldrb w0, [x0] cmp w0, 0 bne .L309 adrp x0, _x_p2_l0 add x0, x0, :lo12:_x_p2_l0 ldrb w0, [x0] cmp w0, 0 bne .L309 adrp x0, _x_p2_l1 add x0, x0, :lo12:_x_p2_l1 ldrb w0, [x0] cmp w0, 0 beq .L302 .L309: adrp x0, _x_p2_l3 add x0, x0, :lo12:_x_p2_l3 ldrb w0, [x0] cmp w0, 0 bne .L117 adrp x0, _x_p2_l2 add x0, x0, :lo12:_x_p2_l2 ldrb w0, [x0] cmp w0, 0 bne .L117 adrp x0, _x_p2_l0 add x0, x0, :lo12:_x_p2_l0 ldrb w0, [x0] cmp w0, 0 beq .L117 adrp x0, _x_p2_l1 add x0, x0, :lo12:_x_p2_l1 ldrb w0, [x0] cmp w0, 0 bne .L117 .L302: adrp x0, _x_p2_c add x0, x0, :lo12:_x_p2_c ldr s1, [x0] adrp x0, _x_proposed2 add x0, x0, :lo12:_x_proposed2 ldr s0, [x0] fcmpe s1, s0 bls .L310 adrp x0, _x_p2_l3 add x0, x0, :lo12:_x_p2_l3 ldrb w0, [x0] cmp w0, 0 bne .L311 adrp x0, _x_p2_l2 add x0, x0, :lo12:_x_p2_l2 ldrb w0, [x0] cmp w0, 0 bne .L311 adrp x0, _x_p2_l0 add x0, x0, :lo12:_x_p2_l0 ldrb w0, [x0] cmp w0, 0 beq .L311 adrp x0, _x_p2_l1 add x0, x0, :lo12:_x_p2_l1 ldrb w0, [x0] cmp w0, 0 beq .L117 .L311: adrp x0, _x_p2_l3 add x0, x0, :lo12:_x_p2_l3 ldrb w0, [x0] cmp w0, 0 bne .L312 adrp x0, _x_p2_l2 add x0, x0, :lo12:_x_p2_l2 ldrb w0, [x0] cmp w0, 0 beq .L312 adrp x0, _x_p2_l0 add x0, x0, :lo12:_x_p2_l0 ldrb w0, [x0] cmp w0, 0 bne .L312 adrp x0, _x_p2_l1 add x0, x0, :lo12:_x_p2_l1 ldrb w0, [x0] cmp w0, 0 beq .L117 .L312: adrp x0, _x_p2_l3 add x0, x0, :lo12:_x_p2_l3 ldrb w0, [x0] cmp w0, 0 bne .L313 adrp x0, _x_p2_l2 add x0, x0, :lo12:_x_p2_l2 ldrb w0, [x0] cmp w0, 0 beq .L313 adrp x0, _x_p2_l0 add x0, x0, :lo12:_x_p2_l0 ldrb w0, [x0] cmp w0, 0 beq .L313 adrp x0, _x_p2_l1 add x0, x0, :lo12:_x_p2_l1 ldrb w0, [x0] cmp w0, 0 bne .L117 .L313: adrp x0, _x_p2_l3 add x0, x0, :lo12:_x_p2_l3 ldrb w0, [x0] cmp w0, 0 beq .L310 adrp x0, _x_p2_l2 add x0, x0, :lo12:_x_p2_l2 ldrb w0, [x0] cmp w0, 0 bne .L310 adrp x0, _x_p2_l0 add x0, x0, :lo12:_x_p2_l0 ldrb w0, [x0] cmp w0, 0 bne .L310 adrp x0, _x_p2_l1 add x0, x0, :lo12:_x_p2_l1 ldrb w0, [x0] cmp w0, 0 beq .L117 .L310: adrp x0, p2_l0 add x0, x0, :lo12:p2_l0 ldrb w0, [x0] cmp w0, 0 cset w0, eq and w1, w0, 255 adrp x0, _x_p2_l0 add x0, x0, :lo12:_x_p2_l0 ldrb w0, [x0] cmp w0, 0 cset w0, ne and w0, w0, 255 eor w0, w1, w0 and w0, w0, 255 cmp w0, 0 beq .L314 adrp x0, p2_l1 add x0, x0, :lo12:p2_l1 ldrb w0, [x0] cmp w0, 0 cset w0, eq and w1, w0, 255 adrp x0, _x_p2_l1 add x0, x0, :lo12:_x_p2_l1 ldrb w0, [x0] cmp w0, 0 cset w0, ne and w0, w0, 255 eor w0, w1, w0 and w0, w0, 255 cmp w0, 0 beq .L314 adrp x0, p2_l2 add x0, x0, :lo12:p2_l2 ldrb w0, [x0] cmp w0, 0 cset w0, eq and w1, w0, 255 adrp x0, _x_p2_l2 add x0, x0, :lo12:_x_p2_l2 ldrb w0, [x0] cmp w0, 0 cset w0, ne and w0, w0, 255 eor w0, w1, w0 and w0, w0, 255 cmp w0, 0 beq .L314 adrp x0, p2_l3 add x0, x0, :lo12:p2_l3 ldrb w0, [x0] cmp w0, 0 cset w0, eq and w1, w0, 255 adrp x0, _x_p2_l3 add x0, x0, :lo12:_x_p2_l3 ldrb w0, [x0] cmp w0, 0 cset w0, ne and w0, w0, 255 eor w0, w1, w0 and w0, w0, 255 cmp w0, 0 beq .L314 adrp x0, delta add x0, x0, :lo12:delta ldr s0, [x0] fcvt d1, s0 adrp x0, p2_c add x0, x0, :lo12:p2_c ldr s0, [x0] fcvt d2, s0 adrp x0, _x_p2_c add x0, x0, :lo12:_x_p2_c ldr s0, [x0] fcvt d0, s0 fsub d0, d2, d0 fadd d0, d1, d0 fcmp d0, #0.0 bne .L314 adrp x0, proposed2 add x0, x0, :lo12:proposed2 ldr s1, [x0] adrp x0, _x_proposed2 add x0, x0, :lo12:_x_proposed2 ldr s0, [x0] fcmp s1, s0 beq .L315 .L314: adrp x0, delta add x0, x0, :lo12:delta ldr s0, [x0] fcmpe s0, #0.0 bls .L474 b .L117 .L474: adrp x0, p2_evt add x0, x0, :lo12:p2_evt ldrb w0, [x0] cmp w0, 0 beq .L117 .L315: adrp x0, v1 add x0, x0, :lo12:v1 ldr w0, [x0] cmp w0, 0 bne .L317 adrp x0, _x_p2_l3 add x0, x0, :lo12:_x_p2_l3 ldrb w0, [x0] cmp w0, 0 bne .L317 adrp x0, _x_p2_l2 add x0, x0, :lo12:_x_p2_l2 ldrb w0, [x0] cmp w0, 0 bne .L317 adrp x0, _x_p2_l0 add x0, x0, :lo12:_x_p2_l0 ldrb w0, [x0] cmp w0, 0 beq .L317 adrp x0, _x_p2_l1 add x0, x0, :lo12:_x_p2_l1 ldrb w0, [x0] cmp w0, 0 bne .L317 adrp x0, v2 add x0, x0, :lo12:v2 ldrb w0, [x0] cmp w0, 0 cset w0, eq and w1, w0, 255 adrp x0, _x_v2 add x0, x0, :lo12:_x_v2 ldrb w0, [x0] cmp w0, 0 cset w0, ne and w0, w0, 255 eor w0, w1, w0 and w0, w0, 255 cmp w0, 0 beq .L317 adrp x0, _x_p2_c add x0, x0, :lo12:_x_p2_c ldr s0, [x0] fcmp s0, #0.0 bne .L317 adrp x0, v1 add x0, x0, :lo12:v1 ldr w1, [x0] adrp x0, _x_v1 add x0, x0, :lo12:_x_v1 ldr w0, [x0] cmp w1, w0 bne .L317 adrp x0, proposed2 add x0, x0, :lo12:proposed2 ldr s1, [x0] adrp x0, _x_proposed2 add x0, x0, :lo12:_x_proposed2 ldr s0, [x0] fcmp s1, s0 beq .L318 .L317: adrp x0, p2_l3 add x0, x0, :lo12:p2_l3 ldrb w0, [x0] cmp w0, 0 bne .L318 adrp x0, p2_l2 add x0, x0, :lo12:p2_l2 ldrb w0, [x0] cmp w0, 0 bne .L318 adrp x0, p2_l0 add x0, x0, :lo12:p2_l0 ldrb w0, [x0] cmp w0, 0 bne .L318 adrp x0, p2_l1 add x0, x0, :lo12:p2_l1 ldrb w0, [x0] cmp w0, 0 bne .L318 adrp x0, delta add x0, x0, :lo12:delta ldr s0, [x0] fcmp s0, #0.0 bne .L318 adrp x0, p2_evt add x0, x0, :lo12:p2_evt ldrb w0, [x0] cmp w0, 0 bne .L117 .L318: adrp x0, proposed2 add x0, x0, :lo12:proposed2 ldr s1, [x0] adrp x0, _x_proposed2 add x0, x0, :lo12:_x_proposed2 ldr s0, [x0] fcmp s1, s0 bne .L319 adrp x0, v2 add x0, x0, :lo12:v2 ldrb w0, [x0] cmp w0, 0 cset w0, eq and w1, w0, 255 adrp x0, _x_v2 add x0, x0, :lo12:_x_v2 ldrb w0, [x0] cmp w0, 0 cset w0, ne and w0, w0, 255 eor w0, w1, w0 and w0, w0, 255 cmp w0, 0 beq .L319 adrp x0, _x_p2_c add x0, x0, :lo12:_x_p2_c ldr s0, [x0] fcmp s0, #0.0 bne .L319 adrp x0, _x_p2_l3 add x0, x0, :lo12:_x_p2_l3 ldrb w0, [x0] cmp w0, 0 bne .L319 adrp x0, _x_p2_l2 add x0, x0, :lo12:_x_p2_l2 ldrb w0, [x0] cmp w0, 0 bne .L319 adrp x0, _x_p2_l1 add x0, x0, :lo12:_x_p2_l1 ldrb w0, [x0] cmp w0, 0 beq .L319 adrp x0, _x_p2_l0 add x0, x0, :lo12:_x_p2_l0 ldrb w0, [x0] cmp w0, 0 bne .L319 adrp x0, _x_v1 add x0, x0, :lo12:_x_v1 ldr w0, [x0] cmp w0, 3 beq .L320 .L319: adrp x0, p2_l3 add x0, x0, :lo12:p2_l3 ldrb w0, [x0] cmp w0, 0 bne .L320 adrp x0, p2_l2 add x0, x0, :lo12:p2_l2 ldrb w0, [x0] cmp w0, 0 bne .L320 adrp x0, p2_l0 add x0, x0, :lo12:p2_l0 ldrb w0, [x0] cmp w0, 0 beq .L320 adrp x0, p2_l1 add x0, x0, :lo12:p2_l1 ldrb w0, [x0] cmp w0, 0 bne .L320 adrp x0, delta add x0, x0, :lo12:delta ldr s0, [x0] fcmp s0, #0.0 bne .L320 adrp x0, p2_evt add x0, x0, :lo12:p2_evt ldrb w0, [x0] cmp w0, 0 bne .L117 .L320: adrp x0, v2 add x0, x0, :lo12:v2 ldrb w0, [x0] cmp w0, 0 cset w0, eq and w1, w0, 255 adrp x0, _x_v2 add x0, x0, :lo12:_x_v2 ldrb w0, [x0] cmp w0, 0 cset w0, ne and w0, w0, 255 eor w0, w1, w0 and w0, w0, 255 cmp w0, 0 beq .L321 adrp x0, v1 add x0, x0, :lo12:v1 ldr w1, [x0] adrp x0, _x_v1 add x0, x0, :lo12:_x_v1 ldr w0, [x0] cmp w1, w0 bne .L321 adrp x0, _x_p2_l3 add x0, x0, :lo12:_x_p2_l3 ldrb w0, [x0] cmp w0, 0 bne .L322 adrp x0, _x_p2_l2 add x0, x0, :lo12:_x_p2_l2 ldrb w0, [x0] cmp w0, 0 bne .L322 adrp x0, _x_p2_l0 add x0, x0, :lo12:_x_p2_l0 ldrb w0, [x0] cmp w0, 0 bne .L322 adrp x0, _x_p2_l1 add x0, x0, :lo12:_x_p2_l1 ldrb w0, [x0] cmp w0, 0 beq .L323 .L322: adrp x0, _x_p2_l3 add x0, x0, :lo12:_x_p2_l3 ldrb w0, [x0] cmp w0, 0 bne .L321 adrp x0, _x_p2_l2 add x0, x0, :lo12:_x_p2_l2 ldrb w0, [x0] cmp w0, 0 bne .L321 adrp x0, _x_p2_l0 add x0, x0, :lo12:_x_p2_l0 ldrb w0, [x0] cmp w0, 0 beq .L321 adrp x0, _x_p2_l1 add x0, x0, :lo12:_x_p2_l1 ldrb w0, [x0] cmp w0, 0 beq .L321 .L323: adrp x0, p2_c add x0, x0, :lo12:p2_c ldr s1, [x0] adrp x0, _x_p2_c add x0, x0, :lo12:_x_p2_c ldr s0, [x0] fcmp s1, s0 beq .L324 .L321: adrp x0, p2_l3 add x0, x0, :lo12:p2_l3 ldrb w0, [x0] cmp w0, 0 bne .L324 adrp x0, p2_l2 add x0, x0, :lo12:p2_l2 ldrb w0, [x0] cmp w0, 0 bne .L324 adrp x0, p2_l1 add x0, x0, :lo12:p2_l1 ldrb w0, [x0] cmp w0, 0 beq .L324 adrp x0, p2_l0 add x0, x0, :lo12:p2_l0 ldrb w0, [x0] cmp w0, 0 bne .L324 adrp x0, delta add x0, x0, :lo12:delta ldr s0, [x0] fcmp s0, #0.0 bne .L324 adrp x0, p2_evt add x0, x0, :lo12:p2_evt ldrb w0, [x0] cmp w0, 0 bne .L117 .L324: adrp x0, proposed2 add x0, x0, :lo12:proposed2 ldr s1, [x0] adrp x0, _x_proposed2 add x0, x0, :lo12:_x_proposed2 ldr s0, [x0] fcmp s1, s0 bne .L325 adrp x0, v1 add x0, x0, :lo12:v1 ldr w0, [x0] cmp w0, 3 bne .L326 .L325: adrp x0, delta add x0, x0, :lo12:delta ldr s0, [x0] fcmp s0, #0.0 bne .L326 adrp x0, p2_evt add x0, x0, :lo12:p2_evt ldrb w0, [x0] cmp w0, 0 beq .L326 adrp x0, _x_p2_l3 add x0, x0, :lo12:_x_p2_l3 ldrb w0, [x0] cmp w0, 0 bne .L326 adrp x0, _x_p2_l2 add x0, x0, :lo12:_x_p2_l2 ldrb w0, [x0] cmp w0, 0 bne .L326 adrp x0, _x_p2_l0 add x0, x0, :lo12:_x_p2_l0 ldrb w0, [x0] cmp w0, 0 bne .L326 adrp x0, _x_p2_l1 add x0, x0, :lo12:_x_p2_l1 ldrb w0, [x0] cmp w0, 0 bne .L326 adrp x0, p2_l3 add x0, x0, :lo12:p2_l3 ldrb w0, [x0] cmp w0, 0 bne .L326 adrp x0, p2_l2 add x0, x0, :lo12:p2_l2 ldrb w0, [x0] cmp w0, 0 bne .L326 adrp x0, p2_l1 add x0, x0, :lo12:p2_l1 ldrb w0, [x0] cmp w0, 0 beq .L326 adrp x0, p2_l0 add x0, x0, :lo12:p2_l0 ldrb w0, [x0] cmp w0, 0 beq .L117 .L326: adrp x0, v1 add x0, x0, :lo12:v1 ldr w0, [x0] cmp w0, 3 bne .L327 adrp x0, p2_c add x0, x0, :lo12:p2_c ldr s1, [x0] adrp x0, max_prop add x0, x0, :lo12:max_prop ldr s0, [x0] fcmpe s1, s0 cset w0, ls and w0, w0, 255 eor w0, w0, 1 and w0, w0, 255 cmp w0, 0 beq .L327 adrp x0, proposed2 add x0, x0, :lo12:proposed2 ldr s1, [x0] adrp x0, _x_proposed2 add x0, x0, :lo12:_x_proposed2 ldr s0, [x0] fcmpe s1, s0 cset w0, ls and w0, w0, 255 eor w0, w0, 1 and w0, w0, 255 cmp w0, 0 bne .L328 .L327: adrp x0, delta add x0, x0, :lo12:delta ldr s0, [x0] fcmp s0, #0.0 bne .L328 adrp x0, p2_evt add x0, x0, :lo12:p2_evt ldrb w0, [x0] cmp w0, 0 beq .L328 adrp x0, p2_l3 add x0, x0, :lo12:p2_l3 ldrb w0, [x0] cmp w0, 0 bne .L328 adrp x0, p2_l2 add x0, x0, :lo12:p2_l2 ldrb w0, [x0] cmp w0, 0 bne .L328 adrp x0, p2_l1 add x0, x0, :lo12:p2_l1 ldrb w0, [x0] cmp w0, 0 beq .L328 adrp x0, p2_l0 add x0, x0, :lo12:p2_l0 ldrb w0, [x0] cmp w0, 0 bne .L328 adrp x0, _x_p2_l3 add x0, x0, :lo12:_x_p2_l3 ldrb w0, [x0] cmp w0, 0 bne .L328 adrp x0, _x_p2_l2 add x0, x0, :lo12:_x_p2_l2 ldrb w0, [x0] cmp w0, 0 bne .L328 adrp x0, _x_p2_l0 add x0, x0, :lo12:_x_p2_l0 ldrb w0, [x0] cmp w0, 0 beq .L328 adrp x0, _x_p2_l1 add x0, x0, :lo12:_x_p2_l1 ldrb w0, [x0] cmp w0, 0 bne .L117 .L328: adrp x0, v2 add x0, x0, :lo12:v2 ldrb w0, [x0] cmp w0, 0 cset w0, eq and w1, w0, 255 adrp x0, _x_v2 add x0, x0, :lo12:_x_v2 ldrb w0, [x0] cmp w0, 0 cset w0, ne and w0, w0, 255 eor w0, w1, w0 and w0, w0, 255 cmp w0, 0 beq .L329 adrp x0, v1 add x0, x0, :lo12:v1 ldr w1, [x0] adrp x0, _x_v1 add x0, x0, :lo12:_x_v1 ldr w0, [x0] cmp w1, w0 bne .L329 adrp x0, proposed2 add x0, x0, :lo12:proposed2 ldr s1, [x0] adrp x0, _x_proposed2 add x0, x0, :lo12:_x_proposed2 ldr s0, [x0] fcmp s1, s0 bne .L329 adrp x0, _x_p2_l3 add x0, x0, :lo12:_x_p2_l3 ldrb w0, [x0] cmp w0, 0 bne .L330 adrp x0, _x_p2_l2 add x0, x0, :lo12:_x_p2_l2 ldrb w0, [x0] cmp w0, 0 bne .L330 adrp x0, _x_p2_l0 add x0, x0, :lo12:_x_p2_l0 ldrb w0, [x0] cmp w0, 0 bne .L330 adrp x0, _x_p2_l1 add x0, x0, :lo12:_x_p2_l1 ldrb w0, [x0] cmp w0, 0 beq .L331 .L330: adrp x0, _x_p2_l3 add x0, x0, :lo12:_x_p2_l3 ldrb w0, [x0] cmp w0, 0 bne .L329 adrp x0, _x_p2_l2 add x0, x0, :lo12:_x_p2_l2 ldrb w0, [x0] cmp w0, 0 beq .L329 adrp x0, _x_p2_l0 add x0, x0, :lo12:_x_p2_l0 ldrb w0, [x0] cmp w0, 0 bne .L329 adrp x0, _x_p2_l1 add x0, x0, :lo12:_x_p2_l1 ldrb w0, [x0] cmp w0, 0 beq .L331 .L329: adrp x0, p2_l3 add x0, x0, :lo12:p2_l3 ldrb w0, [x0] cmp w0, 0 bne .L331 adrp x0, p2_l2 add x0, x0, :lo12:p2_l2 ldrb w0, [x0] cmp w0, 0 bne .L331 adrp x0, p2_l0 add x0, x0, :lo12:p2_l0 ldrb w0, [x0] cmp w0, 0 beq .L331 adrp x0, p2_l1 add x0, x0, :lo12:p2_l1 ldrb w0, [x0] cmp w0, 0 beq .L331 adrp x0, delta add x0, x0, :lo12:delta ldr s0, [x0] fcmp s0, #0.0 bne .L331 adrp x0, p2_evt add x0, x0, :lo12:p2_evt ldrb w0, [x0] cmp w0, 0 bne .L117 .L331: adrp x0, v2 add x0, x0, :lo12:v2 ldrb w0, [x0] cmp w0, 0 beq .L332 adrp x0, p2_c add x0, x0, :lo12:p2_c ldr s1, [x0] adrp x0, _x_p2_c add x0, x0, :lo12:_x_p2_c ldr s0, [x0] fcmp s1, s0 beq .L333 .L332: adrp x0, delta add x0, x0, :lo12:delta ldr s0, [x0] fcmp s0, #0.0 bne .L333 adrp x0, p2_evt add x0, x0, :lo12:p2_evt ldrb w0, [x0] cmp w0, 0 beq .L333 adrp x0, _x_p2_l3 add x0, x0, :lo12:_x_p2_l3 ldrb w0, [x0] cmp w0, 0 bne .L333 adrp x0, _x_p2_l2 add x0, x0, :lo12:_x_p2_l2 ldrb w0, [x0] cmp w0, 0 bne .L333 adrp x0, _x_p2_l0 add x0, x0, :lo12:_x_p2_l0 ldrb w0, [x0] cmp w0, 0 bne .L333 adrp x0, _x_p2_l1 add x0, x0, :lo12:_x_p2_l1 ldrb w0, [x0] cmp w0, 0 bne .L333 adrp x0, p2_l3 add x0, x0, :lo12:p2_l3 ldrb w0, [x0] cmp w0, 0 bne .L333 adrp x0, p2_l2 add x0, x0, :lo12:p2_l2 ldrb w0, [x0] cmp w0, 0 bne .L333 adrp x0, p2_l0 add x0, x0, :lo12:p2_l0 ldrb w0, [x0] cmp w0, 0 beq .L333 adrp x0, p2_l1 add x0, x0, :lo12:p2_l1 ldrb w0, [x0] cmp w0, 0 bne .L117 .L333: adrp x0, v2 add x0, x0, :lo12:v2 ldrb w0, [x0] cmp w0, 0 bne .L334 adrp x0, _x_p2_c add x0, x0, :lo12:_x_p2_c ldr s0, [x0] fcmp s0, #0.0 beq .L335 .L334: adrp x0, delta add x0, x0, :lo12:delta ldr s0, [x0] fcmp s0, #0.0 bne .L335 adrp x0, p2_evt add x0, x0, :lo12:p2_evt ldrb w0, [x0] cmp w0, 0 beq .L335 adrp x0, p2_l3 add x0, x0, :lo12:p2_l3 ldrb w0, [x0] cmp w0, 0 bne .L335 adrp x0, p2_l2 add x0, x0, :lo12:p2_l2 ldrb w0, [x0] cmp w0, 0 bne .L335 adrp x0, p2_l0 add x0, x0, :lo12:p2_l0 ldrb w0, [x0] cmp w0, 0 beq .L335 adrp x0, p2_l1 add x0, x0, :lo12:p2_l1 ldrb w0, [x0] cmp w0, 0 beq .L335 adrp x0, _x_p2_l3 add x0, x0, :lo12:_x_p2_l3 ldrb w0, [x0] cmp w0, 0 bne .L335 adrp x0, _x_p2_l2 add x0, x0, :lo12:_x_p2_l2 ldrb w0, [x0] cmp w0, 0 beq .L335 adrp x0, _x_p2_l0 add x0, x0, :lo12:_x_p2_l0 ldrb w0, [x0] cmp w0, 0 bne .L335 adrp x0, _x_p2_l1 add x0, x0, :lo12:_x_p2_l1 ldrb w0, [x0] cmp w0, 0 beq .L117 .L335: adrp x0, v1 add x0, x0, :lo12:v1 ldr w1, [x0] adrp x0, _x_v1 add x0, x0, :lo12:_x_v1 ldr w0, [x0] cmp w1, w0 bne .L336 adrp x0, proposed2 add x0, x0, :lo12:proposed2 ldr s1, [x0] adrp x0, _x_proposed2 add x0, x0, :lo12:_x_proposed2 ldr s0, [x0] fcmp s1, s0 bne .L336 adrp x0, _x_p2_c add x0, x0, :lo12:_x_p2_c ldr s0, [x0] fcmp s0, #0.0 bne .L336 adrp x0, _x_v2 add x0, x0, :lo12:_x_v2 ldrb w0, [x0] cmp w0, 0 beq .L336 adrp x0, _x_p2_l3 add x0, x0, :lo12:_x_p2_l3 ldrb w0, [x0] cmp w0, 0 bne .L336 adrp x0, _x_p2_l2 add x0, x0, :lo12:_x_p2_l2 ldrb w0, [x0] cmp w0, 0 beq .L336 adrp x0, _x_p2_l0 add x0, x0, :lo12:_x_p2_l0 ldrb w0, [x0] cmp w0, 0 beq .L336 adrp x0, _x_p2_l1 add x0, x0, :lo12:_x_p2_l1 ldrb w0, [x0] cmp w0, 0 beq .L337 .L336: adrp x0, p2_l3 add x0, x0, :lo12:p2_l3 ldrb w0, [x0] cmp w0, 0 bne .L337 adrp x0, p2_l2 add x0, x0, :lo12:p2_l2 ldrb w0, [x0] cmp w0, 0 beq .L337 adrp x0, p2_l0 add x0, x0, :lo12:p2_l0 ldrb w0, [x0] cmp w0, 0 bne .L337 adrp x0, p2_l1 add x0, x0, :lo12:p2_l1 ldrb w0, [x0] cmp w0, 0 bne .L337 adrp x0, delta add x0, x0, :lo12:delta ldr s0, [x0] fcmp s0, #0.0 bne .L337 adrp x0, p2_evt add x0, x0, :lo12:p2_evt ldrb w0, [x0] cmp w0, 0 bne .L117 .L337: adrp x0, proposed2 add x0, x0, :lo12:proposed2 ldr s1, [x0] adrp x0, _x_proposed2 add x0, x0, :lo12:_x_proposed2 ldr s0, [x0] fcmp s1, s0 bne .L338 adrp x0, v2 add x0, x0, :lo12:v2 ldrb w0, [x0] cmp w0, 0 cset w0, eq and w1, w0, 255 adrp x0, _x_v2 add x0, x0, :lo12:_x_v2 ldrb w0, [x0] cmp w0, 0 cset w0, ne and w0, w0, 255 eor w0, w1, w0 and w0, w0, 255 cmp w0, 0 beq .L338 adrp x0, v1 add x0, x0, :lo12:v1 ldr w1, [x0] adrp x0, _x_v1 add x0, x0, :lo12:_x_v1 ldr w0, [x0] cmp w1, w0 bne .L338 adrp x0, p2_c add x0, x0, :lo12:p2_c ldr s1, [x0] adrp x0, _x_p2_c add x0, x0, :lo12:_x_p2_c ldr s0, [x0] fcmp s1, s0 bne .L338 adrp x0, _x_p2_l3 add x0, x0, :lo12:_x_p2_l3 ldrb w0, [x0] cmp w0, 0 bne .L339 adrp x0, _x_p2_l2 add x0, x0, :lo12:_x_p2_l2 ldrb w0, [x0] cmp w0, 0 bne .L339 adrp x0, _x_p2_l0 add x0, x0, :lo12:_x_p2_l0 ldrb w0, [x0] cmp w0, 0 bne .L339 adrp x0, _x_p2_l1 add x0, x0, :lo12:_x_p2_l1 ldrb w0, [x0] cmp w0, 0 beq .L340 .L339: adrp x0, _x_p2_l3 add x0, x0, :lo12:_x_p2_l3 ldrb w0, [x0] cmp w0, 0 bne .L338 adrp x0, _x_p2_l2 add x0, x0, :lo12:_x_p2_l2 ldrb w0, [x0] cmp w0, 0 beq .L338 adrp x0, _x_p2_l1 add x0, x0, :lo12:_x_p2_l1 ldrb w0, [x0] cmp w0, 0 beq .L338 adrp x0, _x_p2_l0 add x0, x0, :lo12:_x_p2_l0 ldrb w0, [x0] cmp w0, 0 beq .L340 .L338: adrp x0, p2_l3 add x0, x0, :lo12:p2_l3 ldrb w0, [x0] cmp w0, 0 bne .L340 adrp x0, p2_l2 add x0, x0, :lo12:p2_l2 ldrb w0, [x0] cmp w0, 0 beq .L340 adrp x0, p2_l0 add x0, x0, :lo12:p2_l0 ldrb w0, [x0] cmp w0, 0 beq .L340 adrp x0, p2_l1 add x0, x0, :lo12:p2_l1 ldrb w0, [x0] cmp w0, 0 bne .L340 adrp x0, delta add x0, x0, :lo12:delta ldr s0, [x0] fcmp s0, #0.0 bne .L340 adrp x0, p2_evt add x0, x0, :lo12:p2_evt ldrb w0, [x0] cmp w0, 0 bne .L117 .L340: adrp x0, v1 add x0, x0, :lo12:v1 ldr w0, [x0] cmp w0, 3 bne .L341 adrp x0, delta add x0, x0, :lo12:delta ldr s0, [x0] fcmp s0, #0.0 bne .L341 adrp x0, p2_evt add x0, x0, :lo12:p2_evt ldrb w0, [x0] cmp w0, 0 beq .L341 adrp x0, _x_p2_l3 add x0, x0, :lo12:_x_p2_l3 ldrb w0, [x0] cmp w0, 0 bne .L341 adrp x0, _x_p2_l2 add x0, x0, :lo12:_x_p2_l2 ldrb w0, [x0] cmp w0, 0 bne .L341 adrp x0, _x_p2_l0 add x0, x0, :lo12:_x_p2_l0 ldrb w0, [x0] cmp w0, 0 bne .L341 adrp x0, _x_p2_l1 add x0, x0, :lo12:_x_p2_l1 ldrb w0, [x0] cmp w0, 0 bne .L341 adrp x0, p2_l3 add x0, x0, :lo12:p2_l3 ldrb w0, [x0] cmp w0, 0 bne .L341 adrp x0, p2_l2 add x0, x0, :lo12:p2_l2 ldrb w0, [x0] cmp w0, 0 beq .L341 adrp x0, p2_l0 add x0, x0, :lo12:p2_l0 ldrb w0, [x0] cmp w0, 0 beq .L341 adrp x0, p2_l1 add x0, x0, :lo12:p2_l1 ldrb w0, [x0] cmp w0, 0 beq .L117 .L341: adrp x0, v1 add x0, x0, :lo12:v1 ldr w0, [x0] cmp w0, 3 beq .L342 adrp x0, delta add x0, x0, :lo12:delta ldr s0, [x0] fcmp s0, #0.0 bne .L342 adrp x0, p2_evt add x0, x0, :lo12:p2_evt ldrb w0, [x0] cmp w0, 0 beq .L342 adrp x0, p2_l3 add x0, x0, :lo12:p2_l3 ldrb w0, [x0] cmp w0, 0 bne .L342 adrp x0, p2_l2 add x0, x0, :lo12:p2_l2 ldrb w0, [x0] cmp w0, 0 beq .L342 adrp x0, p2_l0 add x0, x0, :lo12:p2_l0 ldrb w0, [x0] cmp w0, 0 beq .L342 adrp x0, p2_l1 add x0, x0, :lo12:p2_l1 ldrb w0, [x0] cmp w0, 0 bne .L342 adrp x0, _x_p2_l3 add x0, x0, :lo12:_x_p2_l3 ldrb w0, [x0] cmp w0, 0 bne .L342 adrp x0, _x_p2_l2 add x0, x0, :lo12:_x_p2_l2 ldrb w0, [x0] cmp w0, 0 beq .L342 adrp x0, _x_p2_l1 add x0, x0, :lo12:_x_p2_l1 ldrb w0, [x0] cmp w0, 0 beq .L342 adrp x0, _x_p2_l0 add x0, x0, :lo12:_x_p2_l0 ldrb w0, [x0] cmp w0, 0 beq .L117 .L342: adrp x0, proposed2 add x0, x0, :lo12:proposed2 ldr s1, [x0] adrp x0, _x_proposed2 add x0, x0, :lo12:_x_proposed2 ldr s0, [x0] fcmp s1, s0 bne .L343 adrp x0, v2 add x0, x0, :lo12:v2 ldrb w0, [x0] cmp w0, 0 cset w0, eq and w1, w0, 255 adrp x0, _x_v2 add x0, x0, :lo12:_x_v2 ldrb w0, [x0] cmp w0, 0 cset w0, ne and w0, w0, 255 eor w0, w1, w0 and w0, w0, 255 cmp w0, 0 beq .L343 adrp x0, v1 add x0, x0, :lo12:v1 ldr w1, [x0] adrp x0, _x_v1 add x0, x0, :lo12:_x_v1 ldr w0, [x0] cmp w1, w0 bne .L343 adrp x0, _x_p2_l3 add x0, x0, :lo12:_x_p2_l3 ldrb w0, [x0] cmp w0, 0 bne .L343 adrp x0, _x_p2_l2 add x0, x0, :lo12:_x_p2_l2 ldrb w0, [x0] cmp w0, 0 beq .L343 adrp x0, _x_p2_l0 add x0, x0, :lo12:_x_p2_l0 ldrb w0, [x0] cmp w0, 0 beq .L343 adrp x0, _x_p2_l1 add x0, x0, :lo12:_x_p2_l1 ldrb w0, [x0] cmp w0, 0 beq .L343 adrp x0, _x_p2_c add x0, x0, :lo12:_x_p2_c ldr s0, [x0] fcmp s0, #0.0 beq .L344 .L343: adrp x0, p2_l3 add x0, x0, :lo12:p2_l3 ldrb w0, [x0] cmp w0, 0 bne .L344 adrp x0, p2_l2 add x0, x0, :lo12:p2_l2 ldrb w0, [x0] cmp w0, 0 beq .L344 adrp x0, p2_l1 add x0, x0, :lo12:p2_l1 ldrb w0, [x0] cmp w0, 0 beq .L344 adrp x0, p2_l0 add x0, x0, :lo12:p2_l0 ldrb w0, [x0] cmp w0, 0 bne .L344 adrp x0, delta add x0, x0, :lo12:delta ldr s0, [x0] fcmp s0, #0.0 bne .L344 adrp x0, p2_evt add x0, x0, :lo12:p2_evt ldrb w0, [x0] cmp w0, 0 bne .L117 .L344: adrp x0, proposed2 add x0, x0, :lo12:proposed2 ldr s1, [x0] adrp x0, _x_proposed2 add x0, x0, :lo12:_x_proposed2 ldr s0, [x0] fcmp s1, s0 bne .L345 adrp x0, _x_v2 add x0, x0, :lo12:_x_v2 ldrb w0, [x0] cmp w0, 0 bne .L345 adrp x0, _x_p2_l3 add x0, x0, :lo12:_x_p2_l3 ldrb w0, [x0] cmp w0, 0 beq .L345 adrp x0, _x_p2_l2 add x0, x0, :lo12:_x_p2_l2 ldrb w0, [x0] cmp w0, 0 bne .L345 adrp x0, _x_p2_l0 add x0, x0, :lo12:_x_p2_l0 ldrb w0, [x0] cmp w0, 0 bne .L345 adrp x0, _x_p2_l1 add x0, x0, :lo12:_x_p2_l1 ldrb w0, [x0] cmp w0, 0 bne .L345 adrp x0, v1 add x0, x0, :lo12:v1 ldr w1, [x0] adrp x0, _x_v1 add x0, x0, :lo12:_x_v1 ldr w0, [x0] cmp w1, w0 bne .L345 adrp x0, _x_p2_c add x0, x0, :lo12:_x_p2_c ldr s0, [x0] fcmp s0, #0.0 beq .L346 .L345: adrp x0, p2_l3 add x0, x0, :lo12:p2_l3 ldrb w0, [x0] cmp w0, 0 bne .L346 adrp x0, p2_l2 add x0, x0, :lo12:p2_l2 ldrb w0, [x0] cmp w0, 0 beq .L346 adrp x0, p2_l0 add x0, x0, :lo12:p2_l0 ldrb w0, [x0] cmp w0, 0 beq .L346 adrp x0, p2_l1 add x0, x0, :lo12:p2_l1 ldrb w0, [x0] cmp w0, 0 beq .L346 adrp x0, delta add x0, x0, :lo12:delta ldr s0, [x0] fcmp s0, #0.0 bne .L346 adrp x0, p2_evt add x0, x0, :lo12:p2_evt ldrb w0, [x0] cmp w0, 0 bne .L117 .L346: adrp x0, proposed2 add x0, x0, :lo12:proposed2 ldr s1, [x0] adrp x0, _x_proposed2 add x0, x0, :lo12:_x_proposed2 ldr s0, [x0] fcmp s1, s0 bne .L347 adrp x0, _x_v1 add x0, x0, :lo12:_x_v1 ldr w0, [x0] cmp w0, 0 bne .L347 adrp x0, _x_p2_l3 add x0, x0, :lo12:_x_p2_l3 ldrb w0, [x0] cmp w0, 0 bne .L347 adrp x0, _x_p2_l2 add x0, x0, :lo12:_x_p2_l2 ldrb w0, [x0] cmp w0, 0 bne .L347 adrp x0, _x_p2_l0 add x0, x0, :lo12:_x_p2_l0 ldrb w0, [x0] cmp w0, 0 bne .L347 adrp x0, _x_p2_l1 add x0, x0, :lo12:_x_p2_l1 ldrb w0, [x0] cmp w0, 0 bne .L347 adrp x0, v2 add x0, x0, :lo12:v2 ldrb w0, [x0] cmp w0, 0 cset w0, eq and w1, w0, 255 adrp x0, _x_v2 add x0, x0, :lo12:_x_v2 ldrb w0, [x0] cmp w0, 0 cset w0, ne and w0, w0, 255 eor w0, w1, w0 and w0, w0, 255 cmp w0, 0 beq .L347 adrp x0, p2_c add x0, x0, :lo12:p2_c ldr s1, [x0] adrp x0, _x_p2_c add x0, x0, :lo12:_x_p2_c ldr s0, [x0] fcmp s1, s0 beq .L348 .L347: adrp x0, p2_l3 add x0, x0, :lo12:p2_l3 ldrb w0, [x0] cmp w0, 0 beq .L348 adrp x0, p2_l2 add x0, x0, :lo12:p2_l2 ldrb w0, [x0] cmp w0, 0 bne .L348 adrp x0, p2_l0 add x0, x0, :lo12:p2_l0 ldrb w0, [x0] cmp w0, 0 bne .L348 adrp x0, p2_l1 add x0, x0, :lo12:p2_l1 ldrb w0, [x0] cmp w0, 0 bne .L348 adrp x0, delta add x0, x0, :lo12:delta ldr s0, [x0] fcmp s0, #0.0 bne .L348 adrp x0, p2_evt add x0, x0, :lo12:p2_evt ldrb w0, [x0] cmp w0, 0 bne .L117 .L348: adrp x0, _x_p1_l3 add x0, x0, :lo12:_x_p1_l3 ldrb w0, [x0] cmp w0, 0 beq .L349 adrp x0, _x_p1_l2 add x0, x0, :lo12:_x_p1_l2 ldrb w0, [x0] cmp w0, 0 bne .L349 adrp x0, _x_p1_l0 add x0, x0, :lo12:_x_p1_l0 ldrb w0, [x0] cmp w0, 0 bne .L349 adrp x0, _x_p1_l1 add x0, x0, :lo12:_x_p1_l1 ldrb w0, [x0] cmp w0, 0 beq .L350 .L349: adrp x0, _x_p1_l3 add x0, x0, :lo12:_x_p1_l3 ldrb w0, [x0] cmp w0, 0 bne .L351 adrp x0, _x_p1_l2 add x0, x0, :lo12:_x_p1_l2 ldrb w0, [x0] cmp w0, 0 beq .L351 adrp x0, _x_p1_l0 add x0, x0, :lo12:_x_p1_l0 ldrb w0, [x0] cmp w0, 0 beq .L351 adrp x0, _x_p1_l1 add x0, x0, :lo12:_x_p1_l1 ldrb w0, [x0] cmp w0, 0 bne .L350 .L351: adrp x0, _x_p1_l3 add x0, x0, :lo12:_x_p1_l3 ldrb w0, [x0] cmp w0, 0 bne .L352 adrp x0, _x_p1_l2 add x0, x0, :lo12:_x_p1_l2 ldrb w0, [x0] cmp w0, 0 beq .L352 adrp x0, _x_p1_l1 add x0, x0, :lo12:_x_p1_l1 ldrb w0, [x0] cmp w0, 0 beq .L352 adrp x0, _x_p1_l0 add x0, x0, :lo12:_x_p1_l0 ldrb w0, [x0] cmp w0, 0 beq .L350 .L352: adrp x0, _x_p1_l3 add x0, x0, :lo12:_x_p1_l3 ldrb w0, [x0] cmp w0, 0 bne .L353 adrp x0, _x_p1_l2 add x0, x0, :lo12:_x_p1_l2 ldrb w0, [x0] cmp w0, 0 beq .L353 adrp x0, _x_p1_l0 add x0, x0, :lo12:_x_p1_l0 ldrb w0, [x0] cmp w0, 0 beq .L353 adrp x0, _x_p1_l1 add x0, x0, :lo12:_x_p1_l1 ldrb w0, [x0] cmp w0, 0 beq .L350 .L353: adrp x0, _x_p1_l3 add x0, x0, :lo12:_x_p1_l3 ldrb w0, [x0] cmp w0, 0 bne .L354 adrp x0, _x_p1_l2 add x0, x0, :lo12:_x_p1_l2 ldrb w0, [x0] cmp w0, 0 beq .L354 adrp x0, _x_p1_l0 add x0, x0, :lo12:_x_p1_l0 ldrb w0, [x0] cmp w0, 0 bne .L354 adrp x0, _x_p1_l1 add x0, x0, :lo12:_x_p1_l1 ldrb w0, [x0] cmp w0, 0 beq .L350 .L354: adrp x0, _x_p1_l3 add x0, x0, :lo12:_x_p1_l3 ldrb w0, [x0] cmp w0, 0 bne .L355 adrp x0, _x_p1_l2 add x0, x0, :lo12:_x_p1_l2 ldrb w0, [x0] cmp w0, 0 bne .L355 adrp x0, _x_p1_l0 add x0, x0, :lo12:_x_p1_l0 ldrb w0, [x0] cmp w0, 0 beq .L355 adrp x0, _x_p1_l1 add x0, x0, :lo12:_x_p1_l1 ldrb w0, [x0] cmp w0, 0 bne .L350 .L355: adrp x0, _x_p1_l3 add x0, x0, :lo12:_x_p1_l3 ldrb w0, [x0] cmp w0, 0 bne .L356 adrp x0, _x_p1_l2 add x0, x0, :lo12:_x_p1_l2 ldrb w0, [x0] cmp w0, 0 bne .L356 adrp x0, _x_p1_l1 add x0, x0, :lo12:_x_p1_l1 ldrb w0, [x0] cmp w0, 0 beq .L356 adrp x0, _x_p1_l0 add x0, x0, :lo12:_x_p1_l0 ldrb w0, [x0] cmp w0, 0 beq .L350 .L356: adrp x0, _x_p1_l3 add x0, x0, :lo12:_x_p1_l3 ldrb w0, [x0] cmp w0, 0 bne .L357 adrp x0, _x_p1_l2 add x0, x0, :lo12:_x_p1_l2 ldrb w0, [x0] cmp w0, 0 bne .L357 adrp x0, _x_p1_l0 add x0, x0, :lo12:_x_p1_l0 ldrb w0, [x0] cmp w0, 0 bne .L357 adrp x0, _x_p1_l1 add x0, x0, :lo12:_x_p1_l1 ldrb w0, [x0] cmp w0, 0 beq .L350 .L357: adrp x0, _x_p1_l3 add x0, x0, :lo12:_x_p1_l3 ldrb w0, [x0] cmp w0, 0 bne .L117 adrp x0, _x_p1_l2 add x0, x0, :lo12:_x_p1_l2 ldrb w0, [x0] cmp w0, 0 bne .L117 adrp x0, _x_p1_l0 add x0, x0, :lo12:_x_p1_l0 ldrb w0, [x0] cmp w0, 0 beq .L117 adrp x0, _x_p1_l1 add x0, x0, :lo12:_x_p1_l1 ldrb w0, [x0] cmp w0, 0 bne .L117 .L350: adrp x0, _x_p1_c add x0, x0, :lo12:_x_p1_c ldr s1, [x0] adrp x0, _x_proposed1 add x0, x0, :lo12:_x_proposed1 ldr s0, [x0] fcmpe s1, s0 bls .L358 adrp x0, _x_p1_l3 add x0, x0, :lo12:_x_p1_l3 ldrb w0, [x0] cmp w0, 0 bne .L359 adrp x0, _x_p1_l2 add x0, x0, :lo12:_x_p1_l2 ldrb w0, [x0] cmp w0, 0 bne .L359 adrp x0, _x_p1_l0 add x0, x0, :lo12:_x_p1_l0 ldrb w0, [x0] cmp w0, 0 beq .L359 adrp x0, _x_p1_l1 add x0, x0, :lo12:_x_p1_l1 ldrb w0, [x0] cmp w0, 0 beq .L117 .L359: adrp x0, _x_p1_l3 add x0, x0, :lo12:_x_p1_l3 ldrb w0, [x0] cmp w0, 0 bne .L360 adrp x0, _x_p1_l2 add x0, x0, :lo12:_x_p1_l2 ldrb w0, [x0] cmp w0, 0 beq .L360 adrp x0, _x_p1_l0 add x0, x0, :lo12:_x_p1_l0 ldrb w0, [x0] cmp w0, 0 bne .L360 adrp x0, _x_p1_l1 add x0, x0, :lo12:_x_p1_l1 ldrb w0, [x0] cmp w0, 0 beq .L117 .L360: adrp x0, _x_p1_l3 add x0, x0, :lo12:_x_p1_l3 ldrb w0, [x0] cmp w0, 0 bne .L361 adrp x0, _x_p1_l2 add x0, x0, :lo12:_x_p1_l2 ldrb w0, [x0] cmp w0, 0 beq .L361 adrp x0, _x_p1_l0 add x0, x0, :lo12:_x_p1_l0 ldrb w0, [x0] cmp w0, 0 beq .L361 adrp x0, _x_p1_l1 add x0, x0, :lo12:_x_p1_l1 ldrb w0, [x0] cmp w0, 0 bne .L117 .L361: adrp x0, _x_p1_l3 add x0, x0, :lo12:_x_p1_l3 ldrb w0, [x0] cmp w0, 0 beq .L358 adrp x0, _x_p1_l2 add x0, x0, :lo12:_x_p1_l2 ldrb w0, [x0] cmp w0, 0 bne .L358 adrp x0, _x_p1_l0 add x0, x0, :lo12:_x_p1_l0 ldrb w0, [x0] cmp w0, 0 bne .L358 adrp x0, _x_p1_l1 add x0, x0, :lo12:_x_p1_l1 ldrb w0, [x0] cmp w0, 0 beq .L117 .L358: adrp x0, p1_l0 add x0, x0, :lo12:p1_l0 ldrb w0, [x0] cmp w0, 0 cset w0, eq and w1, w0, 255 adrp x0, _x_p1_l0 add x0, x0, :lo12:_x_p1_l0 ldrb w0, [x0] cmp w0, 0 cset w0, ne and w0, w0, 255 eor w0, w1, w0 and w0, w0, 255 cmp w0, 0 beq .L362 adrp x0, p1_l1 add x0, x0, :lo12:p1_l1 ldrb w0, [x0] cmp w0, 0 cset w0, eq and w1, w0, 255 adrp x0, _x_p1_l1 add x0, x0, :lo12:_x_p1_l1 ldrb w0, [x0] cmp w0, 0 cset w0, ne and w0, w0, 255 eor w0, w1, w0 and w0, w0, 255 cmp w0, 0 beq .L362 adrp x0, p1_l2 add x0, x0, :lo12:p1_l2 ldrb w0, [x0] cmp w0, 0 cset w0, eq and w1, w0, 255 adrp x0, _x_p1_l2 add x0, x0, :lo12:_x_p1_l2 ldrb w0, [x0] cmp w0, 0 cset w0, ne and w0, w0, 255 eor w0, w1, w0 and w0, w0, 255 cmp w0, 0 beq .L362 adrp x0, p1_l3 add x0, x0, :lo12:p1_l3 ldrb w0, [x0] cmp w0, 0 cset w0, eq and w1, w0, 255 adrp x0, _x_p1_l3 add x0, x0, :lo12:_x_p1_l3 ldrb w0, [x0] cmp w0, 0 cset w0, ne and w0, w0, 255 eor w0, w1, w0 and w0, w0, 255 cmp w0, 0 beq .L362 adrp x0, delta add x0, x0, :lo12:delta ldr s0, [x0] fcvt d1, s0 adrp x0, p1_c add x0, x0, :lo12:p1_c ldr s0, [x0] fcvt d2, s0 adrp x0, _x_p1_c add x0, x0, :lo12:_x_p1_c ldr s0, [x0] fcvt d0, s0 fsub d0, d2, d0 fadd d0, d1, d0 fcmp d0, #0.0 bne .L362 adrp x0, proposed1 add x0, x0, :lo12:proposed1 ldr s1, [x0] adrp x0, _x_proposed1 add x0, x0, :lo12:_x_proposed1 ldr s0, [x0] fcmp s1, s0 beq .L363 .L362: adrp x0, delta add x0, x0, :lo12:delta ldr s0, [x0] fcmpe s0, #0.0 bls .L475 b .L117 .L475: adrp x0, p1_evt add x0, x0, :lo12:p1_evt ldrb w0, [x0] cmp w0, 0 beq .L117 .L363: adrp x0, v1 add x0, x0, :lo12:v1 ldr w0, [x0] cmp w0, 0 bne .L365 adrp x0, _x_p1_l3 add x0, x0, :lo12:_x_p1_l3 ldrb w0, [x0] cmp w0, 0 bne .L365 adrp x0, _x_p1_l2 add x0, x0, :lo12:_x_p1_l2 ldrb w0, [x0] cmp w0, 0 bne .L365 adrp x0, _x_p1_l0 add x0, x0, :lo12:_x_p1_l0 ldrb w0, [x0] cmp w0, 0 beq .L365 adrp x0, _x_p1_l1 add x0, x0, :lo12:_x_p1_l1 ldrb w0, [x0] cmp w0, 0 bne .L365 adrp x0, v2 add x0, x0, :lo12:v2 ldrb w0, [x0] cmp w0, 0 cset w0, eq and w1, w0, 255 adrp x0, _x_v2 add x0, x0, :lo12:_x_v2 ldrb w0, [x0] cmp w0, 0 cset w0, ne and w0, w0, 255 eor w0, w1, w0 and w0, w0, 255 cmp w0, 0 beq .L365 adrp x0, _x_p1_c add x0, x0, :lo12:_x_p1_c ldr s0, [x0] fcmp s0, #0.0 bne .L365 adrp x0, v1 add x0, x0, :lo12:v1 ldr w1, [x0] adrp x0, _x_v1 add x0, x0, :lo12:_x_v1 ldr w0, [x0] cmp w1, w0 bne .L365 adrp x0, proposed1 add x0, x0, :lo12:proposed1 ldr s1, [x0] adrp x0, _x_proposed1 add x0, x0, :lo12:_x_proposed1 ldr s0, [x0] fcmp s1, s0 beq .L366 .L365: adrp x0, p1_l3 add x0, x0, :lo12:p1_l3 ldrb w0, [x0] cmp w0, 0 bne .L366 adrp x0, p1_l2 add x0, x0, :lo12:p1_l2 ldrb w0, [x0] cmp w0, 0 bne .L366 adrp x0, p1_l0 add x0, x0, :lo12:p1_l0 ldrb w0, [x0] cmp w0, 0 bne .L366 adrp x0, p1_l1 add x0, x0, :lo12:p1_l1 ldrb w0, [x0] cmp w0, 0 bne .L366 adrp x0, delta add x0, x0, :lo12:delta ldr s0, [x0] fcmp s0, #0.0 bne .L366 adrp x0, p1_evt add x0, x0, :lo12:p1_evt ldrb w0, [x0] cmp w0, 0 bne .L117 .L366: adrp x0, proposed1 add x0, x0, :lo12:proposed1 ldr s1, [x0] adrp x0, _x_proposed1 add x0, x0, :lo12:_x_proposed1 ldr s0, [x0] fcmp s1, s0 bne .L367 adrp x0, v2 add x0, x0, :lo12:v2 ldrb w0, [x0] cmp w0, 0 cset w0, eq and w1, w0, 255 adrp x0, _x_v2 add x0, x0, :lo12:_x_v2 ldrb w0, [x0] cmp w0, 0 cset w0, ne and w0, w0, 255 eor w0, w1, w0 and w0, w0, 255 cmp w0, 0 beq .L367 adrp x0, _x_p1_c add x0, x0, :lo12:_x_p1_c ldr s0, [x0] fcmp s0, #0.0 bne .L367 adrp x0, _x_p1_l3 add x0, x0, :lo12:_x_p1_l3 ldrb w0, [x0] cmp w0, 0 bne .L367 adrp x0, _x_p1_l2 add x0, x0, :lo12:_x_p1_l2 ldrb w0, [x0] cmp w0, 0 bne .L367 adrp x0, _x_p1_l1 add x0, x0, :lo12:_x_p1_l1 ldrb w0, [x0] cmp w0, 0 beq .L367 adrp x0, _x_p1_l0 add x0, x0, :lo12:_x_p1_l0 ldrb w0, [x0] cmp w0, 0 bne .L367 adrp x0, _x_v1 add x0, x0, :lo12:_x_v1 ldr w0, [x0] cmp w0, 2 beq .L368 .L367: adrp x0, p1_l3 add x0, x0, :lo12:p1_l3 ldrb w0, [x0] cmp w0, 0 bne .L368 adrp x0, p1_l2 add x0, x0, :lo12:p1_l2 ldrb w0, [x0] cmp w0, 0 bne .L368 adrp x0, p1_l0 add x0, x0, :lo12:p1_l0 ldrb w0, [x0] cmp w0, 0 beq .L368 adrp x0, p1_l1 add x0, x0, :lo12:p1_l1 ldrb w0, [x0] cmp w0, 0 bne .L368 adrp x0, delta add x0, x0, :lo12:delta ldr s0, [x0] fcmp s0, #0.0 bne .L368 adrp x0, p1_evt add x0, x0, :lo12:p1_evt ldrb w0, [x0] cmp w0, 0 bne .L117 .L368: adrp x0, v2 add x0, x0, :lo12:v2 ldrb w0, [x0] cmp w0, 0 cset w0, eq and w1, w0, 255 adrp x0, _x_v2 add x0, x0, :lo12:_x_v2 ldrb w0, [x0] cmp w0, 0 cset w0, ne and w0, w0, 255 eor w0, w1, w0 and w0, w0, 255 cmp w0, 0 beq .L369 adrp x0, v1 add x0, x0, :lo12:v1 ldr w1, [x0] adrp x0, _x_v1 add x0, x0, :lo12:_x_v1 ldr w0, [x0] cmp w1, w0 bne .L369 adrp x0, _x_p1_l3 add x0, x0, :lo12:_x_p1_l3 ldrb w0, [x0] cmp w0, 0 bne .L370 adrp x0, _x_p1_l2 add x0, x0, :lo12:_x_p1_l2 ldrb w0, [x0] cmp w0, 0 bne .L370 adrp x0, _x_p1_l0 add x0, x0, :lo12:_x_p1_l0 ldrb w0, [x0] cmp w0, 0 bne .L370 adrp x0, _x_p1_l1 add x0, x0, :lo12:_x_p1_l1 ldrb w0, [x0] cmp w0, 0 beq .L371 .L370: adrp x0, _x_p1_l3 add x0, x0, :lo12:_x_p1_l3 ldrb w0, [x0] cmp w0, 0 bne .L369 adrp x0, _x_p1_l2 add x0, x0, :lo12:_x_p1_l2 ldrb w0, [x0] cmp w0, 0 bne .L369 adrp x0, _x_p1_l0 add x0, x0, :lo12:_x_p1_l0 ldrb w0, [x0] cmp w0, 0 beq .L369 adrp x0, _x_p1_l1 add x0, x0, :lo12:_x_p1_l1 ldrb w0, [x0] cmp w0, 0 beq .L369 .L371: adrp x0, p1_c add x0, x0, :lo12:p1_c ldr s1, [x0] adrp x0, _x_p1_c add x0, x0, :lo12:_x_p1_c ldr s0, [x0] fcmp s1, s0 beq .L372 .L369: adrp x0, p1_l3 add x0, x0, :lo12:p1_l3 ldrb w0, [x0] cmp w0, 0 bne .L372 adrp x0, p1_l2 add x0, x0, :lo12:p1_l2 ldrb w0, [x0] cmp w0, 0 bne .L372 adrp x0, p1_l1 add x0, x0, :lo12:p1_l1 ldrb w0, [x0] cmp w0, 0 beq .L372 adrp x0, p1_l0 add x0, x0, :lo12:p1_l0 ldrb w0, [x0] cmp w0, 0 bne .L372 adrp x0, delta add x0, x0, :lo12:delta ldr s0, [x0] fcmp s0, #0.0 bne .L372 adrp x0, p1_evt add x0, x0, :lo12:p1_evt ldrb w0, [x0] cmp w0, 0 bne .L117 .L372: adrp x0, proposed1 add x0, x0, :lo12:proposed1 ldr s1, [x0] adrp x0, _x_proposed1 add x0, x0, :lo12:_x_proposed1 ldr s0, [x0] fcmp s1, s0 bne .L373 adrp x0, v1 add x0, x0, :lo12:v1 ldr w0, [x0] cmp w0, 2 bne .L374 .L373: adrp x0, delta add x0, x0, :lo12:delta ldr s0, [x0] fcmp s0, #0.0 bne .L374 adrp x0, p1_evt add x0, x0, :lo12:p1_evt ldrb w0, [x0] cmp w0, 0 beq .L374 adrp x0, _x_p1_l3 add x0, x0, :lo12:_x_p1_l3 ldrb w0, [x0] cmp w0, 0 bne .L374 adrp x0, _x_p1_l2 add x0, x0, :lo12:_x_p1_l2 ldrb w0, [x0] cmp w0, 0 bne .L374 adrp x0, _x_p1_l0 add x0, x0, :lo12:_x_p1_l0 ldrb w0, [x0] cmp w0, 0 bne .L374 adrp x0, _x_p1_l1 add x0, x0, :lo12:_x_p1_l1 ldrb w0, [x0] cmp w0, 0 bne .L374 adrp x0, p1_l3 add x0, x0, :lo12:p1_l3 ldrb w0, [x0] cmp w0, 0 bne .L374 adrp x0, p1_l2 add x0, x0, :lo12:p1_l2 ldrb w0, [x0] cmp w0, 0 bne .L374 adrp x0, p1_l1 add x0, x0, :lo12:p1_l1 ldrb w0, [x0] cmp w0, 0 beq .L374 adrp x0, p1_l0 add x0, x0, :lo12:p1_l0 ldrb w0, [x0] cmp w0, 0 beq .L117 .L374: adrp x0, v1 add x0, x0, :lo12:v1 ldr w0, [x0] cmp w0, 2 bne .L375 adrp x0, p1_c add x0, x0, :lo12:p1_c ldr s1, [x0] adrp x0, max_prop add x0, x0, :lo12:max_prop ldr s0, [x0] fcmpe s1, s0 cset w0, ls and w0, w0, 255 eor w0, w0, 1 and w0, w0, 255 cmp w0, 0 beq .L375 adrp x0, proposed1 add x0, x0, :lo12:proposed1 ldr s1, [x0] adrp x0, _x_proposed1 add x0, x0, :lo12:_x_proposed1 ldr s0, [x0] fcmpe s1, s0 cset w0, ls and w0, w0, 255 eor w0, w0, 1 and w0, w0, 255 cmp w0, 0 bne .L376 .L375: adrp x0, delta add x0, x0, :lo12:delta ldr s0, [x0] fcmp s0, #0.0 bne .L376 adrp x0, p1_evt add x0, x0, :lo12:p1_evt ldrb w0, [x0] cmp w0, 0 beq .L376 adrp x0, p1_l3 add x0, x0, :lo12:p1_l3 ldrb w0, [x0] cmp w0, 0 bne .L376 adrp x0, p1_l2 add x0, x0, :lo12:p1_l2 ldrb w0, [x0] cmp w0, 0 bne .L376 adrp x0, p1_l1 add x0, x0, :lo12:p1_l1 ldrb w0, [x0] cmp w0, 0 beq .L376 adrp x0, p1_l0 add x0, x0, :lo12:p1_l0 ldrb w0, [x0] cmp w0, 0 bne .L376 adrp x0, _x_p1_l3 add x0, x0, :lo12:_x_p1_l3 ldrb w0, [x0] cmp w0, 0 bne .L376 adrp x0, _x_p1_l2 add x0, x0, :lo12:_x_p1_l2 ldrb w0, [x0] cmp w0, 0 bne .L376 adrp x0, _x_p1_l0 add x0, x0, :lo12:_x_p1_l0 ldrb w0, [x0] cmp w0, 0 beq .L376 adrp x0, _x_p1_l1 add x0, x0, :lo12:_x_p1_l1 ldrb w0, [x0] cmp w0, 0 bne .L117 .L376: adrp x0, v2 add x0, x0, :lo12:v2 ldrb w0, [x0] cmp w0, 0 cset w0, eq and w1, w0, 255 adrp x0, _x_v2 add x0, x0, :lo12:_x_v2 ldrb w0, [x0] cmp w0, 0 cset w0, ne and w0, w0, 255 eor w0, w1, w0 and w0, w0, 255 cmp w0, 0 beq .L377 adrp x0, v1 add x0, x0, :lo12:v1 ldr w1, [x0] adrp x0, _x_v1 add x0, x0, :lo12:_x_v1 ldr w0, [x0] cmp w1, w0 bne .L377 adrp x0, proposed1 add x0, x0, :lo12:proposed1 ldr s1, [x0] adrp x0, _x_proposed1 add x0, x0, :lo12:_x_proposed1 ldr s0, [x0] fcmp s1, s0 bne .L377 adrp x0, _x_p1_l3 add x0, x0, :lo12:_x_p1_l3 ldrb w0, [x0] cmp w0, 0 bne .L378 adrp x0, _x_p1_l2 add x0, x0, :lo12:_x_p1_l2 ldrb w0, [x0] cmp w0, 0 bne .L378 adrp x0, _x_p1_l0 add x0, x0, :lo12:_x_p1_l0 ldrb w0, [x0] cmp w0, 0 bne .L378 adrp x0, _x_p1_l1 add x0, x0, :lo12:_x_p1_l1 ldrb w0, [x0] cmp w0, 0 beq .L379 .L378: adrp x0, _x_p1_l3 add x0, x0, :lo12:_x_p1_l3 ldrb w0, [x0] cmp w0, 0 bne .L377 adrp x0, _x_p1_l2 add x0, x0, :lo12:_x_p1_l2 ldrb w0, [x0] cmp w0, 0 beq .L377 adrp x0, _x_p1_l0 add x0, x0, :lo12:_x_p1_l0 ldrb w0, [x0] cmp w0, 0 bne .L377 adrp x0, _x_p1_l1 add x0, x0, :lo12:_x_p1_l1 ldrb w0, [x0] cmp w0, 0 beq .L379 .L377: adrp x0, p1_l3 add x0, x0, :lo12:p1_l3 ldrb w0, [x0] cmp w0, 0 bne .L379 adrp x0, p1_l2 add x0, x0, :lo12:p1_l2 ldrb w0, [x0] cmp w0, 0 bne .L379 adrp x0, p1_l0 add x0, x0, :lo12:p1_l0 ldrb w0, [x0] cmp w0, 0 beq .L379 adrp x0, p1_l1 add x0, x0, :lo12:p1_l1 ldrb w0, [x0] cmp w0, 0 beq .L379 adrp x0, delta add x0, x0, :lo12:delta ldr s0, [x0] fcmp s0, #0.0 bne .L379 adrp x0, p1_evt add x0, x0, :lo12:p1_evt ldrb w0, [x0] cmp w0, 0 bne .L117 .L379: adrp x0, v2 add x0, x0, :lo12:v2 ldrb w0, [x0] cmp w0, 0 beq .L380 adrp x0, p1_c add x0, x0, :lo12:p1_c ldr s1, [x0] adrp x0, _x_p1_c add x0, x0, :lo12:_x_p1_c ldr s0, [x0] fcmp s1, s0 beq .L381 .L380: adrp x0, delta add x0, x0, :lo12:delta ldr s0, [x0] fcmp s0, #0.0 bne .L381 adrp x0, p1_evt add x0, x0, :lo12:p1_evt ldrb w0, [x0] cmp w0, 0 beq .L381 adrp x0, _x_p1_l3 add x0, x0, :lo12:_x_p1_l3 ldrb w0, [x0] cmp w0, 0 bne .L381 adrp x0, _x_p1_l2 add x0, x0, :lo12:_x_p1_l2 ldrb w0, [x0] cmp w0, 0 bne .L381 adrp x0, _x_p1_l0 add x0, x0, :lo12:_x_p1_l0 ldrb w0, [x0] cmp w0, 0 bne .L381 adrp x0, _x_p1_l1 add x0, x0, :lo12:_x_p1_l1 ldrb w0, [x0] cmp w0, 0 bne .L381 adrp x0, p1_l3 add x0, x0, :lo12:p1_l3 ldrb w0, [x0] cmp w0, 0 bne .L381 adrp x0, p1_l2 add x0, x0, :lo12:p1_l2 ldrb w0, [x0] cmp w0, 0 bne .L381 adrp x0, p1_l0 add x0, x0, :lo12:p1_l0 ldrb w0, [x0] cmp w0, 0 beq .L381 adrp x0, p1_l1 add x0, x0, :lo12:p1_l1 ldrb w0, [x0] cmp w0, 0 bne .L117 .L381: adrp x0, v2 add x0, x0, :lo12:v2 ldrb w0, [x0] cmp w0, 0 bne .L382 adrp x0, _x_p1_c add x0, x0, :lo12:_x_p1_c ldr s0, [x0] fcmp s0, #0.0 beq .L383 .L382: adrp x0, delta add x0, x0, :lo12:delta ldr s0, [x0] fcmp s0, #0.0 bne .L383 adrp x0, p1_evt add x0, x0, :lo12:p1_evt ldrb w0, [x0] cmp w0, 0 beq .L383 adrp x0, p1_l3 add x0, x0, :lo12:p1_l3 ldrb w0, [x0] cmp w0, 0 bne .L383 adrp x0, p1_l2 add x0, x0, :lo12:p1_l2 ldrb w0, [x0] cmp w0, 0 bne .L383 adrp x0, p1_l0 add x0, x0, :lo12:p1_l0 ldrb w0, [x0] cmp w0, 0 beq .L383 adrp x0, p1_l1 add x0, x0, :lo12:p1_l1 ldrb w0, [x0] cmp w0, 0 beq .L383 adrp x0, _x_p1_l3 add x0, x0, :lo12:_x_p1_l3 ldrb w0, [x0] cmp w0, 0 bne .L383 adrp x0, _x_p1_l2 add x0, x0, :lo12:_x_p1_l2 ldrb w0, [x0] cmp w0, 0 beq .L383 adrp x0, _x_p1_l0 add x0, x0, :lo12:_x_p1_l0 ldrb w0, [x0] cmp w0, 0 bne .L383 adrp x0, _x_p1_l1 add x0, x0, :lo12:_x_p1_l1 ldrb w0, [x0] cmp w0, 0 beq .L117 .L383: adrp x0, v1 add x0, x0, :lo12:v1 ldr w1, [x0] adrp x0, _x_v1 add x0, x0, :lo12:_x_v1 ldr w0, [x0] cmp w1, w0 bne .L384 adrp x0, proposed1 add x0, x0, :lo12:proposed1 ldr s1, [x0] adrp x0, _x_proposed1 add x0, x0, :lo12:_x_proposed1 ldr s0, [x0] fcmp s1, s0 bne .L384 adrp x0, _x_p1_c add x0, x0, :lo12:_x_p1_c ldr s0, [x0] fcmp s0, #0.0 bne .L384 adrp x0, _x_v2 add x0, x0, :lo12:_x_v2 ldrb w0, [x0] cmp w0, 0 beq .L384 adrp x0, _x_p1_l3 add x0, x0, :lo12:_x_p1_l3 ldrb w0, [x0] cmp w0, 0 bne .L384 adrp x0, _x_p1_l2 add x0, x0, :lo12:_x_p1_l2 ldrb w0, [x0] cmp w0, 0 beq .L384 adrp x0, _x_p1_l0 add x0, x0, :lo12:_x_p1_l0 ldrb w0, [x0] cmp w0, 0 beq .L384 adrp x0, _x_p1_l1 add x0, x0, :lo12:_x_p1_l1 ldrb w0, [x0] cmp w0, 0 beq .L385 .L384: adrp x0, p1_l3 add x0, x0, :lo12:p1_l3 ldrb w0, [x0] cmp w0, 0 bne .L385 adrp x0, p1_l2 add x0, x0, :lo12:p1_l2 ldrb w0, [x0] cmp w0, 0 beq .L385 adrp x0, p1_l0 add x0, x0, :lo12:p1_l0 ldrb w0, [x0] cmp w0, 0 bne .L385 adrp x0, p1_l1 add x0, x0, :lo12:p1_l1 ldrb w0, [x0] cmp w0, 0 bne .L385 adrp x0, delta add x0, x0, :lo12:delta ldr s0, [x0] fcmp s0, #0.0 bne .L385 adrp x0, p1_evt add x0, x0, :lo12:p1_evt ldrb w0, [x0] cmp w0, 0 bne .L117 .L385: adrp x0, proposed1 add x0, x0, :lo12:proposed1 ldr s1, [x0] adrp x0, _x_proposed1 add x0, x0, :lo12:_x_proposed1 ldr s0, [x0] fcmp s1, s0 bne .L386 adrp x0, v2 add x0, x0, :lo12:v2 ldrb w0, [x0] cmp w0, 0 cset w0, eq and w1, w0, 255 adrp x0, _x_v2 add x0, x0, :lo12:_x_v2 ldrb w0, [x0] cmp w0, 0 cset w0, ne and w0, w0, 255 eor w0, w1, w0 and w0, w0, 255 cmp w0, 0 beq .L386 adrp x0, v1 add x0, x0, :lo12:v1 ldr w1, [x0] adrp x0, _x_v1 add x0, x0, :lo12:_x_v1 ldr w0, [x0] cmp w1, w0 bne .L386 adrp x0, p1_c add x0, x0, :lo12:p1_c ldr s1, [x0] adrp x0, _x_p1_c add x0, x0, :lo12:_x_p1_c ldr s0, [x0] fcmp s1, s0 bne .L386 adrp x0, _x_p1_l3 add x0, x0, :lo12:_x_p1_l3 ldrb w0, [x0] cmp w0, 0 bne .L387 adrp x0, _x_p1_l2 add x0, x0, :lo12:_x_p1_l2 ldrb w0, [x0] cmp w0, 0 bne .L387 adrp x0, _x_p1_l0 add x0, x0, :lo12:_x_p1_l0 ldrb w0, [x0] cmp w0, 0 bne .L387 adrp x0, _x_p1_l1 add x0, x0, :lo12:_x_p1_l1 ldrb w0, [x0] cmp w0, 0 beq .L388 .L387: adrp x0, _x_p1_l3 add x0, x0, :lo12:_x_p1_l3 ldrb w0, [x0] cmp w0, 0 bne .L386 adrp x0, _x_p1_l2 add x0, x0, :lo12:_x_p1_l2 ldrb w0, [x0] cmp w0, 0 beq .L386 adrp x0, _x_p1_l1 add x0, x0, :lo12:_x_p1_l1 ldrb w0, [x0] cmp w0, 0 beq .L386 adrp x0, _x_p1_l0 add x0, x0, :lo12:_x_p1_l0 ldrb w0, [x0] cmp w0, 0 beq .L388 .L386: adrp x0, p1_l3 add x0, x0, :lo12:p1_l3 ldrb w0, [x0] cmp w0, 0 bne .L388 adrp x0, p1_l2 add x0, x0, :lo12:p1_l2 ldrb w0, [x0] cmp w0, 0 beq .L388 adrp x0, p1_l0 add x0, x0, :lo12:p1_l0 ldrb w0, [x0] cmp w0, 0 beq .L388 adrp x0, p1_l1 add x0, x0, :lo12:p1_l1 ldrb w0, [x0] cmp w0, 0 bne .L388 adrp x0, delta add x0, x0, :lo12:delta ldr s0, [x0] fcmp s0, #0.0 bne .L388 adrp x0, p1_evt add x0, x0, :lo12:p1_evt ldrb w0, [x0] cmp w0, 0 bne .L117 .L388: adrp x0, v1 add x0, x0, :lo12:v1 ldr w0, [x0] cmp w0, 2 bne .L389 adrp x0, delta add x0, x0, :lo12:delta ldr s0, [x0] fcmp s0, #0.0 bne .L389 adrp x0, p1_evt add x0, x0, :lo12:p1_evt ldrb w0, [x0] cmp w0, 0 beq .L389 adrp x0, _x_p1_l3 add x0, x0, :lo12:_x_p1_l3 ldrb w0, [x0] cmp w0, 0 bne .L389 adrp x0, _x_p1_l2 add x0, x0, :lo12:_x_p1_l2 ldrb w0, [x0] cmp w0, 0 bne .L389 adrp x0, _x_p1_l0 add x0, x0, :lo12:_x_p1_l0 ldrb w0, [x0] cmp w0, 0 bne .L389 adrp x0, _x_p1_l1 add x0, x0, :lo12:_x_p1_l1 ldrb w0, [x0] cmp w0, 0 bne .L389 adrp x0, p1_l3 add x0, x0, :lo12:p1_l3 ldrb w0, [x0] cmp w0, 0 bne .L389 adrp x0, p1_l2 add x0, x0, :lo12:p1_l2 ldrb w0, [x0] cmp w0, 0 beq .L389 adrp x0, p1_l0 add x0, x0, :lo12:p1_l0 ldrb w0, [x0] cmp w0, 0 beq .L389 adrp x0, p1_l1 add x0, x0, :lo12:p1_l1 ldrb w0, [x0] cmp w0, 0 beq .L117 .L389: adrp x0, v1 add x0, x0, :lo12:v1 ldr w0, [x0] cmp w0, 2 beq .L390 adrp x0, delta add x0, x0, :lo12:delta ldr s0, [x0] fcmp s0, #0.0 bne .L390 adrp x0, p1_evt add x0, x0, :lo12:p1_evt ldrb w0, [x0] cmp w0, 0 beq .L390 adrp x0, p1_l3 add x0, x0, :lo12:p1_l3 ldrb w0, [x0] cmp w0, 0 bne .L390 adrp x0, p1_l2 add x0, x0, :lo12:p1_l2 ldrb w0, [x0] cmp w0, 0 beq .L390 adrp x0, p1_l0 add x0, x0, :lo12:p1_l0 ldrb w0, [x0] cmp w0, 0 beq .L390 adrp x0, p1_l1 add x0, x0, :lo12:p1_l1 ldrb w0, [x0] cmp w0, 0 bne .L390 adrp x0, _x_p1_l3 add x0, x0, :lo12:_x_p1_l3 ldrb w0, [x0] cmp w0, 0 bne .L390 adrp x0, _x_p1_l2 add x0, x0, :lo12:_x_p1_l2 ldrb w0, [x0] cmp w0, 0 beq .L390 adrp x0, _x_p1_l1 add x0, x0, :lo12:_x_p1_l1 ldrb w0, [x0] cmp w0, 0 beq .L390 adrp x0, _x_p1_l0 add x0, x0, :lo12:_x_p1_l0 ldrb w0, [x0] cmp w0, 0 beq .L117 .L390: adrp x0, proposed1 add x0, x0, :lo12:proposed1 ldr s1, [x0] adrp x0, _x_proposed1 add x0, x0, :lo12:_x_proposed1 ldr s0, [x0] fcmp s1, s0 bne .L391 adrp x0, v2 add x0, x0, :lo12:v2 ldrb w0, [x0] cmp w0, 0 cset w0, eq and w1, w0, 255 adrp x0, _x_v2 add x0, x0, :lo12:_x_v2 ldrb w0, [x0] cmp w0, 0 cset w0, ne and w0, w0, 255 eor w0, w1, w0 and w0, w0, 255 cmp w0, 0 beq .L391 adrp x0, v1 add x0, x0, :lo12:v1 ldr w1, [x0] adrp x0, _x_v1 add x0, x0, :lo12:_x_v1 ldr w0, [x0] cmp w1, w0 bne .L391 adrp x0, _x_p1_l3 add x0, x0, :lo12:_x_p1_l3 ldrb w0, [x0] cmp w0, 0 bne .L391 adrp x0, _x_p1_l2 add x0, x0, :lo12:_x_p1_l2 ldrb w0, [x0] cmp w0, 0 beq .L391 adrp x0, _x_p1_l0 add x0, x0, :lo12:_x_p1_l0 ldrb w0, [x0] cmp w0, 0 beq .L391 adrp x0, _x_p1_l1 add x0, x0, :lo12:_x_p1_l1 ldrb w0, [x0] cmp w0, 0 beq .L391 adrp x0, _x_p1_c add x0, x0, :lo12:_x_p1_c ldr s0, [x0] fcmp s0, #0.0 beq .L392 .L391: adrp x0, p1_l3 add x0, x0, :lo12:p1_l3 ldrb w0, [x0] cmp w0, 0 bne .L392 adrp x0, p1_l2 add x0, x0, :lo12:p1_l2 ldrb w0, [x0] cmp w0, 0 beq .L392 adrp x0, p1_l1 add x0, x0, :lo12:p1_l1 ldrb w0, [x0] cmp w0, 0 beq .L392 adrp x0, p1_l0 add x0, x0, :lo12:p1_l0 ldrb w0, [x0] cmp w0, 0 bne .L392 adrp x0, delta add x0, x0, :lo12:delta ldr s0, [x0] fcmp s0, #0.0 bne .L392 adrp x0, p1_evt add x0, x0, :lo12:p1_evt ldrb w0, [x0] cmp w0, 0 bne .L117 .L392: adrp x0, proposed1 add x0, x0, :lo12:proposed1 ldr s1, [x0] adrp x0, _x_proposed1 add x0, x0, :lo12:_x_proposed1 ldr s0, [x0] fcmp s1, s0 bne .L393 adrp x0, _x_v2 add x0, x0, :lo12:_x_v2 ldrb w0, [x0] cmp w0, 0 bne .L393 adrp x0, _x_p1_l3 add x0, x0, :lo12:_x_p1_l3 ldrb w0, [x0] cmp w0, 0 beq .L393 adrp x0, _x_p1_l2 add x0, x0, :lo12:_x_p1_l2 ldrb w0, [x0] cmp w0, 0 bne .L393 adrp x0, _x_p1_l0 add x0, x0, :lo12:_x_p1_l0 ldrb w0, [x0] cmp w0, 0 bne .L393 adrp x0, _x_p1_l1 add x0, x0, :lo12:_x_p1_l1 ldrb w0, [x0] cmp w0, 0 bne .L393 adrp x0, v1 add x0, x0, :lo12:v1 ldr w1, [x0] adrp x0, _x_v1 add x0, x0, :lo12:_x_v1 ldr w0, [x0] cmp w1, w0 bne .L393 adrp x0, _x_p1_c add x0, x0, :lo12:_x_p1_c ldr s0, [x0] fcmp s0, #0.0 beq .L394 .L393: adrp x0, p1_l3 add x0, x0, :lo12:p1_l3 ldrb w0, [x0] cmp w0, 0 bne .L394 adrp x0, p1_l2 add x0, x0, :lo12:p1_l2 ldrb w0, [x0] cmp w0, 0 beq .L394 adrp x0, p1_l0 add x0, x0, :lo12:p1_l0 ldrb w0, [x0] cmp w0, 0 beq .L394 adrp x0, p1_l1 add x0, x0, :lo12:p1_l1 ldrb w0, [x0] cmp w0, 0 beq .L394 adrp x0, delta add x0, x0, :lo12:delta ldr s0, [x0] fcmp s0, #0.0 bne .L394 adrp x0, p1_evt add x0, x0, :lo12:p1_evt ldrb w0, [x0] cmp w0, 0 bne .L117 .L394: adrp x0, proposed1 add x0, x0, :lo12:proposed1 ldr s1, [x0] adrp x0, _x_proposed1 add x0, x0, :lo12:_x_proposed1 ldr s0, [x0] fcmp s1, s0 bne .L395 adrp x0, _x_v1 add x0, x0, :lo12:_x_v1 ldr w0, [x0] cmp w0, 0 bne .L395 adrp x0, _x_p1_l3 add x0, x0, :lo12:_x_p1_l3 ldrb w0, [x0] cmp w0, 0 bne .L395 adrp x0, _x_p1_l2 add x0, x0, :lo12:_x_p1_l2 ldrb w0, [x0] cmp w0, 0 bne .L395 adrp x0, _x_p1_l0 add x0, x0, :lo12:_x_p1_l0 ldrb w0, [x0] cmp w0, 0 bne .L395 adrp x0, _x_p1_l1 add x0, x0, :lo12:_x_p1_l1 ldrb w0, [x0] cmp w0, 0 bne .L395 adrp x0, v2 add x0, x0, :lo12:v2 ldrb w0, [x0] cmp w0, 0 cset w0, eq and w1, w0, 255 adrp x0, _x_v2 add x0, x0, :lo12:_x_v2 ldrb w0, [x0] cmp w0, 0 cset w0, ne and w0, w0, 255 eor w0, w1, w0 and w0, w0, 255 cmp w0, 0 beq .L395 adrp x0, p1_c add x0, x0, :lo12:p1_c ldr s1, [x0] adrp x0, _x_p1_c add x0, x0, :lo12:_x_p1_c ldr s0, [x0] fcmp s1, s0 beq .L396 .L395: adrp x0, p1_l3 add x0, x0, :lo12:p1_l3 ldrb w0, [x0] cmp w0, 0 beq .L396 adrp x0, p1_l2 add x0, x0, :lo12:p1_l2 ldrb w0, [x0] cmp w0, 0 bne .L396 adrp x0, p1_l0 add x0, x0, :lo12:p1_l0 ldrb w0, [x0] cmp w0, 0 bne .L396 adrp x0, p1_l1 add x0, x0, :lo12:p1_l1 ldrb w0, [x0] cmp w0, 0 bne .L396 adrp x0, delta add x0, x0, :lo12:delta ldr s0, [x0] fcmp s0, #0.0 bne .L396 adrp x0, p1_evt add x0, x0, :lo12:p1_evt ldrb w0, [x0] cmp w0, 0 bne .L117 .L396: adrp x0, _x_p0_l3 add x0, x0, :lo12:_x_p0_l3 ldrb w0, [x0] cmp w0, 0 beq .L397 adrp x0, _x_p0_l2 add x0, x0, :lo12:_x_p0_l2 ldrb w0, [x0] cmp w0, 0 bne .L397 adrp x0, _x_p0_l0 add x0, x0, :lo12:_x_p0_l0 ldrb w0, [x0] cmp w0, 0 bne .L397 adrp x0, _x_p0_l1 add x0, x0, :lo12:_x_p0_l1 ldrb w0, [x0] cmp w0, 0 beq .L398 .L397: adrp x0, _x_p0_l3 add x0, x0, :lo12:_x_p0_l3 ldrb w0, [x0] cmp w0, 0 bne .L399 adrp x0, _x_p0_l2 add x0, x0, :lo12:_x_p0_l2 ldrb w0, [x0] cmp w0, 0 beq .L399 adrp x0, _x_p0_l0 add x0, x0, :lo12:_x_p0_l0 ldrb w0, [x0] cmp w0, 0 beq .L399 adrp x0, _x_p0_l1 add x0, x0, :lo12:_x_p0_l1 ldrb w0, [x0] cmp w0, 0 bne .L398 .L399: adrp x0, _x_p0_l3 add x0, x0, :lo12:_x_p0_l3 ldrb w0, [x0] cmp w0, 0 bne .L400 adrp x0, _x_p0_l2 add x0, x0, :lo12:_x_p0_l2 ldrb w0, [x0] cmp w0, 0 beq .L400 adrp x0, _x_p0_l1 add x0, x0, :lo12:_x_p0_l1 ldrb w0, [x0] cmp w0, 0 beq .L400 adrp x0, _x_p0_l0 add x0, x0, :lo12:_x_p0_l0 ldrb w0, [x0] cmp w0, 0 beq .L398 .L400: adrp x0, _x_p0_l3 add x0, x0, :lo12:_x_p0_l3 ldrb w0, [x0] cmp w0, 0 bne .L401 adrp x0, _x_p0_l2 add x0, x0, :lo12:_x_p0_l2 ldrb w0, [x0] cmp w0, 0 beq .L401 adrp x0, _x_p0_l0 add x0, x0, :lo12:_x_p0_l0 ldrb w0, [x0] cmp w0, 0 beq .L401 adrp x0, _x_p0_l1 add x0, x0, :lo12:_x_p0_l1 ldrb w0, [x0] cmp w0, 0 beq .L398 .L401: adrp x0, _x_p0_l3 add x0, x0, :lo12:_x_p0_l3 ldrb w0, [x0] cmp w0, 0 bne .L402 adrp x0, _x_p0_l2 add x0, x0, :lo12:_x_p0_l2 ldrb w0, [x0] cmp w0, 0 beq .L402 adrp x0, _x_p0_l0 add x0, x0, :lo12:_x_p0_l0 ldrb w0, [x0] cmp w0, 0 bne .L402 adrp x0, _x_p0_l1 add x0, x0, :lo12:_x_p0_l1 ldrb w0, [x0] cmp w0, 0 beq .L398 .L402: adrp x0, _x_p0_l3 add x0, x0, :lo12:_x_p0_l3 ldrb w0, [x0] cmp w0, 0 bne .L403 adrp x0, _x_p0_l2 add x0, x0, :lo12:_x_p0_l2 ldrb w0, [x0] cmp w0, 0 bne .L403 adrp x0, _x_p0_l0 add x0, x0, :lo12:_x_p0_l0 ldrb w0, [x0] cmp w0, 0 beq .L403 adrp x0, _x_p0_l1 add x0, x0, :lo12:_x_p0_l1 ldrb w0, [x0] cmp w0, 0 bne .L398 .L403: adrp x0, _x_p0_l3 add x0, x0, :lo12:_x_p0_l3 ldrb w0, [x0] cmp w0, 0 bne .L404 adrp x0, _x_p0_l2 add x0, x0, :lo12:_x_p0_l2 ldrb w0, [x0] cmp w0, 0 bne .L404 adrp x0, _x_p0_l1 add x0, x0, :lo12:_x_p0_l1 ldrb w0, [x0] cmp w0, 0 beq .L404 adrp x0, _x_p0_l0 add x0, x0, :lo12:_x_p0_l0 ldrb w0, [x0] cmp w0, 0 beq .L398 .L404: adrp x0, _x_p0_l3 add x0, x0, :lo12:_x_p0_l3 ldrb w0, [x0] cmp w0, 0 bne .L405 adrp x0, _x_p0_l2 add x0, x0, :lo12:_x_p0_l2 ldrb w0, [x0] cmp w0, 0 bne .L405 adrp x0, _x_p0_l0 add x0, x0, :lo12:_x_p0_l0 ldrb w0, [x0] cmp w0, 0 bne .L405 adrp x0, _x_p0_l1 add x0, x0, :lo12:_x_p0_l1 ldrb w0, [x0] cmp w0, 0 beq .L398 .L405: adrp x0, _x_p0_l3 add x0, x0, :lo12:_x_p0_l3 ldrb w0, [x0] cmp w0, 0 bne .L117 adrp x0, _x_p0_l2 add x0, x0, :lo12:_x_p0_l2 ldrb w0, [x0] cmp w0, 0 bne .L117 adrp x0, _x_p0_l0 add x0, x0, :lo12:_x_p0_l0 ldrb w0, [x0] cmp w0, 0 beq .L117 adrp x0, _x_p0_l1 add x0, x0, :lo12:_x_p0_l1 ldrb w0, [x0] cmp w0, 0 bne .L117 .L398: adrp x0, _x_p0_c add x0, x0, :lo12:_x_p0_c ldr s1, [x0] adrp x0, _x_proposed0 add x0, x0, :lo12:_x_proposed0 ldr s0, [x0] fcmpe s1, s0 bls .L406 adrp x0, _x_p0_l3 add x0, x0, :lo12:_x_p0_l3 ldrb w0, [x0] cmp w0, 0 bne .L407 adrp x0, _x_p0_l2 add x0, x0, :lo12:_x_p0_l2 ldrb w0, [x0] cmp w0, 0 bne .L407 adrp x0, _x_p0_l0 add x0, x0, :lo12:_x_p0_l0 ldrb w0, [x0] cmp w0, 0 beq .L407 adrp x0, _x_p0_l1 add x0, x0, :lo12:_x_p0_l1 ldrb w0, [x0] cmp w0, 0 beq .L117 .L407: adrp x0, _x_p0_l3 add x0, x0, :lo12:_x_p0_l3 ldrb w0, [x0] cmp w0, 0 bne .L408 adrp x0, _x_p0_l2 add x0, x0, :lo12:_x_p0_l2 ldrb w0, [x0] cmp w0, 0 beq .L408 adrp x0, _x_p0_l0 add x0, x0, :lo12:_x_p0_l0 ldrb w0, [x0] cmp w0, 0 bne .L408 adrp x0, _x_p0_l1 add x0, x0, :lo12:_x_p0_l1 ldrb w0, [x0] cmp w0, 0 beq .L117 .L408: adrp x0, _x_p0_l3 add x0, x0, :lo12:_x_p0_l3 ldrb w0, [x0] cmp w0, 0 bne .L409 adrp x0, _x_p0_l2 add x0, x0, :lo12:_x_p0_l2 ldrb w0, [x0] cmp w0, 0 beq .L409 adrp x0, _x_p0_l0 add x0, x0, :lo12:_x_p0_l0 ldrb w0, [x0] cmp w0, 0 beq .L409 adrp x0, _x_p0_l1 add x0, x0, :lo12:_x_p0_l1 ldrb w0, [x0] cmp w0, 0 bne .L117 .L409: adrp x0, _x_p0_l3 add x0, x0, :lo12:_x_p0_l3 ldrb w0, [x0] cmp w0, 0 beq .L406 adrp x0, _x_p0_l2 add x0, x0, :lo12:_x_p0_l2 ldrb w0, [x0] cmp w0, 0 bne .L406 adrp x0, _x_p0_l0 add x0, x0, :lo12:_x_p0_l0 ldrb w0, [x0] cmp w0, 0 bne .L406 adrp x0, _x_p0_l1 add x0, x0, :lo12:_x_p0_l1 ldrb w0, [x0] cmp w0, 0 beq .L117 .L406: adrp x0, p0_l0 add x0, x0, :lo12:p0_l0 ldrb w0, [x0] cmp w0, 0 cset w0, eq and w1, w0, 255 adrp x0, _x_p0_l0 add x0, x0, :lo12:_x_p0_l0 ldrb w0, [x0] cmp w0, 0 cset w0, ne and w0, w0, 255 eor w0, w1, w0 and w0, w0, 255 cmp w0, 0 beq .L410 adrp x0, p0_l1 add x0, x0, :lo12:p0_l1 ldrb w0, [x0] cmp w0, 0 cset w0, eq and w1, w0, 255 adrp x0, _x_p0_l1 add x0, x0, :lo12:_x_p0_l1 ldrb w0, [x0] cmp w0, 0 cset w0, ne and w0, w0, 255 eor w0, w1, w0 and w0, w0, 255 cmp w0, 0 beq .L410 adrp x0, p0_l2 add x0, x0, :lo12:p0_l2 ldrb w0, [x0] cmp w0, 0 cset w0, eq and w1, w0, 255 adrp x0, _x_p0_l2 add x0, x0, :lo12:_x_p0_l2 ldrb w0, [x0] cmp w0, 0 cset w0, ne and w0, w0, 255 eor w0, w1, w0 and w0, w0, 255 cmp w0, 0 beq .L410 adrp x0, p0_l3 add x0, x0, :lo12:p0_l3 ldrb w0, [x0] cmp w0, 0 cset w0, eq and w1, w0, 255 adrp x0, _x_p0_l3 add x0, x0, :lo12:_x_p0_l3 ldrb w0, [x0] cmp w0, 0 cset w0, ne and w0, w0, 255 eor w0, w1, w0 and w0, w0, 255 cmp w0, 0 beq .L410 adrp x0, delta add x0, x0, :lo12:delta ldr s0, [x0] fcvt d1, s0 adrp x0, p0_c add x0, x0, :lo12:p0_c ldr s0, [x0] fcvt d2, s0 adrp x0, _x_p0_c add x0, x0, :lo12:_x_p0_c ldr s0, [x0] fcvt d0, s0 fsub d0, d2, d0 fadd d0, d1, d0 fcmp d0, #0.0 bne .L410 adrp x0, proposed0 add x0, x0, :lo12:proposed0 ldr s1, [x0] adrp x0, _x_proposed0 add x0, x0, :lo12:_x_proposed0 ldr s0, [x0] fcmp s1, s0 beq .L411 .L410: adrp x0, p0_evt add x0, x0, :lo12:p0_evt ldrb w0, [x0] cmp w0, 0 beq .L117 adrp x0, delta add x0, x0, :lo12:delta ldr s0, [x0] fcmpe s0, #0.0 bls .L411 b .L117 .L411: adrp x0, _x_p0_l3 add x0, x0, :lo12:_x_p0_l3 ldrb w0, [x0] cmp w0, 0 bne .L413 adrp x0, _x_p0_l2 add x0, x0, :lo12:_x_p0_l2 ldrb w0, [x0] cmp w0, 0 bne .L413 adrp x0, _x_p0_l0 add x0, x0, :lo12:_x_p0_l0 ldrb w0, [x0] cmp w0, 0 beq .L413 adrp x0, _x_p0_l1 add x0, x0, :lo12:_x_p0_l1 ldrb w0, [x0] cmp w0, 0 bne .L413 adrp x0, v1 add x0, x0, :lo12:v1 ldr w0, [x0] cmp w0, 0 bne .L413 adrp x0, _x_p0_c add x0, x0, :lo12:_x_p0_c ldr s0, [x0] fcmp s0, #0.0 bne .L413 adrp x0, v2 add x0, x0, :lo12:v2 ldrb w0, [x0] cmp w0, 0 cset w0, eq and w1, w0, 255 adrp x0, _x_v2 add x0, x0, :lo12:_x_v2 ldrb w0, [x0] cmp w0, 0 cset w0, ne and w0, w0, 255 eor w0, w1, w0 and w0, w0, 255 cmp w0, 0 beq .L413 adrp x0, proposed0 add x0, x0, :lo12:proposed0 ldr s1, [x0] adrp x0, _x_proposed0 add x0, x0, :lo12:_x_proposed0 ldr s0, [x0] fcmp s1, s0 bne .L413 adrp x0, v1 add x0, x0, :lo12:v1 ldr w1, [x0] adrp x0, _x_v1 add x0, x0, :lo12:_x_v1 ldr w0, [x0] cmp w1, w0 beq .L414 .L413: adrp x0, p0_l3 add x0, x0, :lo12:p0_l3 ldrb w0, [x0] cmp w0, 0 bne .L414 adrp x0, p0_l2 add x0, x0, :lo12:p0_l2 ldrb w0, [x0] cmp w0, 0 bne .L414 adrp x0, p0_l0 add x0, x0, :lo12:p0_l0 ldrb w0, [x0] cmp w0, 0 bne .L414 adrp x0, p0_l1 add x0, x0, :lo12:p0_l1 ldrb w0, [x0] cmp w0, 0 bne .L414 adrp x0, p0_evt add x0, x0, :lo12:p0_evt ldrb w0, [x0] cmp w0, 0 beq .L414 adrp x0, delta add x0, x0, :lo12:delta ldr s0, [x0] fcmp s0, #0.0 beq .L117 .L414: adrp x0, proposed0 add x0, x0, :lo12:proposed0 ldr s1, [x0] adrp x0, _x_proposed0 add x0, x0, :lo12:_x_proposed0 ldr s0, [x0] fcmp s1, s0 bne .L415 adrp x0, _x_p0_c add x0, x0, :lo12:_x_p0_c ldr s0, [x0] fcmp s0, #0.0 bne .L415 adrp x0, v2 add x0, x0, :lo12:v2 ldrb w0, [x0] cmp w0, 0 cset w0, eq and w1, w0, 255 adrp x0, _x_v2 add x0, x0, :lo12:_x_v2 ldrb w0, [x0] cmp w0, 0 cset w0, ne and w0, w0, 255 eor w0, w1, w0 and w0, w0, 255 cmp w0, 0 beq .L415 adrp x0, _x_p0_l3 add x0, x0, :lo12:_x_p0_l3 ldrb w0, [x0] cmp w0, 0 bne .L415 adrp x0, _x_p0_l2 add x0, x0, :lo12:_x_p0_l2 ldrb w0, [x0] cmp w0, 0 bne .L415 adrp x0, _x_p0_l1 add x0, x0, :lo12:_x_p0_l1 ldrb w0, [x0] cmp w0, 0 beq .L415 adrp x0, _x_p0_l0 add x0, x0, :lo12:_x_p0_l0 ldrb w0, [x0] cmp w0, 0 bne .L415 adrp x0, _x_v1 add x0, x0, :lo12:_x_v1 ldr w0, [x0] cmp w0, 1 beq .L416 .L415: adrp x0, p0_l3 add x0, x0, :lo12:p0_l3 ldrb w0, [x0] cmp w0, 0 bne .L416 adrp x0, p0_l2 add x0, x0, :lo12:p0_l2 ldrb w0, [x0] cmp w0, 0 bne .L416 adrp x0, p0_l0 add x0, x0, :lo12:p0_l0 ldrb w0, [x0] cmp w0, 0 beq .L416 adrp x0, p0_l1 add x0, x0, :lo12:p0_l1 ldrb w0, [x0] cmp w0, 0 bne .L416 adrp x0, p0_evt add x0, x0, :lo12:p0_evt ldrb w0, [x0] cmp w0, 0 beq .L416 adrp x0, delta add x0, x0, :lo12:delta ldr s0, [x0] fcmp s0, #0.0 beq .L117 .L416: adrp x0, _x_p0_l3 add x0, x0, :lo12:_x_p0_l3 ldrb w0, [x0] cmp w0, 0 bne .L417 adrp x0, _x_p0_l2 add x0, x0, :lo12:_x_p0_l2 ldrb w0, [x0] cmp w0, 0 bne .L417 adrp x0, _x_p0_l0 add x0, x0, :lo12:_x_p0_l0 ldrb w0, [x0] cmp w0, 0 bne .L417 adrp x0, _x_p0_l1 add x0, x0, :lo12:_x_p0_l1 ldrb w0, [x0] cmp w0, 0 beq .L418 .L417: adrp x0, _x_p0_l3 add x0, x0, :lo12:_x_p0_l3 ldrb w0, [x0] cmp w0, 0 bne .L419 adrp x0, _x_p0_l2 add x0, x0, :lo12:_x_p0_l2 ldrb w0, [x0] cmp w0, 0 bne .L419 adrp x0, _x_p0_l0 add x0, x0, :lo12:_x_p0_l0 ldrb w0, [x0] cmp w0, 0 beq .L419 adrp x0, _x_p0_l1 add x0, x0, :lo12:_x_p0_l1 ldrb w0, [x0] cmp w0, 0 beq .L419 .L418: adrp x0, p0_c add x0, x0, :lo12:p0_c ldr s1, [x0] adrp x0, _x_p0_c add x0, x0, :lo12:_x_p0_c ldr s0, [x0] fcmp s1, s0 bne .L419 adrp x0, v2 add x0, x0, :lo12:v2 ldrb w0, [x0] cmp w0, 0 cset w0, eq and w1, w0, 255 adrp x0, _x_v2 add x0, x0, :lo12:_x_v2 ldrb w0, [x0] cmp w0, 0 cset w0, ne and w0, w0, 255 eor w0, w1, w0 and w0, w0, 255 cmp w0, 0 beq .L419 adrp x0, v1 add x0, x0, :lo12:v1 ldr w1, [x0] adrp x0, _x_v1 add x0, x0, :lo12:_x_v1 ldr w0, [x0] cmp w1, w0 beq .L420 .L419: adrp x0, p0_l3 add x0, x0, :lo12:p0_l3 ldrb w0, [x0] cmp w0, 0 bne .L420 adrp x0, p0_l2 add x0, x0, :lo12:p0_l2 ldrb w0, [x0] cmp w0, 0 bne .L420 adrp x0, p0_l1 add x0, x0, :lo12:p0_l1 ldrb w0, [x0] cmp w0, 0 beq .L420 adrp x0, p0_l0 add x0, x0, :lo12:p0_l0 ldrb w0, [x0] cmp w0, 0 bne .L420 adrp x0, p0_evt add x0, x0, :lo12:p0_evt ldrb w0, [x0] cmp w0, 0 beq .L420 adrp x0, delta add x0, x0, :lo12:delta ldr s0, [x0] fcmp s0, #0.0 beq .L117 .L420: adrp x0, proposed0 add x0, x0, :lo12:proposed0 ldr s1, [x0] adrp x0, _x_proposed0 add x0, x0, :lo12:_x_proposed0 ldr s0, [x0] fcmp s1, s0 bne .L421 adrp x0, v1 add x0, x0, :lo12:v1 ldr w0, [x0] cmp w0, 1 bne .L422 .L421: adrp x0, p0_evt add x0, x0, :lo12:p0_evt ldrb w0, [x0] cmp w0, 0 beq .L422 adrp x0, delta add x0, x0, :lo12:delta ldr s0, [x0] fcmp s0, #0.0 bne .L422 adrp x0, _x_p0_l3 add x0, x0, :lo12:_x_p0_l3 ldrb w0, [x0] cmp w0, 0 bne .L422 adrp x0, _x_p0_l2 add x0, x0, :lo12:_x_p0_l2 ldrb w0, [x0] cmp w0, 0 bne .L422 adrp x0, _x_p0_l0 add x0, x0, :lo12:_x_p0_l0 ldrb w0, [x0] cmp w0, 0 bne .L422 adrp x0, _x_p0_l1 add x0, x0, :lo12:_x_p0_l1 ldrb w0, [x0] cmp w0, 0 bne .L422 adrp x0, p0_l3 add x0, x0, :lo12:p0_l3 ldrb w0, [x0] cmp w0, 0 bne .L422 adrp x0, p0_l2 add x0, x0, :lo12:p0_l2 ldrb w0, [x0] cmp w0, 0 bne .L422 adrp x0, p0_l1 add x0, x0, :lo12:p0_l1 ldrb w0, [x0] cmp w0, 0 beq .L422 adrp x0, p0_l0 add x0, x0, :lo12:p0_l0 ldrb w0, [x0] cmp w0, 0 beq .L117 .L422: adrp x0, v1 add x0, x0, :lo12:v1 ldr w0, [x0] cmp w0, 1 bne .L423 adrp x0, p0_c add x0, x0, :lo12:p0_c ldr s1, [x0] adrp x0, max_prop add x0, x0, :lo12:max_prop ldr s0, [x0] fcmpe s1, s0 cset w0, ls and w0, w0, 255 eor w0, w0, 1 and w0, w0, 255 cmp w0, 0 beq .L423 adrp x0, proposed0 add x0, x0, :lo12:proposed0 ldr s1, [x0] adrp x0, _x_proposed0 add x0, x0, :lo12:_x_proposed0 ldr s0, [x0] fcmpe s1, s0 cset w0, ls and w0, w0, 255 eor w0, w0, 1 and w0, w0, 255 cmp w0, 0 bne .L424 .L423: adrp x0, p0_evt add x0, x0, :lo12:p0_evt ldrb w0, [x0] cmp w0, 0 beq .L424 adrp x0, delta add x0, x0, :lo12:delta ldr s0, [x0] fcmp s0, #0.0 bne .L424 adrp x0, p0_l3 add x0, x0, :lo12:p0_l3 ldrb w0, [x0] cmp w0, 0 bne .L424 adrp x0, p0_l2 add x0, x0, :lo12:p0_l2 ldrb w0, [x0] cmp w0, 0 bne .L424 adrp x0, p0_l1 add x0, x0, :lo12:p0_l1 ldrb w0, [x0] cmp w0, 0 beq .L424 adrp x0, p0_l0 add x0, x0, :lo12:p0_l0 ldrb w0, [x0] cmp w0, 0 bne .L424 adrp x0, _x_p0_l3 add x0, x0, :lo12:_x_p0_l3 ldrb w0, [x0] cmp w0, 0 bne .L424 adrp x0, _x_p0_l2 add x0, x0, :lo12:_x_p0_l2 ldrb w0, [x0] cmp w0, 0 bne .L424 adrp x0, _x_p0_l0 add x0, x0, :lo12:_x_p0_l0 ldrb w0, [x0] cmp w0, 0 beq .L424 adrp x0, _x_p0_l1 add x0, x0, :lo12:_x_p0_l1 ldrb w0, [x0] cmp w0, 0 bne .L117 .L424: adrp x0, v2 add x0, x0, :lo12:v2 ldrb w0, [x0] cmp w0, 0 cset w0, eq and w1, w0, 255 adrp x0, _x_v2 add x0, x0, :lo12:_x_v2 ldrb w0, [x0] cmp w0, 0 cset w0, ne and w0, w0, 255 eor w0, w1, w0 and w0, w0, 255 cmp w0, 0 beq .L425 adrp x0, v1 add x0, x0, :lo12:v1 ldr w1, [x0] adrp x0, _x_v1 add x0, x0, :lo12:_x_v1 ldr w0, [x0] cmp w1, w0 bne .L425 adrp x0, proposed0 add x0, x0, :lo12:proposed0 ldr s1, [x0] adrp x0, _x_proposed0 add x0, x0, :lo12:_x_proposed0 ldr s0, [x0] fcmp s1, s0 bne .L425 adrp x0, _x_p0_l3 add x0, x0, :lo12:_x_p0_l3 ldrb w0, [x0] cmp w0, 0 bne .L426 adrp x0, _x_p0_l2 add x0, x0, :lo12:_x_p0_l2 ldrb w0, [x0] cmp w0, 0 bne .L426 adrp x0, _x_p0_l0 add x0, x0, :lo12:_x_p0_l0 ldrb w0, [x0] cmp w0, 0 bne .L426 adrp x0, _x_p0_l1 add x0, x0, :lo12:_x_p0_l1 ldrb w0, [x0] cmp w0, 0 beq .L427 .L426: adrp x0, _x_p0_l3 add x0, x0, :lo12:_x_p0_l3 ldrb w0, [x0] cmp w0, 0 bne .L425 adrp x0, _x_p0_l2 add x0, x0, :lo12:_x_p0_l2 ldrb w0, [x0] cmp w0, 0 beq .L425 adrp x0, _x_p0_l0 add x0, x0, :lo12:_x_p0_l0 ldrb w0, [x0] cmp w0, 0 bne .L425 adrp x0, _x_p0_l1 add x0, x0, :lo12:_x_p0_l1 ldrb w0, [x0] cmp w0, 0 beq .L427 .L425: adrp x0, p0_l3 add x0, x0, :lo12:p0_l3 ldrb w0, [x0] cmp w0, 0 bne .L427 adrp x0, p0_l2 add x0, x0, :lo12:p0_l2 ldrb w0, [x0] cmp w0, 0 bne .L427 adrp x0, p0_l0 add x0, x0, :lo12:p0_l0 ldrb w0, [x0] cmp w0, 0 beq .L427 adrp x0, p0_l1 add x0, x0, :lo12:p0_l1 ldrb w0, [x0] cmp w0, 0 beq .L427 adrp x0, p0_evt add x0, x0, :lo12:p0_evt ldrb w0, [x0] cmp w0, 0 beq .L427 adrp x0, delta add x0, x0, :lo12:delta ldr s0, [x0] fcmp s0, #0.0 beq .L117 .L427: adrp x0, v2 add x0, x0, :lo12:v2 ldrb w0, [x0] cmp w0, 0 beq .L428 adrp x0, p0_c add x0, x0, :lo12:p0_c ldr s1, [x0] adrp x0, _x_p0_c add x0, x0, :lo12:_x_p0_c ldr s0, [x0] fcmp s1, s0 beq .L429 .L428: adrp x0, p0_evt add x0, x0, :lo12:p0_evt ldrb w0, [x0] cmp w0, 0 beq .L429 adrp x0, delta add x0, x0, :lo12:delta ldr s0, [x0] fcmp s0, #0.0 bne .L429 adrp x0, _x_p0_l3 add x0, x0, :lo12:_x_p0_l3 ldrb w0, [x0] cmp w0, 0 bne .L429 adrp x0, _x_p0_l2 add x0, x0, :lo12:_x_p0_l2 ldrb w0, [x0] cmp w0, 0 bne .L429 adrp x0, _x_p0_l0 add x0, x0, :lo12:_x_p0_l0 ldrb w0, [x0] cmp w0, 0 bne .L429 adrp x0, _x_p0_l1 add x0, x0, :lo12:_x_p0_l1 ldrb w0, [x0] cmp w0, 0 bne .L429 adrp x0, p0_l3 add x0, x0, :lo12:p0_l3 ldrb w0, [x0] cmp w0, 0 bne .L429 adrp x0, p0_l2 add x0, x0, :lo12:p0_l2 ldrb w0, [x0] cmp w0, 0 bne .L429 adrp x0, p0_l0 add x0, x0, :lo12:p0_l0 ldrb w0, [x0] cmp w0, 0 beq .L429 adrp x0, p0_l1 add x0, x0, :lo12:p0_l1 ldrb w0, [x0] cmp w0, 0 bne .L117 .L429: adrp x0, _x_p0_c add x0, x0, :lo12:_x_p0_c ldr s0, [x0] fcmp s0, #0.0 bne .L430 adrp x0, v2 add x0, x0, :lo12:v2 ldrb w0, [x0] cmp w0, 0 beq .L431 .L430: adrp x0, p0_evt add x0, x0, :lo12:p0_evt ldrb w0, [x0] cmp w0, 0 beq .L431 adrp x0, delta add x0, x0, :lo12:delta ldr s0, [x0] fcmp s0, #0.0 bne .L431 adrp x0, p0_l3 add x0, x0, :lo12:p0_l3 ldrb w0, [x0] cmp w0, 0 bne .L431 adrp x0, p0_l2 add x0, x0, :lo12:p0_l2 ldrb w0, [x0] cmp w0, 0 bne .L431 adrp x0, p0_l0 add x0, x0, :lo12:p0_l0 ldrb w0, [x0] cmp w0, 0 beq .L431 adrp x0, p0_l1 add x0, x0, :lo12:p0_l1 ldrb w0, [x0] cmp w0, 0 beq .L431 adrp x0, _x_p0_l3 add x0, x0, :lo12:_x_p0_l3 ldrb w0, [x0] cmp w0, 0 bne .L431 adrp x0, _x_p0_l2 add x0, x0, :lo12:_x_p0_l2 ldrb w0, [x0] cmp w0, 0 beq .L431 adrp x0, _x_p0_l0 add x0, x0, :lo12:_x_p0_l0 ldrb w0, [x0] cmp w0, 0 bne .L431 adrp x0, _x_p0_l1 add x0, x0, :lo12:_x_p0_l1 ldrb w0, [x0] cmp w0, 0 beq .L117 .L431: adrp x0, proposed0 add x0, x0, :lo12:proposed0 ldr s1, [x0] adrp x0, _x_proposed0 add x0, x0, :lo12:_x_proposed0 ldr s0, [x0] fcmp s1, s0 bne .L432 adrp x0, v1 add x0, x0, :lo12:v1 ldr w1, [x0] adrp x0, _x_v1 add x0, x0, :lo12:_x_v1 ldr w0, [x0] cmp w1, w0 bne .L432 adrp x0, _x_p0_c add x0, x0, :lo12:_x_p0_c ldr s0, [x0] fcmp s0, #0.0 bne .L432 adrp x0, _x_v2 add x0, x0, :lo12:_x_v2 ldrb w0, [x0] cmp w0, 0 beq .L432 adrp x0, _x_p0_l3 add x0, x0, :lo12:_x_p0_l3 ldrb w0, [x0] cmp w0, 0 bne .L432 adrp x0, _x_p0_l2 add x0, x0, :lo12:_x_p0_l2 ldrb w0, [x0] cmp w0, 0 beq .L432 adrp x0, _x_p0_l0 add x0, x0, :lo12:_x_p0_l0 ldrb w0, [x0] cmp w0, 0 beq .L432 adrp x0, _x_p0_l1 add x0, x0, :lo12:_x_p0_l1 ldrb w0, [x0] cmp w0, 0 beq .L433 .L432: adrp x0, p0_l3 add x0, x0, :lo12:p0_l3 ldrb w0, [x0] cmp w0, 0 bne .L433 adrp x0, p0_l2 add x0, x0, :lo12:p0_l2 ldrb w0, [x0] cmp w0, 0 beq .L433 adrp x0, p0_l0 add x0, x0, :lo12:p0_l0 ldrb w0, [x0] cmp w0, 0 bne .L433 adrp x0, p0_l1 add x0, x0, :lo12:p0_l1 ldrb w0, [x0] cmp w0, 0 bne .L433 adrp x0, p0_evt add x0, x0, :lo12:p0_evt ldrb w0, [x0] cmp w0, 0 beq .L433 adrp x0, delta add x0, x0, :lo12:delta ldr s0, [x0] fcmp s0, #0.0 beq .L117 .L433: adrp x0, proposed0 add x0, x0, :lo12:proposed0 ldr s1, [x0] adrp x0, _x_proposed0 add x0, x0, :lo12:_x_proposed0 ldr s0, [x0] fcmp s1, s0 bne .L434 adrp x0, v2 add x0, x0, :lo12:v2 ldrb w0, [x0] cmp w0, 0 cset w0, eq and w1, w0, 255 adrp x0, _x_v2 add x0, x0, :lo12:_x_v2 ldrb w0, [x0] cmp w0, 0 cset w0, ne and w0, w0, 255 eor w0, w1, w0 and w0, w0, 255 cmp w0, 0 beq .L434 adrp x0, v1 add x0, x0, :lo12:v1 ldr w1, [x0] adrp x0, _x_v1 add x0, x0, :lo12:_x_v1 ldr w0, [x0] cmp w1, w0 bne .L434 adrp x0, p0_c add x0, x0, :lo12:p0_c ldr s1, [x0] adrp x0, _x_p0_c add x0, x0, :lo12:_x_p0_c ldr s0, [x0] fcmp s1, s0 bne .L434 adrp x0, _x_p0_l3 add x0, x0, :lo12:_x_p0_l3 ldrb w0, [x0] cmp w0, 0 bne .L435 adrp x0, _x_p0_l2 add x0, x0, :lo12:_x_p0_l2 ldrb w0, [x0] cmp w0, 0 bne .L435 adrp x0, _x_p0_l0 add x0, x0, :lo12:_x_p0_l0 ldrb w0, [x0] cmp w0, 0 bne .L435 adrp x0, _x_p0_l1 add x0, x0, :lo12:_x_p0_l1 ldrb w0, [x0] cmp w0, 0 beq .L436 .L435: adrp x0, _x_p0_l3 add x0, x0, :lo12:_x_p0_l3 ldrb w0, [x0] cmp w0, 0 bne .L434 adrp x0, _x_p0_l2 add x0, x0, :lo12:_x_p0_l2 ldrb w0, [x0] cmp w0, 0 beq .L434 adrp x0, _x_p0_l1 add x0, x0, :lo12:_x_p0_l1 ldrb w0, [x0] cmp w0, 0 beq .L434 adrp x0, _x_p0_l0 add x0, x0, :lo12:_x_p0_l0 ldrb w0, [x0] cmp w0, 0 beq .L436 .L434: adrp x0, p0_l3 add x0, x0, :lo12:p0_l3 ldrb w0, [x0] cmp w0, 0 bne .L436 adrp x0, p0_l2 add x0, x0, :lo12:p0_l2 ldrb w0, [x0] cmp w0, 0 beq .L436 adrp x0, p0_l0 add x0, x0, :lo12:p0_l0 ldrb w0, [x0] cmp w0, 0 beq .L436 adrp x0, p0_l1 add x0, x0, :lo12:p0_l1 ldrb w0, [x0] cmp w0, 0 bne .L436 adrp x0, p0_evt add x0, x0, :lo12:p0_evt ldrb w0, [x0] cmp w0, 0 beq .L436 adrp x0, delta add x0, x0, :lo12:delta ldr s0, [x0] fcmp s0, #0.0 beq .L117 .L436: adrp x0, v1 add x0, x0, :lo12:v1 ldr w0, [x0] cmp w0, 1 bne .L437 adrp x0, p0_evt add x0, x0, :lo12:p0_evt ldrb w0, [x0] cmp w0, 0 beq .L437 adrp x0, delta add x0, x0, :lo12:delta ldr s0, [x0] fcmp s0, #0.0 bne .L437 adrp x0, _x_p0_l3 add x0, x0, :lo12:_x_p0_l3 ldrb w0, [x0] cmp w0, 0 bne .L437 adrp x0, _x_p0_l2 add x0, x0, :lo12:_x_p0_l2 ldrb w0, [x0] cmp w0, 0 bne .L437 adrp x0, _x_p0_l0 add x0, x0, :lo12:_x_p0_l0 ldrb w0, [x0] cmp w0, 0 bne .L437 adrp x0, _x_p0_l1 add x0, x0, :lo12:_x_p0_l1 ldrb w0, [x0] cmp w0, 0 bne .L437 adrp x0, p0_l3 add x0, x0, :lo12:p0_l3 ldrb w0, [x0] cmp w0, 0 bne .L437 adrp x0, p0_l2 add x0, x0, :lo12:p0_l2 ldrb w0, [x0] cmp w0, 0 beq .L437 adrp x0, p0_l0 add x0, x0, :lo12:p0_l0 ldrb w0, [x0] cmp w0, 0 beq .L437 adrp x0, p0_l1 add x0, x0, :lo12:p0_l1 ldrb w0, [x0] cmp w0, 0 beq .L117 .L437: adrp x0, v1 add x0, x0, :lo12:v1 ldr w0, [x0] cmp w0, 1 beq .L438 adrp x0, p0_evt add x0, x0, :lo12:p0_evt ldrb w0, [x0] cmp w0, 0 beq .L438 adrp x0, delta add x0, x0, :lo12:delta ldr s0, [x0] fcmp s0, #0.0 bne .L438 adrp x0, p0_l3 add x0, x0, :lo12:p0_l3 ldrb w0, [x0] cmp w0, 0 bne .L438 adrp x0, p0_l2 add x0, x0, :lo12:p0_l2 ldrb w0, [x0] cmp w0, 0 beq .L438 adrp x0, p0_l0 add x0, x0, :lo12:p0_l0 ldrb w0, [x0] cmp w0, 0 beq .L438 adrp x0, p0_l1 add x0, x0, :lo12:p0_l1 ldrb w0, [x0] cmp w0, 0 bne .L438 adrp x0, _x_p0_l3 add x0, x0, :lo12:_x_p0_l3 ldrb w0, [x0] cmp w0, 0 bne .L438 adrp x0, _x_p0_l2 add x0, x0, :lo12:_x_p0_l2 ldrb w0, [x0] cmp w0, 0 beq .L438 adrp x0, _x_p0_l1 add x0, x0, :lo12:_x_p0_l1 ldrb w0, [x0] cmp w0, 0 beq .L438 adrp x0, _x_p0_l0 add x0, x0, :lo12:_x_p0_l0 ldrb w0, [x0] cmp w0, 0 beq .L117 .L438: adrp x0, proposed0 add x0, x0, :lo12:proposed0 ldr s1, [x0] adrp x0, _x_proposed0 add x0, x0, :lo12:_x_proposed0 ldr s0, [x0] fcmp s1, s0 bne .L439 adrp x0, v2 add x0, x0, :lo12:v2 ldrb w0, [x0] cmp w0, 0 cset w0, eq and w1, w0, 255 adrp x0, _x_v2 add x0, x0, :lo12:_x_v2 ldrb w0, [x0] cmp w0, 0 cset w0, ne and w0, w0, 255 eor w0, w1, w0 and w0, w0, 255 cmp w0, 0 beq .L439 adrp x0, v1 add x0, x0, :lo12:v1 ldr w1, [x0] adrp x0, _x_v1 add x0, x0, :lo12:_x_v1 ldr w0, [x0] cmp w1, w0 bne .L439 adrp x0, _x_p0_l3 add x0, x0, :lo12:_x_p0_l3 ldrb w0, [x0] cmp w0, 0 bne .L439 adrp x0, _x_p0_l2 add x0, x0, :lo12:_x_p0_l2 ldrb w0, [x0] cmp w0, 0 beq .L439 adrp x0, _x_p0_l0 add x0, x0, :lo12:_x_p0_l0 ldrb w0, [x0] cmp w0, 0 beq .L439 adrp x0, _x_p0_l1 add x0, x0, :lo12:_x_p0_l1 ldrb w0, [x0] cmp w0, 0 beq .L439 adrp x0, _x_p0_c add x0, x0, :lo12:_x_p0_c ldr s0, [x0] fcmp s0, #0.0 beq .L440 .L439: adrp x0, p0_l3 add x0, x0, :lo12:p0_l3 ldrb w0, [x0] cmp w0, 0 bne .L440 adrp x0, p0_l2 add x0, x0, :lo12:p0_l2 ldrb w0, [x0] cmp w0, 0 beq .L440 adrp x0, p0_l1 add x0, x0, :lo12:p0_l1 ldrb w0, [x0] cmp w0, 0 beq .L440 adrp x0, p0_l0 add x0, x0, :lo12:p0_l0 ldrb w0, [x0] cmp w0, 0 bne .L440 adrp x0, p0_evt add x0, x0, :lo12:p0_evt ldrb w0, [x0] cmp w0, 0 beq .L440 adrp x0, delta add x0, x0, :lo12:delta ldr s0, [x0] fcmp s0, #0.0 beq .L117 .L440: adrp x0, proposed0 add x0, x0, :lo12:proposed0 ldr s1, [x0] adrp x0, _x_proposed0 add x0, x0, :lo12:_x_proposed0 ldr s0, [x0] fcmp s1, s0 bne .L441 adrp x0, _x_p0_l3 add x0, x0, :lo12:_x_p0_l3 ldrb w0, [x0] cmp w0, 0 beq .L441 adrp x0, _x_p0_l2 add x0, x0, :lo12:_x_p0_l2 ldrb w0, [x0] cmp w0, 0 bne .L441 adrp x0, _x_p0_l0 add x0, x0, :lo12:_x_p0_l0 ldrb w0, [x0] cmp w0, 0 bne .L441 adrp x0, _x_p0_l1 add x0, x0, :lo12:_x_p0_l1 ldrb w0, [x0] cmp w0, 0 bne .L441 adrp x0, _x_v2 add x0, x0, :lo12:_x_v2 ldrb w0, [x0] cmp w0, 0 bne .L441 adrp x0, _x_p0_c add x0, x0, :lo12:_x_p0_c ldr s0, [x0] fcmp s0, #0.0 bne .L441 adrp x0, v1 add x0, x0, :lo12:v1 ldr w1, [x0] adrp x0, _x_v1 add x0, x0, :lo12:_x_v1 ldr w0, [x0] cmp w1, w0 beq .L442 .L441: adrp x0, p0_l3 add x0, x0, :lo12:p0_l3 ldrb w0, [x0] cmp w0, 0 bne .L442 adrp x0, p0_l2 add x0, x0, :lo12:p0_l2 ldrb w0, [x0] cmp w0, 0 beq .L442 adrp x0, p0_l0 add x0, x0, :lo12:p0_l0 ldrb w0, [x0] cmp w0, 0 beq .L442 adrp x0, p0_l1 add x0, x0, :lo12:p0_l1 ldrb w0, [x0] cmp w0, 0 beq .L442 adrp x0, p0_evt add x0, x0, :lo12:p0_evt ldrb w0, [x0] cmp w0, 0 beq .L442 adrp x0, delta add x0, x0, :lo12:delta ldr s0, [x0] fcmp s0, #0.0 beq .L117 .L442: adrp x0, proposed0 add x0, x0, :lo12:proposed0 ldr s1, [x0] adrp x0, _x_proposed0 add x0, x0, :lo12:_x_proposed0 ldr s0, [x0] fcmp s1, s0 bne .L443 adrp x0, _x_p0_l3 add x0, x0, :lo12:_x_p0_l3 ldrb w0, [x0] cmp w0, 0 bne .L443 adrp x0, _x_p0_l2 add x0, x0, :lo12:_x_p0_l2 ldrb w0, [x0] cmp w0, 0 bne .L443 adrp x0, _x_p0_l0 add x0, x0, :lo12:_x_p0_l0 ldrb w0, [x0] cmp w0, 0 bne .L443 adrp x0, _x_p0_l1 add x0, x0, :lo12:_x_p0_l1 ldrb w0, [x0] cmp w0, 0 bne .L443 adrp x0, _x_v1 add x0, x0, :lo12:_x_v1 ldr w0, [x0] cmp w0, 0 bne .L443 adrp x0, v2 add x0, x0, :lo12:v2 ldrb w0, [x0] cmp w0, 0 cset w0, eq and w1, w0, 255 adrp x0, _x_v2 add x0, x0, :lo12:_x_v2 ldrb w0, [x0] cmp w0, 0 cset w0, ne and w0, w0, 255 eor w0, w1, w0 and w0, w0, 255 cmp w0, 0 beq .L443 adrp x0, p0_c add x0, x0, :lo12:p0_c ldr s1, [x0] adrp x0, _x_p0_c add x0, x0, :lo12:_x_p0_c ldr s0, [x0] fcmp s1, s0 beq .L444 .L443: adrp x0, p0_l3 add x0, x0, :lo12:p0_l3 ldrb w0, [x0] cmp w0, 0 beq .L444 adrp x0, p0_l2 add x0, x0, :lo12:p0_l2 ldrb w0, [x0] cmp w0, 0 bne .L444 adrp x0, p0_l0 add x0, x0, :lo12:p0_l0 ldrb w0, [x0] cmp w0, 0 bne .L444 adrp x0, p0_l1 add x0, x0, :lo12:p0_l1 ldrb w0, [x0] cmp w0, 0 bne .L444 adrp x0, p0_evt add x0, x0, :lo12:p0_evt ldrb w0, [x0] cmp w0, 0 beq .L444 adrp x0, delta add x0, x0, :lo12:delta ldr s0, [x0] fcmp s0, #0.0 beq .L117 .L444: adrp x0, _x_v1 add x0, x0, :lo12:_x_v1 ldr w0, [x0] cmp w0, 7 beq .L445 adrp x0, _x_v1 add x0, x0, :lo12:_x_v1 ldr w0, [x0] cmp w0, 6 beq .L445 adrp x0, _x_v1 add x0, x0, :lo12:_x_v1 ldr w0, [x0] cmp w0, 5 beq .L445 adrp x0, _x_v1 add x0, x0, :lo12:_x_v1 ldr w0, [x0] cmp w0, 4 beq .L445 adrp x0, _x_v1 add x0, x0, :lo12:_x_v1 ldr w0, [x0] cmp w0, 3 beq .L445 adrp x0, _x_v1 add x0, x0, :lo12:_x_v1 ldr w0, [x0] cmp w0, 2 beq .L445 adrp x0, _x_v1 add x0, x0, :lo12:_x_v1 ldr w0, [x0] cmp w0, 1 beq .L445 adrp x0, _x_v1 add x0, x0, :lo12:_x_v1 ldr w0, [x0] cmp w0, 0 bne .L117 .L445: adrp x0, _x_delta add x0, x0, :lo12:_x_delta ldr s0, [x0] fcmpe s0, #0.0 bge .L476 b .L117 .L476: adrp x0, _x_proposed0 add x0, x0, :lo12:_x_proposed0 ldr s0, [x0] fcmpe s0, #0.0 cset w0, ls and w0, w0, 255 eor w0, w0, 1 and w0, w0, 255 cmp w0, 0 beq .L117 adrp x0, _x_proposed0 add x0, x0, :lo12:_x_proposed0 ldr s1, [x0] adrp x0, _x_max_prop add x0, x0, :lo12:_x_max_prop ldr s0, [x0] fcmpe s1, s0 bls .L477 b .L117 .L477: adrp x0, _x_proposed1 add x0, x0, :lo12:_x_proposed1 ldr s0, [x0] fcmpe s0, #0.0 cset w0, ls and w0, w0, 255 eor w0, w0, 1 and w0, w0, 255 cmp w0, 0 beq .L117 adrp x0, _x_proposed1 add x0, x0, :lo12:_x_proposed1 ldr s1, [x0] adrp x0, _x_max_prop add x0, x0, :lo12:_x_max_prop ldr s0, [x0] fcmpe s1, s0 bls .L478 b .L117 .L478: adrp x0, _x_proposed2 add x0, x0, :lo12:_x_proposed2 ldr s0, [x0] fcmpe s0, #0.0 cset w0, ls and w0, w0, 255 eor w0, w0, 1 and w0, w0, 255 cmp w0, 0 beq .L117 adrp x0, _x_proposed2 add x0, x0, :lo12:_x_proposed2 ldr s1, [x0] adrp x0, _x_max_prop add x0, x0, :lo12:_x_max_prop ldr s0, [x0] fcmpe s1, s0 bls .L479 b .L117 .L479: adrp x0, _x_proposed3 add x0, x0, :lo12:_x_proposed3 ldr s0, [x0] fcmpe s0, #0.0 cset w0, ls and w0, w0, 255 eor w0, w0, 1 and w0, w0, 255 cmp w0, 0 beq .L117 adrp x0, _x_proposed3 add x0, x0, :lo12:_x_proposed3 ldr s1, [x0] adrp x0, _x_max_prop add x0, x0, :lo12:_x_max_prop ldr s0, [x0] fcmpe s1, s0 bls .L480 b .L117 .L480: adrp x0, _x_proposed4 add x0, x0, :lo12:_x_proposed4 ldr s0, [x0] fcmpe s0, #0.0 cset w0, ls and w0, w0, 255 eor w0, w0, 1 and w0, w0, 255 cmp w0, 0 beq .L117 adrp x0, _x_proposed4 add x0, x0, :lo12:_x_proposed4 ldr s1, [x0] adrp x0, _x_max_prop add x0, x0, :lo12:_x_max_prop ldr s0, [x0] fcmpe s1, s0 bls .L481 b .L117 .L481: adrp x0, _x_proposed5 add x0, x0, :lo12:_x_proposed5 ldr s0, [x0] fcmpe s0, #0.0 cset w0, ls and w0, w0, 255 eor w0, w0, 1 and w0, w0, 255 cmp w0, 0 beq .L117 adrp x0, _x_proposed5 add x0, x0, :lo12:_x_proposed5 ldr s1, [x0] adrp x0, _x_max_prop add x0, x0, :lo12:_x_max_prop ldr s0, [x0] fcmpe s1, s0 bls .L482 b .L117 .L482: adrp x0, _x_proposed6 add x0, x0, :lo12:_x_proposed6 ldr s0, [x0] fcmpe s0, #0.0 cset w0, ls and w0, w0, 255 eor w0, w0, 1 and w0, w0, 255 cmp w0, 0 beq .L117 adrp x0, _x_proposed6 add x0, x0, :lo12:_x_proposed6 ldr s1, [x0] adrp x0, _x_max_prop add x0, x0, :lo12:_x_max_prop ldr s0, [x0] fcmpe s1, s0 bls .L483 b .L117 .L483: adrp x0, _x_max_prop add x0, x0, :lo12:_x_max_prop ldr s1, [x0] adrp x0, _x_proposed0 add x0, x0, :lo12:_x_proposed0 ldr s0, [x0] fcmp s1, s0 beq .L454 adrp x0, _x_max_prop add x0, x0, :lo12:_x_max_prop ldr s1, [x0] adrp x0, _x_proposed1 add x0, x0, :lo12:_x_proposed1 ldr s0, [x0] fcmp s1, s0 beq .L454 adrp x0, _x_max_prop add x0, x0, :lo12:_x_max_prop ldr s1, [x0] adrp x0, _x_proposed2 add x0, x0, :lo12:_x_proposed2 ldr s0, [x0] fcmp s1, s0 beq .L454 adrp x0, _x_max_prop add x0, x0, :lo12:_x_max_prop ldr s1, [x0] adrp x0, _x_proposed3 add x0, x0, :lo12:_x_proposed3 ldr s0, [x0] fcmp s1, s0 beq .L454 adrp x0, _x_max_prop add x0, x0, :lo12:_x_max_prop ldr s1, [x0] adrp x0, _x_proposed4 add x0, x0, :lo12:_x_proposed4 ldr s0, [x0] fcmp s1, s0 beq .L454 adrp x0, _x_max_prop add x0, x0, :lo12:_x_max_prop ldr s1, [x0] adrp x0, _x_proposed5 add x0, x0, :lo12:_x_proposed5 ldr s0, [x0] fcmp s1, s0 beq .L454 adrp x0, _x_max_prop add x0, x0, :lo12:_x_max_prop ldr s1, [x0] adrp x0, _x_proposed6 add x0, x0, :lo12:_x_proposed6 ldr s0, [x0] fcmp s1, s0 bne .L117 .L454: adrp x0, delta add x0, x0, :lo12:delta ldr s0, [x0] fcmpe s0, #0.0 bls .L455 adrp x0, v2 add x0, x0, :lo12:v2 ldrb w0, [x0] cmp w0, 0 cset w0, eq and w1, w0, 255 adrp x0, _x_v2 add x0, x0, :lo12:_x_v2 ldrb w0, [x0] cmp w0, 0 cset w0, ne and w0, w0, 255 eor w0, w1, w0 and w0, w0, 255 cmp w0, 0 beq .L117 adrp x0, v1 add x0, x0, :lo12:v1 ldr w1, [x0] adrp x0, _x_v1 add x0, x0, :lo12:_x_v1 ldr w0, [x0] cmp w1, w0 bne .L117 .L455: adrp x0, p6_evt add x0, x0, :lo12:p6_evt ldrb w0, [x0] cmp w0, 0 bne .L456 adrp x0, p5_evt add x0, x0, :lo12:p5_evt ldrb w0, [x0] cmp w0, 0 bne .L456 adrp x0, p4_evt add x0, x0, :lo12:p4_evt ldrb w0, [x0] cmp w0, 0 bne .L456 adrp x0, p3_evt add x0, x0, :lo12:p3_evt ldrb w0, [x0] cmp w0, 0 bne .L456 adrp x0, p2_evt add x0, x0, :lo12:p2_evt ldrb w0, [x0] cmp w0, 0 bne .L456 adrp x0, p0_evt add x0, x0, :lo12:p0_evt ldrb w0, [x0] cmp w0, 0 bne .L456 adrp x0, p1_evt add x0, x0, :lo12:p1_evt ldrb w0, [x0] cmp w0, 0 bne .L456 adrp x0, delta add x0, x0, :lo12:delta ldr s0, [x0] fcmp s0, #0.0 beq .L117 .L456: adrp x0, _x_inc_max_prop add x0, x0, :lo12:_x_inc_max_prop ldrb w0, [x0] cmp w0, 0 cset w0, eq and w1, w0, 255 adrp x0, max_prop add x0, x0, :lo12:max_prop ldr s1, [x0] adrp x0, _x_max_prop add x0, x0, :lo12:_x_max_prop ldr s0, [x0] fcmpe s1, s0 cset w0, ls and w0, w0, 255 eor w0, w1, w0 and w0, w0, 255 cmp w0, 0 beq .L117 adrp x0, delta add x0, x0, :lo12:delta ldr s1, [x0] adrp x0, _x__diverge_delta add x0, x0, :lo12:_x__diverge_delta ldr s0, [x0] fcmp s1, s0 beq .L457 adrp x0, _diverge_delta add x0, x0, :lo12:_diverge_delta ldr s1, [x0] fmov s0, 1.0e+0 fcmpe s1, s0 cset w0, ge and w0, w0, 255 eor w0, w0, 1 and w0, w0, 255 cmp w0, 0 beq .L117 .L457: adrp x0, _diverge_delta add x0, x0, :lo12:_diverge_delta ldr s1, [x0] fmov s0, 1.0e+0 fcmpe s1, s0 bge .L458 adrp x0, delta add x0, x0, :lo12:delta ldr s0, [x0] fcvt d1, s0 adrp x0, _diverge_delta add x0, x0, :lo12:_diverge_delta ldr s0, [x0] fcvt d2, s0 adrp x0, _x__diverge_delta add x0, x0, :lo12:_x__diverge_delta ldr s0, [x0] fcvt d0, s0 fsub d0, d2, d0 fadd d0, d1, d0 fcmp d0, #0.0 bne .L117 .L458: mov w0, 1 b .L459 .L117: mov w0, 0 .L459: str w0, [sp, 28] adrp x0, _x_p6_l3 add x0, x0, :lo12:_x_p6_l3 ldrb w1, [x0] adrp x0, p6_l3 add x0, x0, :lo12:p6_l3 strb w1, [x0] adrp x0, _x_p6_l2 add x0, x0, :lo12:_x_p6_l2 ldrb w1, [x0] adrp x0, p6_l2 add x0, x0, :lo12:p6_l2 strb w1, [x0] adrp x0, _x_p6_l1 add x0, x0, :lo12:_x_p6_l1 ldrb w1, [x0] adrp x0, p6_l1 add x0, x0, :lo12:p6_l1 strb w1, [x0] adrp x0, _x_p6_l0 add x0, x0, :lo12:_x_p6_l0 ldrb w1, [x0] adrp x0, p6_l0 add x0, x0, :lo12:p6_l0 strb w1, [x0] adrp x0, _x_p6_evt add x0, x0, :lo12:_x_p6_evt ldrb w1, [x0] adrp x0, p6_evt add x0, x0, :lo12:p6_evt strb w1, [x0] adrp x0, _x_p6_c add x0, x0, :lo12:_x_p6_c ldr s0, [x0] adrp x0, p6_c add x0, x0, :lo12:p6_c str s0, [x0] adrp x0, _x_p5_l3 add x0, x0, :lo12:_x_p5_l3 ldrb w1, [x0] adrp x0, p5_l3 add x0, x0, :lo12:p5_l3 strb w1, [x0] adrp x0, _x_p5_l2 add x0, x0, :lo12:_x_p5_l2 ldrb w1, [x0] adrp x0, p5_l2 add x0, x0, :lo12:p5_l2 strb w1, [x0] adrp x0, _x_p5_l1 add x0, x0, :lo12:_x_p5_l1 ldrb w1, [x0] adrp x0, p5_l1 add x0, x0, :lo12:p5_l1 strb w1, [x0] adrp x0, _x_p5_l0 add x0, x0, :lo12:_x_p5_l0 ldrb w1, [x0] adrp x0, p5_l0 add x0, x0, :lo12:p5_l0 strb w1, [x0] adrp x0, _x_p4_l3 add x0, x0, :lo12:_x_p4_l3 ldrb w1, [x0] adrp x0, p4_l3 add x0, x0, :lo12:p4_l3 strb w1, [x0] adrp x0, _x_p4_l2 add x0, x0, :lo12:_x_p4_l2 ldrb w1, [x0] adrp x0, p4_l2 add x0, x0, :lo12:p4_l2 strb w1, [x0] adrp x0, _x_p4_l1 add x0, x0, :lo12:_x_p4_l1 ldrb w1, [x0] adrp x0, p4_l1 add x0, x0, :lo12:p4_l1 strb w1, [x0] adrp x0, _x_p4_l0 add x0, x0, :lo12:_x_p4_l0 ldrb w1, [x0] adrp x0, p4_l0 add x0, x0, :lo12:p4_l0 strb w1, [x0] adrp x0, _x_p3_l1 add x0, x0, :lo12:_x_p3_l1 ldrb w1, [x0] adrp x0, p3_l1 add x0, x0, :lo12:p3_l1 strb w1, [x0] adrp x0, _x_p3_l0 add x0, x0, :lo12:_x_p3_l0 ldrb w1, [x0] adrp x0, p3_l0 add x0, x0, :lo12:p3_l0 strb w1, [x0] adrp x0, _x_p2_l3 add x0, x0, :lo12:_x_p2_l3 ldrb w1, [x0] adrp x0, p2_l3 add x0, x0, :lo12:p2_l3 strb w1, [x0] adrp x0, _x_p3_evt add x0, x0, :lo12:_x_p3_evt ldrb w1, [x0] adrp x0, p3_evt add x0, x0, :lo12:p3_evt strb w1, [x0] adrp x0, _x_proposed6 add x0, x0, :lo12:_x_proposed6 ldr s0, [x0] adrp x0, proposed6 add x0, x0, :lo12:proposed6 str s0, [x0] adrp x0, _x_p3_c add x0, x0, :lo12:_x_p3_c ldr s0, [x0] adrp x0, p3_c add x0, x0, :lo12:p3_c str s0, [x0] adrp x0, _x_proposed5 add x0, x0, :lo12:_x_proposed5 ldr s0, [x0] adrp x0, proposed5 add x0, x0, :lo12:proposed5 str s0, [x0] adrp x0, _x_proposed4 add x0, x0, :lo12:_x_proposed4 ldr s0, [x0] adrp x0, proposed4 add x0, x0, :lo12:proposed4 str s0, [x0] adrp x0, _x_p1_l3 add x0, x0, :lo12:_x_p1_l3 ldrb w1, [x0] adrp x0, p1_l3 add x0, x0, :lo12:p1_l3 strb w1, [x0] adrp x0, _x_proposed3 add x0, x0, :lo12:_x_proposed3 ldr s0, [x0] adrp x0, proposed3 add x0, x0, :lo12:proposed3 str s0, [x0] adrp x0, _x_p1_l2 add x0, x0, :lo12:_x_p1_l2 ldrb w1, [x0] adrp x0, p1_l2 add x0, x0, :lo12:p1_l2 strb w1, [x0] adrp x0, _x_p4_evt add x0, x0, :lo12:_x_p4_evt ldrb w1, [x0] adrp x0, p4_evt add x0, x0, :lo12:p4_evt strb w1, [x0] adrp x0, _x_proposed2 add x0, x0, :lo12:_x_proposed2 ldr s0, [x0] adrp x0, proposed2 add x0, x0, :lo12:proposed2 str s0, [x0] adrp x0, _x_p1_evt add x0, x0, :lo12:_x_p1_evt ldrb w1, [x0] adrp x0, p1_evt add x0, x0, :lo12:p1_evt strb w1, [x0] adrp x0, _x_p1_l1 add x0, x0, :lo12:_x_p1_l1 ldrb w1, [x0] adrp x0, p1_l1 add x0, x0, :lo12:p1_l1 strb w1, [x0] adrp x0, _x_p4_c add x0, x0, :lo12:_x_p4_c ldr s0, [x0] adrp x0, p4_c add x0, x0, :lo12:p4_c str s0, [x0] adrp x0, _x_proposed1 add x0, x0, :lo12:_x_proposed1 ldr s0, [x0] adrp x0, proposed1 add x0, x0, :lo12:proposed1 str s0, [x0] adrp x0, _x_p1_c add x0, x0, :lo12:_x_p1_c ldr s0, [x0] adrp x0, p1_c add x0, x0, :lo12:p1_c str s0, [x0] adrp x0, _x_p1_l0 add x0, x0, :lo12:_x_p1_l0 ldrb w1, [x0] adrp x0, p1_l0 add x0, x0, :lo12:p1_l0 strb w1, [x0] adrp x0, _x__diverge_delta add x0, x0, :lo12:_x__diverge_delta ldr s0, [x0] adrp x0, _diverge_delta add x0, x0, :lo12:_diverge_delta str s0, [x0] adrp x0, _x_p2_l2 add x0, x0, :lo12:_x_p2_l2 ldrb w1, [x0] adrp x0, p2_l2 add x0, x0, :lo12:p2_l2 strb w1, [x0] adrp x0, _x_proposed0 add x0, x0, :lo12:_x_proposed0 ldr s0, [x0] adrp x0, proposed0 add x0, x0, :lo12:proposed0 str s0, [x0] adrp x0, _x_p2_l1 add x0, x0, :lo12:_x_p2_l1 ldrb w1, [x0] adrp x0, p2_l1 add x0, x0, :lo12:p2_l1 strb w1, [x0] adrp x0, _x_inc_max_prop add x0, x0, :lo12:_x_inc_max_prop ldrb w1, [x0] adrp x0, inc_max_prop add x0, x0, :lo12:inc_max_prop strb w1, [x0] adrp x0, _x_p2_l0 add x0, x0, :lo12:_x_p2_l0 ldrb w1, [x0] adrp x0, p2_l0 add x0, x0, :lo12:p2_l0 strb w1, [x0] adrp x0, _x_p3_l2 add x0, x0, :lo12:_x_p3_l2 ldrb w1, [x0] adrp x0, p3_l2 add x0, x0, :lo12:p3_l2 strb w1, [x0] adrp x0, _x_p0_c add x0, x0, :lo12:_x_p0_c ldr s0, [x0] adrp x0, p0_c add x0, x0, :lo12:p0_c str s0, [x0] adrp x0, _x_p0_l0 add x0, x0, :lo12:_x_p0_l0 ldrb w1, [x0] adrp x0, p0_l0 add x0, x0, :lo12:p0_l0 strb w1, [x0] adrp x0, _x_p5_evt add x0, x0, :lo12:_x_p5_evt ldrb w1, [x0] adrp x0, p5_evt add x0, x0, :lo12:p5_evt strb w1, [x0] adrp x0, _x_max_prop add x0, x0, :lo12:_x_max_prop ldr s0, [x0] adrp x0, max_prop add x0, x0, :lo12:max_prop str s0, [x0] adrp x0, _x_p5_c add x0, x0, :lo12:_x_p5_c ldr s0, [x0] adrp x0, p5_c add x0, x0, :lo12:p5_c str s0, [x0] adrp x0, _x_v2 add x0, x0, :lo12:_x_v2 ldrb w1, [x0] adrp x0, v2 add x0, x0, :lo12:v2 strb w1, [x0] adrp x0, _x_v1 add x0, x0, :lo12:_x_v1 ldr w1, [x0] adrp x0, v1 add x0, x0, :lo12:v1 str w1, [x0] adrp x0, _x_delta add x0, x0, :lo12:_x_delta ldr s0, [x0] adrp x0, delta add x0, x0, :lo12:delta str s0, [x0] adrp x0, _x_p3_l3 add x0, x0, :lo12:_x_p3_l3 ldrb w1, [x0] adrp x0, p3_l3 add x0, x0, :lo12:p3_l3 strb w1, [x0] adrp x0, _x_p0_evt add x0, x0, :lo12:_x_p0_evt ldrb w1, [x0] adrp x0, p0_evt add x0, x0, :lo12:p0_evt strb w1, [x0] adrp x0, _x_p2_c add x0, x0, :lo12:_x_p2_c ldr s0, [x0] adrp x0, p2_c add x0, x0, :lo12:p2_c str s0, [x0] adrp x0, _x_p0_l1 add x0, x0, :lo12:_x_p0_l1 ldrb w1, [x0] adrp x0, p0_l1 add x0, x0, :lo12:p0_l1 strb w1, [x0] adrp x0, _x_p2_evt add x0, x0, :lo12:_x_p2_evt ldrb w1, [x0] adrp x0, p2_evt add x0, x0, :lo12:p2_evt strb w1, [x0] adrp x0, _x_p0_l2 add x0, x0, :lo12:_x_p0_l2 ldrb w1, [x0] adrp x0, p0_l2 add x0, x0, :lo12:p0_l2 strb w1, [x0] adrp x0, _x_p0_l3 add x0, x0, :lo12:_x_p0_l3 ldrb w1, [x0] adrp x0, p0_l3 add x0, x0, :lo12:p0_l3 strb w1, [x0] .L107: ldr w0, [sp, 28] cmp w0, 0 bne .L460 mov w0, 0 ldp x29, x30, [sp], 32 .cfi_restore 30 .cfi_restore 29 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE1: .size main, .-main ```
### Human: Write a random program in ARM assembly### Assistant: ``` .text .section .rodata .align 3 .LC0: .string "Costs time: %f\n" .text .align 2 .global benchmark .type benchmark, %function benchmark: .LFB0: .cfi_startproc stp x29, x30, [sp, -112]! .cfi_def_cfa_offset 112 .cfi_offset 29, -112 .cfi_offset 30, -104 mov x29, sp str x0, [sp, 56] str x1, [sp, 48] str x2, [sp, 40] str x3, [sp, 32] str w4, [sp, 28] str w5, [sp, 24] adrp x0, :got:__stack_chk_guard ldr x0, [x0, #:got_lo12:__stack_chk_guard] ldr x1, [x0] str x1, [sp, 104] mov x1, 0 add x0, sp, 72 mov x1, x0 mov w0, 4 bl clock_gettime ldr x5, [sp, 56] ldr w4, [sp, 24] ldr w3, [sp, 28] ldr x2, [sp, 32] ldr x1, [sp, 40] ldr x0, [sp, 48] blr x5 add x0, sp, 88 mov x1, x0 mov w0, 4 bl clock_gettime ldr x1, [sp, 88] ldr x0, [sp, 72] sub x0, x1, x0 fmov d0, x0 scvtf d1, d0 ldr d0, [sp, 80] scvtf d0, d0 mov x0, 225833675390976 movk x0, 0x41cd, lsl 48 fmov d2, x0 fdiv d0, d0, d2 fadd d0, d1, d0 str d0, [sp, 64] ldr d0, [sp, 64] adrp x0, .LC0 add x0, x0, :lo12:.LC0 bl printf nop adrp x0, :got:__stack_chk_guard ldr x0, [x0, #:got_lo12:__stack_chk_guard] ldr x2, [sp, 104] ldr x1, [x0] subs x2, x2, x1 mov x1, 0 beq .L3 bl __stack_chk_fail .L3: ldp x29, x30, [sp], 112 .cfi_restore 30 .cfi_restore 29 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE0: .size benchmark, .-benchmark .section .rodata .align 3 .LC1: .string "a+" .align 3 .LC2: .string "./output.txt" .align 3 .LC3: .string "%d" .text .align 2 .global writeResult .type writeResult, %function writeResult: .LFB1: .cfi_startproc stp x29, x30, [sp, -48]! .cfi_def_cfa_offset 48 .cfi_offset 29, -48 .cfi_offset 30, -40 mov x29, sp str x0, [sp, 24] str w1, [sp, 20] ldr w0, [sp, 20] sub w0, w0, #1 str w0, [sp, 32] b .L5 .L8: ldrsw x0, [sp, 32] lsl x0, x0, 2 ldr x1, [sp, 24] add x0, x1, x0 ldr w0, [x0] cmp w0, 0 bne .L11 ldr w0, [sp, 32] sub w0, w0, #1 str w0, [sp, 32] .L5: ldr w0, [sp, 32] cmp w0, 0 bgt .L8 b .L7 .L11: nop .L7: str xzr, [sp, 40] adrp x0, .LC1 add x1, x0, :lo12:.LC1 adrp x0, .LC2 add x0, x0, :lo12:.LC2 bl fopen str x0, [sp, 40] ldr w0, [sp, 32] str w0, [sp, 36] b .L9 .L10: ldrsw x0, [sp, 36] lsl x0, x0, 2 ldr x1, [sp, 24] add x0, x1, x0 ldr w0, [x0] mov w2, w0 adrp x0, .LC3 add x1, x0, :lo12:.LC3 ldr x0, [sp, 40] bl fprintf ldr w0, [sp, 36] sub w0, w0, #1 str w0, [sp, 36] .L9: ldr w0, [sp, 36] cmp w0, 0 bge .L10 ldr x1, [sp, 40] mov w0, 10 bl fputc ldr x0, [sp, 40] bl fclose nop ldp x29, x30, [sp], 48 .cfi_restore 30 .cfi_restore 29 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE1: .size writeResult, .-writeResult .align 2 .global writeBigResult .type writeBigResult, %function writeBigResult: .LFB2: .cfi_startproc stp x29, x30, [sp, -48]! .cfi_def_cfa_offset 48 .cfi_offset 29, -48 .cfi_offset 30, -40 mov x29, sp str x0, [sp, 24] str w1, [sp, 20] ldr w0, [sp, 20] sub w0, w0, #1 str w0, [sp, 32] b .L13 .L16: ldrsw x0, [sp, 32] lsl x0, x0, 3 ldr x1, [sp, 24] add x0, x1, x0 ldr x0, [x0] cmp x0, 0 bne .L19 ldr w0, [sp, 32] sub w0, w0, #1 str w0, [sp, 32] .L13: ldr w0, [sp, 32] cmp w0, 0 bgt .L16 b .L15 .L19: nop .L15: str xzr, [sp, 40] adrp x0, .LC1 add x1, x0, :lo12:.LC1 adrp x0, .LC2 add x0, x0, :lo12:.LC2 bl fopen str x0, [sp, 40] ldr w0, [sp, 32] str w0, [sp, 36] b .L17 .L18: ldrsw x0, [sp, 36] lsl x0, x0, 3 ldr x1, [sp, 24] add x0, x1, x0 ldr x0, [x0] mov x2, x0 adrp x0, .LC3 add x1, x0, :lo12:.LC3 ldr x0, [sp, 40] bl fprintf ldr w0, [sp, 36] sub w0, w0, #1 str w0, [sp, 36] .L17: ldr w0, [sp, 36] cmp w0, 0 bge .L18 ldr x1, [sp, 40] mov w0, 10 bl fputc ldr x0, [sp, 40] bl fclose nop ldp x29, x30, [sp], 48 .cfi_restore 30 .cfi_restore 29 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE2: .size writeBigResult, .-writeBigResult ```
### Human: Write a random program in ARM assembly### Assistant: ``` .text .align 2 .global main .type main, %function main: .LFB6: .cfi_startproc mov w0, 0 ret .cfi_endproc .LFE6: .size main, .-main ```
### Human: Write a random program in ARM assembly### Assistant: ``` .text .align 2 .global strlcpy .type strlcpy, %function strlcpy: .LFB6: .cfi_startproc sub sp, sp, #48 .cfi_def_cfa_offset 48 str x0, [sp, 24] str x1, [sp, 16] str x2, [sp, 8] ldr x0, [sp, 16] str x0, [sp, 40] ldr x0, [sp, 8] str x0, [sp, 32] ldr x0, [sp, 32] cmp x0, 0 beq .L2 b .L3 .L4: ldr x1, [sp, 16] add x0, x1, 1 str x0, [sp, 16] ldr x0, [sp, 24] add x2, x0, 1 str x2, [sp, 24] ldrb w1, [x1] strb w1, [x0] ldrb w0, [x0] cmp w0, 0 beq .L9 .L3: ldr x0, [sp, 32] sub x0, x0, #1 str x0, [sp, 32] ldr x0, [sp, 32] cmp x0, 0 bne .L4 b .L2 .L9: nop .L2: ldr x0, [sp, 32] cmp x0, 0 bne .L5 ldr x0, [sp, 8] cmp x0, 0 beq .L10 ldr x0, [sp, 24] strb wzr, [x0] .L10: nop .L7: ldr x0, [sp, 16] add x1, x0, 1 str x1, [sp, 16] ldrb w0, [x0] cmp w0, 0 bne .L7 .L5: ldr x1, [sp, 16] ldr x0, [sp, 40] sub x0, x1, x0 sub x0, x0, #1 add sp, sp, 48 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE6: .size strlcpy, .-strlcpy ```
### Human: Write a random program in ARM assembly### Assistant: ``` .text .global trace .bss .type trace, %object .size trace, 1 trace: .zero 1 .global stack .type stack, %object .size stack, 1 stack: .zero 1 .section .rodata .align 3 .LC0: .string "SIPRO V2.0\n" .align 3 .LC1: .string "Usage: %s [-t] [-d] [-h] file\n" .align 3 .LC2: .string "\t Runs <file> on SIPRO\n" .align 3 .LC3: .string "\t -t: trace mode\n" .align 3 .LC4: .string "\t -d: dump memory at end of execution\n" .align 3 .LC5: .string "\t -s: print stack in trace mode\n" .align 3 .LC6: .string "\t -h: print this message and exit\n" .text .align 2 .type usage, %function usage: .LFB6: .cfi_startproc stp x29, x30, [sp, -48]! .cfi_def_cfa_offset 48 .cfi_offset 29, -48 .cfi_offset 30, -40 mov x29, sp str x0, [sp, 40] str x1, [sp, 32] str x2, [sp, 24] ldr x3, [sp, 40] mov x2, 11 mov x1, 1 adrp x0, .LC0 add x0, x0, :lo12:.LC0 bl fwrite ldr x2, [sp, 32] adrp x0, .LC1 add x1, x0, :lo12:.LC1 ldr x0, [sp, 40] bl fprintf ldr x3, [sp, 40] mov x2, 23 mov x1, 1 adrp x0, .LC2 add x0, x0, :lo12:.LC2 bl fwrite ldr x3, [sp, 40] mov x2, 17 mov x1, 1 adrp x0, .LC3 add x0, x0, :lo12:.LC3 bl fwrite ldr x3, [sp, 40] mov x2, 38 mov x1, 1 adrp x0, .LC4 add x0, x0, :lo12:.LC4 bl fwrite ldr x3, [sp, 40] mov x2, 32 mov x1, 1 adrp x0, .LC5 add x0, x0, :lo12:.LC5 bl fwrite ldr x3, [sp, 40] mov x2, 34 mov x1, 1 adrp x0, .LC6 add x0, x0, :lo12:.LC6 bl fwrite nop ldp x29, x30, [sp], 48 .cfi_restore 30 .cfi_restore 29 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE6: .size usage, .-usage .section .rodata .align 3 .LC7: .string "tdsh" .align 3 .LC8: .string "rb" .align 3 .LC9: .string "Error opening file %s: %s\n" .text .align 2 .global main .type main, %function main: .LFB7: .cfi_startproc stp x29, x30, [sp, -64]! .cfi_def_cfa_offset 64 .cfi_offset 29, -64 .cfi_offset 30, -56 mov x29, sp stp x19, x20, [sp, 16] .cfi_offset 19, -48 .cfi_offset 20, -40 str w0, [sp, 44] str x1, [sp, 32] strb wzr, [sp, 51] ldr w0, [sp, 44] cmp w0, 1 bgt .L5 adrp x0, :got:stderr ldr x0, [x0, #:got_lo12:stderr] ldr x3, [x0] ldr x0, [sp, 32] ldr x1, [x0] ldr x0, [sp, 32] add x0, x0, 8 ldr x0, [x0] mov x2, x0 mov x0, x3 bl usage mov w0, 1 b .L4 .L10: ldr w0, [sp, 52] cmp w0, 116 beq .L6 ldr w0, [sp, 52] cmp w0, 116 bgt .L7 ldr w0, [sp, 52] cmp w0, 100 beq .L8 ldr w0, [sp, 52] cmp w0, 115 beq .L9 b .L7 .L6: adrp x0, trace add x0, x0, :lo12:trace mov w1, 1 strb w1, [x0] b .L5 .L8: mov w0, 1 strb w0, [sp, 51] b .L5 .L9: adrp x0, stack add x0, x0, :lo12:stack mov w1, 1 strb w1, [x0] b .L5 .L7: adrp x0, :got:stderr ldr x0, [x0, #:got_lo12:stderr] ldr x3, [x0] ldr x0, [sp, 32] ldr x1, [x0] ldr x0, [sp, 32] add x0, x0, 8 ldr x0, [x0] mov x2, x0 mov x0, x3 bl usage mov w0, 1 bl exit .L5: adrp x0, .LC7 add x2, x0, :lo12:.LC7 ldr x1, [sp, 32] ldr w0, [sp, 44] bl getopt str w0, [sp, 52] ldr w0, [sp, 52] cmn w0, #1 bne .L10 adrp x0, :got:optind ldr x0, [x0, #:got_lo12:optind] ldr w0, [x0] sxtw x0, w0 lsl x0, x0, 3 ldr x1, [sp, 32] add x0, x1, x0 ldr x2, [x0] adrp x0, .LC8 add x1, x0, :lo12:.LC8 mov x0, x2 bl fopen str x0, [sp, 56] ldr x0, [sp, 56] cmp x0, 0 bne .L11 adrp x0, :got:stderr ldr x0, [x0, #:got_lo12:stderr] ldr x19, [x0] adrp x0, :got:optind ldr x0, [x0, #:got_lo12:optind] ldr w0, [x0] sxtw x0, w0 lsl x0, x0, 3 ldr x1, [sp, 32] add x0, x1, x0 ldr x20, [x0] bl __errno_location ldr w0, [x0] bl strerror mov x3, x0 mov x2, x20 adrp x0, .LC9 add x1, x0, :lo12:.LC9 mov x0, x19 bl fprintf mov w0, 1 b .L4 .L11: ldr x0, [sp, 56] bl loadMemoryFromFile ldr x0, [sp, 56] bl fclose ldrb w0, [sp, 51] cmp w0, 0 beq .L12 bl dumpMemory .L12: bl startProg cmp w0, 0 cset w0, eq and w0, w0, 255 .L4: ldp x19, x20, [sp, 16] ldp x29, x30, [sp], 64 .cfi_restore 30 .cfi_restore 29 .cfi_restore 19 .cfi_restore 20 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE7: .size main, .-main ```
### Human: Write a random program in ARM assembly### Assistant: ``` .text .local s_output_file .comm s_output_file,8,8 .local s_output_lcb_file .comm s_output_lcb_file,8,8 .local s_output_lcb_module_name .comm s_output_lcb_module_name,8,8 .align 2 .global SetOutputFile .type SetOutputFile, %function SetOutputFile: .LFB6: .cfi_startproc sub sp, sp, #16 .cfi_def_cfa_offset 16 str x0, [sp, 8] adrp x0, s_output_file add x0, x0, :lo12:s_output_file ldr x1, [sp, 8] str x1, [x0] nop add sp, sp, 16 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE6: .size SetOutputFile, .-SetOutputFile .align 2 .global GetOutputFile .type GetOutputFile, %function GetOutputFile: .LFB7: .cfi_startproc sub sp, sp, #16 .cfi_def_cfa_offset 16 str x0, [sp, 8] adrp x0, s_output_file add x0, x0, :lo12:s_output_file ldr x1, [x0] ldr x0, [sp, 8] str x1, [x0] nop add sp, sp, 16 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE7: .size GetOutputFile, .-GetOutputFile .align 2 .global SetOutputLCBFile .type SetOutputLCBFile, %function SetOutputLCBFile: .LFB8: .cfi_startproc sub sp, sp, #16 .cfi_def_cfa_offset 16 str x0, [sp, 8] adrp x0, s_output_lcb_file add x0, x0, :lo12:s_output_lcb_file ldr x1, [sp, 8] str x1, [x0] nop add sp, sp, 16 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE8: .size SetOutputLCBFile, .-SetOutputLCBFile .align 2 .global GetOutputLCBFile .type GetOutputLCBFile, %function GetOutputLCBFile: .LFB9: .cfi_startproc sub sp, sp, #16 .cfi_def_cfa_offset 16 str x0, [sp, 8] adrp x0, s_output_lcb_file add x0, x0, :lo12:s_output_lcb_file ldr x1, [x0] ldr x0, [sp, 8] str x1, [x0] nop add sp, sp, 16 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE9: .size GetOutputLCBFile, .-GetOutputLCBFile .align 2 .global SetOutputLCBModuleName .type SetOutputLCBModuleName, %function SetOutputLCBModuleName: .LFB10: .cfi_startproc sub sp, sp, #16 .cfi_def_cfa_offset 16 str x0, [sp, 8] adrp x0, s_output_lcb_module_name add x0, x0, :lo12:s_output_lcb_module_name ldr x1, [sp, 8] str x1, [x0] nop add sp, sp, 16 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE10: .size SetOutputLCBModuleName, .-SetOutputLCBModuleName .align 2 .global GetOutputLCBModuleName .type GetOutputLCBModuleName, %function GetOutputLCBModuleName: .LFB11: .cfi_startproc sub sp, sp, #16 .cfi_def_cfa_offset 16 str x0, [sp, 8] adrp x0, s_output_lcb_module_name add x0, x0, :lo12:s_output_lcb_module_name ldr x1, [x0] ldr x0, [sp, 8] str x1, [x0] nop add sp, sp, 16 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE11: .size GetOutputLCBModuleName, .-GetOutputLCBModuleName .section .rodata .align 3 .LC0: .string "w" .text .align 2 .global OpenOutputFile .type OpenOutputFile, %function OpenOutputFile: .LFB12: .cfi_startproc stp x29, x30, [sp, -16]! .cfi_def_cfa_offset 16 .cfi_offset 29, -16 .cfi_offset 30, -8 mov x29, sp adrp x0, s_output_file add x0, x0, :lo12:s_output_file ldr x0, [x0] cmp x0, 0 bne .L8 mov x0, 0 b .L9 .L8: adrp x0, s_output_file add x0, x0, :lo12:s_output_file ldr x2, [x0] adrp x0, .LC0 add x1, x0, :lo12:.LC0 mov x0, x2 bl fopen .L9: ldp x29, x30, [sp], 16 .cfi_restore 30 .cfi_restore 29 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE12: .size OpenOutputFile, .-OpenOutputFile .align 2 .global OpenLCBOutputFile .type OpenLCBOutputFile, %function OpenLCBOutputFile: .LFB13: .cfi_startproc stp x29, x30, [sp, -16]! .cfi_def_cfa_offset 16 .cfi_offset 29, -16 .cfi_offset 30, -8 mov x29, sp adrp x0, s_output_lcb_file add x0, x0, :lo12:s_output_lcb_file ldr x0, [x0] cmp x0, 0 bne .L11 mov x0, 0 b .L12 .L11: adrp x0, s_output_lcb_file add x0, x0, :lo12:s_output_lcb_file ldr x2, [x0] adrp x0, .LC0 add x1, x0, :lo12:.LC0 mov x0, x2 bl fopen .L12: ldp x29, x30, [sp], 16 .cfi_restore 30 .cfi_restore 29 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE13: .size OpenLCBOutputFile, .-OpenLCBOutputFile ```
### Human: Write a random program in ARM assembly### Assistant: ``` .text .align 2 .global main .type main, %function main: .LFB0: .cfi_startproc sub sp, sp, #16 .cfi_def_cfa_offset 16 mov w0, 42 str w0, [sp, 12] mov w0, 0 add sp, sp, 16 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE0: .size main, .-main ```
### Human: Write a random program in ARM assembly### Assistant: ``` .text .section .rodata .align 3 .LC0: .string "Effective uid: %d\n" .text .align 2 .global main .type main, %function main: .LFB6: .cfi_startproc stp x29, x30, [sp, -32]! .cfi_def_cfa_offset 32 .cfi_offset 29, -32 .cfi_offset 30, -24 mov x29, sp str w0, [sp, 28] str x1, [sp, 16] bl geteuid mov w1, w0 adrp x0, .LC0 add x0, x0, :lo12:.LC0 bl printf mov w0, 0 ldp x29, x30, [sp], 32 .cfi_restore 30 .cfi_restore 29 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE6: .size main, .-main ```
### Human: Write a random program in ARM assembly### Assistant: ``` .text .align 2 .global main .type main, %function main: .LFB0: .cfi_startproc sub sp, sp, #32 .cfi_def_cfa_offset 32 mov w0, 6 str w0, [sp, 12] mov w0, 3 str w0, [sp, 24] str wzr, [sp, 20] fmov s0, 5.0e+0 str s0, [sp, 16] fmov s0, 3.0e+0 str s0, [sp, 28] ldr s1, [sp, 28] fmov s0, 4.0e+0 fadd s0, s1, s0 str s0, [sp, 28] b .L2 .L3: ldr w0, [sp, 20] add w0, w0, 1 str w0, [sp, 20] ldr s0, [sp, 20] scvtf s0, s0 ldr s1, [sp, 16] fadd s0, s1, s0 str s0, [sp, 16] ldr w0, [sp, 12] sub w0, w0, #1 str w0, [sp, 12] .L2: ldr s1, [sp, 16] ldr s0, [sp, 28] fcmpe s1, s0 bls .L3 ldr s1, [sp, 28] fmov s0, 1.0e+0 fsub s0, s1, s0 str s0, [sp, 28] mov w0, 0 add sp, sp, 32 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE0: .size main, .-main ```
### Human: Write a random program in ARM assembly### Assistant: ``` .text .align 2 .global check_if_given_str_is_interleaving_of_two_other_strs .type check_if_given_str_is_interleaving_of_two_other_strs, %function check_if_given_str_is_interleaving_of_two_other_strs: .LFB0: .cfi_startproc stp x29, x30, [sp, -80]! .cfi_def_cfa_offset 80 .cfi_offset 29, -80 .cfi_offset 30, -72 mov x29, sp str x0, [sp, 40] str x1, [sp, 32] str x2, [sp, 24] ldr x0, [sp, 40] cmp x0, 0 bne .L2 str wzr, [sp, 60] b .L3 .L2: ldr x0, [sp, 40] bl strlen str w0, [sp, 60] .L3: ldr x0, [sp, 32] cmp x0, 0 bne .L4 str wzr, [sp, 64] b .L5 .L4: ldr x0, [sp, 32] bl strlen str w0, [sp, 64] .L5: ldr x0, [sp, 24] cmp x0, 0 bne .L6 str wzr, [sp, 56] b .L7 .L6: ldr x0, [sp, 24] bl strlen str w0, [sp, 56] .L7: str wzr, [sp, 68] str wzr, [sp, 72] str wzr, [sp, 76] b .L8 .L13: ldrsw x0, [sp, 68] ldr x1, [sp, 40] add x0, x1, x0 ldrb w1, [x0] ldrsw x0, [sp, 76] ldr x2, [sp, 24] add x0, x2, x0 ldrb w0, [x0] cmp w1, w0 bne .L9 ldr w0, [sp, 68] add w0, w0, 1 str w0, [sp, 68] ldr w0, [sp, 76] add w0, w0, 1 str w0, [sp, 76] b .L8 .L9: ldrsw x0, [sp, 72] ldr x1, [sp, 32] add x0, x1, x0 ldrb w1, [x0] ldrsw x0, [sp, 76] ldr x2, [sp, 24] add x0, x2, x0 ldrb w0, [x0] cmp w1, w0 bne .L10 ldr w0, [sp, 72] add w0, w0, 1 str w0, [sp, 72] ldr w0, [sp, 76] add w0, w0, 1 str w0, [sp, 76] b .L8 .L10: mov w0, 0 b .L11 .L8: ldr w1, [sp, 68] ldr w0, [sp, 60] cmp w1, w0 bge .L14 ldr w1, [sp, 72] ldr w0, [sp, 64] cmp w1, w0 bge .L14 ldr w1, [sp, 76] ldr w0, [sp, 56] cmp w1, w0 blt .L13 b .L14 .L17: ldrsw x0, [sp, 68] ldr x1, [sp, 40] add x0, x1, x0 ldrb w1, [x0] ldrsw x0, [sp, 76] ldr x2, [sp, 24] add x0, x2, x0 ldrb w0, [x0] cmp w1, w0 bne .L15 ldr w0, [sp, 68] add w0, w0, 1 str w0, [sp, 68] ldr w0, [sp, 76] add w0, w0, 1 str w0, [sp, 76] b .L14 .L15: mov w0, 0 b .L11 .L14: ldr w1, [sp, 68] ldr w0, [sp, 60] cmp w1, w0 bge .L18 ldr w1, [sp, 76] ldr w0, [sp, 56] cmp w1, w0 blt .L17 b .L18 .L21: ldrsw x0, [sp, 72] ldr x1, [sp, 32] add x0, x1, x0 ldrb w1, [x0] ldrsw x0, [sp, 76] ldr x2, [sp, 24] add x0, x2, x0 ldrb w0, [x0] cmp w1, w0 bne .L19 ldr w0, [sp, 72] add w0, w0, 1 str w0, [sp, 72] ldr w0, [sp, 76] add w0, w0, 1 str w0, [sp, 76] b .L18 .L19: mov w0, 0 b .L11 .L18: ldr w1, [sp, 72] ldr w0, [sp, 64] cmp w1, w0 bge .L20 ldr w1, [sp, 76] ldr w0, [sp, 56] cmp w1, w0 blt .L21 .L20: ldr w1, [sp, 68] ldr w0, [sp, 60] cmp w1, w0 blt .L22 ldr w1, [sp, 72] ldr w0, [sp, 64] cmp w1, w0 blt .L22 ldr w1, [sp, 76] ldr w0, [sp, 56] cmp w1, w0 bge .L23 .L22: mov w0, 0 b .L11 .L23: mov w0, 1 .L11: ldp x29, x30, [sp], 80 .cfi_restore 30 .cfi_restore 29 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE0: .size check_if_given_str_is_interleaving_of_two_other_strs, .-check_if_given_str_is_interleaving_of_two_other_strs .section .rodata .align 3 .LC0: .string "program.c" .align 3 .LC1: .string "true == check_if_given_str_is_interleaving_of_two_other_strs(A0, B0, C0)" .align 3 .LC2: .string "AABC" .align 3 .LC3: .string "true == check_if_given_str_is_interleaving_of_two_other_strs(A1, B1, C1)" .align 3 .LC4: .string "true == check_if_given_str_is_interleaving_of_two_other_strs(B1, A1, C1)" .align 3 .LC5: .string "BCAA" .align 3 .LC6: .string "false == check_if_given_str_is_interleaving_of_two_other_strs(A2, B2, C2)" .align 3 .LC7: .string "false == check_if_given_str_is_interleaving_of_two_other_strs(B2, A2, C2)" .align 3 .LC8: .string "AAB" .align 3 .LC9: .string "false == check_if_given_str_is_interleaving_of_two_other_strs(A3, B3, C3)" .align 3 .LC10: .string "false == check_if_given_str_is_interleaving_of_two_other_strs(B3, A3, C3)" .align 3 .LC11: .string "false == check_if_given_str_is_interleaving_of_two_other_strs(A4, B4, C4)" .align 3 .LC12: .string "false == check_if_given_str_is_interleaving_of_two_other_strs(B4, A4, C4)" .align 3 .LC13: .string "BBCD" .align 3 .LC14: .string "ABABCDB" .align 3 .LC15: .string "true == check_if_given_str_is_interleaving_of_two_other_strs(A5, B5, C5)" .align 3 .LC16: .string "true == check_if_given_str_is_interleaving_of_two_other_strs(B5, A5, C5)" .align 3 .LC17: .string "AABBBCD" .align 3 .LC18: .string "true == check_if_given_str_is_interleaving_of_two_other_strs(A6, B6, C6)" .align 3 .LC19: .string "true == check_if_given_str_is_interleaving_of_two_other_strs(B6, A6, C6)" .text .align 2 .global main .type main, %function main: .LFB1: .cfi_startproc stp x29, x30, [sp, -192]! .cfi_def_cfa_offset 192 .cfi_offset 29, -192 .cfi_offset 30, -184 mov x29, sp str xzr, [sp, 24] str xzr, [sp, 32] str xzr, [sp, 40] ldr x2, [sp, 40] ldr x1, [sp, 32] ldr x0, [sp, 24] bl check_if_given_str_is_interleaving_of_two_other_strs and w0, w0, 255 cmp w0, 0 bne .L25 adrp x0, __PRETTY_FUNCTION__.0 add x3, x0, :lo12:__PRETTY_FUNCTION__.0 mov w2, 89 adrp x0, .LC0 add x1, x0, :lo12:.LC0 adrp x0, .LC1 add x0, x0, :lo12:.LC1 bl __assert_fail .L25: adrp x0, .LC2 add x0, x0, :lo12:.LC2 str x0, [sp, 48] str xzr, [sp, 56] adrp x0, .LC2 add x0, x0, :lo12:.LC2 str x0, [sp, 64] ldr x2, [sp, 64] ldr x1, [sp, 56] ldr x0, [sp, 48] bl check_if_given_str_is_interleaving_of_two_other_strs and w0, w0, 255 cmp w0, 0 bne .L26 adrp x0, __PRETTY_FUNCTION__.0 add x3, x0, :lo12:__PRETTY_FUNCTION__.0 mov w2, 95 adrp x0, .LC0 add x1, x0, :lo12:.LC0 adrp x0, .LC3 add x0, x0, :lo12:.LC3 bl __assert_fail .L26: ldr x2, [sp, 64] ldr x1, [sp, 48] ldr x0, [sp, 56] bl check_if_given_str_is_interleaving_of_two_other_strs and w0, w0, 255 cmp w0, 0 bne .L27 adrp x0, __PRETTY_FUNCTION__.0 add x3, x0, :lo12:__PRETTY_FUNCTION__.0 mov w2, 97 adrp x0, .LC0 add x1, x0, :lo12:.LC0 adrp x0, .LC4 add x0, x0, :lo12:.LC4 bl __assert_fail .L27: adrp x0, .LC2 add x0, x0, :lo12:.LC2 str x0, [sp, 72] str xzr, [sp, 80] adrp x0, .LC5 add x0, x0, :lo12:.LC5 str x0, [sp, 88] ldr x2, [sp, 88] ldr x1, [sp, 80] ldr x0, [sp, 72] bl check_if_given_str_is_interleaving_of_two_other_strs and w0, w0, 255 eor w0, w0, 1 and w0, w0, 255 cmp w0, 0 bne .L28 adrp x0, __PRETTY_FUNCTION__.0 add x3, x0, :lo12:__PRETTY_FUNCTION__.0 mov w2, 103 adrp x0, .LC0 add x1, x0, :lo12:.LC0 adrp x0, .LC6 add x0, x0, :lo12:.LC6 bl __assert_fail .L28: ldr x2, [sp, 88] ldr x1, [sp, 72] ldr x0, [sp, 80] bl check_if_given_str_is_interleaving_of_two_other_strs and w0, w0, 255 eor w0, w0, 1 and w0, w0, 255 cmp w0, 0 bne .L29 adrp x0, __PRETTY_FUNCTION__.0 add x3, x0, :lo12:__PRETTY_FUNCTION__.0 mov w2, 105 adrp x0, .LC0 add x1, x0, :lo12:.LC0 adrp x0, .LC7 add x0, x0, :lo12:.LC7 bl __assert_fail .L29: adrp x0, .LC2 add x0, x0, :lo12:.LC2 str x0, [sp, 96] str xzr, [sp, 104] adrp x0, .LC8 add x0, x0, :lo12:.LC8 str x0, [sp, 112] ldr x2, [sp, 112] ldr x1, [sp, 104] ldr x0, [sp, 96] bl check_if_given_str_is_interleaving_of_two_other_strs and w0, w0, 255 eor w0, w0, 1 and w0, w0, 255 cmp w0, 0 bne .L30 adrp x0, __PRETTY_FUNCTION__.0 add x3, x0, :lo12:__PRETTY_FUNCTION__.0 mov w2, 111 adrp x0, .LC0 add x1, x0, :lo12:.LC0 adrp x0, .LC9 add x0, x0, :lo12:.LC9 bl __assert_fail .L30: ldr x2, [sp, 112] ldr x1, [sp, 96] ldr x0, [sp, 104] bl check_if_given_str_is_interleaving_of_two_other_strs and w0, w0, 255 eor w0, w0, 1 and w0, w0, 255 cmp w0, 0 bne .L31 adrp x0, __PRETTY_FUNCTION__.0 add x3, x0, :lo12:__PRETTY_FUNCTION__.0 mov w2, 113 adrp x0, .LC0 add x1, x0, :lo12:.LC0 adrp x0, .LC10 add x0, x0, :lo12:.LC10 bl __assert_fail .L31: adrp x0, .LC8 add x0, x0, :lo12:.LC8 str x0, [sp, 120] str xzr, [sp, 128] adrp x0, .LC2 add x0, x0, :lo12:.LC2 str x0, [sp, 136] ldr x2, [sp, 136] ldr x1, [sp, 128] ldr x0, [sp, 120] bl check_if_given_str_is_interleaving_of_two_other_strs and w0, w0, 255 eor w0, w0, 1 and w0, w0, 255 cmp w0, 0 bne .L32 adrp x0, __PRETTY_FUNCTION__.0 add x3, x0, :lo12:__PRETTY_FUNCTION__.0 mov w2, 119 adrp x0, .LC0 add x1, x0, :lo12:.LC0 adrp x0, .LC11 add x0, x0, :lo12:.LC11 bl __assert_fail .L32: ldr x2, [sp, 136] ldr x1, [sp, 120] ldr x0, [sp, 128] bl check_if_given_str_is_interleaving_of_two_other_strs and w0, w0, 255 eor w0, w0, 1 and w0, w0, 255 cmp w0, 0 bne .L33 adrp x0, __PRETTY_FUNCTION__.0 add x3, x0, :lo12:__PRETTY_FUNCTION__.0 mov w2, 121 adrp x0, .LC0 add x1, x0, :lo12:.LC0 adrp x0, .LC12 add x0, x0, :lo12:.LC12 bl __assert_fail .L33: adrp x0, .LC8 add x0, x0, :lo12:.LC8 str x0, [sp, 144] adrp x0, .LC13 add x0, x0, :lo12:.LC13 str x0, [sp, 152] adrp x0, .LC14 add x0, x0, :lo12:.LC14 str x0, [sp, 160] ldr x2, [sp, 160] ldr x1, [sp, 152] ldr x0, [sp, 144] bl check_if_given_str_is_interleaving_of_two_other_strs and w0, w0, 255 cmp w0, 0 bne .L34 adrp x0, __PRETTY_FUNCTION__.0 add x3, x0, :lo12:__PRETTY_FUNCTION__.0 mov w2, 127 adrp x0, .LC0 add x1, x0, :lo12:.LC0 adrp x0, .LC15 add x0, x0, :lo12:.LC15 bl __assert_fail .L34: ldr x2, [sp, 160] ldr x1, [sp, 144] ldr x0, [sp, 152] bl check_if_given_str_is_interleaving_of_two_other_strs and w0, w0, 255 cmp w0, 0 bne .L35 adrp x0, __PRETTY_FUNCTION__.0 add x3, x0, :lo12:__PRETTY_FUNCTION__.0 mov w2, 129 adrp x0, .LC0 add x1, x0, :lo12:.LC0 adrp x0, .LC16 add x0, x0, :lo12:.LC16 bl __assert_fail .L35: adrp x0, .LC8 add x0, x0, :lo12:.LC8 str x0, [sp, 168] adrp x0, .LC13 add x0, x0, :lo12:.LC13 str x0, [sp, 176] adrp x0, .LC17 add x0, x0, :lo12:.LC17 str x0, [sp, 184] ldr x2, [sp, 184] ldr x1, [sp, 176] ldr x0, [sp, 168] bl check_if_given_str_is_interleaving_of_two_other_strs and w0, w0, 255 cmp w0, 0 bne .L36 adrp x0, __PRETTY_FUNCTION__.0 add x3, x0, :lo12:__PRETTY_FUNCTION__.0 mov w2, 135 adrp x0, .LC0 add x1, x0, :lo12:.LC0 adrp x0, .LC18 add x0, x0, :lo12:.LC18 bl __assert_fail .L36: ldr x2, [sp, 184] ldr x1, [sp, 168] ldr x0, [sp, 176] bl check_if_given_str_is_interleaving_of_two_other_strs and w0, w0, 255 cmp w0, 0 bne .L37 adrp x0, __PRETTY_FUNCTION__.0 add x3, x0, :lo12:__PRETTY_FUNCTION__.0 mov w2, 137 adrp x0, .LC0 add x1, x0, :lo12:.LC0 adrp x0, .LC19 add x0, x0, :lo12:.LC19 bl __assert_fail .L37: mov w0, 0 ldp x29, x30, [sp], 192 .cfi_restore 30 .cfi_restore 29 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE1: .size main, .-main .section .rodata .align 3 .type __PRETTY_FUNCTION__.0, %object .size __PRETTY_FUNCTION__.0, 5 __PRETTY_FUNCTION__.0: .string "main" ```
### Human: Write a random program in ARM assembly### Assistant: ``` .text .align 2 .global f .type f, %function f: .LFB0: .cfi_startproc sub sp, sp, #32 .cfi_def_cfa_offset 32 str w0, [sp, 12] str w1, [sp, 8] ldr w0, [sp, 8] mov w1, 34953 movk w1, 0x8888, lsl 16 smull x1, w0, w1 lsr x1, x1, 32 add w1, w0, w1 asr w1, w1, 4 asr w0, w0, 31 sub w0, w0, w1 ldr w1, [sp, 12] add w0, w1, w0 str w0, [sp, 12] ldr w0, [sp, 12] add w0, w0, 6 str w0, [sp, 12] ldr w0, [sp, 12] mov w1, 43691 movk w1, 0x2aaa, lsl 16 smull x1, w0, w1 lsr x1, x1, 32 asr w0, w0, 31 sub w0, w1, w0 str w0, [sp, 28] ldr w0, [sp, 28] add sp, sp, 32 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE0: .size f, .-f .align 2 .global main .type main, %function main: .LFB1: .cfi_startproc stp x29, x30, [sp, -32]! .cfi_def_cfa_offset 32 .cfi_offset 29, -32 .cfi_offset 30, -24 mov x29, sp mov w0, 263 str w0, [sp, 24] mov w0, 6271 str w0, [sp, 28] ldr w1, [sp, 28] ldr w0, [sp, 24] bl f str w0, [sp, 24] mov w0, -20 str w0, [sp, 28] ldr w1, [sp, 24] ldr w0, [sp, 28] add w0, w1, w0 str w0, [sp, 24] ldr w1, [sp, 28] ldr w0, [sp, 24] sdiv w0, w1, w0 str w0, [sp, 28] ldr w0, [sp, 28] ldp x29, x30, [sp], 32 .cfi_restore 30 .cfi_restore 29 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE1: .size main, .-main ```
### Human: Write a random program in ARM assembly### Assistant: ``` .text .global pfoo .section .data.rel.local,"aw" .align 3 .type pfoo, %object .size pfoo, 8 pfoo: .xword foo .text .align 2 .global foo .type foo, %function foo: .LFB0: .cfi_startproc sub sp, sp, #16 .cfi_def_cfa_offset 16 str x0, [sp, 8] ldr x0, [sp, 8] ldr w1, [x0] ldr x0, [sp, 8] ldr w0, [x0, 4] add w0, w1, w0 add sp, sp, 16 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE0: .size foo, .-foo ```
### Human: Write a random program in ARM assembly### Assistant: ``` .text .section .rodata .align 3 .LC0: .string "Failed stdcall: %08x" .align 3 .LC1: .string "Failed fastcall: %08x" .align 3 .LC2: .string "Failed cdecl: %08x" .align 3 .LC3: .string "Test Passed" .text .align 2 .global main .type main, %function main: .LFB0: .cfi_startproc stp x29, x30, [sp, -48]! .cfi_def_cfa_offset 48 .cfi_offset 29, -48 .cfi_offset 30, -40 mov x29, sp str w0, [sp, 28] str x1, [sp, 16] mov w1, 512 mov w0, 256 bl imstdcall str w0, [sp, 44] ldr w0, [sp, 44] cmp w0, 768 beq .L2 ldr w1, [sp, 44] adrp x0, .LC0 add x0, x0, :lo12:.LC0 bl printf mov w0, -1 b .L3 .L2: mov w1, 512 ldr w0, [sp, 44] bl imfastcall str w0, [sp, 44] ldr w0, [sp, 44] cmp w0, 1280 beq .L4 ldr w1, [sp, 44] adrp x0, .LC1 add x0, x0, :lo12:.LC1 bl printf mov w0, -2 b .L3 .L4: ldr w1, [sp, 44] mov w0, 512 bl imcdecl str w0, [sp, 44] ldr w0, [sp, 44] cmp w0, 1792 beq .L5 ldr w1, [sp, 44] adrp x0, .LC2 add x0, x0, :lo12:.LC2 bl printf mov w0, -3 b .L3 .L5: adrp x0, .LC3 add x0, x0, :lo12:.LC3 bl puts mov w0, 0 .L3: ldp x29, x30, [sp], 48 .cfi_restore 30 .cfi_restore 29 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE0: .size main, .-main ```
### Human: Write a random program in ARM assembly### Assistant: ``` .text .align 2 .global cmp .type cmp, %function cmp: .LFB6: .cfi_startproc sub sp, sp, #16 .cfi_def_cfa_offset 16 str x0, [sp, 8] str x1, [sp] ldr x0, [sp, 8] ldr w1, [x0] ldr x0, [sp] ldr w0, [x0] cmp w1, w0 bne .L2 ldr x0, [sp, 8] ldr w1, [x0, 4] ldr x0, [sp] ldr w0, [x0, 4] sub w0, w1, w0 b .L3 .L2: ldr x0, [sp, 8] ldr w1, [x0] ldr x0, [sp] ldr w0, [x0] sub w0, w1, w0 .L3: add sp, sp, 16 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE6: .size cmp, .-cmp .align 2 .global check .type check, %function check: .LFB7: .cfi_startproc sub sp, sp, #32 .cfi_def_cfa_offset 32 str x0, [sp, 8] str w1, [sp, 4] str w2, [sp] ldr w1, [sp] ldr w0, [sp, 4] cmp w1, w0 bne .L5 mov w0, 0 b .L6 .L5: ldrsw x0, [sp, 4] add x0, x0, 1 lsl x0, x0, 3 ldr x1, [sp, 8] add x0, x1, x0 ldr w1, [x0, 4] ldrsw x0, [sp, 4] lsl x0, x0, 3 ldr x2, [sp, 8] add x0, x2, x0 ldr w0, [x0, 4] sub w0, w1, w0 str w0, [sp, 28] ldr w0, [sp, 4] add w0, w0, 2 str w0, [sp, 24] b .L7 .L9: ldrsw x0, [sp, 24] lsl x0, x0, 3 ldr x1, [sp, 8] add x0, x1, x0 ldr w1, [x0, 4] ldrsw x0, [sp, 24] lsl x0, x0, 3 sub x0, x0, #8 ldr x2, [sp, 8] add x0, x2, x0 ldr w0, [x0, 4] sub w0, w1, w0 ldr w1, [sp, 28] cmp w1, w0 beq .L8 mov w0, -1 b .L6 .L8: ldr w0, [sp, 24] add w0, w0, 1 str w0, [sp, 24] .L7: ldr w1, [sp, 24] ldr w0, [sp] cmp w1, w0 ble .L9 ldr w0, [sp, 28] .L6: add sp, sp, 32 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE7: .size check, .-check .section .rodata .align 3 .LC0: .string "%d" .align 3 .LC1: .string "%d\n" .align 3 .LC2: .string "%d %d\n" .text .align 2 .global main .type main, %function main: .LFB8: .cfi_startproc sub x12, sp, #1572864 .cfi_def_cfa 12, 1572864 .LPSRL0: sub sp, sp, 65536 str xzr, [sp, 1024] cmp sp, x12 b.ne .LPSRL0 .cfi_def_cfa_register 31 mov x12, 27280 sub sp, sp, x12 .cfi_def_cfa_offset 1600144 stp x29, x30, [sp] .cfi_offset 29, -1600144 .cfi_offset 30, -1600136 mov x29, sp adrp x0, :got:__stack_chk_guard ldr x0, [x0, #:got_lo12:__stack_chk_guard] add x1, sp, 1589248 ldr x2, [x0] str x2, [x1, 10888] mov x2, 0 add x0, sp, 24 mov x1, x0 adrp x0, .LC0 add x0, x0, :lo12:.LC0 bl __isoc99_scanf str wzr, [sp, 28] b .L11 .L12: add x1, sp, 798720 add x1, x1, 1376 ldrsw x0, [sp, 28] lsl x0, x0, 3 add x0, x1, x0 mov x1, x0 adrp x0, .LC0 add x0, x0, :lo12:.LC0 bl __isoc99_scanf ldrsw x0, [sp, 28] lsl x0, x0, 3 add x1, sp, 798720 add x1, x1, 1380 ldr w2, [sp, 28] str w2, [x1, x0] ldr w0, [sp, 28] add w0, w0, 1 str w0, [sp, 28] .L11: ldr w0, [sp, 24] ldr w1, [sp, 28] cmp w1, w0 blt .L12 ldr w0, [sp, 24] sxtw x1, w0 add x4, sp, 798720 add x4, x4, 1376 adrp x0, cmp add x3, x0, :lo12:cmp mov x2, 8 mov x0, x4 bl qsort str wzr, [sp, 36] ldr w0, [sp, 36] str w0, [sp, 32] ldr w0, [sp, 32] str w0, [sp, 40] mov w0, 1 str w0, [sp, 28] b .L13 .L17: ldrsw x0, [sp, 28] lsl x0, x0, 3 add x1, sp, 798720 add x1, x1, 1376 ldr w1, [x1, x0] ldrsw x0, [sp, 32] lsl x0, x0, 3 add x2, sp, 798720 add x2, x2, 1376 ldr w0, [x2, x0] cmp w1, w0 bne .L14 ldr w0, [sp, 36] add w0, w0, 1 str w0, [sp, 36] b .L15 .L14: add x0, sp, 798720 add x0, x0, 1376 ldr w2, [sp, 36] ldr w1, [sp, 32] bl check str w0, [sp, 44] ldr w0, [sp, 44] cmp w0, 0 blt .L16 ldrsw x0, [sp, 32] lsl x0, x0, 3 add x1, sp, 798720 add x1, x1, 1376 ldr w2, [x1, x0] ldrsw x0, [sp, 40] lsl x0, x0, 2 add x1, sp, 48 str w2, [x1, x0] ldrsw x0, [sp, 40] lsl x0, x0, 2 add x1, sp, 397312 add x1, x1, 2760 ldr w2, [sp, 44] str w2, [x1, x0] ldr w0, [sp, 40] add w0, w0, 1 str w0, [sp, 40] .L16: ldr w0, [sp, 28] str w0, [sp, 36] ldr w0, [sp, 36] str w0, [sp, 32] .L15: ldr w0, [sp, 28] add w0, w0, 1 str w0, [sp, 28] .L13: ldr w0, [sp, 24] ldr w1, [sp, 28] cmp w1, w0 blt .L17 add x0, sp, 798720 add x0, x0, 1376 ldr w2, [sp, 36] ldr w1, [sp, 32] bl check str w0, [sp, 44] ldr w0, [sp, 44] cmp w0, 0 blt .L18 ldrsw x0, [sp, 32] lsl x0, x0, 3 add x1, sp, 798720 add x1, x1, 1376 ldr w2, [x1, x0] ldrsw x0, [sp, 40] lsl x0, x0, 2 add x1, sp, 48 str w2, [x1, x0] ldrsw x0, [sp, 40] lsl x0, x0, 2 add x1, sp, 397312 add x1, x1, 2760 ldr w2, [sp, 44] str w2, [x1, x0] ldr w0, [sp, 40] add w0, w0, 1 str w0, [sp, 40] .L18: ldr w1, [sp, 40] adrp x0, .LC1 add x0, x0, :lo12:.LC1 bl printf str wzr, [sp, 28] b .L19 .L20: ldrsw x0, [sp, 28] lsl x0, x0, 2 add x1, sp, 48 ldr w3, [x1, x0] ldrsw x0, [sp, 28] lsl x0, x0, 2 add x1, sp, 397312 add x1, x1, 2760 ldr w0, [x1, x0] mov w2, w0 mov w1, w3 adrp x0, .LC2 add x0, x0, :lo12:.LC2 bl printf ldr w0, [sp, 28] add w0, w0, 1 str w0, [sp, 28] .L19: ldr w1, [sp, 28] ldr w0, [sp, 40] cmp w1, w0 blt .L20 mov w0, 0 mov w1, w0 adrp x0, :got:__stack_chk_guard ldr x0, [x0, #:got_lo12:__stack_chk_guard] add x3, sp, 1589248 ldr x4, [x3, 10888] ldr x2, [x0] subs x4, x4, x2 mov x2, 0 beq .L22 bl __stack_chk_fail .L22: mov w0, w1 ldp x29, x30, [sp] .cfi_restore 29 .cfi_restore 30 add sp, sp, 2704 .cfi_def_cfa_offset 1597440 add sp, sp, 1597440 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE8: .size main, .-main ```
### Human: Write a random program in ARM assembly### Assistant: ``` .text .align 2 .global set_null .type set_null, %function set_null: .LFB6: .cfi_startproc sub sp, sp, #16 .cfi_def_cfa_offset 16 str x0, [sp, 8] ldr x0, [sp, 8] str xzr, [x0] nop add sp, sp, 16 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE6: .size set_null, .-set_null .align 2 .global segment_distance .type segment_distance, %function segment_distance: .LFB7: .cfi_startproc stp x29, x30, [sp, -48]! .cfi_def_cfa_offset 48 .cfi_offset 29, -48 .cfi_offset 30, -40 mov x29, sp stp x19, x20, [sp, 16] str d8, [sp, 32] .cfi_offset 19, -32 .cfi_offset 20, -24 .cfi_offset 72, -16 mov x20, x0 mov x19, x1 ldr d1, [x20] ldr d0, [x19] fsub d0, d1, d0 fmov d1, 2.0e+0 bl pow fmov d8, d0 ldr d1, [x20, 8] ldr d0, [x19, 8] fsub d0, d1, d0 fmov d1, 2.0e+0 bl pow fadd d0, d8, d0 bl sqrt ldr d8, [sp, 32] ldp x19, x20, [sp, 16] ldp x29, x30, [sp], 48 .cfi_restore 30 .cfi_restore 29 .cfi_restore 19 .cfi_restore 20 .cfi_restore 72 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE7: .size segment_distance, .-segment_distance .section .rodata .align 3 .LC0: .string "no reference to original vertex in polygonArray" .text .align 2 .global is_segment_inside .type is_segment_inside, %function is_segment_inside: .LFB8: .cfi_startproc stp x29, x30, [sp, -176]! .cfi_def_cfa_offset 176 .cfi_offset 29, -176 .cfi_offset 30, -168 mov x29, sp stp x19, x20, [sp, 16] .cfi_offset 19, -160 .cfi_offset 20, -152 mov x19, x0 mov x20, x1 str x2, [sp, 40] ldr x0, [x19, 40] cmp x0, 0 bne .L5 adrp x0, .LC0 add x0, x0, :lo12:.LC0 bl puts mov w0, 1 b .L9 .L5: ldr x0, [x19, 40] str x0, [sp, 48] ldr x0, [sp, 40] ldr w1, [x0, 16] ldr x0, [sp, 48] ldr w0, [x0, 16] sub w0, w1, w0 sxtw x0, w0 add x1, x0, 1 mov x0, x1 lsl x0, x0, 1 add x0, x0, x1 lsl x0, x0, 4 mov x1, x0 ldr x0, [sp, 40] add x1, x0, x1 add x0, sp, 80 ldp q0, q1, [x1] stp q0, q1, [x0] ldr q0, [x1, 32] str q0, [x0, 32] ldr x0, [sp, 40] ldr w1, [x0, 16] ldr x0, [sp, 48] ldr w0, [x0, 16] sub w0, w1, w0 sxtw x1, w0 mov x0, x1 lsl x0, x0, 1 add x0, x0, x1 lsl x0, x0, 4 sub x0, x0, #48 ldr x1, [sp, 40] add x1, x1, x0 add x0, sp, 128 ldp q0, q1, [x1] stp q0, q1, [x0] ldr q0, [x1, 32] str q0, [x0, 32] ldr d0, [x20, 24] adrp x0, .LC1 ldr d1, [x0, #:lo12:.LC1] fsub d0, d1, d0 str d0, [sp, 56] ldr d1, [sp, 104] ldr d0, [sp, 56] fadd d0, d1, d0 adrp x0, .LC2 ldr d1, [x0, #:lo12:.LC2] fadd d0, d0, d1 adrp x0, .LC1 ldr d1, [x0, #:lo12:.LC1] bl fmod str d0, [sp, 64] ldr d1, [sp, 152] ldr d0, [sp, 56] fadd d0, d1, d0 adrp x0, .LC2 ldr d1, [x0, #:lo12:.LC2] fadd d0, d0, d1 adrp x0, .LC1 ldr d1, [x0, #:lo12:.LC1] bl fmod str d0, [sp, 72] ldr d1, [sp, 64] ldr d0, [sp, 72] fsub d0, d1, d0 adrp x0, .LC3 ldr d1, [x0, #:lo12:.LC3] fcmpe d0, d1 bmi .L10 b .L11 .L10: mov w0, 1 b .L9 .L11: mov w0, 0 .L9: ldp x19, x20, [sp, 16] ldp x29, x30, [sp], 176 .cfi_restore 30 .cfi_restore 29 .cfi_restore 19 .cfi_restore 20 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE8: .size is_segment_inside, .-is_segment_inside .align 2 .global is_same_vertice .type is_same_vertice, %function is_same_vertice: .LFB9: .cfi_startproc stp x19, x20, [sp, -16]! .cfi_def_cfa_offset 16 .cfi_offset 19, -16 .cfi_offset 20, -8 mov x20, x0 mov x19, x1 ldr d1, [x20] ldr d0, [x19] fsub d0, d1, d0 fabs d0, d0 adrp x0, .LC4 ldr d1, [x0, #:lo12:.LC4] fcmpe d0, d1 bmi .L17 b .L13 .L17: ldr d1, [x20, 8] ldr d0, [x19, 8] fsub d0, d1, d0 fabs d0, d0 adrp x0, .LC4 ldr d1, [x0, #:lo12:.LC4] fcmpe d0, d1 bmi .L18 b .L13 .L18: mov w0, 1 b .L16 .L13: mov w0, 0 .L16: ldp x19, x20, [sp], 16 .cfi_restore 20 .cfi_restore 19 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE9: .size is_same_vertice, .-is_same_vertice .align 2 .global polar_angle .type polar_angle, %function polar_angle: .LFB10: .cfi_startproc stp x29, x30, [sp, -80]! .cfi_def_cfa_offset 80 .cfi_offset 29, -80 .cfi_offset 30, -72 mov x29, sp str d0, [sp, 40] str d1, [sp, 32] str d2, [sp, 24] str d3, [sp, 16] ldr d1, [sp, 16] ldr d0, [sp, 32] fsub d0, d1, d0 str d0, [sp, 56] ldr d1, [sp, 24] ldr d0, [sp, 40] fsub d0, d1, d0 str d0, [sp, 64] ldr d1, [sp, 64] ldr d0, [sp, 56] bl atan2 str d0, [sp, 72] ldr d0, [sp, 72] ldp x29, x30, [sp], 80 .cfi_restore 30 .cfi_restore 29 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE10: .size polar_angle, .-polar_angle .section .rodata .align 3 .LC5: .string "| %f %f |" .align 3 .LC6: .string "" .text .align 2 .global print_polygon .type print_polygon, %function print_polygon: .LFB11: .cfi_startproc stp x29, x30, [sp, -48]! .cfi_def_cfa_offset 48 .cfi_offset 29, -48 .cfi_offset 30, -40 mov x29, sp str x0, [sp, 24] str wzr, [sp, 44] b .L22 .L23: ldrsw x1, [sp, 44] mov x0, x1 lsl x0, x0, 1 add x0, x0, x1 lsl x0, x0, 4 mov x1, x0 ldr x0, [sp, 24] add x0, x0, x1 ldr d0, [x0] ldrsw x1, [sp, 44] mov x0, x1 lsl x0, x0, 1 add x0, x0, x1 lsl x0, x0, 4 mov x1, x0 ldr x0, [sp, 24] add x0, x0, x1 ldr d1, [x0, 8] adrp x0, .LC5 add x0, x0, :lo12:.LC5 bl printf ldr w0, [sp, 44] add w0, w0, 1 str w0, [sp, 44] .L22: ldr x0, [sp, 24] ldr w0, [x0, 16] ldr w1, [sp, 44] cmp w1, w0 blt .L23 adrp x0, .LC6 add x0, x0, :lo12:.LC6 bl puts nop ldp x29, x30, [sp], 48 .cfi_restore 30 .cfi_restore 29 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE11: .size print_polygon, .-print_polygon .align 2 .global md_comparator .type md_comparator, %function md_comparator: .LFB12: .cfi_startproc sub sp, sp, #32 .cfi_def_cfa_offset 32 str x0, [sp, 8] str x1, [sp] ldr x0, [sp, 8] str x0, [sp, 16] ldr x0, [sp] str x0, [sp, 24] ldr x0, [sp, 16] ldr d1, [x0, 24] ldr x0, [sp, 24] ldr d0, [x0, 24] fsub d0, d1, d0 adrp x0, .LC3 ldr d1, [x0, #:lo12:.LC3] fcmpe d0, d1 bmi .L32 b .L34 .L32: mov w0, -1 b .L27 .L34: ldr x0, [sp, 16] ldr d1, [x0, 24] ldr x0, [sp, 24] ldr d0, [x0, 24] fsub d0, d1, d0 adrp x0, .LC4 ldr d1, [x0, #:lo12:.LC4] fcmpe d0, d1 bgt .L33 b .L35 .L33: mov w0, 1 b .L27 .L35: ldr x0, [sp, 16] ldr w1, [x0, 16] ldr x0, [sp, 24] ldr w0, [x0, 16] cmp w1, w0 ble .L30 mov w0, -1 b .L27 .L30: ldr x0, [sp, 16] ldr w1, [x0, 16] ldr x0, [sp, 24] ldr w0, [x0, 16] cmp w1, w0 bge .L31 mov w0, 1 b .L27 .L31: mov w0, 0 .L27: add sp, sp, 32 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE12: .size md_comparator, .-md_comparator .align 2 .global get_line_intersection .type get_line_intersection, %function get_line_intersection: .LFB13: .cfi_startproc sub sp, sp, #176 .cfi_def_cfa_offset 176 str d0, [sp, 72] str d1, [sp, 64] str d2, [sp, 56] str d3, [sp, 48] str d4, [sp, 40] str d5, [sp, 32] str d6, [sp, 24] str d7, [sp, 16] str x0, [sp, 8] str x1, [sp] ldr d1, [sp, 72] ldr d0, [sp, 40] fsub d0, d1, d0 fabs d1, d0 ldr d2, [sp, 64] ldr d0, [sp, 32] fsub d0, d2, d0 fabs d0, d0 fadd d0, d1, d0 str d0, [sp, 80] ldr d1, [sp, 72] ldr d0, [sp, 24] fsub d0, d1, d0 fabs d1, d0 ldr d2, [sp, 64] ldr d0, [sp, 16] fsub d0, d2, d0 fabs d0, d0 fadd d0, d1, d0 str d0, [sp, 88] ldr d1, [sp, 56] ldr d0, [sp, 40] fsub d0, d1, d0 fabs d1, d0 ldr d2, [sp, 48] ldr d0, [sp, 32] fsub d0, d2, d0 fabs d0, d0 fadd d0, d1, d0 str d0, [sp, 96] ldr d1, [sp, 56] ldr d0, [sp, 24] fsub d0, d1, d0 fabs d1, d0 ldr d2, [sp, 48] ldr d0, [sp, 16] fsub d0, d2, d0 fabs d0, d0 fadd d0, d1, d0 str d0, [sp, 104] ldr d0, [sp, 80] adrp x0, .LC7 ldr d1, [x0, #:lo12:.LC7] fcmpe d0, d1 bmi .L37 ldr d0, [sp, 88] adrp x0, .LC7 ldr d1, [x0, #:lo12:.LC7] fcmpe d0, d1 bmi .L37 b .L79 .L37: ldr x0, [sp, 8] cmp x0, 0 beq .L40 ldr x0, [sp, 8] ldr d0, [sp, 72] str d0, [x0] .L40: ldr x0, [sp] cmp x0, 0 beq .L41 ldr x0, [sp] ldr d0, [sp, 64] str d0, [x0] .L41: mov w0, -1 b .L42 .L79: ldr d0, [sp, 96] adrp x0, .LC7 ldr d1, [x0, #:lo12:.LC7] fcmpe d0, d1 bmi .L43 ldr d0, [sp, 104] adrp x0, .LC7 ldr d1, [x0, #:lo12:.LC7] fcmpe d0, d1 bmi .L43 b .L80 .L43: ldr x0, [sp, 8] cmp x0, 0 beq .L46 ldr x0, [sp, 8] ldr d0, [sp, 56] str d0, [x0] .L46: ldr x0, [sp] cmp x0, 0 beq .L47 ldr x0, [sp] ldr d0, [sp, 48] str d0, [x0] .L47: mov w0, -1 b .L42 .L80: ldr d1, [sp, 56] ldr d0, [sp, 72] fsub d0, d1, d0 str d0, [sp, 112] ldr d1, [sp, 48] ldr d0, [sp, 64] fsub d0, d1, d0 str d0, [sp, 120] ldr d1, [sp, 24] ldr d0, [sp, 40] fsub d0, d1, d0 str d0, [sp, 128] ldr d1, [sp, 16] ldr d0, [sp, 32] fsub d0, d1, d0 str d0, [sp, 136] ldr d0, [sp, 120] fneg d1, d0 ldr d2, [sp, 72] ldr d0, [sp, 40] fsub d0, d2, d0 fmul d1, d1, d0 ldr d2, [sp, 64] ldr d0, [sp, 32] fsub d2, d2, d0 ldr d0, [sp, 112] fmul d0, d2, d0 fadd d1, d1, d0 ldr d0, [sp, 128] fneg d2, d0 ldr d0, [sp, 120] fmul d2, d2, d0 ldr d3, [sp, 112] ldr d0, [sp, 136] fmul d0, d3, d0 fadd d0, d2, d0 fdiv d0, d1, d0 str d0, [sp, 144] ldr d1, [sp, 64] ldr d0, [sp, 32] fsub d1, d1, d0 ldr d0, [sp, 128] fmul d1, d1, d0 ldr d2, [sp, 72] ldr d0, [sp, 40] fsub d2, d2, d0 ldr d0, [sp, 136] fmul d0, d2, d0 fsub d1, d1, d0 ldr d0, [sp, 128] fneg d2, d0 ldr d0, [sp, 120] fmul d2, d2, d0 ldr d3, [sp, 112] ldr d0, [sp, 136] fmul d0, d3, d0 fadd d0, d2, d0 fdiv d0, d1, d0 str d0, [sp, 152] ldr d0, [sp, 144] fcmpe d0, #0.0 bge .L67 b .L48 .L67: ldr d1, [sp, 144] fmov d0, 1.0e+0 fcmpe d1, d0 bls .L68 b .L48 .L68: ldr d0, [sp, 152] fcmpe d0, #0.0 bge .L69 b .L48 .L69: ldr d1, [sp, 152] fmov d0, 1.0e+0 fcmpe d1, d0 bls .L70 b .L48 .L70: ldr d1, [sp, 152] ldr d0, [sp, 112] fmul d0, d1, d0 ldr d1, [sp, 72] fadd d0, d1, d0 str d0, [sp, 160] ldr d1, [sp, 152] ldr d0, [sp, 120] fmul d0, d1, d0 ldr d1, [sp, 64] fadd d0, d1, d0 str d0, [sp, 168] ldr x0, [sp, 8] cmp x0, 0 beq .L53 ldr x0, [sp, 8] ldr d0, [sp, 160] str d0, [x0] .L53: ldr x0, [sp] cmp x0, 0 beq .L54 ldr x0, [sp] ldr d0, [sp, 168] str d0, [x0] .L54: ldr d1, [sp, 160] ldr d0, [sp, 72] fsub d0, d1, d0 fabs d0, d0 adrp x0, .LC4 ldr d1, [x0, #:lo12:.LC4] fcmpe d0, d1 bmi .L71 b .L55 .L71: ldr d1, [sp, 168] ldr d0, [sp, 64] fsub d0, d1, d0 fabs d0, d0 adrp x0, .LC4 ldr d1, [x0, #:lo12:.LC4] fcmpe d0, d1 bmi .L72 b .L55 .L72: mov w0, -1 b .L42 .L55: ldr d1, [sp, 160] ldr d0, [sp, 56] fsub d0, d1, d0 fabs d0, d0 adrp x0, .LC4 ldr d1, [x0, #:lo12:.LC4] fcmpe d0, d1 bmi .L73 b .L58 .L73: ldr d1, [sp, 168] ldr d0, [sp, 48] fsub d0, d1, d0 fabs d0, d0 adrp x0, .LC4 ldr d1, [x0, #:lo12:.LC4] fcmpe d0, d1 bmi .L74 b .L58 .L74: mov w0, -1 b .L42 .L58: ldr d1, [sp, 160] ldr d0, [sp, 40] fsub d0, d1, d0 fabs d0, d0 adrp x0, .LC4 ldr d1, [x0, #:lo12:.LC4] fcmpe d0, d1 bmi .L75 b .L61 .L75: ldr d1, [sp, 168] ldr d0, [sp, 32] fsub d0, d1, d0 fabs d0, d0 adrp x0, .LC4 ldr d1, [x0, #:lo12:.LC4] fcmpe d0, d1 bmi .L76 b .L61 .L76: mov w0, -1 b .L42 .L61: ldr d1, [sp, 160] ldr d0, [sp, 24] fsub d0, d1, d0 fabs d0, d0 adrp x0, .LC4 ldr d1, [x0, #:lo12:.LC4] fcmpe d0, d1 bmi .L77 b .L64 .L77: ldr d1, [sp, 168] ldr d0, [sp, 16] fsub d0, d1, d0 fabs d0, d0 adrp x0, .LC4 ldr d1, [x0, #:lo12:.LC4] fcmpe d0, d1 bmi .L78 b .L64 .L78: mov w0, -1 b .L42 .L64: mov w0, 1 b .L42 .L48: mov w0, 0 .L42: add sp, sp, 176 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE13: .size get_line_intersection, .-get_line_intersection .align 2 .global is_inside .type is_inside, %function is_inside: .LFB14: .cfi_startproc stp x29, x30, [sp, -272]! .cfi_def_cfa_offset 272 .cfi_offset 29, -272 .cfi_offset 30, -264 mov x29, sp str d8, [sp, 16] .cfi_offset 72, -256 str x0, [sp, 136] str x1, [sp, 128] adrp x0, :got:__stack_chk_guard ldr x0, [x0, #:got_lo12:__stack_chk_guard] ldr x1, [x0] str x1, [sp, 264] mov x1, 0 str wzr, [sp, 148] ldr x0, [sp, 128] ldr w0, [x0, 16] str w0, [sp, 156] mov w0, 1 str w0, [sp, 152] b .L82 .L106: ldrsw x1, [sp, 152] mov x0, x1 lsl x0, x0, 1 add x0, x0, x1 lsl x0, x0, 4 sub x0, x0, #48 ldr x1, [sp, 128] add x1, x1, x0 add x0, sp, 168 ldp q0, q1, [x1] stp q0, q1, [x0] ldr q0, [x1, 32] str q0, [x0, 32] ldr w0, [sp, 152] ldr w1, [sp, 156] sdiv w2, w0, w1 ldr w1, [sp, 156] mul w1, w2, w1 sub w0, w0, w1 sxtw x1, w0 mov x0, x1 lsl x0, x0, 1 add x0, x0, x1 lsl x0, x0, 4 mov x1, x0 ldr x0, [sp, 128] add x1, x0, x1 add x0, sp, 216 ldp q0, q1, [x1] stp q0, q1, [x0] ldr q0, [x1, 32] str q0, [x0, 32] ldr x1, [sp, 136] add x0, sp, 80 ldp q0, q1, [x1] stp q0, q1, [x0] ldr q0, [x1, 32] str q0, [x0, 32] add x0, sp, 32 add x1, sp, 168 ldp q0, q1, [x1] stp q0, q1, [x0] ldr q0, [x1, 32] str q0, [x0, 32] add x1, sp, 32 add x0, sp, 80 bl is_same_vertice cmp w0, 1 bne .L83 ldr x0, [sp, 136] add x1, sp, 168 str x1, [x0, 40] mov w0, -1 b .L105 .L83: ldr x1, [sp, 136] add x0, sp, 32 ldp q0, q1, [x1] stp q0, q1, [x0] ldr q0, [x1, 32] str q0, [x0, 32] add x0, sp, 80 add x1, sp, 216 ldp q0, q1, [x1] stp q0, q1, [x0] ldr q0, [x1, 32] str q0, [x0, 32] add x1, sp, 80 add x0, sp, 32 bl is_same_vertice cmp w0, 0 beq .L85 add x0, sp, 168 add x1, sp, 216 ldp q0, q1, [x1] stp q0, q1, [x0] ldr q0, [x1, 32] str q0, [x0, 32] b .L86 .L85: add x0, sp, 32 add x1, sp, 168 ldp q0, q1, [x1] stp q0, q1, [x0] ldr q0, [x1, 32] str q0, [x0, 32] ldr x1, [sp, 136] add x0, sp, 80 ldp q0, q1, [x1] stp q0, q1, [x0] ldr q0, [x1, 32] str q0, [x0, 32] add x1, sp, 80 add x0, sp, 32 bl segment_distance fmov d8, d0 ldr x1, [sp, 136] add x0, sp, 32 ldp q0, q1, [x1] stp q0, q1, [x0] ldr q0, [x1, 32] str q0, [x0, 32] add x0, sp, 80 add x1, sp, 216 ldp q0, q1, [x1] stp q0, q1, [x0] ldr q0, [x1, 32] str q0, [x0, 32] add x1, sp, 80 add x0, sp, 32 bl segment_distance fadd d8, d8, d0 add x0, sp, 32 add x1, sp, 168 ldp q0, q1, [x1] stp q0, q1, [x0] ldr q0, [x1, 32] str q0, [x0, 32] add x0, sp, 80 add x1, sp, 216 ldp q0, q1, [x1] stp q0, q1, [x0] ldr q0, [x1, 32] str q0, [x0, 32] add x1, sp, 80 add x0, sp, 32 bl segment_distance adrp x0, .LC4 ldr d1, [x0, #:lo12:.LC4] fadd d0, d0, d1 fcmpe d8, d0 bls .L109 b .L117 .L109: ldr x0, [sp, 136] str xzr, [x0, 40] mov w0, 0 b .L105 .L117: ldr x0, [sp, 136] ldr d1, [x0, 8] ldr d2, [sp, 176] ldr d0, [sp, 224] fcmpe d2, d0 bmi .L110 b .L118 .L110: ldr d0, [sp, 176] b .L91 .L118: ldr d0, [sp, 224] .L91: adrp x0, .LC4 ldr d2, [x0, #:lo12:.LC4] fsub d0, d0, d2 fcmpe d1, d0 bgt .L111 b .L92 .L111: ldr x0, [sp, 136] ldr d1, [x0, 8] ldr d2, [sp, 176] ldr d0, [sp, 224] fcmpe d2, d0 bgt .L112 b .L119 .L112: ldr d0, [sp, 176] b .L96 .L119: ldr d0, [sp, 224] .L96: adrp x0, .LC4 ldr d2, [x0, #:lo12:.LC4] fadd d0, d0, d2 fcmpe d1, d0 bls .L113 b .L92 .L113: ldr x0, [sp, 136] ldr d1, [x0] ldr d2, [sp, 168] ldr d0, [sp, 216] fcmpe d2, d0 bgt .L114 b .L120 .L114: ldr d0, [sp, 168] b .L100 .L120: ldr d0, [sp, 216] .L100: adrp x0, .LC4 ldr d2, [x0, #:lo12:.LC4] fadd d0, d0, d2 fcmpe d1, d0 bls .L115 b .L92 .L115: ldr d1, [sp, 176] ldr d0, [sp, 224] fsub d0, d1, d0 fabs d0, d0 adrp x0, .LC4 ldr d1, [x0, #:lo12:.LC4] fcmpe d0, d1 bmi .L116 b .L92 .L116: ldr x0, [sp, 136] ldr d1, [x0, 8] ldr d0, [sp, 176] fsub d1, d1, d0 ldr d2, [sp, 216] ldr d0, [sp, 168] fsub d0, d2, d0 fmul d1, d1, d0 ldr d2, [sp, 224] ldr d0, [sp, 176] fsub d0, d2, d0 fdiv d1, d1, d0 ldr d0, [sp, 168] fadd d0, d1, d0 str d0, [sp, 160] ldr d1, [sp, 168] ldr d0, [sp, 216] fcmp d1, d0 beq .L103 ldr x0, [sp, 136] ldr d0, [x0] ldr d1, [sp, 160] fcmpe d1, d0 bge .L103 b .L92 .L103: ldr w0, [sp, 148] add w0, w0, 1 str w0, [sp, 148] .L92: add x0, sp, 168 add x1, sp, 216 ldp q0, q1, [x1] stp q0, q1, [x0] ldr q0, [x1, 32] str q0, [x0, 32] .L86: ldr w0, [sp, 152] add w0, w0, 1 str w0, [sp, 152] .L82: ldr w1, [sp, 152] ldr w0, [sp, 156] cmp w1, w0 ble .L106 ldr w0, [sp, 148] and w0, w0, 1 cmp w0, 0 bne .L107 ldr x0, [sp, 136] str xzr, [x0, 40] mov w0, 1 b .L105 .L107: ldr x0, [sp, 136] str xzr, [x0, 40] mov w0, 0 .L105: mov w1, w0 adrp x0, :got:__stack_chk_guard ldr x0, [x0, #:got_lo12:__stack_chk_guard] ldr x3, [sp, 264] ldr x2, [x0] subs x3, x3, x2 mov x2, 0 beq .L108 bl __stack_chk_fail .L108: mov w0, w1 ldr d8, [sp, 16] ldp x29, x30, [sp], 272 .cfi_restore 30 .cfi_restore 29 .cfi_restore 72 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE14: .size is_inside, .-is_inside .align 2 .global parse .type parse, %function parse: .LFB15: .cfi_startproc stp x29, x30, [sp, -288]! .cfi_def_cfa_offset 288 .cfi_offset 29, -288 .cfi_offset 30, -280 mov x29, sp str x0, [sp, 24] adrp x0, :got:__stack_chk_guard ldr x0, [x0, #:got_lo12:__stack_chk_guard] ldr x1, [x0] str x1, [sp, 280] mov x1, 0 str wzr, [sp, 40] str wzr, [sp, 44] b .L122 .L124: ldrsw x0, [sp, 44] ldr x1, [sp, 24] add x0, x1, x0 ldrb w0, [x0] cmp w0, 40 bne .L123 ldr w0, [sp, 40] add w0, w0, 1 str w0, [sp, 40] .L123: ldr w0, [sp, 44] add w0, w0, 1 str w0, [sp, 44] .L122: ldrsw x0, [sp, 44] ldr x1, [sp, 24] add x0, x1, x0 ldrb w0, [x0] cmp w0, 0 bne .L124 ldr w0, [sp, 40] add w0, w0, 1 sxtw x0, w0 mov x1, 48 bl calloc str x0, [sp, 56] str wzr, [sp, 48] str wzr, [sp, 44] b .L125 .L136: stp xzr, xzr, [sp, 72] add x0, sp, 88 movi v0.4s, 0 stp q0, q0, [x0] stp q0, q0, [x0, 32] str q0, [x0, 64] fmov w1, s0 str w1, [x0, 80] b .L126 .L128: ldr w0, [sp, 48] add w0, w0, 1 str w0, [sp, 48] .L126: bl __ctype_b_loc ldr x1, [x0] ldrsw x0, [sp, 48] ldr x2, [sp, 24] add x0, x2, x0 ldrb w0, [x0] and x0, x0, 255 lsl x0, x0, 1 add x0, x1, x0 ldrh w0, [x0] and w0, w0, 2048 cmp w0, 0 bne .L127 ldrsw x0, [sp, 48] ldr x1, [sp, 24] add x0, x1, x0 ldrb w0, [x0] cmp w0, 45 bne .L128 .L127: ldr w0, [sp, 48] str w0, [sp, 52] b .L129 .L130: ldrsw x0, [sp, 48] ldr x1, [sp, 24] add x0, x1, x0 ldr w2, [sp, 48] ldr w1, [sp, 52] sub w1, w2, w1 ldrb w2, [x0] sxtw x0, w1 add x1, sp, 72 strb w2, [x1, x0] ldr w0, [sp, 48] add w0, w0, 1 str w0, [sp, 48] .L129: ldrsw x0, [sp, 48] ldr x1, [sp, 24] add x0, x1, x0 ldrb w0, [x0] cmp w0, 44 bne .L130 b .L131 .L133: ldr w0, [sp, 48] add w0, w0, 1 str w0, [sp, 48] .L131: bl __ctype_b_loc ldr x1, [x0] ldrsw x0, [sp, 48] ldr x2, [sp, 24] add x0, x2, x0 ldrb w0, [x0] and x0, x0, 255 lsl x0, x0, 1 add x0, x1, x0 ldrh w0, [x0] and w0, w0, 2048 cmp w0, 0 bne .L132 ldrsw x0, [sp, 48] ldr x1, [sp, 24] add x0, x1, x0 ldrb w0, [x0] cmp w0, 45 bne .L133 .L132: stp xzr, xzr, [sp, 176] add x0, sp, 192 movi v0.4s, 0 stp q0, q0, [x0] stp q0, q0, [x0, 32] str q0, [x0, 64] fmov w1, s0 str w1, [x0, 80] ldr w0, [sp, 48] str w0, [sp, 52] b .L134 .L135: ldrsw x0, [sp, 48] ldr x1, [sp, 24] add x0, x1, x0 ldr w2, [sp, 48] ldr w1, [sp, 52] sub w1, w2, w1 ldrb w2, [x0] sxtw x0, w1 add x1, sp, 176 strb w2, [x1, x0] ldr w0, [sp, 48] add w0, w0, 1 str w0, [sp, 48] .L134: ldrsw x0, [sp, 48] ldr x1, [sp, 24] add x0, x1, x0 ldrb w0, [x0] cmp w0, 41 bne .L135 mov x0, 48 bl malloc str x0, [sp, 64] add x0, sp, 72 bl atof ldr x0, [sp, 64] str d0, [x0] add x0, sp, 176 bl atof ldr x0, [sp, 64] str d0, [x0, 8] ldr w1, [sp, 40] ldr w0, [sp, 44] sub w1, w1, w0 ldr x0, [sp, 64] str w1, [x0, 16] ldr x0, [sp, 64] str wzr, [x0, 36] ldrsw x1, [sp, 44] mov x0, x1 lsl x0, x0, 1 add x0, x0, x1 lsl x0, x0, 4 mov x1, x0 ldr x0, [sp, 56] add x0, x0, x1 ldr x1, [sp, 64] ldp q0, q1, [x1] stp q0, q1, [x0] ldr q0, [x1, 32] str q0, [x0, 32] ldr w0, [sp, 44] add w0, w0, 1 str w0, [sp, 44] .L125: ldr w1, [sp, 44] ldr w0, [sp, 40] cmp w1, w0 blt .L136 ldr x0, [sp, 24] bl free ldrsw x1, [sp, 40] mov x0, x1 lsl x0, x0, 1 add x0, x0, x1 lsl x0, x0, 4 mov x1, x0 ldr x0, [sp, 56] add x0, x0, x1 str xzr, [x0] ldrsw x1, [sp, 40] mov x0, x1 lsl x0, x0, 1 add x0, x0, x1 lsl x0, x0, 4 mov x1, x0 ldr x0, [sp, 56] add x0, x0, x1 str xzr, [x0, 8] ldrsw x1, [sp, 40] mov x0, x1 lsl x0, x0, 1 add x0, x0, x1 lsl x0, x0, 4 mov x1, x0 ldr x0, [sp, 56] add x0, x0, x1 str wzr, [x0, 16] ldrsw x1, [sp, 40] mov x0, x1 lsl x0, x0, 1 add x0, x0, x1 lsl x0, x0, 4 mov x1, x0 ldr x0, [sp, 56] add x0, x0, x1 str wzr, [x0, 36] ldr x0, [sp, 56] mov x1, x0 adrp x0, :got:__stack_chk_guard ldr x0, [x0, #:got_lo12:__stack_chk_guard] ldr x3, [sp, 280] ldr x2, [x0] subs x3, x3, x2 mov x2, 0 beq .L138 bl __stack_chk_fail .L138: mov x0, x1 ldp x29, x30, [sp], 288 .cfi_restore 30 .cfi_restore 29 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE15: .size parse, .-parse .align 2 .global copy_vertice_array .type copy_vertice_array, %function copy_vertice_array: .LFB16: .cfi_startproc stp x29, x30, [sp, -48]! .cfi_def_cfa_offset 48 .cfi_offset 29, -48 .cfi_offset 30, -40 mov x29, sp str x0, [sp, 24] str x1, [sp, 16] str wzr, [sp, 36] b .L140 .L141: mov x0, 48 bl malloc str x0, [sp, 40] ldrsw x1, [sp, 36] mov x0, x1 lsl x0, x0, 1 add x0, x0, x1 lsl x0, x0, 4 mov x1, x0 ldr x0, [sp, 16] add x0, x0, x1 ldr d0, [x0] ldr x0, [sp, 40] str d0, [x0] ldrsw x1, [sp, 36] mov x0, x1 lsl x0, x0, 1 add x0, x0, x1 lsl x0, x0, 4 mov x1, x0 ldr x0, [sp, 16] add x0, x0, x1 ldr d0, [x0, 8] ldr x0, [sp, 40] str d0, [x0, 8] ldrsw x1, [sp, 36] mov x0, x1 lsl x0, x0, 1 add x0, x0, x1 lsl x0, x0, 4 mov x1, x0 ldr x0, [sp, 16] add x0, x0, x1 ldr w1, [x0, 16] ldr x0, [sp, 40] str w1, [x0, 16] ldrsw x1, [sp, 36] mov x0, x1 lsl x0, x0, 1 add x0, x0, x1 lsl x0, x0, 4 mov x1, x0 ldr x0, [sp, 16] add x0, x0, x1 ldr d0, [x0, 24] ldr x0, [sp, 40] str d0, [x0, 24] ldrsw x1, [sp, 36] mov x0, x1 lsl x0, x0, 1 add x0, x0, x1 lsl x0, x0, 4 mov x1, x0 ldr x0, [sp, 16] add x0, x0, x1 ldr w1, [x0, 32] ldr x0, [sp, 40] str w1, [x0, 32] ldrsw x1, [sp, 36] mov x0, x1 lsl x0, x0, 1 add x0, x0, x1 lsl x0, x0, 4 mov x1, x0 ldr x0, [sp, 16] add x0, x0, x1 ldr w1, [x0, 36] ldr x0, [sp, 40] str w1, [x0, 36] ldrsw x1, [sp, 36] mov x0, x1 lsl x0, x0, 1 add x0, x0, x1 lsl x0, x0, 4 mov x1, x0 ldr x0, [sp, 16] add x0, x0, x1 ldr x1, [x0, 40] ldr x0, [sp, 40] str x1, [x0, 40] ldrsw x1, [sp, 36] mov x0, x1 lsl x0, x0, 1 add x0, x0, x1 lsl x0, x0, 4 mov x1, x0 ldr x0, [sp, 24] add x0, x0, x1 ldr x1, [sp, 40] ldp q0, q1, [x1] stp q0, q1, [x0] ldr q0, [x1, 32] str q0, [x0, 32] ldr w0, [sp, 36] add w0, w0, 1 str w0, [sp, 36] .L140: ldr x0, [sp, 16] ldr w0, [x0, 16] ldr w1, [sp, 36] cmp w1, w0 blt .L141 nop nop ldp x29, x30, [sp], 48 .cfi_restore 30 .cfi_restore 29 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE16: .size copy_vertice_array, .-copy_vertice_array .section .rodata .align 3 .LC8: .string "r" .align 3 .LC9: .string "check.pol" .align 3 .LC10: .string "test2: %f | %f \n" .align 3 .LC11: .string "guards: %d \n" .text .align 2 .global main .type main, %function main: .LFB17: .cfi_startproc sub sp, sp, #512 .cfi_def_cfa_offset 512 stp x29, x30, [sp] .cfi_offset 29, -512 .cfi_offset 30, -504 mov x29, sp str d8, [sp, 16] .cfi_offset 72, -496 adrp x0, :got:__stack_chk_guard ldr x0, [x0, #:got_lo12:__stack_chk_guard] ldr x1, [x0] str x1, [sp, 504] mov x1, 0 adrp x0, .LC8 add x1, x0, :lo12:.LC8 adrp x0, .LC9 add x0, x0, :lo12:.LC9 bl fopen str x0, [sp, 248] str wzr, [sp, 140] b .L143 .L181: mov x1, 1 mov x0, 30000 bl calloc str x0, [sp, 256] ldr x2, [sp, 248] mov w1, 30000 ldr x0, [sp, 256] bl fgets str wzr, [sp, 144] b .L144 .L145: ldr w0, [sp, 144] add w0, w0, 1 str w0, [sp, 144] .L144: ldrsw x0, [sp, 144] ldr x1, [sp, 256] add x0, x1, x0 ldrb w0, [x0] cmp w0, 40 bne .L145 mov x1, 1 mov x0, 20000 bl calloc str x0, [sp, 264] ldr w0, [sp, 144] str w0, [sp, 176] b .L146 .L147: ldrsw x0, [sp, 144] ldr x1, [sp, 256] add x1, x1, x0 ldr w2, [sp, 144] ldr w0, [sp, 176] sub w0, w2, w0 sxtw x0, w0 ldr x2, [sp, 264] add x0, x2, x0 ldrb w1, [x1] strb w1, [x0] ldr w0, [sp, 144] add w0, w0, 1 str w0, [sp, 144] .L146: ldrsw x0, [sp, 144] ldr x1, [sp, 256] add x0, x1, x0 ldrb w0, [x0] cmp w0, 59 bne .L147 ldr w1, [sp, 144] ldr w0, [sp, 176] sub w0, w1, w0 sxtw x0, w0 ldr x1, [sp, 264] add x0, x1, x0 strb wzr, [x0] b .L148 .L149: ldr w0, [sp, 144] add w0, w0, 1 str w0, [sp, 144] .L148: ldrsw x0, [sp, 144] ldr x1, [sp, 256] add x0, x1, x0 ldrb w0, [x0] cmp w0, 40 bne .L149 ldr w0, [sp, 144] str w0, [sp, 176] mov x1, 1 mov x0, 10000 bl calloc str x0, [sp, 272] b .L150 .L152: ldrsw x0, [sp, 144] ldr x1, [sp, 256] add x1, x1, x0 ldr w2, [sp, 144] ldr w0, [sp, 176] sub w0, w2, w0 sxtw x0, w0 ldr x2, [sp, 272] add x0, x2, x0 ldrb w1, [x1] strb w1, [x0] ldr w0, [sp, 144] add w0, w0, 1 str w0, [sp, 144] .L150: ldrsw x0, [sp, 144] ldr x1, [sp, 256] add x0, x1, x0 ldrb w0, [x0] cmp w0, 10 beq .L151 ldrsw x0, [sp, 144] ldr x1, [sp, 256] add x0, x1, x0 ldrb w0, [x0] cmp w0, 0 bne .L152 .L151: ldr w1, [sp, 144] ldr w0, [sp, 176] sub w0, w1, w0 sxtw x0, w0 ldr x1, [sp, 272] add x0, x1, x0 strb wzr, [x0] ldr x0, [sp, 256] bl free ldr x0, [sp, 264] bl parse str x0, [sp, 280] ldr x0, [sp, 272] bl parse str x0, [sp, 288] str wzr, [sp, 148] b .L153 .L154: ldrsw x1, [sp, 148] mov x0, x1 lsl x0, x0, 1 add x0, x0, x1 lsl x0, x0, 4 mov x1, x0 ldr x0, [sp, 288] add x0, x0, x1 ldr x1, [sp, 280] bl is_inside ldr w0, [sp, 148] add w0, w0, 1 str w0, [sp, 148] .L153: ldr x0, [sp, 288] ldr w0, [x0, 16] ldr w1, [sp, 148] cmp w1, w0 blt .L154 ldr x0, [sp, 288] str x0, [sp, 296] ldr x0, [sp, 296] ldr x0, [x0, 40] ldr d0, [x0] ldr x0, [sp, 296] ldr x0, [x0, 40] ldr d1, [x0, 8] adrp x0, .LC10 add x0, x0, :lo12:.LC10 bl printf mov x0, 40 bl malloc str x0, [sp, 304] ldr x0, [sp, 304] str xzr, [x0] ldr x0, [sp, 304] str xzr, [x0, 8] ldr x0, [sp, 304] ldr x1, [sp, 280] str x1, [x0, 16] ldr x0, [sp, 280] add x1, x0, 48 ldr x0, [sp, 304] str x1, [x0, 24] ldr x0, [sp, 304] str wzr, [x0, 32] ldr x0, [sp, 304] str x0, [sp, 200] mov w0, 1 str w0, [sp, 152] b .L155 .L156: mov x0, 40 bl malloc str x0, [sp, 400] ldrsw x1, [sp, 152] mov x0, x1 lsl x0, x0, 1 add x0, x0, x1 lsl x0, x0, 4 mov x1, x0 ldr x0, [sp, 280] add x1, x0, x1 ldr x0, [sp, 400] str x1, [x0, 16] ldrsw x0, [sp, 152] add x1, x0, 1 mov x0, x1 lsl x0, x0, 1 add x0, x0, x1 lsl x0, x0, 4 mov x1, x0 ldr x0, [sp, 280] add x1, x0, x1 ldr x0, [sp, 400] str x1, [x0, 24] ldr x0, [sp, 400] ldr x1, [sp, 200] str x1, [x0] ldr x0, [sp, 400] str wzr, [x0, 32] ldr x0, [sp, 200] ldr x1, [sp, 400] str x1, [x0, 8] ldr x0, [sp, 400] str x0, [sp, 200] ldr w0, [sp, 152] add w0, w0, 1 str w0, [sp, 152] .L155: ldr x0, [sp, 280] ldr w0, [x0, 16] sub w0, w0, #1 ldr w1, [sp, 152] cmp w1, w0 blt .L156 ldr x0, [sp, 200] str xzr, [x0, 8] str wzr, [sp, 156] b .L157 .L180: ldr w1, [sp, 156] adrp x0, .LC11 add x0, x0, :lo12:.LC11 bl printf ldrsw x1, [sp, 156] mov x0, x1 lsl x0, x0, 1 add x0, x0, x1 lsl x0, x0, 4 mov x1, x0 ldr x0, [sp, 296] add x1, x0, x1 add x0, sp, 408 ldp q0, q1, [x1] stp q0, q1, [x0] ldr q0, [x1, 32] str q0, [x0, 32] ldr x0, [sp, 448] ldr d0, [x0] ldr x0, [sp, 448] ldr d1, [x0, 8] adrp x0, .LC10 add x0, x0, :lo12:.LC10 bl printf ldr x0, [sp, 280] ldr w0, [x0, 16] sxtw x0, w0 mov x1, 48 bl calloc str x0, [sp, 312] ldr x1, [sp, 280] ldr x0, [sp, 312] bl copy_vertice_array str wzr, [sp, 160] b .L158 .L159: ldrsw x1, [sp, 160] mov x0, x1 lsl x0, x0, 1 add x0, x0, x1 lsl x0, x0, 4 mov x1, x0 ldr x0, [sp, 312] add x0, x0, x1 ldr d0, [x0] ldrsw x1, [sp, 160] mov x0, x1 lsl x0, x0, 1 add x0, x0, x1 lsl x0, x0, 4 mov x1, x0 ldr x0, [sp, 312] add x0, x0, x1 ldr d1, [x0, 8] ldr d2, [sp, 408] ldr d3, [sp, 416] bl polar_angle ldrsw x1, [sp, 160] mov x0, x1 lsl x0, x0, 1 add x0, x0, x1 lsl x0, x0, 4 mov x1, x0 ldr x0, [sp, 312] add x0, x0, x1 adrp x1, .LC12 ldr d1, [x1, #:lo12:.LC12] fadd d0, d0, d1 str d0, [x0, 24] ldr w0, [sp, 160] add w0, w0, 1 str w0, [sp, 160] .L158: ldr x0, [sp, 312] ldr w0, [x0, 16] ldr w1, [sp, 160] cmp w1, w0 blt .L159 ldr x0, [sp, 312] ldr w0, [x0, 16] sxtw x1, w0 adrp x0, md_comparator add x3, x0, :lo12:md_comparator mov x2, 48 ldr x0, [sp, 312] bl qsort str wzr, [sp, 164] b .L160 .L161: ldrsw x1, [sp, 164] mov x0, x1 lsl x0, x0, 1 add x0, x0, x1 lsl x0, x0, 4 mov x1, x0 ldr x0, [sp, 280] add x2, x0, x1 ldrsw x1, [sp, 164] mov x0, x1 lsl x0, x0, 1 add x0, x0, x1 lsl x0, x0, 4 mov x1, x0 ldr x0, [sp, 312] add x0, x0, x1 ldr w1, [x2, 16] str w1, [x0, 16] ldrsw x1, [sp, 164] mov x0, x1 lsl x0, x0, 1 add x0, x0, x1 lsl x0, x0, 4 mov x1, x0 ldr x0, [sp, 312] add x0, x0, x1 str wzr, [x0, 36] ldr w0, [sp, 164] add w0, w0, 1 str w0, [sp, 164] .L160: ldr x0, [sp, 280] ldr w0, [x0, 16] ldr w1, [sp, 164] cmp w1, w0 blt .L161 mov x1, 48 mov x0, 1000 bl calloc str x0, [sp, 320] str wzr, [sp, 168] str wzr, [sp, 172] b .L162 .L179: ldrsw x1, [sp, 172] mov x0, x1 lsl x0, x0, 1 add x0, x0, x1 lsl x0, x0, 4 mov x1, x0 ldr x0, [sp, 312] add x1, x0, x1 add x0, sp, 456 ldp q0, q1, [x1] stp q0, q1, [x0] ldr q0, [x1, 32] str q0, [x0, 32] add x0, sp, 80 add x1, sp, 408 ldp q0, q1, [x1] stp q0, q1, [x0] ldr q0, [x1, 32] str q0, [x0, 32] add x0, sp, 32 add x1, sp, 456 ldp q0, q1, [x1] stp q0, q1, [x0] ldr q0, [x1, 32] str q0, [x0, 32] add x1, sp, 32 add x0, sp, 80 bl is_same_vertice cmp w0, 1 bne .L163 ldrsw x1, [sp, 168] mov x0, x1 lsl x0, x0, 1 add x0, x0, x1 lsl x0, x0, 4 mov x1, x0 ldr x0, [sp, 320] add x0, x0, x1 mov x1, x0 add x0, sp, 456 ldp q0, q1, [x0] stp q0, q1, [x1] ldr q0, [x0, 32] str q0, [x1, 32] ldr w0, [sp, 168] add w0, w0, 1 str w0, [sp, 168] b .L178 .L163: add x0, sp, 32 add x1, sp, 408 ldp q0, q1, [x1] stp q0, q1, [x0] ldr q0, [x1, 32] str q0, [x0, 32] add x0, sp, 80 add x1, sp, 456 ldp q0, q1, [x1] stp q0, q1, [x0] ldr q0, [x1, 32] str q0, [x0, 32] add x1, sp, 80 add x0, sp, 32 ldr x2, [sp, 280] bl is_segment_inside cmp w0, 0 beq .L189 ldr d1, [sp, 408] ldr d0, [sp, 456] fsub d0, d1, d0 fmov d1, 2.0e+0 bl pow fmov d8, d0 ldr d1, [sp, 416] ldr d0, [sp, 464] fsub d0, d1, d0 fmov d1, 2.0e+0 bl pow fadd d0, d8, d0 bl sqrt str d0, [sp, 328] ldr d1, [sp, 464] ldr d0, [sp, 416] fsub d1, d1, d0 ldr d2, [sp, 456] ldr d0, [sp, 408] fsub d0, d2, d0 fdiv d0, d1, d0 str d0, [sp, 336] ldr d1, [sp, 416] ldr d2, [sp, 408] ldr d0, [sp, 336] fmul d0, d2, d0 fsub d0, d1, d0 str d0, [sp, 344] mov x1, 48 mov x0, 1 bl calloc str x0, [sp, 352] ldr x0, [sp, 352] mov x1, 70368744177664 movk x1, 0x408f, lsl 48 fmov d0, x1 str d0, [x0] ldr x0, [sp, 352] ldr d1, [x0] ldr d0, [sp, 336] fmul d1, d1, d0 ldr d0, [sp, 344] fadd d0, d1, d0 ldr x0, [sp, 352] str d0, [x0, 8] ldr x0, [sp, 304] str x0, [sp, 208] ldr d0, [sp, 456] str d0, [sp, 216] ldr d0, [sp, 464] str d0, [sp, 224] ldr x0, [sp, 304] str x0, [sp, 232] mov x0, 148983825563648 movk x0, 0x40c3, lsl 48 fmov d0, x0 str d0, [sp, 240] b .L166 .L170: ldr d0, [sp, 408] ldr d1, [sp, 416] ldr x0, [sp, 352] ldr d2, [x0] ldr x0, [sp, 352] ldr d3, [x0, 8] ldr x0, [sp, 232] ldr x0, [x0, 16] ldr d4, [x0] ldr x0, [sp, 232] ldr x0, [x0, 16] ldr d5, [x0, 8] ldr x0, [sp, 232] ldr x0, [x0, 24] ldr d6, [x0] ldr x0, [sp, 232] ldr x0, [x0, 24] ldr d7, [x0, 8] add x1, sp, 192 add x0, sp, 184 bl get_line_intersection str w0, [sp, 180] ldr w0, [sp, 180] cmn w0, #1 bne .L167 ldr x0, [sp, 232] ldr x0, [x0, 8] str x0, [sp, 232] b .L166 .L167: ldr d1, [sp, 408] ldr d0, [sp, 184] fsub d0, d1, d0 fmov d1, 2.0e+0 bl pow fmov d8, d0 ldr d1, [sp, 416] ldr d0, [sp, 192] fsub d0, d1, d0 fmov d1, 2.0e+0 bl pow fadd d0, d8, d0 bl sqrt str d0, [sp, 392] ldr d1, [sp, 392] ldr d0, [sp, 240] fsub d0, d1, d0 fabs d0, d0 adrp x0, .LC4 ldr d1, [x0, #:lo12:.LC4] fcmpe d0, d1 bmi .L184 b .L168 .L184: ldr x0, [sp, 232] str x0, [sp, 208] ldr d0, [sp, 392] str d0, [sp, 240] ldr d0, [sp, 184] str d0, [sp, 216] ldr d0, [sp, 192] str d0, [sp, 224] .L168: ldr x0, [sp, 232] ldr x0, [x0, 8] str x0, [sp, 232] .L166: ldr x0, [sp, 232] ldr x0, [x0, 8] cmp x0, 0 bne .L170 ldr d0, [sp, 328] adrp x0, .LC4 ldr d1, [x0, #:lo12:.LC4] fsub d0, d0, d1 ldr d1, [sp, 240] fcmpe d1, d0 bmi .L185 b .L171 .L185: mov x0, 48 bl malloc str x0, [sp, 360] ldr x0, [sp, 360] ldr d0, [sp, 216] str d0, [x0] ldr x0, [sp, 360] ldr d0, [sp, 224] str d0, [x0, 8] mov x0, 40 bl malloc str x0, [sp, 368] ldr x0, [sp, 368] ldr x1, [sp, 360] str x1, [x0, 16] ldr x0, [sp, 208] ldr x1, [x0, 24] ldr x0, [sp, 368] str x1, [x0, 24] ldr x0, [sp, 208] ldr x1, [x0, 8] ldr x0, [sp, 368] str x1, [x0, 8] ldr x0, [sp, 368] ldr x1, [sp, 208] str x1, [x0] ldr x0, [sp, 208] ldr x1, [sp, 368] str x1, [x0, 8] ldr x0, [sp, 208] ldr x1, [sp, 360] str x1, [x0, 24] ldrsw x1, [sp, 168] mov x0, x1 lsl x0, x0, 1 add x0, x0, x1 lsl x0, x0, 4 mov x1, x0 ldr x0, [sp, 320] add x0, x0, x1 ldr x1, [sp, 360] ldp q0, q1, [x1] stp q0, q1, [x0] ldr q0, [x1, 32] str q0, [x0, 32] .L171: ldr d0, [sp, 328] adrp x0, .LC4 ldr d1, [x0, #:lo12:.LC4] fadd d0, d0, d1 ldr d1, [sp, 240] fcmpe d1, d0 bgt .L186 b .L173 .L186: mov x0, 48 bl malloc str x0, [sp, 376] ldr x0, [sp, 376] ldr d0, [sp, 216] str d0, [x0] ldr x0, [sp, 376] ldr d0, [sp, 224] str d0, [x0, 8] mov x0, 40 bl malloc str x0, [sp, 384] ldr x0, [sp, 384] ldr x1, [sp, 376] str x1, [x0, 16] ldr x0, [sp, 208] ldr x1, [x0, 24] ldr x0, [sp, 384] str x1, [x0, 24] ldr x0, [sp, 208] ldr x1, [x0, 8] ldr x0, [sp, 384] str x1, [x0, 8] ldr x0, [sp, 384] ldr x1, [sp, 208] str x1, [x0] ldr x0, [sp, 208] ldr x1, [sp, 384] str x1, [x0, 8] ldr x0, [sp, 208] ldr x1, [sp, 376] str x1, [x0, 24] ldrsw x1, [sp, 168] mov x0, x1 lsl x0, x0, 1 add x0, x0, x1 lsl x0, x0, 4 mov x1, x0 ldr x0, [sp, 320] add x0, x0, x1 ldr x1, [sp, 376] ldp q0, q1, [x1] stp q0, q1, [x0] ldr q0, [x1, 32] str q0, [x0, 32] ldr w0, [sp, 168] add w0, w0, 1 str w0, [sp, 168] ldrsw x1, [sp, 168] mov x0, x1 lsl x0, x0, 1 add x0, x0, x1 lsl x0, x0, 4 mov x1, x0 ldr x0, [sp, 320] add x0, x0, x1 mov x1, x0 add x0, sp, 456 ldp q0, q1, [x0] stp q0, q1, [x1] ldr q0, [x0, 32] str q0, [x1, 32] .L173: ldr d0, [sp, 456] ldr d1, [sp, 216] fsub d0, d1, d0 fabs d0, d0 adrp x0, .LC4 ldr d1, [x0, #:lo12:.LC4] fcmpe d0, d1 bmi .L187 b .L175 .L187: ldr d0, [sp, 464] ldr d1, [sp, 224] fsub d0, d1, d0 fabs d0, d0 adrp x0, .LC4 ldr d1, [x0, #:lo12:.LC4] fcmpe d0, d1 bmi .L188 b .L175 .L188: ldrsw x1, [sp, 168] mov x0, x1 lsl x0, x0, 1 add x0, x0, x1 lsl x0, x0, 4 mov x1, x0 ldr x0, [sp, 320] add x0, x0, x1 mov x1, x0 add x0, sp, 456 ldp q0, q1, [x0] stp q0, q1, [x1] ldr q0, [x0, 32] str q0, [x1, 32] .L175: ldr w0, [sp, 168] add w0, w0, 1 str w0, [sp, 168] ldr x0, [sp, 320] ldr w1, [sp, 168] str w1, [x0, 16] ldr x0, [sp, 352] bl free b .L178 .L189: nop .L178: ldr w0, [sp, 172] add w0, w0, 1 str w0, [sp, 172] .L162: ldr x0, [sp, 312] ldr w0, [x0, 16] ldr w1, [sp, 172] cmp w1, w0 blt .L179 ldr x0, [sp, 320] bl print_polygon ldr x0, [sp, 312] bl free ldr x0, [sp, 320] bl free ldr w0, [sp, 156] add w0, w0, 1 str w0, [sp, 156] .L157: ldr w0, [sp, 156] cmp w0, 0 ble .L180 ldr w0, [sp, 140] add w0, w0, 1 str w0, [sp, 140] .L143: ldr w0, [sp, 140] cmp w0, 0 ble .L181 mov w0, 0 mov w1, w0 adrp x0, :got:__stack_chk_guard ldr x0, [x0, #:got_lo12:__stack_chk_guard] ldr x3, [sp, 504] ldr x2, [x0] subs x3, x3, x2 mov x2, 0 beq .L183 bl __stack_chk_fail .L183: mov w0, w1 ldr d8, [sp, 16] ldp x29, x30, [sp] add sp, sp, 512 .cfi_restore 29 .cfi_restore 30 .cfi_restore 72 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE17: .size main, .-main .section .rodata .align 3 .LC1: .word 1413754136 .word 1075388923 .align 3 .LC2: .word -640172613 .word 1036745951 .align 3 .LC3: .word -640172613 .word -1109689121 .align 3 .LC4: .word -640172613 .word 1037794527 .align 3 .LC7: .word -640172613 .word 1038843103 .align 3 .LC12: .word 1413754136 .word 1074340347 ```
### Human: Write a random program in ARM assembly### Assistant: ``` .text .section .rodata .align 3 .LC0: .string "Novo processo criado!" .text .align 2 .global main .type main, %function main: .LFB6: .cfi_startproc stp x29, x30, [sp, -16]! .cfi_def_cfa_offset 16 .cfi_offset 29, -16 .cfi_offset 30, -8 mov x29, sp bl fork adrp x0, .LC0 add x0, x0, :lo12:.LC0 bl puts mov w0, 0 ldp x29, x30, [sp], 16 .cfi_restore 30 .cfi_restore 29 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE6: .size main, .-main ```
### Human: Write a random program in ARM assembly### Assistant: ``` .text .align 2 .global fgets .type fgets, %function fgets: .LFB0: .cfi_startproc stp x29, x30, [sp, -64]! .cfi_def_cfa_offset 64 .cfi_offset 29, -64 .cfi_offset 30, -56 mov x29, sp stp x19, x20, [sp, 16] stp x21, x22, [sp, 32] .cfi_offset 19, -48 .cfi_offset 20, -40 .cfi_offset 21, -32 .cfi_offset 22, -24 str x0, [sp, 56] mov w21, w1 mov x22, x2 ldr x19, [sp, 56] b .L2 .L4: mov x0, x19 add x19, x0, 1 and w1, w20, 255 strb w1, [x0] cmp w20, 10 beq .L8 .L2: sub w21, w21, #1 cmp w21, 0 ble .L3 mov x0, x22 bl getc mov w20, w0 cmn w20, #1 bne .L4 b .L3 .L8: nop .L3: cmn w20, #1 bne .L5 mov x0, x22 bl feof cmp w0, 0 beq .L6 ldr x0, [sp, 56] cmp x19, x0 bne .L5 mov x0, 0 b .L7 .L6: mov x0, 0 b .L7 .L5: strb wzr, [x19] ldr x0, [sp, 56] .L7: ldp x19, x20, [sp, 16] ldp x21, x22, [sp, 32] ldp x29, x30, [sp], 64 .cfi_restore 30 .cfi_restore 29 .cfi_restore 21 .cfi_restore 22 .cfi_restore 19 .cfi_restore 20 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE0: .size fgets, .-fgets ```
### Human: Write a random program in ARM assembly### Assistant: ``` .text .align 2 .type update, %function update: .LFB6: .cfi_startproc sub sp, sp, #32 .cfi_def_cfa_offset 32 str x0, [sp, 8] str x1, [sp] ldr x0, [sp, 8] ldr w1, [x0] ldr x0, [sp] ldr w0, [x0] add w0, w1, w0 str w0, [sp, 24] ldr x0, [sp, 8] ldr w1, [x0] ldr x0, [sp] ldr w0, [x0] sub w0, w1, w0 cmp w0, 0 csneg w0, w0, w0, ge str w0, [sp, 28] ldr x0, [sp, 8] ldr w1, [sp, 24] str w1, [x0] ldr x0, [sp] ldr w1, [sp, 28] str w1, [x0] nop add sp, sp, 32 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE6: .size update, .-update .section .rodata .align 3 .LC0: .string "%d %d" .align 3 .LC1: .string "%d\n%d\n" .text .align 2 .global main_pointers_in_c .type main_pointers_in_c, %function main_pointers_in_c: .LFB7: .cfi_startproc stp x29, x30, [sp, -48]! .cfi_def_cfa_offset 48 .cfi_offset 29, -48 .cfi_offset 30, -40 mov x29, sp adrp x0, :got:__stack_chk_guard ldr x0, [x0, #:got_lo12:__stack_chk_guard] ldr x1, [x0] str x1, [sp, 40] mov x1, 0 add x0, sp, 16 str x0, [sp, 24] add x0, sp, 20 str x0, [sp, 32] add x1, sp, 20 add x0, sp, 16 mov x2, x1 mov x1, x0 adrp x0, .LC0 add x0, x0, :lo12:.LC0 bl __isoc99_scanf ldr x1, [sp, 32] ldr x0, [sp, 24] bl update ldr w0, [sp, 16] ldr w1, [sp, 20] mov w2, w1 mov w1, w0 adrp x0, .LC1 add x0, x0, :lo12:.LC1 bl printf mov w0, 0 mov w1, w0 adrp x0, :got:__stack_chk_guard ldr x0, [x0, #:got_lo12:__stack_chk_guard] ldr x3, [sp, 40] ldr x2, [x0] subs x3, x3, x2 mov x2, 0 beq .L4 bl __stack_chk_fail .L4: mov w0, w1 ldp x29, x30, [sp], 48 .cfi_restore 30 .cfi_restore 29 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE7: .size main_pointers_in_c, .-main_pointers_in_c ```
### Human: Write a random program in ARM assembly### Assistant: ``` .text .section .rodata .align 3 .LC1: .string "%d \n" .text .align 2 .global main .type main, %function main: .LFB0: .cfi_startproc stp x29, x30, [sp, -64]! .cfi_def_cfa_offset 64 .cfi_offset 29, -64 .cfi_offset 30, -56 mov x29, sp adrp x0, :got:__stack_chk_guard ldr x0, [x0, #:got_lo12:__stack_chk_guard] ldr x1, [x0] str x1, [sp, 56] mov x1, 0 adrp x0, .LC0 add x0, x0, :lo12:.LC0 add x2, sp, 32 mov x3, x0 ldp x0, x1, [x3] stp x0, x1, [x2] ldr w0, [x3, 16] str w0, [x2, 16] str wzr, [sp, 28] b .L2 .L3: ldrsw x0, [sp, 28] lsl x0, x0, 2 add x1, sp, 32 ldr w0, [x1, x0] mov w1, w0 adrp x0, .LC1 add x0, x0, :lo12:.LC1 bl printf ldr w0, [sp, 28] add w0, w0, 1 str w0, [sp, 28] .L2: ldr w0, [sp, 28] cmp w0, 4 bls .L3 mov w0, 0 mov w1, w0 adrp x0, :got:__stack_chk_guard ldr x0, [x0, #:got_lo12:__stack_chk_guard] ldr x3, [sp, 56] ldr x2, [x0] subs x3, x3, x2 mov x2, 0 beq .L5 bl __stack_chk_fail .L5: mov w0, w1 ldp x29, x30, [sp], 64 .cfi_restore 30 .cfi_restore 29 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE0: .size main, .-main .section .rodata .align 3 .LC0: .word 3 .word 9 .word 7 .word 1 .word 9 .text ```
### Human: Write a random program in ARM assembly### Assistant: ``` .text .global i .bss .align 2 .type i, %object .size i, 4 i: .zero 4 .text .align 2 .global main .type main, %function main: .LFB0: .cfi_startproc stp x29, x30, [sp, -32]! .cfi_def_cfa_offset 32 .cfi_offset 29, -32 .cfi_offset 30, -24 mov x29, sp strh wzr, [sp, 30] .L2: adrp x0, i add x0, x0, :lo12:i ldr w0, [x0] add w1, w0, 1 adrp x0, i add x0, x0, :lo12:i str w1, [x0] ldrh w0, [sp, 30] sub w0, w0, #1 strh w0, [sp, 30] ldrh w0, [sp, 30] cmp w0, 0 bne .L2 adrp x0, i add x0, x0, :lo12:i ldr w0, [x0] cmp w0, 65536 beq .L3 bl abort .L3: mov w0, 0 bl exit .cfi_endproc .LFE0: .size main, .-main ```
### Human: Write a random program in ARM assembly### Assistant: ``` .text .section .rodata .align 3 .LC0: .string "Direccion del primer nodo: %p\n" .align 3 .LC1: .string "Valor del primer nodo: %i\n" .align 3 .LC2: .string "Direccion del segundo nodo: %p\n" .align 3 .LC3: .string "Valor del segundo nodo: %i\n" .align 3 .LC4: .string "Direccion del tercer nodo: %p\n" .align 3 .LC5: .string "Valor del tercer nodo: %i\n" .text .align 2 .global main .type main, %function main: .LFB6: .cfi_startproc stp x29, x30, [sp, -48]! .cfi_def_cfa_offset 48 .cfi_offset 29, -48 .cfi_offset 30, -40 mov x29, sp str x19, [sp, 16] .cfi_offset 19, -32 mov x0, 16 bl malloc str x0, [sp, 40] ldr x0, [sp, 40] mov w1, 1 str w1, [x0] mov x0, 16 bl malloc mov x1, x0 ldr x0, [sp, 40] str x1, [x0, 8] ldr x0, [sp, 40] ldr x0, [x0, 8] mov w1, 2 str w1, [x0] ldr x0, [sp, 40] ldr x19, [x0, 8] mov x0, 16 bl malloc str x0, [x19, 8] ldr x0, [sp, 40] ldr x0, [x0, 8] ldr x0, [x0, 8] mov w1, 3 str w1, [x0] ldr x1, [sp, 40] adrp x0, .LC0 add x0, x0, :lo12:.LC0 bl printf ldr x0, [sp, 40] ldr w0, [x0] mov w1, w0 adrp x0, .LC1 add x0, x0, :lo12:.LC1 bl printf ldr x0, [sp, 40] ldr x0, [x0, 8] mov x1, x0 adrp x0, .LC2 add x0, x0, :lo12:.LC2 bl printf ldr x0, [sp, 40] ldr x0, [x0, 8] ldr w0, [x0] mov w1, w0 adrp x0, .LC3 add x0, x0, :lo12:.LC3 bl printf ldr x0, [sp, 40] ldr x0, [x0, 8] ldr x0, [x0, 8] mov x1, x0 adrp x0, .LC4 add x0, x0, :lo12:.LC4 bl printf ldr x0, [sp, 40] ldr x0, [x0, 8] ldr x0, [x0, 8] ldr w0, [x0] mov w1, w0 adrp x0, .LC5 add x0, x0, :lo12:.LC5 bl printf mov w0, 0 ldr x19, [sp, 16] ldp x29, x30, [sp], 48 .cfi_restore 30 .cfi_restore 29 .cfi_restore 19 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE6: .size main, .-main ```
### Human: Write a random program in ARM assembly### Assistant: ``` .text .global defaultalign .bss .align 3 .type defaultalign, %object .size defaultalign, 16 defaultalign: .zero 16 .global sixteen .align 3 .type sixteen, %object .size sixteen, 12 sixteen: .zero 12 .global two .align 3 .type two, %object .size two, 9 two: .zero 9 .global three .align 3 .type three, %object .size three, 10 three: .zero 10 .global resetalign .align 3 .type resetalign, %object .size resetalign, 16 resetalign: .zero 16 .text .align 2 .global main .type main, %function main: .LFB0: .cfi_startproc stp x29, x30, [sp, -16]! .cfi_def_cfa_offset 16 .cfi_offset 29, -16 .cfi_offset 30, -8 mov x29, sp bl abort .cfi_endproc .LFE0: .size main, .-main ```
### Human: Write a random program in ARM assembly### Assistant: ``` .text .global buff .bss .align 3 .type buff, %object .size buff, 100 buff: .zero 100 .global p .align 2 .type p, %object .size p, 4 p: .zero 4 .text .align 2 .global getch .type getch, %function getch: .LFB0: .cfi_startproc stp x29, x30, [sp, -16]! .cfi_def_cfa_offset 16 .cfi_offset 29, -16 .cfi_offset 30, -8 mov x29, sp adrp x0, p add x0, x0, :lo12:p ldr w0, [x0] cmp w0, 0 ble .L2 adrp x0, p add x0, x0, :lo12:p ldr w0, [x0] sub w1, w0, #1 adrp x0, p add x0, x0, :lo12:p str w1, [x0] adrp x0, p add x0, x0, :lo12:p ldr w2, [x0] adrp x0, buff add x1, x0, :lo12:buff sxtw x0, w2 ldrb w0, [x1, x0] b .L4 .L2: bl getchar .L4: ldp x29, x30, [sp], 16 .cfi_restore 30 .cfi_restore 29 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE0: .size getch, .-getch .section .rodata .align 3 .LC0: .string "out of maximum buffer size!" .text .align 2 .global ungetch .type ungetch, %function ungetch: .LFB1: .cfi_startproc stp x29, x30, [sp, -32]! .cfi_def_cfa_offset 32 .cfi_offset 29, -32 .cfi_offset 30, -24 mov x29, sp str w0, [sp, 28] adrp x0, p add x0, x0, :lo12:p ldr w0, [x0] cmp w0, 99 ble .L6 adrp x0, .LC0 add x0, x0, :lo12:.LC0 bl printf b .L8 .L6: adrp x0, p add x0, x0, :lo12:p ldr w0, [x0] add w2, w0, 1 adrp x1, p add x1, x1, :lo12:p str w2, [x1] ldr w1, [sp, 28] and w2, w1, 255 adrp x1, buff add x1, x1, :lo12:buff sxtw x0, w0 strb w2, [x1, x0] .L8: nop ldp x29, x30, [sp], 32 .cfi_restore 30 .cfi_restore 29 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE1: .size ungetch, .-ungetch .align 2 .global clean_getch .type clean_getch, %function clean_getch: .LFB2: .cfi_startproc adrp x0, p add x0, x0, :lo12:p str wzr, [x0] nop ret .cfi_endproc .LFE2: .size clean_getch, .-clean_getch ```
### Human: Write a random program in ARM assembly### Assistant: ``` .text .section .rodata .align 3 .LC0: .string "r" .align 3 .LC1: .string "fun.txt" .align 3 .LC2: .string "non-fun.txt" .align 3 .LC3: .string "international.txt" .align 3 .LC4: .string "w+" .align 3 .LC5: .string "class_list.txt" .align 3 .LC6: .string "Error opening the file" .align 3 .LC7: .string "File open!" .align 3 .LC8: .string "%s %s" .align 3 .LC9: .string "%d %s %s\n" .align 3 .LC10: .string "%d: %s %s\n" .align 3 .LC11: .string "\nEnter an option to do the following:" .align 3 .LC12: .string "\nEnter 1: Search for those that are international" .align 3 .LC13: .string "Enter 2: Search by surname" .align 3 .LC14: .string "Enter any other key to exit" .align 3 .LC15: .string "Option: " .align 3 .LC16: .string "%c" .align 3 .LC17: .string "\n\nPlease enter a name you would like to search for:" .align 3 .LC18: .string "%19s" .text .align 2 .global main .type main, %function main: .LFB6: .cfi_startproc sub sp, sp, #1600 .cfi_def_cfa_offset 1600 stp x29, x30, [sp] .cfi_offset 29, -1600 .cfi_offset 30, -1592 mov x29, sp adrp x0, :got:__stack_chk_guard ldr x0, [x0, #:got_lo12:__stack_chk_guard] ldr x1, [x0] str x1, [sp, 1592] mov x1, 0 str wzr, [sp, 28] str wzr, [sp, 32] str wzr, [sp, 36] str wzr, [sp, 44] strb wzr, [sp, 27] str wzr, [sp, 48] str wzr, [sp, 40] str wzr, [sp, 52] adrp x0, .LC0 add x1, x0, :lo12:.LC0 adrp x0, .LC1 add x0, x0, :lo12:.LC1 bl fopen str x0, [sp, 56] adrp x0, .LC0 add x1, x0, :lo12:.LC0 adrp x0, .LC2 add x0, x0, :lo12:.LC2 bl fopen str x0, [sp, 64] adrp x0, .LC0 add x1, x0, :lo12:.LC0 adrp x0, .LC3 add x0, x0, :lo12:.LC3 bl fopen str x0, [sp, 72] adrp x0, .LC4 add x1, x0, :lo12:.LC4 adrp x0, .LC5 add x0, x0, :lo12:.LC5 bl fopen str x0, [sp, 80] ldr x0, [sp, 56] cmp x0, 0 beq .L2 ldr x0, [sp, 64] cmp x0, 0 beq .L2 ldr x0, [sp, 72] cmp x0, 0 bne .L3 .L2: adrp x0, .LC6 add x0, x0, :lo12:.LC6 bl puts b .L4 .L3: adrp x0, .LC7 add x0, x0, :lo12:.LC7 bl puts .L4: b .L5 .L6: ldrsw x1, [sp, 40] mov x0, x1 lsl x0, x0, 2 add x0, x0, x1 lsl x0, x0, 3 add x0, x0, x1 add x1, sp, 128 mov w2, 102 strb w2, [x1, x0] ldr w0, [sp, 40] add w0, w0, 1 str w0, [sp, 40] ldr w0, [sp, 28] add w0, w0, 1 str w0, [sp, 28] .L5: add x2, sp, 88 ldrsw x1, [sp, 40] mov x0, x1 lsl x0, x0, 2 add x0, x0, x1 lsl x0, x0, 3 add x0, x0, x1 add x4, x2, x0 add x2, sp, 88 ldrsw x1, [sp, 40] mov x0, x1 lsl x0, x0, 2 add x0, x0, x1 lsl x0, x0, 3 add x0, x0, x1 add x0, x0, 16 add x0, x2, x0 add x0, x0, 4 mov x3, x0 mov x2, x4 adrp x0, .LC8 add x1, x0, :lo12:.LC8 ldr x0, [sp, 56] bl __isoc99_fscanf cmn w0, #1 bne .L6 b .L7 .L8: ldrsw x1, [sp, 40] mov x0, x1 lsl x0, x0, 2 add x0, x0, x1 lsl x0, x0, 3 add x0, x0, x1 add x1, sp, 128 mov w2, 110 strb w2, [x1, x0] ldr w0, [sp, 40] add w0, w0, 1 str w0, [sp, 40] ldr w0, [sp, 32] add w0, w0, 1 str w0, [sp, 32] .L7: add x2, sp, 88 ldrsw x1, [sp, 40] mov x0, x1 lsl x0, x0, 2 add x0, x0, x1 lsl x0, x0, 3 add x0, x0, x1 add x4, x2, x0 add x2, sp, 88 ldrsw x1, [sp, 40] mov x0, x1 lsl x0, x0, 2 add x0, x0, x1 lsl x0, x0, 3 add x0, x0, x1 add x0, x0, 16 add x0, x2, x0 add x0, x0, 4 mov x3, x0 mov x2, x4 adrp x0, .LC8 add x1, x0, :lo12:.LC8 ldr x0, [sp, 64] bl __isoc99_fscanf cmn w0, #1 bne .L8 b .L9 .L10: ldrsw x1, [sp, 40] mov x0, x1 lsl x0, x0, 2 add x0, x0, x1 lsl x0, x0, 3 add x0, x0, x1 add x1, sp, 128 mov w2, 105 strb w2, [x1, x0] ldr w0, [sp, 40] add w0, w0, 1 str w0, [sp, 40] ldr w0, [sp, 36] add w0, w0, 1 str w0, [sp, 36] .L9: add x2, sp, 88 ldrsw x1, [sp, 40] mov x0, x1 lsl x0, x0, 2 add x0, x0, x1 lsl x0, x0, 3 add x0, x0, x1 add x4, x2, x0 add x2, sp, 88 ldrsw x1, [sp, 40] mov x0, x1 lsl x0, x0, 2 add x0, x0, x1 lsl x0, x0, 3 add x0, x0, x1 add x0, x0, 16 add x0, x2, x0 add x0, x0, 4 mov x3, x0 mov x2, x4 adrp x0, .LC8 add x1, x0, :lo12:.LC8 ldr x0, [sp, 72] bl __isoc99_fscanf cmn w0, #1 bne .L10 ldr w0, [sp, 40] str w0, [sp, 44] add x0, sp, 88 ldr w1, [sp, 44] bl insertionSort str wzr, [sp, 40] b .L11 .L12: ldr w0, [sp, 40] add w4, w0, 1 add x2, sp, 88 ldrsw x1, [sp, 40] mov x0, x1 lsl x0, x0, 2 add x0, x0, x1 lsl x0, x0, 3 add x0, x0, x1 add x5, x2, x0 add x2, sp, 88 ldrsw x1, [sp, 40] mov x0, x1 lsl x0, x0, 2 add x0, x0, x1 lsl x0, x0, 3 add x0, x0, x1 add x0, x0, 16 add x0, x2, x0 add x0, x0, 4 mov x3, x0 mov x2, x5 mov w1, w4 adrp x0, .LC9 add x0, x0, :lo12:.LC9 bl printf ldr w0, [sp, 40] add w5, w0, 1 add x2, sp, 88 ldrsw x1, [sp, 40] mov x0, x1 lsl x0, x0, 2 add x0, x0, x1 lsl x0, x0, 3 add x0, x0, x1 add x3, x2, x0 add x2, sp, 88 ldrsw x1, [sp, 40] mov x0, x1 lsl x0, x0, 2 add x0, x0, x1 lsl x0, x0, 3 add x0, x0, x1 add x0, x0, 16 add x0, x2, x0 add x0, x0, 4 mov x4, x0 mov w2, w5 adrp x0, .LC10 add x1, x0, :lo12:.LC10 ldr x0, [sp, 80] bl fprintf ldr w0, [sp, 40] add w0, w0, 1 str w0, [sp, 40] .L11: ldr w1, [sp, 40] ldr w0, [sp, 44] cmp w1, w0 blt .L12 adrp x0, .LC11 add x0, x0, :lo12:.LC11 bl puts .L17: adrp x0, .LC12 add x0, x0, :lo12:.LC12 bl puts adrp x0, .LC13 add x0, x0, :lo12:.LC13 bl puts adrp x0, .LC14 add x0, x0, :lo12:.LC14 bl puts adrp x0, .LC15 add x0, x0, :lo12:.LC15 bl printf add x0, sp, 27 mov x1, x0 adrp x0, .LC16 add x0, x0, :lo12:.LC16 bl __isoc99_scanf ldrb w0, [sp, 27] cmp w0, 49 beq .L13 cmp w0, 50 beq .L14 b .L19 .L13: add x0, sp, 88 mov x1, x0 ldr w0, [sp, 44] bl interSearch b .L16 .L14: adrp x0, .LC17 add x0, x0, :lo12:.LC17 bl puts add x0, sp, 1568 mov x1, x0 adrp x0, .LC18 add x0, x0, :lo12:.LC18 bl __isoc99_scanf adrp x0, :got:stdin ldr x0, [x0, #:got_lo12:stdin] ldr x0, [x0] bl fflush add x1, sp, 1568 add x0, sp, 88 mov x2, x1 mov x1, x0 ldr w0, [sp, 44] bl nameSearch b .L16 .L19: mov w0, 1 bl exit .L16: b .L17 .cfi_endproc .LFE6: .size main, .-main .align 2 .global insertionSort .type insertionSort, %function insertionSort: .LFB7: .cfi_startproc stp x29, x30, [sp, -112]! .cfi_def_cfa_offset 112 .cfi_offset 29, -112 .cfi_offset 30, -104 mov x29, sp str x0, [sp, 24] str w1, [sp, 20] adrp x0, :got:__stack_chk_guard ldr x0, [x0, #:got_lo12:__stack_chk_guard] ldr x1, [x0] str x1, [sp, 104] mov x1, 0 str wzr, [sp, 44] str wzr, [sp, 48] mov w0, 1 str w0, [sp, 44] b .L21 .L24: ldrsw x1, [sp, 44] mov x0, x1 lsl x0, x0, 2 add x0, x0, x1 lsl x0, x0, 3 add x0, x0, x1 ldr x1, [sp, 24] add x0, x1, x0 mov x1, x0 add x0, sp, 56 bl strcpy ldrsw x1, [sp, 44] mov x0, x1 lsl x0, x0, 2 add x0, x0, x1 lsl x0, x0, 3 add x0, x0, x1 ldr x1, [sp, 24] add x0, x1, x0 add x1, x0, 20 add x0, sp, 80 bl strcpy ldrsw x1, [sp, 44] mov x0, x1 lsl x0, x0, 2 add x0, x0, x1 lsl x0, x0, 3 add x0, x0, x1 ldr x1, [sp, 24] add x0, x1, x0 ldrb w0, [x0, 40] strb w0, [sp, 43] ldr w0, [sp, 44] sub w0, w0, #1 str w0, [sp, 48] add x0, sp, 80 ldr w3, [sp, 48] mov w2, 0 mov x1, x0 ldr x0, [sp, 24] bl Search str w0, [sp, 52] b .L22 .L23: ldrsw x0, [sp, 48] add x1, x0, 1 mov x0, x1 lsl x0, x0, 2 add x0, x0, x1 lsl x0, x0, 3 add x0, x0, x1 ldr x1, [sp, 24] add x0, x1, x0 mov x2, x0 ldrsw x1, [sp, 48] mov x0, x1 lsl x0, x0, 2 add x0, x0, x1 lsl x0, x0, 3 add x0, x0, x1 ldr x1, [sp, 24] add x0, x1, x0 mov x1, x0 mov x0, x2 bl strcpy ldrsw x0, [sp, 48] add x1, x0, 1 mov x0, x1 lsl x0, x0, 2 add x0, x0, x1 lsl x0, x0, 3 add x0, x0, x1 ldr x1, [sp, 24] add x0, x1, x0 add x2, x0, 20 ldrsw x1, [sp, 48] mov x0, x1 lsl x0, x0, 2 add x0, x0, x1 lsl x0, x0, 3 add x0, x0, x1 ldr x1, [sp, 24] add x0, x1, x0 add x0, x0, 20 mov x1, x0 mov x0, x2 bl strcpy ldrsw x1, [sp, 48] mov x0, x1 lsl x0, x0, 2 add x0, x0, x1 lsl x0, x0, 3 add x0, x0, x1 ldr x1, [sp, 24] add x2, x1, x0 ldrsw x0, [sp, 48] add x1, x0, 1 mov x0, x1 lsl x0, x0, 2 add x0, x0, x1 lsl x0, x0, 3 add x0, x0, x1 ldr x1, [sp, 24] add x0, x1, x0 ldrb w1, [x2, 40] strb w1, [x0, 40] ldr w0, [sp, 48] sub w0, w0, #1 str w0, [sp, 48] .L22: ldr w1, [sp, 52] ldr w0, [sp, 48] cmp w1, w0 ble .L23 ldrsw x0, [sp, 48] add x1, x0, 1 mov x0, x1 lsl x0, x0, 2 add x0, x0, x1 lsl x0, x0, 3 add x0, x0, x1 ldr x1, [sp, 24] add x0, x1, x0 mov x2, x0 add x0, sp, 56 mov x1, x0 mov x0, x2 bl strcpy ldrsw x0, [sp, 48] add x1, x0, 1 mov x0, x1 lsl x0, x0, 2 add x0, x0, x1 lsl x0, x0, 3 add x0, x0, x1 ldr x1, [sp, 24] add x0, x1, x0 add x0, x0, 20 add x1, sp, 80 bl strcpy ldrsw x0, [sp, 48] add x1, x0, 1 mov x0, x1 lsl x0, x0, 2 add x0, x0, x1 lsl x0, x0, 3 add x0, x0, x1 ldr x1, [sp, 24] add x0, x1, x0 ldrb w1, [sp, 43] strb w1, [x0, 40] ldr w0, [sp, 44] add w0, w0, 1 str w0, [sp, 44] .L21: ldr w1, [sp, 44] ldr w0, [sp, 20] cmp w1, w0 blt .L24 nop adrp x0, :got:__stack_chk_guard ldr x0, [x0, #:got_lo12:__stack_chk_guard] ldr x2, [sp, 104] ldr x1, [x0] subs x2, x2, x1 mov x1, 0 beq .L25 bl __stack_chk_fail .L25: ldp x29, x30, [sp], 112 .cfi_restore 30 .cfi_restore 29 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE7: .size insertionSort, .-insertionSort .align 2 .global Search .type Search, %function Search: .LFB8: .cfi_startproc stp x29, x30, [sp, -64]! .cfi_def_cfa_offset 64 .cfi_offset 29, -64 .cfi_offset 30, -56 mov x29, sp str x0, [sp, 40] str x1, [sp, 32] str w2, [sp, 28] str w3, [sp, 24] ldr w1, [sp, 28] ldr w0, [sp, 24] add w0, w1, w0 lsr w1, w0, 31 add w0, w1, w0 asr w0, w0, 1 str w0, [sp, 60] ldr w1, [sp, 24] ldr w0, [sp, 28] cmp w1, w0 bgt .L27 ldrsw x1, [sp, 28] mov x0, x1 lsl x0, x0, 2 add x0, x0, x1 lsl x0, x0, 3 add x0, x0, x1 ldr x1, [sp, 40] add x0, x1, x0 add x0, x0, 20 mov x1, x0 ldr x0, [sp, 32] bl strcmp cmp w0, 0 bge .L28 ldr w0, [sp, 28] b .L26 .L28: ldrsw x1, [sp, 28] mov x0, x1 lsl x0, x0, 2 add x0, x0, x1 lsl x0, x0, 3 add x0, x0, x1 ldr x1, [sp, 40] add x0, x1, x0 add x0, x0, 20 mov x1, x0 ldr x0, [sp, 32] bl strcmp cmp w0, 0 ble .L27 ldr w0, [sp, 28] add w0, w0, 1 b .L26 .L27: ldrsw x1, [sp, 60] mov x0, x1 lsl x0, x0, 2 add x0, x0, x1 lsl x0, x0, 3 add x0, x0, x1 ldr x1, [sp, 40] add x0, x1, x0 add x0, x0, 20 mov x1, x0 ldr x0, [sp, 32] bl strcmp cmp w0, 0 bne .L30 ldr w0, [sp, 60] add w0, w0, 1 b .L26 .L30: ldrsw x1, [sp, 60] mov x0, x1 lsl x0, x0, 2 add x0, x0, x1 lsl x0, x0, 3 add x0, x0, x1 ldr x1, [sp, 40] add x0, x1, x0 add x0, x0, 20 mov x1, x0 ldr x0, [sp, 32] bl strcmp cmp w0, 0 ble .L31 ldr w0, [sp, 60] add w0, w0, 1 ldr w3, [sp, 24] mov w2, w0 ldr x1, [sp, 32] ldr x0, [sp, 40] bl Search b .L26 .L31: ldrsw x1, [sp, 60] mov x0, x1 lsl x0, x0, 2 add x0, x0, x1 lsl x0, x0, 3 add x0, x0, x1 ldr x1, [sp, 40] add x0, x1, x0 add x0, x0, 20 mov x1, x0 ldr x0, [sp, 32] bl strcmp cmp w0, 0 bge .L32 ldr w0, [sp, 60] sub w0, w0, #1 mov w3, w0 ldr w2, [sp, 28] ldr x1, [sp, 32] ldr x0, [sp, 40] bl Search b .L26 .L32: .L26: ldp x29, x30, [sp], 64 .cfi_restore 30 .cfi_restore 29 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE8: .size Search, .-Search .section .rodata .align 3 .LC19: .string "The international students are the following" .align 3 .LC20: .string "\n%d: %s %s (Position %d)\n" .text .align 2 .global interSearch .type interSearch, %function interSearch: .LFB9: .cfi_startproc stp x29, x30, [sp, -48]! .cfi_def_cfa_offset 48 .cfi_offset 29, -48 .cfi_offset 30, -40 mov x29, sp str w0, [sp, 28] str x1, [sp, 16] mov w0, 1 str w0, [sp, 40] adrp x0, .LC19 add x0, x0, :lo12:.LC19 bl puts str wzr, [sp, 44] b .L34 .L36: ldrsw x1, [sp, 44] mov x0, x1 lsl x0, x0, 2 add x0, x0, x1 lsl x0, x0, 3 add x0, x0, x1 ldr x1, [sp, 16] add x0, x1, x0 ldrb w0, [x0, 40] cmp w0, 105 bne .L35 ldrsw x1, [sp, 44] mov x0, x1 lsl x0, x0, 2 add x0, x0, x1 lsl x0, x0, 3 add x0, x0, x1 ldr x1, [sp, 16] add x0, x1, x0 mov x2, x0 ldrsw x1, [sp, 44] mov x0, x1 lsl x0, x0, 2 add x0, x0, x1 lsl x0, x0, 3 add x0, x0, x1 ldr x1, [sp, 16] add x0, x1, x0 add x1, x0, 20 ldr w0, [sp, 44] add w0, w0, 1 mov w4, w0 mov x3, x1 ldr w1, [sp, 40] adrp x0, .LC20 add x0, x0, :lo12:.LC20 bl printf ldr w0, [sp, 40] add w0, w0, 1 str w0, [sp, 40] .L35: ldr w0, [sp, 44] add w0, w0, 1 str w0, [sp, 44] .L34: ldr w1, [sp, 44] ldr w0, [sp, 28] cmp w1, w0 blt .L36 nop nop ldp x29, x30, [sp], 48 .cfi_restore 30 .cfi_restore 29 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE9: .size interSearch, .-interSearch .section .rodata .align 3 .LC21: .string "\n%s %s is found and is number %d on th list" .align 3 .LC22: .string "\nA person with the surname %s was not found" .text .align 2 .global nameSearch .type nameSearch, %function nameSearch: .LFB10: .cfi_startproc stp x29, x30, [sp, -64]! .cfi_def_cfa_offset 64 .cfi_offset 29, -64 .cfi_offset 30, -56 mov x29, sp str w0, [sp, 44] str x1, [sp, 32] str x2, [sp, 24] str wzr, [sp, 60] str wzr, [sp, 48] ldr w0, [sp, 44] sub w0, w0, #1 str w0, [sp, 56] ldr w1, [sp, 48] ldr w0, [sp, 56] add w0, w1, w0 lsr w1, w0, 31 add w0, w1, w0 asr w0, w0, 1 str w0, [sp, 52] b .L38 .L43: ldrsw x1, [sp, 52] mov x0, x1 lsl x0, x0, 2 add x0, x0, x1 lsl x0, x0, 3 add x0, x0, x1 ldr x1, [sp, 32] add x0, x1, x0 add x0, x0, 20 ldr x1, [sp, 24] bl strcmp cmp w0, 0 bne .L39 ldrsw x1, [sp, 52] mov x0, x1 lsl x0, x0, 2 add x0, x0, x1 lsl x0, x0, 3 add x0, x0, x1 ldr x1, [sp, 32] add x0, x1, x0 ldr w3, [sp, 52] ldr x2, [sp, 24] mov x1, x0 adrp x0, .LC21 add x0, x0, :lo12:.LC21 bl printf ldr w0, [sp, 60] add w0, w0, 1 str w0, [sp, 60] b .L40 .L39: ldrsw x1, [sp, 52] mov x0, x1 lsl x0, x0, 2 add x0, x0, x1 lsl x0, x0, 3 add x0, x0, x1 ldr x1, [sp, 32] add x0, x1, x0 add x0, x0, 20 ldr x1, [sp, 24] bl strcmp cmp w0, 0 bge .L41 ldr w0, [sp, 52] add w0, w0, 1 str w0, [sp, 48] b .L42 .L41: ldrsw x1, [sp, 52] mov x0, x1 lsl x0, x0, 2 add x0, x0, x1 lsl x0, x0, 3 add x0, x0, x1 ldr x1, [sp, 32] add x0, x1, x0 add x0, x0, 20 ldr x1, [sp, 24] bl strcmp cmp w0, 0 ble .L42 ldr w0, [sp, 52] sub w0, w0, #1 str w0, [sp, 56] .L42: ldr w1, [sp, 48] ldr w0, [sp, 56] add w0, w1, w0 lsr w1, w0, 31 add w0, w1, w0 asr w0, w0, 1 str w0, [sp, 52] .L38: ldr w1, [sp, 48] ldr w0, [sp, 56] cmp w1, w0 ble .L43 .L40: ldr w0, [sp, 60] cmp w0, 0 bne .L45 ldr x1, [sp, 24] adrp x0, .LC22 add x0, x0, :lo12:.LC22 bl printf .L45: nop ldp x29, x30, [sp], 64 .cfi_restore 30 .cfi_restore 29 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE10: .size nameSearch, .-nameSearch ```
### Human: Write a random program in ARM assembly### Assistant: ``` .text .section .rodata .align 3 .LC0: .string "Hello World!" .text .align 2 .global main .type main, %function main: .LFB0: .cfi_startproc stp x29, x30, [sp, -16]! .cfi_def_cfa_offset 16 .cfi_offset 29, -16 .cfi_offset 30, -8 mov x29, sp adrp x0, .LC0 add x0, x0, :lo12:.LC0 bl printf mov w0, 0 ldp x29, x30, [sp], 16 .cfi_restore 30 .cfi_restore 29 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE0: .size main, .-main ```
### Human: Write a random program in ARM assembly### Assistant: ``` .text .global a .bss .align 3 .type a, %object .size a, 40 a: .zero 40 .section .rodata .align 3 .LC0: .string "This can read values into the int a[] of size s" .text .align 2 .global read_array .type read_array, %function read_array: .LFB0: .cfi_startproc stp x29, x30, [sp, -32]! .cfi_def_cfa_offset 32 .cfi_offset 29, -32 .cfi_offset 30, -24 mov x29, sp str x0, [sp, 24] str w1, [sp, 20] adrp x0, .LC0 add x0, x0, :lo12:.LC0 bl puts nop ldp x29, x30, [sp], 32 .cfi_restore 30 .cfi_restore 29 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE0: .size read_array, .-read_array .section .rodata .align 3 .LC1: .string "%d\n" .text .align 2 .global main .type main, %function main: .LFB1: .cfi_startproc stp x29, x30, [sp, -96]! .cfi_def_cfa_offset 96 .cfi_offset 29, -96 .cfi_offset 30, -88 mov x29, sp adrp x0, :got:__stack_chk_guard ldr x0, [x0, #:got_lo12:__stack_chk_guard] ldr x1, [x0] str x1, [sp, 88] mov x1, 0 str wzr, [sp, 28] b .L3 .L4: adrp x0, a add x0, x0, :lo12:a ldrsw x1, [sp, 28] ldr w0, [x0, x1, lsl 2] mov w1, w0 adrp x0, .LC1 add x0, x0, :lo12:.LC1 bl printf ldr w0, [sp, 28] add w0, w0, 1 str w0, [sp, 28] .L3: ldr w0, [sp, 28] cmp w0, 9 ble .L4 adrp x0, .LC2 ldr d0, [x0, #:lo12:.LC2] str d0, [sp, 40] mov w0, 10 str w0, [sp, 32] ldr w0, [sp, 32] scvtf d0, w0 adrp x0, .LC3 ldr d1, [x0, #:lo12:.LC3] fmul d1, d0, d1 ldr w0, [sp, 32] scvtf d0, w0 fmul d0, d1, d0 str d0, [sp, 40] mov w0, 19 str w0, [sp, 36] mov w0, 49 str w0, [sp, 36] ldr w1, [sp, 36] add w0, w1, 1 str w0, [sp, 36] ldr w0, [sp, 36] add w2, w0, 1 str w2, [sp, 36] mul w0, w1, w0 str w0, [sp, 36] add x0, sp, 48 mov w1, 10 bl read_array mov w0, 0 mov w1, w0 adrp x0, :got:__stack_chk_guard ldr x0, [x0, #:got_lo12:__stack_chk_guard] ldr x3, [sp, 88] ldr x2, [x0] subs x3, x3, x2 mov x2, 0 beq .L6 bl __stack_chk_fail .L6: mov w0, w1 ldp x29, x30, [sp], 96 .cfi_restore 30 .cfi_restore 29 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE1: .size main, .-main .section .rodata .align 3 .LC2: .word -999181191 .word 1079171930 .align 3 .LC3: .word -1065151889 .word 1074340298 ```
### Human: Write a random program in ARM assembly### Assistant: ``` .text .section .rodata .align 3 .type help_text, %object .size help_text, 1884 help_text: .ascii "\347\224\250\346\263\225\357\274\232 mplayer [\351" .ascii "\200\211\351\241\271] [URL|\350\267\257\345\276\204/]\346\226" .ascii "\207\344\273\266\345\220\215\n\n\345\237\272\346\234\254\351" .ascii "\200\211\351\241\271\357\274\232 \357\274\210\345\256" .ascii "\214\346\225\264\345\210\227\350\241\250\345\217\202\350\247" .ascii "\201\346\211\213\345\206\214\351\241\265\357\274\211\n -vo <" .ascii "drv> \351\200\211\346\213\251\350\247\206\351\242\221" .ascii "\350\276\223\345\207\272\351\251\261\345\212\250\347\250\213" .ascii "\345\272\217\357\274\210\346\237\245\347\234\213\351\251\261" .ascii "\345\212\250\347\250\213\345\272\217\345\210\227\350\241\250" .ascii "\347\224\250\342\200\234-vo help\342\200\235\357\274\211\n -" .ascii "ao <drv> \351\200\211\346\213\251\351\237\263\351\242" .ascii "\221\350\276\223\345\207\272\351\251\261\345\212\250\347\250" .ascii "\213\345\272\217\357\274\210\346\237\245\347\234\213\351\251" .ascii "\261\345\212\250\347\250\213\345\272\217\345\210\227\350\241" .ascii "\250\347\224\250\342\200\234-ao help\342\200\235\357\274\211" .ascii "\n -alang/-slang \351\200\211\346\213\251 DVD \351\237\263" .ascii "\351\242\221/\345\255\227\345\271\225\347\232\204\350\257\255" .ascii "\350\250\200\357\274\210\344\275\277\347\224\250\344\270\244" .ascii "\345\255\227\347\254\246\347\232\204\345\233\275\345\256\266" .ascii "\344\273\243\345\217\267\357\274\211\n -ss <\344\275\215\347" .ascii "\275\256> \345\256\232\344\275\215\350\207\263\347\273" .ascii "\231\345\256\232\347\232\204\357\274\210\347\247\222\346\225" .ascii "\260\346\210\226\346\227\266:\345\210\206:\347\247\222 - hh:" .ascii "mm:ss\357\274\211\344\275\215\347\275\256\n -nosound " .ascii " \344\270\215\346\222\255\346\224\276\345\243\260\351\237\263" .ascii "\n -fs \345\205\250\345\261\217\346\222\255\346" .ascii "\224\276\357\274\210\346\210\226\347\224\250 -vm\343\200\201" .ascii "-zoom\357\274\214\350\257\246\350\247\201\346\211\213\345\206" .ascii "\214\347\233\270\345\205\263\351\241\265\351\235\242\357\274" .ascii "\211\n -x <x> -y <y> \350\256\276\347\275\256\346\230\276" .ascii "\347\244\272\347\232\204\345\210\206\350\276\250\347\216\207" .ascii "\357\274\210\347\224\250\344\273\245\344\270\216 -vm \346\210" .ascii "\226 -zoom \344\270\200\350\265\267\344\275\277\347\224\250\357" .ascii "\274\211\n -sub <\346\226\207\344\273\266> \346\214\207" .ascii "\345\256\232\346\211\200\344\275\277\347\224\250\347\232\204" .ascii "\345\255\227\345\271\225\346\226\207\344\273\266\357\274\210" .ascii "\345\217\246\350\247\201 -subfps\343\200\201-subdelay\357\274" .ascii "\211\n -playlist <\346\226\207\344\273\266> \346\214\207\345" .ascii "\256\232\346\222\255\346\224\276\345\210\227\350\241\250\346" .ascii "\226\207\344\273\266\n -vid x -aid y \351\200\211\346\213" .ascii "\251\346\222\255\346\224\276\350\247\206\351\242\221\346\265" .ascii "\201\357\274\210x\357\274\211\345\222\214\351\237\263\351\242" .ascii "\221\346\265\201\357\274\210y\357\274\211\n -fps x -srate y " .ascii " \346\224\271\345\217\230\350\247\206\351\242\221\345\270\247" .ascii "\347\216\207\344\270\272 x\357\274\210fps\357\274\211\357\274" .ascii "\214\351\237\263\351\242\221\351\207\207\346\240\267\347\216" .ascii "\207\344\270\272 y\357\274\210Hz\357\274\211\n -pp <\350\264" .ascii "\250\351\207\217> \345\220\257\347\224\250\345\220\216" .ascii "\346\234\237\345\244\204\347\220\206\350\277\207\346\273\244" .ascii "\345\231\250\357\274\210\350\257\246\350\247\201\344\272\216" .ascii "\346\211\213\345\206\214\347\233\270\345\205\263\351\241\265" .ascii "\351\235\242\357\274\211\n -framedrop \345\220\257\347" .ascii "\224\250\344\270\242\345\270\247\357\274\210\347\224\250\344" .ascii "\272\216\350\277\220\350\241\214\346\205\242\347\232\204\346" .ascii "\234\272\345\231\250\357\274\211\n\n\345\237\272\346\234\254" .ascii "\346\216\247\345\210\266\351\224\256\357\274\232 \357\274" .ascii "\210\345\256\214\346\225\264\345\210\227\350\241\250\350\247" .ascii "\201\346\211\213\345\206\214\347\233\270\345\205\263\351\241" .ascii "\265\351\235\242\357\274\214\344\271\237\350\257\267\346\237" .ascii "\245\351\230\205 input.conf\357\274\211\n <- \346\210\226 " .ascii "-> \345\220\216\351\200\200/\345\277\253\350\277\233 1" .ascii "0 \347\247\222\n \344\270\212 \346\210\226 \344\270\213 " .ascii " \345\220\216\351\200\200/\345\277\253\350\277\233 1 \345" .ascii "\210\206\351\222\237\n pgdown \346\210\226 pgup \345\220\216" .ascii "\351\200\200/\345\277\253\350\277\233 10 \345\210\206\351\222" .ascii "\237\n < \346\210\226 > \350\267\263\345\210\260\346" .ascii "\222\255\346\224\276\345\210\227\350\241\250\344\270\255\347" .ascii "\232\204\345\211\215\344\270\200\344\270\252/\345\220\216\344" .ascii "\270\200\344\270\252\n p \346\210\226 \347\251\272\346\240\274" .ascii "\351\224\256 \346\232\202\345\201\234\345\275\261\347\211" .ascii "\207\357\274\210\346\214\211\344\273\273\346\204\217\351\224" .ascii "\256\347\273\247\347\273\255\357\274\211\n q \346\210\226 ES" .ascii "C \345\201\234\346\255\242\346\222\255\346\224\276\345" .ascii "\271\266\351\200\200\345\207\272\347\250\213\345\272\217\n +" .ascii " \346\210\226 - \351\237\263\351\242\221\345\273\266" .ascii "\350\277\237 +/- 0.1 \347\247\222\n o \345\276" .ascii "\252\347\216\257\345\210\207\346\215\242 OSD \346\250\241\345" .ascii "\274\217\357\274\232\346\227\240/\345\256\232\344\275\215\346" .ascii "\235\241/\345\256\232\344\275\215\346\235\241\345\212\240\350" .ascii "\256\241\346\227\266\345\231\250\n * \346\210\226 / " .string " \345\242\236\345\212\240\346\210\226\345\207\217\345\260\221 PCM \351\237\263\351\207\217\n x \346\210\226 z \345\255\227\345\271\225\345\273\266\350\277\237 +/- 0.1 \347\247\222\n r \346\210\226 t \345\255\227\345\271\225\344\275\215\347\275\256\344\270\212\347\247\273/\344\270\213\347\247\273\357\274\214\345\217\246\350\247\201\342\200\234-vf expand\342\200\235\n\n * * * \345\217\202\350\247\201\346\211\213\345\206\214\347\233\270\345\205\263\351\241\265\351\235\242\345\217\257\350\216\267\345\217\226\345\205\267\344\275\223\345\206\205\345\256\271\357\274\214\345\217\212\346\233\264\345\244\232\357\274\210\351\253\230\347\272\247\357\274\211\351\200\211\351\241\271\345\222\214\346\216\247\345\210\266\351\224\256\347\232\204\344\277\241\346\201\257 * * *\n\n" ```
### Human: Write a random program in ARM assembly### Assistant: ``` .text .global POINTS .section .rodata .align 2 .type POINTS, %object .size POINTS, 4 POINTS: .word 200 .global Sang .align 2 .type Sang, %object .size Sang, 4 Sang: .word 1065747481 .global ang_channel .align 2 .type ang_channel, %object .size ang_channel, 4 ang_channel: .word 1018104468 .global texture_step .align 2 .type texture_step, %object .size texture_step, 4 texture_step: .word 1000647119 .global angle_step .align 2 .type angle_step, %object .size angle_step, 4 angle_step: .word 1001154314 .global R .align 2 .type R, %object .size R, 4 R: .word 1073741824 .global oy .align 2 .type oy, %object .size oy, 4 oy: .word 1065353216 ```
### Human: Write a random program in ARM assembly### Assistant: ``` .text .global QueueNode .bss .align 3 .type QueueNode, %object .size QueueNode, 16 QueueNode: .zero 16 .global Queue .align 3 .type Queue, %object .size Queue, 16 Queue: .zero 16 ```
### Human: Write a random program in ARM assembly### Assistant: ``` .text .section .rodata .align 3 .LC0: .string "Enter a number = " .align 3 .LC1: .string "%d" .align 3 .LC2: .string "%d " .text .align 2 .global main .type main, %function main: .LFB0: .cfi_startproc stp x29, x30, [sp, -32]! .cfi_def_cfa_offset 32 .cfi_offset 29, -32 .cfi_offset 30, -24 mov x29, sp adrp x0, :got:__stack_chk_guard ldr x0, [x0, #:got_lo12:__stack_chk_guard] ldr x1, [x0] str x1, [sp, 24] mov x1, 0 adrp x0, .LC0 add x0, x0, :lo12:.LC0 bl printf add x0, sp, 16 mov x1, x0 adrp x0, .LC1 add x0, x0, :lo12:.LC1 bl __isoc99_scanf mov w0, 2 str w0, [sp, 20] b .L2 .L5: ldr w0, [sp, 20] and w0, w0, 1 cmp w0, 0 bne .L8 ldr w1, [sp, 20] adrp x0, .LC2 add x0, x0, :lo12:.LC2 bl printf b .L4 .L8: nop .L4: ldr w0, [sp, 20] add w0, w0, 1 str w0, [sp, 20] .L2: ldr w0, [sp, 16] ldr w1, [sp, 20] cmp w1, w0 ble .L5 mov w0, 0 mov w1, w0 adrp x0, :got:__stack_chk_guard ldr x0, [x0, #:got_lo12:__stack_chk_guard] ldr x3, [sp, 24] ldr x2, [x0] subs x3, x3, x2 mov x2, 0 beq .L7 bl __stack_chk_fail .L7: mov w0, w1 ldp x29, x30, [sp], 32 .cfi_restore 30 .cfi_restore 29 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE0: .size main, .-main ```
### Human: Write a random program in ARM assembly### Assistant: ``` .text .align 2 .global main .type main, %function main: .LFB0: .cfi_startproc stp x29, x30, [sp, -80]! .cfi_def_cfa_offset 80 .cfi_offset 29, -80 .cfi_offset 30, -72 mov x29, sp adrp x0, :got:__stack_chk_guard ldr x0, [x0, #:got_lo12:__stack_chk_guard] ldr x1, [x0] str x1, [sp, 72] mov x1, 0 stp xzr, xzr, [sp, 32] stp xzr, xzr, [sp, 48] str xzr, [sp, 64] mov w0, 1 str w0, [sp, 32] mov w0, 1 str w0, [sp, 36] mov w0, 2 str w0, [sp, 28] b .L2 .L3: ldr w0, [sp, 28] sub w0, w0, #1 sxtw x0, w0 lsl x0, x0, 2 add x1, sp, 32 ldr w1, [x1, x0] ldr w0, [sp, 28] sub w0, w0, #2 sxtw x0, w0 lsl x0, x0, 2 add x2, sp, 32 ldr w0, [x2, x0] add w2, w1, w0 ldrsw x0, [sp, 28] lsl x0, x0, 2 add x1, sp, 32 str w2, [x1, x0] ldr w0, [sp, 28] add w0, w0, 1 str w0, [sp, 28] .L2: ldr w0, [sp, 28] cmp w0, 8 ble .L3 str wzr, [sp, 28] b .L4 .L5: ldrsw x0, [sp, 28] lsl x0, x0, 2 add x1, sp, 32 ldr w0, [x1, x0] bl print ldr w0, [sp, 28] add w0, w0, 1 str w0, [sp, 28] .L4: ldr w0, [sp, 28] cmp w0, 8 ble .L5 nop adrp x0, :got:__stack_chk_guard ldr x0, [x0, #:got_lo12:__stack_chk_guard] ldr x2, [sp, 72] ldr x1, [x0] subs x2, x2, x1 mov x1, 0 beq .L6 bl __stack_chk_fail .L6: ldp x29, x30, [sp], 80 .cfi_restore 30 .cfi_restore 29 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE0: .size main, .-main ```
### Human: Write a random program in ARM assembly### Assistant: ``` .text .align 2 .global init_mxs_image_type .type init_mxs_image_type, %function init_mxs_image_type: .LFB0: .cfi_startproc nop ret .cfi_endproc .LFE0: .size init_mxs_image_type, .-init_mxs_image_type ```
### Human: Write a random program in ARM assembly### Assistant: ``` .text .section .rodata .align 3 .LC0: .string "Enter the value from keybord : " .align 3 .LC1: .string "%d" .align 3 .LC2: .string "Sum : %d" .text .align 2 .global main .type main, %function main: .LFB0: .cfi_startproc stp x29, x30, [sp, -48]! .cfi_def_cfa_offset 48 .cfi_offset 29, -48 .cfi_offset 30, -40 mov x29, sp adrp x0, :got:__stack_chk_guard ldr x0, [x0, #:got_lo12:__stack_chk_guard] ldr x1, [x0] str x1, [sp, 40] mov x1, 0 adrp x0, .LC0 add x0, x0, :lo12:.LC0 bl printf add x0, sp, 28 mov x1, x0 adrp x0, .LC1 add x0, x0, :lo12:.LC1 bl __isoc99_scanf mov w0, 1 str w0, [sp, 32] b .L2 .L3: ldr w1, [sp, 36] ldr w0, [sp, 32] add w0, w1, w0 str w0, [sp, 36] ldr w0, [sp, 32] add w0, w0, 1 str w0, [sp, 32] .L2: ldr w0, [sp, 28] ldr w1, [sp, 32] cmp w1, w0 ble .L3 ldr w1, [sp, 36] adrp x0, .LC2 add x0, x0, :lo12:.LC2 bl printf mov w0, 0 mov w1, w0 adrp x0, :got:__stack_chk_guard ldr x0, [x0, #:got_lo12:__stack_chk_guard] ldr x3, [sp, 40] ldr x2, [x0] subs x3, x3, x2 mov x2, 0 beq .L5 bl __stack_chk_fail .L5: mov w0, w1 ldp x29, x30, [sp], 48 .cfi_restore 30 .cfi_restore 29 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE0: .size main, .-main ```
### Human: Write a random program in ARM assembly### Assistant: ``` .text .section .rodata .align 3 .LC0: .string "vfork-link" .align 3 .LC1: .string "vfork" .align 3 .LC2: .string "link" .align 3 .LC3: .string "ok" .text .align 2 .global main .type main, %function main: .LFB0: .cfi_startproc stp x29, x30, [sp, -48]! .cfi_def_cfa_offset 48 .cfi_offset 29, -48 .cfi_offset 30, -40 mov x29, sp str w0, [sp, 28] str x1, [sp, 16] adrp x0, .LC0 add x1, x0, :lo12:.LC0 adrp x0, .LC1 add x0, x0, :lo12:.LC1 bl link str w0, [sp, 44] ldr w0, [sp, 44] cmn w0, #1 bne .L2 adrp x0, .LC2 add x0, x0, :lo12:.LC2 bl perror bl __errno_location ldr w0, [x0] b .L3 .L2: adrp x0, .LC3 add x0, x0, :lo12:.LC3 bl puts mov w0, 0 .L3: ldp x29, x30, [sp], 48 .cfi_restore 30 .cfi_restore 29 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE0: .size main, .-main ```
### Human: Write a random program in ARM assembly### Assistant: ``` .text .section .rodata .align 3 .LC0: .string "Couldn't read stdin.\n" .align 3 .LC1: .string "%lu " .align 3 .LC2: .string "%s" .align 3 .LC3: .string "head" .align 3 .LC4: .string "head input was too small\n" .align 3 .LC5: .string "surprise!\n" .align 3 .LC6: .string "Usage: %s\nText utility - accepts commands on stdin and prints results to stdout:\n" .align 3 .LC7: .string "\tInput | Output\n" .align 3 .LC8: .string "\t----------------+-----------------------\n" .align 3 .LC9: .string "\tec<string> | <string> (simple echo)\n" .align 3 .LC10: .string "\thead<N><string> | The first <N> bytes of <string>\n" .align 3 .LC11: .string "\tc<string> | The length of <string>, followed by <string>\n" .text .align 2 .global main .type main, %function main: .LFB6: .cfi_startproc stp x29, x30, [sp, -160]! .cfi_def_cfa_offset 160 .cfi_offset 29, -160 .cfi_offset 30, -152 mov x29, sp str w0, [sp, 28] str x1, [sp, 16] adrp x0, :got:__stack_chk_guard ldr x0, [x0, #:got_lo12:__stack_chk_guard] ldr x1, [x0] str x1, [sp, 152] mov x1, 0 stp xzr, xzr, [sp, 48] add x0, sp, 64 movi v0.4s, 0 stp q0, q0, [x0] stp q0, q0, [x0, 32] str q0, [x0, 64] fmov w1, s0 str w1, [x0, 80] add x0, sp, 48 mov x2, 100 mov x1, x0 mov w0, 0 bl read cmp x0, 0 bge .L2 adrp x0, :got:stderr ldr x0, [x0, #:got_lo12:stderr] ldr x0, [x0] mov x3, x0 mov x2, 21 mov x1, 1 adrp x0, .LC0 add x0, x0, :lo12:.LC0 bl fwrite .L2: ldrb w0, [sp, 48] cmp w0, 99 bne .L3 mov x0, 102 bl malloc str x0, [sp, 40] add x0, sp, 48 bl strlen sub x0, x0, #1 mov x2, x0 adrp x0, .LC1 add x1, x0, :lo12:.LC1 ldr x0, [sp, 40] bl sprintf add x0, sp, 48 add x0, x0, 1 mov x1, x0 ldr x0, [sp, 40] bl strcat ldr x1, [sp, 40] adrp x0, .LC2 add x0, x0, :lo12:.LC2 bl printf ldr x0, [sp, 40] bl free b .L4 .L3: ldrb w0, [sp, 48] cmp w0, 101 bne .L5 ldrb w0, [sp, 49] cmp w0, 99 bne .L5 add x0, sp, 48 add x0, x0, 2 bl printf b .L4 .L5: add x3, sp, 48 mov x2, 4 adrp x0, .LC3 add x1, x0, :lo12:.LC3 mov x0, x3 bl strncmp cmp w0, 0 bne .L6 add x0, sp, 48 bl strlen cmp x0, 5 bls .L7 ldrb w0, [sp, 52] sxtw x0, w0 add x1, sp, 48 strb wzr, [x1, x0] add x0, sp, 48 add x0, x0, 4 mov x1, x0 adrp x0, .LC2 add x0, x0, :lo12:.LC2 bl printf b .L4 .L7: adrp x0, :got:stderr ldr x0, [x0, #:got_lo12:stderr] ldr x0, [x0] mov x3, x0 mov x2, 25 mov x1, 1 adrp x0, .LC4 add x0, x0, :lo12:.LC4 bl fwrite b .L4 .L6: add x2, sp, 48 adrp x0, .LC5 add x1, x0, :lo12:.LC5 mov x0, x2 bl strcmp cmp w0, 0 bne .L8 mov x0, 1 mov w1, 2 strb w1, [x0] b .L4 .L8: adrp x0, :got:stderr ldr x0, [x0, #:got_lo12:stderr] ldr x3, [x0] ldr x0, [sp, 16] ldr x0, [x0] mov x2, x0 adrp x0, .LC6 add x1, x0, :lo12:.LC6 mov x0, x3 bl fprintf adrp x0, :got:stderr ldr x0, [x0, #:got_lo12:stderr] ldr x0, [x0] mov x3, x0 mov x2, 26 mov x1, 1 adrp x0, .LC7 add x0, x0, :lo12:.LC7 bl fwrite adrp x0, :got:stderr ldr x0, [x0, #:got_lo12:stderr] ldr x0, [x0] mov x3, x0 mov x2, 42 mov x1, 1 adrp x0, .LC8 add x0, x0, :lo12:.LC8 bl fwrite adrp x0, :got:stderr ldr x0, [x0, #:got_lo12:stderr] ldr x0, [x0] mov x3, x0 mov x2, 42 mov x1, 1 adrp x0, .LC9 add x0, x0, :lo12:.LC9 bl fwrite adrp x0, :got:stderr ldr x0, [x0, #:got_lo12:stderr] ldr x0, [x0] mov x3, x0 mov x2, 51 mov x1, 1 adrp x0, .LC10 add x0, x0, :lo12:.LC10 bl fwrite adrp x0, :got:stderr ldr x0, [x0, #:got_lo12:stderr] ldr x0, [x0] mov x3, x0 mov x2, 64 mov x1, 1 adrp x0, .LC11 add x0, x0, :lo12:.LC11 bl fwrite .L4: mov w0, 0 mov w1, w0 adrp x0, :got:__stack_chk_guard ldr x0, [x0, #:got_lo12:__stack_chk_guard] ldr x3, [sp, 152] ldr x2, [x0] subs x3, x3, x2 mov x2, 0 beq .L10 bl __stack_chk_fail .L10: mov w0, w1 ldp x29, x30, [sp], 160 .cfi_restore 30 .cfi_restore 29 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE6: .size main, .-main ```
### Human: Write a random program in ARM assembly### Assistant: ``` .text .align 2 .global f .type f, %function f: .LFB0: .cfi_startproc sub sp, sp, #16 .cfi_def_cfa_offset 16 str x0, [sp, 8] ldr x0, [sp, 8] cmp x0, 0 beq .L2 ldr x0, [sp, 8] ldr w0, [x0] cmn w0, #1 bne .L2 ldr x0, [sp, 8] ldr w0, [x0, 4] cmn w0, #1 bne .L2 mov w0, 1 b .L4 .L2: mov w0, 0 .L4: add sp, sp, 16 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE0: .size f, .-f .align 2 .global main .type main, %function main: .LFB1: .cfi_startproc stp x29, x30, [sp, -48]! .cfi_def_cfa_offset 48 .cfi_offset 29, -48 .cfi_offset 30, -40 mov x29, sp adrp x0, :got:__stack_chk_guard ldr x0, [x0, #:got_lo12:__stack_chk_guard] ldr x1, [x0] str x1, [sp, 40] mov x1, 0 mov w0, -1 str w0, [sp, 28] ldr w0, [sp, 28] str w0, [sp, 24] add x0, sp, 24 bl f cmp w0, 0 bne .L6 bl abort .L6: mov w0, 0 bl exit .cfi_endproc .LFE1: .size main, .-main ```
### Human: Write a random program in ARM assembly### Assistant: ``` .text .section .rodata .align 3 .LC0: .string "%d" .align 3 .LC1: .string "reszta z dzieleniea to :%d \n" .text .align 2 .global main .type main, %function main: .LFB0: .cfi_startproc stp x29, x30, [sp, -32]! .cfi_def_cfa_offset 32 .cfi_offset 29, -32 .cfi_offset 30, -24 mov x29, sp adrp x0, :got:__stack_chk_guard ldr x0, [x0, #:got_lo12:__stack_chk_guard] ldr x1, [x0] str x1, [sp, 24] mov x1, 0 add x0, sp, 16 mov x1, x0 adrp x0, .LC0 add x0, x0, :lo12:.LC0 bl __isoc99_scanf ldr w1, [sp, 16] mov w0, 21846 movk w0, 0x5555, lsl 16 smull x0, w1, w0 lsr x2, x0, 32 asr w0, w1, 31 sub w2, w2, w0 mov w0, w2 lsl w0, w0, 1 add w0, w0, w2 sub w0, w1, w0 str w0, [sp, 20] ldr w1, [sp, 20] adrp x0, .LC1 add x0, x0, :lo12:.LC1 bl printf ldr w1, [sp, 16] mov w0, 21846 movk w0, 0x5555, lsl 16 smull x0, w1, w0 lsr x2, x0, 32 asr w0, w1, 31 sub w2, w2, w0 mov w0, w2 lsl w0, w0, 1 add w0, w0, w2 sub w2, w1, w0 mov w1, w2 adrp x0, :got:__stack_chk_guard ldr x0, [x0, #:got_lo12:__stack_chk_guard] ldr x3, [sp, 24] ldr x2, [x0] subs x3, x3, x2 mov x2, 0 beq .L3 bl __stack_chk_fail .L3: mov w0, w1 ldp x29, x30, [sp], 32 .cfi_restore 30 .cfi_restore 29 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE0: .size main, .-main ```
### Human: Write a random program in ARM assembly### Assistant: ``` .text .align 2 .global fn1 .type fn1, %function fn1: .LFB0: .cfi_startproc nop ret .cfi_endproc .LFE0: .size fn1, .-fn1 .align 2 .global fn2 .type fn2, %function fn2: .LFB1: .cfi_startproc sub sp, sp, #16 .cfi_def_cfa_offset 16 str wzr, [sp, 12] nop add sp, sp, 16 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE1: .size fn2, .-fn2 .align 2 .global fn3 .type fn3, %function fn3: .LFB2: .cfi_startproc nop ret .cfi_endproc .LFE2: .size fn3, .-fn3 .align 2 .global fn4 .type fn4, %function fn4: .LFB3: .cfi_startproc nop ret .cfi_endproc .LFE3: .size fn4, .-fn4 .align 2 .global fn5 .type fn5, %function fn5: .LFB4: .cfi_startproc nop ret .cfi_endproc .LFE4: .size fn5, .-fn5 ```
### Human: Write a random program in ARM assembly### Assistant: ``` .text .section .rodata .align 3 .LC0: .string "Ex 1. O resultado l\303\263gico \303\251: %i\n" .align 3 .LC1: .string "Ex 2. O resultado l\303\263gico \303\251: %i\n" .align 3 .LC2: .string "Ex 3. O resultado l\303\263gico \303\251: %i\n" .align 3 .LC3: .string "Ex 4. O resultado l\303\263gico \303\251: %i\n" .align 3 .LC4: .string "Ex 5. O resultado l\303\263gico \303\251: %i\n" .align 3 .LC5: .string "Ex 6. O resultado l\303\263gico \303\251: %i\n" .align 3 .LC6: .string "Ex 7. O resultado l\303\263gico \303\251: %i\n" .align 3 .LC7: .string "Ex 8. O resultado l\303\263gico \303\251: %i\n" .align 3 .LC8: .string "Ex 9. O resultado l\303\263gico \303\251: %i\n" .align 3 .LC9: .string "Ex 10. O resultado l\303\263gico \303\251: %i\n" .align 3 .LC10: .string "Ex 11. O resultado l\303\263gico \303\251: %i\n" .align 3 .LC11: .string "Ex 12. O resultado l\303\263gico \303\251: %i\n" .align 3 .LC12: .string "Ex 13. O resultado l\303\263gico \303\251: %i\n" .align 3 .LC13: .string "Ex 14. O resultado l\303\263gico \303\251: %i\n" .text .align 2 .global main .type main, %function main: .LFB0: .cfi_startproc stp x29, x30, [sp, -32]! .cfi_def_cfa_offset 32 .cfi_offset 29, -32 .cfi_offset 30, -24 mov x29, sp mov w1, 1 adrp x0, .LC0 add x0, x0, :lo12:.LC0 bl printf mov w1, 0 adrp x0, .LC1 add x0, x0, :lo12:.LC1 bl printf mov w1, 1 adrp x0, .LC2 add x0, x0, :lo12:.LC2 bl printf mov w1, 0 adrp x0, .LC3 add x0, x0, :lo12:.LC3 bl printf mov w1, 0 adrp x0, .LC4 add x0, x0, :lo12:.LC4 bl printf mov w1, 0 adrp x0, .LC5 add x0, x0, :lo12:.LC5 bl printf mov w0, 115 strb w0, [sp, 31] ldrb w0, [sp, 31] cmp w0, 115 cset w0, eq and w0, w0, 255 mov w1, w0 adrp x0, .LC6 add x0, x0, :lo12:.LC6 bl printf ldrb w0, [sp, 31] cmp w0, 113 cset w0, ne and w0, w0, 255 mov w1, w0 adrp x0, .LC7 add x0, x0, :lo12:.LC7 bl printf mov w1, 1 adrp x0, .LC8 add x0, x0, :lo12:.LC8 bl printf mov w1, 1 adrp x0, .LC9 add x0, x0, :lo12:.LC9 bl printf mov w1, 1 adrp x0, .LC10 add x0, x0, :lo12:.LC10 bl printf mov w1, 0 adrp x0, .LC11 add x0, x0, :lo12:.LC11 bl printf mov w1, 1 adrp x0, .LC12 add x0, x0, :lo12:.LC12 bl printf mov w1, 1 adrp x0, .LC13 add x0, x0, :lo12:.LC13 bl printf mov w0, 0 ldp x29, x30, [sp], 32 .cfi_restore 30 .cfi_restore 29 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE0: .size main, .-main ```
### Human: Write a random program in ARM assembly### Assistant: ``` .text .global planes .data .align 2 .type planes, %object .size planes, 4 planes: .word 4 .section .rodata .align 3 .LC0: .string "#ifndef _GAMMA_H_\n#define _GAMMA_H_\n\n#include <avr/pgmspace.h>\n\nstatic const uint8_t PROGMEM gamma[] = {\n " .align 3 .LC1: .string "0x%02x" .align 3 .LC2: .string ",\n " .align 3 .LC3: .string "," .align 3 .LC4: .string "\n};\n\n#endif // _GAMMA_H_" .text .align 2 .global main .type main, %function main: .LFB0: .cfi_startproc stp x29, x30, [sp, -48]! .cfi_def_cfa_offset 48 .cfi_offset 29, -48 .cfi_offset 30, -40 mov x29, sp str w0, [sp, 28] str x1, [sp, 16] ldr w0, [sp, 28] cmp w0, 1 ble .L2 ldr x0, [sp, 16] add x0, x0, 8 ldr x0, [x0] bl atoi mov w1, w0 adrp x0, planes add x0, x0, :lo12:planes str w1, [x0] .L2: adrp x0, planes add x0, x0, :lo12:planes ldr w0, [x0] mov w1, 1 lsl w0, w1, w0 sub w0, w0, #1 str w0, [sp, 44] adrp x0, .LC0 add x0, x0, :lo12:.LC0 bl printf str wzr, [sp, 40] b .L3 .L7: ldr s0, [sp, 40] scvtf s0, s0 fcvt d0, s0 mov x0, 246290604621824 movk x0, 0x406f, lsl 48 fmov d1, x0 fdiv d0, d0, d1 fmov d1, 2.5e+0 bl pow fmov d1, d0 ldr s0, [sp, 44] scvtf s0, s0 fcvt d0, s0 fmul d1, d1, d0 fmov d0, 5.0e-1 fadd d0, d1, d0 fcvtzs w0, d0 mov w1, w0 adrp x0, .LC1 add x0, x0, :lo12:.LC1 bl printf ldr w0, [sp, 40] cmp w0, 254 bgt .L4 ldr w0, [sp, 40] and w0, w0, 7 cmp w0, 7 bne .L5 adrp x0, .LC2 add x0, x0, :lo12:.LC2 b .L6 .L5: adrp x0, .LC3 add x0, x0, :lo12:.LC3 .L6: bl printf .L4: ldr w0, [sp, 40] add w0, w0, 1 str w0, [sp, 40] .L3: ldr w0, [sp, 40] cmp w0, 255 ble .L7 adrp x0, .LC4 add x0, x0, :lo12:.LC4 bl puts mov w0, 0 ldp x29, x30, [sp], 48 .cfi_restore 30 .cfi_restore 29 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE0: .size main, .-main ```
### Human: Write a random program in ARM assembly### Assistant: ``` .text .section .rodata .align 3 .LC0: .string "fahr" .align 3 .LC1: .string "celsius" .align 3 .LC2: .string "%6s\t%3s\n" .align 3 .LC3: .string "%6.1f\t%3.0f\n" .text .align 2 .global main .type main, %function main: .LFB0: .cfi_startproc stp x29, x30, [sp, -48]! .cfi_def_cfa_offset 48 .cfi_offset 29, -48 .cfi_offset 30, -40 mov x29, sp str wzr, [sp, 32] mov w0, 1133903872 fmov s0, w0 str s0, [sp, 36] fmov s0, 2.0e+1 str s0, [sp, 40] ldr s0, [sp, 32] str s0, [sp, 28] adrp x0, .LC0 add x2, x0, :lo12:.LC0 adrp x0, .LC1 add x1, x0, :lo12:.LC1 adrp x0, .LC2 add x0, x0, :lo12:.LC2 bl printf b .L2 .L3: ldr s0, [sp, 28] fcvt d0, s0 adrp x0, .LC4 ldr d1, [x0, #:lo12:.LC4] fmul d0, d0, d1 mov x0, 4629700416936869888 fmov d1, x0 fadd d0, d0, d1 fcvt s0, d0 str s0, [sp, 44] ldr s0, [sp, 28] fcvt d2, s0 ldr s0, [sp, 44] fcvt d0, s0 fmov d1, d0 fmov d0, d2 adrp x0, .LC3 add x0, x0, :lo12:.LC3 bl printf ldr s1, [sp, 28] ldr s0, [sp, 40] fadd s0, s1, s0 str s0, [sp, 28] .L2: ldr s1, [sp, 28] ldr s0, [sp, 36] fcmpe s1, s0 bls .L3 mov w0, 0 ldp x29, x30, [sp], 48 .cfi_restore 30 .cfi_restore 29 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE0: .size main, .-main .section .rodata .align 3 .LC4: .word -858993459 .word 1073532108 ```
### Human: Write a random program in ARM assembly### Assistant: ``` .text .section .rodata .align 3 .LC0: .string "Yes" .align 3 .LC1: .string "%d" .align 3 .LC2: .string "No" .text .align 2 .global main .type main, %function main: .LFB0: .cfi_startproc stp x29, x30, [sp, -32]! .cfi_def_cfa_offset 32 .cfi_offset 29, -32 .cfi_offset 30, -24 mov x29, sp mov w0, 23 str w0, [sp, 28] mov w0, -23 strb w0, [sp, 27] ldrsb w0, [sp, 27] ldr w1, [sp, 28] cmp w1, w0 bls .L2 adrp x0, .LC0 add x0, x0, :lo12:.LC0 bl puts b .L3 .L2: ldrsb w0, [sp, 27] ldr w1, [sp, 28] cmp w1, w0 bcs .L3 ldrsb w1, [sp, 27] ldr w0, [sp, 28] sub w0, w1, w0 mov w1, w0 adrp x0, .LC1 add x0, x0, :lo12:.LC1 bl printf adrp x0, .LC2 add x0, x0, :lo12:.LC2 bl puts .L3: mov w0, 0 ldp x29, x30, [sp], 32 .cfi_restore 30 .cfi_restore 29 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE0: .size main, .-main ```
### Human: Write a random program in ARM assembly### Assistant: ``` .text .align 2 .global __libc_sa_len .type __libc_sa_len, %function __libc_sa_len: .LFB6: .cfi_startproc sub sp, sp, #16 .cfi_def_cfa_offset 16 strh w0, [sp, 14] ldrh w0, [sp, 14] cmp w0, 10 beq .L2 cmp w0, 10 bgt .L3 cmp w0, 4 beq .L4 cmp w0, 4 bgt .L3 cmp w0, 1 beq .L5 cmp w0, 2 bne .L3 mov w0, 16 b .L6 .L2: mov w0, 28 b .L6 .L4: mov w0, 16 b .L6 .L5: mov w0, 110 b .L6 .L3: mov w0, 0 .L6: add sp, sp, 16 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE6: .size __libc_sa_len, .-__libc_sa_len ```
### Human: Write a random program in ARM assembly### Assistant: ``` .text .section .rodata .align 3 .LC1: .string "Original array is: " .align 3 .LC2: .string "Sorted array is: " .text .align 2 .global main .type main, %function main: .LFB0: .cfi_startproc stp x29, x30, [sp, -64]! .cfi_def_cfa_offset 64 .cfi_offset 29, -64 .cfi_offset 30, -56 mov x29, sp adrp x0, :got:__stack_chk_guard ldr x0, [x0, #:got_lo12:__stack_chk_guard] ldr x1, [x0] str x1, [sp, 56] mov x1, 0 adrp x0, .LC0 add x0, x0, :lo12:.LC0 add x2, sp, 32 mov x3, x0 ldp x0, x1, [x3] stp x0, x1, [x2] ldr w0, [x3, 16] str w0, [x2, 16] mov w0, 5 str w0, [sp, 28] adrp x0, .LC1 add x0, x0, :lo12:.LC1 bl printf add x0, sp, 32 ldr w1, [sp, 28] bl printArray add x0, sp, 32 ldr w1, [sp, 28] bl insertionsort adrp x0, .LC2 add x0, x0, :lo12:.LC2 bl printf add x0, sp, 32 ldr w1, [sp, 28] bl printArray mov w0, 0 mov w1, w0 adrp x0, :got:__stack_chk_guard ldr x0, [x0, #:got_lo12:__stack_chk_guard] ldr x3, [sp, 56] ldr x2, [x0] subs x3, x3, x2 mov x2, 0 beq .L3 bl __stack_chk_fail .L3: mov w0, w1 ldp x29, x30, [sp], 64 .cfi_restore 30 .cfi_restore 29 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE0: .size main, .-main .section .rodata .align 3 .LC0: .word 88 .word 44 .word 66 .word 22 .word 100 .text .align 2 .global insertionsort .type insertionsort, %function insertionsort: .LFB1: .cfi_startproc sub sp, sp, #32 .cfi_def_cfa_offset 32 str x0, [sp, 8] str w1, [sp, 4] mov w0, 1 str w0, [sp, 20] b .L5 .L9: ldrsw x0, [sp, 20] lsl x0, x0, 2 ldr x1, [sp, 8] add x0, x1, x0 ldr w0, [x0] str w0, [sp, 28] ldr w0, [sp, 20] sub w0, w0, #1 str w0, [sp, 24] b .L6 .L8: ldrsw x0, [sp, 24] lsl x0, x0, 2 ldr x1, [sp, 8] add x1, x1, x0 ldrsw x0, [sp, 24] add x0, x0, 1 lsl x0, x0, 2 ldr x2, [sp, 8] add x0, x2, x0 ldr w1, [x1] str w1, [x0] ldr w0, [sp, 24] sub w0, w0, #1 str w0, [sp, 24] .L6: ldr w0, [sp, 24] cmp w0, 0 blt .L7 ldrsw x0, [sp, 24] lsl x0, x0, 2 ldr x1, [sp, 8] add x0, x1, x0 ldr w0, [x0] ldr w1, [sp, 28] cmp w1, w0 blt .L8 .L7: ldrsw x0, [sp, 24] add x0, x0, 1 lsl x0, x0, 2 ldr x1, [sp, 8] add x0, x1, x0 ldr w1, [sp, 28] str w1, [x0] ldr w0, [sp, 20] add w0, w0, 1 str w0, [sp, 20] .L5: ldr w1, [sp, 20] ldr w0, [sp, 4] cmp w1, w0 blt .L9 nop nop add sp, sp, 32 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE1: .size insertionsort, .-insertionsort .section .rodata .align 3 .LC3: .string "%d " .text .align 2 .global printArray .type printArray, %function printArray: .LFB2: .cfi_startproc stp x29, x30, [sp, -48]! .cfi_def_cfa_offset 48 .cfi_offset 29, -48 .cfi_offset 30, -40 mov x29, sp str x0, [sp, 24] str w1, [sp, 20] str wzr, [sp, 44] b .L11 .L12: ldrsw x0, [sp, 44] lsl x0, x0, 2 ldr x1, [sp, 24] add x0, x1, x0 ldr w0, [x0] mov w1, w0 adrp x0, .LC3 add x0, x0, :lo12:.LC3 bl printf ldr w0, [sp, 44] add w0, w0, 1 str w0, [sp, 44] .L11: ldr w1, [sp, 44] ldr w0, [sp, 20] cmp w1, w0 blt .L12 mov w0, 10 bl putchar nop ldp x29, x30, [sp], 48 .cfi_restore 30 .cfi_restore 29 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE2: .size printArray, .-printArray ```
### Human: Write a random program in ARM assembly### Assistant: ``` .text .section .rodata .align 3 .LC0: .string "%d -> %u \n" .text .align 2 .global main .type main, %function main: .LFB0: .cfi_startproc stp x29, x30, [sp, -32]! .cfi_def_cfa_offset 32 .cfi_offset 29, -32 .cfi_offset 30, -24 mov x29, sp mov w0, -1 str w0, [sp, 24] ldr w0, [sp, 24] str w0, [sp, 28] ldr w2, [sp, 28] ldr w1, [sp, 24] adrp x0, .LC0 add x0, x0, :lo12:.LC0 bl printf mov w0, 0 ldp x29, x30, [sp], 32 .cfi_restore 30 .cfi_restore 29 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE0: .size main, .-main ```
### Human: Write a random program in ARM assembly### Assistant: ``` .text #APP .pushsection ".debug_gdb_scripts", "MS",@progbits,1 .byte 1 .asciz "py-section-script.py" .popsection #NO_APP .align 2 .global init_ss .type init_ss, %function init_ss: .LFB0: .cfi_startproc sub sp, sp, #16 .cfi_def_cfa_offset 16 str x0, [sp, 8] str w1, [sp, 4] str w2, [sp] ldr x0, [sp, 8] ldr w1, [sp, 4] str w1, [x0] ldr x0, [sp, 8] ldr w1, [sp] str w1, [x0, 4] nop add sp, sp, 16 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE0: .size init_ss, .-init_ss .align 2 .global main .type main, %function main: .LFB1: .cfi_startproc stp x29, x30, [sp, -32]! .cfi_def_cfa_offset 32 .cfi_offset 29, -32 .cfi_offset 30, -24 mov x29, sp adrp x0, :got:__stack_chk_guard ldr x0, [x0, #:got_lo12:__stack_chk_guard] ldr x1, [x0] str x1, [sp, 24] mov x1, 0 add x0, sp, 16 mov w2, 2 mov w1, 1 bl init_ss mov w0, 0 mov w1, w0 adrp x0, :got:__stack_chk_guard ldr x0, [x0, #:got_lo12:__stack_chk_guard] ldr x3, [sp, 24] ldr x2, [x0] subs x3, x3, x2 mov x2, 0 beq .L4 bl __stack_chk_fail .L4: mov w0, w1 ldp x29, x30, [sp], 32 .cfi_restore 30 .cfi_restore 29 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE1: .size main, .-main ```
### Human: Write a random program in ARM assembly### Assistant: ``` .text .section .rodata .align 3 .LC0: .string "/dev/sdb" .align 3 .LC1: .string "Open /dev/sdb failed, %d.\n" .align 3 .LC2: .string "%d" .align 3 .LC3: .string "failed to write num_buf" .align 3 .LC4: .string "/sys/kernel/config/kafka/bdev" .align 3 .LC5: .string "write bdev failed, %d\n" .align 3 .LC6: .string "failed to write %d : %s to bdev, because count %d != ret %d" .align 3 .LC7: .string "in out3" .align 3 .LC8: .string "in out2" .text .align 2 .global main .type main, %function main: .LFB6: .cfi_startproc stp x29, x30, [sp, -208]! .cfi_def_cfa_offset 208 .cfi_offset 29, -208 .cfi_offset 30, -200 mov x29, sp adrp x0, :got:__stack_chk_guard ldr x0, [x0, #:got_lo12:__stack_chk_guard] ldr x1, [x0] str x1, [sp, 200] mov x1, 0 stp xzr, xzr, [sp, 40] add x0, sp, 56 movi v0.4s, 0 stp q0, q0, [x0] stp q0, q0, [x0, 32] stp q0, q0, [x0, 64] stp q0, q0, [x0, 96] str q0, [x0, 124] mov w1, 2 adrp x0, .LC0 add x0, x0, :lo12:.LC0 bl open str w0, [sp, 24] ldr w0, [sp, 24] cmp w0, 0 bge .L2 ldr w1, [sp, 24] adrp x0, .LC1 add x0, x0, :lo12:.LC1 bl printf b .L3 .L2: add x4, sp, 40 ldr w3, [sp, 24] adrp x0, .LC2 add x2, x0, :lo12:.LC2 mov x1, 155 mov x0, x4 bl snprintf str w0, [sp, 28] ldr w0, [sp, 28] cmp w0, 0 bge .L4 adrp x0, .LC3 add x0, x0, :lo12:.LC3 bl puts b .L5 .L4: mov w1, 1 adrp x0, .LC4 add x0, x0, :lo12:.LC4 bl open str w0, [sp, 32] ldr w0, [sp, 32] cmp w0, 0 bge .L6 ldr w1, [sp, 32] adrp x0, .LC5 add x0, x0, :lo12:.LC5 bl printf b .L7 .L6: ldr w0, [sp, 28] add w1, w0, 1 add x0, sp, 40 mov w2, w1 mov x1, x0 ldr w0, [sp, 32] bl write str w0, [sp, 36] ldr w0, [sp, 36] sub w0, w0, #1 ldr w1, [sp, 28] cmp w1, w0 beq .L8 add x0, sp, 40 ldr w4, [sp, 36] ldr w3, [sp, 28] mov x2, x0 ldr w1, [sp, 24] adrp x0, .LC6 add x0, x0, :lo12:.LC6 bl printf .L8: bl getchar .L7: adrp x0, .LC7 add x0, x0, :lo12:.LC7 bl puts ldr w0, [sp, 32] bl close bl getchar .L5: adrp x0, .LC8 add x0, x0, :lo12:.LC8 bl puts ldr w0, [sp, 24] bl close strb w0, [sp, 23] bl getchar .L3: mov w0, 1 mov w1, w0 adrp x0, :got:__stack_chk_guard ldr x0, [x0, #:got_lo12:__stack_chk_guard] ldr x3, [sp, 200] ldr x2, [x0] subs x3, x3, x2 mov x2, 0 beq .L10 bl __stack_chk_fail .L10: mov w0, w1 ldp x29, x30, [sp], 208 .cfi_restore 30 .cfi_restore 29 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE6: .size main, .-main ```
### Human: Write a random program in ARM assembly### Assistant: ``` .text .global alpha .section .rodata .align 3 .LC0: .string "abcdefghijklmnopqrstuvwxyz" .section .data.rel.local,"aw" .align 3 .type alpha, %object .size alpha, 8 alpha: .xword .LC0 .section .rodata .align 3 .LC1: .string "Enter a character: " .align 3 .LC2: .string "%c is in alphabet\n" .align 3 .LC3: .string "is not in alphabet" .text .align 2 .global main .type main, %function main: .LFB6: .cfi_startproc stp x29, x30, [sp, -64]! .cfi_def_cfa_offset 64 .cfi_offset 29, -64 .cfi_offset 30, -56 mov x29, sp str w0, [sp, 28] str x1, [sp, 16] adrp x0, :got:__stack_chk_guard ldr x0, [x0, #:got_lo12:__stack_chk_guard] ldr x1, [x0] str x1, [sp, 56] mov x1, 0 adrp x0, .LC1 add x0, x0, :lo12:.LC1 bl printf bl getchar and w0, w0, 255 strb w0, [sp, 47] ldrb w0, [sp, 47] bl tolower and w0, w0, 255 strb w0, [sp, 47] adrp x0, alpha add x0, x0, :lo12:alpha ldr x1, [x0] add x5, sp, 47 adrp x0, comp add x4, x0, :lo12:comp mov x3, 1 mov x2, 26 mov x0, x5 bl bsearch str x0, [sp, 48] ldr x0, [sp, 48] cmp x0, 0 beq .L2 ldr x0, [sp, 48] ldrb w0, [x0] mov w1, w0 adrp x0, .LC2 add x0, x0, :lo12:.LC2 bl printf b .L3 .L2: adrp x0, .LC3 add x0, x0, :lo12:.LC3 bl puts .L3: mov w0, 0 mov w1, w0 adrp x0, :got:__stack_chk_guard ldr x0, [x0, #:got_lo12:__stack_chk_guard] ldr x3, [sp, 56] ldr x2, [x0] subs x3, x3, x2 mov x2, 0 beq .L5 bl __stack_chk_fail .L5: mov w0, w1 ldp x29, x30, [sp], 64 .cfi_restore 30 .cfi_restore 29 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE6: .size main, .-main .align 2 .global comp .type comp, %function comp: .LFB7: .cfi_startproc sub sp, sp, #16 .cfi_def_cfa_offset 16 str x0, [sp, 8] str x1, [sp] ldr x0, [sp, 8] ldrb w0, [x0] mov w1, w0 ldr x0, [sp] ldrb w0, [x0] sub w0, w1, w0 add sp, sp, 16 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE7: .size comp, .-comp ```
### Human: Write a random program in ARM assembly### Assistant: ``` .text .align 2 .global main .type main, %function main: .LFB6: .cfi_startproc stp x29, x30, [sp, -16]! .cfi_def_cfa_offset 16 .cfi_offset 29, -16 .cfi_offset 30, -8 mov x29, sp mov x0, 139637976727552 bl malloc mov w0, 5000 bl sleep mov w0, 0 ldp x29, x30, [sp], 16 .cfi_restore 30 .cfi_restore 29 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE6: .size main, .-main ```
### Human: Write a random program in ARM assembly### Assistant: ``` .text .align 2 .global function .type function, %function function: .LFB0: .cfi_startproc stp x29, x30, [sp, -32]! .cfi_def_cfa_offset 32 .cfi_offset 29, -32 .cfi_offset 30, -24 mov x29, sp str x0, [sp, 24] str w1, [sp, 20] ldrb w0, [sp, 24] add w0, w0, 3 and w0, w0, 255 strb w0, [sp, 24] ldr w0, [sp, 28] add w0, w0, 8 str w0, [sp, 28] ldr w0, [sp, 20] cmp w0, 0 bne .L2 ldrb w0, [sp, 24] mov w1, w0 ldr w0, [sp, 28] add w0, w1, w0 b .L3 .L2: ldr w0, [sp, 20] sub w0, w0, #1 mov w1, w0 ldr x0, [sp, 24] bl function .L3: ldp x29, x30, [sp], 32 .cfi_restore 30 .cfi_restore 29 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE0: .size function, .-function .align 2 .global main .type main, %function main: .LFB1: .cfi_startproc stp x29, x30, [sp, -32]! .cfi_def_cfa_offset 32 .cfi_offset 29, -32 .cfi_offset 30, -24 mov x29, sp mov w0, 1 strb w0, [sp, 24] mov w0, 2 str w0, [sp, 28] mov w1, 10 ldr x0, [sp, 24] bl function mov w1, 9 ldr x0, [sp, 24] bl function mov w1, 9 ldr x0, [sp, 24] bl function mov w1, 9 ldr x0, [sp, 24] bl function ldrb w0, [sp, 24] mov w1, w0 ldr w0, [sp, 28] add w0, w1, w0 ldp x29, x30, [sp], 32 .cfi_restore 30 .cfi_restore 29 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE1: .size main, .-main ```
### Human: Write a random program in ARM assembly### Assistant: ``` .text .align 2 .global bitcount .type bitcount, %function bitcount: .LFB0: .cfi_startproc sub sp, sp, #32 .cfi_def_cfa_offset 32 str w0, [sp, 12] str wzr, [sp, 28] str wzr, [sp, 28] b .L2 .L3: ldr w0, [sp, 28] add w0, w0, 1 str w0, [sp, 28] ldr w0, [sp, 12] sub w0, w0, #1 ldr w1, [sp, 12] and w0, w1, w0 str w0, [sp, 12] .L2: ldr w0, [sp, 12] cmp w0, 0 bne .L3 ldr w0, [sp, 28] add sp, sp, 32 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE0: .size bitcount, .-bitcount ```
### Human: Write a random program in ARM assembly### Assistant: ``` .text .align 2 .global nb_kernel201_f77_double .type nb_kernel201_f77_double, %function nb_kernel201_f77_double: .LFB0: .cfi_startproc sub sp, sp, #272 .cfi_def_cfa_offset 272 stp x29, x30, [sp, 192] .cfi_offset 29, -80 .cfi_offset 30, -72 add x29, sp, 192 str x0, [sp, 264] str x1, [sp, 256] str x2, [sp, 248] str x3, [sp, 240] str x4, [sp, 232] str x5, [sp, 224] str x6, [sp, 216] str x7, [sp, 208] ldr x0, [sp, 448] str x0, [sp, 176] ldr x0, [sp, 440] str x0, [sp, 168] ldr x0, [sp, 432] str x0, [sp, 160] ldr x0, [sp, 424] str x0, [sp, 152] ldr x0, [sp, 416] str x0, [sp, 144] ldr x0, [sp, 408] str x0, [sp, 136] ldr x0, [sp, 400] str x0, [sp, 128] ldr x0, [sp, 392] str x0, [sp, 120] ldr x0, [sp, 384] str x0, [sp, 112] ldr x0, [sp, 376] str x0, [sp, 104] ldr x0, [sp, 368] str x0, [sp, 96] ldr x0, [sp, 360] str x0, [sp, 88] ldr x0, [sp, 352] str x0, [sp, 80] ldr x0, [sp, 344] str x0, [sp, 72] ldr x0, [sp, 336] str x0, [sp, 64] ldr x0, [sp, 328] str x0, [sp, 56] ldr x0, [sp, 320] str x0, [sp, 48] ldr x0, [sp, 312] str x0, [sp, 40] ldr x0, [sp, 304] str x0, [sp, 32] ldr x0, [sp, 296] str x0, [sp, 24] ldr x0, [sp, 288] str x0, [sp, 16] ldr x0, [sp, 280] str x0, [sp, 8] ldr x0, [sp, 272] str x0, [sp] ldr x7, [sp, 208] ldr x6, [sp, 216] ldr x5, [sp, 224] ldr x4, [sp, 232] ldr x3, [sp, 240] ldr x2, [sp, 248] ldr x1, [sp, 256] ldr x0, [sp, 264] bl f77dkernel201_ nop ldp x29, x30, [sp, 192] add sp, sp, 272 .cfi_restore 29 .cfi_restore 30 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE0: .size nb_kernel201_f77_double, .-nb_kernel201_f77_double .align 2 .global nb_kernel201nf_f77_double .type nb_kernel201nf_f77_double, %function nb_kernel201nf_f77_double: .LFB1: .cfi_startproc sub sp, sp, #272 .cfi_def_cfa_offset 272 stp x29, x30, [sp, 192] .cfi_offset 29, -80 .cfi_offset 30, -72 add x29, sp, 192 str x0, [sp, 264] str x1, [sp, 256] str x2, [sp, 248] str x3, [sp, 240] str x4, [sp, 232] str x5, [sp, 224] str x6, [sp, 216] str x7, [sp, 208] ldr x0, [sp, 448] str x0, [sp, 176] ldr x0, [sp, 440] str x0, [sp, 168] ldr x0, [sp, 432] str x0, [sp, 160] ldr x0, [sp, 424] str x0, [sp, 152] ldr x0, [sp, 416] str x0, [sp, 144] ldr x0, [sp, 408] str x0, [sp, 136] ldr x0, [sp, 400] str x0, [sp, 128] ldr x0, [sp, 392] str x0, [sp, 120] ldr x0, [sp, 384] str x0, [sp, 112] ldr x0, [sp, 376] str x0, [sp, 104] ldr x0, [sp, 368] str x0, [sp, 96] ldr x0, [sp, 360] str x0, [sp, 88] ldr x0, [sp, 352] str x0, [sp, 80] ldr x0, [sp, 344] str x0, [sp, 72] ldr x0, [sp, 336] str x0, [sp, 64] ldr x0, [sp, 328] str x0, [sp, 56] ldr x0, [sp, 320] str x0, [sp, 48] ldr x0, [sp, 312] str x0, [sp, 40] ldr x0, [sp, 304] str x0, [sp, 32] ldr x0, [sp, 296] str x0, [sp, 24] ldr x0, [sp, 288] str x0, [sp, 16] ldr x0, [sp, 280] str x0, [sp, 8] ldr x0, [sp, 272] str x0, [sp] ldr x7, [sp, 208] ldr x6, [sp, 216] ldr x5, [sp, 224] ldr x4, [sp, 232] ldr x3, [sp, 240] ldr x2, [sp, 248] ldr x1, [sp, 256] ldr x0, [sp, 264] bl f77dkernel201nf_ nop ldp x29, x30, [sp, 192] add sp, sp, 272 .cfi_restore 29 .cfi_restore 30 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE1: .size nb_kernel201nf_f77_double, .-nb_kernel201nf_f77_double ```
### Human: Write a random program in ARM assembly### Assistant: ``` .text .align 2 .global romanToInt .type romanToInt, %function romanToInt: .LFB0: .cfi_startproc stp x29, x30, [sp, -48]! .cfi_def_cfa_offset 48 .cfi_offset 29, -48 .cfi_offset 30, -40 mov x29, sp str x0, [sp, 24] str wzr, [sp, 36] ldr x0, [sp, 24] bl strlen str w0, [sp, 44] str wzr, [sp, 40] b .L2 .L20: ldrsw x0, [sp, 40] ldr x1, [sp, 24] add x0, x1, x0 ldrb w0, [x0] cmp w0, 88 beq .L3 cmp w0, 88 bgt .L4 cmp w0, 86 beq .L5 cmp w0, 86 bgt .L4 cmp w0, 77 beq .L6 cmp w0, 77 bgt .L4 cmp w0, 76 beq .L7 cmp w0, 76 bgt .L4 cmp w0, 73 beq .L8 cmp w0, 73 bgt .L4 cmp w0, 67 beq .L9 cmp w0, 68 beq .L10 b .L4 .L8: ldr w0, [sp, 40] add w0, w0, 1 ldr w1, [sp, 44] cmp w1, w0 ble .L11 ldrsw x0, [sp, 40] add x0, x0, 1 ldr x1, [sp, 24] add x0, x1, x0 ldrb w0, [x0] cmp w0, 86 beq .L12 ldrsw x0, [sp, 40] add x0, x0, 1 ldr x1, [sp, 24] add x0, x1, x0 ldrb w0, [x0] cmp w0, 88 bne .L11 .L12: ldr w0, [sp, 36] sub w0, w0, #1 str w0, [sp, 36] b .L4 .L11: ldr w0, [sp, 36] add w0, w0, 1 str w0, [sp, 36] b .L4 .L5: ldr w0, [sp, 36] add w0, w0, 5 str w0, [sp, 36] b .L4 .L3: ldr w0, [sp, 40] add w0, w0, 1 ldr w1, [sp, 44] cmp w1, w0 ble .L14 ldrsw x0, [sp, 40] add x0, x0, 1 ldr x1, [sp, 24] add x0, x1, x0 ldrb w0, [x0] cmp w0, 76 beq .L15 ldrsw x0, [sp, 40] add x0, x0, 1 ldr x1, [sp, 24] add x0, x1, x0 ldrb w0, [x0] cmp w0, 67 bne .L14 .L15: ldr w0, [sp, 36] sub w0, w0, #10 str w0, [sp, 36] b .L4 .L14: ldr w0, [sp, 36] add w0, w0, 10 str w0, [sp, 36] b .L4 .L7: ldr w0, [sp, 36] add w0, w0, 50 str w0, [sp, 36] b .L4 .L9: ldr w0, [sp, 40] add w0, w0, 1 ldr w1, [sp, 44] cmp w1, w0 ble .L17 ldrsw x0, [sp, 40] add x0, x0, 1 ldr x1, [sp, 24] add x0, x1, x0 ldrb w0, [x0] cmp w0, 68 beq .L18 ldrsw x0, [sp, 40] add x0, x0, 1 ldr x1, [sp, 24] add x0, x1, x0 ldrb w0, [x0] cmp w0, 77 bne .L17 .L18: ldr w0, [sp, 36] sub w0, w0, #100 str w0, [sp, 36] b .L4 .L17: ldr w0, [sp, 36] add w0, w0, 100 str w0, [sp, 36] b .L4 .L10: ldr w0, [sp, 36] add w0, w0, 500 str w0, [sp, 36] b .L4 .L6: ldr w0, [sp, 36] add w0, w0, 1000 str w0, [sp, 36] .L4: ldr w0, [sp, 40] add w0, w0, 1 str w0, [sp, 40] .L2: ldr w1, [sp, 40] ldr w0, [sp, 44] cmp w1, w0 blt .L20 ldr w0, [sp, 36] ldp x29, x30, [sp], 48 .cfi_restore 30 .cfi_restore 29 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE0: .size romanToInt, .-romanToInt ```
### Human: Write a random program in ARM assembly### Assistant: ``` .text .global ColorPSGLES3_glsl .data .align 3 .type ColorPSGLES3_glsl, %object .size ColorPSGLES3_glsl, 155 ColorPSGLES3_glsl: .ascii "#version 300 es\nprecision mediump float;\nuniform lowp vec4" .ascii " color;\nin lowp vec4 exColor;\nout vec4 outColor;\nvoid mai" .ascii "n()\n{\n outColor = exColor * color;\n}\n" .global ColorPSGLES3_glsl_len .align 2 .type ColorPSGLES3_glsl_len, %object .size ColorPSGLES3_glsl_len, 4 ColorPSGLES3_glsl_len: .word 155 ```
### Human: Write a random program in ARM assembly### Assistant: ``` .text .align 2 .global perror_exit .type perror_exit, %function perror_exit: .LFB6: .cfi_startproc stp x29, x30, [sp, -32]! .cfi_def_cfa_offset 32 .cfi_offset 29, -32 .cfi_offset 30, -24 mov x29, sp str x0, [sp, 24] ldr x0, [sp, 24] bl perror mov w0, -1 bl exit .cfi_endproc .LFE6: .size perror_exit, .-perror_exit .section .rodata .align 3 .LC0: .string "driver: OK, let's go!\n\n" .align 3 .LC1: .string "driver: OK, I am gonna stop the bus!\n\n" .text .align 2 .global driver .type driver, %function driver: .LFB7: .cfi_startproc stp x29, x30, [sp, -32]! .cfi_def_cfa_offset 32 .cfi_offset 29, -32 .cfi_offset 30, -24 mov x29, sp str w0, [sp, 28] ldr w0, [sp, 28] cmp w0, 10 beq .L3 ldr w0, [sp, 28] cmp w0, 12 beq .L4 b .L6 .L3: adrp x0, :got:stderr ldr x0, [x0, #:got_lo12:stderr] ldr x0, [x0] mov x3, x0 mov x2, 23 mov x1, 1 adrp x0, .LC0 add x0, x0, :lo12:.LC0 bl fwrite nop b .L6 .L4: adrp x0, :got:stderr ldr x0, [x0, #:got_lo12:stderr] ldr x0, [x0] mov x3, x0 mov x2, 38 mov x1, 1 adrp x0, .LC1 add x0, x0, :lo12:.LC1 bl fwrite .L6: nop ldp x29, x30, [sp], 32 .cfi_restore 30 .cfi_restore 29 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE7: .size driver, .-driver .section .rodata .align 3 .LC2: .string "seller: All get off the bus!\n" .text .align 2 .global seller .type seller, %function seller: .LFB8: .cfi_startproc stp x29, x30, [sp, -48]! .cfi_def_cfa_offset 48 .cfi_offset 29, -48 .cfi_offset 30, -40 mov x29, sp str w0, [sp, 28] ldr w0, [sp, 28] cmp w0, 4 beq .L8 ldr w0, [sp, 28] cmp w0, 4 bgt .L14 ldr w0, [sp, 28] cmp w0, 3 beq .L10 ldr w0, [sp, 28] cmp w0, 3 bgt .L14 ldr w0, [sp, 28] cmp w0, 1 beq .L11 ldr w0, [sp, 28] cmp w0, 2 beq .L12 b .L14 .L11: bl getppid mov w1, 10 bl kill b .L9 .L12: bl getppid mov w1, 12 bl kill b .L9 .L8: mov w0, 123 str w0, [sp, 40] bl getppid ldr x2, [sp, 40] mov w1, 20 bl sigqueue b .L9 .L10: adrp x0, :got:stderr ldr x0, [x0, #:got_lo12:stderr] ldr x0, [x0] mov x3, x0 mov x2, 29 mov x1, 1 adrp x0, .LC2 add x0, x0, :lo12:.LC2 bl fwrite mov w0, 0 bl exit .L9: .L14: nop ldp x29, x30, [sp], 48 .cfi_restore 30 .cfi_restore 29 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE8: .size seller, .-seller .section .rodata .align 3 .LC3: .string "from child: %d\n" .text .align 2 .global termination .type termination, %function termination: .LFB9: .cfi_startproc stp x29, x30, [sp, -48]! .cfi_def_cfa_offset 48 .cfi_offset 29, -48 .cfi_offset 30, -40 mov x29, sp str w0, [sp, 44] str x1, [sp, 32] str x2, [sp, 24] ldr x0, [sp, 32] ldr w0, [x0, 24] mov w1, w0 adrp x0, .LC3 add x0, x0, :lo12:.LC3 bl printf ldr x0, [sp, 32] ldr w0, [x0, 16] mov w1, 3 bl kill mov x0, 0 bl wait mov w0, 0 bl exit .cfi_endproc .LFE9: .size termination, .-termination .section .rodata .align 3 .LC4: .string "fork failed" .text .align 2 .global main .type main, %function main: .LFB10: .cfi_startproc stp x29, x30, [sp, -192]! .cfi_def_cfa_offset 192 .cfi_offset 29, -192 .cfi_offset 30, -184 mov x29, sp adrp x0, :got:__stack_chk_guard ldr x0, [x0, #:got_lo12:__stack_chk_guard] ldr x1, [x0] str x1, [sp, 184] mov x1, 0 bl fork str w0, [sp, 28] ldr w0, [sp, 28] cmp w0, 0 bge .L17 adrp x0, .LC4 add x0, x0, :lo12:.LC4 bl perror_exit b .L18 .L17: ldr w0, [sp, 28] cmp w0, 0 ble .L19 adrp x0, driver add x1, x0, :lo12:driver mov w0, 10 bl signal adrp x0, driver add x1, x0, :lo12:driver mov w0, 12 bl signal adrp x0, termination add x0, x0, :lo12:termination str x0, [sp, 32] mov w0, 4 str w0, [sp, 168] add x0, sp, 32 mov x2, 0 mov x1, x0 mov w0, 20 bl sigaction .L20: bl pause b .L20 .L19: ldr w0, [sp, 28] cmp w0, 0 bne .L18 adrp x0, seller add x1, x0, :lo12:seller mov w0, 1 bl signal adrp x0, seller add x1, x0, :lo12:seller mov w0, 2 bl signal adrp x0, seller add x1, x0, :lo12:seller mov w0, 3 bl signal adrp x0, seller add x1, x0, :lo12:seller mov w0, 4 bl signal .L21: bl pause b .L21 .L18: mov w0, 0 mov w1, w0 adrp x0, :got:__stack_chk_guard ldr x0, [x0, #:got_lo12:__stack_chk_guard] ldr x3, [sp, 184] ldr x2, [x0] subs x3, x3, x2 mov x2, 0 beq .L23 bl __stack_chk_fail .L23: mov w0, w1 ldp x29, x30, [sp], 192 .cfi_restore 30 .cfi_restore 29 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE10: .size main, .-main ```
### Human: Write a random program in ARM assembly### Assistant: ``` .text .section .rodata .align 3 .LC0: .string "%d" .align 3 .LC1: .string "Total %d" .text .align 2 .global main .type main, %function main: .LFB0: .cfi_startproc stp x29, x30, [sp, -64]! .cfi_def_cfa_offset 64 .cfi_offset 29, -64 .cfi_offset 30, -56 mov x29, sp str w0, [sp, 28] str x1, [sp, 16] adrp x0, :got:__stack_chk_guard ldr x0, [x0, #:got_lo12:__stack_chk_guard] ldr x1, [x0] str x1, [sp, 56] mov x1, 0 str wzr, [sp, 48] mov w0, 1 str w0, [sp, 52] b .L2 .L4: add x0, sp, 44 mov x1, x0 adrp x0, .LC0 add x0, x0, :lo12:.LC0 bl __isoc99_scanf ldr w0, [sp, 44] cmp w0, 49 ble .L3 ldr w0, [sp, 44] cmp w0, 60 bgt .L3 ldr w0, [sp, 48] add w0, w0, 1 str w0, [sp, 48] nop .L3: ldr w0, [sp, 52] add w0, w0, 1 str w0, [sp, 52] .L2: ldr w0, [sp, 52] cmp w0, 5 ble .L4 ldr w1, [sp, 48] adrp x0, .LC1 add x0, x0, :lo12:.LC1 bl printf mov w0, 0 mov w1, w0 adrp x0, :got:__stack_chk_guard ldr x0, [x0, #:got_lo12:__stack_chk_guard] ldr x3, [sp, 56] ldr x2, [x0] subs x3, x3, x2 mov x2, 0 beq .L6 bl __stack_chk_fail .L6: mov w0, w1 ldp x29, x30, [sp], 64 .cfi_restore 30 .cfi_restore 29 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE0: .size main, .-main ```
### Human: Write a random program in ARM assembly### Assistant: ``` .text .section .rodata .align 3 .LC1: .string "Please enter the day, month, year seperately: " .align 3 .LC2: .string "%d" .align 3 .LC3: .string "%s" .align 3 .LC4: .string "Count: %d\n" .text .align 2 .global main .type main, %function main: .LFB0: .cfi_startproc sub sp, sp, #656 .cfi_def_cfa_offset 656 stp x29, x30, [sp] .cfi_offset 29, -656 .cfi_offset 30, -648 mov x29, sp adrp x0, :got:__stack_chk_guard ldr x0, [x0, #:got_lo12:__stack_chk_guard] ldr x1, [x0] str x1, [sp, 648] mov x1, 0 adrp x0, .LC0 add x1, x0, :lo12:.LC0 add x0, sp, 48 mov x3, x1 mov x1, 576 mov x2, x1 mov x1, x3 bl memcpy adrp x0, .LC1 add x0, x0, :lo12:.LC1 bl printf add x0, sp, 24 mov x1, x0 adrp x0, .LC2 add x0, x0, :lo12:.LC2 bl __isoc99_scanf add x0, sp, 28 mov x1, x0 adrp x0, .LC2 add x0, x0, :lo12:.LC2 bl __isoc99_scanf cmp w0, 1 beq .L2 add x0, sp, 624 mov x1, x0 adrp x0, .LC3 add x0, x0, :lo12:.LC3 bl __isoc99_scanf str wzr, [sp, 36] b .L3 .L7: add x2, sp, 48 ldrsw x1, [sp, 36] mov x0, x1 lsl x0, x0, 1 add x0, x0, x1 lsl x0, x0, 4 add x0, x0, 16 add x0, x2, x0 add x0, x0, 4 add x1, sp, 624 bl strcmp cmp w0, 0 beq .L4 add x2, sp, 48 ldrsw x1, [sp, 36] mov x0, x1 lsl x0, x0, 1 add x0, x0, x1 lsl x0, x0, 4 add x0, x2, x0 add x1, sp, 624 bl strcmp cmp w0, 0 bne .L5 .L4: ldrsw x1, [sp, 36] mov x0, x1 lsl x0, x0, 1 add x0, x0, x1 lsl x0, x0, 4 add x1, sp, 92 ldr w0, [x1, x0] str w0, [sp, 28] b .L2 .L5: ldr w0, [sp, 36] add w0, w0, 1 str w0, [sp, 36] .L3: ldr w0, [sp, 36] cmp w0, 11 ble .L7 .L2: add x0, sp, 32 mov x1, x0 adrp x0, .LC2 add x0, x0, :lo12:.LC2 bl __isoc99_scanf str wzr, [sp, 40] str wzr, [sp, 44] b .L8 .L12: ldrsw x1, [sp, 44] mov x0, x1 lsl x0, x0, 1 add x0, x0, x1 lsl x0, x0, 4 add x1, sp, 92 ldr w1, [x1, x0] ldr w0, [sp, 28] cmp w1, w0 beq .L15 ldrsw x1, [sp, 44] mov x0, x1 lsl x0, x0, 1 add x0, x0, x1 lsl x0, x0, 4 add x1, sp, 88 ldr w0, [x1, x0] ldr w1, [sp, 40] add w0, w1, w0 str w0, [sp, 40] ldrsw x1, [sp, 44] mov x0, x1 lsl x0, x0, 1 add x0, x0, x1 lsl x0, x0, 4 add x1, sp, 92 ldr w0, [x1, x0] cmp w0, 2 bne .L11 ldr w0, [sp, 32] bl is_lunar_year and w0, w0, 255 cmp w0, 0 beq .L11 ldr w0, [sp, 40] add w0, w0, 1 str w0, [sp, 40] .L11: ldr w0, [sp, 44] add w0, w0, 1 str w0, [sp, 44] .L8: ldr w0, [sp, 44] cmp w0, 11 ble .L12 b .L10 .L15: nop .L10: ldr w1, [sp, 24] ldr w0, [sp, 40] add w0, w1, w0 mov w1, w0 adrp x0, .LC4 add x0, x0, :lo12:.LC4 bl printf mov w0, 0 mov w1, w0 adrp x0, :got:__stack_chk_guard ldr x0, [x0, #:got_lo12:__stack_chk_guard] ldr x3, [sp, 648] ldr x2, [x0] subs x3, x3, x2 mov x2, 0 beq .L14 bl __stack_chk_fail .L14: mov w0, w1 ldp x29, x30, [sp] add sp, sp, 656 .cfi_restore 29 .cfi_restore 30 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE0: .size main, .-main .section .rodata .align 3 .LC0: .string "Jan" .zero 16 .string "January" .zero 12 .word 31 .word 1 .string "Feb" .zero 16 .string "February" .zero 11 .word 28 .word 2 .string "Mar" .zero 16 .string "March" .zero 14 .word 31 .word 3 .string "Apr" .zero 16 .string "April" .zero 14 .word 30 .word 4 .string "May" .zero 16 .string "May" .zero 16 .word 31 .word 5 .string "Jun" .zero 16 .string "June" .zero 15 .word 30 .word 6 .string "Jul" .zero 16 .string "July" .zero 15 .word 31 .word 7 .string "Aug" .zero 16 .string "August" .zero 13 .word 31 .word 8 .string "Sept" .zero 15 .string "September" .zero 10 .word 30 .word 9 .string "Oct" .zero 16 .string "October" .zero 12 .word 31 .word 10 .string "Nov" .zero 16 .string "November" .zero 11 .word 30 .word 11 .string "Dec" .zero 16 .string "December" .zero 11 .word 31 .word 12 .text .align 2 .global is_lunar_year .type is_lunar_year, %function is_lunar_year: .LFB1: .cfi_startproc sub sp, sp, #16 .cfi_def_cfa_offset 16 str w0, [sp, 12] ldr w0, [sp, 12] and w0, w0, 3 cmp w0, 0 bne .L17 ldr w1, [sp, 12] mov w0, 34079 movk w0, 0x51eb, lsl 16 smull x0, w1, w0 lsr x0, x0, 32 asr w2, w0, 5 asr w0, w1, 31 sub w0, w2, w0 mov w2, 100 mul w0, w0, w2 sub w0, w1, w0 cmp w0, 0 bne .L18 .L17: ldr w1, [sp, 12] mov w0, 34079 movk w0, 0x51eb, lsl 16 smull x0, w1, w0 lsr x0, x0, 32 asr w2, w0, 7 asr w0, w1, 31 sub w0, w2, w0 mov w2, 400 mul w0, w0, w2 sub w0, w1, w0 cmp w0, 0 bne .L19 .L18: mov w0, 1 b .L20 .L19: mov w0, 0 .L20: and w0, w0, 1 and w0, w0, 255 add sp, sp, 16 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE1: .size is_lunar_year, .-is_lunar_year ```
### Human: Write a random program in ARM assembly### Assistant: ``` .text .global CLSID_WMAsfWriter .section .rodata .align 3 .type CLSID_WMAsfWriter, %object .size CLSID_WMAsfWriter, 24 CLSID_WMAsfWriter: .xword 2082677262 .hword 21947 .hword 4563 .string "\213\026" .ascii "\300O\266\275=" .zero 4 ```
### Human: Write a random program in ARM assembly### Assistant: ``` .text .section .rodata .align 3 .LC0: .string "%lf" .align 3 .LC1: .string "%d" .align 3 .LC2: .string "The final price of the meal is $%d.\n" .text .align 2 .global main .type main, %function main: .LFB6: .cfi_startproc stp x29, x30, [sp, -64]! .cfi_def_cfa_offset 64 .cfi_offset 29, -64 .cfi_offset 30, -56 mov x29, sp adrp x0, :got:__stack_chk_guard ldr x0, [x0, #:got_lo12:__stack_chk_guard] ldr x1, [x0] str x1, [sp, 56] mov x1, 0 add x0, sp, 24 mov x1, x0 adrp x0, .LC0 add x0, x0, :lo12:.LC0 bl __isoc99_scanf add x0, sp, 16 mov x1, x0 adrp x0, .LC1 add x0, x0, :lo12:.LC1 bl __isoc99_scanf add x0, sp, 20 mov x1, x0 adrp x0, .LC1 add x0, x0, :lo12:.LC1 bl __isoc99_scanf ldr w0, [sp, 16] scvtf d1, w0 ldr d0, [sp, 24] fmul d0, d1, d0 mov x0, 4636737291354636288 fmov d1, x0 fdiv d0, d0, d1 str d0, [sp, 32] ldr w0, [sp, 20] scvtf d1, w0 ldr d0, [sp, 24] fmul d0, d1, d0 mov x0, 4636737291354636288 fmov d1, x0 fdiv d0, d0, d1 str d0, [sp, 40] ldr d1, [sp, 24] ldr d0, [sp, 32] fadd d0, d1, d0 ldr d1, [sp, 40] fadd d0, d1, d0 str d0, [sp, 48] ldr d0, [sp, 48] bl round fcvtzs w0, d0 mov w1, w0 adrp x0, .LC2 add x0, x0, :lo12:.LC2 bl printf mov w0, 0 mov w1, w0 adrp x0, :got:__stack_chk_guard ldr x0, [x0, #:got_lo12:__stack_chk_guard] ldr x3, [sp, 56] ldr x2, [x0] subs x3, x3, x2 mov x2, 0 beq .L3 bl __stack_chk_fail .L3: mov w0, w1 ldp x29, x30, [sp], 64 .cfi_restore 30 .cfi_restore 29 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE6: .size main, .-main ```
### Human: Write a random program in ARM assembly### Assistant: ``` .text .section .rodata .align 3 .LC0: .ascii "// Copyright (c) 2020 Intel Corporation\n//\n// Permission i" .ascii "s hereby granted, free of charge, to any person obtaining a " .ascii "copy\n// of this software and associated documentation files" .ascii " (the \"Software\"), to deal\n// in the Software without res" .ascii "triction, including without limitation the rights\n// to use" .ascii ", copy, modify, merge, publish, distribute, sublicense, and/" .ascii "or sell\n// copies of the Software, and to permit persons to" .ascii " whom the Software is\n// furnished to do so, subject to the" .ascii " following conditions:\n//\n// The above copyright notice an" .ascii "d this permission notice shall be included in all\n// copies" .ascii " or substantial portions of the Software.\n//\n// THE SOFTWA" .ascii "RE IS PROVIDED \"AS IS\", WITHOUT WARRANTY OF ANY KIND, EXPR" .ascii "ESS OR\n// IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANT" .ascii "IES OF MERCHANTABILITY,\n// FITNESS FOR A PARTICULAR PURPOSE" .ascii " AND NONINFRINGEMENT. IN NO EVENT SHA" .string "LL THE\n// AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER\n// LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,\n// OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE\n// SOFTWARE.\n" .text .align 2 .global make_copyright .type make_copyright, %function make_copyright: .LFB6: .cfi_startproc stp x29, x30, [sp, -32]! .cfi_def_cfa_offset 32 .cfi_offset 29, -32 .cfi_offset 30, -24 mov x29, sp str x0, [sp, 24] ldr x3, [sp, 24] mov x2, 1115 mov x1, 1 adrp x0, .LC0 add x0, x0, :lo12:.LC0 bl fwrite nop ldp x29, x30, [sp], 32 .cfi_restore 30 .cfi_restore 29 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE6: .size make_copyright, .-make_copyright .section .rodata .align 3 .LC1: .string "Usage: %s somefile.isa" .align 3 .LC2: .string "rb" .align 3 .LC3: .string "wt" .align 3 .LC4: .string "#include \"%s_isa.h\"\n\n" .align 3 .LC5: .string "const unsigned char %s[%lu] = {\n" .align 3 .LC6: .string "0x%02x" .align 3 .LC7: .string "\n};\n" .align 3 .LC8: .string "_isa.h" .align 3 .LC9: .string "#ifndef __%s__\n#define __%s__\n" .align 3 .LC10: .string "extern const unsigned char %s[%lu];\n" .align 3 .LC11: .string "#endif\n" .text .align 2 .global main .type main, %function main: .LFB7: .cfi_startproc stp x29, x30, [sp, -128]! .cfi_def_cfa_offset 128 .cfi_offset 29, -128 .cfi_offset 30, -120 mov x29, sp str w0, [sp, 28] str x1, [sp, 16] mov w0, 16 str w0, [sp, 44] str xzr, [sp, 64] ldr w0, [sp, 28] cmp w0, 2 beq .L3 ldr x0, [sp, 16] ldr x0, [x0] mov x1, x0 adrp x0, .LC1 add x0, x0, :lo12:.LC1 bl printf mov w0, -1 bl exit .L3: ldr x0, [sp, 16] add x0, x0, 8 ldr x2, [x0] adrp x0, .LC2 add x1, x0, :lo12:.LC2 mov x0, x2 bl fopen str x0, [sp, 88] ldr x0, [sp, 88] cmp x0, 0 beq .L4 mov w2, 2 mov x1, 0 ldr x0, [sp, 88] bl fseek ldr x0, [sp, 88] bl ftell str x0, [sp, 56] ldr x0, [sp, 88] bl rewind ldr x0, [sp, 56] bl malloc str x0, [sp, 64] ldr x0, [sp, 56] ldr x3, [sp, 88] mov x2, x0 mov x1, 1 ldr x0, [sp, 64] bl fread str x0, [sp, 96] ldr x0, [sp, 88] bl fclose .L4: ldr x0, [sp, 64] cmp x0, 0 beq .L5 ldr x0, [sp, 16] ldr x0, [x0, 8] str x0, [sp, 104] ldr x0, [sp, 104] bl strlen str w0, [sp, 52] ldrsw x0, [sp, 52] sub x0, x0, #1 ldr x1, [sp, 104] add x0, x1, x0 str x0, [sp, 80] b .L6 .L8: ldr x0, [sp, 80] sub x0, x0, #1 str x0, [sp, 80] .L6: ldr x1, [sp, 80] ldr x0, [sp, 104] cmp x1, x0 bcc .L7 ldr x0, [sp, 80] ldrb w0, [x0] cmp w0, 46 bne .L8 .L7: ldr x0, [sp, 80] str x0, [sp, 72] b .L9 .L11: ldr x0, [sp, 72] sub x0, x0, #1 str x0, [sp, 72] .L9: ldr x1, [sp, 72] ldr x0, [sp, 104] cmp x1, x0 bcc .L10 ldr x0, [sp, 72] ldrb w0, [x0] cmp w0, 47 beq .L10 ldr x0, [sp, 72] ldrb w0, [x0] cmp w0, 92 bne .L11 .L10: ldr x0, [sp, 72] add x0, x0, 1 str x0, [sp, 72] ldr x1, [sp, 80] ldr x0, [sp, 72] sub x0, x1, x0 str w0, [sp, 52] ldr w0, [sp, 52] cmp w0, 0 bgt .L12 ldr x0, [sp, 64] bl free mov w0, -1 bl exit .L12: ldr w0, [sp, 52] add w0, w0, 9 sxtw x0, w0 bl malloc str x0, [sp, 112] ldr w0, [sp, 52] add w0, w0, 1 sxtw x0, w0 bl malloc str x0, [sp, 120] ldrsw x0, [sp, 52] mov x2, x0 ldr x1, [sp, 72] ldr x0, [sp, 120] bl strncpy ldrsw x0, [sp, 52] ldr x1, [sp, 120] add x0, x1, x0 strb wzr, [x0] ldrsw x0, [sp, 52] mov x2, x0 ldr x1, [sp, 72] ldr x0, [sp, 112] bl strncpy ldrsw x0, [sp, 52] ldr x1, [sp, 112] add x0, x1, x0 mov x1, 26975 movk x1, 0x6173, lsl 16 movk x1, 0x632e, lsl 32 movk x1, 0x7070, lsl 48 str x1, [x0] ldrsw x0, [sp, 52] add x0, x0, 8 ldr x1, [sp, 112] add x0, x1, x0 strb wzr, [x0] adrp x0, .LC3 add x1, x0, :lo12:.LC3 ldr x0, [sp, 112] bl fopen str x0, [sp, 88] ldr x0, [sp, 88] cmp x0, 0 beq .L13 ldr x0, [sp, 88] bl make_copyright ldr x2, [sp, 120] adrp x0, .LC4 add x1, x0, :lo12:.LC4 ldr x0, [sp, 88] bl fprintf ldr x3, [sp, 56] ldr x2, [sp, 120] adrp x0, .LC5 add x1, x0, :lo12:.LC5 ldr x0, [sp, 88] bl fprintf str wzr, [sp, 48] b .L14 .L17: ldrsw x0, [sp, 48] ldr x1, [sp, 64] add x0, x1, x0 ldrb w0, [x0] mov w2, w0 adrp x0, .LC6 add x1, x0, :lo12:.LC6 ldr x0, [sp, 88] bl fprintf ldrsw x1, [sp, 48] ldr x0, [sp, 56] sub x0, x0, #1 cmp x1, x0 beq .L15 ldr x1, [sp, 88] mov w0, 44 bl fputc .L15: ldr w0, [sp, 44] sub w0, w0, #1 ldr w1, [sp, 48] cmp w1, w0 bne .L16 ldr w0, [sp, 44] add w0, w0, 16 str w0, [sp, 44] ldr x1, [sp, 88] mov w0, 10 bl fputc .L16: ldr w0, [sp, 48] add w0, w0, 1 str w0, [sp, 48] .L14: ldrsw x0, [sp, 48] ldr x1, [sp, 56] cmp x1, x0 bgt .L17 ldr x3, [sp, 88] mov x2, 4 mov x1, 1 adrp x0, .LC7 add x0, x0, :lo12:.LC7 bl fwrite ldr x0, [sp, 88] bl fclose .L13: ldrsw x0, [sp, 52] mov x2, x0 ldr x1, [sp, 72] ldr x0, [sp, 112] bl strncpy ldrsw x0, [sp, 52] ldr x1, [sp, 112] add x2, x1, x0 adrp x0, .LC8 add x1, x0, :lo12:.LC8 mov x0, x2 ldr w2, [x1] str w2, [x0] ldrh w1, [x1, 4] strh w1, [x0, 4] ldrsw x0, [sp, 52] add x0, x0, 6 ldr x1, [sp, 112] add x0, x1, x0 strb wzr, [x0] adrp x0, .LC3 add x1, x0, :lo12:.LC3 ldr x0, [sp, 112] bl fopen str x0, [sp, 88] ldr x0, [sp, 88] cmp x0, 0 beq .L18 ldr x0, [sp, 88] bl make_copyright ldr x3, [sp, 120] ldr x2, [sp, 120] adrp x0, .LC9 add x1, x0, :lo12:.LC9 ldr x0, [sp, 88] bl fprintf ldr x3, [sp, 56] ldr x2, [sp, 120] adrp x0, .LC10 add x1, x0, :lo12:.LC10 ldr x0, [sp, 88] bl fprintf ldr x3, [sp, 88] mov x2, 7 mov x1, 1 adrp x0, .LC11 add x0, x0, :lo12:.LC11 bl fwrite ldr x0, [sp, 88] bl fclose .L18: ldr x0, [sp, 120] bl free ldr x0, [sp, 112] bl free ldr x0, [sp, 64] bl free .L5: mov w0, 0 ldp x29, x30, [sp], 128 .cfi_restore 30 .cfi_restore 29 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE7: .size main, .-main ```
### Human: Write a random program in ARM assembly### Assistant: ``` .text .global i1 .data .align 2 .type i1, %object .size i1, 4 i1: .word 1 .align 2 .type i2, %object .size i2, 4 i2: .word 2 .global i3 .align 2 .type i3, %object .size i3, 4 i3: .word 3 .global i4 .bss .align 2 .type i4, %object .size i4, 4 i4: .zero 4 .local i5 .comm i5,4,4 ```
### Human: Write a random program in ARM assembly### Assistant: ``` .text .global screen_unpacker_zx7_bin .data .align 3 .type screen_unpacker_zx7_bin, %object .size screen_unpacker_zx7_bin, 81 screen_unpacker_zx7_bin: .string "\363\021" .string "@!S]\315\016]\373\311>\200\355\240\315M]0\371\325\001" .string "" .ascii "P\024\315M]0\372\324M]\313\021\313\0208\037\025 \364\003^#\313" .ascii "30\f\026\020\315M]\313\0220\371\024\313:\313\033\343\345\355" .ascii "R\321\355\260\3410\305\207\300~#\027\311" ```
### Human: Write a random program in ARM assembly### Assistant: ``` .text .align 2 .global ffs .type ffs, %function ffs: .LFB6: .cfi_startproc sub sp, sp, #32 .cfi_def_cfa_offset 32 str w0, [sp, 12] mov w0, 32 str w0, [sp, 28] str wzr, [sp, 24] b .L2 .L4: ldr w0, [sp, 24] add w0, w0, 1 str w0, [sp, 24] .L2: ldr w1, [sp, 24] ldr w0, [sp, 28] cmp w1, w0 bge .L3 ldr w0, [sp, 24] ldr w1, [sp, 12] asr w0, w1, w0 and w0, w0, 1 cmp w0, 0 beq .L4 .L3: ldr w1, [sp, 24] ldr w0, [sp, 28] cmp w1, w0 beq .L5 ldr w0, [sp, 24] add w0, w0, 1 b .L7 .L5: mov w0, 0 .L7: add sp, sp, 32 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE6: .size ffs, .-ffs .align 2 .global ffsl .type ffsl, %function ffsl: .LFB7: .cfi_startproc sub sp, sp, #32 .cfi_def_cfa_offset 32 str x0, [sp, 8] mov w0, 64 str w0, [sp, 28] str wzr, [sp, 24] b .L9 .L11: ldr w0, [sp, 24] add w0, w0, 1 str w0, [sp, 24] .L9: ldr w1, [sp, 24] ldr w0, [sp, 28] cmp w1, w0 bge .L10 ldr w0, [sp, 24] ldr x1, [sp, 8] asr x0, x1, x0 and x0, x0, 1 cmp x0, 0 beq .L11 .L10: ldr w1, [sp, 24] ldr w0, [sp, 28] cmp w1, w0 beq .L12 ldr w0, [sp, 24] add w0, w0, 1 b .L14 .L12: mov w0, 0 .L14: add sp, sp, 32 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE7: .size ffsl, .-ffsl .align 2 .global ffsll .type ffsll, %function ffsll: .LFB8: .cfi_startproc sub sp, sp, #32 .cfi_def_cfa_offset 32 str x0, [sp, 8] mov w0, 64 str w0, [sp, 28] str wzr, [sp, 24] b .L16 .L18: ldr w0, [sp, 24] add w0, w0, 1 str w0, [sp, 24] .L16: ldr w1, [sp, 24] ldr w0, [sp, 28] cmp w1, w0 bge .L17 ldr w0, [sp, 24] ldr x1, [sp, 8] asr x0, x1, x0 and x0, x0, 1 cmp x0, 0 beq .L18 .L17: ldr w1, [sp, 24] ldr w0, [sp, 28] cmp w1, w0 beq .L19 ldr w0, [sp, 24] add w0, w0, 1 b .L21 .L19: mov w0, 0 .L21: add sp, sp, 32 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE8: .size ffsll, .-ffsll .align 2 .global popcount .type popcount, %function popcount: .LFB9: .cfi_startproc sub sp, sp, #32 .cfi_def_cfa_offset 32 str w0, [sp, 12] mov w0, 32 str w0, [sp, 28] str wzr, [sp, 20] str wzr, [sp, 24] b .L23 .L25: ldr w0, [sp, 20] ldr w1, [sp, 12] lsr w0, w1, w0 and w0, w0, 1 cmp w0, 0 beq .L24 ldr w0, [sp, 24] add w0, w0, 1 str w0, [sp, 24] .L24: ldr w0, [sp, 20] add w0, w0, 1 str w0, [sp, 20] .L23: ldr w1, [sp, 20] ldr w0, [sp, 28] cmp w1, w0 blt .L25 ldr w0, [sp, 24] add sp, sp, 32 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE9: .size popcount, .-popcount .align 2 .global popcountl .type popcountl, %function popcountl: .LFB10: .cfi_startproc sub sp, sp, #32 .cfi_def_cfa_offset 32 str x0, [sp, 8] mov w0, 64 str w0, [sp, 28] str wzr, [sp, 20] str wzr, [sp, 24] b .L28 .L30: ldr w0, [sp, 20] ldr x1, [sp, 8] lsr x0, x1, x0 and x0, x0, 1 cmp x0, 0 beq .L29 ldr w0, [sp, 24] add w0, w0, 1 str w0, [sp, 24] .L29: ldr w0, [sp, 20] add w0, w0, 1 str w0, [sp, 20] .L28: ldr w1, [sp, 20] ldr w0, [sp, 28] cmp w1, w0 blt .L30 ldr w0, [sp, 24] add sp, sp, 32 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE10: .size popcountl, .-popcountl .align 2 .global popcountll .type popcountll, %function popcountll: .LFB11: .cfi_startproc sub sp, sp, #32 .cfi_def_cfa_offset 32 str x0, [sp, 8] mov w0, 64 str w0, [sp, 28] str wzr, [sp, 20] str wzr, [sp, 24] b .L33 .L35: ldr w0, [sp, 20] ldr x1, [sp, 8] lsr x0, x1, x0 and x0, x0, 1 cmp x0, 0 beq .L34 ldr w0, [sp, 24] add w0, w0, 1 str w0, [sp, 24] .L34: ldr w0, [sp, 20] add w0, w0, 1 str w0, [sp, 20] .L33: ldr w1, [sp, 20] ldr w0, [sp, 28] cmp w1, w0 blt .L35 ldr w0, [sp, 24] add sp, sp, 32 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE11: .size popcountll, .-popcountll .align 2 .global popcount32 .type popcount32, %function popcount32: .LFB12: .cfi_startproc sub sp, sp, #32 .cfi_def_cfa_offset 32 str w0, [sp, 12] mov w0, 32 str w0, [sp, 28] str wzr, [sp, 20] str wzr, [sp, 24] b .L38 .L40: ldr w0, [sp, 20] mov w1, 1 lsl w1, w1, w0 ldr w0, [sp, 12] and w0, w1, w0 cmp w0, 0 beq .L39 ldr w0, [sp, 24] add w0, w0, 1 str w0, [sp, 24] .L39: ldr w0, [sp, 20] add w0, w0, 1 str w0, [sp, 20] .L38: ldr w1, [sp, 20] ldr w0, [sp, 28] cmp w1, w0 blt .L40 ldr w0, [sp, 24] add sp, sp, 32 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE12: .size popcount32, .-popcount32 .align 2 .global popcount64 .type popcount64, %function popcount64: .LFB13: .cfi_startproc sub sp, sp, #32 .cfi_def_cfa_offset 32 str x0, [sp, 8] mov w0, 64 str w0, [sp, 28] str wzr, [sp, 20] str wzr, [sp, 24] b .L43 .L45: ldr w0, [sp, 20] ldr x1, [sp, 8] lsr x0, x1, x0 and x0, x0, 1 cmp x0, 0 beq .L44 ldr w0, [sp, 24] add w0, w0, 1 str w0, [sp, 24] .L44: ldr w0, [sp, 20] add w0, w0, 1 str w0, [sp, 20] .L43: ldr w1, [sp, 20] ldr w0, [sp, 28] cmp w1, w0 blt .L45 ldr w0, [sp, 24] add sp, sp, 32 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE13: .size popcount64, .-popcount64 ```
### Human: Write a random program in ARM assembly### Assistant: ``` .text .align 2 .type int_pow, %function int_pow: .LFB6: .cfi_startproc sub sp, sp, #32 .cfi_def_cfa_offset 32 str w0, [sp, 12] str w1, [sp, 8] ldr w0, [sp, 8] cmp w0, 0 bne .L2 mov w0, 1 str w0, [sp, 24] b .L3 .L2: ldr w0, [sp, 8] cmp w0, 1 bne .L4 ldr w0, [sp, 12] str w0, [sp, 24] b .L3 .L4: ldr w0, [sp, 12] str w0, [sp, 24] mov w0, 1 str w0, [sp, 28] b .L5 .L6: ldr w1, [sp, 24] ldr w0, [sp, 12] mul w0, w1, w0 str w0, [sp, 24] ldr w0, [sp, 28] add w0, w0, 1 str w0, [sp, 28] .L5: ldr w1, [sp, 28] ldr w0, [sp, 8] cmp w1, w0 blt .L6 .L3: ldr w0, [sp, 24] add sp, sp, 32 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE6: .size int_pow, .-int_pow .align 2 .type geometric_series, %function geometric_series: .LFB7: .cfi_startproc stp x29, x30, [sp, -32]! .cfi_def_cfa_offset 32 .cfi_offset 29, -32 .cfi_offset 30, -24 mov x29, sp str w0, [sp, 28] str w1, [sp, 24] ldr w0, [sp, 24] add w0, w0, 1 mov w1, w0 ldr w0, [sp, 28] bl int_pow mov w1, w0 mov w0, 1 sub w1, w0, w1 mov w2, 1 ldr w0, [sp, 28] sub w0, w2, w0 sdiv w0, w1, w0 ldp x29, x30, [sp], 32 .cfi_restore 30 .cfi_restore 29 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE7: .size geometric_series, .-geometric_series .align 2 .type dep, %function dep: .LFB8: .cfi_startproc stp x29, x30, [sp, -48]! .cfi_def_cfa_offset 48 .cfi_offset 29, -48 .cfi_offset 30, -40 mov x29, sp str w0, [sp, 28] str w1, [sp, 24] str wzr, [sp, 44] mov w0, 1 str w0, [sp, 40] b .L11 .L12: ldr w1, [sp, 40] ldr w0, [sp, 24] bl int_pow mov w1, w0 ldr w0, [sp, 44] add w0, w0, w1 str w0, [sp, 44] ldr w0, [sp, 40] add w0, w0, 1 str w0, [sp, 40] .L11: ldr w0, [sp, 28] sub w0, w0, #1 ldr w1, [sp, 44] cmp w1, w0 blt .L12 ldr w0, [sp, 40] sub w0, w0, #1 ldp x29, x30, [sp], 48 .cfi_restore 30 .cfi_restore 29 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE8: .size dep, .-dep .align 2 .type search_tree, %function search_tree: .LFB9: .cfi_startproc stp x29, x30, [sp, -80]! .cfi_def_cfa_offset 80 .cfi_offset 29, -80 .cfi_offset 30, -72 mov x29, sp str w0, [sp, 60] str w1, [sp, 56] str w2, [sp, 52] str w3, [sp, 48] str x4, [sp, 40] str x5, [sp, 32] str x6, [sp, 24] ldr x0, [sp, 24] ldr w0, [x0] add w1, w0, 1 ldr x0, [sp, 24] str w1, [x0] ldr w0, [sp, 56] add w0, w0, 1 str w0, [sp, 64] ldr w1, [sp, 52] ldr w0, [sp, 48] sdiv w0, w1, w0 sub w0, w0, #1 str w0, [sp, 72] ldr w1, [sp, 60] ldr w0, [sp, 64] cmp w1, w0 bne .L15 ldr x0, [sp, 40] ldr w1, [sp, 56] str w1, [x0] ldr x0, [sp, 32] ldr w1, [sp, 72] str w1, [x0] mov w0, 1 b .L16 .L15: mov w0, 1 str w0, [sp, 68] b .L17 .L20: ldr w1, [sp, 64] ldr w0, [sp, 72] add w0, w1, w0 add w0, w0, 1 str w0, [sp, 76] ldr w1, [sp, 60] ldr w0, [sp, 76] cmp w1, w0 bne .L18 ldr x0, [sp, 40] ldr w1, [sp, 56] str w1, [x0] ldr x0, [sp, 32] ldr w1, [sp, 72] str w1, [x0] mov w0, 1 b .L16 .L18: ldr w1, [sp, 60] ldr w0, [sp, 64] cmp w1, w0 ble .L19 ldr w1, [sp, 60] ldr w0, [sp, 76] cmp w1, w0 bge .L19 ldr x6, [sp, 24] ldr x5, [sp, 32] ldr x4, [sp, 40] ldr w3, [sp, 48] ldr w2, [sp, 72] ldr w1, [sp, 64] ldr w0, [sp, 60] bl search_tree b .L16 .L19: ldr w0, [sp, 76] str w0, [sp, 64] ldr w0, [sp, 68] add w0, w0, 1 str w0, [sp, 68] .L17: ldr w1, [sp, 68] ldr w0, [sp, 48] cmp w1, w0 ble .L20 ldr x0, [sp, 40] mov w1, -1 str w1, [x0] ldr x0, [sp, 32] mov w1, -1 str w1, [x0] mov w0, 0 .L16: ldp x29, x30, [sp], 80 .cfi_restore 30 .cfi_restore 29 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE9: .size search_tree, .-search_tree .align 2 .global reverse_tree_info .type reverse_tree_info, %function reverse_tree_info: .LFB10: .cfi_startproc stp x29, x30, [sp, -96]! .cfi_def_cfa_offset 96 .cfi_offset 29, -96 .cfi_offset 30, -88 mov x29, sp str w0, [sp, 60] str w1, [sp, 56] str w2, [sp, 52] str x3, [sp, 40] str x4, [sp, 32] str x5, [sp, 24] str x6, [sp, 16] adrp x0, :got:__stack_chk_guard ldr x0, [x0, #:got_lo12:__stack_chk_guard] ldr x1, [x0] str x1, [sp, 88] mov x1, 0 ldr w1, [sp, 60] ldr w0, [sp, 56] cmp w1, w0 blt .L22 ldr x0, [sp, 40] mov w1, -1 str w1, [x0] ldr x0, [sp, 32] mov w1, -1 str w1, [x0] ldr x0, [sp, 24] mov w1, -1 str w1, [x0] ldr x0, [sp, 16] mov w1, -1 str w1, [x0] b .L21 .L22: ldr w1, [sp, 52] ldr w0, [sp, 56] bl dep mov w1, w0 ldr x0, [sp, 16] str w1, [x0] ldr w0, [sp, 60] cmp w0, 0 bne .L24 ldr x0, [sp, 40] mov w1, -1 str w1, [x0] ldr w0, [sp, 56] sub w1, w0, #1 ldr x0, [sp, 32] str w1, [x0] ldr x0, [sp, 24] str wzr, [x0] b .L21 .L24: ldr x0, [sp, 16] ldr w0, [x0] mov w1, w0 ldr w0, [sp, 52] bl geometric_series str w0, [sp, 84] ldr x0, [sp, 24] str wzr, [x0] add x1, sp, 80 add x0, sp, 76 ldr x6, [sp, 24] mov x5, x1 mov x4, x0 ldr w3, [sp, 52] ldr w2, [sp, 84] mov w1, 0 ldr w0, [sp, 60] bl search_tree ldr w1, [sp, 80] ldr w0, [sp, 60] add w0, w1, w0 ldr w1, [sp, 56] cmp w1, w0 bgt .L25 ldr w1, [sp, 56] ldr w0, [sp, 60] sub w0, w1, w0 sub w0, w0, #1 str w0, [sp, 80] .L25: ldr w1, [sp, 76] ldr x0, [sp, 40] str w1, [x0] ldr w1, [sp, 80] ldr x0, [sp, 32] str w1, [x0] nop .L21: adrp x0, :got:__stack_chk_guard ldr x0, [x0, #:got_lo12:__stack_chk_guard] ldr x2, [sp, 88] ldr x1, [x0] subs x2, x2, x1 mov x1, 0 beq .L27 bl __stack_chk_fail .L27: ldp x29, x30, [sp], 96 .cfi_restore 30 .cfi_restore 29 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE10: .size reverse_tree_info, .-reverse_tree_info .align 2 .global reverse_tree_direct_children .type reverse_tree_direct_children, %function reverse_tree_direct_children: .LFB11: .cfi_startproc stp x29, x30, [sp, -80]! .cfi_def_cfa_offset 80 .cfi_offset 29, -80 .cfi_offset 30, -72 mov x29, sp str w0, [sp, 44] str w1, [sp, 40] str w2, [sp, 36] str w3, [sp, 32] str x4, [sp, 24] ldr w1, [sp, 36] ldr w0, [sp, 40] bl dep str w0, [sp, 64] ldr w1, [sp, 64] ldr w0, [sp, 32] sub w0, w1, w0 str w0, [sp, 68] ldr w0, [sp, 68] cmp w0, 0 bne .L29 mov w0, 0 b .L30 .L29: ldr w1, [sp, 68] ldr w0, [sp, 36] bl geometric_series str w0, [sp, 72] ldr w0, [sp, 44] add w0, w0, 1 str w0, [sp, 56] ldr w1, [sp, 72] ldr w0, [sp, 36] sdiv w0, w1, w0 str w0, [sp, 76] str wzr, [sp, 60] b .L31 .L33: ldrsw x0, [sp, 60] lsl x0, x0, 2 ldr x1, [sp, 24] add x0, x1, x0 ldr w1, [sp, 56] str w1, [x0] ldr w1, [sp, 56] ldr w0, [sp, 76] add w0, w1, w0 str w0, [sp, 56] ldr w0, [sp, 60] add w0, w0, 1 str w0, [sp, 60] .L31: ldr w1, [sp, 60] ldr w0, [sp, 36] cmp w1, w0 bge .L32 ldr w1, [sp, 56] ldr w0, [sp, 40] cmp w1, w0 blt .L33 .L32: ldr w0, [sp, 60] .L30: ldp x29, x30, [sp], 80 .cfi_restore 30 .cfi_restore 29 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE11: .size reverse_tree_direct_children, .-reverse_tree_direct_children ```
### Human: Write a random program in ARM assembly### Assistant: ``` .text .section .rodata .align 3 .LC1: .string "%d, %d, %d\n" .text .align 2 .global removeDuplicates .type removeDuplicates, %function removeDuplicates: .LFB0: .cfi_startproc stp x29, x30, [sp, -48]! .cfi_def_cfa_offset 48 .cfi_offset 29, -48 .cfi_offset 30, -40 mov x29, sp str x0, [sp, 24] str w1, [sp, 20] ldr w0, [sp, 20] cmp w0, 2 bgt .L2 ldr w0, [sp, 20] b .L3 .L2: mov w0, 2 str w0, [sp, 40] mov w0, 2 str w0, [sp, 44] b .L4 .L6: ldrsw x0, [sp, 44] lsl x0, x0, 2 sub x0, x0, #8 ldr x1, [sp, 24] add x0, x1, x0 ldr w4, [x0] ldrsw x0, [sp, 44] lsl x0, x0, 2 sub x0, x0, #4 ldr x1, [sp, 24] add x0, x1, x0 ldr w2, [x0] ldrsw x0, [sp, 44] lsl x0, x0, 2 ldr x1, [sp, 24] add x0, x1, x0 ldr w0, [x0] mov w3, w0 mov w1, w4 adrp x0, .LC1 add x0, x0, :lo12:.LC1 bl printf ldrsw x0, [sp, 44] lsl x0, x0, 2 sub x0, x0, #8 ldr x1, [sp, 24] add x0, x1, x0 ldr w1, [x0] ldrsw x0, [sp, 44] lsl x0, x0, 2 ldr x2, [sp, 24] add x0, x2, x0 ldr w0, [x0] cmp w1, w0 beq .L5 ldrsw x0, [sp, 44] lsl x0, x0, 2 ldr x1, [sp, 24] add x1, x1, x0 ldr w0, [sp, 40] add w2, w0, 1 str w2, [sp, 40] sxtw x0, w0 lsl x0, x0, 2 ldr x2, [sp, 24] add x0, x2, x0 ldr w1, [x1] str w1, [x0] .L5: ldr w0, [sp, 44] add w0, w0, 1 str w0, [sp, 44] .L4: ldr w1, [sp, 44] ldr w0, [sp, 20] cmp w1, w0 bne .L6 ldr w0, [sp, 40] .L3: ldp x29, x30, [sp], 48 .cfi_restore 30 .cfi_restore 29 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE0: .size removeDuplicates, .-removeDuplicates .section .rodata .align 3 .LC2: .string "%d\n" .text .align 2 .global main .type main, %function main: .LFB1: .cfi_startproc stp x29, x30, [sp, -48]! .cfi_def_cfa_offset 48 .cfi_offset 29, -48 .cfi_offset 30, -40 mov x29, sp adrp x0, :got:__stack_chk_guard ldr x0, [x0, #:got_lo12:__stack_chk_guard] ldr x1, [x0] str x1, [sp, 40] mov x1, 0 adrp x0, .LC0 add x0, x0, :lo12:.LC0 add x2, sp, 16 mov x3, x0 ldp x0, x1, [x3] stp x0, x1, [x2] ldr x0, [x3, 16] str x0, [x2, 16] add x0, sp, 16 mov w1, 6 bl removeDuplicates mov w1, w0 adrp x0, .LC2 add x0, x0, :lo12:.LC2 bl printf mov w0, 0 mov w1, w0 adrp x0, :got:__stack_chk_guard ldr x0, [x0, #:got_lo12:__stack_chk_guard] ldr x3, [sp, 40] ldr x2, [x0] subs x3, x3, x2 mov x2, 0 beq .L9 bl __stack_chk_fail .L9: mov w0, w1 ldp x29, x30, [sp], 48 .cfi_restore 30 .cfi_restore 29 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE1: .size main, .-main .section .rodata .align 3 .LC0: .word 1 .word 1 .word 1 .word 2 .word 2 .word 3 .text ```
### Human: Write a random program in ARM assembly### Assistant: ``` .text .section .rodata .align 3 .LC0: .string "/sys/class/gpio/export" .align 3 .LC1: .string "fail to open exporter" .align 3 .LC2: .string "91" .align 3 .LC3: .string "/sys/class/gpio/gpio91/direction" .align 3 .LC4: .string "fail to open direction" .align 3 .LC5: .string "in" .align 3 .LC6: .string "/sys/class/gpio/gpio91/value" .align 3 .LC7: .string "fail to open value" .align 3 .LC8: .string "count is %d\n" .text .align 2 .global main .type main, %function main: .LFB6: .cfi_startproc stp x29, x30, [sp, -48]! .cfi_def_cfa_offset 48 .cfi_offset 29, -48 .cfi_offset 30, -40 mov x29, sp adrp x0, :got:__stack_chk_guard ldr x0, [x0, #:got_lo12:__stack_chk_guard] ldr x1, [x0] str x1, [sp, 40] mov x1, 0 mov w1, 1 adrp x0, .LC0 add x0, x0, :lo12:.LC0 bl open str w0, [sp, 28] ldr w0, [sp, 28] cmp w0, 0 bge .L2 adrp x0, .LC1 add x0, x0, :lo12:.LC1 bl puts mov w0, -1 b .L10 .L2: mov x2, 2 adrp x0, .LC2 add x1, x0, :lo12:.LC2 ldr w0, [sp, 28] bl write ldr w0, [sp, 28] bl close mov w1, 1 adrp x0, .LC3 add x0, x0, :lo12:.LC3 bl open str w0, [sp, 32] ldr w0, [sp, 32] cmp w0, 0 bge .L4 adrp x0, .LC4 add x0, x0, :lo12:.LC4 bl puts mov w0, -1 b .L10 .L4: mov x2, 2 adrp x0, .LC5 add x1, x0, :lo12:.LC5 ldr w0, [sp, 32] bl write ldr w0, [sp, 32] bl close mov w1, 0 adrp x0, .LC6 add x0, x0, :lo12:.LC6 bl open str w0, [sp, 36] ldr w0, [sp, 36] cmp w0, 0 bge .L5 adrp x0, .LC7 add x0, x0, :lo12:.LC7 bl puts mov w0, -1 b .L10 .L5: str wzr, [sp, 20] str wzr, [sp, 24] mov w0, 48 strb w0, [sp, 19] mov w0, 48 strb w0, [sp, 18] str wzr, [sp, 20] b .L6 .L9: add x0, sp, 18 mov x2, 1 mov x1, x0 ldr w0, [sp, 36] bl read mov w2, 0 mov x1, 0 ldr w0, [sp, 36] bl lseek ldrb w0, [sp, 18] ldrb w1, [sp, 19] cmp w1, w0 beq .L12 ldrb w0, [sp, 18] strb w0, [sp, 19] ldr w0, [sp, 24] add w0, w0, 1 str w0, [sp, 24] b .L8 .L12: nop .L8: ldr w0, [sp, 20] add w0, w0, 1 str w0, [sp, 20] .L6: ldr w1, [sp, 20] mov w0, 19263 movk w0, 0x4c, lsl 16 cmp w1, w0 ble .L9 ldr w1, [sp, 24] adrp x0, .LC8 add x0, x0, :lo12:.LC8 bl printf ldr w0, [sp, 36] bl close mov w0, 0 .L10: mov w1, w0 adrp x0, :got:__stack_chk_guard ldr x0, [x0, #:got_lo12:__stack_chk_guard] ldr x3, [sp, 40] ldr x2, [x0] subs x3, x3, x2 mov x2, 0 beq .L11 bl __stack_chk_fail .L11: mov w0, w1 ldp x29, x30, [sp], 48 .cfi_restore 30 .cfi_restore 29 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE6: .size main, .-main ```
### Human: Write a random program in ARM assembly### Assistant: ``` .text .align 2 .global dummy .type dummy, %function dummy: .LFB6: .cfi_startproc sub sp, sp, #16 .cfi_def_cfa_offset 16 str x0, [sp, 8] ldr x0, [sp, 8] ldr w0, [x0] add sp, sp, 16 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE6: .size dummy, .-dummy .section .rodata .align 3 .LC0: .string "%d\n" .text .align 2 .global main .type main, %function main: .LFB7: .cfi_startproc stp x29, x30, [sp, -96]! .cfi_def_cfa_offset 96 .cfi_offset 29, -96 .cfi_offset 30, -88 mov x29, sp str w0, [sp, 28] str x1, [sp, 16] adrp x0, :got:__stack_chk_guard ldr x0, [x0, #:got_lo12:__stack_chk_guard] ldr x1, [x0] str x1, [sp, 88] mov x1, 0 add x0, sp, 48 bl dummy str w0, [sp, 44] ldr w0, [sp, 92] ldr w1, [sp, 44] add w0, w1, w0 str w0, [sp, 44] ldr w1, [sp, 44] adrp x0, .LC0 add x0, x0, :lo12:.LC0 bl printf mov w0, 0 mov w1, w0 adrp x0, :got:__stack_chk_guard ldr x0, [x0, #:got_lo12:__stack_chk_guard] ldr x3, [sp, 88] ldr x2, [x0] subs x3, x3, x2 mov x2, 0 beq .L5 bl __stack_chk_fail .L5: mov w0, w1 ldp x29, x30, [sp], 96 .cfi_restore 30 .cfi_restore 29 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE7: .size main, .-main ```
### Human: Write a random program in ARM assembly### Assistant: ``` .text .global image .bss .align 3 .type image, %object .size image, 307200 image: .zero 307200 .global palette .align 3 .type palette, %object .size palette, 768 palette: .zero 768 .section .rodata .align 3 .LC0: .string "r+b" .align 3 .LC1: .string "/dev/vga/videomode" .align 3 .LC2: .string "%d %d %d" .align 3 .LC3: .string "Current resolution: %dx%d, %d BPP\n" .align 3 .LC4: .string "640 480 8" .align 3 .LC5: .string "program.c" .align 3 .LC6: .string "n > 0" .text .align 2 .global prepare_videomode .type prepare_videomode, %function prepare_videomode: .LFB0: .cfi_startproc stp x29, x30, [sp, -48]! .cfi_def_cfa_offset 48 .cfi_offset 29, -48 .cfi_offset 30, -40 mov x29, sp adrp x0, :got:__stack_chk_guard ldr x0, [x0, #:got_lo12:__stack_chk_guard] ldr x1, [x0] str x1, [sp, 40] mov x1, 0 adrp x0, .LC0 add x1, x0, :lo12:.LC0 adrp x0, .LC1 add x0, x0, :lo12:.LC1 bl fopen str x0, [sp, 32] add x2, sp, 24 add x1, sp, 20 add x0, sp, 16 mov x4, x2 mov x3, x1 mov x2, x0 adrp x0, .LC2 add x1, x0, :lo12:.LC2 ldr x0, [sp, 32] bl __isoc99_fscanf ldr w0, [sp, 16] ldr w1, [sp, 20] ldr w2, [sp, 24] mov w3, w2 mov w2, w1 mov w1, w0 adrp x0, .LC3 add x0, x0, :lo12:.LC3 bl printf adrp x0, .LC4 add x1, x0, :lo12:.LC4 ldr x0, [sp, 32] bl fprintf str w0, [sp, 28] ldr w0, [sp, 28] cmp w0, 0 bgt .L2 adrp x0, __PRETTY_FUNCTION__.2 add x3, x0, :lo12:__PRETTY_FUNCTION__.2 mov w2, 23 adrp x0, .LC5 add x1, x0, :lo12:.LC5 adrp x0, .LC6 add x0, x0, :lo12:.LC6 bl __assert_fail .L2: ldr x0, [sp, 32] bl fclose nop adrp x0, :got:__stack_chk_guard ldr x0, [x0, #:got_lo12:__stack_chk_guard] ldr x2, [sp, 40] ldr x1, [x0] subs x2, x2, x1 mov x1, 0 beq .L3 bl __stack_chk_fail .L3: ldp x29, x30, [sp], 48 .cfi_restore 30 .cfi_restore 29 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE0: .size prepare_videomode, .-prepare_videomode .section .rodata .align 3 .LC7: .string "/dev/vga/palette" .align 3 .LC8: .string "palette_handle > 0" .text .align 2 .global prepare_palette .type prepare_palette, %function prepare_palette: .LFB1: .cfi_startproc stp x29, x30, [sp, -32]! .cfi_def_cfa_offset 32 .cfi_offset 29, -32 .cfi_offset 30, -24 mov x29, sp str wzr, [sp, 24] b .L5 .L6: ldr w1, [sp, 24] mov w0, w1 lsl w0, w0, 1 add w3, w0, w1 ldr w0, [sp, 24] and w2, w0, 255 adrp x0, palette add x1, x0, :lo12:palette uxtw x0, w3 strb w2, [x1, x0] ldr w0, [sp, 24] mul w1, w0, w0 mov w0, 32897 movk w0, 0x8080, lsl 16 umull x0, w1, w0 lsr x0, x0, 32 lsr w2, w0, 7 ldr w1, [sp, 24] mov w0, w1 lsl w0, w0, 1 add w0, w0, w1 add w3, w0, 1 and w2, w2, 255 adrp x0, palette add x1, x0, :lo12:palette uxtw x0, w3 strb w2, [x1, x0] ldr w0, [sp, 24] mul w1, w0, w0 mov w0, 32897 movk w0, 0x8080, lsl 16 umull x0, w1, w0 lsr x0, x0, 32 lsr w2, w0, 7 ldr w1, [sp, 24] mov w0, w1 lsl w0, w0, 1 add w0, w0, w1 add w3, w0, 2 and w2, w2, 255 adrp x0, palette add x1, x0, :lo12:palette uxtw x0, w3 strb w2, [x1, x0] ldr w0, [sp, 24] add w0, w0, 1 str w0, [sp, 24] .L5: ldr w0, [sp, 24] cmp w0, 255 bls .L6 mov w2, 0 mov w1, 1 adrp x0, .LC7 add x0, x0, :lo12:.LC7 bl open str w0, [sp, 28] ldr w0, [sp, 28] cmp w0, 0 bgt .L7 adrp x0, __PRETTY_FUNCTION__.1 add x3, x0, :lo12:__PRETTY_FUNCTION__.1 mov w2, 34 adrp x0, .LC5 add x1, x0, :lo12:.LC5 adrp x0, .LC8 add x0, x0, :lo12:.LC8 bl __assert_fail .L7: mov x2, 768 adrp x0, palette add x1, x0, :lo12:palette ldr w0, [sp, 28] bl write ldr w0, [sp, 28] bl close nop ldp x29, x30, [sp], 32 .cfi_restore 30 .cfi_restore 29 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE1: .size prepare_palette, .-prepare_palette .section .rodata .align 3 .LC9: .string "/dev/vga/fb" .align 3 .LC10: .string "fb_handle > 0" .text .align 2 .global display_image .type display_image, %function display_image: .LFB2: .cfi_startproc stp x29, x30, [sp, -32]! .cfi_def_cfa_offset 32 .cfi_offset 29, -32 .cfi_offset 30, -24 mov x29, sp mov w2, 0 mov w1, 1 adrp x0, .LC9 add x0, x0, :lo12:.LC9 bl open str w0, [sp, 28] ldr w0, [sp, 28] cmp w0, 0 bgt .L9 adrp x0, __PRETTY_FUNCTION__.0 add x3, x0, :lo12:__PRETTY_FUNCTION__.0 mov w2, 41 adrp x0, .LC5 add x1, x0, :lo12:.LC5 adrp x0, .LC10 add x0, x0, :lo12:.LC10 bl __assert_fail .L9: mov x2, 45056 movk x2, 0x4, lsl 16 adrp x0, image add x1, x0, :lo12:image ldr w0, [sp, 28] bl write ldr w0, [sp, 28] bl close nop ldp x29, x30, [sp], 32 .cfi_restore 30 .cfi_restore 29 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE2: .size display_image, .-display_image .align 2 .global f .type f, %function f: .LFB3: .cfi_startproc sub sp, sp, #32 .cfi_def_cfa_offset 32 str s0, [sp, 12] str s1, [sp, 8] ldr s0, [sp, 12] str s0, [sp, 20] ldr s0, [sp, 8] str s0, [sp, 24] str wzr, [sp, 16] str wzr, [sp, 16] b .L11 .L15: ldr s0, [sp, 12] fmul s1, s0, s0 ldr s0, [sp, 8] fmul s0, s0, s0 fsub s0, s1, s0 ldr s1, [sp, 20] fadd s0, s1, s0 str s0, [sp, 28] ldr s0, [sp, 8] fadd s1, s0, s0 ldr s0, [sp, 12] fmul s0, s1, s0 ldr s1, [sp, 24] fadd s0, s1, s0 str s0, [sp, 8] ldr s0, [sp, 28] str s0, [sp, 12] ldr s0, [sp, 8] fmul s1, s0, s0 ldr s0, [sp, 12] fmul s0, s0, s0 fadd s0, s1, s0 mov w0, 20480 movk w0, 0x4743, lsl 16 fmov s1, w0 fcmpe s0, s1 bgt .L17 ldr w0, [sp, 16] add w0, w0, 1 str w0, [sp, 16] .L11: ldr w0, [sp, 16] cmp w0, 49 bls .L15 b .L14 .L17: nop .L14: ldr w1, [sp, 16] mov w0, -250 mul w1, w1, w0 mov w0, 12500 add w1, w1, w0 mov w0, 34079 movk w0, 0x51eb, lsl 16 umull x0, w1, w0 lsr x0, x0, 32 lsr w0, w0, 4 add sp, sp, 32 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE3: .size f, .-f .align 2 .global main .type main, %function main: .LFB4: .cfi_startproc stp x29, x30, [sp, -48]! .cfi_def_cfa_offset 48 .cfi_offset 29, -48 .cfi_offset 30, -40 mov x29, sp bl prepare_videomode bl prepare_palette str wzr, [sp, 24] b .L19 .L22: str wzr, [sp, 28] b .L20 .L21: ldr s0, [sp, 28] ucvtf s0, s0 mov w0, 1142947840 fmov s1, w0 fdiv s0, s0, s1 fadd s1, s0, s0 fmov s0, 1.0e+0 fsub s0, s1, s0 str s0, [sp, 40] ldr s0, [sp, 24] ucvtf s0, s0 mov w0, 1139802112 fmov s1, w0 fdiv s0, s0, s1 fadd s1, s0, s0 fmov s0, 1.0e+0 fsub s0, s1, s0 str s0, [sp, 44] ldr s1, [sp, 44] fmov s0, -7.5e-1 fmul s0, s1, s0 str s0, [sp, 44] ldr s1, [sp, 40] fmov s0, 2.5e-1 fsub s0, s1, s0 str s0, [sp, 40] ldr s0, [sp, 40] mov w0, 26214 movk w0, 0x3fe6, lsl 16 fmov s1, w0 fmul s0, s0, s1 str s0, [sp, 40] ldr s0, [sp, 44] mov w0, 26214 movk w0, 0x3fe6, lsl 16 fmov s1, w0 fmul s0, s0, s1 str s0, [sp, 44] ldr s1, [sp, 44] ldr s0, [sp, 40] bl f mov w2, w0 ldr w1, [sp, 24] mov w0, w1 lsl w0, w0, 2 add w0, w0, w1 lsl w0, w0, 7 mov w1, w0 ldr w0, [sp, 28] add w3, w1, w0 and w2, w2, 255 adrp x0, image add x1, x0, :lo12:image uxtw x0, w3 strb w2, [x1, x0] ldr w0, [sp, 28] add w0, w0, 1 str w0, [sp, 28] .L20: ldr w0, [sp, 28] cmp w0, 639 bls .L21 ldr w0, [sp, 24] add w0, w0, 1 str w0, [sp, 24] .L19: ldr w0, [sp, 24] cmp w0, 479 bls .L22 str wzr, [sp, 32] b .L23 .L24: ldr s0, [sp, 32] ucvtf s0, s0 mov w0, 1132462080 fmov s1, w0 fmul s0, s0, s1 mov w0, 1142947840 fmov s1, w0 fdiv s0, s0, s1 fcvtzs s0, s0 str s0, [sp, 36] adrp x0, image add x1, x0, :lo12:image ldr w0, [sp, 32] strb wzr, [x1, x0] ldr w0, [sp, 32] add w3, w0, 640 ldr w0, [sp, 36] and w2, w0, 255 adrp x0, image add x1, x0, :lo12:image uxtw x0, w3 strb w2, [x1, x0] ldr w0, [sp, 32] add w3, w0, 1280 ldr w0, [sp, 36] and w2, w0, 255 adrp x0, image add x1, x0, :lo12:image uxtw x0, w3 strb w2, [x1, x0] ldr w0, [sp, 32] add w3, w0, 1920 ldr w0, [sp, 36] and w2, w0, 255 adrp x0, image add x1, x0, :lo12:image uxtw x0, w3 strb w2, [x1, x0] ldr w0, [sp, 32] add w3, w0, 2560 ldr w0, [sp, 36] and w2, w0, 255 adrp x0, image add x1, x0, :lo12:image uxtw x0, w3 strb w2, [x1, x0] ldr w0, [sp, 32] add w3, w0, 3200 ldr w0, [sp, 36] and w2, w0, 255 adrp x0, image add x1, x0, :lo12:image uxtw x0, w3 strb w2, [x1, x0] ldr w0, [sp, 32] add w2, w0, 3840 adrp x0, image add x1, x0, :lo12:image uxtw x0, w2 strb wzr, [x1, x0] ldr w0, [sp, 32] add w0, w0, 1 str w0, [sp, 32] .L23: ldr w0, [sp, 32] cmp w0, 639 bls .L24 bl display_image mov w0, 0 ldp x29, x30, [sp], 48 .cfi_restore 30 .cfi_restore 29 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE4: .size main, .-main .section .rodata .align 3 .type __PRETTY_FUNCTION__.2, %object .size __PRETTY_FUNCTION__.2, 18 __PRETTY_FUNCTION__.2: .string "prepare_videomode" .align 3 .type __PRETTY_FUNCTION__.1, %object .size __PRETTY_FUNCTION__.1, 16 __PRETTY_FUNCTION__.1: .string "prepare_palette" .align 3 .type __PRETTY_FUNCTION__.0, %object .size __PRETTY_FUNCTION__.0, 14 __PRETTY_FUNCTION__.0: .string "display_image" ```
### Human: Write a random program in ARM assembly### Assistant: ``` .text .section .rodata .align 3 .LC0: .string "mypoint coordinates: %d, %d\n" .text .align 2 .global main .type main, %function main: .LFB6: .cfi_startproc stp x29, x30, [sp, -32]! .cfi_def_cfa_offset 32 .cfi_offset 29, -32 .cfi_offset 30, -24 mov x29, sp mov x0, 8 bl malloc str x0, [sp, 24] ldr x0, [sp, 24] mov w1, 10 str w1, [x0] ldr x0, [sp, 24] mov w1, 5 str w1, [x0, 4] ldr x0, [sp, 24] ldr w1, [x0] ldr x0, [sp, 24] ldr w0, [x0, 4] mov w2, w0 adrp x0, .LC0 add x0, x0, :lo12:.LC0 bl printf ldr x0, [sp, 24] bl free mov w0, 0 ldp x29, x30, [sp], 32 .cfi_restore 30 .cfi_restore 29 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE6: .size main, .-main ```
### Human: Write a random program in ARM assembly### Assistant: ``` .text .section .rodata .align 3 .LC0: .string "%d" .text .align 2 .global main .type main, %function main: .LFB6: .cfi_startproc stp x29, x30, [sp, -48]! .cfi_def_cfa_offset 48 .cfi_offset 29, -48 .cfi_offset 30, -40 mov x29, sp adrp x0, :got:__stack_chk_guard ldr x0, [x0, #:got_lo12:__stack_chk_guard] ldr x1, [x0] str x1, [sp, 40] mov x1, 0 str wzr, [sp, 24] add x0, sp, 20 mov x1, x0 adrp x0, .LC0 add x0, x0, :lo12:.LC0 bl __isoc99_scanf ldr w0, [sp, 20] sxtw x0, w0 lsl x0, x0, 2 bl malloc str x0, [sp, 32] str wzr, [sp, 28] b .L2 .L3: ldrsw x0, [sp, 28] lsl x0, x0, 2 ldr x1, [sp, 32] add x0, x1, x0 mov x1, x0 adrp x0, .LC0 add x0, x0, :lo12:.LC0 bl __isoc99_scanf ldrsw x0, [sp, 28] lsl x0, x0, 2 ldr x1, [sp, 32] add x0, x1, x0 ldr w0, [x0] ldr w1, [sp, 24] add w0, w1, w0 str w0, [sp, 24] ldr w0, [sp, 28] add w0, w0, 1 str w0, [sp, 28] .L2: ldr w0, [sp, 20] ldr w1, [sp, 28] cmp w1, w0 blt .L3 ldr w1, [sp, 24] adrp x0, .LC0 add x0, x0, :lo12:.LC0 bl printf ldr x0, [sp, 32] bl free mov w0, 0 mov w1, w0 adrp x0, :got:__stack_chk_guard ldr x0, [x0, #:got_lo12:__stack_chk_guard] ldr x3, [sp, 40] ldr x2, [x0] subs x3, x3, x2 mov x2, 0 beq .L5 bl __stack_chk_fail .L5: mov w0, w1 ldp x29, x30, [sp], 48 .cfi_restore 30 .cfi_restore 29 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE6: .size main, .-main ```
### Human: Write a random program in ARM assembly### Assistant: ``` .text .global IID_IShellIcon .section .rodata .align 3 .type IID_IShellIcon, %object .size IID_IShellIcon, 24 IID_IShellIcon: .xword 136421 .hword 0 .hword 0 .string "\300" .string "" .string "" .string "" .string "" .string "" .ascii "F" .zero 4 ```
### Human: Write a random program in ARM assembly### Assistant: ``` .text #APP .symver _Exit,_Exit@GLIBC_2.2.5 .symver _IO_2_1_stderr_,_IO_2_1_stderr_@GLIBC_2.2.5 .symver _IO_2_1_stdin_,_IO_2_1_stdin_@GLIBC_2.2.5 .symver _IO_2_1_stdout_,_IO_2_1_stdout_@GLIBC_2.2.5 .symver _IO_adjust_column,_IO_adjust_column@GLIBC_2.2.5 .symver _IO_adjust_wcolumn,_IO_adjust_wcolumn@GLIBC_2.2.5 .symver _IO_default_doallocate,_IO_default_doallocate@GLIBC_2.2.5 .symver _IO_default_finish,_IO_default_finish@GLIBC_2.2.5 .symver _IO_default_pbackfail,_IO_default_pbackfail@GLIBC_2.2.5 .symver _IO_default_uflow,_IO_default_uflow@GLIBC_2.2.5 .symver _IO_default_xsgetn,_IO_default_xsgetn@GLIBC_2.2.5 .symver _IO_default_xsputn,_IO_default_xsputn@GLIBC_2.2.5 .symver _IO_do_write,_IO_do_write@GLIBC_2.2.5 .symver _IO_doallocbuf,_IO_doallocbuf@GLIBC_2.2.5 .symver _IO_fclose,_IO_fclose@GLIBC_2.2.5 .symver _IO_fdopen,_IO_fdopen@GLIBC_2.2.5 .symver _IO_feof,_IO_feof@GLIBC_2.2.5 .symver _IO_ferror,_IO_ferror@GLIBC_2.2.5 .symver _IO_fflush,_IO_fflush@GLIBC_2.2.5 .symver _IO_fgetpos,_IO_fgetpos@GLIBC_2.2.5 .symver _IO_fgetpos64,_IO_fgetpos64@GLIBC_2.2.5 .symver _IO_fgets,_IO_fgets@GLIBC_2.2.5 .symver _IO_file_attach,_IO_file_attach@GLIBC_2.2.5 .symver _IO_file_close,_IO_file_close@GLIBC_2.2.5 .symver _IO_file_close_it,_IO_file_close_it@GLIBC_2.2.5 .symver _IO_file_doallocate,_IO_file_doallocate@GLIBC_2.2.5 .symver _IO_file_finish,_IO_file_finish@GLIBC_2.2.5 .symver _IO_file_fopen,_IO_file_fopen@GLIBC_2.2.5 .symver _IO_file_init,_IO_file_init@GLIBC_2.2.5 .symver _IO_file_jumps,_IO_file_jumps@GLIBC_2.2.5 .symver _IO_file_open,_IO_file_open@GLIBC_2.2.5 .symver _IO_file_overflow,_IO_file_overflow@GLIBC_2.2.5 .symver _IO_file_read,_IO_file_read@GLIBC_2.2.5 .symver _IO_file_seek,_IO_file_seek@GLIBC_2.2.5 .symver _IO_file_seekoff,_IO_file_seekoff@GLIBC_2.2.5 .symver _IO_file_setbuf,_IO_file_setbuf@GLIBC_2.2.5 .symver _IO_file_stat,_IO_file_stat@GLIBC_2.2.5 .symver _IO_file_sync,_IO_file_sync@GLIBC_2.2.5 .symver _IO_file_underflow,_IO_file_underflow@GLIBC_2.2.5 .symver _IO_file_write,_IO_file_write@GLIBC_2.2.5 .symver _IO_file_xsputn,_IO_file_xsputn@GLIBC_2.2.5 .symver _IO_flockfile,_IO_flockfile@GLIBC_2.2.5 .symver _IO_flush_all,_IO_flush_all@GLIBC_2.2.5 .symver _IO_flush_all_linebuffered,_IO_flush_all_linebuffered@GLIBC_2.2.5 .symver _IO_fopen,_IO_fopen@GLIBC_2.2.5 .symver _IO_fprintf,_IO_fprintf@GLIBC_2.2.5 .symver _IO_fputs,_IO_fputs@GLIBC_2.2.5 .symver _IO_fread,_IO_fread@GLIBC_2.2.5 .symver _IO_free_backup_area,_IO_free_backup_area@GLIBC_2.2.5 .symver _IO_free_wbackup_area,_IO_free_wbackup_area@GLIBC_2.2.5 .symver _IO_fsetpos,_IO_fsetpos@GLIBC_2.2.5 .symver _IO_fsetpos64,_IO_fsetpos64@GLIBC_2.2.5 .symver _IO_ftell,_IO_ftell@GLIBC_2.2.5 .symver _IO_ftrylockfile,_IO_ftrylockfile@GLIBC_2.2.5 .symver _IO_funlockfile,_IO_funlockfile@GLIBC_2.2.5 .symver _IO_fwrite,_IO_fwrite@GLIBC_2.2.5 .symver _IO_getc,_IO_getc@GLIBC_2.2.5 .symver _IO_getline,_IO_getline@GLIBC_2.2.5 .symver _IO_getline_info,_IO_getline_info@GLIBC_2.2.5 .symver _IO_gets,_IO_gets@GLIBC_2.2.5 .symver _IO_init,_IO_init@GLIBC_2.2.5 .symver _IO_init_marker,_IO_init_marker@GLIBC_2.2.5 .symver _IO_init_wmarker,_IO_init_wmarker@GLIBC_2.2.5 .symver _IO_iter_begin,_IO_iter_begin@GLIBC_2.2.5 .symver _IO_iter_end,_IO_iter_end@GLIBC_2.2.5 .symver _IO_iter_file,_IO_iter_file@GLIBC_2.2.5 .symver _IO_iter_next,_IO_iter_next@GLIBC_2.2.5 .symver _IO_least_wmarker,_IO_least_wmarker@GLIBC_2.2.5 .symver _IO_link_in,_IO_link_in@GLIBC_2.2.5 .symver _IO_list_all,_IO_list_all@GLIBC_2.2.5 .symver _IO_list_lock,_IO_list_lock@GLIBC_2.2.5 .symver _IO_list_resetlock,_IO_list_resetlock@GLIBC_2.2.5 .symver _IO_list_unlock,_IO_list_unlock@GLIBC_2.2.5 .symver _IO_marker_delta,_IO_marker_delta@GLIBC_2.2.5 .symver _IO_marker_difference,_IO_marker_difference@GLIBC_2.2.5 .symver _IO_padn,_IO_padn@GLIBC_2.2.5 .symver _IO_peekc_locked,_IO_peekc_locked@GLIBC_2.2.5 .symver _IO_popen,_IO_popen@GLIBC_2.2.5 .symver _IO_printf,_IO_printf@GLIBC_2.2.5 .symver _IO_proc_close,_IO_proc_close@GLIBC_2.2.5 .symver _IO_proc_open,_IO_proc_open@GLIBC_2.2.5 .symver _IO_putc,_IO_putc@GLIBC_2.2.5 .symver _IO_puts,_IO_puts@GLIBC_2.2.5 .symver _IO_remove_marker,_IO_remove_marker@GLIBC_2.2.5 .symver _IO_seekmark,_IO_seekmark@GLIBC_2.2.5 .symver _IO_seekoff,_IO_seekoff@GLIBC_2.2.5 .symver _IO_seekpos,_IO_seekpos@GLIBC_2.2.5 .symver _IO_seekwmark,_IO_seekwmark@GLIBC_2.2.5 .symver _IO_setb,_IO_setb@GLIBC_2.2.5 .symver _IO_setbuffer,_IO_setbuffer@GLIBC_2.2.5 .symver _IO_setvbuf,_IO_setvbuf@GLIBC_2.2.5 .symver _IO_sgetn,_IO_sgetn@GLIBC_2.2.5 .symver _IO_sprintf,_IO_sprintf@GLIBC_2.2.5 .symver _IO_sputbackc,_IO_sputbackc@GLIBC_2.2.5 .symver _IO_sputbackwc,_IO_sputbackwc@GLIBC_2.2.5 .symver _IO_sscanf,_IO_sscanf@GLIBC_2.2.5 .symver _IO_str_init_readonly,_IO_str_init_readonly@GLIBC_2.2.5 .symver _IO_str_init_static,_IO_str_init_static@GLIBC_2.2.5 .symver _IO_str_overflow,_IO_str_overflow@GLIBC_2.2.5 .symver _IO_str_pbackfail,_IO_str_pbackfail@GLIBC_2.2.5 .symver _IO_str_seekoff,_IO_str_seekoff@GLIBC_2.2.5 .symver _IO_str_underflow,_IO_str_underflow@GLIBC_2.2.5 .symver _IO_sungetc,_IO_sungetc@GLIBC_2.2.5 .symver _IO_sungetwc,_IO_sungetwc@GLIBC_2.2.5 .symver _IO_switch_to_get_mode,_IO_switch_to_get_mode@GLIBC_2.2.5 .symver _IO_switch_to_main_wget_area,_IO_switch_to_main_wget_area@GLIBC_2.2.5 .symver _IO_switch_to_wbackup_area,_IO_switch_to_wbackup_area@GLIBC_2.2.5 .symver _IO_switch_to_wget_mode,_IO_switch_to_wget_mode@GLIBC_2.2.5 .symver _IO_un_link,_IO_un_link@GLIBC_2.2.5 .symver _IO_ungetc,_IO_ungetc@GLIBC_2.2.5 .symver _IO_unsave_markers,_IO_unsave_markers@GLIBC_2.2.5 .symver _IO_unsave_wmarkers,_IO_unsave_wmarkers@GLIBC_2.2.5 .symver _IO_vfprintf,_IO_vfprintf@GLIBC_2.2.5 .symver _IO_vfscanf,_IO_vfscanf@GLIBC_2.2.5 .symver _IO_vsprintf,_IO_vsprintf@GLIBC_2.2.5 .symver _IO_wdefault_doallocate,_IO_wdefault_doallocate@GLIBC_2.2.5 .symver _IO_wdefault_finish,_IO_wdefault_finish@GLIBC_2.2.5 .symver _IO_wdefault_pbackfail,_IO_wdefault_pbackfail@GLIBC_2.2.5 .symver _IO_wdefault_uflow,_IO_wdefault_uflow@GLIBC_2.2.5 .symver _IO_wdefault_xsgetn,_IO_wdefault_xsgetn@GLIBC_2.2.5 .symver _IO_wdefault_xsputn,_IO_wdefault_xsputn@GLIBC_2.2.5 .symver _IO_wdo_write,_IO_wdo_write@GLIBC_2.2.5 .symver _IO_wdoallocbuf,_IO_wdoallocbuf@GLIBC_2.2.5 .symver _IO_wfile_jumps,_IO_wfile_jumps@GLIBC_2.2.5 .symver _IO_wfile_overflow,_IO_wfile_overflow@GLIBC_2.2.5 .symver _IO_wfile_seekoff,_IO_wfile_seekoff@GLIBC_2.2.5 .symver _IO_wfile_sync,_IO_wfile_sync@GLIBC_2.2.5 .symver _IO_wfile_underflow,_IO_wfile_underflow@GLIBC_2.2.5 .symver _IO_wfile_xsputn,_IO_wfile_xsputn@GLIBC_2.2.5 .symver _IO_wmarker_delta,_IO_wmarker_delta@GLIBC_2.2.5 .symver _IO_wsetb,_IO_wsetb@GLIBC_2.2.5 .symver _LIB_VERSION,_LIB_VERSION@GLIBC_2.2.5 .symver _ZGVbN2v_cos,_ZGVbN2v_cos@GLIBC_2.22 .symver _ZGVbN2v_exp,_ZGVbN2v_exp@GLIBC_2.22 .symver _ZGVbN2v_log,_ZGVbN2v_log@GLIBC_2.22 .symver _ZGVbN2v_sin,_ZGVbN2v_sin@GLIBC_2.22 .symver _ZGVbN2vv_pow,_ZGVbN2vv_pow@GLIBC_2.22 .symver _ZGVbN2vvv_sincos,_ZGVbN2vvv_sincos@GLIBC_2.22 .symver _ZGVbN4v_cosf,_ZGVbN4v_cosf@GLIBC_2.22 .symver _ZGVbN4v_expf,_ZGVbN4v_expf@GLIBC_2.22 .symver _ZGVbN4v_logf,_ZGVbN4v_logf@GLIBC_2.22 .symver _ZGVbN4v_sinf,_ZGVbN4v_sinf@GLIBC_2.22 .symver _ZGVbN4vv_powf,_ZGVbN4vv_powf@GLIBC_2.22 .symver _ZGVbN4vvv_sincosf,_ZGVbN4vvv_sincosf@GLIBC_2.22 .symver _ZGVcN4v_cos,_ZGVcN4v_cos@GLIBC_2.22 .symver _ZGVcN4v_exp,_ZGVcN4v_exp@GLIBC_2.22 .symver _ZGVcN4v_log,_ZGVcN4v_log@GLIBC_2.22 .symver _ZGVcN4v_sin,_ZGVcN4v_sin@GLIBC_2.22 .symver _ZGVcN4vv_pow,_ZGVcN4vv_pow@GLIBC_2.22 .symver _ZGVcN4vvv_sincos,_ZGVcN4vvv_sincos@GLIBC_2.22 .symver _ZGVcN8v_cosf,_ZGVcN8v_cosf@GLIBC_2.22 .symver _ZGVcN8v_expf,_ZGVcN8v_expf@GLIBC_2.22 .symver _ZGVcN8v_logf,_ZGVcN8v_logf@GLIBC_2.22 .symver _ZGVcN8v_sinf,_ZGVcN8v_sinf@GLIBC_2.22 .symver _ZGVcN8vv_powf,_ZGVcN8vv_powf@GLIBC_2.22 .symver _ZGVcN8vvv_sincosf,_ZGVcN8vvv_sincosf@GLIBC_2.22 .symver _ZGVdN4v_cos,_ZGVdN4v_cos@GLIBC_2.22 .symver _ZGVdN4v_exp,_ZGVdN4v_exp@GLIBC_2.22 .symver _ZGVdN4v_log,_ZGVdN4v_log@GLIBC_2.22 .symver _ZGVdN4v_sin,_ZGVdN4v_sin@GLIBC_2.22 .symver _ZGVdN4vv_pow,_ZGVdN4vv_pow@GLIBC_2.22 .symver _ZGVdN4vvv_sincos,_ZGVdN4vvv_sincos@GLIBC_2.22 .symver _ZGVdN8v_cosf,_ZGVdN8v_cosf@GLIBC_2.22 .symver _ZGVdN8v_expf,_ZGVdN8v_expf@GLIBC_2.22 .symver _ZGVdN8v_logf,_ZGVdN8v_logf@GLIBC_2.22 .symver _ZGVdN8v_sinf,_ZGVdN8v_sinf@GLIBC_2.22 .symver _ZGVdN8vv_powf,_ZGVdN8vv_powf@GLIBC_2.22 .symver _ZGVdN8vvv_sincosf,_ZGVdN8vvv_sincosf@GLIBC_2.22 .symver _ZGVeN16v_cosf,_ZGVeN16v_cosf@GLIBC_2.22 .symver _ZGVeN16v_expf,_ZGVeN16v_expf@GLIBC_2.22 .symver _ZGVeN16v_logf,_ZGVeN16v_logf@GLIBC_2.22 .symver _ZGVeN16v_sinf,_ZGVeN16v_sinf@GLIBC_2.22 .symver _ZGVeN16vv_powf,_ZGVeN16vv_powf@GLIBC_2.22 .symver _ZGVeN16vvv_sincosf,_ZGVeN16vvv_sincosf@GLIBC_2.22 .symver _ZGVeN8v_cos,_ZGVeN8v_cos@GLIBC_2.22 .symver _ZGVeN8v_exp,_ZGVeN8v_exp@GLIBC_2.22 .symver _ZGVeN8v_log,_ZGVeN8v_log@GLIBC_2.22 .symver _ZGVeN8v_sin,_ZGVeN8v_sin@GLIBC_2.22 .symver _ZGVeN8vv_pow,_ZGVeN8vv_pow@GLIBC_2.22 .symver _ZGVeN8vvv_sincos,_ZGVeN8vvv_sincos@GLIBC_2.22 .symver __acos_finite,__acos_finite@GLIBC_2.15 .symver __acosf_finite,__acosf_finite@GLIBC_2.15 .symver __acosh_finite,__acosh_finite@GLIBC_2.15 .symver __acoshf_finite,__acoshf_finite@GLIBC_2.15 .symver __acoshl_finite,__acoshl_finite@GLIBC_2.15 .symver __acosl_finite,__acosl_finite@GLIBC_2.15 .symver __adjtimex,__adjtimex@GLIBC_2.2.5 .symver __after_morecore_hook,__after_morecore_hook@GLIBC_2.2.5 .symver __arch_prctl,__arch_prctl@GLIBC_2.2.5 .symver __argz_count,__argz_count@GLIBC_2.2.5 .symver __argz_next,__argz_next@GLIBC_2.2.5 .symver __argz_stringify,__argz_stringify@GLIBC_2.2.5 .symver __asin_finite,__asin_finite@GLIBC_2.15 .symver __asinf_finite,__asinf_finite@GLIBC_2.15 .symver __asinl_finite,__asinl_finite@GLIBC_2.15 .symver __asprintf,__asprintf@GLIBC_2.2.5 .symver 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_sys_errlist,_sys_errlist@GLIBC_2.12 .symver _sys_nerr,_sys_nerr@GLIBC_2.12 .symver _sys_siglist,_sys_siglist@GLIBC_2.3.3 .symver _tolower,_tolower@GLIBC_2.2.5 .symver _toupper,_toupper@GLIBC_2.2.5 .symver a64l,a64l@GLIBC_2.2.5 .symver abort,abort@GLIBC_2.2.5 .symver abs,abs@GLIBC_2.2.5 .symver accept,accept@GLIBC_2.2.5 .symver accept4,accept4@GLIBC_2.10 .symver access,access@GLIBC_2.2.5 .symver acct,acct@GLIBC_2.2.5 .symver acos,acos@GLIBC_2.2.5 .symver acosf,acosf@GLIBC_2.2.5 .symver acosh,acosh@GLIBC_2.2.5 .symver acoshf,acoshf@GLIBC_2.2.5 .symver acoshl,acoshl@GLIBC_2.2.5 .symver acosl,acosl@GLIBC_2.2.5 .symver addmntent,addmntent@GLIBC_2.2.5 .symver addseverity,addseverity@GLIBC_2.2.5 .symver adjtime,adjtime@GLIBC_2.2.5 .symver adjtimex,adjtimex@GLIBC_2.2.5 .symver aio_cancel,aio_cancel@GLIBC_2.2.5 .symver aio_cancel64,aio_cancel64@GLIBC_2.2.5 .symver aio_error,aio_error@GLIBC_2.2.5 .symver aio_error64,aio_error64@GLIBC_2.2.5 .symver aio_fsync,aio_fsync@GLIBC_2.2.5 .symver aio_fsync64,aio_fsync64@GLIBC_2.2.5 .symver aio_init,aio_init@GLIBC_2.2.5 .symver aio_read,aio_read@GLIBC_2.2.5 .symver aio_read64,aio_read64@GLIBC_2.2.5 .symver aio_return,aio_return@GLIBC_2.2.5 .symver aio_return64,aio_return64@GLIBC_2.2.5 .symver aio_suspend,aio_suspend@GLIBC_2.2.5 .symver aio_suspend64,aio_suspend64@GLIBC_2.2.5 .symver aio_write,aio_write@GLIBC_2.2.5 .symver aio_write64,aio_write64@GLIBC_2.2.5 .symver alarm,alarm@GLIBC_2.2.5 .symver aligned_alloc,aligned_alloc@GLIBC_2.16 .symver alphasort,alphasort@GLIBC_2.2.5 .symver alphasort64,alphasort64@GLIBC_2.2.5 .symver arch_prctl,arch_prctl@GLIBC_2.2.5 .symver argp_err_exit_status,argp_err_exit_status@GLIBC_2.2.5 .symver argp_error,argp_error@GLIBC_2.2.5 .symver argp_failure,argp_failure@GLIBC_2.2.5 .symver argp_help,argp_help@GLIBC_2.2.5 .symver argp_parse,argp_parse@GLIBC_2.2.5 .symver argp_program_bug_address,argp_program_bug_address@GLIBC_2.2.5 .symver argp_program_version,argp_program_version@GLIBC_2.2.5 .symver argp_program_version_hook,argp_program_version_hook@GLIBC_2.2.5 .symver argp_state_help,argp_state_help@GLIBC_2.2.5 .symver argp_usage,argp_usage@GLIBC_2.2.5 .symver argz_add,argz_add@GLIBC_2.2.5 .symver argz_add_sep,argz_add_sep@GLIBC_2.2.5 .symver argz_append,argz_append@GLIBC_2.2.5 .symver argz_count,argz_count@GLIBC_2.2.5 .symver argz_create,argz_create@GLIBC_2.2.5 .symver argz_create_sep,argz_create_sep@GLIBC_2.2.5 .symver argz_delete,argz_delete@GLIBC_2.2.5 .symver argz_extract,argz_extract@GLIBC_2.2.5 .symver argz_insert,argz_insert@GLIBC_2.2.5 .symver argz_next,argz_next@GLIBC_2.2.5 .symver argz_replace,argz_replace@GLIBC_2.2.5 .symver argz_stringify,argz_stringify@GLIBC_2.2.5 .symver asctime,asctime@GLIBC_2.2.5 .symver asctime_r,asctime_r@GLIBC_2.2.5 .symver asin,asin@GLIBC_2.2.5 .symver asinf,asinf@GLIBC_2.2.5 .symver asinh,asinh@GLIBC_2.2.5 .symver asinhf,asinhf@GLIBC_2.2.5 .symver asinhl,asinhl@GLIBC_2.2.5 .symver asinl,asinl@GLIBC_2.2.5 .symver asprintf,asprintf@GLIBC_2.2.5 .symver atan,atan@GLIBC_2.2.5 .symver atan2,atan2@GLIBC_2.2.5 .symver atan2f,atan2f@GLIBC_2.2.5 .symver atan2l,atan2l@GLIBC_2.2.5 .symver atanf,atanf@GLIBC_2.2.5 .symver atanh,atanh@GLIBC_2.2.5 .symver atanhf,atanhf@GLIBC_2.2.5 .symver atanhl,atanhl@GLIBC_2.2.5 .symver atanl,atanl@GLIBC_2.2.5 .symver atof,atof@GLIBC_2.2.5 .symver atoi,atoi@GLIBC_2.2.5 .symver atol,atol@GLIBC_2.2.5 .symver atoll,atoll@GLIBC_2.2.5 .symver authdes_create,authdes_create@GLIBC_2.2.5 .symver authdes_pk_create,authdes_pk_create@GLIBC_2.2.5 .symver authunix_create_default,authunix_create_default@GLIBC_2.2.5 .symver backtrace,backtrace@GLIBC_2.2.5 .symver backtrace_symbols,backtrace_symbols@GLIBC_2.2.5 .symver backtrace_symbols_fd,backtrace_symbols_fd@GLIBC_2.2.5 .symver basename,basename@GLIBC_2.2.5 .symver bcmp,bcmp@GLIBC_2.2.5 .symver bcopy,bcopy@GLIBC_2.2.5 .symver bind,bind@GLIBC_2.2.5 .symver bind_textdomain_codeset,bind_textdomain_codeset@GLIBC_2.2.5 .symver bindresvport,bindresvport@GLIBC_2.2.5 .symver bindtextdomain,bindtextdomain@GLIBC_2.2.5 .symver brk,brk@GLIBC_2.2.5 .symver bsd_signal,bsd_signal@GLIBC_2.2.5 .symver bsearch,bsearch@GLIBC_2.2.5 .symver btowc,btowc@GLIBC_2.2.5 .symver bzero,bzero@GLIBC_2.2.5 .symver c16rtomb,c16rtomb@GLIBC_2.16 .symver c32rtomb,c32rtomb@GLIBC_2.16 .symver cabs,cabs@GLIBC_2.2.5 .symver cabsf,cabsf@GLIBC_2.2.5 .symver cabsl,cabsl@GLIBC_2.2.5 .symver cacos,cacos@GLIBC_2.2.5 .symver cacosf,cacosf@GLIBC_2.2.5 .symver cacosh,cacosh@GLIBC_2.2.5 .symver cacoshf,cacoshf@GLIBC_2.2.5 .symver cacoshl,cacoshl@GLIBC_2.2.5 .symver cacosl,cacosl@GLIBC_2.2.5 .symver calloc,calloc@GLIBC_2.2.5 .symver canonicalize,canonicalize@GLIBC_2.25 .symver canonicalize_file_name,canonicalize_file_name@GLIBC_2.2.5 .symver canonicalizef,canonicalizef@GLIBC_2.25 .symver canonicalizel,canonicalizel@GLIBC_2.25 .symver capget,capget@GLIBC_2.2.5 .symver capset,capset@GLIBC_2.2.5 .symver carg,carg@GLIBC_2.2.5 .symver cargf,cargf@GLIBC_2.2.5 .symver cargl,cargl@GLIBC_2.2.5 .symver casin,casin@GLIBC_2.2.5 .symver casinf,casinf@GLIBC_2.2.5 .symver casinh,casinh@GLIBC_2.2.5 .symver casinhf,casinhf@GLIBC_2.2.5 .symver casinhl,casinhl@GLIBC_2.2.5 .symver casinl,casinl@GLIBC_2.2.5 .symver catan,catan@GLIBC_2.2.5 .symver catanf,catanf@GLIBC_2.2.5 .symver catanh,catanh@GLIBC_2.2.5 .symver catanhf,catanhf@GLIBC_2.2.5 .symver catanhl,catanhl@GLIBC_2.2.5 .symver catanl,catanl@GLIBC_2.2.5 .symver catclose,catclose@GLIBC_2.2.5 .symver catgets,catgets@GLIBC_2.2.5 .symver catopen,catopen@GLIBC_2.2.5 .symver cbrt,cbrt@GLIBC_2.2.5 .symver cbrtf,cbrtf@GLIBC_2.2.5 .symver cbrtl,cbrtl@GLIBC_2.2.5 .symver ccos,ccos@GLIBC_2.2.5 .symver ccosf,ccosf@GLIBC_2.2.5 .symver ccosh,ccosh@GLIBC_2.2.5 .symver ccoshf,ccoshf@GLIBC_2.2.5 .symver ccoshl,ccoshl@GLIBC_2.2.5 .symver ccosl,ccosl@GLIBC_2.2.5 .symver ceil,ceil@GLIBC_2.2.5 .symver ceilf,ceilf@GLIBC_2.2.5 .symver ceill,ceill@GLIBC_2.2.5 .symver cexp,cexp@GLIBC_2.2.5 .symver cexpf,cexpf@GLIBC_2.2.5 .symver cexpl,cexpl@GLIBC_2.2.5 .symver cfgetispeed,cfgetispeed@GLIBC_2.2.5 .symver cfgetospeed,cfgetospeed@GLIBC_2.2.5 .symver cfmakeraw,cfmakeraw@GLIBC_2.2.5 .symver cfree,cfree@GLIBC_2.2.5 .symver cfsetispeed,cfsetispeed@GLIBC_2.2.5 .symver cfsetospeed,cfsetospeed@GLIBC_2.2.5 .symver cfsetspeed,cfsetspeed@GLIBC_2.2.5 .symver chdir,chdir@GLIBC_2.2.5 .symver chflags,chflags@GLIBC_2.2.5 .symver chmod,chmod@GLIBC_2.2.5 .symver chown,chown@GLIBC_2.2.5 .symver chroot,chroot@GLIBC_2.2.5 .symver cimag,cimag@GLIBC_2.2.5 .symver cimagf,cimagf@GLIBC_2.2.5 .symver cimagl,cimagl@GLIBC_2.2.5 .symver clearenv,clearenv@GLIBC_2.2.5 .symver clearerr,clearerr@GLIBC_2.2.5 .symver clearerr_unlocked,clearerr_unlocked@GLIBC_2.2.5 .symver clnt_create,clnt_create@GLIBC_2.2.5 .symver clnt_pcreateerror,clnt_pcreateerror@GLIBC_2.2.5 .symver clnt_perror,clnt_perror@GLIBC_2.2.5 .symver clnt_sperrno,clnt_sperrno@GLIBC_2.2.5 .symver clnttcp_create,clnttcp_create@GLIBC_2.2.5 .symver clntudp_create,clntudp_create@GLIBC_2.2.5 .symver clock,clock@GLIBC_2.2.5 .symver clock_adjtime,clock_adjtime@GLIBC_2.14 .symver clock_getcpuclockid,clock_getcpuclockid@GLIBC_2.17 .symver clock_getres,clock_getres@GLIBC_2.17 .symver clock_gettime,clock_gettime@GLIBC_2.17 .symver clock_nanosleep,clock_nanosleep@GLIBC_2.17 .symver clock_settime,clock_settime@GLIBC_2.17 .symver clog,clog@GLIBC_2.2.5 .symver clog10,clog10@GLIBC_2.2.5 .symver clog10f,clog10f@GLIBC_2.2.5 .symver clog10l,clog10l@GLIBC_2.2.5 .symver clogf,clogf@GLIBC_2.2.5 .symver clogl,clogl@GLIBC_2.2.5 .symver clone,clone@GLIBC_2.2.5 .symver close,close@GLIBC_2.2.5 .symver closedir,closedir@GLIBC_2.2.5 .symver closelog,closelog@GLIBC_2.2.5 .symver confstr,confstr@GLIBC_2.2.5 .symver conj,conj@GLIBC_2.2.5 .symver conjf,conjf@GLIBC_2.2.5 .symver conjl,conjl@GLIBC_2.2.5 .symver connect,connect@GLIBC_2.2.5 .symver copysign,copysign@GLIBC_2.2.5 .symver copysignf,copysignf@GLIBC_2.2.5 .symver copysignl,copysignl@GLIBC_2.2.5 .symver cos,cos@GLIBC_2.2.5 .symver cosf,cosf@GLIBC_2.2.5 .symver cosh,cosh@GLIBC_2.2.5 .symver coshf,coshf@GLIBC_2.2.5 .symver coshl,coshl@GLIBC_2.2.5 .symver cosl,cosl@GLIBC_2.2.5 .symver cpow,cpow@GLIBC_2.2.5 .symver cpowf,cpowf@GLIBC_2.2.5 .symver cpowl,cpowl@GLIBC_2.2.5 .symver cproj,cproj@GLIBC_2.2.5 .symver cprojf,cprojf@GLIBC_2.2.5 .symver cprojl,cprojl@GLIBC_2.2.5 .symver creal,creal@GLIBC_2.2.5 .symver crealf,crealf@GLIBC_2.2.5 .symver creall,creall@GLIBC_2.2.5 .symver creat,creat@GLIBC_2.2.5 .symver creat64,creat64@GLIBC_2.2.5 .symver crypt,crypt@GLIBC_2.2.5 .symver crypt_r,crypt_r@GLIBC_2.2.5 .symver csin,csin@GLIBC_2.2.5 .symver csinf,csinf@GLIBC_2.2.5 .symver csinh,csinh@GLIBC_2.2.5 .symver csinhf,csinhf@GLIBC_2.2.5 .symver csinhl,csinhl@GLIBC_2.2.5 .symver csinl,csinl@GLIBC_2.2.5 .symver csqrt,csqrt@GLIBC_2.2.5 .symver csqrtf,csqrtf@GLIBC_2.2.5 .symver csqrtl,csqrtl@GLIBC_2.2.5 .symver ctan,ctan@GLIBC_2.2.5 .symver ctanf,ctanf@GLIBC_2.2.5 .symver ctanh,ctanh@GLIBC_2.2.5 .symver ctanhf,ctanhf@GLIBC_2.2.5 .symver ctanhl,ctanhl@GLIBC_2.2.5 .symver ctanl,ctanl@GLIBC_2.2.5 .symver ctermid,ctermid@GLIBC_2.2.5 .symver ctime,ctime@GLIBC_2.2.5 .symver ctime_r,ctime_r@GLIBC_2.2.5 .symver cuserid,cuserid@GLIBC_2.2.5 .symver daemon,daemon@GLIBC_2.2.5 .symver daylight,daylight@GLIBC_2.2.5 .symver dcgettext,dcgettext@GLIBC_2.2.5 .symver dcngettext,dcngettext@GLIBC_2.2.5 .symver delete_module,delete_module@GLIBC_2.2.5 .symver dgettext,dgettext@GLIBC_2.2.5 .symver difftime,difftime@GLIBC_2.2.5 .symver dirfd,dirfd@GLIBC_2.2.5 .symver dirname,dirname@GLIBC_2.2.5 .symver div,div@GLIBC_2.2.5 .symver dl_iterate_phdr,dl_iterate_phdr@GLIBC_2.2.5 .symver dladdr,dladdr@GLIBC_2.2.5 .symver dladdr1,dladdr1@GLIBC_2.3.3 .symver dlclose,dlclose@GLIBC_2.2.5 .symver dlerror,dlerror@GLIBC_2.2.5 .symver dlinfo,dlinfo@GLIBC_2.3.3 .symver dlmopen,dlmopen@GLIBC_2.3.4 .symver dlopen,dlopen@GLIBC_2.2.5 .symver dlsym,dlsym@GLIBC_2.2.5 .symver dlvsym,dlvsym@GLIBC_2.2.5 .symver dngettext,dngettext@GLIBC_2.2.5 .symver dprintf,dprintf@GLIBC_2.2.5 .symver drand48,drand48@GLIBC_2.2.5 .symver drand48_r,drand48_r@GLIBC_2.2.5 .symver drem,drem@GLIBC_2.2.5 .symver dremf,dremf@GLIBC_2.2.5 .symver dreml,dreml@GLIBC_2.2.5 .symver dup,dup@GLIBC_2.2.5 .symver dup2,dup2@GLIBC_2.2.5 .symver dup3,dup3@GLIBC_2.9 .symver duplocale,duplocale@GLIBC_2.3 .symver dysize,dysize@GLIBC_2.2.5 .symver eaccess,eaccess@GLIBC_2.4 .symver ecvt,ecvt@GLIBC_2.2.5 .symver ecvt_r,ecvt_r@GLIBC_2.2.5 .symver encrypt,encrypt@GLIBC_2.2.5 .symver encrypt_r,encrypt_r@GLIBC_2.2.5 .symver endaliasent,endaliasent@GLIBC_2.2.5 .symver endfsent,endfsent@GLIBC_2.2.5 .symver endgrent,endgrent@GLIBC_2.2.5 .symver endhostent,endhostent@GLIBC_2.2.5 .symver endmntent,endmntent@GLIBC_2.2.5 .symver endnetent,endnetent@GLIBC_2.2.5 .symver endnetgrent,endnetgrent@GLIBC_2.2.5 .symver endprotoent,endprotoent@GLIBC_2.2.5 .symver endpwent,endpwent@GLIBC_2.2.5 .symver endrpcent,endrpcent@GLIBC_2.2.5 .symver endservent,endservent@GLIBC_2.2.5 .symver endsgent,endsgent@GLIBC_2.10 .symver endspent,endspent@GLIBC_2.2.5 .symver endttyent,endttyent@GLIBC_2.2.5 .symver endusershell,endusershell@GLIBC_2.2.5 .symver endutent,endutent@GLIBC_2.2.5 .symver endutxent,endutxent@GLIBC_2.2.5 .symver environ,environ@GLIBC_2.2.5 .symver envz_add,envz_add@GLIBC_2.2.5 .symver envz_entry,envz_entry@GLIBC_2.2.5 .symver envz_get,envz_get@GLIBC_2.2.5 .symver envz_merge,envz_merge@GLIBC_2.2.5 .symver envz_remove,envz_remove@GLIBC_2.2.5 .symver envz_strip,envz_strip@GLIBC_2.2.5 .symver epoll_create,epoll_create@GLIBC_2.3.2 .symver epoll_create1,epoll_create1@GLIBC_2.9 .symver epoll_ctl,epoll_ctl@GLIBC_2.3.2 .symver epoll_pwait,epoll_pwait@GLIBC_2.6 .symver epoll_wait,epoll_wait@GLIBC_2.3.2 .symver erand48,erand48@GLIBC_2.2.5 .symver erand48_r,erand48_r@GLIBC_2.2.5 .symver erf,erf@GLIBC_2.2.5 .symver erfc,erfc@GLIBC_2.2.5 .symver erfcf,erfcf@GLIBC_2.2.5 .symver erfcl,erfcl@GLIBC_2.2.5 .symver erff,erff@GLIBC_2.2.5 .symver erfl,erfl@GLIBC_2.2.5 .symver err,err@GLIBC_2.2.5 .symver error,error@GLIBC_2.2.5 .symver error_at_line,error_at_line@GLIBC_2.2.5 .symver error_message_count,error_message_count@GLIBC_2.2.5 .symver error_one_per_line,error_one_per_line@GLIBC_2.2.5 .symver error_print_progname,error_print_progname@GLIBC_2.2.5 .symver errx,errx@GLIBC_2.2.5 .symver ether_aton,ether_aton@GLIBC_2.2.5 .symver ether_aton_r,ether_aton_r@GLIBC_2.2.5 .symver ether_hostton,ether_hostton@GLIBC_2.2.5 .symver ether_line,ether_line@GLIBC_2.2.5 .symver ether_ntoa,ether_ntoa@GLIBC_2.2.5 .symver ether_ntoa_r,ether_ntoa_r@GLIBC_2.2.5 .symver ether_ntohost,ether_ntohost@GLIBC_2.2.5 .symver euidaccess,euidaccess@GLIBC_2.2.5 .symver eventfd,eventfd@GLIBC_2.7 .symver eventfd_read,eventfd_read@GLIBC_2.7 .symver eventfd_write,eventfd_write@GLIBC_2.7 .symver execl,execl@GLIBC_2.2.5 .symver execle,execle@GLIBC_2.2.5 .symver execlp,execlp@GLIBC_2.2.5 .symver execv,execv@GLIBC_2.2.5 .symver execve,execve@GLIBC_2.2.5 .symver execvp,execvp@GLIBC_2.2.5 .symver execvpe,execvpe@GLIBC_2.11 .symver exit,exit@GLIBC_2.2.5 .symver exp,exp@GLIBC_2.2.5 .symver exp10,exp10@GLIBC_2.2.5 .symver exp10f,exp10f@GLIBC_2.2.5 .symver exp10l,exp10l@GLIBC_2.2.5 .symver exp2,exp2@GLIBC_2.2.5 .symver exp2f,exp2f@GLIBC_2.2.5 .symver exp2l,exp2l@GLIBC_2.2.5 .symver expf,expf@GLIBC_2.2.5 .symver expl,expl@GLIBC_2.2.5 .symver explicit_bzero,explicit_bzero@GLIBC_2.25 .symver expm1,expm1@GLIBC_2.2.5 .symver expm1f,expm1f@GLIBC_2.2.5 .symver expm1l,expm1l@GLIBC_2.2.5 .symver fabs,fabs@GLIBC_2.2.5 .symver fabsf,fabsf@GLIBC_2.2.5 .symver fabsl,fabsl@GLIBC_2.2.5 .symver faccessat,faccessat@GLIBC_2.4 .symver fallocate,fallocate@GLIBC_2.10 .symver fallocate64,fallocate64@GLIBC_2.10 .symver fanotify_init,fanotify_init@GLIBC_2.13 .symver fanotify_mark,fanotify_mark@GLIBC_2.13 .symver fattach,fattach@GLIBC_2.2.5 .symver fchdir,fchdir@GLIBC_2.2.5 .symver fchflags,fchflags@GLIBC_2.2.5 .symver fchmod,fchmod@GLIBC_2.2.5 .symver fchmodat,fchmodat@GLIBC_2.4 .symver fchown,fchown@GLIBC_2.2.5 .symver fchownat,fchownat@GLIBC_2.4 .symver fclose,fclose@GLIBC_2.2.5 .symver fcloseall,fcloseall@GLIBC_2.2.5 .symver fcntl,fcntl@GLIBC_2.2.5 .symver fcrypt,fcrypt@GLIBC_2.2.5 .symver fcvt,fcvt@GLIBC_2.2.5 .symver fcvt_r,fcvt_r@GLIBC_2.2.5 .symver fdatasync,fdatasync@GLIBC_2.2.5 .symver fdetach,fdetach@GLIBC_2.2.5 .symver fdim,fdim@GLIBC_2.2.5 .symver fdimf,fdimf@GLIBC_2.2.5 .symver fdiml,fdiml@GLIBC_2.2.5 .symver fdopen,fdopen@GLIBC_2.2.5 .symver fdopendir,fdopendir@GLIBC_2.4 .symver feclearexcept,feclearexcept@GLIBC_2.2.5 .symver fedisableexcept,fedisableexcept@GLIBC_2.2.5 .symver feenableexcept,feenableexcept@GLIBC_2.2.5 .symver fegetenv,fegetenv@GLIBC_2.2.5 .symver fegetexcept,fegetexcept@GLIBC_2.2.5 .symver fegetexceptflag,fegetexceptflag@GLIBC_2.2.5 .symver fegetmode,fegetmode@GLIBC_2.25 .symver fegetround,fegetround@GLIBC_2.2.5 .symver feholdexcept,feholdexcept@GLIBC_2.2.5 .symver feof,feof@GLIBC_2.2.5 .symver feof_unlocked,feof_unlocked@GLIBC_2.2.5 .symver feraiseexcept,feraiseexcept@GLIBC_2.2.5 .symver ferror,ferror@GLIBC_2.2.5 .symver ferror_unlocked,ferror_unlocked@GLIBC_2.2.5 .symver fesetenv,fesetenv@GLIBC_2.2.5 .symver fesetexcept,fesetexcept@GLIBC_2.25 .symver fesetexceptflag,fesetexceptflag@GLIBC_2.2.5 .symver fesetmode,fesetmode@GLIBC_2.25 .symver fesetround,fesetround@GLIBC_2.2.5 .symver fetestexcept,fetestexcept@GLIBC_2.2.5 .symver fetestexceptflag,fetestexceptflag@GLIBC_2.25 .symver feupdateenv,feupdateenv@GLIBC_2.2.5 .symver fexecve,fexecve@GLIBC_2.2.5 .symver fflush,fflush@GLIBC_2.2.5 .symver fflush_unlocked,fflush_unlocked@GLIBC_2.2.5 .symver ffs,ffs@GLIBC_2.2.5 .symver ffsl,ffsl@GLIBC_2.2.5 .symver ffsll,ffsll@GLIBC_2.2.5 .symver fgetc,fgetc@GLIBC_2.2.5 .symver fgetc_unlocked,fgetc_unlocked@GLIBC_2.2.5 .symver fgetgrent,fgetgrent@GLIBC_2.2.5 .symver fgetgrent_r,fgetgrent_r@GLIBC_2.2.5 .symver fgetpos,fgetpos@GLIBC_2.2.5 .symver fgetpos64,fgetpos64@GLIBC_2.2.5 .symver fgetpwent,fgetpwent@GLIBC_2.2.5 .symver fgetpwent_r,fgetpwent_r@GLIBC_2.2.5 .symver fgets,fgets@GLIBC_2.2.5 .symver fgets_unlocked,fgets_unlocked@GLIBC_2.2.5 .symver fgetsgent,fgetsgent@GLIBC_2.10 .symver fgetsgent_r,fgetsgent_r@GLIBC_2.10 .symver fgetspent,fgetspent@GLIBC_2.2.5 .symver fgetspent_r,fgetspent_r@GLIBC_2.2.5 .symver fgetwc,fgetwc@GLIBC_2.2.5 .symver fgetwc_unlocked,fgetwc_unlocked@GLIBC_2.2.5 .symver fgetws,fgetws@GLIBC_2.2.5 .symver fgetws_unlocked,fgetws_unlocked@GLIBC_2.2.5 .symver fgetxattr,fgetxattr@GLIBC_2.3 .symver fileno,fileno@GLIBC_2.2.5 .symver fileno_unlocked,fileno_unlocked@GLIBC_2.2.5 .symver finite,finite@GLIBC_2.2.5 .symver finitef,finitef@GLIBC_2.2.5 .symver finitel,finitel@GLIBC_2.2.5 .symver flistxattr,flistxattr@GLIBC_2.3 .symver flock,flock@GLIBC_2.2.5 .symver flockfile,flockfile@GLIBC_2.2.5 .symver floor,floor@GLIBC_2.2.5 .symver floorf,floorf@GLIBC_2.2.5 .symver floorl,floorl@GLIBC_2.2.5 .symver fma,fma@GLIBC_2.2.5 .symver fmaf,fmaf@GLIBC_2.2.5 .symver fmal,fmal@GLIBC_2.2.5 .symver fmax,fmax@GLIBC_2.2.5 .symver fmaxf,fmaxf@GLIBC_2.2.5 .symver fmaxl,fmaxl@GLIBC_2.2.5 .symver fmaxmag,fmaxmag@GLIBC_2.25 .symver fmaxmagf,fmaxmagf@GLIBC_2.25 .symver fmaxmagl,fmaxmagl@GLIBC_2.25 .symver fmemopen,fmemopen@GLIBC_2.22 .symver fmin,fmin@GLIBC_2.2.5 .symver fminf,fminf@GLIBC_2.2.5 .symver fminl,fminl@GLIBC_2.2.5 .symver fminmag,fminmag@GLIBC_2.25 .symver fminmagf,fminmagf@GLIBC_2.25 .symver fminmagl,fminmagl@GLIBC_2.25 .symver fmod,fmod@GLIBC_2.2.5 .symver fmodf,fmodf@GLIBC_2.2.5 .symver fmodl,fmodl@GLIBC_2.2.5 .symver fmtmsg,fmtmsg@GLIBC_2.2.5 .symver fnmatch,fnmatch@GLIBC_2.2.5 .symver fopen,fopen@GLIBC_2.2.5 .symver fopen64,fopen64@GLIBC_2.2.5 .symver fopencookie,fopencookie@GLIBC_2.2.5 .symver fork,fork@GLIBC_2.2.5 .symver forkpty,forkpty@GLIBC_2.2.5 .symver fpathconf,fpathconf@GLIBC_2.2.5 .symver fprintf,fprintf@GLIBC_2.2.5 .symver fputc,fputc@GLIBC_2.2.5 .symver fputc_unlocked,fputc_unlocked@GLIBC_2.2.5 .symver fputs,fputs@GLIBC_2.2.5 .symver fputs_unlocked,fputs_unlocked@GLIBC_2.2.5 .symver fputwc,fputwc@GLIBC_2.2.5 .symver fputwc_unlocked,fputwc_unlocked@GLIBC_2.2.5 .symver fputws,fputws@GLIBC_2.2.5 .symver fputws_unlocked,fputws_unlocked@GLIBC_2.2.5 .symver fread,fread@GLIBC_2.2.5 .symver fread_unlocked,fread_unlocked@GLIBC_2.2.5 .symver free,free@GLIBC_2.2.5 .symver freeaddrinfo,freeaddrinfo@GLIBC_2.2.5 .symver freeifaddrs,freeifaddrs@GLIBC_2.3 .symver freelocale,freelocale@GLIBC_2.3 .symver fremovexattr,fremovexattr@GLIBC_2.3 .symver freopen,freopen@GLIBC_2.2.5 .symver freopen64,freopen64@GLIBC_2.2.5 .symver frexp,frexp@GLIBC_2.2.5 .symver frexpf,frexpf@GLIBC_2.2.5 .symver frexpl,frexpl@GLIBC_2.2.5 .symver fromfp,fromfp@GLIBC_2.25 .symver fromfpf,fromfpf@GLIBC_2.25 .symver fromfpl,fromfpl@GLIBC_2.25 .symver fromfpx,fromfpx@GLIBC_2.25 .symver fromfpxf,fromfpxf@GLIBC_2.25 .symver fromfpxl,fromfpxl@GLIBC_2.25 .symver fscanf,fscanf@GLIBC_2.2.5 .symver fseek,fseek@GLIBC_2.2.5 .symver fseeko,fseeko@GLIBC_2.2.5 .symver fseeko64,fseeko64@GLIBC_2.2.5 .symver fsetpos,fsetpos@GLIBC_2.2.5 .symver fsetpos64,fsetpos64@GLIBC_2.2.5 .symver fsetxattr,fsetxattr@GLIBC_2.3 .symver fstatfs,fstatfs@GLIBC_2.2.5 .symver fstatfs64,fstatfs64@GLIBC_2.2.5 .symver fstatvfs,fstatvfs@GLIBC_2.2.5 .symver fstatvfs64,fstatvfs64@GLIBC_2.2.5 .symver fsync,fsync@GLIBC_2.2.5 .symver ftell,ftell@GLIBC_2.2.5 .symver ftello,ftello@GLIBC_2.2.5 .symver ftello64,ftello64@GLIBC_2.2.5 .symver ftime,ftime@GLIBC_2.2.5 .symver ftok,ftok@GLIBC_2.2.5 .symver ftruncate,ftruncate@GLIBC_2.2.5 .symver ftruncate64,ftruncate64@GLIBC_2.2.5 .symver ftrylockfile,ftrylockfile@GLIBC_2.2.5 .symver fts64_children,fts64_children@GLIBC_2.23 .symver fts64_close,fts64_close@GLIBC_2.23 .symver fts64_open,fts64_open@GLIBC_2.23 .symver fts64_read,fts64_read@GLIBC_2.23 .symver fts64_set,fts64_set@GLIBC_2.23 .symver fts_children,fts_children@GLIBC_2.2.5 .symver fts_close,fts_close@GLIBC_2.2.5 .symver fts_open,fts_open@GLIBC_2.2.5 .symver fts_read,fts_read@GLIBC_2.2.5 .symver fts_set,fts_set@GLIBC_2.2.5 .symver ftw,ftw@GLIBC_2.2.5 .symver ftw64,ftw64@GLIBC_2.2.5 .symver funlockfile,funlockfile@GLIBC_2.2.5 .symver futimens,futimens@GLIBC_2.6 .symver futimes,futimes@GLIBC_2.3 .symver futimesat,futimesat@GLIBC_2.4 .symver fwide,fwide@GLIBC_2.2.5 .symver fwprintf,fwprintf@GLIBC_2.2.5 .symver fwrite,fwrite@GLIBC_2.2.5 .symver fwrite_unlocked,fwrite_unlocked@GLIBC_2.2.5 .symver fwscanf,fwscanf@GLIBC_2.2.5 .symver gai_cancel,gai_cancel@GLIBC_2.2.5 .symver gai_error,gai_error@GLIBC_2.2.5 .symver gai_strerror,gai_strerror@GLIBC_2.2.5 .symver gai_suspend,gai_suspend@GLIBC_2.2.5 .symver gamma,gamma@GLIBC_2.2.5 .symver gammaf,gammaf@GLIBC_2.2.5 .symver gammal,gammal@GLIBC_2.2.5 .symver gcvt,gcvt@GLIBC_2.2.5 .symver get_avphys_pages,get_avphys_pages@GLIBC_2.2.5 .symver get_current_dir_name,get_current_dir_name@GLIBC_2.2.5 .symver get_myaddress,get_myaddress@GLIBC_2.2.5 .symver get_nprocs,get_nprocs@GLIBC_2.2.5 .symver get_nprocs_conf,get_nprocs_conf@GLIBC_2.2.5 .symver get_phys_pages,get_phys_pages@GLIBC_2.2.5 .symver getaddrinfo,getaddrinfo@GLIBC_2.2.5 .symver getaddrinfo_a,getaddrinfo_a@GLIBC_2.2.5 .symver getaliasbyname,getaliasbyname@GLIBC_2.2.5 .symver getaliasbyname_r,getaliasbyname_r@GLIBC_2.2.5 .symver getaliasent,getaliasent@GLIBC_2.2.5 .symver getaliasent_r,getaliasent_r@GLIBC_2.2.5 .symver getauxval,getauxval@GLIBC_2.16 .symver getc,getc@GLIBC_2.2.5 .symver getc_unlocked,getc_unlocked@GLIBC_2.2.5 .symver getchar,getchar@GLIBC_2.2.5 .symver getchar_unlocked,getchar_unlocked@GLIBC_2.2.5 .symver getcontext,getcontext@GLIBC_2.2.5 .symver getcwd,getcwd@GLIBC_2.2.5 .symver getdate,getdate@GLIBC_2.2.5 .symver getdate_err,getdate_err@GLIBC_2.2.5 .symver getdate_r,getdate_r@GLIBC_2.2.5 .symver getdelim,getdelim@GLIBC_2.2.5 .symver getdirentries,getdirentries@GLIBC_2.2.5 .symver getdirentries64,getdirentries64@GLIBC_2.2.5 .symver getdomainname,getdomainname@GLIBC_2.2.5 .symver getdtablesize,getdtablesize@GLIBC_2.2.5 .symver getegid,getegid@GLIBC_2.2.5 .symver getentropy,getentropy@GLIBC_2.25 .symver getenv,getenv@GLIBC_2.2.5 .symver geteuid,geteuid@GLIBC_2.2.5 .symver getfsent,getfsent@GLIBC_2.2.5 .symver getfsfile,getfsfile@GLIBC_2.2.5 .symver getfsspec,getfsspec@GLIBC_2.2.5 .symver getgid,getgid@GLIBC_2.2.5 .symver getgrent,getgrent@GLIBC_2.2.5 .symver getgrent_r,getgrent_r@GLIBC_2.2.5 .symver getgrgid,getgrgid@GLIBC_2.2.5 .symver getgrgid_r,getgrgid_r@GLIBC_2.2.5 .symver getgrnam,getgrnam@GLIBC_2.2.5 .symver getgrnam_r,getgrnam_r@GLIBC_2.2.5 .symver getgrouplist,getgrouplist@GLIBC_2.2.5 .symver getgroups,getgroups@GLIBC_2.2.5 .symver gethostbyaddr,gethostbyaddr@GLIBC_2.2.5 .symver gethostbyaddr_r,gethostbyaddr_r@GLIBC_2.2.5 .symver gethostbyname,gethostbyname@GLIBC_2.2.5 .symver gethostbyname2,gethostbyname2@GLIBC_2.2.5 .symver gethostbyname2_r,gethostbyname2_r@GLIBC_2.2.5 .symver gethostbyname_r,gethostbyname_r@GLIBC_2.2.5 .symver gethostent,gethostent@GLIBC_2.2.5 .symver gethostent_r,gethostent_r@GLIBC_2.2.5 .symver gethostid,gethostid@GLIBC_2.2.5 .symver gethostname,gethostname@GLIBC_2.2.5 .symver getifaddrs,getifaddrs@GLIBC_2.3 .symver getipv4sourcefilter,getipv4sourcefilter@GLIBC_2.3.4 .symver getitimer,getitimer@GLIBC_2.2.5 .symver getline,getline@GLIBC_2.2.5 .symver getloadavg,getloadavg@GLIBC_2.2.5 .symver getlogin,getlogin@GLIBC_2.2.5 .symver getlogin_r,getlogin_r@GLIBC_2.2.5 .symver getmntent,getmntent@GLIBC_2.2.5 .symver getmntent_r,getmntent_r@GLIBC_2.2.5 .symver getmsg,getmsg@GLIBC_2.2.5 .symver getnameinfo,getnameinfo@GLIBC_2.2.5 .symver getnetbyaddr,getnetbyaddr@GLIBC_2.2.5 .symver getnetbyaddr_r,getnetbyaddr_r@GLIBC_2.2.5 .symver getnetbyname,getnetbyname@GLIBC_2.2.5 .symver getnetbyname_r,getnetbyname_r@GLIBC_2.2.5 .symver getnetent,getnetent@GLIBC_2.2.5 .symver getnetent_r,getnetent_r@GLIBC_2.2.5 .symver getnetgrent,getnetgrent@GLIBC_2.2.5 .symver getnetgrent_r,getnetgrent_r@GLIBC_2.2.5 .symver getopt,getopt@GLIBC_2.2.5 .symver getopt_long,getopt_long@GLIBC_2.2.5 .symver getopt_long_only,getopt_long_only@GLIBC_2.2.5 .symver getpagesize,getpagesize@GLIBC_2.2.5 .symver getpass,getpass@GLIBC_2.2.5 .symver getpayload,getpayload@GLIBC_2.25 .symver getpayloadf,getpayloadf@GLIBC_2.25 .symver getpayloadl,getpayloadl@GLIBC_2.25 .symver getpeername,getpeername@GLIBC_2.2.5 .symver getpgid,getpgid@GLIBC_2.2.5 .symver getpgrp,getpgrp@GLIBC_2.2.5 .symver getpid,getpid@GLIBC_2.2.5 .symver getpmsg,getpmsg@GLIBC_2.2.5 .symver getppid,getppid@GLIBC_2.2.5 .symver getpriority,getpriority@GLIBC_2.2.5 .symver getprotobyname,getprotobyname@GLIBC_2.2.5 .symver getprotobyname_r,getprotobyname_r@GLIBC_2.2.5 .symver getprotobynumber,getprotobynumber@GLIBC_2.2.5 .symver getprotobynumber_r,getprotobynumber_r@GLIBC_2.2.5 .symver getprotoent,getprotoent@GLIBC_2.2.5 .symver getprotoent_r,getprotoent_r@GLIBC_2.2.5 .symver getpt,getpt@GLIBC_2.2.5 .symver getpw,getpw@GLIBC_2.2.5 .symver getpwent,getpwent@GLIBC_2.2.5 .symver getpwent_r,getpwent_r@GLIBC_2.2.5 .symver getpwnam,getpwnam@GLIBC_2.2.5 .symver getpwnam_r,getpwnam_r@GLIBC_2.2.5 .symver getpwuid,getpwuid@GLIBC_2.2.5 .symver getpwuid_r,getpwuid_r@GLIBC_2.2.5 .symver getrandom,getrandom@GLIBC_2.25 .symver getresgid,getresgid@GLIBC_2.2.5 .symver getresuid,getresuid@GLIBC_2.2.5 .symver getrlimit,getrlimit@GLIBC_2.2.5 .symver getrlimit64,getrlimit64@GLIBC_2.2.5 .symver getrpcbyname,getrpcbyname@GLIBC_2.2.5 .symver getrpcbyname_r,getrpcbyname_r@GLIBC_2.2.5 .symver getrpcbynumber,getrpcbynumber@GLIBC_2.2.5 .symver getrpcbynumber_r,getrpcbynumber_r@GLIBC_2.2.5 .symver getrpcent,getrpcent@GLIBC_2.2.5 .symver getrpcent_r,getrpcent_r@GLIBC_2.2.5 .symver getrpcport,getrpcport@GLIBC_2.2.5 .symver getrusage,getrusage@GLIBC_2.2.5 .symver gets,gets@GLIBC_2.2.5 .symver getservbyname,getservbyname@GLIBC_2.2.5 .symver getservbyname_r,getservbyname_r@GLIBC_2.2.5 .symver getservbyport,getservbyport@GLIBC_2.2.5 .symver getservbyport_r,getservbyport_r@GLIBC_2.2.5 .symver getservent,getservent@GLIBC_2.2.5 .symver getservent_r,getservent_r@GLIBC_2.2.5 .symver getsgent,getsgent@GLIBC_2.10 .symver getsgent_r,getsgent_r@GLIBC_2.10 .symver getsgnam,getsgnam@GLIBC_2.10 .symver getsgnam_r,getsgnam_r@GLIBC_2.10 .symver getsid,getsid@GLIBC_2.2.5 .symver getsockname,getsockname@GLIBC_2.2.5 .symver getsockopt,getsockopt@GLIBC_2.2.5 .symver getsourcefilter,getsourcefilter@GLIBC_2.3.4 .symver getspent,getspent@GLIBC_2.2.5 .symver getspent_r,getspent_r@GLIBC_2.2.5 .symver getspnam,getspnam@GLIBC_2.2.5 .symver getspnam_r,getspnam_r@GLIBC_2.2.5 .symver getsubopt,getsubopt@GLIBC_2.2.5 .symver gettext,gettext@GLIBC_2.2.5 .symver gettimeofday,gettimeofday@GLIBC_2.2.5 .symver getttyent,getttyent@GLIBC_2.2.5 .symver getttynam,getttynam@GLIBC_2.2.5 .symver getuid,getuid@GLIBC_2.2.5 .symver getusershell,getusershell@GLIBC_2.2.5 .symver getutent,getutent@GLIBC_2.2.5 .symver getutent_r,getutent_r@GLIBC_2.2.5 .symver getutid,getutid@GLIBC_2.2.5 .symver getutid_r,getutid_r@GLIBC_2.2.5 .symver getutline,getutline@GLIBC_2.2.5 .symver getutline_r,getutline_r@GLIBC_2.2.5 .symver getutmp,getutmp@GLIBC_2.2.5 .symver getutmpx,getutmpx@GLIBC_2.2.5 .symver getutxent,getutxent@GLIBC_2.2.5 .symver getutxid,getutxid@GLIBC_2.2.5 .symver getutxline,getutxline@GLIBC_2.2.5 .symver getw,getw@GLIBC_2.2.5 .symver getwc,getwc@GLIBC_2.2.5 .symver getwc_unlocked,getwc_unlocked@GLIBC_2.2.5 .symver getwchar,getwchar@GLIBC_2.2.5 .symver getwchar_unlocked,getwchar_unlocked@GLIBC_2.2.5 .symver getwd,getwd@GLIBC_2.2.5 .symver getxattr,getxattr@GLIBC_2.3 .symver glob,glob@GLIBC_2.2.5 .symver glob64,glob64@GLIBC_2.2.5 .symver glob_pattern_p,glob_pattern_p@GLIBC_2.2.5 .symver globfree,globfree@GLIBC_2.2.5 .symver globfree64,globfree64@GLIBC_2.2.5 .symver gmtime,gmtime@GLIBC_2.2.5 .symver gmtime_r,gmtime_r@GLIBC_2.2.5 .symver gnu_dev_major,gnu_dev_major@GLIBC_2.3.3 .symver gnu_dev_makedev,gnu_dev_makedev@GLIBC_2.3.3 .symver gnu_dev_minor,gnu_dev_minor@GLIBC_2.3.3 .symver gnu_get_libc_release,gnu_get_libc_release@GLIBC_2.2.5 .symver gnu_get_libc_version,gnu_get_libc_version@GLIBC_2.2.5 .symver grantpt,grantpt@GLIBC_2.2.5 .symver group_member,group_member@GLIBC_2.2.5 .symver gsignal,gsignal@GLIBC_2.2.5 .symver gtty,gtty@GLIBC_2.2.5 .symver h_errlist,h_errlist@GLIBC_2.2.5 .symver h_nerr,h_nerr@GLIBC_2.2.5 .symver hasmntopt,hasmntopt@GLIBC_2.2.5 .symver hcreate,hcreate@GLIBC_2.2.5 .symver hcreate_r,hcreate_r@GLIBC_2.2.5 .symver hdestroy,hdestroy@GLIBC_2.2.5 .symver hdestroy_r,hdestroy_r@GLIBC_2.2.5 .symver herror,herror@GLIBC_2.2.5 .symver host2netname,host2netname@GLIBC_2.2.5 .symver hsearch,hsearch@GLIBC_2.2.5 .symver hsearch_r,hsearch_r@GLIBC_2.2.5 .symver hstrerror,hstrerror@GLIBC_2.2.5 .symver htonl,htonl@GLIBC_2.2.5 .symver htons,htons@GLIBC_2.2.5 .symver hypot,hypot@GLIBC_2.2.5 .symver hypotf,hypotf@GLIBC_2.2.5 .symver hypotl,hypotl@GLIBC_2.2.5 .symver iconv,iconv@GLIBC_2.2.5 .symver iconv_close,iconv_close@GLIBC_2.2.5 .symver iconv_open,iconv_open@GLIBC_2.2.5 .symver if_freenameindex,if_freenameindex@GLIBC_2.2.5 .symver if_indextoname,if_indextoname@GLIBC_2.2.5 .symver if_nameindex,if_nameindex@GLIBC_2.2.5 .symver if_nametoindex,if_nametoindex@GLIBC_2.2.5 .symver ilogb,ilogb@GLIBC_2.2.5 .symver ilogbf,ilogbf@GLIBC_2.2.5 .symver ilogbl,ilogbl@GLIBC_2.2.5 .symver imaxabs,imaxabs@GLIBC_2.2.5 .symver imaxdiv,imaxdiv@GLIBC_2.2.5 .symver in6addr_any,in6addr_any@GLIBC_2.2.5 .symver in6addr_loopback,in6addr_loopback@GLIBC_2.2.5 .symver index,index@GLIBC_2.2.5 .symver inet6_opt_append,inet6_opt_append@GLIBC_2.5 .symver inet6_opt_find,inet6_opt_find@GLIBC_2.5 .symver inet6_opt_finish,inet6_opt_finish@GLIBC_2.5 .symver inet6_opt_get_val,inet6_opt_get_val@GLIBC_2.5 .symver inet6_opt_init,inet6_opt_init@GLIBC_2.5 .symver inet6_opt_next,inet6_opt_next@GLIBC_2.5 .symver inet6_opt_set_val,inet6_opt_set_val@GLIBC_2.5 .symver inet6_option_alloc,inet6_option_alloc@GLIBC_2.3.3 .symver inet6_option_append,inet6_option_append@GLIBC_2.3.3 .symver inet6_option_find,inet6_option_find@GLIBC_2.3.3 .symver inet6_option_init,inet6_option_init@GLIBC_2.3.3 .symver inet6_option_next,inet6_option_next@GLIBC_2.3.3 .symver inet6_option_space,inet6_option_space@GLIBC_2.3.3 .symver inet6_rth_add,inet6_rth_add@GLIBC_2.5 .symver inet6_rth_getaddr,inet6_rth_getaddr@GLIBC_2.5 .symver inet6_rth_init,inet6_rth_init@GLIBC_2.5 .symver inet6_rth_reverse,inet6_rth_reverse@GLIBC_2.5 .symver inet6_rth_segments,inet6_rth_segments@GLIBC_2.5 .symver inet6_rth_space,inet6_rth_space@GLIBC_2.5 .symver inet_addr,inet_addr@GLIBC_2.2.5 .symver inet_aton,inet_aton@GLIBC_2.2.5 .symver inet_lnaof,inet_lnaof@GLIBC_2.2.5 .symver inet_makeaddr,inet_makeaddr@GLIBC_2.2.5 .symver inet_net_ntop,inet_net_ntop@GLIBC_2.2.5 .symver inet_net_pton,inet_net_pton@GLIBC_2.2.5 .symver inet_neta,inet_neta@GLIBC_2.2.5 .symver inet_netof,inet_netof@GLIBC_2.2.5 .symver inet_network,inet_network@GLIBC_2.2.5 .symver inet_nsap_addr,inet_nsap_addr@GLIBC_2.2.5 .symver inet_nsap_ntoa,inet_nsap_ntoa@GLIBC_2.2.5 .symver inet_ntoa,inet_ntoa@GLIBC_2.2.5 .symver inet_ntop,inet_ntop@GLIBC_2.2.5 .symver inet_pton,inet_pton@GLIBC_2.2.5 .symver init_module,init_module@GLIBC_2.2.5 .symver initgroups,initgroups@GLIBC_2.2.5 .symver initstate,initstate@GLIBC_2.2.5 .symver initstate_r,initstate_r@GLIBC_2.2.5 .symver innetgr,innetgr@GLIBC_2.2.5 .symver inotify_add_watch,inotify_add_watch@GLIBC_2.4 .symver inotify_init,inotify_init@GLIBC_2.4 .symver inotify_init1,inotify_init1@GLIBC_2.9 .symver inotify_rm_watch,inotify_rm_watch@GLIBC_2.4 .symver insque,insque@GLIBC_2.2.5 .symver ioctl,ioctl@GLIBC_2.2.5 .symver ioperm,ioperm@GLIBC_2.2.5 .symver iopl,iopl@GLIBC_2.2.5 .symver iruserok,iruserok@GLIBC_2.2.5 .symver iruserok_af,iruserok_af@GLIBC_2.2.5 .symver isalnum,isalnum@GLIBC_2.2.5 .symver isalnum_l,isalnum_l@GLIBC_2.3 .symver isalpha,isalpha@GLIBC_2.2.5 .symver isalpha_l,isalpha_l@GLIBC_2.3 .symver isascii,isascii@GLIBC_2.2.5 .symver isastream,isastream@GLIBC_2.2.5 .symver isatty,isatty@GLIBC_2.2.5 .symver isblank,isblank@GLIBC_2.2.5 .symver isblank_l,isblank_l@GLIBC_2.3 .symver iscntrl,iscntrl@GLIBC_2.2.5 .symver iscntrl_l,iscntrl_l@GLIBC_2.3 .symver isctype,isctype@GLIBC_2.3 .symver isdigit,isdigit@GLIBC_2.2.5 .symver isdigit_l,isdigit_l@GLIBC_2.3 .symver isfdtype,isfdtype@GLIBC_2.2.5 .symver isgraph,isgraph@GLIBC_2.2.5 .symver isgraph_l,isgraph_l@GLIBC_2.3 .symver isinf,isinf@GLIBC_2.2.5 .symver isinff,isinff@GLIBC_2.2.5 .symver isinfl,isinfl@GLIBC_2.2.5 .symver islower,islower@GLIBC_2.2.5 .symver islower_l,islower_l@GLIBC_2.3 .symver isnan,isnan@GLIBC_2.2.5 .symver isnanf,isnanf@GLIBC_2.2.5 .symver isnanl,isnanl@GLIBC_2.2.5 .symver isprint,isprint@GLIBC_2.2.5 .symver isprint_l,isprint_l@GLIBC_2.3 .symver ispunct,ispunct@GLIBC_2.2.5 .symver ispunct_l,ispunct_l@GLIBC_2.3 .symver isspace,isspace@GLIBC_2.2.5 .symver isspace_l,isspace_l@GLIBC_2.3 .symver isupper,isupper@GLIBC_2.2.5 .symver isupper_l,isupper_l@GLIBC_2.3 .symver iswalnum,iswalnum@GLIBC_2.2.5 .symver iswalnum_l,iswalnum_l@GLIBC_2.3 .symver iswalpha,iswalpha@GLIBC_2.2.5 .symver iswalpha_l,iswalpha_l@GLIBC_2.3 .symver iswblank,iswblank@GLIBC_2.2.5 .symver iswblank_l,iswblank_l@GLIBC_2.3 .symver iswcntrl,iswcntrl@GLIBC_2.2.5 .symver iswcntrl_l,iswcntrl_l@GLIBC_2.3 .symver iswctype,iswctype@GLIBC_2.2.5 .symver iswctype_l,iswctype_l@GLIBC_2.3 .symver iswdigit,iswdigit@GLIBC_2.2.5 .symver iswdigit_l,iswdigit_l@GLIBC_2.3 .symver iswgraph,iswgraph@GLIBC_2.2.5 .symver iswgraph_l,iswgraph_l@GLIBC_2.3 .symver iswlower,iswlower@GLIBC_2.2.5 .symver iswlower_l,iswlower_l@GLIBC_2.3 .symver iswprint,iswprint@GLIBC_2.2.5 .symver iswprint_l,iswprint_l@GLIBC_2.3 .symver iswpunct,iswpunct@GLIBC_2.2.5 .symver iswpunct_l,iswpunct_l@GLIBC_2.3 .symver iswspace,iswspace@GLIBC_2.2.5 .symver iswspace_l,iswspace_l@GLIBC_2.3 .symver iswupper,iswupper@GLIBC_2.2.5 .symver iswupper_l,iswupper_l@GLIBC_2.3 .symver iswxdigit,iswxdigit@GLIBC_2.2.5 .symver iswxdigit_l,iswxdigit_l@GLIBC_2.3 .symver isxdigit,isxdigit@GLIBC_2.2.5 .symver isxdigit_l,isxdigit_l@GLIBC_2.3 .symver j0,j0@GLIBC_2.2.5 .symver j0f,j0f@GLIBC_2.2.5 .symver j0l,j0l@GLIBC_2.2.5 .symver j1,j1@GLIBC_2.2.5 .symver j1f,j1f@GLIBC_2.2.5 .symver j1l,j1l@GLIBC_2.2.5 .symver jn,jn@GLIBC_2.2.5 .symver jnf,jnf@GLIBC_2.2.5 .symver jnl,jnl@GLIBC_2.2.5 .symver jrand48,jrand48@GLIBC_2.2.5 .symver jrand48_r,jrand48_r@GLIBC_2.2.5 .symver key_gendes,key_gendes@GLIBC_2.2.5 .symver key_secretkey_is_set,key_secretkey_is_set@GLIBC_2.2.5 .symver kill,kill@GLIBC_2.2.5 .symver killpg,killpg@GLIBC_2.2.5 .symver klogctl,klogctl@GLIBC_2.2.5 .symver l64a,l64a@GLIBC_2.2.5 .symver labs,labs@GLIBC_2.2.5 .symver lchmod,lchmod@GLIBC_2.3.2 .symver lchown,lchown@GLIBC_2.2.5 .symver lckpwdf,lckpwdf@GLIBC_2.2.5 .symver lcong48,lcong48@GLIBC_2.2.5 .symver lcong48_r,lcong48_r@GLIBC_2.2.5 .symver ldexp,ldexp@GLIBC_2.2.5 .symver ldexpf,ldexpf@GLIBC_2.2.5 .symver ldexpl,ldexpl@GLIBC_2.2.5 .symver ldiv,ldiv@GLIBC_2.2.5 .symver lfind,lfind@GLIBC_2.2.5 .symver lgamma,lgamma@GLIBC_2.23 .symver lgamma_r,lgamma_r@GLIBC_2.2.5 .symver lgammaf,lgammaf@GLIBC_2.23 .symver lgammaf_r,lgammaf_r@GLIBC_2.2.5 .symver lgammal,lgammal@GLIBC_2.23 .symver lgammal_r,lgammal_r@GLIBC_2.2.5 .symver lgetxattr,lgetxattr@GLIBC_2.3 .symver link,link@GLIBC_2.2.5 .symver linkat,linkat@GLIBC_2.4 .symver lio_listio,lio_listio@GLIBC_2.4 .symver lio_listio64,lio_listio64@GLIBC_2.4 .symver listen,listen@GLIBC_2.2.5 .symver listxattr,listxattr@GLIBC_2.3 .symver llabs,llabs@GLIBC_2.2.5 .symver lldiv,lldiv@GLIBC_2.2.5 .symver llistxattr,llistxattr@GLIBC_2.3 .symver llogb,llogb@GLIBC_2.25 .symver llogbf,llogbf@GLIBC_2.25 .symver llogbl,llogbl@GLIBC_2.25 .symver llrint,llrint@GLIBC_2.2.5 .symver llrintf,llrintf@GLIBC_2.2.5 .symver llrintl,llrintl@GLIBC_2.2.5 .symver llround,llround@GLIBC_2.2.5 .symver llroundf,llroundf@GLIBC_2.2.5 .symver llroundl,llroundl@GLIBC_2.2.5 .symver llseek,llseek@GLIBC_2.2.5 .symver localeconv,localeconv@GLIBC_2.2.5 .symver localtime,localtime@GLIBC_2.2.5 .symver localtime_r,localtime_r@GLIBC_2.2.5 .symver lockf,lockf@GLIBC_2.2.5 .symver lockf64,lockf64@GLIBC_2.2.5 .symver log,log@GLIBC_2.2.5 .symver log10,log10@GLIBC_2.2.5 .symver log10f,log10f@GLIBC_2.2.5 .symver log10l,log10l@GLIBC_2.2.5 .symver log1p,log1p@GLIBC_2.2.5 .symver log1pf,log1pf@GLIBC_2.2.5 .symver log1pl,log1pl@GLIBC_2.2.5 .symver log2,log2@GLIBC_2.2.5 .symver log2f,log2f@GLIBC_2.2.5 .symver log2l,log2l@GLIBC_2.2.5 .symver logb,logb@GLIBC_2.2.5 .symver logbf,logbf@GLIBC_2.2.5 .symver logbl,logbl@GLIBC_2.2.5 .symver logf,logf@GLIBC_2.2.5 .symver login,login@GLIBC_2.2.5 .symver login_tty,login_tty@GLIBC_2.2.5 .symver logl,logl@GLIBC_2.2.5 .symver logout,logout@GLIBC_2.2.5 .symver logwtmp,logwtmp@GLIBC_2.2.5 .symver longjmp,longjmp@GLIBC_2.2.5 .symver lrand48,lrand48@GLIBC_2.2.5 .symver lrand48_r,lrand48_r@GLIBC_2.2.5 .symver lremovexattr,lremovexattr@GLIBC_2.3 .symver lrint,lrint@GLIBC_2.2.5 .symver lrintf,lrintf@GLIBC_2.2.5 .symver lrintl,lrintl@GLIBC_2.2.5 .symver lround,lround@GLIBC_2.2.5 .symver lroundf,lroundf@GLIBC_2.2.5 .symver lroundl,lroundl@GLIBC_2.2.5 .symver lsearch,lsearch@GLIBC_2.2.5 .symver lseek,lseek@GLIBC_2.2.5 .symver lseek64,lseek64@GLIBC_2.2.5 .symver lsetxattr,lsetxattr@GLIBC_2.3 .symver lutimes,lutimes@GLIBC_2.3 .symver madvise,madvise@GLIBC_2.2.5 .symver makecontext,makecontext@GLIBC_2.2.5 .symver mallinfo,mallinfo@GLIBC_2.2.5 .symver malloc,malloc@GLIBC_2.2.5 .symver malloc_info,malloc_info@GLIBC_2.10 .symver malloc_stats,malloc_stats@GLIBC_2.2.5 .symver malloc_trim,malloc_trim@GLIBC_2.2.5 .symver malloc_usable_size,malloc_usable_size@GLIBC_2.2.5 .symver mallopt,mallopt@GLIBC_2.2.5 .symver mallwatch,mallwatch@GLIBC_2.2.5 .symver matherr,matherr@GLIBC_2.2.5 .symver mblen,mblen@GLIBC_2.2.5 .symver mbrlen,mbrlen@GLIBC_2.2.5 .symver mbrtoc16,mbrtoc16@GLIBC_2.16 .symver mbrtoc32,mbrtoc32@GLIBC_2.16 .symver mbrtowc,mbrtowc@GLIBC_2.2.5 .symver mbsinit,mbsinit@GLIBC_2.2.5 .symver mbsnrtowcs,mbsnrtowcs@GLIBC_2.2.5 .symver mbsrtowcs,mbsrtowcs@GLIBC_2.2.5 .symver mbstowcs,mbstowcs@GLIBC_2.2.5 .symver mbtowc,mbtowc@GLIBC_2.2.5 .symver mcheck,mcheck@GLIBC_2.2.5 .symver mcheck_check_all,mcheck_check_all@GLIBC_2.2.5 .symver mcheck_pedantic,mcheck_pedantic@GLIBC_2.2.5 .symver mcount,mcount@GLIBC_2.2.5 .symver memalign,memalign@GLIBC_2.2.5 .symver memccpy,memccpy@GLIBC_2.2.5 .symver memchr,memchr@GLIBC_2.2.5 .symver memcmp,memcmp@GLIBC_2.2.5 .symver memcpy,memcpy@GLIBC_2.14 .symver memfrob,memfrob@GLIBC_2.2.5 .symver memmem,memmem@GLIBC_2.2.5 .symver memmove,memmove@GLIBC_2.2.5 .symver mempcpy,mempcpy@GLIBC_2.2.5 .symver memrchr,memrchr@GLIBC_2.2.5 .symver memset,memset@GLIBC_2.2.5 .symver mincore,mincore@GLIBC_2.2.5 .symver mkdir,mkdir@GLIBC_2.2.5 .symver mkdirat,mkdirat@GLIBC_2.4 .symver mkdtemp,mkdtemp@GLIBC_2.2.5 .symver mkfifo,mkfifo@GLIBC_2.2.5 .symver mkfifoat,mkfifoat@GLIBC_2.4 .symver mkostemp,mkostemp@GLIBC_2.7 .symver mkostemp64,mkostemp64@GLIBC_2.7 .symver mkostemps,mkostemps@GLIBC_2.11 .symver mkostemps64,mkostemps64@GLIBC_2.11 .symver mkstemp,mkstemp@GLIBC_2.2.5 .symver mkstemp64,mkstemp64@GLIBC_2.2.5 .symver mkstemps,mkstemps@GLIBC_2.11 .symver mkstemps64,mkstemps64@GLIBC_2.11 .symver mktemp,mktemp@GLIBC_2.2.5 .symver mktime,mktime@GLIBC_2.2.5 .symver mlock,mlock@GLIBC_2.2.5 .symver mlockall,mlockall@GLIBC_2.2.5 .symver mmap,mmap@GLIBC_2.2.5 .symver mmap64,mmap64@GLIBC_2.2.5 .symver modf,modf@GLIBC_2.2.5 .symver modff,modff@GLIBC_2.2.5 .symver modfl,modfl@GLIBC_2.2.5 .symver modify_ldt,modify_ldt@GLIBC_2.2.5 .symver moncontrol,moncontrol@GLIBC_2.2.5 .symver monstartup,monstartup@GLIBC_2.2.5 .symver mount,mount@GLIBC_2.2.5 .symver mprobe,mprobe@GLIBC_2.2.5 .symver mprotect,mprotect@GLIBC_2.2.5 .symver mq_close,mq_close@GLIBC_2.3.4 .symver mq_getattr,mq_getattr@GLIBC_2.3.4 .symver mq_notify,mq_notify@GLIBC_2.3.4 .symver mq_open,mq_open@GLIBC_2.3.4 .symver mq_receive,mq_receive@GLIBC_2.3.4 .symver mq_send,mq_send@GLIBC_2.3.4 .symver mq_setattr,mq_setattr@GLIBC_2.3.4 .symver mq_timedreceive,mq_timedreceive@GLIBC_2.3.4 .symver mq_timedsend,mq_timedsend@GLIBC_2.3.4 .symver mq_unlink,mq_unlink@GLIBC_2.3.4 .symver mrand48,mrand48@GLIBC_2.2.5 .symver mrand48_r,mrand48_r@GLIBC_2.2.5 .symver mremap,mremap@GLIBC_2.2.5 .symver msgctl,msgctl@GLIBC_2.2.5 .symver msgget,msgget@GLIBC_2.2.5 .symver msgrcv,msgrcv@GLIBC_2.2.5 .symver msgsnd,msgsnd@GLIBC_2.2.5 .symver msync,msync@GLIBC_2.2.5 .symver mtrace,mtrace@GLIBC_2.2.5 .symver munlock,munlock@GLIBC_2.2.5 .symver munlockall,munlockall@GLIBC_2.2.5 .symver munmap,munmap@GLIBC_2.2.5 .symver muntrace,muntrace@GLIBC_2.2.5 .symver name_to_handle_at,name_to_handle_at@GLIBC_2.14 .symver nan,nan@GLIBC_2.2.5 .symver nanf,nanf@GLIBC_2.2.5 .symver nanl,nanl@GLIBC_2.2.5 .symver nanosleep,nanosleep@GLIBC_2.2.5 .symver nearbyint,nearbyint@GLIBC_2.2.5 .symver nearbyintf,nearbyintf@GLIBC_2.2.5 .symver nearbyintl,nearbyintl@GLIBC_2.2.5 .symver newlocale,newlocale@GLIBC_2.3 .symver nextafter,nextafter@GLIBC_2.2.5 .symver nextafterf,nextafterf@GLIBC_2.2.5 .symver nextafterl,nextafterl@GLIBC_2.2.5 .symver nextdown,nextdown@GLIBC_2.24 .symver nextdownf,nextdownf@GLIBC_2.24 .symver nextdownl,nextdownl@GLIBC_2.24 .symver nexttoward,nexttoward@GLIBC_2.2.5 .symver nexttowardf,nexttowardf@GLIBC_2.2.5 .symver nexttowardl,nexttowardl@GLIBC_2.2.5 .symver nextup,nextup@GLIBC_2.24 .symver nextupf,nextupf@GLIBC_2.24 .symver nextupl,nextupl@GLIBC_2.24 .symver nfsservctl,nfsservctl@GLIBC_2.2.5 .symver nftw,nftw@GLIBC_2.3.3 .symver nftw64,nftw64@GLIBC_2.3.3 .symver ngettext,ngettext@GLIBC_2.2.5 .symver nice,nice@GLIBC_2.2.5 .symver nis_add,nis_add@GLIBC_2.2.5 .symver nis_add_entry,nis_add_entry@GLIBC_2.2.5 .symver nis_addmember,nis_addmember@GLIBC_2.2.5 .symver nis_checkpoint,nis_checkpoint@GLIBC_2.2.5 .symver nis_clone_directory,nis_clone_directory@GLIBC_2.2.5 .symver nis_clone_object,nis_clone_object@GLIBC_2.2.5 .symver nis_clone_result,nis_clone_result@GLIBC_2.2.5 .symver nis_creategroup,nis_creategroup@GLIBC_2.2.5 .symver nis_destroy_object,nis_destroy_object@GLIBC_2.2.5 .symver nis_destroygroup,nis_destroygroup@GLIBC_2.2.5 .symver nis_dir_cmp,nis_dir_cmp@GLIBC_2.2.5 .symver nis_domain_of,nis_domain_of@GLIBC_2.2.5 .symver nis_domain_of_r,nis_domain_of_r@GLIBC_2.2.5 .symver nis_first_entry,nis_first_entry@GLIBC_2.2.5 .symver nis_free_directory,nis_free_directory@GLIBC_2.2.5 .symver nis_free_object,nis_free_object@GLIBC_2.2.5 .symver nis_free_request,nis_free_request@GLIBC_2.2.5 .symver nis_freenames,nis_freenames@GLIBC_2.2.5 .symver nis_freeresult,nis_freeresult@GLIBC_2.2.5 .symver nis_freeservlist,nis_freeservlist@GLIBC_2.2.5 .symver nis_freetags,nis_freetags@GLIBC_2.2.5 .symver nis_getnames,nis_getnames@GLIBC_2.2.5 .symver nis_getservlist,nis_getservlist@GLIBC_2.2.5 .symver nis_ismember,nis_ismember@GLIBC_2.2.5 .symver nis_leaf_of,nis_leaf_of@GLIBC_2.2.5 .symver nis_leaf_of_r,nis_leaf_of_r@GLIBC_2.2.5 .symver nis_lerror,nis_lerror@GLIBC_2.2.5 .symver nis_list,nis_list@GLIBC_2.2.5 .symver nis_local_directory,nis_local_directory@GLIBC_2.2.5 .symver nis_local_group,nis_local_group@GLIBC_2.2.5 .symver nis_local_host,nis_local_host@GLIBC_2.2.5 .symver nis_local_principal,nis_local_principal@GLIBC_2.2.5 .symver nis_lookup,nis_lookup@GLIBC_2.2.5 .symver nis_mkdir,nis_mkdir@GLIBC_2.2.5 .symver nis_modify,nis_modify@GLIBC_2.2.5 .symver nis_modify_entry,nis_modify_entry@GLIBC_2.2.5 .symver nis_name_of,nis_name_of@GLIBC_2.2.5 .symver nis_name_of_r,nis_name_of_r@GLIBC_2.2.5 .symver nis_next_entry,nis_next_entry@GLIBC_2.2.5 .symver nis_perror,nis_perror@GLIBC_2.2.5 .symver nis_ping,nis_ping@GLIBC_2.2.5 .symver nis_print_directory,nis_print_directory@GLIBC_2.2.5 .symver nis_print_entry,nis_print_entry@GLIBC_2.2.5 .symver nis_print_group,nis_print_group@GLIBC_2.2.5 .symver nis_print_group_entry,nis_print_group_entry@GLIBC_2.2.5 .symver nis_print_link,nis_print_link@GLIBC_2.2.5 .symver nis_print_object,nis_print_object@GLIBC_2.2.5 .symver nis_print_result,nis_print_result@GLIBC_2.2.5 .symver nis_print_rights,nis_print_rights@GLIBC_2.2.5 .symver nis_print_table,nis_print_table@GLIBC_2.2.5 .symver nis_read_obj,nis_read_obj@GLIBC_2.2.5 .symver nis_remove,nis_remove@GLIBC_2.2.5 .symver nis_remove_entry,nis_remove_entry@GLIBC_2.2.5 .symver nis_removemember,nis_removemember@GLIBC_2.2.5 .symver nis_rmdir,nis_rmdir@GLIBC_2.2.5 .symver nis_servstate,nis_servstate@GLIBC_2.2.5 .symver nis_sperrno,nis_sperrno@GLIBC_2.2.5 .symver nis_sperror,nis_sperror@GLIBC_2.2.5 .symver nis_sperror_r,nis_sperror_r@GLIBC_2.2.5 .symver nis_stats,nis_stats@GLIBC_2.2.5 .symver nis_verifygroup,nis_verifygroup@GLIBC_2.2.5 .symver nis_write_obj,nis_write_obj@GLIBC_2.2.5 .symver nl_langinfo,nl_langinfo@GLIBC_2.2.5 .symver nl_langinfo_l,nl_langinfo_l@GLIBC_2.3 .symver nrand48,nrand48@GLIBC_2.2.5 .symver nrand48_r,nrand48_r@GLIBC_2.2.5 .symver ns_datetosecs,ns_datetosecs@GLIBC_2.9 .symver ns_format_ttl,ns_format_ttl@GLIBC_2.9 .symver ns_get16,ns_get16@GLIBC_2.9 .symver ns_get32,ns_get32@GLIBC_2.9 .symver ns_initparse,ns_initparse@GLIBC_2.9 .symver ns_makecanon,ns_makecanon@GLIBC_2.9 .symver ns_msg_getflag,ns_msg_getflag@GLIBC_2.9 .symver ns_name_compress,ns_name_compress@GLIBC_2.9 .symver ns_name_ntol,ns_name_ntol@GLIBC_2.9 .symver ns_name_ntop,ns_name_ntop@GLIBC_2.9 .symver ns_name_pack,ns_name_pack@GLIBC_2.9 .symver ns_name_pton,ns_name_pton@GLIBC_2.9 .symver ns_name_rollback,ns_name_rollback@GLIBC_2.9 .symver ns_name_skip,ns_name_skip@GLIBC_2.9 .symver ns_name_uncompress,ns_name_uncompress@GLIBC_2.9 .symver ns_name_unpack,ns_name_unpack@GLIBC_2.9 .symver ns_parse_ttl,ns_parse_ttl@GLIBC_2.9 .symver ns_parserr,ns_parserr@GLIBC_2.9 .symver ns_put16,ns_put16@GLIBC_2.9 .symver ns_put32,ns_put32@GLIBC_2.9 .symver ns_samedomain,ns_samedomain@GLIBC_2.9 .symver ns_samename,ns_samename@GLIBC_2.9 .symver ns_skiprr,ns_skiprr@GLIBC_2.9 .symver ns_sprintrr,ns_sprintrr@GLIBC_2.9 .symver ns_sprintrrf,ns_sprintrrf@GLIBC_2.9 .symver ns_subdomain,ns_subdomain@GLIBC_2.9 .symver ntohl,ntohl@GLIBC_2.2.5 .symver ntohs,ntohs@GLIBC_2.2.5 .symver ntp_adjtime,ntp_adjtime@GLIBC_2.2.5 .symver ntp_gettime,ntp_gettime@GLIBC_2.2.5 .symver ntp_gettimex,ntp_gettimex@GLIBC_2.12 .symver obstack_alloc_failed_handler,obstack_alloc_failed_handler@GLIBC_2.2.5 .symver obstack_exit_failure,obstack_exit_failure@GLIBC_2.2.5 .symver obstack_free,obstack_free@GLIBC_2.2.5 .symver obstack_printf,obstack_printf@GLIBC_2.2.5 .symver obstack_vprintf,obstack_vprintf@GLIBC_2.2.5 .symver on_exit,on_exit@GLIBC_2.2.5 .symver open,open@GLIBC_2.2.5 .symver open64,open64@GLIBC_2.2.5 .symver open_by_handle_at,open_by_handle_at@GLIBC_2.14 .symver open_memstream,open_memstream@GLIBC_2.2.5 .symver open_wmemstream,open_wmemstream@GLIBC_2.4 .symver openat,openat@GLIBC_2.4 .symver openat64,openat64@GLIBC_2.4 .symver opendir,opendir@GLIBC_2.2.5 .symver openlog,openlog@GLIBC_2.2.5 .symver openpty,openpty@GLIBC_2.2.5 .symver optarg,optarg@GLIBC_2.2.5 .symver opterr,opterr@GLIBC_2.2.5 .symver optind,optind@GLIBC_2.2.5 .symver optopt,optopt@GLIBC_2.2.5 .symver parse_printf_format,parse_printf_format@GLIBC_2.2.5 .symver pathconf,pathconf@GLIBC_2.2.5 .symver pause,pause@GLIBC_2.2.5 .symver pclose,pclose@GLIBC_2.2.5 .symver perror,perror@GLIBC_2.2.5 .symver personality,personality@GLIBC_2.2.5 .symver pipe,pipe@GLIBC_2.2.5 .symver pipe2,pipe2@GLIBC_2.9 .symver pivot_root,pivot_root@GLIBC_2.2.5 .symver poll,poll@GLIBC_2.2.5 .symver popen,popen@GLIBC_2.2.5 .symver posix_fadvise,posix_fadvise@GLIBC_2.2.5 .symver posix_fadvise64,posix_fadvise64@GLIBC_2.2.5 .symver posix_fallocate,posix_fallocate@GLIBC_2.2.5 .symver posix_fallocate64,posix_fallocate64@GLIBC_2.2.5 .symver posix_madvise,posix_madvise@GLIBC_2.2.5 .symver posix_memalign,posix_memalign@GLIBC_2.2.5 .symver posix_openpt,posix_openpt@GLIBC_2.2.5 .symver posix_spawn,posix_spawn@GLIBC_2.15 .symver posix_spawn_file_actions_addclose,posix_spawn_file_actions_addclose@GLIBC_2.2.5 .symver posix_spawn_file_actions_adddup2,posix_spawn_file_actions_adddup2@GLIBC_2.2.5 .symver posix_spawn_file_actions_addopen,posix_spawn_file_actions_addopen@GLIBC_2.2.5 .symver posix_spawn_file_actions_destroy,posix_spawn_file_actions_destroy@GLIBC_2.2.5 .symver posix_spawn_file_actions_init,posix_spawn_file_actions_init@GLIBC_2.2.5 .symver posix_spawnattr_destroy,posix_spawnattr_destroy@GLIBC_2.2.5 .symver posix_spawnattr_getflags,posix_spawnattr_getflags@GLIBC_2.2.5 .symver posix_spawnattr_getpgroup,posix_spawnattr_getpgroup@GLIBC_2.2.5 .symver posix_spawnattr_getschedparam,posix_spawnattr_getschedparam@GLIBC_2.2.5 .symver posix_spawnattr_getschedpolicy,posix_spawnattr_getschedpolicy@GLIBC_2.2.5 .symver posix_spawnattr_getsigdefault,posix_spawnattr_getsigdefault@GLIBC_2.2.5 .symver posix_spawnattr_getsigmask,posix_spawnattr_getsigmask@GLIBC_2.2.5 .symver posix_spawnattr_init,posix_spawnattr_init@GLIBC_2.2.5 .symver posix_spawnattr_setflags,posix_spawnattr_setflags@GLIBC_2.2.5 .symver posix_spawnattr_setpgroup,posix_spawnattr_setpgroup@GLIBC_2.2.5 .symver posix_spawnattr_setschedparam,posix_spawnattr_setschedparam@GLIBC_2.2.5 .symver posix_spawnattr_setschedpolicy,posix_spawnattr_setschedpolicy@GLIBC_2.2.5 .symver posix_spawnattr_setsigdefault,posix_spawnattr_setsigdefault@GLIBC_2.2.5 .symver posix_spawnattr_setsigmask,posix_spawnattr_setsigmask@GLIBC_2.2.5 .symver posix_spawnp,posix_spawnp@GLIBC_2.15 .symver pow,pow@GLIBC_2.2.5 .symver pow10,pow10@GLIBC_2.2.5 .symver pow10f,pow10f@GLIBC_2.2.5 .symver pow10l,pow10l@GLIBC_2.2.5 .symver powf,powf@GLIBC_2.2.5 .symver powl,powl@GLIBC_2.2.5 .symver ppoll,ppoll@GLIBC_2.4 .symver prctl,prctl@GLIBC_2.2.5 .symver pread,pread@GLIBC_2.2.5 .symver pread64,pread64@GLIBC_2.2.5 .symver preadv,preadv@GLIBC_2.10 .symver preadv64,preadv64@GLIBC_2.10 .symver printf,printf@GLIBC_2.2.5 .symver printf_size,printf_size@GLIBC_2.2.5 .symver printf_size_info,printf_size_info@GLIBC_2.2.5 .symver prlimit,prlimit@GLIBC_2.13 .symver prlimit64,prlimit64@GLIBC_2.13 .symver process_vm_readv,process_vm_readv@GLIBC_2.15 .symver process_vm_writev,process_vm_writev@GLIBC_2.15 .symver profil,profil@GLIBC_2.2.5 .symver program_invocation_name,program_invocation_name@GLIBC_2.2.5 .symver program_invocation_short_name,program_invocation_short_name@GLIBC_2.2.5 .symver pselect,pselect@GLIBC_2.2.5 .symver psiginfo,psiginfo@GLIBC_2.10 .symver psignal,psignal@GLIBC_2.2.5 .symver pthread_attr_getaffinity_np,pthread_attr_getaffinity_np@GLIBC_2.3.4 .symver pthread_attr_getguardsize,pthread_attr_getguardsize@GLIBC_2.2.5 .symver pthread_attr_getstack,pthread_attr_getstack@GLIBC_2.2.5 .symver pthread_attr_getstackaddr,pthread_attr_getstackaddr@GLIBC_2.2.5 .symver pthread_attr_getstacksize,pthread_attr_getstacksize@GLIBC_2.2.5 .symver pthread_attr_setaffinity_np,pthread_attr_setaffinity_np@GLIBC_2.3.4 .symver pthread_attr_setguardsize,pthread_attr_setguardsize@GLIBC_2.2.5 .symver pthread_attr_setstack,pthread_attr_setstack@GLIBC_2.2.5 .symver pthread_attr_setstackaddr,pthread_attr_setstackaddr@GLIBC_2.2.5 .symver pthread_attr_setstacksize,pthread_attr_setstacksize@GLIBC_2.2.5 .symver pthread_barrier_destroy,pthread_barrier_destroy@GLIBC_2.2.5 .symver pthread_barrier_init,pthread_barrier_init@GLIBC_2.2.5 .symver pthread_barrier_wait,pthread_barrier_wait@GLIBC_2.2.5 .symver pthread_barrierattr_destroy,pthread_barrierattr_destroy@GLIBC_2.2.5 .symver pthread_barrierattr_getpshared,pthread_barrierattr_getpshared@GLIBC_2.3.3 .symver pthread_barrierattr_init,pthread_barrierattr_init@GLIBC_2.2.5 .symver pthread_barrierattr_setpshared,pthread_barrierattr_setpshared@GLIBC_2.2.5 .symver pthread_cancel,pthread_cancel@GLIBC_2.2.5 .symver pthread_cond_signal,pthread_cond_signal@GLIBC_2.3.2 .symver pthread_cond_wait,pthread_cond_wait@GLIBC_2.3.2 .symver pthread_condattr_getclock,pthread_condattr_getclock@GLIBC_2.3.3 .symver pthread_condattr_getpshared,pthread_condattr_getpshared@GLIBC_2.2.5 .symver pthread_condattr_setclock,pthread_condattr_setclock@GLIBC_2.3.3 .symver pthread_condattr_setpshared,pthread_condattr_setpshared@GLIBC_2.2.5 .symver pthread_getaffinity_np,pthread_getaffinity_np@GLIBC_2.3.4 .symver pthread_getattr_default_np,pthread_getattr_default_np@GLIBC_2.18 .symver pthread_getattr_np,pthread_getattr_np@GLIBC_2.2.5 .symver pthread_getconcurrency,pthread_getconcurrency@GLIBC_2.2.5 .symver pthread_getcpuclockid,pthread_getcpuclockid@GLIBC_2.2.5 .symver pthread_getname_np,pthread_getname_np@GLIBC_2.12 .symver pthread_kill,pthread_kill@GLIBC_2.2.5 .symver pthread_mutex_consistent,pthread_mutex_consistent@GLIBC_2.12 .symver pthread_mutex_consistent_np,pthread_mutex_consistent_np@GLIBC_2.4 .symver pthread_mutex_getprioceiling,pthread_mutex_getprioceiling@GLIBC_2.4 .symver pthread_mutex_setprioceiling,pthread_mutex_setprioceiling@GLIBC_2.4 .symver pthread_mutex_timedlock,pthread_mutex_timedlock@GLIBC_2.2.5 .symver pthread_mutex_trylock,pthread_mutex_trylock@GLIBC_2.2.5 .symver pthread_mutexattr_destroy,pthread_mutexattr_destroy@GLIBC_2.2.5 .symver pthread_mutexattr_getkind_np,pthread_mutexattr_getkind_np@GLIBC_2.2.5 .symver pthread_mutexattr_getprioceiling,pthread_mutexattr_getprioceiling@GLIBC_2.4 .symver pthread_mutexattr_getprotocol,pthread_mutexattr_getprotocol@GLIBC_2.4 .symver pthread_mutexattr_getpshared,pthread_mutexattr_getpshared@GLIBC_2.2.5 .symver pthread_mutexattr_getrobust,pthread_mutexattr_getrobust@GLIBC_2.12 .symver pthread_mutexattr_getrobust_np,pthread_mutexattr_getrobust_np@GLIBC_2.4 .symver pthread_mutexattr_gettype,pthread_mutexattr_gettype@GLIBC_2.2.5 .symver pthread_mutexattr_init,pthread_mutexattr_init@GLIBC_2.2.5 .symver pthread_mutexattr_setkind_np,pthread_mutexattr_setkind_np@GLIBC_2.2.5 .symver pthread_mutexattr_setprioceiling,pthread_mutexattr_setprioceiling@GLIBC_2.4 .symver pthread_mutexattr_setprotocol,pthread_mutexattr_setprotocol@GLIBC_2.4 .symver pthread_mutexattr_setpshared,pthread_mutexattr_setpshared@GLIBC_2.2.5 .symver pthread_mutexattr_setrobust,pthread_mutexattr_setrobust@GLIBC_2.12 .symver pthread_mutexattr_setrobust_np,pthread_mutexattr_setrobust_np@GLIBC_2.4 .symver pthread_mutexattr_settype,pthread_mutexattr_settype@GLIBC_2.2.5 .symver pthread_rwlock_destroy,pthread_rwlock_destroy@GLIBC_2.2.5 .symver pthread_rwlock_init,pthread_rwlock_init@GLIBC_2.2.5 .symver pthread_rwlock_rdlock,pthread_rwlock_rdlock@GLIBC_2.2.5 .symver pthread_rwlock_timedrdlock,pthread_rwlock_timedrdlock@GLIBC_2.2.5 .symver pthread_rwlock_timedwrlock,pthread_rwlock_timedwrlock@GLIBC_2.2.5 .symver pthread_rwlock_tryrdlock,pthread_rwlock_tryrdlock@GLIBC_2.2.5 .symver pthread_rwlock_trywrlock,pthread_rwlock_trywrlock@GLIBC_2.2.5 .symver pthread_rwlock_unlock,pthread_rwlock_unlock@GLIBC_2.2.5 .symver pthread_rwlock_wrlock,pthread_rwlock_wrlock@GLIBC_2.2.5 .symver pthread_rwlockattr_destroy,pthread_rwlockattr_destroy@GLIBC_2.2.5 .symver pthread_rwlockattr_getkind_np,pthread_rwlockattr_getkind_np@GLIBC_2.2.5 .symver pthread_rwlockattr_getpshared,pthread_rwlockattr_getpshared@GLIBC_2.2.5 .symver pthread_rwlockattr_init,pthread_rwlockattr_init@GLIBC_2.2.5 .symver pthread_rwlockattr_setkind_np,pthread_rwlockattr_setkind_np@GLIBC_2.2.5 .symver pthread_rwlockattr_setpshared,pthread_rwlockattr_setpshared@GLIBC_2.2.5 .symver pthread_setaffinity_np,pthread_setaffinity_np@GLIBC_2.3.4 .symver pthread_setattr_default_np,pthread_setattr_default_np@GLIBC_2.18 .symver pthread_setconcurrency,pthread_setconcurrency@GLIBC_2.2.5 .symver pthread_setname_np,pthread_setname_np@GLIBC_2.12 .symver pthread_setschedprio,pthread_setschedprio@GLIBC_2.3.4 .symver pthread_sigmask,pthread_sigmask@GLIBC_2.2.5 .symver pthread_sigqueue,pthread_sigqueue@GLIBC_2.11 .symver pthread_spin_destroy,pthread_spin_destroy@GLIBC_2.2.5 .symver pthread_spin_init,pthread_spin_init@GLIBC_2.2.5 .symver pthread_spin_lock,pthread_spin_lock@GLIBC_2.2.5 .symver pthread_spin_trylock,pthread_spin_trylock@GLIBC_2.2.5 .symver pthread_spin_unlock,pthread_spin_unlock@GLIBC_2.2.5 .symver pthread_testcancel,pthread_testcancel@GLIBC_2.2.5 .symver pthread_timedjoin_np,pthread_timedjoin_np@GLIBC_2.3.3 .symver pthread_tryjoin_np,pthread_tryjoin_np@GLIBC_2.3.3 .symver pthread_yield,pthread_yield@GLIBC_2.2.5 .symver ptrace,ptrace@GLIBC_2.2.5 .symver ptsname,ptsname@GLIBC_2.2.5 .symver ptsname_r,ptsname_r@GLIBC_2.2.5 .symver putc,putc@GLIBC_2.2.5 .symver putc_unlocked,putc_unlocked@GLIBC_2.2.5 .symver putchar,putchar@GLIBC_2.2.5 .symver putchar_unlocked,putchar_unlocked@GLIBC_2.2.5 .symver putenv,putenv@GLIBC_2.2.5 .symver putgrent,putgrent@GLIBC_2.2.5 .symver putmsg,putmsg@GLIBC_2.2.5 .symver putpmsg,putpmsg@GLIBC_2.2.5 .symver putpwent,putpwent@GLIBC_2.2.5 .symver puts,puts@GLIBC_2.2.5 .symver putsgent,putsgent@GLIBC_2.10 .symver putspent,putspent@GLIBC_2.2.5 .symver pututline,pututline@GLIBC_2.2.5 .symver pututxline,pututxline@GLIBC_2.2.5 .symver putw,putw@GLIBC_2.2.5 .symver putwc,putwc@GLIBC_2.2.5 .symver putwc_unlocked,putwc_unlocked@GLIBC_2.2.5 .symver putwchar,putwchar@GLIBC_2.2.5 .symver putwchar_unlocked,putwchar_unlocked@GLIBC_2.2.5 .symver pvalloc,pvalloc@GLIBC_2.2.5 .symver pwrite,pwrite@GLIBC_2.2.5 .symver pwrite64,pwrite64@GLIBC_2.2.5 .symver pwritev,pwritev@GLIBC_2.10 .symver pwritev64,pwritev64@GLIBC_2.10 .symver qecvt,qecvt@GLIBC_2.2.5 .symver qecvt_r,qecvt_r@GLIBC_2.2.5 .symver qfcvt,qfcvt@GLIBC_2.2.5 .symver qfcvt_r,qfcvt_r@GLIBC_2.2.5 .symver qgcvt,qgcvt@GLIBC_2.2.5 .symver qsort,qsort@GLIBC_2.2.5 .symver qsort_r,qsort_r@GLIBC_2.8 .symver quick_exit,quick_exit@GLIBC_2.24 .symver quotactl,quotactl@GLIBC_2.2.5 .symver raise,raise@GLIBC_2.2.5 .symver rand,rand@GLIBC_2.2.5 .symver rand_r,rand_r@GLIBC_2.2.5 .symver random,random@GLIBC_2.2.5 .symver random_r,random_r@GLIBC_2.2.5 .symver rawmemchr,rawmemchr@GLIBC_2.2.5 .symver rcmd,rcmd@GLIBC_2.2.5 .symver rcmd_af,rcmd_af@GLIBC_2.2.5 .symver re_comp,re_comp@GLIBC_2.2.5 .symver re_compile_fastmap,re_compile_fastmap@GLIBC_2.2.5 .symver re_compile_pattern,re_compile_pattern@GLIBC_2.2.5 .symver re_exec,re_exec@GLIBC_2.2.5 .symver re_match,re_match@GLIBC_2.2.5 .symver re_match_2,re_match_2@GLIBC_2.2.5 .symver re_max_failures,re_max_failures@GLIBC_2.2.5 .symver re_search,re_search@GLIBC_2.2.5 .symver re_search_2,re_search_2@GLIBC_2.2.5 .symver re_set_registers,re_set_registers@GLIBC_2.2.5 .symver re_set_syntax,re_set_syntax@GLIBC_2.2.5 .symver re_syntax_options,re_syntax_options@GLIBC_2.2.5 .symver read,read@GLIBC_2.2.5 .symver readColdStartFile,readColdStartFile@GLIBC_2.2.5 .symver readahead,readahead@GLIBC_2.3 .symver readdir,readdir@GLIBC_2.2.5 .symver readdir64,readdir64@GLIBC_2.2.5 .symver readdir64_r,readdir64_r@GLIBC_2.2.5 .symver readdir_r,readdir_r@GLIBC_2.2.5 .symver readlink,readlink@GLIBC_2.2.5 .symver readlinkat,readlinkat@GLIBC_2.4 .symver readv,readv@GLIBC_2.2.5 .symver realloc,realloc@GLIBC_2.2.5 .symver realpath,realpath@GLIBC_2.3 .symver reboot,reboot@GLIBC_2.2.5 .symver recv,recv@GLIBC_2.2.5 .symver recvfrom,recvfrom@GLIBC_2.2.5 .symver recvmmsg,recvmmsg@GLIBC_2.12 .symver recvmsg,recvmsg@GLIBC_2.2.5 .symver regcomp,regcomp@GLIBC_2.2.5 .symver regerror,regerror@GLIBC_2.2.5 .symver regexec,regexec@GLIBC_2.3.4 .symver regfree,regfree@GLIBC_2.2.5 .symver register_printf_function,register_printf_function@GLIBC_2.2.5 .symver register_printf_modifier,register_printf_modifier@GLIBC_2.10 .symver register_printf_specifier,register_printf_specifier@GLIBC_2.10 .symver register_printf_type,register_printf_type@GLIBC_2.10 .symver remainder,remainder@GLIBC_2.2.5 .symver remainderf,remainderf@GLIBC_2.2.5 .symver remainderl,remainderl@GLIBC_2.2.5 .symver remap_file_pages,remap_file_pages@GLIBC_2.3.3 .symver remove,remove@GLIBC_2.2.5 .symver removexattr,removexattr@GLIBC_2.3 .symver remque,remque@GLIBC_2.2.5 .symver remquo,remquo@GLIBC_2.2.5 .symver remquof,remquof@GLIBC_2.2.5 .symver remquol,remquol@GLIBC_2.2.5 .symver rename,rename@GLIBC_2.2.5 .symver renameat,renameat@GLIBC_2.4 .symver revoke,revoke@GLIBC_2.2.5 .symver rewind,rewind@GLIBC_2.2.5 .symver rewinddir,rewinddir@GLIBC_2.2.5 .symver rexec,rexec@GLIBC_2.2.5 .symver rexec_af,rexec_af@GLIBC_2.2.5 .symver rexecoptions,rexecoptions@GLIBC_2.2.5 .symver rindex,rindex@GLIBC_2.2.5 .symver rint,rint@GLIBC_2.2.5 .symver rintf,rintf@GLIBC_2.2.5 .symver rintl,rintl@GLIBC_2.2.5 .symver rmdir,rmdir@GLIBC_2.2.5 .symver round,round@GLIBC_2.2.5 .symver roundeven,roundeven@GLIBC_2.25 .symver roundevenf,roundevenf@GLIBC_2.25 .symver roundevenl,roundevenl@GLIBC_2.25 .symver roundf,roundf@GLIBC_2.2.5 .symver roundl,roundl@GLIBC_2.2.5 .symver rpc_createerr,rpc_createerr@GLIBC_2.2.5 .symver rpmatch,rpmatch@GLIBC_2.2.5 .symver rresvport,rresvport@GLIBC_2.2.5 .symver rresvport_af,rresvport_af@GLIBC_2.2.5 .symver ruserok,ruserok@GLIBC_2.2.5 .symver ruserok_af,ruserok_af@GLIBC_2.2.5 .symver ruserpass,ruserpass@GLIBC_2.2.5 .symver sbrk,sbrk@GLIBC_2.2.5 .symver scalb,scalb@GLIBC_2.2.5 .symver scalbf,scalbf@GLIBC_2.2.5 .symver scalbl,scalbl@GLIBC_2.2.5 .symver scalbln,scalbln@GLIBC_2.2.5 .symver scalblnf,scalblnf@GLIBC_2.2.5 .symver scalblnl,scalblnl@GLIBC_2.2.5 .symver scalbn,scalbn@GLIBC_2.2.5 .symver scalbnf,scalbnf@GLIBC_2.2.5 .symver scalbnl,scalbnl@GLIBC_2.2.5 .symver scandir,scandir@GLIBC_2.2.5 .symver scandir64,scandir64@GLIBC_2.2.5 .symver scandirat,scandirat@GLIBC_2.15 .symver scandirat64,scandirat64@GLIBC_2.15 .symver scanf,scanf@GLIBC_2.2.5 .symver sched_get_priority_max,sched_get_priority_max@GLIBC_2.2.5 .symver sched_get_priority_min,sched_get_priority_min@GLIBC_2.2.5 .symver sched_getaffinity,sched_getaffinity@GLIBC_2.3.4 .symver sched_getcpu,sched_getcpu@GLIBC_2.6 .symver sched_getparam,sched_getparam@GLIBC_2.2.5 .symver sched_getscheduler,sched_getscheduler@GLIBC_2.2.5 .symver sched_rr_get_interval,sched_rr_get_interval@GLIBC_2.2.5 .symver sched_setaffinity,sched_setaffinity@GLIBC_2.3.4 .symver sched_setparam,sched_setparam@GLIBC_2.2.5 .symver sched_setscheduler,sched_setscheduler@GLIBC_2.2.5 .symver sched_yield,sched_yield@GLIBC_2.2.5 .symver secure_getenv,secure_getenv@GLIBC_2.17 .symver seed48,seed48@GLIBC_2.2.5 .symver seed48_r,seed48_r@GLIBC_2.2.5 .symver seekdir,seekdir@GLIBC_2.2.5 .symver select,select@GLIBC_2.2.5 .symver sem_close,sem_close@GLIBC_2.2.5 .symver sem_destroy,sem_destroy@GLIBC_2.2.5 .symver sem_getvalue,sem_getvalue@GLIBC_2.2.5 .symver sem_init,sem_init@GLIBC_2.2.5 .symver sem_open,sem_open@GLIBC_2.2.5 .symver sem_post,sem_post@GLIBC_2.2.5 .symver sem_timedwait,sem_timedwait@GLIBC_2.2.5 .symver sem_trywait,sem_trywait@GLIBC_2.2.5 .symver sem_unlink,sem_unlink@GLIBC_2.2.5 .symver sem_wait,sem_wait@GLIBC_2.2.5 .symver semctl,semctl@GLIBC_2.2.5 .symver semget,semget@GLIBC_2.2.5 .symver semop,semop@GLIBC_2.2.5 .symver semtimedop,semtimedop@GLIBC_2.3.3 .symver send,send@GLIBC_2.2.5 .symver sendfile,sendfile@GLIBC_2.2.5 .symver sendfile64,sendfile64@GLIBC_2.3 .symver sendmmsg,sendmmsg@GLIBC_2.14 .symver sendmsg,sendmsg@GLIBC_2.2.5 .symver sendto,sendto@GLIBC_2.2.5 .symver setaliasent,setaliasent@GLIBC_2.2.5 .symver setbuf,setbuf@GLIBC_2.2.5 .symver setbuffer,setbuffer@GLIBC_2.2.5 .symver setcontext,setcontext@GLIBC_2.2.5 .symver setdomainname,setdomainname@GLIBC_2.2.5 .symver setegid,setegid@GLIBC_2.2.5 .symver setenv,setenv@GLIBC_2.2.5 .symver seteuid,seteuid@GLIBC_2.2.5 .symver setfsent,setfsent@GLIBC_2.2.5 .symver setfsgid,setfsgid@GLIBC_2.2.5 .symver setfsuid,setfsuid@GLIBC_2.2.5 .symver setgid,setgid@GLIBC_2.2.5 .symver setgrent,setgrent@GLIBC_2.2.5 .symver setgroups,setgroups@GLIBC_2.2.5 .symver sethostent,sethostent@GLIBC_2.2.5 .symver sethostid,sethostid@GLIBC_2.2.5 .symver sethostname,sethostname@GLIBC_2.2.5 .symver setipv4sourcefilter,setipv4sourcefilter@GLIBC_2.3.4 .symver setitimer,setitimer@GLIBC_2.2.5 .symver setjmp,setjmp@GLIBC_2.2.5 .symver setkey,setkey@GLIBC_2.2.5 .symver setkey_r,setkey_r@GLIBC_2.2.5 .symver setlinebuf,setlinebuf@GLIBC_2.2.5 .symver setlocale,setlocale@GLIBC_2.2.5 .symver setlogin,setlogin@GLIBC_2.2.5 .symver setlogmask,setlogmask@GLIBC_2.2.5 .symver setmntent,setmntent@GLIBC_2.2.5 .symver setnetent,setnetent@GLIBC_2.2.5 .symver setnetgrent,setnetgrent@GLIBC_2.2.5 .symver setns,setns@GLIBC_2.14 .symver setpayload,setpayload@GLIBC_2.25 .symver setpayloadf,setpayloadf@GLIBC_2.25 .symver setpayloadl,setpayloadl@GLIBC_2.25 .symver setpayloadsig,setpayloadsig@GLIBC_2.25 .symver setpayloadsigf,setpayloadsigf@GLIBC_2.25 .symver setpayloadsigl,setpayloadsigl@GLIBC_2.25 .symver setpgid,setpgid@GLIBC_2.2.5 .symver setpgrp,setpgrp@GLIBC_2.2.5 .symver setpriority,setpriority@GLIBC_2.2.5 .symver setprotoent,setprotoent@GLIBC_2.2.5 .symver setpwent,setpwent@GLIBC_2.2.5 .symver setregid,setregid@GLIBC_2.2.5 .symver setresgid,setresgid@GLIBC_2.2.5 .symver setresuid,setresuid@GLIBC_2.2.5 .symver setreuid,setreuid@GLIBC_2.2.5 .symver setrlimit,setrlimit@GLIBC_2.2.5 .symver setrlimit64,setrlimit64@GLIBC_2.2.5 .symver setrpcent,setrpcent@GLIBC_2.2.5 .symver setservent,setservent@GLIBC_2.2.5 .symver setsgent,setsgent@GLIBC_2.10 .symver setsid,setsid@GLIBC_2.2.5 .symver setsockopt,setsockopt@GLIBC_2.2.5 .symver setsourcefilter,setsourcefilter@GLIBC_2.3.4 .symver setspent,setspent@GLIBC_2.2.5 .symver setstate,setstate@GLIBC_2.2.5 .symver setstate_r,setstate_r@GLIBC_2.2.5 .symver settimeofday,settimeofday@GLIBC_2.2.5 .symver setttyent,setttyent@GLIBC_2.2.5 .symver setuid,setuid@GLIBC_2.2.5 .symver setusershell,setusershell@GLIBC_2.2.5 .symver setutent,setutent@GLIBC_2.2.5 .symver setutxent,setutxent@GLIBC_2.2.5 .symver setvbuf,setvbuf@GLIBC_2.2.5 .symver setxattr,setxattr@GLIBC_2.3 .symver sgetsgent,sgetsgent@GLIBC_2.10 .symver sgetsgent_r,sgetsgent_r@GLIBC_2.10 .symver sgetspent,sgetspent@GLIBC_2.2.5 .symver sgetspent_r,sgetspent_r@GLIBC_2.2.5 .symver shm_open,shm_open@GLIBC_2.2.5 .symver shm_unlink,shm_unlink@GLIBC_2.2.5 .symver shmat,shmat@GLIBC_2.2.5 .symver shmctl,shmctl@GLIBC_2.2.5 .symver shmdt,shmdt@GLIBC_2.2.5 .symver shmget,shmget@GLIBC_2.2.5 .symver shutdown,shutdown@GLIBC_2.2.5 .symver sigaction,sigaction@GLIBC_2.2.5 .symver sigaddset,sigaddset@GLIBC_2.2.5 .symver sigaltstack,sigaltstack@GLIBC_2.2.5 .symver sigandset,sigandset@GLIBC_2.2.5 .symver sigblock,sigblock@GLIBC_2.2.5 .symver sigdelset,sigdelset@GLIBC_2.2.5 .symver sigemptyset,sigemptyset@GLIBC_2.2.5 .symver sigfillset,sigfillset@GLIBC_2.2.5 .symver siggetmask,siggetmask@GLIBC_2.2.5 .symver sighold,sighold@GLIBC_2.2.5 .symver sigignore,sigignore@GLIBC_2.2.5 .symver siginterrupt,siginterrupt@GLIBC_2.2.5 .symver sigisemptyset,sigisemptyset@GLIBC_2.2.5 .symver sigismember,sigismember@GLIBC_2.2.5 .symver siglongjmp,siglongjmp@GLIBC_2.2.5 .symver signal,signal@GLIBC_2.2.5 .symver signalfd,signalfd@GLIBC_2.7 .symver signgam,signgam@GLIBC_2.2.5 .symver significand,significand@GLIBC_2.2.5 .symver significandf,significandf@GLIBC_2.2.5 .symver significandl,significandl@GLIBC_2.2.5 .symver sigorset,sigorset@GLIBC_2.2.5 .symver sigpause,sigpause@GLIBC_2.2.5 .symver sigpending,sigpending@GLIBC_2.2.5 .symver sigprocmask,sigprocmask@GLIBC_2.2.5 .symver sigqueue,sigqueue@GLIBC_2.2.5 .symver sigrelse,sigrelse@GLIBC_2.2.5 .symver sigreturn,sigreturn@GLIBC_2.2.5 .symver sigset,sigset@GLIBC_2.2.5 .symver sigsetmask,sigsetmask@GLIBC_2.2.5 .symver sigstack,sigstack@GLIBC_2.2.5 .symver sigsuspend,sigsuspend@GLIBC_2.2.5 .symver sigtimedwait,sigtimedwait@GLIBC_2.2.5 .symver sigwait,sigwait@GLIBC_2.2.5 .symver sigwaitinfo,sigwaitinfo@GLIBC_2.2.5 .symver sin,sin@GLIBC_2.2.5 .symver sincos,sincos@GLIBC_2.2.5 .symver sincosf,sincosf@GLIBC_2.2.5 .symver sincosl,sincosl@GLIBC_2.2.5 .symver sinf,sinf@GLIBC_2.2.5 .symver sinh,sinh@GLIBC_2.2.5 .symver sinhf,sinhf@GLIBC_2.2.5 .symver sinhl,sinhl@GLIBC_2.2.5 .symver sinl,sinl@GLIBC_2.2.5 .symver sleep,sleep@GLIBC_2.2.5 .symver snprintf,snprintf@GLIBC_2.2.5 .symver sockatmark,sockatmark@GLIBC_2.2.5 .symver socket,socket@GLIBC_2.2.5 .symver socketpair,socketpair@GLIBC_2.2.5 .symver splice,splice@GLIBC_2.5 .symver sprintf,sprintf@GLIBC_2.2.5 .symver sprofil,sprofil@GLIBC_2.2.5 .symver sqrt,sqrt@GLIBC_2.2.5 .symver sqrtf,sqrtf@GLIBC_2.2.5 .symver sqrtl,sqrtl@GLIBC_2.2.5 .symver srand,srand@GLIBC_2.2.5 .symver srand48,srand48@GLIBC_2.2.5 .symver srand48_r,srand48_r@GLIBC_2.2.5 .symver srandom,srandom@GLIBC_2.2.5 .symver srandom_r,srandom_r@GLIBC_2.2.5 .symver sscanf,sscanf@GLIBC_2.2.5 .symver ssignal,ssignal@GLIBC_2.2.5 .symver sstk,sstk@GLIBC_2.2.5 .symver statfs,statfs@GLIBC_2.2.5 .symver statfs64,statfs64@GLIBC_2.2.5 .symver statvfs,statvfs@GLIBC_2.2.5 .symver statvfs64,statvfs64@GLIBC_2.2.5 .symver stderr,stderr@GLIBC_2.2.5 .symver stdin,stdin@GLIBC_2.2.5 .symver stdout,stdout@GLIBC_2.2.5 .symver stime,stime@GLIBC_2.2.5 .symver stpcpy,stpcpy@GLIBC_2.2.5 .symver stpncpy,stpncpy@GLIBC_2.2.5 .symver strcasecmp,strcasecmp@GLIBC_2.2.5 .symver strcasecmp_l,strcasecmp_l@GLIBC_2.3 .symver strcasestr,strcasestr@GLIBC_2.2.5 .symver strcat,strcat@GLIBC_2.2.5 .symver strchr,strchr@GLIBC_2.2.5 .symver strchrnul,strchrnul@GLIBC_2.2.5 .symver strcmp,strcmp@GLIBC_2.2.5 .symver strcoll,strcoll@GLIBC_2.2.5 .symver strcoll_l,strcoll_l@GLIBC_2.3 .symver strcpy,strcpy@GLIBC_2.2.5 .symver strcspn,strcspn@GLIBC_2.2.5 .symver strdup,strdup@GLIBC_2.2.5 .symver strerror,strerror@GLIBC_2.2.5 .symver strerror_l,strerror_l@GLIBC_2.6 .symver strerror_r,strerror_r@GLIBC_2.2.5 .symver strfmon,strfmon@GLIBC_2.2.5 .symver strfmon_l,strfmon_l@GLIBC_2.3 .symver strfromd,strfromd@GLIBC_2.25 .symver strfromf,strfromf@GLIBC_2.25 .symver strfroml,strfroml@GLIBC_2.25 .symver strfry,strfry@GLIBC_2.2.5 .symver strftime,strftime@GLIBC_2.2.5 .symver strftime_l,strftime_l@GLIBC_2.3 .symver strlen,strlen@GLIBC_2.2.5 .symver strncasecmp,strncasecmp@GLIBC_2.2.5 .symver strncasecmp_l,strncasecmp_l@GLIBC_2.3 .symver strncat,strncat@GLIBC_2.2.5 .symver strncmp,strncmp@GLIBC_2.2.5 .symver strncpy,strncpy@GLIBC_2.2.5 .symver strndup,strndup@GLIBC_2.2.5 .symver strnlen,strnlen@GLIBC_2.2.5 .symver strpbrk,strpbrk@GLIBC_2.2.5 .symver strptime,strptime@GLIBC_2.2.5 .symver strptime_l,strptime_l@GLIBC_2.3.2 .symver strrchr,strrchr@GLIBC_2.2.5 .symver strsep,strsep@GLIBC_2.2.5 .symver strsignal,strsignal@GLIBC_2.2.5 .symver strspn,strspn@GLIBC_2.2.5 .symver strstr,strstr@GLIBC_2.2.5 .symver strtod,strtod@GLIBC_2.2.5 .symver strtod_l,strtod_l@GLIBC_2.3 .symver strtof,strtof@GLIBC_2.2.5 .symver strtof_l,strtof_l@GLIBC_2.3 .symver strtoimax,strtoimax@GLIBC_2.2.5 .symver strtok,strtok@GLIBC_2.2.5 .symver strtok_r,strtok_r@GLIBC_2.2.5 .symver strtol,strtol@GLIBC_2.2.5 .symver strtol_l,strtol_l@GLIBC_2.3 .symver strtold,strtold@GLIBC_2.2.5 .symver strtold_l,strtold_l@GLIBC_2.3 .symver strtoll,strtoll@GLIBC_2.2.5 .symver strtoll_l,strtoll_l@GLIBC_2.3.3 .symver strtoq,strtoq@GLIBC_2.2.5 .symver strtoul,strtoul@GLIBC_2.2.5 .symver strtoul_l,strtoul_l@GLIBC_2.3 .symver strtoull,strtoull@GLIBC_2.2.5 .symver strtoull_l,strtoull_l@GLIBC_2.3.3 .symver strtoumax,strtoumax@GLIBC_2.2.5 .symver strtouq,strtouq@GLIBC_2.2.5 .symver strverscmp,strverscmp@GLIBC_2.2.5 .symver strxfrm,strxfrm@GLIBC_2.2.5 .symver strxfrm_l,strxfrm_l@GLIBC_2.3 .symver stty,stty@GLIBC_2.2.5 .symver svc_fdset,svc_fdset@GLIBC_2.2.5 .symver svc_getreq_poll,svc_getreq_poll@GLIBC_2.2.5 .symver svc_max_pollfd,svc_max_pollfd@GLIBC_2.2.5 .symver svc_pollfd,svc_pollfd@GLIBC_2.2.5 .symver svc_register,svc_register@GLIBC_2.2.5 .symver svc_sendreply,svc_sendreply@GLIBC_2.2.5 .symver svcauthdes_stats,svcauthdes_stats@GLIBC_2.2.5 .symver svcerr_decode,svcerr_decode@GLIBC_2.2.5 .symver svcerr_noproc,svcerr_noproc@GLIBC_2.2.5 .symver svcerr_systemerr,svcerr_systemerr@GLIBC_2.2.5 .symver svctcp_create,svctcp_create@GLIBC_2.2.5 .symver svcudp_bufcreate,svcudp_bufcreate@GLIBC_2.2.5 .symver swab,swab@GLIBC_2.2.5 .symver swapcontext,swapcontext@GLIBC_2.2.5 .symver swapoff,swapoff@GLIBC_2.2.5 .symver swapon,swapon@GLIBC_2.2.5 .symver swprintf,swprintf@GLIBC_2.2.5 .symver swscanf,swscanf@GLIBC_2.2.5 .symver symlink,symlink@GLIBC_2.2.5 .symver symlinkat,symlinkat@GLIBC_2.4 .symver sync,sync@GLIBC_2.2.5 .symver sync_file_range,sync_file_range@GLIBC_2.6 .symver syncfs,syncfs@GLIBC_2.14 .symver sys_errlist,sys_errlist@GLIBC_2.12 .symver sys_nerr,sys_nerr@GLIBC_2.12 .symver sys_sigabbrev,sys_sigabbrev@GLIBC_2.3.3 .symver sys_siglist,sys_siglist@GLIBC_2.3.3 .symver syscall,syscall@GLIBC_2.2.5 .symver sysconf,sysconf@GLIBC_2.2.5 .symver sysctl,sysctl@GLIBC_2.2.5 .symver sysinfo,sysinfo@GLIBC_2.2.5 .symver syslog,syslog@GLIBC_2.2.5 .symver system,system@GLIBC_2.2.5 .symver sysv_signal,sysv_signal@GLIBC_2.2.5 .symver tan,tan@GLIBC_2.2.5 .symver tanf,tanf@GLIBC_2.2.5 .symver tanh,tanh@GLIBC_2.2.5 .symver tanhf,tanhf@GLIBC_2.2.5 .symver tanhl,tanhl@GLIBC_2.2.5 .symver tanl,tanl@GLIBC_2.2.5 .symver tcdrain,tcdrain@GLIBC_2.2.5 .symver tcflow,tcflow@GLIBC_2.2.5 .symver tcflush,tcflush@GLIBC_2.2.5 .symver tcgetattr,tcgetattr@GLIBC_2.2.5 .symver tcgetpgrp,tcgetpgrp@GLIBC_2.2.5 .symver tcgetsid,tcgetsid@GLIBC_2.2.5 .symver tcsendbreak,tcsendbreak@GLIBC_2.2.5 .symver tcsetattr,tcsetattr@GLIBC_2.2.5 .symver tcsetpgrp,tcsetpgrp@GLIBC_2.2.5 .symver td_init,td_init@GLIBC_2.2.5 .symver td_log,td_log@GLIBC_2.2.5 .symver td_symbol_list,td_symbol_list@GLIBC_2.2.5 .symver td_ta_clear_event,td_ta_clear_event@GLIBC_2.2.5 .symver td_ta_delete,td_ta_delete@GLIBC_2.2.5 .symver td_ta_enable_stats,td_ta_enable_stats@GLIBC_2.2.5 .symver td_ta_event_addr,td_ta_event_addr@GLIBC_2.2.5 .symver td_ta_event_getmsg,td_ta_event_getmsg@GLIBC_2.2.5 .symver td_ta_get_nthreads,td_ta_get_nthreads@GLIBC_2.2.5 .symver td_ta_get_ph,td_ta_get_ph@GLIBC_2.2.5 .symver td_ta_get_stats,td_ta_get_stats@GLIBC_2.2.5 .symver td_ta_map_id2thr,td_ta_map_id2thr@GLIBC_2.2.5 .symver td_ta_map_lwp2thr,td_ta_map_lwp2thr@GLIBC_2.2.5 .symver td_ta_new,td_ta_new@GLIBC_2.2.5 .symver td_ta_reset_stats,td_ta_reset_stats@GLIBC_2.2.5 .symver td_ta_set_event,td_ta_set_event@GLIBC_2.2.5 .symver td_ta_setconcurrency,td_ta_setconcurrency@GLIBC_2.2.5 .symver td_ta_thr_iter,td_ta_thr_iter@GLIBC_2.2.5 .symver td_ta_tsd_iter,td_ta_tsd_iter@GLIBC_2.2.5 .symver td_thr_clear_event,td_thr_clear_event@GLIBC_2.2.5 .symver td_thr_dbresume,td_thr_dbresume@GLIBC_2.2.5 .symver td_thr_dbsuspend,td_thr_dbsuspend@GLIBC_2.2.5 .symver td_thr_event_enable,td_thr_event_enable@GLIBC_2.2.5 .symver td_thr_event_getmsg,td_thr_event_getmsg@GLIBC_2.2.5 .symver td_thr_get_info,td_thr_get_info@GLIBC_2.2.5 .symver td_thr_getfpregs,td_thr_getfpregs@GLIBC_2.2.5 .symver td_thr_getgregs,td_thr_getgregs@GLIBC_2.2.5 .symver td_thr_getxregs,td_thr_getxregs@GLIBC_2.2.5 .symver td_thr_getxregsize,td_thr_getxregsize@GLIBC_2.2.5 .symver td_thr_set_event,td_thr_set_event@GLIBC_2.2.5 .symver td_thr_setfpregs,td_thr_setfpregs@GLIBC_2.2.5 .symver td_thr_setgregs,td_thr_setgregs@GLIBC_2.2.5 .symver td_thr_setprio,td_thr_setprio@GLIBC_2.2.5 .symver td_thr_setsigpending,td_thr_setsigpending@GLIBC_2.2.5 .symver td_thr_setxregs,td_thr_setxregs@GLIBC_2.2.5 .symver td_thr_sigsetmask,td_thr_sigsetmask@GLIBC_2.2.5 .symver td_thr_tls_get_addr,td_thr_tls_get_addr@GLIBC_2.3 .symver td_thr_tlsbase,td_thr_tlsbase@GLIBC_2.3.3 .symver td_thr_tsd,td_thr_tsd@GLIBC_2.2.5 .symver td_thr_validate,td_thr_validate@GLIBC_2.2.5 .symver tdelete,tdelete@GLIBC_2.2.5 .symver tdestroy,tdestroy@GLIBC_2.2.5 .symver tee,tee@GLIBC_2.5 .symver telldir,telldir@GLIBC_2.2.5 .symver tempnam,tempnam@GLIBC_2.2.5 .symver textdomain,textdomain@GLIBC_2.2.5 .symver tfind,tfind@GLIBC_2.2.5 .symver tgamma,tgamma@GLIBC_2.2.5 .symver tgammaf,tgammaf@GLIBC_2.2.5 .symver tgammal,tgammal@GLIBC_2.2.5 .symver time,time@GLIBC_2.2.5 .symver timegm,timegm@GLIBC_2.2.5 .symver timelocal,timelocal@GLIBC_2.2.5 .symver timer_create,timer_create@GLIBC_2.3.3 .symver timer_delete,timer_delete@GLIBC_2.3.3 .symver timer_getoverrun,timer_getoverrun@GLIBC_2.3.3 .symver timer_gettime,timer_gettime@GLIBC_2.3.3 .symver timer_settime,timer_settime@GLIBC_2.3.3 .symver timerfd_create,timerfd_create@GLIBC_2.8 .symver timerfd_gettime,timerfd_gettime@GLIBC_2.8 .symver timerfd_settime,timerfd_settime@GLIBC_2.8 .symver times,times@GLIBC_2.2.5 .symver timespec_get,timespec_get@GLIBC_2.16 .symver timezone,timezone@GLIBC_2.2.5 .symver tmpfile,tmpfile@GLIBC_2.2.5 .symver tmpfile64,tmpfile64@GLIBC_2.2.5 .symver tmpnam,tmpnam@GLIBC_2.2.5 .symver tmpnam_r,tmpnam_r@GLIBC_2.2.5 .symver toascii,toascii@GLIBC_2.2.5 .symver tolower,tolower@GLIBC_2.2.5 .symver tolower_l,tolower_l@GLIBC_2.3 .symver totalorder,totalorder@GLIBC_2.25 .symver totalorderf,totalorderf@GLIBC_2.25 .symver totalorderl,totalorderl@GLIBC_2.25 .symver totalordermag,totalordermag@GLIBC_2.25 .symver totalordermagf,totalordermagf@GLIBC_2.25 .symver totalordermagl,totalordermagl@GLIBC_2.25 .symver toupper,toupper@GLIBC_2.2.5 .symver toupper_l,toupper_l@GLIBC_2.3 .symver towctrans,towctrans@GLIBC_2.2.5 .symver towctrans_l,towctrans_l@GLIBC_2.3 .symver towlower,towlower@GLIBC_2.2.5 .symver towlower_l,towlower_l@GLIBC_2.3 .symver towupper,towupper@GLIBC_2.2.5 .symver towupper_l,towupper_l@GLIBC_2.3 .symver tr_break,tr_break@GLIBC_2.2.5 .symver trunc,trunc@GLIBC_2.2.5 .symver truncate,truncate@GLIBC_2.2.5 .symver truncate64,truncate64@GLIBC_2.2.5 .symver truncf,truncf@GLIBC_2.2.5 .symver truncl,truncl@GLIBC_2.2.5 .symver tsearch,tsearch@GLIBC_2.2.5 .symver ttyname,ttyname@GLIBC_2.2.5 .symver ttyname_r,ttyname_r@GLIBC_2.2.5 .symver ttyslot,ttyslot@GLIBC_2.2.5 .symver twalk,twalk@GLIBC_2.2.5 .symver tzname,tzname@GLIBC_2.2.5 .symver tzset,tzset@GLIBC_2.2.5 .symver ualarm,ualarm@GLIBC_2.2.5 .symver ufromfp,ufromfp@GLIBC_2.25 .symver ufromfpf,ufromfpf@GLIBC_2.25 .symver ufromfpl,ufromfpl@GLIBC_2.25 .symver ufromfpx,ufromfpx@GLIBC_2.25 .symver ufromfpxf,ufromfpxf@GLIBC_2.25 .symver ufromfpxl,ufromfpxl@GLIBC_2.25 .symver ulckpwdf,ulckpwdf@GLIBC_2.2.5 .symver ulimit,ulimit@GLIBC_2.2.5 .symver umask,umask@GLIBC_2.2.5 .symver umount,umount@GLIBC_2.2.5 .symver umount2,umount2@GLIBC_2.2.5 .symver uname,uname@GLIBC_2.2.5 .symver ungetc,ungetc@GLIBC_2.2.5 .symver ungetwc,ungetwc@GLIBC_2.2.5 .symver unlink,unlink@GLIBC_2.2.5 .symver unlinkat,unlinkat@GLIBC_2.4 .symver unlockpt,unlockpt@GLIBC_2.2.5 .symver unsetenv,unsetenv@GLIBC_2.2.5 .symver unshare,unshare@GLIBC_2.4 .symver updwtmp,updwtmp@GLIBC_2.2.5 .symver updwtmpx,updwtmpx@GLIBC_2.2.5 .symver uselocale,uselocale@GLIBC_2.3 .symver usleep,usleep@GLIBC_2.2.5 .symver ustat,ustat@GLIBC_2.2.5 .symver utime,utime@GLIBC_2.2.5 .symver utimensat,utimensat@GLIBC_2.6 .symver utimes,utimes@GLIBC_2.2.5 .symver utmpname,utmpname@GLIBC_2.2.5 .symver utmpxname,utmpxname@GLIBC_2.2.5 .symver valloc,valloc@GLIBC_2.2.5 .symver vasprintf,vasprintf@GLIBC_2.2.5 .symver vdprintf,vdprintf@GLIBC_2.2.5 .symver verr,verr@GLIBC_2.2.5 .symver verrx,verrx@GLIBC_2.2.5 .symver versionsort,versionsort@GLIBC_2.2.5 .symver versionsort64,versionsort64@GLIBC_2.2.5 .symver vfork,vfork@GLIBC_2.2.5 .symver vfprintf,vfprintf@GLIBC_2.2.5 .symver vfscanf,vfscanf@GLIBC_2.2.5 .symver vfwprintf,vfwprintf@GLIBC_2.2.5 .symver vfwscanf,vfwscanf@GLIBC_2.2.5 .symver vhangup,vhangup@GLIBC_2.2.5 .symver vlimit,vlimit@GLIBC_2.2.5 .symver vmsplice,vmsplice@GLIBC_2.5 .symver vprintf,vprintf@GLIBC_2.2.5 .symver vscanf,vscanf@GLIBC_2.2.5 .symver vsnprintf,vsnprintf@GLIBC_2.2.5 .symver vsprintf,vsprintf@GLIBC_2.2.5 .symver vsscanf,vsscanf@GLIBC_2.2.5 .symver vswprintf,vswprintf@GLIBC_2.2.5 .symver vswscanf,vswscanf@GLIBC_2.2.5 .symver vsyslog,vsyslog@GLIBC_2.2.5 .symver vtimes,vtimes@GLIBC_2.2.5 .symver vwarn,vwarn@GLIBC_2.2.5 .symver vwarnx,vwarnx@GLIBC_2.2.5 .symver vwprintf,vwprintf@GLIBC_2.2.5 .symver vwscanf,vwscanf@GLIBC_2.2.5 .symver wait,wait@GLIBC_2.2.5 .symver wait3,wait3@GLIBC_2.2.5 .symver wait4,wait4@GLIBC_2.2.5 .symver waitid,waitid@GLIBC_2.2.5 .symver waitpid,waitpid@GLIBC_2.2.5 .symver warn,warn@GLIBC_2.2.5 .symver warnx,warnx@GLIBC_2.2.5 .symver wcpcpy,wcpcpy@GLIBC_2.2.5 .symver wcpncpy,wcpncpy@GLIBC_2.2.5 .symver wcrtomb,wcrtomb@GLIBC_2.2.5 .symver wcscasecmp,wcscasecmp@GLIBC_2.2.5 .symver wcscasecmp_l,wcscasecmp_l@GLIBC_2.3 .symver wcscat,wcscat@GLIBC_2.2.5 .symver wcschr,wcschr@GLIBC_2.2.5 .symver wcschrnul,wcschrnul@GLIBC_2.2.5 .symver wcscmp,wcscmp@GLIBC_2.2.5 .symver wcscoll,wcscoll@GLIBC_2.2.5 .symver wcscoll_l,wcscoll_l@GLIBC_2.3 .symver wcscpy,wcscpy@GLIBC_2.2.5 .symver wcscspn,wcscspn@GLIBC_2.2.5 .symver wcsdup,wcsdup@GLIBC_2.2.5 .symver wcsftime,wcsftime@GLIBC_2.2.5 .symver wcsftime_l,wcsftime_l@GLIBC_2.3 .symver wcslen,wcslen@GLIBC_2.2.5 .symver wcsncasecmp,wcsncasecmp@GLIBC_2.2.5 .symver wcsncasecmp_l,wcsncasecmp_l@GLIBC_2.3 .symver wcsncat,wcsncat@GLIBC_2.2.5 .symver wcsncmp,wcsncmp@GLIBC_2.2.5 .symver wcsncpy,wcsncpy@GLIBC_2.2.5 .symver wcsnlen,wcsnlen@GLIBC_2.2.5 .symver wcsnrtombs,wcsnrtombs@GLIBC_2.2.5 .symver wcspbrk,wcspbrk@GLIBC_2.2.5 .symver wcsrchr,wcsrchr@GLIBC_2.2.5 .symver wcsrtombs,wcsrtombs@GLIBC_2.2.5 .symver wcsspn,wcsspn@GLIBC_2.2.5 .symver wcsstr,wcsstr@GLIBC_2.2.5 .symver wcstod,wcstod@GLIBC_2.2.5 .symver wcstod_l,wcstod_l@GLIBC_2.3 .symver wcstof,wcstof@GLIBC_2.2.5 .symver wcstof_l,wcstof_l@GLIBC_2.3 .symver wcstoimax,wcstoimax@GLIBC_2.2.5 .symver wcstok,wcstok@GLIBC_2.2.5 .symver wcstol,wcstol@GLIBC_2.2.5 .symver wcstol_l,wcstol_l@GLIBC_2.3 .symver wcstold,wcstold@GLIBC_2.2.5 .symver wcstold_l,wcstold_l@GLIBC_2.3 .symver wcstoll,wcstoll@GLIBC_2.2.5 .symver wcstoll_l,wcstoll_l@GLIBC_2.3 .symver wcstombs,wcstombs@GLIBC_2.2.5 .symver wcstoq,wcstoq@GLIBC_2.2.5 .symver wcstoul,wcstoul@GLIBC_2.2.5 .symver wcstoul_l,wcstoul_l@GLIBC_2.3 .symver wcstoull,wcstoull@GLIBC_2.2.5 .symver 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__stpcpy_small,__stpcpy_small@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver __strcpy_small,__strcpy_small@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver __strcspn_c1,__strcspn_c1@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver __strcspn_c2,__strcspn_c2@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver __strcspn_c3,__strcspn_c3@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver __strpbrk_c2,__strpbrk_c2@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver __strpbrk_c3,__strpbrk_c3@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver __strsep_1c,__strsep_1c@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver __strsep_2c,__strsep_2c@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver __strsep_3c,__strsep_3c@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver __strspn_c1,__strspn_c1@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver 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acosf64x,acosf64x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver acoshf128,acoshf128@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver acoshf32,acoshf32@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver acoshf32x,acoshf32x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver acoshf64,acoshf64@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver acoshf64x,acoshf64x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver advance,advance@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver asinf128,asinf128@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver asinf32,asinf32@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver asinf32x,asinf32x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver asinf64,asinf64@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver asinf64x,asinf64x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver asinhf128,asinhf128@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver asinhf32,asinhf32@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver asinhf32x,asinhf32x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver asinhf64,asinhf64@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver asinhf64x,asinhf64x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver atan2f128,atan2f128@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver atan2f32,atan2f32@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver atan2f32x,atan2f32x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver atan2f64,atan2f64@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver atan2f64x,atan2f64x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver atanf128,atanf128@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver atanf32,atanf32@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver atanf32x,atanf32x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver atanf64,atanf64@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver atanf64x,atanf64x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver atanhf128,atanhf128@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver atanhf32,atanhf32@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver atanhf32x,atanhf32x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver atanhf64,atanhf64@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver atanhf64x,atanhf64x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver authdes_getucred,authdes_getucred@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver authnone_create,authnone_create@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver authunix_create,authunix_create@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver bdflush,bdflush@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver cabsf128,cabsf128@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver cabsf32,cabsf32@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver cabsf32x,cabsf32x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver cabsf64,cabsf64@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver cabsf64x,cabsf64x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver cacosf128,cacosf128@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver cacosf32,cacosf32@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver cacosf32x,cacosf32x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver cacosf64,cacosf64@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver cacosf64x,cacosf64x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver cacoshf128,cacoshf128@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver cacoshf32,cacoshf32@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver cacoshf32x,cacoshf32x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver cacoshf64,cacoshf64@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver cacoshf64x,cacoshf64x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver callrpc,callrpc@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver canonicalizef128,canonicalizef128@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver canonicalizef32,canonicalizef32@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver canonicalizef32x,canonicalizef32x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver canonicalizef64,canonicalizef64@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver canonicalizef64x,canonicalizef64x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver cargf128,cargf128@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver cargf32,cargf32@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver cargf32x,cargf32x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver cargf64,cargf64@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver cargf64x,cargf64x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver casinf128,casinf128@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver casinf32,casinf32@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver casinf32x,casinf32x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver casinf64,casinf64@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver casinf64x,casinf64x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver casinhf128,casinhf128@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver casinhf32,casinhf32@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver casinhf32x,casinhf32x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver casinhf64,casinhf64@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver casinhf64x,casinhf64x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver catanf128,catanf128@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver catanf32,catanf32@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver catanf32x,catanf32x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver catanf64,catanf64@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver catanf64x,catanf64x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver catanhf128,catanhf128@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver catanhf32,catanhf32@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver catanhf32x,catanhf32x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver catanhf64,catanhf64@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver catanhf64x,catanhf64x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver cbc_crypt,cbc_crypt@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver cbrtf128,cbrtf128@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver cbrtf32,cbrtf32@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver cbrtf32x,cbrtf32x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver cbrtf64,cbrtf64@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver cbrtf64x,cbrtf64x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver ccosf128,ccosf128@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver ccosf32,ccosf32@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver ccosf32x,ccosf32x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver ccosf64,ccosf64@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver ccosf64x,ccosf64x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver ccoshf128,ccoshf128@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver ccoshf32,ccoshf32@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver ccoshf32x,ccoshf32x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver ccoshf64,ccoshf64@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver ccoshf64x,ccoshf64x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver ceilf128,ceilf128@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver ceilf32,ceilf32@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver ceilf32x,ceilf32x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver ceilf64,ceilf64@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver ceilf64x,ceilf64x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver cexpf128,cexpf128@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver cexpf32,cexpf32@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver cexpf32x,cexpf32x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver cexpf64,cexpf64@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver cexpf64x,cexpf64x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver cimagf128,cimagf128@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver cimagf32,cimagf32@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver cimagf32x,cimagf32x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver cimagf64,cimagf64@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver cimagf64x,cimagf64x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver clnt_broadcast,clnt_broadcast@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver clnt_perrno,clnt_perrno@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver clnt_spcreateerror,clnt_spcreateerror@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver clnt_sperror,clnt_sperror@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver clntraw_create,clntraw_create@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver clntudp_bufcreate,clntudp_bufcreate@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver clntunix_create,clntunix_create@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver clog10f128,clog10f128@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver clog10f32,clog10f32@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver clog10f32x,clog10f32x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver clog10f64,clog10f64@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver clog10f64x,clog10f64x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver clogf128,clogf128@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver clogf32,clogf32@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver clogf32x,clogf32x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver clogf64,clogf64@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver clogf64x,clogf64x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver conjf128,conjf128@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver conjf32,conjf32@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver conjf32x,conjf32x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver conjf64,conjf64@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver conjf64x,conjf64x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver copy_file_range,copy_file_range@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver copysignf128,copysignf128@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver copysignf32,copysignf32@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver copysignf32x,copysignf32x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver copysignf64,copysignf64@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver copysignf64x,copysignf64x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver cosf128,cosf128@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver cosf32,cosf32@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver cosf32x,cosf32x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver cosf64,cosf64@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver cosf64x,cosf64x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver coshf128,coshf128@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver coshf32,coshf32@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver coshf32x,coshf32x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver coshf64,coshf64@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver coshf64x,coshf64x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver cpowf128,cpowf128@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver cpowf32,cpowf32@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver cpowf32x,cpowf32x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver cpowf64,cpowf64@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver cpowf64x,cpowf64x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver cprojf128,cprojf128@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver cprojf32,cprojf32@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver cprojf32x,cprojf32x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver cprojf64,cprojf64@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver cprojf64x,cprojf64x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver crealf128,crealf128@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver crealf32,crealf32@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver crealf32x,crealf32x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver crealf64,crealf64@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver crealf64x,crealf64x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver create_module,create_module@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver csinf128,csinf128@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver csinf32,csinf32@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver csinf32x,csinf32x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver csinf64,csinf64@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver csinf64x,csinf64x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver csinhf128,csinhf128@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver csinhf32,csinhf32@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver csinhf32x,csinhf32x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver csinhf64,csinhf64@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver csinhf64x,csinhf64x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver csqrtf128,csqrtf128@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver csqrtf32,csqrtf32@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver csqrtf32x,csqrtf32x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver csqrtf64,csqrtf64@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver csqrtf64x,csqrtf64x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver ctanf128,ctanf128@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver ctanf32,ctanf32@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver ctanf32x,ctanf32x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver ctanf64,ctanf64@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver ctanf64x,ctanf64x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver ctanhf128,ctanhf128@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver ctanhf32,ctanhf32@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver ctanhf32x,ctanhf32x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver ctanhf64,ctanhf64@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver ctanhf64x,ctanhf64x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver des_setparity,des_setparity@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver ecb_crypt,ecb_crypt@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver erfcf128,erfcf128@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver erfcf32,erfcf32@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver erfcf32x,erfcf32x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver erfcf64,erfcf64@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver erfcf64x,erfcf64x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver erff128,erff128@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver erff32,erff32@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver erff32x,erff32x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver erff64,erff64@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver erff64x,erff64x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver exp10f128,exp10f128@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver exp10f32,exp10f32@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver exp10f32x,exp10f32x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver exp10f64,exp10f64@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver exp10f64x,exp10f64x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver exp2f128,exp2f128@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver exp2f32,exp2f32@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver exp2f32x,exp2f32x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver exp2f64,exp2f64@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver exp2f64x,exp2f64x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver expf128,expf128@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver expf32,expf32@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver expf32x,expf32x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver expf64,expf64@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver expf64x,expf64x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver expm1f128,expm1f128@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver expm1f32,expm1f32@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver expm1f32x,expm1f32x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver expm1f64,expm1f64@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver expm1f64x,expm1f64x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver fabsf128,fabsf128@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver fabsf32,fabsf32@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver fabsf32x,fabsf32x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver fabsf64,fabsf64@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver fabsf64x,fabsf64x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver fdimf128,fdimf128@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver fdimf32,fdimf32@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver fdimf32x,fdimf32x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver fdimf64,fdimf64@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver fdimf64x,fdimf64x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver floorf128,floorf128@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver floorf32,floorf32@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver floorf32x,floorf32x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver floorf64,floorf64@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver floorf64x,floorf64x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver fmaf128,fmaf128@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver fmaf32,fmaf32@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver fmaf32x,fmaf32x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver fmaf64,fmaf64@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver fmaf64x,fmaf64x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver fmaxf128,fmaxf128@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver fmaxf32,fmaxf32@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver fmaxf32x,fmaxf32x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver fmaxf64,fmaxf64@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver fmaxf64x,fmaxf64x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver fmaxmagf128,fmaxmagf128@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver fmaxmagf32,fmaxmagf32@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver fmaxmagf32x,fmaxmagf32x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver fmaxmagf64,fmaxmagf64@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver fmaxmagf64x,fmaxmagf64x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver fminf128,fminf128@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver fminf32,fminf32@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver fminf32x,fminf32x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver fminf64,fminf64@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver fminf64x,fminf64x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver fminmagf128,fminmagf128@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver fminmagf32,fminmagf32@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver fminmagf32x,fminmagf32x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver fminmagf64,fminmagf64@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver fminmagf64x,fminmagf64x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver fmodf128,fmodf128@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver fmodf32,fmodf32@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver fmodf32x,fmodf32x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver fmodf64,fmodf64@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver fmodf64x,fmodf64x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver frexpf128,frexpf128@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver frexpf32,frexpf32@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver frexpf32x,frexpf32x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver frexpf64,frexpf64@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver frexpf64x,frexpf64x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver fromfpf128,fromfpf128@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver fromfpf32,fromfpf32@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver fromfpf32x,fromfpf32x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver fromfpf64,fromfpf64@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver fromfpf64x,fromfpf64x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver fromfpxf128,fromfpxf128@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver fromfpxf32,fromfpxf32@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver fromfpxf32x,fromfpxf32x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver fromfpxf64,fromfpxf64@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver fromfpxf64x,fromfpxf64x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver get_kernel_syms,get_kernel_syms@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver getnetname,getnetname@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver getpayloadf128,getpayloadf128@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver getpayloadf32,getpayloadf32@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver getpayloadf32x,getpayloadf32x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver getpayloadf64,getpayloadf64@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver getpayloadf64x,getpayloadf64x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver getpublickey,getpublickey@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver getsecretkey,getsecretkey@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver hypotf128,hypotf128@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver hypotf32,hypotf32@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver hypotf32x,hypotf32x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver hypotf64,hypotf64@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver hypotf64x,hypotf64x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver ilogbf128,ilogbf128@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver ilogbf32,ilogbf32@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver ilogbf32x,ilogbf32x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver ilogbf64,ilogbf64@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver ilogbf64x,ilogbf64x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver j0f128,j0f128@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver j0f32,j0f32@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver j0f32x,j0f32x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver j0f64,j0f64@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver j0f64x,j0f64x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver j1f128,j1f128@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver j1f32,j1f32@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver j1f32x,j1f32x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver j1f64,j1f64@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver j1f64x,j1f64x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver jnf128,jnf128@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver jnf32,jnf32@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver jnf32x,jnf32x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver jnf64,jnf64@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver jnf64x,jnf64x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver key_decryptsession,key_decryptsession@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver key_decryptsession_pk,key_decryptsession_pk@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver key_encryptsession,key_encryptsession@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver key_encryptsession_pk,key_encryptsession_pk@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver key_get_conv,key_get_conv@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver key_setnet,key_setnet@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver key_setsecret,key_setsecret@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver ldexpf128,ldexpf128@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver ldexpf32,ldexpf32@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver ldexpf32x,ldexpf32x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver ldexpf64,ldexpf64@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver ldexpf64x,ldexpf64x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver lgammaf128,lgammaf128@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver lgammaf128_r,lgammaf128_r@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver lgammaf32,lgammaf32@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver lgammaf32_r,lgammaf32_r@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver lgammaf32x,lgammaf32x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver lgammaf32x_r,lgammaf32x_r@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver lgammaf64,lgammaf64@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver lgammaf64_r,lgammaf64_r@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver lgammaf64x,lgammaf64x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver lgammaf64x_r,lgammaf64x_r@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver llogbf128,llogbf128@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver llogbf32,llogbf32@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver llogbf32x,llogbf32x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver llogbf64,llogbf64@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver llogbf64x,llogbf64x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver llrintf128,llrintf128@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver llrintf32,llrintf32@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver llrintf32x,llrintf32x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver llrintf64,llrintf64@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver llrintf64x,llrintf64x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver llroundf128,llroundf128@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver llroundf32,llroundf32@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver llroundf32x,llroundf32x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver llroundf64,llroundf64@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver llroundf64x,llroundf64x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver loc1,loc1@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver loc2,loc2@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver locs,locs@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver log10f128,log10f128@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver log10f32,log10f32@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver log10f32x,log10f32x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver log10f64,log10f64@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver log10f64x,log10f64x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver log1pf128,log1pf128@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver log1pf32,log1pf32@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver log1pf32x,log1pf32x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver log1pf64,log1pf64@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver log1pf64x,log1pf64x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver log2f128,log2f128@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver log2f32,log2f32@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver log2f32x,log2f32x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver log2f64,log2f64@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver log2f64x,log2f64x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver logbf128,logbf128@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver logbf32,logbf32@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver logbf32x,logbf32x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver logbf64,logbf64@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver logbf64x,logbf64x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver logf128,logf128@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver logf32,logf32@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver logf32x,logf32x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver logf64,logf64@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver logf64x,logf64x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver lrintf128,lrintf128@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver lrintf32,lrintf32@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver lrintf32x,lrintf32x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver lrintf64,lrintf64@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver lrintf64x,lrintf64x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver lroundf128,lroundf128@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver lroundf32,lroundf32@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver lroundf32x,lroundf32x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver lroundf64,lroundf64@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver lroundf64x,lroundf64x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver malloc_get_state,malloc_get_state@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver malloc_set_state,malloc_set_state@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver memfd_create,memfd_create@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver mlock2,mlock2@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver modff128,modff128@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver modff32,modff32@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver modff32x,modff32x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver modff64,modff64@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver modff64x,modff64x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver nanf128,nanf128@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver nanf32,nanf32@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver nanf32x,nanf32x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver nanf64,nanf64@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver nanf64x,nanf64x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver nearbyintf128,nearbyintf128@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver nearbyintf32,nearbyintf32@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver nearbyintf32x,nearbyintf32x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver nearbyintf64,nearbyintf64@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver nearbyintf64x,nearbyintf64x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver netname2host,netname2host@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver netname2user,netname2user@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver nextafterf128,nextafterf128@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver nextafterf32,nextafterf32@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver nextafterf32x,nextafterf32x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver nextafterf64,nextafterf64@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver nextafterf64x,nextafterf64x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver nextdownf128,nextdownf128@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver nextdownf32,nextdownf32@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver nextdownf32x,nextdownf32x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver nextdownf64,nextdownf64@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver nextdownf64x,nextdownf64x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver nextupf128,nextupf128@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver nextupf32,nextupf32@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver nextupf32x,nextupf32x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver nextupf64,nextupf64@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver nextupf64x,nextupf64x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver passwd2des,passwd2des@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver pkey_alloc,pkey_alloc@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver pkey_free,pkey_free@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver pkey_get,pkey_get@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver pkey_mprotect,pkey_mprotect@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver pkey_set,pkey_set@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver pmap_getmaps,pmap_getmaps@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver pmap_getport,pmap_getport@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver pmap_rmtcall,pmap_rmtcall@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver pmap_set,pmap_set@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver pmap_unset,pmap_unset@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver powf128,powf128@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver powf32,powf32@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver powf32x,powf32x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver powf64,powf64@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver powf64x,powf64x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver preadv2,preadv2@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver preadv64v2,preadv64v2@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver pwritev2,pwritev2@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver pwritev64v2,pwritev64v2@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver query_module,query_module@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver reallocarray,reallocarray@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver registerrpc,registerrpc@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver remainderf128,remainderf128@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver remainderf32,remainderf32@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver remainderf32x,remainderf32x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver remainderf64,remainderf64@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver remainderf64x,remainderf64x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver remquof128,remquof128@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver remquof32,remquof32@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver remquof32x,remquof32x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver remquof64,remquof64@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver remquof64x,remquof64x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver res_gethostbyaddr,res_gethostbyaddr@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver res_gethostbyname,res_gethostbyname@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver res_gethostbyname2,res_gethostbyname2@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver res_send_setqhook,res_send_setqhook@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver res_send_setrhook,res_send_setrhook@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver rintf128,rintf128@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver rintf32,rintf32@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver rintf32x,rintf32x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver rintf64,rintf64@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver rintf64x,rintf64x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver roundevenf128,roundevenf128@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver roundevenf32,roundevenf32@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver roundevenf32x,roundevenf32x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver roundevenf64,roundevenf64@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver roundevenf64x,roundevenf64x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver roundf128,roundf128@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver roundf32,roundf32@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver roundf32x,roundf32x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver roundf64,roundf64@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver roundf64x,roundf64x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver rtime,rtime@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver scalblnf128,scalblnf128@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver scalblnf32,scalblnf32@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver scalblnf32x,scalblnf32x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver scalblnf64,scalblnf64@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver scalblnf64x,scalblnf64x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver scalbnf128,scalbnf128@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver scalbnf32,scalbnf32@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver scalbnf32x,scalbnf32x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver scalbnf64,scalbnf64@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver scalbnf64x,scalbnf64x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver setpayloadf128,setpayloadf128@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver setpayloadf32,setpayloadf32@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver setpayloadf32x,setpayloadf32x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver setpayloadf64,setpayloadf64@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver setpayloadf64x,setpayloadf64x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver setpayloadsigf128,setpayloadsigf128@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver setpayloadsigf32,setpayloadsigf32@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver setpayloadsigf32x,setpayloadsigf32x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver setpayloadsigf64,setpayloadsigf64@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver setpayloadsigf64x,setpayloadsigf64x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver sigvec,sigvec@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver sincosf128,sincosf128@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver sincosf32,sincosf32@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver sincosf32x,sincosf32x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver sincosf64,sincosf64@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver sincosf64x,sincosf64x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver sinf128,sinf128@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver sinf32,sinf32@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver sinf32x,sinf32x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver sinf64,sinf64@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver sinf64x,sinf64x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver sinhf128,sinhf128@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver sinhf32,sinhf32@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver sinhf32x,sinhf32x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver sinhf64,sinhf64@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver sinhf64x,sinhf64x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver sqrtf128,sqrtf128@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver sqrtf32,sqrtf32@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver sqrtf32x,sqrtf32x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver sqrtf64,sqrtf64@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver sqrtf64x,sqrtf64x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver step,step@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver strfromf128,strfromf128@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver strfromf32,strfromf32@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver strfromf32x,strfromf32x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver strfromf64,strfromf64@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver strfromf64x,strfromf64x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver strtof128,strtof128@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver strtof128_l,strtof128_l@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver strtof32,strtof32@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver strtof32_l,strtof32_l@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver strtof32x,strtof32x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver strtof32x_l,strtof32x_l@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver strtof64,strtof64@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver strtof64_l,strtof64_l@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver strtof64x,strtof64x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver strtof64x_l,strtof64x_l@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver svc_exit,svc_exit@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver svc_getreq,svc_getreq@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver svc_getreq_common,svc_getreq_common@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver svc_getreqset,svc_getreqset@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver svc_run,svc_run@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver svc_unregister,svc_unregister@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver svcerr_auth,svcerr_auth@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver svcerr_noprog,svcerr_noprog@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver svcerr_progvers,svcerr_progvers@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver svcerr_weakauth,svcerr_weakauth@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver svcfd_create,svcfd_create@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver svcraw_create,svcraw_create@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver svcudp_create,svcudp_create@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver svcudp_enablecache,svcudp_enablecache@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver svcunix_create,svcunix_create@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver svcunixfd_create,svcunixfd_create@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver tanf128,tanf128@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver tanf32,tanf32@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver tanf32x,tanf32x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver tanf64,tanf64@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver tanf64x,tanf64x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver tanhf128,tanhf128@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver tanhf32,tanhf32@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver tanhf32x,tanhf32x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver tanhf64,tanhf64@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver tanhf64x,tanhf64x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver tgammaf128,tgammaf128@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver tgammaf32,tgammaf32@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver tgammaf32x,tgammaf32x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver tgammaf64,tgammaf64@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver tgammaf64x,tgammaf64x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver totalorderf128,totalorderf128@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver totalorderf32,totalorderf32@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver totalorderf32x,totalorderf32x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver totalorderf64,totalorderf64@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver totalorderf64x,totalorderf64x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver totalordermagf128,totalordermagf128@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver totalordermagf32,totalordermagf32@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver totalordermagf32x,totalordermagf32x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver totalordermagf64,totalordermagf64@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver totalordermagf64x,totalordermagf64x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver truncf128,truncf128@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver truncf32,truncf32@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver truncf32x,truncf32x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver truncf64,truncf64@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver truncf64x,truncf64x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver ufromfpf128,ufromfpf128@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver ufromfpf32,ufromfpf32@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver ufromfpf32x,ufromfpf32x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver ufromfpf64,ufromfpf64@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver ufromfpf64x,ufromfpf64x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver ufromfpxf128,ufromfpxf128@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver ufromfpxf32,ufromfpxf32@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver ufromfpxf32x,ufromfpxf32x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver ufromfpxf64,ufromfpxf64@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver ufromfpxf64x,ufromfpxf64x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver uselib,uselib@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver user2netname,user2netname@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver wcstof128,wcstof128@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver wcstof128_l,wcstof128_l@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver wcstof32,wcstof32@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver wcstof32_l,wcstof32_l@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver wcstof32x,wcstof32x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver wcstof32x_l,wcstof32x_l@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver wcstof64,wcstof64@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver wcstof64_l,wcstof64_l@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver wcstof64x,wcstof64x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver wcstof64x_l,wcstof64x_l@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver xdr_accepted_reply,xdr_accepted_reply@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver xdr_authdes_cred,xdr_authdes_cred@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver xdr_authdes_verf,xdr_authdes_verf@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver xdr_authunix_parms,xdr_authunix_parms@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver xdr_callhdr,xdr_callhdr@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver xdr_callmsg,xdr_callmsg@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver xdr_char,xdr_char@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver xdr_cryptkeyarg,xdr_cryptkeyarg@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver xdr_cryptkeyarg2,xdr_cryptkeyarg2@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver xdr_cryptkeyres,xdr_cryptkeyres@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver xdr_des_block,xdr_des_block@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver xdr_double,xdr_double@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver xdr_float,xdr_float@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver xdr_getcredres,xdr_getcredres@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver xdr_hyper,xdr_hyper@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver xdr_int16_t,xdr_int16_t@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver xdr_int32_t,xdr_int32_t@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver xdr_int64_t,xdr_int64_t@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver xdr_int8_t,xdr_int8_t@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver xdr_key_netstarg,xdr_key_netstarg@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver xdr_key_netstres,xdr_key_netstres@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver xdr_keybuf,xdr_keybuf@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver xdr_keystatus,xdr_keystatus@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver xdr_long,xdr_long@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver xdr_longlong_t,xdr_longlong_t@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver xdr_netnamestr,xdr_netnamestr@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver xdr_opaque_auth,xdr_opaque_auth@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver xdr_pmap,xdr_pmap@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver xdr_pmaplist,xdr_pmaplist@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver xdr_quad_t,xdr_quad_t@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver xdr_reference,xdr_reference@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver xdr_rejected_reply,xdr_rejected_reply@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver xdr_replymsg,xdr_replymsg@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver xdr_rmtcall_args,xdr_rmtcall_args@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver xdr_rmtcallres,xdr_rmtcallres@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver xdr_short,xdr_short@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver xdr_u_hyper,xdr_u_hyper@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver xdr_u_long,xdr_u_long@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver xdr_u_longlong_t,xdr_u_longlong_t@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver xdr_u_quad_t,xdr_u_quad_t@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver xdr_u_short,xdr_u_short@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver xdr_uint16_t,xdr_uint16_t@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver xdr_uint64_t,xdr_uint64_t@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver xdr_uint8_t,xdr_uint8_t@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver xdr_union,xdr_union@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver xdr_unixcred,xdr_unixcred@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver xdr_vector,xdr_vector@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver xdr_wrapstring,xdr_wrapstring@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver xdrrec_create,xdrrec_create@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver xdrrec_endofrecord,xdrrec_endofrecord@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver xdrrec_eof,xdrrec_eof@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver xdrrec_skiprecord,xdrrec_skiprecord@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver xencrypt,xencrypt@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver xprt_register,xprt_register@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver y0f128,y0f128@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver y0f32,y0f32@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver y0f32x,y0f32x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver y0f64,y0f64@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver y0f64x,y0f64x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver y1f128,y1f128@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver y1f32,y1f32@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver y1f32x,y1f32x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver y1f64,y1f64@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver y1f64x,y1f64x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver ynf128,ynf128@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver ynf32,ynf32@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver ynf32x,ynf32x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver ynf64,ynf64@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION .symver ynf64x,ynf64x@GLIBC_WRAP_ERROR_SYMBOL_NOT_PRESENT_IN_REQUESTED_VERSION ```
### Human: Write a random program in ARM assembly### Assistant: ``` .text .global a .bss .align 2 .type a, %object .size a, 8 a: .zero 8 .global b .align 2 .type b, %object .size b, 8 b: .zero 8 .global c .align 3 .type c, %object .size c, 16 c: .zero 16 .global d .align 3 .type d, %object .size d, 16 d: .zero 16 .global e .align 4 .type e, %object .size e, 32 e: .zero 32 .global f .align 4 .type f, %object .size f, 32 f: .zero 32 .global g .align 3 .type g, %object .size g, 16 g: .zero 16 .global h .align 2 .type h, %object .size h, 8 h: .zero 8 .global i .align 3 .type i, %object .size i, 16 i: .zero 16 .text .align 2 .global foo .type foo, %function foo: .LFB0: .cfi_startproc sub sp, sp, #32 .cfi_def_cfa_offset 32 fmov d2, d0 fmov d0, d1 fmov d1, d2 str d1, [sp] str d0, [sp, 8] ldr d0, [sp] str d0, [sp, 16] ldr d0, [sp, 8] str d0, [sp, 24] ldr d0, [sp, 24] fneg d1, d0 ldr d0, [sp, 16] add sp, sp, 32 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE0: .size foo, .-foo ```
### Human: Write a random program in ARM assembly### Assistant: ``` .text .global p .bss .align 3 .type p, %object .size p, 4000 p: .zero 4000 .global p2 .align 3 .type p2, %object .size p2, 4000 p2: .zero 4000 .text .align 2 .global foo .type foo, %function foo: .LFB0: .cfi_startproc sub sp, sp, #16 .cfi_def_cfa_offset 16 str wzr, [sp, 4] b .L2 .L3: adrp x0, p add x0, x0, :lo12:p ldrsw x1, [sp, 4] ldr w0, [x0, x1, lsl 2] str w0, [sp, 8] ldr w0, [sp, 4] add w1, w0, 1 adrp x0, p add x0, x0, :lo12:p sxtw x1, w1 ldr w0, [x0, x1, lsl 2] str w0, [sp, 12] adrp x0, p2 add x0, x0, :lo12:p2 ldrsw x1, [sp, 4] ldr w2, [sp, 8] str w2, [x0, x1, lsl 2] ldr w0, [sp, 4] add w1, w0, 1 adrp x0, p2 add x0, x0, :lo12:p2 sxtw x1, w1 ldr w2, [sp, 12] str w2, [x0, x1, lsl 2] ldr w0, [sp, 4] add w0, w0, 2 str w0, [sp, 4] .L2: ldr w0, [sp, 4] cmp w0, 999 ble .L3 nop nop add sp, sp, 16 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE0: .size foo, .-foo ```
### Human: Write a random program in ARM assembly### Assistant: ``` .text .global ver .data .align 3 .type ver, %object .size ver, 41 ver: .string "Unidentified build, Jun 25 2024 15:37:00" .global sshver .align 3 .type sshver, %object .size sshver, 34 sshver: .string "PuTTY-Local: Jun 25 2024 15:37:00" ```
### Human: Write a random program in ARM assembly### Assistant: ``` .text .section .rodata .align 3 .LC0: .string "%s: will not run as root\n" .align 3 .LC1: .string "%s: cannot change from root: %s\n" .align 3 .LC2: .string "%s: cannot change from root\n" .align 3 .LC3: .string "%s: could not create new process group: %s\n" .align 3 .LC4: .string "s" .align 3 .LC5: .string "%s: invalid system command\n" .align 3 .LC6: .string "%s: could not allocate temporary memory: %s\n" .align 3 .LC7: .string "e" .align 3 .LC8: .string "%s: '%s' execution error: %s\n" .align 3 .LC9: .string "%s s \"command\" (...)\n" .align 3 .LC10: .string "%s e [command] (arguments...)\n" .text .align 2 .global main .type main, %function main: .LFB0: .cfi_startproc stp x29, x30, [sp, -112]! .cfi_def_cfa_offset 112 .cfi_offset 29, -112 .cfi_offset 30, -104 mov x29, sp stp x19, x20, [sp, 16] str x21, [sp, 32] .cfi_offset 19, -96 .cfi_offset 20, -88 .cfi_offset 21, -80 str w0, [sp, 60] str x1, [sp, 48] bl getuid cmp w0, 0 beq .L2 bl getgid cmp w0, 0 bne .L3 .L2: bl geteuid str w0, [sp, 84] bl getegid str w0, [sp, 88] bl getuid cmp w0, 0 bne .L4 ldr w0, [sp, 84] cmp w0, 0 beq .L4 ldr w0, [sp, 88] cmp w0, 0 bne .L5 .L4: adrp x0, :got:stderr ldr x0, [x0, #:got_lo12:stderr] ldr x3, [x0] ldr x0, [sp, 48] ldr x0, [x0] mov x2, x0 adrp x0, .LC0 add x1, x0, :lo12:.LC0 mov x0, x3 bl fprintf mov w0, 1 b .L6 .L5: mov w0, 0 bl seteuid cmp w0, 0 bne .L7 bl getgid cmp w0, 0 bne .L8 ldr w0, [sp, 88] bl setgid cmp w0, 0 bne .L7 .L8: bl getuid cmp w0, 0 bne .L3 ldr w0, [sp, 84] bl setuid cmp w0, 0 beq .L3 .L7: adrp x0, :got:stderr ldr x0, [x0, #:got_lo12:stderr] ldr x19, [x0] ldr x0, [sp, 48] ldr x20, [x0] bl __errno_location ldr w0, [x0] bl strerror mov x3, x0 mov x2, x20 adrp x0, .LC1 add x1, x0, :lo12:.LC1 mov x0, x19 bl fprintf mov w0, 1 b .L6 .L3: bl getgid bl setegid bl getuid bl seteuid bl getuid cmp w0, 0 beq .L9 bl getgid cmp w0, 0 beq .L9 bl getgid bl setegid cmp w0, 0 bne .L9 bl getuid bl seteuid cmp w0, 0 beq .L10 .L9: adrp x0, :got:stderr ldr x0, [x0, #:got_lo12:stderr] ldr x3, [x0] ldr x0, [sp, 48] ldr x0, [x0] mov x2, x0 adrp x0, .LC2 add x1, x0, :lo12:.LC2 mov x0, x3 bl fprintf mov w0, 1 b .L6 .L10: mov w0, 0 bl getsid mov w19, w0 bl getpid cmp w19, w0 beq .L11 mov w1, 0 mov w0, 0 bl setpgid cmp w0, 0 bge .L11 adrp x0, :got:stderr ldr x0, [x0, #:got_lo12:stderr] ldr x19, [x0] ldr x0, [sp, 48] ldr x20, [x0] bl __errno_location ldr w0, [x0] bl strerror mov x3, x0 mov x2, x20 adrp x0, .LC3 add x1, x0, :lo12:.LC3 mov x0, x19 bl fprintf mov w0, 1 b .L6 .L11: str wzr, [sp, 92] ldr w0, [sp, 60] cmp w0, 2 ble .L12 ldr x0, [sp, 48] add x0, x0, 8 ldr x2, [x0] adrp x0, .LC4 add x1, x0, :lo12:.LC4 mov x0, x2 bl strcmp cmp w0, 0 bne .L12 str wzr, [sp, 68] str wzr, [sp, 72] mov w0, 2 str w0, [sp, 72] b .L13 .L14: ldr w0, [sp, 72] lsl x0, x0, 3 ldr x1, [sp, 48] add x0, x1, x0 ldr x0, [x0] bl strlen mov w1, w0 ldr w0, [sp, 68] add w0, w1, w0 add w0, w0, 1 str w0, [sp, 68] ldr w0, [sp, 72] add w0, w0, 1 str w0, [sp, 72] .L13: ldr w0, [sp, 60] ldr w1, [sp, 72] cmp w1, w0 bcc .L14 ldr w0, [sp, 68] cmp w0, 0 bne .L15 adrp x0, :got:stderr ldr x0, [x0, #:got_lo12:stderr] ldr x3, [x0] ldr x0, [sp, 48] ldr x0, [x0] mov x2, x0 adrp x0, .LC5 add x1, x0, :lo12:.LC5 mov x0, x3 bl fprintf mov w0, 1 b .L6 .L15: ldr w0, [sp, 68] bl malloc str x0, [sp, 104] ldr x0, [sp, 104] cmp x0, 0 bne .L16 adrp x0, :got:stderr ldr x0, [x0, #:got_lo12:stderr] ldr x19, [x0] ldr x0, [sp, 48] ldr x20, [x0] bl __errno_location ldr w0, [x0] bl strerror mov x3, x0 mov x2, x20 adrp x0, .LC6 add x1, x0, :lo12:.LC6 mov x0, x19 bl fprintf mov w0, 1 b .L6 .L16: str wzr, [sp, 76] mov w0, 2 str w0, [sp, 72] str wzr, [sp, 76] b .L17 .L24: ldr w0, [sp, 72] lsl x0, x0, 3 ldr x1, [sp, 48] add x0, x1, x0 ldr x0, [x0] bl strlen str w0, [sp, 96] str wzr, [sp, 80] str wzr, [sp, 80] b .L18 .L20: ldr w0, [sp, 72] lsl x0, x0, 3 ldr x1, [sp, 48] add x0, x1, x0 ldr x1, [x0] ldrsw x0, [sp, 80] add x1, x1, x0 ldr w0, [sp, 76] add w2, w0, 1 str w2, [sp, 76] sxtw x0, w0 ldr x2, [sp, 104] add x0, x2, x0 ldrb w1, [x1] strb w1, [x0] ldr w0, [sp, 80] add w0, w0, 1 str w0, [sp, 80] .L18: ldr w1, [sp, 80] ldr w0, [sp, 96] cmp w1, w0 bge .L19 ldr w0, [sp, 76] ldr w1, [sp, 68] cmp w1, w0 bhi .L20 .L19: ldr w0, [sp, 60] sub w0, w0, #1 mov w1, w0 ldr w0, [sp, 72] cmp w0, w1 bcs .L21 ldr w0, [sp, 76] add w1, w0, 1 str w1, [sp, 76] sxtw x0, w0 ldr x1, [sp, 104] add x0, x1, x0 mov w1, 32 strb w1, [x0] b .L22 .L21: ldr w0, [sp, 60] sub w0, w0, #1 mov w1, w0 ldr w0, [sp, 72] cmp w0, w1 bne .L22 ldr w0, [sp, 76] add w1, w0, 1 str w1, [sp, 76] sxtw x0, w0 ldr x1, [sp, 104] add x0, x1, x0 strb wzr, [x0] .L22: ldr w0, [sp, 72] add w0, w0, 1 str w0, [sp, 72] .L17: ldr w0, [sp, 60] ldr w1, [sp, 72] cmp w1, w0 bcs .L23 ldr w0, [sp, 76] ldr w1, [sp, 68] cmp w1, w0 bhi .L24 .L23: ldr x0, [sp, 104] bl system asr w0, w0, 8 and w0, w0, 255 str w0, [sp, 100] ldr x0, [sp, 104] bl free ldr w0, [sp, 100] b .L6 .L12: ldr w0, [sp, 60] cmp w0, 2 ble .L25 ldr x0, [sp, 48] add x0, x0, 8 ldr x2, [x0] adrp x0, .LC7 add x1, x0, :lo12:.LC7 mov x0, x2 bl strcmp cmp w0, 0 bne .L25 ldr x0, [sp, 48] add x0, x0, 16 ldr x2, [x0] ldr x0, [sp, 48] add x0, x0, 16 mov x1, x0 mov x0, x2 bl execvp str w0, [sp, 92] adrp x0, :got:stderr ldr x0, [x0, #:got_lo12:stderr] ldr x19, [x0] ldr x0, [sp, 48] ldr x20, [x0] ldr x0, [sp, 48] add x0, x0, 16 ldr x21, [x0] bl __errno_location ldr w0, [x0] bl strerror mov x4, x0 mov x3, x21 mov x2, x20 adrp x0, .LC8 add x1, x0, :lo12:.LC8 mov x0, x19 bl fprintf ldr w0, [sp, 92] b .L6 .L25: adrp x0, :got:stderr ldr x0, [x0, #:got_lo12:stderr] ldr x3, [x0] ldr x0, [sp, 48] ldr x0, [x0] mov x2, x0 adrp x0, .LC9 add x1, x0, :lo12:.LC9 mov x0, x3 bl fprintf adrp x0, :got:stderr ldr x0, [x0, #:got_lo12:stderr] ldr x3, [x0] ldr x0, [sp, 48] ldr x0, [x0] mov x2, x0 adrp x0, .LC10 add x1, x0, :lo12:.LC10 mov x0, x3 bl fprintf mov w0, 1 .L6: ldp x19, x20, [sp, 16] ldr x21, [sp, 32] ldp x29, x30, [sp], 112 .cfi_restore 30 .cfi_restore 29 .cfi_restore 21 .cfi_restore 19 .cfi_restore 20 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE0: .size main, .-main ```
### Human: Write a random program in ARM assembly### Assistant: ``` .text .align 2 .global createTree .type createTree, %function createTree: .LFB6: .cfi_startproc stp x29, x30, [sp, -64]! .cfi_def_cfa_offset 64 .cfi_offset 29, -64 .cfi_offset 30, -56 mov x29, sp str x0, [sp, 40] str x1, [sp, 32] str x2, [sp, 24] ldr x0, [sp, 24] ldr w0, [x0] sxtw x0, w0 ldr x1, [sp, 32] add x0, x1, x0 ldrb w0, [x0] strb w0, [sp, 63] ldr x0, [sp, 24] ldr w0, [x0] add w1, w0, 1 ldr x0, [sp, 24] str w1, [x0] ldrb w0, [sp, 63] cmp w0, 35 bne .L2 ldr x0, [sp, 40] str xzr, [x0] b .L4 .L2: mov x0, 32 bl malloc mov x1, x0 ldr x0, [sp, 40] str x1, [x0] ldr x0, [sp, 40] ldr x0, [x0] ldrb w1, [sp, 63] strb w1, [x0] ldr x0, [sp, 40] ldr x0, [x0] str wzr, [x0, 24] ldr x0, [sp, 40] ldr x0, [x0] str wzr, [x0, 28] ldr x0, [sp, 40] ldr x0, [x0] add x0, x0, 8 ldr x2, [sp, 24] ldr x1, [sp, 32] bl createTree ldr x0, [sp, 40] ldr x0, [x0] add x0, x0, 16 ldr x2, [sp, 24] ldr x1, [sp, 32] bl createTree .L4: nop ldp x29, x30, [sp], 64 .cfi_restore 30 .cfi_restore 29 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE6: .size createTree, .-createTree .align 2 .global inThreadTree .type inThreadTree, %function inThreadTree: .LFB7: .cfi_startproc stp x29, x30, [sp, -32]! .cfi_def_cfa_offset 32 .cfi_offset 29, -32 .cfi_offset 30, -24 mov x29, sp str x0, [sp, 24] str x1, [sp, 16] ldr x0, [sp, 24] cmp x0, 0 beq .L9 ldr x0, [sp, 24] ldr x0, [x0, 8] ldr x1, [sp, 16] bl inThreadTree ldr x0, [sp, 24] ldr x0, [x0, 8] cmp x0, 0 bne .L7 ldr x0, [sp, 24] mov w1, 1 str w1, [x0, 24] ldr x0, [sp, 16] ldr x1, [x0] ldr x0, [sp, 24] str x1, [x0, 8] .L7: ldr x0, [sp, 16] ldr x0, [x0] cmp x0, 0 beq .L8 ldr x0, [sp, 16] ldr x0, [x0] ldr x0, [x0, 16] cmp x0, 0 bne .L8 ldr x0, [sp, 16] ldr x0, [x0] mov w1, 1 str w1, [x0, 28] ldr x0, [sp, 16] ldr x0, [x0] ldr x1, [sp, 24] str x1, [x0, 16] .L8: ldr x0, [sp, 16] ldr x1, [sp, 24] str x1, [x0] ldr x0, [sp, 24] ldr x0, [x0, 16] ldr x1, [sp, 16] bl inThreadTree .L9: nop ldp x29, x30, [sp], 32 .cfi_restore 30 .cfi_restore 29 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE7: .size inThreadTree, .-inThreadTree .align 2 .global getFirst .type getFirst, %function getFirst: .LFB8: .cfi_startproc sub sp, sp, #16 .cfi_def_cfa_offset 16 str x0, [sp, 8] b .L11 .L12: ldr x0, [sp, 8] ldr x0, [x0, 8] str x0, [sp, 8] .L11: ldr x0, [sp, 8] ldr w0, [x0, 24] cmp w0, 0 beq .L12 ldr x0, [sp, 8] add sp, sp, 16 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE8: .size getFirst, .-getFirst .align 2 .global getNext .type getNext, %function getNext: .LFB9: .cfi_startproc stp x29, x30, [sp, -32]! .cfi_def_cfa_offset 32 .cfi_offset 29, -32 .cfi_offset 30, -24 mov x29, sp str x0, [sp, 24] ldr x0, [sp, 24] ldr w0, [x0, 28] cmp w0, 1 bne .L15 ldr x0, [sp, 24] ldr x0, [x0, 16] b .L16 .L15: ldr x0, [sp, 24] ldr x0, [x0, 16] bl getFirst .L16: ldp x29, x30, [sp], 32 .cfi_restore 30 .cfi_restore 29 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE9: .size getNext, .-getNext .section .rodata .align 3 .LC0: .string "%c " .text .align 2 .global main .type main, %function main: .LFB10: .cfi_startproc stp x29, x30, [sp, -80]! .cfi_def_cfa_offset 80 .cfi_offset 29, -80 .cfi_offset 30, -72 mov x29, sp str w0, [sp, 28] str x1, [sp, 16] adrp x0, :got:__stack_chk_guard ldr x0, [x0, #:got_lo12:__stack_chk_guard] ldr x1, [x0] str x1, [sp, 72] mov x1, 0 str xzr, [sp, 56] str wzr, [sp, 44] ldr x0, [sp, 16] add x0, x0, 8 ldr x1, [x0] add x2, sp, 44 add x0, sp, 48 bl createTree ldr x0, [sp, 48] add x1, sp, 56 bl inThreadTree ldr x0, [sp, 56] mov w1, 1 str w1, [x0, 28] ldr x0, [sp, 56] str xzr, [x0, 16] ldr x0, [sp, 48] bl getFirst str x0, [sp, 64] b .L18 .L19: ldr x0, [sp, 64] ldrb w0, [x0] mov w1, w0 adrp x0, .LC0 add x0, x0, :lo12:.LC0 bl printf ldr x0, [sp, 64] bl getNext str x0, [sp, 64] .L18: ldr x0, [sp, 64] cmp x0, 0 bne .L19 mov w0, 10 bl putchar mov w0, 0 mov w1, w0 adrp x0, :got:__stack_chk_guard ldr x0, [x0, #:got_lo12:__stack_chk_guard] ldr x3, [sp, 72] ldr x2, [x0] subs x3, x3, x2 mov x2, 0 beq .L21 bl __stack_chk_fail .L21: mov w0, w1 ldp x29, x30, [sp], 80 .cfi_restore 30 .cfi_restore 29 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE10: .size main, .-main ```
### Human: Write a random program in ARM assembly### Assistant: ``` .text .global shared_fd .data .align 2 .type shared_fd, %object .size shared_fd, 4 shared_fd: .word -1 .global counter .bss .align 3 .type counter, %object .size counter, 8 counter: .zero 8 .section .rodata .align 3 .LC0: .string "data.bin" .align 3 .LC1: .string "ERROR: Failed to create the file: %s\n" .align 3 .LC2: .string "File is created and opened with fd: %d\n" .text .align 2 .global init_shared_resource .type init_shared_resource, %function init_shared_resource: .LFB6: .cfi_startproc stp x29, x30, [sp, -32]! .cfi_def_cfa_offset 32 .cfi_offset 29, -32 .cfi_offset 30, -24 mov x29, sp str x19, [sp, 16] .cfi_offset 19, -16 mov w2, 384 mov w1, 66 adrp x0, .LC0 add x0, x0, :lo12:.LC0 bl open mov w1, w0 adrp x0, shared_fd add x0, x0, :lo12:shared_fd str w1, [x0] adrp x0, shared_fd add x0, x0, :lo12:shared_fd ldr w0, [x0] cmp w0, 0 bge .L2 adrp x0, :got:stderr ldr x0, [x0, #:got_lo12:stderr] ldr x19, [x0] bl __errno_location ldr w0, [x0] bl strerror mov x2, x0 adrp x0, .LC1 add x1, x0, :lo12:.LC1 mov x0, x19 bl fprintf mov w0, 1 bl exit .L2: adrp x0, :got:stdout ldr x0, [x0, #:got_lo12:stdout] ldr x3, [x0] adrp x0, shared_fd add x0, x0, :lo12:shared_fd ldr w0, [x0] mov w2, w0 adrp x0, .LC2 add x1, x0, :lo12:.LC2 mov x0, x3 bl fprintf nop ldr x19, [sp, 16] ldp x29, x30, [sp], 32 .cfi_restore 30 .cfi_restore 29 .cfi_restore 19 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE6: .size init_shared_resource, .-init_shared_resource .section .rodata .align 3 .LC3: .string "ERROR: Removing the file failed: %s\n" .text .align 2 .global shutdown_shared_resource .type shutdown_shared_resource, %function shutdown_shared_resource: .LFB7: .cfi_startproc stp x29, x30, [sp, -32]! .cfi_def_cfa_offset 32 .cfi_offset 29, -32 .cfi_offset 30, -24 mov x29, sp str x19, [sp, 16] .cfi_offset 19, -16 adrp x0, .LC0 add x0, x0, :lo12:.LC0 bl remove cmp w0, 0 bge .L5 adrp x0, :got:stderr ldr x0, [x0, #:got_lo12:stderr] ldr x19, [x0] bl __errno_location ldr w0, [x0] bl strerror mov x2, x0 adrp x0, .LC3 add x1, x0, :lo12:.LC3 mov x0, x19 bl fprintf mov w0, 1 bl exit .L5: nop ldr x19, [sp, 16] ldp x29, x30, [sp], 32 .cfi_restore 30 .cfi_restore 29 .cfi_restore 19 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE7: .size shutdown_shared_resource, .-shutdown_shared_resource .align 2 .global inc_counter .type inc_counter, %function inc_counter: .LFB8: .cfi_startproc stp x29, x30, [sp, -32]! .cfi_def_cfa_offset 32 .cfi_offset 29, -32 .cfi_offset 30, -24 mov x29, sp mov w0, 1 bl usleep adrp x0, counter add x0, x0, :lo12:counter ldr x0, [x0] ldr w0, [x0] str w0, [sp, 28] mov w0, 1 bl usleep ldr w0, [sp, 28] add w0, w0, 1 str w0, [sp, 28] mov w0, 1 bl usleep adrp x0, counter add x0, x0, :lo12:counter ldr x0, [x0] ldr w1, [sp, 28] str w1, [x0] mov w0, 1 bl usleep nop ldp x29, x30, [sp], 32 .cfi_restore 30 .cfi_restore 29 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE8: .size inc_counter, .-inc_counter .section .rodata .align 3 .LC4: .string "ERROR: Truncation failed: %s\n" .align 3 .LC5: .string "The memory region is truncated.\n" .align 3 .LC6: .string "ERROR: Mapping failed: %s\n" .align 3 .LC7: .string "The parent process sees the counter as %d.\n" .align 3 .LC8: .string "The child process finished with status %d.\n" .align 3 .LC9: .string "The child process sees the counter as %d.\n" .align 3 .LC10: .string "ERROR: Unmapping failed: %s\n" .align 3 .LC11: .string "ERROR: Closing fd filed: %s\n" .text .align 2 .global main .type main, %function main: .LFB9: .cfi_startproc stp x29, x30, [sp, -80]! .cfi_def_cfa_offset 80 .cfi_offset 29, -80 .cfi_offset 30, -72 mov x29, sp str x19, [sp, 16] .cfi_offset 19, -64 str w0, [sp, 44] str x1, [sp, 32] adrp x0, :got:__stack_chk_guard ldr x0, [x0, #:got_lo12:__stack_chk_guard] ldr x1, [x0] str x1, [sp, 72] mov x1, 0 bl init_shared_resource adrp x0, shared_fd add x0, x0, :lo12:shared_fd ldr w0, [x0] mov x1, 4 bl ftruncate cmp w0, 0 bge .L8 adrp x0, :got:stderr ldr x0, [x0, #:got_lo12:stderr] ldr x19, [x0] bl __errno_location ldr w0, [x0] bl strerror mov x2, x0 adrp x0, .LC4 add x1, x0, :lo12:.LC4 mov x0, x19 bl fprintf mov w0, 1 b .L9 .L8: adrp x0, :got:stdout ldr x0, [x0, #:got_lo12:stdout] ldr x0, [x0] mov x3, x0 mov x2, 32 mov x1, 1 adrp x0, .LC5 add x0, x0, :lo12:.LC5 bl fwrite adrp x0, shared_fd add x0, x0, :lo12:shared_fd ldr w0, [x0] mov x5, 0 mov w4, w0 mov w3, 1 mov w2, 2 mov x1, 4 mov x0, 0 bl mmap str x0, [sp, 64] ldr x0, [sp, 64] cmn x0, #1 bne .L10 adrp x0, :got:stderr ldr x0, [x0, #:got_lo12:stderr] ldr x19, [x0] bl __errno_location ldr w0, [x0] bl strerror mov x2, x0 adrp x0, .LC6 add x1, x0, :lo12:.LC6 mov x0, x19 bl fprintf mov w0, 1 b .L9 .L10: adrp x0, counter add x0, x0, :lo12:counter ldr x1, [sp, 64] str x1, [x0] adrp x0, counter add x0, x0, :lo12:counter ldr x0, [x0] str wzr, [x0] bl fork str w0, [sp, 60] ldr w0, [sp, 60] cmp w0, 0 beq .L11 bl inc_counter adrp x0, :got:stdout ldr x0, [x0, #:got_lo12:stdout] ldr x3, [x0] adrp x0, counter add x0, x0, :lo12:counter ldr x0, [x0] ldr w0, [x0] mov w2, w0 adrp x0, .LC7 add x1, x0, :lo12:.LC7 mov x0, x3 bl fprintf mov w0, -1 str w0, [sp, 56] add x0, sp, 56 bl wait adrp x0, :got:stdout ldr x0, [x0, #:got_lo12:stdout] ldr x3, [x0] ldr w0, [sp, 56] mov w2, w0 adrp x0, .LC8 add x1, x0, :lo12:.LC8 mov x0, x3 bl fprintf b .L12 .L11: bl inc_counter adrp x0, :got:stdout ldr x0, [x0, #:got_lo12:stdout] ldr x3, [x0] adrp x0, counter add x0, x0, :lo12:counter ldr x0, [x0] ldr w0, [x0] mov w2, w0 adrp x0, .LC9 add x1, x0, :lo12:.LC9 mov x0, x3 bl fprintf .L12: adrp x0, counter add x0, x0, :lo12:counter ldr x0, [x0] mov x1, 4 bl munmap cmp w0, 0 bge .L13 adrp x0, :got:stderr ldr x0, [x0, #:got_lo12:stderr] ldr x19, [x0] bl __errno_location ldr w0, [x0] bl strerror mov x2, x0 adrp x0, .LC10 add x1, x0, :lo12:.LC10 mov x0, x19 bl fprintf mov w0, 1 b .L9 .L13: adrp x0, shared_fd add x0, x0, :lo12:shared_fd ldr w0, [x0] bl close cmp w0, 0 bge .L14 adrp x0, :got:stderr ldr x0, [x0, #:got_lo12:stderr] ldr x19, [x0] bl __errno_location ldr w0, [x0] bl strerror mov x2, x0 adrp x0, .LC11 add x1, x0, :lo12:.LC11 mov x0, x19 bl fprintf mov w0, 1 b .L9 .L14: ldr w0, [sp, 60] cmp w0, 0 beq .L15 bl shutdown_shared_resource .L15: mov w0, 0 .L9: mov w1, w0 adrp x0, :got:__stack_chk_guard ldr x0, [x0, #:got_lo12:__stack_chk_guard] ldr x3, [sp, 72] ldr x2, [x0] subs x3, x3, x2 mov x2, 0 beq .L16 bl __stack_chk_fail .L16: mov w0, w1 ldr x19, [sp, 16] ldp x29, x30, [sp], 80 .cfi_restore 30 .cfi_restore 29 .cfi_restore 19 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE9: .size main, .-main ```
### Human: Write a random program in ARM assembly### Assistant: ``` .text .align 2 .type foo, %function foo: .LFB0: .cfi_startproc mov w0, 0 ret .cfi_endproc .LFE0: .size foo, .-foo .align 2 .global main .type main, %function main: .LFB3: .cfi_startproc stp x29, x30, [sp, -16]! .cfi_def_cfa_offset 16 .cfi_offset 29, -16 .cfi_offset 30, -8 mov x29, sp bl foo ldp x29, x30, [sp], 16 .cfi_restore 30 .cfi_restore 29 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE3: .size main, .-main ```
### Human: Write a random program in ARM assembly### Assistant: ``` .text .section .rodata .align 3 .LC0: .string "Digite a equacao" .align 3 .LC1: .string "+\n%d\n" .align 3 .LC2: .string "-\n%d\n" .align 3 .LC3: .string "*\n%d\n" .align 3 .LC4: .string "/\n%d\n" .text .align 2 .global main .type main, %function main: .LFB6: .cfi_startproc stp x29, x30, [sp, -80]! .cfi_def_cfa_offset 80 .cfi_offset 29, -80 .cfi_offset 30, -72 mov x29, sp str x19, [sp, 16] .cfi_offset 19, -64 adrp x0, :got:__stack_chk_guard ldr x0, [x0, #:got_lo12:__stack_chk_guard] ldr x1, [x0] str x1, [sp, 72] mov x1, 0 str xzr, [sp, 48] str xzr, [sp, 64] str wzr, [sp, 44] mov x0, 1 bl malloc str x0, [sp, 64] adrp x0, .LC0 add x0, x0, :lo12:.LC0 bl puts b .L2 .L4: ldr x0, [sp, 64] bl strlen add x0, x0, 1 mov x1, x0 ldr x0, [sp, 64] bl realloc str x0, [sp, 64] ldrsw x0, [sp, 44] ldr x1, [sp, 64] add x0, x1, x0 ldrb w1, [sp, 42] strb w1, [x0] ldr w0, [sp, 44] add w0, w0, 1 str w0, [sp, 44] .L2: bl getchar strb w0, [sp, 42] ldrb w0, [sp, 42] cmp w0, 10 beq .L3 ldrb w0, [sp, 42] cmp w0, 0 bne .L4 .L3: ldrsw x0, [sp, 44] ldr x1, [sp, 64] add x0, x1, x0 strb wzr, [x0] ldr x0, [sp, 64] str x0, [sp, 56] b .L5 .L11: ldr x0, [sp, 56] ldrb w0, [x0] cmp w0, 47 beq .L6 cmp w0, 47 bgt .L7 cmp w0, 45 beq .L8 cmp w0, 45 bgt .L7 cmp w0, 42 beq .L9 cmp w0, 43 bne .L7 add x0, sp, 48 bl pop and w19, w0, 255 add x0, sp, 48 bl pop and w0, w0, 255 add w0, w19, w0 strb w0, [sp, 43] ldrb w0, [sp, 43] mov w1, w0 adrp x0, .LC1 add x0, x0, :lo12:.LC1 bl printf ldrb w1, [sp, 43] add x0, sp, 48 bl push b .L10 .L8: add x0, sp, 48 bl pop and w19, w0, 255 add x0, sp, 48 bl pop and w0, w0, 255 sub w0, w19, w0 strb w0, [sp, 43] ldrb w0, [sp, 43] mov w1, w0 adrp x0, .LC2 add x0, x0, :lo12:.LC2 bl printf ldrb w1, [sp, 43] add x0, sp, 48 bl push b .L10 .L9: add x0, sp, 48 bl pop and w19, w0, 255 add x0, sp, 48 bl pop and w0, w0, 255 mul w0, w19, w0 strb w0, [sp, 43] ldrb w0, [sp, 43] mov w1, w0 adrp x0, .LC3 add x0, x0, :lo12:.LC3 bl printf ldrb w1, [sp, 43] add x0, sp, 48 bl push b .L10 .L6: add x0, sp, 48 bl pop mov w19, w0 add x0, sp, 48 bl pop sdiv w0, w19, w0 strb w0, [sp, 43] ldrb w0, [sp, 43] mov w1, w0 adrp x0, .LC4 add x0, x0, :lo12:.LC4 bl printf ldrb w1, [sp, 43] add x0, sp, 48 bl push b .L10 .L7: ldr x0, [sp, 56] ldrb w0, [x0] sub w1, w0, #48 add x0, sp, 48 bl push .L10: ldr x0, [sp, 48] bl disp ldr x0, [sp, 56] add x0, x0, 1 str x0, [sp, 56] .L5: ldr x0, [sp, 56] ldrb w0, [x0] cmp w0, 0 bne .L11 mov w0, 10 bl putchar mov w0, 0 mov w1, w0 adrp x0, :got:__stack_chk_guard ldr x0, [x0, #:got_lo12:__stack_chk_guard] ldr x3, [sp, 72] ldr x2, [x0] subs x3, x3, x2 mov x2, 0 beq .L13 bl __stack_chk_fail .L13: mov w0, w1 ldr x19, [sp, 16] ldp x29, x30, [sp], 80 .cfi_restore 30 .cfi_restore 29 .cfi_restore 19 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE6: .size main, .-main .section .rodata .align 3 .LC5: .string "%d " .text .align 2 .global disp .type disp, %function disp: .LFB7: .cfi_startproc stp x29, x30, [sp, -48]! .cfi_def_cfa_offset 48 .cfi_offset 29, -48 .cfi_offset 30, -40 mov x29, sp str x0, [sp, 24] ldr x0, [sp, 24] str x0, [sp, 40] b .L15 .L16: ldr x0, [sp, 40] ldr w0, [x0] mov w1, w0 adrp x0, .LC5 add x0, x0, :lo12:.LC5 bl printf ldr x0, [sp, 40] ldr x0, [x0, 8] str x0, [sp, 40] .L15: ldr x0, [sp, 40] cmp x0, 0 bne .L16 mov w0, 10 bl putchar nop ldp x29, x30, [sp], 48 .cfi_restore 30 .cfi_restore 29 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE7: .size disp, .-disp .align 2 .global push .type push, %function push: .LFB8: .cfi_startproc stp x29, x30, [sp, -48]! .cfi_def_cfa_offset 48 .cfi_offset 29, -48 .cfi_offset 30, -40 mov x29, sp str x0, [sp, 24] str w1, [sp, 20] ldr x0, [sp, 24] ldr x0, [x0] str x0, [sp, 32] str xzr, [sp, 40] b .L18 .L19: ldr x0, [sp, 32] str x0, [sp, 40] ldr x0, [sp, 32] ldr x0, [x0, 8] str x0, [sp, 32] .L18: ldr x0, [sp, 32] cmp x0, 0 bne .L19 mov x0, 16 bl malloc str x0, [sp, 32] ldr x0, [sp, 32] ldr w1, [sp, 20] str w1, [x0] ldr x0, [sp, 32] str xzr, [x0, 8] ldr x0, [sp, 40] cmp x0, 0 beq .L20 ldr x0, [sp, 40] ldr x1, [sp, 32] str x1, [x0, 8] b .L22 .L20: ldr x0, [sp, 24] ldr x1, [sp, 32] str x1, [x0] .L22: nop ldp x29, x30, [sp], 48 .cfi_restore 30 .cfi_restore 29 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE8: .size push, .-push .align 2 .global pop .type pop, %function pop: .LFB9: .cfi_startproc stp x29, x30, [sp, -64]! .cfi_def_cfa_offset 64 .cfi_offset 29, -64 .cfi_offset 30, -56 mov x29, sp str x0, [sp, 24] ldr x0, [sp, 24] ldr x0, [x0] str x0, [sp, 48] str xzr, [sp, 56] b .L24 .L25: ldr x0, [sp, 48] str x0, [sp, 56] ldr x0, [sp, 48] ldr x0, [x0, 8] str x0, [sp, 48] .L24: ldr x0, [sp, 48] ldr x0, [x0, 8] cmp x0, 0 bne .L25 ldr x0, [sp, 56] cmp x0, 0 beq .L26 ldr x0, [sp, 56] str xzr, [x0, 8] b .L27 .L26: ldr x0, [sp, 24] str xzr, [x0] .L27: ldr x0, [sp, 48] ldr w0, [x0] str w0, [sp, 44] ldr x0, [sp, 48] bl free ldr w0, [sp, 44] ldp x29, x30, [sp], 64 .cfi_restore 30 .cfi_restore 29 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE9: .size pop, .-pop ```
### Human: Write a random program in ARM assembly### Assistant: ``` .text .section .rodata .align 3 .LC0: .string "Enter range" .align 3 .LC1: .string "%d" .align 3 .LC2: .string "Armstrong number = %d\n" .text .align 2 .global main .type main, %function main: .LFB6: .cfi_startproc stp x29, x30, [sp, -64]! .cfi_def_cfa_offset 64 .cfi_offset 29, -64 .cfi_offset 30, -56 mov x29, sp adrp x0, :got:__stack_chk_guard ldr x0, [x0, #:got_lo12:__stack_chk_guard] ldr x1, [x0] str x1, [sp, 56] mov x1, 0 adrp x0, .LC0 add x0, x0, :lo12:.LC0 bl puts add x0, sp, 28 mov x1, x0 adrp x0, .LC1 add x0, x0, :lo12:.LC1 bl __isoc99_scanf mov w0, 1 str w0, [sp, 40] b .L2 .L8: bl vfork str w0, [sp, 36] str wzr, [sp, 44] ldr w0, [sp, 40] str w0, [sp, 48] ldr w0, [sp, 36] cmp w0, 0 bne .L4 b .L5 .L6: ldr w1, [sp, 48] mov w0, 26215 movk w0, 0x6666, lsl 16 smull x0, w1, w0 lsr x0, x0, 32 asr w2, w0, 2 asr w0, w1, 31 sub w2, w2, w0 mov w0, w2 lsl w0, w0, 2 add w0, w0, w2 lsl w0, w0, 1 sub w0, w1, w0 str w0, [sp, 52] ldr w0, [sp, 52] mul w1, w0, w0 ldr w0, [sp, 52] mul w0, w1, w0 ldr w1, [sp, 44] add w0, w1, w0 str w0, [sp, 44] ldr w0, [sp, 48] mov w1, 26215 movk w1, 0x6666, lsl 16 smull x1, w0, w1 lsr x1, x1, 32 asr w1, w1, 2 asr w0, w0, 31 sub w0, w1, w0 str w0, [sp, 48] .L5: ldr w0, [sp, 48] cmp w0, 0 bne .L6 mov w0, 1 str w0, [sp, 36] .L4: ldr w0, [sp, 36] cmp w0, 0 ble .L7 add x0, sp, 32 mov w2, 0 mov x1, x0 ldr w0, [sp, 36] bl waitpid str w0, [sp, 36] ldr w1, [sp, 44] ldr w0, [sp, 40] cmp w1, w0 bne .L7 ldr w1, [sp, 40] adrp x0, .LC2 add x0, x0, :lo12:.LC2 bl printf .L7: ldr w0, [sp, 40] add w0, w0, 1 str w0, [sp, 40] .L2: ldr w0, [sp, 28] ldr w1, [sp, 40] cmp w1, w0 ble .L8 mov w0, 0 bl exit .cfi_endproc .LFE6: .size main, .-main ```
### Human: Write a random program in ARM assembly### Assistant: ``` .text .align 2 .global main .type main, %function main: .LFB6: .cfi_startproc stp x29, x30, [sp, -96]! .cfi_def_cfa_offset 96 .cfi_offset 29, -96 .cfi_offset 30, -88 mov x29, sp adrp x0, :got:__stack_chk_guard ldr x0, [x0, #:got_lo12:__stack_chk_guard] ldr x1, [x0] str x1, [sp, 88] mov x1, 0 adrp x0, .LC0 add x1, x0, :lo12:.LC0 add x0, sp, 24 ldp q0, q1, [x1] stp q0, q1, [x0] adrp x0, .LC1 add x1, x0, :lo12:.LC1 add x0, sp, 56 ldp q0, q1, [x1] stp q0, q1, [x0] str wzr, [sp, 16] b .L2 .L5: ldr w0, [sp, 16] lsl x0, x0, 1 add x1, sp, 24 ldrh w0, [x1, x0] str w0, [sp, 20] ldr w0, [sp, 20] cmp w0, 41 bls .L3 ldr w0, [sp, 20] sub w0, w0, #42 and w2, w0, 65535 b .L4 .L3: mov w2, 0 .L4: ldr w0, [sp, 16] lsl x0, x0, 1 add x1, sp, 24 strh w2, [x1, x0] ldr w0, [sp, 16] add w0, w0, 1 str w0, [sp, 16] .L2: ldr w0, [sp, 16] cmp w0, 15 bls .L5 str wzr, [sp, 16] b .L6 .L8: ldr w0, [sp, 16] lsl x0, x0, 1 add x1, sp, 24 ldrh w1, [x1, x0] ldr w0, [sp, 16] lsl x0, x0, 1 add x2, sp, 56 ldrh w0, [x2, x0] cmp w1, w0 beq .L7 bl abort .L7: ldr w0, [sp, 16] add w0, w0, 1 str w0, [sp, 16] .L6: ldr w0, [sp, 16] cmp w0, 15 bls .L8 mov w0, 0 mov w1, w0 adrp x0, :got:__stack_chk_guard ldr x0, [x0, #:got_lo12:__stack_chk_guard] ldr x3, [sp, 88] ldr x2, [x0] subs x3, x3, x2 mov x2, 0 beq .L10 bl __stack_chk_fail .L10: mov w0, w1 ldp x29, x30, [sp], 96 .cfi_restore 30 .cfi_restore 29 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE6: .size main, .-main .section .rodata .align 3 .LC0: .hword 36 .hword 39 .hword 42 .hword 45 .hword 43 .hword 32 .hword 21 .hword 12 .hword 23 .hword 34 .hword 45 .hword 56 .hword 67 .hword 78 .hword 89 .hword 11 .align 3 .LC1: .hword 0 .hword 0 .hword 0 .hword 3 .hword 1 .hword 0 .hword 0 .hword 0 .hword 0 .hword 0 .hword 3 .hword 14 .hword 25 .hword 36 .hword 47 .hword 0 .text ```
### Human: Write a random program in ARM assembly### Assistant: ``` .text .align 2 .global tss_create .type tss_create, %function tss_create: .LFB0: .cfi_startproc stp x29, x30, [sp, -32]! .cfi_def_cfa_offset 32 .cfi_offset 29, -32 .cfi_offset 30, -24 mov x29, sp str x0, [sp, 24] str x1, [sp, 16] ldr x1, [sp, 16] ldr x0, [sp, 24] bl pthread_key_create cmp w0, 0 bne .L2 mov w0, 0 b .L3 .L2: mov w0, 2 .L3: ldp x29, x30, [sp], 32 .cfi_restore 30 .cfi_restore 29 .cfi_def_cfa_offset 0 ret .cfi_endproc .LFE0: .size tss_create, .-tss_create ```
### Human: Write a random program in ARM assembly### Assistant: ``` .text .section .rodata .align 3 .LC0: .string "Usage: tcreate file mode\n" .align 3 .LC1: .string "creat" .align 3 .LC2: .string "stat" .align 3 .LC3: .string "mode %.4o\n" .align 3 .LC4: .string "mode %.4o != %.4o\n" .text .align 2 .global main .type main, %function main: .LFB6: .cfi_startproc stp x29, x30, [sp, -176]! .cfi_def_cfa_offset 176 .cfi_offset 29, -176 .cfi_offset 30, -168 mov x29, sp str w0, [sp, 28] str x1, [sp, 16] adrp x0, :got:__stack_chk_guard ldr x0, [x0, #:got_lo12:__stack_chk_guard] ldr x1, [x0] str x1, [sp, 168] mov x1, 0 mov w0, 0 bl umask ldr w0, [sp, 28] cmp w0, 3 beq .L2 adrp x0, :got:stderr ldr x0, [x0, #:got_lo12:stderr] ldr x0, [x0] mov x3, x0 mov x2, 25 mov x1, 1 adrp x0, .LC0 add x0, x0, :lo12:.LC0 bl fwrite mov w0, 1 bl exit .L2: ldr x0, [sp, 16] add x0, x0, 16 ldr x0, [x0] mov w2, 0 mov x1, 0 bl strtoul str w0, [sp, 32] ldr x0, [sp, 16] add x0, x0, 8 ldr x0, [x0] ldr w1, [sp, 32] bl creat cmp w0, 0 bge .L3 adrp x0, .LC1 add x0, x0, :lo12:.LC1 bl perror mov w0, 1 bl exit .L3: ldr x0, [sp, 16] add x0, x0, 8 ldr x0, [x0] add x1, sp, 40 bl stat cmp w0, 0 bge .L4 adrp x0, .LC2 add x0, x0, :lo12:.LC2 bl perror mov w0, 1 bl exit .L4: ldr w0, [sp, 56] and w0, w0, 511 str w0, [sp, 36] ldr w1, [sp, 36] ldr w0, [sp, 32] cmp w1, w0 bne .L5 adrp x0, :got:stderr ldr x0, [x0, #:got_lo12:stderr] ldr x3, [x0] ldr w2, [sp, 36] adrp x0, .LC3 add x1, x0, :lo12:.LC3 mov x0, x3 bl fprintf b .L6 .L5: adrp x0, :got:stderr ldr x0, [x0, #:got_lo12:stderr] ldr x4, [x0] ldr w3, [sp, 32] ldr w2, [sp, 36] adrp x0, .LC4 add x1, x0, :lo12:.LC4 mov x0, x4 bl fprintf .L6: mov w0, 0 bl exit .cfi_endproc .LFE6: .size main, .-main ```