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### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC0:
.string "NRIF_BILEVEL"
.align 3
.LC1:
.string "NRIF_BILEVEL_RLE"
.align 3
.LC2:
.string "NRIF_INDEXED"
.align 3
.LC3:
.string "NRIF_INDEXED_RLE"
.align 3
.LC4:
.string "NRIF_DIRECT"
.align 3
.LC5:
.string "NRIF_DIRECT_RLE"
.align 3
.LC6:
.string "NRIF_DIRECT_SEG"
.align 3
.LC7:
.string "NRIF_DIRECT_SEG_RLE"
.section .data.rel.local,"aw"
.align 3
.type nrif_types, %object
.size nrif_types, 64
nrif_types:
.xword .LC0
.xword .LC1
.xword .LC2
.xword .LC3
.xword .LC4
.xword .LC5
.xword .LC6
.xword .LC7
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC0:
.string "Enter some text :"
.align 3
.LC1:
.string " "
.align 3
.LC2:
.string "Token = %s\n"
.align 3
.LC3:
.string "Array %d is %s\n"
.text
.align 2
.global main
.type main, %function
main:
.LFB6:
.cfi_startproc
sub sp, sp, #768
.cfi_def_cfa_offset 768
stp x29, x30, [sp]
.cfi_offset 29, -768
.cfi_offset 30, -760
mov x29, sp
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 760]
mov x1, 0
str wzr, [sp, 24]
mov w0, 80
str w0, [sp, 28]
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl puts
adrp x0, :got:stdin
ldr x0, [x0, #:got_lo12:stdin]
ldr x1, [x0]
add x0, sp, 680
mov x2, x1
ldr w1, [sp, 28]
bl fgets
add x2, sp, 680
adrp x0, .LC1
add x1, x0, :lo12:.LC1
mov x0, x2
bl strtok
str x0, [sp, 32]
b .L2
.L3:
ldr x1, [sp, 32]
adrp x0, .LC2
add x0, x0, :lo12:.LC2
bl printf
ldrsw x0, [sp, 24]
lsl x0, x0, 3
add x1, sp, 40
ldr x2, [sp, 32]
str x2, [x1, x0]
adrp x0, .LC1
add x1, x0, :lo12:.LC1
mov x0, 0
bl strtok
str x0, [sp, 32]
ldrsw x0, [sp, 24]
lsl x0, x0, 3
add x1, sp, 40
ldr x0, [x1, x0]
mov x2, x0
ldr w1, [sp, 24]
adrp x0, .LC3
add x0, x0, :lo12:.LC3
bl printf
ldr w0, [sp, 24]
add w0, w0, 1
str w0, [sp, 24]
.L2:
ldr x0, [sp, 32]
cmp x0, 0
bne .L3
mov w0, 0
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 760]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L5
bl __stack_chk_fail
.L5:
mov w0, w1
ldp x29, x30, [sp]
add sp, sp, 768
.cfi_restore 29
.cfi_restore 30
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE6:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.global tmp2
.bss
.align 3
.type tmp2, %object
.size tmp2, 194672
tmp2:
.zero 194672
.text
.align 2
.global main1
.type main1, %function
main1:
.LFB0:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str wzr, [sp, 8]
b .L2
.L5:
str wzr, [sp, 12]
b .L3
.L4:
adrp x0, tmp2
add x2, x0, :lo12:tmp2
ldrsw x3, [sp, 12]
ldrsw x1, [sp, 8]
mov x0, x1
lsl x0, x0, 1
add x0, x0, x1
lsl x0, x0, 3
sub x0, x0, x1
add x1, x0, x3
mov x0, 24863
add x0, x1, x0
mov w1, 8
str w1, [x2, x0, lsl 2]
ldr w0, [sp, 12]
add w0, w0, 1
str w0, [sp, 12]
.L3:
ldr w0, [sp, 12]
cmp w0, 19
ble .L4
ldr w0, [sp, 8]
add w0, w0, 1
str w0, [sp, 8]
.L2:
ldr w0, [sp, 8]
cmp w0, 19
ble .L5
nop
nop
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size main1, .-main1
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global calc
.type calc, %function
calc:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str w0, [sp, 28]
str w1, [sp, 24]
str w2, [sp, 20]
ldr w0, [sp, 24]
cmp w0, 0
bgt .L2
mov w0, 0
b .L3
.L2:
ldr w0, [sp, 28]
cmp w0, 1
bne .L4
ldr w1, [sp, 24]
ldr w0, [sp, 20]
cmp w1, w0
cset w0, ge
and w0, w0, 255
b .L3
.L4:
str wzr, [sp, 44]
ldr w0, [sp, 20]
str w0, [sp, 40]
b .L5
.L6:
ldr w0, [sp, 28]
sub w3, w0, #1
ldr w1, [sp, 24]
ldr w0, [sp, 40]
sub w0, w1, w0
ldr w2, [sp, 40]
mov w1, w0
mov w0, w3
bl calc
mov w1, w0
ldr w0, [sp, 44]
add w0, w0, w1
str w0, [sp, 44]
ldr w0, [sp, 40]
add w0, w0, 1
str w0, [sp, 40]
.L5:
ldr w1, [sp, 40]
ldr w0, [sp, 24]
cmp w1, w0
ble .L6
ldr w0, [sp, 44]
.L3:
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size calc, .-calc
.section .rodata
.align 3
.LC0:
.string "%d"
.align 3
.LC1:
.string "%d%d"
.align 3
.LC2:
.string "%d\n"
.text
.align 2
.global main
.type main, %function
main:
.LFB1:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 40]
mov x1, 0
add x0, sp, 28
mov x1, x0
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl __isoc99_scanf
b .L8
.L9:
add x1, sp, 32
add x0, sp, 36
mov x2, x1
mov x1, x0
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl __isoc99_scanf
ldr w0, [sp, 32]
ldr w1, [sp, 36]
mov w2, 0
bl calc
mov w1, w0
adrp x0, .LC2
add x0, x0, :lo12:.LC2
bl printf
.L8:
ldr w0, [sp, 28]
sub w1, w0, #1
str w1, [sp, 28]
cmp w0, 0
bne .L9
mov w0, 0
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 40]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L11
bl __stack_chk_fail
.L11:
mov w0, w1
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE1:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.global n
.bss
.align 2
.type n, %object
.size n, 4
n:
.zero 4
.text
.align 2
.global g
.type g, %function
g:
.LFB0:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str w0, [sp, 12]
adrp x0, n
add x0, x0, :lo12:n
ldr w0, [x0]
add w1, w0, 1
adrp x0, n
add x0, x0, :lo12:n
str w1, [x0]
nop
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size g, .-g
.align 2
.global f
.type f, %function
f:
.LFB1:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str w0, [sp, 28]
ldr w0, [sp, 28]
str w0, [sp, 44]
.L3:
ldr w1, [sp, 44]
mov w0, w1
lsl w0, w0, 31
sub w0, w0, w1
lsr w1, w0, 31
add w0, w1, w0
asr w0, w0, 1
bl g
ldr w0, [sp, 44]
sub w0, w0, #1
str w0, [sp, 44]
ldr w0, [sp, 44]
cmp w0, 0
bgt .L3
nop
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE1:
.size f, .-f
.align 2
.global main
.type main, %function
main:
.LFB2:
.cfi_startproc
stp x29, x30, [sp, -16]!
.cfi_def_cfa_offset 16
.cfi_offset 29, -16
.cfi_offset 30, -8
mov x29, sp
mov w0, 4
bl f
adrp x0, n
add x0, x0, :lo12:n
ldr w0, [x0]
cmp w0, 4
beq .L5
bl abort
.L5:
mov w0, 0
bl exit
.cfi_endproc
.LFE2:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global pthread_setegid_np
.type pthread_setegid_np, %function
pthread_setegid_np:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str w0, [sp, 28]
ldr w0, [sp, 28]
bl setegid
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size pthread_setegid_np, .-pthread_setegid_np
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC0:
.string "%d "
.text
.align 2
.global display
.type display, %function
display:
.LFB6:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
str wzr, [sp, 40]
b .L2
.L5:
str wzr, [sp, 44]
b .L3
.L4:
ldrsw x0, [sp, 40]
lsl x0, x0, 4
ldr x1, [sp, 24]
add x0, x1, x0
ldrsw x1, [sp, 44]
ldr w0, [x0, x1, lsl 2]
mov w1, w0
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl printf
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L3:
ldr w0, [sp, 44]
cmp w0, 3
ble .L4
mov w0, 10
bl putchar
ldr w0, [sp, 40]
add w0, w0, 1
str w0, [sp, 40]
.L2:
ldr w0, [sp, 40]
cmp w0, 3
ble .L5
nop
nop
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE6:
.size display, .-display
.align 2
.global rotate
.type rotate, %function
rotate:
.LFB7:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str x0, [sp, 8]
str x1, [sp]
str wzr, [sp, 24]
b .L7
.L10:
str wzr, [sp, 28]
b .L8
.L9:
ldrsw x0, [sp, 24]
lsl x0, x0, 4
ldr x1, [sp, 8]
add x1, x1, x0
ldrsw x0, [sp, 28]
lsl x0, x0, 4
ldr x2, [sp]
add x0, x2, x0
mov w3, 3
ldr w2, [sp, 24]
sub w3, w3, w2
ldrsw x2, [sp, 28]
ldr w2, [x1, x2, lsl 2]
sxtw x1, w3
str w2, [x0, x1, lsl 2]
ldr w0, [sp, 28]
add w0, w0, 1
str w0, [sp, 28]
.L8:
ldr w0, [sp, 28]
cmp w0, 3
ble .L9
ldr w0, [sp, 24]
add w0, w0, 1
str w0, [sp, 24]
.L7:
ldr w0, [sp, 24]
cmp w0, 3
ble .L10
nop
nop
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE7:
.size rotate, .-rotate
.align 2
.global main
.type main, %function
main:
.LFB8:
.cfi_startproc
stp x29, x30, [sp, -160]!
.cfi_def_cfa_offset 160
.cfi_offset 29, -160
.cfi_offset 30, -152
mov x29, sp
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 152]
mov x1, 0
add x0, sp, 24
movi v0.4s, 0
stp q0, q0, [x0]
stp q0, q0, [x0, 32]
mov w0, 1
str w0, [sp, 24]
mov w0, 2
str w0, [sp, 28]
mov w0, 3
str w0, [sp, 32]
mov w0, 4
str w0, [sp, 36]
mov w0, 5
str w0, [sp, 40]
mov w0, 6
str w0, [sp, 44]
mov w0, 7
str w0, [sp, 48]
mov w0, 8
str w0, [sp, 52]
mov w0, 9
str w0, [sp, 56]
mov w0, 10
str w0, [sp, 60]
mov w0, 11
str w0, [sp, 64]
mov w0, 12
str w0, [sp, 68]
add x0, sp, 24
bl display
add x1, sp, 88
add x0, sp, 24
bl rotate
mov w0, 10
bl putchar
add x0, sp, 88
bl display
nop
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [sp, 152]
ldr x1, [x0]
subs x2, x2, x1
mov x1, 0
beq .L12
bl __stack_chk_fail
.L12:
ldp x29, x30, [sp], 160
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE8:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC1:
.string "%d\t"
.text
.align 2
.global main
.type main, %function
main:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 56]
mov x1, 0
adrp x0, .LC0
add x0, x0, :lo12:.LC0
add x2, sp, 32
mov x3, x0
ldp x0, x1, [x3]
stp x0, x1, [x2]
ldr x0, [x3, 16]
str x0, [x2, 16]
add x0, sp, 32
mov w2, 5
mov w1, 0
bl mergeSort
str wzr, [sp, 28]
b .L2
.L3:
ldrsw x0, [sp, 28]
lsl x0, x0, 2
add x1, sp, 32
ldr w0, [x1, x0]
mov w1, w0
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl printf
ldr w0, [sp, 28]
add w0, w0, 1
str w0, [sp, 28]
.L2:
ldr w0, [sp, 28]
cmp w0, 5
ble .L3
mov w0, 0
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 56]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L5
bl __stack_chk_fail
.L5:
mov w0, w1
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size main, .-main
.section .rodata
.align 3
.LC0:
.word 5
.word 4
.word 3
.word 1
.word 2
.word 6
.text
.align 2
.global mergeSort
.type mergeSort, %function
mergeSort:
.LFB1:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
str w1, [sp, 20]
str w2, [sp, 16]
ldr w1, [sp, 20]
ldr w0, [sp, 16]
cmp w1, w0
bge .L8
ldr w1, [sp, 20]
ldr w0, [sp, 16]
add w0, w1, w0
lsr w1, w0, 31
add w0, w1, w0
asr w0, w0, 1
str w0, [sp, 44]
ldr w2, [sp, 44]
ldr w1, [sp, 20]
ldr x0, [sp, 24]
bl mergeSort
ldr w0, [sp, 44]
add w0, w0, 1
ldr w2, [sp, 16]
mov w1, w0
ldr x0, [sp, 24]
bl mergeSort
ldr w0, [sp, 44]
add w0, w0, 1
ldr w4, [sp, 16]
mov w3, w0
ldr w2, [sp, 44]
ldr w1, [sp, 20]
ldr x0, [sp, 24]
bl mergeSortedArray
.L8:
nop
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE1:
.size mergeSort, .-mergeSort
.align 2
.global mergeSortedArray
.type mergeSortedArray, %function
mergeSortedArray:
.LFB2:
.cfi_startproc
stp x29, x30, [sp, -96]!
.cfi_def_cfa_offset 96
.cfi_offset 29, -96
.cfi_offset 30, -88
mov x29, sp
str x0, [sp, 40]
str w1, [sp, 36]
str w2, [sp, 32]
str w3, [sp, 28]
str w4, [sp, 24]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 88]
mov x1, 0
ldr w0, [sp, 36]
str w0, [sp, 52]
ldr w0, [sp, 28]
str w0, [sp, 56]
ldr w0, [sp, 36]
str w0, [sp, 60]
b .L10
.L13:
ldrsw x0, [sp, 52]
lsl x0, x0, 2
ldr x1, [sp, 40]
add x0, x1, x0
ldr w1, [x0]
ldrsw x0, [sp, 56]
lsl x0, x0, 2
ldr x2, [sp, 40]
add x0, x2, x0
ldr w0, [x0]
cmp w1, w0
bge .L11
ldr w0, [sp, 52]
add w1, w0, 1
str w1, [sp, 52]
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 40]
add x1, x1, x0
ldr w0, [sp, 60]
add w2, w0, 1
str w2, [sp, 60]
ldr w2, [x1]
sxtw x0, w0
lsl x0, x0, 2
add x1, sp, 64
str w2, [x1, x0]
b .L10
.L11:
ldr w0, [sp, 56]
add w1, w0, 1
str w1, [sp, 56]
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 40]
add x1, x1, x0
ldr w0, [sp, 60]
add w2, w0, 1
str w2, [sp, 60]
ldr w2, [x1]
sxtw x0, w0
lsl x0, x0, 2
add x1, sp, 64
str w2, [x1, x0]
.L10:
ldr w1, [sp, 52]
ldr w0, [sp, 32]
cmp w1, w0
bgt .L12
ldr w1, [sp, 56]
ldr w0, [sp, 24]
cmp w1, w0
ble .L13
.L12:
ldr w1, [sp, 52]
ldr w0, [sp, 32]
cmp w1, w0
ble .L18
b .L15
.L16:
ldr w0, [sp, 56]
add w1, w0, 1
str w1, [sp, 56]
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 40]
add x1, x1, x0
ldr w0, [sp, 60]
add w2, w0, 1
str w2, [sp, 60]
ldr w2, [x1]
sxtw x0, w0
lsl x0, x0, 2
add x1, sp, 64
str w2, [x1, x0]
.L15:
ldr w1, [sp, 56]
ldr w0, [sp, 24]
cmp w1, w0
ble .L16
b .L17
.L19:
ldr w0, [sp, 52]
add w1, w0, 1
str w1, [sp, 52]
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 40]
add x1, x1, x0
ldr w0, [sp, 60]
add w2, w0, 1
str w2, [sp, 60]
ldr w2, [x1]
sxtw x0, w0
lsl x0, x0, 2
add x1, sp, 64
str w2, [x1, x0]
.L18:
ldr w1, [sp, 52]
ldr w0, [sp, 32]
cmp w1, w0
ble .L19
.L17:
ldr w0, [sp, 36]
str w0, [sp, 60]
b .L20
.L21:
ldrsw x0, [sp, 60]
lsl x0, x0, 2
ldr x1, [sp, 40]
add x0, x1, x0
ldrsw x1, [sp, 60]
lsl x1, x1, 2
add x2, sp, 64
ldr w1, [x2, x1]
str w1, [x0]
ldr w0, [sp, 60]
add w0, w0, 1
str w0, [sp, 60]
.L20:
ldr w1, [sp, 60]
ldr w0, [sp, 24]
cmp w1, w0
ble .L21
nop
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [sp, 88]
ldr x1, [x0]
subs x2, x2, x1
mov x1, 0
beq .L22
bl __stack_chk_fail
.L22:
ldp x29, x30, [sp], 96
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE2:
.size mergeSortedArray, .-mergeSortedArray
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.global tid
.bss
.align 3
.type tid, %object
.size tid, 16
tid:
.zero 16
.global counter
.align 2
.type counter, %object
.size counter, 4
counter:
.zero 4
.section .rodata
.align 3
.LC0:
.string "\n Job %d started\n"
.align 3
.LC1:
.string "\n Job %d finished\n"
.text
.align 2
.global doSomeThing
.type doSomeThing, %function
doSomeThing:
.LFB6:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
str xzr, [sp, 40]
adrp x0, counter
add x0, x0, :lo12:counter
ldr w0, [x0]
add w1, w0, 1
adrp x0, counter
add x0, x0, :lo12:counter
str w1, [x0]
adrp x0, counter
add x0, x0, :lo12:counter
ldr w0, [x0]
mov w1, w0
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl printf
str xzr, [sp, 40]
b .L2
.L3:
ldr x0, [sp, 40]
add x0, x0, 1
str x0, [sp, 40]
.L2:
ldr x1, [sp, 40]
mov x0, 4294967294
cmp x1, x0
bls .L3
adrp x0, counter
add x0, x0, :lo12:counter
ldr w0, [x0]
mov w1, w0
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl printf
mov x0, 0
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE6:
.size doSomeThing, .-doSomeThing
.section .rodata
.align 3
.LC2:
.string "\ncan't create thread :[%s]"
.text
.align 2
.global main
.type main, %function
main:
.LFB7:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str wzr, [sp, 24]
b .L6
.L8:
ldrsw x0, [sp, 24]
lsl x1, x0, 3
adrp x0, tid
add x0, x0, :lo12:tid
add x4, x1, x0
mov x3, 0
adrp x0, doSomeThing
add x2, x0, :lo12:doSomeThing
mov x1, 0
mov x0, x4
bl pthread_create
str w0, [sp, 28]
ldr w0, [sp, 28]
cmp w0, 0
beq .L7
ldr w0, [sp, 28]
bl strerror
mov x1, x0
adrp x0, .LC2
add x0, x0, :lo12:.LC2
bl printf
.L7:
ldr w0, [sp, 24]
add w0, w0, 1
str w0, [sp, 24]
.L6:
ldr w0, [sp, 24]
cmp w0, 1
ble .L8
adrp x0, tid
add x0, x0, :lo12:tid
ldr x0, [x0]
mov x1, 0
bl pthread_join
adrp x0, tid
add x0, x0, :lo12:tid
ldr x0, [x0, 8]
mov x1, 0
bl pthread_join
mov w0, 0
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE7:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC0:
.string "The pointer value is %d \n"
.align 3
.LC1:
.string "Memory allocation is not successful"
.text
.align 2
.global main
.type main, %function
main:
.LFB6:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
mov x0, 4
bl malloc
str x0, [sp, 24]
ldr x0, [sp, 24]
cmp x0, 0
beq .L2
ldr x0, [sp, 24]
mov w1, 200
str w1, [x0]
ldr x0, [sp, 24]
ldr w0, [x0]
mov w1, w0
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl printf
b .L3
.L2:
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl printf
.L3:
mov w0, 0
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE6:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.type __bswap_32, %function
__bswap_32:
.LFB1:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str w0, [sp, 12]
ldr w0, [sp, 12]
rev w0, w0
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE1:
.size __bswap_32, .-__bswap_32
.global r
.bss
.align 3
.type r, %object
.size r, 8
r:
.zero 8
.text
.align 2
.global loop
.type loop, %function
loop:
.LFB6:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str x19, [sp, 16]
.cfi_offset 19, -16
adrp x0, r
add x0, x0, :lo12:r
mov x1, -1
str x1, [x0]
mov w6, 0
mov w5, -1
mov w4, 50
mov w3, 3
mov w2, 122880
mov w1, 4096
movk w1, 0x2000, lsl 16
mov x0, 222
bl syscall
mov w3, 0
mov w2, 5
mov w1, 21
mov x0, 198
bl syscall
mov x1, x0
adrp x0, r
add x0, x0, :lo12:r
str x1, [x0]
mov x0, 12272
movk x0, 0x2000, lsl 16
mov w1, 2
strh w1, [x0]
mov x0, 12274
movk x0, 0x2000, lsl 16
strh wzr, [x0]
mov x19, 12276
movk x19, 0x2000, lsl 16
mov w0, 1
movk w0, 0x7f00, lsl 16
bl __bswap_32
str w0, [x19]
mov x0, 12280
movk x0, 0x2000, lsl 16
strb wzr, [x0]
mov x0, 12281
movk x0, 0x2000, lsl 16
strb wzr, [x0]
mov x0, 12282
movk x0, 0x2000, lsl 16
strb wzr, [x0]
mov x0, 12283
movk x0, 0x2000, lsl 16
strb wzr, [x0]
mov x0, 12284
movk x0, 0x2000, lsl 16
strb wzr, [x0]
mov x0, 12285
movk x0, 0x2000, lsl 16
strb wzr, [x0]
mov x0, 12286
movk x0, 0x2000, lsl 16
strb wzr, [x0]
mov x0, 12287
movk x0, 0x2000, lsl 16
strb wzr, [x0]
adrp x0, r
add x0, x0, :lo12:r
ldr x0, [x0]
mov w3, 16
mov w2, 12272
movk w2, 0x2000, lsl 16
mov x1, x0
mov x0, 200
bl syscall
mov x0, 57288
movk x0, 0x2000, lsl 16
mov x1, 16384
movk x1, 0x2001, lsl 16
str x1, [x0]
mov x0, 57296
movk x0, 0x2000, lsl 16
mov w1, 16
str w1, [x0]
mov x0, 57304
movk x0, 0x2000, lsl 16
mov x1, 49152
movk x1, 0x2001, lsl 16
str x1, [x0]
mov x0, 57312
movk x0, 0x2000, lsl 16
str xzr, [x0]
mov x0, 57320
movk x0, 0x2000, lsl 16
mov x1, 61440
movk x1, 0x2000, lsl 16
str x1, [x0]
mov x0, 57328
movk x0, 0x2000, lsl 16
mov x1, 72
str x1, [x0]
mov x0, 57336
movk x0, 0x2000, lsl 16
str wzr, [x0]
mov x0, 16384
movk x0, 0x2001, lsl 16
mov w1, 2
strh w1, [x0]
mov x0, 16386
movk x0, 0x2001, lsl 16
strh wzr, [x0]
mov x19, 16388
movk x19, 0x2001, lsl 16
mov w0, -536870911
bl __bswap_32
str w0, [x19]
mov x0, 16392
movk x0, 0x2001, lsl 16
strb wzr, [x0]
mov x0, 16393
movk x0, 0x2001, lsl 16
strb wzr, [x0]
mov x0, 16394
movk x0, 0x2001, lsl 16
strb wzr, [x0]
mov x0, 16395
movk x0, 0x2001, lsl 16
strb wzr, [x0]
mov x0, 16396
movk x0, 0x2001, lsl 16
strb wzr, [x0]
mov x0, 16397
movk x0, 0x2001, lsl 16
strb wzr, [x0]
mov x0, 16398
movk x0, 0x2001, lsl 16
strb wzr, [x0]
mov x0, 16399
movk x0, 0x2001, lsl 16
strb wzr, [x0]
mov x0, 61440
movk x0, 0x2000, lsl 16
mov x1, 72
str x1, [x0]
mov x0, 61448
movk x0, 0x2000, lsl 16
mov w1, 276
str w1, [x0]
mov x0, 61452
movk x0, 0x2000, lsl 16
mov w1, 1
str w1, [x0]
mov x0, 61456
movk x0, 0x2000, lsl 16
str wzr, [x0]
mov x0, 61460
movk x0, 0x2000, lsl 16
str wzr, [x0]
mov x0, 61464
movk x0, 0x2000, lsl 16
mov x1, 48966
movk x1, 0x2001, lsl 16
str x1, [x0]
mov x0, 61472
movk x0, 0x2000, lsl 16
mov x1, 186
str x1, [x0]
mov x0, 61480
movk x0, 0x2000, lsl 16
mov x1, 49152
movk x1, 0x2001, lsl 16
str x1, [x0]
mov x0, 61488
movk x0, 0x2000, lsl 16
mov x1, 1
str x1, [x0]
mov x0, 61496
movk x0, 0x2000, lsl 16
str xzr, [x0]
mov x0, 61504
movk x0, 0x2000, lsl 16
str xzr, [x0]
mov x0, 49152
movk x0, 0x2001, lsl 16
mov x1, 16279
movk x1, 0x2001, lsl 16
str x1, [x0]
mov x0, 49160
movk x0, 0x2001, lsl 16
mov x1, 122
str x1, [x0]
adrp x0, r
add x0, x0, :lo12:r
ldr x0, [x0]
mov w3, 0
mov w2, 57288
movk w2, 0x2000, lsl 16
mov x1, x0
mov x0, 211
bl syscall
nop
ldr x19, [sp, 16]
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_restore 19
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE6:
.size loop, .-loop
.align 2
.global main
.type main, %function
main:
.LFB7:
.cfi_startproc
stp x29, x30, [sp, -16]!
.cfi_def_cfa_offset 16
.cfi_offset 29, -16
.cfi_offset 30, -8
mov x29, sp
bl loop
mov w0, 0
ldp x29, x30, [sp], 16
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE7:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC1:
.string "\355\225\231\353\262\210: %s\n"
.align 3
.LC2:
.string "\354\235\264\353\246\204: %s\n"
.align 3
.LC3:
.string "\355\225\231\353\205\204: %d\n"
.align 3
.LC4:
.string "\354\240\204\352\263\265: %s\n"
.text
.align 2
.global main
.type main, %function
main:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -112]!
.cfi_def_cfa_offset 112
.cfi_offset 29, -112
.cfi_offset 30, -104
mov x29, sp
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 104]
mov x1, 0
adrp x0, .LC0
add x1, x0, :lo12:.LC0
add x0, sp, 24
ldp q0, q1, [x1]
stp q0, q1, [x0]
ldp q0, q1, [x1, 32]
stp q0, q1, [x0, 32]
ldr q0, [x1, 60]
str q0, [x0, 60]
add x0, sp, 24
mov x1, x0
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl printf
add x0, sp, 24
add x0, x0, 10
mov x1, x0
adrp x0, .LC2
add x0, x0, :lo12:.LC2
bl printf
ldr w0, [sp, 44]
mov w1, w0
adrp x0, .LC3
add x0, x0, :lo12:.LC3
bl printf
add x0, sp, 24
add x0, x0, 24
mov x1, x0
adrp x0, .LC4
add x0, x0, :lo12:.LC4
bl printf
mov w0, 0
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 104]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L3
bl __stack_chk_fail
.L3:
mov w0, w1
ldp x29, x30, [sp], 112
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size main, .-main
.section .rodata
.align 3
.LC0:
.string "20101111"
.zero 1
.string "lowgiant"
.zero 1
.word 4
.string "\354\273\264\355\223\250\355\204\260\352\263\274\355\225\231\352\263\274"
.zero 32
.zero 1
.text
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global getRealTime
.type getRealTime, %function
getRealTime:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 40]
mov x1, 0
mov w0, 4
str w0, [sp, 20]
ldr w0, [sp, 20]
cmn w0, #1
beq .L2
add x0, sp, 24
mov x1, x0
ldr w0, [sp, 20]
bl clock_gettime
cmn w0, #1
beq .L2
ldr d0, [sp, 24]
scvtf d1, d0
ldr d0, [sp, 32]
scvtf d0, d0
mov x0, 225833675390976
movk x0, 0x41cd, lsl 48
fmov d2, x0
fdiv d0, d0, d2
fadd d0, d1, d0
b .L4
.L2:
add x0, sp, 24
mov x1, 0
bl gettimeofday
ldr d0, [sp, 24]
scvtf d1, d0
ldr d0, [sp, 32]
scvtf d0, d0
mov x0, 145685290680320
movk x0, 0x412e, lsl 48
fmov d2, x0
fdiv d0, d0, d2
fadd d0, d1, d0
.L4:
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [sp, 40]
ldr x1, [x0]
subs x2, x2, x1
mov x1, 0
beq .L5
bl __stack_chk_fail
.L5:
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size getRealTime, .-getRealTime
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.global a
.bss
.align 3
.type a, %object
.size a, 4000024
a:
.zero 4000024
.global heap
.align 3
.type heap, %object
.size heap, 4000024
heap:
.zero 4000024
.global n
.align 2
.type n, %object
.size n, 4
n:
.zero 4
.global k
.align 2
.type k, %object
.size k, 4
k:
.zero 4
.global m
.align 2
.type m, %object
.size m, 4
m:
.zero 4
.global flag
.align 2
.type flag, %object
.size flag, 4
flag:
.zero 4
.text
.align 2
.global fun
.type fun, %function
fun:
.LFB0:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str w0, [sp, 12]
str w1, [sp, 8]
ldr w1, [sp, 8]
ldr w0, [sp, 12]
sub w0, w1, w0
cmp w0, 0
cset w0, gt
and w0, w0, 255
mov w1, w0
adrp x0, flag
add x0, x0, :lo12:flag
ldr w0, [x0]
eor w0, w1, w0
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size fun, .-fun
.align 2
.global shiftdown
.type shiftdown, %function
shiftdown:
.LFB1:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str w0, [sp, 28]
ldr w0, [sp, 28]
str w0, [sp, 40]
ldr w0, [sp, 40]
lsl w0, w0, 1
str w0, [sp, 44]
adrp x0, heap
add x0, x0, :lo12:heap
ldrsw x1, [sp, 40]
ldr w1, [x0, x1, lsl 2]
adrp x0, heap
add x0, x0, :lo12:heap
str w1, [x0]
b .L4
.L8:
adrp x0, m
add x0, x0, :lo12:m
ldr w0, [x0]
ldr w1, [sp, 44]
cmp w1, w0
bge .L5
adrp x0, heap
add x0, x0, :lo12:heap
ldrsw x1, [sp, 44]
ldr w1, [x0, x1, lsl 2]
adrp x0, a
add x0, x0, :lo12:a
sxtw x1, w1
ldr w2, [x0, x1, lsl 2]
ldr w0, [sp, 44]
add w1, w0, 1
adrp x0, heap
add x0, x0, :lo12:heap
sxtw x1, w1
ldr w1, [x0, x1, lsl 2]
adrp x0, a
add x0, x0, :lo12:a
sxtw x1, w1
ldr w0, [x0, x1, lsl 2]
mov w1, w0
mov w0, w2
bl fun
cmp w0, 0
beq .L5
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L5:
adrp x0, heap
add x0, x0, :lo12:heap
ldr w1, [x0]
adrp x0, a
add x0, x0, :lo12:a
sxtw x1, w1
ldr w2, [x0, x1, lsl 2]
adrp x0, heap
add x0, x0, :lo12:heap
ldrsw x1, [sp, 44]
ldr w1, [x0, x1, lsl 2]
adrp x0, a
add x0, x0, :lo12:a
sxtw x1, w1
ldr w0, [x0, x1, lsl 2]
mov w1, w0
mov w0, w2
bl fun
cmp w0, 0
beq .L6
adrp x0, heap
add x0, x0, :lo12:heap
ldrsw x1, [sp, 44]
ldr w2, [x0, x1, lsl 2]
adrp x0, heap
add x0, x0, :lo12:heap
ldrsw x1, [sp, 40]
str w2, [x0, x1, lsl 2]
ldr w0, [sp, 44]
str w0, [sp, 40]
ldr w0, [sp, 40]
lsl w0, w0, 1
str w0, [sp, 44]
b .L4
.L6:
adrp x0, heap
add x0, x0, :lo12:heap
ldr w2, [x0]
adrp x0, heap
add x0, x0, :lo12:heap
ldrsw x1, [sp, 40]
str w2, [x0, x1, lsl 2]
b .L3
.L4:
adrp x0, m
add x0, x0, :lo12:m
ldr w0, [x0]
ldr w1, [sp, 44]
cmp w1, w0
ble .L8
adrp x0, heap
add x0, x0, :lo12:heap
ldr w2, [x0]
adrp x0, heap
add x0, x0, :lo12:heap
ldrsw x1, [sp, 40]
str w2, [x0, x1, lsl 2]
.L3:
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE1:
.size shiftdown, .-shiftdown
.align 2
.global shiftup
.type shiftup, %function
shiftup:
.LFB2:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str w0, [sp, 28]
adrp x0, heap
add x0, x0, :lo12:heap
ldrsw x1, [sp, 28]
ldr w1, [x0, x1, lsl 2]
adrp x0, heap
add x0, x0, :lo12:heap
str w1, [x0]
ldr w0, [sp, 28]
str w0, [sp, 40]
ldr w0, [sp, 40]
lsr w1, w0, 31
add w0, w1, w0
asr w0, w0, 1
str w0, [sp, 44]
b .L10
.L13:
adrp x0, heap
add x0, x0, :lo12:heap
ldrsw x1, [sp, 44]
ldr w1, [x0, x1, lsl 2]
adrp x0, a
add x0, x0, :lo12:a
sxtw x1, w1
ldr w2, [x0, x1, lsl 2]
adrp x0, heap
add x0, x0, :lo12:heap
ldr w1, [x0]
adrp x0, a
add x0, x0, :lo12:a
sxtw x1, w1
ldr w0, [x0, x1, lsl 2]
mov w1, w0
mov w0, w2
bl fun
cmp w0, 0
beq .L11
adrp x0, heap
add x0, x0, :lo12:heap
ldrsw x1, [sp, 44]
ldr w2, [x0, x1, lsl 2]
adrp x0, heap
add x0, x0, :lo12:heap
ldrsw x1, [sp, 40]
str w2, [x0, x1, lsl 2]
ldr w0, [sp, 44]
str w0, [sp, 40]
ldr w0, [sp, 40]
lsr w1, w0, 31
add w0, w1, w0
asr w0, w0, 1
str w0, [sp, 44]
b .L10
.L11:
adrp x0, heap
add x0, x0, :lo12:heap
ldr w2, [x0]
adrp x0, heap
add x0, x0, :lo12:heap
ldrsw x1, [sp, 40]
str w2, [x0, x1, lsl 2]
b .L9
.L10:
ldr w0, [sp, 44]
cmp w0, 0
bgt .L13
adrp x0, heap
add x0, x0, :lo12:heap
ldr w2, [x0]
adrp x0, heap
add x0, x0, :lo12:heap
ldrsw x1, [sp, 40]
str w2, [x0, x1, lsl 2]
.L9:
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE2:
.size shiftup, .-shiftup
.section .rodata
.align 3
.LC0:
.string "%d"
.align 3
.LC1:
.string " %d"
.text
.align 2
.global max
.type max, %function
max:
.LFB3:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
adrp x0, k
add x0, x0, :lo12:k
ldr w1, [x0]
adrp x0, m
add x0, x0, :lo12:m
str w1, [x0]
mov w0, 1
str w0, [sp, 28]
b .L15
.L16:
adrp x0, heap
add x0, x0, :lo12:heap
ldrsw x1, [sp, 28]
ldr w2, [sp, 28]
str w2, [x0, x1, lsl 2]
ldr w0, [sp, 28]
add w0, w0, 1
str w0, [sp, 28]
.L15:
adrp x0, k
add x0, x0, :lo12:k
ldr w0, [x0]
ldr w1, [sp, 28]
cmp w1, w0
ble .L16
adrp x0, k
add x0, x0, :lo12:k
ldr w0, [x0]
lsr w1, w0, 31
add w0, w1, w0
asr w0, w0, 1
str w0, [sp, 28]
b .L17
.L18:
ldr w0, [sp, 28]
bl shiftdown
ldr w0, [sp, 28]
sub w0, w0, #1
str w0, [sp, 28]
.L17:
ldr w0, [sp, 28]
cmp w0, 0
bgt .L18
adrp x0, heap
add x0, x0, :lo12:heap
ldr w1, [x0, 4]
adrp x0, a
add x0, x0, :lo12:a
sxtw x1, w1
ldr w0, [x0, x1, lsl 2]
mov w1, w0
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl printf
adrp x0, k
add x0, x0, :lo12:k
ldr w0, [x0]
add w0, w0, 1
str w0, [sp, 28]
b .L19
.L22:
adrp x0, m
add x0, x0, :lo12:m
ldr w0, [x0]
add w1, w0, 1
adrp x0, m
add x0, x0, :lo12:m
str w1, [x0]
adrp x0, m
add x0, x0, :lo12:m
ldr w1, [x0]
adrp x0, heap
add x0, x0, :lo12:heap
sxtw x1, w1
ldr w2, [sp, 28]
str w2, [x0, x1, lsl 2]
adrp x0, m
add x0, x0, :lo12:m
ldr w0, [x0]
bl shiftup
adrp x0, heap
add x0, x0, :lo12:heap
ldr w1, [x0, 4]
adrp x0, heap
add x0, x0, :lo12:heap
str w1, [x0]
b .L20
.L21:
adrp x0, m
add x0, x0, :lo12:m
ldr w0, [x0]
sub w2, w0, #1
adrp x1, m
add x1, x1, :lo12:m
str w2, [x1]
adrp x1, heap
add x1, x1, :lo12:heap
sxtw x0, w0
ldr w1, [x1, x0, lsl 2]
adrp x0, heap
add x0, x0, :lo12:heap
str w1, [x0, 4]
mov w0, 1
bl shiftdown
adrp x0, heap
add x0, x0, :lo12:heap
ldr w1, [x0, 4]
adrp x0, heap
add x0, x0, :lo12:heap
str w1, [x0]
.L20:
adrp x0, heap
add x0, x0, :lo12:heap
ldr w1, [x0]
adrp x0, k
add x0, x0, :lo12:k
ldr w0, [x0]
ldr w2, [sp, 28]
sub w0, w2, w0
cmp w1, w0
ble .L21
adrp x0, heap
add x0, x0, :lo12:heap
ldr w1, [x0]
adrp x0, a
add x0, x0, :lo12:a
sxtw x1, w1
ldr w0, [x0, x1, lsl 2]
mov w1, w0
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl printf
ldr w0, [sp, 28]
add w0, w0, 1
str w0, [sp, 28]
.L19:
adrp x0, n
add x0, x0, :lo12:n
ldr w0, [x0]
ldr w1, [sp, 28]
cmp w1, w0
ble .L22
mov w0, 10
bl putchar
nop
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE3:
.size max, .-max
.section .rodata
.align 3
.LC2:
.string "%d%d"
.text
.align 2
.global main
.type main, %function
main:
.LFB4:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
b .L24
.L27:
mov w0, 1
str w0, [sp, 28]
b .L25
.L26:
ldrsw x0, [sp, 28]
lsl x1, x0, 2
adrp x0, a
add x0, x0, :lo12:a
add x0, x1, x0
mov x1, x0
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl __isoc99_scanf
ldr w0, [sp, 28]
add w0, w0, 1
str w0, [sp, 28]
.L25:
adrp x0, n
add x0, x0, :lo12:n
ldr w0, [x0]
ldr w1, [sp, 28]
cmp w1, w0
ble .L26
adrp x0, flag
add x0, x0, :lo12:flag
mov w1, 1
str w1, [x0]
bl max
adrp x0, flag
add x0, x0, :lo12:flag
str wzr, [x0]
bl max
.L24:
adrp x0, k
add x2, x0, :lo12:k
adrp x0, n
add x1, x0, :lo12:n
adrp x0, .LC2
add x0, x0, :lo12:.LC2
bl __isoc99_scanf
cmn w0, #1
bne .L27
mov w0, 0
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE4:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC0:
.string "r"
.align 3
.LC1:
.string "%d\n"
.text
.align 2
.global busca
.type busca, %function
busca:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str x0, [sp, 24]
str w1, [sp, 20]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 56]
mov x1, 0
adrp x0, .LC0
add x1, x0, :lo12:.LC0
ldr x0, [sp, 24]
bl fopen
str x0, [sp, 48]
str wzr, [sp, 44]
b .L2
.L3:
add x0, sp, 40
mov x2, x0
adrp x0, .LC1
add x1, x0, :lo12:.LC1
ldr x0, [sp, 48]
bl __isoc99_fscanf
ldr w0, [sp, 40]
ldr w1, [sp, 20]
cmp w1, w0
bne .L2
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L2:
ldr x0, [sp, 48]
bl feof
cmp w0, 0
beq .L3
ldr x0, [sp, 48]
bl fclose
ldr w0, [sp, 44]
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 56]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L5
bl __stack_chk_fail
.L5:
mov w0, w1
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size busca, .-busca
.align 2
.global alterar
.type alterar, %function
alterar:
.LFB1:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
str w1, [sp, 20]
str w2, [sp, 16]
ldr w1, [sp, 20]
ldr x0, [sp, 24]
bl remover
str w0, [sp, 44]
str wzr, [sp, 40]
b .L7
.L8:
ldr w1, [sp, 16]
ldr x0, [sp, 24]
bl inserir
ldr w0, [sp, 40]
add w0, w0, 1
str w0, [sp, 40]
.L7:
ldr w1, [sp, 40]
ldr w0, [sp, 44]
cmp w1, w0
blt .L8
nop
nop
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE1:
.size alterar, .-alterar
.section .rodata
.align 3
.LC2:
.string "w"
.align 3
.LC3:
.string "auxiliar.txt"
.align 3
.LC4:
.string "%d"
.text
.align 2
.global remover
.type remover, %function
remover:
.LFB2:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str x0, [sp, 24]
str w1, [sp, 20]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 56]
mov x1, 0
adrp x0, .LC0
add x1, x0, :lo12:.LC0
ldr x0, [sp, 24]
bl fopen
str x0, [sp, 40]
adrp x0, .LC2
add x1, x0, :lo12:.LC2
adrp x0, .LC3
add x0, x0, :lo12:.LC3
bl fopen
str x0, [sp, 48]
str wzr, [sp, 36]
b .L10
.L12:
add x0, sp, 32
mov x2, x0
adrp x0, .LC1
add x1, x0, :lo12:.LC1
ldr x0, [sp, 40]
bl __isoc99_fscanf
ldr w0, [sp, 32]
ldr w1, [sp, 20]
cmp w1, w0
beq .L11
ldr w0, [sp, 32]
mov w2, w0
adrp x0, .LC1
add x1, x0, :lo12:.LC1
ldr x0, [sp, 48]
bl fprintf
b .L10
.L11:
ldr w0, [sp, 36]
add w0, w0, 1
str w0, [sp, 36]
.L10:
ldr x0, [sp, 40]
bl feof
cmp w0, 0
beq .L12
ldr x0, [sp, 48]
bl fclose
ldr x0, [sp, 40]
bl fclose
ldr x0, [sp, 24]
bl remove
ldr x1, [sp, 24]
adrp x0, .LC3
add x0, x0, :lo12:.LC3
bl rename
ldr w1, [sp, 36]
adrp x0, .LC4
add x0, x0, :lo12:.LC4
bl printf
ldr w0, [sp, 36]
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 56]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L14
bl __stack_chk_fail
.L14:
mov w0, w1
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE2:
.size remover, .-remover
.section .rodata
.align 3
.LC5:
.string "a"
.align 3
.LC6:
.string "Hey!"
.align 3
.LC7:
.string "\n\n\n\n*%d*\n\n\n\n"
.text
.align 2
.global inserir
.type inserir, %function
inserir:
.LFB3:
.cfi_startproc
stp x29, x30, [sp, -96]!
.cfi_def_cfa_offset 96
.cfi_offset 29, -96
.cfi_offset 30, -88
mov x29, sp
str x0, [sp, 24]
str w1, [sp, 20]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 88]
mov x1, 0
adrp x0, .LC3
add x1, x0, :lo12:.LC3
add x0, sp, 72
ldr x2, [x1]
str x2, [x0]
ldr x1, [x1, 5]
str x1, [x0, 5]
adrp x0, .LC0
add x1, x0, :lo12:.LC0
ldr x0, [sp, 24]
bl fopen
str x0, [sp, 56]
ldr x0, [sp, 56]
cmp x0, 0
bne .L16
adrp x0, .LC2
add x1, x0, :lo12:.LC2
ldr x0, [sp, 24]
bl fopen
str x0, [sp, 56]
ldr w2, [sp, 20]
adrp x0, .LC1
add x1, x0, :lo12:.LC1
ldr x0, [sp, 56]
bl fprintf
ldr x0, [sp, 56]
bl fclose
b .L22
.L16:
ldr x0, [sp, 56]
bl fclose
ldr w1, [sp, 20]
ldr x0, [sp, 24]
bl busca
str w0, [sp, 52]
ldr w1, [sp, 52]
ldr w0, [sp, 20]
cmp w1, w0
bge .L22
adrp x0, .LC0
add x1, x0, :lo12:.LC0
ldr x0, [sp, 24]
bl fopen
str x0, [sp, 56]
add x2, sp, 72
adrp x0, .LC5
add x1, x0, :lo12:.LC5
mov x0, x2
bl fopen
str x0, [sp, 64]
mov w0, -1
str w0, [sp, 44]
mov w0, -2
str w0, [sp, 48]
b .L18
.L20:
adrp x0, .LC6
add x0, x0, :lo12:.LC6
bl printf
add x0, sp, 44
mov x2, x0
adrp x0, .LC1
add x1, x0, :lo12:.LC1
ldr x0, [sp, 56]
bl __isoc99_fscanf
ldr w1, [sp, 20]
ldr w0, [sp, 48]
cmp w1, w0
ble .L19
ldr w0, [sp, 44]
ldr w1, [sp, 20]
cmp w1, w0
bgt .L19
ldr w2, [sp, 20]
adrp x0, .LC1
add x1, x0, :lo12:.LC1
ldr x0, [sp, 64]
bl fprintf
.L19:
ldr w0, [sp, 44]
mov w2, w0
adrp x0, .LC1
add x1, x0, :lo12:.LC1
ldr x0, [sp, 64]
bl fprintf
ldr w0, [sp, 44]
str w0, [sp, 48]
.L18:
ldr x0, [sp, 56]
bl feof
cmp w0, 0
beq .L20
ldr x0, [sp, 56]
bl fclose
ldr x0, [sp, 64]
bl fclose
ldr x0, [sp, 24]
bl remove
mov w1, w0
adrp x0, .LC7
add x0, x0, :lo12:.LC7
bl printf
add x0, sp, 72
ldr x1, [sp, 24]
bl rename
mov w1, w0
adrp x0, .LC7
add x0, x0, :lo12:.LC7
bl printf
.L22:
nop
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [sp, 88]
ldr x1, [x0]
subs x2, x2, x1
mov x1, 0
beq .L21
bl __stack_chk_fail
.L21:
ldp x29, x30, [sp], 96
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE3:
.size inserir, .-inserir
.section .rodata
.align 3
.LC8:
.string "Arquivo nao existe."
.text
.align 2
.global ler
.type ler, %function
ler:
.LFB4:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str x0, [sp, 24]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 56]
mov x1, 0
adrp x0, .LC0
add x1, x0, :lo12:.LC0
ldr x0, [sp, 24]
bl fopen
str x0, [sp, 48]
ldr x0, [sp, 48]
cmp x0, 0
bne .L26
adrp x0, .LC8
add x0, x0, :lo12:.LC8
bl puts
b .L25
.L27:
add x0, sp, 44
mov x2, x0
adrp x0, .LC1
add x1, x0, :lo12:.LC1
ldr x0, [sp, 48]
bl __isoc99_fscanf
ldr w0, [sp, 44]
mov w1, w0
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl printf
.L26:
ldr x0, [sp, 48]
bl feof
cmp w0, 0
beq .L27
.L25:
ldr x0, [sp, 48]
bl fclose
nop
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [sp, 56]
ldr x1, [x0]
subs x2, x2, x1
mov x1, 0
beq .L28
bl __stack_chk_fail
.L28:
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE4:
.size ler, .-ler
.section .rodata
.align 3
.LC9:
.string "Inserir nome do arquivo: "
.align 3
.LC10:
.string ".txt"
.align 3
.LC11:
.string "\n\n=================MENU===============\n"
.align 3
.LC12:
.string " 1 - Ler arquivo\n 2 - Inserir numero no arquivo\n 3 - Remover um numero do arquivo\n 4 - Alterar um numero por outro\n 5 - Buscar um numero no arquivo\n-1 - Sair"
.align 3
.LC13:
.string "\nInserir numero: "
.align 3
.LC14:
.string "Inserir numero que deseja remover:"
.align 3
.LC15:
.string "Inserir numero que deseja alterar: "
.align 3
.LC16:
.string "Inserir numero que ira assumir o lugar: "
.align 3
.LC17:
.string "Inserir numero: "
.align 3
.LC18:
.string "O numero %d apareceu %d vezes no arquivo.\n"
.align 3
.LC19:
.string "Operacao finalizada."
.text
.align 2
.global main
.type main, %function
main:
.LFB5:
.cfi_startproc
stp x29, x30, [sp, -80]!
.cfi_def_cfa_offset 80
.cfi_offset 29, -80
.cfi_offset 30, -72
mov x29, sp
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 72]
mov x1, 0
adrp x0, .LC9
add x0, x0, :lo12:.LC9
bl printf
add x0, sp, 48
bl gets
add x0, sp, 48
bl strlen
mov x1, x0
add x0, sp, 48
add x2, x0, x1
adrp x0, .LC10
add x1, x0, :lo12:.LC10
mov x0, x2
ldr w2, [x1]
str w2, [x0]
ldrb w1, [x1, 4]
strb w1, [x0, 4]
.L35:
adrp x0, .LC11
add x0, x0, :lo12:.LC11
bl puts
adrp x0, .LC12
add x0, x0, :lo12:.LC12
bl puts
add x0, sp, 24
mov x1, x0
adrp x0, .LC4
add x0, x0, :lo12:.LC4
bl __isoc99_scanf
ldr w0, [sp, 24]
cmp w0, 1
bne .L30
mov w0, 10
bl putchar
add x0, sp, 48
bl ler
b .L31
.L30:
ldr w0, [sp, 24]
cmp w0, 2
bne .L32
adrp x0, .LC13
add x0, x0, :lo12:.LC13
bl printf
add x0, sp, 28
mov x1, x0
adrp x0, .LC4
add x0, x0, :lo12:.LC4
bl __isoc99_scanf
ldr w1, [sp, 28]
add x0, sp, 48
bl inserir
b .L31
.L32:
ldr w0, [sp, 24]
cmp w0, 3
bne .L33
adrp x0, .LC14
add x0, x0, :lo12:.LC14
bl puts
add x0, sp, 40
mov x1, x0
adrp x0, .LC4
add x0, x0, :lo12:.LC4
bl __isoc99_scanf
ldr w1, [sp, 40]
add x0, sp, 48
bl remover
b .L31
.L33:
ldr w0, [sp, 24]
cmp w0, 4
bne .L34
adrp x0, .LC15
add x0, x0, :lo12:.LC15
bl puts
add x0, sp, 32
mov x1, x0
adrp x0, .LC4
add x0, x0, :lo12:.LC4
bl __isoc99_scanf
adrp x0, .LC16
add x0, x0, :lo12:.LC16
bl puts
add x0, sp, 36
mov x1, x0
adrp x0, .LC4
add x0, x0, :lo12:.LC4
bl __isoc99_scanf
ldr w1, [sp, 32]
ldr w2, [sp, 36]
add x0, sp, 48
bl alterar
b .L31
.L34:
ldr w0, [sp, 24]
cmp w0, 5
bne .L31
adrp x0, .LC17
add x0, x0, :lo12:.LC17
bl printf
add x0, sp, 28
mov x1, x0
adrp x0, .LC4
add x0, x0, :lo12:.LC4
bl __isoc99_scanf
ldr w1, [sp, 28]
add x0, sp, 48
bl busca
str w0, [sp, 44]
ldr w0, [sp, 28]
ldr w2, [sp, 44]
mov w1, w0
adrp x0, .LC18
add x0, x0, :lo12:.LC18
bl printf
.L31:
ldr w0, [sp, 24]
cmn w0, #1
bne .L35
adrp x0, .LC19
add x0, x0, :lo12:.LC19
bl printf
mov w0, 0
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 72]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L37
bl __stack_chk_fail
.L37:
mov w0, w1
ldp x29, x30, [sp], 80
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE5:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC0:
.string "Unmatched \\."
.align 3
.LC1:
.string "Unmatched \"."
.text
.align 2
.type tokenizeCommand, %function
tokenizeCommand:
.LFB6:
.cfi_startproc
stp x29, x30, [sp, -80]!
.cfi_def_cfa_offset 80
.cfi_offset 29, -80
.cfi_offset 30, -72
mov x29, sp
str x0, [sp, 40]
str w1, [sp, 36]
str x2, [sp, 24]
str x3, [sp, 16]
mov w0, 1
str w0, [sp, 68]
mov w0, 2
str w0, [sp, 72]
mov w0, 4
str w0, [sp, 76]
str wzr, [sp, 60]
str wzr, [sp, 64]
ldr w0, [sp, 36]
cmp w0, 0
cset w0, gt
and w0, w0, 255
bl assert
b .L2
.L19:
ldr w1, [sp, 60]
ldr w0, [sp, 68]
and w0, w1, w0
cmp w0, 0
beq .L3
ldrb w0, [sp, 59]
cmp w0, 110
beq .L4
cmp w0, 116
bne .L5
mov w0, 9
strb w0, [sp, 59]
b .L5
.L4:
mov w0, 10
strb w0, [sp, 59]
nop
.L5:
ldr x0, [sp, 16]
add x1, x0, 1
str x1, [sp, 16]
ldrb w1, [sp, 59]
strb w1, [x0]
ldr w0, [sp, 68]
mvn w0, w0
ldr w1, [sp, 60]
and w0, w1, w0
str w0, [sp, 60]
b .L2
.L3:
ldr w1, [sp, 60]
ldr w0, [sp, 72]
and w0, w1, w0
cmp w0, 0
beq .L6
ldrb w0, [sp, 59]
cmp w0, 34
beq .L7
cmp w0, 92
bne .L8
ldr w1, [sp, 60]
ldr w0, [sp, 68]
orr w0, w1, w0
str w0, [sp, 60]
b .L2
.L7:
ldr w0, [sp, 72]
mvn w0, w0
ldr w1, [sp, 60]
and w0, w1, w0
str w0, [sp, 60]
b .L2
.L8:
ldr x0, [sp, 16]
add x1, x0, 1
str x1, [sp, 16]
ldrb w1, [sp, 59]
strb w1, [x0]
nop
b .L2
.L6:
ldrb w0, [sp, 59]
cmp w0, 10
bgt .L10
cmp w0, 9
bge .L11
b .L12
.L10:
cmp w0, 32
bne .L12
.L11:
ldr w1, [sp, 60]
ldr w0, [sp, 76]
and w0, w1, w0
cmp w0, 0
beq .L2
ldr x0, [sp, 16]
add x1, x0, 1
str x1, [sp, 16]
strb wzr, [x0]
ldr w0, [sp, 76]
mvn w0, w0
ldr w1, [sp, 60]
and w0, w1, w0
str w0, [sp, 60]
b .L2
.L12:
ldr w1, [sp, 60]
ldr w0, [sp, 76]
and w0, w1, w0
cmp w0, 0
bne .L14
ldr w1, [sp, 64]
ldr w0, [sp, 36]
cmp w1, w0
bne .L15
mov w0, -1
b .L16
.L15:
ldr w0, [sp, 64]
add w1, w0, 1
str w1, [sp, 64]
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 24]
add x0, x1, x0
ldr x1, [sp, 16]
str x1, [x0]
ldr w1, [sp, 60]
ldr w0, [sp, 76]
orr w0, w1, w0
str w0, [sp, 60]
.L14:
ldrb w0, [sp, 59]
cmp w0, 34
beq .L17
cmp w0, 92
bne .L18
ldr w1, [sp, 60]
ldr w0, [sp, 68]
orr w0, w1, w0
str w0, [sp, 60]
b .L2
.L17:
ldr w1, [sp, 60]
ldr w0, [sp, 72]
orr w0, w1, w0
str w0, [sp, 60]
b .L2
.L18:
ldr x0, [sp, 16]
add x1, x0, 1
str x1, [sp, 16]
ldrb w1, [sp, 59]
strb w1, [x0]
nop
.L2:
ldr x0, [sp, 40]
add x1, x0, 1
str x1, [sp, 40]
ldrb w0, [x0]
strb w0, [sp, 59]
ldrb w0, [sp, 59]
cmp w0, 0
bne .L19
ldr w1, [sp, 60]
ldr w0, [sp, 68]
and w0, w1, w0
cmp w0, 0
beq .L20
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl puts
mov w0, -1
b .L16
.L20:
ldr w1, [sp, 60]
ldr w0, [sp, 72]
and w0, w1, w0
cmp w0, 0
beq .L21
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl puts
mov w0, -1
b .L16
.L21:
ldr w1, [sp, 60]
ldr w0, [sp, 76]
and w0, w1, w0
cmp w0, 0
beq .L22
ldr x0, [sp, 16]
add x1, x0, 1
str x1, [sp, 16]
strb wzr, [x0]
.L22:
ldr w0, [sp, 64]
.L16:
ldp x29, x30, [sp], 80
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE6:
.size tokenizeCommand, .-tokenizeCommand
.section .rodata
.align 3
.LC2:
.string "&"
.align 3
.LC3:
.string "exit"
.align 3
.LC4:
.string "exit: Expression Syntax."
.align 3
.LC5:
.string "halt"
.align 3
.LC6:
.string "Not the root process!"
.align 3
.LC7:
.string "halt: Expression Syntax."
.align 3
.LC8:
.string "join"
.align 3
.LC9:
.string "join: Expression Syntax."
.align 3
.LC10:
.string "conn"
.align 3
.LC11:
.string "connect: Expression Syntax."
.align 3
.LC12:
.string "accp"
.align 3
.LC13:
.string "accept: Expression Syntax."
.align 3
.LC14:
.string ".coff"
.align 3
.LC15:
.string "%s: exec failed.\n"
.align 3
.LC16:
.string "join: Invalid process ID."
.align 3
.LC17:
.string "\n[%d] Unhandled exception\n"
.align 3
.LC18:
.string "\n[%d] Done (%d)\n"
.align 3
.LC19:
.string "\n[%d]\n"
.text
.align 2
.global runline
.type runline, %function
runline:
.LFB7:
.cfi_startproc
stp x29, x30, [sp, -336]!
.cfi_def_cfa_offset 336
.cfi_offset 29, -336
.cfi_offset 30, -328
mov x29, sp
str x19, [sp, 16]
.cfi_offset 19, -320
str x0, [sp, 40]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 328]
mov x1, 0
add x1, sp, 200
add x0, sp, 72
mov x3, x1
mov x2, x0
mov w1, 16
ldr x0, [sp, 40]
bl tokenizeCommand
str w0, [sp, 68]
ldr w0, [sp, 68]
cmp w0, 0
ble .L49
ldr w0, [sp, 68]
cmp w0, 0
ble .L26
ldr w0, [sp, 68]
sub w0, w0, #1
sxtw x0, w0
lsl x0, x0, 3
add x1, sp, 72
ldr x2, [x1, x0]
adrp x0, .LC2
add x1, x0, :lo12:.LC2
mov x0, x2
bl strcmp
cmp w0, 0
bne .L26
ldr w0, [sp, 68]
sub w0, w0, #1
str w0, [sp, 68]
mov w0, 1
str w0, [sp, 64]
b .L27
.L26:
str wzr, [sp, 64]
.L27:
ldr w0, [sp, 68]
cmp w0, 0
ble .L23
ldr x2, [sp, 72]
adrp x0, .LC3
add x1, x0, :lo12:.LC3
mov x0, x2
bl strcmp
cmp w0, 0
bne .L29
ldr w0, [sp, 68]
cmp w0, 1
bne .L30
mov w0, 0
bl exit
.L30:
ldr w0, [sp, 68]
cmp w0, 2
bne .L31
ldr x0, [sp, 80]
bl atoi
bl exit
.L31:
adrp x0, .LC4
add x0, x0, :lo12:.LC4
bl puts
b .L23
.L29:
ldr x2, [sp, 72]
adrp x0, .LC5
add x1, x0, :lo12:.LC5
mov x0, x2
bl strcmp
cmp w0, 0
bne .L32
ldr w0, [sp, 68]
cmp w0, 1
bne .L33
bl halt
adrp x0, .LC6
add x0, x0, :lo12:.LC6
bl puts
b .L23
.L33:
adrp x0, .LC7
add x0, x0, :lo12:.LC7
bl puts
b .L23
.L32:
ldr x2, [sp, 72]
adrp x0, .LC8
add x1, x0, :lo12:.LC8
mov x0, x2
bl strcmp
cmp w0, 0
bne .L35
ldr w0, [sp, 68]
cmp w0, 2
bne .L36
ldr x0, [sp, 80]
bl atoi
str w0, [sp, 60]
b .L37
.L36:
adrp x0, .LC9
add x0, x0, :lo12:.LC9
bl puts
b .L23
.L35:
ldr x2, [sp, 72]
adrp x0, .LC10
add x1, x0, :lo12:.LC10
mov x0, x2
bl strcmp
cmp w0, 0
bne .L38
ldr w0, [sp, 68]
cmp w0, 3
bne .L39
ldr x0, [sp, 80]
bl atoi
mov w19, w0
ldr x0, [sp, 88]
bl atoi
mov w1, w0
mov w0, w19
bl connect
b .L37
.L39:
adrp x0, .LC11
add x0, x0, :lo12:.LC11
bl puts
b .L23
.L38:
ldr x2, [sp, 72]
adrp x0, .LC12
add x1, x0, :lo12:.LC12
mov x0, x2
bl strcmp
cmp w0, 0
bne .L40
ldr w0, [sp, 68]
cmp w0, 2
bne .L41
ldr x0, [sp, 80]
bl atoi
bl accept
b .L37
.L41:
adrp x0, .LC13
add x0, x0, :lo12:.LC13
bl puts
b .L23
.L40:
ldr x1, [sp, 72]
add x0, sp, 264
bl strcpy
add x0, sp, 264
bl strlen
mov x1, x0
add x0, sp, 264
add x2, x0, x1
adrp x0, .LC14
add x1, x0, :lo12:.LC14
mov x0, x2
ldr w2, [x1]
str w2, [x0]
ldrh w1, [x1, 4]
strh w1, [x0, 4]
add x1, sp, 72
add x0, sp, 264
mov x2, x1
ldr w1, [sp, 68]
bl exec
str w0, [sp, 60]
ldr w0, [sp, 60]
cmn w0, #1
bne .L37
ldr x0, [sp, 72]
mov x1, x0
adrp x0, .LC15
add x0, x0, :lo12:.LC15
bl printf
b .L23
.L37:
ldr w0, [sp, 64]
cmp w0, 0
bne .L42
add x0, sp, 56
mov x1, x0
ldr w0, [sp, 60]
bl join
cmp w0, 1
beq .L43
cmp w0, 1
bgt .L23
cmn w0, #1
beq .L45
cmp w0, 0
beq .L46
b .L23
.L45:
adrp x0, .LC16
add x0, x0, :lo12:.LC16
bl puts
b .L23
.L46:
ldr w1, [sp, 60]
adrp x0, .LC17
add x0, x0, :lo12:.LC17
bl printf
b .L23
.L43:
ldr w0, [sp, 56]
mov w2, w0
ldr w1, [sp, 60]
adrp x0, .LC18
add x0, x0, :lo12:.LC18
bl printf
b .L23
.L42:
ldr w1, [sp, 60]
adrp x0, .LC19
add x0, x0, :lo12:.LC19
bl printf
b .L23
.L49:
nop
.L23:
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [sp, 328]
ldr x1, [x0]
subs x2, x2, x1
mov x1, 0
beq .L48
bl __stack_chk_fail
.L48:
ldr x19, [sp, 16]
ldp x29, x30, [sp], 336
.cfi_restore 30
.cfi_restore 29
.cfi_restore 19
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE7:
.size runline, .-runline
.section .rodata
.align 3
.LC21:
.string "%s"
.text
.align 2
.global main
.type main, %function
main:
.LFB8:
.cfi_startproc
stp x29, x30, [sp, -128]!
.cfi_def_cfa_offset 128
.cfi_offset 29, -128
.cfi_offset 30, -120
mov x29, sp
str w0, [sp, 28]
str x1, [sp, 16]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 120]
mov x1, 0
adrp x0, .LC20
add x1, x0, :lo12:.LC20
add x0, sp, 40
ldr x2, [x1]
str x2, [x0]
ldrb w1, [x1, 8]
strb w1, [x0, 8]
.L51:
add x0, sp, 40
mov x1, x0
adrp x0, .LC21
add x0, x0, :lo12:.LC21
bl printf
add x0, sp, 56
mov w1, 64
bl readline
add x0, sp, 56
bl runline
b .L51
.cfi_endproc
.LFE8:
.size main, .-main
.section .rodata
.align 3
.LC20:
.string "nachos% "
.text
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global Init
.type Init, %function
Init:
.LFB6:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
str w1, [sp, 20]
str w2, [sp, 16]
str wzr, [sp, 40]
b .L2
.L5:
str wzr, [sp, 44]
b .L3
.L4:
bl drand48
ldr w1, [sp, 44]
ldr w0, [sp, 20]
mul w1, w1, w0
ldr w0, [sp, 40]
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 24]
add x0, x1, x0
fcvt s0, d0
str s0, [x0]
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L3:
ldr w1, [sp, 44]
ldr w0, [sp, 16]
cmp w1, w0
blt .L4
ldr w0, [sp, 40]
add w0, w0, 1
str w0, [sp, 40]
.L2:
ldr w1, [sp, 40]
ldr w0, [sp, 20]
cmp w1, w0
blt .L5
nop
nop
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE6:
.size Init, .-Init
.align 2
.global chrono
.type chrono, %function
chrono:
.LFB7:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str w0, [sp, 28]
str x1, [sp, 16]
ldr w0, [sp, 28]
cmp w0, 1
bne .L7
ldr x0, [sp, 16]
str wzr, [x0]
bl clock
mov x1, x0
adrp x0, counts.0
add x0, x0, :lo12:counts.0
str x1, [x0]
b .L6
.L7:
ldr w0, [sp, 28]
cmp w0, 0
bne .L6
bl clock
mov x1, x0
adrp x0, counts.0
add x0, x0, :lo12:counts.0
ldr x0, [x0]
sub x0, x1, x0
scvtf s0, x0
mov w0, 9216
movk w0, 0x4974, lsl 16
fmov s1, w0
fdiv s0, s0, s1
ldr x0, [sp, 16]
str s0, [x0]
.L6:
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE7:
.size chrono, .-chrono
.section .rodata
.align 3
.LC0:
.string "Tiempo de CPU: %f segundos\n"
.align 3
.LC1:
.string "Tiempo de GPU: %f segundos\n"
.align 3
.LC2:
.string "factor de aceleracion %f segundos\n"
.text
.align 2
.global main
.type main, %function
main:
.LFB8:
.cfi_startproc
stp x29, x30, [sp, -80]!
.cfi_def_cfa_offset 80
.cfi_offset 29, -80
.cfi_offset 30, -72
mov x29, sp
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 72]
mov x1, 0
str wzr, [sp, 20]
str wzr, [sp, 28]
mov w0, 2048
str w0, [sp, 32]
mov w0, 1024
str w0, [sp, 36]
ldr w1, [sp, 32]
ldr w0, [sp, 36]
mul w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
bl malloc
str x0, [sp, 48]
ldr w1, [sp, 32]
ldr w0, [sp, 36]
mul w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
bl malloc
str x0, [sp, 56]
ldr w1, [sp, 32]
ldr w0, [sp, 36]
mul w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
bl malloc
str x0, [sp, 64]
ldr w2, [sp, 36]
ldr w1, [sp, 32]
ldr x0, [sp, 48]
bl Init
ldr w2, [sp, 36]
ldr w1, [sp, 32]
ldr x0, [sp, 56]
bl Init
ldr w4, [sp, 36]
ldr w3, [sp, 32]
ldr x2, [sp, 56]
ldr x1, [sp, 48]
ldr x0, [sp, 64]
bl AddOnGpu
str s0, [sp, 40]
add x0, sp, 16
mov x1, x0
mov w0, 1
bl chrono
str wzr, [sp, 24]
b .L10
.L13:
str wzr, [sp, 20]
b .L11
.L12:
ldrsw x0, [sp, 20]
lsl x0, x0, 2
ldr x1, [sp, 48]
add x0, x1, x0
ldr s1, [x0]
ldrsw x0, [sp, 20]
lsl x0, x0, 2
ldr x1, [sp, 56]
add x0, x1, x0
ldr s0, [x0]
ldrsw x0, [sp, 20]
lsl x0, x0, 2
ldr x1, [sp, 64]
add x0, x1, x0
fadd s0, s1, s0
str s0, [x0]
ldr w0, [sp, 20]
add w0, w0, 1
str w0, [sp, 20]
.L11:
ldr w1, [sp, 32]
ldr w0, [sp, 36]
mul w0, w1, w0
ldr w1, [sp, 20]
cmp w1, w0
blt .L12
ldr w0, [sp, 24]
add w0, w0, 1
str w0, [sp, 24]
.L10:
ldr w0, [sp, 24]
cmp w0, 199
ble .L13
add x0, sp, 16
mov x1, x0
mov w0, 0
bl chrono
ldr s0, [sp, 16]
mov w0, 1128792064
fmov s1, w0
fdiv s0, s0, s1
str s0, [sp, 44]
ldr s0, [sp, 44]
fcvt d0, s0
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl printf
ldr s0, [sp, 40]
fcvt d0, s0
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl printf
ldr s0, [sp, 40]
ldr s1, [sp, 44]
fdiv s0, s1, s0
fcvt d0, s0
adrp x0, .LC2
add x0, x0, :lo12:.LC2
bl printf
ldr x0, [sp, 48]
bl free
ldr x0, [sp, 56]
bl free
ldr x0, [sp, 64]
bl free
mov w0, 0
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 72]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L15
bl __stack_chk_fail
.L15:
mov w0, w1
ldp x29, x30, [sp], 80
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE8:
.size main, .-main
.local counts.0
.comm counts.0,8,8
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC0:
.string "Enter a 12-hour time: "
.align 3
.LC1:
.string "%d:%d %c"
.align 3
.LC2:
.string "Equivalent 24-hour time: %d:%d\n"
.text
.align 2
.global main
.type main, %function
main:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 40]
mov x1, 0
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl printf
add x2, sp, 31
add x1, sp, 36
add x0, sp, 32
mov x3, x2
mov x2, x1
mov x1, x0
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl __isoc99_scanf
ldrb w0, [sp, 31]
bl toupper
cmp w0, 80
bne .L2
ldr w0, [sp, 32]
add w0, w0, 12
str w0, [sp, 32]
.L2:
ldr w0, [sp, 32]
ldr w1, [sp, 36]
mov w2, w1
mov w1, w0
adrp x0, .LC2
add x0, x0, :lo12:.LC2
bl printf
mov w0, 0
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 40]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L4
bl __stack_chk_fail
.L4:
mov w0, w1
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.global _huff_tab1
.bss
.align 3
.type _huff_tab1, %object
.size _huff_tab1, 8
_huff_tab1:
.zero 8
.global _huff_tab2
.align 3
.type _huff_tab2, %object
.size _huff_tab2, 8
_huff_tab2:
.zero 8
.global _huff_tab3
.align 3
.type _huff_tab3, %object
.size _huff_tab3, 2
_huff_tab3:
.zero 2
.global _huff_tab4
.align 3
.type _huff_tab4, %object
.size _huff_tab4, 2
_huff_tab4:
.zero 2
.global _huff_tab5
.align 3
.type _huff_tab5, %object
.size _huff_tab5, 4
_huff_tab5:
.zero 4
.global _huff_tab6
.align 3
.type _huff_tab6, %object
.size _huff_tab6, 2
_huff_tab6:
.zero 2
.global _huff_tab7
.align 3
.type _huff_tab7, %object
.size _huff_tab7, 4
_huff_tab7:
.zero 4
.global _huff_tab8
.align 3
.type _huff_tab8, %object
.size _huff_tab8, 4
_huff_tab8:
.zero 4
.global _huff_tab9
.align 3
.type _huff_tab9, %object
.size _huff_tab9, 4
_huff_tab9:
.zero 4
.global _huff_tab10
.align 3
.type _huff_tab10, %object
.size _huff_tab10, 4
_huff_tab10:
.zero 4
.global _huff_tab11
.align 3
.type _huff_tab11, %object
.size _huff_tab11, 4
_huff_tab11:
.zero 4
.global _huff_tab12
.align 3
.type _huff_tab12, %object
.size _huff_tab12, 2
_huff_tab12:
.zero 2
.global _huff_tab13
.align 3
.type _huff_tab13, %object
.size _huff_tab13, 8
_huff_tab13:
.zero 8
.global _huff_tab14
.align 3
.type _huff_tab14, %object
.size _huff_tab14, 2
_huff_tab14:
.zero 2
.global _huff_tab15
.align 3
.type _huff_tab15, %object
.size _huff_tab15, 8
_huff_tab15:
.zero 8
.global _huff_tab16
.align 3
.type _huff_tab16, %object
.size _huff_tab16, 8
_huff_tab16:
.zero 8
.global _huff_tab17
.align 3
.type _huff_tab17, %object
.size _huff_tab17, 8
_huff_tab17:
.zero 8
.global _huff_tab18
.align 3
.type _huff_tab18, %object
.size _huff_tab18, 8
_huff_tab18:
.zero 8
.global _huff_tab19
.align 3
.type _huff_tab19, %object
.size _huff_tab19, 4
_huff_tab19:
.zero 4
.global _huff_tab20
.align 3
.type _huff_tab20, %object
.size _huff_tab20, 8
_huff_tab20:
.zero 8
.global _huff_tab21
.align 3
.type _huff_tab21, %object
.size _huff_tab21, 8
_huff_tab21:
.zero 8
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.type isValid, %function
isValid:
.LFB6:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
str wzr, [sp, 32]
mov w0, 100
str w0, [sp, 36]
ldrsw x0, [sp, 36]
bl malloc
str x0, [sp, 40]
b .L2
.L14:
ldr x0, [sp, 24]
ldrb w0, [x0]
cmp w0, 125
beq .L3
cmp w0, 125
bgt .L4
cmp w0, 123
beq .L5
cmp w0, 123
bgt .L4
cmp w0, 93
beq .L6
cmp w0, 93
bgt .L4
cmp w0, 91
beq .L5
cmp w0, 91
bgt .L4
cmp w0, 40
beq .L5
cmp w0, 41
beq .L7
b .L4
.L5:
ldr w0, [sp, 32]
add w0, w0, 1
ldr w1, [sp, 36]
cmp w1, w0
bgt .L8
ldr w0, [sp, 36]
lsl w0, w0, 1
str w0, [sp, 36]
ldrsw x0, [sp, 36]
mov x1, x0
ldr x0, [sp, 40]
bl realloc
str x0, [sp, 40]
.L8:
ldr w0, [sp, 32]
add w1, w0, 1
str w1, [sp, 32]
sxtw x0, w0
ldr x1, [sp, 40]
add x0, x1, x0
ldr x1, [sp, 24]
ldrb w1, [x1]
strb w1, [x0]
b .L9
.L7:
ldr w0, [sp, 32]
sub w0, w0, #1
str w0, [sp, 32]
ldrsw x0, [sp, 32]
ldr x1, [sp, 40]
add x0, x1, x0
ldrb w0, [x0]
cmp w0, 40
beq .L15
mov w0, 0
b .L11
.L6:
ldr w0, [sp, 32]
sub w0, w0, #1
str w0, [sp, 32]
ldrsw x0, [sp, 32]
ldr x1, [sp, 40]
add x0, x1, x0
ldrb w0, [x0]
cmp w0, 91
beq .L16
mov w0, 0
b .L11
.L3:
ldr w0, [sp, 32]
sub w0, w0, #1
str w0, [sp, 32]
ldrsw x0, [sp, 32]
ldr x1, [sp, 40]
add x0, x1, x0
ldrb w0, [x0]
cmp w0, 123
beq .L17
mov w0, 0
b .L11
.L4:
mov w0, 0
b .L11
.L15:
nop
b .L9
.L16:
nop
b .L9
.L17:
nop
.L9:
ldr x0, [sp, 24]
add x0, x0, 1
str x0, [sp, 24]
.L2:
ldr x0, [sp, 24]
ldrb w0, [x0]
cmp w0, 0
bne .L14
ldr w0, [sp, 32]
cmp w0, 0
cset w0, eq
and w0, w0, 255
.L11:
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE6:
.size isValid, .-isValid
.section .rodata
.align 3
.LC0:
.string "Usage: ./test xxxx"
.align 3
.LC1:
.string "true"
.align 3
.LC2:
.string "false"
.text
.align 2
.global main
.type main, %function
main:
.LFB7:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str w0, [sp, 28]
str x1, [sp, 16]
ldr w0, [sp, 28]
cmp w0, 2
beq .L19
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x0, [x0]
mov x3, x0
mov x2, 18
mov x1, 1
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl fwrite
mov w0, -1
bl exit
.L19:
ldr x0, [sp, 16]
add x0, x0, 8
ldr x0, [x0]
bl isValid
and w0, w0, 255
cmp w0, 0
beq .L20
adrp x0, .LC1
add x0, x0, :lo12:.LC1
b .L21
.L20:
adrp x0, .LC2
add x0, x0, :lo12:.LC2
.L21:
bl puts
mov w0, 0
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE7:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global vbic_3T_et_cf_fj
.type vbic_3T_et_cf_fj, %function
vbic_3T_et_cf_fj:
.LFB0:
.cfi_startproc
mov x12, 5536
sub sp, sp, x12
.cfi_def_cfa_offset 5536
stp x29, x30, [sp]
.cfi_offset 29, -5536
.cfi_offset 30, -5528
mov x29, sp
stp d8, d9, [sp, 16]
stp d10, d11, [sp, 32]
.cfi_offset 72, -5520
.cfi_offset 73, -5512
.cfi_offset 74, -5504
.cfi_offset 75, -5496
str x0, [sp, 104]
str x1, [sp, 96]
str x2, [sp, 88]
str x3, [sp, 80]
str x4, [sp, 72]
str x5, [sp, 64]
str x6, [sp, 56]
str x7, [sp, 48]
ldr x0, [sp, 104]
ldr d0, [x0]
str d0, [sp, 536]
ldr x0, [sp, 104]
ldr d0, [x0, 8]
str d0, [sp, 544]
ldr x0, [sp, 104]
ldr d0, [x0, 16]
str d0, [sp, 552]
ldr x0, [sp, 104]
ldr d0, [x0, 24]
str d0, [sp, 560]
ldr x0, [sp, 104]
ldr d0, [x0, 32]
str d0, [sp, 568]
ldr x0, [sp, 104]
ldr d0, [x0, 40]
str d0, [sp, 576]
ldr x0, [sp, 104]
ldr d0, [x0, 48]
str d0, [sp, 584]
ldr x0, [sp, 104]
ldr d0, [x0, 56]
str d0, [sp, 592]
ldr x0, [sp, 104]
ldr d0, [x0, 64]
str d0, [sp, 600]
ldr x0, [sp, 104]
ldr d0, [x0, 72]
str d0, [sp, 608]
ldr x0, [sp, 104]
ldr d0, [x0, 80]
str d0, [sp, 616]
ldr x0, [sp, 104]
ldr d0, [x0, 88]
str d0, [sp, 624]
ldr x0, [sp, 104]
ldr d0, [x0, 96]
str d0, [sp, 632]
ldr x0, [sp, 104]
ldr d0, [x0, 104]
str d0, [sp, 640]
ldr x0, [sp, 104]
ldr d0, [x0, 112]
str d0, [sp, 648]
ldr x0, [sp, 104]
ldr d0, [x0, 120]
str d0, [sp, 656]
ldr x0, [sp, 104]
ldr d0, [x0, 128]
str d0, [sp, 664]
ldr x0, [sp, 104]
ldr d0, [x0, 136]
str d0, [sp, 672]
ldr x0, [sp, 104]
ldr d0, [x0, 144]
str d0, [sp, 680]
ldr x0, [sp, 104]
ldr d0, [x0, 152]
str d0, [sp, 688]
ldr x0, [sp, 104]
ldr d0, [x0, 160]
str d0, [sp, 696]
ldr x0, [sp, 104]
ldr d0, [x0, 168]
str d0, [sp, 704]
ldr x0, [sp, 104]
ldr d0, [x0, 176]
str d0, [sp, 712]
ldr x0, [sp, 104]
ldr d0, [x0, 184]
str d0, [sp, 720]
ldr x0, [sp, 104]
ldr d0, [x0, 192]
str d0, [sp, 728]
ldr x0, [sp, 104]
ldr d0, [x0, 200]
str d0, [sp, 736]
ldr x0, [sp, 104]
ldr d0, [x0, 208]
str d0, [sp, 744]
ldr x0, [sp, 104]
ldr d0, [x0, 216]
str d0, [sp, 752]
ldr x0, [sp, 104]
ldr d0, [x0, 224]
str d0, [sp, 760]
ldr x0, [sp, 104]
ldr d0, [x0, 232]
str d0, [sp, 768]
ldr x0, [sp, 104]
ldr d0, [x0, 248]
str d0, [sp, 776]
ldr x0, [sp, 104]
ldr d0, [x0, 256]
str d0, [sp, 784]
ldr x0, [sp, 104]
ldr d0, [x0, 264]
str d0, [sp, 792]
ldr x0, [sp, 104]
ldr d0, [x0, 272]
str d0, [sp, 800]
ldr x0, [sp, 104]
ldr d0, [x0, 280]
str d0, [sp, 808]
ldr x0, [sp, 104]
ldr d0, [x0, 288]
str d0, [sp, 816]
ldr x0, [sp, 104]
ldr d0, [x0, 296]
str d0, [sp, 824]
ldr x0, [sp, 104]
ldr d0, [x0, 304]
str d0, [sp, 832]
ldr x0, [sp, 104]
ldr d0, [x0, 312]
str d0, [sp, 840]
ldr x0, [sp, 104]
ldr d0, [x0, 320]
str d0, [sp, 848]
ldr x0, [sp, 104]
ldr d0, [x0, 328]
str d0, [sp, 856]
ldr x0, [sp, 104]
ldr d0, [x0, 336]
str d0, [sp, 864]
ldr x0, [sp, 104]
ldr d0, [x0, 344]
str d0, [sp, 872]
ldr x0, [sp, 104]
ldr d0, [x0, 352]
str d0, [sp, 880]
ldr x0, [sp, 104]
ldr d0, [x0, 360]
str d0, [sp, 888]
ldr x0, [sp, 104]
ldr d0, [x0, 368]
str d0, [sp, 896]
ldr x0, [sp, 104]
ldr d0, [x0, 376]
str d0, [sp, 904]
ldr x0, [sp, 104]
ldr d0, [x0, 384]
str d0, [sp, 912]
ldr x0, [sp, 104]
ldr d0, [x0, 392]
str d0, [sp, 920]
ldr x0, [sp, 104]
ldr d0, [x0, 400]
str d0, [sp, 928]
ldr x0, [sp, 104]
ldr d0, [x0, 408]
str d0, [sp, 936]
ldr x0, [sp, 104]
ldr d0, [x0, 416]
str d0, [sp, 944]
ldr x0, [sp, 104]
ldr d0, [x0, 424]
str d0, [sp, 952]
ldr x0, [sp, 104]
ldr d0, [x0, 432]
str d0, [sp, 960]
ldr x0, [sp, 104]
ldr d0, [x0, 440]
str d0, [sp, 968]
ldr x0, [sp, 104]
ldr d0, [x0, 448]
str d0, [sp, 976]
ldr x0, [sp, 104]
ldr d0, [x0, 456]
str d0, [sp, 984]
ldr x0, [sp, 104]
ldr d0, [x0, 464]
str d0, [sp, 992]
ldr x0, [sp, 104]
ldr d0, [x0, 472]
str d0, [sp, 1000]
ldr x0, [sp, 104]
ldr d0, [x0, 480]
str d0, [sp, 1008]
ldr x0, [sp, 104]
ldr d0, [x0, 488]
str d0, [sp, 1016]
ldr x0, [sp, 104]
ldr d0, [x0, 528]
str d0, [sp, 1024]
ldr x0, [sp, 104]
ldr d0, [x0, 536]
str d0, [sp, 1032]
ldr x0, [sp, 104]
ldr d0, [x0, 544]
str d0, [sp, 1040]
ldr x0, [sp, 104]
ldr d0, [x0, 552]
str d0, [sp, 1048]
ldr x0, [sp, 104]
ldr d0, [x0, 560]
str d0, [sp, 1056]
ldr x0, [sp, 104]
ldr d0, [x0, 568]
str d0, [sp, 1064]
ldr x0, [sp, 104]
ldr d0, [x0, 576]
str d0, [sp, 1072]
ldr x0, [sp, 104]
ldr d0, [x0, 584]
str d0, [sp, 1080]
ldr x0, [sp, 104]
ldr d0, [x0, 592]
str d0, [sp, 1088]
ldr x0, [sp, 104]
ldr d0, [x0, 600]
str d0, [sp, 1096]
ldr x0, [sp, 104]
ldr d0, [x0, 608]
str d0, [sp, 1104]
ldr x0, [sp, 104]
ldr d0, [x0, 616]
str d0, [sp, 1112]
ldr x0, [sp, 104]
ldr d0, [x0, 624]
str d0, [sp, 1120]
ldr x0, [sp, 104]
ldr d0, [x0, 632]
str d0, [sp, 1128]
ldr x0, [sp, 104]
ldr d0, [x0, 640]
str d0, [sp, 1136]
ldr x0, [sp, 104]
ldr d0, [x0, 648]
str d0, [sp, 1144]
ldr x0, [sp, 104]
ldr d0, [x0, 656]
str d0, [sp, 1152]
ldr x0, [sp, 104]
ldr d0, [x0, 664]
str d0, [sp, 1160]
ldr x0, [sp, 104]
ldr d0, [x0, 672]
str d0, [sp, 1168]
ldr x0, [sp, 104]
ldr d0, [x0, 680]
str d0, [sp, 1176]
ldr x0, [sp, 104]
ldr d0, [x0, 688]
str d0, [sp, 1184]
ldr x0, [sp, 104]
ldr d0, [x0, 704]
str d0, [sp, 1192]
ldr x0, [sp, 104]
ldr d0, [x0, 712]
str d0, [sp, 1200]
ldr x0, [sp, 104]
ldr d0, [x0, 720]
str d0, [sp, 1208]
ldr x0, [sp, 104]
ldr d0, [x0, 728]
str d0, [sp, 1216]
ldr x0, [sp, 104]
ldr d0, [x0, 736]
str d0, [sp, 1224]
ldr x0, [sp, 104]
ldr d0, [x0, 744]
str d0, [sp, 1232]
ldr x0, [sp, 104]
ldr d0, [x0, 752]
str d0, [sp, 1240]
ldr x0, [sp, 104]
ldr d0, [x0, 760]
str d0, [sp, 1248]
ldr x0, [sp, 104]
ldr d0, [x0, 768]
str d0, [sp, 1256]
ldr x0, [sp, 104]
ldr d0, [x0, 776]
str d0, [sp, 1264]
ldr x0, [sp, 104]
ldr d0, [x0, 784]
str d0, [sp, 1272]
ldr x0, [sp, 104]
ldr d0, [x0, 792]
str d0, [sp, 1280]
ldr x0, [sp, 104]
ldr d0, [x0, 800]
str d0, [sp, 1288]
ldr x0, [sp, 104]
ldr d0, [x0, 808]
str d0, [sp, 1296]
ldr x0, [sp, 104]
ldr d0, [x0, 816]
str d0, [sp, 1304]
ldr x0, [sp, 104]
ldr d0, [x0, 824]
str d0, [sp, 1312]
ldr d0, [sp, 536]
adrp x0, .LC0
ldr d1, [x0, #:lo12:.LC0]
fadd d0, d0, d1
str d0, [sp, 1320]
ldr d0, [sp, 536]
adrp x0, .LC0
ldr d1, [x0, #:lo12:.LC0]
fadd d1, d0, d1
ldr x0, [sp, 96]
ldr d0, [x0]
fadd d0, d1, d0
str d0, [sp, 1328]
fmov d0, 1.0e+0
str d0, [sp, 1336]
ldr d0, [sp, 1328]
adrp x0, .LC1
ldr d1, [x0, #:lo12:.LC1]
fmul d0, d0, d1
adrp x0, .LC2
ldr d1, [x0, #:lo12:.LC2]
fdiv d0, d0, d1
str d0, [sp, 1344]
adrp x0, .LC3
ldr d0, [x0, #:lo12:.LC3]
str d0, [sp, 1352]
ldr d1, [sp, 1352]
ldr d0, [sp, 1336]
fmul d0, d1, d0
str d0, [sp, 1360]
ldr d0, [sp, 1320]
ldr d1, [sp, 1328]
fdiv d0, d1, d0
str d0, [sp, 1368]
ldr d0, [sp, 1320]
fmov d1, 1.0e+0
fdiv d0, d1, d0
str d0, [sp, 1376]
ldr d1, [sp, 1376]
ldr d0, [sp, 1336]
fmul d0, d1, d0
str d0, [sp, 1384]
ldr d1, [sp, 1328]
ldr d0, [sp, 1320]
fsub d0, d1, d0
str d0, [sp, 1392]
fmov d0, 1.0e+0
str d0, [sp, 1400]
ldr d1, [sp, 1400]
ldr d0, [sp, 1336]
fmul d0, d1, d0
str d0, [sp, 1408]
ldr d1, [sp, 1208]
ldr d0, [sp, 1368]
bl pow
str d0, [sp, 1416]
ldr d1, [sp, 1416]
ldr d0, [sp, 1208]
fmul d1, d1, d0
ldr d0, [sp, 1368]
fdiv d0, d1, d0
str d0, [sp, 1424]
ldr d1, [sp, 1424]
ldr d0, [sp, 1384]
fmul d0, d1, d0
str d0, [sp, 1432]
ldr d1, [sp, 952]
ldr d0, [sp, 1416]
fmul d0, d1, d0
str d0, [sp, 1440]
ldr d0, [sp, 952]
str d0, [sp, 1448]
ldr d1, [sp, 1448]
ldr d0, [sp, 1432]
fmul d0, d1, d0
str d0, [sp, 1456]
ldr d1, [sp, 1216]
ldr d0, [sp, 1368]
bl pow
str d0, [sp, 1416]
ldr d1, [sp, 1416]
ldr d0, [sp, 1216]
fmul d1, d1, d0
ldr d0, [sp, 1368]
fdiv d0, d1, d0
str d0, [sp, 1424]
ldr d1, [sp, 1424]
ldr d0, [sp, 1384]
fmul d0, d1, d0
str d0, [sp, 1432]
ldr d1, [sp, 544]
ldr d0, [sp, 1416]
fmul d0, d1, d0
str d0, [sp, 1464]
ldr d0, [sp, 544]
str d0, [sp, 1472]
ldr d1, [sp, 1472]
ldr d0, [sp, 1432]
fmul d0, d1, d0
str d0, [sp, 1480]
ldr d1, [sp, 1040]
ldr d0, [sp, 1368]
bl pow
str d0, [sp, 1416]
ldr d1, [sp, 1416]
ldr d0, [sp, 1040]
fmul d1, d1, d0
ldr d0, [sp, 1368]
fdiv d0, d1, d0
str d0, [sp, 1424]
ldr d1, [sp, 1424]
ldr d0, [sp, 1384]
fmul d0, d1, d0
str d0, [sp, 1432]
ldr d1, [sp, 552]
ldr d0, [sp, 1416]
fmul d0, d1, d0
str d0, [sp, 1488]
ldr d0, [sp, 552]
str d0, [sp, 1496]
ldr d1, [sp, 1496]
ldr d0, [sp, 1432]
fmul d0, d1, d0
str d0, [sp, 1504]
ldr d1, [sp, 1224]
ldr d0, [sp, 1368]
bl pow
str d0, [sp, 1416]
ldr d1, [sp, 1416]
ldr d0, [sp, 1224]
fmul d1, d1, d0
ldr d0, [sp, 1368]
fdiv d0, d1, d0
str d0, [sp, 1424]
ldr d1, [sp, 1424]
ldr d0, [sp, 1384]
fmul d0, d1, d0
str d0, [sp, 1432]
ldr d1, [sp, 584]
ldr d0, [sp, 1416]
fmul d0, d1, d0
str d0, [sp, 1512]
ldr d0, [sp, 584]
str d0, [sp, 1520]
ldr d1, [sp, 1520]
ldr d0, [sp, 1432]
fmul d0, d1, d0
str d0, [sp, 1528]
ldr d1, [sp, 1032]
ldr d0, [sp, 1368]
bl pow
str d0, [sp, 1416]
ldr d1, [sp, 1416]
ldr d0, [sp, 1032]
fmul d1, d1, d0
ldr d0, [sp, 1368]
fdiv d0, d1, d0
str d0, [sp, 1424]
ldr d1, [sp, 1424]
ldr d0, [sp, 1384]
fmul d0, d1, d0
str d0, [sp, 1432]
ldr d1, [sp, 592]
ldr d0, [sp, 1416]
fmul d0, d1, d0
str d0, [sp, 1536]
ldr d0, [sp, 592]
str d0, [sp, 1544]
ldr d1, [sp, 1544]
ldr d0, [sp, 1432]
fmul d0, d1, d0
str d0, [sp, 1552]
ldr d1, [sp, 1024]
ldr d0, [sp, 1368]
bl pow
str d0, [sp, 1416]
ldr d1, [sp, 1416]
ldr d0, [sp, 1024]
fmul d1, d1, d0
ldr d0, [sp, 1368]
fdiv d0, d1, d0
str d0, [sp, 1424]
ldr d1, [sp, 1424]
ldr d0, [sp, 1384]
fmul d0, d1, d0
str d0, [sp, 1432]
ldr d1, [sp, 600]
ldr d0, [sp, 1416]
fmul d0, d1, d0
str d0, [sp, 1560]
ldr d0, [sp, 600]
str d0, [sp, 1568]
ldr d1, [sp, 1568]
ldr d0, [sp, 1432]
fmul d0, d1, d0
str d0, [sp, 1576]
ldr d1, [sp, 1048]
ldr d0, [sp, 1368]
bl pow
str d0, [sp, 1416]
ldr d1, [sp, 1416]
ldr d0, [sp, 1048]
fmul d1, d1, d0
ldr d0, [sp, 1368]
fdiv d0, d1, d0
str d0, [sp, 1424]
ldr d1, [sp, 1424]
ldr d0, [sp, 1384]
fmul d0, d1, d0
str d0, [sp, 1432]
ldr d1, [sp, 608]
ldr d0, [sp, 1416]
fmul d0, d1, d0
str d0, [sp, 1584]
ldr d0, [sp, 608]
str d0, [sp, 1592]
ldr d1, [sp, 1592]
ldr d0, [sp, 1432]
fmul d0, d1, d0
str d0, [sp, 1600]
ldr d1, [sp, 1232]
ldr d0, [sp, 1368]
bl pow
str d0, [sp, 1416]
ldr d1, [sp, 1416]
ldr d0, [sp, 1232]
fmul d1, d1, d0
ldr d0, [sp, 1368]
fdiv d0, d1, d0
str d0, [sp, 1424]
ldr d1, [sp, 1424]
ldr d0, [sp, 1384]
fmul d0, d1, d0
str d0, [sp, 1432]
ldr d1, [sp, 616]
ldr d0, [sp, 1416]
fmul d0, d1, d0
str d0, [sp, 1608]
ldr d0, [sp, 616]
str d0, [sp, 1616]
ldr d1, [sp, 1616]
ldr d0, [sp, 1432]
fmul d0, d1, d0
str d0, [sp, 1624]
ldr d1, [sp, 1120]
ldr d0, [sp, 1368]
bl pow
str d0, [sp, 1632]
ldr d1, [sp, 1632]
ldr d0, [sp, 1120]
fmul d1, d1, d0
ldr d0, [sp, 1368]
fdiv d0, d1, d0
str d0, [sp, 1640]
ldr d1, [sp, 1640]
ldr d0, [sp, 1384]
fmul d0, d1, d0
str d0, [sp, 1648]
ldr d0, [sp, 1064]
fneg d1, d0
fmov d2, 1.0e+0
ldr d0, [sp, 1368]
fsub d0, d2, d0
fmul d1, d1, d0
ldr d0, [sp, 1344]
fdiv d0, d1, d0
str d0, [sp, 1656]
ldr d0, [sp, 1344]
ldr d1, [sp, 1064]
fdiv d0, d1, d0
str d0, [sp, 1664]
fmov d1, 1.0e+0
ldr d0, [sp, 1368]
fsub d1, d1, d0
ldr d0, [sp, 1064]
fmul d1, d1, d0
ldr d0, [sp, 1344]
fmul d0, d0, d0
fdiv d0, d1, d0
str d0, [sp, 1672]
ldr d1, [sp, 1664]
ldr d0, [sp, 1384]
fmul d0, d1, d0
str d0, [sp, 1680]
ldr d1, [sp, 1672]
ldr d0, [sp, 1360]
fmul d0, d1, d0
ldr d1, [sp, 1680]
fadd d0, d1, d0
str d0, [sp, 1680]
ldr d0, [sp, 1656]
bl exp
str d0, [sp, 1688]
ldr d0, [sp, 1688]
str d0, [sp, 1696]
ldr d1, [sp, 1696]
ldr d0, [sp, 1680]
fmul d0, d1, d0
str d0, [sp, 1704]
ldr d1, [sp, 1632]
ldr d0, [sp, 1688]
fmul d0, d1, d0
str d0, [sp, 1416]
ldr d0, [sp, 1688]
str d0, [sp, 1712]
ldr d0, [sp, 1632]
str d0, [sp, 1720]
ldr d1, [sp, 1712]
ldr d0, [sp, 1648]
fmul d0, d1, d0
str d0, [sp, 1432]
ldr d1, [sp, 1720]
ldr d0, [sp, 1704]
fmul d0, d1, d0
ldr d1, [sp, 1432]
fadd d0, d1, d0
str d0, [sp, 1432]
ldr d0, [sp, 632]
fmov d1, 1.0e+0
fdiv d0, d1, d0
str d0, [sp, 1728]
ldr d1, [sp, 1728]
ldr d0, [sp, 1416]
bl pow
str d0, [sp, 1736]
ldr d1, [sp, 1736]
ldr d0, [sp, 1728]
fmul d1, d1, d0
ldr d0, [sp, 1416]
fdiv d0, d1, d0
str d0, [sp, 1744]
ldr d1, [sp, 1744]
ldr d0, [sp, 1432]
fmul d0, d1, d0
str d0, [sp, 1752]
ldr d1, [sp, 624]
ldr d0, [sp, 1736]
fmul d0, d1, d0
str d0, [sp, 1760]
ldr d0, [sp, 624]
str d0, [sp, 1768]
ldr d1, [sp, 1768]
ldr d0, [sp, 1752]
fmul d0, d1, d0
str d0, [sp, 1776]
ldr d1, [sp, 1248]
ldr d0, [sp, 1368]
bl pow
str d0, [sp, 1632]
ldr d1, [sp, 1632]
ldr d0, [sp, 1248]
fmul d1, d1, d0
ldr d0, [sp, 1368]
fdiv d0, d1, d0
str d0, [sp, 1640]
ldr d1, [sp, 1640]
ldr d0, [sp, 1384]
fmul d0, d1, d0
str d0, [sp, 1648]
ldr d0, [sp, 1256]
fneg d1, d0
fmov d2, 1.0e+0
ldr d0, [sp, 1368]
fsub d0, d2, d0
fmul d1, d1, d0
ldr d0, [sp, 1344]
fdiv d0, d1, d0
str d0, [sp, 1656]
ldr d0, [sp, 1344]
ldr d1, [sp, 1256]
fdiv d0, d1, d0
str d0, [sp, 1664]
fmov d1, 1.0e+0
ldr d0, [sp, 1368]
fsub d1, d1, d0
ldr d0, [sp, 1256]
fmul d1, d1, d0
ldr d0, [sp, 1344]
fmul d0, d0, d0
fdiv d0, d1, d0
str d0, [sp, 1672]
ldr d1, [sp, 1664]
ldr d0, [sp, 1384]
fmul d0, d1, d0
str d0, [sp, 1680]
ldr d1, [sp, 1672]
ldr d0, [sp, 1360]
fmul d0, d1, d0
ldr d1, [sp, 1680]
fadd d0, d1, d0
str d0, [sp, 1680]
ldr d0, [sp, 1656]
bl exp
str d0, [sp, 1688]
ldr d0, [sp, 1688]
str d0, [sp, 1696]
ldr d1, [sp, 1696]
ldr d0, [sp, 1680]
fmul d0, d1, d0
str d0, [sp, 1704]
ldr d1, [sp, 1632]
ldr d0, [sp, 1688]
fmul d0, d1, d0
str d0, [sp, 1416]
ldr d0, [sp, 1688]
str d0, [sp, 1712]
ldr d0, [sp, 1632]
str d0, [sp, 1720]
ldr d1, [sp, 1712]
ldr d0, [sp, 1648]
fmul d0, d1, d0
str d0, [sp, 1432]
ldr d1, [sp, 1720]
ldr d0, [sp, 1704]
fmul d0, d1, d0
ldr d1, [sp, 1432]
fadd d0, d1, d0
str d0, [sp, 1432]
ldr d0, [sp, 640]
fmov d1, 1.0e+0
fdiv d0, d1, d0
str d0, [sp, 1728]
ldr d1, [sp, 1728]
ldr d0, [sp, 1416]
bl pow
str d0, [sp, 1736]
ldr d1, [sp, 1736]
ldr d0, [sp, 1728]
fmul d1, d1, d0
ldr d0, [sp, 1416]
fdiv d0, d1, d0
str d0, [sp, 1744]
ldr d1, [sp, 1744]
ldr d0, [sp, 1432]
fmul d0, d1, d0
str d0, [sp, 1752]
ldr d1, [sp, 1240]
ldr d0, [sp, 1736]
fmul d0, d1, d0
str d0, [sp, 1784]
ldr d0, [sp, 1240]
str d0, [sp, 1792]
ldr d1, [sp, 1792]
ldr d0, [sp, 1752]
fmul d0, d1, d0
str d0, [sp, 1800]
ldr d1, [sp, 1120]
ldr d0, [sp, 1368]
bl pow
str d0, [sp, 1632]
ldr d1, [sp, 1632]
ldr d0, [sp, 1120]
fmul d1, d1, d0
ldr d0, [sp, 1368]
fdiv d0, d1, d0
str d0, [sp, 1640]
ldr d1, [sp, 1640]
ldr d0, [sp, 1384]
fmul d0, d1, d0
str d0, [sp, 1648]
ldr d0, [sp, 1264]
fneg d1, d0
fmov d2, 1.0e+0
ldr d0, [sp, 1368]
fsub d0, d2, d0
fmul d1, d1, d0
ldr d0, [sp, 1344]
fdiv d0, d1, d0
str d0, [sp, 1656]
ldr d0, [sp, 1344]
ldr d1, [sp, 1264]
fdiv d0, d1, d0
str d0, [sp, 1664]
fmov d1, 1.0e+0
ldr d0, [sp, 1368]
fsub d1, d1, d0
ldr d0, [sp, 1264]
fmul d1, d1, d0
ldr d0, [sp, 1344]
fmul d0, d0, d0
fdiv d0, d1, d0
str d0, [sp, 1672]
ldr d1, [sp, 1664]
ldr d0, [sp, 1384]
fmul d0, d1, d0
str d0, [sp, 1680]
ldr d1, [sp, 1672]
ldr d0, [sp, 1360]
fmul d0, d1, d0
ldr d1, [sp, 1680]
fadd d0, d1, d0
str d0, [sp, 1680]
ldr d0, [sp, 1656]
bl exp
str d0, [sp, 1688]
ldr d0, [sp, 1688]
str d0, [sp, 1696]
ldr d1, [sp, 1696]
ldr d0, [sp, 1680]
fmul d0, d1, d0
str d0, [sp, 1704]
ldr d1, [sp, 1632]
ldr d0, [sp, 1688]
fmul d0, d1, d0
str d0, [sp, 1416]
ldr d0, [sp, 1688]
str d0, [sp, 1712]
ldr d0, [sp, 1632]
str d0, [sp, 1720]
ldr d1, [sp, 1712]
ldr d0, [sp, 1648]
fmul d0, d1, d0
str d0, [sp, 1432]
ldr d1, [sp, 1720]
ldr d0, [sp, 1704]
fmul d0, d1, d0
ldr d1, [sp, 1432]
fadd d0, d1, d0
str d0, [sp, 1432]
ldr d0, [sp, 880]
fmov d1, 1.0e+0
fdiv d0, d1, d0
str d0, [sp, 1728]
ldr d1, [sp, 1728]
ldr d0, [sp, 1416]
bl pow
str d0, [sp, 1736]
ldr d1, [sp, 1736]
ldr d0, [sp, 1728]
fmul d1, d1, d0
ldr d0, [sp, 1416]
fdiv d0, d1, d0
str d0, [sp, 1744]
ldr d1, [sp, 1744]
ldr d0, [sp, 1432]
fmul d0, d1, d0
str d0, [sp, 1752]
ldr d1, [sp, 864]
ldr d0, [sp, 1736]
fmul d0, d1, d0
str d0, [sp, 1808]
ldr d0, [sp, 864]
str d0, [sp, 1816]
ldr d1, [sp, 1816]
ldr d0, [sp, 1752]
fmul d0, d1, d0
str d0, [sp, 1824]
ldr d1, [sp, 1128]
ldr d0, [sp, 1368]
bl pow
str d0, [sp, 1632]
ldr d1, [sp, 1632]
ldr d0, [sp, 1128]
fmul d1, d1, d0
ldr d0, [sp, 1368]
fdiv d0, d1, d0
str d0, [sp, 1640]
ldr d1, [sp, 1640]
ldr d0, [sp, 1384]
fmul d0, d1, d0
str d0, [sp, 1648]
ldr d0, [sp, 1072]
fneg d1, d0
fmov d2, 1.0e+0
ldr d0, [sp, 1368]
fsub d0, d2, d0
fmul d1, d1, d0
ldr d0, [sp, 1344]
fdiv d0, d1, d0
str d0, [sp, 1656]
ldr d0, [sp, 1344]
ldr d1, [sp, 1072]
fdiv d0, d1, d0
str d0, [sp, 1664]
fmov d1, 1.0e+0
ldr d0, [sp, 1368]
fsub d1, d1, d0
ldr d0, [sp, 1072]
fmul d1, d1, d0
ldr d0, [sp, 1344]
fmul d0, d0, d0
fdiv d0, d1, d0
str d0, [sp, 1672]
ldr d1, [sp, 1664]
ldr d0, [sp, 1384]
fmul d0, d1, d0
str d0, [sp, 1680]
ldr d1, [sp, 1672]
ldr d0, [sp, 1360]
fmul d0, d1, d0
ldr d1, [sp, 1680]
fadd d0, d1, d0
str d0, [sp, 1680]
ldr d0, [sp, 1656]
bl exp
str d0, [sp, 1688]
ldr d0, [sp, 1688]
str d0, [sp, 1696]
ldr d1, [sp, 1696]
ldr d0, [sp, 1680]
fmul d0, d1, d0
str d0, [sp, 1704]
ldr d1, [sp, 1632]
ldr d0, [sp, 1688]
fmul d0, d1, d0
str d0, [sp, 1416]
ldr d0, [sp, 1688]
str d0, [sp, 1712]
ldr d0, [sp, 1632]
str d0, [sp, 1720]
ldr d1, [sp, 1712]
ldr d0, [sp, 1648]
fmul d0, d1, d0
str d0, [sp, 1432]
ldr d1, [sp, 1720]
ldr d0, [sp, 1704]
fmul d0, d1, d0
ldr d1, [sp, 1432]
fadd d0, d1, d0
str d0, [sp, 1432]
ldr d0, [sp, 792]
fmov d1, 1.0e+0
fdiv d0, d1, d0
str d0, [sp, 1728]
ldr d1, [sp, 1728]
ldr d0, [sp, 1416]
bl pow
str d0, [sp, 1736]
ldr d1, [sp, 1736]
ldr d0, [sp, 1728]
fmul d1, d1, d0
ldr d0, [sp, 1416]
fdiv d0, d1, d0
str d0, [sp, 1744]
ldr d1, [sp, 1744]
ldr d0, [sp, 1432]
fmul d0, d1, d0
str d0, [sp, 1752]
ldr d1, [sp, 776]
ldr d0, [sp, 1736]
fmul d0, d1, d0
str d0, [sp, 1832]
ldr d0, [sp, 776]
str d0, [sp, 1840]
ldr d1, [sp, 1840]
ldr d0, [sp, 1752]
fmul d0, d1, d0
str d0, [sp, 1848]
ldr d1, [sp, 1136]
ldr d0, [sp, 1368]
bl pow
str d0, [sp, 1632]
ldr d1, [sp, 1632]
ldr d0, [sp, 1136]
fmul d1, d1, d0
ldr d0, [sp, 1368]
fdiv d0, d1, d0
str d0, [sp, 1640]
ldr d1, [sp, 1640]
ldr d0, [sp, 1384]
fmul d0, d1, d0
str d0, [sp, 1648]
ldr d0, [sp, 1096]
fneg d1, d0
fmov d2, 1.0e+0
ldr d0, [sp, 1368]
fsub d0, d2, d0
fmul d1, d1, d0
ldr d0, [sp, 1344]
fdiv d0, d1, d0
str d0, [sp, 1656]
ldr d0, [sp, 1344]
ldr d1, [sp, 1096]
fdiv d0, d1, d0
str d0, [sp, 1664]
fmov d1, 1.0e+0
ldr d0, [sp, 1368]
fsub d1, d1, d0
ldr d0, [sp, 1096]
fmul d1, d1, d0
ldr d0, [sp, 1344]
fmul d0, d0, d0
fdiv d0, d1, d0
str d0, [sp, 1672]
ldr d1, [sp, 1664]
ldr d0, [sp, 1384]
fmul d0, d1, d0
str d0, [sp, 1680]
ldr d1, [sp, 1672]
ldr d0, [sp, 1360]
fmul d0, d1, d0
ldr d1, [sp, 1680]
fadd d0, d1, d0
str d0, [sp, 1680]
ldr d0, [sp, 1656]
bl exp
str d0, [sp, 1688]
ldr d0, [sp, 1688]
str d0, [sp, 1696]
ldr d1, [sp, 1696]
ldr d0, [sp, 1680]
fmul d0, d1, d0
str d0, [sp, 1704]
ldr d1, [sp, 1632]
ldr d0, [sp, 1688]
fmul d0, d1, d0
str d0, [sp, 1416]
ldr d0, [sp, 1688]
str d0, [sp, 1712]
ldr d0, [sp, 1632]
str d0, [sp, 1720]
ldr d1, [sp, 1712]
ldr d0, [sp, 1648]
fmul d0, d1, d0
str d0, [sp, 1432]
ldr d1, [sp, 1720]
ldr d0, [sp, 1704]
fmul d0, d1, d0
ldr d1, [sp, 1432]
fadd d0, d1, d0
str d0, [sp, 1432]
ldr d0, [sp, 808]
fmov d1, 1.0e+0
fdiv d0, d1, d0
str d0, [sp, 1728]
ldr d1, [sp, 1728]
ldr d0, [sp, 1416]
bl pow
str d0, [sp, 1736]
ldr d1, [sp, 1736]
ldr d0, [sp, 1728]
fmul d1, d1, d0
ldr d0, [sp, 1416]
fdiv d0, d1, d0
str d0, [sp, 1744]
ldr d1, [sp, 1744]
ldr d0, [sp, 1432]
fmul d0, d1, d0
str d0, [sp, 1752]
ldr d1, [sp, 800]
ldr d0, [sp, 1736]
fmul d0, d1, d0
str d0, [sp, 1856]
ldr d0, [sp, 800]
str d0, [sp, 1864]
ldr d1, [sp, 1864]
ldr d0, [sp, 1752]
fmul d0, d1, d0
str d0, [sp, 1872]
ldr d1, [sp, 1128]
ldr d0, [sp, 1368]
bl pow
str d0, [sp, 1632]
ldr d1, [sp, 1632]
ldr d0, [sp, 1128]
fmul d1, d1, d0
ldr d0, [sp, 1368]
fdiv d0, d1, d0
str d0, [sp, 1640]
ldr d1, [sp, 1640]
ldr d0, [sp, 1384]
fmul d0, d1, d0
str d0, [sp, 1648]
ldr d0, [sp, 1080]
fneg d1, d0
fmov d2, 1.0e+0
ldr d0, [sp, 1368]
fsub d0, d2, d0
fmul d1, d1, d0
ldr d0, [sp, 1344]
fdiv d0, d1, d0
str d0, [sp, 1656]
ldr d0, [sp, 1344]
ldr d1, [sp, 1080]
fdiv d0, d1, d0
str d0, [sp, 1664]
fmov d1, 1.0e+0
ldr d0, [sp, 1368]
fsub d1, d1, d0
ldr d0, [sp, 1080]
fmul d1, d1, d0
ldr d0, [sp, 1344]
fmul d0, d0, d0
fdiv d0, d1, d0
str d0, [sp, 1672]
ldr d1, [sp, 1664]
ldr d0, [sp, 1384]
fmul d0, d1, d0
str d0, [sp, 1680]
ldr d1, [sp, 1672]
ldr d0, [sp, 1360]
fmul d0, d1, d0
ldr d1, [sp, 1680]
fadd d0, d1, d0
str d0, [sp, 1680]
ldr d0, [sp, 1656]
bl exp
str d0, [sp, 1688]
ldr d0, [sp, 1688]
str d0, [sp, 1696]
ldr d1, [sp, 1696]
ldr d0, [sp, 1680]
fmul d0, d1, d0
str d0, [sp, 1704]
ldr d1, [sp, 1632]
ldr d0, [sp, 1688]
fmul d0, d1, d0
str d0, [sp, 1416]
ldr d0, [sp, 1688]
str d0, [sp, 1712]
ldr d0, [sp, 1632]
str d0, [sp, 1720]
ldr d1, [sp, 1712]
ldr d0, [sp, 1648]
fmul d0, d1, d0
str d0, [sp, 1432]
ldr d1, [sp, 1720]
ldr d0, [sp, 1704]
fmul d0, d1, d0
ldr d1, [sp, 1432]
fadd d0, d1, d0
str d0, [sp, 1432]
ldr d0, [sp, 824]
fmov d1, 1.0e+0
fdiv d0, d1, d0
str d0, [sp, 1728]
ldr d1, [sp, 1728]
ldr d0, [sp, 1416]
bl pow
str d0, [sp, 1736]
ldr d1, [sp, 1736]
ldr d0, [sp, 1728]
fmul d1, d1, d0
ldr d0, [sp, 1416]
fdiv d0, d1, d0
str d0, [sp, 1744]
ldr d1, [sp, 1744]
ldr d0, [sp, 1432]
fmul d0, d1, d0
str d0, [sp, 1752]
ldr d1, [sp, 816]
ldr d0, [sp, 1736]
fmul d0, d1, d0
str d0, [sp, 1880]
ldr d0, [sp, 816]
str d0, [sp, 1888]
ldr d1, [sp, 1888]
ldr d0, [sp, 1752]
fmul d0, d1, d0
str d0, [sp, 1896]
ldr d1, [sp, 1136]
ldr d0, [sp, 1368]
bl pow
str d0, [sp, 1632]
ldr d1, [sp, 1632]
ldr d0, [sp, 1136]
fmul d1, d1, d0
ldr d0, [sp, 1368]
fdiv d0, d1, d0
str d0, [sp, 1640]
ldr d1, [sp, 1640]
ldr d0, [sp, 1384]
fmul d0, d1, d0
str d0, [sp, 1648]
ldr d0, [sp, 1104]
fneg d1, d0
fmov d2, 1.0e+0
ldr d0, [sp, 1368]
fsub d0, d2, d0
fmul d1, d1, d0
ldr d0, [sp, 1344]
fdiv d0, d1, d0
str d0, [sp, 1656]
ldr d0, [sp, 1344]
ldr d1, [sp, 1104]
fdiv d0, d1, d0
str d0, [sp, 1664]
fmov d1, 1.0e+0
ldr d0, [sp, 1368]
fsub d1, d1, d0
ldr d0, [sp, 1104]
fmul d1, d1, d0
ldr d0, [sp, 1344]
fmul d0, d0, d0
fdiv d0, d1, d0
str d0, [sp, 1672]
ldr d1, [sp, 1664]
ldr d0, [sp, 1384]
fmul d0, d1, d0
str d0, [sp, 1680]
ldr d1, [sp, 1672]
ldr d0, [sp, 1360]
fmul d0, d1, d0
ldr d1, [sp, 1680]
fadd d0, d1, d0
str d0, [sp, 1680]
ldr d0, [sp, 1656]
bl exp
str d0, [sp, 1688]
ldr d0, [sp, 1688]
str d0, [sp, 1696]
ldr d1, [sp, 1696]
ldr d0, [sp, 1680]
fmul d0, d1, d0
str d0, [sp, 1704]
ldr d1, [sp, 1632]
ldr d0, [sp, 1688]
fmul d0, d1, d0
str d0, [sp, 1416]
ldr d0, [sp, 1688]
str d0, [sp, 1712]
ldr d0, [sp, 1632]
str d0, [sp, 1720]
ldr d1, [sp, 1712]
ldr d0, [sp, 1648]
fmul d0, d1, d0
str d0, [sp, 1432]
ldr d1, [sp, 1720]
ldr d0, [sp, 1704]
fmul d0, d1, d0
ldr d1, [sp, 1432]
fadd d0, d1, d0
str d0, [sp, 1432]
ldr d0, [sp, 840]
fmov d1, 1.0e+0
fdiv d0, d1, d0
str d0, [sp, 1728]
ldr d1, [sp, 1728]
ldr d0, [sp, 1416]
bl pow
str d0, [sp, 1736]
ldr d1, [sp, 1736]
ldr d0, [sp, 1728]
fmul d1, d1, d0
ldr d0, [sp, 1416]
fdiv d0, d1, d0
str d0, [sp, 1744]
ldr d1, [sp, 1744]
ldr d0, [sp, 1432]
fmul d0, d1, d0
str d0, [sp, 1752]
ldr d1, [sp, 832]
ldr d0, [sp, 1736]
fmul d0, d1, d0
str d0, [sp, 1904]
ldr d0, [sp, 832]
str d0, [sp, 1912]
ldr d1, [sp, 1912]
ldr d0, [sp, 1752]
fmul d0, d1, d0
str d0, [sp, 1920]
ldr d1, [sp, 1128]
ldr d0, [sp, 1368]
bl pow
str d0, [sp, 1632]
ldr d1, [sp, 1632]
ldr d0, [sp, 1128]
fmul d1, d1, d0
ldr d0, [sp, 1368]
fdiv d0, d1, d0
str d0, [sp, 1640]
ldr d1, [sp, 1640]
ldr d0, [sp, 1384]
fmul d0, d1, d0
str d0, [sp, 1648]
ldr d0, [sp, 1080]
fneg d1, d0
fmov d2, 1.0e+0
ldr d0, [sp, 1368]
fsub d0, d2, d0
fmul d1, d1, d0
ldr d0, [sp, 1344]
fdiv d0, d1, d0
str d0, [sp, 1656]
ldr d0, [sp, 1344]
ldr d1, [sp, 1080]
fdiv d0, d1, d0
str d0, [sp, 1664]
fmov d1, 1.0e+0
ldr d0, [sp, 1368]
fsub d1, d1, d0
ldr d0, [sp, 1080]
fmul d1, d1, d0
ldr d0, [sp, 1344]
fmul d0, d0, d0
fdiv d0, d1, d0
str d0, [sp, 1672]
ldr d1, [sp, 1664]
ldr d0, [sp, 1384]
fmul d0, d1, d0
str d0, [sp, 1680]
ldr d1, [sp, 1672]
ldr d0, [sp, 1360]
fmul d0, d1, d0
ldr d1, [sp, 1680]
fadd d0, d1, d0
str d0, [sp, 1680]
ldr d0, [sp, 1656]
bl exp
str d0, [sp, 1688]
ldr d0, [sp, 1688]
str d0, [sp, 1696]
ldr d1, [sp, 1696]
ldr d0, [sp, 1680]
fmul d0, d1, d0
str d0, [sp, 1704]
ldr d1, [sp, 1632]
ldr d0, [sp, 1688]
fmul d0, d1, d0
str d0, [sp, 1416]
ldr d0, [sp, 1688]
str d0, [sp, 1712]
ldr d0, [sp, 1632]
str d0, [sp, 1720]
ldr d1, [sp, 1712]
ldr d0, [sp, 1648]
fmul d0, d1, d0
str d0, [sp, 1432]
ldr d1, [sp, 1720]
ldr d0, [sp, 1704]
fmul d0, d1, d0
ldr d1, [sp, 1432]
fadd d0, d1, d0
str d0, [sp, 1432]
ldr d0, [sp, 824]
fmov d1, 1.0e+0
fdiv d0, d1, d0
str d0, [sp, 1728]
ldr d1, [sp, 1728]
ldr d0, [sp, 1416]
bl pow
str d0, [sp, 1736]
ldr d1, [sp, 1736]
ldr d0, [sp, 1728]
fmul d1, d1, d0
ldr d0, [sp, 1416]
fdiv d0, d1, d0
str d0, [sp, 1744]
ldr d1, [sp, 1744]
ldr d0, [sp, 1432]
fmul d0, d1, d0
str d0, [sp, 1752]
ldr d1, [sp, 888]
ldr d0, [sp, 1736]
fmul d0, d1, d0
str d0, [sp, 1928]
ldr d0, [sp, 888]
str d0, [sp, 1936]
ldr d1, [sp, 1936]
ldr d0, [sp, 1752]
fmul d0, d1, d0
str d0, [sp, 1944]
ldr d1, [sp, 1136]
ldr d0, [sp, 1368]
bl pow
str d0, [sp, 1632]
ldr d1, [sp, 1632]
ldr d0, [sp, 1136]
fmul d1, d1, d0
ldr d0, [sp, 1368]
fdiv d0, d1, d0
str d0, [sp, 1640]
ldr d1, [sp, 1640]
ldr d0, [sp, 1384]
fmul d0, d1, d0
str d0, [sp, 1648]
ldr d0, [sp, 1104]
fneg d1, d0
fmov d2, 1.0e+0
ldr d0, [sp, 1368]
fsub d0, d2, d0
fmul d1, d1, d0
ldr d0, [sp, 1344]
fdiv d0, d1, d0
str d0, [sp, 1656]
ldr d0, [sp, 1344]
ldr d1, [sp, 1104]
fdiv d0, d1, d0
str d0, [sp, 1664]
fmov d1, 1.0e+0
ldr d0, [sp, 1368]
fsub d1, d1, d0
ldr d0, [sp, 1104]
fmul d1, d1, d0
ldr d0, [sp, 1344]
fmul d0, d0, d0
fdiv d0, d1, d0
str d0, [sp, 1672]
ldr d1, [sp, 1664]
ldr d0, [sp, 1384]
fmul d0, d1, d0
str d0, [sp, 1680]
ldr d1, [sp, 1672]
ldr d0, [sp, 1360]
fmul d0, d1, d0
ldr d1, [sp, 1680]
fadd d0, d1, d0
str d0, [sp, 1680]
ldr d0, [sp, 1656]
bl exp
str d0, [sp, 1688]
ldr d0, [sp, 1688]
str d0, [sp, 1696]
ldr d1, [sp, 1696]
ldr d0, [sp, 1680]
fmul d0, d1, d0
str d0, [sp, 1704]
ldr d1, [sp, 1632]
ldr d0, [sp, 1688]
fmul d0, d1, d0
str d0, [sp, 1416]
ldr d0, [sp, 1688]
str d0, [sp, 1712]
ldr d0, [sp, 1632]
str d0, [sp, 1720]
ldr d1, [sp, 1712]
ldr d0, [sp, 1648]
fmul d0, d1, d0
str d0, [sp, 1432]
ldr d1, [sp, 1720]
ldr d0, [sp, 1704]
fmul d0, d1, d0
ldr d1, [sp, 1432]
fadd d0, d1, d0
str d0, [sp, 1432]
ldr d0, [sp, 840]
fmov d1, 1.0e+0
fdiv d0, d1, d0
str d0, [sp, 1728]
ldr d1, [sp, 1728]
ldr d0, [sp, 1416]
bl pow
str d0, [sp, 1736]
ldr d1, [sp, 1736]
ldr d0, [sp, 1728]
fmul d1, d1, d0
ldr d0, [sp, 1416]
fdiv d0, d1, d0
str d0, [sp, 1744]
ldr d1, [sp, 1744]
ldr d0, [sp, 1432]
fmul d0, d1, d0
str d0, [sp, 1752]
ldr d1, [sp, 896]
ldr d0, [sp, 1736]
fmul d0, d1, d0
str d0, [sp, 1952]
ldr d0, [sp, 896]
str d0, [sp, 1960]
ldr d1, [sp, 1960]
ldr d0, [sp, 1752]
fmul d0, d1, d0
str d0, [sp, 1968]
ldr d1, [sp, 1128]
ldr d0, [sp, 1368]
bl pow
str d0, [sp, 1632]
ldr d1, [sp, 1632]
ldr d0, [sp, 1128]
fmul d1, d1, d0
ldr d0, [sp, 1368]
fdiv d0, d1, d0
str d0, [sp, 1640]
ldr d1, [sp, 1640]
ldr d0, [sp, 1384]
fmul d0, d1, d0
str d0, [sp, 1648]
ldr d0, [sp, 1088]
fneg d1, d0
fmov d2, 1.0e+0
ldr d0, [sp, 1368]
fsub d0, d2, d0
fmul d1, d1, d0
ldr d0, [sp, 1344]
fdiv d0, d1, d0
str d0, [sp, 1656]
ldr d0, [sp, 1344]
ldr d1, [sp, 1088]
fdiv d0, d1, d0
str d0, [sp, 1664]
fmov d1, 1.0e+0
ldr d0, [sp, 1368]
fsub d1, d1, d0
ldr d0, [sp, 1088]
fmul d1, d1, d0
ldr d0, [sp, 1344]
fmul d0, d0, d0
fdiv d0, d1, d0
str d0, [sp, 1672]
ldr d1, [sp, 1664]
ldr d0, [sp, 1384]
fmul d0, d1, d0
str d0, [sp, 1680]
ldr d1, [sp, 1672]
ldr d0, [sp, 1360]
fmul d0, d1, d0
ldr d1, [sp, 1680]
fadd d0, d1, d0
str d0, [sp, 1680]
ldr d0, [sp, 1656]
bl exp
str d0, [sp, 1688]
ldr d0, [sp, 1688]
str d0, [sp, 1696]
ldr d1, [sp, 1696]
ldr d0, [sp, 1680]
fmul d0, d1, d0
str d0, [sp, 1704]
ldr d1, [sp, 1632]
ldr d0, [sp, 1688]
fmul d0, d1, d0
str d0, [sp, 1416]
ldr d0, [sp, 1688]
str d0, [sp, 1712]
ldr d0, [sp, 1632]
str d0, [sp, 1720]
ldr d1, [sp, 1712]
ldr d0, [sp, 1648]
fmul d0, d1, d0
str d0, [sp, 1432]
ldr d1, [sp, 1720]
ldr d0, [sp, 1704]
fmul d0, d1, d0
ldr d1, [sp, 1432]
fadd d0, d1, d0
str d0, [sp, 1432]
ldr d0, [sp, 912]
fmov d1, 1.0e+0
fdiv d0, d1, d0
str d0, [sp, 1728]
ldr d1, [sp, 1728]
ldr d0, [sp, 1416]
bl pow
str d0, [sp, 1736]
ldr d1, [sp, 1736]
ldr d0, [sp, 1728]
fmul d1, d1, d0
ldr d0, [sp, 1416]
fdiv d0, d1, d0
str d0, [sp, 1744]
ldr d1, [sp, 1744]
ldr d0, [sp, 1432]
fmul d0, d1, d0
str d0, [sp, 1752]
ldr d1, [sp, 904]
ldr d0, [sp, 1736]
fmul d0, d1, d0
str d0, [sp, 1976]
ldr d0, [sp, 904]
str d0, [sp, 1984]
ldr d1, [sp, 1984]
ldr d0, [sp, 1752]
fmul d0, d1, d0
str d0, [sp, 1992]
ldr d1, [sp, 1136]
ldr d0, [sp, 1368]
bl pow
str d0, [sp, 1632]
ldr d1, [sp, 1632]
ldr d0, [sp, 1136]
fmul d1, d1, d0
ldr d0, [sp, 1368]
fdiv d0, d1, d0
str d0, [sp, 1640]
ldr d1, [sp, 1640]
ldr d0, [sp, 1384]
fmul d0, d1, d0
str d0, [sp, 1648]
ldr d0, [sp, 1112]
fneg d1, d0
fmov d2, 1.0e+0
ldr d0, [sp, 1368]
fsub d0, d2, d0
fmul d1, d1, d0
ldr d0, [sp, 1344]
fdiv d0, d1, d0
str d0, [sp, 1656]
ldr d0, [sp, 1344]
ldr d1, [sp, 1112]
fdiv d0, d1, d0
str d0, [sp, 1664]
fmov d1, 1.0e+0
ldr d0, [sp, 1368]
fsub d1, d1, d0
ldr d0, [sp, 1112]
fmul d1, d1, d0
ldr d0, [sp, 1344]
fmul d0, d0, d0
fdiv d0, d1, d0
str d0, [sp, 1672]
ldr d1, [sp, 1664]
ldr d0, [sp, 1384]
fmul d0, d1, d0
str d0, [sp, 1680]
ldr d1, [sp, 1672]
ldr d0, [sp, 1360]
fmul d0, d1, d0
ldr d1, [sp, 1680]
fadd d0, d1, d0
str d0, [sp, 1680]
ldr d0, [sp, 1656]
bl exp
str d0, [sp, 1688]
ldr d0, [sp, 1688]
str d0, [sp, 1696]
ldr d1, [sp, 1696]
ldr d0, [sp, 1680]
fmul d0, d1, d0
str d0, [sp, 1704]
ldr d1, [sp, 1632]
ldr d0, [sp, 1688]
fmul d0, d1, d0
str d0, [sp, 1416]
ldr d0, [sp, 1688]
str d0, [sp, 1712]
ldr d0, [sp, 1632]
str d0, [sp, 1720]
ldr d1, [sp, 1712]
ldr d0, [sp, 1648]
fmul d0, d1, d0
str d0, [sp, 1432]
ldr d1, [sp, 1720]
ldr d0, [sp, 1704]
fmul d0, d1, d0
ldr d1, [sp, 1432]
fadd d0, d1, d0
str d0, [sp, 1432]
ldr d0, [sp, 928]
fmov d1, 1.0e+0
fdiv d0, d1, d0
str d0, [sp, 1728]
ldr d1, [sp, 1728]
ldr d0, [sp, 1416]
bl pow
str d0, [sp, 1736]
ldr d1, [sp, 1736]
ldr d0, [sp, 1728]
fmul d1, d1, d0
ldr d0, [sp, 1416]
fdiv d0, d1, d0
str d0, [sp, 1744]
ldr d1, [sp, 1744]
ldr d0, [sp, 1432]
fmul d0, d1, d0
str d0, [sp, 1752]
ldr d1, [sp, 920]
ldr d0, [sp, 1736]
fmul d0, d1, d0
str d0, [sp, 2000]
ldr d0, [sp, 920]
str d0, [sp, 2008]
ldr d1, [sp, 2008]
ldr d0, [sp, 1752]
fmul d0, d1, d0
str d0, [sp, 2016]
ldr d1, [sp, 1392]
ldr d0, [sp, 1144]
fmul d1, d1, d0
fmov d0, 1.0e+0
fadd d0, d1, d0
ldr d1, [sp, 632]
fmul d0, d1, d0
str d0, [sp, 2024]
ldr d1, [sp, 632]
ldr d0, [sp, 1144]
fmul d0, d1, d0
str d0, [sp, 2032]
ldr d1, [sp, 2032]
ldr d0, [sp, 1408]
fmul d0, d1, d0
str d0, [sp, 2040]
ldr d1, [sp, 1392]
ldr d0, [sp, 1144]
fmul d1, d1, d0
fmov d0, 1.0e+0
fadd d0, d1, d0
ldr d1, [sp, 640]
fmul d0, d1, d0
str d0, [sp, 2048]
ldr d1, [sp, 640]
ldr d0, [sp, 1144]
fmul d0, d1, d0
str d0, [sp, 2056]
ldr d1, [sp, 2056]
ldr d0, [sp, 1408]
fmul d0, d1, d0
str d0, [sp, 2064]
ldr d1, [sp, 1392]
ldr d0, [sp, 1152]
fmul d1, d1, d0
fmov d0, 1.0e+0
fadd d0, d1, d0
ldr d1, [sp, 856]
fmul d0, d1, d0
str d0, [sp, 2072]
ldr d1, [sp, 856]
ldr d0, [sp, 1152]
fmul d0, d1, d0
str d0, [sp, 2080]
ldr d1, [sp, 2080]
ldr d0, [sp, 1408]
fmul d0, d1, d0
str d0, [sp, 2088]
ldr d1, [sp, 1392]
ldr d0, [sp, 1304]
fmul d1, d1, d0
ldr d0, [sp, 1296]
fadd d1, d1, d0
ldr d0, [sp, 1392]
fmul d1, d1, d0
fmov d0, 1.0e+0
fadd d0, d1, d0
ldr d1, [sp, 1272]
fmul d0, d1, d0
str d0, [sp, 2096]
ldr d0, [sp, 1392]
fadd d1, d0, d0
ldr d0, [sp, 1304]
fmul d1, d1, d0
ldr d0, [sp, 1296]
fadd d0, d1, d0
ldr d1, [sp, 1272]
fmul d0, d1, d0
str d0, [sp, 2104]
ldr d1, [sp, 2104]
ldr d0, [sp, 1408]
fmul d0, d1, d0
str d0, [sp, 2112]
ldr d1, [sp, 1392]
ldr d0, [sp, 1312]
fmul d1, d1, d0
fmov d0, 1.0e+0
fadd d0, d1, d0
ldr d1, [sp, 1280]
fmul d0, d1, d0
str d0, [sp, 2120]
ldr d1, [sp, 1280]
ldr d0, [sp, 1312]
fmul d0, d1, d0
str d0, [sp, 2128]
ldr d1, [sp, 2128]
ldr d0, [sp, 1408]
fmul d0, d1, d0
str d0, [sp, 2136]
ldr d1, [sp, 672]
fmov d0, 5.0e-1
fmul d1, d1, d0
ldr d0, [sp, 1368]
fmul d1, d1, d0
ldr d0, [sp, 1344]
fdiv d0, d1, d0
str d0, [sp, 1632]
ldr d1, [sp, 672]
fmov d0, 5.0e-1
fmul d1, d1, d0
ldr d0, [sp, 1344]
fdiv d0, d1, d0
str d0, [sp, 1640]
ldr d1, [sp, 672]
fmov d0, -5.0e-1
fmul d1, d1, d0
ldr d0, [sp, 1368]
fmul d1, d1, d0
ldr d0, [sp, 1344]
fmul d0, d0, d0
fdiv d0, d1, d0
str d0, [sp, 2144]
ldr d1, [sp, 1640]
ldr d0, [sp, 1384]
fmul d0, d1, d0
str d0, [sp, 1648]
ldr d1, [sp, 2144]
ldr d0, [sp, 1360]
fmul d0, d1, d0
ldr d1, [sp, 1648]
fadd d0, d1, d0
str d0, [sp, 1648]
ldr d0, [sp, 1632]
bl exp
str d0, [sp, 1656]
ldr d0, [sp, 1656]
str d0, [sp, 2152]
ldr d1, [sp, 2152]
ldr d0, [sp, 1648]
fmul d0, d1, d0
str d0, [sp, 1680]
ldr d1, [sp, 672]
fmov d0, -5.0e-1
fmul d1, d1, d0
ldr d0, [sp, 1368]
fmul d1, d1, d0
ldr d0, [sp, 1344]
fdiv d0, d1, d0
str d0, [sp, 1688]
ldr d1, [sp, 672]
fmov d0, -5.0e-1
fmul d1, d1, d0
ldr d0, [sp, 1344]
fdiv d0, d1, d0
str d0, [sp, 2160]
ldr d1, [sp, 672]
fmov d0, 5.0e-1
fmul d1, d1, d0
ldr d0, [sp, 1368]
fmul d1, d1, d0
ldr d0, [sp, 1344]
fmul d0, d0, d0
fdiv d0, d1, d0
str d0, [sp, 2168]
ldr d1, [sp, 2160]
ldr d0, [sp, 1384]
fmul d0, d1, d0
str d0, [sp, 1704]
ldr d1, [sp, 2168]
ldr d0, [sp, 1360]
fmul d0, d1, d0
ldr d1, [sp, 1704]
fadd d0, d1, d0
str d0, [sp, 1704]
ldr d0, [sp, 1688]
bl exp
str d0, [sp, 1728]
ldr d0, [sp, 1728]
str d0, [sp, 2176]
ldr d1, [sp, 2176]
ldr d0, [sp, 1704]
fmul d0, d1, d0
str d0, [sp, 2184]
ldr d1, [sp, 1656]
ldr d0, [sp, 1728]
fsub d0, d1, d0
str d0, [sp, 1416]
fmov d0, 1.0e+0
str d0, [sp, 2192]
fmov d0, -1.0e+0
str d0, [sp, 2200]
ldr d1, [sp, 2192]
ldr d0, [sp, 1680]
fmul d0, d1, d0
str d0, [sp, 1432]
ldr d1, [sp, 2200]
ldr d0, [sp, 2184]
fmul d0, d1, d0
ldr d1, [sp, 1432]
fadd d0, d1, d0
str d0, [sp, 1432]
ldr d0, [sp, 1416]
bl log
str d0, [sp, 1736]
ldr d0, [sp, 1416]
fmov d1, 1.0e+0
fdiv d0, d1, d0
str d0, [sp, 1744]
ldr d1, [sp, 1744]
ldr d0, [sp, 1432]
fmul d0, d1, d0
str d0, [sp, 1752]
ldr d0, [sp, 1368]
ldr d1, [sp, 1344]
fdiv d0, d1, d0
fadd d0, d0, d0
ldr d1, [sp, 1736]
fmul d0, d1, d0
str d0, [sp, 2208]
ldr d0, [sp, 1736]
fadd d1, d0, d0
ldr d0, [sp, 1368]
fdiv d0, d1, d0
str d0, [sp, 2216]
ldr d1, [sp, 1344]
fmov d0, -2.0e+0
fmul d1, d1, d0
ldr d0, [sp, 1736]
fmul d1, d1, d0
ldr d0, [sp, 1368]
fmul d0, d0, d0
fdiv d0, d1, d0
str d0, [sp, 2224]
ldr d0, [sp, 1344]
fadd d1, d0, d0
ldr d0, [sp, 1368]
fdiv d0, d1, d0
str d0, [sp, 2232]
ldr d1, [sp, 2216]
ldr d0, [sp, 1360]
fmul d0, d1, d0
str d0, [sp, 2240]
ldr d1, [sp, 2224]
ldr d0, [sp, 1384]
fmul d0, d1, d0
ldr d1, [sp, 2240]
fadd d0, d1, d0
str d0, [sp, 2240]
ldr d1, [sp, 2232]
ldr d0, [sp, 1752]
fmul d0, d1, d0
ldr d1, [sp, 2240]
fadd d0, d1, d0
str d0, [sp, 2240]
ldr d0, [sp, 1368]
bl log
str d0, [sp, 1416]
ldr d0, [sp, 1368]
fmov d1, 1.0e+0
fdiv d0, d1, d0
str d0, [sp, 1424]
ldr d1, [sp, 1424]
ldr d0, [sp, 1384]
fmul d0, d1, d0
str d0, [sp, 1432]
ldr d1, [sp, 2208]
ldr d0, [sp, 1368]
fmul d1, d1, d0
ldr d2, [sp, 1344]
fmov d0, 3.0e+0
fmul d2, d2, d0
ldr d0, [sp, 1416]
fmul d0, d2, d0
fsub d1, d1, d0
ldr d2, [sp, 1368]
fmov d0, 1.0e+0
fsub d2, d2, d0
ldr d0, [sp, 1072]
fmul d0, d2, d0
fsub d0, d1, d0
str d0, [sp, 2248]
ldr d0, [sp, 1368]
str d0, [sp, 2256]
ldr d1, [sp, 2208]
ldr d0, [sp, 1072]
fsub d0, d1, d0
str d0, [sp, 2264]
ldr d1, [sp, 1416]
fmov d0, -3.0e+0
fmul d0, d1, d0
str d0, [sp, 2272]
ldr d1, [sp, 1344]
fmov d0, -3.0e+0
fmul d0, d1, d0
str d0, [sp, 2280]
ldr d1, [sp, 2256]
ldr d0, [sp, 2240]
fmul d0, d1, d0
str d0, [sp, 2288]
ldr d1, [sp, 2264]
ldr d0, [sp, 1384]
fmul d0, d1, d0
ldr d1, [sp, 2288]
fadd d0, d1, d0
str d0, [sp, 2288]
ldr d1, [sp, 2272]
ldr d0, [sp, 1360]
fmul d0, d1, d0
ldr d1, [sp, 2288]
fadd d0, d1, d0
str d0, [sp, 2288]
ldr d1, [sp, 2280]
ldr d0, [sp, 1432]
fmul d0, d1, d0
ldr d1, [sp, 2288]
fadd d0, d1, d0
str d0, [sp, 2288]
ldr d0, [sp, 2248]
fneg d1, d0
ldr d0, [sp, 1344]
fdiv d0, d1, d0
str d0, [sp, 1632]
ldr d0, [sp, 1344]
fmov d1, -1.0e+0
fdiv d0, d1, d0
str d0, [sp, 2296]
ldr d0, [sp, 1344]
fmul d0, d0, d0
ldr d1, [sp, 2248]
fdiv d0, d1, d0
str d0, [sp, 2144]
ldr d1, [sp, 2296]
ldr d0, [sp, 2288]
fmul d0, d1, d0
str d0, [sp, 1648]
ldr d1, [sp, 2144]
ldr d0, [sp, 1360]
fmul d0, d1, d0
ldr d1, [sp, 1648]
fadd d0, d1, d0
str d0, [sp, 1648]
ldr d0, [sp, 1632]
bl exp
str d0, [sp, 1656]
ldr d0, [sp, 1656]
str d0, [sp, 2152]
ldr d1, [sp, 2152]
ldr d0, [sp, 1648]
fmul d0, d1, d0
str d0, [sp, 1680]
ldr d1, [sp, 1656]
fmov d0, 4.0e+0
fmul d1, d1, d0
fmov d0, 1.0e+0
fadd d0, d1, d0
bl sqrt
fmov d1, d0
fmov d0, 1.0e+0
fadd d1, d1, d0
fmov d0, 5.0e-1
fmul d0, d1, d0
str d0, [sp, 1416]
ldr d1, [sp, 1656]
fmov d0, 4.0e+0
fmul d1, d1, d0
fmov d0, 1.0e+0
fadd d0, d1, d0
bl sqrt
fmov d1, d0
fmov d0, 1.0e+0
fdiv d0, d0, d1
str d0, [sp, 2192]
ldr d1, [sp, 2192]
ldr d0, [sp, 1680]
fmul d0, d1, d0
str d0, [sp, 1432]
ldr d0, [sp, 1416]
bl log
str d0, [sp, 1688]
ldr d0, [sp, 1416]
fmov d1, 1.0e+0
fdiv d0, d1, d0
str d0, [sp, 2304]
ldr d1, [sp, 2304]
ldr d0, [sp, 1432]
fmul d0, d1, d0
str d0, [sp, 1704]
ldr d0, [sp, 1344]
fadd d1, d0, d0
ldr d0, [sp, 1688]
fmul d0, d1, d0
ldr d1, [sp, 2248]
fadd d0, d1, d0
str d0, [sp, 2312]
fmov d0, 1.0e+0
str d0, [sp, 2320]
ldr d0, [sp, 1688]
fadd d0, d0, d0
str d0, [sp, 2328]
ldr d0, [sp, 1344]
fadd d0, d0, d0
str d0, [sp, 2336]
ldr d1, [sp, 2320]
ldr d0, [sp, 2288]
fmul d0, d1, d0
str d0, [sp, 2344]
ldr d1, [sp, 2328]
ldr d0, [sp, 1360]
fmul d0, d1, d0
ldr d1, [sp, 2344]
fadd d0, d1, d0
str d0, [sp, 2344]
ldr d1, [sp, 2336]
ldr d0, [sp, 1704]
fmul d0, d1, d0
ldr d1, [sp, 2344]
fadd d0, d1, d0
str d0, [sp, 2344]
ldr d1, [sp, 728]
fmov d0, 5.0e-1
fmul d1, d1, d0
ldr d0, [sp, 1368]
fmul d1, d1, d0
ldr d0, [sp, 1344]
fdiv d0, d1, d0
str d0, [sp, 1632]
ldr d1, [sp, 728]
fmov d0, 5.0e-1
fmul d1, d1, d0
ldr d0, [sp, 1344]
fdiv d0, d1, d0
str d0, [sp, 1640]
ldr d1, [sp, 728]
fmov d0, -5.0e-1
fmul d1, d1, d0
ldr d0, [sp, 1368]
fmul d1, d1, d0
ldr d0, [sp, 1344]
fmul d0, d0, d0
fdiv d0, d1, d0
str d0, [sp, 2144]
ldr d1, [sp, 1640]
ldr d0, [sp, 1384]
fmul d0, d1, d0
str d0, [sp, 1648]
ldr d1, [sp, 2144]
ldr d0, [sp, 1360]
fmul d0, d1, d0
ldr d1, [sp, 1648]
fadd d0, d1, d0
str d0, [sp, 1648]
ldr d0, [sp, 1632]
bl exp
str d0, [sp, 1656]
ldr d0, [sp, 1656]
str d0, [sp, 2152]
ldr d1, [sp, 2152]
ldr d0, [sp, 1648]
fmul d0, d1, d0
str d0, [sp, 1680]
ldr d1, [sp, 728]
fmov d0, -5.0e-1
fmul d1, d1, d0
ldr d0, [sp, 1368]
fmul d1, d1, d0
ldr d0, [sp, 1344]
fdiv d0, d1, d0
str d0, [sp, 1688]
ldr d1, [sp, 728]
fmov d0, -5.0e-1
fmul d1, d1, d0
ldr d0, [sp, 1344]
fdiv d0, d1, d0
str d0, [sp, 2160]
ldr d1, [sp, 728]
fmov d0, 5.0e-1
fmul d1, d1, d0
ldr d0, [sp, 1368]
fmul d1, d1, d0
ldr d0, [sp, 1344]
fmul d0, d0, d0
fdiv d0, d1, d0
str d0, [sp, 2168]
ldr d1, [sp, 2160]
ldr d0, [sp, 1384]
fmul d0, d1, d0
str d0, [sp, 1704]
ldr d1, [sp, 2168]
ldr d0, [sp, 1360]
fmul d0, d1, d0
ldr d1, [sp, 1704]
fadd d0, d1, d0
str d0, [sp, 1704]
ldr d0, [sp, 1688]
bl exp
str d0, [sp, 1728]
ldr d0, [sp, 1728]
str d0, [sp, 2176]
ldr d1, [sp, 2176]
ldr d0, [sp, 1704]
fmul d0, d1, d0
str d0, [sp, 2184]
ldr d1, [sp, 1656]
ldr d0, [sp, 1728]
fsub d0, d1, d0
str d0, [sp, 1416]
fmov d0, 1.0e+0
str d0, [sp, 2192]
fmov d0, -1.0e+0
str d0, [sp, 2200]
ldr d1, [sp, 2192]
ldr d0, [sp, 1680]
fmul d0, d1, d0
str d0, [sp, 1432]
ldr d1, [sp, 2200]
ldr d0, [sp, 2184]
fmul d0, d1, d0
ldr d1, [sp, 1432]
fadd d0, d1, d0
str d0, [sp, 1432]
ldr d0, [sp, 1416]
bl log
str d0, [sp, 1736]
ldr d0, [sp, 1416]
fmov d1, 1.0e+0
fdiv d0, d1, d0
str d0, [sp, 1744]
ldr d1, [sp, 1744]
ldr d0, [sp, 1432]
fmul d0, d1, d0
str d0, [sp, 1752]
ldr d0, [sp, 1368]
ldr d1, [sp, 1344]
fdiv d0, d1, d0
fadd d0, d0, d0
ldr d1, [sp, 1736]
fmul d0, d1, d0
str d0, [sp, 2208]
ldr d0, [sp, 1736]
fadd d1, d0, d0
ldr d0, [sp, 1368]
fdiv d0, d1, d0
str d0, [sp, 2216]
ldr d1, [sp, 1344]
fmov d0, -2.0e+0
fmul d1, d1, d0
ldr d0, [sp, 1736]
fmul d1, d1, d0
ldr d0, [sp, 1368]
fmul d0, d0, d0
fdiv d0, d1, d0
str d0, [sp, 2224]
ldr d0, [sp, 1344]
fadd d1, d0, d0
ldr d0, [sp, 1368]
fdiv d0, d1, d0
str d0, [sp, 2232]
ldr d1, [sp, 2216]
ldr d0, [sp, 1360]
fmul d0, d1, d0
str d0, [sp, 2240]
ldr d1, [sp, 2224]
ldr d0, [sp, 1384]
fmul d0, d1, d0
ldr d1, [sp, 2240]
fadd d0, d1, d0
str d0, [sp, 2240]
ldr d1, [sp, 2232]
ldr d0, [sp, 1752]
fmul d0, d1, d0
ldr d1, [sp, 2240]
fadd d0, d1, d0
str d0, [sp, 2240]
ldr d0, [sp, 1368]
bl log
str d0, [sp, 1416]
ldr d0, [sp, 1368]
fmov d1, 1.0e+0
fdiv d0, d1, d0
str d0, [sp, 1424]
ldr d1, [sp, 1424]
ldr d0, [sp, 1384]
fmul d0, d1, d0
str d0, [sp, 1432]
ldr d1, [sp, 2208]
ldr d0, [sp, 1368]
fmul d1, d1, d0
ldr d2, [sp, 1344]
fmov d0, 3.0e+0
fmul d2, d2, d0
ldr d0, [sp, 1416]
fmul d0, d2, d0
fsub d1, d1, d0
ldr d2, [sp, 1368]
fmov d0, 1.0e+0
fsub d2, d2, d0
ldr d0, [sp, 1080]
fmul d0, d2, d0
fsub d0, d1, d0
str d0, [sp, 2248]
ldr d0, [sp, 1368]
str d0, [sp, 2256]
ldr d1, [sp, 2208]
ldr d0, [sp, 1080]
fsub d0, d1, d0
str d0, [sp, 2264]
ldr d1, [sp, 1416]
fmov d0, -3.0e+0
fmul d0, d1, d0
str d0, [sp, 2272]
ldr d1, [sp, 1344]
fmov d0, -3.0e+0
fmul d0, d1, d0
str d0, [sp, 2280]
ldr d1, [sp, 2256]
ldr d0, [sp, 2240]
fmul d0, d1, d0
str d0, [sp, 2288]
ldr d1, [sp, 2264]
ldr d0, [sp, 1384]
fmul d0, d1, d0
ldr d1, [sp, 2288]
fadd d0, d1, d0
str d0, [sp, 2288]
ldr d1, [sp, 2272]
ldr d0, [sp, 1360]
fmul d0, d1, d0
ldr d1, [sp, 2288]
fadd d0, d1, d0
str d0, [sp, 2288]
ldr d1, [sp, 2280]
ldr d0, [sp, 1432]
fmul d0, d1, d0
ldr d1, [sp, 2288]
fadd d0, d1, d0
str d0, [sp, 2288]
ldr d0, [sp, 2248]
fneg d1, d0
ldr d0, [sp, 1344]
fdiv d0, d1, d0
str d0, [sp, 1632]
ldr d0, [sp, 1344]
fmov d1, -1.0e+0
fdiv d0, d1, d0
str d0, [sp, 2296]
ldr d0, [sp, 1344]
fmul d0, d0, d0
ldr d1, [sp, 2248]
fdiv d0, d1, d0
str d0, [sp, 2144]
ldr d1, [sp, 2296]
ldr d0, [sp, 2288]
fmul d0, d1, d0
str d0, [sp, 1648]
ldr d1, [sp, 2144]
ldr d0, [sp, 1360]
fmul d0, d1, d0
ldr d1, [sp, 1648]
fadd d0, d1, d0
str d0, [sp, 1648]
ldr d0, [sp, 1632]
bl exp
str d0, [sp, 1656]
ldr d0, [sp, 1656]
str d0, [sp, 2152]
ldr d1, [sp, 2152]
ldr d0, [sp, 1648]
fmul d0, d1, d0
str d0, [sp, 1680]
ldr d1, [sp, 1656]
fmov d0, 4.0e+0
fmul d1, d1, d0
fmov d0, 1.0e+0
fadd d0, d1, d0
bl sqrt
fmov d1, d0
fmov d0, 1.0e+0
fadd d1, d1, d0
fmov d0, 5.0e-1
fmul d0, d1, d0
str d0, [sp, 1416]
ldr d1, [sp, 1656]
fmov d0, 4.0e+0
fmul d1, d1, d0
fmov d0, 1.0e+0
fadd d0, d1, d0
bl sqrt
fmov d1, d0
fmov d0, 1.0e+0
fdiv d0, d0, d1
str d0, [sp, 2192]
ldr d1, [sp, 2192]
ldr d0, [sp, 1680]
fmul d0, d1, d0
str d0, [sp, 1432]
ldr d0, [sp, 1416]
bl log
str d0, [sp, 1688]
ldr d0, [sp, 1416]
fmov d1, 1.0e+0
fdiv d0, d1, d0
str d0, [sp, 2304]
ldr d1, [sp, 2304]
ldr d0, [sp, 1432]
fmul d0, d1, d0
str d0, [sp, 1704]
ldr d0, [sp, 1344]
fadd d1, d0, d0
ldr d0, [sp, 1688]
fmul d0, d1, d0
ldr d1, [sp, 2248]
fadd d0, d1, d0
str d0, [sp, 2352]
fmov d0, 1.0e+0
str d0, [sp, 2360]
ldr d0, [sp, 1688]
fadd d0, d0, d0
str d0, [sp, 2368]
ldr d0, [sp, 1344]
fadd d0, d0, d0
str d0, [sp, 2376]
ldr d1, [sp, 2360]
ldr d0, [sp, 2288]
fmul d0, d1, d0
str d0, [sp, 2384]
ldr d1, [sp, 2368]
ldr d0, [sp, 1360]
fmul d0, d1, d0
ldr d1, [sp, 2384]
fadd d0, d1, d0
str d0, [sp, 2384]
ldr d1, [sp, 2376]
ldr d0, [sp, 1704]
fmul d0, d1, d0
ldr d1, [sp, 2384]
fadd d0, d1, d0
str d0, [sp, 2384]
ldr d1, [sp, 760]
fmov d0, 5.0e-1
fmul d1, d1, d0
ldr d0, [sp, 1368]
fmul d1, d1, d0
ldr d0, [sp, 1344]
fdiv d0, d1, d0
str d0, [sp, 1632]
ldr d1, [sp, 760]
fmov d0, 5.0e-1
fmul d1, d1, d0
ldr d0, [sp, 1344]
fdiv d0, d1, d0
str d0, [sp, 1640]
ldr d1, [sp, 760]
fmov d0, -5.0e-1
fmul d1, d1, d0
ldr d0, [sp, 1368]
fmul d1, d1, d0
ldr d0, [sp, 1344]
fmul d0, d0, d0
fdiv d0, d1, d0
str d0, [sp, 2144]
ldr d1, [sp, 1640]
ldr d0, [sp, 1384]
fmul d0, d1, d0
str d0, [sp, 1648]
ldr d1, [sp, 2144]
ldr d0, [sp, 1360]
fmul d0, d1, d0
ldr d1, [sp, 1648]
fadd d0, d1, d0
str d0, [sp, 1648]
ldr d0, [sp, 1632]
bl exp
str d0, [sp, 1656]
ldr d0, [sp, 1656]
str d0, [sp, 2152]
ldr d1, [sp, 2152]
ldr d0, [sp, 1648]
fmul d0, d1, d0
str d0, [sp, 1680]
ldr d1, [sp, 760]
fmov d0, -5.0e-1
fmul d1, d1, d0
ldr d0, [sp, 1368]
fmul d1, d1, d0
ldr d0, [sp, 1344]
fdiv d0, d1, d0
str d0, [sp, 1688]
ldr d1, [sp, 760]
fmov d0, -5.0e-1
fmul d1, d1, d0
ldr d0, [sp, 1344]
fdiv d0, d1, d0
str d0, [sp, 2160]
ldr d1, [sp, 760]
fmov d0, 5.0e-1
fmul d1, d1, d0
ldr d0, [sp, 1368]
fmul d1, d1, d0
ldr d0, [sp, 1344]
fmul d0, d0, d0
fdiv d0, d1, d0
str d0, [sp, 2168]
ldr d1, [sp, 2160]
ldr d0, [sp, 1384]
fmul d0, d1, d0
str d0, [sp, 1704]
ldr d1, [sp, 2168]
ldr d0, [sp, 1360]
fmul d0, d1, d0
ldr d1, [sp, 1704]
fadd d0, d1, d0
str d0, [sp, 1704]
ldr d0, [sp, 1688]
bl exp
str d0, [sp, 1728]
ldr d0, [sp, 1728]
str d0, [sp, 2176]
ldr d1, [sp, 2176]
ldr d0, [sp, 1704]
fmul d0, d1, d0
str d0, [sp, 2184]
ldr d1, [sp, 1656]
ldr d0, [sp, 1728]
fsub d0, d1, d0
str d0, [sp, 1416]
fmov d0, 1.0e+0
str d0, [sp, 2192]
fmov d0, -1.0e+0
str d0, [sp, 2200]
ldr d1, [sp, 2192]
ldr d0, [sp, 1680]
fmul d0, d1, d0
str d0, [sp, 1432]
ldr d1, [sp, 2200]
ldr d0, [sp, 2184]
fmul d0, d1, d0
ldr d1, [sp, 1432]
fadd d0, d1, d0
str d0, [sp, 1432]
ldr d0, [sp, 1416]
bl log
str d0, [sp, 1736]
ldr d0, [sp, 1416]
fmov d1, 1.0e+0
fdiv d0, d1, d0
str d0, [sp, 1744]
ldr d1, [sp, 1744]
ldr d0, [sp, 1432]
fmul d0, d1, d0
str d0, [sp, 1752]
ldr d0, [sp, 1368]
ldr d1, [sp, 1344]
fdiv d0, d1, d0
fadd d0, d0, d0
ldr d1, [sp, 1736]
fmul d0, d1, d0
str d0, [sp, 2208]
ldr d0, [sp, 1736]
fadd d1, d0, d0
ldr d0, [sp, 1368]
fdiv d0, d1, d0
str d0, [sp, 2216]
ldr d1, [sp, 1344]
fmov d0, -2.0e+0
fmul d1, d1, d0
ldr d0, [sp, 1736]
fmul d1, d1, d0
ldr d0, [sp, 1368]
fmul d0, d0, d0
fdiv d0, d1, d0
str d0, [sp, 2224]
ldr d0, [sp, 1344]
fadd d1, d0, d0
ldr d0, [sp, 1368]
fdiv d0, d1, d0
str d0, [sp, 2232]
ldr d1, [sp, 2216]
ldr d0, [sp, 1360]
fmul d0, d1, d0
str d0, [sp, 2240]
ldr d1, [sp, 2224]
ldr d0, [sp, 1384]
fmul d0, d1, d0
ldr d1, [sp, 2240]
fadd d0, d1, d0
str d0, [sp, 2240]
ldr d1, [sp, 2232]
ldr d0, [sp, 1752]
fmul d0, d1, d0
ldr d1, [sp, 2240]
fadd d0, d1, d0
str d0, [sp, 2240]
ldr d0, [sp, 1368]
bl log
str d0, [sp, 1416]
ldr d0, [sp, 1368]
fmov d1, 1.0e+0
fdiv d0, d1, d0
str d0, [sp, 1424]
ldr d1, [sp, 1424]
ldr d0, [sp, 1384]
fmul d0, d1, d0
str d0, [sp, 1432]
ldr d1, [sp, 2208]
ldr d0, [sp, 1368]
fmul d1, d1, d0
ldr d2, [sp, 1344]
fmov d0, 3.0e+0
fmul d2, d2, d0
ldr d0, [sp, 1416]
fmul d0, d2, d0
fsub d1, d1, d0
ldr d2, [sp, 1368]
fmov d0, 1.0e+0
fsub d2, d2, d0
ldr d0, [sp, 1088]
fmul d0, d2, d0
fsub d0, d1, d0
str d0, [sp, 2248]
ldr d0, [sp, 1368]
str d0, [sp, 2256]
ldr d1, [sp, 2208]
ldr d0, [sp, 1088]
fsub d0, d1, d0
str d0, [sp, 2264]
ldr d1, [sp, 1416]
fmov d0, -3.0e+0
fmul d0, d1, d0
str d0, [sp, 2272]
ldr d1, [sp, 1344]
fmov d0, -3.0e+0
fmul d0, d1, d0
str d0, [sp, 2280]
ldr d1, [sp, 2256]
ldr d0, [sp, 2240]
fmul d0, d1, d0
str d0, [sp, 2288]
ldr d1, [sp, 2264]
ldr d0, [sp, 1384]
fmul d0, d1, d0
ldr d1, [sp, 2288]
fadd d0, d1, d0
str d0, [sp, 2288]
ldr d1, [sp, 2272]
ldr d0, [sp, 1360]
fmul d0, d1, d0
ldr d1, [sp, 2288]
fadd d0, d1, d0
str d0, [sp, 2288]
ldr d1, [sp, 2280]
ldr d0, [sp, 1432]
fmul d0, d1, d0
ldr d1, [sp, 2288]
fadd d0, d1, d0
str d0, [sp, 2288]
ldr d0, [sp, 2248]
fneg d1, d0
ldr d0, [sp, 1344]
fdiv d0, d1, d0
str d0, [sp, 1632]
ldr d0, [sp, 1344]
fmov d1, -1.0e+0
fdiv d0, d1, d0
str d0, [sp, 2296]
ldr d0, [sp, 1344]
fmul d0, d0, d0
ldr d1, [sp, 2248]
fdiv d0, d1, d0
str d0, [sp, 2144]
ldr d1, [sp, 2296]
ldr d0, [sp, 2288]
fmul d0, d1, d0
str d0, [sp, 1648]
ldr d1, [sp, 2144]
ldr d0, [sp, 1360]
fmul d0, d1, d0
ldr d1, [sp, 1648]
fadd d0, d1, d0
str d0, [sp, 1648]
ldr d0, [sp, 1632]
bl exp
str d0, [sp, 1656]
ldr d0, [sp, 1656]
str d0, [sp, 2152]
ldr d1, [sp, 2152]
ldr d0, [sp, 1648]
fmul d0, d1, d0
str d0, [sp, 1680]
ldr d1, [sp, 1656]
fmov d0, 4.0e+0
fmul d1, d1, d0
fmov d0, 1.0e+0
fadd d0, d1, d0
bl sqrt
fmov d1, d0
fmov d0, 1.0e+0
fadd d1, d1, d0
fmov d0, 5.0e-1
fmul d0, d1, d0
str d0, [sp, 1416]
ldr d1, [sp, 1656]
fmov d0, 4.0e+0
fmul d1, d1, d0
fmov d0, 1.0e+0
fadd d0, d1, d0
bl sqrt
fmov d1, d0
fmov d0, 1.0e+0
fdiv d0, d0, d1
str d0, [sp, 2192]
ldr d1, [sp, 2192]
ldr d0, [sp, 1680]
fmul d0, d1, d0
str d0, [sp, 1432]
ldr d0, [sp, 1416]
bl log
str d0, [sp, 1688]
ldr d0, [sp, 1416]
fmov d1, 1.0e+0
fdiv d0, d1, d0
str d0, [sp, 2304]
ldr d1, [sp, 2304]
ldr d0, [sp, 1432]
fmul d0, d1, d0
str d0, [sp, 1704]
ldr d0, [sp, 1344]
fadd d1, d0, d0
ldr d0, [sp, 1688]
fmul d0, d1, d0
ldr d1, [sp, 2248]
fadd d0, d1, d0
str d0, [sp, 2392]
fmov d0, 1.0e+0
str d0, [sp, 2400]
ldr d0, [sp, 1688]
fadd d0, d0, d0
str d0, [sp, 2408]
ldr d0, [sp, 1344]
fadd d0, d0, d0
str d0, [sp, 2416]
ldr d1, [sp, 2400]
ldr d0, [sp, 2288]
fmul d0, d1, d0
str d0, [sp, 2424]
ldr d1, [sp, 2408]
ldr d0, [sp, 1360]
fmul d0, d1, d0
ldr d1, [sp, 2424]
fadd d0, d1, d0
str d0, [sp, 2424]
ldr d1, [sp, 2416]
ldr d0, [sp, 1704]
fmul d0, d1, d0
ldr d1, [sp, 2424]
fadd d0, d1, d0
str d0, [sp, 2424]
ldr d0, [sp, 2312]
ldr d1, [sp, 672]
fdiv d0, d1, d0
str d0, [sp, 1416]
ldr d0, [sp, 672]
fneg d1, d0
ldr d0, [sp, 2312]
fmul d0, d0, d0
fdiv d0, d1, d0
str d0, [sp, 2432]
ldr d1, [sp, 2432]
ldr d0, [sp, 2344]
fmul d0, d1, d0
str d0, [sp, 1432]
ldr d1, [sp, 680]
ldr d0, [sp, 1416]
bl pow
str d0, [sp, 1632]
ldr d1, [sp, 1632]
ldr d0, [sp, 680]
fmul d1, d1, d0
ldr d0, [sp, 1416]
fdiv d0, d1, d0
str d0, [sp, 2440]
ldr d1, [sp, 2440]
ldr d0, [sp, 1432]
fmul d0, d1, d0
str d0, [sp, 1648]
ldr d1, [sp, 664]
ldr d0, [sp, 1632]
fmul d0, d1, d0
str d0, [sp, 2448]
ldr d0, [sp, 664]
str d0, [sp, 2456]
ldr d1, [sp, 2456]
ldr d0, [sp, 1648]
fmul d0, d1, d0
str d0, [sp, 2464]
ldr d0, [sp, 2352]
ldr d1, [sp, 728]
fdiv d0, d1, d0
str d0, [sp, 1416]
ldr d0, [sp, 728]
fneg d1, d0
ldr d0, [sp, 2352]
fmul d0, d0, d0
fdiv d0, d1, d0
str d0, [sp, 2472]
ldr d1, [sp, 2472]
ldr d0, [sp, 2384]
fmul d0, d1, d0
str d0, [sp, 1432]
ldr d1, [sp, 736]
ldr d0, [sp, 1416]
bl pow
str d0, [sp, 1632]
ldr d1, [sp, 1632]
ldr d0, [sp, 736]
fmul d1, d1, d0
ldr d0, [sp, 1416]
fdiv d0, d1, d0
str d0, [sp, 2440]
ldr d1, [sp, 2440]
ldr d0, [sp, 1432]
fmul d0, d1, d0
str d0, [sp, 1648]
ldr d1, [sp, 704]
ldr d0, [sp, 1632]
fmul d0, d1, d0
str d0, [sp, 2480]
ldr d0, [sp, 704]
str d0, [sp, 2488]
ldr d1, [sp, 2488]
ldr d0, [sp, 1648]
fmul d0, d1, d0
str d0, [sp, 2496]
ldr d0, [sp, 2352]
ldr d1, [sp, 728]
fdiv d0, d1, d0
str d0, [sp, 1416]
ldr d0, [sp, 728]
fneg d1, d0
ldr d0, [sp, 2352]
fmul d0, d0, d0
fdiv d0, d1, d0
str d0, [sp, 2472]
ldr d1, [sp, 2472]
ldr d0, [sp, 2384]
fmul d0, d1, d0
str d0, [sp, 1432]
ldr d1, [sp, 736]
ldr d0, [sp, 1416]
bl pow
str d0, [sp, 1632]
ldr d1, [sp, 1632]
ldr d0, [sp, 736]
fmul d1, d1, d0
ldr d0, [sp, 1416]
fdiv d0, d1, d0
str d0, [sp, 2440]
ldr d1, [sp, 2440]
ldr d0, [sp, 1432]
fmul d0, d1, d0
str d0, [sp, 1648]
ldr d1, [sp, 720]
ldr d0, [sp, 1632]
fmul d0, d1, d0
str d0, [sp, 2504]
ldr d0, [sp, 720]
str d0, [sp, 2512]
ldr d1, [sp, 2512]
ldr d0, [sp, 1648]
fmul d0, d1, d0
str d0, [sp, 2520]
ldr d0, [sp, 2392]
ldr d1, [sp, 760]
fdiv d0, d1, d0
str d0, [sp, 1416]
ldr d0, [sp, 760]
fneg d1, d0
ldr d0, [sp, 2392]
fmul d0, d0, d0
fdiv d0, d1, d0
str d0, [sp, 2528]
ldr d1, [sp, 2528]
ldr d0, [sp, 2424]
fmul d0, d1, d0
str d0, [sp, 1432]
ldr d1, [sp, 768]
ldr d0, [sp, 1416]
bl pow
str d0, [sp, 1632]
ldr d1, [sp, 1632]
ldr d0, [sp, 768]
fmul d1, d1, d0
ldr d0, [sp, 1416]
fdiv d0, d1, d0
str d0, [sp, 2440]
ldr d1, [sp, 2440]
ldr d0, [sp, 1432]
fmul d0, d1, d0
str d0, [sp, 1648]
ldr d1, [sp, 752]
ldr d0, [sp, 1632]
fmul d0, d1, d0
str d0, [sp, 2536]
ldr d0, [sp, 752]
str d0, [sp, 2544]
ldr d1, [sp, 2544]
ldr d0, [sp, 1648]
fmul d0, d1, d0
str d0, [sp, 2552]
ldr d1, [sp, 1120]
ldr d0, [sp, 1368]
bl pow
str d0, [sp, 1416]
ldr d1, [sp, 1416]
ldr d0, [sp, 1120]
fmul d1, d1, d0
ldr d0, [sp, 1368]
fdiv d0, d1, d0
str d0, [sp, 1424]
ldr d1, [sp, 1424]
ldr d0, [sp, 1384]
fmul d0, d1, d0
str d0, [sp, 1432]
ldr d0, [sp, 1064]
fneg d1, d0
fmov d2, 1.0e+0
ldr d0, [sp, 1368]
fsub d0, d2, d0
fmul d1, d1, d0
ldr d0, [sp, 1344]
fdiv d0, d1, d0
str d0, [sp, 1632]
ldr d0, [sp, 1344]
ldr d1, [sp, 1064]
fdiv d0, d1, d0
str d0, [sp, 1640]
fmov d1, 1.0e+0
ldr d0, [sp, 1368]
fsub d1, d1, d0
ldr d0, [sp, 1064]
fmul d1, d1, d0
ldr d0, [sp, 1344]
fmul d0, d0, d0
fdiv d0, d1, d0
str d0, [sp, 2144]
ldr d1, [sp, 1640]
ldr d0, [sp, 1384]
fmul d0, d1, d0
str d0, [sp, 1648]
ldr d1, [sp, 2144]
ldr d0, [sp, 1360]
fmul d0, d1, d0
ldr d1, [sp, 1648]
fadd d0, d1, d0
str d0, [sp, 1648]
ldr d0, [sp, 1632]
bl exp
str d0, [sp, 1656]
ldr d0, [sp, 1656]
str d0, [sp, 2152]
ldr d1, [sp, 2152]
ldr d0, [sp, 1648]
fmul d0, d1, d0
str d0, [sp, 1680]
ldr d1, [sp, 568]
ldr d0, [sp, 1416]
fmul d0, d1, d0
ldr d1, [sp, 1656]
fmul d0, d1, d0
str d0, [sp, 2560]
ldr d1, [sp, 568]
ldr d0, [sp, 1656]
fmul d0, d1, d0
str d0, [sp, 2568]
ldr d1, [sp, 568]
ldr d0, [sp, 1416]
fmul d0, d1, d0
str d0, [sp, 2576]
ldr d1, [sp, 2568]
ldr d0, [sp, 1432]
fmul d0, d1, d0
str d0, [sp, 2584]
ldr d1, [sp, 2576]
ldr d0, [sp, 1680]
fmul d0, d1, d0
ldr d1, [sp, 2584]
fadd d0, d1, d0
str d0, [sp, 2584]
ldr d1, [sp, 1056]
ldr d0, [sp, 1368]
bl pow
str d0, [sp, 1416]
ldr d1, [sp, 1416]
ldr d0, [sp, 1056]
fmul d1, d1, d0
ldr d0, [sp, 1368]
fdiv d0, d1, d0
str d0, [sp, 1424]
ldr d1, [sp, 1424]
ldr d0, [sp, 1384]
fmul d0, d1, d0
str d0, [sp, 1432]
ldr d1, [sp, 560]
ldr d0, [sp, 1416]
fmul d0, d1, d0
str d0, [sp, 2592]
ldr d0, [sp, 560]
str d0, [sp, 2600]
ldr d1, [sp, 2600]
ldr d0, [sp, 1432]
fmul d0, d1, d0
str d0, [sp, 2608]
ldr d0, [sp, 2096]
fneg d1, d0
ldr d2, [sp, 2120]
ldr d0, [sp, 1344]
fmul d0, d2, d0
fdiv d0, d1, d0
str d0, [sp, 1416]
ldr d1, [sp, 2120]
ldr d0, [sp, 1344]
fmul d0, d1, d0
fmov d1, -1.0e+0
fdiv d0, d1, d0
str d0, [sp, 2616]
ldr d0, [sp, 2120]
fmul d1, d0, d0
ldr d0, [sp, 1344]
fmul d0, d1, d0
ldr d1, [sp, 2096]
fdiv d0, d1, d0
str d0, [sp, 2624]
ldr d0, [sp, 1344]
fmul d1, d0, d0
ldr d0, [sp, 2120]
fmul d0, d1, d0
ldr d1, [sp, 2096]
fdiv d0, d1, d0
str d0, [sp, 2632]
ldr d1, [sp, 2616]
ldr d0, [sp, 2112]
fmul d0, d1, d0
str d0, [sp, 1432]
ldr d1, [sp, 2624]
ldr d0, [sp, 2136]
fmul d0, d1, d0
ldr d1, [sp, 1432]
fadd d0, d1, d0
str d0, [sp, 1432]
ldr d1, [sp, 2632]
ldr d0, [sp, 1360]
fmul d0, d1, d0
ldr d1, [sp, 1432]
fadd d0, d1, d0
str d0, [sp, 1432]
ldr d0, [sp, 1416]
bl exp
str d0, [sp, 2640]
ldr d0, [sp, 2640]
str d0, [sp, 2648]
ldr d1, [sp, 2648]
ldr d0, [sp, 1432]
fmul d0, d1, d0
str d0, [sp, 2656]
ldr d0, [sp, 936]
fcmpe d0, #0.0
bgt .L122
b .L163
.L122:
ldr d0, [sp, 936]
fmov d1, 1.0e+0
fdiv d0, d1, d0
str d0, [sp, 112]
b .L4
.L163:
str xzr, [sp, 112]
.L4:
ldr d0, [sp, 944]
fcmpe d0, #0.0
bgt .L123
b .L164
.L123:
ldr d0, [sp, 944]
fmov d1, 1.0e+0
fdiv d0, d1, d0
str d0, [sp, 120]
b .L7
.L164:
str xzr, [sp, 120]
.L7:
ldr d0, [sp, 952]
fcmpe d0, #0.0
bgt .L124
b .L165
.L124:
ldr d0, [sp, 1440]
fmov d1, 1.0e+0
fdiv d0, d1, d0
str d0, [sp, 128]
ldr d0, [sp, 1440]
fmul d0, d0, d0
fmov d1, -1.0e+0
fdiv d0, d1, d0
str d0, [sp, 2664]
ldr d1, [sp, 2664]
ldr d0, [sp, 1456]
fmul d0, d1, d0
str d0, [sp, 136]
b .L10
.L165:
str xzr, [sp, 128]
str xzr, [sp, 136]
.L10:
ldr d0, [sp, 960]
fcmpe d0, #0.0
bgt .L125
b .L166
.L125:
ldr d0, [sp, 960]
fmov d1, 1.0e+0
fdiv d0, d1, d0
str d0, [sp, 144]
b .L13
.L166:
str xzr, [sp, 144]
.L13:
ldr d0, [sp, 968]
fcmpe d0, #0.0
bgt .L126
b .L167
.L126:
ldr d0, [sp, 968]
fmov d1, 1.0e+0
fdiv d0, d1, d0
str d0, [sp, 152]
b .L16
.L167:
str xzr, [sp, 152]
.L16:
ldr d0, [sp, 560]
fcmpe d0, #0.0
bgt .L127
b .L168
.L127:
ldr d0, [sp, 2592]
fmov d1, 1.0e+0
fdiv d0, d1, d0
str d0, [sp, 160]
ldr d0, [sp, 2592]
fmul d0, d0, d0
fmov d1, -1.0e+0
fdiv d0, d1, d0
str d0, [sp, 2672]
ldr d1, [sp, 2672]
ldr d0, [sp, 2608]
fmul d0, d1, d0
str d0, [sp, 168]
b .L19
.L168:
str xzr, [sp, 160]
str xzr, [sp, 168]
.L19:
ldr d0, [sp, 576]
fcmpe d0, #0.0
bgt .L128
b .L169
.L128:
ldr d0, [sp, 576]
fmov d1, 1.0e+0
fdiv d0, d1, d0
str d0, [sp, 176]
b .L22
.L169:
str xzr, [sp, 176]
.L22:
ldr d0, [sp, 1000]
fcmpe d0, #0.0
bgt .L129
b .L170
.L129:
ldr d0, [sp, 1000]
fmov d1, 1.0e+0
fdiv d0, d1, d0
str d0, [sp, 184]
b .L25
.L170:
str xzr, [sp, 184]
.L25:
ldr d0, [sp, 1008]
fcmpe d0, #0.0
bgt .L130
b .L171
.L130:
ldr d0, [sp, 1008]
fmov d1, 1.0e+0
fdiv d0, d1, d0
str d0, [sp, 192]
b .L28
.L171:
str xzr, [sp, 192]
.L28:
ldr d0, [sp, 1008]
fcmpe d0, #0.0
bgt .L131
b .L172
.L131:
str xzr, [sp, 200]
b .L31
.L172:
fmov d0, 1.0e+0
str d0, [sp, 200]
.L31:
ldr d0, [sp, 2312]
fneg d0, d0
ldr d1, [sp, 648]
fmul d0, d1, d0
str d0, [sp, 2680]
ldr d0, [sp, 648]
fneg d0, d0
str d0, [sp, 2688]
ldr d1, [sp, 2688]
ldr d0, [sp, 2344]
fmul d0, d1, d0
str d0, [sp, 2696]
ldr d0, [sp, 688]
fcmpe d0, #0.0
bls .L132
b .L173
.L132:
ldr x0, [sp, 88]
ldr d0, [x0]
ldr d1, [sp, 2680]
fadd d0, d1, d0
str d0, [sp, 2992]
fmov d0, 1.0e+0
str d0, [sp, 3000]
fmov d0, 1.0e+0
str d0, [sp, 3008]
ldr d1, [sp, 3008]
ldr d0, [sp, 2696]
fmul d0, d1, d0
str d0, [sp, 3016]
ldr d0, [sp, 2992]
fcmpe d0, #0.0
bgt .L133
b .L174
.L133:
fmov d1, 1.0e+0
ldr d0, [sp, 648]
fsub d0, d1, d0
str d0, [sp, 1416]
fmov d1, -1.0e+0
ldr d0, [sp, 680]
fsub d0, d1, d0
str d0, [sp, 1632]
ldr d1, [sp, 1632]
ldr d0, [sp, 1416]
bl pow
str d0, [sp, 3024]
fmov d1, 1.0e+0
ldr d0, [sp, 648]
fsub d1, d1, d0
ldr d0, [sp, 3024]
fmul d1, d1, d0
fmov d2, 1.0e+0
ldr d0, [sp, 648]
fsub d0, d2, d0
fmul d0, d1, d0
fmov d1, 1.0e+0
fsub d1, d1, d0
ldr d0, [sp, 2312]
fmul d1, d1, d0
fmov d2, 1.0e+0
ldr d0, [sp, 680]
fsub d0, d2, d0
fdiv d0, d1, d0
str d0, [sp, 208]
fmov d1, 1.0e+0
ldr d0, [sp, 648]
fsub d1, d1, d0
fmov d2, 1.0e+0
ldr d0, [sp, 648]
fsub d0, d2, d0
fmul d1, d1, d0
ldr d0, [sp, 3024]
fmul d0, d1, d0
fmov d1, 1.0e+0
fsub d1, d1, d0
fmov d2, 1.0e+0
ldr d0, [sp, 680]
fsub d0, d2, d0
fdiv d0, d1, d0
str d0, [sp, 2944]
str xzr, [sp, 224]
ldr d1, [sp, 2944]
ldr d0, [sp, 2344]
fmul d0, d1, d0
str d0, [sp, 216]
fmov d1, 1.0e+0
ldr d0, [sp, 648]
fsub d1, d1, d0
ldr d2, [sp, 680]
fmov d0, 5.0e-1
fmul d2, d2, d0
ldr d0, [sp, 2992]
fmul d2, d2, d0
ldr d0, [sp, 2312]
fdiv d0, d2, d0
fadd d1, d1, d0
ldr d0, [sp, 2992]
fmul d0, d1, d0
ldr d1, [sp, 3024]
fmul d0, d1, d0
str d0, [sp, 232]
ldr d1, [sp, 2992]
fmov d0, 5.0e-1
fmul d1, d1, d0
ldr d0, [sp, 680]
fmul d1, d1, d0
ldr d0, [sp, 2312]
fdiv d1, d1, d0
ldr d0, [sp, 648]
fsub d1, d1, d0
fmov d0, 1.0e+0
fadd d1, d1, d0
ldr d0, [sp, 3024]
fmul d1, d1, d0
ldr d2, [sp, 2992]
fmov d0, 5.0e-1
fmul d2, d2, d0
ldr d0, [sp, 680]
fmul d2, d2, d0
ldr d0, [sp, 3024]
fmul d2, d2, d0
ldr d0, [sp, 2312]
fdiv d0, d2, d0
fadd d0, d1, d0
str d0, [sp, 3032]
ldr d0, [sp, 2992]
fmul d1, d0, d0
fmov d0, -5.0e-1
fmul d1, d1, d0
ldr d0, [sp, 680]
fmul d1, d1, d0
ldr d0, [sp, 3024]
fmul d1, d1, d0
ldr d0, [sp, 2312]
fmul d0, d0, d0
fdiv d0, d1, d0
str d0, [sp, 3040]
ldr d1, [sp, 3032]
ldr d0, [sp, 3000]
fmul d0, d1, d0
str d0, [sp, 240]
ldr d1, [sp, 3032]
ldr d0, [sp, 3016]
fmul d0, d1, d0
str d0, [sp, 248]
ldr d1, [sp, 3040]
ldr d0, [sp, 2344]
fmul d0, d1, d0
ldr d1, [sp, 248]
fadd d0, d1, d0
str d0, [sp, 248]
b .L36
.L174:
ldr x0, [sp, 88]
ldr d1, [x0]
ldr d0, [sp, 2312]
fdiv d0, d1, d0
fmov d1, 1.0e+0
fsub d0, d1, d0
str d0, [sp, 1416]
ldr d0, [sp, 2312]
fmov d1, -1.0e+0
fdiv d0, d1, d0
str d0, [sp, 2928]
ldr x0, [sp, 88]
ldr d1, [x0]
ldr d0, [sp, 2312]
fmul d0, d0, d0
fdiv d0, d1, d0
str d0, [sp, 2432]
ldr d1, [sp, 2432]
ldr d0, [sp, 2344]
fmul d0, d1, d0
str d0, [sp, 1432]
fmov d1, 1.0e+0
ldr d0, [sp, 680]
fsub d0, d1, d0
str d0, [sp, 1632]
ldr d1, [sp, 1632]
ldr d0, [sp, 1416]
bl pow
str d0, [sp, 1656]
ldr d1, [sp, 1656]
ldr d0, [sp, 1632]
fmul d1, d1, d0
ldr d0, [sp, 1416]
fdiv d0, d1, d0
str d0, [sp, 2768]
ldr d1, [sp, 2768]
ldr d0, [sp, 2928]
fmul d0, d1, d0
str d0, [sp, 2936]
ldr d1, [sp, 2768]
ldr d0, [sp, 1432]
fmul d0, d1, d0
str d0, [sp, 1680]
fmov d1, 1.0e+0
ldr d0, [sp, 1656]
fsub d1, d1, d0
ldr d0, [sp, 2312]
fmul d1, d1, d0
fmov d2, 1.0e+0
ldr d0, [sp, 680]
fsub d0, d2, d0
fdiv d0, d1, d0
str d0, [sp, 208]
fmov d1, 1.0e+0
ldr d0, [sp, 1656]
fsub d1, d1, d0
fmov d2, 1.0e+0
ldr d0, [sp, 680]
fsub d0, d2, d0
fdiv d0, d1, d0
str d0, [sp, 2944]
ldr d0, [sp, 2312]
fneg d1, d0
fmov d2, 1.0e+0
ldr d0, [sp, 680]
fsub d0, d2, d0
fdiv d0, d1, d0
str d0, [sp, 2952]
ldr d1, [sp, 2944]
ldr d0, [sp, 2344]
fmul d0, d1, d0
str d0, [sp, 216]
ldr d1, [sp, 2952]
ldr d0, [sp, 2936]
fmul d0, d1, d0
str d0, [sp, 224]
ldr d1, [sp, 2952]
ldr d0, [sp, 1680]
fmul d0, d1, d0
ldr d1, [sp, 216]
fadd d0, d1, d0
str d0, [sp, 216]
str xzr, [sp, 232]
str xzr, [sp, 240]
str xzr, [sp, 248]
.L36:
ldr d1, [sp, 208]
ldr d0, [sp, 232]
fadd d0, d1, d0
str d0, [sp, 256]
fmov d0, 1.0e+0
str d0, [sp, 2960]
fmov d0, 1.0e+0
str d0, [sp, 3048]
ldr d1, [sp, 2960]
ldr d0, [sp, 216]
fmul d0, d1, d0
str d0, [sp, 264]
ldr d1, [sp, 2960]
ldr d0, [sp, 224]
fmul d0, d1, d0
str d0, [sp, 272]
ldr d1, [sp, 3048]
ldr d0, [sp, 240]
fmul d0, d1, d0
ldr d1, [sp, 272]
fadd d0, d1, d0
str d0, [sp, 272]
ldr d1, [sp, 3048]
ldr d0, [sp, 248]
fmul d0, d1, d0
ldr d1, [sp, 264]
fadd d0, d1, d0
str d0, [sp, 264]
b .L37
.L173:
ldr d0, [sp, 2680]
fmul d1, d0, d0
ldr d2, [sp, 688]
fmov d0, 4.0e+0
fmul d2, d2, d0
ldr d0, [sp, 688]
fmul d0, d2, d0
fadd d0, d1, d0
bl sqrt
str d0, [sp, 2704]
ldr d0, [sp, 2680]
fmul d1, d0, d0
ldr d0, [sp, 688]
fmul d2, d0, d0
fmov d0, 4.0e+0
fmul d0, d2, d0
fadd d0, d1, d0
bl sqrt
fmov d1, d0
ldr d0, [sp, 2680]
fdiv d0, d0, d1
str d0, [sp, 2712]
ldr d1, [sp, 2712]
ldr d0, [sp, 2696]
fmul d0, d1, d0
str d0, [sp, 2720]
ldr d1, [sp, 2680]
ldr d0, [sp, 2704]
fadd d1, d1, d0
fmov d0, -5.0e-1
fmul d0, d1, d0
str d0, [sp, 2728]
fmov d0, -5.0e-1
str d0, [sp, 2736]
fmov d0, -5.0e-1
str d0, [sp, 2744]
ldr d1, [sp, 2736]
ldr d0, [sp, 2696]
fmul d0, d1, d0
str d0, [sp, 2752]
ldr d1, [sp, 2744]
ldr d0, [sp, 2720]
fmul d0, d1, d0
ldr d1, [sp, 2752]
fadd d0, d1, d0
str d0, [sp, 2752]
ldr d0, [sp, 2312]
ldr d1, [sp, 2728]
fdiv d0, d1, d0
fmov d1, 1.0e+0
fsub d0, d1, d0
str d0, [sp, 1416]
ldr d0, [sp, 2312]
fmov d1, -1.0e+0
fdiv d0, d1, d0
str d0, [sp, 2760]
ldr d0, [sp, 2312]
fmul d0, d0, d0
ldr d1, [sp, 2728]
fdiv d0, d1, d0
str d0, [sp, 2432]
ldr d1, [sp, 2760]
ldr d0, [sp, 2752]
fmul d0, d1, d0
str d0, [sp, 1432]
ldr d1, [sp, 2432]
ldr d0, [sp, 2344]
fmul d0, d1, d0
ldr d1, [sp, 1432]
fadd d0, d1, d0
str d0, [sp, 1432]
fmov d1, 1.0e+0
ldr d0, [sp, 680]
fsub d0, d1, d0
str d0, [sp, 1632]
ldr d1, [sp, 1632]
ldr d0, [sp, 1416]
bl pow
str d0, [sp, 1656]
ldr d1, [sp, 1656]
ldr d0, [sp, 1632]
fmul d1, d1, d0
ldr d0, [sp, 1416]
fdiv d0, d1, d0
str d0, [sp, 2768]
ldr d1, [sp, 2768]
ldr d0, [sp, 1432]
fmul d0, d1, d0
str d0, [sp, 1680]
ldr d0, [sp, 2312]
fneg d1, d0
ldr d0, [sp, 1656]
fmul d1, d1, d0
fmov d2, 1.0e+0
ldr d0, [sp, 680]
fsub d0, d2, d0
fdiv d0, d1, d0
str d0, [sp, 2776]
ldr d0, [sp, 1656]
fneg d1, d0
fmov d2, 1.0e+0
ldr d0, [sp, 680]
fsub d0, d2, d0
fdiv d0, d1, d0
str d0, [sp, 2784]
ldr d0, [sp, 2312]
fneg d1, d0
fmov d2, 1.0e+0
ldr d0, [sp, 680]
fsub d0, d2, d0
fdiv d0, d1, d0
str d0, [sp, 2792]
ldr d1, [sp, 2784]
ldr d0, [sp, 2344]
fmul d0, d1, d0
str d0, [sp, 2800]
ldr d1, [sp, 2792]
ldr d0, [sp, 1680]
fmul d0, d1, d0
ldr d1, [sp, 2800]
fadd d0, d1, d0
str d0, [sp, 2800]
ldr x0, [sp, 88]
ldr d0, [x0]
ldr d1, [sp, 2680]
fadd d0, d1, d0
str d0, [sp, 2808]
fmov d0, 1.0e+0
str d0, [sp, 2816]
fmov d0, 1.0e+0
str d0, [sp, 2824]
ldr d1, [sp, 2824]
ldr d0, [sp, 2696]
fmul d0, d1, d0
str d0, [sp, 2832]
ldr d0, [sp, 2808]
fmul d1, d0, d0
ldr d2, [sp, 688]
fmov d0, 4.0e+0
fmul d2, d2, d0
ldr d0, [sp, 688]
fmul d0, d2, d0
fadd d0, d1, d0
bl sqrt
str d0, [sp, 2840]
ldr d0, [sp, 2808]
fmul d1, d0, d0
ldr d0, [sp, 688]
fmul d2, d0, d0
fmov d0, 4.0e+0
fmul d0, d2, d0
fadd d0, d1, d0
bl sqrt
fmov d1, d0
ldr d0, [sp, 2808]
fdiv d0, d0, d1
str d0, [sp, 2848]
ldr d1, [sp, 2848]
ldr d0, [sp, 2816]
fmul d0, d1, d0
str d0, [sp, 2856]
ldr d1, [sp, 2848]
ldr d0, [sp, 2832]
fmul d0, d1, d0
str d0, [sp, 2864]
ldr d1, [sp, 2808]
ldr d0, [sp, 2840]
fsub d1, d1, d0
fmov d0, 5.0e-1
fmul d1, d1, d0
ldr d0, [sp, 2680]
fsub d0, d1, d0
str d0, [sp, 2872]
fmov d0, 5.0e-1
str d0, [sp, 2880]
fmov d0, -5.0e-1
str d0, [sp, 2888]
fmov d0, -1.0e+0
str d0, [sp, 2896]
ldr d1, [sp, 2880]
ldr d0, [sp, 2816]
fmul d0, d1, d0
str d0, [sp, 2904]
ldr d1, [sp, 2880]
ldr d0, [sp, 2832]
fmul d0, d1, d0
str d0, [sp, 2912]
ldr d1, [sp, 2888]
ldr d0, [sp, 2856]
fmul d0, d1, d0
ldr d1, [sp, 2904]
fadd d0, d1, d0
str d0, [sp, 2904]
ldr d1, [sp, 2888]
ldr d0, [sp, 2864]
fmul d0, d1, d0
ldr d1, [sp, 2912]
fadd d0, d1, d0
str d0, [sp, 2912]
ldr d1, [sp, 2896]
ldr d0, [sp, 2696]
fmul d0, d1, d0
ldr d1, [sp, 2912]
fadd d0, d1, d0
str d0, [sp, 2912]
ldr d0, [sp, 2312]
ldr d1, [sp, 2872]
fdiv d0, d1, d0
fmov d1, 1.0e+0
fsub d0, d1, d0
str d0, [sp, 1416]
ldr d0, [sp, 2312]
fmov d1, -1.0e+0
fdiv d0, d1, d0
str d0, [sp, 2920]
ldr d0, [sp, 2312]
fmul d0, d0, d0
ldr d1, [sp, 2872]
fdiv d0, d1, d0
str d0, [sp, 2432]
ldr d1, [sp, 2920]
ldr d0, [sp, 2904]
fmul d0, d1, d0
str d0, [sp, 2928]
ldr d1, [sp, 2920]
ldr d0, [sp, 2912]
fmul d0, d1, d0
str d0, [sp, 1432]
ldr d1, [sp, 2432]
ldr d0, [sp, 2344]
fmul d0, d1, d0
ldr d1, [sp, 1432]
fadd d0, d1, d0
str d0, [sp, 1432]
fmov d1, 1.0e+0
ldr d0, [sp, 680]
fsub d0, d1, d0
str d0, [sp, 1632]
ldr d1, [sp, 1632]
ldr d0, [sp, 1416]
bl pow
str d0, [sp, 1656]
ldr d1, [sp, 1656]
ldr d0, [sp, 1632]
fmul d1, d1, d0
ldr d0, [sp, 1416]
fdiv d0, d1, d0
str d0, [sp, 2768]
ldr d1, [sp, 2768]
ldr d0, [sp, 2928]
fmul d0, d1, d0
str d0, [sp, 2936]
ldr d1, [sp, 2768]
ldr d0, [sp, 1432]
fmul d0, d1, d0
str d0, [sp, 1680]
ldr d0, [sp, 2312]
fneg d1, d0
ldr d0, [sp, 1656]
fmul d1, d1, d0
fmov d2, 1.0e+0
ldr d0, [sp, 680]
fsub d0, d2, d0
fdiv d0, d1, d0
str d0, [sp, 208]
ldr d0, [sp, 1656]
fneg d1, d0
fmov d2, 1.0e+0
ldr d0, [sp, 680]
fsub d0, d2, d0
fdiv d0, d1, d0
str d0, [sp, 2944]
ldr d0, [sp, 2312]
fneg d1, d0
fmov d2, 1.0e+0
ldr d0, [sp, 680]
fsub d0, d2, d0
fdiv d0, d1, d0
str d0, [sp, 2952]
ldr d1, [sp, 2944]
ldr d0, [sp, 2344]
fmul d0, d1, d0
str d0, [sp, 216]
ldr d1, [sp, 2952]
ldr d0, [sp, 2936]
fmul d0, d1, d0
str d0, [sp, 224]
ldr d1, [sp, 2952]
ldr d0, [sp, 1680]
fmul d0, d1, d0
ldr d1, [sp, 216]
fadd d0, d1, d0
str d0, [sp, 216]
fmov d1, 1.0e+0
ldr d0, [sp, 648]
fsub d0, d1, d0
str d0, [sp, 1416]
ldr d0, [sp, 680]
fneg d0, d0
str d0, [sp, 1632]
ldr d1, [sp, 1632]
ldr d0, [sp, 1416]
bl pow
str d0, [sp, 1656]
ldr x0, [sp, 88]
ldr d1, [x0]
ldr d0, [sp, 2872]
fsub d1, d1, d0
ldr d0, [sp, 2728]
fadd d1, d1, d0
ldr d0, [sp, 1656]
fmul d1, d1, d0
ldr d0, [sp, 208]
fadd d1, d1, d0
ldr d0, [sp, 2776]
fsub d0, d1, d0
str d0, [sp, 256]
fmov d0, 1.0e+0
str d0, [sp, 2960]
ldr d0, [sp, 1656]
str d0, [sp, 272]
ldr d0, [sp, 1656]
fneg d0, d0
str d0, [sp, 2968]
ldr d0, [sp, 1656]
str d0, [sp, 2976]
fmov d0, -1.0e+0
str d0, [sp, 2984]
ldr d1, [sp, 2960]
ldr d0, [sp, 216]
fmul d0, d1, d0
str d0, [sp, 264]
ldr d1, [sp, 2960]
ldr d0, [sp, 224]
fmul d0, d1, d0
ldr d1, [sp, 272]
fadd d0, d1, d0
str d0, [sp, 272]
ldr d1, [sp, 2968]
ldr d0, [sp, 2904]
fmul d0, d1, d0
ldr d1, [sp, 272]
fadd d0, d1, d0
str d0, [sp, 272]
ldr d1, [sp, 2968]
ldr d0, [sp, 2912]
fmul d0, d1, d0
ldr d1, [sp, 264]
fadd d0, d1, d0
str d0, [sp, 264]
ldr d1, [sp, 2976]
ldr d0, [sp, 2752]
fmul d0, d1, d0
ldr d1, [sp, 264]
fadd d0, d1, d0
str d0, [sp, 264]
ldr d1, [sp, 2984]
ldr d0, [sp, 2800]
fmul d0, d1, d0
ldr d1, [sp, 264]
fadd d0, d1, d0
str d0, [sp, 264]
.L37:
ldr d0, [sp, 2312]
fneg d0, d0
ldr d1, [sp, 648]
fmul d0, d1, d0
str d0, [sp, 2680]
ldr d0, [sp, 648]
fneg d0, d0
str d0, [sp, 2688]
ldr d1, [sp, 2688]
ldr d0, [sp, 2344]
fmul d0, d1, d0
str d0, [sp, 2696]
ldr d0, [sp, 688]
fcmpe d0, #0.0
bls .L134
b .L175
.L134:
ldr x0, [sp, 80]
ldr d0, [x0]
ldr d1, [sp, 2680]
fadd d0, d1, d0
str d0, [sp, 2992]
fmov d0, 1.0e+0
str d0, [sp, 3128]
fmov d0, 1.0e+0
str d0, [sp, 3008]
ldr d1, [sp, 3008]
ldr d0, [sp, 2696]
fmul d0, d1, d0
str d0, [sp, 3016]
ldr d0, [sp, 2992]
fcmpe d0, #0.0
bgt .L135
b .L176
.L135:
fmov d1, 1.0e+0
ldr d0, [sp, 648]
fsub d0, d1, d0
str d0, [sp, 1416]
fmov d1, -1.0e+0
ldr d0, [sp, 680]
fsub d0, d1, d0
str d0, [sp, 1632]
ldr d1, [sp, 1632]
ldr d0, [sp, 1416]
bl pow
str d0, [sp, 3024]
fmov d1, 1.0e+0
ldr d0, [sp, 648]
fsub d1, d1, d0
ldr d0, [sp, 3024]
fmul d1, d1, d0
fmov d2, 1.0e+0
ldr d0, [sp, 648]
fsub d0, d2, d0
fmul d0, d1, d0
fmov d1, 1.0e+0
fsub d1, d1, d0
ldr d0, [sp, 2312]
fmul d1, d1, d0
fmov d2, 1.0e+0
ldr d0, [sp, 680]
fsub d0, d2, d0
fdiv d0, d1, d0
str d0, [sp, 208]
fmov d1, 1.0e+0
ldr d0, [sp, 648]
fsub d1, d1, d0
fmov d2, 1.0e+0
ldr d0, [sp, 648]
fsub d0, d2, d0
fmul d1, d1, d0
ldr d0, [sp, 3024]
fmul d0, d1, d0
fmov d1, 1.0e+0
fsub d1, d1, d0
fmov d2, 1.0e+0
ldr d0, [sp, 680]
fsub d0, d2, d0
fdiv d0, d1, d0
str d0, [sp, 2944]
str xzr, [sp, 280]
ldr d1, [sp, 2944]
ldr d0, [sp, 2344]
fmul d0, d1, d0
str d0, [sp, 216]
fmov d1, 1.0e+0
ldr d0, [sp, 648]
fsub d1, d1, d0
ldr d2, [sp, 680]
fmov d0, 5.0e-1
fmul d2, d2, d0
ldr d0, [sp, 2992]
fmul d2, d2, d0
ldr d0, [sp, 2312]
fdiv d0, d2, d0
fadd d1, d1, d0
ldr d0, [sp, 2992]
fmul d0, d1, d0
ldr d1, [sp, 3024]
fmul d0, d1, d0
str d0, [sp, 232]
ldr d1, [sp, 2992]
fmov d0, 5.0e-1
fmul d1, d1, d0
ldr d0, [sp, 680]
fmul d1, d1, d0
ldr d0, [sp, 2312]
fdiv d1, d1, d0
ldr d0, [sp, 648]
fsub d1, d1, d0
fmov d0, 1.0e+0
fadd d1, d1, d0
ldr d0, [sp, 3024]
fmul d1, d1, d0
ldr d2, [sp, 2992]
fmov d0, 5.0e-1
fmul d2, d2, d0
ldr d0, [sp, 680]
fmul d2, d2, d0
ldr d0, [sp, 3024]
fmul d2, d2, d0
ldr d0, [sp, 2312]
fdiv d0, d2, d0
fadd d0, d1, d0
str d0, [sp, 3032]
ldr d0, [sp, 2992]
fmul d1, d0, d0
fmov d0, -5.0e-1
fmul d1, d1, d0
ldr d0, [sp, 680]
fmul d1, d1, d0
ldr d0, [sp, 3024]
fmul d1, d1, d0
ldr d0, [sp, 2312]
fmul d0, d0, d0
fdiv d0, d1, d0
str d0, [sp, 3040]
ldr d1, [sp, 3032]
ldr d0, [sp, 3128]
fmul d0, d1, d0
str d0, [sp, 288]
ldr d1, [sp, 3032]
ldr d0, [sp, 3016]
fmul d0, d1, d0
str d0, [sp, 248]
ldr d1, [sp, 3040]
ldr d0, [sp, 2344]
fmul d0, d1, d0
ldr d1, [sp, 248]
fadd d0, d1, d0
str d0, [sp, 248]
b .L42
.L176:
ldr x0, [sp, 80]
ldr d1, [x0]
ldr d0, [sp, 2312]
fdiv d0, d1, d0
fmov d1, 1.0e+0
fsub d0, d1, d0
str d0, [sp, 1416]
ldr d0, [sp, 2312]
fmov d1, -1.0e+0
fdiv d0, d1, d0
str d0, [sp, 3080]
ldr x0, [sp, 80]
ldr d1, [x0]
ldr d0, [sp, 2312]
fmul d0, d0, d0
fdiv d0, d1, d0
str d0, [sp, 2432]
ldr d1, [sp, 2432]
ldr d0, [sp, 2344]
fmul d0, d1, d0
str d0, [sp, 1432]
fmov d1, 1.0e+0
ldr d0, [sp, 680]
fsub d0, d1, d0
str d0, [sp, 1632]
ldr d1, [sp, 1632]
ldr d0, [sp, 1416]
bl pow
str d0, [sp, 1656]
ldr d1, [sp, 1656]
ldr d0, [sp, 1632]
fmul d1, d1, d0
ldr d0, [sp, 1416]
fdiv d0, d1, d0
str d0, [sp, 2768]
ldr d1, [sp, 2768]
ldr d0, [sp, 3080]
fmul d0, d1, d0
str d0, [sp, 3088]
ldr d1, [sp, 2768]
ldr d0, [sp, 1432]
fmul d0, d1, d0
str d0, [sp, 1680]
fmov d1, 1.0e+0
ldr d0, [sp, 1656]
fsub d1, d1, d0
ldr d0, [sp, 2312]
fmul d1, d1, d0
fmov d2, 1.0e+0
ldr d0, [sp, 680]
fsub d0, d2, d0
fdiv d0, d1, d0
str d0, [sp, 208]
fmov d1, 1.0e+0
ldr d0, [sp, 1656]
fsub d1, d1, d0
fmov d2, 1.0e+0
ldr d0, [sp, 680]
fsub d0, d2, d0
fdiv d0, d1, d0
str d0, [sp, 2944]
ldr d0, [sp, 2312]
fneg d1, d0
fmov d2, 1.0e+0
ldr d0, [sp, 680]
fsub d0, d2, d0
fdiv d0, d1, d0
str d0, [sp, 2952]
ldr d1, [sp, 2944]
ldr d0, [sp, 2344]
fmul d0, d1, d0
str d0, [sp, 216]
ldr d1, [sp, 2952]
ldr d0, [sp, 3088]
fmul d0, d1, d0
str d0, [sp, 280]
ldr d1, [sp, 2952]
ldr d0, [sp, 1680]
fmul d0, d1, d0
ldr d1, [sp, 216]
fadd d0, d1, d0
str d0, [sp, 216]
str xzr, [sp, 232]
str xzr, [sp, 288]
str xzr, [sp, 248]
.L42:
ldr d1, [sp, 208]
ldr d0, [sp, 232]
fadd d0, d1, d0
str d0, [sp, 296]
fmov d0, 1.0e+0
str d0, [sp, 3096]
fmov d0, 1.0e+0
str d0, [sp, 3136]
ldr d1, [sp, 3096]
ldr d0, [sp, 216]
fmul d0, d1, d0
str d0, [sp, 304]
ldr d1, [sp, 3096]
ldr d0, [sp, 280]
fmul d0, d1, d0
str d0, [sp, 312]
ldr d1, [sp, 3136]
ldr d0, [sp, 288]
fmul d0, d1, d0
ldr d1, [sp, 312]
fadd d0, d1, d0
str d0, [sp, 312]
ldr d1, [sp, 3136]
ldr d0, [sp, 248]
fmul d0, d1, d0
ldr d1, [sp, 304]
fadd d0, d1, d0
str d0, [sp, 304]
b .L43
.L175:
ldr d0, [sp, 2680]
fmul d1, d0, d0
ldr d2, [sp, 688]
fmov d0, 4.0e+0
fmul d2, d2, d0
ldr d0, [sp, 688]
fmul d0, d2, d0
fadd d0, d1, d0
bl sqrt
str d0, [sp, 2704]
ldr d0, [sp, 2680]
fmul d1, d0, d0
ldr d0, [sp, 688]
fmul d2, d0, d0
fmov d0, 4.0e+0
fmul d0, d2, d0
fadd d0, d1, d0
bl sqrt
fmov d1, d0
ldr d0, [sp, 2680]
fdiv d0, d0, d1
str d0, [sp, 2712]
ldr d1, [sp, 2712]
ldr d0, [sp, 2696]
fmul d0, d1, d0
str d0, [sp, 2720]
ldr d1, [sp, 2680]
ldr d0, [sp, 2704]
fadd d1, d1, d0
fmov d0, -5.0e-1
fmul d0, d1, d0
str d0, [sp, 2728]
fmov d0, -5.0e-1
str d0, [sp, 2736]
fmov d0, -5.0e-1
str d0, [sp, 2744]
ldr d1, [sp, 2736]
ldr d0, [sp, 2696]
fmul d0, d1, d0
str d0, [sp, 2752]
ldr d1, [sp, 2744]
ldr d0, [sp, 2720]
fmul d0, d1, d0
ldr d1, [sp, 2752]
fadd d0, d1, d0
str d0, [sp, 2752]
ldr d0, [sp, 2312]
ldr d1, [sp, 2728]
fdiv d0, d1, d0
fmov d1, 1.0e+0
fsub d0, d1, d0
str d0, [sp, 1416]
ldr d0, [sp, 2312]
fmov d1, -1.0e+0
fdiv d0, d1, d0
str d0, [sp, 2760]
ldr d0, [sp, 2312]
fmul d0, d0, d0
ldr d1, [sp, 2728]
fdiv d0, d1, d0
str d0, [sp, 2432]
ldr d1, [sp, 2760]
ldr d0, [sp, 2752]
fmul d0, d1, d0
str d0, [sp, 1432]
ldr d1, [sp, 2432]
ldr d0, [sp, 2344]
fmul d0, d1, d0
ldr d1, [sp, 1432]
fadd d0, d1, d0
str d0, [sp, 1432]
fmov d1, 1.0e+0
ldr d0, [sp, 680]
fsub d0, d1, d0
str d0, [sp, 1632]
ldr d1, [sp, 1632]
ldr d0, [sp, 1416]
bl pow
str d0, [sp, 1656]
ldr d1, [sp, 1656]
ldr d0, [sp, 1632]
fmul d1, d1, d0
ldr d0, [sp, 1416]
fdiv d0, d1, d0
str d0, [sp, 2768]
ldr d1, [sp, 2768]
ldr d0, [sp, 1432]
fmul d0, d1, d0
str d0, [sp, 1680]
ldr d0, [sp, 2312]
fneg d1, d0
ldr d0, [sp, 1656]
fmul d1, d1, d0
fmov d2, 1.0e+0
ldr d0, [sp, 680]
fsub d0, d2, d0
fdiv d0, d1, d0
str d0, [sp, 2776]
ldr d0, [sp, 1656]
fneg d1, d0
fmov d2, 1.0e+0
ldr d0, [sp, 680]
fsub d0, d2, d0
fdiv d0, d1, d0
str d0, [sp, 2784]
ldr d0, [sp, 2312]
fneg d1, d0
fmov d2, 1.0e+0
ldr d0, [sp, 680]
fsub d0, d2, d0
fdiv d0, d1, d0
str d0, [sp, 2792]
ldr d1, [sp, 2784]
ldr d0, [sp, 2344]
fmul d0, d1, d0
str d0, [sp, 2800]
ldr d1, [sp, 2792]
ldr d0, [sp, 1680]
fmul d0, d1, d0
ldr d1, [sp, 2800]
fadd d0, d1, d0
str d0, [sp, 2800]
ldr x0, [sp, 80]
ldr d0, [x0]
ldr d1, [sp, 2680]
fadd d0, d1, d0
str d0, [sp, 2808]
fmov d0, 1.0e+0
str d0, [sp, 3056]
fmov d0, 1.0e+0
str d0, [sp, 2824]
ldr d1, [sp, 2824]
ldr d0, [sp, 2696]
fmul d0, d1, d0
str d0, [sp, 2832]
ldr d0, [sp, 2808]
fmul d1, d0, d0
ldr d2, [sp, 688]
fmov d0, 4.0e+0
fmul d2, d2, d0
ldr d0, [sp, 688]
fmul d0, d2, d0
fadd d0, d1, d0
bl sqrt
str d0, [sp, 2840]
ldr d0, [sp, 2808]
fmul d1, d0, d0
ldr d0, [sp, 688]
fmul d2, d0, d0
fmov d0, 4.0e+0
fmul d0, d2, d0
fadd d0, d1, d0
bl sqrt
fmov d1, d0
ldr d0, [sp, 2808]
fdiv d0, d0, d1
str d0, [sp, 2848]
ldr d1, [sp, 2848]
ldr d0, [sp, 3056]
fmul d0, d1, d0
str d0, [sp, 3064]
ldr d1, [sp, 2848]
ldr d0, [sp, 2832]
fmul d0, d1, d0
str d0, [sp, 2864]
ldr d1, [sp, 2808]
ldr d0, [sp, 2840]
fsub d1, d1, d0
fmov d0, 5.0e-1
fmul d1, d1, d0
ldr d0, [sp, 2680]
fsub d0, d1, d0
str d0, [sp, 2872]
fmov d0, 5.0e-1
str d0, [sp, 2880]
fmov d0, -5.0e-1
str d0, [sp, 2888]
fmov d0, -1.0e+0
str d0, [sp, 2896]
ldr d1, [sp, 2880]
ldr d0, [sp, 3056]
fmul d0, d1, d0
str d0, [sp, 3072]
ldr d1, [sp, 2880]
ldr d0, [sp, 2832]
fmul d0, d1, d0
str d0, [sp, 2912]
ldr d1, [sp, 2888]
ldr d0, [sp, 3064]
fmul d0, d1, d0
ldr d1, [sp, 3072]
fadd d0, d1, d0
str d0, [sp, 3072]
ldr d1, [sp, 2888]
ldr d0, [sp, 2864]
fmul d0, d1, d0
ldr d1, [sp, 2912]
fadd d0, d1, d0
str d0, [sp, 2912]
ldr d1, [sp, 2896]
ldr d0, [sp, 2696]
fmul d0, d1, d0
ldr d1, [sp, 2912]
fadd d0, d1, d0
str d0, [sp, 2912]
ldr d0, [sp, 2312]
ldr d1, [sp, 2872]
fdiv d0, d1, d0
fmov d1, 1.0e+0
fsub d0, d1, d0
str d0, [sp, 1416]
ldr d0, [sp, 2312]
fmov d1, -1.0e+0
fdiv d0, d1, d0
str d0, [sp, 2920]
ldr d0, [sp, 2312]
fmul d0, d0, d0
ldr d1, [sp, 2872]
fdiv d0, d1, d0
str d0, [sp, 2432]
ldr d1, [sp, 2920]
ldr d0, [sp, 3072]
fmul d0, d1, d0
str d0, [sp, 3080]
ldr d1, [sp, 2920]
ldr d0, [sp, 2912]
fmul d0, d1, d0
str d0, [sp, 1432]
ldr d1, [sp, 2432]
ldr d0, [sp, 2344]
fmul d0, d1, d0
ldr d1, [sp, 1432]
fadd d0, d1, d0
str d0, [sp, 1432]
fmov d1, 1.0e+0
ldr d0, [sp, 680]
fsub d0, d1, d0
str d0, [sp, 1632]
ldr d1, [sp, 1632]
ldr d0, [sp, 1416]
bl pow
str d0, [sp, 1656]
ldr d1, [sp, 1656]
ldr d0, [sp, 1632]
fmul d1, d1, d0
ldr d0, [sp, 1416]
fdiv d0, d1, d0
str d0, [sp, 2768]
ldr d1, [sp, 2768]
ldr d0, [sp, 3080]
fmul d0, d1, d0
str d0, [sp, 3088]
ldr d1, [sp, 2768]
ldr d0, [sp, 1432]
fmul d0, d1, d0
str d0, [sp, 1680]
ldr d0, [sp, 2312]
fneg d1, d0
ldr d0, [sp, 1656]
fmul d1, d1, d0
fmov d2, 1.0e+0
ldr d0, [sp, 680]
fsub d0, d2, d0
fdiv d0, d1, d0
str d0, [sp, 208]
ldr d0, [sp, 1656]
fneg d1, d0
fmov d2, 1.0e+0
ldr d0, [sp, 680]
fsub d0, d2, d0
fdiv d0, d1, d0
str d0, [sp, 2944]
ldr d0, [sp, 2312]
fneg d1, d0
fmov d2, 1.0e+0
ldr d0, [sp, 680]
fsub d0, d2, d0
fdiv d0, d1, d0
str d0, [sp, 2952]
ldr d1, [sp, 2944]
ldr d0, [sp, 2344]
fmul d0, d1, d0
str d0, [sp, 216]
ldr d1, [sp, 2952]
ldr d0, [sp, 3088]
fmul d0, d1, d0
str d0, [sp, 280]
ldr d1, [sp, 2952]
ldr d0, [sp, 1680]
fmul d0, d1, d0
ldr d1, [sp, 216]
fadd d0, d1, d0
str d0, [sp, 216]
fmov d1, 1.0e+0
ldr d0, [sp, 648]
fsub d0, d1, d0
str d0, [sp, 1416]
ldr d0, [sp, 680]
fneg d0, d0
str d0, [sp, 1632]
ldr d1, [sp, 1632]
ldr d0, [sp, 1416]
bl pow
str d0, [sp, 1656]
ldr x0, [sp, 80]
ldr d1, [x0]
ldr d0, [sp, 2872]
fsub d1, d1, d0
ldr d0, [sp, 2728]
fadd d1, d1, d0
ldr d0, [sp, 1656]
fmul d1, d1, d0
ldr d0, [sp, 208]
fadd d1, d1, d0
ldr d0, [sp, 2776]
fsub d0, d1, d0
str d0, [sp, 296]
fmov d0, 1.0e+0
str d0, [sp, 3096]
ldr d0, [sp, 1656]
str d0, [sp, 312]
ldr d0, [sp, 1656]
fneg d0, d0
str d0, [sp, 3104]
ldr d0, [sp, 1656]
str d0, [sp, 3112]
fmov d0, -1.0e+0
str d0, [sp, 3120]
ldr d1, [sp, 3096]
ldr d0, [sp, 216]
fmul d0, d1, d0
str d0, [sp, 304]
ldr d1, [sp, 3096]
ldr d0, [sp, 280]
fmul d0, d1, d0
ldr d1, [sp, 312]
fadd d0, d1, d0
str d0, [sp, 312]
ldr d1, [sp, 3104]
ldr d0, [sp, 3072]
fmul d0, d1, d0
ldr d1, [sp, 312]
fadd d0, d1, d0
str d0, [sp, 312]
ldr d1, [sp, 3104]
ldr d0, [sp, 2912]
fmul d0, d1, d0
ldr d1, [sp, 304]
fadd d0, d1, d0
str d0, [sp, 304]
ldr d1, [sp, 3112]
ldr d0, [sp, 2752]
fmul d0, d1, d0
ldr d1, [sp, 304]
fadd d0, d1, d0
str d0, [sp, 304]
ldr d1, [sp, 3120]
ldr d0, [sp, 2800]
fmul d0, d1, d0
ldr d1, [sp, 304]
fadd d0, d1, d0
str d0, [sp, 304]
.L43:
ldr d0, [sp, 2352]
fneg d0, d0
ldr d1, [sp, 648]
fmul d0, d1, d0
str d0, [sp, 2680]
ldr d0, [sp, 648]
fneg d0, d0
str d0, [sp, 3144]
ldr d1, [sp, 3144]
ldr d0, [sp, 2384]
fmul d0, d1, d0
str d0, [sp, 2696]
ldr d0, [sp, 744]
fcmpe d0, #0.0
bls .L136
b .L177
.L136:
ldr x0, [sp, 72]
ldr d0, [x0]
ldr d1, [sp, 2680]
fadd d0, d1, d0
str d0, [sp, 2992]
fmov d0, 1.0e+0
str d0, [sp, 3600]
fmov d0, 1.0e+0
str d0, [sp, 3008]
ldr d1, [sp, 3008]
ldr d0, [sp, 2696]
fmul d0, d1, d0
str d0, [sp, 3016]
ldr d0, [sp, 2992]
fcmpe d0, #0.0
bgt .L137
b .L178
.L137:
fmov d1, 1.0e+0
ldr d0, [sp, 648]
fsub d0, d1, d0
str d0, [sp, 1416]
fmov d1, -1.0e+0
ldr d0, [sp, 736]
fsub d0, d1, d0
str d0, [sp, 1632]
ldr d1, [sp, 1632]
ldr d0, [sp, 1416]
bl pow
str d0, [sp, 3024]
fmov d1, 1.0e+0
ldr d0, [sp, 648]
fsub d1, d1, d0
ldr d0, [sp, 3024]
fmul d1, d1, d0
fmov d2, 1.0e+0
ldr d0, [sp, 648]
fsub d0, d2, d0
fmul d0, d1, d0
fmov d1, 1.0e+0
fsub d1, d1, d0
ldr d0, [sp, 2352]
fmul d1, d1, d0
fmov d2, 1.0e+0
ldr d0, [sp, 736]
fsub d0, d2, d0
fdiv d0, d1, d0
str d0, [sp, 208]
fmov d1, 1.0e+0
ldr d0, [sp, 648]
fsub d1, d1, d0
fmov d2, 1.0e+0
ldr d0, [sp, 648]
fsub d0, d2, d0
fmul d1, d1, d0
ldr d0, [sp, 3024]
fmul d0, d1, d0
fmov d1, 1.0e+0
fsub d1, d1, d0
fmov d2, 1.0e+0
ldr d0, [sp, 736]
fsub d0, d2, d0
fdiv d0, d1, d0
str d0, [sp, 3336]
str xzr, [sp, 320]
ldr d1, [sp, 3336]
ldr d0, [sp, 2384]
fmul d0, d1, d0
str d0, [sp, 216]
fmov d1, 1.0e+0
ldr d0, [sp, 648]
fsub d1, d1, d0
ldr d2, [sp, 736]
fmov d0, 5.0e-1
fmul d2, d2, d0
ldr d0, [sp, 2992]
fmul d2, d2, d0
ldr d0, [sp, 2352]
fdiv d0, d2, d0
fadd d1, d1, d0
ldr d0, [sp, 2992]
fmul d0, d1, d0
ldr d1, [sp, 3024]
fmul d0, d1, d0
str d0, [sp, 232]
ldr d1, [sp, 2992]
fmov d0, 5.0e-1
fmul d1, d1, d0
ldr d0, [sp, 736]
fmul d1, d1, d0
ldr d0, [sp, 2352]
fdiv d1, d1, d0
ldr d0, [sp, 648]
fsub d1, d1, d0
fmov d0, 1.0e+0
fadd d1, d1, d0
ldr d0, [sp, 3024]
fmul d1, d1, d0
ldr d2, [sp, 2992]
fmov d0, 5.0e-1
fmul d2, d2, d0
ldr d0, [sp, 736]
fmul d2, d2, d0
ldr d0, [sp, 3024]
fmul d2, d2, d0
ldr d0, [sp, 2352]
fdiv d0, d2, d0
fadd d0, d1, d0
str d0, [sp, 3032]
ldr d0, [sp, 2992]
fmul d1, d0, d0
fmov d0, -5.0e-1
fmul d1, d1, d0
ldr d0, [sp, 736]
fmul d1, d1, d0
ldr d0, [sp, 3024]
fmul d1, d1, d0
ldr d0, [sp, 2352]
fmul d0, d0, d0
fdiv d0, d1, d0
str d0, [sp, 3608]
ldr d1, [sp, 3032]
ldr d0, [sp, 3600]
fmul d0, d1, d0
str d0, [sp, 328]
ldr d1, [sp, 3032]
ldr d0, [sp, 3016]
fmul d0, d1, d0
str d0, [sp, 248]
ldr d1, [sp, 3608]
ldr d0, [sp, 2384]
fmul d0, d1, d0
ldr d1, [sp, 248]
fadd d0, d1, d0
str d0, [sp, 248]
b .L48
.L178:
ldr d0, [sp, 1176]
fcmpe d0, #0.0
bgt .L138
b .L49
.L138:
ldr x0, [sp, 72]
ldr d1, [x0]
ldr d0, [sp, 1176]
fneg d0, d0
fcmpe d1, d0
bmi .L139
b .L49
.L139:
ldr d0, [sp, 2352]
ldr d1, [sp, 1176]
fdiv d1, d1, d0
fmov d0, 1.0e+0
fadd d0, d1, d0
str d0, [sp, 1416]
ldr d0, [sp, 1176]
fneg d1, d0
ldr d0, [sp, 2352]
fmul d0, d0, d0
fdiv d0, d1, d0
str d0, [sp, 2472]
ldr d1, [sp, 2472]
ldr d0, [sp, 2384]
fmul d0, d1, d0
str d0, [sp, 1432]
fmov d1, 1.0e+0
ldr d0, [sp, 736]
fsub d0, d1, d0
str d0, [sp, 1632]
ldr d1, [sp, 1632]
ldr d0, [sp, 1416]
bl pow
str d0, [sp, 1656]
ldr d1, [sp, 1656]
ldr d0, [sp, 1632]
fmul d1, d1, d0
ldr d0, [sp, 1416]
fdiv d0, d1, d0
str d0, [sp, 2768]
ldr d1, [sp, 2768]
ldr d0, [sp, 1432]
fmul d0, d1, d0
str d0, [sp, 1680]
fmov d1, 1.0e+0
ldr d0, [sp, 736]
fsub d1, d1, d0
ldr x0, [sp, 72]
ldr d2, [x0]
ldr d0, [sp, 1176]
fadd d0, d2, d0
fmul d1, d1, d0
ldr d2, [sp, 2352]
ldr d0, [sp, 1176]
fadd d0, d2, d0
fdiv d0, d1, d0
fmov d1, 1.0e+0
fsub d1, d1, d0
ldr d0, [sp, 1656]
fmul d0, d1, d0
fmov d1, 1.0e+0
fsub d1, d1, d0
ldr d0, [sp, 2352]
fmul d1, d1, d0
fmov d2, 1.0e+0
ldr d0, [sp, 736]
fsub d0, d2, d0
fdiv d0, d1, d0
str d0, [sp, 208]
fmov d1, 1.0e+0
ldr d0, [sp, 736]
fsub d1, d1, d0
ldr x0, [sp, 72]
ldr d2, [x0]
ldr d0, [sp, 1176]
fadd d0, d2, d0
fmul d1, d1, d0
ldr d2, [sp, 1176]
ldr d0, [sp, 2352]
fadd d0, d2, d0
fdiv d0, d1, d0
fmov d1, 1.0e+0
fsub d1, d1, d0
ldr d0, [sp, 1656]
fmul d0, d1, d0
fmov d1, 1.0e+0
fsub d1, d1, d0
fmov d2, 1.0e+0
ldr d0, [sp, 736]
fsub d0, d2, d0
fdiv d1, d1, d0
ldr x0, [sp, 72]
ldr d2, [x0]
ldr d0, [sp, 1176]
fadd d2, d2, d0
ldr d0, [sp, 2352]
fmul d2, d2, d0
ldr d0, [sp, 1656]
fmul d2, d2, d0
ldr d3, [sp, 1176]
ldr d0, [sp, 2352]
fadd d3, d3, d0
ldr d4, [sp, 1176]
ldr d0, [sp, 2352]
fadd d0, d4, d0
fmul d0, d3, d0
fdiv d0, d2, d0
fsub d0, d1, d0
str d0, [sp, 3336]
fmov d1, 1.0e+0
ldr d0, [sp, 736]
fsub d1, d1, d0
ldr x0, [sp, 72]
ldr d2, [x0]
ldr d0, [sp, 1176]
fadd d0, d2, d0
fmul d1, d1, d0
ldr d2, [sp, 1176]
ldr d0, [sp, 2352]
fadd d0, d2, d0
fdiv d1, d1, d0
fmov d0, 1.0e+0
fsub d1, d1, d0
ldr d0, [sp, 2352]
fmul d1, d1, d0
fmov d2, 1.0e+0
ldr d0, [sp, 736]
fsub d0, d2, d0
fdiv d0, d1, d0
str d0, [sp, 2952]
ldr d1, [sp, 2352]
ldr d0, [sp, 1656]
fmul d1, d1, d0
ldr d2, [sp, 1176]
ldr d0, [sp, 2352]
fadd d0, d2, d0
fdiv d0, d1, d0
str d0, [sp, 320]
ldr d1, [sp, 3336]
ldr d0, [sp, 2384]
fmul d0, d1, d0
str d0, [sp, 216]
ldr d1, [sp, 2952]
ldr d0, [sp, 1680]
fmul d0, d1, d0
ldr d1, [sp, 216]
fadd d0, d1, d0
str d0, [sp, 216]
b .L52
.L49:
ldr x0, [sp, 72]
ldr d1, [x0]
ldr d0, [sp, 2352]
fdiv d0, d1, d0
fmov d1, 1.0e+0
fsub d0, d1, d0
str d0, [sp, 1416]
ldr d0, [sp, 2352]
fmov d1, -1.0e+0
fdiv d0, d1, d0
str d0, [sp, 3320]
ldr x0, [sp, 72]
ldr d1, [x0]
ldr d0, [sp, 2352]
fmul d0, d0, d0
fdiv d0, d1, d0
str d0, [sp, 2472]
ldr d1, [sp, 2472]
ldr d0, [sp, 2384]
fmul d0, d1, d0
str d0, [sp, 1432]
fmov d1, 1.0e+0
ldr d0, [sp, 736]
fsub d0, d1, d0
str d0, [sp, 1632]
ldr d1, [sp, 1632]
ldr d0, [sp, 1416]
bl pow
str d0, [sp, 1656]
ldr d1, [sp, 1656]
ldr d0, [sp, 1632]
fmul d1, d1, d0
ldr d0, [sp, 1416]
fdiv d0, d1, d0
str d0, [sp, 2768]
ldr d1, [sp, 2768]
ldr d0, [sp, 3320]
fmul d0, d1, d0
str d0, [sp, 3328]
ldr d1, [sp, 2768]
ldr d0, [sp, 1432]
fmul d0, d1, d0
str d0, [sp, 1680]
fmov d1, 1.0e+0
ldr d0, [sp, 1656]
fsub d1, d1, d0
ldr d0, [sp, 2352]
fmul d1, d1, d0
fmov d2, 1.0e+0
ldr d0, [sp, 736]
fsub d0, d2, d0
fdiv d0, d1, d0
str d0, [sp, 208]
fmov d1, 1.0e+0
ldr d0, [sp, 1656]
fsub d1, d1, d0
fmov d2, 1.0e+0
ldr d0, [sp, 736]
fsub d0, d2, d0
fdiv d0, d1, d0
str d0, [sp, 3336]
ldr d0, [sp, 2352]
fneg d1, d0
fmov d2, 1.0e+0
ldr d0, [sp, 736]
fsub d0, d2, d0
fdiv d0, d1, d0
str d0, [sp, 2952]
ldr d1, [sp, 3336]
ldr d0, [sp, 2384]
fmul d0, d1, d0
str d0, [sp, 216]
ldr d1, [sp, 2952]
ldr d0, [sp, 3328]
fmul d0, d1, d0
str d0, [sp, 320]
ldr d1, [sp, 2952]
ldr d0, [sp, 1680]
fmul d0, d1, d0
ldr d1, [sp, 216]
fadd d0, d1, d0
str d0, [sp, 216]
.L52:
str xzr, [sp, 232]
str xzr, [sp, 328]
str xzr, [sp, 248]
.L48:
ldr d1, [sp, 208]
ldr d0, [sp, 232]
fadd d0, d1, d0
str d0, [sp, 336]
fmov d0, 1.0e+0
str d0, [sp, 3536]
fmov d0, 1.0e+0
str d0, [sp, 3616]
ldr d1, [sp, 3536]
ldr d0, [sp, 216]
fmul d0, d1, d0
str d0, [sp, 344]
ldr d1, [sp, 3536]
ldr d0, [sp, 320]
fmul d0, d1, d0
str d0, [sp, 352]
ldr d1, [sp, 3616]
ldr d0, [sp, 328]
fmul d0, d1, d0
ldr d1, [sp, 352]
fadd d0, d1, d0
str d0, [sp, 352]
ldr d1, [sp, 3616]
ldr d0, [sp, 248]
fmul d0, d1, d0
ldr d1, [sp, 344]
fadd d0, d1, d0
str d0, [sp, 344]
b .L53
.L177:
ldr d0, [sp, 1176]
fcmpe d0, #0.0
bgt .L140
b .L54
.L140:
ldr d0, [sp, 1184]
fcmpe d0, #0.0
bgt .L141
b .L54
.L141:
ldr d1, [sp, 1176]
ldr d0, [sp, 2680]
fadd d1, d1, d0
ldr d2, [sp, 1176]
ldr d0, [sp, 2680]
fsub d0, d2, d0
fdiv d0, d1, d0
str d0, [sp, 3152]
ldr d1, [sp, 1176]
ldr d0, [sp, 2680]
fadd d1, d1, d0
ldr d2, [sp, 1176]
ldr d0, [sp, 2680]
fsub d2, d2, d0
ldr d3, [sp, 1176]
ldr d0, [sp, 2680]
fsub d0, d3, d0
fmul d0, d2, d0
fdiv d1, d1, d0
ldr d2, [sp, 1176]
ldr d0, [sp, 2680]
fsub d0, d2, d0
fmov d2, 1.0e+0
fdiv d0, d2, d0
fadd d0, d1, d0
str d0, [sp, 3160]
ldr d1, [sp, 3160]
ldr d0, [sp, 2696]
fmul d0, d1, d0
str d0, [sp, 3168]
ldr d0, [sp, 3152]
fadd d8, d0, d0
ldr d1, [sp, 3152]
fmov d0, 1.0e+0
fsub d1, d1, d0
ldr d2, [sp, 3152]
fmov d0, 1.0e+0
fsub d0, d2, d0
fmul d1, d1, d0
ldr d2, [sp, 744]
fmov d0, 4.0e+0
fmul d2, d2, d0
ldr d0, [sp, 744]
fmul d0, d2, d0
fadd d0, d1, d0
bl sqrt
fmov d9, d0
ldr d1, [sp, 3152]
fmov d0, 1.0e+0
fadd d1, d1, d0
ldr d2, [sp, 3152]
fmov d0, 1.0e+0
fadd d0, d2, d0
fmul d1, d1, d0
ldr d2, [sp, 1184]
fmov d0, 4.0e+0
fmul d2, d2, d0
ldr d0, [sp, 1184]
fmul d0, d2, d0
fadd d0, d1, d0
bl sqrt
fadd d0, d9, d0
fdiv d0, d8, d0
str d0, [sp, 3176]
ldr d1, [sp, 3152]
fmov d0, 1.0e+0
fadd d1, d1, d0
ldr d2, [sp, 3152]
fmov d0, 1.0e+0
fadd d0, d2, d0
fmul d1, d1, d0
ldr d0, [sp, 1184]
fmul d2, d0, d0
fmov d0, 4.0e+0
fmul d0, d2, d0
fadd d0, d1, d0
bl sqrt
fmov d8, d0
ldr d1, [sp, 3152]
fmov d0, 1.0e+0
fsub d1, d1, d0
ldr d2, [sp, 3152]
fmov d0, 1.0e+0
fsub d0, d2, d0
fmul d1, d1, d0
ldr d0, [sp, 744]
fmul d2, d0, d0
fmov d0, 4.0e+0
fmul d0, d2, d0
fadd d0, d1, d0
bl sqrt
fadd d0, d8, d0
fmov d1, 2.0e+0
fdiv d8, d1, d0
ldr d0, [sp, 3152]
fadd d9, d0, d0
ldr d1, [sp, 3152]
fmov d0, 1.0e+0
fadd d10, d1, d0
ldr d1, [sp, 3152]
fmov d0, 1.0e+0
fadd d1, d1, d0
ldr d2, [sp, 3152]
fmov d0, 1.0e+0
fadd d0, d2, d0
fmul d1, d1, d0
ldr d0, [sp, 1184]
fmul d2, d0, d0
fmov d0, 4.0e+0
fmul d0, d2, d0
fadd d0, d1, d0
bl sqrt
fdiv d10, d10, d0
ldr d1, [sp, 3152]
fmov d0, 1.0e+0
fsub d11, d1, d0
ldr d1, [sp, 3152]
fmov d0, 1.0e+0
fsub d1, d1, d0
ldr d2, [sp, 3152]
fmov d0, 1.0e+0
fsub d0, d2, d0
fmul d1, d1, d0
ldr d0, [sp, 744]
fmul d2, d0, d0
fmov d0, 4.0e+0
fmul d0, d2, d0
fadd d0, d1, d0
bl sqrt
fdiv d0, d11, d0
fadd d0, d10, d0
fmul d9, d9, d0
ldr d1, [sp, 3152]
fmov d0, 1.0e+0
fadd d1, d1, d0
ldr d2, [sp, 3152]
fmov d0, 1.0e+0
fadd d0, d2, d0
fmul d1, d1, d0
ldr d0, [sp, 1184]
fmul d2, d0, d0
fmov d0, 4.0e+0
fmul d0, d2, d0
fadd d0, d1, d0
bl sqrt
fmov d10, d0
ldr d1, [sp, 3152]
fmov d0, 1.0e+0
fsub d1, d1, d0
ldr d2, [sp, 3152]
fmov d0, 1.0e+0
fsub d0, d2, d0
fmul d1, d1, d0
ldr d0, [sp, 744]
fmul d2, d0, d0
fmov d0, 4.0e+0
fmul d0, d2, d0
fadd d0, d1, d0
bl sqrt
fadd d10, d10, d0
ldr d1, [sp, 3152]
fmov d0, 1.0e+0
fadd d1, d1, d0
ldr d2, [sp, 3152]
fmov d0, 1.0e+0
fadd d0, d2, d0
fmul d1, d1, d0
ldr d0, [sp, 1184]
fmul d2, d0, d0
fmov d0, 4.0e+0
fmul d0, d2, d0
fadd d0, d1, d0
bl sqrt
fmov d11, d0
ldr d1, [sp, 3152]
fmov d0, 1.0e+0
fsub d1, d1, d0
ldr d2, [sp, 3152]
fmov d0, 1.0e+0
fsub d0, d2, d0
fmul d1, d1, d0
ldr d0, [sp, 744]
fmul d2, d0, d0
fmov d0, 4.0e+0
fmul d0, d2, d0
fadd d0, d1, d0
bl sqrt
fadd d0, d11, d0
fmul d0, d10, d0
fdiv d0, d9, d0
fsub d0, d8, d0
str d0, [sp, 3184]
ldr d1, [sp, 3184]
ldr d0, [sp, 3168]
fmul d0, d1, d0
str d0, [sp, 3192]
ldr d1, [sp, 1176]
ldr d0, [sp, 2680]
fsub d1, d1, d0
ldr d0, [sp, 3176]
fmul d1, d1, d0
ldr d0, [sp, 1176]
fsub d1, d1, d0
ldr d0, [sp, 2680]
fsub d1, d1, d0
fmov d0, 5.0e-1
fmul d0, d1, d0
str d0, [sp, 2728]
ldr d1, [sp, 1176]
ldr d0, [sp, 2680]
fsub d1, d1, d0
fmov d0, 5.0e-1
fmul d0, d1, d0
str d0, [sp, 3200]
ldr d0, [sp, 3176]
fneg d1, d0
fmov d0, 1.0e+0
fsub d1, d1, d0
fmov d0, 5.0e-1
fmul d0, d1, d0
str d0, [sp, 2736]
ldr d1, [sp, 3200]
ldr d0, [sp, 3192]
fmul d0, d1, d0
str d0, [sp, 2752]
ldr d1, [sp, 2736]
ldr d0, [sp, 2696]
fmul d0, d1, d0
ldr d1, [sp, 2752]
fadd d0, d1, d0
str d0, [sp, 2752]
ldr d0, [sp, 2352]
ldr d1, [sp, 2728]
fdiv d0, d1, d0
fmov d1, 1.0e+0
fsub d0, d1, d0
str d0, [sp, 1416]
ldr d0, [sp, 2352]
fmov d1, -1.0e+0
fdiv d0, d1, d0
str d0, [sp, 2760]
ldr d0, [sp, 2352]
fmul d0, d0, d0
ldr d1, [sp, 2728]
fdiv d0, d1, d0
str d0, [sp, 2472]
ldr d1, [sp, 2760]
ldr d0, [sp, 2752]
fmul d0, d1, d0
str d0, [sp, 1432]
ldr d1, [sp, 2472]
ldr d0, [sp, 2384]
fmul d0, d1, d0
ldr d1, [sp, 1432]
fadd d0, d1, d0
str d0, [sp, 1432]
fmov d1, 1.0e+0
ldr d0, [sp, 736]
fsub d0, d1, d0
str d0, [sp, 1632]
ldr d1, [sp, 1632]
ldr d0, [sp, 1416]
bl pow
str d0, [sp, 1656]
ldr d1, [sp, 1656]
ldr d0, [sp, 1632]
fmul d1, d1, d0
ldr d0, [sp, 1416]
fdiv d0, d1, d0
str d0, [sp, 2768]
ldr d1, [sp, 2768]
ldr d0, [sp, 1432]
fmul d0, d1, d0
str d0, [sp, 1680]
fmov d1, 1.0e+0
ldr d0, [sp, 1656]
fsub d1, d1, d0
ldr d0, [sp, 2352]
fmul d1, d1, d0
fmov d2, 1.0e+0
ldr d0, [sp, 736]
fsub d0, d2, d0
fdiv d0, d1, d0
str d0, [sp, 3208]
fmov d1, 1.0e+0
ldr d0, [sp, 1656]
fsub d1, d1, d0
fmov d2, 1.0e+0
ldr d0, [sp, 736]
fsub d0, d2, d0
fdiv d0, d1, d0
str d0, [sp, 3216]
ldr d0, [sp, 2352]
fneg d1, d0
fmov d2, 1.0e+0
ldr d0, [sp, 736]
fsub d0, d2, d0
fdiv d0, d1, d0
str d0, [sp, 3224]
ldr d1, [sp, 3216]
ldr d0, [sp, 2384]
fmul d0, d1, d0
str d0, [sp, 3232]
ldr d1, [sp, 3224]
ldr d0, [sp, 1680]
fmul d0, d1, d0
ldr d1, [sp, 3232]
fadd d0, d1, d0
str d0, [sp, 3232]
ldr x0, [sp, 72]
ldr d0, [x0]
fadd d1, d0, d0
ldr d0, [sp, 1176]
fadd d1, d1, d0
ldr d0, [sp, 2680]
fadd d1, d1, d0
ldr d2, [sp, 1176]
ldr d0, [sp, 2680]
fsub d0, d2, d0
fdiv d0, d1, d0
str d0, [sp, 3240]
ldr d1, [sp, 1176]
ldr d0, [sp, 2680]
fsub d0, d1, d0
fmov d1, 2.0e+0
fdiv d0, d1, d0
str d0, [sp, 3248]
ldr x0, [sp, 72]
ldr d0, [x0]
fadd d1, d0, d0
ldr d0, [sp, 1176]
fadd d1, d1, d0
ldr d0, [sp, 2680]
fadd d1, d1, d0
ldr d2, [sp, 1176]
ldr d0, [sp, 2680]
fsub d2, d2, d0
ldr d3, [sp, 1176]
ldr d0, [sp, 2680]
fsub d0, d3, d0
fmul d0, d2, d0
fdiv d1, d1, d0
ldr d2, [sp, 1176]
ldr d0, [sp, 2680]
fsub d0, d2, d0
fmov d2, 1.0e+0
fdiv d0, d2, d0
fadd d0, d1, d0
str d0, [sp, 3256]
ldr d1, [sp, 3256]
ldr d0, [sp, 2696]
fmul d0, d1, d0
str d0, [sp, 3264]
ldr d0, [sp, 3240]
fadd d8, d0, d0
ldr d1, [sp, 3240]
fmov d0, 1.0e+0
fsub d1, d1, d0
ldr d2, [sp, 3240]
fmov d0, 1.0e+0
fsub d0, d2, d0
fmul d1, d1, d0
ldr d2, [sp, 744]
fmov d0, 4.0e+0
fmul d2, d2, d0
ldr d0, [sp, 744]
fmul d0, d2, d0
fadd d0, d1, d0
bl sqrt
fmov d9, d0
ldr d1, [sp, 3240]
fmov d0, 1.0e+0
fadd d1, d1, d0
ldr d2, [sp, 3240]
fmov d0, 1.0e+0
fadd d0, d2, d0
fmul d1, d1, d0
ldr d2, [sp, 1184]
fmov d0, 4.0e+0
fmul d2, d2, d0
ldr d0, [sp, 1184]
fmul d0, d2, d0
fadd d0, d1, d0
bl sqrt
fadd d0, d9, d0
fdiv d0, d8, d0
str d0, [sp, 3272]
ldr d1, [sp, 3240]
fmov d0, 1.0e+0
fadd d1, d1, d0
ldr d2, [sp, 3240]
fmov d0, 1.0e+0
fadd d0, d2, d0
fmul d1, d1, d0
ldr d0, [sp, 1184]
fmul d2, d0, d0
fmov d0, 4.0e+0
fmul d0, d2, d0
fadd d0, d1, d0
bl sqrt
fmov d8, d0
ldr d1, [sp, 3240]
fmov d0, 1.0e+0
fsub d1, d1, d0
ldr d2, [sp, 3240]
fmov d0, 1.0e+0
fsub d0, d2, d0
fmul d1, d1, d0
ldr d0, [sp, 744]
fmul d2, d0, d0
fmov d0, 4.0e+0
fmul d0, d2, d0
fadd d0, d1, d0
bl sqrt
fadd d0, d8, d0
fmov d1, 2.0e+0
fdiv d8, d1, d0
ldr d0, [sp, 3240]
fadd d9, d0, d0
ldr d1, [sp, 3240]
fmov d0, 1.0e+0
fadd d10, d1, d0
ldr d1, [sp, 3240]
fmov d0, 1.0e+0
fadd d1, d1, d0
ldr d2, [sp, 3240]
fmov d0, 1.0e+0
fadd d0, d2, d0
fmul d1, d1, d0
ldr d0, [sp, 1184]
fmul d2, d0, d0
fmov d0, 4.0e+0
fmul d0, d2, d0
fadd d0, d1, d0
bl sqrt
fdiv d10, d10, d0
ldr d1, [sp, 3240]
fmov d0, 1.0e+0
fsub d11, d1, d0
ldr d1, [sp, 3240]
fmov d0, 1.0e+0
fsub d1, d1, d0
ldr d2, [sp, 3240]
fmov d0, 1.0e+0
fsub d0, d2, d0
fmul d1, d1, d0
ldr d0, [sp, 744]
fmul d2, d0, d0
fmov d0, 4.0e+0
fmul d0, d2, d0
fadd d0, d1, d0
bl sqrt
fdiv d0, d11, d0
fadd d0, d10, d0
fmul d9, d9, d0
ldr d1, [sp, 3240]
fmov d0, 1.0e+0
fadd d1, d1, d0
ldr d2, [sp, 3240]
fmov d0, 1.0e+0
fadd d0, d2, d0
fmul d1, d1, d0
ldr d0, [sp, 1184]
fmul d2, d0, d0
fmov d0, 4.0e+0
fmul d0, d2, d0
fadd d0, d1, d0
bl sqrt
fmov d10, d0
ldr d1, [sp, 3240]
fmov d0, 1.0e+0
fsub d1, d1, d0
ldr d2, [sp, 3240]
fmov d0, 1.0e+0
fsub d0, d2, d0
fmul d1, d1, d0
ldr d0, [sp, 744]
fmul d2, d0, d0
fmov d0, 4.0e+0
fmul d0, d2, d0
fadd d0, d1, d0
bl sqrt
fadd d10, d10, d0
ldr d1, [sp, 3240]
fmov d0, 1.0e+0
fadd d1, d1, d0
ldr d2, [sp, 3240]
fmov d0, 1.0e+0
fadd d0, d2, d0
fmul d1, d1, d0
ldr d0, [sp, 1184]
fmul d2, d0, d0
fmov d0, 4.0e+0
fmul d0, d2, d0
fadd d0, d1, d0
bl sqrt
fmov d11, d0
ldr d1, [sp, 3240]
fmov d0, 1.0e+0
fsub d1, d1, d0
ldr d2, [sp, 3240]
fmov d0, 1.0e+0
fsub d0, d2, d0
fmul d1, d1, d0
ldr d0, [sp, 744]
fmul d2, d0, d0
fmov d0, 4.0e+0
fmul d0, d2, d0
fadd d0, d1, d0
bl sqrt
fadd d0, d11, d0
fmul d0, d10, d0
fdiv d0, d9, d0
fsub d0, d8, d0
str d0, [sp, 3280]
ldr d1, [sp, 3280]
ldr d0, [sp, 3248]
fmul d0, d1, d0
str d0, [sp, 3288]
ldr d1, [sp, 3280]
ldr d0, [sp, 3264]
fmul d0, d1, d0
str d0, [sp, 3296]
ldr d1, [sp, 1176]
ldr d0, [sp, 2680]
fsub d1, d1, d0
ldr d0, [sp, 3272]
fmul d1, d1, d0
ldr d0, [sp, 1176]
fsub d1, d1, d0
ldr d0, [sp, 2680]
fsub d1, d1, d0
fmov d0, 5.0e-1
fmul d0, d1, d0
str d0, [sp, 2872]
ldr d1, [sp, 1176]
ldr d0, [sp, 2680]
fsub d1, d1, d0
fmov d0, 5.0e-1
fmul d0, d1, d0
str d0, [sp, 3304]
ldr d0, [sp, 3272]
fneg d1, d0
fmov d0, 1.0e+0
fsub d1, d1, d0
fmov d0, 5.0e-1
fmul d0, d1, d0
str d0, [sp, 2896]
ldr d1, [sp, 3304]
ldr d0, [sp, 3288]
fmul d0, d1, d0
str d0, [sp, 3312]
ldr d1, [sp, 3304]
ldr d0, [sp, 3296]
fmul d0, d1, d0
str d0, [sp, 2912]
ldr d1, [sp, 2896]
ldr d0, [sp, 2696]
fmul d0, d1, d0
ldr d1, [sp, 2912]
fadd d0, d1, d0
str d0, [sp, 2912]
ldr d0, [sp, 2352]
ldr d1, [sp, 2872]
fdiv d0, d1, d0
fmov d1, 1.0e+0
fsub d0, d1, d0
str d0, [sp, 1416]
ldr d0, [sp, 2352]
fmov d1, -1.0e+0
fdiv d0, d1, d0
str d0, [sp, 2920]
ldr d0, [sp, 2352]
fmul d0, d0, d0
ldr d1, [sp, 2872]
fdiv d0, d1, d0
str d0, [sp, 2472]
ldr d1, [sp, 2920]
ldr d0, [sp, 3312]
fmul d0, d1, d0
str d0, [sp, 3320]
ldr d1, [sp, 2920]
ldr d0, [sp, 2912]
fmul d0, d1, d0
str d0, [sp, 1432]
ldr d1, [sp, 2472]
ldr d0, [sp, 2384]
fmul d0, d1, d0
ldr d1, [sp, 1432]
fadd d0, d1, d0
str d0, [sp, 1432]
fmov d1, 1.0e+0
ldr d0, [sp, 736]
fsub d0, d1, d0
str d0, [sp, 1632]
ldr d1, [sp, 1632]
ldr d0, [sp, 1416]
bl pow
str d0, [sp, 1656]
ldr d1, [sp, 1656]
ldr d0, [sp, 1632]
fmul d1, d1, d0
ldr d0, [sp, 1416]
fdiv d0, d1, d0
str d0, [sp, 2768]
ldr d1, [sp, 2768]
ldr d0, [sp, 3320]
fmul d0, d1, d0
str d0, [sp, 3328]
ldr d1, [sp, 2768]
ldr d0, [sp, 1432]
fmul d0, d1, d0
str d0, [sp, 1680]
fmov d1, 1.0e+0
ldr d0, [sp, 1656]
fsub d1, d1, d0
ldr d0, [sp, 2352]
fmul d1, d1, d0
fmov d2, 1.0e+0
ldr d0, [sp, 736]
fsub d0, d2, d0
fdiv d0, d1, d0
str d0, [sp, 208]
fmov d1, 1.0e+0
ldr d0, [sp, 1656]
fsub d1, d1, d0
fmov d2, 1.0e+0
ldr d0, [sp, 736]
fsub d0, d2, d0
fdiv d0, d1, d0
str d0, [sp, 3336]
ldr d0, [sp, 2352]
fneg d1, d0
fmov d2, 1.0e+0
ldr d0, [sp, 736]
fsub d0, d2, d0
fdiv d0, d1, d0
str d0, [sp, 2952]
ldr d1, [sp, 3336]
ldr d0, [sp, 2384]
fmul d0, d1, d0
str d0, [sp, 216]
ldr d1, [sp, 2952]
ldr d0, [sp, 3328]
fmul d0, d1, d0
str d0, [sp, 320]
ldr d1, [sp, 2952]
ldr d0, [sp, 1680]
fmul d0, d1, d0
ldr d1, [sp, 216]
fadd d0, d1, d0
str d0, [sp, 216]
ldr d1, [sp, 3272]
fmov d0, 1.0e+0
fadd d1, d1, d0
fmov d0, 5.0e-1
fmul d0, d1, d0
str d0, [sp, 3344]
fmov d0, 5.0e-1
str d0, [sp, 3352]
ldr d1, [sp, 3352]
ldr d0, [sp, 3288]
fmul d0, d1, d0
str d0, [sp, 3360]
ldr d1, [sp, 3352]
ldr d0, [sp, 3296]
fmul d0, d1, d0
str d0, [sp, 3368]
ldr d0, [sp, 2352]
ldr d1, [sp, 1176]
fdiv d1, d1, d0
fmov d0, 1.0e+0
fadd d0, d1, d0
str d0, [sp, 1416]
ldr d0, [sp, 1176]
fneg d1, d0
ldr d0, [sp, 2352]
fmul d0, d0, d0
fdiv d0, d1, d0
str d0, [sp, 2472]
ldr d1, [sp, 2472]
ldr d0, [sp, 2384]
fmul d0, d1, d0
str d0, [sp, 1432]
ldr d0, [sp, 736]
fneg d0, d0
str d0, [sp, 1632]
ldr d1, [sp, 1632]
ldr d0, [sp, 1416]
bl pow
str d0, [sp, 3376]
ldr d1, [sp, 3376]
ldr d0, [sp, 1632]
fmul d1, d1, d0
ldr d0, [sp, 1416]
fdiv d0, d1, d0
str d0, [sp, 3384]
ldr d1, [sp, 3384]
ldr d0, [sp, 1432]
fmul d0, d1, d0
str d0, [sp, 3392]
ldr d0, [sp, 2352]
ldr d1, [sp, 2680]
fdiv d1, d1, d0
fmov d0, 1.0e+0
fadd d0, d1, d0
str d0, [sp, 1416]
ldr d0, [sp, 2352]
fmov d1, 1.0e+0
fdiv d0, d1, d0
str d0, [sp, 3400]
ldr d0, [sp, 2680]
fneg d1, d0
ldr d0, [sp, 2352]
fmul d0, d0, d0
fdiv d0, d1, d0
str d0, [sp, 2472]
ldr d1, [sp, 3400]
ldr d0, [sp, 2696]
fmul d0, d1, d0
str d0, [sp, 1432]
ldr d1, [sp, 2472]
ldr d0, [sp, 2384]
fmul d0, d1, d0
ldr d1, [sp, 1432]
fadd d0, d1, d0
str d0, [sp, 1432]
ldr d0, [sp, 736]
fneg d0, d0
str d0, [sp, 1632]
ldr d1, [sp, 1632]
ldr d0, [sp, 1416]
bl pow
str d0, [sp, 3408]
ldr d1, [sp, 3408]
ldr d0, [sp, 1632]
fmul d1, d1, d0
ldr d0, [sp, 1416]
fdiv d0, d1, d0
str d0, [sp, 3416]
ldr d1, [sp, 3416]
ldr d0, [sp, 1432]
fmul d0, d1, d0
str d0, [sp, 3424]
fmov d1, 1.0e+0
ldr d0, [sp, 3344]
fsub d1, d1, d0
ldr d0, [sp, 3376]
fmul d1, d1, d0
ldr d2, [sp, 3344]
ldr d0, [sp, 3408]
fmul d0, d2, d0
fadd d0, d1, d0
str d0, [sp, 3432]
ldr d1, [sp, 3408]
ldr d0, [sp, 3376]
fsub d0, d1, d0
str d0, [sp, 3440]
fmov d1, 1.0e+0
ldr d0, [sp, 3344]
fsub d0, d1, d0
str d0, [sp, 3448]
ldr d0, [sp, 3344]
str d0, [sp, 3456]
ldr d1, [sp, 3440]
ldr d0, [sp, 3360]
fmul d0, d1, d0
str d0, [sp, 3464]
ldr d1, [sp, 3440]
ldr d0, [sp, 3368]
fmul d0, d1, d0
str d0, [sp, 3472]
ldr d1, [sp, 3448]
ldr d0, [sp, 3392]
fmul d0, d1, d0
ldr d1, [sp, 3472]
fadd d0, d1, d0
str d0, [sp, 3472]
ldr d1, [sp, 3456]
ldr d0, [sp, 3424]
fmul d0, d1, d0
ldr d1, [sp, 3472]
fadd d0, d1, d0
str d0, [sp, 3472]
ldr x0, [sp, 72]
ldr d1, [x0]
ldr d0, [sp, 2872]
fsub d1, d1, d0
ldr d0, [sp, 2728]
fadd d0, d1, d0
ldr d1, [sp, 3432]
fmul d0, d1, d0
str d0, [sp, 3480]
ldr d0, [sp, 3432]
str d0, [sp, 3488]
ldr d0, [sp, 3432]
fneg d0, d0
str d0, [sp, 3496]
ldr d0, [sp, 3432]
str d0, [sp, 3504]
ldr d1, [sp, 2728]
ldr d0, [sp, 2872]
fsub d1, d1, d0
ldr x0, [sp, 72]
ldr d0, [x0]
fadd d0, d1, d0
str d0, [sp, 3512]
ldr d1, [sp, 3496]
ldr d0, [sp, 3312]
fmul d0, d1, d0
ldr d1, [sp, 3488]
fadd d0, d1, d0
str d0, [sp, 3488]
ldr d1, [sp, 3496]
ldr d0, [sp, 2912]
fmul d0, d1, d0
str d0, [sp, 3520]
ldr d1, [sp, 3504]
ldr d0, [sp, 2752]
fmul d0, d1, d0
ldr d1, [sp, 3520]
fadd d0, d1, d0
str d0, [sp, 3520]
ldr d1, [sp, 3512]
ldr d0, [sp, 3464]
fmul d0, d1, d0
ldr d1, [sp, 3488]
fadd d0, d1, d0
str d0, [sp, 3488]
ldr d1, [sp, 3512]
ldr d0, [sp, 3472]
fmul d0, d1, d0
ldr d1, [sp, 3520]
fadd d0, d1, d0
str d0, [sp, 3520]
ldr d1, [sp, 3480]
ldr d0, [sp, 208]
fadd d1, d1, d0
ldr d0, [sp, 3208]
fsub d0, d1, d0
str d0, [sp, 336]
fmov d0, 1.0e+0
str d0, [sp, 3528]
fmov d0, 1.0e+0
str d0, [sp, 3536]
fmov d0, -1.0e+0
str d0, [sp, 3544]
ldr d1, [sp, 3528]
ldr d0, [sp, 3488]
fmul d0, d1, d0
str d0, [sp, 352]
ldr d1, [sp, 3528]
ldr d0, [sp, 3520]
fmul d0, d1, d0
str d0, [sp, 344]
ldr d1, [sp, 3536]
ldr d0, [sp, 216]
fmul d0, d1, d0
ldr d1, [sp, 344]
fadd d0, d1, d0
str d0, [sp, 344]
ldr d1, [sp, 3536]
ldr d0, [sp, 320]
fmul d0, d1, d0
ldr d1, [sp, 352]
fadd d0, d1, d0
str d0, [sp, 352]
ldr d1, [sp, 3544]
ldr d0, [sp, 3232]
fmul d0, d1, d0
ldr d1, [sp, 344]
fadd d0, d1, d0
str d0, [sp, 344]
b .L53
.L54:
ldr d0, [sp, 2680]
fmul d1, d0, d0
ldr d2, [sp, 744]
fmov d0, 4.0e+0
fmul d2, d2, d0
ldr d0, [sp, 744]
fmul d0, d2, d0
fadd d0, d1, d0
bl sqrt
str d0, [sp, 2704]
ldr d0, [sp, 2680]
fmul d1, d0, d0
ldr d0, [sp, 744]
fmul d2, d0, d0
fmov d0, 4.0e+0
fmul d0, d2, d0
fadd d0, d1, d0
bl sqrt
fmov d1, d0
ldr d0, [sp, 2680]
fdiv d0, d0, d1
str d0, [sp, 2712]
ldr d1, [sp, 2712]
ldr d0, [sp, 2696]
fmul d0, d1, d0
str d0, [sp, 2720]
ldr d1, [sp, 2680]
ldr d0, [sp, 2704]
fadd d1, d1, d0
fmov d0, -5.0e-1
fmul d0, d1, d0
str d0, [sp, 2728]
fmov d0, -5.0e-1
str d0, [sp, 2736]
fmov d0, -5.0e-1
str d0, [sp, 2744]
ldr d1, [sp, 2736]
ldr d0, [sp, 2696]
fmul d0, d1, d0
str d0, [sp, 2752]
ldr d1, [sp, 2744]
ldr d0, [sp, 2720]
fmul d0, d1, d0
ldr d1, [sp, 2752]
fadd d0, d1, d0
str d0, [sp, 2752]
ldr d0, [sp, 2352]
ldr d1, [sp, 2728]
fdiv d0, d1, d0
fmov d1, 1.0e+0
fsub d0, d1, d0
str d0, [sp, 1416]
ldr d0, [sp, 2352]
fmov d1, -1.0e+0
fdiv d0, d1, d0
str d0, [sp, 2760]
ldr d0, [sp, 2352]
fmul d0, d0, d0
ldr d1, [sp, 2728]
fdiv d0, d1, d0
str d0, [sp, 2472]
ldr d1, [sp, 2760]
ldr d0, [sp, 2752]
fmul d0, d1, d0
str d0, [sp, 1432]
ldr d1, [sp, 2472]
ldr d0, [sp, 2384]
fmul d0, d1, d0
ldr d1, [sp, 1432]
fadd d0, d1, d0
str d0, [sp, 1432]
fmov d1, 1.0e+0
ldr d0, [sp, 736]
fsub d0, d1, d0
str d0, [sp, 1632]
ldr d1, [sp, 1632]
ldr d0, [sp, 1416]
bl pow
str d0, [sp, 1656]
ldr d1, [sp, 1656]
ldr d0, [sp, 1632]
fmul d1, d1, d0
ldr d0, [sp, 1416]
fdiv d0, d1, d0
str d0, [sp, 2768]
ldr d1, [sp, 2768]
ldr d0, [sp, 1432]
fmul d0, d1, d0
str d0, [sp, 1680]
ldr d0, [sp, 2352]
fneg d1, d0
ldr d0, [sp, 1656]
fmul d1, d1, d0
fmov d2, 1.0e+0
ldr d0, [sp, 736]
fsub d0, d2, d0
fdiv d0, d1, d0
str d0, [sp, 2776]
ldr d0, [sp, 1656]
fneg d1, d0
fmov d2, 1.0e+0
ldr d0, [sp, 736]
fsub d0, d2, d0
fdiv d0, d1, d0
str d0, [sp, 3552]
ldr d0, [sp, 2352]
fneg d1, d0
fmov d2, 1.0e+0
ldr d0, [sp, 736]
fsub d0, d2, d0
fdiv d0, d1, d0
str d0, [sp, 2792]
ldr d1, [sp, 3552]
ldr d0, [sp, 2384]
fmul d0, d1, d0
str d0, [sp, 2800]
ldr d1, [sp, 2792]
ldr d0, [sp, 1680]
fmul d0, d1, d0
ldr d1, [sp, 2800]
fadd d0, d1, d0
str d0, [sp, 2800]
ldr x0, [sp, 72]
ldr d0, [x0]
ldr d1, [sp, 2680]
fadd d0, d1, d0
str d0, [sp, 2808]
fmov d0, 1.0e+0
str d0, [sp, 3560]
fmov d0, 1.0e+0
str d0, [sp, 2824]
ldr d1, [sp, 2824]
ldr d0, [sp, 2696]
fmul d0, d1, d0
str d0, [sp, 2832]
ldr d0, [sp, 2808]
fmul d1, d0, d0
ldr d2, [sp, 744]
fmov d0, 4.0e+0
fmul d2, d2, d0
ldr d0, [sp, 744]
fmul d0, d2, d0
fadd d0, d1, d0
bl sqrt
str d0, [sp, 2840]
ldr d0, [sp, 2808]
fmul d1, d0, d0
ldr d0, [sp, 744]
fmul d2, d0, d0
fmov d0, 4.0e+0
fmul d0, d2, d0
fadd d0, d1, d0
bl sqrt
fmov d1, d0
ldr d0, [sp, 2808]
fdiv d0, d0, d1
str d0, [sp, 2848]
ldr d1, [sp, 2848]
ldr d0, [sp, 3560]
fmul d0, d1, d0
str d0, [sp, 3568]
ldr d1, [sp, 2848]
ldr d0, [sp, 2832]
fmul d0, d1, d0
str d0, [sp, 2864]
ldr d1, [sp, 2808]
ldr d0, [sp, 2840]
fsub d1, d1, d0
fmov d0, 5.0e-1
fmul d1, d1, d0
ldr d0, [sp, 2680]
fsub d0, d1, d0
str d0, [sp, 2872]
fmov d0, 5.0e-1
str d0, [sp, 2880]
fmov d0, -5.0e-1
str d0, [sp, 2888]
fmov d0, -1.0e+0
str d0, [sp, 2896]
ldr d1, [sp, 2880]
ldr d0, [sp, 3560]
fmul d0, d1, d0
str d0, [sp, 3312]
ldr d1, [sp, 2880]
ldr d0, [sp, 2832]
fmul d0, d1, d0
str d0, [sp, 2912]
ldr d1, [sp, 2888]
ldr d0, [sp, 3568]
fmul d0, d1, d0
ldr d1, [sp, 3312]
fadd d0, d1, d0
str d0, [sp, 3312]
ldr d1, [sp, 2888]
ldr d0, [sp, 2864]
fmul d0, d1, d0
ldr d1, [sp, 2912]
fadd d0, d1, d0
str d0, [sp, 2912]
ldr d1, [sp, 2896]
ldr d0, [sp, 2696]
fmul d0, d1, d0
ldr d1, [sp, 2912]
fadd d0, d1, d0
str d0, [sp, 2912]
ldr d0, [sp, 2352]
ldr d1, [sp, 2872]
fdiv d0, d1, d0
fmov d1, 1.0e+0
fsub d0, d1, d0
str d0, [sp, 1416]
ldr d0, [sp, 2352]
fmov d1, -1.0e+0
fdiv d0, d1, d0
str d0, [sp, 2920]
ldr d0, [sp, 2352]
fmul d0, d0, d0
ldr d1, [sp, 2872]
fdiv d0, d1, d0
str d0, [sp, 2472]
ldr d1, [sp, 2920]
ldr d0, [sp, 3312]
fmul d0, d1, d0
str d0, [sp, 3320]
ldr d1, [sp, 2920]
ldr d0, [sp, 2912]
fmul d0, d1, d0
str d0, [sp, 1432]
ldr d1, [sp, 2472]
ldr d0, [sp, 2384]
fmul d0, d1, d0
ldr d1, [sp, 1432]
fadd d0, d1, d0
str d0, [sp, 1432]
fmov d1, 1.0e+0
ldr d0, [sp, 736]
fsub d0, d1, d0
str d0, [sp, 1632]
ldr d1, [sp, 1632]
ldr d0, [sp, 1416]
bl pow
str d0, [sp, 1656]
ldr d1, [sp, 1656]
ldr d0, [sp, 1632]
fmul d1, d1, d0
ldr d0, [sp, 1416]
fdiv d0, d1, d0
str d0, [sp, 2768]
ldr d1, [sp, 2768]
ldr d0, [sp, 3320]
fmul d0, d1, d0
str d0, [sp, 3328]
ldr d1, [sp, 2768]
ldr d0, [sp, 1432]
fmul d0, d1, d0
str d0, [sp, 1680]
ldr d0, [sp, 2352]
fneg d1, d0
ldr d0, [sp, 1656]
fmul d1, d1, d0
fmov d2, 1.0e+0
ldr d0, [sp, 736]
fsub d0, d2, d0
fdiv d0, d1, d0
str d0, [sp, 208]
ldr d0, [sp, 1656]
fneg d1, d0
fmov d2, 1.0e+0
ldr d0, [sp, 736]
fsub d0, d2, d0
fdiv d0, d1, d0
str d0, [sp, 3336]
ldr d0, [sp, 2352]
fneg d1, d0
fmov d2, 1.0e+0
ldr d0, [sp, 736]
fsub d0, d2, d0
fdiv d0, d1, d0
str d0, [sp, 2952]
ldr d1, [sp, 3336]
ldr d0, [sp, 2384]
fmul d0, d1, d0
str d0, [sp, 216]
ldr d1, [sp, 2952]
ldr d0, [sp, 3328]
fmul d0, d1, d0
str d0, [sp, 320]
ldr d1, [sp, 2952]
ldr d0, [sp, 1680]
fmul d0, d1, d0
ldr d1, [sp, 216]
fadd d0, d1, d0
str d0, [sp, 216]
fmov d1, 1.0e+0
ldr d0, [sp, 648]
fsub d0, d1, d0
str d0, [sp, 1416]
ldr d0, [sp, 736]
fneg d0, d0
str d0, [sp, 1632]
ldr d1, [sp, 1632]
ldr d0, [sp, 1416]
bl pow
str d0, [sp, 1656]
ldr x0, [sp, 72]
ldr d1, [x0]
ldr d0, [sp, 2872]
fsub d1, d1, d0
ldr d0, [sp, 2728]
fadd d1, d1, d0
ldr d0, [sp, 1656]
fmul d1, d1, d0
ldr d0, [sp, 208]
fadd d1, d1, d0
ldr d0, [sp, 2776]
fsub d0, d1, d0
str d0, [sp, 336]
fmov d0, 1.0e+0
str d0, [sp, 3536]
ldr d0, [sp, 1656]
str d0, [sp, 352]
ldr d0, [sp, 1656]
fneg d0, d0
str d0, [sp, 3576]
ldr d0, [sp, 1656]
str d0, [sp, 3584]
fmov d0, -1.0e+0
str d0, [sp, 3592]
ldr d1, [sp, 3536]
ldr d0, [sp, 216]
fmul d0, d1, d0
str d0, [sp, 344]
ldr d1, [sp, 3536]
ldr d0, [sp, 320]
fmul d0, d1, d0
ldr d1, [sp, 352]
fadd d0, d1, d0
str d0, [sp, 352]
ldr d1, [sp, 3576]
ldr d0, [sp, 3312]
fmul d0, d1, d0
ldr d1, [sp, 352]
fadd d0, d1, d0
str d0, [sp, 352]
ldr d1, [sp, 3576]
ldr d0, [sp, 2912]
fmul d0, d1, d0
ldr d1, [sp, 344]
fadd d0, d1, d0
str d0, [sp, 344]
ldr d1, [sp, 3584]
ldr d0, [sp, 2752]
fmul d0, d1, d0
ldr d1, [sp, 344]
fadd d0, d1, d0
str d0, [sp, 344]
ldr d1, [sp, 3592]
ldr d0, [sp, 2800]
fmul d0, d1, d0
ldr d1, [sp, 344]
fadd d0, d1, d0
str d0, [sp, 344]
.L53:
ldr d0, [sp, 2352]
fneg d0, d0
ldr d1, [sp, 648]
fmul d0, d1, d0
str d0, [sp, 2680]
ldr d0, [sp, 648]
fneg d0, d0
str d0, [sp, 3144]
ldr d1, [sp, 3144]
ldr d0, [sp, 2384]
fmul d0, d1, d0
str d0, [sp, 2696]
ldr d0, [sp, 744]
fcmpe d0, #0.0
bls .L142
b .L179
.L142:
ldr x0, [sp, 64]
ldr d0, [x0]
ldr d1, [sp, 2680]
fadd d0, d1, d0
str d0, [sp, 2992]
fmov d0, 1.0e+0
str d0, [sp, 3752]
fmov d0, 1.0e+0
str d0, [sp, 3008]
ldr d1, [sp, 3008]
ldr d0, [sp, 2696]
fmul d0, d1, d0
str d0, [sp, 3016]
ldr d0, [sp, 2992]
fcmpe d0, #0.0
bgt .L143
b .L180
.L143:
fmov d1, 1.0e+0
ldr d0, [sp, 648]
fsub d0, d1, d0
str d0, [sp, 1416]
fmov d1, -1.0e+0
ldr d0, [sp, 736]
fsub d0, d1, d0
str d0, [sp, 1632]
ldr d1, [sp, 1632]
ldr d0, [sp, 1416]
bl pow
str d0, [sp, 3024]
fmov d1, 1.0e+0
ldr d0, [sp, 648]
fsub d1, d1, d0
ldr d0, [sp, 3024]
fmul d1, d1, d0
fmov d2, 1.0e+0
ldr d0, [sp, 648]
fsub d0, d2, d0
fmul d0, d1, d0
fmov d1, 1.0e+0
fsub d1, d1, d0
ldr d0, [sp, 2352]
fmul d1, d1, d0
fmov d2, 1.0e+0
ldr d0, [sp, 736]
fsub d0, d2, d0
fdiv d0, d1, d0
str d0, [sp, 208]
fmov d1, 1.0e+0
ldr d0, [sp, 648]
fsub d1, d1, d0
fmov d2, 1.0e+0
ldr d0, [sp, 648]
fsub d0, d2, d0
fmul d1, d1, d0
ldr d0, [sp, 3024]
fmul d0, d1, d0
fmov d1, 1.0e+0
fsub d1, d1, d0
fmov d2, 1.0e+0
ldr d0, [sp, 736]
fsub d0, d2, d0
fdiv d0, d1, d0
str d0, [sp, 3336]
str xzr, [sp, 360]
ldr d1, [sp, 3336]
ldr d0, [sp, 2384]
fmul d0, d1, d0
str d0, [sp, 216]
fmov d1, 1.0e+0
ldr d0, [sp, 648]
fsub d1, d1, d0
ldr d2, [sp, 736]
fmov d0, 5.0e-1
fmul d2, d2, d0
ldr d0, [sp, 2992]
fmul d2, d2, d0
ldr d0, [sp, 2352]
fdiv d0, d2, d0
fadd d1, d1, d0
ldr d0, [sp, 2992]
fmul d0, d1, d0
ldr d1, [sp, 3024]
fmul d0, d1, d0
str d0, [sp, 232]
ldr d1, [sp, 2992]
fmov d0, 5.0e-1
fmul d1, d1, d0
ldr d0, [sp, 736]
fmul d1, d1, d0
ldr d0, [sp, 2352]
fdiv d1, d1, d0
ldr d0, [sp, 648]
fsub d1, d1, d0
fmov d0, 1.0e+0
fadd d1, d1, d0
ldr d0, [sp, 3024]
fmul d1, d1, d0
ldr d2, [sp, 2992]
fmov d0, 5.0e-1
fmul d2, d2, d0
ldr d0, [sp, 736]
fmul d2, d2, d0
ldr d0, [sp, 3024]
fmul d2, d2, d0
ldr d0, [sp, 2352]
fdiv d0, d2, d0
fadd d0, d1, d0
str d0, [sp, 3032]
ldr d0, [sp, 2992]
fmul d1, d0, d0
fmov d0, -5.0e-1
fmul d1, d1, d0
ldr d0, [sp, 736]
fmul d1, d1, d0
ldr d0, [sp, 3024]
fmul d1, d1, d0
ldr d0, [sp, 2352]
fmul d0, d0, d0
fdiv d0, d1, d0
str d0, [sp, 3608]
ldr d1, [sp, 3032]
ldr d0, [sp, 3752]
fmul d0, d1, d0
str d0, [sp, 368]
ldr d1, [sp, 3032]
ldr d0, [sp, 3016]
fmul d0, d1, d0
str d0, [sp, 248]
ldr d1, [sp, 3608]
ldr d0, [sp, 2384]
fmul d0, d1, d0
ldr d1, [sp, 248]
fadd d0, d1, d0
str d0, [sp, 248]
b .L61
.L180:
ldr d0, [sp, 1176]
fcmpe d0, #0.0
bgt .L144
b .L62
.L144:
ldr x0, [sp, 64]
ldr d1, [x0]
ldr d0, [sp, 1176]
fneg d0, d0
fcmpe d1, d0
bmi .L145
b .L62
.L145:
ldr d0, [sp, 2352]
ldr d1, [sp, 1176]
fdiv d1, d1, d0
fmov d0, 1.0e+0
fadd d0, d1, d0
str d0, [sp, 1416]
ldr d0, [sp, 1176]
fneg d1, d0
ldr d0, [sp, 2352]
fmul d0, d0, d0
fdiv d0, d1, d0
str d0, [sp, 2472]
ldr d1, [sp, 2472]
ldr d0, [sp, 2384]
fmul d0, d1, d0
str d0, [sp, 1432]
fmov d1, 1.0e+0
ldr d0, [sp, 736]
fsub d0, d1, d0
str d0, [sp, 1632]
ldr d1, [sp, 1632]
ldr d0, [sp, 1416]
bl pow
str d0, [sp, 1656]
ldr d1, [sp, 1656]
ldr d0, [sp, 1632]
fmul d1, d1, d0
ldr d0, [sp, 1416]
fdiv d0, d1, d0
str d0, [sp, 2768]
ldr d1, [sp, 2768]
ldr d0, [sp, 1432]
fmul d0, d1, d0
str d0, [sp, 1680]
fmov d1, 1.0e+0
ldr d0, [sp, 736]
fsub d1, d1, d0
ldr x0, [sp, 64]
ldr d2, [x0]
ldr d0, [sp, 1176]
fadd d0, d2, d0
fmul d1, d1, d0
ldr d2, [sp, 2352]
ldr d0, [sp, 1176]
fadd d0, d2, d0
fdiv d0, d1, d0
fmov d1, 1.0e+0
fsub d1, d1, d0
ldr d0, [sp, 1656]
fmul d0, d1, d0
fmov d1, 1.0e+0
fsub d1, d1, d0
ldr d0, [sp, 2352]
fmul d1, d1, d0
fmov d2, 1.0e+0
ldr d0, [sp, 736]
fsub d0, d2, d0
fdiv d0, d1, d0
str d0, [sp, 208]
fmov d1, 1.0e+0
ldr d0, [sp, 736]
fsub d1, d1, d0
ldr x0, [sp, 64]
ldr d2, [x0]
ldr d0, [sp, 1176]
fadd d0, d2, d0
fmul d1, d1, d0
ldr d2, [sp, 1176]
ldr d0, [sp, 2352]
fadd d0, d2, d0
fdiv d0, d1, d0
fmov d1, 1.0e+0
fsub d1, d1, d0
ldr d0, [sp, 1656]
fmul d0, d1, d0
fmov d1, 1.0e+0
fsub d1, d1, d0
fmov d2, 1.0e+0
ldr d0, [sp, 736]
fsub d0, d2, d0
fdiv d1, d1, d0
ldr x0, [sp, 64]
ldr d2, [x0]
ldr d0, [sp, 1176]
fadd d2, d2, d0
ldr d0, [sp, 2352]
fmul d2, d2, d0
ldr d0, [sp, 1656]
fmul d2, d2, d0
ldr d3, [sp, 1176]
ldr d0, [sp, 2352]
fadd d3, d3, d0
ldr d4, [sp, 1176]
ldr d0, [sp, 2352]
fadd d0, d4, d0
fmul d0, d3, d0
fdiv d0, d2, d0
fsub d0, d1, d0
str d0, [sp, 3336]
fmov d1, 1.0e+0
ldr d0, [sp, 736]
fsub d1, d1, d0
ldr x0, [sp, 64]
ldr d2, [x0]
ldr d0, [sp, 1176]
fadd d0, d2, d0
fmul d1, d1, d0
ldr d2, [sp, 1176]
ldr d0, [sp, 2352]
fadd d0, d2, d0
fdiv d1, d1, d0
fmov d0, 1.0e+0
fsub d1, d1, d0
ldr d0, [sp, 2352]
fmul d1, d1, d0
fmov d2, 1.0e+0
ldr d0, [sp, 736]
fsub d0, d2, d0
fdiv d0, d1, d0
str d0, [sp, 2952]
ldr d1, [sp, 2352]
ldr d0, [sp, 1656]
fmul d1, d1, d0
ldr d2, [sp, 1176]
ldr d0, [sp, 2352]
fadd d0, d2, d0
fdiv d0, d1, d0
str d0, [sp, 360]
ldr d1, [sp, 3336]
ldr d0, [sp, 2384]
fmul d0, d1, d0
str d0, [sp, 216]
ldr d1, [sp, 2952]
ldr d0, [sp, 1680]
fmul d0, d1, d0
ldr d1, [sp, 216]
fadd d0, d1, d0
str d0, [sp, 216]
b .L65
.L62:
ldr x0, [sp, 64]
ldr d1, [x0]
ldr d0, [sp, 2352]
fdiv d0, d1, d0
fmov d1, 1.0e+0
fsub d0, d1, d0
str d0, [sp, 1416]
ldr d0, [sp, 2352]
fmov d1, -1.0e+0
fdiv d0, d1, d0
str d0, [sp, 3648]
ldr x0, [sp, 64]
ldr d1, [x0]
ldr d0, [sp, 2352]
fmul d0, d0, d0
fdiv d0, d1, d0
str d0, [sp, 2472]
ldr d1, [sp, 2472]
ldr d0, [sp, 2384]
fmul d0, d1, d0
str d0, [sp, 1432]
fmov d1, 1.0e+0
ldr d0, [sp, 736]
fsub d0, d1, d0
str d0, [sp, 1632]
ldr d1, [sp, 1632]
ldr d0, [sp, 1416]
bl pow
str d0, [sp, 1656]
ldr d1, [sp, 1656]
ldr d0, [sp, 1632]
fmul d1, d1, d0
ldr d0, [sp, 1416]
fdiv d0, d1, d0
str d0, [sp, 2768]
ldr d1, [sp, 2768]
ldr d0, [sp, 3648]
fmul d0, d1, d0
str d0, [sp, 3656]
ldr d1, [sp, 2768]
ldr d0, [sp, 1432]
fmul d0, d1, d0
str d0, [sp, 1680]
fmov d1, 1.0e+0
ldr d0, [sp, 1656]
fsub d1, d1, d0
ldr d0, [sp, 2352]
fmul d1, d1, d0
fmov d2, 1.0e+0
ldr d0, [sp, 736]
fsub d0, d2, d0
fdiv d0, d1, d0
str d0, [sp, 208]
fmov d1, 1.0e+0
ldr d0, [sp, 1656]
fsub d1, d1, d0
fmov d2, 1.0e+0
ldr d0, [sp, 736]
fsub d0, d2, d0
fdiv d0, d1, d0
str d0, [sp, 3336]
ldr d0, [sp, 2352]
fneg d1, d0
fmov d2, 1.0e+0
ldr d0, [sp, 736]
fsub d0, d2, d0
fdiv d0, d1, d0
str d0, [sp, 2952]
ldr d1, [sp, 3336]
ldr d0, [sp, 2384]
fmul d0, d1, d0
str d0, [sp, 216]
ldr d1, [sp, 2952]
ldr d0, [sp, 3656]
fmul d0, d1, d0
str d0, [sp, 360]
ldr d1, [sp, 2952]
ldr d0, [sp, 1680]
fmul d0, d1, d0
ldr d1, [sp, 216]
fadd d0, d1, d0
str d0, [sp, 216]
.L65:
str xzr, [sp, 232]
str xzr, [sp, 368]
str xzr, [sp, 248]
.L61:
ldr d1, [sp, 208]
ldr d0, [sp, 232]
fadd d0, d1, d0
str d0, [sp, 376]
fmov d0, 1.0e+0
str d0, [sp, 3696]
fmov d0, 1.0e+0
str d0, [sp, 3760]
ldr d1, [sp, 3696]
ldr d0, [sp, 216]
fmul d0, d1, d0
str d0, [sp, 384]
ldr d1, [sp, 3696]
ldr d0, [sp, 360]
fmul d0, d1, d0
str d0, [sp, 392]
ldr d1, [sp, 3760]
ldr d0, [sp, 368]
fmul d0, d1, d0
ldr d1, [sp, 392]
fadd d0, d1, d0
str d0, [sp, 392]
ldr d1, [sp, 3760]
ldr d0, [sp, 248]
fmul d0, d1, d0
ldr d1, [sp, 384]
fadd d0, d1, d0
str d0, [sp, 384]
b .L66
.L179:
ldr d0, [sp, 1176]
fcmpe d0, #0.0
bgt .L146
b .L67
.L146:
ldr d0, [sp, 1184]
fcmpe d0, #0.0
bgt .L147
b .L67
.L147:
ldr d1, [sp, 1176]
ldr d0, [sp, 2680]
fadd d1, d1, d0
ldr d2, [sp, 1176]
ldr d0, [sp, 2680]
fsub d0, d2, d0
fdiv d0, d1, d0
str d0, [sp, 3152]
ldr d1, [sp, 1176]
ldr d0, [sp, 2680]
fadd d1, d1, d0
ldr d2, [sp, 1176]
ldr d0, [sp, 2680]
fsub d2, d2, d0
ldr d3, [sp, 1176]
ldr d0, [sp, 2680]
fsub d0, d3, d0
fmul d0, d2, d0
fdiv d1, d1, d0
ldr d2, [sp, 1176]
ldr d0, [sp, 2680]
fsub d0, d2, d0
fmov d2, 1.0e+0
fdiv d0, d2, d0
fadd d0, d1, d0
str d0, [sp, 3160]
ldr d1, [sp, 3160]
ldr d0, [sp, 2696]
fmul d0, d1, d0
str d0, [sp, 3168]
ldr d0, [sp, 3152]
fadd d8, d0, d0
ldr d1, [sp, 3152]
fmov d0, 1.0e+0
fsub d1, d1, d0
ldr d2, [sp, 3152]
fmov d0, 1.0e+0
fsub d0, d2, d0
fmul d1, d1, d0
ldr d2, [sp, 744]
fmov d0, 4.0e+0
fmul d2, d2, d0
ldr d0, [sp, 744]
fmul d0, d2, d0
fadd d0, d1, d0
bl sqrt
fmov d9, d0
ldr d1, [sp, 3152]
fmov d0, 1.0e+0
fadd d1, d1, d0
ldr d2, [sp, 3152]
fmov d0, 1.0e+0
fadd d0, d2, d0
fmul d1, d1, d0
ldr d2, [sp, 1184]
fmov d0, 4.0e+0
fmul d2, d2, d0
ldr d0, [sp, 1184]
fmul d0, d2, d0
fadd d0, d1, d0
bl sqrt
fadd d0, d9, d0
fdiv d0, d8, d0
str d0, [sp, 3176]
ldr d1, [sp, 3152]
fmov d0, 1.0e+0
fadd d1, d1, d0
ldr d2, [sp, 3152]
fmov d0, 1.0e+0
fadd d0, d2, d0
fmul d1, d1, d0
ldr d0, [sp, 1184]
fmul d2, d0, d0
fmov d0, 4.0e+0
fmul d0, d2, d0
fadd d0, d1, d0
bl sqrt
fmov d8, d0
ldr d1, [sp, 3152]
fmov d0, 1.0e+0
fsub d1, d1, d0
ldr d2, [sp, 3152]
fmov d0, 1.0e+0
fsub d0, d2, d0
fmul d1, d1, d0
ldr d0, [sp, 744]
fmul d2, d0, d0
fmov d0, 4.0e+0
fmul d0, d2, d0
fadd d0, d1, d0
bl sqrt
fadd d0, d8, d0
fmov d1, 2.0e+0
fdiv d8, d1, d0
ldr d0, [sp, 3152]
fadd d9, d0, d0
ldr d1, [sp, 3152]
fmov d0, 1.0e+0
fadd d10, d1, d0
ldr d1, [sp, 3152]
fmov d0, 1.0e+0
fadd d1, d1, d0
ldr d2, [sp, 3152]
fmov d0, 1.0e+0
fadd d0, d2, d0
fmul d1, d1, d0
ldr d0, [sp, 1184]
fmul d2, d0, d0
fmov d0, 4.0e+0
fmul d0, d2, d0
fadd d0, d1, d0
bl sqrt
fdiv d10, d10, d0
ldr d1, [sp, 3152]
fmov d0, 1.0e+0
fsub d11, d1, d0
ldr d1, [sp, 3152]
fmov d0, 1.0e+0
fsub d1, d1, d0
ldr d2, [sp, 3152]
fmov d0, 1.0e+0
fsub d0, d2, d0
fmul d1, d1, d0
ldr d0, [sp, 744]
fmul d2, d0, d0
fmov d0, 4.0e+0
fmul d0, d2, d0
fadd d0, d1, d0
bl sqrt
fdiv d0, d11, d0
fadd d0, d10, d0
fmul d9, d9, d0
ldr d1, [sp, 3152]
fmov d0, 1.0e+0
fadd d1, d1, d0
ldr d2, [sp, 3152]
fmov d0, 1.0e+0
fadd d0, d2, d0
fmul d1, d1, d0
ldr d0, [sp, 1184]
fmul d2, d0, d0
fmov d0, 4.0e+0
fmul d0, d2, d0
fadd d0, d1, d0
bl sqrt
fmov d10, d0
ldr d1, [sp, 3152]
fmov d0, 1.0e+0
fsub d1, d1, d0
ldr d2, [sp, 3152]
fmov d0, 1.0e+0
fsub d0, d2, d0
fmul d1, d1, d0
ldr d0, [sp, 744]
fmul d2, d0, d0
fmov d0, 4.0e+0
fmul d0, d2, d0
fadd d0, d1, d0
bl sqrt
fadd d10, d10, d0
ldr d1, [sp, 3152]
fmov d0, 1.0e+0
fadd d1, d1, d0
ldr d2, [sp, 3152]
fmov d0, 1.0e+0
fadd d0, d2, d0
fmul d1, d1, d0
ldr d0, [sp, 1184]
fmul d2, d0, d0
fmov d0, 4.0e+0
fmul d0, d2, d0
fadd d0, d1, d0
bl sqrt
fmov d11, d0
ldr d1, [sp, 3152]
fmov d0, 1.0e+0
fsub d1, d1, d0
ldr d2, [sp, 3152]
fmov d0, 1.0e+0
fsub d0, d2, d0
fmul d1, d1, d0
ldr d0, [sp, 744]
fmul d2, d0, d0
fmov d0, 4.0e+0
fmul d0, d2, d0
fadd d0, d1, d0
bl sqrt
fadd d0, d11, d0
fmul d0, d10, d0
fdiv d0, d9, d0
fsub d0, d8, d0
str d0, [sp, 3184]
ldr d1, [sp, 3184]
ldr d0, [sp, 3168]
fmul d0, d1, d0
str d0, [sp, 3192]
ldr d1, [sp, 1176]
ldr d0, [sp, 2680]
fsub d1, d1, d0
ldr d0, [sp, 3176]
fmul d1, d1, d0
ldr d0, [sp, 1176]
fsub d1, d1, d0
ldr d0, [sp, 2680]
fsub d1, d1, d0
fmov d0, 5.0e-1
fmul d0, d1, d0
str d0, [sp, 2728]
ldr d1, [sp, 1176]
ldr d0, [sp, 2680]
fsub d1, d1, d0
fmov d0, 5.0e-1
fmul d0, d1, d0
str d0, [sp, 3200]
ldr d0, [sp, 3176]
fneg d1, d0
fmov d0, 1.0e+0
fsub d1, d1, d0
fmov d0, 5.0e-1
fmul d0, d1, d0
str d0, [sp, 2736]
ldr d1, [sp, 3200]
ldr d0, [sp, 3192]
fmul d0, d1, d0
str d0, [sp, 2752]
ldr d1, [sp, 2736]
ldr d0, [sp, 2696]
fmul d0, d1, d0
ldr d1, [sp, 2752]
fadd d0, d1, d0
str d0, [sp, 2752]
ldr d0, [sp, 2352]
ldr d1, [sp, 2728]
fdiv d0, d1, d0
fmov d1, 1.0e+0
fsub d0, d1, d0
str d0, [sp, 1416]
ldr d0, [sp, 2352]
fmov d1, -1.0e+0
fdiv d0, d1, d0
str d0, [sp, 2760]
ldr d0, [sp, 2352]
fmul d0, d0, d0
ldr d1, [sp, 2728]
fdiv d0, d1, d0
str d0, [sp, 2472]
ldr d1, [sp, 2760]
ldr d0, [sp, 2752]
fmul d0, d1, d0
str d0, [sp, 1432]
ldr d1, [sp, 2472]
ldr d0, [sp, 2384]
fmul d0, d1, d0
ldr d1, [sp, 1432]
fadd d0, d1, d0
str d0, [sp, 1432]
fmov d1, 1.0e+0
ldr d0, [sp, 736]
fsub d0, d1, d0
str d0, [sp, 1632]
ldr d1, [sp, 1632]
ldr d0, [sp, 1416]
bl pow
str d0, [sp, 1656]
ldr d1, [sp, 1656]
ldr d0, [sp, 1632]
fmul d1, d1, d0
ldr d0, [sp, 1416]
fdiv d0, d1, d0
str d0, [sp, 2768]
ldr d1, [sp, 2768]
ldr d0, [sp, 1432]
fmul d0, d1, d0
str d0, [sp, 1680]
fmov d1, 1.0e+0
ldr d0, [sp, 1656]
fsub d1, d1, d0
ldr d0, [sp, 2352]
fmul d1, d1, d0
fmov d2, 1.0e+0
ldr d0, [sp, 736]
fsub d0, d2, d0
fdiv d0, d1, d0
str d0, [sp, 3208]
fmov d1, 1.0e+0
ldr d0, [sp, 1656]
fsub d1, d1, d0
fmov d2, 1.0e+0
ldr d0, [sp, 736]
fsub d0, d2, d0
fdiv d0, d1, d0
str d0, [sp, 3216]
ldr d0, [sp, 2352]
fneg d1, d0
fmov d2, 1.0e+0
ldr d0, [sp, 736]
fsub d0, d2, d0
fdiv d0, d1, d0
str d0, [sp, 3224]
ldr d1, [sp, 3216]
ldr d0, [sp, 2384]
fmul d0, d1, d0
str d0, [sp, 3232]
ldr d1, [sp, 3224]
ldr d0, [sp, 1680]
fmul d0, d1, d0
ldr d1, [sp, 3232]
fadd d0, d1, d0
str d0, [sp, 3232]
ldr x0, [sp, 64]
ldr d0, [x0]
fadd d1, d0, d0
ldr d0, [sp, 1176]
fadd d1, d1, d0
ldr d0, [sp, 2680]
fadd d1, d1, d0
ldr d2, [sp, 1176]
ldr d0, [sp, 2680]
fsub d0, d2, d0
fdiv d0, d1, d0
str d0, [sp, 3240]
ldr d1, [sp, 1176]
ldr d0, [sp, 2680]
fsub d0, d1, d0
fmov d1, 2.0e+0
fdiv d0, d1, d0
str d0, [sp, 3624]
ldr x0, [sp, 64]
ldr d0, [x0]
fadd d1, d0, d0
ldr d0, [sp, 1176]
fadd d1, d1, d0
ldr d0, [sp, 2680]
fadd d1, d1, d0
ldr d2, [sp, 1176]
ldr d0, [sp, 2680]
fsub d2, d2, d0
ldr d3, [sp, 1176]
ldr d0, [sp, 2680]
fsub d0, d3, d0
fmul d0, d2, d0
fdiv d1, d1, d0
ldr d2, [sp, 1176]
ldr d0, [sp, 2680]
fsub d0, d2, d0
fmov d2, 1.0e+0
fdiv d0, d2, d0
fadd d0, d1, d0
str d0, [sp, 3256]
ldr d1, [sp, 3256]
ldr d0, [sp, 2696]
fmul d0, d1, d0
str d0, [sp, 3264]
ldr d0, [sp, 3240]
fadd d8, d0, d0
ldr d1, [sp, 3240]
fmov d0, 1.0e+0
fsub d1, d1, d0
ldr d2, [sp, 3240]
fmov d0, 1.0e+0
fsub d0, d2, d0
fmul d1, d1, d0
ldr d2, [sp, 744]
fmov d0, 4.0e+0
fmul d2, d2, d0
ldr d0, [sp, 744]
fmul d0, d2, d0
fadd d0, d1, d0
bl sqrt
fmov d9, d0
ldr d1, [sp, 3240]
fmov d0, 1.0e+0
fadd d1, d1, d0
ldr d2, [sp, 3240]
fmov d0, 1.0e+0
fadd d0, d2, d0
fmul d1, d1, d0
ldr d2, [sp, 1184]
fmov d0, 4.0e+0
fmul d2, d2, d0
ldr d0, [sp, 1184]
fmul d0, d2, d0
fadd d0, d1, d0
bl sqrt
fadd d0, d9, d0
fdiv d0, d8, d0
str d0, [sp, 3272]
ldr d1, [sp, 3240]
fmov d0, 1.0e+0
fadd d1, d1, d0
ldr d2, [sp, 3240]
fmov d0, 1.0e+0
fadd d0, d2, d0
fmul d1, d1, d0
ldr d0, [sp, 1184]
fmul d2, d0, d0
fmov d0, 4.0e+0
fmul d0, d2, d0
fadd d0, d1, d0
bl sqrt
fmov d8, d0
ldr d1, [sp, 3240]
fmov d0, 1.0e+0
fsub d1, d1, d0
ldr d2, [sp, 3240]
fmov d0, 1.0e+0
fsub d0, d2, d0
fmul d1, d1, d0
ldr d0, [sp, 744]
fmul d2, d0, d0
fmov d0, 4.0e+0
fmul d0, d2, d0
fadd d0, d1, d0
bl sqrt
fadd d0, d8, d0
fmov d1, 2.0e+0
fdiv d8, d1, d0
ldr d0, [sp, 3240]
fadd d9, d0, d0
ldr d1, [sp, 3240]
fmov d0, 1.0e+0
fadd d10, d1, d0
ldr d1, [sp, 3240]
fmov d0, 1.0e+0
fadd d1, d1, d0
ldr d2, [sp, 3240]
fmov d0, 1.0e+0
fadd d0, d2, d0
fmul d1, d1, d0
ldr d0, [sp, 1184]
fmul d2, d0, d0
fmov d0, 4.0e+0
fmul d0, d2, d0
fadd d0, d1, d0
bl sqrt
fdiv d10, d10, d0
ldr d1, [sp, 3240]
fmov d0, 1.0e+0
fsub d11, d1, d0
ldr d1, [sp, 3240]
fmov d0, 1.0e+0
fsub d1, d1, d0
ldr d2, [sp, 3240]
fmov d0, 1.0e+0
fsub d0, d2, d0
fmul d1, d1, d0
ldr d0, [sp, 744]
fmul d2, d0, d0
fmov d0, 4.0e+0
fmul d0, d2, d0
fadd d0, d1, d0
bl sqrt
fdiv d0, d11, d0
fadd d0, d10, d0
fmul d9, d9, d0
ldr d1, [sp, 3240]
fmov d0, 1.0e+0
fadd d1, d1, d0
ldr d2, [sp, 3240]
fmov d0, 1.0e+0
fadd d0, d2, d0
fmul d1, d1, d0
ldr d0, [sp, 1184]
fmul d2, d0, d0
fmov d0, 4.0e+0
fmul d0, d2, d0
fadd d0, d1, d0
bl sqrt
fmov d10, d0
ldr d1, [sp, 3240]
fmov d0, 1.0e+0
fsub d1, d1, d0
ldr d2, [sp, 3240]
fmov d0, 1.0e+0
fsub d0, d2, d0
fmul d1, d1, d0
ldr d0, [sp, 744]
fmul d2, d0, d0
fmov d0, 4.0e+0
fmul d0, d2, d0
fadd d0, d1, d0
bl sqrt
fadd d10, d10, d0
ldr d1, [sp, 3240]
fmov d0, 1.0e+0
fadd d1, d1, d0
ldr d2, [sp, 3240]
fmov d0, 1.0e+0
fadd d0, d2, d0
fmul d1, d1, d0
ldr d0, [sp, 1184]
fmul d2, d0, d0
fmov d0, 4.0e+0
fmul d0, d2, d0
fadd d0, d1, d0
bl sqrt
fmov d11, d0
ldr d1, [sp, 3240]
fmov d0, 1.0e+0
fsub d1, d1, d0
ldr d2, [sp, 3240]
fmov d0, 1.0e+0
fsub d0, d2, d0
fmul d1, d1, d0
ldr d0, [sp, 744]
fmul d2, d0, d0
fmov d0, 4.0e+0
fmul d0, d2, d0
fadd d0, d1, d0
bl sqrt
fadd d0, d11, d0
fmul d0, d10, d0
fdiv d0, d9, d0
fsub d0, d8, d0
str d0, [sp, 3280]
ldr d1, [sp, 3280]
ldr d0, [sp, 3624]
fmul d0, d1, d0
str d0, [sp, 3632]
ldr d1, [sp, 3280]
ldr d0, [sp, 3264]
fmul d0, d1, d0
str d0, [sp, 3296]
ldr d1, [sp, 1176]
ldr d0, [sp, 2680]
fsub d1, d1, d0
ldr d0, [sp, 3272]
fmul d1, d1, d0
ldr d0, [sp, 1176]
fsub d1, d1, d0
ldr d0, [sp, 2680]
fsub d1, d1, d0
fmov d0, 5.0e-1
fmul d0, d1, d0
str d0, [sp, 2872]
ldr d1, [sp, 1176]
ldr d0, [sp, 2680]
fsub d1, d1, d0
fmov d0, 5.0e-1
fmul d0, d1, d0
str d0, [sp, 3304]
ldr d0, [sp, 3272]
fneg d1, d0
fmov d0, 1.0e+0
fsub d1, d1, d0
fmov d0, 5.0e-1
fmul d0, d1, d0
str d0, [sp, 2896]
ldr d1, [sp, 3304]
ldr d0, [sp, 3632]
fmul d0, d1, d0
str d0, [sp, 3640]
ldr d1, [sp, 3304]
ldr d0, [sp, 3296]
fmul d0, d1, d0
str d0, [sp, 2912]
ldr d1, [sp, 2896]
ldr d0, [sp, 2696]
fmul d0, d1, d0
ldr d1, [sp, 2912]
fadd d0, d1, d0
str d0, [sp, 2912]
ldr d0, [sp, 2352]
ldr d1, [sp, 2872]
fdiv d0, d1, d0
fmov d1, 1.0e+0
fsub d0, d1, d0
str d0, [sp, 1416]
ldr d0, [sp, 2352]
fmov d1, -1.0e+0
fdiv d0, d1, d0
str d0, [sp, 2920]
ldr d0, [sp, 2352]
fmul d0, d0, d0
ldr d1, [sp, 2872]
fdiv d0, d1, d0
str d0, [sp, 2472]
ldr d1, [sp, 2920]
ldr d0, [sp, 3640]
fmul d0, d1, d0
str d0, [sp, 3648]
ldr d1, [sp, 2920]
ldr d0, [sp, 2912]
fmul d0, d1, d0
str d0, [sp, 1432]
ldr d1, [sp, 2472]
ldr d0, [sp, 2384]
fmul d0, d1, d0
ldr d1, [sp, 1432]
fadd d0, d1, d0
str d0, [sp, 1432]
fmov d1, 1.0e+0
ldr d0, [sp, 736]
fsub d0, d1, d0
str d0, [sp, 1632]
ldr d1, [sp, 1632]
ldr d0, [sp, 1416]
bl pow
str d0, [sp, 1656]
ldr d1, [sp, 1656]
ldr d0, [sp, 1632]
fmul d1, d1, d0
ldr d0, [sp, 1416]
fdiv d0, d1, d0
str d0, [sp, 2768]
ldr d1, [sp, 2768]
ldr d0, [sp, 3648]
fmul d0, d1, d0
str d0, [sp, 3656]
ldr d1, [sp, 2768]
ldr d0, [sp, 1432]
fmul d0, d1, d0
str d0, [sp, 1680]
fmov d1, 1.0e+0
ldr d0, [sp, 1656]
fsub d1, d1, d0
ldr d0, [sp, 2352]
fmul d1, d1, d0
fmov d2, 1.0e+0
ldr d0, [sp, 736]
fsub d0, d2, d0
fdiv d0, d1, d0
str d0, [sp, 208]
fmov d1, 1.0e+0
ldr d0, [sp, 1656]
fsub d1, d1, d0
fmov d2, 1.0e+0
ldr d0, [sp, 736]
fsub d0, d2, d0
fdiv d0, d1, d0
str d0, [sp, 3336]
ldr d0, [sp, 2352]
fneg d1, d0
fmov d2, 1.0e+0
ldr d0, [sp, 736]
fsub d0, d2, d0
fdiv d0, d1, d0
str d0, [sp, 2952]
ldr d1, [sp, 3336]
ldr d0, [sp, 2384]
fmul d0, d1, d0
str d0, [sp, 216]
ldr d1, [sp, 2952]
ldr d0, [sp, 3656]
fmul d0, d1, d0
str d0, [sp, 360]
ldr d1, [sp, 2952]
ldr d0, [sp, 1680]
fmul d0, d1, d0
ldr d1, [sp, 216]
fadd d0, d1, d0
str d0, [sp, 216]
ldr d1, [sp, 3272]
fmov d0, 1.0e+0
fadd d1, d1, d0
fmov d0, 5.0e-1
fmul d0, d1, d0
str d0, [sp, 3344]
fmov d0, 5.0e-1
str d0, [sp, 3352]
ldr d1, [sp, 3352]
ldr d0, [sp, 3632]
fmul d0, d1, d0
str d0, [sp, 3664]
ldr d1, [sp, 3352]
ldr d0, [sp, 3296]
fmul d0, d1, d0
str d0, [sp, 3368]
ldr d0, [sp, 2352]
ldr d1, [sp, 1176]
fdiv d1, d1, d0
fmov d0, 1.0e+0
fadd d0, d1, d0
str d0, [sp, 1416]
ldr d0, [sp, 1176]
fneg d1, d0
ldr d0, [sp, 2352]
fmul d0, d0, d0
fdiv d0, d1, d0
str d0, [sp, 2472]
ldr d1, [sp, 2472]
ldr d0, [sp, 2384]
fmul d0, d1, d0
str d0, [sp, 1432]
ldr d0, [sp, 736]
fneg d0, d0
str d0, [sp, 1632]
ldr d1, [sp, 1632]
ldr d0, [sp, 1416]
bl pow
str d0, [sp, 3376]
ldr d1, [sp, 3376]
ldr d0, [sp, 1632]
fmul d1, d1, d0
ldr d0, [sp, 1416]
fdiv d0, d1, d0
str d0, [sp, 3384]
ldr d1, [sp, 3384]
ldr d0, [sp, 1432]
fmul d0, d1, d0
str d0, [sp, 3392]
ldr d0, [sp, 2352]
ldr d1, [sp, 2680]
fdiv d1, d1, d0
fmov d0, 1.0e+0
fadd d0, d1, d0
str d0, [sp, 1416]
ldr d0, [sp, 2352]
fmov d1, 1.0e+0
fdiv d0, d1, d0
str d0, [sp, 3400]
ldr d0, [sp, 2680]
fneg d1, d0
ldr d0, [sp, 2352]
fmul d0, d0, d0
fdiv d0, d1, d0
str d0, [sp, 2472]
ldr d1, [sp, 3400]
ldr d0, [sp, 2696]
fmul d0, d1, d0
str d0, [sp, 1432]
ldr d1, [sp, 2472]
ldr d0, [sp, 2384]
fmul d0, d1, d0
ldr d1, [sp, 1432]
fadd d0, d1, d0
str d0, [sp, 1432]
ldr d0, [sp, 736]
fneg d0, d0
str d0, [sp, 1632]
ldr d1, [sp, 1632]
ldr d0, [sp, 1416]
bl pow
str d0, [sp, 3408]
ldr d1, [sp, 3408]
ldr d0, [sp, 1632]
fmul d1, d1, d0
ldr d0, [sp, 1416]
fdiv d0, d1, d0
str d0, [sp, 3416]
ldr d1, [sp, 3416]
ldr d0, [sp, 1432]
fmul d0, d1, d0
str d0, [sp, 3424]
fmov d1, 1.0e+0
ldr d0, [sp, 3344]
fsub d1, d1, d0
ldr d0, [sp, 3376]
fmul d1, d1, d0
ldr d2, [sp, 3344]
ldr d0, [sp, 3408]
fmul d0, d2, d0
fadd d0, d1, d0
str d0, [sp, 3432]
ldr d1, [sp, 3408]
ldr d0, [sp, 3376]
fsub d0, d1, d0
str d0, [sp, 3440]
fmov d1, 1.0e+0
ldr d0, [sp, 3344]
fsub d0, d1, d0
str d0, [sp, 3448]
ldr d0, [sp, 3344]
str d0, [sp, 3456]
ldr d1, [sp, 3440]
ldr d0, [sp, 3664]
fmul d0, d1, d0
str d0, [sp, 3672]
ldr d1, [sp, 3440]
ldr d0, [sp, 3368]
fmul d0, d1, d0
str d0, [sp, 3472]
ldr d1, [sp, 3448]
ldr d0, [sp, 3392]
fmul d0, d1, d0
ldr d1, [sp, 3472]
fadd d0, d1, d0
str d0, [sp, 3472]
ldr d1, [sp, 3456]
ldr d0, [sp, 3424]
fmul d0, d1, d0
ldr d1, [sp, 3472]
fadd d0, d1, d0
str d0, [sp, 3472]
ldr x0, [sp, 64]
ldr d1, [x0]
ldr d0, [sp, 2872]
fsub d1, d1, d0
ldr d0, [sp, 2728]
fadd d0, d1, d0
ldr d1, [sp, 3432]
fmul d0, d1, d0
str d0, [sp, 3480]
ldr d0, [sp, 3432]
str d0, [sp, 3680]
ldr d0, [sp, 3432]
fneg d0, d0
str d0, [sp, 3496]
ldr d0, [sp, 3432]
str d0, [sp, 3504]
ldr d1, [sp, 2728]
ldr d0, [sp, 2872]
fsub d1, d1, d0
ldr x0, [sp, 64]
ldr d0, [x0]
fadd d0, d1, d0
str d0, [sp, 3512]
ldr d1, [sp, 3496]
ldr d0, [sp, 3640]
fmul d0, d1, d0
ldr d1, [sp, 3680]
fadd d0, d1, d0
str d0, [sp, 3680]
ldr d1, [sp, 3496]
ldr d0, [sp, 2912]
fmul d0, d1, d0
str d0, [sp, 3520]
ldr d1, [sp, 3504]
ldr d0, [sp, 2752]
fmul d0, d1, d0
ldr d1, [sp, 3520]
fadd d0, d1, d0
str d0, [sp, 3520]
ldr d1, [sp, 3512]
ldr d0, [sp, 3672]
fmul d0, d1, d0
ldr d1, [sp, 3680]
fadd d0, d1, d0
str d0, [sp, 3680]
ldr d1, [sp, 3512]
ldr d0, [sp, 3472]
fmul d0, d1, d0
ldr d1, [sp, 3520]
fadd d0, d1, d0
str d0, [sp, 3520]
ldr d1, [sp, 3480]
ldr d0, [sp, 208]
fadd d1, d1, d0
ldr d0, [sp, 3208]
fsub d0, d1, d0
str d0, [sp, 376]
fmov d0, 1.0e+0
str d0, [sp, 3688]
fmov d0, 1.0e+0
str d0, [sp, 3696]
fmov d0, -1.0e+0
str d0, [sp, 3704]
ldr d1, [sp, 3688]
ldr d0, [sp, 3680]
fmul d0, d1, d0
str d0, [sp, 392]
ldr d1, [sp, 3688]
ldr d0, [sp, 3520]
fmul d0, d1, d0
str d0, [sp, 384]
ldr d1, [sp, 3696]
ldr d0, [sp, 216]
fmul d0, d1, d0
ldr d1, [sp, 384]
fadd d0, d1, d0
str d0, [sp, 384]
ldr d1, [sp, 3696]
ldr d0, [sp, 360]
fmul d0, d1, d0
ldr d1, [sp, 392]
fadd d0, d1, d0
str d0, [sp, 392]
ldr d1, [sp, 3704]
ldr d0, [sp, 3232]
fmul d0, d1, d0
ldr d1, [sp, 384]
fadd d0, d1, d0
str d0, [sp, 384]
b .L66
.L67:
ldr d0, [sp, 2680]
fmul d1, d0, d0
ldr d2, [sp, 744]
fmov d0, 4.0e+0
fmul d2, d2, d0
ldr d0, [sp, 744]
fmul d0, d2, d0
fadd d0, d1, d0
bl sqrt
str d0, [sp, 2704]
ldr d0, [sp, 2680]
fmul d1, d0, d0
ldr d0, [sp, 744]
fmul d2, d0, d0
fmov d0, 4.0e+0
fmul d0, d2, d0
fadd d0, d1, d0
bl sqrt
fmov d1, d0
ldr d0, [sp, 2680]
fdiv d0, d0, d1
str d0, [sp, 2712]
ldr d1, [sp, 2712]
ldr d0, [sp, 2696]
fmul d0, d1, d0
str d0, [sp, 2720]
ldr d1, [sp, 2680]
ldr d0, [sp, 2704]
fadd d1, d1, d0
fmov d0, -5.0e-1
fmul d0, d1, d0
str d0, [sp, 2728]
fmov d0, -5.0e-1
str d0, [sp, 2736]
fmov d0, -5.0e-1
str d0, [sp, 2744]
ldr d1, [sp, 2736]
ldr d0, [sp, 2696]
fmul d0, d1, d0
str d0, [sp, 2752]
ldr d1, [sp, 2744]
ldr d0, [sp, 2720]
fmul d0, d1, d0
ldr d1, [sp, 2752]
fadd d0, d1, d0
str d0, [sp, 2752]
ldr d0, [sp, 2352]
ldr d1, [sp, 2728]
fdiv d0, d1, d0
fmov d1, 1.0e+0
fsub d0, d1, d0
str d0, [sp, 1416]
ldr d0, [sp, 2352]
fmov d1, -1.0e+0
fdiv d0, d1, d0
str d0, [sp, 2760]
ldr d0, [sp, 2352]
fmul d0, d0, d0
ldr d1, [sp, 2728]
fdiv d0, d1, d0
str d0, [sp, 2472]
ldr d1, [sp, 2760]
ldr d0, [sp, 2752]
fmul d0, d1, d0
str d0, [sp, 1432]
ldr d1, [sp, 2472]
ldr d0, [sp, 2384]
fmul d0, d1, d0
ldr d1, [sp, 1432]
fadd d0, d1, d0
str d0, [sp, 1432]
fmov d1, 1.0e+0
ldr d0, [sp, 736]
fsub d0, d1, d0
str d0, [sp, 1632]
ldr d1, [sp, 1632]
ldr d0, [sp, 1416]
bl pow
str d0, [sp, 1656]
ldr d1, [sp, 1656]
ldr d0, [sp, 1632]
fmul d1, d1, d0
ldr d0, [sp, 1416]
fdiv d0, d1, d0
str d0, [sp, 2768]
ldr d1, [sp, 2768]
ldr d0, [sp, 1432]
fmul d0, d1, d0
str d0, [sp, 1680]
ldr d0, [sp, 2352]
fneg d1, d0
ldr d0, [sp, 1656]
fmul d1, d1, d0
fmov d2, 1.0e+0
ldr d0, [sp, 736]
fsub d0, d2, d0
fdiv d0, d1, d0
str d0, [sp, 2776]
ldr d0, [sp, 1656]
fneg d1, d0
fmov d2, 1.0e+0
ldr d0, [sp, 736]
fsub d0, d2, d0
fdiv d0, d1, d0
str d0, [sp, 3552]
ldr d0, [sp, 2352]
fneg d1, d0
fmov d2, 1.0e+0
ldr d0, [sp, 736]
fsub d0, d2, d0
fdiv d0, d1, d0
str d0, [sp, 2792]
ldr d1, [sp, 3552]
ldr d0, [sp, 2384]
fmul d0, d1, d0
str d0, [sp, 2800]
ldr d1, [sp, 2792]
ldr d0, [sp, 1680]
fmul d0, d1, d0
ldr d1, [sp, 2800]
fadd d0, d1, d0
str d0, [sp, 2800]
ldr x0, [sp, 64]
ldr d0, [x0]
ldr d1, [sp, 2680]
fadd d0, d1, d0
str d0, [sp, 2808]
fmov d0, 1.0e+0
str d0, [sp, 3712]
fmov d0, 1.0e+0
str d0, [sp, 2824]
ldr d1, [sp, 2824]
ldr d0, [sp, 2696]
fmul d0, d1, d0
str d0, [sp, 2832]
ldr d0, [sp, 2808]
fmul d1, d0, d0
ldr d2, [sp, 744]
fmov d0, 4.0e+0
fmul d2, d2, d0
ldr d0, [sp, 744]
fmul d0, d2, d0
fadd d0, d1, d0
bl sqrt
str d0, [sp, 2840]
ldr d0, [sp, 2808]
fmul d1, d0, d0
ldr d0, [sp, 744]
fmul d2, d0, d0
fmov d0, 4.0e+0
fmul d0, d2, d0
fadd d0, d1, d0
bl sqrt
fmov d1, d0
ldr d0, [sp, 2808]
fdiv d0, d0, d1
str d0, [sp, 2848]
ldr d1, [sp, 2848]
ldr d0, [sp, 3712]
fmul d0, d1, d0
str d0, [sp, 3720]
ldr d1, [sp, 2848]
ldr d0, [sp, 2832]
fmul d0, d1, d0
str d0, [sp, 2864]
ldr d1, [sp, 2808]
ldr d0, [sp, 2840]
fsub d1, d1, d0
fmov d0, 5.0e-1
fmul d1, d1, d0
ldr d0, [sp, 2680]
fsub d0, d1, d0
str d0, [sp, 2872]
fmov d0, 5.0e-1
str d0, [sp, 2880]
fmov d0, -5.0e-1
str d0, [sp, 2888]
fmov d0, -1.0e+0
str d0, [sp, 2896]
ldr d1, [sp, 2880]
ldr d0, [sp, 3712]
fmul d0, d1, d0
str d0, [sp, 3640]
ldr d1, [sp, 2880]
ldr d0, [sp, 2832]
fmul d0, d1, d0
str d0, [sp, 2912]
ldr d1, [sp, 2888]
ldr d0, [sp, 3720]
fmul d0, d1, d0
ldr d1, [sp, 3640]
fadd d0, d1, d0
str d0, [sp, 3640]
ldr d1, [sp, 2888]
ldr d0, [sp, 2864]
fmul d0, d1, d0
ldr d1, [sp, 2912]
fadd d0, d1, d0
str d0, [sp, 2912]
ldr d1, [sp, 2896]
ldr d0, [sp, 2696]
fmul d0, d1, d0
ldr d1, [sp, 2912]
fadd d0, d1, d0
str d0, [sp, 2912]
ldr d0, [sp, 2352]
ldr d1, [sp, 2872]
fdiv d0, d1, d0
fmov d1, 1.0e+0
fsub d0, d1, d0
str d0, [sp, 1416]
ldr d0, [sp, 2352]
fmov d1, -1.0e+0
fdiv d0, d1, d0
str d0, [sp, 2920]
ldr d0, [sp, 2352]
fmul d0, d0, d0
ldr d1, [sp, 2872]
fdiv d0, d1, d0
str d0, [sp, 2472]
ldr d1, [sp, 2920]
ldr d0, [sp, 3640]
fmul d0, d1, d0
str d0, [sp, 3648]
ldr d1, [sp, 2920]
ldr d0, [sp, 2912]
fmul d0, d1, d0
str d0, [sp, 1432]
ldr d1, [sp, 2472]
ldr d0, [sp, 2384]
fmul d0, d1, d0
ldr d1, [sp, 1432]
fadd d0, d1, d0
str d0, [sp, 1432]
fmov d1, 1.0e+0
ldr d0, [sp, 736]
fsub d0, d1, d0
str d0, [sp, 1632]
ldr d1, [sp, 1632]
ldr d0, [sp, 1416]
bl pow
str d0, [sp, 1656]
ldr d1, [sp, 1656]
ldr d0, [sp, 1632]
fmul d1, d1, d0
ldr d0, [sp, 1416]
fdiv d0, d1, d0
str d0, [sp, 2768]
ldr d1, [sp, 2768]
ldr d0, [sp, 3648]
fmul d0, d1, d0
str d0, [sp, 3656]
ldr d1, [sp, 2768]
ldr d0, [sp, 1432]
fmul d0, d1, d0
str d0, [sp, 1680]
ldr d0, [sp, 2352]
fneg d1, d0
ldr d0, [sp, 1656]
fmul d1, d1, d0
fmov d2, 1.0e+0
ldr d0, [sp, 736]
fsub d0, d2, d0
fdiv d0, d1, d0
str d0, [sp, 208]
ldr d0, [sp, 1656]
fneg d1, d0
fmov d2, 1.0e+0
ldr d0, [sp, 736]
fsub d0, d2, d0
fdiv d0, d1, d0
str d0, [sp, 3336]
ldr d0, [sp, 2352]
fneg d1, d0
fmov d2, 1.0e+0
ldr d0, [sp, 736]
fsub d0, d2, d0
fdiv d0, d1, d0
str d0, [sp, 2952]
ldr d1, [sp, 3336]
ldr d0, [sp, 2384]
fmul d0, d1, d0
str d0, [sp, 216]
ldr d1, [sp, 2952]
ldr d0, [sp, 3656]
fmul d0, d1, d0
str d0, [sp, 360]
ldr d1, [sp, 2952]
ldr d0, [sp, 1680]
fmul d0, d1, d0
ldr d1, [sp, 216]
fadd d0, d1, d0
str d0, [sp, 216]
fmov d1, 1.0e+0
ldr d0, [sp, 648]
fsub d0, d1, d0
str d0, [sp, 1416]
ldr d0, [sp, 736]
fneg d0, d0
str d0, [sp, 1632]
ldr d1, [sp, 1632]
ldr d0, [sp, 1416]
bl pow
str d0, [sp, 1656]
ldr x0, [sp, 64]
ldr d1, [x0]
ldr d0, [sp, 2872]
fsub d1, d1, d0
ldr d0, [sp, 2728]
fadd d1, d1, d0
ldr d0, [sp, 1656]
fmul d1, d1, d0
ldr d0, [sp, 208]
fadd d1, d1, d0
ldr d0, [sp, 2776]
fsub d0, d1, d0
str d0, [sp, 376]
fmov d0, 1.0e+0
str d0, [sp, 3696]
ldr d0, [sp, 1656]
str d0, [sp, 392]
ldr d0, [sp, 1656]
fneg d0, d0
str d0, [sp, 3728]
ldr d0, [sp, 1656]
str d0, [sp, 3736]
fmov d0, -1.0e+0
str d0, [sp, 3744]
ldr d1, [sp, 3696]
ldr d0, [sp, 216]
fmul d0, d1, d0
str d0, [sp, 384]
ldr d1, [sp, 3696]
ldr d0, [sp, 360]
fmul d0, d1, d0
ldr d1, [sp, 392]
fadd d0, d1, d0
str d0, [sp, 392]
ldr d1, [sp, 3728]
ldr d0, [sp, 3640]
fmul d0, d1, d0
ldr d1, [sp, 392]
fadd d0, d1, d0
str d0, [sp, 392]
ldr d1, [sp, 3728]
ldr d0, [sp, 2912]
fmul d0, d1, d0
ldr d1, [sp, 384]
fadd d0, d1, d0
str d0, [sp, 384]
ldr d1, [sp, 3736]
ldr d0, [sp, 2752]
fmul d0, d1, d0
ldr d1, [sp, 384]
fadd d0, d1, d0
str d0, [sp, 384]
ldr d1, [sp, 3744]
ldr d0, [sp, 2800]
fmul d0, d1, d0
ldr d1, [sp, 384]
fadd d0, d1, d0
str d0, [sp, 384]
.L66:
ldr x0, [sp, 88]
ldr d1, [x0]
ldr d2, [sp, 2024]
ldr d0, [sp, 1344]
fmul d0, d2, d0
fdiv d0, d1, d0
str d0, [sp, 3768]
ldr d1, [sp, 2024]
ldr d0, [sp, 1344]
fmul d0, d1, d0
fmov d1, 1.0e+0
fdiv d0, d1, d0
str d0, [sp, 3776]
ldr x0, [sp, 88]
ldr d0, [x0]
fneg d1, d0
ldr d0, [sp, 2024]
fmul d2, d0, d0
ldr d0, [sp, 1344]
fmul d0, d2, d0
fdiv d0, d1, d0
str d0, [sp, 3784]
ldr x0, [sp, 88]
ldr d0, [x0]
fneg d1, d0
ldr d0, [sp, 1344]
fmul d2, d0, d0
ldr d0, [sp, 2024]
fmul d0, d2, d0
fdiv d0, d1, d0
str d0, [sp, 3792]
ldr d1, [sp, 3784]
ldr d0, [sp, 2040]
fmul d0, d1, d0
str d0, [sp, 3800]
ldr d1, [sp, 3792]
ldr d0, [sp, 1360]
fmul d0, d1, d0
ldr d1, [sp, 3800]
fadd d0, d1, d0
str d0, [sp, 3800]
ldr d0, [sp, 3768]
bl exp
str d0, [sp, 3808]
ldr d0, [sp, 3808]
str d0, [sp, 3816]
ldr d1, [sp, 3816]
ldr d0, [sp, 3776]
fmul d0, d1, d0
str d0, [sp, 3824]
ldr d1, [sp, 3816]
ldr d0, [sp, 3800]
fmul d0, d1, d0
str d0, [sp, 3832]
ldr d1, [sp, 3808]
fmov d0, 1.0e+0
fsub d0, d1, d0
ldr d1, [sp, 1760]
fmul d0, d1, d0
str d0, [sp, 3840]
ldr d1, [sp, 3808]
fmov d0, 1.0e+0
fsub d0, d1, d0
str d0, [sp, 3848]
ldr d0, [sp, 1760]
str d0, [sp, 3856]
ldr d1, [sp, 3848]
ldr d0, [sp, 1776]
fmul d0, d1, d0
str d0, [sp, 3864]
ldr d1, [sp, 3856]
ldr d0, [sp, 3824]
fmul d0, d1, d0
str d0, [sp, 3872]
ldr d1, [sp, 3856]
ldr d0, [sp, 3832]
fmul d0, d1, d0
ldr d1, [sp, 3864]
fadd d0, d1, d0
str d0, [sp, 3864]
ldr x0, [sp, 72]
ldr d1, [x0]
ldr d2, [sp, 2048]
ldr d0, [sp, 1344]
fmul d0, d2, d0
fdiv d0, d1, d0
str d0, [sp, 3768]
ldr d1, [sp, 2048]
ldr d0, [sp, 1344]
fmul d0, d1, d0
fmov d1, 1.0e+0
fdiv d0, d1, d0
str d0, [sp, 3880]
ldr x0, [sp, 72]
ldr d0, [x0]
fneg d1, d0
ldr d0, [sp, 2048]
fmul d2, d0, d0
ldr d0, [sp, 1344]
fmul d0, d2, d0
fdiv d0, d1, d0
str d0, [sp, 3888]
ldr x0, [sp, 72]
ldr d0, [x0]
fneg d1, d0
ldr d0, [sp, 1344]
fmul d2, d0, d0
ldr d0, [sp, 2048]
fmul d0, d2, d0
fdiv d0, d1, d0
str d0, [sp, 3792]
ldr d1, [sp, 3888]
ldr d0, [sp, 2064]
fmul d0, d1, d0
str d0, [sp, 3800]
ldr d1, [sp, 3792]
ldr d0, [sp, 1360]
fmul d0, d1, d0
ldr d1, [sp, 3800]
fadd d0, d1, d0
str d0, [sp, 3800]
ldr d0, [sp, 3768]
bl exp
str d0, [sp, 3808]
ldr d0, [sp, 3808]
str d0, [sp, 3816]
ldr d1, [sp, 3816]
ldr d0, [sp, 3880]
fmul d0, d1, d0
str d0, [sp, 3896]
ldr d1, [sp, 3816]
ldr d0, [sp, 3800]
fmul d0, d1, d0
str d0, [sp, 3832]
ldr d1, [sp, 1760]
ldr d0, [sp, 1784]
fmul d1, d1, d0
ldr d2, [sp, 3808]
fmov d0, 1.0e+0
fsub d0, d2, d0
fmul d0, d1, d0
str d0, [sp, 3904]
ldr d1, [sp, 3808]
fmov d0, 1.0e+0
fsub d0, d1, d0
ldr d1, [sp, 1784]
fmul d0, d1, d0
str d0, [sp, 3912]
ldr d1, [sp, 3808]
fmov d0, 1.0e+0
fsub d0, d1, d0
ldr d1, [sp, 1760]
fmul d0, d1, d0
str d0, [sp, 3920]
ldr d1, [sp, 1760]
ldr d0, [sp, 1784]
fmul d0, d1, d0
str d0, [sp, 3928]
ldr d1, [sp, 3912]
ldr d0, [sp, 1776]
fmul d0, d1, d0
str d0, [sp, 3936]
ldr d1, [sp, 3920]
ldr d0, [sp, 1800]
fmul d0, d1, d0
ldr d1, [sp, 3936]
fadd d0, d1, d0
str d0, [sp, 3936]
ldr d1, [sp, 3928]
ldr d0, [sp, 3896]
fmul d0, d1, d0
str d0, [sp, 3944]
ldr d1, [sp, 3928]
ldr d0, [sp, 3832]
fmul d0, d1, d0
ldr d1, [sp, 3936]
fadd d0, d1, d0
str d0, [sp, 3936]
ldr d1, [sp, 256]
ldr d0, [sp, 120]
fmul d1, d1, d0
fmov d0, 1.0e+0
fadd d1, d1, d0
ldr d2, [sp, 336]
ldr d0, [sp, 112]
fmul d0, d2, d0
fadd d0, d1, d0
str d0, [sp, 3952]
ldr d0, [sp, 120]
str d0, [sp, 3960]
ldr d0, [sp, 112]
str d0, [sp, 3968]
ldr d1, [sp, 3960]
ldr d0, [sp, 264]
fmul d0, d1, d0
str d0, [sp, 3976]
ldr d1, [sp, 3960]
ldr d0, [sp, 272]
fmul d0, d1, d0
str d0, [sp, 3984]
ldr d1, [sp, 3968]
ldr d0, [sp, 344]
fmul d0, d1, d0
ldr d1, [sp, 3976]
fadd d0, d1, d0
str d0, [sp, 3976]
ldr d1, [sp, 3968]
ldr d0, [sp, 352]
fmul d0, d1, d0
str d0, [sp, 3992]
ldr d0, [sp, 3952]
adrp x0, .LC4
ldr d1, [x0, #:lo12:.LC4]
fsub d1, d0, d1
ldr d0, [sp, 3952]
adrp x0, .LC4
ldr d2, [x0, #:lo12:.LC4]
fsub d0, d0, d2
fmul d0, d1, d0
adrp x0, .LC5
ldr d1, [x0, #:lo12:.LC5]
fadd d0, d0, d1
bl sqrt
fmov d1, d0
ldr d0, [sp, 3952]
fadd d0, d1, d0
adrp x0, .LC4
ldr d1, [x0, #:lo12:.LC4]
fsub d1, d0, d1
fmov d0, 5.0e-1
fmul d0, d1, d0
adrp x0, .LC4
ldr d1, [x0, #:lo12:.LC4]
fadd d0, d0, d1
str d0, [sp, 4000]
ldr d0, [sp, 3952]
adrp x0, .LC4
ldr d1, [x0, #:lo12:.LC4]
fsub d8, d0, d1
ldr d0, [sp, 3952]
adrp x0, .LC4
ldr d1, [x0, #:lo12:.LC4]
fsub d1, d0, d1
ldr d0, [sp, 3952]
adrp x0, .LC4
ldr d2, [x0, #:lo12:.LC4]
fsub d0, d0, d2
fmul d0, d1, d0
adrp x0, .LC5
ldr d1, [x0, #:lo12:.LC5]
fadd d0, d0, d1
bl sqrt
fdiv d1, d8, d0
fmov d0, 1.0e+0
fadd d1, d1, d0
fmov d0, 5.0e-1
fmul d0, d1, d0
str d0, [sp, 4008]
ldr d1, [sp, 4008]
ldr d0, [sp, 3976]
fmul d0, d1, d0
str d0, [sp, 4016]
ldr d1, [sp, 4008]
ldr d0, [sp, 3984]
fmul d0, d1, d0
str d0, [sp, 4024]
ldr d1, [sp, 4008]
ldr d0, [sp, 3992]
fmul d0, d1, d0
str d0, [sp, 4032]
ldr d1, [sp, 3840]
ldr d0, [sp, 128]
fmul d1, d1, d0
ldr d2, [sp, 3904]
ldr d0, [sp, 144]
fmul d0, d2, d0
fadd d0, d1, d0
str d0, [sp, 4040]
ldr d0, [sp, 128]
str d0, [sp, 4048]
ldr d0, [sp, 3840]
str d0, [sp, 4056]
ldr d0, [sp, 144]
str d0, [sp, 4064]
ldr d1, [sp, 4048]
ldr d0, [sp, 3864]
fmul d0, d1, d0
str d0, [sp, 4072]
ldr d1, [sp, 4048]
ldr d0, [sp, 3872]
fmul d0, d1, d0
str d0, [sp, 4080]
ldr d1, [sp, 4056]
ldr d0, [sp, 136]
fmul d0, d1, d0
ldr d1, [sp, 4072]
fadd d0, d1, d0
str d0, [sp, 4072]
ldr d1, [sp, 4064]
ldr d0, [sp, 3936]
fmul d0, d1, d0
ldr d1, [sp, 4072]
fadd d0, d1, d0
str d0, [sp, 4072]
ldr d1, [sp, 4064]
ldr d0, [sp, 3944]
fmul d0, d1, d0
str d0, [sp, 4088]
ldr d1, [sp, 1192]
fmov d0, 5.0e-1
fcmpe d1, d0
bmi .L148
b .L181
.L148:
ldr d0, [sp, 1200]
fmov d1, 1.0e+0
fdiv d0, d1, d0
str d0, [sp, 1632]
ldr d1, [sp, 1632]
ldr d0, [sp, 4000]
bl pow
str d0, [sp, 1656]
ldr d1, [sp, 1656]
ldr d0, [sp, 1632]
fmul d1, d1, d0
ldr d0, [sp, 4000]
fdiv d0, d1, d0
str d0, [sp, 4136]
ldr d1, [sp, 4136]
ldr d0, [sp, 4016]
fmul d0, d1, d0
str d0, [sp, 1680]
ldr d1, [sp, 4136]
ldr d0, [sp, 4024]
fmul d0, d1, d0
str d0, [sp, 2936]
ldr d1, [sp, 4136]
ldr d0, [sp, 4032]
fmul d0, d1, d0
str d0, [sp, 3328]
ldr d1, [sp, 4040]
fmov d0, 4.0e+0
fmul d0, d1, d0
ldr d1, [sp, 1656]
fadd d0, d1, d0
str d0, [sp, 1416]
fmov d0, 1.0e+0
str d0, [sp, 2192]
fmov d0, 4.0e+0
str d0, [sp, 4096]
ldr d1, [sp, 2192]
ldr d0, [sp, 1680]
fmul d0, d1, d0
str d0, [sp, 1432]
ldr d1, [sp, 2192]
ldr d0, [sp, 2936]
fmul d0, d1, d0
str d0, [sp, 2928]
ldr d1, [sp, 2192]
ldr d0, [sp, 3328]
fmul d0, d1, d0
str d0, [sp, 3320]
ldr d1, [sp, 4096]
ldr d0, [sp, 4072]
fmul d0, d1, d0
ldr d1, [sp, 1432]
fadd d0, d1, d0
str d0, [sp, 1432]
ldr d1, [sp, 4096]
ldr d0, [sp, 4080]
fmul d0, d1, d0
ldr d1, [sp, 2928]
fadd d0, d1, d0
str d0, [sp, 2928]
ldr d1, [sp, 4096]
ldr d0, [sp, 4088]
fmul d0, d1, d0
ldr d1, [sp, 3320]
fadd d0, d1, d0
str d0, [sp, 3320]
ldr d1, [sp, 1200]
ldr d0, [sp, 1416]
bl pow
str d0, [sp, 1688]
ldr d1, [sp, 1688]
ldr d0, [sp, 1200]
fmul d1, d1, d0
ldr d0, [sp, 1416]
fdiv d0, d1, d0
str d0, [sp, 2304]
ldr d1, [sp, 2304]
ldr d0, [sp, 1432]
fmul d0, d1, d0
str d0, [sp, 1704]
ldr d1, [sp, 2304]
ldr d0, [sp, 2928]
fmul d0, d1, d0
str d0, [sp, 4144]
ldr d1, [sp, 2304]
ldr d0, [sp, 3320]
fmul d0, d1, d0
str d0, [sp, 4152]
ldr d1, [sp, 4000]
ldr d0, [sp, 1688]
fadd d1, d1, d0
fmov d0, 5.0e-1
fmul d0, d1, d0
str d0, [sp, 400]
fmov d0, 5.0e-1
str d0, [sp, 4120]
fmov d0, 5.0e-1
str d0, [sp, 4160]
ldr d1, [sp, 4120]
ldr d0, [sp, 4016]
fmul d0, d1, d0
str d0, [sp, 408]
ldr d1, [sp, 4120]
ldr d0, [sp, 4024]
fmul d0, d1, d0
str d0, [sp, 416]
ldr d1, [sp, 4120]
ldr d0, [sp, 4032]
fmul d0, d1, d0
str d0, [sp, 424]
ldr d1, [sp, 4160]
ldr d0, [sp, 1704]
fmul d0, d1, d0
ldr d1, [sp, 408]
fadd d0, d1, d0
str d0, [sp, 408]
ldr d1, [sp, 4160]
ldr d0, [sp, 4144]
fmul d0, d1, d0
ldr d1, [sp, 416]
fadd d0, d1, d0
str d0, [sp, 416]
ldr d1, [sp, 4160]
ldr d0, [sp, 4152]
fmul d0, d1, d0
ldr d1, [sp, 424]
fadd d0, d1, d0
str d0, [sp, 424]
b .L72
.L181:
ldr d1, [sp, 4040]
fmov d0, 4.0e+0
fmul d1, d1, d0
fmov d0, 1.0e+0
fadd d0, d1, d0
str d0, [sp, 1416]
fmov d0, 4.0e+0
str d0, [sp, 4096]
ldr d1, [sp, 4096]
ldr d0, [sp, 4072]
fmul d0, d1, d0
str d0, [sp, 1432]
ldr d1, [sp, 4096]
ldr d0, [sp, 4080]
fmul d0, d1, d0
str d0, [sp, 2928]
ldr d1, [sp, 4096]
ldr d0, [sp, 4088]
fmul d0, d1, d0
str d0, [sp, 3320]
ldr d1, [sp, 1200]
ldr d0, [sp, 1416]
bl pow
str d0, [sp, 1632]
ldr d1, [sp, 1632]
ldr d0, [sp, 1200]
fmul d1, d1, d0
ldr d0, [sp, 1416]
fdiv d0, d1, d0
str d0, [sp, 2440]
ldr d1, [sp, 2440]
ldr d0, [sp, 1432]
fmul d0, d1, d0
str d0, [sp, 1648]
ldr d1, [sp, 2440]
ldr d0, [sp, 2928]
fmul d0, d1, d0
str d0, [sp, 4104]
ldr d1, [sp, 2440]
ldr d0, [sp, 3320]
fmul d0, d1, d0
str d0, [sp, 4112]
ldr d1, [sp, 4000]
fmov d0, 5.0e-1
fmul d1, d1, d0
ldr d2, [sp, 1632]
fmov d0, 1.0e+0
fadd d0, d2, d0
fmul d0, d1, d0
str d0, [sp, 400]
ldr d1, [sp, 1632]
fmov d0, 1.0e+0
fadd d1, d1, d0
fmov d0, 5.0e-1
fmul d0, d1, d0
str d0, [sp, 4120]
ldr d1, [sp, 4000]
fmov d0, 5.0e-1
fmul d0, d1, d0
str d0, [sp, 4128]
ldr d1, [sp, 4120]
ldr d0, [sp, 4016]
fmul d0, d1, d0
str d0, [sp, 408]
ldr d1, [sp, 4120]
ldr d0, [sp, 4024]
fmul d0, d1, d0
str d0, [sp, 416]
ldr d1, [sp, 4120]
ldr d0, [sp, 4032]
fmul d0, d1, d0
str d0, [sp, 424]
ldr d1, [sp, 4128]
ldr d0, [sp, 1648]
fmul d0, d1, d0
ldr d1, [sp, 408]
fadd d0, d1, d0
str d0, [sp, 408]
ldr d1, [sp, 4128]
ldr d0, [sp, 4104]
fmul d0, d1, d0
ldr d1, [sp, 416]
fadd d0, d1, d0
str d0, [sp, 416]
ldr d1, [sp, 4128]
ldr d0, [sp, 4112]
fmul d0, d1, d0
ldr d1, [sp, 424]
fadd d0, d1, d0
str d0, [sp, 424]
.L72:
ldr d0, [sp, 400]
ldr d1, [sp, 3904]
fdiv d0, d1, d0
ldr x0, [sp, 5680]
str d0, [x0]
ldr d0, [sp, 400]
fmov d1, 1.0e+0
fdiv d0, d1, d0
str d0, [sp, 4168]
ldr d0, [sp, 3904]
fneg d1, d0
ldr d0, [sp, 400]
fmul d0, d0, d0
fdiv d0, d1, d0
str d0, [sp, 4176]
ldr d1, [sp, 4168]
ldr d0, [sp, 3936]
fmul d0, d1, d0
ldr x0, [sp, 5688]
str d0, [x0]
ldr d1, [sp, 4168]
ldr d0, [sp, 3944]
fmul d0, d1, d0
ldr x0, [sp, 5696]
str d0, [x0]
ldr x0, [sp, 5688]
ldr d1, [x0]
ldr d2, [sp, 4176]
ldr d0, [sp, 408]
fmul d0, d2, d0
fadd d0, d1, d0
ldr x0, [sp, 5688]
str d0, [x0]
ldr d1, [sp, 4176]
ldr d0, [sp, 416]
fmul d0, d1, d0
ldr x0, [sp, 5704]
str d0, [x0]
ldr x0, [sp, 5696]
ldr d1, [x0]
ldr d2, [sp, 4176]
ldr d0, [sp, 424]
fmul d0, d2, d0
fadd d0, d1, d0
ldr x0, [sp, 5696]
str d0, [x0]
ldr d0, [sp, 400]
ldr d1, [sp, 3840]
fdiv d0, d1, d0
ldr x0, [sp, 5648]
str d0, [x0]
ldr d0, [sp, 400]
fmov d1, 1.0e+0
fdiv d0, d1, d0
str d0, [sp, 4184]
ldr d0, [sp, 3840]
fneg d1, d0
ldr d0, [sp, 400]
fmul d0, d0, d0
fdiv d0, d1, d0
str d0, [sp, 4192]
ldr d1, [sp, 4184]
ldr d0, [sp, 3864]
fmul d0, d1, d0
ldr x0, [sp, 5656]
str d0, [x0]
ldr d1, [sp, 4184]
ldr d0, [sp, 3872]
fmul d0, d1, d0
ldr x0, [sp, 5664]
str d0, [x0]
ldr x0, [sp, 5656]
ldr d1, [x0]
ldr d2, [sp, 4192]
ldr d0, [sp, 408]
fmul d0, d2, d0
fadd d0, d1, d0
ldr x0, [sp, 5656]
str d0, [x0]
ldr x0, [sp, 5664]
ldr d1, [x0]
ldr d2, [sp, 4192]
ldr d0, [sp, 416]
fmul d0, d2, d0
fadd d0, d1, d0
ldr x0, [sp, 5664]
str d0, [x0]
ldr d1, [sp, 4192]
ldr d0, [sp, 424]
fmul d0, d1, d0
ldr x0, [sp, 5672]
str d0, [x0]
ldr d0, [sp, 864]
fcmpe d0, #0.0
bgt .L149
b .L182
.L149:
ldr x0, [sp, 64]
ldr d1, [x0]
ldr d2, [sp, 880]
ldr d0, [sp, 1344]
fmul d0, d2, d0
fdiv d0, d1, d0
str d0, [sp, 3768]
ldr d1, [sp, 880]
ldr d0, [sp, 1344]
fmul d0, d1, d0
fmov d1, 1.0e+0
fdiv d0, d1, d0
str d0, [sp, 4200]
ldr x0, [sp, 64]
ldr d0, [x0]
fneg d1, d0
ldr d0, [sp, 1344]
fmul d2, d0, d0
ldr d0, [sp, 880]
fmul d0, d2, d0
fdiv d0, d1, d0
str d0, [sp, 3792]
ldr d1, [sp, 3792]
ldr d0, [sp, 1360]
fmul d0, d1, d0
str d0, [sp, 3800]
ldr d0, [sp, 3768]
bl exp
str d0, [sp, 3808]
ldr d0, [sp, 3808]
str d0, [sp, 3816]
ldr d1, [sp, 3816]
ldr d0, [sp, 4200]
fmul d0, d1, d0
str d0, [sp, 4208]
ldr d1, [sp, 3816]
ldr d0, [sp, 3800]
fmul d0, d1, d0
str d0, [sp, 3832]
ldr x0, [sp, 72]
ldr d1, [x0]
ldr d2, [sp, 880]
ldr d0, [sp, 1344]
fmul d0, d2, d0
fdiv d0, d1, d0
str d0, [sp, 4216]
ldr d1, [sp, 880]
ldr d0, [sp, 1344]
fmul d0, d1, d0
fmov d1, 1.0e+0
fdiv d0, d1, d0
str d0, [sp, 4224]
ldr x0, [sp, 72]
ldr d0, [x0]
fneg d1, d0
ldr d0, [sp, 1344]
fmul d2, d0, d0
ldr d0, [sp, 880]
fmul d0, d2, d0
fdiv d0, d1, d0
str d0, [sp, 4232]
ldr d1, [sp, 4232]
ldr d0, [sp, 1360]
fmul d0, d1, d0
str d0, [sp, 4240]
ldr d0, [sp, 4216]
bl exp
str d0, [sp, 4248]
ldr d0, [sp, 4248]
str d0, [sp, 4256]
ldr d1, [sp, 4256]
ldr d0, [sp, 4224]
fmul d0, d1, d0
str d0, [sp, 4264]
ldr d1, [sp, 4256]
ldr d0, [sp, 4240]
fmul d0, d1, d0
str d0, [sp, 4272]
ldr d1, [sp, 872]
ldr d0, [sp, 3808]
fmul d1, d1, d0
fmov d2, 1.0e+0
ldr d0, [sp, 872]
fsub d2, d2, d0
ldr d0, [sp, 4248]
fmul d0, d2, d0
fadd d1, d1, d0
fmov d0, 1.0e+0
fsub d0, d1, d0
ldr d1, [sp, 1808]
fmul d0, d1, d0
str d0, [sp, 432]
ldr d1, [sp, 3808]
ldr d0, [sp, 872]
fmul d1, d1, d0
fmov d2, 1.0e+0
ldr d0, [sp, 872]
fsub d2, d2, d0
ldr d0, [sp, 4248]
fmul d0, d2, d0
fadd d1, d1, d0
fmov d0, 1.0e+0
fsub d0, d1, d0
str d0, [sp, 4280]
ldr d1, [sp, 1808]
ldr d0, [sp, 872]
fmul d0, d1, d0
str d0, [sp, 4288]
fmov d1, 1.0e+0
ldr d0, [sp, 872]
fsub d0, d1, d0
ldr d1, [sp, 1808]
fmul d0, d1, d0
str d0, [sp, 4296]
ldr d1, [sp, 4280]
ldr d0, [sp, 1824]
fmul d0, d1, d0
str d0, [sp, 440]
ldr d1, [sp, 4288]
ldr d0, [sp, 4208]
fmul d0, d1, d0
str d0, [sp, 448]
ldr d1, [sp, 4288]
ldr d0, [sp, 3832]
fmul d0, d1, d0
ldr d1, [sp, 440]
fadd d0, d1, d0
str d0, [sp, 440]
ldr d1, [sp, 4296]
ldr d0, [sp, 4264]
fmul d0, d1, d0
str d0, [sp, 456]
ldr d1, [sp, 4296]
ldr d0, [sp, 4272]
fmul d0, d1, d0
ldr d1, [sp, 440]
fadd d0, d1, d0
str d0, [sp, 440]
ldr d1, [sp, 432]
ldr d0, [sp, 152]
fmul d0, d1, d0
str d0, [sp, 4304]
ldr d0, [sp, 152]
str d0, [sp, 4312]
ldr d1, [sp, 4312]
ldr d0, [sp, 440]
fmul d0, d1, d0
str d0, [sp, 4320]
ldr d1, [sp, 4312]
ldr d0, [sp, 448]
fmul d0, d1, d0
str d0, [sp, 4328]
ldr d1, [sp, 4312]
ldr d0, [sp, 456]
fmul d0, d1, d0
str d0, [sp, 4336]
ldr d1, [sp, 4304]
fmov d0, 4.0e+0
fmul d1, d1, d0
fmov d0, 1.0e+0
fadd d0, d1, d0
bl sqrt
fmov d1, d0
fmov d0, 1.0e+0
fadd d1, d1, d0
fmov d0, 5.0e-1
fmul d0, d1, d0
str d0, [sp, 464]
ldr d1, [sp, 4304]
fmov d0, 4.0e+0
fmul d1, d1, d0
fmov d0, 1.0e+0
fadd d0, d1, d0
bl sqrt
fmov d1, d0
fmov d0, 1.0e+0
fdiv d0, d0, d1
str d0, [sp, 4344]
ldr d1, [sp, 4344]
ldr d0, [sp, 4320]
fmul d0, d1, d0
str d0, [sp, 472]
ldr d1, [sp, 4344]
ldr d0, [sp, 4328]
fmul d0, d1, d0
str d0, [sp, 480]
ldr d1, [sp, 4344]
ldr d0, [sp, 4336]
fmul d0, d1, d0
str d0, [sp, 488]
b .L75
.L182:
str xzr, [sp, 432]
str xzr, [sp, 440]
str xzr, [sp, 448]
str xzr, [sp, 456]
fmov d0, 1.0e+0
str d0, [sp, 464]
str xzr, [sp, 472]
str xzr, [sp, 480]
str xzr, [sp, 488]
.L75:
ldr d1, [sp, 784]
fmov d0, 1.0e+0
fcmp d1, d0
bne .L76
ldr x0, [sp, 88]
ldr d1, [x0]
ldr d2, [sp, 792]
ldr d0, [sp, 1344]
fmul d0, d2, d0
fdiv d0, d1, d0
str d0, [sp, 3768]
ldr d1, [sp, 792]
ldr d0, [sp, 1344]
fmul d0, d1, d0
fmov d1, 1.0e+0
fdiv d0, d1, d0
str d0, [sp, 3776]
ldr x0, [sp, 88]
ldr d0, [x0]
fneg d1, d0
ldr d0, [sp, 1344]
fmul d2, d0, d0
ldr d0, [sp, 792]
fmul d0, d2, d0
fdiv d0, d1, d0
str d0, [sp, 3792]
ldr d1, [sp, 3792]
ldr d0, [sp, 1360]
fmul d0, d1, d0
str d0, [sp, 3800]
ldr d0, [sp, 3768]
bl exp
str d0, [sp, 3808]
ldr d0, [sp, 3808]
str d0, [sp, 3816]
ldr d1, [sp, 3816]
ldr d0, [sp, 3776]
fmul d0, d1, d0
str d0, [sp, 3824]
ldr d1, [sp, 3816]
ldr d0, [sp, 3800]
fmul d0, d1, d0
str d0, [sp, 3832]
ldr x0, [sp, 88]
ldr d1, [x0]
ldr d2, [sp, 808]
ldr d0, [sp, 1344]
fmul d0, d2, d0
fdiv d0, d1, d0
str d0, [sp, 4352]
ldr d1, [sp, 808]
ldr d0, [sp, 1344]
fmul d0, d1, d0
fmov d1, 1.0e+0
fdiv d0, d1, d0
str d0, [sp, 4360]
ldr x0, [sp, 88]
ldr d0, [x0]
fneg d1, d0
ldr d0, [sp, 1344]
fmul d2, d0, d0
ldr d0, [sp, 808]
fmul d0, d2, d0
fdiv d0, d1, d0
str d0, [sp, 4368]
ldr d1, [sp, 4368]
ldr d0, [sp, 1360]
fmul d0, d1, d0
str d0, [sp, 4376]
ldr d0, [sp, 4352]
bl exp
str d0, [sp, 4384]
ldr d0, [sp, 4384]
str d0, [sp, 4392]
ldr d1, [sp, 4392]
ldr d0, [sp, 4360]
fmul d0, d1, d0
str d0, [sp, 4400]
ldr d1, [sp, 4392]
ldr d0, [sp, 4376]
fmul d0, d1, d0
str d0, [sp, 4408]
ldr d0, [sp, 1272]
fcmpe d0, #0.0
bgt .L150
b .L183
.L150:
ldr d0, [sp, 2096]
fneg d1, d0
ldr x0, [sp, 88]
ldr d0, [x0]
fsub d1, d1, d0
ldr d2, [sp, 2120]
ldr d0, [sp, 1344]
fmul d0, d2, d0
fdiv d0, d1, d0
str d0, [sp, 4216]
ldr d1, [sp, 2120]
ldr d0, [sp, 1344]
fmul d0, d1, d0
fmov d1, -1.0e+0
fdiv d0, d1, d0
str d0, [sp, 4448]
ldr d1, [sp, 2120]
ldr d0, [sp, 1344]
fmul d0, d1, d0
fmov d1, -1.0e+0
fdiv d0, d1, d0
str d0, [sp, 4456]
ldr x0, [sp, 88]
ldr d0, [x0]
fneg d1, d0
ldr d0, [sp, 2096]
fsub d0, d1, d0
fneg d1, d0
ldr d0, [sp, 2120]
fmul d2, d0, d0
ldr d0, [sp, 1344]
fmul d0, d2, d0
fdiv d0, d1, d0
str d0, [sp, 4464]
ldr x0, [sp, 88]
ldr d0, [x0]
fneg d1, d0
ldr d0, [sp, 2096]
fsub d0, d1, d0
fneg d1, d0
ldr d0, [sp, 1344]
fmul d2, d0, d0
ldr d0, [sp, 2120]
fmul d0, d2, d0
fdiv d0, d1, d0
str d0, [sp, 4232]
ldr d1, [sp, 4448]
ldr d0, [sp, 2112]
fmul d0, d1, d0
str d0, [sp, 4240]
ldr d1, [sp, 4464]
ldr d0, [sp, 2136]
fmul d0, d1, d0
ldr d1, [sp, 4240]
fadd d0, d1, d0
str d0, [sp, 4240]
ldr d1, [sp, 4232]
ldr d0, [sp, 1360]
fmul d0, d1, d0
ldr d1, [sp, 4240]
fadd d0, d1, d0
str d0, [sp, 4240]
ldr d0, [sp, 4216]
bl exp
str d0, [sp, 4248]
ldr d0, [sp, 4248]
str d0, [sp, 4256]
ldr d1, [sp, 4256]
ldr d0, [sp, 4240]
fmul d0, d1, d0
str d0, [sp, 4272]
ldr d1, [sp, 4256]
ldr d0, [sp, 4456]
fmul d0, d1, d0
str d0, [sp, 4472]
ldr d1, [sp, 3808]
fmov d0, 1.0e+0
fsub d1, d1, d0
ldr d0, [sp, 1832]
fmul d1, d1, d0
ldr d2, [sp, 4384]
fmov d0, 1.0e+0
fsub d2, d2, d0
ldr d0, [sp, 1856]
fmul d0, d2, d0
fadd d1, d1, d0
ldr d2, [sp, 4248]
ldr d0, [sp, 2640]
fsub d2, d2, d0
ldr d0, [sp, 1288]
fmul d0, d2, d0
fsub d0, d1, d0
ldr x0, [sp, 5600]
str d0, [x0]
ldr d1, [sp, 3808]
fmov d0, 1.0e+0
fsub d0, d1, d0
str d0, [sp, 4416]
ldr d0, [sp, 1832]
str d0, [sp, 4424]
ldr d1, [sp, 4384]
fmov d0, 1.0e+0
fsub d0, d1, d0
str d0, [sp, 4432]
ldr d0, [sp, 1856]
str d0, [sp, 4440]
ldr d0, [sp, 1288]
fneg d0, d0
str d0, [sp, 4480]
ldr d0, [sp, 1288]
str d0, [sp, 4488]
ldr d1, [sp, 4416]
ldr d0, [sp, 1848]
fmul d0, d1, d0
ldr x0, [sp, 5608]
str d0, [x0]
ldr d1, [sp, 4424]
ldr d0, [sp, 3824]
fmul d0, d1, d0
ldr x0, [sp, 5616]
str d0, [x0]
ldr x0, [sp, 5608]
ldr d1, [x0]
ldr d2, [sp, 4424]
ldr d0, [sp, 3832]
fmul d0, d2, d0
fadd d0, d1, d0
ldr x0, [sp, 5608]
str d0, [x0]
ldr x0, [sp, 5608]
ldr d1, [x0]
ldr d2, [sp, 4432]
ldr d0, [sp, 1872]
fmul d0, d2, d0
fadd d0, d1, d0
ldr x0, [sp, 5608]
str d0, [x0]
ldr x0, [sp, 5616]
ldr d1, [x0]
ldr d2, [sp, 4440]
ldr d0, [sp, 4400]
fmul d0, d2, d0
fadd d0, d1, d0
ldr x0, [sp, 5616]
str d0, [x0]
ldr x0, [sp, 5608]
ldr d1, [x0]
ldr d2, [sp, 4440]
ldr d0, [sp, 4408]
fmul d0, d2, d0
fadd d0, d1, d0
ldr x0, [sp, 5608]
str d0, [x0]
ldr x0, [sp, 5608]
ldr d1, [x0]
ldr d2, [sp, 4480]
ldr d0, [sp, 4272]
fmul d0, d2, d0
fadd d0, d1, d0
ldr x0, [sp, 5608]
str d0, [x0]
ldr x0, [sp, 5616]
ldr d1, [x0]
ldr d2, [sp, 4480]
ldr d0, [sp, 4472]
fmul d0, d2, d0
fadd d0, d1, d0
ldr x0, [sp, 5616]
str d0, [x0]
ldr x0, [sp, 5608]
ldr d1, [x0]
ldr d2, [sp, 4488]
ldr d0, [sp, 2656]
fmul d0, d2, d0
fadd d0, d1, d0
ldr x0, [sp, 5608]
str d0, [x0]
b .L79
.L183:
ldr d1, [sp, 3808]
fmov d0, 1.0e+0
fsub d1, d1, d0
ldr d0, [sp, 1832]
fmul d1, d1, d0
ldr d2, [sp, 4384]
fmov d0, 1.0e+0
fsub d2, d2, d0
ldr d0, [sp, 1856]
fmul d0, d2, d0
fadd d0, d1, d0
ldr x0, [sp, 5600]
str d0, [x0]
ldr d1, [sp, 3808]
fmov d0, 1.0e+0
fsub d0, d1, d0
str d0, [sp, 4416]
ldr d0, [sp, 1832]
str d0, [sp, 4424]
ldr d1, [sp, 4384]
fmov d0, 1.0e+0
fsub d0, d1, d0
str d0, [sp, 4432]
ldr d0, [sp, 1856]
str d0, [sp, 4440]
ldr d1, [sp, 4416]
ldr d0, [sp, 1848]
fmul d0, d1, d0
ldr x0, [sp, 5608]
str d0, [x0]
ldr d1, [sp, 4424]
ldr d0, [sp, 3824]
fmul d0, d1, d0
ldr x0, [sp, 5616]
str d0, [x0]
ldr x0, [sp, 5608]
ldr d1, [x0]
ldr d2, [sp, 4424]
ldr d0, [sp, 3832]
fmul d0, d2, d0
fadd d0, d1, d0
ldr x0, [sp, 5608]
str d0, [x0]
ldr x0, [sp, 5608]
ldr d1, [x0]
ldr d2, [sp, 4432]
ldr d0, [sp, 1872]
fmul d0, d2, d0
fadd d0, d1, d0
ldr x0, [sp, 5608]
str d0, [x0]
ldr x0, [sp, 5616]
ldr d1, [x0]
ldr d2, [sp, 4440]
ldr d0, [sp, 4400]
fmul d0, d2, d0
fadd d0, d1, d0
ldr x0, [sp, 5616]
str d0, [x0]
ldr x0, [sp, 5608]
ldr d1, [x0]
ldr d2, [sp, 4440]
ldr d0, [sp, 4408]
fmul d0, d2, d0
fadd d0, d1, d0
ldr x0, [sp, 5608]
str d0, [x0]
.L79:
ldr x0, [sp, 5624]
str xzr, [x0]
ldr x0, [sp, 5632]
str xzr, [x0]
ldr x0, [sp, 5640]
str xzr, [x0]
b .L80
.L76:
ldr d0, [sp, 784]
fcmp d0, #0.0
bne .L81
ldr x0, [sp, 5600]
str xzr, [x0]
ldr x0, [sp, 5608]
str xzr, [x0]
ldr x0, [sp, 5616]
str xzr, [x0]
ldr x0, [sp, 80]
ldr d1, [x0]
ldr d2, [sp, 792]
ldr d0, [sp, 1344]
fmul d0, d2, d0
fdiv d0, d1, d0
str d0, [sp, 3768]
ldr d1, [sp, 792]
ldr d0, [sp, 1344]
fmul d0, d1, d0
fmov d1, 1.0e+0
fdiv d0, d1, d0
str d0, [sp, 4496]
ldr x0, [sp, 80]
ldr d0, [x0]
fneg d1, d0
ldr d0, [sp, 1344]
fmul d2, d0, d0
ldr d0, [sp, 792]
fmul d0, d2, d0
fdiv d0, d1, d0
str d0, [sp, 3792]
ldr d1, [sp, 3792]
ldr d0, [sp, 1360]
fmul d0, d1, d0
str d0, [sp, 3800]
ldr d0, [sp, 3768]
bl exp
str d0, [sp, 3808]
ldr d0, [sp, 3808]
str d0, [sp, 3816]
ldr d1, [sp, 3816]
ldr d0, [sp, 4496]
fmul d0, d1, d0
str d0, [sp, 4504]
ldr d1, [sp, 3816]
ldr d0, [sp, 3800]
fmul d0, d1, d0
str d0, [sp, 3832]
ldr x0, [sp, 80]
ldr d1, [x0]
ldr d2, [sp, 808]
ldr d0, [sp, 1344]
fmul d0, d2, d0
fdiv d0, d1, d0
str d0, [sp, 4352]
ldr d1, [sp, 808]
ldr d0, [sp, 1344]
fmul d0, d1, d0
fmov d1, 1.0e+0
fdiv d0, d1, d0
str d0, [sp, 4512]
ldr x0, [sp, 80]
ldr d0, [x0]
fneg d1, d0
ldr d0, [sp, 1344]
fmul d2, d0, d0
ldr d0, [sp, 808]
fmul d0, d2, d0
fdiv d0, d1, d0
str d0, [sp, 4368]
ldr d1, [sp, 4368]
ldr d0, [sp, 1360]
fmul d0, d1, d0
str d0, [sp, 4376]
ldr d0, [sp, 4352]
bl exp
str d0, [sp, 4384]
ldr d0, [sp, 4384]
str d0, [sp, 4392]
ldr d1, [sp, 4392]
ldr d0, [sp, 4512]
fmul d0, d1, d0
str d0, [sp, 4520]
ldr d1, [sp, 4392]
ldr d0, [sp, 4376]
fmul d0, d1, d0
str d0, [sp, 4408]
ldr d0, [sp, 1272]
fcmpe d0, #0.0
bgt .L151
b .L184
.L151:
ldr d0, [sp, 2096]
fneg d1, d0
ldr x0, [sp, 80]
ldr d0, [x0]
fsub d1, d1, d0
ldr d2, [sp, 2120]
ldr d0, [sp, 1344]
fmul d0, d2, d0
fdiv d0, d1, d0
str d0, [sp, 4216]
ldr d1, [sp, 2120]
ldr d0, [sp, 1344]
fmul d0, d1, d0
fmov d1, -1.0e+0
fdiv d0, d1, d0
str d0, [sp, 4448]
ldr d1, [sp, 2120]
ldr d0, [sp, 1344]
fmul d0, d1, d0
fmov d1, -1.0e+0
fdiv d0, d1, d0
str d0, [sp, 4560]
ldr x0, [sp, 80]
ldr d0, [x0]
fneg d1, d0
ldr d0, [sp, 2096]
fsub d0, d1, d0
fneg d1, d0
ldr d0, [sp, 2120]
fmul d2, d0, d0
ldr d0, [sp, 1344]
fmul d0, d2, d0
fdiv d0, d1, d0
str d0, [sp, 4464]
ldr x0, [sp, 80]
ldr d0, [x0]
fneg d1, d0
ldr d0, [sp, 2096]
fsub d0, d1, d0
fneg d1, d0
ldr d0, [sp, 1344]
fmul d2, d0, d0
ldr d0, [sp, 2120]
fmul d0, d2, d0
fdiv d0, d1, d0
str d0, [sp, 4232]
ldr d1, [sp, 4448]
ldr d0, [sp, 2112]
fmul d0, d1, d0
str d0, [sp, 4240]
ldr d1, [sp, 4464]
ldr d0, [sp, 2136]
fmul d0, d1, d0
ldr d1, [sp, 4240]
fadd d0, d1, d0
str d0, [sp, 4240]
ldr d1, [sp, 4232]
ldr d0, [sp, 1360]
fmul d0, d1, d0
ldr d1, [sp, 4240]
fadd d0, d1, d0
str d0, [sp, 4240]
ldr d0, [sp, 4216]
bl exp
str d0, [sp, 4248]
ldr d0, [sp, 4248]
str d0, [sp, 4256]
ldr d1, [sp, 4256]
ldr d0, [sp, 4240]
fmul d0, d1, d0
str d0, [sp, 4272]
ldr d1, [sp, 4256]
ldr d0, [sp, 4560]
fmul d0, d1, d0
str d0, [sp, 4568]
ldr d1, [sp, 3808]
fmov d0, 1.0e+0
fsub d1, d1, d0
ldr d0, [sp, 1832]
fmul d1, d1, d0
ldr d2, [sp, 4384]
fmov d0, 1.0e+0
fsub d2, d2, d0
ldr d0, [sp, 1856]
fmul d0, d2, d0
fadd d1, d1, d0
ldr d2, [sp, 4248]
ldr d0, [sp, 2640]
fsub d2, d2, d0
ldr d0, [sp, 1288]
fmul d0, d2, d0
fsub d0, d1, d0
ldr x0, [sp, 5624]
str d0, [x0]
ldr d1, [sp, 3808]
fmov d0, 1.0e+0
fsub d0, d1, d0
str d0, [sp, 4528]
ldr d0, [sp, 1832]
str d0, [sp, 4536]
ldr d1, [sp, 4384]
fmov d0, 1.0e+0
fsub d0, d1, d0
str d0, [sp, 4544]
ldr d0, [sp, 1856]
str d0, [sp, 4552]
ldr d0, [sp, 1288]
fneg d0, d0
str d0, [sp, 4576]
ldr d0, [sp, 1288]
str d0, [sp, 4584]
ldr d1, [sp, 4528]
ldr d0, [sp, 1848]
fmul d0, d1, d0
ldr x0, [sp, 5632]
str d0, [x0]
ldr d1, [sp, 4536]
ldr d0, [sp, 4504]
fmul d0, d1, d0
ldr x0, [sp, 5640]
str d0, [x0]
ldr x0, [sp, 5632]
ldr d1, [x0]
ldr d2, [sp, 4536]
ldr d0, [sp, 3832]
fmul d0, d2, d0
fadd d0, d1, d0
ldr x0, [sp, 5632]
str d0, [x0]
ldr x0, [sp, 5632]
ldr d1, [x0]
ldr d2, [sp, 4544]
ldr d0, [sp, 1872]
fmul d0, d2, d0
fadd d0, d1, d0
ldr x0, [sp, 5632]
str d0, [x0]
ldr x0, [sp, 5640]
ldr d1, [x0]
ldr d2, [sp, 4552]
ldr d0, [sp, 4520]
fmul d0, d2, d0
fadd d0, d1, d0
ldr x0, [sp, 5640]
str d0, [x0]
ldr x0, [sp, 5632]
ldr d1, [x0]
ldr d2, [sp, 4552]
ldr d0, [sp, 4408]
fmul d0, d2, d0
fadd d0, d1, d0
ldr x0, [sp, 5632]
str d0, [x0]
ldr x0, [sp, 5632]
ldr d1, [x0]
ldr d2, [sp, 4576]
ldr d0, [sp, 4272]
fmul d0, d2, d0
fadd d0, d1, d0
ldr x0, [sp, 5632]
str d0, [x0]
ldr x0, [sp, 5640]
ldr d1, [x0]
ldr d2, [sp, 4576]
ldr d0, [sp, 4568]
fmul d0, d2, d0
fadd d0, d1, d0
ldr x0, [sp, 5640]
str d0, [x0]
ldr x0, [sp, 5632]
ldr d1, [x0]
ldr d2, [sp, 4584]
ldr d0, [sp, 2656]
fmul d0, d2, d0
fadd d0, d1, d0
ldr x0, [sp, 5632]
str d0, [x0]
b .L80
.L184:
ldr d1, [sp, 3808]
fmov d0, 1.0e+0
fsub d1, d1, d0
ldr d0, [sp, 1832]
fmul d1, d1, d0
ldr d2, [sp, 4384]
fmov d0, 1.0e+0
fsub d2, d2, d0
ldr d0, [sp, 1856]
fmul d0, d2, d0
fadd d0, d1, d0
ldr x0, [sp, 5624]
str d0, [x0]
ldr d1, [sp, 3808]
fmov d0, 1.0e+0
fsub d0, d1, d0
str d0, [sp, 4528]
ldr d0, [sp, 1832]
str d0, [sp, 4536]
ldr d1, [sp, 4384]
fmov d0, 1.0e+0
fsub d0, d1, d0
str d0, [sp, 4544]
ldr d0, [sp, 1856]
str d0, [sp, 4552]
ldr d1, [sp, 4528]
ldr d0, [sp, 1848]
fmul d0, d1, d0
ldr x0, [sp, 5632]
str d0, [x0]
ldr d1, [sp, 4536]
ldr d0, [sp, 4504]
fmul d0, d1, d0
ldr x0, [sp, 5640]
str d0, [x0]
ldr x0, [sp, 5632]
ldr d1, [x0]
ldr d2, [sp, 4536]
ldr d0, [sp, 3832]
fmul d0, d2, d0
fadd d0, d1, d0
ldr x0, [sp, 5632]
str d0, [x0]
ldr x0, [sp, 5632]
ldr d1, [x0]
ldr d2, [sp, 4544]
ldr d0, [sp, 1872]
fmul d0, d2, d0
fadd d0, d1, d0
ldr x0, [sp, 5632]
str d0, [x0]
ldr x0, [sp, 5640]
ldr d1, [x0]
ldr d2, [sp, 4552]
ldr d0, [sp, 4520]
fmul d0, d2, d0
fadd d0, d1, d0
ldr x0, [sp, 5640]
str d0, [x0]
ldr x0, [sp, 5632]
ldr d1, [x0]
ldr d2, [sp, 4552]
ldr d0, [sp, 4408]
fmul d0, d2, d0
fadd d0, d1, d0
ldr x0, [sp, 5632]
str d0, [x0]
b .L80
.L81:
ldr x0, [sp, 88]
ldr d1, [x0]
ldr d2, [sp, 792]
ldr d0, [sp, 1344]
fmul d0, d2, d0
fdiv d0, d1, d0
str d0, [sp, 3768]
ldr d1, [sp, 792]
ldr d0, [sp, 1344]
fmul d0, d1, d0
fmov d1, 1.0e+0
fdiv d0, d1, d0
str d0, [sp, 3776]
ldr x0, [sp, 88]
ldr d0, [x0]
fneg d1, d0
ldr d0, [sp, 1344]
fmul d2, d0, d0
ldr d0, [sp, 792]
fmul d0, d2, d0
fdiv d0, d1, d0
str d0, [sp, 3792]
ldr d1, [sp, 3792]
ldr d0, [sp, 1360]
fmul d0, d1, d0
str d0, [sp, 3800]
ldr d0, [sp, 3768]
bl exp
str d0, [sp, 3808]
ldr d0, [sp, 3808]
str d0, [sp, 3816]
ldr d1, [sp, 3816]
ldr d0, [sp, 3776]
fmul d0, d1, d0
str d0, [sp, 3824]
ldr d1, [sp, 3816]
ldr d0, [sp, 3800]
fmul d0, d1, d0
str d0, [sp, 3832]
ldr x0, [sp, 88]
ldr d1, [x0]
ldr d2, [sp, 808]
ldr d0, [sp, 1344]
fmul d0, d2, d0
fdiv d0, d1, d0
str d0, [sp, 4352]
ldr d1, [sp, 808]
ldr d0, [sp, 1344]
fmul d0, d1, d0
fmov d1, 1.0e+0
fdiv d0, d1, d0
str d0, [sp, 4360]
ldr x0, [sp, 88]
ldr d0, [x0]
fneg d1, d0
ldr d0, [sp, 1344]
fmul d2, d0, d0
ldr d0, [sp, 808]
fmul d0, d2, d0
fdiv d0, d1, d0
str d0, [sp, 4368]
ldr d1, [sp, 4368]
ldr d0, [sp, 1360]
fmul d0, d1, d0
str d0, [sp, 4376]
ldr d0, [sp, 4352]
bl exp
str d0, [sp, 4384]
ldr d0, [sp, 4384]
str d0, [sp, 4392]
ldr d1, [sp, 4392]
ldr d0, [sp, 4360]
fmul d0, d1, d0
str d0, [sp, 4400]
ldr d1, [sp, 4392]
ldr d0, [sp, 4376]
fmul d0, d1, d0
str d0, [sp, 4408]
ldr d0, [sp, 1272]
fcmpe d0, #0.0
bgt .L152
b .L185
.L152:
ldr d0, [sp, 2096]
fneg d1, d0
ldr x0, [sp, 88]
ldr d0, [x0]
fsub d1, d1, d0
ldr d2, [sp, 2120]
ldr d0, [sp, 1344]
fmul d0, d2, d0
fdiv d0, d1, d0
str d0, [sp, 4216]
ldr d1, [sp, 2120]
ldr d0, [sp, 1344]
fmul d0, d1, d0
fmov d1, -1.0e+0
fdiv d0, d1, d0
str d0, [sp, 4448]
ldr d1, [sp, 2120]
ldr d0, [sp, 1344]
fmul d0, d1, d0
fmov d1, -1.0e+0
fdiv d0, d1, d0
str d0, [sp, 4456]
ldr x0, [sp, 88]
ldr d0, [x0]
fneg d1, d0
ldr d0, [sp, 2096]
fsub d0, d1, d0
fneg d1, d0
ldr d0, [sp, 2120]
fmul d2, d0, d0
ldr d0, [sp, 1344]
fmul d0, d2, d0
fdiv d0, d1, d0
str d0, [sp, 4464]
ldr x0, [sp, 88]
ldr d0, [x0]
fneg d1, d0
ldr d0, [sp, 2096]
fsub d0, d1, d0
fneg d1, d0
ldr d0, [sp, 1344]
fmul d2, d0, d0
ldr d0, [sp, 2120]
fmul d0, d2, d0
fdiv d0, d1, d0
str d0, [sp, 4232]
ldr d1, [sp, 4448]
ldr d0, [sp, 2112]
fmul d0, d1, d0
str d0, [sp, 4240]
ldr d1, [sp, 4464]
ldr d0, [sp, 2136]
fmul d0, d1, d0
ldr d1, [sp, 4240]
fadd d0, d1, d0
str d0, [sp, 4240]
ldr d1, [sp, 4232]
ldr d0, [sp, 1360]
fmul d0, d1, d0
ldr d1, [sp, 4240]
fadd d0, d1, d0
str d0, [sp, 4240]
ldr d0, [sp, 4216]
bl exp
str d0, [sp, 4248]
ldr d0, [sp, 4248]
str d0, [sp, 4256]
ldr d1, [sp, 4256]
ldr d0, [sp, 4240]
fmul d0, d1, d0
str d0, [sp, 4272]
ldr d1, [sp, 4256]
ldr d0, [sp, 4456]
fmul d0, d1, d0
str d0, [sp, 4472]
ldr d1, [sp, 3808]
fmov d0, 1.0e+0
fsub d1, d1, d0
ldr d0, [sp, 1832]
fmul d1, d1, d0
ldr d2, [sp, 4384]
fmov d0, 1.0e+0
fsub d2, d2, d0
ldr d0, [sp, 1856]
fmul d0, d2, d0
fadd d1, d1, d0
ldr d2, [sp, 4248]
ldr d0, [sp, 2640]
fsub d2, d2, d0
ldr d0, [sp, 1288]
fmul d0, d2, d0
fsub d1, d1, d0
ldr d0, [sp, 784]
fmul d0, d1, d0
ldr x0, [sp, 5600]
str d0, [x0]
ldr d1, [sp, 3808]
fmov d0, 1.0e+0
fsub d0, d1, d0
ldr d1, [sp, 784]
fmul d0, d1, d0
str d0, [sp, 4416]
ldr d1, [sp, 1832]
ldr d0, [sp, 784]
fmul d0, d1, d0
str d0, [sp, 4424]
ldr d1, [sp, 4384]
fmov d0, 1.0e+0
fsub d0, d1, d0
ldr d1, [sp, 784]
fmul d0, d1, d0
str d0, [sp, 4432]
ldr d1, [sp, 1856]
ldr d0, [sp, 784]
fmul d0, d1, d0
str d0, [sp, 4440]
ldr d0, [sp, 1288]
fneg d0, d0
ldr d1, [sp, 784]
fmul d0, d1, d0
str d0, [sp, 4480]
ldr d1, [sp, 1288]
ldr d0, [sp, 784]
fmul d0, d1, d0
str d0, [sp, 4488]
ldr d1, [sp, 4416]
ldr d0, [sp, 1848]
fmul d0, d1, d0
ldr x0, [sp, 5608]
str d0, [x0]
ldr d1, [sp, 4424]
ldr d0, [sp, 3824]
fmul d0, d1, d0
ldr x0, [sp, 5616]
str d0, [x0]
ldr x0, [sp, 5608]
ldr d1, [x0]
ldr d2, [sp, 4424]
ldr d0, [sp, 3832]
fmul d0, d2, d0
fadd d0, d1, d0
ldr x0, [sp, 5608]
str d0, [x0]
ldr x0, [sp, 5608]
ldr d1, [x0]
ldr d2, [sp, 4432]
ldr d0, [sp, 1872]
fmul d0, d2, d0
fadd d0, d1, d0
ldr x0, [sp, 5608]
str d0, [x0]
ldr x0, [sp, 5616]
ldr d1, [x0]
ldr d2, [sp, 4440]
ldr d0, [sp, 4400]
fmul d0, d2, d0
fadd d0, d1, d0
ldr x0, [sp, 5616]
str d0, [x0]
ldr x0, [sp, 5608]
ldr d1, [x0]
ldr d2, [sp, 4440]
ldr d0, [sp, 4408]
fmul d0, d2, d0
fadd d0, d1, d0
ldr x0, [sp, 5608]
str d0, [x0]
ldr x0, [sp, 5608]
ldr d1, [x0]
ldr d2, [sp, 4480]
ldr d0, [sp, 4272]
fmul d0, d2, d0
fadd d0, d1, d0
ldr x0, [sp, 5608]
str d0, [x0]
ldr x0, [sp, 5616]
ldr d1, [x0]
ldr d2, [sp, 4480]
ldr d0, [sp, 4472]
fmul d0, d2, d0
fadd d0, d1, d0
ldr x0, [sp, 5616]
str d0, [x0]
ldr x0, [sp, 5608]
ldr d1, [x0]
ldr d2, [sp, 4488]
ldr d0, [sp, 2656]
fmul d0, d2, d0
fadd d0, d1, d0
ldr x0, [sp, 5608]
str d0, [x0]
b .L86
.L185:
ldr d1, [sp, 3808]
fmov d0, 1.0e+0
fsub d1, d1, d0
ldr d0, [sp, 1832]
fmul d1, d1, d0
ldr d2, [sp, 4384]
fmov d0, 1.0e+0
fsub d2, d2, d0
ldr d0, [sp, 1856]
fmul d0, d2, d0
fadd d1, d1, d0
ldr d0, [sp, 784]
fmul d0, d1, d0
ldr x0, [sp, 5600]
str d0, [x0]
ldr d1, [sp, 3808]
fmov d0, 1.0e+0
fsub d0, d1, d0
ldr d1, [sp, 784]
fmul d0, d1, d0
str d0, [sp, 4416]
ldr d1, [sp, 1832]
ldr d0, [sp, 784]
fmul d0, d1, d0
str d0, [sp, 4424]
ldr d1, [sp, 4384]
fmov d0, 1.0e+0
fsub d0, d1, d0
ldr d1, [sp, 784]
fmul d0, d1, d0
str d0, [sp, 4432]
ldr d1, [sp, 1856]
ldr d0, [sp, 784]
fmul d0, d1, d0
str d0, [sp, 4440]
ldr d1, [sp, 4416]
ldr d0, [sp, 1848]
fmul d0, d1, d0
ldr x0, [sp, 5608]
str d0, [x0]
ldr d1, [sp, 4424]
ldr d0, [sp, 3824]
fmul d0, d1, d0
ldr x0, [sp, 5616]
str d0, [x0]
ldr x0, [sp, 5608]
ldr d1, [x0]
ldr d2, [sp, 4424]
ldr d0, [sp, 3832]
fmul d0, d2, d0
fadd d0, d1, d0
ldr x0, [sp, 5608]
str d0, [x0]
ldr x0, [sp, 5608]
ldr d1, [x0]
ldr d2, [sp, 4432]
ldr d0, [sp, 1872]
fmul d0, d2, d0
fadd d0, d1, d0
ldr x0, [sp, 5608]
str d0, [x0]
ldr x0, [sp, 5616]
ldr d1, [x0]
ldr d2, [sp, 4440]
ldr d0, [sp, 4400]
fmul d0, d2, d0
fadd d0, d1, d0
ldr x0, [sp, 5616]
str d0, [x0]
ldr x0, [sp, 5608]
ldr d1, [x0]
ldr d2, [sp, 4440]
ldr d0, [sp, 4408]
fmul d0, d2, d0
fadd d0, d1, d0
ldr x0, [sp, 5608]
str d0, [x0]
.L86:
ldr x0, [sp, 80]
ldr d1, [x0]
ldr d2, [sp, 792]
ldr d0, [sp, 1344]
fmul d0, d2, d0
fdiv d0, d1, d0
str d0, [sp, 3768]
ldr d1, [sp, 792]
ldr d0, [sp, 1344]
fmul d0, d1, d0
fmov d1, 1.0e+0
fdiv d0, d1, d0
str d0, [sp, 4496]
ldr x0, [sp, 80]
ldr d0, [x0]
fneg d1, d0
ldr d0, [sp, 1344]
fmul d2, d0, d0
ldr d0, [sp, 792]
fmul d0, d2, d0
fdiv d0, d1, d0
str d0, [sp, 3792]
ldr d1, [sp, 3792]
ldr d0, [sp, 1360]
fmul d0, d1, d0
str d0, [sp, 3800]
ldr d0, [sp, 3768]
bl exp
str d0, [sp, 3808]
ldr d0, [sp, 3808]
str d0, [sp, 3816]
ldr d1, [sp, 3816]
ldr d0, [sp, 4496]
fmul d0, d1, d0
str d0, [sp, 4504]
ldr d1, [sp, 3816]
ldr d0, [sp, 3800]
fmul d0, d1, d0
str d0, [sp, 3832]
ldr x0, [sp, 80]
ldr d1, [x0]
ldr d2, [sp, 808]
ldr d0, [sp, 1344]
fmul d0, d2, d0
fdiv d0, d1, d0
str d0, [sp, 4352]
ldr d1, [sp, 808]
ldr d0, [sp, 1344]
fmul d0, d1, d0
fmov d1, 1.0e+0
fdiv d0, d1, d0
str d0, [sp, 4512]
ldr x0, [sp, 80]
ldr d0, [x0]
fneg d1, d0
ldr d0, [sp, 1344]
fmul d2, d0, d0
ldr d0, [sp, 808]
fmul d0, d2, d0
fdiv d0, d1, d0
str d0, [sp, 4368]
ldr d1, [sp, 4368]
ldr d0, [sp, 1360]
fmul d0, d1, d0
str d0, [sp, 4376]
ldr d0, [sp, 4352]
bl exp
str d0, [sp, 4384]
ldr d0, [sp, 4384]
str d0, [sp, 4392]
ldr d1, [sp, 4392]
ldr d0, [sp, 4512]
fmul d0, d1, d0
str d0, [sp, 4520]
ldr d1, [sp, 4392]
ldr d0, [sp, 4376]
fmul d0, d1, d0
str d0, [sp, 4408]
ldr d0, [sp, 1272]
fcmpe d0, #0.0
bgt .L153
b .L186
.L153:
ldr d0, [sp, 2096]
fneg d1, d0
ldr x0, [sp, 80]
ldr d0, [x0]
fsub d1, d1, d0
ldr d2, [sp, 2120]
ldr d0, [sp, 1344]
fmul d0, d2, d0
fdiv d0, d1, d0
str d0, [sp, 4216]
ldr d1, [sp, 2120]
ldr d0, [sp, 1344]
fmul d0, d1, d0
fmov d1, -1.0e+0
fdiv d0, d1, d0
str d0, [sp, 4448]
ldr d1, [sp, 2120]
ldr d0, [sp, 1344]
fmul d0, d1, d0
fmov d1, -1.0e+0
fdiv d0, d1, d0
str d0, [sp, 4560]
ldr x0, [sp, 80]
ldr d0, [x0]
fneg d1, d0
ldr d0, [sp, 2096]
fsub d0, d1, d0
fneg d1, d0
ldr d0, [sp, 2120]
fmul d2, d0, d0
ldr d0, [sp, 1344]
fmul d0, d2, d0
fdiv d0, d1, d0
str d0, [sp, 4464]
ldr x0, [sp, 80]
ldr d0, [x0]
fneg d1, d0
ldr d0, [sp, 2096]
fsub d0, d1, d0
fneg d1, d0
ldr d0, [sp, 1344]
fmul d2, d0, d0
ldr d0, [sp, 2120]
fmul d0, d2, d0
fdiv d0, d1, d0
str d0, [sp, 4232]
ldr d1, [sp, 4448]
ldr d0, [sp, 2112]
fmul d0, d1, d0
str d0, [sp, 4240]
ldr d1, [sp, 4464]
ldr d0, [sp, 2136]
fmul d0, d1, d0
ldr d1, [sp, 4240]
fadd d0, d1, d0
str d0, [sp, 4240]
ldr d1, [sp, 4232]
ldr d0, [sp, 1360]
fmul d0, d1, d0
ldr d1, [sp, 4240]
fadd d0, d1, d0
str d0, [sp, 4240]
ldr d0, [sp, 4216]
bl exp
str d0, [sp, 4248]
ldr d0, [sp, 4248]
str d0, [sp, 4256]
ldr d1, [sp, 4256]
ldr d0, [sp, 4240]
fmul d0, d1, d0
str d0, [sp, 4272]
ldr d1, [sp, 4256]
ldr d0, [sp, 4560]
fmul d0, d1, d0
str d0, [sp, 4568]
fmov d1, 1.0e+0
ldr d0, [sp, 784]
fsub d1, d1, d0
ldr d2, [sp, 3808]
fmov d0, 1.0e+0
fsub d2, d2, d0
ldr d0, [sp, 1832]
fmul d2, d2, d0
ldr d3, [sp, 4384]
fmov d0, 1.0e+0
fsub d3, d3, d0
ldr d0, [sp, 1856]
fmul d0, d3, d0
fadd d2, d2, d0
ldr d3, [sp, 4248]
ldr d0, [sp, 2640]
fsub d3, d3, d0
ldr d0, [sp, 1288]
fmul d0, d3, d0
fsub d0, d2, d0
fmul d0, d1, d0
ldr x0, [sp, 5624]
str d0, [x0]
ldr d1, [sp, 3808]
fmov d0, 1.0e+0
fsub d1, d1, d0
fmov d2, 1.0e+0
ldr d0, [sp, 784]
fsub d0, d2, d0
fmul d0, d1, d0
str d0, [sp, 4528]
fmov d1, 1.0e+0
ldr d0, [sp, 784]
fsub d0, d1, d0
ldr d1, [sp, 1832]
fmul d0, d1, d0
str d0, [sp, 4536]
ldr d1, [sp, 4384]
fmov d0, 1.0e+0
fsub d1, d1, d0
fmov d2, 1.0e+0
ldr d0, [sp, 784]
fsub d0, d2, d0
fmul d0, d1, d0
str d0, [sp, 4544]
fmov d1, 1.0e+0
ldr d0, [sp, 784]
fsub d0, d1, d0
ldr d1, [sp, 1856]
fmul d0, d1, d0
str d0, [sp, 4552]
ldr d0, [sp, 1288]
fneg d1, d0
fmov d2, 1.0e+0
ldr d0, [sp, 784]
fsub d0, d2, d0
fmul d0, d1, d0
str d0, [sp, 4576]
fmov d1, 1.0e+0
ldr d0, [sp, 784]
fsub d0, d1, d0
ldr d1, [sp, 1288]
fmul d0, d1, d0
str d0, [sp, 4584]
ldr d1, [sp, 4528]
ldr d0, [sp, 1848]
fmul d0, d1, d0
ldr x0, [sp, 5632]
str d0, [x0]
ldr d1, [sp, 4536]
ldr d0, [sp, 4504]
fmul d0, d1, d0
ldr x0, [sp, 5640]
str d0, [x0]
ldr x0, [sp, 5632]
ldr d1, [x0]
ldr d2, [sp, 4536]
ldr d0, [sp, 3832]
fmul d0, d2, d0
fadd d0, d1, d0
ldr x0, [sp, 5632]
str d0, [x0]
ldr x0, [sp, 5632]
ldr d1, [x0]
ldr d2, [sp, 4544]
ldr d0, [sp, 1872]
fmul d0, d2, d0
fadd d0, d1, d0
ldr x0, [sp, 5632]
str d0, [x0]
ldr x0, [sp, 5640]
ldr d1, [x0]
ldr d2, [sp, 4552]
ldr d0, [sp, 4520]
fmul d0, d2, d0
fadd d0, d1, d0
ldr x0, [sp, 5640]
str d0, [x0]
ldr x0, [sp, 5632]
ldr d1, [x0]
ldr d2, [sp, 4552]
ldr d0, [sp, 4408]
fmul d0, d2, d0
fadd d0, d1, d0
ldr x0, [sp, 5632]
str d0, [x0]
ldr x0, [sp, 5632]
ldr d1, [x0]
ldr d2, [sp, 4576]
ldr d0, [sp, 4272]
fmul d0, d2, d0
fadd d0, d1, d0
ldr x0, [sp, 5632]
str d0, [x0]
ldr x0, [sp, 5640]
ldr d1, [x0]
ldr d2, [sp, 4576]
ldr d0, [sp, 4568]
fmul d0, d2, d0
fadd d0, d1, d0
ldr x0, [sp, 5640]
str d0, [x0]
ldr x0, [sp, 5632]
ldr d1, [x0]
ldr d2, [sp, 4584]
ldr d0, [sp, 2656]
fmul d0, d2, d0
fadd d0, d1, d0
ldr x0, [sp, 5632]
str d0, [x0]
b .L80
.L186:
fmov d1, 1.0e+0
ldr d0, [sp, 784]
fsub d1, d1, d0
ldr d2, [sp, 3808]
fmov d0, 1.0e+0
fsub d2, d2, d0
ldr d0, [sp, 1832]
fmul d2, d2, d0
ldr d3, [sp, 4384]
fmov d0, 1.0e+0
fsub d3, d3, d0
ldr d0, [sp, 1856]
fmul d0, d3, d0
fadd d0, d2, d0
fmul d0, d1, d0
ldr x0, [sp, 5624]
str d0, [x0]
ldr d1, [sp, 3808]
fmov d0, 1.0e+0
fsub d1, d1, d0
fmov d2, 1.0e+0
ldr d0, [sp, 784]
fsub d0, d2, d0
fmul d0, d1, d0
str d0, [sp, 4528]
fmov d1, 1.0e+0
ldr d0, [sp, 784]
fsub d0, d1, d0
ldr d1, [sp, 1832]
fmul d0, d1, d0
str d0, [sp, 4536]
ldr d1, [sp, 4384]
fmov d0, 1.0e+0
fsub d1, d1, d0
fmov d2, 1.0e+0
ldr d0, [sp, 784]
fsub d0, d2, d0
fmul d0, d1, d0
str d0, [sp, 4544]
fmov d1, 1.0e+0
ldr d0, [sp, 784]
fsub d0, d1, d0
ldr d1, [sp, 1856]
fmul d0, d1, d0
str d0, [sp, 4552]
ldr d1, [sp, 4528]
ldr d0, [sp, 1848]
fmul d0, d1, d0
ldr x0, [sp, 5632]
str d0, [x0]
ldr d1, [sp, 4536]
ldr d0, [sp, 4504]
fmul d0, d1, d0
ldr x0, [sp, 5640]
str d0, [x0]
ldr x0, [sp, 5632]
ldr d1, [x0]
ldr d2, [sp, 4536]
ldr d0, [sp, 3832]
fmul d0, d2, d0
fadd d0, d1, d0
ldr x0, [sp, 5632]
str d0, [x0]
ldr x0, [sp, 5632]
ldr d1, [x0]
ldr d2, [sp, 4544]
ldr d0, [sp, 1872]
fmul d0, d2, d0
fadd d0, d1, d0
ldr x0, [sp, 5632]
str d0, [x0]
ldr x0, [sp, 5640]
ldr d1, [x0]
ldr d2, [sp, 4552]
ldr d0, [sp, 4520]
fmul d0, d2, d0
fadd d0, d1, d0
ldr x0, [sp, 5640]
str d0, [x0]
ldr x0, [sp, 5632]
ldr d1, [x0]
ldr d2, [sp, 4552]
ldr d0, [sp, 4408]
fmul d0, d2, d0
fadd d0, d1, d0
ldr x0, [sp, 5632]
str d0, [x0]
.L80:
ldr x0, [sp, 72]
ldr d1, [x0]
ldr d2, [sp, 824]
ldr d0, [sp, 1344]
fmul d0, d2, d0
fdiv d0, d1, d0
str d0, [sp, 3768]
ldr d1, [sp, 824]
ldr d0, [sp, 1344]
fmul d0, d1, d0
fmov d1, 1.0e+0
fdiv d0, d1, d0
str d0, [sp, 3880]
ldr x0, [sp, 72]
ldr d0, [x0]
fneg d1, d0
ldr d0, [sp, 1344]
fmul d2, d0, d0
ldr d0, [sp, 824]
fmul d0, d2, d0
fdiv d0, d1, d0
str d0, [sp, 3792]
ldr d1, [sp, 3792]
ldr d0, [sp, 1360]
fmul d0, d1, d0
str d0, [sp, 3800]
ldr d0, [sp, 3768]
bl exp
str d0, [sp, 3808]
ldr d0, [sp, 3808]
str d0, [sp, 3816]
ldr d1, [sp, 3816]
ldr d0, [sp, 3880]
fmul d0, d1, d0
str d0, [sp, 3896]
ldr d1, [sp, 3816]
ldr d0, [sp, 3800]
fmul d0, d1, d0
str d0, [sp, 3832]
ldr x0, [sp, 72]
ldr d1, [x0]
ldr d2, [sp, 840]
ldr d0, [sp, 1344]
fmul d0, d2, d0
fdiv d0, d1, d0
str d0, [sp, 4352]
ldr d1, [sp, 840]
ldr d0, [sp, 1344]
fmul d0, d1, d0
fmov d1, 1.0e+0
fdiv d0, d1, d0
str d0, [sp, 4592]
ldr x0, [sp, 72]
ldr d0, [x0]
fneg d1, d0
ldr d0, [sp, 1344]
fmul d2, d0, d0
ldr d0, [sp, 840]
fmul d0, d2, d0
fdiv d0, d1, d0
str d0, [sp, 4368]
ldr d1, [sp, 4368]
ldr d0, [sp, 1360]
fmul d0, d1, d0
str d0, [sp, 4376]
ldr d0, [sp, 4352]
bl exp
str d0, [sp, 4384]
ldr d0, [sp, 4384]
str d0, [sp, 4392]
ldr d1, [sp, 4392]
ldr d0, [sp, 4592]
fmul d0, d1, d0
str d0, [sp, 4600]
ldr d1, [sp, 4392]
ldr d0, [sp, 4376]
fmul d0, d1, d0
str d0, [sp, 4408]
ldr d1, [sp, 3808]
fmov d0, 1.0e+0
fsub d1, d1, d0
ldr d0, [sp, 1880]
fmul d1, d1, d0
ldr d2, [sp, 4384]
fmov d0, 1.0e+0
fsub d2, d2, d0
ldr d0, [sp, 1904]
fmul d0, d2, d0
fadd d0, d1, d0
str d0, [sp, 4608]
ldr d1, [sp, 3808]
fmov d0, 1.0e+0
fsub d0, d1, d0
str d0, [sp, 4616]
ldr d0, [sp, 1880]
str d0, [sp, 4624]
ldr d1, [sp, 4384]
fmov d0, 1.0e+0
fsub d0, d1, d0
str d0, [sp, 4632]
ldr d0, [sp, 1904]
str d0, [sp, 4640]
ldr d1, [sp, 4616]
ldr d0, [sp, 1896]
fmul d0, d1, d0
str d0, [sp, 4648]
ldr d1, [sp, 4624]
ldr d0, [sp, 3896]
fmul d0, d1, d0
str d0, [sp, 4656]
ldr d1, [sp, 4624]
ldr d0, [sp, 3832]
fmul d0, d1, d0
ldr d1, [sp, 4648]
fadd d0, d1, d0
str d0, [sp, 4648]
ldr d1, [sp, 4632]
ldr d0, [sp, 1920]
fmul d0, d1, d0
ldr d1, [sp, 4648]
fadd d0, d1, d0
str d0, [sp, 4648]
ldr d1, [sp, 4640]
ldr d0, [sp, 4600]
fmul d0, d1, d0
ldr d1, [sp, 4656]
fadd d0, d1, d0
str d0, [sp, 4656]
ldr d1, [sp, 4640]
ldr d0, [sp, 4408]
fmul d0, d1, d0
ldr d1, [sp, 4648]
fadd d0, d1, d0
str d0, [sp, 4648]
ldr d0, [sp, 888]
fcmpe d0, #0.0
bgt .L89
ldr d0, [sp, 896]
fcmpe d0, #0.0
bgt .L89
b .L187
.L89:
ldr x0, [sp, 64]
ldr d1, [x0]
ldr d2, [sp, 824]
ldr d0, [sp, 1344]
fmul d0, d2, d0
fdiv d0, d1, d0
str d0, [sp, 3768]
ldr d1, [sp, 824]
ldr d0, [sp, 1344]
fmul d0, d1, d0
fmov d1, 1.0e+0
fdiv d0, d1, d0
str d0, [sp, 4200]
ldr x0, [sp, 64]
ldr d0, [x0]
fneg d1, d0
ldr d0, [sp, 1344]
fmul d2, d0, d0
ldr d0, [sp, 824]
fmul d0, d2, d0
fdiv d0, d1, d0
str d0, [sp, 3792]
ldr d1, [sp, 3792]
ldr d0, [sp, 1360]
fmul d0, d1, d0
str d0, [sp, 3800]
ldr d0, [sp, 3768]
bl exp
str d0, [sp, 3808]
ldr d0, [sp, 3808]
str d0, [sp, 3816]
ldr d1, [sp, 3816]
ldr d0, [sp, 4200]
fmul d0, d1, d0
str d0, [sp, 4208]
ldr d1, [sp, 3816]
ldr d0, [sp, 3800]
fmul d0, d1, d0
str d0, [sp, 3832]
ldr x0, [sp, 64]
ldr d1, [x0]
ldr d2, [sp, 840]
ldr d0, [sp, 1344]
fmul d0, d2, d0
fdiv d0, d1, d0
str d0, [sp, 4352]
ldr d1, [sp, 840]
ldr d0, [sp, 1344]
fmul d0, d1, d0
fmov d1, 1.0e+0
fdiv d0, d1, d0
str d0, [sp, 4664]
ldr x0, [sp, 64]
ldr d0, [x0]
fneg d1, d0
ldr d0, [sp, 1344]
fmul d2, d0, d0
ldr d0, [sp, 840]
fmul d0, d2, d0
fdiv d0, d1, d0
str d0, [sp, 4368]
ldr d1, [sp, 4368]
ldr d0, [sp, 1360]
fmul d0, d1, d0
str d0, [sp, 4376]
ldr d0, [sp, 4352]
bl exp
str d0, [sp, 4384]
ldr d0, [sp, 4384]
str d0, [sp, 4392]
ldr d1, [sp, 4392]
ldr d0, [sp, 4664]
fmul d0, d1, d0
str d0, [sp, 4672]
ldr d1, [sp, 4392]
ldr d0, [sp, 4376]
fmul d0, d1, d0
str d0, [sp, 4408]
ldr d1, [sp, 3808]
fmov d0, 1.0e+0
fsub d1, d1, d0
ldr d0, [sp, 1928]
fmul d1, d1, d0
ldr d2, [sp, 4384]
fmov d0, 1.0e+0
fsub d2, d2, d0
ldr d0, [sp, 1952]
fmul d0, d2, d0
fadd d0, d1, d0
ldr x0, [sp, 5744]
str d0, [x0]
ldr d1, [sp, 3808]
fmov d0, 1.0e+0
fsub d0, d1, d0
str d0, [sp, 4680]
ldr d0, [sp, 1928]
str d0, [sp, 4688]
ldr d1, [sp, 4384]
fmov d0, 1.0e+0
fsub d0, d1, d0
str d0, [sp, 4696]
ldr d0, [sp, 1952]
str d0, [sp, 4704]
ldr d1, [sp, 4680]
ldr d0, [sp, 1944]
fmul d0, d1, d0
ldr x0, [sp, 5752]
str d0, [x0]
ldr d1, [sp, 4688]
ldr d0, [sp, 4208]
fmul d0, d1, d0
ldr x0, [sp, 5760]
str d0, [x0]
ldr x0, [sp, 5752]
ldr d1, [x0]
ldr d2, [sp, 4688]
ldr d0, [sp, 3832]
fmul d0, d2, d0
fadd d0, d1, d0
ldr x0, [sp, 5752]
str d0, [x0]
ldr x0, [sp, 5752]
ldr d1, [x0]
ldr d2, [sp, 4696]
ldr d0, [sp, 1968]
fmul d0, d2, d0
fadd d0, d1, d0
ldr x0, [sp, 5752]
str d0, [x0]
ldr x0, [sp, 5760]
ldr d1, [x0]
ldr d2, [sp, 4704]
ldr d0, [sp, 4672]
fmul d0, d2, d0
fadd d0, d1, d0
ldr x0, [sp, 5760]
str d0, [x0]
ldr x0, [sp, 5752]
ldr d1, [x0]
ldr d2, [sp, 4704]
ldr d0, [sp, 4408]
fmul d0, d2, d0
fadd d0, d1, d0
ldr x0, [sp, 5752]
str d0, [x0]
b .L92
.L187:
ldr x0, [sp, 5744]
str xzr, [x0]
ldr x0, [sp, 5752]
str xzr, [x0]
ldr x0, [sp, 5760]
str xzr, [x0]
.L92:
ldr d0, [sp, 848]
fcmpe d0, #0.0
bgt .L154
b .L188
.L154:
ldr x0, [sp, 72]
ldr d0, [x0]
ldr d1, [sp, 2352]
fsub d1, d1, d0
ldr x0, [sp, 72]
ldr d0, [x0]
ldr d2, [sp, 2352]
fsub d0, d2, d0
fmul d0, d1, d0
adrp x0, .LC6
ldr d1, [x0, #:lo12:.LC6]
fadd d0, d0, d1
bl sqrt
fmov d2, d0
ldr x0, [sp, 72]
ldr d0, [x0]
ldr d1, [sp, 2352]
fsub d0, d1, d0
fadd d1, d2, d0
fmov d0, 5.0e-1
fmul d0, d1, d0
str d0, [sp, 2872]
ldr x0, [sp, 72]
ldr d0, [x0]
ldr d1, [sp, 2352]
fsub d8, d1, d0
ldr x0, [sp, 72]
ldr d0, [x0]
ldr d1, [sp, 2352]
fsub d1, d1, d0
ldr x0, [sp, 72]
ldr d0, [x0]
ldr d2, [sp, 2352]
fsub d0, d2, d0
fmul d0, d1, d0
adrp x0, .LC6
ldr d1, [x0, #:lo12:.LC6]
fadd d0, d0, d1
bl sqrt
fdiv d1, d8, d0
fmov d0, 1.0e+0
fadd d1, d1, d0
fmov d0, 5.0e-1
fmul d0, d1, d0
str d0, [sp, 4712]
ldr x0, [sp, 72]
ldr d0, [x0]
ldr d1, [sp, 2352]
fsub d0, d1, d0
fneg d8, d0
ldr x0, [sp, 72]
ldr d0, [x0]
ldr d1, [sp, 2352]
fsub d1, d1, d0
ldr x0, [sp, 72]
ldr d0, [x0]
ldr d2, [sp, 2352]
fsub d0, d2, d0
fmul d0, d1, d0
adrp x0, .LC6
ldr d1, [x0, #:lo12:.LC6]
fadd d0, d0, d1
bl sqrt
fdiv d1, d8, d0
fmov d0, 1.0e+0
fsub d1, d1, d0
fmov d0, 5.0e-1
fmul d0, d1, d0
str d0, [sp, 3312]
ldr d1, [sp, 4712]
ldr d0, [sp, 2384]
fmul d0, d1, d0
str d0, [sp, 2912]
ldr d1, [sp, 736]
fmov d0, 1.0e+0
fsub d0, d1, d0
str d0, [sp, 1632]
ldr d1, [sp, 1632]
ldr d0, [sp, 2872]
bl pow
str d0, [sp, 1656]
ldr d1, [sp, 1656]
ldr d0, [sp, 1632]
fmul d1, d1, d0
ldr d0, [sp, 2872]
fdiv d0, d1, d0
str d0, [sp, 4720]
ldr d1, [sp, 4720]
ldr d0, [sp, 2912]
fmul d0, d1, d0
str d0, [sp, 1680]
ldr d1, [sp, 4720]
ldr d0, [sp, 3312]
fmul d0, d1, d0
str d0, [sp, 3328]
ldr d0, [sp, 2072]
fneg d0, d0
ldr d1, [sp, 1656]
fmul d0, d1, d0
str d0, [sp, 1416]
ldr d0, [sp, 1656]
fneg d0, d0
str d0, [sp, 4728]
ldr d0, [sp, 2072]
fneg d0, d0
str d0, [sp, 2192]
ldr d1, [sp, 4728]
ldr d0, [sp, 2088]
fmul d0, d1, d0
str d0, [sp, 1432]
ldr d1, [sp, 2192]
ldr d0, [sp, 1680]
fmul d0, d1, d0
ldr d1, [sp, 1432]
fadd d0, d1, d0
str d0, [sp, 1432]
ldr d1, [sp, 2192]
ldr d0, [sp, 3328]
fmul d0, d1, d0
str d0, [sp, 3320]
ldr d0, [sp, 1416]
bl exp
str d0, [sp, 1688]
ldr d0, [sp, 1688]
str d0, [sp, 2304]
ldr d1, [sp, 2304]
ldr d0, [sp, 1432]
fmul d0, d1, d0
str d0, [sp, 1704]
ldr d1, [sp, 2304]
ldr d0, [sp, 3320]
fmul d0, d1, d0
str d0, [sp, 4152]
ldr d1, [sp, 848]
ldr d0, [sp, 2872]
fmul d0, d1, d0
ldr d1, [sp, 1688]
fmul d0, d1, d0
str d0, [sp, 4736]
ldr d1, [sp, 848]
ldr d0, [sp, 1688]
fmul d0, d1, d0
str d0, [sp, 4744]
ldr d1, [sp, 848]
ldr d0, [sp, 2872]
fmul d0, d1, d0
str d0, [sp, 4752]
ldr d1, [sp, 4744]
ldr d0, [sp, 2912]
fmul d0, d1, d0
str d0, [sp, 4760]
ldr d1, [sp, 4744]
ldr d0, [sp, 3312]
fmul d0, d1, d0
str d0, [sp, 4768]
ldr d1, [sp, 4752]
ldr d0, [sp, 1704]
fmul d0, d1, d0
ldr d1, [sp, 4760]
fadd d0, d1, d0
str d0, [sp, 4760]
ldr d1, [sp, 4752]
ldr d0, [sp, 4152]
fmul d0, d1, d0
ldr d1, [sp, 4768]
fadd d0, d1, d0
str d0, [sp, 4768]
ldr x0, [sp, 5648]
ldr d1, [x0]
ldr x0, [sp, 5680]
ldr d0, [x0]
fsub d1, d1, d0
ldr d0, [sp, 4608]
fsub d0, d1, d0
ldr d1, [sp, 4736]
fmul d0, d1, d0
str d0, [sp, 496]
ldr d0, [sp, 4736]
str d0, [sp, 4776]
ldr d0, [sp, 4736]
fneg d0, d0
str d0, [sp, 4784]
ldr d0, [sp, 4736]
fneg d0, d0
str d0, [sp, 4792]
ldr x0, [sp, 5648]
ldr d1, [x0]
ldr x0, [sp, 5680]
ldr d0, [x0]
fsub d1, d1, d0
ldr d0, [sp, 4608]
fsub d0, d1, d0
str d0, [sp, 4800]
ldr x0, [sp, 5656]
ldr d0, [x0]
ldr d1, [sp, 4776]
fmul d0, d1, d0
str d0, [sp, 504]
ldr x0, [sp, 5664]
ldr d0, [x0]
ldr d1, [sp, 4776]
fmul d0, d1, d0
str d0, [sp, 512]
ldr x0, [sp, 5672]
ldr d0, [x0]
ldr d1, [sp, 4776]
fmul d0, d1, d0
str d0, [sp, 520]
ldr x0, [sp, 5688]
ldr d1, [x0]
ldr d0, [sp, 4784]
fmul d0, d1, d0
ldr d1, [sp, 504]
fadd d0, d1, d0
str d0, [sp, 504]
ldr x0, [sp, 5696]
ldr d1, [x0]
ldr d0, [sp, 4784]
fmul d0, d1, d0
ldr d1, [sp, 520]
fadd d0, d1, d0
str d0, [sp, 520]
ldr x0, [sp, 5704]
ldr d1, [x0]
ldr d0, [sp, 4784]
fmul d0, d1, d0
ldr d1, [sp, 512]
fadd d0, d1, d0
str d0, [sp, 512]
ldr d1, [sp, 4792]
ldr d0, [sp, 4648]
fmul d0, d1, d0
ldr d1, [sp, 504]
fadd d0, d1, d0
str d0, [sp, 504]
ldr d1, [sp, 4792]
ldr d0, [sp, 4656]
fmul d0, d1, d0
ldr d1, [sp, 520]
fadd d0, d1, d0
str d0, [sp, 520]
ldr d1, [sp, 4800]
ldr d0, [sp, 4760]
fmul d0, d1, d0
ldr d1, [sp, 504]
fadd d0, d1, d0
str d0, [sp, 504]
ldr d1, [sp, 4800]
ldr d0, [sp, 4768]
fmul d0, d1, d0
ldr d1, [sp, 520]
fadd d0, d1, d0
str d0, [sp, 520]
b .L95
.L188:
str xzr, [sp, 496]
str xzr, [sp, 504]
str xzr, [sp, 512]
str xzr, [sp, 520]
.L95:
ldr d1, [sp, 4608]
ldr d0, [sp, 496]
fsub d0, d1, d0
ldr x0, [sp, 5712]
str d0, [x0]
fmov d0, 1.0e+0
str d0, [sp, 4808]
fmov d0, -1.0e+0
str d0, [sp, 4816]
ldr d1, [sp, 4808]
ldr d0, [sp, 4648]
fmul d0, d1, d0
ldr x0, [sp, 5720]
str d0, [x0]
ldr d1, [sp, 4808]
ldr d0, [sp, 4656]
fmul d0, d1, d0
ldr x0, [sp, 5728]
str d0, [x0]
ldr x0, [sp, 5720]
ldr d1, [x0]
ldr d2, [sp, 4816]
ldr d0, [sp, 504]
fmul d0, d2, d0
fadd d0, d1, d0
ldr x0, [sp, 5720]
str d0, [x0]
ldr d1, [sp, 4816]
ldr d0, [sp, 512]
fmul d0, d1, d0
ldr x0, [sp, 5736]
str d0, [x0]
ldr x0, [sp, 5728]
ldr d1, [x0]
ldr d2, [sp, 4816]
ldr d0, [sp, 520]
fmul d0, d2, d0
fadd d0, d1, d0
ldr x0, [sp, 5728]
str d0, [x0]
ldr d0, [sp, 544]
fcmpe d0, #0.0
bgt .L155
b .L189
.L155:
ldr x0, [sp, 56]
ldr d1, [x0]
ldr d0, [sp, 1464]
fdiv d0, d1, d0
ldr x0, [sp, 5768]
str d0, [x0]
ldr d0, [sp, 1464]
fmov d1, 1.0e+0
fdiv d0, d1, d0
ldr x0, [sp, 5776]
str d0, [x0]
ldr x0, [sp, 56]
ldr d0, [x0]
fneg d1, d0
ldr d0, [sp, 1464]
fmul d0, d0, d0
fdiv d0, d1, d0
str d0, [sp, 4824]
ldr d1, [sp, 4824]
ldr d0, [sp, 1480]
fmul d0, d1, d0
ldr x0, [sp, 5784]
str d0, [x0]
b .L98
.L189:
ldr x0, [sp, 5768]
str xzr, [x0]
ldr x0, [sp, 5776]
str xzr, [x0]
ldr x0, [sp, 5784]
str xzr, [x0]
.L98:
ldr x0, [sp, 72]
ldr d1, [x0]
ldr d0, [sp, 1344]
fdiv d0, d1, d0
str d0, [sp, 3768]
ldr d0, [sp, 1344]
fmov d1, 1.0e+0
fdiv d0, d1, d0
str d0, [sp, 3880]
ldr x0, [sp, 72]
ldr d0, [x0]
fneg d1, d0
ldr d0, [sp, 1344]
fmul d0, d0, d0
fdiv d0, d1, d0
str d0, [sp, 3792]
ldr d1, [sp, 3792]
ldr d0, [sp, 1360]
fmul d0, d1, d0
str d0, [sp, 3800]
ldr d0, [sp, 3768]
bl exp
str d0, [sp, 3808]
ldr d0, [sp, 3808]
str d0, [sp, 3816]
ldr d1, [sp, 3816]
ldr d0, [sp, 3880]
fmul d0, d1, d0
str d0, [sp, 3896]
ldr d1, [sp, 3816]
ldr d0, [sp, 3800]
fmul d0, d1, d0
str d0, [sp, 3832]
ldr x0, [sp, 48]
ldr d1, [x0]
ldr d0, [sp, 1344]
fdiv d0, d1, d0
str d0, [sp, 4216]
ldr d0, [sp, 1344]
fmov d1, 1.0e+0
fdiv d0, d1, d0
str d0, [sp, 4832]
ldr x0, [sp, 48]
ldr d0, [x0]
fneg d1, d0
ldr d0, [sp, 1344]
fmul d0, d0, d0
fdiv d0, d1, d0
str d0, [sp, 4232]
ldr d1, [sp, 4232]
ldr d0, [sp, 1360]
fmul d0, d1, d0
str d0, [sp, 4240]
ldr d0, [sp, 4216]
bl exp
str d0, [sp, 4248]
ldr d0, [sp, 4248]
str d0, [sp, 4256]
ldr d1, [sp, 4256]
ldr d0, [sp, 4832]
fmul d0, d1, d0
str d0, [sp, 4840]
ldr d1, [sp, 4256]
ldr d0, [sp, 4240]
fmul d0, d1, d0
str d0, [sp, 4272]
ldr d1, [sp, 2560]
ldr d0, [sp, 3808]
fmul d1, d1, d0
fmov d0, 1.0e+0
fadd d0, d1, d0
bl sqrt
str d0, [sp, 4848]
ldr d1, [sp, 3808]
ldr d0, [sp, 2560]
fmul d1, d1, d0
fmov d0, 1.0e+0
fadd d0, d1, d0
bl sqrt
fadd d0, d0, d0
ldr d1, [sp, 3808]
fdiv d0, d1, d0
str d0, [sp, 4856]
ldr d1, [sp, 3808]
ldr d0, [sp, 2560]
fmul d1, d1, d0
fmov d0, 1.0e+0
fadd d0, d1, d0
bl sqrt
fadd d0, d0, d0
ldr d1, [sp, 2560]
fdiv d0, d1, d0
str d0, [sp, 4864]
ldr d1, [sp, 4856]
ldr d0, [sp, 2584]
fmul d0, d1, d0
str d0, [sp, 4872]
ldr d1, [sp, 4864]
ldr d0, [sp, 3896]
fmul d0, d1, d0
str d0, [sp, 4880]
ldr d1, [sp, 4864]
ldr d0, [sp, 3832]
fmul d0, d1, d0
ldr d1, [sp, 4872]
fadd d0, d1, d0
str d0, [sp, 4872]
ldr d1, [sp, 2560]
ldr d0, [sp, 4248]
fmul d1, d1, d0
fmov d0, 1.0e+0
fadd d0, d1, d0
bl sqrt
str d0, [sp, 4888]
ldr d1, [sp, 4248]
ldr d0, [sp, 2560]
fmul d1, d1, d0
fmov d0, 1.0e+0
fadd d0, d1, d0
bl sqrt
fadd d0, d0, d0
ldr d1, [sp, 4248]
fdiv d0, d1, d0
str d0, [sp, 4896]
ldr d1, [sp, 4248]
ldr d0, [sp, 2560]
fmul d1, d1, d0
fmov d0, 1.0e+0
fadd d0, d1, d0
bl sqrt
fadd d0, d0, d0
ldr d1, [sp, 2560]
fdiv d0, d1, d0
str d0, [sp, 4904]
ldr d1, [sp, 4896]
ldr d0, [sp, 2584]
fmul d0, d1, d0
str d0, [sp, 4912]
ldr d1, [sp, 4904]
ldr d0, [sp, 4840]
fmul d0, d1, d0
str d0, [sp, 4920]
ldr d1, [sp, 4904]
ldr d0, [sp, 4272]
fmul d0, d1, d0
ldr d1, [sp, 4912]
fadd d0, d1, d0
str d0, [sp, 4912]
ldr d0, [sp, 552]
fcmpe d0, #0.0
bgt .L156
b .L190
.L156:
ldr d1, [sp, 4848]
fmov d0, 1.0e+0
fadd d1, d1, d0
ldr d2, [sp, 4888]
fmov d0, 1.0e+0
fadd d0, d2, d0
fdiv d0, d1, d0
str d0, [sp, 4928]
ldr d1, [sp, 4888]
fmov d0, 1.0e+0
fadd d0, d1, d0
fmov d1, 1.0e+0
fdiv d0, d1, d0
str d0, [sp, 4936]
ldr d1, [sp, 4848]
fmov d0, 1.0e+0
fadd d0, d1, d0
fneg d1, d0
ldr d2, [sp, 4888]
fmov d0, 1.0e+0
fadd d2, d2, d0
ldr d3, [sp, 4888]
fmov d0, 1.0e+0
fadd d0, d3, d0
fmul d0, d2, d0
fdiv d0, d1, d0
str d0, [sp, 4944]
ldr d1, [sp, 4936]
ldr d0, [sp, 4872]
fmul d0, d1, d0
str d0, [sp, 4952]
ldr d1, [sp, 4936]
ldr d0, [sp, 4880]
fmul d0, d1, d0
str d0, [sp, 4960]
ldr d1, [sp, 4944]
ldr d0, [sp, 4912]
fmul d0, d1, d0
ldr d1, [sp, 4952]
fadd d0, d1, d0
str d0, [sp, 4952]
ldr d1, [sp, 4944]
ldr d0, [sp, 4920]
fmul d0, d1, d0
str d0, [sp, 4968]
ldr d0, [sp, 4928]
bl log
str d0, [sp, 1416]
ldr d0, [sp, 4928]
fmov d1, 1.0e+0
fdiv d0, d1, d0
str d0, [sp, 4976]
ldr d1, [sp, 4976]
ldr d0, [sp, 4952]
fmul d0, d1, d0
str d0, [sp, 1432]
ldr d1, [sp, 4976]
ldr d0, [sp, 4960]
fmul d0, d1, d0
str d0, [sp, 3320]
ldr d1, [sp, 4976]
ldr d0, [sp, 4968]
fmul d0, d1, d0
str d0, [sp, 4984]
ldr x0, [sp, 5536]
ldr d1, [x0]
ldr d2, [sp, 4848]
ldr d0, [sp, 4888]
fsub d2, d2, d0
ldr d0, [sp, 1416]
fsub d2, d2, d0
ldr d0, [sp, 1344]
fmul d0, d2, d0
fadd d1, d1, d0
ldr d0, [sp, 1488]
fdiv d0, d1, d0
str d0, [sp, 4992]
ldr d0, [sp, 1488]
fmov d1, 1.0e+0
fdiv d0, d1, d0
str d0, [sp, 5000]
ldr d0, [sp, 1416]
fneg d1, d0
ldr d0, [sp, 4888]
fsub d1, d1, d0
ldr d0, [sp, 4848]
fadd d1, d1, d0
ldr d0, [sp, 1488]
fdiv d0, d1, d0
str d0, [sp, 5008]
ldr d0, [sp, 1488]
ldr d1, [sp, 1344]
fdiv d0, d1, d0
str d0, [sp, 5016]
ldr d0, [sp, 1344]
fneg d1, d0
ldr d0, [sp, 1488]
fdiv d0, d1, d0
str d0, [sp, 5024]
ldr d0, [sp, 1344]
fneg d1, d0
ldr d0, [sp, 1488]
fdiv d0, d1, d0
str d0, [sp, 5032]
ldr d0, [sp, 1416]
fneg d1, d0
ldr d0, [sp, 4888]
fsub d1, d1, d0
ldr d0, [sp, 4848]
fadd d1, d1, d0
ldr d0, [sp, 1344]
fmul d1, d1, d0
ldr x0, [sp, 5536]
ldr d0, [x0]
fadd d0, d1, d0
fneg d1, d0
ldr d0, [sp, 1488]
fmul d0, d0, d0
fdiv d0, d1, d0
str d0, [sp, 5040]
ldr d1, [sp, 5008]
ldr d0, [sp, 1360]
fmul d0, d1, d0
str d0, [sp, 5048]
ldr d1, [sp, 5016]
ldr d0, [sp, 4872]
fmul d0, d1, d0
ldr d1, [sp, 5048]
fadd d0, d1, d0
str d0, [sp, 5048]
ldr d1, [sp, 5016]
ldr d0, [sp, 4880]
fmul d0, d1, d0
str d0, [sp, 5056]
ldr d1, [sp, 5024]
ldr d0, [sp, 4912]
fmul d0, d1, d0
ldr d1, [sp, 5048]
fadd d0, d1, d0
str d0, [sp, 5048]
ldr d1, [sp, 5024]
ldr d0, [sp, 4920]
fmul d0, d1, d0
str d0, [sp, 5064]
ldr d1, [sp, 5032]
ldr d0, [sp, 1432]
fmul d0, d1, d0
ldr d1, [sp, 5048]
fadd d0, d1, d0
str d0, [sp, 5048]
ldr d1, [sp, 5032]
ldr d0, [sp, 3320]
fmul d0, d1, d0
ldr d1, [sp, 5056]
fadd d0, d1, d0
str d0, [sp, 5056]
ldr d1, [sp, 5032]
ldr d0, [sp, 4984]
fmul d0, d1, d0
ldr d1, [sp, 5064]
fadd d0, d1, d0
str d0, [sp, 5064]
ldr d1, [sp, 5040]
ldr d0, [sp, 1504]
fmul d0, d1, d0
ldr d1, [sp, 5048]
fadd d0, d1, d0
str d0, [sp, 5048]
ldr d1, [sp, 160]
ldr d0, [sp, 1488]
fmul d1, d1, d0
ldr d0, [sp, 4992]
fmul d8, d1, d0
ldr d1, [sp, 160]
fmov d0, 5.0e-1
fmul d1, d1, d0
ldr d0, [sp, 176]
fmul d9, d1, d0
ldr x0, [sp, 5536]
ldr d1, [x0]
ldr x0, [sp, 5536]
ldr d0, [x0]
fmul d0, d1, d0
adrp x0, .LC6
ldr d1, [x0, #:lo12:.LC6]
fadd d0, d0, d1
bl sqrt
fmul d1, d9, d0
fmov d0, 1.0e+0
fadd d0, d1, d0
fdiv d0, d8, d0
str d0, [sp, 5072]
ldr d1, [sp, 4992]
ldr d0, [sp, 1488]
fmul d8, d1, d0
ldr d1, [sp, 176]
fmov d0, 5.0e-1
fmul d1, d1, d0
ldr d0, [sp, 160]
fmul d9, d1, d0
ldr x0, [sp, 5536]
ldr d1, [x0]
ldr x0, [sp, 5536]
ldr d0, [x0]
fmul d0, d1, d0
adrp x0, .LC6
ldr d1, [x0, #:lo12:.LC6]
fadd d0, d0, d1
bl sqrt
fmul d1, d9, d0
fmov d0, 1.0e+0
fadd d0, d1, d0
fdiv d8, d8, d0
ldr d1, [sp, 176]
fmov d0, 5.0e-1
fmul d1, d1, d0
ldr d0, [sp, 4992]
fmul d1, d1, d0
ldr d0, [sp, 160]
fmul d1, d1, d0
ldr d0, [sp, 1488]
fmul d9, d1, d0
ldr x0, [sp, 5536]
ldr d1, [x0]
ldr x0, [sp, 5536]
ldr d0, [x0]
fmul d0, d1, d0
adrp x0, .LC6
ldr d1, [x0, #:lo12:.LC6]
fadd d0, d0, d1
bl sqrt
fmul d9, d9, d0
ldr d1, [sp, 176]
fmov d0, 5.0e-1
fmul d1, d1, d0
ldr d0, [sp, 160]
fmul d10, d1, d0
ldr x0, [sp, 5536]
ldr d1, [x0]
ldr x0, [sp, 5536]
ldr d0, [x0]
fmul d0, d1, d0
adrp x0, .LC6
ldr d1, [x0, #:lo12:.LC6]
fadd d0, d0, d1
bl sqrt
fmul d1, d10, d0
fmov d0, 1.0e+0
fadd d10, d1, d0
ldr d1, [sp, 176]
fmov d0, 5.0e-1
fmul d1, d1, d0
ldr d0, [sp, 160]
fmul d11, d1, d0
ldr x0, [sp, 5536]
ldr d1, [x0]
ldr x0, [sp, 5536]
ldr d0, [x0]
fmul d0, d1, d0
adrp x0, .LC6
ldr d1, [x0, #:lo12:.LC6]
fadd d0, d0, d1
bl sqrt
fmul d1, d11, d0
fmov d0, 1.0e+0
fadd d0, d1, d0
fmul d0, d10, d0
fdiv d0, d9, d0
fsub d0, d8, d0
str d0, [sp, 5080]
ldr d1, [sp, 4992]
ldr d0, [sp, 160]
fmul d8, d1, d0
ldr d1, [sp, 176]
fmov d0, 5.0e-1
fmul d1, d1, d0
ldr d0, [sp, 160]
fmul d9, d1, d0
ldr x0, [sp, 5536]
ldr d1, [x0]
ldr x0, [sp, 5536]
ldr d0, [x0]
fmul d0, d1, d0
adrp x0, .LC6
ldr d1, [x0, #:lo12:.LC6]
fadd d0, d0, d1
bl sqrt
fmul d1, d9, d0
fmov d0, 1.0e+0
fadd d0, d1, d0
fdiv d0, d8, d0
str d0, [sp, 5088]
ldr d1, [sp, 160]
ldr d0, [sp, 1488]
fmul d8, d1, d0
ldr d1, [sp, 176]
fmov d0, 5.0e-1
fmul d1, d1, d0
ldr d0, [sp, 160]
fmul d9, d1, d0
ldr x0, [sp, 5536]
ldr d1, [x0]
ldr x0, [sp, 5536]
ldr d0, [x0]
fmul d0, d1, d0
adrp x0, .LC6
ldr d1, [x0, #:lo12:.LC6]
fadd d0, d0, d1
bl sqrt
fmul d1, d9, d0
fmov d0, 1.0e+0
fadd d0, d1, d0
fdiv d0, d8, d0
str d0, [sp, 5096]
ldr d1, [sp, 176]
fmov d0, -5.0e-1
fmul d1, d1, d0
ldr d0, [sp, 4992]
fmul d1, d1, d0
ldr d0, [sp, 160]
fmul d0, d0, d0
fmul d1, d1, d0
ldr d0, [sp, 1488]
fmul d1, d1, d0
ldr x0, [sp, 5536]
ldr d0, [x0]
fmul d8, d1, d0
ldr x0, [sp, 5536]
ldr d1, [x0]
ldr x0, [sp, 5536]
ldr d0, [x0]
fmul d0, d1, d0
adrp x0, .LC6
ldr d1, [x0, #:lo12:.LC6]
fadd d0, d0, d1
bl sqrt
fmov d11, d0
ldr d1, [sp, 176]
fmov d0, 5.0e-1
fmul d1, d1, d0
ldr d0, [sp, 160]
fmul d9, d1, d0
ldr x0, [sp, 5536]
ldr d1, [x0]
ldr x0, [sp, 5536]
ldr d0, [x0]
fmul d0, d1, d0
adrp x0, .LC6
ldr d1, [x0, #:lo12:.LC6]
fadd d0, d0, d1
bl sqrt
fmul d1, d9, d0
fmov d0, 1.0e+0
fadd d9, d1, d0
ldr d1, [sp, 176]
fmov d0, 5.0e-1
fmul d1, d1, d0
ldr d0, [sp, 160]
fmul d10, d1, d0
ldr x0, [sp, 5536]
ldr d1, [x0]
ldr x0, [sp, 5536]
ldr d0, [x0]
fmul d0, d1, d0
adrp x0, .LC6
ldr d1, [x0, #:lo12:.LC6]
fadd d0, d0, d1
bl sqrt
fmul d1, d10, d0
fmov d0, 1.0e+0
fadd d0, d1, d0
fmul d0, d9, d0
fmul d0, d11, d0
fdiv d0, d8, d0
str d0, [sp, 5104]
ldr d1, [sp, 5080]
ldr d0, [sp, 168]
fmul d0, d1, d0
str d0, [sp, 5112]
ldr d1, [sp, 5088]
ldr d0, [sp, 1504]
fmul d0, d1, d0
ldr d1, [sp, 5112]
fadd d0, d1, d0
str d0, [sp, 5112]
ldr d1, [sp, 5096]
ldr d0, [sp, 5000]
fmul d0, d1, d0
ldr d1, [sp, 5104]
fadd d0, d1, d0
str d0, [sp, 5104]
ldr d1, [sp, 5096]
ldr d0, [sp, 5048]
fmul d0, d1, d0
ldr d1, [sp, 5112]
fadd d0, d1, d0
str d0, [sp, 5112]
ldr d1, [sp, 5096]
ldr d0, [sp, 5056]
fmul d0, d1, d0
str d0, [sp, 5120]
ldr d1, [sp, 5096]
ldr d0, [sp, 5064]
fmul d0, d1, d0
str d0, [sp, 5128]
ldr d0, [sp, 5072]
fmul d1, d0, d0
fmov d0, 1.0e+0
fadd d0, d1, d0
bl sqrt
fmov d1, d0
ldr d0, [sp, 4992]
fdiv d0, d0, d1
ldr x0, [sp, 5792]
str d0, [x0]
ldr d0, [sp, 5072]
fmul d1, d0, d0
fmov d0, 1.0e+0
fadd d0, d1, d0
bl sqrt
fmov d1, d0
fmov d0, 1.0e+0
fdiv d0, d0, d1
str d0, [sp, 5136]
ldr d0, [sp, 5072]
fneg d1, d0
ldr d0, [sp, 4992]
fmul d8, d1, d0
ldr d0, [sp, 5072]
fmul d1, d0, d0
fmov d0, 1.0e+0
fadd d0, d1, d0
fmov d1, 1.5e+0
bl pow
fdiv d0, d8, d0
str d0, [sp, 5144]
ldr d1, [sp, 5136]
ldr d0, [sp, 5000]
fmul d0, d1, d0
ldr x0, [sp, 5800]
str d0, [x0]
ldr d1, [sp, 5136]
ldr d0, [sp, 5048]
fmul d0, d1, d0
ldr x0, [sp, 5808]
str d0, [x0]
ldr d1, [sp, 5136]
ldr d0, [sp, 5056]
fmul d0, d1, d0
ldr x0, [sp, 5816]
str d0, [x0]
ldr d1, [sp, 5136]
ldr d0, [sp, 5064]
fmul d0, d1, d0
ldr x0, [sp, 5824]
str d0, [x0]
ldr x0, [sp, 5808]
ldr d1, [x0]
ldr d2, [sp, 5144]
ldr d0, [sp, 5112]
fmul d0, d2, d0
fadd d0, d1, d0
ldr x0, [sp, 5808]
str d0, [x0]
ldr x0, [sp, 5800]
ldr d1, [x0]
ldr d2, [sp, 5144]
ldr d0, [sp, 5104]
fmul d0, d2, d0
fadd d0, d1, d0
ldr x0, [sp, 5800]
str d0, [x0]
ldr x0, [sp, 5816]
ldr d1, [x0]
ldr d2, [sp, 5144]
ldr d0, [sp, 5120]
fmul d0, d2, d0
fadd d0, d1, d0
ldr x0, [sp, 5816]
str d0, [x0]
ldr x0, [sp, 5824]
ldr d1, [x0]
ldr d2, [sp, 5144]
ldr d0, [sp, 5128]
fmul d0, d2, d0
fadd d0, d1, d0
ldr x0, [sp, 5824]
str d0, [x0]
b .L101
.L190:
ldr x0, [sp, 5792]
str xzr, [x0]
ldr x0, [sp, 5800]
str xzr, [x0]
ldr x0, [sp, 5808]
str xzr, [x0]
ldr x0, [sp, 5816]
str xzr, [x0]
ldr x0, [sp, 5824]
str xzr, [x0]
.L101:
ldr d0, [sp, 584]
fcmpe d0, #0.0
bgt .L157
b .L191
.L157:
ldr x0, [sp, 5544]
ldr d1, [x0]
ldr d0, [sp, 1512]
fdiv d0, d1, d0
ldr x0, [sp, 5832]
str d0, [x0]
ldr d0, [sp, 1512]
fmov d1, 1.0e+0
fdiv d0, d1, d0
ldr x0, [sp, 5840]
str d0, [x0]
ldr x0, [sp, 5544]
ldr d0, [x0]
fneg d1, d0
ldr d0, [sp, 1512]
fmul d0, d0, d0
fdiv d0, d1, d0
str d0, [sp, 5152]
ldr d1, [sp, 5152]
ldr d0, [sp, 1528]
fmul d0, d1, d0
ldr x0, [sp, 5848]
str d0, [x0]
b .L104
.L191:
ldr x0, [sp, 5832]
str xzr, [x0]
ldr x0, [sp, 5840]
str xzr, [x0]
ldr x0, [sp, 5848]
str xzr, [x0]
.L104:
ldr d0, [sp, 592]
fcmpe d0, #0.0
bgt .L158
b .L192
.L158:
ldr x0, [sp, 5552]
ldr d1, [x0]
ldr d0, [sp, 400]
fmul d1, d1, d0
ldr d0, [sp, 1536]
fdiv d0, d1, d0
ldr x0, [sp, 5856]
str d0, [x0]
ldr d0, [sp, 1536]
ldr d1, [sp, 400]
fdiv d0, d1, d0
ldr x0, [sp, 5864]
str d0, [x0]
ldr x0, [sp, 5552]
ldr d1, [x0]
ldr d0, [sp, 1536]
fdiv d0, d1, d0
str d0, [sp, 5160]
ldr d0, [sp, 400]
fneg d1, d0
ldr x0, [sp, 5552]
ldr d0, [x0]
fmul d1, d1, d0
ldr d0, [sp, 1536]
fmul d0, d0, d0
fdiv d0, d1, d0
str d0, [sp, 5168]
ldr d1, [sp, 5160]
ldr d0, [sp, 408]
fmul d0, d1, d0
ldr x0, [sp, 5872]
str d0, [x0]
ldr d1, [sp, 5160]
ldr d0, [sp, 416]
fmul d0, d1, d0
ldr x0, [sp, 5880]
str d0, [x0]
ldr d1, [sp, 5160]
ldr d0, [sp, 424]
fmul d0, d1, d0
ldr x0, [sp, 5888]
str d0, [x0]
ldr x0, [sp, 5872]
ldr d1, [x0]
ldr d2, [sp, 5168]
ldr d0, [sp, 1552]
fmul d0, d2, d0
fadd d0, d1, d0
ldr x0, [sp, 5872]
str d0, [x0]
b .L107
.L192:
ldr x0, [sp, 5856]
str xzr, [x0]
ldr x0, [sp, 5864]
str xzr, [x0]
ldr x0, [sp, 5872]
str xzr, [x0]
ldr x0, [sp, 5880]
str xzr, [x0]
ldr x0, [sp, 5888]
str xzr, [x0]
.L107:
ldr d0, [sp, 600]
fcmpe d0, #0.0
bgt .L159
b .L193
.L159:
ldr x0, [sp, 5560]
ldr d1, [x0]
ldr d0, [sp, 1560]
fdiv d0, d1, d0
ldr x0, [sp, 5896]
str d0, [x0]
ldr d0, [sp, 1560]
fmov d1, 1.0e+0
fdiv d0, d1, d0
ldr x0, [sp, 5904]
str d0, [x0]
ldr x0, [sp, 5560]
ldr d0, [x0]
fneg d1, d0
ldr d0, [sp, 1560]
fmul d0, d0, d0
fdiv d0, d1, d0
str d0, [sp, 5176]
ldr d1, [sp, 5176]
ldr d0, [sp, 1576]
fmul d0, d1, d0
ldr x0, [sp, 5912]
str d0, [x0]
b .L110
.L193:
ldr x0, [sp, 5896]
str xzr, [x0]
ldr x0, [sp, 5904]
str xzr, [x0]
ldr x0, [sp, 5912]
str xzr, [x0]
.L110:
ldr d0, [sp, 616]
fcmpe d0, #0.0
bgt .L160
b .L194
.L160:
ldr x0, [sp, 5568]
ldr d1, [x0]
ldr d0, [sp, 464]
fmul d1, d1, d0
ldr d0, [sp, 1608]
fdiv d0, d1, d0
ldr x0, [sp, 5920]
str d0, [x0]
ldr d0, [sp, 1608]
ldr d1, [sp, 464]
fdiv d0, d1, d0
ldr x0, [sp, 5928]
str d0, [x0]
ldr x0, [sp, 5568]
ldr d1, [x0]
ldr d0, [sp, 1608]
fdiv d0, d1, d0
str d0, [sp, 5184]
ldr d0, [sp, 464]
fneg d1, d0
ldr x0, [sp, 5568]
ldr d0, [x0]
fmul d1, d1, d0
ldr d0, [sp, 1608]
fmul d0, d0, d0
fdiv d0, d1, d0
str d0, [sp, 5192]
ldr d1, [sp, 5184]
ldr d0, [sp, 472]
fmul d0, d1, d0
ldr x0, [sp, 5936]
str d0, [x0]
ldr d1, [sp, 5184]
ldr d0, [sp, 480]
fmul d0, d1, d0
ldr x0, [sp, 5944]
str d0, [x0]
ldr d1, [sp, 5184]
ldr d0, [sp, 488]
fmul d0, d1, d0
ldr x0, [sp, 5952]
str d0, [x0]
ldr x0, [sp, 5936]
ldr d1, [x0]
ldr d2, [sp, 5192]
ldr d0, [sp, 1624]
fmul d0, d2, d0
fadd d0, d1, d0
ldr x0, [sp, 5936]
str d0, [x0]
b .L113
.L194:
ldr x0, [sp, 5920]
str xzr, [x0]
ldr x0, [sp, 5928]
str xzr, [x0]
ldr x0, [sp, 5936]
str xzr, [x0]
ldr x0, [sp, 5944]
str xzr, [x0]
ldr x0, [sp, 5952]
str xzr, [x0]
.L113:
ldr d0, [sp, 3840]
fcmpe d0, #0.0
bgt .L161
b .L195
.L161:
fmov d0, 1.0e+0
str d0, [sp, 528]
b .L116
.L195:
str xzr, [sp, 528]
.L116:
ldr d1, [sp, 3840]
ldr d0, [sp, 528]
fmul d0, d1, d0
ldr d1, [sp, 192]
fmul d0, d1, d0
str d0, [sp, 5200]
ldr d1, [sp, 192]
ldr d0, [sp, 528]
fmul d0, d1, d0
str d0, [sp, 5208]
ldr d1, [sp, 5208]
ldr d0, [sp, 3864]
fmul d0, d1, d0
str d0, [sp, 5216]
ldr d1, [sp, 5208]
ldr d0, [sp, 3872]
fmul d0, d1, d0
str d0, [sp, 5224]
ldr d1, [sp, 5200]
fmov d0, 1.0e+0
fadd d0, d1, d0
ldr d1, [sp, 5200]
fdiv d0, d1, d0
str d0, [sp, 5232]
ldr d1, [sp, 5200]
fmov d0, 1.0e+0
fadd d0, d1, d0
fmov d1, 1.0e+0
fdiv d1, d1, d0
ldr d2, [sp, 5200]
fmov d0, 1.0e+0
fadd d2, d2, d0
ldr d3, [sp, 5200]
fmov d0, 1.0e+0
fadd d0, d3, d0
fmul d0, d2, d0
ldr d2, [sp, 5200]
fdiv d0, d2, d0
fsub d0, d1, d0
str d0, [sp, 5240]
ldr d1, [sp, 5240]
ldr d0, [sp, 5216]
fmul d0, d1, d0
str d0, [sp, 5248]
ldr d1, [sp, 5240]
ldr d0, [sp, 5224]
fmul d0, d1, d0
str d0, [sp, 5256]
ldr x0, [sp, 72]
ldr d1, [x0]
ldr d0, [sp, 184]
fmul d0, d1, d0
adrp x0, .LC7
ldr d1, [x0, #:lo12:.LC7]
fdiv d0, d0, d1
str d0, [sp, 1416]
ldr d0, [sp, 184]
adrp x0, .LC8
ldr d1, [x0, #:lo12:.LC8]
fmul d0, d0, d1
str d0, [sp, 3320]
ldr d0, [sp, 1416]
bl exp
str d0, [sp, 1632]
ldr d0, [sp, 1632]
str d0, [sp, 2440]
ldr d1, [sp, 2440]
ldr d0, [sp, 3320]
fmul d0, d1, d0
str d0, [sp, 4112]
ldr d1, [sp, 984]
ldr d0, [sp, 4000]
fmul d1, d1, d0
fmov d0, 1.0e+0
fadd d1, d1, d0
ldr d0, [sp, 976]
fmul d1, d1, d0
ldr d2, [sp, 992]
ldr d0, [sp, 1632]
fmul d2, d2, d0
ldr d0, [sp, 5232]
fmul d3, d0, d0
ldr d0, [sp, 200]
fadd d0, d3, d0
fmul d2, d2, d0
ldr d0, [sp, 528]
fmul d2, d2, d0
fmov d0, 1.0e+0
fadd d0, d2, d0
fmul d0, d1, d0
str d0, [sp, 5264]
ldr d1, [sp, 984]
ldr d0, [sp, 976]
fmul d1, d1, d0
ldr d0, [sp, 5232]
fmul d2, d0, d0
ldr d0, [sp, 200]
fadd d2, d2, d0
ldr d0, [sp, 528]
fmul d2, d2, d0
ldr d0, [sp, 992]
fmul d2, d2, d0
ldr d0, [sp, 1632]
fmul d2, d2, d0
fmov d0, 1.0e+0
fadd d0, d2, d0
fmul d0, d1, d0
str d0, [sp, 5272]
ldr d1, [sp, 4000]
ldr d0, [sp, 984]
fmul d1, d1, d0
fmov d0, 1.0e+0
fadd d1, d1, d0
ldr d0, [sp, 528]
fmul d1, d1, d0
ldr d0, [sp, 5232]
fmul d2, d0, d0
ldr d0, [sp, 200]
fadd d0, d2, d0
fmul d1, d1, d0
ldr d0, [sp, 976]
fmul d0, d1, d0
ldr d1, [sp, 992]
fmul d0, d1, d0
str d0, [sp, 5280]
ldr d0, [sp, 5232]
fadd d1, d0, d0
ldr d2, [sp, 4000]
ldr d0, [sp, 984]
fmul d2, d2, d0
fmov d0, 1.0e+0
fadd d0, d2, d0
fmul d1, d1, d0
ldr d0, [sp, 528]
fmul d1, d1, d0
ldr d0, [sp, 976]
fmul d1, d1, d0
ldr d0, [sp, 992]
fmul d0, d1, d0
ldr d1, [sp, 1632]
fmul d0, d1, d0
str d0, [sp, 5288]
ldr d1, [sp, 5272]
ldr d0, [sp, 4016]
fmul d0, d1, d0
str d0, [sp, 5296]
ldr d1, [sp, 5272]
ldr d0, [sp, 4024]
fmul d0, d1, d0
str d0, [sp, 5304]
ldr d1, [sp, 5272]
ldr d0, [sp, 4032]
fmul d0, d1, d0
str d0, [sp, 5312]
ldr d1, [sp, 5280]
ldr d0, [sp, 4112]
fmul d0, d1, d0
ldr d1, [sp, 5312]
fadd d0, d1, d0
str d0, [sp, 5312]
ldr d1, [sp, 5288]
ldr d0, [sp, 5248]
fmul d0, d1, d0
ldr d1, [sp, 5296]
fadd d0, d1, d0
str d0, [sp, 5296]
ldr d1, [sp, 5288]
ldr d0, [sp, 5256]
fmul d0, d1, d0
ldr d1, [sp, 5304]
fadd d0, d1, d0
str d0, [sp, 5304]
ldr d1, [sp, 2448]
ldr d0, [sp, 256]
fmul d1, d1, d0
ldr d0, [sp, 784]
fmul d1, d1, d0
ldr d2, [sp, 5264]
ldr d0, [sp, 3840]
fmul d2, d2, d0
ldr d0, [sp, 400]
fdiv d0, d2, d0
fadd d0, d1, d0
ldr x0, [sp, 5960]
str d0, [x0]
ldr d1, [sp, 256]
ldr d0, [sp, 784]
fmul d0, d1, d0
str d0, [sp, 5320]
ldr d1, [sp, 2448]
ldr d0, [sp, 784]
fmul d0, d1, d0
str d0, [sp, 5328]
ldr d0, [sp, 400]
ldr d1, [sp, 3840]
fdiv d0, d1, d0
str d0, [sp, 5336]
ldr d0, [sp, 400]
ldr d1, [sp, 5264]
fdiv d0, d1, d0
str d0, [sp, 5344]
ldr d0, [sp, 3840]
fneg d1, d0
ldr d0, [sp, 5264]
fmul d1, d1, d0
ldr d0, [sp, 400]
fmul d0, d0, d0
fdiv d0, d1, d0
str d0, [sp, 5352]
ldr d1, [sp, 5320]
ldr d0, [sp, 2464]
fmul d0, d1, d0
ldr x0, [sp, 5968]
str d0, [x0]
ldr x0, [sp, 5968]
ldr d1, [x0]
ldr d2, [sp, 5328]
ldr d0, [sp, 264]
fmul d0, d2, d0
fadd d0, d1, d0
ldr x0, [sp, 5968]
str d0, [x0]
ldr d1, [sp, 5328]
ldr d0, [sp, 272]
fmul d0, d1, d0
ldr x0, [sp, 5976]
str d0, [x0]
ldr x0, [sp, 5968]
ldr d1, [x0]
ldr d2, [sp, 5336]
ldr d0, [sp, 5296]
fmul d0, d2, d0
fadd d0, d1, d0
ldr x0, [sp, 5968]
str d0, [x0]
ldr x0, [sp, 5976]
ldr d1, [x0]
ldr d2, [sp, 5336]
ldr d0, [sp, 5304]
fmul d0, d2, d0
fadd d0, d1, d0
ldr x0, [sp, 5976]
str d0, [x0]
ldr d1, [sp, 5336]
ldr d0, [sp, 5312]
fmul d0, d1, d0
ldr x0, [sp, 5984]
str d0, [x0]
ldr x0, [sp, 5968]
ldr d1, [x0]
ldr d2, [sp, 5344]
ldr d0, [sp, 3864]
fmul d0, d2, d0
fadd d0, d1, d0
ldr x0, [sp, 5968]
str d0, [x0]
ldr x0, [sp, 5976]
ldr d1, [x0]
ldr d2, [sp, 5344]
ldr d0, [sp, 3872]
fmul d0, d2, d0
fadd d0, d1, d0
ldr x0, [sp, 5976]
str d0, [x0]
ldr x0, [sp, 5968]
ldr d1, [x0]
ldr d2, [sp, 5352]
ldr d0, [sp, 408]
fmul d0, d2, d0
fadd d0, d1, d0
ldr x0, [sp, 5968]
str d0, [x0]
ldr x0, [sp, 5976]
ldr d1, [x0]
ldr d2, [sp, 5352]
ldr d0, [sp, 416]
fmul d0, d2, d0
fadd d0, d1, d0
ldr x0, [sp, 5976]
str d0, [x0]
ldr x0, [sp, 5984]
ldr d1, [x0]
ldr d2, [sp, 5352]
ldr d0, [sp, 424]
fmul d0, d2, d0
fadd d0, d1, d0
ldr x0, [sp, 5984]
str d0, [x0]
ldr d1, [sp, 2448]
ldr d0, [sp, 296]
fmul d1, d1, d0
fmov d2, 1.0e+0
ldr d0, [sp, 784]
fsub d0, d2, d0
fmul d0, d1, d0
ldr x0, [sp, 5992]
str d0, [x0]
fmov d1, 1.0e+0
ldr d0, [sp, 784]
fsub d0, d1, d0
ldr d1, [sp, 296]
fmul d0, d1, d0
str d0, [sp, 5360]
fmov d1, 1.0e+0
ldr d0, [sp, 784]
fsub d0, d1, d0
ldr d1, [sp, 2448]
fmul d0, d1, d0
str d0, [sp, 5368]
ldr d1, [sp, 5360]
ldr d0, [sp, 2464]
fmul d0, d1, d0
ldr x0, [sp, 6000]
str d0, [x0]
ldr x0, [sp, 6000]
ldr d1, [x0]
ldr d2, [sp, 5368]
ldr d0, [sp, 304]
fmul d0, d2, d0
fadd d0, d1, d0
ldr x0, [sp, 6000]
str d0, [x0]
ldr d1, [sp, 5368]
ldr d0, [sp, 312]
fmul d0, d1, d0
ldr x0, [sp, 6008]
str d0, [x0]
ldr d1, [sp, 2480]
ldr d0, [sp, 336]
fmul d1, d1, d0
ldr d2, [sp, 1016]
ldr d0, [sp, 3904]
fmul d0, d2, d0
fadd d1, d1, d0
ldr d2, [sp, 712]
ldr d0, [sp, 4848]
fmul d0, d2, d0
fadd d0, d1, d0
ldr x0, [sp, 6016]
str d0, [x0]
ldr d0, [sp, 336]
str d0, [sp, 5376]
ldr d0, [sp, 2480]
str d0, [sp, 5384]
ldr d0, [sp, 1016]
str d0, [sp, 5392]
ldr d0, [sp, 712]
str d0, [sp, 5400]
ldr d1, [sp, 5376]
ldr d0, [sp, 2496]
fmul d0, d1, d0
ldr x0, [sp, 6024]
str d0, [x0]
ldr x0, [sp, 6024]
ldr d1, [x0]
ldr d2, [sp, 5384]
ldr d0, [sp, 344]
fmul d0, d2, d0
fadd d0, d1, d0
ldr x0, [sp, 6024]
str d0, [x0]
ldr d1, [sp, 5384]
ldr d0, [sp, 352]
fmul d0, d1, d0
ldr x0, [sp, 6032]
str d0, [x0]
ldr x0, [sp, 6024]
ldr d1, [x0]
ldr d2, [sp, 5392]
ldr d0, [sp, 3936]
fmul d0, d2, d0
fadd d0, d1, d0
ldr x0, [sp, 6024]
str d0, [x0]
ldr x0, [sp, 6032]
ldr d1, [x0]
ldr d2, [sp, 5392]
ldr d0, [sp, 3944]
fmul d0, d2, d0
fadd d0, d1, d0
ldr x0, [sp, 6032]
str d0, [x0]
ldr x0, [sp, 6024]
ldr d1, [x0]
ldr d2, [sp, 5400]
ldr d0, [sp, 4872]
fmul d0, d2, d0
fadd d0, d1, d0
ldr x0, [sp, 6024]
str d0, [x0]
ldr x0, [sp, 6032]
ldr d1, [x0]
ldr d2, [sp, 5400]
ldr d0, [sp, 4880]
fmul d0, d2, d0
fadd d0, d1, d0
ldr x0, [sp, 6032]
str d0, [x0]
ldr d1, [sp, 712]
ldr d0, [sp, 4888]
fmul d0, d1, d0
ldr x0, [sp, 6040]
str d0, [x0]
ldr d0, [sp, 712]
str d0, [sp, 5408]
ldr d1, [sp, 5408]
ldr d0, [sp, 4912]
fmul d0, d1, d0
ldr x0, [sp, 6048]
str d0, [x0]
ldr d1, [sp, 5408]
ldr d0, [sp, 4920]
fmul d0, d1, d0
ldr x0, [sp, 6056]
str d0, [x0]
ldr d1, [sp, 2504]
ldr d0, [sp, 376]
fmul d1, d1, d0
ldr d2, [sp, 1016]
ldr d0, [sp, 432]
fmul d0, d2, d0
fadd d0, d1, d0
ldr x0, [sp, 6064]
str d0, [x0]
ldr d0, [sp, 376]
str d0, [sp, 5416]
ldr d0, [sp, 2504]
str d0, [sp, 5424]
ldr d0, [sp, 1016]
str d0, [sp, 5432]
ldr d1, [sp, 5416]
ldr d0, [sp, 2520]
fmul d0, d1, d0
ldr x0, [sp, 6072]
str d0, [x0]
ldr x0, [sp, 6072]
ldr d1, [x0]
ldr d2, [sp, 5424]
ldr d0, [sp, 384]
fmul d0, d2, d0
fadd d0, d1, d0
ldr x0, [sp, 6072]
str d0, [x0]
ldr d1, [sp, 5424]
ldr d0, [sp, 392]
fmul d0, d1, d0
ldr x0, [sp, 6080]
str d0, [x0]
ldr x0, [sp, 6072]
ldr d1, [x0]
ldr d2, [sp, 5432]
ldr d0, [sp, 440]
fmul d0, d2, d0
fadd d0, d1, d0
ldr x0, [sp, 6072]
str d0, [x0]
ldr x0, [sp, 6080]
ldr d1, [x0]
ldr d2, [sp, 5432]
ldr d0, [sp, 448]
fmul d0, d2, d0
fadd d0, d1, d0
ldr x0, [sp, 6080]
str d0, [x0]
ldr d1, [sp, 5432]
ldr d0, [sp, 456]
fmul d0, d1, d0
ldr x0, [sp, 6088]
str d0, [x0]
ldr x0, [sp, 5576]
ldr d1, [x0]
ldr d0, [sp, 656]
fmul d0, d1, d0
ldr x0, [sp, 6096]
str d0, [x0]
ldr x0, [sp, 6104]
ldr d0, [sp, 656]
str d0, [x0]
ldr x0, [sp, 5584]
ldr d1, [x0]
ldr d0, [sp, 696]
fmul d0, d1, d0
ldr x0, [sp, 6112]
str d0, [x0]
ldr x0, [sp, 6120]
ldr d0, [sp, 696]
str d0, [x0]
ldr x0, [sp, 5600]
ldr d1, [x0]
ldr x0, [sp, 88]
ldr d0, [x0]
fmul d1, d1, d0
ldr x0, [sp, 5712]
ldr d2, [x0]
ldr x0, [sp, 72]
ldr d0, [x0]
fmul d0, d2, d0
fadd d1, d1, d0
ldr x0, [sp, 5648]
ldr d2, [x0]
ldr x0, [sp, 5680]
ldr d0, [x0]
fsub d2, d2, d0
ldr x0, [sp, 5592]
ldr d0, [x0]
fmul d0, d2, d0
fadd d1, d1, d0
ldr x0, [sp, 5624]
ldr d2, [x0]
ldr x0, [sp, 80]
ldr d0, [x0]
fmul d0, d2, d0
fadd d1, d1, d0
ldr x0, [sp, 5744]
ldr d2, [x0]
ldr x0, [sp, 64]
ldr d0, [x0]
fmul d0, d2, d0
fadd d1, d1, d0
ldr x0, [sp, 5768]
ldr d2, [x0]
ldr x0, [sp, 56]
ldr d0, [x0]
fmul d0, d2, d0
fadd d1, d1, d0
ldr x0, [sp, 5792]
ldr d2, [x0]
ldr x0, [sp, 5536]
ldr d0, [x0]
fmul d0, d2, d0
fadd d1, d1, d0
ldr x0, [sp, 5832]
ldr d2, [x0]
ldr x0, [sp, 5544]
ldr d0, [x0]
fmul d0, d2, d0
fadd d1, d1, d0
ldr x0, [sp, 5856]
ldr d2, [x0]
ldr x0, [sp, 5552]
ldr d0, [x0]
fmul d0, d2, d0
fadd d1, d1, d0
ldr x0, [sp, 5896]
ldr d2, [x0]
ldr x0, [sp, 5560]
ldr d0, [x0]
fmul d0, d2, d0
fadd d1, d1, d0
ldr x0, [sp, 5920]
ldr d2, [x0]
ldr x0, [sp, 5568]
ldr d0, [x0]
fmul d0, d2, d0
fadd d0, d1, d0
fneg d0, d0
ldr x0, [sp, 6144]
str d0, [x0]
ldr x0, [sp, 88]
ldr d0, [x0]
fneg d0, d0
str d0, [sp, 5440]
ldr x0, [sp, 5600]
ldr d0, [x0]
fneg d0, d0
ldr x0, [sp, 6160]
str d0, [x0]
ldr x0, [sp, 72]
ldr d0, [x0]
fneg d0, d0
str d0, [sp, 5448]
ldr x0, [sp, 5712]
ldr d0, [x0]
fneg d0, d0
ldr x0, [sp, 6168]
str d0, [x0]
ldr x0, [sp, 5592]
ldr d0, [x0]
fneg d0, d0
str d0, [sp, 5456]
ldr x0, [sp, 5592]
ldr d0, [x0]
str d0, [sp, 5464]
ldr x0, [sp, 5680]
ldr d1, [x0]
ldr x0, [sp, 5648]
ldr d0, [x0]
fsub d0, d1, d0
ldr x0, [sp, 6176]
str d0, [x0]
ldr x0, [sp, 80]
ldr d0, [x0]
fneg d0, d0
str d0, [sp, 5472]
ldr x0, [sp, 5624]
ldr d0, [x0]
fneg d0, d0
ldr x0, [sp, 6184]
str d0, [x0]
ldr x0, [sp, 64]
ldr d0, [x0]
fneg d0, d0
str d0, [sp, 5480]
ldr x0, [sp, 5744]
ldr d0, [x0]
fneg d0, d0
ldr x0, [sp, 6192]
str d0, [x0]
ldr x0, [sp, 56]
ldr d0, [x0]
fneg d0, d0
str d0, [sp, 5488]
ldr x0, [sp, 5768]
ldr d0, [x0]
fneg d0, d0
ldr x0, [sp, 6200]
str d0, [x0]
ldr x0, [sp, 5536]
ldr d0, [x0]
fneg d0, d0
str d0, [sp, 5496]
ldr x0, [sp, 5792]
ldr d0, [x0]
fneg d0, d0
ldr x0, [sp, 6208]
str d0, [x0]
ldr x0, [sp, 5544]
ldr d0, [x0]
fneg d0, d0
str d0, [sp, 5504]
ldr x0, [sp, 5832]
ldr d0, [x0]
fneg d0, d0
ldr x0, [sp, 6224]
str d0, [x0]
ldr x0, [sp, 5552]
ldr d0, [x0]
fneg d0, d0
str d0, [sp, 5512]
ldr x0, [sp, 5856]
ldr d0, [x0]
fneg d0, d0
ldr x0, [sp, 6232]
str d0, [x0]
ldr x0, [sp, 5560]
ldr d0, [x0]
fneg d0, d0
str d0, [sp, 5520]
ldr x0, [sp, 5896]
ldr d0, [x0]
fneg d0, d0
ldr x0, [sp, 6240]
str d0, [x0]
ldr x0, [sp, 5568]
ldr d0, [x0]
fneg d0, d0
str d0, [sp, 5528]
ldr x0, [sp, 5920]
ldr d0, [x0]
fneg d0, d0
ldr x0, [sp, 6248]
str d0, [x0]
ldr x0, [sp, 5608]
ldr d1, [x0]
ldr d0, [sp, 5440]
fmul d0, d1, d0
ldr x0, [sp, 6152]
str d0, [x0]
ldr x0, [sp, 6160]
ldr d1, [x0]
ldr x0, [sp, 5616]
ldr d2, [x0]
ldr d0, [sp, 5440]
fmul d0, d2, d0
fadd d0, d1, d0
ldr x0, [sp, 6160]
str d0, [x0]
ldr x0, [sp, 6152]
ldr d1, [x0]
ldr x0, [sp, 5720]
ldr d2, [x0]
ldr d0, [sp, 5448]
fmul d0, d2, d0
fadd d0, d1, d0
ldr x0, [sp, 6152]
str d0, [x0]
ldr x0, [sp, 6168]
ldr d1, [x0]
ldr x0, [sp, 5728]
ldr d2, [x0]
ldr d0, [sp, 5448]
fmul d0, d2, d0
fadd d0, d1, d0
ldr x0, [sp, 6168]
str d0, [x0]
ldr x0, [sp, 6160]
ldr d1, [x0]
ldr x0, [sp, 5736]
ldr d2, [x0]
ldr d0, [sp, 5448]
fmul d0, d2, d0
fadd d0, d1, d0
ldr x0, [sp, 6160]
str d0, [x0]
ldr x0, [sp, 6152]
ldr d1, [x0]
ldr x0, [sp, 5656]
ldr d2, [x0]
ldr d0, [sp, 5456]
fmul d0, d2, d0
fadd d0, d1, d0
ldr x0, [sp, 6152]
str d0, [x0]
ldr x0, [sp, 6160]
ldr d1, [x0]
ldr x0, [sp, 5664]
ldr d2, [x0]
ldr d0, [sp, 5456]
fmul d0, d2, d0
fadd d0, d1, d0
ldr x0, [sp, 6160]
str d0, [x0]
ldr x0, [sp, 6168]
ldr d1, [x0]
ldr x0, [sp, 5672]
ldr d2, [x0]
ldr d0, [sp, 5456]
fmul d0, d2, d0
fadd d0, d1, d0
ldr x0, [sp, 6168]
str d0, [x0]
ldr x0, [sp, 6152]
ldr d1, [x0]
ldr x0, [sp, 5688]
ldr d2, [x0]
ldr d0, [sp, 5464]
fmul d0, d2, d0
fadd d0, d1, d0
ldr x0, [sp, 6152]
str d0, [x0]
ldr x0, [sp, 6168]
ldr d1, [x0]
ldr x0, [sp, 5696]
ldr d2, [x0]
ldr d0, [sp, 5464]
fmul d0, d2, d0
fadd d0, d1, d0
ldr x0, [sp, 6168]
str d0, [x0]
ldr x0, [sp, 6160]
ldr d1, [x0]
ldr x0, [sp, 5704]
ldr d2, [x0]
ldr d0, [sp, 5464]
fmul d0, d2, d0
fadd d0, d1, d0
ldr x0, [sp, 6160]
str d0, [x0]
ldr x0, [sp, 6152]
ldr d1, [x0]
ldr x0, [sp, 5632]
ldr d2, [x0]
ldr d0, [sp, 5472]
fmul d0, d2, d0
fadd d0, d1, d0
ldr x0, [sp, 6152]
str d0, [x0]
ldr x0, [sp, 6184]
ldr d1, [x0]
ldr x0, [sp, 5640]
ldr d2, [x0]
ldr d0, [sp, 5472]
fmul d0, d2, d0
fadd d0, d1, d0
ldr x0, [sp, 6184]
str d0, [x0]
ldr x0, [sp, 6152]
ldr d1, [x0]
ldr x0, [sp, 5752]
ldr d2, [x0]
ldr d0, [sp, 5480]
fmul d0, d2, d0
fadd d0, d1, d0
ldr x0, [sp, 6152]
str d0, [x0]
ldr x0, [sp, 6192]
ldr d1, [x0]
ldr x0, [sp, 5760]
ldr d2, [x0]
ldr d0, [sp, 5480]
fmul d0, d2, d0
fadd d0, d1, d0
ldr x0, [sp, 6192]
str d0, [x0]
ldr x0, [sp, 6200]
ldr d1, [x0]
ldr x0, [sp, 5776]
ldr d2, [x0]
ldr d0, [sp, 5488]
fmul d0, d2, d0
fadd d0, d1, d0
ldr x0, [sp, 6200]
str d0, [x0]
ldr x0, [sp, 6152]
ldr d1, [x0]
ldr x0, [sp, 5784]
ldr d2, [x0]
ldr d0, [sp, 5488]
fmul d0, d2, d0
fadd d0, d1, d0
ldr x0, [sp, 6152]
str d0, [x0]
ldr x0, [sp, 6208]
ldr d1, [x0]
ldr x0, [sp, 5800]
ldr d2, [x0]
ldr d0, [sp, 5496]
fmul d0, d2, d0
fadd d0, d1, d0
ldr x0, [sp, 6208]
str d0, [x0]
ldr x0, [sp, 6152]
ldr d1, [x0]
ldr x0, [sp, 5808]
ldr d2, [x0]
ldr d0, [sp, 5496]
fmul d0, d2, d0
fadd d0, d1, d0
ldr x0, [sp, 6152]
str d0, [x0]
ldr x0, [sp, 6168]
ldr d1, [x0]
ldr x0, [sp, 5816]
ldr d2, [x0]
ldr d0, [sp, 5496]
fmul d0, d2, d0
fadd d0, d1, d0
ldr x0, [sp, 6168]
str d0, [x0]
ldr x0, [sp, 5824]
ldr d1, [x0]
ldr d0, [sp, 5496]
fmul d0, d1, d0
ldr x0, [sp, 6216]
str d0, [x0]
ldr x0, [sp, 6224]
ldr d1, [x0]
ldr x0, [sp, 5840]
ldr d2, [x0]
ldr d0, [sp, 5504]
fmul d0, d2, d0
fadd d0, d1, d0
ldr x0, [sp, 6224]
str d0, [x0]
ldr x0, [sp, 6152]
ldr d1, [x0]
ldr x0, [sp, 5848]
ldr d2, [x0]
ldr d0, [sp, 5504]
fmul d0, d2, d0
fadd d0, d1, d0
ldr x0, [sp, 6152]
str d0, [x0]
ldr x0, [sp, 6232]
ldr d1, [x0]
ldr x0, [sp, 5864]
ldr d2, [x0]
ldr d0, [sp, 5512]
fmul d0, d2, d0
fadd d0, d1, d0
ldr x0, [sp, 6232]
str d0, [x0]
ldr x0, [sp, 6152]
ldr d1, [x0]
ldr x0, [sp, 5872]
ldr d2, [x0]
ldr d0, [sp, 5512]
fmul d0, d2, d0
fadd d0, d1, d0
ldr x0, [sp, 6152]
str d0, [x0]
ldr x0, [sp, 6160]
ldr d1, [x0]
ldr x0, [sp, 5880]
ldr d2, [x0]
ldr d0, [sp, 5512]
fmul d0, d2, d0
fadd d0, d1, d0
ldr x0, [sp, 6160]
str d0, [x0]
ldr x0, [sp, 6168]
ldr d1, [x0]
ldr x0, [sp, 5888]
ldr d2, [x0]
ldr d0, [sp, 5512]
fmul d0, d2, d0
fadd d0, d1, d0
ldr x0, [sp, 6168]
str d0, [x0]
ldr x0, [sp, 6240]
ldr d1, [x0]
ldr x0, [sp, 5904]
ldr d2, [x0]
ldr d0, [sp, 5520]
fmul d0, d2, d0
fadd d0, d1, d0
ldr x0, [sp, 6240]
str d0, [x0]
ldr x0, [sp, 6152]
ldr d1, [x0]
ldr x0, [sp, 5912]
ldr d2, [x0]
ldr d0, [sp, 5520]
fmul d0, d2, d0
fadd d0, d1, d0
ldr x0, [sp, 6152]
str d0, [x0]
ldr x0, [sp, 6248]
ldr d1, [x0]
ldr x0, [sp, 5928]
ldr d2, [x0]
ldr d0, [sp, 5528]
fmul d0, d2, d0
fadd d0, d1, d0
ldr x0, [sp, 6248]
str d0, [x0]
ldr x0, [sp, 6152]
ldr d1, [x0]
ldr x0, [sp, 5936]
ldr d2, [x0]
ldr d0, [sp, 5528]
fmul d0, d2, d0
fadd d0, d1, d0
ldr x0, [sp, 6152]
str d0, [x0]
ldr x0, [sp, 6192]
ldr d1, [x0]
ldr x0, [sp, 5944]
ldr d2, [x0]
ldr d0, [sp, 5528]
fmul d0, d2, d0
fadd d0, d1, d0
ldr x0, [sp, 6192]
str d0, [x0]
ldr x0, [sp, 6168]
ldr d1, [x0]
ldr x0, [sp, 5952]
ldr d2, [x0]
ldr d0, [sp, 5528]
fmul d0, d2, d0
fadd d0, d1, d0
ldr x0, [sp, 6168]
str d0, [x0]
ldr d0, [sp, 1160]
fcmpe d0, #0.0
bgt .L162
b .L196
.L162:
ldr x0, [sp, 96]
ldr d1, [x0]
ldr d0, [sp, 1160]
fdiv d0, d1, d0
ldr x0, [sp, 6128]
str d0, [x0]
ldr d0, [sp, 1160]
fmov d1, 1.0e+0
fdiv d0, d1, d0
ldr x0, [sp, 6136]
str d0, [x0]
b .L119
.L196:
ldr x0, [sp, 6128]
str xzr, [x0]
ldr x0, [sp, 6136]
str xzr, [x0]
.L119:
ldr x0, [sp, 96]
ldr d1, [x0]
ldr d0, [sp, 1168]
fmul d0, d1, d0
ldr x0, [sp, 6256]
str d0, [x0]
ldr x0, [sp, 6264]
ldr d0, [sp, 1168]
str d0, [x0]
ldr x0, [sp, 6272]
ldr d1, [x0]
fmov d0, 1.0e+0
fcmp d1, d0
beq .L120
ldr x0, [sp, 6272]
ldr d1, [x0]
ldr x0, [sp, 5600]
ldr d0, [x0]
fmul d0, d1, d0
ldr x0, [sp, 5600]
str d0, [x0]
ldr x0, [sp, 6272]
ldr d1, [x0]
ldr x0, [sp, 5608]
ldr d0, [x0]
fmul d0, d1, d0
ldr x0, [sp, 5608]
str d0, [x0]
ldr x0, [sp, 6272]
ldr d1, [x0]
ldr x0, [sp, 5616]
ldr d0, [x0]
fmul d0, d1, d0
ldr x0, [sp, 5616]
str d0, [x0]
ldr x0, [sp, 6272]
ldr d1, [x0]
ldr x0, [sp, 5624]
ldr d0, [x0]
fmul d0, d1, d0
ldr x0, [sp, 5624]
str d0, [x0]
ldr x0, [sp, 6272]
ldr d1, [x0]
ldr x0, [sp, 5632]
ldr d0, [x0]
fmul d0, d1, d0
ldr x0, [sp, 5632]
str d0, [x0]
ldr x0, [sp, 6272]
ldr d1, [x0]
ldr x0, [sp, 5640]
ldr d0, [x0]
fmul d0, d1, d0
ldr x0, [sp, 5640]
str d0, [x0]
ldr x0, [sp, 6272]
ldr d1, [x0]
ldr x0, [sp, 5648]
ldr d0, [x0]
fmul d0, d1, d0
ldr x0, [sp, 5648]
str d0, [x0]
ldr x0, [sp, 6272]
ldr d1, [x0]
ldr x0, [sp, 5656]
ldr d0, [x0]
fmul d0, d1, d0
ldr x0, [sp, 5656]
str d0, [x0]
ldr x0, [sp, 6272]
ldr d1, [x0]
ldr x0, [sp, 5664]
ldr d0, [x0]
fmul d0, d1, d0
ldr x0, [sp, 5664]
str d0, [x0]
ldr x0, [sp, 6272]
ldr d1, [x0]
ldr x0, [sp, 5672]
ldr d0, [x0]
fmul d0, d1, d0
ldr x0, [sp, 5672]
str d0, [x0]
ldr x0, [sp, 6272]
ldr d1, [x0]
ldr x0, [sp, 5680]
ldr d0, [x0]
fmul d0, d1, d0
ldr x0, [sp, 5680]
str d0, [x0]
ldr x0, [sp, 6272]
ldr d1, [x0]
ldr x0, [sp, 5688]
ldr d0, [x0]
fmul d0, d1, d0
ldr x0, [sp, 5688]
str d0, [x0]
ldr x0, [sp, 6272]
ldr d1, [x0]
ldr x0, [sp, 5696]
ldr d0, [x0]
fmul d0, d1, d0
ldr x0, [sp, 5696]
str d0, [x0]
ldr x0, [sp, 6272]
ldr d1, [x0]
ldr x0, [sp, 5704]
ldr d0, [x0]
fmul d0, d1, d0
ldr x0, [sp, 5704]
str d0, [x0]
ldr x0, [sp, 6272]
ldr d1, [x0]
ldr x0, [sp, 5712]
ldr d0, [x0]
fmul d0, d1, d0
ldr x0, [sp, 5712]
str d0, [x0]
ldr x0, [sp, 6272]
ldr d1, [x0]
ldr x0, [sp, 5720]
ldr d0, [x0]
fmul d0, d1, d0
ldr x0, [sp, 5720]
str d0, [x0]
ldr x0, [sp, 6272]
ldr d1, [x0]
ldr x0, [sp, 5728]
ldr d0, [x0]
fmul d0, d1, d0
ldr x0, [sp, 5728]
str d0, [x0]
ldr x0, [sp, 6272]
ldr d1, [x0]
ldr x0, [sp, 5736]
ldr d0, [x0]
fmul d0, d1, d0
ldr x0, [sp, 5736]
str d0, [x0]
ldr x0, [sp, 6272]
ldr d1, [x0]
ldr x0, [sp, 5744]
ldr d0, [x0]
fmul d0, d1, d0
ldr x0, [sp, 5744]
str d0, [x0]
ldr x0, [sp, 6272]
ldr d1, [x0]
ldr x0, [sp, 5752]
ldr d0, [x0]
fmul d0, d1, d0
ldr x0, [sp, 5752]
str d0, [x0]
ldr x0, [sp, 6272]
ldr d1, [x0]
ldr x0, [sp, 5760]
ldr d0, [x0]
fmul d0, d1, d0
ldr x0, [sp, 5760]
str d0, [x0]
ldr x0, [sp, 6272]
ldr d1, [x0]
ldr x0, [sp, 5768]
ldr d0, [x0]
fmul d0, d1, d0
ldr x0, [sp, 5768]
str d0, [x0]
ldr x0, [sp, 6272]
ldr d1, [x0]
ldr x0, [sp, 5776]
ldr d0, [x0]
fmul d0, d1, d0
ldr x0, [sp, 5776]
str d0, [x0]
ldr x0, [sp, 6272]
ldr d1, [x0]
ldr x0, [sp, 5784]
ldr d0, [x0]
fmul d0, d1, d0
ldr x0, [sp, 5784]
str d0, [x0]
ldr x0, [sp, 6272]
ldr d1, [x0]
ldr x0, [sp, 5792]
ldr d0, [x0]
fmul d0, d1, d0
ldr x0, [sp, 5792]
str d0, [x0]
ldr x0, [sp, 6272]
ldr d1, [x0]
ldr x0, [sp, 5800]
ldr d0, [x0]
fmul d0, d1, d0
ldr x0, [sp, 5800]
str d0, [x0]
ldr x0, [sp, 6272]
ldr d1, [x0]
ldr x0, [sp, 5808]
ldr d0, [x0]
fmul d0, d1, d0
ldr x0, [sp, 5808]
str d0, [x0]
ldr x0, [sp, 6272]
ldr d1, [x0]
ldr x0, [sp, 5816]
ldr d0, [x0]
fmul d0, d1, d0
ldr x0, [sp, 5816]
str d0, [x0]
ldr x0, [sp, 6272]
ldr d1, [x0]
ldr x0, [sp, 5824]
ldr d0, [x0]
fmul d0, d1, d0
ldr x0, [sp, 5824]
str d0, [x0]
ldr x0, [sp, 6272]
ldr d1, [x0]
ldr x0, [sp, 5832]
ldr d0, [x0]
fmul d0, d1, d0
ldr x0, [sp, 5832]
str d0, [x0]
ldr x0, [sp, 6272]
ldr d1, [x0]
ldr x0, [sp, 5840]
ldr d0, [x0]
fmul d0, d1, d0
ldr x0, [sp, 5840]
str d0, [x0]
ldr x0, [sp, 6272]
ldr d1, [x0]
ldr x0, [sp, 5848]
ldr d0, [x0]
fmul d0, d1, d0
ldr x0, [sp, 5848]
str d0, [x0]
ldr x0, [sp, 6272]
ldr d1, [x0]
ldr x0, [sp, 5856]
ldr d0, [x0]
fmul d0, d1, d0
ldr x0, [sp, 5856]
str d0, [x0]
ldr x0, [sp, 6272]
ldr d1, [x0]
ldr x0, [sp, 5864]
ldr d0, [x0]
fmul d0, d1, d0
ldr x0, [sp, 5864]
str d0, [x0]
ldr x0, [sp, 6272]
ldr d1, [x0]
ldr x0, [sp, 5872]
ldr d0, [x0]
fmul d0, d1, d0
ldr x0, [sp, 5872]
str d0, [x0]
ldr x0, [sp, 6272]
ldr d1, [x0]
ldr x0, [sp, 5880]
ldr d0, [x0]
fmul d0, d1, d0
ldr x0, [sp, 5880]
str d0, [x0]
ldr x0, [sp, 6272]
ldr d1, [x0]
ldr x0, [sp, 5888]
ldr d0, [x0]
fmul d0, d1, d0
ldr x0, [sp, 5888]
str d0, [x0]
ldr x0, [sp, 6272]
ldr d1, [x0]
ldr x0, [sp, 5896]
ldr d0, [x0]
fmul d0, d1, d0
ldr x0, [sp, 5896]
str d0, [x0]
ldr x0, [sp, 6272]
ldr d1, [x0]
ldr x0, [sp, 5904]
ldr d0, [x0]
fmul d0, d1, d0
ldr x0, [sp, 5904]
str d0, [x0]
ldr x0, [sp, 6272]
ldr d1, [x0]
ldr x0, [sp, 5912]
ldr d0, [x0]
fmul d0, d1, d0
ldr x0, [sp, 5912]
str d0, [x0]
ldr x0, [sp, 6272]
ldr d1, [x0]
ldr x0, [sp, 5920]
ldr d0, [x0]
fmul d0, d1, d0
ldr x0, [sp, 5920]
str d0, [x0]
ldr x0, [sp, 6272]
ldr d1, [x0]
ldr x0, [sp, 5928]
ldr d0, [x0]
fmul d0, d1, d0
ldr x0, [sp, 5928]
str d0, [x0]
ldr x0, [sp, 6272]
ldr d1, [x0]
ldr x0, [sp, 5936]
ldr d0, [x0]
fmul d0, d1, d0
ldr x0, [sp, 5936]
str d0, [x0]
ldr x0, [sp, 6272]
ldr d1, [x0]
ldr x0, [sp, 5944]
ldr d0, [x0]
fmul d0, d1, d0
ldr x0, [sp, 5944]
str d0, [x0]
ldr x0, [sp, 6272]
ldr d1, [x0]
ldr x0, [sp, 5952]
ldr d0, [x0]
fmul d0, d1, d0
ldr x0, [sp, 5952]
str d0, [x0]
ldr x0, [sp, 6272]
ldr d1, [x0]
ldr x0, [sp, 5960]
ldr d0, [x0]
fmul d0, d1, d0
ldr x0, [sp, 5960]
str d0, [x0]
ldr x0, [sp, 6272]
ldr d1, [x0]
ldr x0, [sp, 5968]
ldr d0, [x0]
fmul d0, d1, d0
ldr x0, [sp, 5968]
str d0, [x0]
ldr x0, [sp, 6272]
ldr d1, [x0]
ldr x0, [sp, 5976]
ldr d0, [x0]
fmul d0, d1, d0
ldr x0, [sp, 5976]
str d0, [x0]
ldr x0, [sp, 6272]
ldr d1, [x0]
ldr x0, [sp, 5984]
ldr d0, [x0]
fmul d0, d1, d0
ldr x0, [sp, 5984]
str d0, [x0]
ldr x0, [sp, 6272]
ldr d1, [x0]
ldr x0, [sp, 5992]
ldr d0, [x0]
fmul d0, d1, d0
ldr x0, [sp, 5992]
str d0, [x0]
ldr x0, [sp, 6272]
ldr d1, [x0]
ldr x0, [sp, 6000]
ldr d0, [x0]
fmul d0, d1, d0
ldr x0, [sp, 6000]
str d0, [x0]
ldr x0, [sp, 6272]
ldr d1, [x0]
ldr x0, [sp, 6008]
ldr d0, [x0]
fmul d0, d1, d0
ldr x0, [sp, 6008]
str d0, [x0]
ldr x0, [sp, 6272]
ldr d1, [x0]
ldr x0, [sp, 6016]
ldr d0, [x0]
fmul d0, d1, d0
ldr x0, [sp, 6016]
str d0, [x0]
ldr x0, [sp, 6272]
ldr d1, [x0]
ldr x0, [sp, 6024]
ldr d0, [x0]
fmul d0, d1, d0
ldr x0, [sp, 6024]
str d0, [x0]
ldr x0, [sp, 6272]
ldr d1, [x0]
ldr x0, [sp, 6032]
ldr d0, [x0]
fmul d0, d1, d0
ldr x0, [sp, 6032]
str d0, [x0]
ldr x0, [sp, 6272]
ldr d1, [x0]
ldr x0, [sp, 6040]
ldr d0, [x0]
fmul d0, d1, d0
ldr x0, [sp, 6040]
str d0, [x0]
ldr x0, [sp, 6272]
ldr d1, [x0]
ldr x0, [sp, 6048]
ldr d0, [x0]
fmul d0, d1, d0
ldr x0, [sp, 6048]
str d0, [x0]
ldr x0, [sp, 6272]
ldr d1, [x0]
ldr x0, [sp, 6056]
ldr d0, [x0]
fmul d0, d1, d0
ldr x0, [sp, 6056]
str d0, [x0]
ldr x0, [sp, 6272]
ldr d1, [x0]
ldr x0, [sp, 6064]
ldr d0, [x0]
fmul d0, d1, d0
ldr x0, [sp, 6064]
str d0, [x0]
ldr x0, [sp, 6272]
ldr d1, [x0]
ldr x0, [sp, 6072]
ldr d0, [x0]
fmul d0, d1, d0
ldr x0, [sp, 6072]
str d0, [x0]
ldr x0, [sp, 6272]
ldr d1, [x0]
ldr x0, [sp, 6080]
ldr d0, [x0]
fmul d0, d1, d0
ldr x0, [sp, 6080]
str d0, [x0]
ldr x0, [sp, 6272]
ldr d1, [x0]
ldr x0, [sp, 6088]
ldr d0, [x0]
fmul d0, d1, d0
ldr x0, [sp, 6088]
str d0, [x0]
ldr x0, [sp, 6272]
ldr d1, [x0]
ldr x0, [sp, 6096]
ldr d0, [x0]
fmul d0, d1, d0
ldr x0, [sp, 6096]
str d0, [x0]
ldr x0, [sp, 6272]
ldr d1, [x0]
ldr x0, [sp, 6104]
ldr d0, [x0]
fmul d0, d1, d0
ldr x0, [sp, 6104]
str d0, [x0]
ldr x0, [sp, 6272]
ldr d1, [x0]
ldr x0, [sp, 6112]
ldr d0, [x0]
fmul d0, d1, d0
ldr x0, [sp, 6112]
str d0, [x0]
ldr x0, [sp, 6272]
ldr d1, [x0]
ldr x0, [sp, 6120]
ldr d0, [x0]
fmul d0, d1, d0
ldr x0, [sp, 6120]
str d0, [x0]
ldr x0, [sp, 6272]
ldr d1, [x0]
ldr x0, [sp, 6128]
ldr d0, [x0]
fmul d0, d1, d0
ldr x0, [sp, 6128]
str d0, [x0]
ldr x0, [sp, 6272]
ldr d1, [x0]
ldr x0, [sp, 6136]
ldr d0, [x0]
fmul d0, d1, d0
ldr x0, [sp, 6136]
str d0, [x0]
ldr x0, [sp, 6272]
ldr d1, [x0]
ldr x0, [sp, 6144]
ldr d0, [x0]
fmul d0, d1, d0
ldr x0, [sp, 6144]
str d0, [x0]
ldr x0, [sp, 6272]
ldr d1, [x0]
ldr x0, [sp, 6152]
ldr d0, [x0]
fmul d0, d1, d0
ldr x0, [sp, 6152]
str d0, [x0]
ldr x0, [sp, 6272]
ldr d1, [x0]
ldr x0, [sp, 6160]
ldr d0, [x0]
fmul d0, d1, d0
ldr x0, [sp, 6160]
str d0, [x0]
ldr x0, [sp, 6272]
ldr d1, [x0]
ldr x0, [sp, 6168]
ldr d0, [x0]
fmul d0, d1, d0
ldr x0, [sp, 6168]
str d0, [x0]
ldr x0, [sp, 6272]
ldr d1, [x0]
ldr x0, [sp, 6176]
ldr d0, [x0]
fmul d0, d1, d0
ldr x0, [sp, 6176]
str d0, [x0]
ldr x0, [sp, 6272]
ldr d1, [x0]
ldr x0, [sp, 6184]
ldr d0, [x0]
fmul d0, d1, d0
ldr x0, [sp, 6184]
str d0, [x0]
ldr x0, [sp, 6272]
ldr d1, [x0]
ldr x0, [sp, 6192]
ldr d0, [x0]
fmul d0, d1, d0
ldr x0, [sp, 6192]
str d0, [x0]
ldr x0, [sp, 6272]
ldr d1, [x0]
ldr x0, [sp, 6200]
ldr d0, [x0]
fmul d0, d1, d0
ldr x0, [sp, 6200]
str d0, [x0]
ldr x0, [sp, 6272]
ldr d1, [x0]
ldr x0, [sp, 6208]
ldr d0, [x0]
fmul d0, d1, d0
ldr x0, [sp, 6208]
str d0, [x0]
ldr x0, [sp, 6272]
ldr d1, [x0]
ldr x0, [sp, 6216]
ldr d0, [x0]
fmul d0, d1, d0
ldr x0, [sp, 6216]
str d0, [x0]
ldr x0, [sp, 6272]
ldr d1, [x0]
ldr x0, [sp, 6224]
ldr d0, [x0]
fmul d0, d1, d0
ldr x0, [sp, 6224]
str d0, [x0]
ldr x0, [sp, 6272]
ldr d1, [x0]
ldr x0, [sp, 6232]
ldr d0, [x0]
fmul d0, d1, d0
ldr x0, [sp, 6232]
str d0, [x0]
ldr x0, [sp, 6272]
ldr d1, [x0]
ldr x0, [sp, 6240]
ldr d0, [x0]
fmul d0, d1, d0
ldr x0, [sp, 6240]
str d0, [x0]
ldr x0, [sp, 6272]
ldr d1, [x0]
ldr x0, [sp, 6248]
ldr d0, [x0]
fmul d0, d1, d0
ldr x0, [sp, 6248]
str d0, [x0]
ldr x0, [sp, 6272]
ldr d1, [x0]
ldr x0, [sp, 6256]
ldr d0, [x0]
fmul d0, d1, d0
ldr x0, [sp, 6256]
str d0, [x0]
ldr x0, [sp, 6272]
ldr d1, [x0]
ldr x0, [sp, 6264]
ldr d0, [x0]
fmul d0, d1, d0
ldr x0, [sp, 6264]
str d0, [x0]
.L120:
mov w0, 0
ldp d8, d9, [sp, 16]
ldp d10, d11, [sp, 32]
ldp x29, x30, [sp]
mov x12, 5536
add sp, sp, x12
.cfi_restore 29
.cfi_restore 30
.cfi_restore 74
.cfi_restore 75
.cfi_restore 72
.cfi_restore 73
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size vbic_3T_et_cf_fj, .-vbic_3T_et_cf_fj
.section .rodata
.align 3
.LC0:
.word 1717986918
.word 1081152102
.align 3
.LC1:
.word 571800559
.word 993046769
.align 3
.LC2:
.word 515404814
.word 1007133926
.align 3
.LC3:
.word -250261953
.word 1058445056
.align 3
.LC4:
.word -350469331
.word 1058682594
.align 3
.LC5:
.word -500134854
.word 1044740494
.align 3
.LC6:
.word 1202590843
.word 1065646817
.align 3
.LC7:
.word 1889785610
.word 1073154621
.align 3
.LC8:
.word 1985772975
.word 1072052451
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global reach_error
.type reach_error, %function
reach_error:
.LFB0:
.cfi_startproc
nop
ret
.cfi_endproc
.LFE0:
.size reach_error, .-reach_error
.align 2
.global gcd
.type gcd, %function
gcd:
.LFB1:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str w0, [sp, 28]
str w1, [sp, 24]
ldr w0, [sp, 28]
cmp w0, 0
ble .L3
ldr w0, [sp, 24]
cmp w0, 0
bgt .L4
.L3:
mov w0, 0
b .L5
.L4:
ldr w1, [sp, 28]
ldr w0, [sp, 24]
cmp w1, w0
bne .L6
ldr w0, [sp, 28]
b .L5
.L6:
ldr w1, [sp, 28]
ldr w0, [sp, 24]
cmp w1, w0
ble .L7
ldr w1, [sp, 28]
ldr w0, [sp, 24]
sub w0, w1, w0
ldr w1, [sp, 24]
bl gcd
b .L5
.L7:
ldr w1, [sp, 24]
ldr w0, [sp, 28]
sub w0, w1, w0
mov w1, w0
ldr w0, [sp, 28]
bl gcd
.L5:
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE1:
.size gcd, .-gcd
.align 2
.global main
.type main, %function
main:
.LFB2:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
bl __VERIFIER_nondet_int
str w0, [sp, 20]
ldr w0, [sp, 20]
cmp w0, 0
bgt .L9
mov w0, 0
b .L10
.L9:
bl __VERIFIER_nondet_int
str w0, [sp, 24]
ldr w0, [sp, 24]
cmp w0, 0
bgt .L11
mov w0, 0
b .L10
.L11:
ldr w1, [sp, 24]
ldr w0, [sp, 20]
bl gcd
str w0, [sp, 28]
ldr w0, [sp, 28]
cmp w0, 0
bgt .L12
ldr w0, [sp, 20]
cmp w0, 0
ble .L12
ldr w0, [sp, 24]
cmp w0, 0
bgt .L14
.L12:
mov w0, 0
b .L10
.L14:
mov w0, 0
.L10:
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE2:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC0:
.string "Error while calling fork #1"
.align 3
.LC1:
.string "Error while calling fork #2"
.align 3
.LC2:
.string "substring"
.align 3
.LC3:
.string "./substring.out"
.align 3
.LC4:
.string "case_swap"
.align 3
.LC5:
.string "./case_swap.out"
.text
.align 2
.global main
.type main, %function
main:
.LFB6:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 40]
mov x1, 0
bl fork
cmn w0, #1
beq .L2
cmp w0, 0
beq .L3
b .L4
.L2:
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl puts
mov w0, 1
bl exit
.L3:
add x0, sp, 32
bl pipe
bl fork
cmn w0, #1
beq .L5
cmp w0, 0
beq .L6
b .L9
.L5:
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl puts
mov w0, 2
bl exit
.L6:
mov w0, 0
bl close
ldr w0, [sp, 32]
bl dup
ldr w0, [sp, 32]
bl close
ldr w0, [sp, 36]
bl close
mov w2, 0
adrp x0, .LC2
add x1, x0, :lo12:.LC2
adrp x0, .LC3
add x0, x0, :lo12:.LC3
bl execl
mov w0, 0
bl exit
.L9:
mov w0, 1
bl close
ldr w0, [sp, 36]
bl dup
ldr w0, [sp, 36]
bl close
ldr w0, [sp, 32]
bl close
mov w2, 0
adrp x0, .LC4
add x1, x0, :lo12:.LC4
adrp x0, .LC5
add x0, x0, :lo12:.LC5
bl execl
.L4:
add x0, sp, 28
bl wait
mov w0, 0
bl exit
.cfi_endproc
.LFE6:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global test_input
.type test_input, %function
test_input:
.LFB6:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str w0, [sp, 28]
str x1, [sp, 16]
str wzr, [sp, 44]
ldr w0, [sp, 28]
cmp w0, 2
bne .L2
ldr x0, [sp, 16]
add x0, x0, 8
ldr x0, [x0]
cmp x0, 0
beq .L2
ldr x0, [sp, 16]
add x0, x0, 8
ldr x0, [x0]
bl strlen
str w0, [sp, 44]
b .L3
.L2:
ldr w0, [sp, 28]
cmp w0, 2
ble .L3
mov w0, -1
b .L4
.L3:
ldr w0, [sp, 44]
.L4:
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE6:
.size test_input, .-test_input
.align 2
.global load_input
.type load_input, %function
load_input:
.LFB7:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str x19, [sp, 16]
.cfi_offset 19, -48
str x0, [sp, 40]
str x1, [sp, 32]
str wzr, [sp, 60]
b .L6
.L7:
ldr x0, [sp, 40]
add x0, x0, 8
ldr x1, [x0]
ldr w0, [sp, 60]
add x0, x1, x0
ldrb w0, [x0]
bl toupper
mov w2, w0
ldr w0, [sp, 60]
ldr x1, [sp, 32]
add x0, x1, x0
and w1, w2, 255
strb w1, [x0]
ldr w0, [sp, 60]
add w0, w0, 1
str w0, [sp, 60]
.L6:
ldr w19, [sp, 60]
ldr x0, [sp, 40]
add x0, x0, 8
ldr x0, [x0]
bl strlen
cmp x19, x0
bcc .L7
ldr w0, [sp, 60]
ldr x1, [sp, 32]
add x0, x1, x0
strb wzr, [x0]
nop
ldr x19, [sp, 16]
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_restore 19
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE7:
.size load_input, .-load_input
.section .rodata
.align 3
.LC0:
.string "Warning: Some of city name is longer than 100 characters! Rest of characters in that name will be dropped!\n"
.text
.align 2
.global load_cities
.type load_cities, %function
load_cities:
.LFB8:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
str wzr, [sp, 32]
str wzr, [sp, 36]
str wzr, [sp, 40]
str wzr, [sp, 44]
b .L9
.L15:
ldr w0, [sp, 32]
cmp w0, 31
ble .L11
ldr w0, [sp, 32]
cmp w0, 126
ble .L12
.L11:
mov w0, -1
b .L13
.L12:
ldr w0, [sp, 36]
cmp w0, 99
bgt .L14
ldrsw x1, [sp, 40]
mov x0, 101
mul x0, x1, x0
ldr x1, [sp, 24]
add x1, x1, x0
ldr w0, [sp, 32]
and w2, w0, 255
ldrsw x0, [sp, 36]
strb w2, [x1, x0]
.L14:
ldr w0, [sp, 36]
add w0, w0, 1
str w0, [sp, 36]
bl getchar
bl toupper
str w0, [sp, 32]
.L10:
ldr w0, [sp, 32]
cmp w0, 10
bne .L15
ldr w0, [sp, 36]
cmp w0, 100
ble .L16
ldrsw x1, [sp, 40]
mov x0, 101
mul x0, x1, x0
ldr x1, [sp, 24]
add x0, x1, x0
strb wzr, [x0, 100]
ldr w0, [sp, 44]
cmp w0, 0
bne .L17
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x0, [x0]
mov x3, x0
mov x2, 107
mov x1, 1
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl fwrite
mov w0, 1
str w0, [sp, 44]
b .L17
.L16:
ldrsw x1, [sp, 40]
mov x0, 101
mul x0, x1, x0
ldr x1, [sp, 24]
add x1, x1, x0
ldrsw x0, [sp, 36]
strb wzr, [x1, x0]
.L17:
str wzr, [sp, 36]
ldr w0, [sp, 40]
add w0, w0, 1
str w0, [sp, 40]
.L9:
bl getchar
bl toupper
str w0, [sp, 32]
ldr w0, [sp, 32]
cmn w0, #1
bne .L10
ldr w0, [sp, 40]
.L13:
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE8:
.size load_cities, .-load_cities
.align 2
.global sort
.type sort, %function
sort:
.LFB9:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str x0, [sp, 8]
str w1, [sp, 4]
str wzr, [sp, 24]
b .L20
.L24:
str wzr, [sp, 28]
b .L21
.L23:
ldrsw x0, [sp, 24]
ldr x1, [sp, 8]
add x0, x1, x0
ldrb w1, [x0]
ldrsw x0, [sp, 28]
ldr x2, [sp, 8]
add x0, x2, x0
ldrb w0, [x0]
cmp w1, w0
bcs .L22
ldrsw x0, [sp, 24]
ldr x1, [sp, 8]
add x0, x1, x0
ldrb w0, [x0]
strb w0, [sp, 23]
ldrsw x0, [sp, 28]
ldr x1, [sp, 8]
add x1, x1, x0
ldrsw x0, [sp, 24]
ldr x2, [sp, 8]
add x0, x2, x0
ldrb w1, [x1]
strb w1, [x0]
ldrsw x0, [sp, 28]
ldr x1, [sp, 8]
add x0, x1, x0
ldrb w1, [sp, 23]
strb w1, [x0]
.L22:
ldr w0, [sp, 28]
add w0, w0, 1
str w0, [sp, 28]
.L21:
ldr w1, [sp, 28]
ldr w0, [sp, 4]
cmp w1, w0
blt .L23
ldr w0, [sp, 24]
add w0, w0, 1
str w0, [sp, 24]
.L20:
ldr w1, [sp, 24]
ldr w0, [sp, 4]
cmp w1, w0
blt .L24
nop
nop
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE9:
.size sort, .-sort
.section .rodata
.align 3
.LC1:
.string "Enable: "
.text
.align 2
.global print_enable
.type print_enable, %function
print_enable:
.LFB10:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
str w1, [sp, 20]
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl printf
str wzr, [sp, 44]
b .L26
.L27:
ldrsw x0, [sp, 44]
ldr x1, [sp, 24]
add x0, x1, x0
ldrb w0, [x0]
bl putchar
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L26:
ldr w1, [sp, 44]
ldr w0, [sp, 20]
cmp w1, w0
blt .L27
mov w0, 10
bl putchar
nop
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE10:
.size print_enable, .-print_enable
.section .rodata
.align 3
.LC2:
.string "Error: Invalid input!\n"
.align 3
.LC3:
.string "Warning: No input parameter detected!\n"
.align 3
.LC4:
.string "Error: Cities count is bigger than 42! Program won't accept it!\n"
.align 3
.LC5:
.string "Error: Cities input is not valid ASCII characters!\n"
.align 3
.LC6:
.string "Found: %s\n"
.align 3
.LC7:
.string "Not found"
.text
.align 2
.global main
.type main, %function
main:
.LFB11:
.cfi_startproc
mov x12, 4544
sub sp, sp, x12
.cfi_def_cfa_offset 4544
stp x29, x30, [sp, 16]
.cfi_offset 29, -4528
.cfi_offset 30, -4520
add x29, sp, 16
.cfi_def_cfa 29, 4528
stp x19, x20, [sp, 32]
stp x21, x22, [sp, 48]
stp x23, x24, [sp, 64]
stp x25, x26, [sp, 80]
stp x27, x28, [sp, 96]
.cfi_offset 19, -4512
.cfi_offset 20, -4504
.cfi_offset 21, -4496
.cfi_offset 22, -4488
.cfi_offset 23, -4480
.cfi_offset 24, -4472
.cfi_offset 25, -4464
.cfi_offset 26, -4456
.cfi_offset 27, -4448
.cfi_offset 28, -4440
str w0, [x29, 172]
str x1, [x29, 160]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [x29, 4520]
mov x1, 0
mov x0, sp
mov x28, x0
str wzr, [x29, 232]
ldr x1, [x29, 160]
ldr w0, [x29, 172]
bl test_input
str w0, [x29, 236]
ldr w0, [x29, 236]
sxtw x1, w0
sub x1, x1, #1
str x1, [x29, 240]
sxtw x1, w0
str x1, [x29, 144]
str xzr, [x29, 152]
ldp x2, x3, [x29, 144]
mov x1, x2
lsr x1, x1, 61
mov x4, x3
lsl x27, x4, 3
orr x27, x1, x27
mov x1, x2
lsl x26, x1, 3
sxtw x1, w0
str x1, [x29, 128]
str xzr, [x29, 136]
ldp x2, x3, [x29, 128]
mov x1, x2
lsr x1, x1, 61
mov x4, x3
lsl x25, x4, 3
orr x25, x1, x25
mov x1, x2
lsl x24, x1, 3
sxtw x0, w0
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L29:
cmp sp, x1
beq .L30
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L29
.L30:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L31
str xzr, [sp, 1024]
.L31:
add x0, sp, 16
add x0, x0, 0
str x0, [x29, 248]
ldr w0, [x29, 236]
cmp w0, 0
ble .L32
ldr x1, [x29, 248]
ldr x0, [x29, 160]
bl load_input
b .L33
.L32:
ldr w0, [x29, 236]
cmn w0, #1
bne .L34
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x0, [x0]
mov x3, x0
mov x2, 22
mov x1, 1
adrp x0, .LC2
add x0, x0, :lo12:.LC2
bl fwrite
mov w0, 1
b .L35
.L34:
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x0, [x0]
mov x3, x0
mov x2, 38
mov x1, 1
adrp x0, .LC3
add x0, x0, :lo12:.LC3
bl fwrite
.L33:
add x0, x29, 272
bl load_cities
str w0, [x29, 232]
ldr w0, [x29, 232]
cmp w0, 42
ble .L36
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x0, [x0]
mov x3, x0
mov x2, 64
mov x1, 1
adrp x0, .LC4
add x0, x0, :lo12:.LC4
bl fwrite
mov w0, 1
b .L35
.L36:
ldr w0, [x29, 232]
cmn w0, #1
bne .L37
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x0, [x0]
mov x3, x0
mov x2, 51
mov x1, 1
adrp x0, .LC5
add x0, x0, :lo12:.LC5
bl fwrite
mov w0, 1
b .L35
.L37:
ldr w0, [x29, 232]
add w0, w0, 1
sxtw x1, w0
sub x1, x1, #1
str x1, [x29, 256]
sxtw x1, w0
str x1, [x29, 112]
str xzr, [x29, 120]
ldp x2, x3, [x29, 112]
mov x1, x2
lsr x1, x1, 61
mov x4, x3
lsl x23, x4, 3
orr x23, x1, x23
mov x1, x2
lsl x22, x1, 3
sxtw x1, w0
str x1, [x29, 96]
str xzr, [x29, 104]
ldp x2, x3, [x29, 96]
mov x1, x2
lsr x1, x1, 61
mov x4, x3
lsl x21, x4, 3
orr x21, x1, x21
mov x1, x2
lsl x20, x1, 3
sxtw x0, w0
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L38:
cmp sp, x1
beq .L39
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L38
.L39:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L40
str xzr, [sp, 1024]
.L40:
add x0, sp, 16
add x0, x0, 0
str x0, [x29, 264]
str wzr, [x29, 188]
str wzr, [x29, 192]
str wzr, [x29, 196]
str wzr, [x29, 200]
str wzr, [x29, 204]
b .L41
.L56:
add x1, x29, 272
ldrsw x2, [x29, 192]
mov x0, 101
mul x0, x2, x0
add x0, x1, x0
bl strlen
mov x19, x0
ldr x0, [x29, 248]
bl strlen
cmp x19, x0
bne .L42
mov w0, 1
str w0, [x29, 208]
str wzr, [x29, 212]
b .L43
.L46:
ldr x1, [x29, 248]
ldrsw x0, [x29, 212]
ldrb w1, [x1, x0]
ldrsw x0, [x29, 212]
ldrsw x3, [x29, 192]
mov x2, 101
mul x2, x3, x2
add x2, x2, 4096
add x2, x2, 368
add x3, x29, 64
add x2, x2, x3
add x0, x2, x0
sub x0, x0, #8192
ldrb w0, [x0, 3936]
cmp w1, w0
beq .L44
str wzr, [x29, 208]
b .L45
.L44:
ldr w0, [x29, 212]
add w0, w0, 1
str w0, [x29, 212]
.L43:
ldrsw x0, [x29, 212]
ldrsw x2, [x29, 192]
mov x1, 101
mul x1, x2, x1
add x1, x1, 4096
add x1, x1, 368
add x2, x29, 64
add x1, x1, x2
add x0, x1, x0
sub x0, x0, #8192
ldrb w0, [x0, 3936]
cmp w0, 0
bne .L46
.L45:
ldr w0, [x29, 208]
cmp w0, 1
bne .L47
ldr w0, [x29, 236]
cmp w0, 0
beq .L47
ldr w0, [x29, 196]
cmp w0, 0
bne .L47
mov w0, 1
str w0, [x29, 196]
ldr x1, [x29, 248]
adrp x0, .LC6
add x0, x0, :lo12:.LC6
bl printf
b .L47
.L42:
add x1, x29, 272
ldrsw x2, [x29, 192]
mov x0, 101
mul x0, x2, x0
add x0, x1, x0
bl strlen
mov x19, x0
ldr x0, [x29, 248]
bl strlen
cmp x19, x0
bls .L47
mov w0, 1
str w0, [x29, 216]
str wzr, [x29, 220]
b .L48
.L51:
ldr x1, [x29, 248]
ldrsw x0, [x29, 220]
ldrb w1, [x1, x0]
ldrsw x0, [x29, 220]
ldrsw x3, [x29, 192]
mov x2, 101
mul x2, x3, x2
add x2, x2, 4096
add x2, x2, 368
add x3, x29, 64
add x2, x2, x3
add x0, x2, x0
sub x0, x0, #8192
ldrb w0, [x0, 3936]
cmp w1, w0
beq .L49
str wzr, [x29, 216]
b .L50
.L49:
ldr w0, [x29, 220]
add w0, w0, 1
str w0, [x29, 220]
.L48:
ldr x1, [x29, 248]
ldrsw x0, [x29, 220]
ldrb w0, [x1, x0]
cmp w0, 0
bne .L51
.L50:
ldr w0, [x29, 216]
cmp w0, 1
bne .L47
ldr w0, [x29, 200]
add w0, w0, 1
str w0, [x29, 200]
ldr w0, [x29, 192]
str w0, [x29, 204]
str wzr, [x29, 224]
str wzr, [x29, 228]
b .L52
.L55:
ldr x1, [x29, 264]
ldrsw x0, [x29, 228]
ldrb w1, [x1, x0]
ldrsw x0, [x29, 220]
ldrsw x3, [x29, 192]
mov x2, 101
mul x2, x3, x2
add x2, x2, 4096
add x2, x2, 368
add x3, x29, 64
add x2, x2, x3
add x0, x2, x0
sub x0, x0, #8192
ldrb w0, [x0, 3936]
cmp w1, w0
bne .L53
mov w0, 1
str w0, [x29, 224]
b .L54
.L53:
ldr w0, [x29, 228]
add w0, w0, 1
str w0, [x29, 228]
.L52:
ldr w1, [x29, 228]
ldr w0, [x29, 188]
cmp w1, w0
blt .L55
.L54:
ldr w0, [x29, 224]
cmp w0, 0
bne .L47
ldr w0, [x29, 188]
add w1, w0, 1
str w1, [x29, 188]
ldrsw x1, [x29, 220]
ldrsw x3, [x29, 192]
mov x2, 101
mul x2, x3, x2
add x2, x2, 4096
add x2, x2, 368
add x3, x29, 64
add x2, x2, x3
add x1, x2, x1
sub x1, x1, #8192
ldrb w2, [x1, 3936]
ldr x1, [x29, 264]
sxtw x0, w0
strb w2, [x1, x0]
.L47:
ldr w0, [x29, 192]
add w0, w0, 1
str w0, [x29, 192]
.L41:
ldr w1, [x29, 192]
ldr w0, [x29, 232]
cmp w1, w0
blt .L56
ldr w0, [x29, 200]
cmp w0, 1
bne .L57
ldr w0, [x29, 196]
cmp w0, 0
bne .L57
add x1, x29, 272
ldrsw x2, [x29, 204]
mov x0, 101
mul x0, x2, x0
add x0, x1, x0
mov x1, x0
adrp x0, .LC6
add x0, x0, :lo12:.LC6
bl printf
b .L58
.L57:
ldr w0, [x29, 188]
cmp w0, 0
ble .L59
ldr w1, [x29, 188]
ldr x0, [x29, 264]
bl sort
ldr w1, [x29, 188]
ldr x0, [x29, 264]
bl print_enable
b .L58
.L59:
ldr w0, [x29, 196]
cmp w0, 0
bne .L58
adrp x0, .LC7
add x0, x0, :lo12:.LC7
bl puts
.L58:
mov w0, 0
.L35:
mov sp, x28
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [x29, 4520]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L61
bl __stack_chk_fail
.L61:
mov w0, w1
sub sp, x29, #16
.cfi_def_cfa 31, 4544
ldp x19, x20, [sp, 32]
ldp x21, x22, [sp, 48]
ldp x23, x24, [sp, 64]
ldp x25, x26, [sp, 80]
ldp x27, x28, [sp, 96]
ldp x29, x30, [sp, 16]
mov x12, 4544
add sp, sp, x12
.cfi_restore 29
.cfi_restore 30
.cfi_restore 27
.cfi_restore 28
.cfi_restore 25
.cfi_restore 26
.cfi_restore 23
.cfi_restore 24
.cfi_restore 21
.cfi_restore 22
.cfi_restore 19
.cfi_restore 20
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE11:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global MYMODULE
.type MYMODULE, %function
MYMODULE:
.LFB0:
.cfi_startproc
nop
ret
.cfi_endproc
.LFE0:
.size MYMODULE, .-MYMODULE
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC0:
.string "%d"
.align 3
.LC1:
.string "%x"
.text
.align 2
.global main
.type main, %function
main:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 56]
mov x1, 0
str wzr, [sp, 24]
str wzr, [sp, 32]
str wzr, [sp, 36]
add x0, sp, 20
mov x1, x0
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl __isoc99_scanf
b .L2
.L9:
ldr w0, [sp, 20]
str w0, [sp, 28]
b .L3
.L4:
ldr w0, [sp, 28]
negs w1, w0
and w0, w0, 15
and w1, w1, 15
csneg w0, w0, w1, mi
and w2, w0, 255
ldrsw x0, [sp, 32]
add x1, sp, 40
strb w2, [x1, x0]
ldr w0, [sp, 28]
add w1, w0, 15
cmp w0, 0
csel w0, w1, w0, lt
asr w0, w0, 4
str w0, [sp, 28]
ldr w0, [sp, 32]
add w0, w0, 1
str w0, [sp, 32]
.L3:
ldr w0, [sp, 28]
cmp w0, 0
bgt .L4
b .L5
.L8:
ldrsw x0, [sp, 36]
add x1, sp, 40
ldrb w1, [x1, x0]
ldr w0, [sp, 32]
sub w0, w0, #1
sxtw x0, w0
add x2, sp, 40
ldrb w0, [x2, x0]
cmp w1, w0
bne .L12
ldr w0, [sp, 36]
add w0, w0, 1
str w0, [sp, 36]
ldr w0, [sp, 32]
sub w0, w0, #1
str w0, [sp, 32]
ldr w0, [sp, 36]
add w0, w0, 1
ldr w1, [sp, 32]
cmp w1, w0
bgt .L5
mov w0, 1
str w0, [sp, 24]
.L5:
ldr w1, [sp, 36]
ldr w0, [sp, 32]
cmp w1, w0
blt .L8
b .L7
.L12:
nop
.L7:
str wzr, [sp, 32]
str wzr, [sp, 36]
ldr w0, [sp, 24]
cmp w0, 0
bne .L2
ldr w0, [sp, 20]
add w0, w0, 1
str w0, [sp, 20]
.L2:
ldr w0, [sp, 24]
cmp w0, 0
beq .L9
ldr w0, [sp, 20]
mov w1, w0
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl printf
mov w0, 0
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 56]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L11
bl __stack_chk_fail
.L11:
mov w0, w1
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC0:
.string "\n Entre com numero:"
.align 3
.LC1:
.string "%d"
.text
.align 2
.global main
.type main, %function
main:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -448]!
.cfi_def_cfa_offset 448
.cfi_offset 29, -448
.cfi_offset 30, -440
mov x29, sp
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 440]
mov x1, 0
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl printf
add x0, sp, 24
mov x1, x0
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl __isoc99_scanf
str wzr, [sp, 28]
b .L2
.L3:
ldr w0, [sp, 28]
add w2, w0, 1
ldrsw x0, [sp, 28]
lsl x0, x0, 2
add x1, sp, 40
str w2, [x1, x0]
ldr w0, [sp, 28]
add w0, w0, 1
str w0, [sp, 28]
.L2:
ldr w0, [sp, 24]
ldr w1, [sp, 28]
cmp w1, w0
blt .L3
ldr w0, [sp, 24]
str w0, [sp, 32]
str wzr, [sp, 28]
b .L4
.L7:
ldr w0, [sp, 28]
str w0, [sp, 36]
b .L5
.L6:
ldr w0, [sp, 36]
add w0, w0, 1
mov w1, w0
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl printf
ldr w0, [sp, 36]
add w0, w0, 1
str w0, [sp, 36]
.L5:
ldr w1, [sp, 36]
ldr w0, [sp, 32]
cmp w1, w0
blt .L6
mov w0, 10
bl putchar
ldr w0, [sp, 28]
add w0, w0, 1
str w0, [sp, 28]
ldr w0, [sp, 32]
sub w0, w0, #1
str w0, [sp, 32]
.L4:
ldr w1, [sp, 28]
ldr w0, [sp, 32]
cmp w1, w0
ble .L7
mov w0, 0
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 440]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L9
bl __stack_chk_fail
.L9:
mov w0, w1
ldp x29, x30, [sp], 448
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global ft_str_is_printable
.type ft_str_is_printable, %function
ft_str_is_printable:
.LFB0:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str x0, [sp, 8]
str wzr, [sp, 28]
b .L2
.L6:
ldrsw x0, [sp, 28]
ldr x1, [sp, 8]
add x0, x1, x0
ldrb w0, [x0]
cmp w0, 31
bls .L3
ldrsw x0, [sp, 28]
ldr x1, [sp, 8]
add x0, x1, x0
ldrb w0, [x0]
cmp w0, 126
bls .L4
.L3:
mov w0, 0
b .L5
.L4:
ldr w0, [sp, 28]
add w0, w0, 1
str w0, [sp, 28]
.L2:
ldrsw x0, [sp, 28]
ldr x1, [sp, 8]
add x0, x1, x0
ldrb w0, [x0]
cmp w0, 0
bne .L6
mov w0, 1
.L5:
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size ft_str_is_printable, .-ft_str_is_printable
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.global CLSID_GPMMapEntry
.section .rodata
.align 3
.type CLSID_GPMMapEntry, %object
.size CLSID_GPMMapEntry, 24
CLSID_GPMMapEntry:
.xword 2358727251
.hword 21553
.hword 17521
.ascii "\263]\006&\311(%\212"
.zero 4
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global main
.type main, %function
main:
.LFB0:
.cfi_startproc
mov w0, 0
ret
.cfi_endproc
.LFE0:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC0:
.string "%d %d"
.align 3
.LC1:
.string "X = %d\n"
.text
.align 2
.global main
.type main, %function
main:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 24]
mov x1, 0
add x1, sp, 20
add x0, sp, 16
mov x2, x1
mov x1, x0
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl __isoc99_scanf
ldr w1, [sp, 16]
ldr w0, [sp, 20]
add w0, w1, w0
mov w1, w0
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl printf
mov w0, 0
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 24]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L3
bl __stack_chk_fail
.L3:
mov w0, w1
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC0:
.string "a"
.align 3
.LC1:
.string "log.tmp"
.align 3
.LC2:
.string "hello world."
.text
.align 2
.global main
.type main, %function
main:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -16]!
.cfi_def_cfa_offset 16
.cfi_offset 29, -16
.cfi_offset 30, -8
mov x29, sp
adrp x0, :got:stdout
ldr x0, [x0, #:got_lo12:stdout]
ldr x0, [x0]
mov x2, x0
adrp x0, .LC0
add x1, x0, :lo12:.LC0
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl freopen
adrp x0, .LC2
add x0, x0, :lo12:.LC2
bl puts
mov w0, 0
ldp x29, x30, [sp], 16
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.data
.align 3
.type g_u16PixelData, %object
.size g_u16PixelData, 9600
g_u16PixelData:
.string "\017\376\340\017\376\340\017\376\340\017\376\340\017\376\340\017\376\340\017\376\340\017\376\340\017\376\340\017\376\340\001\036\340\001\036\340\001\036\340\001"
.string "<\300\003<\300\003<\300\003<\300\003<\300\003<\300\003<\300\003<\300\003<\300\003<\300\003<\300\003<\300\003<\300\003"
.string "x\200\007x\200\007x\200\007x\200\007x\200\007x\200\007x\200\007x\200\007x\200\007x\200\007x\200\007x\200\007x\200\007"
.string "\360"
.string "\017\360"
.string "\017\360"
.string "\017\360"
.string "\017\360"
.string "\017\360"
.string "\017\360"
.string "\017\360"
.string "\017\360"
.string "\017\360"
.string "\017\360"
.string "\017\360"
.string "\017\360"
.string "\017"
.string "\340\001\036\340\001\036\340\001\036\340\001\036\340\001\036\340\001\036\340\001\036\340\001\036\340\001\036\340\001\036\340\001\036\340\001\036\340\001\036"
.string "\300\003<\300\003<\300\003<\300\003<\300\003<\300\003<\300\003<\300\003<\300\003<\300\003<\300\003<\300\003<\300\003<"
.string "\200\007x\200\007x\200\007x\200\007x\200\007x\200\007x\200\007x\200\007x\200\007x\200\007x\200\007x\200\007x\200\007x"
.string ""
.string "\017\360"
.string "\017\360"
.string "\017\360"
.string "\017\360"
.string "\017\360"
.string "\017\360"
.string "\017\360"
.string "\017\360"
.string "\017\360"
.string "\017\360"
.string "\017\360"
.string "\017\360"
.string "\017\360"
.string ""
.string "\036\340\001\036\340\001\036\340\001\036\340\001\036\340\001\036\340\001\036\340\001\036\340\001\036\340\001\036\340\001\036\340\001\036\340\001\036\340\001"
.string "<\300\003<\300\003<\300\003<\300\003<\300\003<\300\003<\300\003<\300\003<\300\003<\300\003<\300\003<\300\003<\300\003"
.string "x\200\007x\200\007x\200\007x\200\007x\200\007x\200\007x\200\007x\200\007x\200\007x\200\007x\200\007x\200\007x\200\007"
.string "\360"
.string "\017\360"
.string "\017\360"
.string "\017\360"
.string "\017\360"
.string "\017\360"
.string "\017\360"
.string "\017\360"
.string "\017\360"
.string "\017\360"
.string "\017\360"
.string "\017\360"
.string "\017\360"
.string "\017"
.string "\340\001\036\340\001\036\340\001\036\340\001\036\340\001\036\340\001\036\340\001\036\340\001\036\340\001\036\340\001\036\340\001\036\340\001\036\340\001\036"
.string "\300\003<\300\003<\300\003<\300\003<\300\003<\300\003<\300\003<\300\003<\300\003<\300\003<\300\003<\300\003<\300\003<"
.string "\200\007x\200\007x\200\007x\200\007x\200\007x\200\007x\200\007x\200\007x\200\007x\200\007x\200\007x\200\007x\200\007x"
.string ""
.string "\017\360"
.string "\017\360"
.string "\017\360"
.string "\017\360"
.string "\017\360"
.string "\017\360"
.string "\017\360"
.string "\017\360"
.string "\017\360"
.string "\017\360"
.string "\017\360"
.string "\017\360"
.string "\017\360"
.string ""
.string "\036\340\001\036\340\001\036\340\001\036\340\001\036\340\001\036\340\001\036\340\001\036\340\001\036\340\001\036\340\001\036\340\001\036\340\001\036\340\001"
.string "<\300\003<\300\003<\300\003<\300\003<\300\003<\300\003<\300\003<\300\003<\300\003<\300\003<\300\003<\300\003<\300\003"
.string "x\200\007x\200\007x\200\007x\200\007x\200\007x\200\007x\200\007x\200\007x\200\007x\200\007x\200\007x\200\007x\200\007"
.string "\360"
.string "\017\360"
.string "\017\360"
.string "\017\360"
.string "\017\360"
.string "\017\360"
.string "\017\360"
.string "\017\360"
.string "\017\360"
.string "\017\360"
.string "\017\360"
.string "\017\360"
.string "\017\360"
.string "\017"
.string "\340\001\036\340\001\036\340\001\036\340\001\036\340\001\036\340\001\036\340\001\036\340\001\036\340\001\036\340\001\036\340\001\036\340\001\036\340\001\036"
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.string "\017"
.string "\340\001\036\340\001\036\340\001\036\340\001\036\340\001\036\340\001\036\340\001\036\340\001\036\340\001\036\340\001\036\340\001\036\340\001\036\340\001\036"
.string "\300\003<\300\003<\300\003<\300\003<\300\003<\300\003<\300\003<\300\003<\300\003<\300\003<\300\003<\300\003<\300\003<"
.string "\200\007x\200\007x\200\007x\200\007x\200\007x\200\007x\200\007x\200\007x\200\007x\200\007x\200\007x\200\007x\200\007x"
.string ""
.string "\017\360"
.string "\017\360"
.string "\017\360"
.string "\017\360"
.string "\017\360"
.string "\017\360"
.string "\017\360"
.string "\017\360"
.string "\017\360"
.string "\017\360"
.string "\017\360"
.string "\017\360"
.string "\017\360"
.string ""
.string "\036\340\001\036\340\001\036\340\001\036\340\001\036\340\001\036\340\001\036\340\001\036\340\001\036\340\001\036\340\001\036\340\001\036\340\001\036\340\001"
.string "<\300\003<\300\003<\300\003<\300\003<\300\003<\300\003<\300\003<\300\003<\300\003<\300\003<\300\003<\300\003<\300\003"
.string "x\200\007x\200\007x\200\007x\200\007x\200\007x\200\007x\200\007x\200\007x\200\007x\200\007x\200\007x\200\007x\200\007"
.string "\360"
.string "\017\360"
.string "\017\360"
.string "\017\360"
.string "\017\360"
.string "\017\360"
.string "\017\360"
.string "\017\360"
.string "\017\360"
.string "\017\360"
.string "\017\360"
.string "\017\360"
.string "\017\360"
.string "\017"
.string "\340\001\036\340\001\036\340\001\036\340\001\036\340\001\036\340\001\036\340\001\036\340\001\036\340\001\036\340\001\036\340\001\036\340\001\036\340\001\036"
.string "\300\003<\300\003<\300\003<\300\003<\300\003<\300\003<\300\003<\300\003<\300\003<\300\003<\300\003<\300\003<\300\003<"
.string "\200\007x\200\007x\200\007x\200\007x\200\007x\200\007x\200\007x\200\007x\200\007x\200\007x\200\007x\200\007x\200\007x"
.string ""
.string "\017\360"
.string "\017\360"
.string "\017\360"
.string "\017\360"
.string "\017\360"
.string "\017\360"
.string "\017\360"
.string "\017\360"
.string "\017\360"
.string "\017\360"
.string "\017\360"
.string "\017\360"
.string "\017\360"
.string ""
.string "\036\340\001\036\340\001\036\340\001\036\340\001\036\340\001\036\340\001\036\340\001\036\340\001\036\340\001\036\340\001\036\340\001\036\340\001\036\340\001"
.string "<\300\003<\300\003<\300\003<\300\003<\300\003<\300\003<\300\003<\300\003<\300\003<\300\003<\300\003<\300\003<\300\003"
.string "x\200\007x\200\007x\200\007x\200\007x\200\007x\200\007x\200\007x\200\007x\200\007x\200\007x\200\007x\200\007x\200\007"
.string "\360"
.string "\017\360"
.string "\017\360"
.string "\017\360"
.string "\017\360"
.string "\017\360"
.string "\017\360"
.string "\017\360"
.string "\017\360"
.string "\017\360"
.string "\017\360"
.string "\017\360"
.string "\017\360"
.string "\017"
.string "\340\001\036\340\001\036\340\001\036\340\001\036\340\001\036\340\001\036\340\001\036\340\001\036\340\001\036\340\001\036\340\001\036\340\001\036\340\001\036"
.string "\300\003<\300\003<\300\003<\300\003<\300\003<\300\003<\300\003<\300\003<\300\003<\300\003<\300\003<\300\003<\300\003<"
.string "\200\007x\200\007x\200\007x\200\007x\200\007x\200\007x\200\007x\200\007x\200\007x\200\007x\200\007x\200\007x\200\007x"
.string ""
.string "\017\360"
.string "\017\360"
.string "\017\360"
.string "\017\360"
.string "\017\360"
.string "\017\360"
.string "\017\360"
.string "\017\360"
.string "\017\360"
.string "\017\360"
.string "\017\360"
.string "\017\360"
.string "\017\360"
.string ""
.string "\036\340\001\036\340\001\036\340\001\036\340\001\036\340\001\036\340\001\036\340\001\036\340\001\036\340\001\036\340\001\036\340\001\036\340\001\036\340\001"
.string "<\300\003<\300\003<\300\003<\300\003<\300\003<\300\003<\300\003<\300\003<\300\003<\300\003<\300\003<\300\003<\300\003"
.string "x\200\007x\200\007x\200\007x\200\007x\200\007x\200\007x\200\007x\200\007x\200\007x\200\007x\200\007x\200\007x\200\007"
.string "\360"
.string "\017\360"
.string "\017\360"
.string "\017\360"
.string "\017\360"
.string "\017\360"
.string "\017\360"
.string "\017\360"
.string "\017\360"
.string "\017\360"
.string "\017\360"
.string "\017\360"
.string "\017\360"
.string "\017"
.string "\340\001\036\340\001\036\340\001\036\340\001\036\340\001\036\340\001\036\340\001\036\340\001\036\340\001\036\340\001\036\340\001\036\340\001\036\340\001\036"
.string "\300\003<\300\003<\300\003<\300\003<\300\003<\300\003<\300\003<\300\003<\300\003<\300\003<\300\003<\300\003<\300\003<"
.string "\200\007x\200\007x\200\007x\200\007x\200\007x\200\007x\200\007x\200\007x\200\007x\200\007x\200\007x\200\007x\200\007x"
.string ""
.string "\017\360"
.string "\017\360"
.string "\017\360"
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.type missing, %object
.size missing, 39
missing:
.string "%s: option requires an argument -- %c\n"
.align 3
.type illegal, %object
.size illegal, 26
illegal:
.string "%s: illegal option -- %c\n"
.global opterr
.data
.align 2
.type opterr, %object
.size opterr, 4
opterr:
.word 1
.global optind
.align 2
.type optind, %object
.size optind, 4
optind:
.word 1
.global optopt
.bss
.align 2
.type optopt, %object
.size optopt, 4
optopt:
.zero 4
.global optarg
.align 3
.type optarg, %object
.size optarg, 8
optarg:
.zero 8
.text
.align 2
.global getopt
.type getopt, %function
getopt:
.LFB6:
.cfi_startproc
stp x29, x30, [sp, -80]!
.cfi_def_cfa_offset 80
.cfi_offset 29, -80
.cfi_offset 30, -72
mov x29, sp
str x19, [sp, 16]
.cfi_offset 19, -64
str w0, [sp, 60]
str x1, [sp, 48]
str x2, [sp, 40]
mov w0, -1
str w0, [sp, 76]
adrp x0, optopt
add x0, x0, :lo12:optopt
str wzr, [x0]
adrp x0, optarg
add x0, x0, :lo12:optarg
str xzr, [x0]
adrp x0, o.0
add x0, x0, :lo12:o.0
ldr x0, [x0]
cmp x0, 0
bne .L2
adrp x0, optind
add x0, x0, :lo12:optind
ldr w0, [x0]
ldr w1, [sp, 60]
cmp w1, w0
ble .L15
adrp x0, optind
add x0, x0, :lo12:optind
ldr w0, [x0]
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 48]
add x0, x1, x0
ldr x19, [x0]
cmp x19, 0
beq .L15
ldrb w0, [x19]
cmp w0, 45
bne .L15
add x19, x19, 1
ldrb w0, [x19]
cmp w0, 0
beq .L15
ldrb w0, [x19]
cmp w0, 45
bne .L6
add x0, x19, 1
ldrb w0, [x0]
cmp w0, 0
beq .L16
.L6:
adrp x0, o.0
add x0, x0, :lo12:o.0
str x19, [x0]
.L2:
adrp x0, o.0
add x0, x0, :lo12:o.0
ldr x0, [x0]
ldrb w0, [x0]
str w0, [sp, 76]
adrp x0, o.0
add x0, x0, :lo12:o.0
ldr x0, [x0]
ldrb w0, [x0]
cmp w0, 58
beq .L8
adrp x0, o.0
add x0, x0, :lo12:o.0
ldr x0, [x0]
ldrb w0, [x0]
mov w1, w0
ldr x0, [sp, 40]
bl strchr
mov x19, x0
cmp x19, 0
bne .L9
.L8:
adrp x0, illegal
add x19, x0, :lo12:illegal
mov w0, 63
str w0, [sp, 76]
b .L10
.L9:
add x0, x19, 1
ldrb w0, [x0]
cmp w0, 58
bne .L11
adrp x0, o.0
add x0, x0, :lo12:o.0
ldr x0, [x0]
add x0, x0, 1
ldrb w0, [x0]
cmp w0, 0
beq .L12
adrp x0, o.0
add x0, x0, :lo12:o.0
ldr x0, [x0]
add x1, x0, 1
adrp x0, optarg
add x0, x0, :lo12:optarg
str x1, [x0]
b .L7
.L12:
adrp x0, optind
add x0, x0, :lo12:optind
ldr w0, [x0]
add w0, w0, 1
ldr w1, [sp, 60]
cmp w1, w0
ble .L13
adrp x0, optind
add x0, x0, :lo12:optind
ldr w0, [x0]
add w1, w0, 1
adrp x0, optind
add x0, x0, :lo12:optind
str w1, [x0]
adrp x0, optind
add x0, x0, :lo12:optind
ldr w0, [x0]
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 48]
add x0, x1, x0
ldr x1, [x0]
adrp x0, optarg
add x0, x0, :lo12:optarg
str x1, [x0]
b .L11
.L13:
adrp x0, missing
add x19, x0, :lo12:missing
mov w0, 58
str w0, [sp, 76]
.L10:
adrp x0, o.0
add x0, x0, :lo12:o.0
ldr x0, [x0]
ldrb w0, [x0]
mov w1, w0
adrp x0, optopt
add x0, x0, :lo12:optopt
str w1, [x0]
ldr x0, [sp, 40]
ldrb w0, [x0]
cmp w0, 58
beq .L11
mov w0, 63
str w0, [sp, 76]
adrp x0, opterr
add x0, x0, :lo12:opterr
ldr w0, [x0]
cmp w0, 0
beq .L11
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x4, [x0]
ldr x0, [sp, 48]
ldr x1, [x0]
adrp x0, o.0
add x0, x0, :lo12:o.0
ldr x0, [x0]
ldrb w0, [x0]
mov w3, w0
mov x2, x1
mov x1, x19
mov x0, x4
bl fprintf
.L11:
adrp x0, o.0
add x0, x0, :lo12:o.0
ldr x0, [x0]
add x1, x0, 1
adrp x0, o.0
add x0, x0, :lo12:o.0
str x1, [x0]
adrp x0, o.0
add x0, x0, :lo12:o.0
ldr x0, [x0]
ldrb w0, [x0]
cmp w0, 0
bne .L17
b .L7
.L16:
nop
.L7:
adrp x0, o.0
add x0, x0, :lo12:o.0
str xzr, [x0]
adrp x0, optind
add x0, x0, :lo12:optind
ldr w0, [x0]
add w1, w0, 1
adrp x0, optind
add x0, x0, :lo12:optind
str w1, [x0]
b .L5
.L15:
nop
b .L5
.L17:
nop
.L5:
ldr w0, [sp, 76]
ldr x19, [sp, 16]
ldp x29, x30, [sp], 80
.cfi_restore 30
.cfi_restore 29
.cfi_restore 19
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE6:
.size getopt, .-getopt
.local o.0
.comm o.0,8,8
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC0:
.string "a is %f + %fi\n"
.align 3
.LC1:
.string "b is %f + %fi\n"
.align 3
.LC2:
.string "a + b is: %f + %fi\n"
.align 3
.LC3:
.string "a - b is: %f + %fi\n"
.align 3
.LC4:
.string "a * b is: %f + %fi\n"
.align 3
.LC5:
.string "a / b is: %f + %fi\n"
.align 3
.LC6:
.string "a ^ b is: %f + %fi\n"
.text
.align 2
.global main
.type main, %function
main:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -128]!
.cfi_def_cfa_offset 128
.cfi_offset 29, -128
.cfi_offset 30, -120
mov x29, sp
str d8, [sp, 16]
.cfi_offset 72, -112
adrp x0, .LC7
ldr d0, [x0, #:lo12:.LC7]
str d0, [sp, 48]
adrp x0, .LC8
ldr d0, [x0, #:lo12:.LC8]
str d0, [sp, 56]
adrp x0, .LC9
ldr d0, [x0, #:lo12:.LC9]
str d0, [sp, 64]
adrp x0, .LC10
ldr d0, [x0, #:lo12:.LC10]
str d0, [sp, 72]
fmov d0, 3.0e+0
str d0, [sp, 80]
fmov d0, 2.0e+0
str d0, [sp, 88]
adrp x0, .LC11
ldr d0, [x0, #:lo12:.LC11]
str d0, [sp, 96]
adrp x0, .LC12
ldr d0, [x0, #:lo12:.LC12]
str d0, [sp, 104]
ldr d2, [sp, 80]
ldr d3, [sp, 88]
ldr d0, [sp, 48]
ldr d1, [sp, 56]
bl cpow
fmov d2, d0
fmov d0, d1
str d2, [sp, 112]
str d0, [sp, 120]
ldr d0, [sp, 112]
str d0, [sp, 32]
ldr d0, [sp, 120]
str d0, [sp, 40]
adrp x0, .LC7
ldr d0, [x0, #:lo12:.LC7]
adrp x0, .LC8
ldr d1, [x0, #:lo12:.LC8]
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl printf
adrp x0, .LC9
ldr d0, [x0, #:lo12:.LC9]
adrp x0, .LC10
ldr d1, [x0, #:lo12:.LC10]
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl printf
adrp x0, .LC11
ldr d0, [x0, #:lo12:.LC11]
adrp x0, .LC12
ldr d1, [x0, #:lo12:.LC12]
adrp x0, .LC2
add x0, x0, :lo12:.LC2
bl printf
adrp x0, .LC7
ldr d1, [x0, #:lo12:.LC7]
adrp x0, .LC9
ldr d0, [x0, #:lo12:.LC9]
fsub d0, d1, d0
adrp x0, .LC8
ldr d2, [x0, #:lo12:.LC8]
adrp x0, .LC10
ldr d1, [x0, #:lo12:.LC10]
fsub d1, d2, d1
adrp x0, .LC3
add x0, x0, :lo12:.LC3
bl printf
adrp x0, .LC10
ldr d3, [x0, #:lo12:.LC10]
adrp x0, .LC9
ldr d2, [x0, #:lo12:.LC9]
adrp x0, .LC8
ldr d1, [x0, #:lo12:.LC8]
adrp x0, .LC7
ldr d0, [x0, #:lo12:.LC7]
bl __muldc3
fmov d8, d0
adrp x0, .LC10
ldr d3, [x0, #:lo12:.LC10]
adrp x0, .LC9
ldr d2, [x0, #:lo12:.LC9]
adrp x0, .LC8
ldr d1, [x0, #:lo12:.LC8]
adrp x0, .LC7
ldr d0, [x0, #:lo12:.LC7]
bl __muldc3
fmov d0, d1
fmov d1, d0
fmov d0, d8
adrp x0, .LC4
add x0, x0, :lo12:.LC4
bl printf
adrp x0, .LC10
ldr d3, [x0, #:lo12:.LC10]
adrp x0, .LC9
ldr d2, [x0, #:lo12:.LC9]
adrp x0, .LC8
ldr d1, [x0, #:lo12:.LC8]
adrp x0, .LC7
ldr d0, [x0, #:lo12:.LC7]
bl __divdc3
fmov d8, d0
adrp x0, .LC10
ldr d3, [x0, #:lo12:.LC10]
adrp x0, .LC9
ldr d2, [x0, #:lo12:.LC9]
adrp x0, .LC8
ldr d1, [x0, #:lo12:.LC8]
adrp x0, .LC7
ldr d0, [x0, #:lo12:.LC7]
bl __divdc3
fmov d0, d1
fmov d1, d0
fmov d0, d8
adrp x0, .LC5
add x0, x0, :lo12:.LC5
bl printf
ldr d0, [sp, 32]
ldr d1, [sp, 40]
adrp x0, .LC6
add x0, x0, :lo12:.LC6
bl printf
mov w0, 0
ldr d8, [sp, 16]
ldp x29, x30, [sp], 128
.cfi_restore 30
.cfi_restore 29
.cfi_restore 72
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size main, .-main
.section .rodata
.align 3
.LC7:
.word 1992864825
.word 1077940158
.align 3
.LC8:
.word 1786706395
.word 1077441724
.align 3
.LC9:
.word -412316860
.word 1077398011
.align 3
.LC10:
.word 68719477
.word 1078296150
.align 3
.LC11:
.word 1786706395
.word 1078719676
.align 3
.LC12:
.word 481036337
.word 1079041114
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.global vars
.bss
.align 3
.type vars, %object
.size vars, 16
vars:
.zero 16
.global atom_1_r1_1
.align 2
.type atom_1_r1_1, %object
.size atom_1_r1_1, 4
atom_1_r1_1:
.zero 4
.global atom_1_r12_1
.align 2
.type atom_1_r12_1, %object
.size atom_1_r12_1, 4
atom_1_r12_1:
.zero 4
.text
.align 2
.global t0
.type t0, %function
t0:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str x0, [sp, 24]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 56]
mov x1, 0
.L2:
adrp x0, vars
add x0, x0, :lo12:vars
str x0, [sp, 40]
mov w0, 2
str w0, [sp, 36]
ldr w0, [sp, 36]
mov w1, w0
ldr x0, [sp, 40]
stlr w1, [x0]
adrp x0, vars+4
add x0, x0, :lo12:vars+4
str x0, [sp, 48]
mov w0, 1
str w0, [sp, 36]
ldr w0, [sp, 36]
mov w1, w0
ldr x0, [sp, 48]
stlr w1, [x0]
mov x0, 0
mov x1, x0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 56]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L4
bl __stack_chk_fail
.L4:
mov x0, x1
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size t0, .-t0
.align 2
.global t1
.type t1, %function
t1:
.LFB1:
.cfi_startproc
stp x29, x30, [sp, -160]!
.cfi_def_cfa_offset 160
.cfi_offset 29, -160
.cfi_offset 30, -152
mov x29, sp
str x0, [sp, 24]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 152]
mov x1, 0
.L6:
adrp x0, vars+4
add x0, x0, :lo12:vars+4
str x0, [sp, 80]
ldr x0, [sp, 80]
ldar w0, [x0]
str w0, [sp, 32]
ldr w0, [sp, 32]
str w0, [sp, 36]
str wzr, [sp, 40]
ldr w0, [sp, 40]
add w0, w0, 1
str w0, [sp, 44]
adrp x0, vars+8
add x0, x0, :lo12:vars+8
str x0, [sp, 88]
ldr w0, [sp, 44]
str w0, [sp, 32]
ldr w0, [sp, 32]
mov w1, w0
ldr x0, [sp, 88]
stlr w1, [x0]
adrp x0, vars+8
add x0, x0, :lo12:vars+8
str x0, [sp, 96]
ldr x0, [sp, 96]
ldar w0, [x0]
str w0, [sp, 32]
ldr w0, [sp, 32]
str w0, [sp, 48]
str wzr, [sp, 52]
ldr w0, [sp, 52]
add w0, w0, 3
sxtw x0, w0
lsl x1, x0, 2
adrp x0, vars
add x0, x0, :lo12:vars
add x0, x1, x0
str x0, [sp, 104]
ldr x0, [sp, 104]
ldar w0, [x0]
str w0, [sp, 32]
ldr w0, [sp, 32]
str w0, [sp, 56]
adrp x0, vars+12
add x0, x0, :lo12:vars+12
str x0, [sp, 112]
ldr x0, [sp, 112]
ldar w0, [x0]
str w0, [sp, 32]
ldr w0, [sp, 32]
str w0, [sp, 60]
mov w0, 1
str w0, [sp, 64]
ldr w0, [sp, 64]
cmp w0, 0
nop
.L8:
adrp x0, vars
add x0, x0, :lo12:vars
str x0, [sp, 120]
mov w0, 1
str w0, [sp, 32]
ldr w0, [sp, 32]
mov w1, w0
ldr x0, [sp, 120]
stlr w1, [x0]
adrp x0, vars
add x0, x0, :lo12:vars
str x0, [sp, 128]
ldr x0, [sp, 128]
ldar w0, [x0]
str w0, [sp, 32]
ldr w0, [sp, 32]
str w0, [sp, 68]
ldr w0, [sp, 36]
cmp w0, 1
cset w0, eq
and w0, w0, 255
str w0, [sp, 72]
adrp x0, atom_1_r1_1
add x0, x0, :lo12:atom_1_r1_1
str x0, [sp, 136]
ldr w0, [sp, 72]
str w0, [sp, 32]
ldr w0, [sp, 32]
mov w1, w0
ldr x0, [sp, 136]
stlr w1, [x0]
ldr w0, [sp, 68]
cmp w0, 1
cset w0, eq
and w0, w0, 255
str w0, [sp, 76]
adrp x0, atom_1_r12_1
add x0, x0, :lo12:atom_1_r12_1
str x0, [sp, 144]
ldr w0, [sp, 76]
str w0, [sp, 32]
ldr w0, [sp, 32]
mov w1, w0
ldr x0, [sp, 144]
stlr w1, [x0]
mov x0, 0
mov x1, x0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 152]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L10
bl __stack_chk_fail
.L10:
mov x0, x1
ldp x29, x30, [sp], 160
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE1:
.size t1, .-t1
.section .rodata
.align 3
.LC0:
.string "program.c"
.align 3
.LC1:
.string "0"
.text
.align 2
.global main
.type main, %function
main:
.LFB2:
.cfi_startproc
stp x29, x30, [sp, -160]!
.cfi_def_cfa_offset 160
.cfi_offset 29, -160
.cfi_offset 30, -152
mov x29, sp
str w0, [sp, 28]
str x1, [sp, 16]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 152]
mov x1, 0
adrp x0, vars
add x0, x0, :lo12:vars
str x0, [sp, 80]
str wzr, [sp, 72]
ldr w0, [sp, 72]
mov w1, w0
ldr x0, [sp, 80]
str w1, [x0]
adrp x0, vars+12
add x0, x0, :lo12:vars+12
str x0, [sp, 88]
str wzr, [sp, 72]
ldr w0, [sp, 72]
mov w1, w0
ldr x0, [sp, 88]
str w1, [x0]
adrp x0, vars+4
add x0, x0, :lo12:vars+4
str x0, [sp, 96]
str wzr, [sp, 72]
ldr w0, [sp, 72]
mov w1, w0
ldr x0, [sp, 96]
str w1, [x0]
adrp x0, vars+8
add x0, x0, :lo12:vars+8
str x0, [sp, 104]
str wzr, [sp, 72]
ldr w0, [sp, 72]
mov w1, w0
ldr x0, [sp, 104]
str w1, [x0]
adrp x0, atom_1_r1_1
add x0, x0, :lo12:atom_1_r1_1
str x0, [sp, 112]
str wzr, [sp, 72]
ldr w0, [sp, 72]
mov w1, w0
ldr x0, [sp, 112]
str w1, [x0]
adrp x0, atom_1_r12_1
add x0, x0, :lo12:atom_1_r12_1
str x0, [sp, 120]
str wzr, [sp, 72]
ldr w0, [sp, 72]
mov w1, w0
ldr x0, [sp, 120]
str w1, [x0]
add x4, sp, 64
mov x3, 0
adrp x0, t0
add x2, x0, :lo12:t0
mov x1, 0
mov x0, x4
bl pthread_create
add x4, sp, 72
mov x3, 0
adrp x0, t1
add x2, x0, :lo12:t1
mov x1, 0
mov x0, x4
bl pthread_create
ldr x0, [sp, 64]
mov x1, 0
bl pthread_join
ldr x0, [sp, 72]
mov x1, 0
bl pthread_join
adrp x0, vars
add x0, x0, :lo12:vars
str x0, [sp, 128]
ldr x0, [sp, 128]
ldar w0, [x0]
str w0, [sp, 36]
ldr w0, [sp, 36]
str w0, [sp, 40]
ldr w0, [sp, 40]
cmp w0, 2
cset w0, eq
and w0, w0, 255
str w0, [sp, 44]
adrp x0, atom_1_r1_1
add x0, x0, :lo12:atom_1_r1_1
str x0, [sp, 136]
ldr x0, [sp, 136]
ldar w0, [x0]
str w0, [sp, 36]
ldr w0, [sp, 36]
str w0, [sp, 48]
adrp x0, atom_1_r12_1
add x0, x0, :lo12:atom_1_r12_1
str x0, [sp, 144]
ldr x0, [sp, 144]
ldar w0, [x0]
str w0, [sp, 36]
ldr w0, [sp, 36]
str w0, [sp, 52]
ldr w1, [sp, 48]
ldr w0, [sp, 52]
and w0, w1, w0
str w0, [sp, 56]
ldr w1, [sp, 44]
ldr w0, [sp, 56]
and w0, w1, w0
str w0, [sp, 60]
ldr w0, [sp, 60]
cmp w0, 1
bne .L12
adrp x0, __PRETTY_FUNCTION__.0
add x3, x0, :lo12:__PRETTY_FUNCTION__.0
mov w2, 66
adrp x0, .LC0
add x1, x0, :lo12:.LC0
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl __assert_fail
.L12:
mov w0, 0
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 152]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L14
bl __stack_chk_fail
.L14:
mov w0, w1
ldp x29, x30, [sp], 160
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE2:
.size main, .-main
.section .rodata
.align 3
.type __PRETTY_FUNCTION__.0, %object
.size __PRETTY_FUNCTION__.0, 5
__PRETTY_FUNCTION__.0:
.string "main"
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.global a
.bss
.align 3
.type a, %object
.size a, 2
a:
.zero 2
.global e
.align 3
.type e, %object
.size e, 8
e:
.zero 8
.text
.align 2
.global foo
.type foo, %function
foo:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
strb wzr, [sp, 17]
ldrb w0, [sp, 17]
strb w0, [sp, 16]
ldrb w0, [sp, 16]
str w0, [sp, 28]
ldrh w1, [sp, 16]
ldr x0, [sp, 24]
bl bar
nop
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size foo, .-foo
.align 2
.global baz
.type baz, %function
baz:
.LFB1:
.cfi_startproc
stp x29, x30, [sp, -16]!
.cfi_def_cfa_offset 16
.cfi_offset 29, -16
.cfi_offset 30, -8
mov x29, sp
adrp x0, e
add x0, x0, :lo12:e
ldr x0, [x0]
strb wzr, [x0, 5]
adrp x1, e
add x1, x1, :lo12:e
ldr x1, [x1]
ldrb w0, [x0, 5]
strb w0, [x1, 4]
bl foo
nop
ldp x29, x30, [sp], 16
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE1:
.size baz, .-baz
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.global mapping
.bss
.align 3
.type mapping, %object
.size mapping, 8
mapping:
.zero 8
.section .rodata
.align 3
.LC0:
.string "child thread has started.\n"
.text
.align 2
.global thread_func
.type thread_func, %function
thread_func:
.LFB6:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str x0, [sp, 24]
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x0, [x0]
mov x3, x0
mov x2, 26
mov x1, 1
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl fwrite
.L2:
adrp x0, mapping
add x0, x0, :lo12:mapping
ldr x0, [x0]
ldr w1, [x0]
add w1, w1, 1
str w1, [x0]
b .L2
.cfi_endproc
.LFE6:
.size thread_func, .-thread_func
.section .rodata
.align 3
.LC1:
.string "program.c"
.align 3
.LC2:
.string "mapping != MAP_FAILED"
.align 3
.LC3:
.string "rc == 0"
.align 3
.LC4:
.string "waiting for child thread...\n"
.align 3
.LC5:
.string "mmap call #%i\n"
.align 3
.LC6:
.string "result == mapping"
.align 3
.LC7:
.string "checking for write to page...\n"
.text
.align 2
.global main
.type main, %function
main:
.LFB7:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 56]
mov x1, 0
mov x5, 0
mov w4, -1
mov w3, 34
mov w2, 3
mov x1, 65536
mov x0, 0
bl mmap
mov x1, x0
adrp x0, mapping
add x0, x0, :lo12:mapping
str x1, [x0]
adrp x0, mapping
add x0, x0, :lo12:mapping
ldr x0, [x0]
cmn x0, #1
bne .L4
adrp x0, __PRETTY_FUNCTION__.0
add x3, x0, :lo12:__PRETTY_FUNCTION__.0
mov w2, 41
adrp x0, .LC1
add x1, x0, :lo12:.LC1
adrp x0, .LC2
add x0, x0, :lo12:.LC2
bl __assert_fail
.L4:
add x4, sp, 40
mov x3, 0
adrp x0, thread_func
add x2, x0, :lo12:thread_func
mov x1, 0
mov x0, x4
bl pthread_create
str w0, [sp, 32]
ldr w0, [sp, 32]
cmp w0, 0
beq .L5
adrp x0, __PRETTY_FUNCTION__.0
add x3, x0, :lo12:__PRETTY_FUNCTION__.0
mov w2, 45
adrp x0, .LC1
add x1, x0, :lo12:.LC1
adrp x0, .LC3
add x0, x0, :lo12:.LC3
bl __assert_fail
.L5:
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x0, [x0]
mov x3, x0
mov x2, 28
mov x1, 1
adrp x0, .LC4
add x0, x0, :lo12:.LC4
bl fwrite
nop
.L6:
adrp x0, mapping
add x0, x0, :lo12:mapping
ldr x0, [x0]
ldr w0, [x0]
cmp w0, 0
beq .L6
str wzr, [sp, 28]
b .L7
.L10:
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x3, [x0]
ldr w2, [sp, 28]
adrp x0, .LC5
add x1, x0, :lo12:.LC5
mov x0, x3
bl fprintf
adrp x0, mapping
add x0, x0, :lo12:mapping
ldr x0, [x0]
mov x5, 0
mov w4, -1
mov w3, 50
mov w2, 3
mov x1, 65536
bl mmap
str x0, [sp, 48]
adrp x0, mapping
add x0, x0, :lo12:mapping
ldr x0, [x0]
ldr x1, [sp, 48]
cmp x1, x0
beq .L8
adrp x0, __PRETTY_FUNCTION__.0
add x3, x0, :lo12:__PRETTY_FUNCTION__.0
mov w2, 60
adrp x0, .LC1
add x1, x0, :lo12:.LC1
adrp x0, .LC6
add x0, x0, :lo12:.LC6
bl __assert_fail
.L8:
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x0, [x0]
mov x3, x0
mov x2, 30
mov x1, 1
adrp x0, .LC7
add x0, x0, :lo12:.LC7
bl fwrite
adrp x0, mapping
add x0, x0, :lo12:mapping
ldr x0, [x0]
ldr w0, [x0]
str w0, [sp, 36]
nop
.L9:
adrp x0, mapping
add x0, x0, :lo12:mapping
ldr x0, [x0]
ldr w0, [x0]
ldr w1, [sp, 36]
cmp w1, w0
beq .L9
ldr w0, [sp, 28]
add w0, w0, 1
str w0, [sp, 28]
.L7:
ldr w0, [sp, 28]
cmp w0, 999
ble .L10
mov w0, 0
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 56]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L12
bl __stack_chk_fail
.L12:
mov w0, w1
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE7:
.size main, .-main
.section .rodata
.align 3
.type __PRETTY_FUNCTION__.0, %object
.size __PRETTY_FUNCTION__.0, 5
__PRETTY_FUNCTION__.0:
.string "main"
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .tbss,"awT",@nobits
.align 3
.type __stack_list, %object
.size __stack_list, 48
__stack_list:
.zero 48
.text
.align 2
.type __enter_new_func, %function
__enter_new_func:
.LFB0:
.cfi_startproc
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:__stack_list, lsl #12
add x0, x0, #:tprel_lo12_nc:__stack_list
ldr w0, [x0]
add w1, w0, 1
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:__stack_list, lsl #12
add x0, x0, #:tprel_lo12_nc:__stack_list
str w1, [x0]
nop
ret
.cfi_endproc
.LFE0:
.size __enter_new_func, .-__enter_new_func
.align 2
.global __get_current_level
.type __get_current_level, %function
__get_current_level:
.LFB1:
.cfi_startproc
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:__stack_list, lsl #12
add x0, x0, #:tprel_lo12_nc:__stack_list
ldr w0, [x0]
ret
.cfi_endproc
.LFE1:
.size __get_current_level, .-__get_current_level
.align 2
.global __protect_kill_stack
.type __protect_kill_stack, %function
__protect_kill_stack:
.LFB2:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:__stack_list, lsl #12
add x0, x0, #:tprel_lo12_nc:__stack_list
ldr x1, [sp, 24]
str x1, [x0, 24]
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:__stack_list, lsl #12
add x0, x0, #:tprel_lo12_nc:__stack_list
ldr x0, [x0, 16]
str x0, [sp, 40]
b .L5
.L8:
ldr x0, [sp, 40]
ldr x0, [x0, 32]
ldr x1, [sp, 24]
cmp x1, x0
bne .L6
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:__stack_list, lsl #12
add x0, x0, #:tprel_lo12_nc:__stack_list
ldr x1, [sp, 40]
str x1, [x0, 32]
ldr x0, [sp, 40]
ldr x1, [x0, 24]
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:__stack_list, lsl #12
add x0, x0, #:tprel_lo12_nc:__stack_list
str x1, [x0, 40]
ldr x0, [sp, 40]
ldr x1, [x0, 8]
ldr x0, [sp, 40]
ldr x0, [x0]
blr x1
nop
b .L9
.L6:
ldr x0, [sp, 40]
ldr x0, [x0, 24]
str x0, [sp, 40]
.L5:
ldr x0, [sp, 40]
cmp x0, 0
beq .L9
ldr x0, [sp, 40]
ldr w1, [x0, 16]
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:__stack_list, lsl #12
add x0, x0, #:tprel_lo12_nc:__stack_list
ldr w0, [x0]
cmp w1, w0
beq .L8
.L9:
nop
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE2:
.size __protect_kill_stack, .-__protect_kill_stack
.align 2
.global __push_var
.type __push_var, %function
__push_var:
.LFB3:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str x0, [sp, 8]
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:__stack_list, lsl #12
add x0, x0, #:tprel_lo12_nc:__stack_list
ldr x0, [x0, 32]
ldr x1, [sp, 8]
cmp x1, x0
bne .L11
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:__stack_list, lsl #12
add x0, x0, #:tprel_lo12_nc:__stack_list
ldr x1, [x0, 40]
ldr x0, [sp, 8]
str x1, [x0, 24]
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:__stack_list, lsl #12
add x0, x0, #:tprel_lo12_nc:__stack_list
str xzr, [x0, 32]
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:__stack_list, lsl #12
add x0, x0, #:tprel_lo12_nc:__stack_list
str xzr, [x0, 40]
b .L12
.L11:
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:__stack_list, lsl #12
add x0, x0, #:tprel_lo12_nc:__stack_list
ldr x1, [x0, 16]
ldr x0, [sp, 8]
str x1, [x0, 24]
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:__stack_list, lsl #12
add x0, x0, #:tprel_lo12_nc:__stack_list
ldr x1, [sp, 8]
str x1, [x0, 16]
.L12:
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:__stack_list, lsl #12
add x0, x0, #:tprel_lo12_nc:__stack_list
ldr x1, [x0, 24]
ldr x0, [sp, 8]
str x1, [x0, 32]
ldr x0, [sp, 8]
ldr x0, [x0]
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE3:
.size __push_var, .-__push_var
.align 2
.global __pop_var
.type __pop_var, %function
__pop_var:
.LFB4:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
str xzr, [sp, 32]
bl __yield_get_block_cleanup_attribute_switch
and w0, w0, 255
cmp w0, 0
bne .L24
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:__stack_list, lsl #12
add x0, x0, #:tprel_lo12_nc:__stack_list
ldr x0, [x0, 16]
str x0, [sp, 40]
b .L17
.L22:
ldr x0, [sp, 40]
ldr x1, [x0]
ldr x0, [sp, 24]
ldr x0, [x0]
cmp x1, x0
bne .L25
ldr x0, [sp, 32]
cmp x0, 0
bne .L20
ldr x0, [sp, 40]
ldr x1, [x0, 24]
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:__stack_list, lsl #12
add x0, x0, #:tprel_lo12_nc:__stack_list
str x1, [x0, 16]
.L20:
ldr x0, [sp, 40]
ldr x0, [x0, 8]
cmp x0, 0
beq .L26
ldr x0, [sp, 40]
ldr x1, [x0, 8]
ldr x0, [sp, 40]
ldr x0, [x0]
blr x1
b .L26
.L25:
nop
ldr x0, [sp, 40]
str x0, [sp, 32]
ldr x0, [sp, 40]
ldr x0, [x0, 24]
str x0, [sp, 40]
.L17:
ldr x0, [sp, 40]
cmp x0, 0
beq .L14
ldr x0, [sp, 40]
ldr w1, [x0, 16]
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:__stack_list, lsl #12
add x0, x0, #:tprel_lo12_nc:__stack_list
ldr w0, [x0]
cmp w1, w0
beq .L22
b .L14
.L24:
nop
b .L14
.L26:
nop
.L14:
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE4:
.size __pop_var, .-__pop_var
.align 2
.global __get_front_var_list
.type __get_front_var_list, %function
__get_front_var_list:
.LFB5:
.cfi_startproc
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:__stack_list, lsl #12
add x0, x0, #:tprel_lo12_nc:__stack_list
ldr x0, [x0, 16]
cmp x0, 0
bne .L28
mov x0, 0
b .L29
.L28:
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:__stack_list, lsl #12
add x0, x0, #:tprel_lo12_nc:__stack_list
ldr x0, [x0, 16]
ldr x0, [x0]
.L29:
ret
.cfi_endproc
.LFE5:
.size __get_front_var_list, .-__get_front_var_list
.align 2
.global __exit_end_func
.type __exit_end_func, %function
__exit_end_func:
.LFB6:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str w0, [sp, 28]
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:__stack_list, lsl #12
add x0, x0, #:tprel_lo12_nc:__stack_list
ldr x0, [x0, 16]
str x0, [sp, 40]
str xzr, [sp, 32]
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:__stack_list, lsl #12
add x0, x0, #:tprel_lo12_nc:__stack_list
ldr x0, [x0, 16]
str x0, [sp, 32]
b .L31
.L33:
ldr x0, [sp, 32]
ldr x1, [x0, 24]
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:__stack_list, lsl #12
add x0, x0, #:tprel_lo12_nc:__stack_list
str x1, [x0, 16]
ldr x0, [sp, 32]
ldr x0, [x0, 24]
str x0, [sp, 32]
.L31:
ldr x0, [sp, 32]
cmp x0, 0
beq .L32
ldr x0, [sp, 32]
ldr w0, [x0, 16]
ldr w1, [sp, 28]
cmp w1, w0
ble .L33
.L32:
ldr x0, [sp, 40]
str x0, [sp, 32]
b .L34
.L37:
ldr x0, [sp, 32]
ldr x0, [x0, 8]
cmp x0, 0
beq .L35
ldr x0, [sp, 32]
ldr x1, [x0, 8]
ldr x0, [sp, 32]
ldr x0, [x0]
blr x1
.L35:
ldr x0, [sp, 32]
ldr x0, [x0, 24]
str x0, [sp, 32]
.L34:
ldr x0, [sp, 32]
cmp x0, 0
beq .L36
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:__stack_list, lsl #12
add x0, x0, #:tprel_lo12_nc:__stack_list
ldr x0, [x0, 16]
ldr x1, [sp, 32]
cmp x1, x0
bne .L37
.L36:
ldr w0, [sp, 28]
bl __except_clean_exit_func
ldr w0, [sp, 28]
sub w1, w0, #1
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:__stack_list, lsl #12
add x0, x0, #:tprel_lo12_nc:__stack_list
str w1, [x0]
nop
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE6:
.size __exit_end_func, .-__exit_end_func
.align 2
.global __delayed_level_encrementation
.type __delayed_level_encrementation, %function
__delayed_level_encrementation:
.LFB7:
.cfi_startproc
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:__stack_list, lsl #12
add x0, x0, #:tprel_lo12_nc:__stack_list
ldr x0, [x0, 16]
cmp x0, 0
beq .L42
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:__stack_list, lsl #12
add x0, x0, #:tprel_lo12_nc:__stack_list
ldr w0, [x0]
cmp w0, 0
beq .L42
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:__stack_list, lsl #12
add x0, x0, #:tprel_lo12_nc:__stack_list
ldr x0, [x0, 16]
ldr w1, [x0, 16]
add w1, w1, 1
str w1, [x0, 16]
b .L38
.L42:
nop
.L38:
ret
.cfi_endproc
.LFE7:
.size __delayed_level_encrementation, .-__delayed_level_encrementation
.align 2
.global __prevent_clean_up_var
.type __prevent_clean_up_var, %function
__prevent_clean_up_var:
.LFB8:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str x0, [sp, 8]
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:__stack_list, lsl #12
add x0, x0, #:tprel_lo12_nc:__stack_list
ldr x0, [x0, 16]
str x0, [sp, 24]
b .L44
.L46:
ldr x0, [sp, 24]
ldr x0, [x0, 24]
str x0, [sp, 24]
.L44:
ldr x0, [sp, 24]
cmp x0, 0
beq .L45
ldr x0, [sp, 24]
ldr x0, [x0]
ldr x1, [sp, 8]
cmp x1, x0
bcc .L46
.L45:
ldr x0, [sp, 24]
cmp x0, 0
beq .L47
ldr x0, [sp, 24]
ldr x0, [x0]
ldr x1, [sp, 8]
cmp x1, x0
bne .L47
ldr x0, [sp, 24]
ldr x1, [x0, 8]
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:__stack_list, lsl #12
add x0, x0, #:tprel_lo12_nc:__stack_list
str x1, [x0, 8]
ldr x0, [sp, 24]
str xzr, [x0, 8]
.L47:
ldr x0, [sp, 8]
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE8:
.size __prevent_clean_up_var, .-__prevent_clean_up_var
.align 2
.global __get_return_dtor
.type __get_return_dtor, %function
__get_return_dtor:
.LFB9:
.cfi_startproc
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:__stack_list, lsl #12
add x0, x0, #:tprel_lo12_nc:__stack_list
ldr x0, [x0, 8]
ret
.cfi_endproc
.LFE9:
.size __get_return_dtor, .-__get_return_dtor
.align 2
.type __clean_for_exit, %function
__clean_for_exit:
.LFB10:
.cfi_startproc
stp x29, x30, [sp, -16]!
.cfi_def_cfa_offset 16
.cfi_offset 29, -16
.cfi_offset 30, -8
mov x29, sp
mov w0, -1
bl __exit_end_func
nop
ldp x29, x30, [sp], 16
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE10:
.size __clean_for_exit, .-__clean_for_exit
.section .fini_array,"aw",%fini_array
.align 3
.xword __clean_for_exit
.text
.align 2
.global __cyg_profile_func_enter
.type __cyg_profile_func_enter, %function
__cyg_profile_func_enter:
.LFB11:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str x0, [sp, 24]
str x1, [sp, 16]
bl __enter_new_func
nop
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE11:
.size __cyg_profile_func_enter, .-__cyg_profile_func_enter
.align 2
.global __cyg_profile_func_exit
.type __cyg_profile_func_exit, %function
__cyg_profile_func_exit:
.LFB12:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str x0, [sp, 24]
str x1, [sp, 16]
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:__stack_list, lsl #12
add x0, x0, #:tprel_lo12_nc:__stack_list
ldr w0, [x0]
bl __exit_end_func
nop
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE12:
.size __cyg_profile_func_exit, .-__cyg_profile_func_exit
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC0:
.string "Something may or may not happen sometime in the future."
.text
.align 2
.global main
.type main, %function
main:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -16]!
.cfi_def_cfa_offset 16
.cfi_offset 29, -16
.cfi_offset 30, -8
mov x29, sp
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl puts
mov w0, 0
ldp x29, x30, [sp], 16
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.global m0
.bss
.align 2
.type m0, %object
.size m0, 4
m0:
.zero 4
.global m1
.data
.align 2
.type m1, %object
.size m1, 4
m1:
.word 1
.global m2
.align 2
.type m2, %object
.size m2, 4
m2:
.word 2
.global m3
.align 2
.type m3, %object
.size m3, 4
m3:
.word 3
.global m4
.align 2
.type m4, %object
.size m4, 4
m4:
.word 4
.global m5
.align 2
.type m5, %object
.size m5, 4
m5:
.word 5
.global af
.bss
.align 3
.type af, %object
.size af, 1
af:
.zero 1
.global sv
.align 3
.type sv, %object
.size sv, 400
sv:
.zero 400
.text
.align 2
.global f
.type f, %function
f:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -432]!
.cfi_def_cfa_offset 432
.cfi_offset 29, -432
.cfi_offset 30, -424
mov x29, sp
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 424]
mov x1, 0
adrp x0, sv
add x1, x0, :lo12:sv
add x0, sp, 24
mov x3, x1
mov x1, 400
mov x2, x1
mov x1, x3
bl memcpy
nop
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [sp, 424]
ldr x1, [x0]
subs x2, x2, x1
mov x1, 0
beq .L2
bl __stack_chk_fail
.L2:
ldp x29, x30, [sp], 432
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size f, .-f
.align 2
.global check_typedefs
.type check_typedefs, %function
check_typedefs:
.LFB1:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 24]
mov x1, 0
nop
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [sp, 24]
ldr x1, [x0]
subs x2, x2, x1
mov x1, 0
beq .L4
bl __stack_chk_fail
.L4:
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE1:
.size check_typedefs, .-check_typedefs
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.type M2DAYS, %object
.size M2DAYS, 52
M2DAYS:
.word 0
.word 306
.word 337
.word 0
.word 31
.word 61
.word 92
.word 122
.word 153
.word 184
.word 214
.word 245
.word 275
.text
.align 2
.global totaldays
.type totaldays, %function
totaldays:
.LFB6:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str w0, [sp, 12]
str w1, [sp, 8]
str w2, [sp, 4]
ldr w0, [sp, 8]
cmp w0, 2
bgt .L2
ldr w0, [sp, 12]
sub w0, w0, #1
str w0, [sp, 12]
.L2:
adrp x0, M2DAYS
add x0, x0, :lo12:M2DAYS
ldrsw x1, [sp, 8]
ldr w1, [x0, x1, lsl 2]
ldr w0, [sp, 4]
add w1, w1, w0
ldr w2, [sp, 12]
mov w0, 365
mul w0, w2, w0
add w1, w1, w0
ldr w0, [sp, 12]
add w2, w0, 3
cmp w0, 0
csel w0, w2, w0, lt
asr w0, w0, 2
add w1, w1, w0
ldr w0, [sp, 12]
mov w2, 34079
movk w2, 0x51eb, lsl 16
smull x2, w0, w2
lsr x2, x2, 32
asr w2, w2, 5
asr w0, w0, 31
sub w0, w0, w2
add w1, w1, w0
ldr w0, [sp, 12]
mov w2, 34079
movk w2, 0x51eb, lsl 16
smull x2, w0, w2
lsr x2, x2, 32
asr w2, w2, 7
asr w0, w0, 31
sub w0, w2, w0
add w0, w1, w0
sub w0, w0, #306
sxtw x0, w0
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE6:
.size totaldays, .-totaldays
.align 2
.global parseiso8601
.type parseiso8601, %function
parseiso8601:
.LFB7:
.cfi_startproc
stp x29, x30, [sp, -96]!
.cfi_def_cfa_offset 96
.cfi_offset 29, -96
.cfi_offset 30, -88
mov x29, sp
stp x19, x20, [sp, 16]
.cfi_offset 19, -80
.cfi_offset 20, -72
str x0, [sp, 40]
str x1, [sp, 32]
str wzr, [sp, 56]
str wzr, [sp, 60]
str wzr, [sp, 64]
str wzr, [sp, 68]
str wzr, [sp, 72]
str wzr, [sp, 76]
str wzr, [sp, 80]
str wzr, [sp, 84]
ldr x0, [sp, 40]
str x0, [sp, 88]
str wzr, [sp, 84]
b .L5
.L8:
ldr x0, [sp, 88]
ldrb w0, [x0]
cmp w0, 47
bls .L6
ldr x0, [sp, 88]
ldrb w0, [x0]
cmp w0, 57
bhi .L6
ldr w1, [sp, 56]
mov w0, w1
lsl w0, w0, 2
add w0, w0, w1
lsl w0, w0, 1
mov w2, w0
ldr x0, [sp, 88]
add x1, x0, 1
str x1, [sp, 88]
ldrb w0, [x0]
add w0, w2, w0
sub w0, w0, #48
str w0, [sp, 56]
ldr w0, [sp, 84]
add w0, w0, 1
str w0, [sp, 84]
b .L5
.L6:
mov x0, -1
b .L7
.L5:
ldr w0, [sp, 84]
cmp w0, 3
ble .L8
ldr x0, [sp, 88]
ldrb w0, [x0]
cmp w0, 45
bne .L9
ldr x0, [sp, 88]
add x0, x0, 1
str x0, [sp, 88]
.L9:
str wzr, [sp, 84]
b .L10
.L12:
ldr x0, [sp, 88]
ldrb w0, [x0]
cmp w0, 47
bls .L11
ldr x0, [sp, 88]
ldrb w0, [x0]
cmp w0, 57
bhi .L11
ldr w1, [sp, 60]
mov w0, w1
lsl w0, w0, 2
add w0, w0, w1
lsl w0, w0, 1
mov w2, w0
ldr x0, [sp, 88]
add x1, x0, 1
str x1, [sp, 88]
ldrb w0, [x0]
add w0, w2, w0
sub w0, w0, #48
str w0, [sp, 60]
ldr w0, [sp, 84]
add w0, w0, 1
str w0, [sp, 84]
b .L10
.L11:
mov x0, -1
b .L7
.L10:
ldr w0, [sp, 84]
cmp w0, 1
ble .L12
ldr w0, [sp, 60]
cmp w0, 0
ble .L13
ldr w0, [sp, 60]
cmp w0, 12
ble .L14
.L13:
mov x0, -1
b .L7
.L14:
ldr x0, [sp, 88]
ldrb w0, [x0]
cmp w0, 45
bne .L15
ldr x0, [sp, 88]
add x0, x0, 1
str x0, [sp, 88]
.L15:
str wzr, [sp, 84]
b .L16
.L18:
ldr x0, [sp, 88]
ldrb w0, [x0]
cmp w0, 47
bls .L17
ldr x0, [sp, 88]
ldrb w0, [x0]
cmp w0, 57
bhi .L17
ldr w1, [sp, 64]
mov w0, w1
lsl w0, w0, 2
add w0, w0, w1
lsl w0, w0, 1
mov w2, w0
ldr x0, [sp, 88]
add x1, x0, 1
str x1, [sp, 88]
ldrb w0, [x0]
add w0, w2, w0
sub w0, w0, #48
str w0, [sp, 64]
ldr w0, [sp, 84]
add w0, w0, 1
str w0, [sp, 84]
.L16:
ldr w0, [sp, 84]
cmp w0, 1
ble .L18
.L17:
ldr w0, [sp, 64]
cmp w0, 0
bne .L19
mov w0, 1
str w0, [sp, 64]
.L19:
ldr x0, [sp, 88]
ldrb w0, [x0]
cmp w0, 84
beq .L20
ldr x0, [sp, 88]
ldrb w0, [x0]
cmp w0, 32
bne .L21
.L20:
ldr x0, [sp, 88]
add x0, x0, 1
str x0, [sp, 88]
str wzr, [sp, 84]
b .L22
.L24:
ldr x0, [sp, 88]
ldrb w0, [x0]
cmp w0, 47
bls .L23
ldr x0, [sp, 88]
ldrb w0, [x0]
cmp w0, 57
bhi .L23
ldr w1, [sp, 68]
mov w0, w1
lsl w0, w0, 2
add w0, w0, w1
lsl w0, w0, 1
mov w2, w0
ldr x0, [sp, 88]
add x1, x0, 1
str x1, [sp, 88]
ldrb w0, [x0]
add w0, w2, w0
sub w0, w0, #48
str w0, [sp, 68]
ldr w0, [sp, 84]
add w0, w0, 1
str w0, [sp, 84]
b .L22
.L23:
mov x0, -1
b .L7
.L22:
ldr w0, [sp, 84]
cmp w0, 1
ble .L24
ldr x0, [sp, 88]
ldrb w0, [x0]
cmp w0, 58
bne .L25
ldr x0, [sp, 88]
add x0, x0, 1
str x0, [sp, 88]
.L25:
str wzr, [sp, 84]
b .L26
.L28:
ldr x0, [sp, 88]
ldrb w0, [x0]
cmp w0, 47
bls .L27
ldr x0, [sp, 88]
ldrb w0, [x0]
cmp w0, 57
bhi .L27
ldr w1, [sp, 72]
mov w0, w1
lsl w0, w0, 2
add w0, w0, w1
lsl w0, w0, 1
mov w2, w0
ldr x0, [sp, 88]
add x1, x0, 1
str x1, [sp, 88]
ldrb w0, [x0]
add w0, w2, w0
sub w0, w0, #48
str w0, [sp, 72]
ldr w0, [sp, 84]
add w0, w0, 1
str w0, [sp, 84]
.L26:
ldr w0, [sp, 84]
cmp w0, 1
ble .L28
.L27:
ldr x0, [sp, 88]
ldrb w0, [x0]
cmp w0, 58
bne .L29
ldr x0, [sp, 88]
add x0, x0, 1
str x0, [sp, 88]
.L29:
str wzr, [sp, 84]
b .L30
.L32:
ldr x0, [sp, 88]
ldrb w0, [x0]
cmp w0, 47
bls .L31
ldr x0, [sp, 88]
ldrb w0, [x0]
cmp w0, 57
bhi .L31
ldr w1, [sp, 76]
mov w0, w1
lsl w0, w0, 2
add w0, w0, w1
lsl w0, w0, 1
mov w2, w0
ldr x0, [sp, 88]
add x1, x0, 1
str x1, [sp, 88]
ldrb w0, [x0]
add w0, w2, w0
sub w0, w0, #48
str w0, [sp, 76]
ldr w0, [sp, 84]
add w0, w0, 1
str w0, [sp, 84]
.L30:
ldr w0, [sp, 84]
cmp w0, 1
ble .L32
.L31:
ldr x0, [sp, 88]
ldrb w0, [x0]
cmp w0, 46
beq .L33
ldr x0, [sp, 88]
ldrb w0, [x0]
cmp w0, 44
bne .L34
.L33:
ldr x0, [sp, 88]
add x0, x0, 1
str x0, [sp, 88]
str wzr, [sp, 84]
b .L35
.L37:
ldr x0, [sp, 88]
ldrb w0, [x0]
cmp w0, 47
bls .L38
ldr x0, [sp, 88]
ldrb w0, [x0]
cmp w0, 57
bhi .L38
ldr w1, [sp, 80]
mov w0, w1
lsl w0, w0, 2
add w0, w0, w1
lsl w0, w0, 1
mov w2, w0
ldr x0, [sp, 88]
add x1, x0, 1
str x1, [sp, 88]
ldrb w0, [x0]
add w0, w2, w0
sub w0, w0, #48
str w0, [sp, 80]
ldr w0, [sp, 84]
add w0, w0, 1
str w0, [sp, 84]
.L35:
ldr w0, [sp, 84]
cmp w0, 5
ble .L37
b .L38
.L40:
ldr x0, [sp, 88]
add x0, x0, 1
str x0, [sp, 88]
.L38:
ldr x0, [sp, 88]
ldrb w0, [x0]
cmp w0, 47
bls .L41
ldr x0, [sp, 88]
ldrb w0, [x0]
cmp w0, 57
bls .L40
b .L41
.L42:
ldr w1, [sp, 80]
mov w0, w1
lsl w0, w0, 2
add w0, w0, w1
lsl w0, w0, 1
str w0, [sp, 80]
.L41:
ldr w0, [sp, 84]
add w1, w0, 1
str w1, [sp, 84]
cmp w0, 5
ble .L42
.L34:
ldr x0, [sp, 32]
cmp x0, 0
beq .L21
ldr x0, [sp, 88]
add x1, x0, 1
str x1, [sp, 88]
ldrb w0, [x0]
strb w0, [sp, 55]
ldrb w0, [sp, 55]
cmp w0, 90
bne .L43
ldr x0, [sp, 32]
mov w1, 1
strb w1, [x0]
ldr x0, [sp, 32]
strb wzr, [x0, 2]
ldr x0, [sp, 32]
ldrb w1, [x0, 2]
ldr x0, [sp, 32]
strb w1, [x0, 1]
b .L21
.L43:
ldrb w0, [sp, 55]
cmp w0, 43
beq .L44
ldrb w0, [sp, 55]
cmp w0, 45
bne .L45
.L44:
ldr x0, [sp, 32]
mov w1, 1
strb w1, [x0]
strb wzr, [sp, 53]
strb wzr, [sp, 54]
str wzr, [sp, 84]
b .L46
.L48:
ldr x0, [sp, 88]
ldrb w0, [x0]
cmp w0, 47
bls .L47
ldr x0, [sp, 88]
ldrb w0, [x0]
cmp w0, 57
bhi .L47
ldrb w1, [sp, 53]
mov w0, w1
ubfiz w0, w0, 2, 6
add w0, w0, w1
ubfiz w0, w0, 1, 7
and w1, w0, 255
ldr x0, [sp, 88]
add x2, x0, 1
str x2, [sp, 88]
ldrb w0, [x0]
add w0, w1, w0
and w0, w0, 255
sub w0, w0, #48
strb w0, [sp, 53]
ldr w0, [sp, 84]
add w0, w0, 1
str w0, [sp, 84]
.L46:
ldr w0, [sp, 84]
cmp w0, 1
ble .L48
.L47:
ldr x0, [sp, 88]
ldrb w0, [x0]
cmp w0, 58
bne .L49
ldr x0, [sp, 88]
add x0, x0, 1
str x0, [sp, 88]
.L49:
str wzr, [sp, 84]
b .L50
.L52:
ldr x0, [sp, 88]
ldrb w0, [x0]
cmp w0, 47
bls .L51
ldr x0, [sp, 88]
ldrb w0, [x0]
cmp w0, 57
bhi .L51
ldrb w1, [sp, 54]
mov w0, w1
ubfiz w0, w0, 2, 6
add w0, w0, w1
ubfiz w0, w0, 1, 7
and w1, w0, 255
ldr x0, [sp, 88]
add x2, x0, 1
str x2, [sp, 88]
ldrb w0, [x0]
add w0, w1, w0
and w0, w0, 255
sub w0, w0, #48
strb w0, [sp, 54]
ldr w0, [sp, 84]
add w0, w0, 1
str w0, [sp, 84]
.L50:
ldr w0, [sp, 84]
cmp w0, 1
ble .L52
.L51:
ldrb w0, [sp, 55]
cmp w0, 45
bne .L53
ldrb w0, [sp, 53]
neg w0, w0
and w0, w0, 255
b .L54
.L53:
ldrb w0, [sp, 53]
.L54:
ldr x1, [sp, 32]
strb w0, [x1, 1]
ldrb w0, [sp, 55]
cmp w0, 45
bne .L55
ldrb w0, [sp, 54]
neg w0, w0
and w0, w0, 255
b .L56
.L55:
ldrb w0, [sp, 54]
.L56:
ldr x1, [sp, 32]
strb w0, [x1, 2]
b .L21
.L45:
ldr x0, [sp, 32]
strb wzr, [x0]
.L21:
ldrsw x19, [sp, 80]
ldr w1, [sp, 72]
mov w0, w1
lsl w0, w0, 4
sub w0, w0, w1
lsl w0, w0, 2
mov w1, w0
ldr w0, [sp, 76]
add w1, w1, w0
ldr w2, [sp, 68]
mov w0, 3600
mul w0, w2, w0
add w0, w1, w0
sxtw x20, w0
ldr w2, [sp, 64]
ldr w1, [sp, 60]
ldr w0, [sp, 56]
bl totaldays
mov x1, x0
mov x0, 20864
movk x0, 0x1, lsl 16
mul x0, x1, x0
add x1, x20, x0
mov x0, 16960
movk x0, 0xf, lsl 16
mul x0, x1, x0
add x0, x19, x0
.L7:
ldp x19, x20, [sp, 16]
ldp x29, x30, [sp], 96
.cfi_restore 30
.cfi_restore 29
.cfi_restore 19
.cfi_restore 20
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE7:
.size parseiso8601, .-parseiso8601
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.local res
.comm res,4,4
.local m
.comm m,262144,8
.local col_ocp
.comm col_ocp,512,8
.section .rodata
.align 3
.LC0:
.string "1 "
.align 3
.LC1:
.string "0 "
.text
.align 2
.type print_m, %function
print_m:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str w0, [sp, 28]
str wzr, [sp, 40]
b .L2
.L7:
str wzr, [sp, 44]
b .L3
.L6:
adrp x0, m
add x2, x0, :lo12:m
ldrsw x0, [sp, 44]
ldrsw x1, [sp, 40]
lsl x1, x1, 9
add x1, x2, x1
add x0, x1, x0
ldrb w0, [x0]
cmp w0, 0
beq .L4
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl printf
b .L5
.L4:
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl printf
.L5:
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L3:
ldr w1, [sp, 44]
ldr w0, [sp, 28]
cmp w1, w0
blt .L6
mov w0, 10
bl putchar
ldr w0, [sp, 40]
add w0, w0, 1
str w0, [sp, 40]
.L2:
ldr w1, [sp, 40]
ldr w0, [sp, 28]
cmp w1, w0
blt .L7
mov w0, 10
bl putchar
mov w0, 10
bl putchar
nop
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size print_m, .-print_m
.align 2
.type avail, %function
avail:
.LFB1:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str w0, [sp, 12]
str w1, [sp, 8]
str wzr, [sp, 16]
b .L9
.L22:
str wzr, [sp, 20]
b .L10
.L21:
adrp x0, m
add x2, x0, :lo12:m
ldrsw x0, [sp, 20]
ldrsw x1, [sp, 16]
lsl x1, x1, 9
add x1, x2, x1
add x0, x1, x0
ldrb w0, [x0]
cmp w0, 0
beq .L23
ldr w0, [sp, 16]
add w0, w0, 1
str w0, [sp, 24]
ldr w0, [sp, 20]
sub w0, w0, #1
str w0, [sp, 28]
b .L13
.L17:
adrp x0, m
add x2, x0, :lo12:m
ldrsw x0, [sp, 28]
ldrsw x1, [sp, 24]
lsl x1, x1, 9
add x1, x2, x1
add x0, x1, x0
ldrb w0, [x0]
cmp w0, 0
beq .L14
mov w0, 0
b .L15
.L14:
ldr w0, [sp, 24]
add w0, w0, 1
str w0, [sp, 24]
ldr w0, [sp, 28]
sub w0, w0, #1
str w0, [sp, 28]
.L13:
ldr w1, [sp, 24]
ldr w0, [sp, 8]
cmp w1, w0
bgt .L16
ldr w0, [sp, 28]
cmp w0, 0
bge .L17
.L16:
ldr w0, [sp, 16]
add w0, w0, 1
str w0, [sp, 24]
ldr w0, [sp, 20]
add w0, w0, 1
str w0, [sp, 28]
b .L18
.L20:
adrp x0, m
add x2, x0, :lo12:m
ldrsw x0, [sp, 28]
ldrsw x1, [sp, 24]
lsl x1, x1, 9
add x1, x2, x1
add x0, x1, x0
ldrb w0, [x0]
cmp w0, 0
beq .L19
mov w0, 0
b .L15
.L19:
ldr w0, [sp, 24]
add w0, w0, 1
str w0, [sp, 24]
ldr w0, [sp, 28]
add w0, w0, 1
str w0, [sp, 28]
.L18:
ldr w1, [sp, 24]
ldr w0, [sp, 8]
cmp w1, w0
bgt .L12
ldr w1, [sp, 28]
ldr w0, [sp, 12]
cmp w1, w0
blt .L20
b .L12
.L23:
nop
.L12:
ldr w0, [sp, 20]
add w0, w0, 1
str w0, [sp, 20]
.L10:
ldr w1, [sp, 20]
ldr w0, [sp, 12]
cmp w1, w0
blt .L21
ldr w0, [sp, 16]
add w0, w0, 1
str w0, [sp, 16]
.L9:
ldr w1, [sp, 16]
ldr w0, [sp, 8]
cmp w1, w0
ble .L22
mov w0, 1
.L15:
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE1:
.size avail, .-avail
.align 2
.type nqueen, %function
nqueen:
.LFB2:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str w0, [sp, 28]
str w1, [sp, 24]
ldr w0, [sp, 24]
cmp w0, 0
bne .L25
str wzr, [sp, 44]
b .L26
.L27:
adrp x0, m
add x1, x0, :lo12:m
ldrsw x0, [sp, 44]
mov w2, 1
strb w2, [x1, x0]
adrp x0, col_ocp
add x1, x0, :lo12:col_ocp
ldrsw x0, [sp, 44]
mov w2, 1
strb w2, [x1, x0]
mov w1, 1
ldr w0, [sp, 28]
bl nqueen
adrp x0, m
add x1, x0, :lo12:m
ldrsw x0, [sp, 44]
strb wzr, [x1, x0]
adrp x0, col_ocp
add x1, x0, :lo12:col_ocp
ldrsw x0, [sp, 44]
strb wzr, [x1, x0]
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L26:
ldr w1, [sp, 44]
ldr w0, [sp, 28]
cmp w1, w0
blt .L27
b .L24
.L25:
ldr w0, [sp, 28]
sub w0, w0, #1
ldr w1, [sp, 24]
cmp w1, w0
bne .L29
str wzr, [sp, 44]
b .L30
.L33:
adrp x0, col_ocp
add x1, x0, :lo12:col_ocp
ldrsw x0, [sp, 44]
ldrb w0, [x1, x0]
cmp w0, 0
beq .L40
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L30:
ldr w1, [sp, 44]
ldr w0, [sp, 28]
cmp w1, w0
blt .L33
b .L32
.L40:
nop
.L32:
adrp x0, m
add x2, x0, :lo12:m
ldrsw x0, [sp, 44]
ldrsw x1, [sp, 24]
lsl x1, x1, 9
add x1, x2, x1
add x0, x1, x0
mov w1, 1
strb w1, [x0]
ldr w1, [sp, 24]
ldr w0, [sp, 28]
bl avail
cmp w0, 0
beq .L34
adrp x0, res
add x0, x0, :lo12:res
ldr w0, [x0]
add w1, w0, 1
adrp x0, res
add x0, x0, :lo12:res
str w1, [x0]
.L34:
adrp x0, m
add x2, x0, :lo12:m
ldrsw x0, [sp, 44]
ldrsw x1, [sp, 24]
lsl x1, x1, 9
add x1, x2, x1
add x0, x1, x0
strb wzr, [x0]
b .L24
.L29:
str wzr, [sp, 44]
b .L35
.L39:
adrp x0, col_ocp
add x1, x0, :lo12:col_ocp
ldrsw x0, [sp, 44]
ldrb w0, [x1, x0]
cmp w0, 0
bne .L41
adrp x0, m
add x2, x0, :lo12:m
ldrsw x0, [sp, 44]
ldrsw x1, [sp, 24]
lsl x1, x1, 9
add x1, x2, x1
add x0, x1, x0
mov w1, 1
strb w1, [x0]
adrp x0, col_ocp
add x1, x0, :lo12:col_ocp
ldrsw x0, [sp, 44]
mov w2, 1
strb w2, [x1, x0]
ldr w1, [sp, 24]
ldr w0, [sp, 28]
bl avail
cmp w0, 0
beq .L38
ldr w0, [sp, 24]
add w0, w0, 1
mov w1, w0
ldr w0, [sp, 28]
bl nqueen
.L38:
adrp x0, m
add x2, x0, :lo12:m
ldrsw x0, [sp, 44]
ldrsw x1, [sp, 24]
lsl x1, x1, 9
add x1, x2, x1
add x0, x1, x0
strb wzr, [x0]
adrp x0, col_ocp
add x1, x0, :lo12:col_ocp
ldrsw x0, [sp, 44]
strb wzr, [x1, x0]
b .L37
.L41:
nop
.L37:
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L35:
ldr w1, [sp, 44]
ldr w0, [sp, 28]
cmp w1, w0
blt .L39
.L24:
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE2:
.size nqueen, .-nqueen
.align 2
.global totalNQueens
.type totalNQueens, %function
totalNQueens:
.LFB3:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str w0, [sp, 28]
ldr w0, [sp, 28]
cmp w0, 0
beq .L43
ldr w0, [sp, 28]
cmp w0, 1
bne .L44
.L43:
ldr w0, [sp, 28]
b .L45
.L44:
adrp x0, m
add x0, x0, :lo12:m
mov x3, x0
mov x0, 262144
mov x2, x0
mov w1, 0
mov x0, x3
bl memset
adrp x0, col_ocp
add x0, x0, :lo12:col_ocp
mov x3, x0
mov x0, 512
mov x2, x0
mov w1, 0
mov x0, x3
bl memset
adrp x0, res
add x0, x0, :lo12:res
str wzr, [x0]
mov w1, 0
ldr w0, [sp, 28]
bl nqueen
adrp x0, res
add x0, x0, :lo12:res
ldr w0, [x0]
.L45:
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE3:
.size totalNQueens, .-totalNQueens
.section .rodata
.align 3
.LC2:
.string "%d\n"
.text
.align 2
.global main
.type main, %function
main:
.LFB4:
.cfi_startproc
stp x29, x30, [sp, -16]!
.cfi_def_cfa_offset 16
.cfi_offset 29, -16
.cfi_offset 30, -8
mov x29, sp
mov w0, 4
bl totalNQueens
mov w1, w0
adrp x0, .LC2
add x0, x0, :lo12:.LC2
bl printf
mov w0, 0
ldp x29, x30, [sp], 16
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE4:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC0:
.string "%s:%s:%d:%d:%s:%s:%s\n"
.text
.align 2
.global putpwent
.type putpwent, %function
putpwent:
.LFB0:
.cfi_startproc
sub sp, sp, #48
.cfi_def_cfa_offset 48
stp x29, x30, [sp, 16]
.cfi_offset 29, -32
.cfi_offset 30, -24
add x29, sp, 16
str x0, [sp, 40]
str x1, [sp, 32]
ldr x0, [sp, 40]
ldr x1, [x0]
ldr x0, [sp, 40]
ldr x2, [x0, 8]
ldr x0, [sp, 40]
ldr w3, [x0, 16]
ldr x0, [sp, 40]
ldr w4, [x0, 20]
ldr x0, [sp, 40]
ldr x5, [x0, 24]
ldr x0, [sp, 40]
ldr x6, [x0, 32]
ldr x0, [sp, 40]
ldr x0, [x0, 40]
str x0, [sp]
mov x7, x6
mov x6, x5
mov w5, w4
mov w4, w3
mov x3, x2
mov x2, x1
adrp x0, .LC0
add x1, x0, :lo12:.LC0
ldr x0, [sp, 32]
bl fprintf
cmp w0, 0
bge .L2
mov w0, -1
b .L4
.L2:
mov w0, 0
.L4:
ldp x29, x30, [sp, 16]
add sp, sp, 48
.cfi_restore 29
.cfi_restore 30
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size putpwent, .-putpwent
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.global some_array__LINE__
.bss
.align 3
.type some_array__LINE__, %object
.size some_array__LINE__, 4
some_array__LINE__:
.zero 4
.text
.align 2
.global main
.type main, %function
main:
.LFB0:
.cfi_startproc
mov w0, 0
ret
.cfi_endproc
.LFE0:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global foo
.type foo, %function
foo:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 40]
str x1, [sp, 32]
str w2, [sp, 28]
ldr w0, [sp, 28]
ldr x2, [sp, 40]
ldr x1, [sp, 32]
mov x3, x2
mov x2, x0
mov x0, x3
bl memcpy
nop
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size foo, .-foo
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC0:
.string "strings %s"
.align 3
.LC1:
.string "something went wrong running %s.\n"
.text
.align 2
.global get_strings
.type get_strings, %function
get_strings:
.LFB6:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
ldr x0, [sp, 24]
bl strlen
add w0, w0, 9
str w0, [sp, 36]
ldrsw x0, [sp, 36]
bl malloc
str x0, [sp, 40]
ldrsw x1, [sp, 36]
ldr x3, [sp, 24]
adrp x0, .LC0
add x2, x0, :lo12:.LC0
ldr x0, [sp, 40]
bl snprintf
ldr x0, [sp, 40]
bl system
cmp w0, 0
beq .L3
ldr x1, [sp, 40]
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl printf
.L3:
nop
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE6:
.size get_strings, .-get_strings
.align 2
.global main
.type main, %function
main:
.LFB7:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str w0, [sp, 28]
str x1, [sp, 16]
ldr x0, [sp, 16]
ldr x0, [x0]
bl get_strings
mov w0, 0
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE7:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.global acDummy
.bss
.align 3
.type acDummy, %object
.size acDummy, 240
acDummy:
.zero 240
.global B100
.align 3
.type B100, %object
.size B100, 2
B100:
.zero 2
.global p
.section .data.rel.local,"aw"
.align 3
.type p, %object
.size p, 8
p:
.xword B100
.text
.align 2
.global Do
.type Do, %function
Do:
.LFB0:
.cfi_startproc
adrp x0, B100
add x0, x0, :lo12:B100
ldrh w1, [x0]
and w1, w1, -2
strh w1, [x0]
nop
ret
.cfi_endproc
.LFE0:
.size Do, .-Do
.align 2
.global main
.type main, %function
main:
.LFB1:
.cfi_startproc
stp x29, x30, [sp, -16]!
.cfi_def_cfa_offset 16
.cfi_offset 29, -16
.cfi_offset 30, -8
mov x29, sp
adrp x0, p
add x0, x0, :lo12:p
ldr x0, [x0]
mov w1, -4661
strh w1, [x0]
bl Do
adrp x0, p
add x0, x0, :lo12:p
ldr x0, [x0]
ldrh w1, [x0]
mov w0, 60874
cmp w1, w0
cset w0, ne
and w0, w0, 255
ldp x29, x30, [sp], 16
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE1:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC0:
.string "HI from thread %d\n"
.text
.align 2
.global func
.type func, %function
func:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str x0, [sp, 24]
ldr x0, [sp, 24]
ldr w0, [x0]
mov w1, w0
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl printf
mov x0, 0
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size func, .-func
.section .rodata
.align 3
.LC1:
.string "thread %d ends\n"
.text
.align 2
.global main
.type main, %function
main:
.LFB1:
.cfi_startproc
stp x29, x30, [sp, -96]!
.cfi_def_cfa_offset 96
.cfi_offset 29, -96
.cfi_offset 30, -88
mov x29, sp
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 88]
mov x1, 0
str wzr, [sp, 16]
b .L4
.L5:
ldrsw x0, [sp, 16]
lsl x0, x0, 2
add x1, sp, 24
ldr w2, [sp, 16]
str w2, [x1, x0]
ldrsw x0, [sp, 16]
lsl x0, x0, 3
add x1, sp, 48
add x4, x1, x0
ldrsw x0, [sp, 16]
lsl x0, x0, 2
add x1, sp, 24
add x0, x1, x0
mov x3, x0
adrp x0, func
add x2, x0, :lo12:func
mov x1, 0
mov x0, x4
bl pthread_create
ldr w0, [sp, 16]
add w0, w0, 1
str w0, [sp, 16]
.L4:
ldr w0, [sp, 16]
cmp w0, 4
ble .L5
str wzr, [sp, 20]
b .L6
.L7:
ldrsw x0, [sp, 20]
lsl x0, x0, 3
add x1, sp, 48
ldr x0, [x1, x0]
mov x1, 0
bl pthread_join
ldr w1, [sp, 20]
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl printf
ldr w0, [sp, 20]
add w0, w0, 1
str w0, [sp, 20]
.L6:
ldr w0, [sp, 20]
cmp w0, 4
ble .L7
mov w0, 0
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 88]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L9
bl __stack_chk_fail
.L9:
mov w0, w1
ldp x29, x30, [sp], 96
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE1:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC0:
.string "/dev/zero"
.text
.align 2
.global mapmalloc
.type mapmalloc, %function
mapmalloc:
.LFB6:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str w0, [sp, 28]
strb wzr, [sp, 35]
mov w1, 2
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl open
str w0, [sp, 36]
ldrsw x0, [sp, 28]
mov x5, 0
ldr w4, [sp, 36]
mov w3, 2
mov w2, 3
mov x1, x0
mov x0, 0
bl mmap
str x0, [sp, 40]
ldr w0, [sp, 36]
bl close
ldr x0, [sp, 40]
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE6:
.size mapmalloc, .-mapmalloc
.align 2
.global mapfree
.type mapfree, %function
mapfree:
.LFB7:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str x0, [sp, 24]
str w1, [sp, 20]
ldrsw x0, [sp, 20]
mov x1, x0
ldr x0, [sp, 24]
bl munmap
nop
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE7:
.size mapfree, .-mapfree
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC0:
.string "rb"
.align 3
.LC1:
.string "file.txt"
.align 3
.LC2:
.string "fread failed"
.text
.align 2
.global main
.type main, %function
main:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -240]!
.cfi_def_cfa_offset 240
.cfi_offset 29, -240
.cfi_offset 30, -232
mov x29, sp
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 232]
mov x1, 0
adrp x0, .LC0
add x1, x0, :lo12:.LC0
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl fopen
str x0, [sp, 16]
add x0, sp, 32
ldr x3, [sp, 16]
mov x2, 50
mov x1, 8
bl fread
str x0, [sp, 24]
ldr x0, [sp, 24]
cmn x0, #1
bne .L2
adrp x0, .LC2
add x0, x0, :lo12:.LC2
bl printf
.L2:
ldr x0, [sp, 16]
bl fclose
mov w0, 0
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 232]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L4
bl __stack_chk_fail
.L4:
mov w0, w1
ldp x29, x30, [sp], 240
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC0:
.string "%lf"
.align 3
.LC1:
.string "%.2f\n"
.align 3
.LC2:
.string "%.2f"
.text
.align 2
.global main
.type main, %function
main:
.LFB6:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 40]
mov x1, 0
add x0, sp, 16
mov x1, x0
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl __isoc99_scanf
ldr d0, [sp, 16]
adrp x0, .LC3
ldr d1, [x0, #:lo12:.LC3]
fmul d1, d0, d1
ldr d0, [sp, 16]
fmul d0, d1, d0
str d0, [sp, 24]
ldr d0, [sp, 16]
adrp x0, .LC4
ldr d1, [x0, #:lo12:.LC4]
fmul d0, d0, d1
str d0, [sp, 32]
ldr d0, [sp, 24]
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl printf
ldr d0, [sp, 32]
adrp x0, .LC2
add x0, x0, :lo12:.LC2
bl printf
mov w0, 0
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 40]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L3
bl __stack_chk_fail
.L3:
mov w0, w1
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE6:
.size main, .-main
.section .rodata
.align 3
.LC3:
.word 1413754602
.word 1074340347
.align 3
.LC4:
.word 1413754602
.word 1075388923
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.type bar, %function
bar:
.LFB0:
.cfi_startproc
mov w0, 42
ret
.cfi_endproc
.LFE0:
.size bar, .-bar
.align 2
.type foo, %function
foo:
.LFB1:
.cfi_startproc
stp x29, x30, [sp, -16]!
.cfi_def_cfa_offset 16
.cfi_offset 29, -16
.cfi_offset 30, -8
mov x29, sp
bl bar
ldp x29, x30, [sp], 16
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE1:
.size foo, .-foo
.align 2
.global main
.type main, %function
main:
.LFB2:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
bl foo
str w0, [sp, 28]
ldr w0, [sp, 28]
add w0, w0, 1
str w0, [sp, 28]
ldr w0, [sp, 28]
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE2:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global create_16bit_table
.type create_16bit_table, %function
create_16bit_table:
.LFB0:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str x0, [sp, 8]
mov w0, 4129
strh w0, [sp, 30]
strh wzr, [sp, 26]
b .L2
.L7:
ldrh w0, [sp, 26]
ubfiz w0, w0, 8, 8
strh w0, [sp, 28]
strb wzr, [sp, 25]
b .L3
.L6:
ldrsh w0, [sp, 28]
cmp w0, 0
blt .L4
ldrh w0, [sp, 28]
ubfiz w0, w0, 1, 15
strh w0, [sp, 28]
b .L5
.L4:
ldrh w0, [sp, 28]
ubfiz w0, w0, 1, 15
strh w0, [sp, 28]
ldrh w1, [sp, 28]
ldrh w0, [sp, 30]
eor w0, w1, w0
strh w0, [sp, 28]
.L5:
ldrb w0, [sp, 25]
add w0, w0, 1
strb w0, [sp, 25]
.L3:
ldrb w0, [sp, 25]
cmp w0, 7
bls .L6
ldrsh x0, [sp, 26]
lsl x0, x0, 1
ldr x1, [sp, 8]
add x0, x1, x0
ldrh w1, [sp, 28]
strh w1, [x0]
ldrsh w0, [sp, 26]
and w0, w0, 65535
add w0, w0, 1
and w0, w0, 65535
strh w0, [sp, 26]
.L2:
ldrsh w0, [sp, 26]
cmp w0, 255
ble .L7
nop
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size create_16bit_table, .-create_16bit_table
.align 2
.global create_32bit_table
.type create_32bit_table, %function
create_32bit_table:
.LFB1:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str x0, [sp, 8]
mov w0, 7607
movk w0, 0x4c1, lsl 16
str w0, [sp, 28]
strh wzr, [sp, 20]
b .L9
.L14:
ldrsh w0, [sp, 20]
lsl w0, w0, 24
str w0, [sp, 24]
strh wzr, [sp, 22]
b .L10
.L13:
ldr w0, [sp, 24]
cmp w0, 0
blt .L11
ldr w0, [sp, 24]
lsl w0, w0, 1
str w0, [sp, 24]
b .L12
.L11:
ldr w0, [sp, 24]
lsl w0, w0, 1
str w0, [sp, 24]
ldr w1, [sp, 24]
ldr w0, [sp, 28]
eor w0, w1, w0
str w0, [sp, 24]
.L12:
ldrsh w0, [sp, 22]
and w0, w0, 65535
add w0, w0, 1
and w0, w0, 65535
strh w0, [sp, 22]
.L10:
ldrsh w0, [sp, 22]
cmp w0, 7
ble .L13
ldrsh x0, [sp, 20]
lsl x0, x0, 2
ldr x1, [sp, 8]
add x0, x1, x0
ldr w1, [sp, 24]
str w1, [x0]
ldrsh w0, [sp, 20]
and w0, w0, 65535
add w0, w0, 1
and w0, w0, 65535
strh w0, [sp, 20]
.L9:
ldrsh w0, [sp, 20]
cmp w0, 255
ble .L14
nop
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE1:
.size create_32bit_table, .-create_32bit_table
.align 2
.global compute_16crc
.type compute_16crc, %function
compute_16crc:
.LFB2:
.cfi_startproc
sub sp, sp, #560
.cfi_def_cfa_offset 560
stp x29, x30, [sp]
.cfi_offset 29, -560
.cfi_offset 30, -552
mov x29, sp
str x0, [sp, 24]
str w1, [sp, 20]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 552]
mov x1, 0
add x0, sp, 40
bl create_16bit_table
mov w0, -1
strh w0, [sp, 36]
mov w0, 1
strh w0, [sp, 38]
b .L16
.L17:
ldrh w0, [sp, 36]
lsr w0, w0, 8
and w0, w0, 65535
and w1, w0, 255
ldrsh x0, [sp, 38]
sub x0, x0, #1
ldr x2, [sp, 24]
add x0, x2, x0
ldrb w0, [x0]
eor w0, w1, w0
strb w0, [sp, 35]
ldrh w0, [sp, 36]
lsl w0, w0, 8
sxth w1, w0
ldrb w0, [sp, 35]
sxtw x0, w0
lsl x0, x0, 1
add x2, sp, 40
ldrh w0, [x2, x0]
sxth w0, w0
eor w0, w1, w0
sxth w0, w0
strh w0, [sp, 36]
ldrsh w0, [sp, 38]
and w0, w0, 65535
add w0, w0, 1
and w0, w0, 65535
strh w0, [sp, 38]
.L16:
ldrsh w0, [sp, 38]
ldr w1, [sp, 20]
cmp w1, w0
bge .L17
ldrh w0, [sp, 36]
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 552]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L19
bl __stack_chk_fail
.L19:
mov w0, w1
ldp x29, x30, [sp]
add sp, sp, 560
.cfi_restore 29
.cfi_restore 30
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE2:
.size compute_16crc, .-compute_16crc
.align 2
.global compute_32crc
.type compute_32crc, %function
compute_32crc:
.LFB3:
.cfi_startproc
sub sp, sp, #1072
.cfi_def_cfa_offset 1072
stp x29, x30, [sp]
.cfi_offset 29, -1072
.cfi_offset 30, -1064
mov x29, sp
str x0, [sp, 24]
str w1, [sp, 20]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 1064]
mov x1, 0
add x0, sp, 40
bl create_32bit_table
mov w0, -1
str w0, [sp, 36]
mov w0, 1
strh w0, [sp, 32]
b .L21
.L22:
ldrsh x0, [sp, 32]
sub x0, x0, #1
ldr x1, [sp, 24]
add x0, x1, x0
ldrb w0, [x0]
lsl w0, w0, 24
mov w1, w0
ldr w0, [sp, 36]
eor w0, w1, w0
lsr w0, w0, 24
and w0, w0, 255
strh w0, [sp, 34]
ldr w0, [sp, 36]
lsl w1, w0, 8
ldrh w0, [sp, 34]
sxtw x0, w0
lsl x0, x0, 2
add x2, sp, 40
ldr w0, [x2, x0]
eor w0, w1, w0
str w0, [sp, 36]
ldrsh w0, [sp, 32]
and w0, w0, 65535
add w0, w0, 1
and w0, w0, 65535
strh w0, [sp, 32]
.L21:
ldrsh w0, [sp, 32]
ldr w1, [sp, 20]
cmp w1, w0
bge .L22
ldr w0, [sp, 36]
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 1064]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L24
bl __stack_chk_fail
.L24:
mov w0, w1
ldp x29, x30, [sp]
add sp, sp, 1072
.cfi_restore 29
.cfi_restore 30
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE3:
.size compute_32crc, .-compute_32crc
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.global x
.bss
.align 3
.type x, %object
.size x, 32
x:
.zero 32
.global y
.align 3
.type y, %object
.size y, 8
y:
.zero 8
.text
.align 2
.global nar
.type nar, %function
nar:
.LFB0:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str w0, [sp, 12]
str w1, [sp, 8]
str w2, [sp, 4]
mov w0, 3
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size nar, .-nar
.local g
.comm g,4,4
.align 2
.type narn, %function
narn:
.LFB1:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str w0, [sp, 12]
str w1, [sp, 8]
str w2, [sp, 4]
ldr w1, [sp, 12]
ldr w0, [sp, 8]
add w1, w1, w0
ldr w0, [sp, 4]
add w0, w1, w0
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE1:
.size narn, .-narn
.align 2
.global main
.type main, %function
main:
.LFB2:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
adrp x0, x
add x0, x0, :lo12:x
ldr x0, [x0, 8]
adrp x1, nar
add x1, x1, :lo12:nar
str x1, [x0]
adrp x0, x
add x0, x0, :lo12:x
ldr x0, [x0, 8]
str x0, [sp, 32]
ldr x0, [sp, 32]
ldr x0, [x0]
str x0, [sp, 40]
adrp x0, y
add x0, x0, :lo12:y
ldr x0, [x0]
str x0, [sp, 48]
ldr x0, [sp, 48]
ldr x0, [x0]
str x0, [sp, 56]
ldr x3, [sp, 40]
mov w2, 6
mov w1, 5
mov w0, 4
blr x3
str w0, [sp, 16]
ldr w0, [sp, 16]
str w0, [sp, 20]
ldr x3, [sp, 56]
mov w2, 6
mov w1, 5
mov w0, 4
blr x3
str w0, [sp, 24]
ldr w0, [sp, 24]
str w0, [sp, 28]
nop
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE2:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC1:
.string "Usage: jit1 <integer>\n"
.text
.align 2
.global main
.type main, %function
main:
.LFB6:
.cfi_startproc
stp x29, x30, [sp, -80]!
.cfi_def_cfa_offset 80
.cfi_offset 29, -80
.cfi_offset 30, -72
mov x29, sp
str w0, [sp, 28]
str x1, [sp, 16]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 72]
mov x1, 0
adrp x0, .LC0
add x1, x0, :lo12:.LC0
add x0, sp, 64
ldr w2, [x1]
str w2, [x0]
ldrh w1, [x1, 4]
strh w1, [x0, 4]
ldr w0, [sp, 28]
cmp w0, 1
bgt .L2
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x0, [x0]
mov x3, x0
mov x2, 22
mov x1, 1
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl fwrite
mov w0, 1
b .L4
.L2:
ldr x0, [sp, 16]
add x0, x0, 8
ldr x0, [x0]
bl atoi
str w0, [sp, 44]
ldr w0, [sp, 44]
str w0, [sp, 65]
mov x5, 0
mov w4, -1
mov w3, 34
mov w2, 6
mov x1, 6
mov x0, 0
bl mmap
str x0, [sp, 48]
ldr x0, [sp, 48]
mov x1, x0
add x0, sp, 64
ldr w2, [x0]
str w2, [x1]
ldrh w0, [x0, 4]
strh w0, [x1, 4]
ldr x0, [sp, 48]
str x0, [sp, 56]
ldr x0, [sp, 56]
blr x0
.L4:
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 72]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L5
bl __stack_chk_fail
.L5:
mov w0, w1
ldp x29, x30, [sp], 80
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE6:
.size main, .-main
.section .rodata
.align 3
.LC0:
.string "\270"
.string ""
.string ""
.string ""
.ascii "\303"
.text
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.global IID_ITocEntry
.section .rodata
.align 3
.type IID_ITocEntry, %object
.size IID_ITocEntry, 24
IID_ITocEntry:
.xword 4063190534
.hword 22620
.hword 19951
.ascii "\205#eU\317\274\f\263"
.zero 4
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC0:
.string "Usage: monkey source destination\n"
.align 3
.LC1:
.string "r"
.align 3
.LC2:
.string "w"
.align 3
.LC3:
.string "No such file or directory.\n"
.text
.align 2
.global main
.type main, %function
main:
.LFB6:
.cfi_startproc
mov x12, 4160
sub sp, sp, x12
.cfi_def_cfa_offset 4160
stp x29, x30, [sp]
.cfi_offset 29, -4160
.cfi_offset 30, -4152
mov x29, sp
str w0, [sp, 28]
str x1, [sp, 16]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 4152]
mov x1, 0
ldr w0, [sp, 28]
cmp w0, 3
beq .L2
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x0, [x0]
mov x3, x0
mov x2, 33
mov x1, 1
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl fwrite
mov w0, 1
bl exit
.L2:
ldr x0, [sp, 16]
add x0, x0, 8
ldr x2, [x0]
adrp x0, .LC1
add x1, x0, :lo12:.LC1
mov x0, x2
bl fopen
str x0, [sp, 40]
ldr x0, [sp, 16]
add x0, x0, 16
ldr x2, [x0]
adrp x0, .LC2
add x1, x0, :lo12:.LC2
mov x0, x2
bl fopen
str x0, [sp, 48]
ldr x0, [sp, 40]
cmp x0, 0
beq .L3
ldr x0, [sp, 48]
cmp x0, 0
bne .L5
.L3:
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x0, [x0]
mov x3, x0
mov x2, 27
mov x1, 1
adrp x0, .LC3
add x0, x0, :lo12:.LC3
bl fwrite
mov w0, 1
bl exit
.L6:
add x0, sp, 56
ldr x1, [sp, 48]
bl fputs
.L5:
add x0, sp, 56
ldr x2, [sp, 40]
mov w1, 4096
bl fgets
cmp x0, 0
bne .L6
ldr x0, [sp, 40]
bl fclose
ldr x0, [sp, 48]
bl fclose
mov w0, 0
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 4152]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L8
bl __stack_chk_fail
.L8:
mov w0, w1
ldp x29, x30, [sp]
mov x12, 4160
add sp, sp, x12
.cfi_restore 29
.cfi_restore 30
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE6:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global htonl
.type htonl, %function
htonl:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str w0, [sp, 28]
bl __ESBMC_is_little_endian
cmp w0, 0
beq .L2
ldr w0, [sp, 28]
rev w0, w0
b .L3
.L2:
ldr w0, [sp, 28]
.L3:
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size htonl, .-htonl
.align 2
.global htons
.type htons, %function
htons:
.LFB1:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
strh w0, [sp, 30]
bl __ESBMC_is_little_endian
cmp w0, 0
beq .L5
ldrh w0, [sp, 30]
rev16 w0, w0
and w0, w0, 65535
b .L6
.L5:
ldrh w0, [sp, 30]
.L6:
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE1:
.size htons, .-htons
.align 2
.global ntohl
.type ntohl, %function
ntohl:
.LFB2:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str w0, [sp, 28]
bl __ESBMC_is_little_endian
cmp w0, 0
beq .L8
ldr w0, [sp, 28]
rev w0, w0
b .L9
.L8:
ldr w0, [sp, 28]
.L9:
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE2:
.size ntohl, .-ntohl
.align 2
.global ntohs
.type ntohs, %function
ntohs:
.LFB3:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
strh w0, [sp, 30]
bl __ESBMC_is_little_endian
cmp w0, 0
beq .L11
ldrh w0, [sp, 30]
rev16 w0, w0
and w0, w0, 65535
b .L12
.L11:
ldrh w0, [sp, 30]
.L12:
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE3:
.size ntohs, .-ntohs
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.global freq1
.data
.align 3
.type freq1, %object
.size freq1, 16
freq1:
.word 1500
.word 2500
.word 2000
.word 3000
.global freq2
.align 3
.type freq2, %object
.size freq2, 16
freq2:
.word 2500
.word 3500
.word 3000
.word 4000
.global freq3
.align 3
.type freq3, %object
.size freq3, 16
freq3:
.word 3500
.word 2500
.word 4000
.word 3000
.global freq4
.align 3
.type freq4, %object
.size freq4, 16
freq4:
.word 4500
.word 3500
.word 4000
.word 3000
.global song
.align 3
.type song, %object
.size song, 16
song:
.word 3500
.word 2500
.word 4000
.word 3000
.global c4_note
.align 2
.type c4_note, %object
.size c4_note, 4
c4_note:
.word 7644
.global db4_note
.align 2
.type db4_note, %object
.size db4_note, 4
db4_note:
.word 7216
.global d4_note
.align 2
.type d4_note, %object
.size d4_note, 4
d4_note:
.word 6811
.global eb4_note
.align 2
.type eb4_note, %object
.size eb4_note, 4
eb4_note:
.word 6428
.global e4_note
.align 2
.type e4_note, %object
.size e4_note, 4
e4_note:
.word 6067
.global f4_note
.align 2
.type f4_note, %object
.size f4_note, 4
f4_note:
.word 5727
.global gb4_note
.align 2
.type gb4_note, %object
.size gb4_note, 4
gb4_note:
.word 5406
.global g4_note
.align 2
.type g4_note, %object
.size g4_note, 4
g4_note:
.word 5102
.global ab4_note
.align 2
.type ab4_note, %object
.size ab4_note, 4
ab4_note:
.word 4816
.global a4_note
.align 2
.type a4_note, %object
.size a4_note, 4
a4_note:
.word 4545
.global bb4_note
.align 2
.type bb4_note, %object
.size bb4_note, 4
bb4_note:
.word 4290
.global b4_note
.align 2
.type b4_note, %object
.size b4_note, 4
b4_note:
.word 4050
.global c5_note
.align 2
.type c5_note, %object
.size c5_note, 4
c5_note:
.word 3822
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global foo
.type foo, %function
foo:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -16]!
.cfi_def_cfa_offset 16
.cfi_offset 29, -16
.cfi_offset 30, -8
mov x29, sp
bl bar
bl baz
nop
ldp x29, x30, [sp], 16
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size foo, .-foo
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.global xx_head
.bss
.align 3
.type xx_head, %object
.size xx_head, 8
xx_head:
.zero 8
.global xx_tail
.align 3
.type xx_tail, %object
.size xx_tail, 8
xx_tail:
.zero 8
.global xx_freelist
.align 3
.type xx_freelist, %object
.size xx_freelist, 8
xx_freelist:
.zero 8
.global xxbuf
.align 3
.type xxbuf, %object
.size xxbuf, 8
xxbuf:
.zero 8
.global xxbufp
.align 3
.type xxbufp, %object
.size xxbufp, 8
xxbufp:
.zero 8
.global xxbufe
.align 3
.type xxbufe, %object
.size xxbufe, 8
xxbufe:
.zero 8
.global xxbufsize
.align 2
.type xxbufsize, %object
.size xxbufsize, 4
xxbufsize:
.zero 4
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC0:
.string "Line-1"
.text
.align 2
.global main
.type main, %function
main:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -16]!
.cfi_def_cfa_offset 16
.cfi_offset 29, -16
.cfi_offset 30, -8
mov x29, sp
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl printf
nop
ldp x29, x30, [sp], 16
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC0:
.string "\nThis process is a leaf, pid: %d , parent pid: %d\n"
.align 3
.LC1:
.string "\nThis process is at the level: %d ,and has pid: %d\n"
.align 3
.LC2:
.string "\nThis process is at the level: %d ,and has pid: %d ,parent pid: %d\n"
.align 3
.LC3:
.string "%d"
.align 3
.LC4:
.string "treeProc"
.align 3
.LC5:
.string "./treeproc"
.text
.align 2
.global main
.type main, %function
main:
.LFB6:
.cfi_startproc
stp x29, x30, [sp, -112]!
.cfi_def_cfa_offset 112
.cfi_offset 29, -112
.cfi_offset 30, -104
mov x29, sp
str x19, [sp, 16]
.cfi_offset 19, -96
str w0, [sp, 44]
str x1, [sp, 32]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 104]
mov x1, 0
ldr w0, [sp, 44]
cmp w0, 2
ble .L2
ldr w0, [sp, 44]
cmp w0, 4
ble .L3
.L2:
mov w0, 0
bl exit
.L3:
ldr w0, [sp, 44]
cmp w0, 3
bne .L4
str wzr, [sp, 56]
b .L5
.L4:
ldr w0, [sp, 44]
cmp w0, 4
bne .L5
ldr x0, [sp, 32]
add x0, x0, 24
ldr x0, [x0]
bl atoi
str w0, [sp, 56]
.L5:
ldr x0, [sp, 32]
add x0, x0, 8
ldr x0, [x0]
bl atoi
str w0, [sp, 64]
ldr x0, [sp, 32]
add x0, x0, 16
ldr x0, [x0]
bl atoi
str w0, [sp, 68]
ldr w1, [sp, 64]
ldr w0, [sp, 56]
cmp w1, w0
bne .L6
ldr w0, [sp, 68]
bl sleep
bl getpid
mov w19, w0
bl getppid
mov w2, w0
mov w1, w19
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl printf
mov w0, 0
bl exit
.L6:
ldr w0, [sp, 56]
cmp w0, 0
bne .L7
bl getpid
mov w2, w0
ldr w1, [sp, 56]
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl printf
b .L8
.L7:
ldr w0, [sp, 56]
cmp w0, 0
ble .L8
ldr w0, [sp, 68]
bl sleep
bl getpid
mov w19, w0
bl getppid
mov w3, w0
mov w2, w19
ldr w1, [sp, 56]
adrp x0, .LC2
add x0, x0, :lo12:.LC2
bl printf
.L8:
ldr w0, [sp, 56]
add w0, w0, 1
str w0, [sp, 56]
bl fork
str w0, [sp, 72]
add x3, sp, 80
ldr w2, [sp, 56]
adrp x0, .LC3
add x1, x0, :lo12:.LC3
mov x0, x3
bl sprintf
ldr w0, [sp, 72]
cmp w0, 0
bne .L9
ldr x0, [sp, 32]
add x0, x0, 8
ldr x1, [x0]
ldr x0, [sp, 32]
add x0, x0, 16
ldr x0, [x0]
add x2, sp, 80
mov x5, 0
mov x4, x2
mov x3, x0
mov x2, x1
adrp x0, .LC4
add x1, x0, :lo12:.LC4
adrp x0, .LC5
add x0, x0, :lo12:.LC5
bl execl
b .L10
.L9:
bl fork
str w0, [sp, 76]
ldr w0, [sp, 76]
cmp w0, 0
bne .L11
ldr x0, [sp, 32]
add x0, x0, 8
ldr x1, [x0]
ldr x0, [sp, 32]
add x0, x0, 16
ldr x0, [x0]
add x2, sp, 80
mov x5, 0
mov x4, x2
mov x3, x0
mov x2, x1
adrp x0, .LC4
add x1, x0, :lo12:.LC4
adrp x0, .LC5
add x0, x0, :lo12:.LC5
bl execl
b .L10
.L11:
mov x0, 0
bl wait
str w0, [sp, 60]
b .L12
.L14:
mov x0, 0
bl wait
str w0, [sp, 60]
.L12:
ldr w1, [sp, 60]
ldr w0, [sp, 72]
cmp w1, w0
beq .L13
ldr w1, [sp, 60]
ldr w0, [sp, 76]
cmp w1, w0
bne .L14
.L13:
mov x0, 0
bl wait
str w0, [sp, 60]
b .L15
.L16:
mov x0, 0
bl wait
str w0, [sp, 60]
.L15:
ldr w1, [sp, 60]
ldr w0, [sp, 72]
cmp w1, w0
beq .L10
ldr w1, [sp, 60]
ldr w0, [sp, 76]
cmp w1, w0
bne .L16
.L10:
mov w0, 0
bl exit
.cfi_endproc
.LFE6:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global level3
.type level3, %function
level3:
.LFB0:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str w0, [sp, 12]
str w1, [sp, 8]
ldr w1, [sp, 12]
ldr w0, [sp, 8]
add w0, w1, w0
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size level3, .-level3
.align 2
.global level2
.type level2, %function
level2:
.LFB1:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str w0, [sp, 28]
str w1, [sp, 24]
ldr w1, [sp, 28]
ldr w0, [sp, 24]
sub w2, w1, w0
ldr w1, [sp, 28]
ldr w0, [sp, 24]
add w0, w1, w0
mov w1, w0
mov w0, w2
bl level3
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE1:
.size level2, .-level2
.align 2
.global level1
.type level1, %function
level1:
.LFB2:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str w0, [sp, 28]
str w1, [sp, 24]
ldr w1, [sp, 28]
ldr w0, [sp, 24]
sdiv w3, w1, w0
ldr w0, [sp, 28]
ldr w1, [sp, 24]
sdiv w2, w0, w1
ldr w1, [sp, 24]
mul w1, w2, w1
sub w0, w0, w1
mov w1, w0
mov w0, w3
bl level2
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE2:
.size level1, .-level1
.align 2
.global main
.type main, %function
main:
.LFB3:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
mov w0, 1
str w0, [sp, 28]
ldr w1, [sp, 28]
ldr w0, [sp, 28]
bl level1
str w0, [sp, 28]
ldr w0, [sp, 28]
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE3:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global mbed_error
.type mbed_error, %function
mbed_error:
.LFB0:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str w0, [sp, 28]
str x1, [sp, 16]
str w2, [sp, 24]
str x3, [sp, 8]
str w4, [sp, 4]
mov w0, 0
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size mbed_error, .-mbed_error
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC0:
.string "\n\tUsage: %s [OPTION]... [DIR]...\n\n"
.align 3
.LC1:
.string "\n Provides a convenient way to inspect the content of a directory\n or drive at a glance.\n\n -A, --include-all include all files (i.e. hidden)\n"
.text
.align 2
.global usage
.type usage, %function
usage:
.LFB6:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str x0, [sp, 24]
ldr x1, [sp, 24]
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl printf
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl puts
mov w0, 0
bl exit
.cfi_endproc
.LFE6:
.size usage, .-usage
.section .rodata
.align 3
.LC2:
.string ""
.text
.align 2
.global main
.type main, %function
main:
.LFB7:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str w0, [sp, 28]
str x1, [sp, 16]
ldr w0, [sp, 28]
cmp w0, 1
bgt .L3
ldr x0, [sp, 16]
ldr x0, [x0]
bl usage
.L3:
adrp x0, .LC2
add x1, x0, :lo12:.LC2
mov w0, 6
bl setlocale
bl traverse
mov w0, 0
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE7:
.size main, .-main
.align 2
.type traverse, %function
traverse:
.LFB8:
.cfi_startproc
nop
ret
.cfi_endproc
.LFE8:
.size traverse, .-traverse
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC0:
.string "service.exported.interfaces"
.section .data.rel.ro.local,"aw"
.align 3
.type OSGI_RSA_SERVICE_EXPORTED_INTERFACES, %object
.size OSGI_RSA_SERVICE_EXPORTED_INTERFACES, 8
OSGI_RSA_SERVICE_EXPORTED_INTERFACES:
.xword .LC0
.section .rodata
.align 3
.LC1:
.string "endpoint.framework.uuid"
.section .data.rel.ro.local
.align 3
.type OSGI_RSA_ENDPOINT_FRAMEWORK_UUID, %object
.size OSGI_RSA_ENDPOINT_FRAMEWORK_UUID, 8
OSGI_RSA_ENDPOINT_FRAMEWORK_UUID:
.xword .LC1
.section .rodata
.align 3
.LC2:
.string "endpoint.service.id"
.section .data.rel.ro.local
.align 3
.type OSGI_RSA_ENDPOINT_SERVICE_ID, %object
.size OSGI_RSA_ENDPOINT_SERVICE_ID, 8
OSGI_RSA_ENDPOINT_SERVICE_ID:
.xword .LC2
.section .rodata
.align 3
.LC3:
.string "service.location"
.section .data.rel.ro.local
.align 3
.type OSGI_RSA_SERVICE_LOCATION, %object
.size OSGI_RSA_SERVICE_LOCATION, 8
OSGI_RSA_SERVICE_LOCATION:
.xword .LC3
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC0:
.string "FizzBuzz"
.align 3
.LC1:
.string "Fizz"
.align 3
.LC2:
.string "Buzz"
.align 3
.LC3:
.string "%d\n"
.text
.align 2
.global fizzBuzz
.type fizzBuzz, %function
fizzBuzz:
.LFB6:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str w0, [sp, 28]
mov w0, 1
str w0, [sp, 44]
b .L2
.L7:
ldr w2, [sp, 44]
mov w0, 21846
movk w0, 0x5555, lsl 16
smull x0, w2, w0
lsr x1, x0, 32
asr w0, w2, 31
sub w1, w1, w0
mov w0, w1
lsl w0, w0, 1
add w0, w0, w1
sub w1, w2, w0
cmp w1, 0
bne .L3
ldr w2, [sp, 44]
mov w0, 26215
movk w0, 0x6666, lsl 16
smull x0, w2, w0
lsr x0, x0, 32
asr w1, w0, 1
asr w0, w2, 31
sub w1, w1, w0
mov w0, w1
lsl w0, w0, 2
add w0, w0, w1
sub w1, w2, w0
cmp w1, 0
bne .L3
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl puts
b .L4
.L3:
ldr w2, [sp, 44]
mov w0, 21846
movk w0, 0x5555, lsl 16
smull x0, w2, w0
lsr x1, x0, 32
asr w0, w2, 31
sub w1, w1, w0
mov w0, w1
lsl w0, w0, 1
add w0, w0, w1
sub w1, w2, w0
cmp w1, 0
bne .L5
ldr w2, [sp, 44]
mov w0, 26215
movk w0, 0x6666, lsl 16
smull x0, w2, w0
lsr x0, x0, 32
asr w1, w0, 1
asr w0, w2, 31
sub w1, w1, w0
mov w0, w1
lsl w0, w0, 2
add w0, w0, w1
sub w1, w2, w0
cmp w1, 0
beq .L5
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl puts
b .L4
.L5:
ldr w2, [sp, 44]
mov w0, 26215
movk w0, 0x6666, lsl 16
smull x0, w2, w0
lsr x0, x0, 32
asr w1, w0, 1
asr w0, w2, 31
sub w1, w1, w0
mov w0, w1
lsl w0, w0, 2
add w0, w0, w1
sub w1, w2, w0
cmp w1, 0
bne .L6
ldr w2, [sp, 44]
mov w0, 21846
movk w0, 0x5555, lsl 16
smull x0, w2, w0
lsr x1, x0, 32
asr w0, w2, 31
sub w1, w1, w0
mov w0, w1
lsl w0, w0, 1
add w0, w0, w1
sub w1, w2, w0
cmp w1, 0
beq .L6
adrp x0, .LC2
add x0, x0, :lo12:.LC2
bl puts
b .L4
.L6:
ldr w1, [sp, 44]
adrp x0, .LC3
add x0, x0, :lo12:.LC3
bl printf
.L4:
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L2:
ldr w1, [sp, 28]
ldr w0, [sp, 44]
cmp w1, w0
bge .L7
nop
nop
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE6:
.size fizzBuzz, .-fizzBuzz
.align 2
.global main
.type main, %function
main:
.LFB7:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
bl readline
bl rtrim
bl ltrim
bl parse_int
str w0, [sp, 28]
ldr w0, [sp, 28]
bl fizzBuzz
mov w0, 0
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE7:
.size main, .-main
.align 2
.global readline
.type readline, %function
readline:
.LFB8:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
mov x0, 1024
str x0, [sp, 24]
str xzr, [sp, 32]
ldr x0, [sp, 24]
bl malloc
str x0, [sp, 40]
.L14:
ldr x1, [sp, 40]
ldr x0, [sp, 32]
add x0, x1, x0
str x0, [sp, 48]
ldr x0, [sp, 24]
mov w1, w0
ldr x0, [sp, 32]
sub w0, w1, w0
mov w1, w0
adrp x0, :got:stdin
ldr x0, [x0, #:got_lo12:stdin]
ldr x0, [x0]
mov x2, x0
ldr x0, [sp, 48]
bl fgets
str x0, [sp, 56]
ldr x0, [sp, 56]
cmp x0, 0
beq .L19
ldr x0, [sp, 48]
bl strlen
mov x1, x0
ldr x0, [sp, 32]
add x0, x0, x1
str x0, [sp, 32]
ldr x0, [sp, 24]
sub x0, x0, #1
ldr x1, [sp, 32]
cmp x1, x0
bcc .L12
ldr x0, [sp, 32]
sub x0, x0, #1
ldr x1, [sp, 40]
add x0, x1, x0
ldrb w0, [x0]
cmp w0, 10
beq .L12
ldr x0, [sp, 24]
lsl x0, x0, 1
str x0, [sp, 24]
ldr x1, [sp, 24]
ldr x0, [sp, 40]
bl realloc
str x0, [sp, 40]
ldr x0, [sp, 40]
cmp x0, 0
bne .L14
str xzr, [sp, 40]
b .L12
.L19:
nop
.L12:
ldr x0, [sp, 32]
sub x0, x0, #1
ldr x1, [sp, 40]
add x0, x1, x0
ldrb w0, [x0]
cmp w0, 10
bne .L15
ldr x0, [sp, 32]
sub x0, x0, #1
ldr x1, [sp, 40]
add x0, x1, x0
strb wzr, [x0]
ldr x1, [sp, 32]
ldr x0, [sp, 40]
bl realloc
str x0, [sp, 40]
ldr x0, [sp, 40]
cmp x0, 0
bne .L16
str xzr, [sp, 40]
b .L16
.L15:
ldr x0, [sp, 32]
add x0, x0, 1
mov x1, x0
ldr x0, [sp, 40]
bl realloc
str x0, [sp, 40]
ldr x0, [sp, 40]
cmp x0, 0
bne .L17
str xzr, [sp, 40]
b .L16
.L17:
ldr x1, [sp, 40]
ldr x0, [sp, 32]
add x0, x1, x0
strb wzr, [x0]
.L16:
ldr x0, [sp, 40]
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE8:
.size readline, .-readline
.align 2
.global ltrim
.type ltrim, %function
ltrim:
.LFB9:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str x0, [sp, 24]
ldr x0, [sp, 24]
cmp x0, 0
bne .L21
mov x0, 0
b .L22
.L21:
ldr x0, [sp, 24]
ldrb w0, [x0]
cmp w0, 0
bne .L24
ldr x0, [sp, 24]
b .L22
.L26:
ldr x0, [sp, 24]
add x0, x0, 1
str x0, [sp, 24]
.L24:
ldr x0, [sp, 24]
ldrb w0, [x0]
cmp w0, 0
beq .L25
bl __ctype_b_loc
ldr x1, [x0]
ldr x0, [sp, 24]
ldrb w0, [x0]
and x0, x0, 255
lsl x0, x0, 1
add x0, x1, x0
ldrh w0, [x0]
and w0, w0, 8192
cmp w0, 0
bne .L26
.L25:
ldr x0, [sp, 24]
.L22:
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE9:
.size ltrim, .-ltrim
.align 2
.global rtrim
.type rtrim, %function
rtrim:
.LFB10:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
ldr x0, [sp, 24]
cmp x0, 0
bne .L28
mov x0, 0
b .L29
.L28:
ldr x0, [sp, 24]
ldrb w0, [x0]
cmp w0, 0
bne .L30
ldr x0, [sp, 24]
b .L29
.L30:
ldr x0, [sp, 24]
bl strlen
sub x0, x0, #1
ldr x1, [sp, 24]
add x0, x1, x0
str x0, [sp, 40]
b .L31
.L33:
ldr x0, [sp, 40]
sub x0, x0, #1
str x0, [sp, 40]
.L31:
ldr x1, [sp, 40]
ldr x0, [sp, 24]
cmp x1, x0
bcc .L32
bl __ctype_b_loc
ldr x1, [x0]
ldr x0, [sp, 40]
ldrb w0, [x0]
and x0, x0, 255
lsl x0, x0, 1
add x0, x1, x0
ldrh w0, [x0]
and w0, w0, 8192
cmp w0, 0
bne .L33
.L32:
ldr x0, [sp, 40]
add x0, x0, 1
strb wzr, [x0]
ldr x0, [sp, 24]
.L29:
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE10:
.size rtrim, .-rtrim
.align 2
.global parse_int
.type parse_int, %function
parse_int:
.LFB11:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str x0, [sp, 24]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 56]
mov x1, 0
add x0, sp, 48
mov w2, 10
mov x1, x0
ldr x0, [sp, 24]
bl strtol
str w0, [sp, 44]
ldr x0, [sp, 48]
ldr x1, [sp, 24]
cmp x1, x0
beq .L35
ldr x0, [sp, 48]
ldrb w0, [x0]
cmp w0, 0
beq .L36
.L35:
mov w0, 1
bl exit
.L36:
ldr w0, [sp, 44]
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 56]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L38
bl __stack_chk_fail
.L38:
mov w0, w1
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE11:
.size parse_int, .-parse_int
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC0:
.string "Hello World!"
.text
.align 2
.global main
.type main, %function
main:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -16]!
.cfi_def_cfa_offset 16
.cfi_offset 29, -16
.cfi_offset 30, -8
mov x29, sp
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl puts
mov w0, 0
ldp x29, x30, [sp], 16
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC0:
.string "/proc/self/exe"
.text
.align 2
.type executable, %function
executable:
.LFB6:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str xzr, [sp, 16]
str xzr, [sp, 24]
str xzr, [sp, 32]
str xzr, [sp, 16]
.L6:
ldr x0, [sp, 24]
add x0, x0, 32
str x0, [sp, 24]
ldr x1, [sp, 24]
ldr x0, [sp, 16]
bl realloc
str x0, [sp, 40]
ldr x0, [sp, 40]
cmp x0, 0
bne .L2
ldr x0, [sp, 16]
cmp x0, 0
beq .L3
ldr x0, [sp, 16]
bl free
.L3:
mov x0, 0
b .L4
.L2:
ldr x0, [sp, 40]
str x0, [sp, 16]
ldr x2, [sp, 24]
ldr x1, [sp, 16]
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl readlink
str x0, [sp, 32]
ldr x0, [sp, 32]
cmp x0, 0
blt .L5
ldr x0, [sp, 24]
ldr x1, [sp, 32]
cmp x1, x0
beq .L6
.L5:
ldr x0, [sp, 32]
cmp x0, 0
blt .L7
ldr x0, [sp, 32]
ldr x1, [sp, 16]
add x0, x1, x0
strb wzr, [x0]
ldr x0, [sp, 16]
b .L4
.L7:
ldr x0, [sp, 16]
bl free
mov x0, 0
.L4:
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE6:
.size executable, .-executable
.section .rodata
.align 3
.LC1:
.string ": "
.align 3
.LC2:
.string ""
.align 3
.LC3:
.string "%s%s"
.align 3
.LC4:
.string "program.c"
.align 3
.LC5:
.string "cnt > 0 && (size_t)cnt < sizeof(buf)"
.text
.align 2
.global setproctitle
.type setproctitle, %function
setproctitle:
.LFB7:
.cfi_startproc
stp x29, x30, [sp, -352]!
.cfi_def_cfa_offset 352
.cfi_offset 29, -352
.cfi_offset 30, -344
mov x29, sp
str x0, [sp, 56]
str x1, [sp, 296]
str x2, [sp, 304]
str x3, [sp, 312]
str x4, [sp, 320]
str x5, [sp, 328]
str x6, [sp, 336]
str x7, [sp, 344]
str q0, [sp, 160]
str q1, [sp, 176]
str q2, [sp, 192]
str q3, [sp, 208]
str q4, [sp, 224]
str q5, [sp, 240]
str q6, [sp, 256]
str q7, [sp, 272]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 152]
mov x1, 0
str wzr, [sp, 64]
str wzr, [sp, 68]
ldr x0, [sp, 56]
cmp x0, 0
beq .L9
ldr x0, [sp, 56]
ldrb w0, [x0]
cmp w0, 45
bne .L9
mov w0, 1
str w0, [sp, 68]
ldr x0, [sp, 56]
add x0, x0, 1
ldrb w0, [x0]
cmp w0, 0
bne .L10
.L9:
ldr x0, [sp, 56]
cmp x0, 0
beq .L11
ldrsw x0, [sp, 68]
ldr x1, [sp, 56]
add x0, x1, x0
ldrb w0, [x0]
cmp w0, 0
beq .L11
adrp x0, .LC1
add x0, x0, :lo12:.LC1
b .L12
.L11:
adrp x0, .LC2
add x0, x0, :lo12:.LC2
.L12:
str x0, [sp, 72]
bl executable
str x0, [sp, 80]
ldr x0, [sp, 80]
cmp x0, 0
beq .L10
ldr x0, [sp, 80]
bl __xpg_basename
add x5, sp, 120
ldr x4, [sp, 72]
mov x3, x0
adrp x0, .LC3
add x2, x0, :lo12:.LC3
mov x1, 32
mov x0, x5
bl snprintf
str w0, [sp, 64]
ldr w0, [sp, 64]
cmp w0, 31
bls .L13
mov w0, 31
str w0, [sp, 64]
.L13:
ldr x0, [sp, 80]
bl free
.L10:
ldr x0, [sp, 56]
cmp x0, 0
beq .L14
ldrsw x0, [sp, 68]
ldr x1, [sp, 56]
add x0, x1, x0
ldrb w0, [x0]
cmp w0, 0
beq .L14
add x0, sp, 352
str x0, [sp, 88]
add x0, sp, 352
str x0, [sp, 96]
add x0, sp, 288
str x0, [sp, 104]
mov w0, -56
str w0, [sp, 112]
mov w0, -128
str w0, [sp, 116]
ldrsw x0, [sp, 64]
add x1, sp, 120
add x4, x1, x0
ldrsw x0, [sp, 64]
mov x1, 32
sub x5, x1, x0
ldrsw x0, [sp, 68]
ldr x1, [sp, 56]
add x2, x1, x0
add x0, sp, 16
add x1, sp, 88
ldp q0, q1, [x1]
stp q0, q1, [x0]
add x0, sp, 16
mov x3, x0
mov x1, x5
mov x0, x4
bl vsnprintf
str w0, [sp, 64]
.L14:
ldr w0, [sp, 64]
cmp w0, 0
ble .L20
ldr w0, [sp, 64]
cmp w0, 0
ble .L16
ldr w0, [sp, 64]
cmp w0, 31
bls .L19
.L16:
adrp x0, __PRETTY_FUNCTION__.0
add x3, x0, :lo12:__PRETTY_FUNCTION__.0
mov w2, 82
adrp x0, .LC4
add x1, x0, :lo12:.LC4
adrp x0, .LC5
add x0, x0, :lo12:.LC5
bl __assert_fail
.L19:
add x0, sp, 120
mov w4, 0
mov w3, 0
mov w2, 0
mov x1, x0
mov w0, 15
bl prctl
.L20:
nop
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [sp, 152]
ldr x1, [x0]
subs x2, x2, x1
mov x1, 0
beq .L18
bl __stack_chk_fail
.L18:
ldp x29, x30, [sp], 352
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE7:
.size setproctitle, .-setproctitle
.section .rodata
.align 3
.type __PRETTY_FUNCTION__.0, %object
.size __PRETTY_FUNCTION__.0, 13
__PRETTY_FUNCTION__.0:
.string "setproctitle"
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC0:
.string "Bye"
.text
.align 2
.global main
.type main, %function
main:
.LFB6:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str w0, [sp, 28]
str x1, [sp, 16]
mov w0, 3
bl alarm
bl pause
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl puts
mov w0, 0
bl exit
.cfi_endproc
.LFE6:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.global alarm_time
.bss
.align 2
.type alarm_time, %object
.size alarm_time, 4
alarm_time:
.zero 4
.global pid_file
.align 3
.type pid_file, %object
.size pid_file, 8
pid_file:
.zero 8
.text
.align 2
.global reset_alarm
.type reset_alarm, %function
reset_alarm:
.LFB6:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str w0, [sp, 28]
adrp x0, alarm_time
add x0, x0, :lo12:alarm_time
ldr w0, [x0]
bl alarm
adrp x0, reset_alarm
add x1, x0, :lo12:reset_alarm
mov w0, 10
bl signal
nop
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE6:
.size reset_alarm, .-reset_alarm
.align 2
.global done
.type done, %function
done:
.LFB7:
.cfi_startproc
stp x29, x30, [sp, -16]!
.cfi_def_cfa_offset 16
.cfi_offset 29, -16
.cfi_offset 30, -8
mov x29, sp
mov w0, 0
bl exit
.cfi_endproc
.LFE7:
.size done, .-done
.section .rodata
.align 3
.LC0:
.string "%i"
.text
.align 2
.global main
.type main, %function
main:
.LFB8:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str w0, [sp, 28]
str x1, [sp, 16]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 56]
mov x1, 0
ldr x0, [sp, 16]
add x0, x0, 8
ldr x0, [x0]
bl atoi
mov w1, w0
adrp x0, alarm_time
add x0, x0, :lo12:alarm_time
str w1, [x0]
ldr x0, [sp, 16]
ldr x1, [x0, 16]
adrp x0, pid_file
add x0, x0, :lo12:pid_file
str x1, [x0]
adrp x0, pid_file
add x0, x0, :lo12:pid_file
ldr x0, [x0]
mov w1, 438
bl creat
str w0, [sp, 36]
bl getpid
add x3, sp, 40
mov w2, w0
adrp x0, .LC0
add x1, x0, :lo12:.LC0
mov x0, x3
bl sprintf
add x0, sp, 40
bl strlen
mov x1, x0
add x0, sp, 40
mov x2, x1
mov x1, x0
ldr w0, [sp, 36]
bl write
ldr w0, [sp, 36]
bl close
adrp x0, alarm_time
add x0, x0, :lo12:alarm_time
ldr w0, [x0]
bl alarm
adrp x0, reset_alarm
add x1, x0, :lo12:reset_alarm
mov w0, 10
bl signal
adrp x0, done
add x1, x0, :lo12:done
mov w0, 14
bl signal
.L4:
bl pause
b .L4
.cfi_endproc
.LFE8:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global main
.type main, %function
main:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
strb wzr, [sp, 27]
b .L2
.L5:
ldr w0, [sp, 28]
cmp w0, 32
bne .L3
mov w0, 1
strb w0, [sp, 27]
b .L2
.L3:
ldrb w0, [sp, 27]
cmp w0, 1
bne .L4
mov w0, 32
bl putchar
strb wzr, [sp, 27]
.L4:
ldr w0, [sp, 28]
bl putchar
.L2:
bl getchar
str w0, [sp, 28]
ldr w0, [sp, 28]
cmn w0, #1
bne .L5
mov w0, 0
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global ft_iterative_factorial
.type ft_iterative_factorial, %function
ft_iterative_factorial:
.LFB0:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str w0, [sp, 12]
ldr w0, [sp, 12]
str w0, [sp, 24]
ldr w0, [sp, 12]
sub w0, w0, #1
str w0, [sp, 28]
ldr w0, [sp, 12]
cmp w0, 0
bne .L2
mov w0, 1
b .L3
.L2:
ldr w0, [sp, 12]
cmp w0, 0
bge .L5
mov w0, 0
b .L3
.L6:
ldr w1, [sp, 24]
ldr w0, [sp, 28]
mul w0, w1, w0
str w0, [sp, 24]
ldr w0, [sp, 28]
sub w0, w0, #1
str w0, [sp, 28]
.L5:
ldr w0, [sp, 28]
cmp w0, 0
bne .L6
ldr w0, [sp, 24]
.L3:
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size ft_iterative_factorial, .-ft_iterative_factorial
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC0:
.string "r"
.align 3
.LC1:
.string "ERROR: file not found %s\n"
.align 3
.LC2:
.string "%09f"
.align 3
.LC3:
.string "ERROR: Could not access or parse %s\n"
.text
.align 2
.global floats_from_file
.type floats_from_file, %function
floats_from_file:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -80]!
.cfi_def_cfa_offset 80
.cfi_offset 29, -80
.cfi_offset 30, -72
mov x29, sp
str x0, [sp, 40]
str w1, [sp, 36]
str x2, [sp, 24]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 72]
mov x1, 0
str wzr, [sp, 60]
str wzr, [sp, 56]
adrp x0, .LC0
add x1, x0, :lo12:.LC0
ldr x0, [sp, 40]
bl fopen
str x0, [sp, 64]
ldr x0, [sp, 64]
cmp x0, 0
bne .L2
ldr x1, [sp, 40]
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl printf
mov w0, -1
b .L7
.L2:
str wzr, [sp, 60]
b .L4
.L6:
add x0, sp, 56
mov x2, x0
adrp x0, .LC2
add x1, x0, :lo12:.LC2
ldr x0, [sp, 64]
bl __isoc99_fscanf
cmp w0, 1
beq .L5
ldr x1, [sp, 40]
adrp x0, .LC3
add x0, x0, :lo12:.LC3
bl printf
.L5:
ldrsw x0, [sp, 60]
lsl x0, x0, 2
ldr x1, [sp, 24]
add x0, x1, x0
ldr s0, [sp, 56]
str s0, [x0]
ldr w0, [sp, 60]
add w0, w0, 1
str w0, [sp, 60]
.L4:
ldr w1, [sp, 60]
ldr w0, [sp, 36]
cmp w1, w0
blt .L6
ldr x0, [sp, 64]
bl fclose
mov w0, 0
.L7:
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 72]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L8
bl __stack_chk_fail
.L8:
mov w0, w1
ldp x29, x30, [sp], 80
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size floats_from_file, .-floats_from_file
.align 2
.global rateOfChange
.type rateOfChange, %function
rateOfChange:
.LFB1:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str s0, [sp, 12]
str s1, [sp, 8]
str s2, [sp, 4]
ldr s1, [sp, 8]
ldr s0, [sp, 12]
fsub s1, s1, s0
ldr s0, [sp, 4]
fdiv s0, s1, s0
str s0, [sp, 28]
ldr s0, [sp, 28]
fcvt d0, s0
adrp x0, .LC4
ldr d1, [x0, #:lo12:.LC4]
fcmpe d0, d1
bls .L14
b .L10
.L14:
ldr s0, [sp, 28]
fcvt d0, s0
adrp x0, .LC5
ldr d1, [x0, #:lo12:.LC5]
fcmpe d0, d1
bge .L15
b .L10
.L15:
str wzr, [sp, 28]
.L10:
ldr s0, [sp, 28]
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE1:
.size rateOfChange, .-rateOfChange
.section .rodata
.align 3
.LC6:
.string "%.4f, "
.align 3
.LC7:
.string "%.4f\n"
.text
.align 2
.global print_floats
.type print_floats, %function
print_floats:
.LFB2:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
str w1, [sp, 20]
str wzr, [sp, 44]
b .L17
.L18:
ldrsw x0, [sp, 44]
lsl x0, x0, 2
ldr x1, [sp, 24]
add x0, x1, x0
ldr s0, [x0]
fcvt d0, s0
adrp x0, .LC6
add x0, x0, :lo12:.LC6
bl printf
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L17:
ldr w0, [sp, 20]
sub w0, w0, #1
ldr w1, [sp, 44]
cmp w1, w0
blt .L18
ldrsw x0, [sp, 20]
lsl x0, x0, 2
sub x0, x0, #4
ldr x1, [sp, 24]
add x0, x1, x0
ldr s0, [x0]
fcvt d0, s0
adrp x0, .LC7
add x0, x0, :lo12:.LC7
bl printf
nop
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE2:
.size print_floats, .-print_floats
.section .rodata
.align 3
.LC4:
.word -1717986918
.word 1068079513
.align 3
.LC5:
.word -1717986918
.word -1079404135
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.global a
.bss
.align 3
.type a, %object
.size a, 4004004
a:
.zero 4004004
.global b
.align 2
.type b, %object
.size b, 4
b:
.zero 4
.global n
.align 2
.type n, %object
.size n, 4
n:
.zero 4
.global m
.align 2
.type m, %object
.size m, 4
m:
.zero 4
.global q
.align 3
.type q, %object
.size q, 4004004
q:
.zero 4004004
.global v
.align 3
.type v, %object
.size v, 80080080
v:
.zero 80080080
.global w
.align 3
.type w, %object
.size w, 80080080
w:
.zero 80080080
.global p
.align 3
.type p, %object
.size p, 80080080
p:
.zero 80080080
.text
.align 2
.global swap
.type swap, %function
swap:
.LFB0:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str x0, [sp, 8]
str x1, [sp]
ldr x0, [sp, 8]
ldr w0, [x0]
str w0, [sp, 28]
ldr x0, [sp]
ldr w1, [x0]
ldr x0, [sp, 8]
str w1, [x0]
ldr x0, [sp]
ldr w1, [sp, 28]
str w1, [x0]
nop
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size swap, .-swap
.section .rodata
.align 3
.LC0:
.string "%d%d"
.align 3
.LC1:
.string "%d"
.align 3
.LC2:
.string "%d\n"
.text
.align 2
.global main
.type main, %function
main:
.LFB1:
.cfi_startproc
stp x29, x30, [sp, -80]!
.cfi_def_cfa_offset 80
.cfi_offset 29, -80
.cfi_offset 30, -72
mov x29, sp
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 72]
mov x1, 0
adrp x0, m
add x2, x0, :lo12:m
adrp x0, n
add x1, x0, :lo12:n
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl __isoc99_scanf
mov w0, 1
str w0, [sp, 28]
b .L3
.L4:
ldrsw x0, [sp, 28]
lsl x1, x0, 2
adrp x0, a
add x0, x0, :lo12:a
add x0, x1, x0
mov x1, x0
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl __isoc99_scanf
ldr w0, [sp, 28]
add w0, w0, 1
str w0, [sp, 28]
.L3:
adrp x0, n
add x0, x0, :lo12:n
ldr w0, [x0]
ldr w1, [sp, 28]
cmp w1, w0
ble .L4
adrp x0, q
add x0, x0, :lo12:q
mov w1, 1
str w1, [x0]
mov w0, 1
str w0, [sp, 32]
b .L5
.L6:
ldr w0, [sp, 32]
sub w1, w0, #1
adrp x0, q
add x0, x0, :lo12:q
sxtw x1, w1
ldr w0, [x0, x1, lsl 2]
lsl w2, w0, 1
adrp x0, q
add x0, x0, :lo12:q
ldrsw x1, [sp, 32]
str w2, [x0, x1, lsl 2]
ldr w0, [sp, 32]
add w0, w0, 1
str w0, [sp, 32]
.L5:
ldr w0, [sp, 32]
cmp w0, 20
ble .L6
mov w0, 1
str w0, [sp, 36]
b .L7
.L8:
adrp x0, a
add x0, x0, :lo12:a
ldrsw x1, [sp, 36]
ldr w2, [x0, x1, lsl 2]
adrp x0, v
add x3, x0, :lo12:v
ldrsw x1, [sp, 36]
mov x0, x1
lsl x0, x0, 2
add x0, x0, x1
lsl x0, x0, 4
add x0, x3, x0
str w2, [x0]
adrp x0, v
add x2, x0, :lo12:v
ldrsw x1, [sp, 36]
mov x0, x1
lsl x0, x0, 2
add x0, x0, x1
lsl x0, x0, 4
add x0, x2, x0
ldr w2, [x0]
adrp x0, w
add x3, x0, :lo12:w
ldrsw x1, [sp, 36]
mov x0, x1
lsl x0, x0, 2
add x0, x0, x1
lsl x0, x0, 4
add x0, x3, x0
str w2, [x0]
adrp x0, w
add x2, x0, :lo12:w
ldrsw x1, [sp, 36]
mov x0, x1
lsl x0, x0, 2
add x0, x0, x1
lsl x0, x0, 4
add x0, x2, x0
ldr w2, [x0]
adrp x0, p
add x3, x0, :lo12:p
ldrsw x1, [sp, 36]
mov x0, x1
lsl x0, x0, 2
add x0, x0, x1
lsl x0, x0, 4
add x0, x3, x0
str w2, [x0]
ldr w0, [sp, 36]
add w0, w0, 1
str w0, [sp, 36]
.L7:
adrp x0, n
add x0, x0, :lo12:n
ldr w0, [x0]
ldr w1, [sp, 36]
cmp w1, w0
ble .L8
mov w0, 1
str w0, [sp, 40]
b .L9
.L12:
mov w0, 1
str w0, [sp, 44]
b .L10
.L11:
ldr w0, [sp, 40]
sub w1, w0, #1
adrp x0, v
add x2, x0, :lo12:v
sxtw x3, w1
ldrsw x1, [sp, 44]
mov x0, x1
lsl x0, x0, 2
add x0, x0, x1
lsl x0, x0, 2
add x0, x0, x3
ldr w2, [x2, x0, lsl 2]
ldr w0, [sp, 40]
sub w1, w0, #1
adrp x0, q
add x0, x0, :lo12:q
sxtw x1, w1
ldr w1, [x0, x1, lsl 2]
ldr w0, [sp, 44]
add w1, w1, w0
ldr w0, [sp, 40]
sub w4, w0, #1
adrp x0, v
add x3, x0, :lo12:v
sxtw x4, w4
sxtw x1, w1
mov x0, x1
lsl x0, x0, 2
add x0, x0, x1
lsl x0, x0, 2
add x0, x0, x4
ldr w0, [x3, x0, lsl 2]
add w0, w2, w0
adrp x1, n
add x1, x1, :lo12:n
ldr w1, [x1]
sdiv w2, w0, w1
mul w1, w2, w1
sub w3, w0, w1
adrp x0, v
add x2, x0, :lo12:v
ldrsw x4, [sp, 40]
ldrsw x1, [sp, 44]
mov x0, x1
lsl x0, x0, 2
add x0, x0, x1
lsl x0, x0, 2
add x0, x0, x4
str w3, [x2, x0, lsl 2]
ldr w0, [sp, 40]
sub w1, w0, #1
adrp x0, w
add x2, x0, :lo12:w
sxtw x3, w1
ldrsw x1, [sp, 44]
mov x0, x1
lsl x0, x0, 2
add x0, x0, x1
lsl x0, x0, 2
add x0, x0, x3
ldr w2, [x2, x0, lsl 2]
ldr w0, [sp, 40]
sub w1, w0, #1
adrp x0, q
add x0, x0, :lo12:q
sxtw x1, w1
ldr w1, [x0, x1, lsl 2]
ldr w0, [sp, 44]
add w1, w1, w0
ldr w0, [sp, 40]
sub w4, w0, #1
adrp x0, w
add x3, x0, :lo12:w
sxtw x4, w4
sxtw x1, w1
mov x0, x1
lsl x0, x0, 2
add x0, x0, x1
lsl x0, x0, 2
add x0, x0, x4
ldr w0, [x3, x0, lsl 2]
mul w0, w2, w0
adrp x1, n
add x1, x1, :lo12:n
ldr w1, [x1]
sdiv w2, w0, w1
mul w1, w2, w1
sub w3, w0, w1
adrp x0, w
add x2, x0, :lo12:w
ldrsw x4, [sp, 40]
ldrsw x1, [sp, 44]
mov x0, x1
lsl x0, x0, 2
add x0, x0, x1
lsl x0, x0, 2
add x0, x0, x4
str w3, [x2, x0, lsl 2]
ldr w0, [sp, 40]
sub w1, w0, #1
adrp x0, p
add x2, x0, :lo12:p
sxtw x3, w1
ldrsw x1, [sp, 44]
mov x0, x1
lsl x0, x0, 2
add x0, x0, x1
lsl x0, x0, 2
add x0, x0, x3
ldr w2, [x2, x0, lsl 2]
ldr w0, [sp, 40]
sub w1, w0, #1
adrp x0, q
add x0, x0, :lo12:q
sxtw x1, w1
ldr w1, [x0, x1, lsl 2]
ldr w0, [sp, 44]
add w1, w1, w0
ldr w0, [sp, 40]
sub w4, w0, #1
adrp x0, p
add x3, x0, :lo12:p
sxtw x4, w4
sxtw x1, w1
mov x0, x1
lsl x0, x0, 2
add x0, x0, x1
lsl x0, x0, 2
add x0, x0, x4
ldr w0, [x3, x0, lsl 2]
eor w3, w2, w0
adrp x0, p
add x2, x0, :lo12:p
ldrsw x4, [sp, 40]
ldrsw x1, [sp, 44]
mov x0, x1
lsl x0, x0, 2
add x0, x0, x1
lsl x0, x0, 2
add x0, x0, x4
str w3, [x2, x0, lsl 2]
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L10:
adrp x0, n
add x0, x0, :lo12:n
ldr w0, [x0]
ldr w1, [sp, 44]
cmp w1, w0
ble .L11
ldr w0, [sp, 40]
add w0, w0, 1
str w0, [sp, 40]
.L9:
ldr w0, [sp, 40]
cmp w0, 12
ble .L12
mov w0, 1
str w0, [sp, 48]
b .L13
.L21:
str wzr, [sp, 52]
mov w0, 1
str w0, [sp, 56]
str wzr, [sp, 60]
add x1, sp, 24
add x0, sp, 20
mov x2, x1
mov x1, x0
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl __isoc99_scanf
ldr w0, [sp, 20]
add w0, w0, 1
str w0, [sp, 20]
ldr w0, [sp, 24]
add w0, w0, 1
str w0, [sp, 24]
mov w0, 12
str w0, [sp, 64]
b .L14
.L16:
adrp x0, q
add x0, x0, :lo12:q
ldrsw x1, [sp, 64]
ldr w1, [x0, x1, lsl 2]
ldr w0, [sp, 20]
add w1, w1, w0
ldr w0, [sp, 24]
add w0, w0, 1
cmp w1, w0
bgt .L15
ldr w1, [sp, 20]
adrp x0, v
add x2, x0, :lo12:v
ldrsw x3, [sp, 64]
sxtw x1, w1
mov x0, x1
lsl x0, x0, 2
add x0, x0, x1
lsl x0, x0, 2
add x0, x0, x3
ldr w1, [x2, x0, lsl 2]
ldr w0, [sp, 52]
add w0, w1, w0
adrp x1, n
add x1, x1, :lo12:n
ldr w1, [x1]
sdiv w2, w0, w1
mul w1, w2, w1
sub w0, w0, w1
str w0, [sp, 52]
ldr w1, [sp, 20]
adrp x0, w
add x2, x0, :lo12:w
ldrsw x3, [sp, 64]
sxtw x1, w1
mov x0, x1
lsl x0, x0, 2
add x0, x0, x1
lsl x0, x0, 2
add x0, x0, x3
ldr w1, [x2, x0, lsl 2]
ldr w0, [sp, 56]
mul w0, w1, w0
adrp x1, n
add x1, x1, :lo12:n
ldr w1, [x1]
sdiv w2, w0, w1
mul w1, w2, w1
sub w0, w0, w1
str w0, [sp, 56]
adrp x0, q
add x0, x0, :lo12:q
ldrsw x1, [sp, 64]
ldr w1, [x0, x1, lsl 2]
ldr w0, [sp, 20]
add w0, w1, w0
str w0, [sp, 20]
.L15:
ldr w0, [sp, 64]
sub w0, w0, #1
str w0, [sp, 64]
.L14:
ldr w0, [sp, 64]
cmp w0, 0
bge .L16
ldr w0, [sp, 52]
str w0, [sp, 20]
ldr w0, [sp, 56]
str w0, [sp, 24]
ldr w0, [sp, 20]
add w0, w0, 1
str w0, [sp, 20]
ldr w0, [sp, 24]
add w0, w0, 1
str w0, [sp, 24]
ldr w1, [sp, 20]
ldr w0, [sp, 24]
cmp w1, w0
ble .L17
add x1, sp, 24
add x0, sp, 20
bl swap
.L17:
mov w0, 12
str w0, [sp, 68]
b .L18
.L20:
adrp x0, q
add x0, x0, :lo12:q
ldrsw x1, [sp, 68]
ldr w1, [x0, x1, lsl 2]
ldr w0, [sp, 20]
add w1, w1, w0
ldr w0, [sp, 24]
add w0, w0, 1
cmp w1, w0
bgt .L19
ldr w1, [sp, 20]
adrp x0, p
add x2, x0, :lo12:p
ldrsw x3, [sp, 68]
sxtw x1, w1
mov x0, x1
lsl x0, x0, 2
add x0, x0, x1
lsl x0, x0, 2
add x0, x0, x3
ldr w0, [x2, x0, lsl 2]
ldr w1, [sp, 60]
eor w0, w1, w0
str w0, [sp, 60]
adrp x0, q
add x0, x0, :lo12:q
ldrsw x1, [sp, 68]
ldr w1, [x0, x1, lsl 2]
ldr w0, [sp, 20]
add w0, w1, w0
str w0, [sp, 20]
.L19:
ldr w0, [sp, 68]
sub w0, w0, #1
str w0, [sp, 68]
.L18:
ldr w0, [sp, 68]
cmp w0, 0
bge .L20
ldr w1, [sp, 60]
adrp x0, .LC2
add x0, x0, :lo12:.LC2
bl printf
ldr w0, [sp, 48]
add w0, w0, 1
str w0, [sp, 48]
.L13:
adrp x0, m
add x0, x0, :lo12:m
ldr w0, [x0]
ldr w1, [sp, 48]
cmp w1, w0
ble .L21
mov w0, 0
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 72]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L23
bl __stack_chk_fail
.L23:
mov w0, w1
ldp x29, x30, [sp], 80
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE1:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.global g_pfnVectors
.section .data.rel.ro,"aw"
.align 3
.type g_pfnVectors, %object
.size g_pfnVectors, 1240
g_pfnVectors:
.xword __STACK_TOP
.xword ResetISR
.xword NmiSR
.xword FaultISR
.xword IntDefaultHandler
.xword IntDefaultHandler
.xword IntDefaultHandler
.xword 0
.xword 0
.xword 0
.xword 0
.xword IntDefaultHandler
.xword IntDefaultHandler
.xword 0
.xword IntDefaultHandler
.xword IntDefaultHandler
.xword IntDefaultHandler
.xword IntDefaultHandler
.xword IntDefaultHandler
.xword IntDefaultHandler
.xword IntDefaultHandler
.xword IntDefaultHandler
.xword UART1IntHandler
.xword IntDefaultHandler
.xword IntDefaultHandler
.xword IntDefaultHandler
.xword IntDefaultHandler
.xword IntDefaultHandler
.xword IntDefaultHandler
.xword IntDefaultHandler
.xword IntDefaultHandler
.xword IntDefaultHandler
.xword IntDefaultHandler
.xword IntDefaultHandler
.xword IntDefaultHandler
.xword IntDefaultHandler
.xword IntDefaultHandler
.xword IntDefaultHandler
.xword IntDefaultHandler
.xword IntDefaultHandler
.xword IntDefaultHandler
.xword IntDefaultHandler
.xword IntDefaultHandler
.xword IntDefaultHandler
.xword IntDefaultHandler
.xword IntDefaultHandler
.xword IntDefaultHandler
.xword IntDefaultHandler
.xword IntDefaultHandler
.xword IntDefaultHandler
.xword IntDefaultHandler
.xword IntDefaultHandler
.xword IntDefaultHandler
.xword IntDefaultHandler
.xword IntDefaultHandler
.xword IntDefaultHandler
.xword IntDefaultHandler
.xword IntDefaultHandler
.xword IntDefaultHandler
.xword IntDefaultHandler
.xword IntDefaultHandler
.xword IntDefaultHandler
.xword IntDefaultHandler
.xword uDMAErrorHandler
.xword IntDefaultHandler
.xword IntDefaultHandler
.xword IntDefaultHandler
.xword IntDefaultHandler
.xword IntDefaultHandler
.xword IntDefaultHandler
.xword IntDefaultHandler
.xword IntDefaultHandler
.xword IntDefaultHandler
.xword IntDefaultHandler
.xword IntDefaultHandler
.xword IntDefaultHandler
.xword IntDefaultHandler
.xword IntDefaultHandler
.xword IntDefaultHandler
.xword IntDefaultHandler
.xword 0
.xword 0
.xword 0
.xword 0
.xword IntDefaultHandler
.xword IntDefaultHandler
.xword IntDefaultHandler
.xword IntDefaultHandler
.xword 0
.xword 0
.xword 0
.xword 0
.xword 0
.xword 0
.xword 0
.xword 0
.xword 0
.xword 0
.xword 0
.xword 0
.xword 0
.xword 0
.xword 0
.xword 0
.xword 0
.xword 0
.xword 0
.xword 0
.xword IntDefaultHandler
.xword IntDefaultHandler
.xword IntDefaultHandler
.xword IntDefaultHandler
.xword IntDefaultHandler
.xword IntDefaultHandler
.xword IntDefaultHandler
.xword IntDefaultHandler
.xword IntDefaultHandler
.xword IntDefaultHandler
.xword IntDefaultHandler
.xword IntDefaultHandler
.xword IntDefaultHandler
.xword IntDefaultHandler
.xword IntDefaultHandler
.xword IntDefaultHandler
.xword IntDefaultHandler
.xword IntDefaultHandler
.xword IntDefaultHandler
.xword IntDefaultHandler
.xword IntDefaultHandler
.xword IntDefaultHandler
.xword IntDefaultHandler
.xword 0
.xword IntDefaultHandler
.xword IntDefaultHandler
.xword IntDefaultHandler
.xword IntDefaultHandler
.xword IntDefaultHandler
.xword IntDefaultHandler
.xword IntDefaultHandler
.xword IntDefaultHandler
.xword IntDefaultHandler
.xword IntDefaultHandler
.xword IntDefaultHandler
.xword IntDefaultHandler
.xword IntDefaultHandler
.xword IntDefaultHandler
.xword IntDefaultHandler
.xword IntDefaultHandler
.xword IntDefaultHandler
.xword IntDefaultHandler
.xword IntDefaultHandler
.xword IntDefaultHandler
.xword IntDefaultHandler
.xword IntDefaultHandler
.xword IntDefaultHandler
.text
.align 2
.global ResetISR
.type ResetISR, %function
ResetISR:
.LFB0:
.cfi_startproc
#APP
// 243 "program.c" 1
.global _c_int00
b.w _c_int00
// 0 "" 2
#NO_APP
nop
ret
.cfi_endproc
.LFE0:
.size ResetISR, .-ResetISR
.align 2
.type NmiSR, %function
NmiSR:
.LFB1:
.cfi_startproc
.L3:
b .L3
.cfi_endproc
.LFE1:
.size NmiSR, .-NmiSR
.align 2
.type FaultISR, %function
FaultISR:
.LFB2:
.cfi_startproc
.L5:
b .L5
.cfi_endproc
.LFE2:
.size FaultISR, .-FaultISR
.align 2
.type IntDefaultHandler, %function
IntDefaultHandler:
.LFB3:
.cfi_startproc
.L7:
b .L7
.cfi_endproc
.LFE3:
.size IntDefaultHandler, .-IntDefaultHandler
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global inplace_swap
.type inplace_swap, %function
inplace_swap:
.LFB0:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str x0, [sp, 8]
str x1, [sp]
ldr x0, [sp, 8]
ldr w1, [x0]
ldr x0, [sp]
ldr w0, [x0]
eor w1, w1, w0
ldr x0, [sp]
str w1, [x0]
ldr x0, [sp, 8]
ldr w1, [x0]
ldr x0, [sp]
ldr w0, [x0]
eor w1, w1, w0
ldr x0, [sp, 8]
str w1, [x0]
ldr x0, [sp, 8]
ldr w1, [x0]
ldr x0, [sp]
ldr w0, [x0]
eor w1, w1, w0
ldr x0, [sp]
str w1, [x0]
nop
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size inplace_swap, .-inplace_swap
.align 2
.global reverse_array
.type reverse_array, %function
reverse_array:
.LFB1:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
str w1, [sp, 20]
str wzr, [sp, 40]
ldr w0, [sp, 20]
sub w0, w0, #1
str w0, [sp, 44]
b .L3
.L4:
ldrsw x0, [sp, 40]
lsl x0, x0, 2
ldr x1, [sp, 24]
add x2, x1, x0
ldrsw x0, [sp, 44]
lsl x0, x0, 2
ldr x1, [sp, 24]
add x0, x1, x0
mov x1, x0
mov x0, x2
bl inplace_swap
ldr w0, [sp, 40]
add w0, w0, 1
str w0, [sp, 40]
ldr w0, [sp, 44]
sub w0, w0, #1
str w0, [sp, 44]
.L3:
ldr w1, [sp, 40]
ldr w0, [sp, 44]
cmp w1, w0
blt .L4
nop
nop
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE1:
.size reverse_array, .-reverse_array
.section .rodata
.align 3
.LC0:
.string "x[%d]=%d\n"
.text
.align 2
.global main
.type main, %function
main:
.LFB2:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 56]
mov x1, 0
str wzr, [sp, 28]
str wzr, [sp, 28]
b .L6
.L7:
ldr w0, [sp, 28]
add w2, w0, 1
ldrsw x0, [sp, 28]
lsl x0, x0, 2
add x1, sp, 32
str w2, [x1, x0]
ldr w0, [sp, 28]
add w0, w0, 1
str w0, [sp, 28]
.L6:
ldr w0, [sp, 28]
cmp w0, 4
ble .L7
add x0, sp, 32
mov w1, 5
bl reverse_array
str wzr, [sp, 28]
b .L8
.L9:
ldrsw x0, [sp, 28]
lsl x0, x0, 2
add x1, sp, 32
ldr w0, [x1, x0]
mov w2, w0
ldr w1, [sp, 28]
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl printf
ldr w0, [sp, 28]
add w0, w0, 1
str w0, [sp, 28]
.L8:
ldr w0, [sp, 28]
cmp w0, 4
ble .L9
mov w0, 0
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 56]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L11
bl __stack_chk_fail
.L11:
mov w0, w1
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE2:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.global Equifax_Secure_Certificate_Authority_subject_name
.data
.align 3
.type Equifax_Secure_Certificate_Authority_subject_name, %object
.size Equifax_Secure_Certificate_Authority_subject_name, 80
Equifax_Secure_Certificate_Authority_subject_name:
.ascii "0N1\0130\t\006\003U\004\006\023\002US1\0200\016\006\003U\004"
.ascii "\n\023\007Equifax1-0+\006\003U\004\013\023$Equifax Secure Ce"
.ascii "rtificate Authority"
.global Equifax_Secure_Certificate_Authority_public_key
.align 3
.type Equifax_Secure_Certificate_Authority_public_key, %object
.size Equifax_Secure_Certificate_Authority_public_key, 162
Equifax_Secure_Certificate_Authority_public_key:
.string "0\201\2370\r\006\t*\206H\206\367\r\001\001\001\005"
.string "\003\201\215"
.string "0\201\211\002\201\201"
.string "\301]\261Xg\bb\356\240\232-\037\bm\221\024h\230\n\036\376\332\004o\023\204b!\303\321|\316\237\005\340\270\001\360N4\354\342\212\225\004d\254\361kS_\005\263\313g\200\277B\002\216\376\335\001\t\354\341"
.string "\024O\374\373\360\f\335C\272[+\341\037\200p\231\025W\223\026\361\017\227j\267\302h#\034\314MY0\254Q\036;\257+\326\356cE{\305\331_P\322\343P\017:\210\347\277\024\375\340\307\271\002\003\001"
.ascii "\001"
.global Equifax_Secure_Certificate_Authority_certificate
.align 3
.type Equifax_Secure_Certificate_Authority_certificate, %object
.size Equifax_Secure_Certificate_Authority_certificate, 804
Equifax_Secure_Certificate_Authority_certificate:
.string "0\202\003 0\202\002\211\240\003\002\001\002\002\0045\336\364\3170\r\006\t*\206H\206\367\r\001\001\005\005"
.string "0N1\0130\t\006\003U\004\006\023\002US1\0200\016\006\003U\004\n\023\007Equifax1-0+\006\003U\004\013\023$Equifax Secure Certificate Authority0\036\027\r980822164151Z\027\r180822164151Z0N1\0130\t\006\003U\004\006\023\002US1\0200\016\006\003U\004\n\023\007Equifax1-0+\006\003U\004\013\023$Equifax Secure Certificate Authority0\201\2370\r\006\t*\206H\206\367\r\001\001\001\005"
.string "\003\201\215"
.string "0\201\211\002\201\201"
.string "\301]\261Xg\bb\356\240\232-\037\bm\221\024h\230\n\036\376\332\004o\023\204b!\303\321|\316\237\005\340\270\001\360N4\354\342\212\225\004d\254\361kS_\005\263\313g\200\277B\002\216\376\335\001\t\354\341"
.string "\024O\374\373\360\f\335C\272[+\341\037\200p\231\025W\223\026\361\017\227j\267\302h#\034\314MY0\254Q\036;\257+\326\356cE{\305\331_P\322\343P\017:\210\347\277\024\375\340\307\271\002\003\001"
.string "\001\243\202\001\t0\202\001\0050p\006\003U\035\037\004i0g0e\240c\240a\244_0]1\0130\t\006\003U\004\006\023\002US1\0200\016\006\003U\004\n\023\007Equifax1-0+\006\003U\004\013\023$Equifax Secure Certificate Authority1\r0\013\006\003U\004\003\023\004CRL10\032\006\003U\035\020\004\0230\021\201\01720180822164151Z0\013\006\003U\035\017\004\004\003\002\001\0060\037\006\003U\035#\004\0300\026\200\024H\346h\371+\322\262\225\327G\330# \020O3\230\220\237\3240\035\006\003U\035\016\004\026\004\024H\346h\371+\322\262\225\327G\330# \020O3\230\220\237\3240\f\006\003U\035\023\004\0050\003\001\001\3770\032\006\t*\206H\206\366}\007A"
.string "\004\r0\013\033\005V3.0c\003\002\006\3000\r\006\t*\206H\206\367\r\001\001\005\005"
.string "\003\201\201"
.string "X\316)\352\374\367\336\265\316\002\271\027\265\205\321\271\343\340\225\314%1\r"
.ascii "\246\222n\177\266\222c\236P\225\321\232o\344\021\336c\205n\230"
.ascii "\356\250\377Z\310\323U\262fqW\336\300!\353=*\247#I\001\004\206"
.ascii "B{\374\356\177\242\026R\265gg\323@\333;&X\262(w=\256\024wa\326"
.ascii "\372*f'\240\r\372\247s\\\352p\361\224!eD_\372\374\357)h\251\242"
.ascii "\207y\357y\357O\254\007w8"
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC0:
.string "What is the value of pi?"
.align 3
.LC1:
.string "%lf"
.align 3
.LC2:
.string "Try again!"
.align 3
.LC3:
.string "Close enough!"
.text
.align 2
.global main
.type main, %function
main:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 40]
mov x1, 0
adrp x0, .LC4
ldr d0, [x0, #:lo12:.LC4]
str d0, [sp, 32]
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl puts
add x0, sp, 24
mov x1, x0
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl __isoc99_scanf
b .L2
.L3:
adrp x0, .LC2
add x0, x0, :lo12:.LC2
bl puts
add x0, sp, 24
mov x1, x0
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl __isoc99_scanf
.L2:
ldr d1, [sp, 24]
ldr d0, [sp, 32]
fsub d0, d1, d0
fabs d0, d0
adrp x0, .LC5
ldr d1, [x0, #:lo12:.LC5]
fcmpe d0, d1
bgt .L3
adrp x0, .LC3
add x0, x0, :lo12:.LC3
bl puts
mov w0, 0
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 40]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L5
bl __stack_chk_fail
.L5:
mov w0, w1
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size main, .-main
.section .rodata
.align 3
.LC4:
.word -266631570
.word 1074340345
.align 3
.LC5:
.word -350469331
.word 1058682594
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.global x
.bss
.align 2
.type x, %object
.size x, 4
x:
.zero 4
.text
.align 2
.global f
.type f, %function
f:
.LFB0:
.cfi_startproc
adrp x0, x
add x0, x0, :lo12:x
mov w1, 4
str w1, [x0]
nop
ret
.cfi_endproc
.LFE0:
.size f, .-f
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.global defaultIPaddress
.section .rodata
.align 3
.LC0:
.string "127.0.0.1"
.section .data.rel.local,"aw"
.align 3
.type defaultIPaddress, %object
.size defaultIPaddress, 8
defaultIPaddress:
.xword .LC0
.global defaultPort
.section .rodata
.align 1
.type defaultPort, %object
.size defaultPort, 2
defaultPort:
.hword 9000
.text
.align 2
.global my_clock
.type my_clock, %function
my_clock:
.LFB6:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 40]
mov x1, 0
add x0, sp, 24
mov x1, 0
bl gettimeofday
ldr d0, [sp, 24]
scvtf d1, d0
ldr d0, [sp, 32]
scvtf d0, d0
adrp x0, .LC1
ldr d2, [x0, #:lo12:.LC1]
fmul d0, d0, d2
fadd d0, d1, d0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [sp, 40]
ldr x1, [x0]
subs x2, x2, x1
mov x1, 0
beq .L3
bl __stack_chk_fail
.L3:
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE6:
.size my_clock, .-my_clock
.section .rodata
.align 3
.LC2:
.string "-f"
.align 3
.LC3:
.string "file name not found."
.align 3
.LC4:
.string "-i"
.align 3
.LC5:
.string "ip address not found."
.align 3
.LC6:
.string "-h"
.align 3
.LC7:
.string "host name invalid."
.align 3
.LC8:
.string "host name not found."
.align 3
.LC9:
.string "-p"
.align 3
.LC10:
.string "port not found."
.align 3
.LC11:
.string "parameter invalid."
.align 3
.LC12:
.string "%d.%d.%d.%d"
.align 3
.LC13:
.string "IP:%s\n"
.align 3
.LC14:
.string "PORT:%d\n"
.align 3
.LC15:
.string "FILE:%s\n"
.align 3
.LC16:
.string "Can't connect."
.align 3
.LC17:
.string "Recv Length == 0"
.align 3
.LC18:
.string "recv_len=%d, text_len=%d\n"
.align 3
.LC19:
.string "<%s>\n"
.align 3
.LC20:
.string "time out."
.text
.align 2
.global main
.type main, %function
main:
.LFB7:
.cfi_startproc
sub sp, sp, #1648
.cfi_def_cfa_offset 1648
stp x29, x30, [sp]
.cfi_offset 29, -1648
.cfi_offset 30, -1640
mov x29, sp
str w0, [sp, 28]
str x1, [sp, 16]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 1640]
mov x1, 0
stp xzr, xzr, [sp, 104]
add x0, sp, 120
movi v0.4s, 0
stp q0, q0, [x0]
stp q0, q0, [x0, 32]
stp q0, q0, [x0, 64]
stp q0, q0, [x0, 96]
stp q0, q0, [x0, 128]
stp q0, q0, [x0, 160]
stp q0, q0, [x0, 192]
str q0, [x0, 224]
add x0, sp, 512
stp xzr, xzr, [x0, -152]
add x0, sp, 376
movi v0.4s, 0
stp q0, q0, [x0]
stp q0, q0, [x0, 32]
stp q0, q0, [x0, 64]
stp q0, q0, [x0, 96]
stp q0, q0, [x0, 128]
stp q0, q0, [x0, 160]
stp q0, q0, [x0, 192]
str q0, [x0, 224]
str xzr, [sp, 72]
str wzr, [sp, 56]
adrp x0, defaultIPaddress
add x0, x0, :lo12:defaultIPaddress
ldr x1, [x0]
add x0, sp, 104
bl strcpy
mov w0, 9000
strh w0, [sp, 46]
mov w0, 1
str w0, [sp, 48]
b .L5
.L15:
ldrsw x0, [sp, 48]
lsl x0, x0, 3
ldr x1, [sp, 16]
add x0, x1, x0
ldr x2, [x0]
adrp x0, .LC2
add x1, x0, :lo12:.LC2
mov x0, x2
bl strcmp
cmp w0, 0
bne .L6
ldr w0, [sp, 48]
add w0, w0, 1
ldr w1, [sp, 28]
cmp w1, w0
ble .L7
ldrsw x0, [sp, 48]
add x0, x0, 1
lsl x0, x0, 3
ldr x1, [sp, 16]
add x0, x1, x0
ldr x1, [x0]
add x0, sp, 360
bl strcpy
b .L8
.L7:
adrp x0, .LC3
add x0, x0, :lo12:.LC3
bl puts
mov w0, 1
bl exit
.L6:
ldrsw x0, [sp, 48]
lsl x0, x0, 3
ldr x1, [sp, 16]
add x0, x1, x0
ldr x2, [x0]
adrp x0, .LC4
add x1, x0, :lo12:.LC4
mov x0, x2
bl strcmp
cmp w0, 0
bne .L9
ldr w0, [sp, 48]
add w0, w0, 1
ldr w1, [sp, 28]
cmp w1, w0
ble .L10
ldrsw x0, [sp, 48]
add x0, x0, 1
lsl x0, x0, 3
ldr x1, [sp, 16]
add x0, x1, x0
ldr x1, [x0]
add x0, sp, 104
bl strcpy
b .L8
.L10:
adrp x0, .LC5
add x0, x0, :lo12:.LC5
bl puts
mov w0, 1
bl exit
.L9:
ldrsw x0, [sp, 48]
lsl x0, x0, 3
ldr x1, [sp, 16]
add x0, x1, x0
ldr x2, [x0]
adrp x0, .LC6
add x1, x0, :lo12:.LC6
mov x0, x2
bl strcmp
cmp w0, 0
bne .L11
ldr w0, [sp, 48]
add w0, w0, 1
ldr w1, [sp, 28]
cmp w1, w0
ble .L12
ldrsw x0, [sp, 48]
add x0, x0, 1
lsl x0, x0, 3
ldr x1, [sp, 16]
add x0, x1, x0
ldr x0, [x0]
bl gethostbyname
str x0, [sp, 72]
ldr x0, [sp, 72]
cmp x0, 0
bne .L8
adrp x0, .LC7
add x0, x0, :lo12:.LC7
bl puts
mov w0, 1
bl exit
.L12:
adrp x0, .LC8
add x0, x0, :lo12:.LC8
bl puts
mov w0, 1
bl exit
.L11:
ldrsw x0, [sp, 48]
lsl x0, x0, 3
ldr x1, [sp, 16]
add x0, x1, x0
ldr x2, [x0]
adrp x0, .LC9
add x1, x0, :lo12:.LC9
mov x0, x2
bl strcmp
cmp w0, 0
bne .L13
ldr w0, [sp, 48]
add w0, w0, 1
ldr w1, [sp, 28]
cmp w1, w0
ble .L14
ldrsw x0, [sp, 48]
add x0, x0, 1
lsl x0, x0, 3
ldr x1, [sp, 16]
add x0, x1, x0
ldr x0, [x0]
bl atoi
strh w0, [sp, 46]
b .L8
.L14:
adrp x0, .LC10
add x0, x0, :lo12:.LC10
bl puts
mov w0, 1
bl exit
.L13:
adrp x0, .LC11
add x0, x0, :lo12:.LC11
bl puts
mov w0, 1
bl exit
.L8:
ldr w0, [sp, 48]
add w0, w0, 2
str w0, [sp, 48]
.L5:
ldr w1, [sp, 48]
ldr w0, [sp, 28]
cmp w1, w0
blt .L15
ldr x0, [sp, 72]
cmp x0, 0
beq .L16
str wzr, [sp, 52]
b .L17
.L18:
ldr x0, [sp, 72]
ldr x1, [x0, 24]
ldrsw x0, [sp, 52]
lsl x0, x0, 3
add x0, x1, x0
ldr x0, [x0]
ldrb w0, [x0]
mov w2, w0
ldr x0, [sp, 72]
ldr x1, [x0, 24]
ldrsw x0, [sp, 52]
lsl x0, x0, 3
add x0, x1, x0
ldr x0, [x0]
add x0, x0, 1
ldrb w0, [x0]
mov w3, w0
ldr x0, [sp, 72]
ldr x1, [x0, 24]
ldrsw x0, [sp, 52]
lsl x0, x0, 3
add x0, x1, x0
ldr x0, [x0]
add x0, x0, 2
ldrb w0, [x0]
mov w4, w0
ldr x0, [sp, 72]
ldr x1, [x0, 24]
ldrsw x0, [sp, 52]
lsl x0, x0, 3
add x0, x1, x0
ldr x0, [x0]
add x0, x0, 3
ldrb w0, [x0]
add x6, sp, 104
mov w5, w0
adrp x0, .LC12
add x1, x0, :lo12:.LC12
mov x0, x6
bl sprintf
ldr w0, [sp, 52]
add w0, w0, 1
str w0, [sp, 52]
.L17:
ldr x0, [sp, 72]
ldr x1, [x0, 24]
ldrsw x0, [sp, 52]
lsl x0, x0, 3
add x0, x1, x0
ldr x0, [x0]
cmp x0, 0
bne .L18
.L16:
add x0, sp, 104
mov x1, x0
adrp x0, .LC13
add x0, x0, :lo12:.LC13
bl printf
ldrsh w0, [sp, 46]
mov w1, w0
adrp x0, .LC14
add x0, x0, :lo12:.LC14
bl printf
add x0, sp, 360
mov x1, x0
adrp x0, .LC15
add x0, x0, :lo12:.LC15
bl printf
mov w0, 2
strh w0, [sp, 88]
ldrh w0, [sp, 46]
bl htons
and w0, w0, 65535
strh w0, [sp, 90]
add x0, sp, 104
bl inet_addr
str w0, [sp, 92]
mov w2, 0
mov w1, 1
mov w0, 2
bl socket
str w0, [sp, 60]
add x0, sp, 88
mov w2, 16
mov x1, x0
ldr w0, [sp, 60]
bl connect
cmp w0, 0
bge .L19
adrp x0, .LC16
add x0, x0, :lo12:.LC16
bl puts
mov w0, 1
bl exit
.L19:
str wzr, [sp, 56]
.L25:
add x0, sp, 616
mov w3, 0
mov x2, 1024
mov x1, x0
ldr w0, [sp, 60]
bl recv
str w0, [sp, 64]
ldr w0, [sp, 64]
cmp w0, 0
bne .L20
adrp x0, .LC17
add x0, x0, :lo12:.LC17
bl puts
nop
ldr w0, [sp, 60]
bl close
mov w0, 0
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 1640]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L27
b .L29
.L20:
add x0, sp, 616
bl strlen
str w0, [sp, 68]
ldr w2, [sp, 68]
ldr w1, [sp, 64]
adrp x0, .LC18
add x0, x0, :lo12:.LC18
bl printf
ldr w1, [sp, 68]
ldr w0, [sp, 64]
cmp w1, w0
bge .L22
ldr w0, [sp, 68]
str w0, [sp, 64]
.L22:
add x0, sp, 616
mov x1, x0
adrp x0, .LC19
add x0, x0, :lo12:.LC19
bl printf
bl my_clock
str d0, [sp, 80]
bl my_clock
fmov d1, d0
ldr d0, [sp, 80]
fsub d1, d1, d0
fmov d0, 5.0e+0
fcmpe d1, d0
bgt .L28
b .L23
.L28:
ldr w0, [sp, 56]
cmp w0, 0
beq .L25
str wzr, [sp, 56]
adrp x0, .LC20
add x0, x0, :lo12:.LC20
bl puts
.L23:
b .L25
.L29:
bl __stack_chk_fail
.L27:
mov w0, w1
ldp x29, x30, [sp]
add sp, sp, 1648
.cfi_restore 29
.cfi_restore 30
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE7:
.size main, .-main
.section .rodata
.align 3
.LC1:
.word -1598689907
.word 1051772663
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC1:
.string "InsertionSort:\t\t"
.align 3
.LC2:
.string "%d "
.align 3
.LC3:
.string "BinaryInsertionSort:\t"
.text
.align 2
.global main
.type main, %function
main:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -128]!
.cfi_def_cfa_offset 128
.cfi_offset 29, -128
.cfi_offset 30, -120
mov x29, sp
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 120]
mov x1, 0
adrp x0, .LC0
add x1, x0, :lo12:.LC0
add x0, sp, 40
ldp q0, q1, [x1]
stp q0, q1, [x0]
ldr x1, [x1, 32]
str x1, [x0, 32]
adrp x0, .LC0
add x1, x0, :lo12:.LC0
add x0, sp, 80
ldp q0, q1, [x1]
stp q0, q1, [x0]
ldr x1, [x1, 32]
str x1, [x0, 32]
mov w0, 10
str w0, [sp, 32]
mov w0, 10
str w0, [sp, 36]
add x0, sp, 40
ldr w1, [sp, 32]
bl InsertionSort
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl printf
str wzr, [sp, 28]
b .L2
.L3:
ldrsw x0, [sp, 28]
lsl x0, x0, 2
add x1, sp, 40
ldr w0, [x1, x0]
mov w1, w0
adrp x0, .LC2
add x0, x0, :lo12:.LC2
bl printf
ldr w0, [sp, 28]
add w0, w0, 1
str w0, [sp, 28]
.L2:
ldr w1, [sp, 28]
ldr w0, [sp, 32]
cmp w1, w0
blt .L3
mov w0, 10
bl putchar
add x0, sp, 80
ldr w1, [sp, 36]
bl BinaryInsertionSort
adrp x0, .LC3
add x0, x0, :lo12:.LC3
bl printf
str wzr, [sp, 28]
b .L4
.L5:
ldrsw x0, [sp, 28]
lsl x0, x0, 2
add x1, sp, 80
ldr w0, [x1, x0]
mov w1, w0
adrp x0, .LC2
add x0, x0, :lo12:.LC2
bl printf
ldr w0, [sp, 28]
add w0, w0, 1
str w0, [sp, 28]
.L4:
ldr w1, [sp, 28]
ldr w0, [sp, 36]
cmp w1, w0
blt .L5
mov w0, 0
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 120]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L7
bl __stack_chk_fail
.L7:
mov w0, w1
ldp x29, x30, [sp], 128
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size main, .-main
.section .rodata
.align 3
.LC0:
.word 5
.word 3
.word 4
.word 2
.word 1
.word 9
.word 7
.word 8
.word 0
.word 6
.text
.align 2
.global InsertionSort
.type InsertionSort, %function
InsertionSort:
.LFB1:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str x0, [sp, 8]
str w1, [sp, 4]
mov w0, 1
str w0, [sp, 24]
b .L9
.L13:
ldrsw x0, [sp, 24]
lsl x0, x0, 2
ldr x1, [sp, 8]
add x0, x1, x0
ldr w0, [x0]
str w0, [sp, 28]
ldr w0, [sp, 24]
str w0, [sp, 20]
b .L10
.L12:
ldrsw x0, [sp, 20]
lsl x0, x0, 2
sub x0, x0, #4
ldr x1, [sp, 8]
add x1, x1, x0
ldrsw x0, [sp, 20]
lsl x0, x0, 2
ldr x2, [sp, 8]
add x0, x2, x0
ldr w1, [x1]
str w1, [x0]
ldr w0, [sp, 20]
sub w0, w0, #1
str w0, [sp, 20]
.L10:
ldr w0, [sp, 20]
cmp w0, 0
ble .L11
ldrsw x0, [sp, 20]
lsl x0, x0, 2
sub x0, x0, #4
ldr x1, [sp, 8]
add x0, x1, x0
ldr w0, [x0]
ldr w1, [sp, 28]
cmp w1, w0
blt .L12
.L11:
ldrsw x0, [sp, 20]
lsl x0, x0, 2
ldr x1, [sp, 8]
add x0, x1, x0
ldr w1, [sp, 28]
str w1, [x0]
ldr w0, [sp, 24]
add w0, w0, 1
str w0, [sp, 24]
.L9:
ldr w1, [sp, 24]
ldr w0, [sp, 4]
cmp w1, w0
blt .L13
nop
nop
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE1:
.size InsertionSort, .-InsertionSort
.align 2
.global BinaryInsertionSort
.type BinaryInsertionSort, %function
BinaryInsertionSort:
.LFB2:
.cfi_startproc
sub sp, sp, #48
.cfi_def_cfa_offset 48
str x0, [sp, 8]
str w1, [sp, 4]
mov w0, 1
str w0, [sp, 28]
b .L15
.L21:
ldrsw x0, [sp, 28]
lsl x0, x0, 2
ldr x1, [sp, 8]
add x0, x1, x0
ldr w0, [x0]
str w0, [sp, 40]
str wzr, [sp, 32]
ldr w0, [sp, 28]
sub w0, w0, #1
str w0, [sp, 36]
b .L16
.L18:
ldr w1, [sp, 32]
ldr w0, [sp, 36]
add w0, w1, w0
lsr w1, w0, 31
add w0, w1, w0
asr w0, w0, 1
str w0, [sp, 44]
ldrsw x0, [sp, 44]
lsl x0, x0, 2
ldr x1, [sp, 8]
add x0, x1, x0
ldr w0, [x0]
ldr w1, [sp, 40]
cmp w1, w0
bge .L17
ldr w0, [sp, 44]
sub w0, w0, #1
str w0, [sp, 36]
b .L16
.L17:
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 32]
.L16:
ldr w1, [sp, 32]
ldr w0, [sp, 36]
cmp w1, w0
ble .L18
ldr w0, [sp, 28]
str w0, [sp, 24]
b .L19
.L20:
ldrsw x0, [sp, 24]
lsl x0, x0, 2
sub x0, x0, #4
ldr x1, [sp, 8]
add x1, x1, x0
ldrsw x0, [sp, 24]
lsl x0, x0, 2
ldr x2, [sp, 8]
add x0, x2, x0
ldr w1, [x1]
str w1, [x0]
ldr w0, [sp, 24]
sub w0, w0, #1
str w0, [sp, 24]
.L19:
ldr w1, [sp, 24]
ldr w0, [sp, 32]
cmp w1, w0
bgt .L20
ldrsw x0, [sp, 32]
lsl x0, x0, 2
ldr x1, [sp, 8]
add x0, x1, x0
ldr w1, [sp, 40]
str w1, [x0]
ldr w0, [sp, 28]
add w0, w0, 1
str w0, [sp, 28]
.L15:
ldr w1, [sp, 28]
ldr w0, [sp, 4]
cmp w1, w0
blt .L21
nop
nop
add sp, sp, 48
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE2:
.size BinaryInsertionSort, .-BinaryInsertionSort
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.global variabile
.bss
.align 2
.type variabile, %object
.size variabile, 4
variabile:
.zero 4
.global var
.type var, %object
.size var, 1
var:
.zero 1
.global num
.data
.align 1
.type num, %object
.size num, 2
num:
.hword 3
.text
.align 2
.global foo
.type foo, %function
foo:
.LFB6:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str w0, [sp, 12]
str w1, [sp, 8]
ldr w0, [sp, 12]
lsl w0, w0, 1
ldr w1, [sp, 8]
add w0, w1, w0
str w0, [sp, 28]
adrp x0, variabile
add x0, x0, :lo12:variabile
ldr w1, [x0]
ldr w0, [sp, 28]
add w1, w1, w0
adrp x0, variabile
add x0, x0, :lo12:variabile
str w1, [x0]
mov w0, 0
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE6:
.size foo, .-foo
.section .rodata
.align 3
.LC0:
.string "Iterazione %d:\n"
.align 3
.LC1:
.string "Var = %x\n"
.text
.align 2
.global bar
.type bar, %function
bar:
.LFB7:
.cfi_startproc
stp x29, x30, [sp, -16]!
.cfi_def_cfa_offset 16
.cfi_offset 29, -16
.cfi_offset 30, -8
mov x29, sp
adrp x0, count.0
add x0, x0, :lo12:count.0
ldr w0, [x0]
add w2, w0, 1
adrp x1, count.0
add x1, x1, :lo12:count.0
str w2, [x1]
mov w1, w0
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl printf
adrp x0, var
add x0, x0, :lo12:var
ldrb w0, [x0]
mov w1, w0
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl printf
nop
ldp x29, x30, [sp], 16
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE7:
.size bar, .-bar
.align 2
.global foobar
.type foobar, %function
foobar:
.LFB8:
.cfi_startproc
adrp x0, variabile
add x0, x0, :lo12:variabile
ldr w0, [x0]
and w1, w0, 65535
adrp x0, num
add x0, x0, :lo12:num
ldrsh w0, [x0]
and w0, w0, 65535
mul w0, w1, w0
and w0, w0, 65535
sxth w1, w0
adrp x0, num
add x0, x0, :lo12:num
strh w1, [x0]
adrp x0, num
add x0, x0, :lo12:num
ldrsh w0, [x0]
ret
.cfi_endproc
.LFE8:
.size foobar, .-foobar
.align 2
.global greater
.type greater, %function
greater:
.LFB9:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str w0, [sp, 12]
str w1, [sp, 8]
ldr w1, [sp, 12]
ldr w0, [sp, 8]
cmp w1, w0
ble .L7
mov w0, 1
b .L8
.L7:
mov w0, 0
.L8:
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE9:
.size greater, .-greater
.align 2
.global nop
.type nop, %function
nop:
.LFB10:
.cfi_startproc
nop
ret
.cfi_endproc
.LFE10:
.size nop, .-nop
.section .rodata
.align 3
.LC2:
.string "Avvio del programma di test..."
.align 3
.LC3:
.string "Programma test terminato."
.text
.align 2
.global main
.type main, %function
main:
.LFB11:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
adrp x0, .LC2
add x0, x0, :lo12:.LC2
bl puts
mov x0, 1
bl malloc
str x0, [sp, 24]
ldr x0, [sp, 24]
mov w1, 5
strb w1, [x0]
bl bar
adrp x0, var
add x0, x0, :lo12:var
mov w1, 10
strb w1, [x0]
bl bar
adrp x0, variabile
add x0, x0, :lo12:variabile
str wzr, [x0]
b .L11
.L12:
bl bar
adrp x0, var
add x0, x0, :lo12:var
ldrb w0, [x0]
mov w2, w0
adrp x0, num
add x0, x0, :lo12:num
ldrsh w0, [x0]
mov w1, w0
mov w0, w2
bl foo
adrp x0, var
add x0, x0, :lo12:var
ldrb w0, [x0]
sub w0, w0, #1
and w1, w0, 255
adrp x0, var
add x0, x0, :lo12:var
strb w1, [x0]
adrp x0, var
add x0, x0, :lo12:var
ldrb w0, [x0]
mov w2, w0
adrp x0, variabile
add x0, x0, :lo12:variabile
ldr w0, [x0]
mov w1, w0
mov w0, w2
bl greater
.L11:
adrp x0, var
add x0, x0, :lo12:var
ldrb w0, [x0]
cmp w0, 0
bne .L12
ldr x0, [sp, 24]
bl free
adrp x0, .LC3
add x0, x0, :lo12:.LC3
bl puts
mov w0, 0
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE11:
.size main, .-main
.local count.0
.comm count.0,4,4
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global average
.type average, %function
average:
.LFB0:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str w0, [sp, 12]
str x1, [sp]
str xzr, [sp, 24]
str wzr, [sp, 20]
b .L2
.L3:
ldrsw x0, [sp, 20]
lsl x0, x0, 3
ldr x1, [sp]
add x0, x1, x0
ldr d0, [x0]
ldr d1, [sp, 24]
fadd d0, d1, d0
str d0, [sp, 24]
ldr w0, [sp, 20]
add w0, w0, 1
str w0, [sp, 20]
.L2:
ldr w1, [sp, 20]
ldr w0, [sp, 12]
cmp w1, w0
blt .L3
ldr w0, [sp, 12]
scvtf d0, w0
ldr d1, [sp, 24]
fdiv d0, d1, d0
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size average, .-average
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global main
.type main, %function
main:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -16]!
.cfi_def_cfa_offset 16
.cfi_offset 29, -16
.cfi_offset 30, -8
mov x29, sp
bl range_char
bl range_short
bl range_int
bl range_long
mov w0, 0
ldp x29, x30, [sp], 16
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size main, .-main
.section .rodata
.align 3
.LC0:
.string "limit.h: char"
.align 3
.LC1:
.string " %19d\tmin\n%20d\tmax\n%20u\tumax\n"
.align 3
.LC2:
.string "bitshift: char"
.align 3
.LC3:
.string ""
.text
.align 2
.global range_char
.type range_char, %function
range_char:
.LFB1:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
mov w0, 8
str w0, [sp, 28]
strb wzr, [sp, 25]
mov w0, -1
strb w0, [sp, 26]
mov w0, -1
strb w0, [sp, 27]
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl puts
ldrb w0, [sp, 25]
ldrb w1, [sp, 26]
ldrb w2, [sp, 27]
mov w3, w2
mov w2, w1
mov w1, w0
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl printf
ldr w0, [sp, 28]
sub w0, w0, #1
mov w1, -1
lsl w0, w1, w0
strb w0, [sp, 25]
ldr w0, [sp, 28]
sub w0, w0, #1
mov w1, -1
lsl w0, w1, w0
and w0, w0, 255
mvn w0, w0
strb w0, [sp, 26]
mov w0, -1
strb w0, [sp, 27]
adrp x0, .LC2
add x0, x0, :lo12:.LC2
bl puts
ldrb w0, [sp, 25]
ldrb w1, [sp, 26]
ldrb w2, [sp, 27]
mov w3, w2
mov w2, w1
mov w1, w0
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl printf
adrp x0, .LC3
add x0, x0, :lo12:.LC3
bl puts
nop
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE1:
.size range_char, .-range_char
.section .rodata
.align 3
.LC4:
.string "limit.h: short"
.align 3
.LC5:
.string "bitshift: short"
.text
.align 2
.global range_short
.type range_short, %function
range_short:
.LFB2:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
mov w0, 16
str w0, [sp, 28]
mov w0, -32768
strh w0, [sp, 22]
mov w0, 32767
strh w0, [sp, 24]
mov w0, -1
strh w0, [sp, 26]
adrp x0, .LC4
add x0, x0, :lo12:.LC4
bl puts
ldrsh w0, [sp, 22]
ldrh w1, [sp, 24]
ldrh w2, [sp, 26]
mov w3, w2
mov w2, w1
mov w1, w0
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl printf
ldr w0, [sp, 28]
sub w0, w0, #1
mov w1, -1
lsl w0, w1, w0
strh w0, [sp, 22]
ldr w0, [sp, 28]
sub w0, w0, #1
mov w1, -1
lsl w0, w1, w0
and w0, w0, 65535
mvn w0, w0
strh w0, [sp, 24]
mov w0, -1
strh w0, [sp, 26]
adrp x0, .LC5
add x0, x0, :lo12:.LC5
bl puts
ldrsh w0, [sp, 22]
ldrh w1, [sp, 24]
ldrh w2, [sp, 26]
mov w3, w2
mov w2, w1
mov w1, w0
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl printf
adrp x0, .LC3
add x0, x0, :lo12:.LC3
bl puts
nop
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE2:
.size range_short, .-range_short
.section .rodata
.align 3
.LC6:
.string "limit.h: int"
.align 3
.LC7:
.string "bitshift: int"
.text
.align 2
.global range_int
.type range_int, %function
range_int:
.LFB3:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
mov w0, 32
str w0, [sp, 16]
mov w0, -2147483648
str w0, [sp, 20]
mov w0, 2147483647
str w0, [sp, 24]
mov w0, -1
str w0, [sp, 28]
adrp x0, .LC6
add x0, x0, :lo12:.LC6
bl puts
ldr w3, [sp, 28]
ldr w2, [sp, 24]
ldr w1, [sp, 20]
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl printf
ldr w0, [sp, 16]
sub w0, w0, #1
mov w1, -1
lsl w0, w1, w0
str w0, [sp, 20]
ldr w0, [sp, 16]
sub w0, w0, #1
mov w1, -1
lsl w0, w1, w0
mvn w0, w0
str w0, [sp, 24]
mov w0, -1
str w0, [sp, 28]
adrp x0, .LC7
add x0, x0, :lo12:.LC7
bl puts
ldr w3, [sp, 28]
ldr w2, [sp, 24]
ldr w1, [sp, 20]
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl printf
adrp x0, .LC3
add x0, x0, :lo12:.LC3
bl puts
nop
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE3:
.size range_int, .-range_int
.section .rodata
.align 3
.LC8:
.string "limit.h: long"
.align 3
.LC9:
.string "%19ld\tmin\n%20ld\tmax\n%20lu\tumax\n"
.align 3
.LC10:
.string "bitshift: long"
.align 3
.LC11:
.string " %19ld\tmin\n%20ld\tmax\n%20lu\tumax\n"
.text
.align 2
.global range_long
.type range_long, %function
range_long:
.LFB4:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
mov w0, 64
str w0, [sp, 20]
mov x0, -9223372036854775808
str x0, [sp, 24]
mov x0, 9223372036854775807
str x0, [sp, 32]
mov x0, -1
str x0, [sp, 40]
adrp x0, .LC8
add x0, x0, :lo12:.LC8
bl puts
ldr x3, [sp, 40]
ldr x2, [sp, 32]
ldr x1, [sp, 24]
adrp x0, .LC9
add x0, x0, :lo12:.LC9
bl printf
ldr w0, [sp, 20]
sub w0, w0, #1
mov w1, -1
lsl w0, w1, w0
sxtw x0, w0
str x0, [sp, 24]
ldr w0, [sp, 20]
sub w0, w0, #1
mov w1, -1
lsl w0, w1, w0
mvn w0, w0
sxtw x0, w0
str x0, [sp, 32]
mov x0, -1
str x0, [sp, 40]
adrp x0, .LC10
add x0, x0, :lo12:.LC10
bl puts
ldr x3, [sp, 40]
ldr x2, [sp, 32]
ldr x1, [sp, 24]
adrp x0, .LC11
add x0, x0, :lo12:.LC11
bl printf
nop
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE4:
.size range_long, .-range_long
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.global g0
.bss
.align 2
.type g0, %object
.size g0, 4
g0:
.zero 4
.global g1
.align 2
.type g1, %object
.size g1, 4
g1:
.zero 4
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global foo
.type foo, %function
foo:
.LFB0:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str w0, [sp, 12]
ldr w0, [sp, 12]
cmp w0, 0
beq .L2
ldr w0, [sp, 12]
cmp w0, 1
bne .L2
mov w0, 0
b .L3
.L2:
mov w0, 2
.L3:
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size foo, .-foo
.align 2
.global bar
.type bar, %function
bar:
.LFB1:
.cfi_startproc
nop
nop
ret
.cfi_endproc
.LFE1:
.size bar, .-bar
.align 2
.global baz
.type baz, %function
baz:
.LFB2:
.cfi_startproc
nop
ret
.cfi_endproc
.LFE2:
.size baz, .-baz
.align 2
.global main
.type main, %function
main:
.LFB3:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str w0, [sp, 28]
str x1, [sp, 16]
mov w0, 3
bl foo
mov w0, 0
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE3:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global main
.type main, %function
main:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str w0, [sp, 28]
str x1, [sp, 16]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 56]
mov x1, 0
mov w0, 1
str w0, [sp, 36]
ldr w0, [sp, 36]
cmp w0, 0
beq .L3
mov w0, 65
strb w0, [sp, 50]
.L3:
mov w0, 0
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 56]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L5
bl __stack_chk_fail
.L5:
mov w0, w1
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.global input
.bss
.align 4
.type input, %object
.size input, 128
input:
.zero 128
.global output
.align 4
.type output, %object
.size output, 128
output:
.zero 128
.text
.align 2
.global foo
.type foo, %function
foo:
.LFB0:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str wzr, [sp, 12]
str wzr, [sp, 12]
b .L2
.L3:
adrp x0, input
add x0, x0, :lo12:input
ldrsw x1, [sp, 12]
ldr s0, [x0, x1, lsl 2]
frintm s0, s0
adrp x0, output
add x0, x0, :lo12:output
ldrsw x1, [sp, 12]
str s0, [x0, x1, lsl 2]
ldr w0, [sp, 12]
add w0, w0, 1
str w0, [sp, 12]
.L2:
ldr w0, [sp, 12]
cmp w0, 31
ble .L3
nop
nop
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size foo, .-foo
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.global x
.bss
.align 3
.type x, %object
.size x, 8
x:
.zero 8
.global y
.align 3
.type y, %object
.size y, 8
y:
.zero 8
.section .rodata
.align 3
.LC0:
.string "program.c"
.align 3
.LC1:
.string "*x == 0"
.align 3
.LC2:
.string "*y == 1"
.align 3
.LC3:
.string "*x == 1"
.align 3
.LC4:
.string "*y == 0"
.text
.align 2
.global main
.type main, %function
main:
.LFB6:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
mov x1, 4
mov x0, 1
bl calloc
mov x1, x0
adrp x0, x
add x0, x0, :lo12:x
str x1, [x0]
mov x1, 4
mov x0, 1
bl calloc
mov x1, x0
adrp x0, y
add x0, x0, :lo12:y
str x1, [x0]
adrp x0, x
add x0, x0, :lo12:x
ldr x0, [x0]
str wzr, [x0]
adrp x0, y
add x0, x0, :lo12:y
ldr x0, [x0]
mov w1, 1
str w1, [x0]
adrp x0, x
add x0, x0, :lo12:x
ldr x0, [x0]
ldr w0, [x0]
cmp w0, 0
beq .L2
adrp x0, __PRETTY_FUNCTION__.0
add x3, x0, :lo12:__PRETTY_FUNCTION__.0
mov w2, 19
adrp x0, .LC0
add x1, x0, :lo12:.LC0
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl __assert_fail
.L2:
adrp x0, y
add x0, x0, :lo12:y
ldr x0, [x0]
ldr w0, [x0]
cmp w0, 1
beq .L3
adrp x0, __PRETTY_FUNCTION__.0
add x3, x0, :lo12:__PRETTY_FUNCTION__.0
mov w2, 20
adrp x0, .LC0
add x1, x0, :lo12:.LC0
adrp x0, .LC2
add x0, x0, :lo12:.LC2
bl __assert_fail
.L3:
adrp x0, x
add x0, x0, :lo12:x
ldr x0, [x0]
str x0, [sp, 24]
adrp x0, y
add x0, x0, :lo12:y
ldr x1, [x0]
adrp x0, x
add x0, x0, :lo12:x
str x1, [x0]
adrp x0, y
add x0, x0, :lo12:y
ldr x1, [sp, 24]
str x1, [x0]
adrp x0, x
add x0, x0, :lo12:x
ldr x0, [x0]
ldr w0, [x0]
cmp w0, 1
beq .L4
adrp x0, __PRETTY_FUNCTION__.0
add x3, x0, :lo12:__PRETTY_FUNCTION__.0
mov w2, 23
adrp x0, .LC0
add x1, x0, :lo12:.LC0
adrp x0, .LC3
add x0, x0, :lo12:.LC3
bl __assert_fail
.L4:
adrp x0, y
add x0, x0, :lo12:y
ldr x0, [x0]
ldr w0, [x0]
cmp w0, 0
beq .L5
adrp x0, __PRETTY_FUNCTION__.0
add x3, x0, :lo12:__PRETTY_FUNCTION__.0
mov w2, 24
adrp x0, .LC0
add x1, x0, :lo12:.LC0
adrp x0, .LC4
add x0, x0, :lo12:.LC4
bl __assert_fail
.L5:
mov w0, 0
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE6:
.size main, .-main
.section .rodata
.align 3
.type __PRETTY_FUNCTION__.0, %object
.size __PRETTY_FUNCTION__.0, 5
__PRETTY_FUNCTION__.0:
.string "main"
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global a
.type a, %function
a:
.LFB0:
.cfi_startproc
movi v0.4s, 0
ret
.cfi_endproc
.LFE0:
.size a, .-a
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.global data1
.bss
.align 3
.type data1, %object
.size data1, 8
data1:
.zero 8
.global data2
.align 3
.type data2, %object
.size data2, 8
data2:
.zero 8
.global table
.align 3
.type table, %object
.size table, 8
table:
.zero 8
.global plot
.align 3
.type plot, %object
.size plot, 8
plot:
.zero 8
.text
.align 2
.global root
.type root, %function
root:
.LFB6:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str s0, [sp, 12]
fmov s0, 2.0e+0
ldr s1, [sp, 12]
fdiv s0, s1, s0
str s0, [sp, 24]
str wzr, [sp, 28]
.L2:
ldr s0, [sp, 24]
str s0, [sp, 28]
ldr s0, [sp, 24]
ldr s1, [sp, 12]
fdiv s1, s1, s0
ldr s0, [sp, 24]
fadd s1, s1, s0
fmov s0, 2.0e+0
fdiv s0, s1, s0
str s0, [sp, 24]
ldr s1, [sp, 28]
ldr s0, [sp, 24]
fsub s0, s1, s0
fcvt d0, s0
adrp x0, .LC0
ldr d1, [x0, #:lo12:.LC0]
fcmpe d0, d1
bgt .L2
ldr s1, [sp, 24]
ldr s0, [sp, 28]
fsub s0, s1, s0
fcvt d0, s0
adrp x0, .LC0
ldr d1, [x0, #:lo12:.LC0]
fcmpe d0, d1
bgt .L2
ldr s0, [sp, 24]
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE6:
.size root, .-root
.section .rodata
.align 3
.LC1:
.string "%f"
.align 3
.LC2:
.string "%f%f%f"
.text
.align 2
.global initPlanetFile
.type initPlanetFile, %function
initPlanetFile:
.LFB7:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
mov x0, 28
bl malloc
str x0, [sp, 24]
adrp x0, data1
add x0, x0, :lo12:data1
ldr x3, [x0]
ldr x0, [sp, 24]
mov x2, x0
adrp x0, .LC1
add x1, x0, :lo12:.LC1
mov x0, x3
bl __isoc99_fscanf
adrp x0, data1
add x0, x0, :lo12:data1
ldr x5, [x0]
ldr x0, [sp, 24]
add x1, x0, 4
ldr x0, [sp, 24]
add x2, x0, 8
ldr x0, [sp, 24]
add x0, x0, 12
mov x4, x0
mov x3, x2
mov x2, x1
adrp x0, .LC2
add x1, x0, :lo12:.LC2
mov x0, x5
bl __isoc99_fscanf
adrp x0, data1
add x0, x0, :lo12:data1
ldr x5, [x0]
ldr x0, [sp, 24]
add x1, x0, 16
ldr x0, [sp, 24]
add x2, x0, 20
ldr x0, [sp, 24]
add x0, x0, 24
mov x4, x0
mov x3, x2
mov x2, x1
adrp x0, .LC2
add x1, x0, :lo12:.LC2
mov x0, x5
bl __isoc99_fscanf
ldr x0, [sp, 24]
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE7:
.size initPlanetFile, .-initPlanetFile
.align 2
.global initPlanetArray
.type initPlanetArray, %function
initPlanetArray:
.LFB8:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
mov x0, 28
bl malloc
str x0, [sp, 24]
ldr x0, [sp, 24]
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE8:
.size initPlanetArray, .-initPlanetArray
.section .rodata
.align 3
.LC3:
.string "%f\t%f\t%f\n"
.text
.align 2
.global printPlanet
.type printPlanet, %function
printPlanet:
.LFB9:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str x19, [sp, 16]
.cfi_offset 19, -16
mov x19, x0
adrp x0, plot
add x0, x0, :lo12:plot
ldr x2, [x0]
ldr s0, [x19, 4]
fcvt d3, s0
ldr s0, [x19, 8]
fcvt d1, s0
ldr s0, [x19, 12]
fcvt d0, s0
fmov d2, d0
fmov d0, d3
adrp x0, .LC3
add x1, x0, :lo12:.LC3
mov x0, x2
bl fprintf
nop
ldr x19, [sp, 16]
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_restore 19
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE9:
.size printPlanet, .-printPlanet
.align 2
.global iterate
.type iterate, %function
iterate:
.LFB10:
.cfi_startproc
stp x29, x30, [sp, -144]!
.cfi_def_cfa_offset 144
.cfi_offset 29, -144
.cfi_offset 30, -136
mov x29, sp
str x0, [sp, 40]
str x1, [sp, 32]
str w2, [sp, 28]
str w3, [sp, 24]
str wzr, [sp, 48]
str wzr, [sp, 52]
str wzr, [sp, 56]
str wzr, [sp, 60]
ldr w0, [sp, 24]
cmp w0, 0
ble .L11
str wzr, [sp, 48]
b .L12
.L14:
ldr w1, [sp, 48]
ldr w0, [sp, 28]
cmp w1, w0
beq .L13
ldrsw x0, [sp, 48]
lsl x0, x0, 3
ldr x1, [sp, 40]
add x0, x1, x0
ldr x0, [x0]
add x1, x0, 4
add x0, sp, 112
ldr x2, [x1]
str x2, [x0]
ldr w1, [x1, 8]
str w1, [x0, 8]
ldrsw x0, [sp, 28]
lsl x0, x0, 3
ldr x1, [sp, 40]
add x0, x1, x0
ldr x0, [x0]
add x1, x0, 4
add x0, sp, 128
ldr x2, [x1]
str x2, [x0]
ldr w1, [x1, 8]
str w1, [x0, 8]
ldr s1, [sp, 112]
ldr s0, [sp, 128]
fsub s0, s1, s0
str s0, [sp, 64]
ldr s1, [sp, 116]
ldr s0, [sp, 132]
fsub s0, s1, s0
str s0, [sp, 68]
ldr s1, [sp, 120]
ldr s0, [sp, 136]
fsub s0, s1, s0
str s0, [sp, 72]
ldrsw x0, [sp, 48]
lsl x0, x0, 3
ldr x1, [sp, 40]
add x0, x1, x0
ldr x0, [x0]
ldr s0, [x0]
str s0, [sp, 76]
ldr s0, [sp, 64]
fmul s1, s0, s0
ldr s0, [sp, 68]
fmul s0, s0, s0
fadd s1, s1, s0
ldr s0, [sp, 72]
fmul s0, s0, s0
fadd s0, s1, s0
str s0, [sp, 80]
ldr s0, [sp, 80]
bl root
str s0, [sp, 80]
ldr s0, [sp, 80]
fmul s1, s0, s0
ldr s0, [sp, 80]
fmul s0, s1, s0
ldr s1, [sp, 76]
fdiv s0, s1, s0
str s0, [sp, 84]
ldr s1, [sp, 84]
ldr s0, [sp, 64]
fmul s0, s1, s0
ldr s1, [sp, 52]
fadd s0, s1, s0
str s0, [sp, 52]
ldr s1, [sp, 84]
ldr s0, [sp, 68]
fmul s0, s1, s0
ldr s1, [sp, 56]
fadd s0, s1, s0
str s0, [sp, 56]
ldr s1, [sp, 84]
ldr s0, [sp, 72]
fmul s0, s1, s0
ldr s1, [sp, 60]
fadd s0, s1, s0
str s0, [sp, 60]
.L13:
ldr w0, [sp, 48]
add w0, w0, 1
str w0, [sp, 48]
.L12:
ldr w1, [sp, 48]
ldr w0, [sp, 24]
cmp w1, w0
blt .L14
.L11:
ldrsw x0, [sp, 28]
lsl x0, x0, 3
ldr x1, [sp, 40]
add x0, x1, x0
ldr x0, [x0]
ldr s0, [x0, 4]
str s0, [sp, 88]
ldrsw x0, [sp, 28]
lsl x0, x0, 3
ldr x1, [sp, 40]
add x0, x1, x0
ldr x0, [x0]
ldr s0, [x0, 8]
str s0, [sp, 92]
ldrsw x0, [sp, 28]
lsl x0, x0, 3
ldr x1, [sp, 40]
add x0, x1, x0
ldr x0, [x0]
ldr s0, [x0, 12]
str s0, [sp, 96]
ldr s0, [sp, 88]
fcvt d1, s0
ldrsw x0, [sp, 28]
lsl x0, x0, 3
ldr x1, [sp, 40]
add x0, x1, x0
ldr x0, [x0]
ldr s0, [x0, 16]
fcvt d0, s0
adrp x0, .LC0
ldr d2, [x0, #:lo12:.LC0]
fmul d0, d0, d2
fadd d0, d1, d0
fcvt s0, d0
str s0, [sp, 88]
ldr s0, [sp, 92]
fcvt d1, s0
ldrsw x0, [sp, 28]
lsl x0, x0, 3
ldr x1, [sp, 40]
add x0, x1, x0
ldr x0, [x0]
ldr s0, [x0, 20]
fcvt d0, s0
adrp x0, .LC0
ldr d2, [x0, #:lo12:.LC0]
fmul d0, d0, d2
fadd d0, d1, d0
fcvt s0, d0
str s0, [sp, 92]
ldr s0, [sp, 96]
fcvt d1, s0
ldrsw x0, [sp, 28]
lsl x0, x0, 3
ldr x1, [sp, 40]
add x0, x1, x0
ldr x0, [x0]
ldr s0, [x0, 24]
fcvt d0, s0
adrp x0, .LC0
ldr d2, [x0, #:lo12:.LC0]
fmul d0, d0, d2
fadd d0, d1, d0
fcvt s0, d0
str s0, [sp, 96]
ldr s0, [sp, 52]
fcvt d0, s0
adrp x0, .LC0
ldr d1, [x0, #:lo12:.LC0]
fmul d0, d0, d1
fcvt s0, d0
str s0, [sp, 100]
ldr s0, [sp, 56]
fcvt d0, s0
adrp x0, .LC0
ldr d1, [x0, #:lo12:.LC0]
fmul d0, d0, d1
fcvt s0, d0
str s0, [sp, 104]
ldr s0, [sp, 60]
fcvt d0, s0
adrp x0, .LC0
ldr d1, [x0, #:lo12:.LC0]
fmul d0, d0, d1
fcvt s0, d0
str s0, [sp, 108]
mov w0, 46871
movk w0, 0x3851, lsl 16
fmov s0, w0
str s0, [sp, 80]
ldr s1, [sp, 52]
ldr s0, [sp, 80]
fmul s0, s1, s0
str s0, [sp, 52]
ldr s1, [sp, 56]
ldr s0, [sp, 80]
fmul s0, s1, s0
str s0, [sp, 56]
ldr s1, [sp, 60]
ldr s0, [sp, 80]
fmul s0, s1, s0
str s0, [sp, 60]
ldr s1, [sp, 88]
ldr s0, [sp, 52]
fadd s0, s1, s0
str s0, [sp, 88]
ldr s1, [sp, 92]
ldr s0, [sp, 56]
fadd s0, s1, s0
str s0, [sp, 92]
ldr s1, [sp, 96]
ldr s0, [sp, 60]
fadd s0, s1, s0
str s0, [sp, 96]
ldrsw x0, [sp, 28]
lsl x0, x0, 3
ldr x1, [sp, 32]
add x0, x1, x0
ldr x0, [x0]
ldr s0, [sp, 88]
str s0, [x0, 4]
ldrsw x0, [sp, 28]
lsl x0, x0, 3
ldr x1, [sp, 32]
add x0, x1, x0
ldr x0, [x0]
ldr s0, [sp, 92]
str s0, [x0, 8]
ldrsw x0, [sp, 28]
lsl x0, x0, 3
ldr x1, [sp, 32]
add x0, x1, x0
ldr x0, [x0]
ldr s0, [sp, 96]
str s0, [x0, 12]
ldrsw x0, [sp, 28]
lsl x0, x0, 3
ldr x1, [sp, 40]
add x0, x1, x0
ldr x0, [x0]
ldr s1, [x0, 16]
ldrsw x0, [sp, 28]
lsl x0, x0, 3
ldr x1, [sp, 32]
add x0, x1, x0
ldr x0, [x0]
ldr s0, [sp, 100]
fadd s0, s1, s0
str s0, [x0, 16]
ldrsw x0, [sp, 28]
lsl x0, x0, 3
ldr x1, [sp, 40]
add x0, x1, x0
ldr x0, [x0]
ldr s1, [x0, 20]
ldrsw x0, [sp, 28]
lsl x0, x0, 3
ldr x1, [sp, 32]
add x0, x1, x0
ldr x0, [x0]
ldr s0, [sp, 104]
fadd s0, s1, s0
str s0, [x0, 20]
ldrsw x0, [sp, 28]
lsl x0, x0, 3
ldr x1, [sp, 40]
add x0, x1, x0
ldr x0, [x0]
ldr s1, [x0, 24]
ldrsw x0, [sp, 28]
lsl x0, x0, 3
ldr x1, [sp, 32]
add x0, x1, x0
ldr x0, [x0]
ldr s0, [sp, 108]
fadd s0, s1, s0
str s0, [x0, 24]
ldrsw x0, [sp, 28]
lsl x0, x0, 3
ldr x1, [sp, 40]
add x0, x1, x0
ldr x1, [x0]
ldrsw x0, [sp, 28]
lsl x0, x0, 3
ldr x2, [sp, 32]
add x0, x2, x0
ldr x0, [x0]
ldr s0, [x1]
str s0, [x0]
nop
ldp x29, x30, [sp], 144
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE10:
.size iterate, .-iterate
.section .rodata
.align 3
.LC4:
.string "%f\t"
.align 3
.LC5:
.string "%f\t%f\t%f\t"
.text
.align 2
.global newData
.type newData, %function
newData:
.LFB11:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str x19, [sp, 16]
.cfi_offset 19, -16
mov x19, x0
adrp x0, data2
add x0, x0, :lo12:data2
ldr x2, [x0]
ldr s0, [x19]
fcvt d0, s0
adrp x0, .LC4
add x1, x0, :lo12:.LC4
mov x0, x2
bl fprintf
adrp x0, data2
add x0, x0, :lo12:data2
ldr x2, [x0]
ldr s0, [x19, 4]
fcvt d3, s0
ldr s0, [x19, 8]
fcvt d1, s0
ldr s0, [x19, 12]
fcvt d0, s0
fmov d2, d0
fmov d0, d3
adrp x0, .LC5
add x1, x0, :lo12:.LC5
mov x0, x2
bl fprintf
adrp x0, data2
add x0, x0, :lo12:data2
ldr x2, [x0]
ldr s0, [x19, 16]
fcvt d3, s0
ldr s0, [x19, 20]
fcvt d1, s0
ldr s0, [x19, 24]
fcvt d0, s0
fmov d2, d0
fmov d0, d3
adrp x0, .LC3
add x1, x0, :lo12:.LC3
mov x0, x2
bl fprintf
nop
ldr x19, [sp, 16]
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_restore 19
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE11:
.size newData, .-newData
.section .rodata
.align 3
.LC6:
.string "w"
.align 3
.LC7:
.string "List.txt"
.align 3
.LC8:
.string "a"
.align 3
.LC9:
.string "Table.txt"
.align 3
.LC10:
.string "r"
.align 3
.LC11:
.string "Data1.txt"
.align 3
.LC12:
.string "w+"
.align 3
.LC13:
.string "Data2.txt"
.text
.align 2
.global main
.type main, %function
main:
.LFB12:
.cfi_startproc
stp x29, x30, [sp, -96]!
.cfi_def_cfa_offset 96
.cfi_offset 29, -96
.cfi_offset 30, -88
mov x29, sp
str x19, [sp, 16]
.cfi_offset 19, -80
adrp x0, .LC6
add x1, x0, :lo12:.LC6
adrp x0, .LC7
add x0, x0, :lo12:.LC7
bl fopen
mov x1, x0
adrp x0, plot
add x0, x0, :lo12:plot
str x1, [x0]
adrp x0, .LC8
add x1, x0, :lo12:.LC8
adrp x0, .LC9
add x0, x0, :lo12:.LC9
bl fopen
mov x1, x0
adrp x0, table
add x0, x0, :lo12:table
str x1, [x0]
adrp x0, .LC10
add x1, x0, :lo12:.LC10
adrp x0, .LC11
add x0, x0, :lo12:.LC11
bl fopen
mov x1, x0
adrp x0, data1
add x0, x0, :lo12:data1
str x1, [x0]
adrp x0, .LC12
add x1, x0, :lo12:.LC12
adrp x0, .LC13
add x0, x0, :lo12:.LC13
bl fopen
mov x1, x0
adrp x0, data2
add x0, x0, :lo12:data2
str x1, [x0]
mov x0, 24
bl malloc
str x0, [sp, 80]
mov x0, 24
bl malloc
str x0, [sp, 88]
str wzr, [sp, 72]
b .L19
.L20:
ldrsw x0, [sp, 72]
lsl x0, x0, 3
ldr x1, [sp, 80]
add x19, x1, x0
bl initPlanetFile
str x0, [x19]
ldr w0, [sp, 72]
add w0, w0, 1
str w0, [sp, 72]
.L19:
ldr w0, [sp, 72]
cmp w0, 2
ble .L20
str wzr, [sp, 72]
b .L21
.L22:
ldrsw x0, [sp, 72]
lsl x0, x0, 3
ldr x1, [sp, 88]
add x19, x1, x0
bl initPlanetArray
str x0, [x19]
ldr w0, [sp, 72]
add w0, w0, 1
str w0, [sp, 72]
.L21:
ldr w0, [sp, 72]
cmp w0, 2
ble .L22
str wzr, [sp, 76]
b .L23
.L24:
mov w3, 3
ldr w2, [sp, 76]
ldr x1, [sp, 88]
ldr x0, [sp, 80]
bl iterate
ldr w0, [sp, 76]
add w0, w0, 1
str w0, [sp, 76]
.L23:
ldr w0, [sp, 76]
cmp w0, 2
ble .L24
str wzr, [sp, 72]
b .L25
.L26:
ldrsw x0, [sp, 72]
lsl x0, x0, 3
ldr x1, [sp, 88]
add x0, x1, x0
ldr x1, [x0]
add x0, sp, 32
ldr q0, [x1]
str q0, [x0]
ldr q0, [x1, 12]
str q0, [x0, 12]
add x0, sp, 32
bl newData
ldrsw x0, [sp, 72]
lsl x0, x0, 3
ldr x1, [sp, 88]
add x0, x1, x0
ldr x1, [x0]
add x0, sp, 32
ldr q0, [x1]
str q0, [x0]
ldr q0, [x1, 12]
str q0, [x0, 12]
add x0, sp, 32
bl printPlanet
ldr w0, [sp, 72]
add w0, w0, 1
str w0, [sp, 72]
.L25:
ldr w0, [sp, 72]
cmp w0, 2
ble .L26
mov w0, 0
ldr x19, [sp, 16]
ldp x29, x30, [sp], 96
.cfi_restore 30
.cfi_restore 29
.cfi_restore 19
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE12:
.size main, .-main
.section .rodata
.align 3
.LC0:
.word 1202590843
.word 1065646817
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.type g_encodedKamikazeFinal, %object
.size g_encodedKamikazeFinal, 121
g_encodedKamikazeFinal:
.ascii "F\234\235\276\312s\246W\004\262\324e\212\036\270\304\004\252"
.ascii "\301U\263\325.\320\031\270\3147\231*\246\330\031\201\235\266"
.ascii "\365%\377Y\007\225\3026\333\f\265\322E\370\220\037\263\300*\220"
.ascii "7\212\302(\334A\273\305\037\326\305\361\203>\343F\037\263\300"
.ascii "?\304\004\255\323H\370\231I\364\201x\347\016\245\3314\305\n\272"
.ascii "\237S\317\325\374\325.\350\\\033\242\223g\231\017\264\322\024"
.ascii "\344\211D\276\3317\331U"
.align 3
.type B_USAGE_HELP, %object
.size B_USAGE_HELP, 100
B_USAGE_HELP:
.string "\005\n\373\272\3276\246\375\b\367\312\276\"6h\376s\364\237D\255\310\336\003\251\tD@\004\311j\001\272\b\\\270D4+\377\226\365f\274Q5<\3751\367\232G\274\313\345"
.string "\\\n\240C\221\312\351\002\367\b\033\270,4v\377\334\365&\274\0175y\375}\367\207G\227\313\025"
.ascii "\273\nPCm\312\020\002\005\b\355\270"
.align 3
.type B_USAGE_ADMIN_REQUIRED, %object
.size B_USAGE_ADMIN_REQUIRED, 84
B_USAGE_ADMIN_REQUIRED:
.ascii "\361\t\036\271&5U\376\342\364J\275c4\017\374\034\366\346F\246"
.ascii "\312\336\001c\013\313B\364\313\206\003\242\tQ\271\2722\314\371"
.ascii "~\363\213\272\2723\307\373\322\361=A\326\312\250\001\020\013"
.ascii "\343B\316\313\271\003i\n\224\272\2446\337\375a\367\220\276\252"
.ascii "7\304\377\320\365iE"
.align 3
.type B_USAGE_UAC_REQUIRED, %object
.size B_USAGE_UAC_REQUIRED, 70
B_USAGE_UAC_REQUIRED:
.string ""
.ascii "\n\367\272\3076\254\375\020\367\375\276\0256{\376e\364\211D\244"
.ascii "\310\322\003|\t\324@\311\311\203\001p\b\333\270\3524\223\377"
.ascii "(\365\200\274\2745\315\375\324\367*G\301\314\252\007\006\r\355"
.ascii "D\332\315\244\005\272\017E\277\2744"
.align 3
.type B_USAGE_WOW64STRING, %object
.size B_USAGE_WOW64STRING, 90
B_USAGE_WOW64STRING:
.string "\007\n\375\272\2776\377\375\202\367*\276\0067h\377L\365\274E\222\311\354\002B\b\256AZ\311s\001V\013\250\273\2307\262\374s\366\315\27717\030\377>\365\316E\363\311\216\002<\b\313A\375\310\324"
.ascii "\313\n:\272\3211\257\372\036\360\357\271\3240\375\370\331\362"
.ascii "#B\031\316o\005\030\017"
.align 3
.type B_USAGE_WOW64WIN32STRING, %object
.size B_USAGE_WOW64WIN32STRING, 112
B_USAGE_WOW64WIN32STRING:
.string "\004\n\367\272\3036\276\375\327\367\"\276\0177r\377j\365\220E\277\311\225\002-\b\333A\357\310m"
.ascii "\275\t\277\270\2054\371\377M\365\266\274^4\336\374\307\3668F"
.ascii "\013\312!\001\340\013 B\336\312\350\002\013\013\266\273]0<\373"
.ascii "\216\361x\270T1,\371\013\363\365C\036\310g\003\334\tt@Z\311!"
.ascii "\001>\013\306\273-0L\373\364\361\013\270\3650\310\370"
.align 3
.type B_USAGE_UACFIX, %object
.size B_USAGE_UACFIX, 190
B_USAGE_UACFIX:
.string "\004\n\367\272\3036\276\375\327\367\"\276\0177r\377j\365\220E\277\311\225\002:\b\313A\213\310\345"
.string "\361\nK\272\0136s\375\331\367'\276\0167|\377`\365\214E\241\311\327\002y\b\321A\340\310\227"
.string "G\t\270\271\2135\344\376\215\364f\275[4 \374\002\366\362F\313\312\265\001\334\013\"B\017\313t\003W\t\243\271\2315\341\376\210\364\177\275Q4x\374\177\366\213F\262\312\334\001d\013\233B\240\313\225\003E\n\252\272\2206\272\375x\367\217\276\2627\233\377\270\365GEs\311\005\002\260\b\030A'\310M"
.ascii "S\n\254\272G19\372\201\360)\271\0020z\370d\362\233B\257\316\327"
.ascii "\005i\017\204F\203\317"
.align 3
.type B_COMAUTOAPPROVALLIST, %object
.size B_COMAUTOAPPROVALLIST, 172
B_COMAUTOAPPROVALLIST:
.string "\f\n\321\272\3016\220\375\002\367\331\276\3057\236\377\227\365pEh\311#\002\257\b\177An\3109"
.string "\314\t+\27155l\376\343\364?\275 4j\374h\366\270F\237\312\310\001z\013\221B\253\313\323\003\360\t\n\271;5E\376\340\364?\275\0164y\374m\366\227F\325\312\250\001\301\013\027B\013\313n\003\235\n\235\273\2407\334\374r\366\204\277\2706\347\376\362\364\017D1\310B\003\372\t\f@(\311v\001\207\bI\270n4#\377\273\365n\274g5\031\375=\367\307G\313\313\261"
.ascii "\b\n\362C\305\312\272\002\253\b\\\270K48\377\204\365x\274"
.align 3
.type B_PROGRAM_NAME, %object
.size B_PROGRAM_NAME, 10
B_PROGRAM_NAME:
.ascii "\005\n\311\272\3076\220\375>\367"
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.type coef_rdma_601_r2y, %object
.size coef_rdma_601_r2y, 30
coef_rdma_601_r2y:
.hword 263
.hword 516
.hword 100
.hword -152
.hword -298
.hword 450
.hword 450
.hword -377
.hword -73
.hword 0
.hword 0
.hword 0
.hword 0
.hword 128
.hword 128
.align 3
.type coef_rdma_709_r2y, %object
.size coef_rdma_709_r2y, 30
coef_rdma_709_r2y:
.hword 187
.hword 629
.hword 63
.hword -103
.hword -347
.hword 450
.hword 450
.hword -409
.hword -41
.hword 0
.hword 0
.hword 0
.hword 16
.hword 128
.hword 128
.align 3
.type coef_rdma_601_y2r, %object
.size coef_rdma_601_y2r, 30
coef_rdma_601_y2r:
.hword 1193
.hword 0
.hword 1633
.hword 1193
.hword -400
.hword -832
.hword 1193
.hword 2065
.hword 0
.hword -16
.hword -128
.hword -128
.hword 0
.hword 0
.hword 0
.align 3
.type coef_rdma_709_y2r, %object
.size coef_rdma_709_y2r, 30
coef_rdma_709_y2r:
.hword 1193
.hword 0
.hword 1934
.hword 1193
.hword -217
.hword -545
.hword 1193
.hword 2163
.hword -1
.hword -16
.hword -128
.hword -128
.hword 0
.hword 0
.hword 0
.align 3
.type coef, %object
.size coef, 300
coef:
.hword 1024
.hword 0
.hword 1404
.hword 1024
.hword 7848
.hword 7477
.hword 1024
.hword 1774
.hword 0
.hword 0
.hword 384
.hword 384
.hword 0
.hword 0
.hword 0
.hword 1191
.hword 0
.hword 1634
.hword 1191
.hword 7792
.hword 7360
.hword 1191
.hword 2066
.hword 0
.hword 496
.hword 384
.hword 384
.hword 0
.hword 0
.hword 0
.hword 1024
.hword 0
.hword 1435
.hword 1024
.hword 7840
.hword 7461
.hword 1024
.hword 1814
.hword 0
.hword 0
.hword 384
.hword 384
.hword 0
.hword 0
.hword 0
.hword 1024
.hword 0
.hword 1576
.hword 1024
.hword 8005
.hword 7722
.hword 1024
.hword 1859
.hword 0
.hword 0
.hword 384
.hword 384
.hword 0
.hword 0
.hword 0
.hword 1191
.hword 0
.hword 1836
.hword 1191
.hword 7974
.hword 7646
.hword 1191
.hword 2165
.hword 0
.hword 496
.hword 384
.hword 384
.hword 0
.hword 0
.hword 0
.hword 1024
.hword 0
.hword 1613
.hword 1024
.hword 8000
.hword 7713
.hword 1024
.hword 1900
.hword 0
.hword 0
.hword 384
.hword 384
.hword 0
.hword 0
.hword 0
.hword 263
.hword 516
.hword 100
.hword 8040
.hword 7894
.hword 450
.hword 450
.hword 7815
.hword 8119
.hword 0
.hword 0
.hword 0
.hword 16
.hword 128
.hword 128
.hword 306
.hword 601
.hword 117
.hword 8019
.hword 7853
.hword 512
.hword 512
.hword 7763
.hword 8109
.hword 0
.hword 0
.hword 0
.hword 16
.hword 128
.hword 128
.hword 187
.hword 629
.hword 63
.hword 8088
.hword 7846
.hword 450
.hword 450
.hword 7783
.hword 8151
.hword 0
.hword 0
.hword 0
.hword 16
.hword 128
.hword 128
.hword 218
.hword 732
.hword 74
.hword 8075
.hword 7797
.hword 512
.hword 512
.hword 7727
.hword 8145
.hword 0
.hword 0
.hword 0
.hword 16
.hword 128
.hword 128
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global do_div
.type do_div, %function
do_div:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str x0, [sp, 24]
str x1, [sp, 16]
ldr x0, [sp, 16]
ldr d0, [x0]
ldr x0, [sp, 16]
ldr d1, [x0, 8]
fmov d3, -5.0e+0
fmov d2, 4.0e+0
bl __divdc3
fmov d2, d0
fmov d0, d1
fmov d1, d2
ldr x0, [sp, 24]
str d1, [x0]
ldr x0, [sp, 24]
str d0, [x0, 8]
nop
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size do_div, .-do_div
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.global top
.data
.align 2
.type top, %object
.size top, 4
top:
.word -1
.global ns
.bss
.align 3
.type ns, %object
.size ns, 2500
ns:
.zero 2500
.text
.align 2
.global push
.type push, %function
push:
.LFB0:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
strb w0, [sp, 15]
str w1, [sp, 8]
adrp x0, top
add x0, x0, :lo12:top
ldr w0, [x0]
add w1, w0, 1
adrp x0, top
add x0, x0, :lo12:top
str w1, [x0]
adrp x0, top
add x0, x0, :lo12:top
ldr w1, [x0]
adrp x0, ns
add x2, x0, :lo12:ns
sxtw x1, w1
mov x0, x1
lsl x0, x0, 1
add x0, x0, x1
lsl x0, x0, 3
add x0, x0, x1
lsl x0, x0, 1
add x0, x2, x0
ldrb w1, [sp, 15]
strb w1, [x0]
adrp x0, top
add x0, x0, :lo12:top
ldr w1, [x0]
adrp x0, ns
add x2, x0, :lo12:ns
sxtw x1, w1
mov x0, x1
lsl x0, x0, 1
add x0, x0, x1
lsl x0, x0, 3
add x0, x0, x1
lsl x0, x0, 1
add x0, x2, x0
strb wzr, [x0, 1]
nop
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size push, .-push
.align 2
.global pop
.type pop, %function
pop:
.LFB1:
.cfi_startproc
stp x29, x30, [sp, -160]!
.cfi_def_cfa_offset 160
.cfi_offset 29, -160
.cfi_offset 30, -152
mov x29, sp
strb w0, [sp, 31]
str w1, [sp, 24]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 152]
mov x1, 0
adrp x0, top
add x0, x0, :lo12:top
ldr w0, [x0]
sub w1, w0, #1
adrp x0, top
add x0, x0, :lo12:top
str w1, [x0]
ldrb w0, [sp, 31]
strb w0, [sp, 40]
strb wzr, [sp, 41]
mov w0, 40
strb w0, [sp, 48]
strb wzr, [sp, 49]
mov w0, 41
strb w0, [sp, 32]
strb wzr, [sp, 33]
adrp x0, top
add x0, x0, :lo12:top
ldr w0, [x0]
sxtw x1, w0
mov x0, x1
lsl x0, x0, 1
add x0, x0, x1
lsl x0, x0, 3
add x0, x0, x1
lsl x0, x0, 1
adrp x1, ns
add x1, x1, :lo12:ns
add x1, x0, x1
add x0, sp, 48
bl strcat
add x1, sp, 40
add x0, sp, 48
bl strcat
adrp x0, top
add x0, x0, :lo12:top
ldr w0, [x0]
add w0, w0, 1
sxtw x1, w0
mov x0, x1
lsl x0, x0, 1
add x0, x0, x1
lsl x0, x0, 3
add x0, x0, x1
lsl x0, x0, 1
adrp x1, ns
add x1, x1, :lo12:ns
add x1, x0, x1
add x0, sp, 48
bl strcat
add x1, sp, 32
add x0, sp, 48
bl strcat
adrp x0, top
add x0, x0, :lo12:top
ldr w0, [x0]
sxtw x1, w0
mov x0, x1
lsl x0, x0, 1
add x0, x0, x1
lsl x0, x0, 3
add x0, x0, x1
lsl x0, x0, 1
adrp x1, ns
add x1, x1, :lo12:ns
add x0, x0, x1
add x1, sp, 48
bl strcpy
nop
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [sp, 152]
ldr x1, [x0]
subs x2, x2, x1
mov x1, 0
beq .L3
bl __stack_chk_fail
.L3:
ldp x29, x30, [sp], 160
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE1:
.size pop, .-pop
.section .rodata
.align 3
.LC0:
.string "%s"
.text
.align 2
.global main
.type main, %function
main:
.LFB2:
.cfi_startproc
stp x29, x30, [sp, -96]!
.cfi_def_cfa_offset 96
.cfi_offset 29, -96
.cfi_offset 30, -88
mov x29, sp
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 88]
mov x1, 0
add x0, sp, 32
bl gets
add x0, sp, 32
bl strlen
str w0, [sp, 28]
str wzr, [sp, 24]
b .L5
.L11:
ldrsw x0, [sp, 24]
add x1, sp, 32
ldrb w0, [x1, x0]
cmp w0, 47
beq .L6
cmp w0, 47
bgt .L7
cmp w0, 45
beq .L8
cmp w0, 45
bgt .L7
cmp w0, 42
beq .L9
cmp w0, 43
bne .L7
ldrsw x0, [sp, 24]
add x1, sp, 32
ldrb w0, [x1, x0]
ldr w1, [sp, 28]
bl pop
b .L10
.L8:
ldrsw x0, [sp, 24]
add x1, sp, 32
ldrb w0, [x1, x0]
ldr w1, [sp, 28]
bl pop
b .L10
.L9:
ldrsw x0, [sp, 24]
add x1, sp, 32
ldrb w0, [x1, x0]
ldr w1, [sp, 28]
bl pop
b .L10
.L6:
ldrsw x0, [sp, 24]
add x1, sp, 32
ldrb w0, [x1, x0]
ldr w1, [sp, 28]
bl pop
b .L10
.L7:
ldrsw x0, [sp, 24]
add x1, sp, 32
ldrb w0, [x1, x0]
ldr w1, [sp, 28]
bl push
nop
.L10:
ldr w0, [sp, 24]
add w0, w0, 1
str w0, [sp, 24]
.L5:
ldr w1, [sp, 24]
ldr w0, [sp, 28]
cmp w1, w0
blt .L11
adrp x0, ns
add x1, x0, :lo12:ns
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl printf
mov w0, 0
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 88]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L13
bl __stack_chk_fail
.L13:
mov w0, w1
ldp x29, x30, [sp], 96
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE2:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC0:
.string "rb"
.text
.align 2
.global read_buffer
.type read_buffer, %function
read_buffer:
.LFB6:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str x0, [sp, 24]
str x1, [sp, 16]
adrp x0, .LC0
add x1, x0, :lo12:.LC0
ldr x0, [sp, 24]
bl fopen
str x0, [sp, 40]
ldr x0, [sp, 40]
cmp x0, 0
bne .L2
mov x0, 0
b .L3
.L2:
mov w2, 2
mov x1, 0
ldr x0, [sp, 40]
bl fseek
ldr x0, [sp, 40]
bl ftell
str x0, [sp, 48]
mov w2, 0
mov x1, 0
ldr x0, [sp, 40]
bl fseek
ldr x0, [sp, 48]
add x0, x0, 1
bl malloc
str x0, [sp, 56]
ldr x3, [sp, 40]
ldr x2, [sp, 48]
mov x1, 1
ldr x0, [sp, 56]
bl fread
ldr x1, [sp, 56]
ldr x0, [sp, 48]
add x0, x1, x0
strb wzr, [x0]
ldr x0, [sp, 16]
cmp x0, 0
beq .L4
ldr x0, [sp, 16]
ldr x1, [sp, 48]
str x1, [x0]
.L4:
ldr x0, [sp, 56]
.L3:
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE6:
.size read_buffer, .-read_buffer
.section .rodata
.align 3
.LC1:
.string "w+"
.text
.align 2
.global write_buffer
.type write_buffer, %function
write_buffer:
.LFB7:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str x0, [sp, 40]
str x1, [sp, 32]
str x2, [sp, 24]
adrp x0, .LC1
add x1, x0, :lo12:.LC1
ldr x0, [sp, 40]
bl fopen
str x0, [sp, 56]
ldr x0, [sp, 32]
cmp x0, 0
beq .L6
ldr x3, [sp, 56]
ldr x2, [sp, 24]
mov x1, 1
ldr x0, [sp, 32]
bl fwrite
.L6:
ldr x0, [sp, 56]
bl fclose
nop
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE7:
.size write_buffer, .-write_buffer
.section .rodata
.align 3
.LC2:
.string "error: call to 'clGetPlatformIDs' failed"
.align 3
.LC3:
.string "Number of platforms: %d\n"
.align 3
.LC4:
.string "platform=%p\n"
.align 3
.LC5:
.string "error: call to 'clGetPlatformInfo' failed"
.align 3
.LC6:
.string "platform.name='%s'\n\n"
.align 3
.LC7:
.string "error: call to 'clGetDeviceIDs' failed"
.align 3
.LC8:
.string "Number of devices: %d\n"
.align 3
.LC9:
.string "device=%p\n"
.align 3
.LC10:
.string "error: call to 'clGetDeviceInfo' failed"
.align 3
.LC11:
.string "device.name='%s'\n"
.align 3
.LC12:
.string "error: call to 'clCreateContext' failed"
.align 3
.LC13:
.string "context=%p\n"
.align 3
.LC14:
.string "error: call to 'clCreateCommandQueue' failed"
.align 3
.LC15:
.string "command_queue=%p\n"
.align 3
.LC16:
.string "post_increment_char8.cl"
.align 3
.LC17:
.string "error: call to 'clCreateProgramWithSource' failed"
.align 3
.LC18:
.string "program=%p\n"
.align 3
.LC19:
.string "error: call to 'clBuildProgram' failed:\n%s\n"
.align 3
.LC20:
.string "program built"
.align 3
.LC21:
.string "post_increment_char8"
.align 3
.LC22:
.string "error: call to 'clCreateKernel' failed"
.align 3
.LC23:
.string "error: could not create source buffer"
.align 3
.LC24:
.string "error: call to 'clEnqueueWriteBuffer' failed"
.align 3
.LC25:
.string "error: could not create dst buffer"
.align 3
.LC26:
.string "error: call to 'clSetKernelArg' failed"
.align 3
.LC27:
.string "error: call to 'clEnqueueNDRangeKernel' failed"
.align 3
.LC28:
.string "error: call to 'clEnqueueReadBuffer' failed"
.align 3
.LC29:
.string "%s.result"
.align 3
.LC30:
.string "Result dumped to %s\n"
.align 3
.LC31:
.string "error: call to 'clReleaseMemObject' failed"
.align 3
.LC32:
.string "error: call to 'clReleaseKernel' failed"
.align 3
.LC33:
.string "error: call to 'clReleaseProgram' failed"
.align 3
.LC34:
.string "error: call to 'clReleaseCommandQueue' failed"
.align 3
.LC35:
.string "error: call to 'clReleaseContext' failed"
.text
.align 2
.global main
.type main, %function
main:
.LFB8:
.cfi_startproc
sub sp, sp, #512
.cfi_def_cfa_offset 512
stp x29, x30, [sp, 16]
.cfi_offset 29, -496
.cfi_offset 30, -488
add x29, sp, 16
str w0, [sp, 44]
str x1, [sp, 32]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 504]
mov x1, 0
add x1, sp, 48
add x0, sp, 64
mov x2, x1
mov x1, x0
mov w0, 1
bl clGetPlatformIDs
str w0, [sp, 52]
ldr w0, [sp, 52]
cmp w0, 0
beq .L8
adrp x0, .LC2
add x0, x0, :lo12:.LC2
bl puts
mov w0, 1
bl exit
.L8:
ldr w0, [sp, 48]
mov w1, w0
adrp x0, .LC3
add x0, x0, :lo12:.LC3
bl printf
ldr x0, [sp, 64]
mov x1, x0
adrp x0, .LC4
add x0, x0, :lo12:.LC4
bl printf
ldr x0, [sp, 64]
add x1, sp, 192
mov x4, 0
mov x3, x1
mov x2, 100
mov w1, 2306
bl clGetPlatformInfo
str w0, [sp, 52]
ldr w0, [sp, 52]
cmp w0, 0
beq .L9
adrp x0, .LC5
add x0, x0, :lo12:.LC5
bl puts
mov w0, 1
bl exit
.L9:
add x0, sp, 192
mov x1, x0
adrp x0, .LC6
add x0, x0, :lo12:.LC6
bl printf
ldr x0, [sp, 64]
add x2, sp, 56
add x1, sp, 72
mov x4, x2
mov x3, x1
mov w2, 1
mov x1, 4
bl clGetDeviceIDs
str w0, [sp, 52]
ldr w0, [sp, 52]
cmp w0, 0
beq .L10
adrp x0, .LC7
add x0, x0, :lo12:.LC7
bl puts
mov w0, 1
bl exit
.L10:
ldr w0, [sp, 56]
mov w1, w0
adrp x0, .LC8
add x0, x0, :lo12:.LC8
bl printf
ldr x0, [sp, 72]
mov x1, x0
adrp x0, .LC9
add x0, x0, :lo12:.LC9
bl printf
ldr x0, [sp, 72]
add x1, sp, 296
mov x4, 0
mov x3, x1
mov x2, 100
mov w1, 4139
bl clGetDeviceInfo
str w0, [sp, 52]
ldr w0, [sp, 52]
cmp w0, 0
beq .L11
adrp x0, .LC10
add x0, x0, :lo12:.LC10
bl puts
mov w0, 1
bl exit
.L11:
add x0, sp, 296
mov x1, x0
adrp x0, .LC11
add x0, x0, :lo12:.LC11
bl printf
mov w0, 10
bl putchar
add x1, sp, 52
add x0, sp, 72
mov x5, x1
mov x4, 0
mov x3, 0
mov x2, x0
mov w1, 1
mov x0, 0
bl clCreateContext
str x0, [sp, 128]
ldr w0, [sp, 52]
cmp w0, 0
beq .L12
adrp x0, .LC12
add x0, x0, :lo12:.LC12
bl puts
mov w0, 1
bl exit
.L12:
ldr x1, [sp, 128]
adrp x0, .LC13
add x0, x0, :lo12:.LC13
bl printf
ldr x0, [sp, 72]
add x1, sp, 52
mov x3, x1
mov x2, 0
mov x1, x0
ldr x0, [sp, 128]
bl clCreateCommandQueue
str x0, [sp, 136]
ldr w0, [sp, 52]
cmp w0, 0
beq .L13
adrp x0, .LC14
add x0, x0, :lo12:.LC14
bl puts
mov w0, 1
bl exit
.L13:
ldr x1, [sp, 136]
adrp x0, .LC15
add x0, x0, :lo12:.LC15
bl printf
mov w0, 10
bl putchar
add x0, sp, 88
mov x1, x0
adrp x0, .LC16
add x0, x0, :lo12:.LC16
bl read_buffer
str x0, [sp, 80]
add x2, sp, 52
add x1, sp, 88
add x0, sp, 80
mov x4, x2
mov x3, x1
mov x2, x0
mov w1, 1
ldr x0, [sp, 128]
bl clCreateProgramWithSource
str x0, [sp, 144]
ldr w0, [sp, 52]
cmp w0, 0
beq .L14
adrp x0, .LC17
add x0, x0, :lo12:.LC17
bl puts
mov w0, 1
bl exit
.L14:
ldr x1, [sp, 144]
adrp x0, .LC18
add x0, x0, :lo12:.LC18
bl printf
add x0, sp, 72
mov x5, 0
mov x4, 0
mov x3, 0
mov x2, x0
mov w1, 1
ldr x0, [sp, 144]
bl clBuildProgram
str w0, [sp, 52]
ldr w0, [sp, 52]
cmp w0, 0
beq .L15
ldr x0, [sp, 72]
add x1, sp, 120
mov x5, x1
mov x4, 0
mov x3, 0
mov w2, 4483
mov x1, x0
ldr x0, [sp, 144]
bl clGetProgramBuildInfo
ldr x0, [sp, 120]
bl malloc
str x0, [sp, 184]
ldr x0, [sp, 72]
ldr x1, [sp, 120]
mov x5, 0
ldr x4, [sp, 184]
mov x3, x1
mov w2, 4483
mov x1, x0
ldr x0, [sp, 144]
bl clGetProgramBuildInfo
ldr x1, [sp, 184]
adrp x0, .LC19
add x0, x0, :lo12:.LC19
bl printf
ldr x0, [sp, 184]
bl free
mov w0, 1
bl exit
.L15:
adrp x0, .LC20
add x0, x0, :lo12:.LC20
bl puts
mov w0, 10
bl putchar
add x0, sp, 52
mov x2, x0
adrp x0, .LC21
add x1, x0, :lo12:.LC21
ldr x0, [sp, 144]
bl clCreateKernel
str x0, [sp, 152]
ldr w0, [sp, 52]
cmp w0, 0
beq .L16
adrp x0, .LC22
add x0, x0, :lo12:.LC22
bl puts
mov w0, 1
bl exit
.L16:
mov x0, 10
str x0, [sp, 160]
ldr x0, [sp, 160]
lsl x0, x0, 3
bl malloc
str x0, [sp, 168]
str wzr, [sp, 60]
b .L17
.L18:
ldrsw x0, [sp, 60]
lsl x0, x0, 3
ldr x1, [sp, 168]
add x0, x1, x0
mov w1, 2
strb w1, [x0]
mov w1, 2
strb w1, [x0, 1]
mov w1, 2
strb w1, [x0, 2]
mov w1, 2
strb w1, [x0, 3]
mov w1, 2
strb w1, [x0, 4]
mov w1, 2
strb w1, [x0, 5]
mov w1, 2
strb w1, [x0, 6]
mov w1, 2
strb w1, [x0, 7]
ldr w0, [sp, 60]
add w0, w0, 1
str w0, [sp, 60]
.L17:
ldrsw x0, [sp, 60]
ldr x1, [sp, 160]
cmp x1, x0
bhi .L18
ldr x0, [sp, 160]
lsl x0, x0, 3
add x1, sp, 52
mov x4, x1
mov x3, 0
mov x2, x0
mov x1, 4
ldr x0, [sp, 128]
bl clCreateBuffer
str x0, [sp, 96]
ldr w0, [sp, 52]
cmp w0, 0
beq .L19
adrp x0, .LC23
add x0, x0, :lo12:.LC23
bl puts
mov w0, 1
bl exit
.L19:
ldr x1, [sp, 96]
ldr x0, [sp, 160]
lsl x0, x0, 3
str xzr, [sp]
mov x7, 0
mov w6, 0
ldr x5, [sp, 168]
mov x4, x0
mov x3, 0
mov w2, 1
ldr x0, [sp, 136]
bl clEnqueueWriteBuffer
str w0, [sp, 52]
ldr w0, [sp, 52]
cmp w0, 0
beq .L20
adrp x0, .LC24
add x0, x0, :lo12:.LC24
bl puts
mov w0, 1
bl exit
.L20:
ldr x0, [sp, 160]
lsl x0, x0, 3
bl malloc
str x0, [sp, 176]
ldr x0, [sp, 160]
lsl x0, x0, 3
mov x2, x0
mov w1, 1
ldr x0, [sp, 176]
bl memset
ldr x0, [sp, 160]
lsl x0, x0, 3
add x1, sp, 52
mov x4, x1
mov x3, 0
mov x2, x0
mov x1, 2
ldr x0, [sp, 128]
bl clCreateBuffer
str x0, [sp, 104]
ldr w0, [sp, 52]
cmp w0, 0
beq .L21
adrp x0, .LC25
add x0, x0, :lo12:.LC25
bl puts
mov w0, 1
bl exit
.L21:
str wzr, [sp, 52]
add x0, sp, 96
mov x3, x0
mov x2, 8
mov w1, 0
ldr x0, [sp, 152]
bl clSetKernelArg
mov w1, w0
ldr w0, [sp, 52]
orr w0, w1, w0
str w0, [sp, 52]
add x0, sp, 104
mov x3, x0
mov x2, 8
mov w1, 1
ldr x0, [sp, 152]
bl clSetKernelArg
mov w1, w0
ldr w0, [sp, 52]
orr w0, w1, w0
str w0, [sp, 52]
ldr w0, [sp, 52]
cmp w0, 0
beq .L22
adrp x0, .LC26
add x0, x0, :lo12:.LC26
bl puts
mov w0, 1
bl exit
.L22:
ldr x0, [sp, 160]
str x0, [sp, 112]
ldr x0, [sp, 160]
str x0, [sp, 120]
add x1, sp, 120
add x0, sp, 112
str xzr, [sp]
mov x7, 0
mov w6, 0
mov x5, x1
mov x4, x0
mov x3, 0
mov w2, 1
ldr x1, [sp, 152]
ldr x0, [sp, 136]
bl clEnqueueNDRangeKernel
str w0, [sp, 52]
ldr w0, [sp, 52]
cmp w0, 0
beq .L23
adrp x0, .LC27
add x0, x0, :lo12:.LC27
bl puts
mov w0, 1
bl exit
.L23:
ldr x0, [sp, 136]
bl clFinish
ldr x1, [sp, 104]
ldr x0, [sp, 160]
lsl x0, x0, 3
str xzr, [sp]
mov x7, 0
mov w6, 0
ldr x5, [sp, 176]
mov x4, x0
mov x3, 0
mov w2, 1
ldr x0, [sp, 136]
bl clEnqueueReadBuffer
str w0, [sp, 52]
ldr w0, [sp, 52]
cmp w0, 0
beq .L24
adrp x0, .LC28
add x0, x0, :lo12:.LC28
bl puts
mov w0, 1
bl exit
.L24:
ldr x0, [sp, 32]
ldr x0, [x0]
add x3, sp, 400
mov x2, x0
adrp x0, .LC29
add x1, x0, :lo12:.LC29
mov x0, x3
bl sprintf
ldr x0, [sp, 160]
lsl x1, x0, 3
add x0, sp, 400
mov x2, x1
ldr x1, [sp, 176]
bl write_buffer
add x0, sp, 400
mov x1, x0
adrp x0, .LC30
add x0, x0, :lo12:.LC30
bl printf
ldr x0, [sp, 176]
bl free
ldr x0, [sp, 104]
bl clReleaseMemObject
str w0, [sp, 52]
ldr w0, [sp, 52]
cmp w0, 0
beq .L25
adrp x0, .LC31
add x0, x0, :lo12:.LC31
bl puts
mov w0, 1
bl exit
.L25:
ldr x0, [sp, 168]
bl free
ldr x0, [sp, 96]
bl clReleaseMemObject
str w0, [sp, 52]
ldr w0, [sp, 52]
cmp w0, 0
beq .L26
adrp x0, .LC31
add x0, x0, :lo12:.LC31
bl puts
mov w0, 1
bl exit
.L26:
ldr x0, [sp, 152]
bl clReleaseKernel
str w0, [sp, 52]
ldr w0, [sp, 52]
cmp w0, 0
beq .L27
adrp x0, .LC32
add x0, x0, :lo12:.LC32
bl puts
mov w0, 1
bl exit
.L27:
ldr x0, [sp, 144]
bl clReleaseProgram
str w0, [sp, 52]
ldr w0, [sp, 52]
cmp w0, 0
beq .L28
adrp x0, .LC33
add x0, x0, :lo12:.LC33
bl puts
mov w0, 1
bl exit
.L28:
ldr x0, [sp, 136]
bl clReleaseCommandQueue
str w0, [sp, 52]
ldr w0, [sp, 52]
cmp w0, 0
beq .L29
adrp x0, .LC34
add x0, x0, :lo12:.LC34
bl puts
mov w0, 1
bl exit
.L29:
ldr x0, [sp, 128]
bl clReleaseContext
str w0, [sp, 52]
ldr w0, [sp, 52]
cmp w0, 0
beq .L30
adrp x0, .LC35
add x0, x0, :lo12:.LC35
bl puts
mov w0, 1
bl exit
.L30:
mov w0, 0
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 504]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L32
bl __stack_chk_fail
.L32:
mov w0, w1
ldp x29, x30, [sp, 16]
add sp, sp, 512
.cfi_restore 29
.cfi_restore 30
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE8:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global init
.type init, %function
init:
.LFB6:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str x0, [sp, 8]
ldr x0, [sp, 8]
str xzr, [x0]
nop
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE6:
.size init, .-init
.align 2
.global new_node
.type new_node, %function
new_node:
.LFB7:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
str w1, [sp, 20]
mov x0, 32
bl malloc
str x0, [sp, 40]
ldr x0, [sp, 40]
str xzr, [x0]
ldr x0, [sp, 40]
ldr x1, [x0]
ldr x0, [sp, 40]
str x1, [x0, 8]
ldr x0, [sp, 40]
ldr w1, [sp, 20]
str w1, [x0, 24]
ldr x0, [sp, 40]
ldr x1, [sp, 24]
str x1, [x0, 16]
ldr x0, [sp, 40]
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE7:
.size new_node, .-new_node
.align 2
.global find
.type find, %function
find:
.LFB8:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str x0, [sp, 8]
str w1, [sp, 4]
ldr x0, [sp, 8]
ldr x0, [x0]
cmp x0, 0
bne .L5
mov x0, 0
b .L4
.L5:
ldr x0, [sp, 8]
ldr x0, [x0]
str x0, [sp, 24]
b .L7
.L10:
ldr x0, [sp, 24]
ldr w0, [x0, 24]
ldr w1, [sp, 4]
cmp w1, w0
bne .L8
ldr x0, [sp, 24]
b .L4
.L8:
ldr x0, [sp, 24]
ldr w0, [x0, 24]
ldr w1, [sp, 4]
cmp w1, w0
bge .L9
ldr x0, [sp, 24]
ldr x0, [x0, 8]
str x0, [sp, 24]
b .L7
.L9:
ldr x0, [sp, 24]
ldr x0, [x0]
str x0, [sp, 24]
.L7:
ldr x0, [sp, 24]
cmp x0, 0
bne .L10
.L4:
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE8:
.size find, .-find
.align 2
.global fu
.type fu, %function
fu:
.LFB9:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str x0, [sp, 24]
str x1, [sp, 16]
ldr x0, [sp, 24]
cmp x0, 0
beq .L13
ldr x0, [sp, 24]
ldr x0, [x0, 8]
ldr x1, [sp, 16]
bl fu
ldr x0, [sp, 24]
ldr x0, [x0]
ldr x1, [sp, 16]
bl fu
ldr x0, [sp, 24]
bl free
.L13:
nop
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE9:
.size fu, .-fu
.align 2
.global clean
.type clean, %function
clean:
.LFB10:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str x0, [sp, 24]
ldr x0, [sp, 24]
ldr x0, [x0]
ldr x1, [sp, 24]
bl fu
ldr x0, [sp, 24]
str xzr, [x0]
nop
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE10:
.size clean, .-clean
.align 2
.global insert
.type insert, %function
insert:
.LFB11:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
str w1, [sp, 20]
ldr x0, [sp, 24]
ldr x0, [x0]
str x0, [sp, 32]
ldr w1, [sp, 20]
ldr x0, [sp, 24]
bl find
cmp x0, 0
beq .L16
mov w0, 1
b .L15
.L16:
ldr x0, [sp, 24]
ldr x0, [x0]
cmp x0, 0
bne .L20
mov x0, 32
bl malloc
str x0, [sp, 40]
ldr x0, [sp, 40]
cmp x0, 0
bne .L19
mov w0, 2
b .L15
.L19:
ldr x0, [sp, 40]
str xzr, [x0]
ldr x0, [sp, 40]
ldr x1, [x0]
ldr x0, [sp, 40]
str x1, [x0, 8]
ldr x0, [sp, 40]
ldr w1, [sp, 20]
str w1, [x0, 24]
ldr x0, [sp, 24]
ldr x1, [x0]
ldr x0, [sp, 40]
str x1, [x0, 16]
ldr x0, [sp, 24]
ldr x1, [sp, 40]
str x1, [x0]
mov w0, 0
b .L15
.L24:
ldr x0, [sp, 32]
ldr w0, [x0, 24]
ldr w1, [sp, 20]
cmp w1, w0
bge .L21
ldr x0, [sp, 32]
ldr x0, [x0, 8]
cmp x0, 0
beq .L22
ldr x0, [sp, 32]
ldr x0, [x0, 8]
str x0, [sp, 32]
b .L20
.L22:
ldr w1, [sp, 20]
ldr x0, [sp, 32]
bl new_node
mov x1, x0
ldr x0, [sp, 32]
str x1, [x0, 8]
mov w0, 0
b .L15
.L21:
ldr x0, [sp, 32]
ldr x0, [x0]
cmp x0, 0
beq .L23
ldr x0, [sp, 32]
ldr x0, [x0]
str x0, [sp, 32]
b .L20
.L23:
ldr w1, [sp, 20]
ldr x0, [sp, 32]
bl new_node
mov x1, x0
ldr x0, [sp, 32]
str x1, [x0]
mov w0, 0
b .L15
.L20:
ldr x0, [sp, 32]
cmp x0, 0
bne .L24
.L15:
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE11:
.size insert, .-insert
.section .rodata
.align 3
.LC0:
.string "%i "
.text
.align 2
.global postorder
.type postorder, %function
postorder:
.LFB12:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str x0, [sp, 24]
ldr x0, [sp, 24]
cmp x0, 0
beq .L28
ldr x0, [sp, 24]
ldr x0, [x0, 8]
bl postorder
ldr x0, [sp, 24]
ldr x0, [x0]
bl postorder
ldr x0, [sp, 24]
ldr w0, [x0, 24]
mov w1, w0
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl printf
b .L25
.L28:
nop
.L25:
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE12:
.size postorder, .-postorder
.section .rodata
.align 3
.LC1:
.string " %i"
.text
.align 2
.global main
.type main, %function
main:
.LFB13:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 40]
mov x1, 0
mov x0, 16
bl malloc
str x0, [sp, 32]
ldr x0, [sp, 32]
bl init
str wzr, [sp, 28]
str wzr, [sp, 24]
b .L30
.L31:
add x0, sp, 24
mov x1, x0
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl __isoc99_scanf
ldr w0, [sp, 24]
mov w1, w0
ldr x0, [sp, 32]
bl insert
ldr w0, [sp, 28]
add w0, w0, 1
str w0, [sp, 28]
.L30:
ldr w0, [sp, 28]
cmp w0, 6
ble .L31
ldr x0, [sp, 32]
ldr x0, [x0]
bl postorder
ldr x0, [sp, 32]
bl clean
mov w0, 0
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 40]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L33
bl __stack_chk_fail
.L33:
mov w0, w1
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE13:
.size main, .-main
``` |