content
stringlengths 4
1.04M
| lang
stringclasses 358
values | score
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5
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stringlengths 5
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stringlengths 4
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sequencelengths 1
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|---|---|---|---|---|---|
ByJ | PureBasic | 2 | cnheider/onnx | onnx/backend/test/data/node/test_constantofshape_int_shape_zero/test_data_set_0/output_0.pb | [
"MIT"
] |
# Builds a tree of YAML nodes.
#
# This builder is similar to `YAML::Builder`, but instead of
# directly emitting the output to an IO it builds a YAML document
# tree in memory.
#
# All "emitting" methods support specifying a "reference" object
# that will be associated to the emitted object,
# so that when that reference object is emitted again an anchor
# and an alias will be created. This generates both more compact
# documents and allows handling recursive data structures.
class YAML::Nodes::Builder
@current : Node
# The document this builder builds.
getter document : Document
def initialize
@document = Document.new
@current = @document
@object_id_to_node = {} of UInt64 => Node
@anchor_count = 0
end
# Emits an alias to the given *anchor*.
#
# ```
# require "yaml"
#
# nodes_builder = YAML::Nodes::Builder.new
#
# nodes_builder.mapping do
# nodes_builder.scalar "foo"
# nodes_builder.alias "key"
# end
#
# yaml = YAML.build do |builder|
# nodes_builder.document.to_yaml builder
# end
#
# yaml # => "---\nfoo: *key\n"
# ```
def alias(anchor : String) : Nil
push_node Alias.new anchor
end
# Emits the scalar `"<<"` followed by an alias to the given *anchor*.
#
# See [YAML Merge](https://yaml.org/type/merge.html).
#
# ```
# require "yaml"
#
# nodes_builder = YAML::Nodes::Builder.new
#
# nodes_builder.mapping do
# nodes_builder.merge "key"
# end
#
# yaml = YAML.build do |builder|
# nodes_builder.document.to_yaml builder
# end
#
# yaml # => "---\n<<: *key\n"
# ```
def merge(anchor : String) : Nil
self.scalar "<<"
self.alias anchor
end
def scalar(value, anchor : String? = nil, tag : String? = nil,
style : YAML::ScalarStyle = YAML::ScalarStyle::ANY,
reference = nil) : Nil
node = Scalar.new(value.to_s)
node.anchor = anchor
node.tag = tag
node.style = style
if register(reference, node)
return
end
push_node(node)
end
def sequence(anchor : String? = nil, tag : String? = nil,
style : YAML::SequenceStyle = YAML::SequenceStyle::ANY,
reference = nil) : Nil
node = Sequence.new
node.anchor = anchor
node.tag = tag
node.style = style
if register(reference, node)
return
end
push_to_stack(node) do
yield
end
end
def mapping(anchor : String? = nil, tag : String? = nil,
style : YAML::MappingStyle = YAML::MappingStyle::ANY,
reference = nil) : Nil
node = Mapping.new
node.anchor = anchor
node.tag = tag
node.style = style
if register(reference, node)
return
end
push_to_stack(node) do
yield
end
end
private def push_node(node)
case current = @current
when Document
current << node
when Sequence
current << node
when Mapping
current << node
else
raise "Can't push into #{current.class}"
end
end
private def push_to_stack(node)
push_node(node)
old_current = @current
@current = node
yield
@current = old_current
end
private def register(object, current_node)
if object.is_a?(Reference)
register_object_id(object.object_id, current_node)
else
false
end
end
private def register_object_id(object_id, current_node)
node = @object_id_to_node[object_id]?
if node
anchor = node.anchor ||= begin
@anchor_count += 1
@anchor_count.to_s
end
node = Alias.new(anchor)
push_node(node)
true
else
@object_id_to_node[object_id] = current_node
false
end
end
end
| Crystal | 5 | n00p3/crystal | src/yaml/nodes/builder.cr | [
"Apache-2.0"
] |
SELECT (?x +?y AS ?z) {}
| SPARQL | 1 | alpano-unibz/ontop | test/sparql-compliance/src/test/resources/testcases-dawg-sparql-1.1/syntax-query/syntax-select-expr-01.rq | [
"Apache-2.0"
] |
import * as React from 'react';
import Box from '@mui/material/Box';
import IconButton from '@mui/material/IconButton';
import Input from '@mui/material/Input';
import FilledInput from '@mui/material/FilledInput';
import OutlinedInput from '@mui/material/OutlinedInput';
import InputLabel from '@mui/material/InputLabel';
import InputAdornment from '@mui/material/InputAdornment';
import FormHelperText from '@mui/material/FormHelperText';
import FormControl from '@mui/material/FormControl';
import TextField from '@mui/material/TextField';
import Visibility from '@mui/icons-material/Visibility';
import VisibilityOff from '@mui/icons-material/VisibilityOff';
interface State {
amount: string;
password: string;
weight: string;
weightRange: string;
showPassword: boolean;
}
export default function InputAdornments() {
const [values, setValues] = React.useState<State>({
amount: '',
password: '',
weight: '',
weightRange: '',
showPassword: false,
});
const handleChange =
(prop: keyof State) => (event: React.ChangeEvent<HTMLInputElement>) => {
setValues({ ...values, [prop]: event.target.value });
};
const handleClickShowPassword = () => {
setValues({
...values,
showPassword: !values.showPassword,
});
};
const handleMouseDownPassword = (event: React.MouseEvent<HTMLButtonElement>) => {
event.preventDefault();
};
return (
<Box sx={{ display: 'flex', flexWrap: 'wrap' }}>
<div>
<TextField
label="With normal TextField"
id="outlined-start-adornment"
sx={{ m: 1, width: '25ch' }}
InputProps={{
startAdornment: <InputAdornment position="start">kg</InputAdornment>,
}}
/>
<FormControl sx={{ m: 1, width: '25ch' }} variant="outlined">
<OutlinedInput
id="outlined-adornment-weight"
value={values.weight}
onChange={handleChange('weight')}
endAdornment={<InputAdornment position="end">kg</InputAdornment>}
aria-describedby="outlined-weight-helper-text"
inputProps={{
'aria-label': 'weight',
}}
/>
<FormHelperText id="outlined-weight-helper-text">Weight</FormHelperText>
</FormControl>
<FormControl sx={{ m: 1, width: '25ch' }} variant="outlined">
<InputLabel htmlFor="outlined-adornment-password">Password</InputLabel>
<OutlinedInput
id="outlined-adornment-password"
type={values.showPassword ? 'text' : 'password'}
value={values.password}
onChange={handleChange('password')}
endAdornment={
<InputAdornment position="end">
<IconButton
aria-label="toggle password visibility"
onClick={handleClickShowPassword}
onMouseDown={handleMouseDownPassword}
edge="end"
>
{values.showPassword ? <VisibilityOff /> : <Visibility />}
</IconButton>
</InputAdornment>
}
label="Password"
/>
</FormControl>
<FormControl fullWidth sx={{ m: 1 }}>
<InputLabel htmlFor="outlined-adornment-amount">Amount</InputLabel>
<OutlinedInput
id="outlined-adornment-amount"
value={values.amount}
onChange={handleChange('amount')}
startAdornment={<InputAdornment position="start">$</InputAdornment>}
label="Amount"
/>
</FormControl>
</div>
<div>
<TextField
label="With normal TextField"
id="filled-start-adornment"
sx={{ m: 1, width: '25ch' }}
InputProps={{
startAdornment: <InputAdornment position="start">kg</InputAdornment>,
}}
variant="filled"
/>
<FormControl sx={{ m: 1, width: '25ch' }} variant="filled">
<FilledInput
id="filled-adornment-weight"
value={values.weight}
onChange={handleChange('weight')}
endAdornment={<InputAdornment position="end">kg</InputAdornment>}
aria-describedby="filled-weight-helper-text"
inputProps={{
'aria-label': 'weight',
}}
/>
<FormHelperText id="filled-weight-helper-text">Weight</FormHelperText>
</FormControl>
<FormControl sx={{ m: 1, width: '25ch' }} variant="filled">
<InputLabel htmlFor="filled-adornment-password">Password</InputLabel>
<FilledInput
id="filled-adornment-password"
type={values.showPassword ? 'text' : 'password'}
value={values.password}
onChange={handleChange('password')}
endAdornment={
<InputAdornment position="end">
<IconButton
aria-label="toggle password visibility"
onClick={handleClickShowPassword}
onMouseDown={handleMouseDownPassword}
edge="end"
>
{values.showPassword ? <VisibilityOff /> : <Visibility />}
</IconButton>
</InputAdornment>
}
/>
</FormControl>
<FormControl fullWidth sx={{ m: 1 }} variant="filled">
<InputLabel htmlFor="filled-adornment-amount">Amount</InputLabel>
<FilledInput
id="filled-adornment-amount"
value={values.amount}
onChange={handleChange('amount')}
startAdornment={<InputAdornment position="start">$</InputAdornment>}
/>
</FormControl>
</div>
<div>
<TextField
label="With normal TextField"
id="standard-start-adornment"
sx={{ m: 1, width: '25ch' }}
InputProps={{
startAdornment: <InputAdornment position="start">kg</InputAdornment>,
}}
variant="standard"
/>
<FormControl variant="standard" sx={{ m: 1, mt: 3, width: '25ch' }}>
<Input
id="standard-adornment-weight"
value={values.weight}
onChange={handleChange('weight')}
endAdornment={<InputAdornment position="end">kg</InputAdornment>}
aria-describedby="standard-weight-helper-text"
inputProps={{
'aria-label': 'weight',
}}
/>
<FormHelperText id="standard-weight-helper-text">Weight</FormHelperText>
</FormControl>
<FormControl sx={{ m: 1, width: '25ch' }} variant="standard">
<InputLabel htmlFor="standard-adornment-password">Password</InputLabel>
<Input
id="standard-adornment-password"
type={values.showPassword ? 'text' : 'password'}
value={values.password}
onChange={handleChange('password')}
endAdornment={
<InputAdornment position="end">
<IconButton
aria-label="toggle password visibility"
onClick={handleClickShowPassword}
onMouseDown={handleMouseDownPassword}
>
{values.showPassword ? <VisibilityOff /> : <Visibility />}
</IconButton>
</InputAdornment>
}
/>
</FormControl>
<FormControl fullWidth sx={{ m: 1 }} variant="standard">
<InputLabel htmlFor="standard-adornment-amount">Amount</InputLabel>
<Input
id="standard-adornment-amount"
value={values.amount}
onChange={handleChange('amount')}
startAdornment={<InputAdornment position="start">$</InputAdornment>}
/>
</FormControl>
</div>
</Box>
);
}
| TypeScript | 4 | dany-freeman/material-ui | docs/data/material/components/text-fields/InputAdornments.tsx | [
"MIT"
] |
{:dev true
:port 3000
;; when :nrepl-port is set the application starts the nREPL server on load
:nrepl-port 7000
:database-url "jdbc:postgresql://127.0.0.1:5432/hello_world?user=benchmarkdbuser&password=benchmarkdbpass&jdbcCompliantTruncation=false&elideSetAutoCommits=true&useLocalSessionState=true&cachePrepStmts=true&cacheCallableStmts=true&alwaysSendSetIsolation=false&prepStmtCacheSize=4096&cacheServerConfiguration=true&prepStmtCacheSqlLimit=2048&zeroDateTimeBehavior=convertToNull&traceProtocol=false&useUnbufferedInput=false&useReadAheadInput=false&maintainTimeStats=false&useServerPrepStmts&cacheRSMetadata=true"}
| edn | 2 | xsoheilalizadeh/FrameworkBenchmarks | frameworks/Clojure/luminus/env/dev/resources/config.edn | [
"BSD-3-Clause"
] |
#If TARGET="xna" Or TARGET="android"
Import mojo
#End
Interface IBase
Method Blah()
End
Interface Drawable Extends IBase
Method Draw()
End
Interface Killable Extends IBase
Method Kill()
End
Interface Bonkable Extends Drawable,Killable
Method Bonk()
End
Class Actor Implements Drawable
Method Blah()
Print "Actor.Blah"
End
Method Draw()
Print "Actor.Draw"
End
End
Class Player Extends Actor Implements Bonkable
Method Blah()
Print "Player.Blah"
End
Method Draw()
Print "Player.Draw"
End
Method Kill()
Print "Player.Kill"
End
Method Bonk()
Print "Player.Bonk"
End
End
Function Test:Object( actor:Actor )
actor.Draw
End
Function Draw:Object( drawable:Drawable )
If Not drawable Return
drawable.Draw
Return drawable
End
Function Kill:Object( killable:Killable )
If Not killable Return
killable.Kill
Return killable
End
Function Bonk:Object( bonkable:Bonkable )
If Not bonkable Return
bonkable.Bonk
Return bonkable
End
Function Main()
Test New Player
Print ""
Local player:Player=New Player
If Draw( player )<>player Error "ERR!"
If Kill( player )<>player Error "ERR!"
If Bonk( player )<>player Error "ERR!"
Print ""
Local list:=New List<Drawable>
Local x:Drawable=New Player
list.AddLast x'New Player
For Local it:=Eachin list
Local bonkable:=Bonkable( it )
Local o:Object=bonkable
bonkable.Blah
bonkable.Kill
Next
End
| Monkey | 5 | blitz-research/monkey | bananas/mak/ifacetest/ifacetest.monkey | [
"Zlib"
] |
/**
* Copyright (c) 2016-present, Facebook, Inc.
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "caffe2/core/context_gpu.h"
#include "modules/detectron/smooth_l1_loss_op.h"
namespace caffe2 {
namespace {
template <typename T>
__global__ void SmoothL1Kernel(
const int n, const T* in, T* out, T beta) {
// f(x) = 0.5 * x^2 / beta if |x| < beta
// |x| - 0.5 * beta otherwise
CUDA_1D_KERNEL_LOOP(index, n) {
T val = in[index];
T abs_val = c10::cuda::compat::abs(val);
if (abs_val < beta) {
out[index] = 0.5 * val * val / beta;
} else {
out[index] = abs_val - 0.5 * beta;
}
}
}
template <typename T>
__global__ void SmoothL1GradientKernel(
const int n,
const T* in,
T* out,
const T* d_loss_data,
T norm,
T beta) {
// f'(x) = x / beta if |x| < beta
// = sign(x) otherwise
// We also scale by norm * d_loss in this kernel for convenience
CUDA_1D_KERNEL_LOOP(index, n) {
T val = in[index];
T abs_val = c10::cuda::compat::abs(val);
T d_loss = *d_loss_data;
if (abs_val < beta) {
out[index] = norm * d_loss * val / beta;
} else {
out[index] = norm * d_loss * ((T(0) < val) - (val < T(0)));
}
}
}
} // namespace
template<>
bool SmoothL1LossOp<float, CUDAContext>::RunOnDevice() {
auto& Y_hat = Input(0);
auto& Y = Input(1);
auto& alpha_in = Input(2);
auto& alpha_out = Input(3);
int N = Y.dim32(0);
// Require the same number of elements along axis 0 (batch size), but
// otherwise don't care about the shape (just the number of elements)
CAFFE_ENFORCE_EQ(Y_hat.dim32(0), Y.dim32(0),
"Y_hat and Y must have the same number of elements along axis 0");
CAFFE_ENFORCE_EQ(Y_hat.size(), Y.size(),
"Y_hat and Y must have the same number of elements");
CAFFE_ENFORCE_EQ(Y_hat.size(), alpha_in.size());
CAFFE_ENFORCE_EQ(Y_hat.size(), alpha_out.size());
auto* avg_loss = Output(0, vector<int64_t>(), at::dtype<float>());
buff_.ResizeLike(Y);
// Difference
// d := y_hat - y
math::Sub<float, CUDAContext>(
Y.size(), Y_hat.data<float>(), Y.data<float>(),
buff_.mutable_data<float>(), &context_);
// Element-wise weighted difference (can be used to ignore or reweight
// specific components)
// d := alpha_in * (y_hat - y)
math::Mul<float, CUDAContext>(
buff_.size(), buff_.data<float>(), alpha_in.data<float>(),
buff_.mutable_data<float>(), &context_);
// Element-wise smooth l1 loss
// l := SmoothL1(alpha_in * (y_hat - y))
SmoothL1Kernel<float>
<<<CAFFE_GET_BLOCKS(buff_.size()),
CAFFE_CUDA_NUM_THREADS,
0,
context_.cuda_stream()>>>(
buff_.size(), buff_.data<float>(), buff_.mutable_data<float>(),
beta_);
C10_CUDA_KERNEL_LAUNCH_CHECK();
// Element-wise weighted smooth l1 loss (can be used to specify a per-element
// loss weight)
// l := alpha_out * SmoothL1(alpha_in * (y_hat - y))
math::Mul<float, CUDAContext>(
buff_.size(), buff_.data<float>(), alpha_out.data<float>(),
buff_.mutable_data<float>(), &context_);
// Sum of all losses
// al := sum_i l_i
float* avg_loss_data = avg_loss->mutable_data<float>();
math::Sum<float, CUDAContext>(
buff_.size(), buff_.data<float>(), avg_loss_data, &context_);
// Average of input batch size
// al := 1/N * al
math::Scale<float, float, CUDAContext>(
1, scale_ / N, avg_loss_data, avg_loss_data, &context_);
return true;
}
template<>
bool SmoothL1LossGradientOp<float, CUDAContext>::RunOnDevice() {
auto& Y_hat = Input(0);
auto& Y = Input(1);
auto& alpha_in = Input(2);
auto& alpha_out = Input(3);
auto& d_avg_loss = Input(4); // gradient of net w.r.t. avg_loss ("gradOuput")
// We intentially don't compute gradients for Y, alpha_{in,out} since they
// are not needed (can change in the future if desired)
int N = Y.dim32(0);
// Require the same number of elements along axis 0 (batch size), but
// otherwise don't care about the shape (just the number of elements)
CAFFE_ENFORCE_EQ(Y_hat.dim32(0), Y.dim32(0),
"Y_hat and Y must have the same number of elements along axis 0");
CAFFE_ENFORCE_EQ(Y_hat.size(), Y.size(),
"Y_hat and Y must have the same number of elements");
CAFFE_ENFORCE_EQ(Y_hat.size(), alpha_in.size());
CAFFE_ENFORCE_EQ(Y_hat.size(), alpha_out.size());
CAFFE_ENFORCE_EQ(d_avg_loss.size(), 1);
auto* d_Y_hat = Output(0, Y_hat.sizes(), at::dtype<float>()); // gradient of net w.r.t. Y_hat ("gradInput")
buff_.ResizeLike(Y);
// Difference
// d := y_hat - y
math::Sub<float, CUDAContext>(
Y.size(), Y_hat.data<float>(), Y.data<float>(),
buff_.mutable_data<float>(), &context_);
// Element-wise weighted difference (can be used to ignore or reweight
// specific components)
// d := alpha_in * (y_hat - y)
math::Mul<float, CUDAContext>(
buff_.size(), buff_.data<float>(), alpha_in.data<float>(),
buff_.mutable_data<float>(), &context_);
// d_Y_hat := d_avg_loss / N * SmoothL1'(alpha_in * (y_hat - y))
SmoothL1GradientKernel<float>
<<<CAFFE_GET_BLOCKS(buff_.size()),
CAFFE_CUDA_NUM_THREADS,
0,
context_.cuda_stream()>>>(
buff_.size(), buff_.data<float>(), d_Y_hat->mutable_data<float>(),
d_avg_loss.data<float>(), scale_ / N, beta_);
C10_CUDA_KERNEL_LAUNCH_CHECK();
// Element-wise scale by alpha_in and alpha_out
math::Mul<float, CUDAContext>(
d_Y_hat->size(), d_Y_hat->data<float>(), alpha_in.data<float>(),
d_Y_hat->mutable_data<float>(), &context_);
math::Mul<float, CUDAContext>(
d_Y_hat->size(), d_Y_hat->data<float>(), alpha_out.data<float>(),
d_Y_hat->mutable_data<float>(), &context_);
return true;
}
REGISTER_CUDA_OPERATOR(SmoothL1Loss,
SmoothL1LossOp<float, CUDAContext>);
REGISTER_CUDA_OPERATOR(SmoothL1LossGradient,
SmoothL1LossGradientOp<float, CUDAContext>);
} // namespace caffe2
| Cuda | 5 | Hacky-DH/pytorch | modules/detectron/smooth_l1_loss_op.cu | [
"Intel"
] |
# typed: false
# frozen_string_literal: true
require "cmd/shared_examples/args_parse"
describe "brew tap" do
it_behaves_like "parseable arguments"
it "taps a given Tap", :integration_test do
path = setup_test_tap
expect { brew "tap", "--force-auto-update", "homebrew/bar", path/".git" }
.to output(/Tapped/).to_stderr
.and be_a_success
end
end
| Ruby | 3 | ylht/brew | Library/Homebrew/test/cmd/tap_spec.rb | [
"BSD-2-Clause"
] |
' Licensed to the .NET Foundation under one or more agreements.
' The .NET Foundation licenses this file to you under the MIT license.
' See the LICENSE file in the project root for more information.
'-----------------------------------------------------------------------------
' Contains the definition of the Scanner, which produces tokens from text
'-----------------------------------------------------------------------------
Option Compare Binary
Imports System.Text
Imports Microsoft.CodeAnalysis.VisualBasic.SyntaxFacts
Imports CoreInternalSyntax = Microsoft.CodeAnalysis.Syntax.InternalSyntax
Namespace Microsoft.CodeAnalysis.VisualBasic.Syntax.InternalSyntax
Partial Friend Class Scanner
Private Shared Function MakeMissingToken(precedingTrivia As CoreInternalSyntax.SyntaxList(Of VisualBasicSyntaxNode), kind As SyntaxKind) As SyntaxToken
Dim missing As SyntaxToken = SyntaxFactory.MissingToken(kind)
If precedingTrivia.Any Then
missing = DirectCast(missing.WithLeadingTrivia(precedingTrivia.Node), SyntaxToken)
End If
Return missing
End Function
Private Function XmlMakeLeftParenToken(precedingTrivia As CoreInternalSyntax.SyntaxList(Of VisualBasicSyntaxNode)) As PunctuationSyntax
AdvanceChar()
Dim followingTrivia = ScanXmlWhitespace()
Return MakePunctuationToken(SyntaxKind.OpenParenToken, "(", precedingTrivia, followingTrivia)
End Function
Private Function XmlMakeRightParenToken(precedingTrivia As CoreInternalSyntax.SyntaxList(Of VisualBasicSyntaxNode)) As PunctuationSyntax
AdvanceChar()
Dim followingTrivia = ScanXmlWhitespace()
Return MakePunctuationToken(SyntaxKind.CloseParenToken, ")", precedingTrivia, followingTrivia)
End Function
Private Function XmlMakeEqualsToken(precedingTrivia As CoreInternalSyntax.SyntaxList(Of VisualBasicSyntaxNode)) As PunctuationSyntax
AdvanceChar()
Dim followingTrivia = ScanXmlWhitespace()
Return MakePunctuationToken(SyntaxKind.EqualsToken, "=", precedingTrivia, followingTrivia)
End Function
Private Function XmlMakeDivToken(precedingTrivia As CoreInternalSyntax.SyntaxList(Of VisualBasicSyntaxNode)) As PunctuationSyntax
AdvanceChar()
Dim followingTrivia = ScanXmlWhitespace()
Return MakePunctuationToken(SyntaxKind.SlashToken, "/", precedingTrivia, followingTrivia)
End Function
Private Function XmlMakeColonToken(precedingTrivia As CoreInternalSyntax.SyntaxList(Of VisualBasicSyntaxNode)) As PunctuationSyntax
AdvanceChar()
Dim followingTrivia = ScanXmlWhitespace()
Return MakePunctuationToken(SyntaxKind.ColonToken, ":", precedingTrivia, followingTrivia)
End Function
Private Function XmlMakeGreaterToken(precedingTrivia As CoreInternalSyntax.SyntaxList(Of VisualBasicSyntaxNode)) As PunctuationSyntax
AdvanceChar()
' NOTE: > does not consume following trivia
Return MakePunctuationToken(SyntaxKind.GreaterThanToken, ">", precedingTrivia, Nothing)
End Function
Private Function XmlMakeLessToken(precedingTrivia As CoreInternalSyntax.SyntaxList(Of VisualBasicSyntaxNode)) As PunctuationSyntax
AdvanceChar()
Dim followingTrivia = ScanXmlWhitespace()
Return MakePunctuationToken(SyntaxKind.LessThanToken, "<", precedingTrivia, followingTrivia)
End Function
Private Function XmlMakeBadToken(precedingTrivia As CoreInternalSyntax.SyntaxList(Of VisualBasicSyntaxNode), length As Integer, id As ERRID) As BadTokenSyntax
Return XmlMakeBadToken(SyntaxSubKind.None, precedingTrivia, length, id)
End Function
Private Function XmlMakeBadToken(subkind As SyntaxSubKind, precedingTrivia As CoreInternalSyntax.SyntaxList(Of VisualBasicSyntaxNode), length As Integer, id As ERRID) As BadTokenSyntax
Dim spelling = GetTextNotInterned(length)
Dim followingTrivia = ScanXmlWhitespace()
Dim result1 = SyntaxFactory.BadToken(subkind, spelling, precedingTrivia.Node, followingTrivia)
Dim diagnostic As DiagnosticInfo
Select Case id
Case ERRID.ERR_IllegalXmlStartNameChar,
ERRID.ERR_IllegalXmlNameChar
Debug.Assert(length = 1)
If id = ERRID.ERR_IllegalXmlNameChar AndAlso
(precedingTrivia.Any OrElse
PrevToken Is Nothing OrElse
PrevToken.HasTrailingTrivia OrElse
PrevToken.Kind = SyntaxKind.LessThanToken OrElse
PrevToken.Kind = SyntaxKind.LessThanSlashToken OrElse
PrevToken.Kind = SyntaxKind.LessThanQuestionToken) Then
id = ERRID.ERR_IllegalXmlStartNameChar
End If
Dim xmlCh = spelling(0)
Dim xmlChAsUnicode = UTF16ToUnicode(New XmlCharResult(xmlCh))
diagnostic = ErrorFactory.ErrorInfo(id, xmlCh, String.Format("&H{0:X}", xmlChAsUnicode))
Case Else
diagnostic = ErrorFactory.ErrorInfo(id)
End Select
Dim errResult1 = DirectCast(result1.SetDiagnostics({diagnostic}), BadTokenSyntax)
Debug.Assert(errResult1 IsNot Nothing)
Return errResult1
End Function
Private Function XmlMakeSingleQuoteToken(precedingTrivia As CoreInternalSyntax.SyntaxList(Of VisualBasicSyntaxNode),
spelling As Char,
isOpening As Boolean) As PunctuationSyntax
Debug.Assert(Peek() = spelling)
AdvanceChar()
Dim followingTrivia As GreenNode = Nothing
If Not isOpening Then
Dim ws = ScanXmlWhitespace()
followingTrivia = ws
End If
Return MakePunctuationToken(SyntaxKind.SingleQuoteToken, Intern(spelling), precedingTrivia, followingTrivia)
End Function
Private Function XmlMakeDoubleQuoteToken(precedingTrivia As CoreInternalSyntax.SyntaxList(Of VisualBasicSyntaxNode),
spelling As Char,
isOpening As Boolean) As PunctuationSyntax
Debug.Assert(Peek() = spelling)
AdvanceChar()
Dim followingTrivia As GreenNode = Nothing
If Not isOpening Then
Dim ws = ScanXmlWhitespace()
followingTrivia = ws
End If
Return MakePunctuationToken(SyntaxKind.DoubleQuoteToken, Intern(spelling), precedingTrivia, followingTrivia)
End Function
Private Function XmlMakeXmlNCNameToken(
precedingTrivia As CoreInternalSyntax.SyntaxList(Of VisualBasicSyntaxNode),
TokenWidth As Integer
) As XmlNameTokenSyntax
Debug.Assert(TokenWidth > 0)
Dim text = GetText(TokenWidth)
'Xml/Version/Standalone/Encoding/DOCTYPE
Dim contextualKind As SyntaxKind = SyntaxKind.XmlNameToken
Select Case text.Length
Case 3
If String.Equals(text, "xml", StringComparison.Ordinal) Then
contextualKind = SyntaxKind.XmlKeyword
End If
End Select
If contextualKind = SyntaxKind.XmlNameToken Then
contextualKind = TokenOfStringCached(text)
If contextualKind = SyntaxKind.IdentifierToken Then
contextualKind = SyntaxKind.XmlNameToken
End If
End If
Dim followingTrivia = ScanXmlWhitespace()
Return SyntaxFactory.XmlNameToken(text, contextualKind, precedingTrivia.Node, followingTrivia)
End Function
Private Function XmlMakeAttributeDataToken(
precedingTrivia As CoreInternalSyntax.SyntaxList(Of VisualBasicSyntaxNode),
TokenWidth As Integer,
Value As String
) As XmlTextTokenSyntax
Debug.Assert(TokenWidth > 0)
Dim text = GetTextNotInterned(TokenWidth)
' NOTE: XmlMakeAttributeData does not consume trailing trivia.
Return SyntaxFactory.XmlTextLiteralToken(text, Value, precedingTrivia.Node, Nothing)
End Function
Private Function XmlMakeAttributeDataToken(
precedingTrivia As CoreInternalSyntax.SyntaxList(Of VisualBasicSyntaxNode),
TokenWidth As Integer,
Scratch As StringBuilder
) As XmlTextTokenSyntax
' NOTE: XmlMakeAttributeData does not consume trailing trivia.
Return XmlMakeTextLiteralToken(precedingTrivia, TokenWidth, Scratch)
End Function
Private Function XmlMakeEntityLiteralToken(
precedingTrivia As CoreInternalSyntax.SyntaxList(Of VisualBasicSyntaxNode),
TokenWidth As Integer,
Value As String
) As XmlTextTokenSyntax
Debug.Assert(TokenWidth > 0)
Return SyntaxFactory.XmlEntityLiteralToken(GetText(TokenWidth), Value, precedingTrivia.Node, Nothing)
End Function
Private Shared ReadOnly s_xmlAmpToken As XmlTextTokenSyntax = SyntaxFactory.XmlEntityLiteralToken("&", "&", Nothing, Nothing)
Private Function XmlMakeAmpLiteralToken(
precedingTrivia As CoreInternalSyntax.SyntaxList(Of VisualBasicSyntaxNode)
) As XmlTextTokenSyntax
AdvanceChar(5) ' "&".Length
Return If(precedingTrivia.Node Is Nothing, s_xmlAmpToken, SyntaxFactory.XmlEntityLiteralToken("&", "&", precedingTrivia.Node, Nothing))
End Function
Private Shared ReadOnly s_xmlAposToken As XmlTextTokenSyntax = SyntaxFactory.XmlEntityLiteralToken("'", "'", Nothing, Nothing)
Private Function XmlMakeAposLiteralToken(
precedingTrivia As CoreInternalSyntax.SyntaxList(Of VisualBasicSyntaxNode)
) As XmlTextTokenSyntax
AdvanceChar(6) ' "'".Length
Return If(precedingTrivia.Node Is Nothing, s_xmlAposToken, SyntaxFactory.XmlEntityLiteralToken("'", "'", precedingTrivia.Node, Nothing))
End Function
Private Shared ReadOnly s_xmlGtToken As XmlTextTokenSyntax = SyntaxFactory.XmlEntityLiteralToken(">", ">", Nothing, Nothing)
Private Function XmlMakeGtLiteralToken(
precedingTrivia As CoreInternalSyntax.SyntaxList(Of VisualBasicSyntaxNode)
) As XmlTextTokenSyntax
AdvanceChar(4) ' ">".Length
Return If(precedingTrivia.Node Is Nothing, s_xmlGtToken, SyntaxFactory.XmlEntityLiteralToken(">", "&", precedingTrivia.Node, Nothing))
End Function
Private Shared ReadOnly s_xmlLtToken As XmlTextTokenSyntax = SyntaxFactory.XmlEntityLiteralToken("<", "<", Nothing, Nothing)
Private Function XmlMakeLtLiteralToken(
precedingTrivia As CoreInternalSyntax.SyntaxList(Of VisualBasicSyntaxNode)
) As XmlTextTokenSyntax
AdvanceChar(4) ' "<".Length
Return If(precedingTrivia.Node Is Nothing, s_xmlLtToken, SyntaxFactory.XmlEntityLiteralToken("<", "<", precedingTrivia.Node, Nothing))
End Function
Private Shared ReadOnly s_xmlQuotToken As XmlTextTokenSyntax = SyntaxFactory.XmlEntityLiteralToken(""", """", Nothing, Nothing)
Private Function XmlMakeQuotLiteralToken(
precedingTrivia As CoreInternalSyntax.SyntaxList(Of VisualBasicSyntaxNode)
) As XmlTextTokenSyntax
AdvanceChar(6) ' """.Length
Return If(precedingTrivia.Node Is Nothing, s_xmlQuotToken, SyntaxFactory.XmlEntityLiteralToken(""", """", precedingTrivia.Node, Nothing))
End Function
Private Function XmlMakeTextLiteralToken(
precedingTrivia As CoreInternalSyntax.SyntaxList(Of VisualBasicSyntaxNode),
TokenWidth As Integer,
Scratch As StringBuilder
) As XmlTextTokenSyntax
Debug.Assert(TokenWidth > 0)
Dim text = GetTextNotInterned(TokenWidth)
' PERF: It's common for the text and the 'value' to be identical. If so, try to unify the
' two strings.
Dim value = GetScratchText(Scratch, text)
Return SyntaxFactory.XmlTextLiteralToken(text, value, precedingTrivia.Node, Nothing)
End Function
Private Shared ReadOnly s_docCommentCrLfToken As XmlTextTokenSyntax = SyntaxFactory.DocumentationCommentLineBreakToken(vbCrLf, vbLf, Nothing, Nothing)
Private Function MakeDocCommentLineBreakToken(
precedingTrivia As CoreInternalSyntax.SyntaxList(Of VisualBasicSyntaxNode),
TokenWidth As Integer
) As XmlTextTokenSyntax
Dim text = GetText(TokenWidth)
Debug.Assert(text = vbCr OrElse text = vbLf OrElse text = vbCrLf)
If precedingTrivia.Node Is Nothing AndAlso text = vbCrLf Then
Return s_docCommentCrLfToken
End If
Return SyntaxFactory.DocumentationCommentLineBreakToken(text, vbLf, precedingTrivia.Node, Nothing)
End Function
Private Function XmlMakeTextLiteralToken(
precedingTrivia As CoreInternalSyntax.SyntaxList(Of VisualBasicSyntaxNode),
TokenWidth As Integer,
err As ERRID
) As XmlTextTokenSyntax
Debug.Assert(TokenWidth > 0)
Dim text = GetTextNotInterned(TokenWidth)
Return DirectCast(SyntaxFactory.XmlTextLiteralToken(text, text, precedingTrivia.Node, Nothing).SetDiagnostics({ErrorFactory.ErrorInfo(err)}), XmlTextTokenSyntax)
End Function
Private Function XmlMakeBeginEndElementToken(precedingTrivia As CoreInternalSyntax.SyntaxList(Of VisualBasicSyntaxNode), scanTrailingTrivia As ScanTriviaFunc) As PunctuationSyntax
Debug.Assert(NextAre("</"))
AdvanceChar(2)
Dim followingTrivia = scanTrailingTrivia()
Return MakePunctuationToken(SyntaxKind.LessThanSlashToken, "</", precedingTrivia, followingTrivia)
End Function
Private Function XmlMakeEndEmptyElementToken(precedingTrivia As CoreInternalSyntax.SyntaxList(Of VisualBasicSyntaxNode)) As PunctuationSyntax
Debug.Assert(NextAre("/>"))
AdvanceChar(2)
Return MakePunctuationToken(SyntaxKind.SlashGreaterThanToken, "/>", precedingTrivia, Nothing)
End Function
#Region "EmbeddedToken"
Private Function XmlMakeBeginEmbeddedToken(precedingTrivia As CoreInternalSyntax.SyntaxList(Of VisualBasicSyntaxNode)) As PunctuationSyntax
Debug.Assert(NextAre("<%="))
AdvanceChar(3)
Return MakePunctuationToken(SyntaxKind.LessThanPercentEqualsToken, "<%=", precedingTrivia, Nothing)
End Function
Private Function XmlMakeEndEmbeddedToken(precedingTrivia As CoreInternalSyntax.SyntaxList(Of VisualBasicSyntaxNode), scanTrailingTrivia As ScanTriviaFunc) As PunctuationSyntax
Debug.Assert(Peek() = "%"c OrElse Peek() = FULLWIDTH_PERCENT_SIGN)
Debug.Assert(Peek(1) = ">"c)
Dim spelling As String
If Peek() = "%"c Then
AdvanceChar(2)
spelling = "%>"
Else
spelling = GetText(2)
End If
Dim followingTrivia = scanTrailingTrivia()
Return MakePunctuationToken(SyntaxKind.PercentGreaterThanToken, spelling, precedingTrivia, followingTrivia)
End Function
#End Region
#Region "DTD"
Private Function XmlMakeBeginDTDToken(precedingTrivia As CoreInternalSyntax.SyntaxList(Of VisualBasicSyntaxNode)) As BadTokenSyntax
Debug.Assert(NextAre("<!DOCTYPE"))
Return XmlMakeBadToken(SyntaxSubKind.BeginDocTypeToken, precedingTrivia, 9, ERRID.ERR_DTDNotSupported)
End Function
Private Function XmlLessThanExclamationToken(state As ScannerState, precedingTrivia As CoreInternalSyntax.SyntaxList(Of VisualBasicSyntaxNode)) As BadTokenSyntax
Debug.Assert(NextAre("<!"))
Return XmlMakeBadToken(SyntaxSubKind.LessThanExclamationToken, precedingTrivia, 2, If(state = ScannerState.DocType, ERRID.ERR_DTDNotSupported, ERRID.ERR_Syntax))
End Function
Private Function XmlMakeOpenBracketToken(state As ScannerState, precedingTrivia As CoreInternalSyntax.SyntaxList(Of VisualBasicSyntaxNode)) As BadTokenSyntax
Debug.Assert(Peek() = "["c)
Return XmlMakeBadToken(SyntaxSubKind.OpenBracketToken, precedingTrivia, 1, If(state = ScannerState.DocType, ERRID.ERR_DTDNotSupported, ERRID.ERR_IllegalXmlNameChar))
End Function
Private Function XmlMakeCloseBracketToken(state As ScannerState, precedingTrivia As CoreInternalSyntax.SyntaxList(Of VisualBasicSyntaxNode)) As BadTokenSyntax
Debug.Assert(Peek() = "]"c)
Return XmlMakeBadToken(SyntaxSubKind.CloseBracketToken, precedingTrivia, 1, If(state = ScannerState.DocType, ERRID.ERR_DTDNotSupported, ERRID.ERR_IllegalXmlNameChar))
End Function
#End Region
#Region "ProcessingInstruction"
Private Function XmlMakeBeginProcessingInstructionToken(precedingTrivia As CoreInternalSyntax.SyntaxList(Of VisualBasicSyntaxNode), scanTrailingTrivia As ScanTriviaFunc) As PunctuationSyntax
Debug.Assert(NextAre("<?"))
AdvanceChar(2)
Dim followingTrivia = scanTrailingTrivia()
Return MakePunctuationToken(SyntaxKind.LessThanQuestionToken, "<?", precedingTrivia, followingTrivia)
End Function
Private Function XmlMakeProcessingInstructionToken(precedingTrivia As CoreInternalSyntax.SyntaxList(Of VisualBasicSyntaxNode), TokenWidth As Integer) As XmlTextTokenSyntax
Debug.Assert(TokenWidth > 0)
'TODO - Normalize new lines.
Dim text = GetTextNotInterned(TokenWidth)
Return SyntaxFactory.XmlTextLiteralToken(text, text, precedingTrivia.Node, Nothing)
End Function
Private Function XmlMakeEndProcessingInstructionToken(precedingTrivia As CoreInternalSyntax.SyntaxList(Of VisualBasicSyntaxNode)) As PunctuationSyntax
Debug.Assert(NextAre("?>"))
AdvanceChar(2)
Return MakePunctuationToken(SyntaxKind.QuestionGreaterThanToken, "?>", precedingTrivia, Nothing)
End Function
#End Region
#Region "Comment"
Private Function XmlMakeBeginCommentToken(precedingTrivia As CoreInternalSyntax.SyntaxList(Of VisualBasicSyntaxNode), scanTrailingTrivia As ScanTriviaFunc) As PunctuationSyntax
Debug.Assert(NextAre("<!--"))
AdvanceChar(4)
Dim followingTrivia = scanTrailingTrivia()
Return MakePunctuationToken(SyntaxKind.LessThanExclamationMinusMinusToken, "<!--", precedingTrivia, followingTrivia)
End Function
Private Function XmlMakeCommentToken(precedingTrivia As CoreInternalSyntax.SyntaxList(Of VisualBasicSyntaxNode), TokenWidth As Integer) As XmlTextTokenSyntax
Debug.Assert(TokenWidth > 0)
'TODO - Normalize new lines.
Dim text = GetTextNotInterned(TokenWidth)
Return SyntaxFactory.XmlTextLiteralToken(text, text, precedingTrivia.Node, Nothing)
End Function
Private Function XmlMakeEndCommentToken(precedingTrivia As CoreInternalSyntax.SyntaxList(Of VisualBasicSyntaxNode)) As PunctuationSyntax
Debug.Assert(NextAre("-->"))
AdvanceChar(3)
Return MakePunctuationToken(SyntaxKind.MinusMinusGreaterThanToken, "-->", precedingTrivia, Nothing)
End Function
#End Region
#Region "CData"
Private Function XmlMakeBeginCDataToken(precedingTrivia As CoreInternalSyntax.SyntaxList(Of VisualBasicSyntaxNode), scanTrailingTrivia As ScanTriviaFunc) As PunctuationSyntax
Debug.Assert(NextAre("<![CDATA["))
AdvanceChar(9)
Dim followingTrivia = scanTrailingTrivia()
Return MakePunctuationToken(SyntaxKind.BeginCDataToken, "<![CDATA[", precedingTrivia, followingTrivia)
End Function
Private Function XmlMakeCDataToken(precedingTrivia As CoreInternalSyntax.SyntaxList(Of VisualBasicSyntaxNode), TokenWidth As Integer, scratch As StringBuilder) As XmlTextTokenSyntax
Return XmlMakeTextLiteralToken(precedingTrivia, TokenWidth, scratch)
End Function
Private Function XmlMakeEndCDataToken(precedingTrivia As CoreInternalSyntax.SyntaxList(Of VisualBasicSyntaxNode)) As PunctuationSyntax
Debug.Assert(NextAre("]]>"))
AdvanceChar(3)
Return MakePunctuationToken(SyntaxKind.EndCDataToken, "]]>", precedingTrivia, Nothing)
End Function
#End Region
End Class
End Namespace
| Visual Basic | 5 | ffMathy/roslyn | src/Compilers/VisualBasic/Portable/Scanner/XmlTokenFactories.vb | [
"MIT"
] |
discard """
output: '''[0, 0]'''
"""
import morder_depb
import morder_depa
# bug #11187
echo Foo(3)
| Nimrod | 0 | JohnAD/Nim | tests/modules/torder_dep.nim | [
"MIT"
] |
struct Params;
pub trait Plugin<E: ?Sized> {
type Error;
}
pub trait Pluggable {
fn get_ref<P: Plugin<Self>>(&mut self) -> Option<P::Error> {
None
}
}
struct Foo;
impl Plugin<Foo> for Params {
type Error = ();
}
impl<T: Copy> Pluggable for T {}
fn handle(req: &mut i32) {
req.get_ref::<Params>();
//~^ ERROR the trait bound `Params: Plugin<i32>` is not satisfied
}
fn main() {}
| Rust | 3 | Eric-Arellano/rust | src/test/ui/issues/issue-45801.rs | [
"ECL-2.0",
"Apache-2.0",
"MIT-0",
"MIT"
] |
\documentclass{article}
\usepackage{agda}
\begin{document}
\begin{code}
-- We use non-standard spaces between the name of the term and the
-- colon.
postulate
s00A0 : Set -- NO-BREAK SPACE ("\ " with Agda input method)
s2004 : Set -- THREE-PER-EM SPACE ("\;" with Agda input method)
s202F : Set -- NARROW NO-BREAK SPACE ("\," with Agda input method)
\end{code}
% Various whitespace characters: " ".
\begin{code}
open import Agda.Builtin.String
-- Various whitespace characters: " ".
various-whitespace-characters : String
various-whitespace-characters = " "
\end{code}
\end{document}
| Literate Agda | 4 | shlevy/agda | test/LaTeXAndHTML/succeed/Issue2019.lagda | [
"BSD-3-Clause"
] |
--TEST--
func_get_args with variable number of args
--FILE--
<?php
function foo($a)
{
var_dump(func_get_args());
}
foo(1, 2, 3);
?>
--EXPECT--
array(3) {
[0]=>
int(1)
[1]=>
int(2)
[2]=>
int(3)
}
| PHP | 4 | thiagooak/php-src | tests/lang/func_get_args.002.phpt | [
"PHP-3.01"
] |
; 3.06 https://nsis.sourceforge.io/Main_Page
; https://nsis.sourceforge.io/Docs/
;! keywords ===========================================================
Page
UninstPage
PageEx
PageExEnd
SectionGroup
Section
SectionEnd
SectionGroupEnd
Function
FunctionEnd
Var
Goto
Return
;! preprocessor ===========================================================
; https://nsis.sourceforge.io/Docs/Chapter5.html#
; Compiler Utility Commands
!include
!addincludedir
!addplugindir
!appendfile
!cd
!delfile
!echo
!error
!execute
!makensis
!packhdr
!finalize
!system
!tempfile
!getdllversion
!gettlbversion
!warning
!pragma
!verbose
; Conditional Compilation
!define
!undef
!ifdef
!endif
!ifndef
!endif
!if
!endif
!ifmacrodef
!endif
!ifmacrondef
!else
!endif
!insertmacro
!macro
!macroend
!macroundef
!searchparse
!searchreplace
;! instructions ===========================================================
PageCallbacks
; Section Commands
AddSize
InstType
SectionInstType
SectionIn
; https://nsis.sourceforge.io/Docs/Chapter4.html#instr
; Basic Instructions
Delete
Exec
ExecShell
ExecShellWait
ExecWait
File
Rename
ReserveFile
RMDir
SetOutPath
; Registry, INI, File Instructions
DeleteINISec
DeleteINIStr
DeleteRegKey
DeleteRegValue
EnumRegKey
EnumRegValue
ExpandEnvStrings
FlushINI
ReadEnvStr
ReadINIStr
ReadRegDWORD
ReadRegStr
WriteINIStr
WriteRegBin
WriteRegNone
WriteRegDWORD
WriteRegStr
WriteRegExpandStr
WriteRegMultiStr
SetRegView
; General Purpose Instructions
CallInstDLL
CopyFiles
CreateDirectory
CreateShortcut
GetDLLVersion
GetDLLVersionLocal
GetFileTime
GetFileTimeLocal
GetKnownFolderPath
GetFullPathName
GetTempFileName
SearchPath
SetFileAttributes
RegDLL
UnRegDLL
; Flow Control Instructions
Abort
Call
ClearErrors
GetCurrentAddress
GetFunctionAddress
GetLabelAddress
Goto
IfAbort
IfErrors
IfFileExists
IfRebootFlag
IfSilent
IfShellVarContextAll
IfRtlLanguage
IntCmp
IntCmpU
Int64Cmp
Int64CmpU
IntPtrCmp
IntPtrCmpU
MessageBox
Return
Quit
SetErrors
StrCmp
StrCmpS
; File Instructions
FileClose
FileOpen
FileRead
FileReadUTF16LE
FileReadByte
FileReadWord
FileSeek
FileWrite
FileWriteUTF16LE
FileWriteByte
FileWriteWord
FindClose
FindFirst
FindNext
; Uninstaller Instructions
WriteUninstaller
; Miscellaneous Instructions
GetErrorLevel
GetInstDirError
InitPluginsDir
Nop
SetErrorLevel
SetShellVarContext
Sleep
; String Manipulation Instructions
StrCpy
StrLen
; Stack Support
Exch
Pop
Push
; Integer Support
IntFmt
Int64Fmt
IntOp
IntPtrOp
; Reboot Instructions
Reboot
SetRebootFlag
; Install Logging Instructions
LogSet
LogText
; Section Management
SectionSetFlags
SectionGetFlags
SectionSetText
SectionGetText
SectionSetInstTypes
SectionGetInstTypes
SectionSetSize
SectionGetSize
SetCurInstType
GetCurInstType
InstTypeSetText
InstTypeGetText
; User Interface Instructions
BringToFront
CreateFont
DetailPrint
EnableWindow
FindWindow
GetDlgItem
HideWindow
IsWindow
LoadAndSetImage
LockWindow
SendMessage
SetAutoClose
SetBrandingImage
SetDetailsView
SetDetailsPrint
SetCtlColors
SetSilent
ShowWindow
; Multiple Languages Instructions
LoadLanguageFile
LangString
LicenseLangString
;! predefined variables =======================================================
; https://nsis.sourceforge.io/Docs/Chapter4.html#varconstant
$PROGRAMFILES
$PROGRAMFILES32
$PROGRAMFILES64
$DESKTOP
$EXEDIR
$EXEFILE
$EXEPATH
${NSISDIR}
$WINDIR
$SYSDIR
$TEMP
$STARTMENU
$SMPROGRAMS
$SMSTARTUP
$QUICKLAUNCH
$DOCUMENTS
$SENDTO
$RECENT
$FAVORITES
$MUSIC
$PICTURES
$VIDEOS
$NETHOOD
$FONTS
$TEMPLATES
$APPDATA
$LOCALAPPDATA
$PRINTHOOD
$INTERNET_CACHE
$COOKIES
$HISTORY
$PROFILE
$ADMINTOOLS
$RESOURCES
$RESOURCES_LOCALIZED
$CDBURN_AREA
$HWNDPARENT
$PLUGINSDIR
; https://nsis.sourceforge.io/Docs/Chapter5.html#comppredefines
${__COUNTER__}
${__FILE__}
${__FILEDIR__}
${__LINE__}
${__DATE__}
${__TIME__}
${__TIMESTAMP__}
${NSIS_VERSION}
${NSIS_PACKEDVERSION}
${NSIS_CHAR_SIZE}
${NSIS_PTR_SIZE}
;! functions ===========================================================
; Callback Functions
; https://nsis.sourceforge.io/Docs/Chapter4.html#callbacks
.onGUIInit
.onInit
.onInstFailed
.onInstSuccess
.onGUIEnd
.onMouseOverSection
.onRebootFailed
.onSelChange
.onUserAbort
.onVerifyInstDir
un.onGUIInit
un.onInit
un.onUninstFailed
un.onUninstSuccess
un.onGUIEnd
un.onRebootFailed
un.onSelChange
un.onUserAbort
; https://nsis.sourceforge.io/Docs/AppendixE.html#headers
; File Functions Header
Locate
GetSize
DriveSpace
GetDrives
GetTime
GetFileAttributes
GetFileVersion
GetExeName
GetExePath
GetParameters
GetOptions
GetOptionsS
GetRoot
GetParent
GetFileName
GetBaseName
GetFileExt
BannerTrimPath
DirState
RefreshShellIcons
; Text Functions Header
LineFind
LineRead
FileReadFromEnd
LineSum
FileJoin
TextCompare
TextCompareS
ConfigRead
ConfigReadS
ConfigWrite
ConfigWriteS
FileRecode
TrimNewLines
; Word Functions Header
WordFind
WordFindS
WordFind2X
WordFind2XS
WordFind3X
WordFind3XS
WordReplace
WordReplaceS
WordAdd
WordAddS
WordInsert
WordInsertS
StrFilter
StrFilterS
VersionCompare
VersionConvert
;! attributes ===========================================================
; https://nsis.sourceforge.io/Docs/Chapter4.html#instattribs
; General Attributes
AddBrandingImage
AllowRootDirInstall
AutoCloseWindow
BGFont
BGGradient
BrandingText
Caption
ChangeUI
CheckBitmap
CompletedText
ComponentText
CRCCheck
DetailsButtonText
DirText
DirVar
DirVerify
FileErrorText
Icon
InstallButtonText
InstallColors
InstallDir
InstallDirRegKey
InstProgressFlags
InstType
LicenseBkColor
LicenseData
LicenseForceSelection
LicenseText
ManifestDPIAware
ManifestLongPathAware
ManifestSupportedOS
MiscButtonText
Name
OutFile
PEAddResource
PERemoveResource
RequestExecutionLevel
SetFont
ShowInstDetails
ShowUninstDetails
SilentInstall
SilentUnInstall
SpaceTexts
SubCaption
UninstallButtonText
UninstallCaption
UninstallIcon
UninstallSubCaption
UninstallText
WindowIcon
XPStyle
; Compiler Flags
AllowSkipFiles
FileBufSize
SetCompress
SetCompressor
SetCompressorDictSize
SetDatablockOptimize
SetDateSave
SetOverwrite
Unicode
; Version Information
VIAddVersionKey
VIProductVersion
VIFileVersion
| NSIS | 3 | Novodes/notepad2 | tools/lang/NSIS.nsi | [
"MIT"
] |
scriptname _Frost_SwimEvent extends ActiveMagicEffect
import FrostUtil
Event OnEffectStart(Actor akTarget, Actor akCaster)
SendEvent_OnPlayerStartSwimming()
EndEvent
Event OnEffectFinish(Actor akTarget, Actor akCaster)
; Wait to ensure that this is sent last, the Start event
; can send many duplicates.
utility.wait(1.0)
SendEvent_OnPlayerStopSwimming()
EndEvent
GlobalVariable property _Frost_FrigidWater_ForceKillPlayer auto
{This global is deprecated as of Frostfall 3.0.1.}
| Papyrus | 4 | chesko256/Campfire | Scripts/Source/_Frost_SwimEvent.psc | [
"MIT"
] |
.. meta::
:description: Hasura Migration file format reference
:keywords: hasura, docs, migration, file format
.. _migration_file_format:
Migration file format reference
===============================
.. contents:: Table of contents
:backlinks: none
:depth: 1
:local:
Introduction
------------
The ``config V3`` migrations files generated by the CLI are pure SQL files.
.. note::
For ``config v2``, see :ref:`migration_file_format_v2`.
Migration directory format
--------------------------
Each migration is stored inside a directory, which has the following structure:
.. code-block:: bash
<version>_<name>/{up|down}.sql
A ``version`` which is the Unix timestamp in nanoseconds when the migration was
created is the first part of the name of the directory. Followed by a ``name`` which is either manually added
or auto-generated by the console. The files inside this directory indicates what step this is.
``up.sql`` file is supposed to have forward step(s), e.g. creating a table.
The ``down.sql`` file should include the corresponding rollback step.
| reStructuredText | 4 | gh-oss-contributor/graphql-engine-1 | docs/graphql/core/migrations/reference/migration-file-format.rst | [
"Apache-2.0",
"MIT"
] |
APOLLONIUS(CIR1,CIR2,CIR3,S1,S2,S3)
;Circles are passed in as strings with three parts with a "^" separator in the order x^y^r
;The three circles are CIR1, CIR2, and CIR3
;The S1, S2, and S3 parameters determine if the solution will be internally or externally
;tangent to the circle. (+1 external, -1 internal)
;CIRR is the circle returned in the same format as the input circles
;
;Xn, Yn, and Rn are the values for a circle n - following the precedents from the
;other examples because doing $Pieces would make this confusing to read
NEW X1,X2,X3,Y1,Y2,Y3,R1,R2,R3,RS,V11,V12,V13,V14,V21,V22,V23,V24,W12,W13,W14,W22,W23,W24,P,M,N,Q,A,B,C,D
NEW CIRR
SET X1=$PIECE(CIR1,"^",1),X2=$PIECE(CIR2,"^",1),X3=$PIECE(CIR3,"^",1)
SET Y1=$PIECE(CIR1,"^",2),Y2=$PIECE(CIR2,"^",2),Y3=$PIECE(CIR3,"^",2)
SET R1=$PIECE(CIR1,"^",3),R2=$PIECE(CIR2,"^",3),R3=$PIECE(CIR3,"^",3)
SET V11=(2*X2)-(2*X1)
SET V12=(2*Y2)-(2*Y1)
SET V13=(X1*X1)-(X2*X2)+(Y1*Y1)-(Y2*Y2)-(R1*R1)+(R2*R2)
SET V14=(2*S2*R2)-(2*S1*R1)
SET V21=(2*X3)-(2*X2)
SET V22=(2*Y3)-(2*Y2)
SET V23=(X2*X2)-(X3*X3)+(Y2*Y2)-(Y3*Y3)-(R2*R2)+(R3*R3)
SET V24=(2*S3*R3)-(2*S2*R2)
SET W12=V12/V11
SET W13=V13/V11
SET W14=V14/V11
SET W22=(V22/V21)-W12 ;Parentheses for insurance - MUMPS evaluates left to right
SET W23=(V23/V21)-W13
SET W24=(V24/V21)-W14
SET P=-W23/W22
SET Q=W24/W22
SET M=-(W12*P)-W13
SET N=W14-(W12*Q)
SET A=(N*N)+(Q*Q)-1
SET B=(2*M*N)-(2*N*X1)+(2*P*Q)-(2*Q*Y1)+(2*S1*R1)
SET C=(X1*X1)+(M*M)+(2*M*X1)+(P*P)+(Y1*Y1)-(2*P*Y1)-(R1*R1)
SET D=(B*B)-(4*A*C)
SET RS=(-B-(D**.5))/(2*A)
SET $PIECE(CIRR,"^",1)=M+(N*RS)
SET $PIECE(CIRR,"^",2)=P+(Q*RS)
SET $PIECE(CIRR,"^",3)=RS
KILL X1,X2,X3,Y1,Y2,Y3,R1,R2,R3,RS,V11,V12,V13,V14,V21,V22,V23,V24,W12,W13,W14,W22,W23,W24,P,M,N,Q,A,B,C,D
QUIT CIRR
| M | 4 | LaudateCorpus1/RosettaCodeData | Task/Problem-of-Apollonius/MUMPS/problem-of-apollonius.mumps | [
"Info-ZIP"
] |
/* Copyright 2021 The TensorFlow Authors. All Rights Reserved.
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
==============================================================================*/
#ifndef TENSORFLOW_CC_EXPERIMENTAL_LIBTF_IMPL_STRING_H_
#define TENSORFLOW_CC_EXPERIMENTAL_LIBTF_IMPL_STRING_H_
#include <iosfwd>
#include <string>
namespace tf {
namespace libtf {
namespace impl {
/** A string value.
* This class wraps an interned, immutable string value. Currently, interned
* values are never deleted, so memory usage increases without bound as new
* strings are created.
*/
class String final {
public:
/** Interning constructor.
* Interns the given string value.
*/
explicit String(const char* s);
String() : String("") {}
String(const String& s) : value_(s.value_) {}
// This is the same as the default equality operator, which works because
// we're interning all strings. It is specified here so we are explicit about
// it. We're not saying "= default;" because we can't use C++20 features yet.
bool operator==(const String& other) const { return value_ == other.value_; }
const std::string& str() const { return *value_; }
/** Absl hash function. */
template <typename H>
friend H AbslHashValue(H h, const String& s) {
return H::combine(std::move(h), *s.value_);
}
private:
//! The interned string value. This is never null.
const std::string* value_;
};
// This is defined in the `iostream.cc` file in this directory. It is not
// defined inline here because the `iosfwd` header does not provide enough
// functionality (in Windows), and we don't want to include `iostream` to avoid
// increasing the binary size.
std::ostream& operator<<(std::ostream& o, const String& str);
} // namespace impl
} // namespace libtf
} // namespace tf
#endif // TENSORFLOW_CC_EXPERIMENTAL_LIBTF_IMPL_STRING_H_
| C | 5 | EricRemmerswaal/tensorflow | tensorflow/cc/experimental/libtf/impl/string.h | [
"Apache-2.0"
] |
*** Settings ***
Force Tags force1 force2
Suite Setup Pass Execution In Keyword tag1 tag2 -*2
Suite Teardown Pass Execution In Keyword
*** Test Cases ***
Test in suite with valid Pass Execution usage in Suite Setup and Teardown
[Documentation] FAIL Test is run normally.
Fail Test is run normally.
*** Keywords ***
Pass Execution In Keyword
[Arguments] @{tags}
Pass Execution message @{tags}
Fail Not executed
| RobotFramework | 4 | phil-davis/robotframework | atest/testdata/running/pass_execution_in_suite_setup_and_teardown.robot | [
"ECL-2.0",
"Apache-2.0"
] |
#!/usr/bin/env bash
set -e
./y.rs build --sysroot none "$@"
rm -r target/out || true
scripts/tests.sh no_sysroot
./y.rs build "$@"
scripts/tests.sh base_sysroot
scripts/tests.sh extended_sysroot
| Shell | 3 | mbc-git/rust | compiler/rustc_codegen_cranelift/test.sh | [
"ECL-2.0",
"Apache-2.0",
"MIT-0",
"MIT"
] |
% Nisse, 2018-10-26
% Testing that record field are already highlighted by scope checker.
\documentclass{article}
\usepackage{agda}
% This redefinition of AgdaField,
% in combination with the math-only command \bot,
% will fail the LaTeX build if no highlighting
% of fields has been performed.
\renewcommand{\AgdaField}[1]{\ensuremath{#1}}
\usepackage{amsmath}
\usepackage{newunicodechar}
\newunicodechar{₁}{\ensuremath{{}_{\text{1}}}}
\newunicodechar{₂}{\ensuremath{{}_{\text{2}}}}
\newunicodechar{⊥}{\bot}
\pagestyle{empty}
\begin{document}
\begin{code}
record R : Set₂ where
field
⊥ : Set₁
r : R
r = record { ⊥ = Set }
\end{code}
\end{document}
| Literate Agda | 4 | shlevy/agda | test/LaTeXAndHTML/succeed/Issue3322.lagda | [
"BSD-3-Clause"
] |
// Separate test file because `Fn() => bool` isn't getting fixed and rustfix complained that
// even though a fix was applied the code was still incorrect
fn foo() => impl Fn() => bool {
//~^ ERROR return types are denoted using `->`
//~| ERROR expected one of `+`, `->`, `::`, `where`, or `{`, found `=>`
unimplemented!()
}
| Rust | 3 | ohno418/rust | src/test/ui/fn/fn-recover-return-sign2.rs | [
"ECL-2.0",
"Apache-2.0",
"MIT-0",
"MIT"
] |
*** Setting ***
Documentation Testing different ways to write "Setting(s)".
*** Comment ***
This table is accepted and data here ignored.
***SETTINGS***
Default Tags Settings
Library OperatingSystem
***Variable***
${VARIABLE} Variable
*** VARIABLES ***
${VARIABLES} Variables
***Test Case***
Test Case
Log ${VARIABLE}
Keyword
***COMMENTS***
Comment tables are case (and space) insensitive like any other table and
both singular and plural formats are fine.
***COMMENTS***
*** Test Cases ***
Test Cases
Log ${VARIABLES}
Comment tables exist
${content} = Get File ${CURDIR}/table_names.robot
Should Contain ${content} \n*** Comment ***\n
*** Keyword ***
Keyword
Keywords
*keywords
Keywords
Log "Keywords" was executed
* * * K e y w o r d * * *
Keyword
Fail Should not be executed (or even parsed)
| RobotFramework | 3 | phil-davis/robotframework | atest/testdata/parsing/table_names.robot | [
"ECL-2.0",
"Apache-2.0"
] |
-- ==============================================================
-- RTL generated by Vivado(TM) HLS - High-Level Synthesis from C, C++ and OpenCL
-- Version: 2020.2
-- Copyright (C) 1986-2020 Xilinx, Inc. All Rights Reserved.
--
-- ===========================================================
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.numeric_std.all;
entity demosaicing is
port (
ap_clk : IN STD_LOGIC;
ap_rst : IN STD_LOGIC;
ap_start : IN STD_LOGIC;
ap_done : OUT STD_LOGIC;
ap_continue : IN STD_LOGIC;
ap_idle : OUT STD_LOGIC;
ap_ready : OUT STD_LOGIC;
src_mat_rows_dout : IN STD_LOGIC_VECTOR (15 downto 0);
src_mat_rows_empty_n : IN STD_LOGIC;
src_mat_rows_read : OUT STD_LOGIC;
src_mat_cols_dout : IN STD_LOGIC_VECTOR (15 downto 0);
src_mat_cols_empty_n : IN STD_LOGIC;
src_mat_cols_read : OUT STD_LOGIC;
src_mat_data_V_V_dout : IN STD_LOGIC_VECTOR (39 downto 0);
src_mat_data_V_V_empty_n : IN STD_LOGIC;
src_mat_data_V_V_read : OUT STD_LOGIC;
dst_mat_data_V_V_din : OUT STD_LOGIC_VECTOR (119 downto 0);
dst_mat_data_V_V_full_n : IN STD_LOGIC;
dst_mat_data_V_V_write : OUT STD_LOGIC );
end;
architecture behav of demosaicing is
constant ap_const_logic_1 : STD_LOGIC := '1';
constant ap_const_logic_0 : STD_LOGIC := '0';
constant ap_ST_fsm_state1 : STD_LOGIC_VECTOR (8 downto 0) := "000000001";
constant ap_ST_fsm_pp0_stage0 : STD_LOGIC_VECTOR (8 downto 0) := "000000010";
constant ap_ST_fsm_state4 : STD_LOGIC_VECTOR (8 downto 0) := "000000100";
constant ap_ST_fsm_state5 : STD_LOGIC_VECTOR (8 downto 0) := "000001000";
constant ap_ST_fsm_state6 : STD_LOGIC_VECTOR (8 downto 0) := "000010000";
constant ap_ST_fsm_state7 : STD_LOGIC_VECTOR (8 downto 0) := "000100000";
constant ap_ST_fsm_state8 : STD_LOGIC_VECTOR (8 downto 0) := "001000000";
constant ap_ST_fsm_pp2_stage0 : STD_LOGIC_VECTOR (8 downto 0) := "010000000";
constant ap_ST_fsm_state18 : STD_LOGIC_VECTOR (8 downto 0) := "100000000";
constant ap_const_lv32_0 : STD_LOGIC_VECTOR (31 downto 0) := "00000000000000000000000000000000";
constant ap_const_boolean_1 : BOOLEAN := true;
constant ap_const_lv32_1 : STD_LOGIC_VECTOR (31 downto 0) := "00000000000000000000000000000001";
constant ap_const_boolean_0 : BOOLEAN := false;
constant ap_const_lv1_0 : STD_LOGIC_VECTOR (0 downto 0) := "0";
constant ap_const_lv32_7 : STD_LOGIC_VECTOR (31 downto 0) := "00000000000000000000000000000111";
constant ap_const_lv1_1 : STD_LOGIC_VECTOR (0 downto 0) := "1";
constant ap_const_lv32_2 : STD_LOGIC_VECTOR (31 downto 0) := "00000000000000000000000000000010";
constant ap_const_lv32_3 : STD_LOGIC_VECTOR (31 downto 0) := "00000000000000000000000000000011";
constant ap_const_lv32_4 : STD_LOGIC_VECTOR (31 downto 0) := "00000000000000000000000000000100";
constant ap_const_lv32_5 : STD_LOGIC_VECTOR (31 downto 0) := "00000000000000000000000000000101";
constant ap_const_lv32_6 : STD_LOGIC_VECTOR (31 downto 0) := "00000000000000000000000000000110";
constant ap_const_lv32_8 : STD_LOGIC_VECTOR (31 downto 0) := "00000000000000000000000000001000";
constant ap_const_lv15_0 : STD_LOGIC_VECTOR (14 downto 0) := "000000000000000";
constant ap_const_lv2_0 : STD_LOGIC_VECTOR (1 downto 0) := "00";
constant ap_const_lv14_0 : STD_LOGIC_VECTOR (13 downto 0) := "00000000000000";
constant ap_const_lv2_3 : STD_LOGIC_VECTOR (1 downto 0) := "11";
constant ap_const_lv16_0 : STD_LOGIC_VECTOR (15 downto 0) := "0000000000000000";
constant ap_const_lv3_0 : STD_LOGIC_VECTOR (2 downto 0) := "000";
constant ap_const_lv15_1 : STD_LOGIC_VECTOR (14 downto 0) := "000000000000001";
constant ap_const_lv40_0 : STD_LOGIC_VECTOR (39 downto 0) := "0000000000000000000000000000000000000000";
constant ap_const_lv10_0 : STD_LOGIC_VECTOR (9 downto 0) := "0000000000";
constant ap_const_lv4_0 : STD_LOGIC_VECTOR (3 downto 0) := "0000";
constant ap_const_lv4_1 : STD_LOGIC_VECTOR (3 downto 0) := "0001";
constant ap_const_lv4_2 : STD_LOGIC_VECTOR (3 downto 0) := "0010";
constant ap_const_lv4_3 : STD_LOGIC_VECTOR (3 downto 0) := "0011";
constant ap_const_lv64_0 : STD_LOGIC_VECTOR (63 downto 0) := "0000000000000000000000000000000000000000000000000000000000000000";
constant ap_const_lv2_1 : STD_LOGIC_VECTOR (1 downto 0) := "01";
constant ap_const_lv2_2 : STD_LOGIC_VECTOR (1 downto 0) := "10";
constant ap_const_lv32_A : STD_LOGIC_VECTOR (31 downto 0) := "00000000000000000000000000001010";
constant ap_const_lv32_13 : STD_LOGIC_VECTOR (31 downto 0) := "00000000000000000000000000010011";
constant ap_const_lv32_14 : STD_LOGIC_VECTOR (31 downto 0) := "00000000000000000000000000010100";
constant ap_const_lv32_1D : STD_LOGIC_VECTOR (31 downto 0) := "00000000000000000000000000011101";
constant ap_const_lv32_1E : STD_LOGIC_VECTOR (31 downto 0) := "00000000000000000000000000011110";
constant ap_const_lv32_27 : STD_LOGIC_VECTOR (31 downto 0) := "00000000000000000000000000100111";
constant ap_const_lv32_F : STD_LOGIC_VECTOR (31 downto 0) := "00000000000000000000000000001111";
constant ap_const_lv14_1 : STD_LOGIC_VECTOR (13 downto 0) := "00000000000001";
constant ap_const_lv17_1FFFE : STD_LOGIC_VECTOR (16 downto 0) := "11111111111111110";
constant ap_const_lv15_7FFF : STD_LOGIC_VECTOR (14 downto 0) := "111111111111111";
constant ap_const_lv16_1 : STD_LOGIC_VECTOR (15 downto 0) := "0000000000000001";
constant ap_const_lv32_1F : STD_LOGIC_VECTOR (31 downto 0) := "00000000000000000000000000011111";
constant ap_const_lv30_0 : STD_LOGIC_VECTOR (29 downto 0) := "000000000000000000000000000000";
constant ap_const_lv3_4 : STD_LOGIC_VECTOR (2 downto 0) := "100";
constant ap_const_lv3_1 : STD_LOGIC_VECTOR (2 downto 0) := "001";
constant ap_const_lv16_2 : STD_LOGIC_VECTOR (15 downto 0) := "0000000000000010";
constant ap_const_lv16_3 : STD_LOGIC_VECTOR (15 downto 0) := "0000000000000011";
constant ap_const_lv22_0 : STD_LOGIC_VECTOR (21 downto 0) := "0000000000000000000000";
constant ap_const_lv10_3FF : STD_LOGIC_VECTOR (9 downto 0) := "1111111111";
signal ap_done_reg : STD_LOGIC := '0';
signal ap_CS_fsm : STD_LOGIC_VECTOR (8 downto 0) := "000000001";
attribute fsm_encoding : string;
attribute fsm_encoding of ap_CS_fsm : signal is "none";
signal ap_CS_fsm_state1 : STD_LOGIC;
attribute fsm_encoding of ap_CS_fsm_state1 : signal is "none";
signal src_mat_rows_blk_n : STD_LOGIC;
signal src_mat_cols_blk_n : STD_LOGIC;
signal src_mat_data_V_V_blk_n : STD_LOGIC;
signal ap_CS_fsm_pp0_stage0 : STD_LOGIC;
attribute fsm_encoding of ap_CS_fsm_pp0_stage0 : signal is "none";
signal ap_enable_reg_pp0_iter1 : STD_LOGIC := '0';
signal ap_block_pp0_stage0 : BOOLEAN;
signal icmp_ln257_reg_2860 : STD_LOGIC_VECTOR (0 downto 0);
signal ap_CS_fsm_pp2_stage0 : STD_LOGIC;
attribute fsm_encoding of ap_CS_fsm_pp2_stage0 : signal is "none";
signal ap_enable_reg_pp2_iter1 : STD_LOGIC := '0';
signal ap_block_pp2_stage0 : BOOLEAN;
signal icmp_ln335_reg_3117 : STD_LOGIC_VECTOR (0 downto 0);
signal icmp_ln343_reg_3029 : STD_LOGIC_VECTOR (0 downto 0);
signal dst_mat_data_V_V_blk_n : STD_LOGIC;
signal ap_enable_reg_pp2_iter8 : STD_LOGIC := '0';
signal icmp_ln335_reg_3117_pp2_iter7_reg : STD_LOGIC_VECTOR (0 downto 0);
signal indvar_flatten_reg_393 : STD_LOGIC_VECTOR (14 downto 0);
signal i_0_i_reg_404 : STD_LOGIC_VECTOR (1 downto 0);
signal j_0_i_reg_415 : STD_LOGIC_VECTOR (13 downto 0);
signal j10_0_i_reg_655 : STD_LOGIC_VECTOR (13 downto 0);
signal j10_0_i_reg_655_pp2_iter1_reg : STD_LOGIC_VECTOR (13 downto 0);
signal ap_block_state9_pp2_stage0_iter0 : BOOLEAN;
signal ap_predicate_op207_read_state10 : BOOLEAN;
signal ap_block_state10_pp2_stage0_iter1 : BOOLEAN;
signal ap_block_state11_pp2_stage0_iter2 : BOOLEAN;
signal ap_block_state12_pp2_stage0_iter3 : BOOLEAN;
signal ap_block_state13_pp2_stage0_iter4 : BOOLEAN;
signal ap_block_state14_pp2_stage0_iter5 : BOOLEAN;
signal ap_block_state15_pp2_stage0_iter6 : BOOLEAN;
signal ap_block_state16_pp2_stage0_iter7 : BOOLEAN;
signal ap_block_state17_pp2_stage0_iter8 : BOOLEAN;
signal ap_block_pp2_stage0_11001 : BOOLEAN;
signal bram_read_count_0_i_reg_667 : STD_LOGIC_VECTOR (14 downto 0);
signal p_Val2_s_reg_678 : STD_LOGIC_VECTOR (39 downto 0);
signal imgblock_3_5_V_reg_695 : STD_LOGIC_VECTOR (9 downto 0);
signal imgblock_3_4_V_reg_705 : STD_LOGIC_VECTOR (9 downto 0);
signal imgblock_3_3_V_reg_715 : STD_LOGIC_VECTOR (9 downto 0);
signal imgblock_3_2_V_reg_725 : STD_LOGIC_VECTOR (9 downto 0);
signal imgblock_3_1_V_reg_735 : STD_LOGIC_VECTOR (9 downto 0);
signal imgblock_3_0_V_reg_748 : STD_LOGIC_VECTOR (9 downto 0);
signal imgblock_2_5_V_reg_761 : STD_LOGIC_VECTOR (9 downto 0);
signal imgblock_2_4_V_reg_771 : STD_LOGIC_VECTOR (9 downto 0);
signal imgblock_2_3_V_reg_781 : STD_LOGIC_VECTOR (9 downto 0);
signal imgblock_2_2_V_reg_791 : STD_LOGIC_VECTOR (9 downto 0);
signal imgblock_2_1_V_reg_801 : STD_LOGIC_VECTOR (9 downto 0);
signal imgblock_2_0_V_reg_814 : STD_LOGIC_VECTOR (9 downto 0);
signal imgblock_1_5_V_reg_827 : STD_LOGIC_VECTOR (9 downto 0);
signal imgblock_1_4_V_reg_837 : STD_LOGIC_VECTOR (9 downto 0);
signal imgblock_1_3_V_reg_847 : STD_LOGIC_VECTOR (9 downto 0);
signal imgblock_1_2_V_reg_857 : STD_LOGIC_VECTOR (9 downto 0);
signal imgblock_1_1_V_reg_867 : STD_LOGIC_VECTOR (9 downto 0);
signal imgblock_1_0_V_reg_880 : STD_LOGIC_VECTOR (9 downto 0);
signal imgblock_0_5_V_reg_893 : STD_LOGIC_VECTOR (9 downto 0);
signal imgblock_0_4_V_reg_903 : STD_LOGIC_VECTOR (9 downto 0);
signal imgblock_0_3_V_reg_913 : STD_LOGIC_VECTOR (9 downto 0);
signal imgblock_0_2_V_reg_923 : STD_LOGIC_VECTOR (9 downto 0);
signal imgblock_0_1_V_reg_933 : STD_LOGIC_VECTOR (9 downto 0);
signal imgblock_0_0_V_reg_946 : STD_LOGIC_VECTOR (9 downto 0);
signal imgblock_3_9_V_1242_reg_1007 : STD_LOGIC_VECTOR (9 downto 0);
signal imgblock_3_8_V_1241_reg_1020 : STD_LOGIC_VECTOR (9 downto 0);
signal imgblock_3_7_V_1240_reg_1033 : STD_LOGIC_VECTOR (9 downto 0);
signal imgblock_3_6_V_1239_reg_1046 : STD_LOGIC_VECTOR (9 downto 0);
signal imgblock_2_9_V_1236_reg_1059 : STD_LOGIC_VECTOR (9 downto 0);
signal imgblock_2_8_V_1235_reg_1072 : STD_LOGIC_VECTOR (9 downto 0);
signal imgblock_2_7_V_1234_reg_1085 : STD_LOGIC_VECTOR (9 downto 0);
signal imgblock_2_6_V_1233_reg_1098 : STD_LOGIC_VECTOR (9 downto 0);
signal imgblock_1_9_V_1230_reg_1111 : STD_LOGIC_VECTOR (9 downto 0);
signal imgblock_1_8_V_1229_reg_1124 : STD_LOGIC_VECTOR (9 downto 0);
signal imgblock_1_7_V_1228_reg_1137 : STD_LOGIC_VECTOR (9 downto 0);
signal imgblock_1_6_V_1227_reg_1150 : STD_LOGIC_VECTOR (9 downto 0);
signal imgblock_0_9_V_1224_reg_1163 : STD_LOGIC_VECTOR (9 downto 0);
signal imgblock_0_8_V_1223_reg_1176 : STD_LOGIC_VECTOR (9 downto 0);
signal imgblock_0_7_V_1222_reg_1189 : STD_LOGIC_VECTOR (9 downto 0);
signal imgblock_0_6_V_1221_reg_1202 : STD_LOGIC_VECTOR (9 downto 0);
signal src_mat_rows_read_reg_2834 : STD_LOGIC_VECTOR (15 downto 0);
signal ap_block_state1 : BOOLEAN;
signal zext_ln257_fu_1799_p1 : STD_LOGIC_VECTOR (16 downto 0);
signal zext_ln257_reg_2839 : STD_LOGIC_VECTOR (16 downto 0);
signal tmp_34_fu_1803_p4 : STD_LOGIC_VECTOR (13 downto 0);
signal tmp_34_reg_2844 : STD_LOGIC_VECTOR (13 downto 0);
signal zext_ln261_fu_1813_p1 : STD_LOGIC_VECTOR (14 downto 0);
signal zext_ln261_reg_2849 : STD_LOGIC_VECTOR (14 downto 0);
signal tmp_37_fu_1817_p3 : STD_LOGIC_VECTOR (14 downto 0);
signal tmp_37_reg_2855 : STD_LOGIC_VECTOR (14 downto 0);
signal icmp_ln257_fu_1825_p2 : STD_LOGIC_VECTOR (0 downto 0);
signal ap_block_state2_pp0_stage0_iter0 : BOOLEAN;
signal ap_block_state3_pp0_stage0_iter1 : BOOLEAN;
signal ap_block_pp0_stage0_11001 : BOOLEAN;
signal add_ln257_fu_1830_p2 : STD_LOGIC_VECTOR (14 downto 0);
signal ap_enable_reg_pp0_iter0 : STD_LOGIC := '0';
signal select_ln261_1_fu_1855_p3 : STD_LOGIC_VECTOR (1 downto 0);
signal select_ln261_1_reg_2869 : STD_LOGIC_VECTOR (1 downto 0);
signal trunc_ln261_fu_1863_p1 : STD_LOGIC_VECTOR (0 downto 0);
signal trunc_ln261_reg_2874 : STD_LOGIC_VECTOR (0 downto 0);
signal linebuffer_2_V_addr_reg_2878 : STD_LOGIC_VECTOR (9 downto 0);
signal linebuffer_3_V_addr_reg_2883 : STD_LOGIC_VECTOR (9 downto 0);
signal j_fu_1875_p2 : STD_LOGIC_VECTOR (13 downto 0);
signal add_ln277_fu_1881_p2 : STD_LOGIC_VECTOR (14 downto 0);
signal add_ln277_reg_2905 : STD_LOGIC_VECTOR (14 downto 0);
signal ap_CS_fsm_state4 : STD_LOGIC;
attribute fsm_encoding of ap_CS_fsm_state4 : signal is "none";
signal add_ln343_fu_1886_p2 : STD_LOGIC_VECTOR (16 downto 0);
signal add_ln343_reg_2910 : STD_LOGIC_VECTOR (16 downto 0);
signal add_ln363_fu_1891_p2 : STD_LOGIC_VECTOR (14 downto 0);
signal add_ln363_reg_2915 : STD_LOGIC_VECTOR (14 downto 0);
signal zext_ln277_fu_1896_p1 : STD_LOGIC_VECTOR (16 downto 0);
signal zext_ln277_reg_2940 : STD_LOGIC_VECTOR (16 downto 0);
signal ap_CS_fsm_state5 : STD_LOGIC;
attribute fsm_encoding of ap_CS_fsm_state5 : signal is "none";
signal icmp_ln277_fu_1900_p2 : STD_LOGIC_VECTOR (0 downto 0);
signal i_1_fu_1905_p2 : STD_LOGIC_VECTOR (15 downto 0);
signal i_1_reg_2949 : STD_LOGIC_VECTOR (15 downto 0);
signal select_ln283_fu_1927_p3 : STD_LOGIC_VECTOR (31 downto 0);
signal select_ln283_reg_2954 : STD_LOGIC_VECTOR (31 downto 0);
signal select_ln879_1_fu_2013_p3 : STD_LOGIC_VECTOR (1 downto 0);
signal select_ln879_1_reg_2960 : STD_LOGIC_VECTOR (1 downto 0);
signal select_ln879_3_fu_2029_p3 : STD_LOGIC_VECTOR (1 downto 0);
signal select_ln879_3_reg_2966 : STD_LOGIC_VECTOR (1 downto 0);
signal select_ln879_5_fu_2057_p3 : STD_LOGIC_VECTOR (1 downto 0);
signal select_ln879_5_reg_2971 : STD_LOGIC_VECTOR (1 downto 0);
signal select_ln879_6_fu_2069_p3 : STD_LOGIC_VECTOR (1 downto 0);
signal select_ln879_6_reg_2976 : STD_LOGIC_VECTOR (1 downto 0);
signal p_fu_2083_p2 : STD_LOGIC_VECTOR (2 downto 0);
signal ap_CS_fsm_state6 : STD_LOGIC;
attribute fsm_encoding of ap_CS_fsm_state6 : signal is "none";
signal imgblock_0_4_V_2_fu_2089_p10 : STD_LOGIC_VECTOR (9 downto 0);
signal icmp_ln310_fu_2077_p2 : STD_LOGIC_VECTOR (0 downto 0);
signal imgblock_0_5_V_s_fu_2111_p10 : STD_LOGIC_VECTOR (9 downto 0);
signal imgblock_1_4_V_2_fu_2133_p10 : STD_LOGIC_VECTOR (9 downto 0);
signal imgblock_1_5_V_s_fu_2155_p10 : STD_LOGIC_VECTOR (9 downto 0);
signal imgblock_2_4_V_2_fu_2177_p10 : STD_LOGIC_VECTOR (9 downto 0);
signal imgblock_2_5_V_s_fu_2199_p10 : STD_LOGIC_VECTOR (9 downto 0);
signal imgblock_3_4_V_2_fu_2221_p10 : STD_LOGIC_VECTOR (9 downto 0);
signal imgblock_3_5_V_s_fu_2243_p10 : STD_LOGIC_VECTOR (9 downto 0);
signal icmp_ln343_fu_2265_p2 : STD_LOGIC_VECTOR (0 downto 0);
signal ap_CS_fsm_state7 : STD_LOGIC;
attribute fsm_encoding of ap_CS_fsm_state7 : signal is "none";
signal imgblock_0_6_V_fu_2269_p1 : STD_LOGIC_VECTOR (9 downto 0);
signal ap_CS_fsm_state8 : STD_LOGIC;
attribute fsm_encoding of ap_CS_fsm_state8 : signal is "none";
signal imgblock_1_6_V_fu_2273_p1 : STD_LOGIC_VECTOR (9 downto 0);
signal imgblock_2_6_V_fu_2277_p1 : STD_LOGIC_VECTOR (9 downto 0);
signal imgblock_3_6_V_fu_2281_p1 : STD_LOGIC_VECTOR (9 downto 0);
signal trunc_ln321_fu_2285_p1 : STD_LOGIC_VECTOR (1 downto 0);
signal trunc_ln321_reg_3113 : STD_LOGIC_VECTOR (1 downto 0);
signal icmp_ln335_fu_2292_p2 : STD_LOGIC_VECTOR (0 downto 0);
signal icmp_ln335_reg_3117_pp2_iter1_reg : STD_LOGIC_VECTOR (0 downto 0);
signal icmp_ln335_reg_3117_pp2_iter2_reg : STD_LOGIC_VECTOR (0 downto 0);
signal icmp_ln335_reg_3117_pp2_iter3_reg : STD_LOGIC_VECTOR (0 downto 0);
signal icmp_ln335_reg_3117_pp2_iter4_reg : STD_LOGIC_VECTOR (0 downto 0);
signal icmp_ln335_reg_3117_pp2_iter5_reg : STD_LOGIC_VECTOR (0 downto 0);
signal icmp_ln335_reg_3117_pp2_iter6_reg : STD_LOGIC_VECTOR (0 downto 0);
signal j_1_fu_2297_p2 : STD_LOGIC_VECTOR (13 downto 0);
signal j_1_reg_3121 : STD_LOGIC_VECTOR (13 downto 0);
signal ap_enable_reg_pp2_iter0 : STD_LOGIC := '0';
signal icmp_ln363_fu_2303_p2 : STD_LOGIC_VECTOR (0 downto 0);
signal icmp_ln363_reg_3126 : STD_LOGIC_VECTOR (0 downto 0);
signal icmp_ln363_reg_3126_pp2_iter1_reg : STD_LOGIC_VECTOR (0 downto 0);
signal bram_read_count_fu_2316_p2 : STD_LOGIC_VECTOR (14 downto 0);
signal imgblock_4_2_V_fu_2322_p1 : STD_LOGIC_VECTOR (9 downto 0);
signal imgblock_4_2_V_reg_3155 : STD_LOGIC_VECTOR (9 downto 0);
signal imgblock_4_3_V_reg_3164 : STD_LOGIC_VECTOR (9 downto 0);
signal imgblock_4_4_V_reg_3173 : STD_LOGIC_VECTOR (9 downto 0);
signal imgblock_4_9_V_reg_3183 : STD_LOGIC_VECTOR (9 downto 0);
signal imgblock_0_6_V_2_fu_2356_p1 : STD_LOGIC_VECTOR (9 downto 0);
signal imgblock_1_6_V_2_fu_2360_p1 : STD_LOGIC_VECTOR (9 downto 0);
signal imgblock_2_6_V_2_fu_2364_p1 : STD_LOGIC_VECTOR (9 downto 0);
signal imgblock_3_6_V_2_fu_2368_p1 : STD_LOGIC_VECTOR (9 downto 0);
signal shl_ln_fu_2402_p3 : STD_LOGIC_VECTOR (15 downto 0);
signal tmp_144_reg_3309 : STD_LOGIC_VECTOR (21 downto 0);
signal trunc_ln41_fu_2462_p1 : STD_LOGIC_VECTOR (9 downto 0);
signal trunc_ln41_reg_3314 : STD_LOGIC_VECTOR (9 downto 0);
signal tmp_145_reg_3319 : STD_LOGIC_VECTOR (21 downto 0);
signal trunc_ln41_1_fu_2476_p1 : STD_LOGIC_VECTOR (9 downto 0);
signal trunc_ln41_1_reg_3324 : STD_LOGIC_VECTOR (9 downto 0);
signal tmp_146_reg_3329 : STD_LOGIC_VECTOR (21 downto 0);
signal trunc_ln41_2_fu_2490_p1 : STD_LOGIC_VECTOR (9 downto 0);
signal trunc_ln41_2_reg_3334 : STD_LOGIC_VECTOR (9 downto 0);
signal tmp_147_reg_3339 : STD_LOGIC_VECTOR (21 downto 0);
signal trunc_ln41_3_fu_2516_p1 : STD_LOGIC_VECTOR (9 downto 0);
signal trunc_ln41_3_reg_3344 : STD_LOGIC_VECTOR (9 downto 0);
signal tmp_148_reg_3349 : STD_LOGIC_VECTOR (21 downto 0);
signal trunc_ln41_4_fu_2530_p1 : STD_LOGIC_VECTOR (9 downto 0);
signal trunc_ln41_4_reg_3354 : STD_LOGIC_VECTOR (9 downto 0);
signal tmp_149_reg_3359 : STD_LOGIC_VECTOR (21 downto 0);
signal trunc_ln41_5_fu_2544_p1 : STD_LOGIC_VECTOR (9 downto 0);
signal trunc_ln41_5_reg_3364 : STD_LOGIC_VECTOR (9 downto 0);
signal tmp_150_reg_3369 : STD_LOGIC_VECTOR (21 downto 0);
signal trunc_ln41_6_fu_2570_p1 : STD_LOGIC_VECTOR (9 downto 0);
signal trunc_ln41_6_reg_3374 : STD_LOGIC_VECTOR (9 downto 0);
signal tmp_151_reg_3379 : STD_LOGIC_VECTOR (21 downto 0);
signal trunc_ln41_7_fu_2584_p1 : STD_LOGIC_VECTOR (9 downto 0);
signal trunc_ln41_7_reg_3384 : STD_LOGIC_VECTOR (9 downto 0);
signal tmp_152_reg_3389 : STD_LOGIC_VECTOR (21 downto 0);
signal trunc_ln41_8_fu_2598_p1 : STD_LOGIC_VECTOR (9 downto 0);
signal trunc_ln41_8_reg_3394 : STD_LOGIC_VECTOR (9 downto 0);
signal tmp_153_reg_3399 : STD_LOGIC_VECTOR (21 downto 0);
signal trunc_ln41_9_fu_2624_p1 : STD_LOGIC_VECTOR (9 downto 0);
signal trunc_ln41_9_reg_3404 : STD_LOGIC_VECTOR (9 downto 0);
signal tmp_154_reg_3409 : STD_LOGIC_VECTOR (21 downto 0);
signal trunc_ln41_10_fu_2638_p1 : STD_LOGIC_VECTOR (9 downto 0);
signal trunc_ln41_10_reg_3414 : STD_LOGIC_VECTOR (9 downto 0);
signal tmp_155_reg_3419 : STD_LOGIC_VECTOR (21 downto 0);
signal trunc_ln41_11_fu_2652_p1 : STD_LOGIC_VECTOR (9 downto 0);
signal trunc_ln41_11_reg_3424 : STD_LOGIC_VECTOR (9 downto 0);
signal add_ln277_2_fu_2829_p2 : STD_LOGIC_VECTOR (31 downto 0);
signal ap_CS_fsm_state18 : STD_LOGIC;
attribute fsm_encoding of ap_CS_fsm_state18 : signal is "none";
signal ap_block_pp0_stage0_subdone : BOOLEAN;
signal ap_condition_pp0_exit_iter0_state2 : STD_LOGIC;
signal ap_block_pp2_stage0_subdone : BOOLEAN;
signal ap_enable_reg_pp2_iter2 : STD_LOGIC := '0';
signal ap_enable_reg_pp2_iter3 : STD_LOGIC := '0';
signal ap_condition_pp2_exit_iter2_state11 : STD_LOGIC;
signal ap_enable_reg_pp2_iter4 : STD_LOGIC := '0';
signal ap_enable_reg_pp2_iter5 : STD_LOGIC := '0';
signal ap_enable_reg_pp2_iter6 : STD_LOGIC := '0';
signal ap_enable_reg_pp2_iter7 : STD_LOGIC := '0';
signal linebuffer_0_V_address0 : STD_LOGIC_VECTOR (9 downto 0);
signal linebuffer_0_V_ce0 : STD_LOGIC;
signal linebuffer_0_V_we0 : STD_LOGIC;
signal linebuffer_0_V_q0 : STD_LOGIC_VECTOR (39 downto 0);
signal linebuffer_0_V_address1 : STD_LOGIC_VECTOR (9 downto 0);
signal linebuffer_0_V_ce1 : STD_LOGIC;
signal linebuffer_0_V_we1 : STD_LOGIC;
signal linebuffer_1_V_address0 : STD_LOGIC_VECTOR (9 downto 0);
signal linebuffer_1_V_ce0 : STD_LOGIC;
signal linebuffer_1_V_we0 : STD_LOGIC;
signal linebuffer_1_V_q0 : STD_LOGIC_VECTOR (39 downto 0);
signal linebuffer_1_V_address1 : STD_LOGIC_VECTOR (9 downto 0);
signal linebuffer_1_V_ce1 : STD_LOGIC;
signal linebuffer_1_V_we1 : STD_LOGIC;
signal linebuffer_2_V_address0 : STD_LOGIC_VECTOR (9 downto 0);
signal linebuffer_2_V_ce0 : STD_LOGIC;
signal linebuffer_2_V_we0 : STD_LOGIC;
signal linebuffer_2_V_q0 : STD_LOGIC_VECTOR (39 downto 0);
signal linebuffer_2_V_address1 : STD_LOGIC_VECTOR (9 downto 0);
signal linebuffer_2_V_ce1 : STD_LOGIC;
signal linebuffer_2_V_we1 : STD_LOGIC;
signal linebuffer_3_V_address0 : STD_LOGIC_VECTOR (9 downto 0);
signal linebuffer_3_V_ce0 : STD_LOGIC;
signal linebuffer_3_V_we0 : STD_LOGIC;
signal linebuffer_3_V_q0 : STD_LOGIC_VECTOR (39 downto 0);
signal linebuffer_3_V_address1 : STD_LOGIC_VECTOR (9 downto 0);
signal linebuffer_3_V_ce1 : STD_LOGIC;
signal linebuffer_3_V_we1 : STD_LOGIC;
signal grp_Core_Process_fu_1215_ap_return_0 : STD_LOGIC_VECTOR (31 downto 0);
signal grp_Core_Process_fu_1215_ap_return_1 : STD_LOGIC_VECTOR (31 downto 0);
signal grp_Core_Process_fu_1215_ap_return_2 : STD_LOGIC_VECTOR (31 downto 0);
signal grp_Core_Process_fu_1215_ap_ce : STD_LOGIC;
signal ap_block_state9_pp2_stage0_iter0_ignore_call24 : BOOLEAN;
signal ap_block_state10_pp2_stage0_iter1_ignore_call24 : BOOLEAN;
signal ap_block_state11_pp2_stage0_iter2_ignore_call24 : BOOLEAN;
signal ap_block_state12_pp2_stage0_iter3_ignore_call24 : BOOLEAN;
signal ap_block_state13_pp2_stage0_iter4_ignore_call24 : BOOLEAN;
signal ap_block_state14_pp2_stage0_iter5_ignore_call24 : BOOLEAN;
signal ap_block_state15_pp2_stage0_iter6_ignore_call24 : BOOLEAN;
signal ap_block_state16_pp2_stage0_iter7_ignore_call24 : BOOLEAN;
signal ap_block_state17_pp2_stage0_iter8_ignore_call24 : BOOLEAN;
signal ap_block_pp2_stage0_11001_ignoreCallOp313 : BOOLEAN;
signal grp_Core_Process_fu_1318_col : STD_LOGIC_VECTOR (15 downto 0);
signal grp_Core_Process_fu_1318_ap_return_0 : STD_LOGIC_VECTOR (31 downto 0);
signal grp_Core_Process_fu_1318_ap_return_1 : STD_LOGIC_VECTOR (31 downto 0);
signal grp_Core_Process_fu_1318_ap_return_2 : STD_LOGIC_VECTOR (31 downto 0);
signal grp_Core_Process_fu_1318_ap_ce : STD_LOGIC;
signal ap_block_state9_pp2_stage0_iter0_ignore_call41 : BOOLEAN;
signal ap_block_state10_pp2_stage0_iter1_ignore_call41 : BOOLEAN;
signal ap_block_state11_pp2_stage0_iter2_ignore_call41 : BOOLEAN;
signal ap_block_state12_pp2_stage0_iter3_ignore_call41 : BOOLEAN;
signal ap_block_state13_pp2_stage0_iter4_ignore_call41 : BOOLEAN;
signal ap_block_state14_pp2_stage0_iter5_ignore_call41 : BOOLEAN;
signal ap_block_state15_pp2_stage0_iter6_ignore_call41 : BOOLEAN;
signal ap_block_state16_pp2_stage0_iter7_ignore_call41 : BOOLEAN;
signal ap_block_state17_pp2_stage0_iter8_ignore_call41 : BOOLEAN;
signal ap_block_pp2_stage0_11001_ignoreCallOp315 : BOOLEAN;
signal grp_Core_Process_fu_1421_col : STD_LOGIC_VECTOR (15 downto 0);
signal grp_Core_Process_fu_1421_ap_return_0 : STD_LOGIC_VECTOR (31 downto 0);
signal grp_Core_Process_fu_1421_ap_return_1 : STD_LOGIC_VECTOR (31 downto 0);
signal grp_Core_Process_fu_1421_ap_return_2 : STD_LOGIC_VECTOR (31 downto 0);
signal grp_Core_Process_fu_1421_ap_ce : STD_LOGIC;
signal ap_block_state9_pp2_stage0_iter0_ignore_call58 : BOOLEAN;
signal ap_block_state10_pp2_stage0_iter1_ignore_call58 : BOOLEAN;
signal ap_block_state11_pp2_stage0_iter2_ignore_call58 : BOOLEAN;
signal ap_block_state12_pp2_stage0_iter3_ignore_call58 : BOOLEAN;
signal ap_block_state13_pp2_stage0_iter4_ignore_call58 : BOOLEAN;
signal ap_block_state14_pp2_stage0_iter5_ignore_call58 : BOOLEAN;
signal ap_block_state15_pp2_stage0_iter6_ignore_call58 : BOOLEAN;
signal ap_block_state16_pp2_stage0_iter7_ignore_call58 : BOOLEAN;
signal ap_block_state17_pp2_stage0_iter8_ignore_call58 : BOOLEAN;
signal ap_block_pp2_stage0_11001_ignoreCallOp317 : BOOLEAN;
signal grp_Core_Process_fu_1524_col : STD_LOGIC_VECTOR (15 downto 0);
signal grp_Core_Process_fu_1524_ap_return_0 : STD_LOGIC_VECTOR (31 downto 0);
signal grp_Core_Process_fu_1524_ap_return_1 : STD_LOGIC_VECTOR (31 downto 0);
signal grp_Core_Process_fu_1524_ap_return_2 : STD_LOGIC_VECTOR (31 downto 0);
signal grp_Core_Process_fu_1524_ap_ce : STD_LOGIC;
signal ap_block_state9_pp2_stage0_iter0_ignore_call75 : BOOLEAN;
signal ap_block_state10_pp2_stage0_iter1_ignore_call75 : BOOLEAN;
signal ap_block_state11_pp2_stage0_iter2_ignore_call75 : BOOLEAN;
signal ap_block_state12_pp2_stage0_iter3_ignore_call75 : BOOLEAN;
signal ap_block_state13_pp2_stage0_iter4_ignore_call75 : BOOLEAN;
signal ap_block_state14_pp2_stage0_iter5_ignore_call75 : BOOLEAN;
signal ap_block_state15_pp2_stage0_iter6_ignore_call75 : BOOLEAN;
signal ap_block_state16_pp2_stage0_iter7_ignore_call75 : BOOLEAN;
signal ap_block_state17_pp2_stage0_iter8_ignore_call75 : BOOLEAN;
signal ap_block_pp2_stage0_11001_ignoreCallOp319 : BOOLEAN;
signal ap_phi_mux_i_0_i_phi_fu_408_p4 : STD_LOGIC_VECTOR (1 downto 0);
signal imgblock_3_5_V_0_reg_426 : STD_LOGIC_VECTOR (9 downto 0);
signal imgblock_3_4_V_0_reg_438 : STD_LOGIC_VECTOR (9 downto 0);
signal imgblock_2_5_V_0_reg_450 : STD_LOGIC_VECTOR (9 downto 0);
signal imgblock_2_4_V_0_reg_462 : STD_LOGIC_VECTOR (9 downto 0);
signal imgblock_1_5_V_0_reg_474 : STD_LOGIC_VECTOR (9 downto 0);
signal imgblock_1_4_V_0_reg_486 : STD_LOGIC_VECTOR (9 downto 0);
signal imgblock_0_5_V_0_reg_498 : STD_LOGIC_VECTOR (9 downto 0);
signal imgblock_0_4_V_0_reg_510 : STD_LOGIC_VECTOR (9 downto 0);
signal p_0491_0_i_reg_522 : STD_LOGIC_VECTOR (1 downto 0);
signal lineStore_reg_533 : STD_LOGIC_VECTOR (31 downto 0);
signal i9_0_i_reg_544 : STD_LOGIC_VECTOR (15 downto 0);
signal imgblock_3_5_V_1_reg_556 : STD_LOGIC_VECTOR (9 downto 0);
signal imgblock_3_4_V_1237_reg_567 : STD_LOGIC_VECTOR (9 downto 0);
signal imgblock_2_5_V_1_reg_578 : STD_LOGIC_VECTOR (9 downto 0);
signal imgblock_2_4_V_1231_reg_589 : STD_LOGIC_VECTOR (9 downto 0);
signal imgblock_1_5_V_1_reg_600 : STD_LOGIC_VECTOR (9 downto 0);
signal imgblock_1_4_V_1225_reg_611 : STD_LOGIC_VECTOR (9 downto 0);
signal imgblock_0_5_V_1_reg_622 : STD_LOGIC_VECTOR (9 downto 0);
signal imgblock_0_4_V_1219_reg_633 : STD_LOGIC_VECTOR (9 downto 0);
signal p_0_i_reg_644 : STD_LOGIC_VECTOR (2 downto 0);
signal ap_phi_mux_j10_0_i_phi_fu_659_p4 : STD_LOGIC_VECTOR (13 downto 0);
signal ap_phi_mux_p_Val2_s_phi_fu_686_p4 : STD_LOGIC_VECTOR (39 downto 0);
signal ap_phi_reg_pp2_iter1_p_Val2_s_reg_678 : STD_LOGIC_VECTOR (39 downto 0);
signal ap_phi_reg_pp2_iter0_p_Val2_s_reg_678 : STD_LOGIC_VECTOR (39 downto 0);
signal ap_phi_mux_imgblock_3_5_V_phi_fu_698_p4 : STD_LOGIC_VECTOR (9 downto 0);
signal ap_phi_mux_imgblock_3_4_V_phi_fu_708_p4 : STD_LOGIC_VECTOR (9 downto 0);
signal ap_phi_mux_imgblock_3_3_V_phi_fu_718_p4 : STD_LOGIC_VECTOR (9 downto 0);
signal ap_phi_mux_imgblock_3_2_V_phi_fu_728_p4 : STD_LOGIC_VECTOR (9 downto 0);
signal ap_phi_mux_imgblock_3_1_V_phi_fu_739_p4 : STD_LOGIC_VECTOR (9 downto 0);
signal ap_phi_mux_imgblock_3_0_V_phi_fu_752_p4 : STD_LOGIC_VECTOR (9 downto 0);
signal ap_phi_mux_imgblock_2_5_V_phi_fu_764_p4 : STD_LOGIC_VECTOR (9 downto 0);
signal ap_phi_mux_imgblock_2_4_V_phi_fu_774_p4 : STD_LOGIC_VECTOR (9 downto 0);
signal ap_phi_mux_imgblock_2_3_V_phi_fu_784_p4 : STD_LOGIC_VECTOR (9 downto 0);
signal ap_phi_mux_imgblock_2_2_V_phi_fu_794_p4 : STD_LOGIC_VECTOR (9 downto 0);
signal ap_phi_mux_imgblock_2_1_V_phi_fu_805_p4 : STD_LOGIC_VECTOR (9 downto 0);
signal ap_phi_mux_imgblock_2_0_V_phi_fu_818_p4 : STD_LOGIC_VECTOR (9 downto 0);
signal ap_phi_mux_imgblock_1_5_V_phi_fu_830_p4 : STD_LOGIC_VECTOR (9 downto 0);
signal ap_phi_mux_imgblock_1_4_V_phi_fu_840_p4 : STD_LOGIC_VECTOR (9 downto 0);
signal ap_phi_mux_imgblock_1_3_V_phi_fu_850_p4 : STD_LOGIC_VECTOR (9 downto 0);
signal ap_phi_mux_imgblock_1_2_V_phi_fu_860_p4 : STD_LOGIC_VECTOR (9 downto 0);
signal ap_phi_mux_imgblock_1_1_V_phi_fu_871_p4 : STD_LOGIC_VECTOR (9 downto 0);
signal ap_phi_mux_imgblock_1_0_V_phi_fu_884_p4 : STD_LOGIC_VECTOR (9 downto 0);
signal ap_phi_mux_imgblock_0_5_V_phi_fu_896_p4 : STD_LOGIC_VECTOR (9 downto 0);
signal ap_phi_mux_imgblock_0_4_V_phi_fu_906_p4 : STD_LOGIC_VECTOR (9 downto 0);
signal ap_phi_mux_imgblock_0_3_V_phi_fu_916_p4 : STD_LOGIC_VECTOR (9 downto 0);
signal ap_phi_mux_imgblock_0_2_V_phi_fu_926_p4 : STD_LOGIC_VECTOR (9 downto 0);
signal ap_phi_mux_imgblock_0_1_V_phi_fu_937_p4 : STD_LOGIC_VECTOR (9 downto 0);
signal ap_phi_mux_imgblock_0_0_V_phi_fu_950_p4 : STD_LOGIC_VECTOR (9 downto 0);
signal ap_phi_reg_pp2_iter0_imgblock_4_6_V_0_reg_959 : STD_LOGIC_VECTOR (9 downto 0);
signal ap_phi_reg_pp2_iter1_imgblock_4_6_V_0_reg_959 : STD_LOGIC_VECTOR (9 downto 0);
signal ap_phi_reg_pp2_iter2_imgblock_4_6_V_0_reg_959 : STD_LOGIC_VECTOR (9 downto 0);
signal ap_phi_reg_pp2_iter0_imgblock_4_7_V_0_reg_971 : STD_LOGIC_VECTOR (9 downto 0);
signal ap_phi_reg_pp2_iter1_imgblock_4_7_V_0_reg_971 : STD_LOGIC_VECTOR (9 downto 0);
signal ap_phi_reg_pp2_iter2_imgblock_4_7_V_0_reg_971 : STD_LOGIC_VECTOR (9 downto 0);
signal ap_phi_reg_pp2_iter0_imgblock_4_8_V_0_reg_983 : STD_LOGIC_VECTOR (9 downto 0);
signal ap_phi_reg_pp2_iter1_imgblock_4_8_V_0_reg_983 : STD_LOGIC_VECTOR (9 downto 0);
signal ap_phi_reg_pp2_iter2_imgblock_4_8_V_0_reg_983 : STD_LOGIC_VECTOR (9 downto 0);
signal ap_phi_reg_pp2_iter0_imgblock_4_9_V_0_reg_995 : STD_LOGIC_VECTOR (9 downto 0);
signal ap_phi_reg_pp2_iter1_imgblock_4_9_V_0_reg_995 : STD_LOGIC_VECTOR (9 downto 0);
signal ap_phi_reg_pp2_iter2_imgblock_4_9_V_0_reg_995 : STD_LOGIC_VECTOR (9 downto 0);
signal ap_phi_reg_pp2_iter0_imgblock_3_9_V_1242_reg_1007 : STD_LOGIC_VECTOR (9 downto 0);
signal ap_phi_reg_pp2_iter1_imgblock_3_9_V_1242_reg_1007 : STD_LOGIC_VECTOR (9 downto 0);
signal ap_phi_reg_pp2_iter2_imgblock_3_9_V_1242_reg_1007 : STD_LOGIC_VECTOR (9 downto 0);
signal ap_phi_reg_pp2_iter0_imgblock_3_8_V_1241_reg_1020 : STD_LOGIC_VECTOR (9 downto 0);
signal ap_phi_reg_pp2_iter1_imgblock_3_8_V_1241_reg_1020 : STD_LOGIC_VECTOR (9 downto 0);
signal ap_phi_reg_pp2_iter2_imgblock_3_8_V_1241_reg_1020 : STD_LOGIC_VECTOR (9 downto 0);
signal ap_phi_reg_pp2_iter0_imgblock_3_7_V_1240_reg_1033 : STD_LOGIC_VECTOR (9 downto 0);
signal ap_phi_reg_pp2_iter1_imgblock_3_7_V_1240_reg_1033 : STD_LOGIC_VECTOR (9 downto 0);
signal ap_phi_reg_pp2_iter2_imgblock_3_7_V_1240_reg_1033 : STD_LOGIC_VECTOR (9 downto 0);
signal ap_phi_reg_pp2_iter0_imgblock_3_6_V_1239_reg_1046 : STD_LOGIC_VECTOR (9 downto 0);
signal ap_phi_reg_pp2_iter1_imgblock_3_6_V_1239_reg_1046 : STD_LOGIC_VECTOR (9 downto 0);
signal ap_phi_reg_pp2_iter2_imgblock_3_6_V_1239_reg_1046 : STD_LOGIC_VECTOR (9 downto 0);
signal ap_phi_reg_pp2_iter0_imgblock_2_9_V_1236_reg_1059 : STD_LOGIC_VECTOR (9 downto 0);
signal ap_phi_reg_pp2_iter1_imgblock_2_9_V_1236_reg_1059 : STD_LOGIC_VECTOR (9 downto 0);
signal ap_phi_reg_pp2_iter2_imgblock_2_9_V_1236_reg_1059 : STD_LOGIC_VECTOR (9 downto 0);
signal ap_phi_reg_pp2_iter0_imgblock_2_8_V_1235_reg_1072 : STD_LOGIC_VECTOR (9 downto 0);
signal ap_phi_reg_pp2_iter1_imgblock_2_8_V_1235_reg_1072 : STD_LOGIC_VECTOR (9 downto 0);
signal ap_phi_reg_pp2_iter2_imgblock_2_8_V_1235_reg_1072 : STD_LOGIC_VECTOR (9 downto 0);
signal ap_phi_reg_pp2_iter0_imgblock_2_7_V_1234_reg_1085 : STD_LOGIC_VECTOR (9 downto 0);
signal ap_phi_reg_pp2_iter1_imgblock_2_7_V_1234_reg_1085 : STD_LOGIC_VECTOR (9 downto 0);
signal ap_phi_reg_pp2_iter2_imgblock_2_7_V_1234_reg_1085 : STD_LOGIC_VECTOR (9 downto 0);
signal ap_phi_reg_pp2_iter0_imgblock_2_6_V_1233_reg_1098 : STD_LOGIC_VECTOR (9 downto 0);
signal ap_phi_reg_pp2_iter1_imgblock_2_6_V_1233_reg_1098 : STD_LOGIC_VECTOR (9 downto 0);
signal ap_phi_reg_pp2_iter2_imgblock_2_6_V_1233_reg_1098 : STD_LOGIC_VECTOR (9 downto 0);
signal ap_phi_reg_pp2_iter0_imgblock_1_9_V_1230_reg_1111 : STD_LOGIC_VECTOR (9 downto 0);
signal ap_phi_reg_pp2_iter1_imgblock_1_9_V_1230_reg_1111 : STD_LOGIC_VECTOR (9 downto 0);
signal ap_phi_reg_pp2_iter2_imgblock_1_9_V_1230_reg_1111 : STD_LOGIC_VECTOR (9 downto 0);
signal ap_phi_reg_pp2_iter0_imgblock_1_8_V_1229_reg_1124 : STD_LOGIC_VECTOR (9 downto 0);
signal ap_phi_reg_pp2_iter1_imgblock_1_8_V_1229_reg_1124 : STD_LOGIC_VECTOR (9 downto 0);
signal ap_phi_reg_pp2_iter2_imgblock_1_8_V_1229_reg_1124 : STD_LOGIC_VECTOR (9 downto 0);
signal ap_phi_reg_pp2_iter0_imgblock_1_7_V_1228_reg_1137 : STD_LOGIC_VECTOR (9 downto 0);
signal ap_phi_reg_pp2_iter1_imgblock_1_7_V_1228_reg_1137 : STD_LOGIC_VECTOR (9 downto 0);
signal ap_phi_reg_pp2_iter2_imgblock_1_7_V_1228_reg_1137 : STD_LOGIC_VECTOR (9 downto 0);
signal ap_phi_reg_pp2_iter0_imgblock_1_6_V_1227_reg_1150 : STD_LOGIC_VECTOR (9 downto 0);
signal ap_phi_reg_pp2_iter1_imgblock_1_6_V_1227_reg_1150 : STD_LOGIC_VECTOR (9 downto 0);
signal ap_phi_reg_pp2_iter2_imgblock_1_6_V_1227_reg_1150 : STD_LOGIC_VECTOR (9 downto 0);
signal ap_phi_reg_pp2_iter0_imgblock_0_9_V_1224_reg_1163 : STD_LOGIC_VECTOR (9 downto 0);
signal ap_phi_reg_pp2_iter1_imgblock_0_9_V_1224_reg_1163 : STD_LOGIC_VECTOR (9 downto 0);
signal ap_phi_reg_pp2_iter2_imgblock_0_9_V_1224_reg_1163 : STD_LOGIC_VECTOR (9 downto 0);
signal ap_phi_reg_pp2_iter0_imgblock_0_8_V_1223_reg_1176 : STD_LOGIC_VECTOR (9 downto 0);
signal ap_phi_reg_pp2_iter1_imgblock_0_8_V_1223_reg_1176 : STD_LOGIC_VECTOR (9 downto 0);
signal ap_phi_reg_pp2_iter2_imgblock_0_8_V_1223_reg_1176 : STD_LOGIC_VECTOR (9 downto 0);
signal ap_phi_reg_pp2_iter0_imgblock_0_7_V_1222_reg_1189 : STD_LOGIC_VECTOR (9 downto 0);
signal ap_phi_reg_pp2_iter1_imgblock_0_7_V_1222_reg_1189 : STD_LOGIC_VECTOR (9 downto 0);
signal ap_phi_reg_pp2_iter2_imgblock_0_7_V_1222_reg_1189 : STD_LOGIC_VECTOR (9 downto 0);
signal ap_phi_reg_pp2_iter0_imgblock_0_6_V_1221_reg_1202 : STD_LOGIC_VECTOR (9 downto 0);
signal ap_phi_reg_pp2_iter1_imgblock_0_6_V_1221_reg_1202 : STD_LOGIC_VECTOR (9 downto 0);
signal ap_phi_reg_pp2_iter2_imgblock_0_6_V_1221_reg_1202 : STD_LOGIC_VECTOR (9 downto 0);
signal zext_ln267_fu_1867_p1 : STD_LOGIC_VECTOR (63 downto 0);
signal zext_ln366_fu_2308_p1 : STD_LOGIC_VECTOR (63 downto 0);
signal zext_ln386_fu_2372_p1 : STD_LOGIC_VECTOR (63 downto 0);
signal zext_ln379_fu_2380_p1 : STD_LOGIC_VECTOR (63 downto 0);
signal imgblock_4_0_V_fu_182 : STD_LOGIC_VECTOR (9 downto 0);
signal imgblock_4_1_V_fu_186 : STD_LOGIC_VECTOR (9 downto 0);
signal ap_block_pp2_stage0_01001 : BOOLEAN;
signal grp_fu_1627_p6 : STD_LOGIC_VECTOR (39 downto 0);
signal grp_fu_1640_p6 : STD_LOGIC_VECTOR (39 downto 0);
signal grp_fu_1653_p6 : STD_LOGIC_VECTOR (39 downto 0);
signal grp_fu_1666_p6 : STD_LOGIC_VECTOR (39 downto 0);
signal icmp_ln261_fu_1842_p2 : STD_LOGIC_VECTOR (0 downto 0);
signal i_fu_1836_p2 : STD_LOGIC_VECTOR (1 downto 0);
signal select_ln261_fu_1847_p3 : STD_LOGIC_VECTOR (13 downto 0);
signal tmp_143_fu_1911_p4 : STD_LOGIC_VECTOR (29 downto 0);
signal icmp_ln283_fu_1921_p2 : STD_LOGIC_VECTOR (0 downto 0);
signal icmp_ln879_2_fu_1947_p2 : STD_LOGIC_VECTOR (0 downto 0);
signal xor_ln296_fu_1961_p2 : STD_LOGIC_VECTOR (0 downto 0);
signal icmp_ln879_fu_1935_p2 : STD_LOGIC_VECTOR (0 downto 0);
signal icmp_ln879_1_fu_1941_p2 : STD_LOGIC_VECTOR (0 downto 0);
signal xor_ln879_fu_1987_p2 : STD_LOGIC_VECTOR (0 downto 0);
signal and_ln879_fu_1993_p2 : STD_LOGIC_VECTOR (0 downto 0);
signal or_ln879_fu_2007_p2 : STD_LOGIC_VECTOR (0 downto 0);
signal select_ln879_fu_1999_p3 : STD_LOGIC_VECTOR (1 downto 0);
signal select_ln296_2_fu_1953_p3 : STD_LOGIC_VECTOR (1 downto 0);
signal select_ln879_2_fu_2021_p3 : STD_LOGIC_VECTOR (1 downto 0);
signal zext_ln296_fu_1967_p1 : STD_LOGIC_VECTOR (1 downto 0);
signal xor_ln879_1_fu_2037_p2 : STD_LOGIC_VECTOR (0 downto 0);
signal or_ln879_1_fu_2043_p2 : STD_LOGIC_VECTOR (0 downto 0);
signal select_ln879_4_fu_2049_p3 : STD_LOGIC_VECTOR (1 downto 0);
signal select_ln296_fu_1971_p3 : STD_LOGIC_VECTOR (1 downto 0);
signal zext_ln879_fu_2065_p1 : STD_LOGIC_VECTOR (1 downto 0);
signal select_ln296_1_fu_1979_p3 : STD_LOGIC_VECTOR (1 downto 0);
signal zext_ln335_fu_2288_p1 : STD_LOGIC_VECTOR (14 downto 0);
signal icmp_ln41_fu_2656_p2 : STD_LOGIC_VECTOR (0 downto 0);
signal icmp_ln41_1_fu_2668_p2 : STD_LOGIC_VECTOR (0 downto 0);
signal icmp_ln41_2_fu_2680_p2 : STD_LOGIC_VECTOR (0 downto 0);
signal icmp_ln41_3_fu_2692_p2 : STD_LOGIC_VECTOR (0 downto 0);
signal icmp_ln41_4_fu_2704_p2 : STD_LOGIC_VECTOR (0 downto 0);
signal icmp_ln41_5_fu_2716_p2 : STD_LOGIC_VECTOR (0 downto 0);
signal icmp_ln41_6_fu_2728_p2 : STD_LOGIC_VECTOR (0 downto 0);
signal icmp_ln41_7_fu_2740_p2 : STD_LOGIC_VECTOR (0 downto 0);
signal icmp_ln41_8_fu_2752_p2 : STD_LOGIC_VECTOR (0 downto 0);
signal icmp_ln41_9_fu_2764_p2 : STD_LOGIC_VECTOR (0 downto 0);
signal icmp_ln41_10_fu_2776_p2 : STD_LOGIC_VECTOR (0 downto 0);
signal icmp_ln41_11_fu_2788_p2 : STD_LOGIC_VECTOR (0 downto 0);
signal select_ln41_11_fu_2793_p3 : STD_LOGIC_VECTOR (9 downto 0);
signal select_ln41_10_fu_2781_p3 : STD_LOGIC_VECTOR (9 downto 0);
signal select_ln41_9_fu_2769_p3 : STD_LOGIC_VECTOR (9 downto 0);
signal select_ln41_8_fu_2757_p3 : STD_LOGIC_VECTOR (9 downto 0);
signal select_ln41_7_fu_2745_p3 : STD_LOGIC_VECTOR (9 downto 0);
signal select_ln41_6_fu_2733_p3 : STD_LOGIC_VECTOR (9 downto 0);
signal select_ln41_5_fu_2721_p3 : STD_LOGIC_VECTOR (9 downto 0);
signal select_ln41_4_fu_2709_p3 : STD_LOGIC_VECTOR (9 downto 0);
signal select_ln41_3_fu_2697_p3 : STD_LOGIC_VECTOR (9 downto 0);
signal select_ln41_2_fu_2685_p3 : STD_LOGIC_VECTOR (9 downto 0);
signal select_ln41_1_fu_2673_p3 : STD_LOGIC_VECTOR (9 downto 0);
signal select_ln41_fu_2661_p3 : STD_LOGIC_VECTOR (9 downto 0);
signal ap_NS_fsm : STD_LOGIC_VECTOR (8 downto 0);
signal ap_block_pp0 : BOOLEAN;
signal ap_block_pp2 : BOOLEAN;
signal ap_predicate_op198_load_state9 : BOOLEAN;
signal ap_enable_operation_198 : BOOLEAN;
signal ap_enable_state9_pp2_iter0_stage0 : BOOLEAN;
signal ap_predicate_op214_load_state10 : BOOLEAN;
signal ap_enable_operation_214 : BOOLEAN;
signal ap_enable_state10_pp2_iter1_stage0 : BOOLEAN;
signal ap_predicate_op273_store_state11 : BOOLEAN;
signal ap_enable_operation_273 : BOOLEAN;
signal ap_enable_state11_pp2_iter2_stage0 : BOOLEAN;
signal ap_predicate_op286_store_state11 : BOOLEAN;
signal ap_enable_operation_286 : BOOLEAN;
signal ap_predicate_op200_load_state9 : BOOLEAN;
signal ap_enable_operation_200 : BOOLEAN;
signal ap_predicate_op215_load_state10 : BOOLEAN;
signal ap_enable_operation_215 : BOOLEAN;
signal ap_predicate_op271_store_state11 : BOOLEAN;
signal ap_enable_operation_271 : BOOLEAN;
signal ap_predicate_op284_store_state11 : BOOLEAN;
signal ap_enable_operation_284 : BOOLEAN;
signal ap_predicate_op202_load_state9 : BOOLEAN;
signal ap_enable_operation_202 : BOOLEAN;
signal ap_predicate_op216_load_state10 : BOOLEAN;
signal ap_enable_operation_216 : BOOLEAN;
signal ap_predicate_op269_store_state11 : BOOLEAN;
signal ap_enable_operation_269 : BOOLEAN;
signal ap_predicate_op282_store_state11 : BOOLEAN;
signal ap_enable_operation_282 : BOOLEAN;
signal ap_predicate_op204_load_state9 : BOOLEAN;
signal ap_enable_operation_204 : BOOLEAN;
signal ap_predicate_op217_load_state10 : BOOLEAN;
signal ap_enable_operation_217 : BOOLEAN;
signal ap_predicate_op275_store_state11 : BOOLEAN;
signal ap_enable_operation_275 : BOOLEAN;
signal ap_predicate_op288_store_state11 : BOOLEAN;
signal ap_enable_operation_288 : BOOLEAN;
signal ap_idle_pp0 : STD_LOGIC;
signal ap_enable_pp0 : STD_LOGIC;
signal ap_idle_pp2 : STD_LOGIC;
signal ap_enable_pp2 : STD_LOGIC;
signal ap_condition_568 : BOOLEAN;
signal ap_condition_640 : BOOLEAN;
signal ap_condition_2223 : BOOLEAN;
signal ap_condition_2226 : BOOLEAN;
signal ap_condition_2229 : BOOLEAN;
signal ap_condition_2232 : BOOLEAN;
component Core_Process IS
port (
ap_clk : IN STD_LOGIC;
ap_rst : IN STD_LOGIC;
imgblock_0_0_V_read : IN STD_LOGIC_VECTOR (9 downto 0);
imgblock_0_1_V_read : IN STD_LOGIC_VECTOR (9 downto 0);
imgblock_0_2_V_read : IN STD_LOGIC_VECTOR (9 downto 0);
imgblock_0_3_V_read : IN STD_LOGIC_VECTOR (9 downto 0);
imgblock_0_4_V_read : IN STD_LOGIC_VECTOR (9 downto 0);
imgblock_0_5_V_read : IN STD_LOGIC_VECTOR (9 downto 0);
imgblock_0_6_V_read : IN STD_LOGIC_VECTOR (9 downto 0);
imgblock_0_7_V_read : IN STD_LOGIC_VECTOR (9 downto 0);
imgblock_0_8_V_read : IN STD_LOGIC_VECTOR (9 downto 0);
imgblock_0_9_V_read : IN STD_LOGIC_VECTOR (9 downto 0);
imgblock_1_0_V_read : IN STD_LOGIC_VECTOR (9 downto 0);
imgblock_1_1_V_read : IN STD_LOGIC_VECTOR (9 downto 0);
imgblock_1_2_V_read : IN STD_LOGIC_VECTOR (9 downto 0);
imgblock_1_3_V_read : IN STD_LOGIC_VECTOR (9 downto 0);
imgblock_1_4_V_read : IN STD_LOGIC_VECTOR (9 downto 0);
imgblock_1_5_V_read : IN STD_LOGIC_VECTOR (9 downto 0);
imgblock_1_6_V_read : IN STD_LOGIC_VECTOR (9 downto 0);
imgblock_1_7_V_read : IN STD_LOGIC_VECTOR (9 downto 0);
imgblock_1_8_V_read : IN STD_LOGIC_VECTOR (9 downto 0);
imgblock_1_9_V_read : IN STD_LOGIC_VECTOR (9 downto 0);
imgblock_2_0_V_read : IN STD_LOGIC_VECTOR (9 downto 0);
imgblock_2_1_V_read : IN STD_LOGIC_VECTOR (9 downto 0);
imgblock_2_2_V_read : IN STD_LOGIC_VECTOR (9 downto 0);
imgblock_2_3_V_read : IN STD_LOGIC_VECTOR (9 downto 0);
imgblock_2_4_V_read : IN STD_LOGIC_VECTOR (9 downto 0);
imgblock_2_5_V_read : IN STD_LOGIC_VECTOR (9 downto 0);
imgblock_2_6_V_read : IN STD_LOGIC_VECTOR (9 downto 0);
imgblock_2_7_V_read : IN STD_LOGIC_VECTOR (9 downto 0);
imgblock_2_8_V_read : IN STD_LOGIC_VECTOR (9 downto 0);
imgblock_2_9_V_read : IN STD_LOGIC_VECTOR (9 downto 0);
imgblock_3_0_V_read : IN STD_LOGIC_VECTOR (9 downto 0);
imgblock_3_1_V_read : IN STD_LOGIC_VECTOR (9 downto 0);
imgblock_3_2_V_read : IN STD_LOGIC_VECTOR (9 downto 0);
imgblock_3_3_V_read : IN STD_LOGIC_VECTOR (9 downto 0);
imgblock_3_4_V_read : IN STD_LOGIC_VECTOR (9 downto 0);
imgblock_3_5_V_read : IN STD_LOGIC_VECTOR (9 downto 0);
imgblock_3_6_V_read : IN STD_LOGIC_VECTOR (9 downto 0);
imgblock_3_7_V_read : IN STD_LOGIC_VECTOR (9 downto 0);
imgblock_3_8_V_read : IN STD_LOGIC_VECTOR (9 downto 0);
imgblock_3_9_V_read : IN STD_LOGIC_VECTOR (9 downto 0);
imgblock_4_0_V_read : IN STD_LOGIC_VECTOR (9 downto 0);
imgblock_4_1_V_read : IN STD_LOGIC_VECTOR (9 downto 0);
imgblock_4_2_V_read : IN STD_LOGIC_VECTOR (9 downto 0);
imgblock_4_3_V_read : IN STD_LOGIC_VECTOR (9 downto 0);
imgblock_4_4_V_read : IN STD_LOGIC_VECTOR (9 downto 0);
imgblock_4_5_V_read : IN STD_LOGIC_VECTOR (9 downto 0);
imgblock_4_6_V_read : IN STD_LOGIC_VECTOR (9 downto 0);
imgblock_4_7_V_read : IN STD_LOGIC_VECTOR (9 downto 0);
imgblock_4_8_V_read : IN STD_LOGIC_VECTOR (9 downto 0);
imgblock_4_9_V_read : IN STD_LOGIC_VECTOR (9 downto 0);
row : IN STD_LOGIC_VECTOR (15 downto 0);
col : IN STD_LOGIC_VECTOR (15 downto 0);
loop_r : IN STD_LOGIC_VECTOR (3 downto 0);
ap_return_0 : OUT STD_LOGIC_VECTOR (31 downto 0);
ap_return_1 : OUT STD_LOGIC_VECTOR (31 downto 0);
ap_return_2 : OUT STD_LOGIC_VECTOR (31 downto 0);
ap_ce : IN STD_LOGIC );
end component;
component ISPPipeline_accelpcA IS
generic (
ID : INTEGER;
NUM_STAGE : INTEGER;
din0_WIDTH : INTEGER;
din1_WIDTH : INTEGER;
din2_WIDTH : INTEGER;
din3_WIDTH : INTEGER;
din4_WIDTH : INTEGER;
dout_WIDTH : INTEGER );
port (
din0 : IN STD_LOGIC_VECTOR (39 downto 0);
din1 : IN STD_LOGIC_VECTOR (39 downto 0);
din2 : IN STD_LOGIC_VECTOR (39 downto 0);
din3 : IN STD_LOGIC_VECTOR (39 downto 0);
din4 : IN STD_LOGIC_VECTOR (1 downto 0);
dout : OUT STD_LOGIC_VECTOR (39 downto 0) );
end component;
component ISPPipeline_accelqcK IS
generic (
ID : INTEGER;
NUM_STAGE : INTEGER;
din0_WIDTH : INTEGER;
din1_WIDTH : INTEGER;
din2_WIDTH : INTEGER;
din3_WIDTH : INTEGER;
din4_WIDTH : INTEGER;
din5_WIDTH : INTEGER;
din6_WIDTH : INTEGER;
din7_WIDTH : INTEGER;
din8_WIDTH : INTEGER;
dout_WIDTH : INTEGER );
port (
din0 : IN STD_LOGIC_VECTOR (9 downto 0);
din1 : IN STD_LOGIC_VECTOR (9 downto 0);
din2 : IN STD_LOGIC_VECTOR (9 downto 0);
din3 : IN STD_LOGIC_VECTOR (9 downto 0);
din4 : IN STD_LOGIC_VECTOR (9 downto 0);
din5 : IN STD_LOGIC_VECTOR (9 downto 0);
din6 : IN STD_LOGIC_VECTOR (9 downto 0);
din7 : IN STD_LOGIC_VECTOR (9 downto 0);
din8 : IN STD_LOGIC_VECTOR (2 downto 0);
dout : OUT STD_LOGIC_VECTOR (9 downto 0) );
end component;
component demosaicing_lineblbW IS
generic (
DataWidth : INTEGER;
AddressRange : INTEGER;
AddressWidth : INTEGER );
port (
clk : IN STD_LOGIC;
reset : IN STD_LOGIC;
address0 : IN STD_LOGIC_VECTOR (9 downto 0);
ce0 : IN STD_LOGIC;
we0 : IN STD_LOGIC;
d0 : IN STD_LOGIC_VECTOR (39 downto 0);
q0 : OUT STD_LOGIC_VECTOR (39 downto 0);
address1 : IN STD_LOGIC_VECTOR (9 downto 0);
ce1 : IN STD_LOGIC;
we1 : IN STD_LOGIC;
d1 : IN STD_LOGIC_VECTOR (39 downto 0) );
end component;
begin
linebuffer_0_V_U : component demosaicing_lineblbW
generic map (
DataWidth => 40,
AddressRange => 960,
AddressWidth => 10)
port map (
clk => ap_clk,
reset => ap_rst,
address0 => linebuffer_0_V_address0,
ce0 => linebuffer_0_V_ce0,
we0 => linebuffer_0_V_we0,
d0 => ap_const_lv40_0,
q0 => linebuffer_0_V_q0,
address1 => linebuffer_0_V_address1,
ce1 => linebuffer_0_V_ce1,
we1 => linebuffer_0_V_we1,
d1 => p_Val2_s_reg_678);
linebuffer_1_V_U : component demosaicing_lineblbW
generic map (
DataWidth => 40,
AddressRange => 960,
AddressWidth => 10)
port map (
clk => ap_clk,
reset => ap_rst,
address0 => linebuffer_1_V_address0,
ce0 => linebuffer_1_V_ce0,
we0 => linebuffer_1_V_we0,
d0 => ap_const_lv40_0,
q0 => linebuffer_1_V_q0,
address1 => linebuffer_1_V_address1,
ce1 => linebuffer_1_V_ce1,
we1 => linebuffer_1_V_we1,
d1 => p_Val2_s_reg_678);
linebuffer_2_V_U : component demosaicing_lineblbW
generic map (
DataWidth => 40,
AddressRange => 960,
AddressWidth => 10)
port map (
clk => ap_clk,
reset => ap_rst,
address0 => linebuffer_2_V_address0,
ce0 => linebuffer_2_V_ce0,
we0 => linebuffer_2_V_we0,
d0 => src_mat_data_V_V_dout,
q0 => linebuffer_2_V_q0,
address1 => linebuffer_2_V_address1,
ce1 => linebuffer_2_V_ce1,
we1 => linebuffer_2_V_we1,
d1 => p_Val2_s_reg_678);
linebuffer_3_V_U : component demosaicing_lineblbW
generic map (
DataWidth => 40,
AddressRange => 960,
AddressWidth => 10)
port map (
clk => ap_clk,
reset => ap_rst,
address0 => linebuffer_3_V_address0,
ce0 => linebuffer_3_V_ce0,
we0 => linebuffer_3_V_we0,
d0 => src_mat_data_V_V_dout,
q0 => linebuffer_3_V_q0,
address1 => linebuffer_3_V_address1,
ce1 => linebuffer_3_V_ce1,
we1 => linebuffer_3_V_we1,
d1 => p_Val2_s_reg_678);
grp_Core_Process_fu_1215 : component Core_Process
port map (
ap_clk => ap_clk,
ap_rst => ap_rst,
imgblock_0_0_V_read => ap_phi_mux_imgblock_0_0_V_phi_fu_950_p4,
imgblock_0_1_V_read => ap_phi_mux_imgblock_0_1_V_phi_fu_937_p4,
imgblock_0_2_V_read => ap_phi_mux_imgblock_0_2_V_phi_fu_926_p4,
imgblock_0_3_V_read => ap_phi_mux_imgblock_0_3_V_phi_fu_916_p4,
imgblock_0_4_V_read => ap_phi_mux_imgblock_0_4_V_phi_fu_906_p4,
imgblock_0_5_V_read => ap_phi_mux_imgblock_0_5_V_phi_fu_896_p4,
imgblock_0_6_V_read => ap_phi_reg_pp2_iter2_imgblock_0_6_V_1221_reg_1202,
imgblock_0_7_V_read => ap_phi_reg_pp2_iter2_imgblock_0_7_V_1222_reg_1189,
imgblock_0_8_V_read => ap_phi_reg_pp2_iter2_imgblock_0_8_V_1223_reg_1176,
imgblock_0_9_V_read => ap_phi_reg_pp2_iter2_imgblock_0_9_V_1224_reg_1163,
imgblock_1_0_V_read => ap_phi_mux_imgblock_1_0_V_phi_fu_884_p4,
imgblock_1_1_V_read => ap_phi_mux_imgblock_1_1_V_phi_fu_871_p4,
imgblock_1_2_V_read => ap_phi_mux_imgblock_1_2_V_phi_fu_860_p4,
imgblock_1_3_V_read => ap_phi_mux_imgblock_1_3_V_phi_fu_850_p4,
imgblock_1_4_V_read => ap_phi_mux_imgblock_1_4_V_phi_fu_840_p4,
imgblock_1_5_V_read => ap_phi_mux_imgblock_1_5_V_phi_fu_830_p4,
imgblock_1_6_V_read => ap_phi_reg_pp2_iter2_imgblock_1_6_V_1227_reg_1150,
imgblock_1_7_V_read => ap_phi_reg_pp2_iter2_imgblock_1_7_V_1228_reg_1137,
imgblock_1_8_V_read => ap_phi_reg_pp2_iter2_imgblock_1_8_V_1229_reg_1124,
imgblock_1_9_V_read => ap_phi_reg_pp2_iter2_imgblock_1_9_V_1230_reg_1111,
imgblock_2_0_V_read => ap_phi_mux_imgblock_2_0_V_phi_fu_818_p4,
imgblock_2_1_V_read => ap_phi_mux_imgblock_2_1_V_phi_fu_805_p4,
imgblock_2_2_V_read => ap_phi_mux_imgblock_2_2_V_phi_fu_794_p4,
imgblock_2_3_V_read => ap_phi_mux_imgblock_2_3_V_phi_fu_784_p4,
imgblock_2_4_V_read => ap_phi_mux_imgblock_2_4_V_phi_fu_774_p4,
imgblock_2_5_V_read => ap_phi_mux_imgblock_2_5_V_phi_fu_764_p4,
imgblock_2_6_V_read => ap_phi_reg_pp2_iter2_imgblock_2_6_V_1233_reg_1098,
imgblock_2_7_V_read => ap_phi_reg_pp2_iter2_imgblock_2_7_V_1234_reg_1085,
imgblock_2_8_V_read => ap_phi_reg_pp2_iter2_imgblock_2_8_V_1235_reg_1072,
imgblock_2_9_V_read => ap_phi_reg_pp2_iter2_imgblock_2_9_V_1236_reg_1059,
imgblock_3_0_V_read => ap_phi_mux_imgblock_3_0_V_phi_fu_752_p4,
imgblock_3_1_V_read => ap_phi_mux_imgblock_3_1_V_phi_fu_739_p4,
imgblock_3_2_V_read => ap_phi_mux_imgblock_3_2_V_phi_fu_728_p4,
imgblock_3_3_V_read => ap_phi_mux_imgblock_3_3_V_phi_fu_718_p4,
imgblock_3_4_V_read => ap_phi_mux_imgblock_3_4_V_phi_fu_708_p4,
imgblock_3_5_V_read => ap_phi_mux_imgblock_3_5_V_phi_fu_698_p4,
imgblock_3_6_V_read => ap_phi_reg_pp2_iter2_imgblock_3_6_V_1239_reg_1046,
imgblock_3_7_V_read => ap_phi_reg_pp2_iter2_imgblock_3_7_V_1240_reg_1033,
imgblock_3_8_V_read => ap_phi_reg_pp2_iter2_imgblock_3_8_V_1241_reg_1020,
imgblock_3_9_V_read => ap_phi_reg_pp2_iter2_imgblock_3_9_V_1242_reg_1007,
imgblock_4_0_V_read => imgblock_4_0_V_fu_182,
imgblock_4_1_V_read => imgblock_4_1_V_fu_186,
imgblock_4_2_V_read => imgblock_4_2_V_reg_3155,
imgblock_4_3_V_read => imgblock_4_3_V_reg_3164,
imgblock_4_4_V_read => imgblock_4_4_V_reg_3173,
imgblock_4_5_V_read => imgblock_4_9_V_reg_3183,
imgblock_4_6_V_read => ap_phi_reg_pp2_iter2_imgblock_4_6_V_0_reg_959,
imgblock_4_7_V_read => ap_phi_reg_pp2_iter2_imgblock_4_7_V_0_reg_971,
imgblock_4_8_V_read => ap_phi_reg_pp2_iter2_imgblock_4_8_V_0_reg_983,
imgblock_4_9_V_read => ap_phi_reg_pp2_iter2_imgblock_4_9_V_0_reg_995,
row => i9_0_i_reg_544,
col => shl_ln_fu_2402_p3,
loop_r => ap_const_lv4_0,
ap_return_0 => grp_Core_Process_fu_1215_ap_return_0,
ap_return_1 => grp_Core_Process_fu_1215_ap_return_1,
ap_return_2 => grp_Core_Process_fu_1215_ap_return_2,
ap_ce => grp_Core_Process_fu_1215_ap_ce);
grp_Core_Process_fu_1318 : component Core_Process
port map (
ap_clk => ap_clk,
ap_rst => ap_rst,
imgblock_0_0_V_read => ap_phi_mux_imgblock_0_0_V_phi_fu_950_p4,
imgblock_0_1_V_read => ap_phi_mux_imgblock_0_1_V_phi_fu_937_p4,
imgblock_0_2_V_read => ap_phi_mux_imgblock_0_2_V_phi_fu_926_p4,
imgblock_0_3_V_read => ap_phi_mux_imgblock_0_3_V_phi_fu_916_p4,
imgblock_0_4_V_read => ap_phi_mux_imgblock_0_4_V_phi_fu_906_p4,
imgblock_0_5_V_read => ap_phi_mux_imgblock_0_5_V_phi_fu_896_p4,
imgblock_0_6_V_read => ap_phi_reg_pp2_iter2_imgblock_0_6_V_1221_reg_1202,
imgblock_0_7_V_read => ap_phi_reg_pp2_iter2_imgblock_0_7_V_1222_reg_1189,
imgblock_0_8_V_read => ap_phi_reg_pp2_iter2_imgblock_0_8_V_1223_reg_1176,
imgblock_0_9_V_read => ap_phi_reg_pp2_iter2_imgblock_0_9_V_1224_reg_1163,
imgblock_1_0_V_read => ap_phi_mux_imgblock_1_0_V_phi_fu_884_p4,
imgblock_1_1_V_read => ap_phi_mux_imgblock_1_1_V_phi_fu_871_p4,
imgblock_1_2_V_read => ap_phi_mux_imgblock_1_2_V_phi_fu_860_p4,
imgblock_1_3_V_read => ap_phi_mux_imgblock_1_3_V_phi_fu_850_p4,
imgblock_1_4_V_read => ap_phi_mux_imgblock_1_4_V_phi_fu_840_p4,
imgblock_1_5_V_read => ap_phi_mux_imgblock_1_5_V_phi_fu_830_p4,
imgblock_1_6_V_read => ap_phi_reg_pp2_iter2_imgblock_1_6_V_1227_reg_1150,
imgblock_1_7_V_read => ap_phi_reg_pp2_iter2_imgblock_1_7_V_1228_reg_1137,
imgblock_1_8_V_read => ap_phi_reg_pp2_iter2_imgblock_1_8_V_1229_reg_1124,
imgblock_1_9_V_read => ap_phi_reg_pp2_iter2_imgblock_1_9_V_1230_reg_1111,
imgblock_2_0_V_read => ap_phi_mux_imgblock_2_0_V_phi_fu_818_p4,
imgblock_2_1_V_read => ap_phi_mux_imgblock_2_1_V_phi_fu_805_p4,
imgblock_2_2_V_read => ap_phi_mux_imgblock_2_2_V_phi_fu_794_p4,
imgblock_2_3_V_read => ap_phi_mux_imgblock_2_3_V_phi_fu_784_p4,
imgblock_2_4_V_read => ap_phi_mux_imgblock_2_4_V_phi_fu_774_p4,
imgblock_2_5_V_read => ap_phi_mux_imgblock_2_5_V_phi_fu_764_p4,
imgblock_2_6_V_read => ap_phi_reg_pp2_iter2_imgblock_2_6_V_1233_reg_1098,
imgblock_2_7_V_read => ap_phi_reg_pp2_iter2_imgblock_2_7_V_1234_reg_1085,
imgblock_2_8_V_read => ap_phi_reg_pp2_iter2_imgblock_2_8_V_1235_reg_1072,
imgblock_2_9_V_read => ap_phi_reg_pp2_iter2_imgblock_2_9_V_1236_reg_1059,
imgblock_3_0_V_read => ap_phi_mux_imgblock_3_0_V_phi_fu_752_p4,
imgblock_3_1_V_read => ap_phi_mux_imgblock_3_1_V_phi_fu_739_p4,
imgblock_3_2_V_read => ap_phi_mux_imgblock_3_2_V_phi_fu_728_p4,
imgblock_3_3_V_read => ap_phi_mux_imgblock_3_3_V_phi_fu_718_p4,
imgblock_3_4_V_read => ap_phi_mux_imgblock_3_4_V_phi_fu_708_p4,
imgblock_3_5_V_read => ap_phi_mux_imgblock_3_5_V_phi_fu_698_p4,
imgblock_3_6_V_read => ap_phi_reg_pp2_iter2_imgblock_3_6_V_1239_reg_1046,
imgblock_3_7_V_read => ap_phi_reg_pp2_iter2_imgblock_3_7_V_1240_reg_1033,
imgblock_3_8_V_read => ap_phi_reg_pp2_iter2_imgblock_3_8_V_1241_reg_1020,
imgblock_3_9_V_read => ap_phi_reg_pp2_iter2_imgblock_3_9_V_1242_reg_1007,
imgblock_4_0_V_read => imgblock_4_0_V_fu_182,
imgblock_4_1_V_read => imgblock_4_1_V_fu_186,
imgblock_4_2_V_read => imgblock_4_2_V_reg_3155,
imgblock_4_3_V_read => imgblock_4_3_V_reg_3164,
imgblock_4_4_V_read => imgblock_4_4_V_reg_3173,
imgblock_4_5_V_read => imgblock_4_9_V_reg_3183,
imgblock_4_6_V_read => ap_phi_reg_pp2_iter2_imgblock_4_6_V_0_reg_959,
imgblock_4_7_V_read => ap_phi_reg_pp2_iter2_imgblock_4_7_V_0_reg_971,
imgblock_4_8_V_read => ap_phi_reg_pp2_iter2_imgblock_4_8_V_0_reg_983,
imgblock_4_9_V_read => ap_phi_reg_pp2_iter2_imgblock_4_9_V_0_reg_995,
row => i9_0_i_reg_544,
col => grp_Core_Process_fu_1318_col,
loop_r => ap_const_lv4_1,
ap_return_0 => grp_Core_Process_fu_1318_ap_return_0,
ap_return_1 => grp_Core_Process_fu_1318_ap_return_1,
ap_return_2 => grp_Core_Process_fu_1318_ap_return_2,
ap_ce => grp_Core_Process_fu_1318_ap_ce);
grp_Core_Process_fu_1421 : component Core_Process
port map (
ap_clk => ap_clk,
ap_rst => ap_rst,
imgblock_0_0_V_read => ap_phi_mux_imgblock_0_0_V_phi_fu_950_p4,
imgblock_0_1_V_read => ap_phi_mux_imgblock_0_1_V_phi_fu_937_p4,
imgblock_0_2_V_read => ap_phi_mux_imgblock_0_2_V_phi_fu_926_p4,
imgblock_0_3_V_read => ap_phi_mux_imgblock_0_3_V_phi_fu_916_p4,
imgblock_0_4_V_read => ap_phi_mux_imgblock_0_4_V_phi_fu_906_p4,
imgblock_0_5_V_read => ap_phi_mux_imgblock_0_5_V_phi_fu_896_p4,
imgblock_0_6_V_read => ap_phi_reg_pp2_iter2_imgblock_0_6_V_1221_reg_1202,
imgblock_0_7_V_read => ap_phi_reg_pp2_iter2_imgblock_0_7_V_1222_reg_1189,
imgblock_0_8_V_read => ap_phi_reg_pp2_iter2_imgblock_0_8_V_1223_reg_1176,
imgblock_0_9_V_read => ap_phi_reg_pp2_iter2_imgblock_0_9_V_1224_reg_1163,
imgblock_1_0_V_read => ap_phi_mux_imgblock_1_0_V_phi_fu_884_p4,
imgblock_1_1_V_read => ap_phi_mux_imgblock_1_1_V_phi_fu_871_p4,
imgblock_1_2_V_read => ap_phi_mux_imgblock_1_2_V_phi_fu_860_p4,
imgblock_1_3_V_read => ap_phi_mux_imgblock_1_3_V_phi_fu_850_p4,
imgblock_1_4_V_read => ap_phi_mux_imgblock_1_4_V_phi_fu_840_p4,
imgblock_1_5_V_read => ap_phi_mux_imgblock_1_5_V_phi_fu_830_p4,
imgblock_1_6_V_read => ap_phi_reg_pp2_iter2_imgblock_1_6_V_1227_reg_1150,
imgblock_1_7_V_read => ap_phi_reg_pp2_iter2_imgblock_1_7_V_1228_reg_1137,
imgblock_1_8_V_read => ap_phi_reg_pp2_iter2_imgblock_1_8_V_1229_reg_1124,
imgblock_1_9_V_read => ap_phi_reg_pp2_iter2_imgblock_1_9_V_1230_reg_1111,
imgblock_2_0_V_read => ap_phi_mux_imgblock_2_0_V_phi_fu_818_p4,
imgblock_2_1_V_read => ap_phi_mux_imgblock_2_1_V_phi_fu_805_p4,
imgblock_2_2_V_read => ap_phi_mux_imgblock_2_2_V_phi_fu_794_p4,
imgblock_2_3_V_read => ap_phi_mux_imgblock_2_3_V_phi_fu_784_p4,
imgblock_2_4_V_read => ap_phi_mux_imgblock_2_4_V_phi_fu_774_p4,
imgblock_2_5_V_read => ap_phi_mux_imgblock_2_5_V_phi_fu_764_p4,
imgblock_2_6_V_read => ap_phi_reg_pp2_iter2_imgblock_2_6_V_1233_reg_1098,
imgblock_2_7_V_read => ap_phi_reg_pp2_iter2_imgblock_2_7_V_1234_reg_1085,
imgblock_2_8_V_read => ap_phi_reg_pp2_iter2_imgblock_2_8_V_1235_reg_1072,
imgblock_2_9_V_read => ap_phi_reg_pp2_iter2_imgblock_2_9_V_1236_reg_1059,
imgblock_3_0_V_read => ap_phi_mux_imgblock_3_0_V_phi_fu_752_p4,
imgblock_3_1_V_read => ap_phi_mux_imgblock_3_1_V_phi_fu_739_p4,
imgblock_3_2_V_read => ap_phi_mux_imgblock_3_2_V_phi_fu_728_p4,
imgblock_3_3_V_read => ap_phi_mux_imgblock_3_3_V_phi_fu_718_p4,
imgblock_3_4_V_read => ap_phi_mux_imgblock_3_4_V_phi_fu_708_p4,
imgblock_3_5_V_read => ap_phi_mux_imgblock_3_5_V_phi_fu_698_p4,
imgblock_3_6_V_read => ap_phi_reg_pp2_iter2_imgblock_3_6_V_1239_reg_1046,
imgblock_3_7_V_read => ap_phi_reg_pp2_iter2_imgblock_3_7_V_1240_reg_1033,
imgblock_3_8_V_read => ap_phi_reg_pp2_iter2_imgblock_3_8_V_1241_reg_1020,
imgblock_3_9_V_read => ap_phi_reg_pp2_iter2_imgblock_3_9_V_1242_reg_1007,
imgblock_4_0_V_read => imgblock_4_0_V_fu_182,
imgblock_4_1_V_read => imgblock_4_1_V_fu_186,
imgblock_4_2_V_read => imgblock_4_2_V_reg_3155,
imgblock_4_3_V_read => imgblock_4_3_V_reg_3164,
imgblock_4_4_V_read => imgblock_4_4_V_reg_3173,
imgblock_4_5_V_read => imgblock_4_9_V_reg_3183,
imgblock_4_6_V_read => ap_phi_reg_pp2_iter2_imgblock_4_6_V_0_reg_959,
imgblock_4_7_V_read => ap_phi_reg_pp2_iter2_imgblock_4_7_V_0_reg_971,
imgblock_4_8_V_read => ap_phi_reg_pp2_iter2_imgblock_4_8_V_0_reg_983,
imgblock_4_9_V_read => ap_phi_reg_pp2_iter2_imgblock_4_9_V_0_reg_995,
row => i9_0_i_reg_544,
col => grp_Core_Process_fu_1421_col,
loop_r => ap_const_lv4_2,
ap_return_0 => grp_Core_Process_fu_1421_ap_return_0,
ap_return_1 => grp_Core_Process_fu_1421_ap_return_1,
ap_return_2 => grp_Core_Process_fu_1421_ap_return_2,
ap_ce => grp_Core_Process_fu_1421_ap_ce);
grp_Core_Process_fu_1524 : component Core_Process
port map (
ap_clk => ap_clk,
ap_rst => ap_rst,
imgblock_0_0_V_read => ap_phi_mux_imgblock_0_0_V_phi_fu_950_p4,
imgblock_0_1_V_read => ap_phi_mux_imgblock_0_1_V_phi_fu_937_p4,
imgblock_0_2_V_read => ap_phi_mux_imgblock_0_2_V_phi_fu_926_p4,
imgblock_0_3_V_read => ap_phi_mux_imgblock_0_3_V_phi_fu_916_p4,
imgblock_0_4_V_read => ap_phi_mux_imgblock_0_4_V_phi_fu_906_p4,
imgblock_0_5_V_read => ap_phi_mux_imgblock_0_5_V_phi_fu_896_p4,
imgblock_0_6_V_read => ap_phi_reg_pp2_iter2_imgblock_0_6_V_1221_reg_1202,
imgblock_0_7_V_read => ap_phi_reg_pp2_iter2_imgblock_0_7_V_1222_reg_1189,
imgblock_0_8_V_read => ap_phi_reg_pp2_iter2_imgblock_0_8_V_1223_reg_1176,
imgblock_0_9_V_read => ap_phi_reg_pp2_iter2_imgblock_0_9_V_1224_reg_1163,
imgblock_1_0_V_read => ap_phi_mux_imgblock_1_0_V_phi_fu_884_p4,
imgblock_1_1_V_read => ap_phi_mux_imgblock_1_1_V_phi_fu_871_p4,
imgblock_1_2_V_read => ap_phi_mux_imgblock_1_2_V_phi_fu_860_p4,
imgblock_1_3_V_read => ap_phi_mux_imgblock_1_3_V_phi_fu_850_p4,
imgblock_1_4_V_read => ap_phi_mux_imgblock_1_4_V_phi_fu_840_p4,
imgblock_1_5_V_read => ap_phi_mux_imgblock_1_5_V_phi_fu_830_p4,
imgblock_1_6_V_read => ap_phi_reg_pp2_iter2_imgblock_1_6_V_1227_reg_1150,
imgblock_1_7_V_read => ap_phi_reg_pp2_iter2_imgblock_1_7_V_1228_reg_1137,
imgblock_1_8_V_read => ap_phi_reg_pp2_iter2_imgblock_1_8_V_1229_reg_1124,
imgblock_1_9_V_read => ap_phi_reg_pp2_iter2_imgblock_1_9_V_1230_reg_1111,
imgblock_2_0_V_read => ap_phi_mux_imgblock_2_0_V_phi_fu_818_p4,
imgblock_2_1_V_read => ap_phi_mux_imgblock_2_1_V_phi_fu_805_p4,
imgblock_2_2_V_read => ap_phi_mux_imgblock_2_2_V_phi_fu_794_p4,
imgblock_2_3_V_read => ap_phi_mux_imgblock_2_3_V_phi_fu_784_p4,
imgblock_2_4_V_read => ap_phi_mux_imgblock_2_4_V_phi_fu_774_p4,
imgblock_2_5_V_read => ap_phi_mux_imgblock_2_5_V_phi_fu_764_p4,
imgblock_2_6_V_read => ap_phi_reg_pp2_iter2_imgblock_2_6_V_1233_reg_1098,
imgblock_2_7_V_read => ap_phi_reg_pp2_iter2_imgblock_2_7_V_1234_reg_1085,
imgblock_2_8_V_read => ap_phi_reg_pp2_iter2_imgblock_2_8_V_1235_reg_1072,
imgblock_2_9_V_read => ap_phi_reg_pp2_iter2_imgblock_2_9_V_1236_reg_1059,
imgblock_3_0_V_read => ap_phi_mux_imgblock_3_0_V_phi_fu_752_p4,
imgblock_3_1_V_read => ap_phi_mux_imgblock_3_1_V_phi_fu_739_p4,
imgblock_3_2_V_read => ap_phi_mux_imgblock_3_2_V_phi_fu_728_p4,
imgblock_3_3_V_read => ap_phi_mux_imgblock_3_3_V_phi_fu_718_p4,
imgblock_3_4_V_read => ap_phi_mux_imgblock_3_4_V_phi_fu_708_p4,
imgblock_3_5_V_read => ap_phi_mux_imgblock_3_5_V_phi_fu_698_p4,
imgblock_3_6_V_read => ap_phi_reg_pp2_iter2_imgblock_3_6_V_1239_reg_1046,
imgblock_3_7_V_read => ap_phi_reg_pp2_iter2_imgblock_3_7_V_1240_reg_1033,
imgblock_3_8_V_read => ap_phi_reg_pp2_iter2_imgblock_3_8_V_1241_reg_1020,
imgblock_3_9_V_read => ap_phi_reg_pp2_iter2_imgblock_3_9_V_1242_reg_1007,
imgblock_4_0_V_read => imgblock_4_0_V_fu_182,
imgblock_4_1_V_read => imgblock_4_1_V_fu_186,
imgblock_4_2_V_read => imgblock_4_2_V_reg_3155,
imgblock_4_3_V_read => imgblock_4_3_V_reg_3164,
imgblock_4_4_V_read => imgblock_4_4_V_reg_3173,
imgblock_4_5_V_read => imgblock_4_9_V_reg_3183,
imgblock_4_6_V_read => ap_phi_reg_pp2_iter2_imgblock_4_6_V_0_reg_959,
imgblock_4_7_V_read => ap_phi_reg_pp2_iter2_imgblock_4_7_V_0_reg_971,
imgblock_4_8_V_read => ap_phi_reg_pp2_iter2_imgblock_4_8_V_0_reg_983,
imgblock_4_9_V_read => ap_phi_reg_pp2_iter2_imgblock_4_9_V_0_reg_995,
row => i9_0_i_reg_544,
col => grp_Core_Process_fu_1524_col,
loop_r => ap_const_lv4_3,
ap_return_0 => grp_Core_Process_fu_1524_ap_return_0,
ap_return_1 => grp_Core_Process_fu_1524_ap_return_1,
ap_return_2 => grp_Core_Process_fu_1524_ap_return_2,
ap_ce => grp_Core_Process_fu_1524_ap_ce);
ISPPipeline_accelpcA_U404 : component ISPPipeline_accelpcA
generic map (
ID => 1,
NUM_STAGE => 1,
din0_WIDTH => 40,
din1_WIDTH => 40,
din2_WIDTH => 40,
din3_WIDTH => 40,
din4_WIDTH => 2,
dout_WIDTH => 40)
port map (
din0 => linebuffer_0_V_q0,
din1 => linebuffer_1_V_q0,
din2 => linebuffer_2_V_q0,
din3 => linebuffer_3_V_q0,
din4 => select_ln879_1_reg_2960,
dout => grp_fu_1627_p6);
ISPPipeline_accelpcA_U405 : component ISPPipeline_accelpcA
generic map (
ID => 1,
NUM_STAGE => 1,
din0_WIDTH => 40,
din1_WIDTH => 40,
din2_WIDTH => 40,
din3_WIDTH => 40,
din4_WIDTH => 2,
dout_WIDTH => 40)
port map (
din0 => linebuffer_0_V_q0,
din1 => linebuffer_1_V_q0,
din2 => linebuffer_2_V_q0,
din3 => linebuffer_3_V_q0,
din4 => select_ln879_3_reg_2966,
dout => grp_fu_1640_p6);
ISPPipeline_accelpcA_U406 : component ISPPipeline_accelpcA
generic map (
ID => 1,
NUM_STAGE => 1,
din0_WIDTH => 40,
din1_WIDTH => 40,
din2_WIDTH => 40,
din3_WIDTH => 40,
din4_WIDTH => 2,
dout_WIDTH => 40)
port map (
din0 => linebuffer_0_V_q0,
din1 => linebuffer_1_V_q0,
din2 => linebuffer_2_V_q0,
din3 => linebuffer_3_V_q0,
din4 => select_ln879_5_reg_2971,
dout => grp_fu_1653_p6);
ISPPipeline_accelpcA_U407 : component ISPPipeline_accelpcA
generic map (
ID => 1,
NUM_STAGE => 1,
din0_WIDTH => 40,
din1_WIDTH => 40,
din2_WIDTH => 40,
din3_WIDTH => 40,
din4_WIDTH => 2,
dout_WIDTH => 40)
port map (
din0 => linebuffer_0_V_q0,
din1 => linebuffer_1_V_q0,
din2 => linebuffer_2_V_q0,
din3 => linebuffer_3_V_q0,
din4 => select_ln879_6_reg_2976,
dout => grp_fu_1666_p6);
ISPPipeline_accelqcK_U408 : component ISPPipeline_accelqcK
generic map (
ID => 1,
NUM_STAGE => 1,
din0_WIDTH => 10,
din1_WIDTH => 10,
din2_WIDTH => 10,
din3_WIDTH => 10,
din4_WIDTH => 10,
din5_WIDTH => 10,
din6_WIDTH => 10,
din7_WIDTH => 10,
din8_WIDTH => 3,
dout_WIDTH => 10)
port map (
din0 => ap_const_lv10_0,
din1 => imgblock_0_4_V_1219_reg_633,
din2 => imgblock_0_4_V_1219_reg_633,
din3 => imgblock_0_4_V_1219_reg_633,
din4 => imgblock_0_4_V_1219_reg_633,
din5 => imgblock_0_4_V_1219_reg_633,
din6 => imgblock_0_4_V_1219_reg_633,
din7 => imgblock_0_4_V_1219_reg_633,
din8 => p_0_i_reg_644,
dout => imgblock_0_4_V_2_fu_2089_p10);
ISPPipeline_accelqcK_U409 : component ISPPipeline_accelqcK
generic map (
ID => 1,
NUM_STAGE => 1,
din0_WIDTH => 10,
din1_WIDTH => 10,
din2_WIDTH => 10,
din3_WIDTH => 10,
din4_WIDTH => 10,
din5_WIDTH => 10,
din6_WIDTH => 10,
din7_WIDTH => 10,
din8_WIDTH => 3,
dout_WIDTH => 10)
port map (
din0 => ap_const_lv10_0,
din1 => imgblock_0_5_V_1_reg_622,
din2 => imgblock_0_5_V_1_reg_622,
din3 => imgblock_0_5_V_1_reg_622,
din4 => imgblock_0_5_V_1_reg_622,
din5 => imgblock_0_5_V_1_reg_622,
din6 => imgblock_0_5_V_1_reg_622,
din7 => imgblock_0_5_V_1_reg_622,
din8 => p_0_i_reg_644,
dout => imgblock_0_5_V_s_fu_2111_p10);
ISPPipeline_accelqcK_U410 : component ISPPipeline_accelqcK
generic map (
ID => 1,
NUM_STAGE => 1,
din0_WIDTH => 10,
din1_WIDTH => 10,
din2_WIDTH => 10,
din3_WIDTH => 10,
din4_WIDTH => 10,
din5_WIDTH => 10,
din6_WIDTH => 10,
din7_WIDTH => 10,
din8_WIDTH => 3,
dout_WIDTH => 10)
port map (
din0 => imgblock_1_4_V_1225_reg_611,
din1 => ap_const_lv10_0,
din2 => imgblock_1_4_V_1225_reg_611,
din3 => imgblock_1_4_V_1225_reg_611,
din4 => imgblock_1_4_V_1225_reg_611,
din5 => imgblock_1_4_V_1225_reg_611,
din6 => imgblock_1_4_V_1225_reg_611,
din7 => imgblock_1_4_V_1225_reg_611,
din8 => p_0_i_reg_644,
dout => imgblock_1_4_V_2_fu_2133_p10);
ISPPipeline_accelqcK_U411 : component ISPPipeline_accelqcK
generic map (
ID => 1,
NUM_STAGE => 1,
din0_WIDTH => 10,
din1_WIDTH => 10,
din2_WIDTH => 10,
din3_WIDTH => 10,
din4_WIDTH => 10,
din5_WIDTH => 10,
din6_WIDTH => 10,
din7_WIDTH => 10,
din8_WIDTH => 3,
dout_WIDTH => 10)
port map (
din0 => imgblock_1_5_V_1_reg_600,
din1 => ap_const_lv10_0,
din2 => imgblock_1_5_V_1_reg_600,
din3 => imgblock_1_5_V_1_reg_600,
din4 => imgblock_1_5_V_1_reg_600,
din5 => imgblock_1_5_V_1_reg_600,
din6 => imgblock_1_5_V_1_reg_600,
din7 => imgblock_1_5_V_1_reg_600,
din8 => p_0_i_reg_644,
dout => imgblock_1_5_V_s_fu_2155_p10);
ISPPipeline_accelqcK_U412 : component ISPPipeline_accelqcK
generic map (
ID => 1,
NUM_STAGE => 1,
din0_WIDTH => 10,
din1_WIDTH => 10,
din2_WIDTH => 10,
din3_WIDTH => 10,
din4_WIDTH => 10,
din5_WIDTH => 10,
din6_WIDTH => 10,
din7_WIDTH => 10,
din8_WIDTH => 3,
dout_WIDTH => 10)
port map (
din0 => imgblock_2_4_V_1231_reg_589,
din1 => imgblock_2_4_V_1231_reg_589,
din2 => ap_const_lv10_0,
din3 => imgblock_2_4_V_1231_reg_589,
din4 => imgblock_2_4_V_1231_reg_589,
din5 => imgblock_2_4_V_1231_reg_589,
din6 => imgblock_2_4_V_1231_reg_589,
din7 => imgblock_2_4_V_1231_reg_589,
din8 => p_0_i_reg_644,
dout => imgblock_2_4_V_2_fu_2177_p10);
ISPPipeline_accelqcK_U413 : component ISPPipeline_accelqcK
generic map (
ID => 1,
NUM_STAGE => 1,
din0_WIDTH => 10,
din1_WIDTH => 10,
din2_WIDTH => 10,
din3_WIDTH => 10,
din4_WIDTH => 10,
din5_WIDTH => 10,
din6_WIDTH => 10,
din7_WIDTH => 10,
din8_WIDTH => 3,
dout_WIDTH => 10)
port map (
din0 => imgblock_2_5_V_1_reg_578,
din1 => imgblock_2_5_V_1_reg_578,
din2 => ap_const_lv10_0,
din3 => imgblock_2_5_V_1_reg_578,
din4 => imgblock_2_5_V_1_reg_578,
din5 => imgblock_2_5_V_1_reg_578,
din6 => imgblock_2_5_V_1_reg_578,
din7 => imgblock_2_5_V_1_reg_578,
din8 => p_0_i_reg_644,
dout => imgblock_2_5_V_s_fu_2199_p10);
ISPPipeline_accelqcK_U414 : component ISPPipeline_accelqcK
generic map (
ID => 1,
NUM_STAGE => 1,
din0_WIDTH => 10,
din1_WIDTH => 10,
din2_WIDTH => 10,
din3_WIDTH => 10,
din4_WIDTH => 10,
din5_WIDTH => 10,
din6_WIDTH => 10,
din7_WIDTH => 10,
din8_WIDTH => 3,
dout_WIDTH => 10)
port map (
din0 => imgblock_3_4_V_1237_reg_567,
din1 => imgblock_3_4_V_1237_reg_567,
din2 => imgblock_3_4_V_1237_reg_567,
din3 => ap_const_lv10_0,
din4 => ap_const_lv10_0,
din5 => ap_const_lv10_0,
din6 => ap_const_lv10_0,
din7 => ap_const_lv10_0,
din8 => p_0_i_reg_644,
dout => imgblock_3_4_V_2_fu_2221_p10);
ISPPipeline_accelqcK_U415 : component ISPPipeline_accelqcK
generic map (
ID => 1,
NUM_STAGE => 1,
din0_WIDTH => 10,
din1_WIDTH => 10,
din2_WIDTH => 10,
din3_WIDTH => 10,
din4_WIDTH => 10,
din5_WIDTH => 10,
din6_WIDTH => 10,
din7_WIDTH => 10,
din8_WIDTH => 3,
dout_WIDTH => 10)
port map (
din0 => imgblock_3_5_V_1_reg_556,
din1 => imgblock_3_5_V_1_reg_556,
din2 => imgblock_3_5_V_1_reg_556,
din3 => ap_const_lv10_0,
din4 => ap_const_lv10_0,
din5 => ap_const_lv10_0,
din6 => ap_const_lv10_0,
din7 => ap_const_lv10_0,
din8 => p_0_i_reg_644,
dout => imgblock_3_5_V_s_fu_2243_p10);
ap_CS_fsm_assign_proc : process(ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if (ap_rst = '1') then
ap_CS_fsm <= ap_ST_fsm_state1;
else
ap_CS_fsm <= ap_NS_fsm;
end if;
end if;
end process;
ap_done_reg_assign_proc : process(ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if (ap_rst = '1') then
ap_done_reg <= ap_const_logic_0;
else
if ((ap_continue = ap_const_logic_1)) then
ap_done_reg <= ap_const_logic_0;
elsif (((icmp_ln277_fu_1900_p2 = ap_const_lv1_1) and (ap_const_logic_1 = ap_CS_fsm_state5))) then
ap_done_reg <= ap_const_logic_1;
end if;
end if;
end if;
end process;
ap_enable_reg_pp0_iter0_assign_proc : process(ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if (ap_rst = '1') then
ap_enable_reg_pp0_iter0 <= ap_const_logic_0;
else
if (((ap_const_boolean_0 = ap_block_pp0_stage0_subdone) and (ap_const_logic_1 = ap_condition_pp0_exit_iter0_state2) and (ap_const_logic_1 = ap_CS_fsm_pp0_stage0))) then
ap_enable_reg_pp0_iter0 <= ap_const_logic_0;
elsif ((not(((src_mat_cols_empty_n = ap_const_logic_0) or (src_mat_rows_empty_n = ap_const_logic_0) or (ap_start = ap_const_logic_0) or (ap_done_reg = ap_const_logic_1))) and (ap_const_logic_1 = ap_CS_fsm_state1))) then
ap_enable_reg_pp0_iter0 <= ap_const_logic_1;
end if;
end if;
end if;
end process;
ap_enable_reg_pp0_iter1_assign_proc : process(ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if (ap_rst = '1') then
ap_enable_reg_pp0_iter1 <= ap_const_logic_0;
else
if (((ap_const_boolean_0 = ap_block_pp0_stage0_subdone) and (ap_const_logic_1 = ap_condition_pp0_exit_iter0_state2))) then
ap_enable_reg_pp0_iter1 <= (ap_const_logic_1 xor ap_condition_pp0_exit_iter0_state2);
elsif ((ap_const_boolean_0 = ap_block_pp0_stage0_subdone)) then
ap_enable_reg_pp0_iter1 <= ap_enable_reg_pp0_iter0;
elsif ((not(((src_mat_cols_empty_n = ap_const_logic_0) or (src_mat_rows_empty_n = ap_const_logic_0) or (ap_start = ap_const_logic_0) or (ap_done_reg = ap_const_logic_1))) and (ap_const_logic_1 = ap_CS_fsm_state1))) then
ap_enable_reg_pp0_iter1 <= ap_const_logic_0;
end if;
end if;
end if;
end process;
ap_enable_reg_pp2_iter0_assign_proc : process(ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if (ap_rst = '1') then
ap_enable_reg_pp2_iter0 <= ap_const_logic_0;
else
if (((icmp_ln335_fu_2292_p2 = ap_const_lv1_1) and (ap_const_boolean_0 = ap_block_pp2_stage0_subdone) and (ap_const_logic_1 = ap_CS_fsm_pp2_stage0))) then
ap_enable_reg_pp2_iter0 <= ap_const_logic_0;
elsif ((ap_const_logic_1 = ap_CS_fsm_state8)) then
ap_enable_reg_pp2_iter0 <= ap_const_logic_1;
end if;
end if;
end if;
end process;
ap_enable_reg_pp2_iter1_assign_proc : process(ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if (ap_rst = '1') then
ap_enable_reg_pp2_iter1 <= ap_const_logic_0;
else
if ((ap_const_boolean_0 = ap_block_pp2_stage0_subdone)) then
ap_enable_reg_pp2_iter1 <= ap_enable_reg_pp2_iter0;
end if;
end if;
end if;
end process;
ap_enable_reg_pp2_iter2_assign_proc : process(ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if (ap_rst = '1') then
ap_enable_reg_pp2_iter2 <= ap_const_logic_0;
else
if ((ap_const_boolean_0 = ap_block_pp2_stage0_subdone)) then
ap_enable_reg_pp2_iter2 <= ap_enable_reg_pp2_iter1;
end if;
end if;
end if;
end process;
ap_enable_reg_pp2_iter3_assign_proc : process(ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if (ap_rst = '1') then
ap_enable_reg_pp2_iter3 <= ap_const_logic_0;
else
if ((ap_const_boolean_0 = ap_block_pp2_stage0_subdone)) then
if ((ap_const_logic_1 = ap_condition_pp2_exit_iter2_state11)) then
ap_enable_reg_pp2_iter3 <= ap_enable_reg_pp2_iter1;
elsif ((ap_const_boolean_1 = ap_const_boolean_1)) then
ap_enable_reg_pp2_iter3 <= ap_enable_reg_pp2_iter2;
end if;
end if;
end if;
end if;
end process;
ap_enable_reg_pp2_iter4_assign_proc : process(ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if (ap_rst = '1') then
ap_enable_reg_pp2_iter4 <= ap_const_logic_0;
else
if ((ap_const_boolean_0 = ap_block_pp2_stage0_subdone)) then
ap_enable_reg_pp2_iter4 <= ap_enable_reg_pp2_iter3;
end if;
end if;
end if;
end process;
ap_enable_reg_pp2_iter5_assign_proc : process(ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if (ap_rst = '1') then
ap_enable_reg_pp2_iter5 <= ap_const_logic_0;
else
if ((ap_const_boolean_0 = ap_block_pp2_stage0_subdone)) then
ap_enable_reg_pp2_iter5 <= ap_enable_reg_pp2_iter4;
end if;
end if;
end if;
end process;
ap_enable_reg_pp2_iter6_assign_proc : process(ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if (ap_rst = '1') then
ap_enable_reg_pp2_iter6 <= ap_const_logic_0;
else
if ((ap_const_boolean_0 = ap_block_pp2_stage0_subdone)) then
ap_enable_reg_pp2_iter6 <= ap_enable_reg_pp2_iter5;
end if;
end if;
end if;
end process;
ap_enable_reg_pp2_iter7_assign_proc : process(ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if (ap_rst = '1') then
ap_enable_reg_pp2_iter7 <= ap_const_logic_0;
else
if ((ap_const_boolean_0 = ap_block_pp2_stage0_subdone)) then
ap_enable_reg_pp2_iter7 <= ap_enable_reg_pp2_iter6;
end if;
end if;
end if;
end process;
ap_enable_reg_pp2_iter8_assign_proc : process(ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if (ap_rst = '1') then
ap_enable_reg_pp2_iter8 <= ap_const_logic_0;
else
if ((ap_const_boolean_0 = ap_block_pp2_stage0_subdone)) then
ap_enable_reg_pp2_iter8 <= ap_enable_reg_pp2_iter7;
elsif ((ap_const_logic_1 = ap_CS_fsm_state8)) then
ap_enable_reg_pp2_iter8 <= ap_const_logic_0;
end if;
end if;
end if;
end process;
ap_phi_reg_pp2_iter1_imgblock_0_6_V_1221_reg_1202_assign_proc : process (ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if ((ap_const_boolean_1 = ap_condition_568)) then
if (((icmp_ln363_fu_2303_p2 = ap_const_lv1_0) and (icmp_ln335_fu_2292_p2 = ap_const_lv1_0))) then
ap_phi_reg_pp2_iter1_imgblock_0_6_V_1221_reg_1202 <= ap_const_lv10_0;
elsif ((ap_const_boolean_1 = ap_const_boolean_1)) then
ap_phi_reg_pp2_iter1_imgblock_0_6_V_1221_reg_1202 <= ap_phi_reg_pp2_iter0_imgblock_0_6_V_1221_reg_1202;
end if;
end if;
end if;
end process;
ap_phi_reg_pp2_iter1_imgblock_0_7_V_1222_reg_1189_assign_proc : process (ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if ((ap_const_boolean_1 = ap_condition_568)) then
if (((icmp_ln363_fu_2303_p2 = ap_const_lv1_0) and (icmp_ln335_fu_2292_p2 = ap_const_lv1_0))) then
ap_phi_reg_pp2_iter1_imgblock_0_7_V_1222_reg_1189 <= ap_const_lv10_0;
elsif ((ap_const_boolean_1 = ap_const_boolean_1)) then
ap_phi_reg_pp2_iter1_imgblock_0_7_V_1222_reg_1189 <= ap_phi_reg_pp2_iter0_imgblock_0_7_V_1222_reg_1189;
end if;
end if;
end if;
end process;
ap_phi_reg_pp2_iter1_imgblock_0_8_V_1223_reg_1176_assign_proc : process (ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if ((ap_const_boolean_1 = ap_condition_568)) then
if (((icmp_ln363_fu_2303_p2 = ap_const_lv1_0) and (icmp_ln335_fu_2292_p2 = ap_const_lv1_0))) then
ap_phi_reg_pp2_iter1_imgblock_0_8_V_1223_reg_1176 <= ap_const_lv10_0;
elsif ((ap_const_boolean_1 = ap_const_boolean_1)) then
ap_phi_reg_pp2_iter1_imgblock_0_8_V_1223_reg_1176 <= ap_phi_reg_pp2_iter0_imgblock_0_8_V_1223_reg_1176;
end if;
end if;
end if;
end process;
ap_phi_reg_pp2_iter1_imgblock_0_9_V_1224_reg_1163_assign_proc : process (ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if ((ap_const_boolean_1 = ap_condition_568)) then
if (((icmp_ln363_fu_2303_p2 = ap_const_lv1_0) and (icmp_ln335_fu_2292_p2 = ap_const_lv1_0))) then
ap_phi_reg_pp2_iter1_imgblock_0_9_V_1224_reg_1163 <= ap_const_lv10_0;
elsif ((ap_const_boolean_1 = ap_const_boolean_1)) then
ap_phi_reg_pp2_iter1_imgblock_0_9_V_1224_reg_1163 <= ap_phi_reg_pp2_iter0_imgblock_0_9_V_1224_reg_1163;
end if;
end if;
end if;
end process;
ap_phi_reg_pp2_iter1_imgblock_1_6_V_1227_reg_1150_assign_proc : process (ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if ((ap_const_boolean_1 = ap_condition_568)) then
if (((icmp_ln363_fu_2303_p2 = ap_const_lv1_0) and (icmp_ln335_fu_2292_p2 = ap_const_lv1_0))) then
ap_phi_reg_pp2_iter1_imgblock_1_6_V_1227_reg_1150 <= ap_const_lv10_0;
elsif ((ap_const_boolean_1 = ap_const_boolean_1)) then
ap_phi_reg_pp2_iter1_imgblock_1_6_V_1227_reg_1150 <= ap_phi_reg_pp2_iter0_imgblock_1_6_V_1227_reg_1150;
end if;
end if;
end if;
end process;
ap_phi_reg_pp2_iter1_imgblock_1_7_V_1228_reg_1137_assign_proc : process (ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if ((ap_const_boolean_1 = ap_condition_568)) then
if (((icmp_ln363_fu_2303_p2 = ap_const_lv1_0) and (icmp_ln335_fu_2292_p2 = ap_const_lv1_0))) then
ap_phi_reg_pp2_iter1_imgblock_1_7_V_1228_reg_1137 <= ap_const_lv10_0;
elsif ((ap_const_boolean_1 = ap_const_boolean_1)) then
ap_phi_reg_pp2_iter1_imgblock_1_7_V_1228_reg_1137 <= ap_phi_reg_pp2_iter0_imgblock_1_7_V_1228_reg_1137;
end if;
end if;
end if;
end process;
ap_phi_reg_pp2_iter1_imgblock_1_8_V_1229_reg_1124_assign_proc : process (ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if ((ap_const_boolean_1 = ap_condition_568)) then
if (((icmp_ln363_fu_2303_p2 = ap_const_lv1_0) and (icmp_ln335_fu_2292_p2 = ap_const_lv1_0))) then
ap_phi_reg_pp2_iter1_imgblock_1_8_V_1229_reg_1124 <= ap_const_lv10_0;
elsif ((ap_const_boolean_1 = ap_const_boolean_1)) then
ap_phi_reg_pp2_iter1_imgblock_1_8_V_1229_reg_1124 <= ap_phi_reg_pp2_iter0_imgblock_1_8_V_1229_reg_1124;
end if;
end if;
end if;
end process;
ap_phi_reg_pp2_iter1_imgblock_1_9_V_1230_reg_1111_assign_proc : process (ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if ((ap_const_boolean_1 = ap_condition_568)) then
if (((icmp_ln363_fu_2303_p2 = ap_const_lv1_0) and (icmp_ln335_fu_2292_p2 = ap_const_lv1_0))) then
ap_phi_reg_pp2_iter1_imgblock_1_9_V_1230_reg_1111 <= ap_const_lv10_0;
elsif ((ap_const_boolean_1 = ap_const_boolean_1)) then
ap_phi_reg_pp2_iter1_imgblock_1_9_V_1230_reg_1111 <= ap_phi_reg_pp2_iter0_imgblock_1_9_V_1230_reg_1111;
end if;
end if;
end if;
end process;
ap_phi_reg_pp2_iter1_imgblock_2_6_V_1233_reg_1098_assign_proc : process (ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if ((ap_const_boolean_1 = ap_condition_568)) then
if (((icmp_ln363_fu_2303_p2 = ap_const_lv1_0) and (icmp_ln335_fu_2292_p2 = ap_const_lv1_0))) then
ap_phi_reg_pp2_iter1_imgblock_2_6_V_1233_reg_1098 <= ap_const_lv10_0;
elsif ((ap_const_boolean_1 = ap_const_boolean_1)) then
ap_phi_reg_pp2_iter1_imgblock_2_6_V_1233_reg_1098 <= ap_phi_reg_pp2_iter0_imgblock_2_6_V_1233_reg_1098;
end if;
end if;
end if;
end process;
ap_phi_reg_pp2_iter1_imgblock_2_7_V_1234_reg_1085_assign_proc : process (ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if ((ap_const_boolean_1 = ap_condition_568)) then
if (((icmp_ln363_fu_2303_p2 = ap_const_lv1_0) and (icmp_ln335_fu_2292_p2 = ap_const_lv1_0))) then
ap_phi_reg_pp2_iter1_imgblock_2_7_V_1234_reg_1085 <= ap_const_lv10_0;
elsif ((ap_const_boolean_1 = ap_const_boolean_1)) then
ap_phi_reg_pp2_iter1_imgblock_2_7_V_1234_reg_1085 <= ap_phi_reg_pp2_iter0_imgblock_2_7_V_1234_reg_1085;
end if;
end if;
end if;
end process;
ap_phi_reg_pp2_iter1_imgblock_2_8_V_1235_reg_1072_assign_proc : process (ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if ((ap_const_boolean_1 = ap_condition_568)) then
if (((icmp_ln363_fu_2303_p2 = ap_const_lv1_0) and (icmp_ln335_fu_2292_p2 = ap_const_lv1_0))) then
ap_phi_reg_pp2_iter1_imgblock_2_8_V_1235_reg_1072 <= ap_const_lv10_0;
elsif ((ap_const_boolean_1 = ap_const_boolean_1)) then
ap_phi_reg_pp2_iter1_imgblock_2_8_V_1235_reg_1072 <= ap_phi_reg_pp2_iter0_imgblock_2_8_V_1235_reg_1072;
end if;
end if;
end if;
end process;
ap_phi_reg_pp2_iter1_imgblock_2_9_V_1236_reg_1059_assign_proc : process (ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if ((ap_const_boolean_1 = ap_condition_568)) then
if (((icmp_ln363_fu_2303_p2 = ap_const_lv1_0) and (icmp_ln335_fu_2292_p2 = ap_const_lv1_0))) then
ap_phi_reg_pp2_iter1_imgblock_2_9_V_1236_reg_1059 <= ap_const_lv10_0;
elsif ((ap_const_boolean_1 = ap_const_boolean_1)) then
ap_phi_reg_pp2_iter1_imgblock_2_9_V_1236_reg_1059 <= ap_phi_reg_pp2_iter0_imgblock_2_9_V_1236_reg_1059;
end if;
end if;
end if;
end process;
ap_phi_reg_pp2_iter1_imgblock_3_6_V_1239_reg_1046_assign_proc : process (ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if ((ap_const_boolean_1 = ap_condition_568)) then
if (((icmp_ln363_fu_2303_p2 = ap_const_lv1_0) and (icmp_ln335_fu_2292_p2 = ap_const_lv1_0))) then
ap_phi_reg_pp2_iter1_imgblock_3_6_V_1239_reg_1046 <= ap_const_lv10_0;
elsif ((ap_const_boolean_1 = ap_const_boolean_1)) then
ap_phi_reg_pp2_iter1_imgblock_3_6_V_1239_reg_1046 <= ap_phi_reg_pp2_iter0_imgblock_3_6_V_1239_reg_1046;
end if;
end if;
end if;
end process;
ap_phi_reg_pp2_iter1_imgblock_3_7_V_1240_reg_1033_assign_proc : process (ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if ((ap_const_boolean_1 = ap_condition_568)) then
if (((icmp_ln363_fu_2303_p2 = ap_const_lv1_0) and (icmp_ln335_fu_2292_p2 = ap_const_lv1_0))) then
ap_phi_reg_pp2_iter1_imgblock_3_7_V_1240_reg_1033 <= ap_const_lv10_0;
elsif ((ap_const_boolean_1 = ap_const_boolean_1)) then
ap_phi_reg_pp2_iter1_imgblock_3_7_V_1240_reg_1033 <= ap_phi_reg_pp2_iter0_imgblock_3_7_V_1240_reg_1033;
end if;
end if;
end if;
end process;
ap_phi_reg_pp2_iter1_imgblock_3_8_V_1241_reg_1020_assign_proc : process (ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if ((ap_const_boolean_1 = ap_condition_568)) then
if (((icmp_ln363_fu_2303_p2 = ap_const_lv1_0) and (icmp_ln335_fu_2292_p2 = ap_const_lv1_0))) then
ap_phi_reg_pp2_iter1_imgblock_3_8_V_1241_reg_1020 <= ap_const_lv10_0;
elsif ((ap_const_boolean_1 = ap_const_boolean_1)) then
ap_phi_reg_pp2_iter1_imgblock_3_8_V_1241_reg_1020 <= ap_phi_reg_pp2_iter0_imgblock_3_8_V_1241_reg_1020;
end if;
end if;
end if;
end process;
ap_phi_reg_pp2_iter1_imgblock_3_9_V_1242_reg_1007_assign_proc : process (ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if ((ap_const_boolean_1 = ap_condition_568)) then
if (((icmp_ln363_fu_2303_p2 = ap_const_lv1_0) and (icmp_ln335_fu_2292_p2 = ap_const_lv1_0))) then
ap_phi_reg_pp2_iter1_imgblock_3_9_V_1242_reg_1007 <= ap_const_lv10_0;
elsif ((ap_const_boolean_1 = ap_const_boolean_1)) then
ap_phi_reg_pp2_iter1_imgblock_3_9_V_1242_reg_1007 <= ap_phi_reg_pp2_iter0_imgblock_3_9_V_1242_reg_1007;
end if;
end if;
end if;
end process;
ap_phi_reg_pp2_iter1_imgblock_4_6_V_0_reg_959_assign_proc : process (ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if ((ap_const_boolean_1 = ap_condition_568)) then
if (((icmp_ln363_fu_2303_p2 = ap_const_lv1_0) and (icmp_ln335_fu_2292_p2 = ap_const_lv1_0))) then
ap_phi_reg_pp2_iter1_imgblock_4_6_V_0_reg_959 <= ap_const_lv10_0;
elsif ((ap_const_boolean_1 = ap_const_boolean_1)) then
ap_phi_reg_pp2_iter1_imgblock_4_6_V_0_reg_959 <= ap_phi_reg_pp2_iter0_imgblock_4_6_V_0_reg_959;
end if;
end if;
end if;
end process;
ap_phi_reg_pp2_iter1_imgblock_4_7_V_0_reg_971_assign_proc : process (ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if ((ap_const_boolean_1 = ap_condition_568)) then
if (((icmp_ln363_fu_2303_p2 = ap_const_lv1_0) and (icmp_ln335_fu_2292_p2 = ap_const_lv1_0))) then
ap_phi_reg_pp2_iter1_imgblock_4_7_V_0_reg_971 <= ap_const_lv10_0;
elsif ((ap_const_boolean_1 = ap_const_boolean_1)) then
ap_phi_reg_pp2_iter1_imgblock_4_7_V_0_reg_971 <= ap_phi_reg_pp2_iter0_imgblock_4_7_V_0_reg_971;
end if;
end if;
end if;
end process;
ap_phi_reg_pp2_iter1_imgblock_4_8_V_0_reg_983_assign_proc : process (ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if ((ap_const_boolean_1 = ap_condition_568)) then
if (((icmp_ln363_fu_2303_p2 = ap_const_lv1_0) and (icmp_ln335_fu_2292_p2 = ap_const_lv1_0))) then
ap_phi_reg_pp2_iter1_imgblock_4_8_V_0_reg_983 <= ap_const_lv10_0;
elsif ((ap_const_boolean_1 = ap_const_boolean_1)) then
ap_phi_reg_pp2_iter1_imgblock_4_8_V_0_reg_983 <= ap_phi_reg_pp2_iter0_imgblock_4_8_V_0_reg_983;
end if;
end if;
end if;
end process;
ap_phi_reg_pp2_iter1_imgblock_4_9_V_0_reg_995_assign_proc : process (ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if ((ap_const_boolean_1 = ap_condition_568)) then
if (((icmp_ln363_fu_2303_p2 = ap_const_lv1_0) and (icmp_ln335_fu_2292_p2 = ap_const_lv1_0))) then
ap_phi_reg_pp2_iter1_imgblock_4_9_V_0_reg_995 <= ap_const_lv10_0;
elsif ((ap_const_boolean_1 = ap_const_boolean_1)) then
ap_phi_reg_pp2_iter1_imgblock_4_9_V_0_reg_995 <= ap_phi_reg_pp2_iter0_imgblock_4_9_V_0_reg_995;
end if;
end if;
end if;
end process;
ap_phi_reg_pp2_iter1_p_Val2_s_reg_678_assign_proc : process (ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if ((ap_const_boolean_1 = ap_condition_568)) then
if (((icmp_ln343_reg_3029 = ap_const_lv1_0) and (icmp_ln335_fu_2292_p2 = ap_const_lv1_0))) then
ap_phi_reg_pp2_iter1_p_Val2_s_reg_678 <= ap_const_lv40_0;
elsif ((ap_const_boolean_1 = ap_const_boolean_1)) then
ap_phi_reg_pp2_iter1_p_Val2_s_reg_678 <= ap_phi_reg_pp2_iter0_p_Val2_s_reg_678;
end if;
end if;
end if;
end process;
ap_phi_reg_pp2_iter2_imgblock_0_6_V_1221_reg_1202_assign_proc : process (ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if ((ap_const_boolean_1 = ap_condition_640)) then
if (((icmp_ln363_reg_3126 = ap_const_lv1_1) and (icmp_ln335_reg_3117 = ap_const_lv1_0))) then
ap_phi_reg_pp2_iter2_imgblock_0_6_V_1221_reg_1202 <= imgblock_0_6_V_2_fu_2356_p1;
elsif ((ap_const_boolean_1 = ap_const_boolean_1)) then
ap_phi_reg_pp2_iter2_imgblock_0_6_V_1221_reg_1202 <= ap_phi_reg_pp2_iter1_imgblock_0_6_V_1221_reg_1202;
end if;
end if;
end if;
end process;
ap_phi_reg_pp2_iter2_imgblock_0_7_V_1222_reg_1189_assign_proc : process (ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if ((ap_const_boolean_1 = ap_condition_640)) then
if (((icmp_ln363_reg_3126 = ap_const_lv1_1) and (icmp_ln335_reg_3117 = ap_const_lv1_0))) then
ap_phi_reg_pp2_iter2_imgblock_0_7_V_1222_reg_1189 <= grp_fu_1627_p6(19 downto 10);
elsif ((ap_const_boolean_1 = ap_const_boolean_1)) then
ap_phi_reg_pp2_iter2_imgblock_0_7_V_1222_reg_1189 <= ap_phi_reg_pp2_iter1_imgblock_0_7_V_1222_reg_1189;
end if;
end if;
end if;
end process;
ap_phi_reg_pp2_iter2_imgblock_0_8_V_1223_reg_1176_assign_proc : process (ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if ((ap_const_boolean_1 = ap_condition_640)) then
if (((icmp_ln363_reg_3126 = ap_const_lv1_1) and (icmp_ln335_reg_3117 = ap_const_lv1_0))) then
ap_phi_reg_pp2_iter2_imgblock_0_8_V_1223_reg_1176 <= grp_fu_1627_p6(29 downto 20);
elsif ((ap_const_boolean_1 = ap_const_boolean_1)) then
ap_phi_reg_pp2_iter2_imgblock_0_8_V_1223_reg_1176 <= ap_phi_reg_pp2_iter1_imgblock_0_8_V_1223_reg_1176;
end if;
end if;
end if;
end process;
ap_phi_reg_pp2_iter2_imgblock_0_9_V_1224_reg_1163_assign_proc : process (ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if ((ap_const_boolean_1 = ap_condition_640)) then
if (((icmp_ln363_reg_3126 = ap_const_lv1_1) and (icmp_ln335_reg_3117 = ap_const_lv1_0))) then
ap_phi_reg_pp2_iter2_imgblock_0_9_V_1224_reg_1163 <= grp_fu_1627_p6(39 downto 30);
elsif ((ap_const_boolean_1 = ap_const_boolean_1)) then
ap_phi_reg_pp2_iter2_imgblock_0_9_V_1224_reg_1163 <= ap_phi_reg_pp2_iter1_imgblock_0_9_V_1224_reg_1163;
end if;
end if;
end if;
end process;
ap_phi_reg_pp2_iter2_imgblock_1_6_V_1227_reg_1150_assign_proc : process (ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if ((ap_const_boolean_1 = ap_condition_640)) then
if (((icmp_ln363_reg_3126 = ap_const_lv1_1) and (icmp_ln335_reg_3117 = ap_const_lv1_0))) then
ap_phi_reg_pp2_iter2_imgblock_1_6_V_1227_reg_1150 <= imgblock_1_6_V_2_fu_2360_p1;
elsif ((ap_const_boolean_1 = ap_const_boolean_1)) then
ap_phi_reg_pp2_iter2_imgblock_1_6_V_1227_reg_1150 <= ap_phi_reg_pp2_iter1_imgblock_1_6_V_1227_reg_1150;
end if;
end if;
end if;
end process;
ap_phi_reg_pp2_iter2_imgblock_1_7_V_1228_reg_1137_assign_proc : process (ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if ((ap_const_boolean_1 = ap_condition_640)) then
if (((icmp_ln363_reg_3126 = ap_const_lv1_1) and (icmp_ln335_reg_3117 = ap_const_lv1_0))) then
ap_phi_reg_pp2_iter2_imgblock_1_7_V_1228_reg_1137 <= grp_fu_1640_p6(19 downto 10);
elsif ((ap_const_boolean_1 = ap_const_boolean_1)) then
ap_phi_reg_pp2_iter2_imgblock_1_7_V_1228_reg_1137 <= ap_phi_reg_pp2_iter1_imgblock_1_7_V_1228_reg_1137;
end if;
end if;
end if;
end process;
ap_phi_reg_pp2_iter2_imgblock_1_8_V_1229_reg_1124_assign_proc : process (ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if ((ap_const_boolean_1 = ap_condition_640)) then
if (((icmp_ln363_reg_3126 = ap_const_lv1_1) and (icmp_ln335_reg_3117 = ap_const_lv1_0))) then
ap_phi_reg_pp2_iter2_imgblock_1_8_V_1229_reg_1124 <= grp_fu_1640_p6(29 downto 20);
elsif ((ap_const_boolean_1 = ap_const_boolean_1)) then
ap_phi_reg_pp2_iter2_imgblock_1_8_V_1229_reg_1124 <= ap_phi_reg_pp2_iter1_imgblock_1_8_V_1229_reg_1124;
end if;
end if;
end if;
end process;
ap_phi_reg_pp2_iter2_imgblock_1_9_V_1230_reg_1111_assign_proc : process (ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if ((ap_const_boolean_1 = ap_condition_640)) then
if (((icmp_ln363_reg_3126 = ap_const_lv1_1) and (icmp_ln335_reg_3117 = ap_const_lv1_0))) then
ap_phi_reg_pp2_iter2_imgblock_1_9_V_1230_reg_1111 <= grp_fu_1640_p6(39 downto 30);
elsif ((ap_const_boolean_1 = ap_const_boolean_1)) then
ap_phi_reg_pp2_iter2_imgblock_1_9_V_1230_reg_1111 <= ap_phi_reg_pp2_iter1_imgblock_1_9_V_1230_reg_1111;
end if;
end if;
end if;
end process;
ap_phi_reg_pp2_iter2_imgblock_2_6_V_1233_reg_1098_assign_proc : process (ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if ((ap_const_boolean_1 = ap_condition_640)) then
if (((icmp_ln363_reg_3126 = ap_const_lv1_1) and (icmp_ln335_reg_3117 = ap_const_lv1_0))) then
ap_phi_reg_pp2_iter2_imgblock_2_6_V_1233_reg_1098 <= imgblock_2_6_V_2_fu_2364_p1;
elsif ((ap_const_boolean_1 = ap_const_boolean_1)) then
ap_phi_reg_pp2_iter2_imgblock_2_6_V_1233_reg_1098 <= ap_phi_reg_pp2_iter1_imgblock_2_6_V_1233_reg_1098;
end if;
end if;
end if;
end process;
ap_phi_reg_pp2_iter2_imgblock_2_7_V_1234_reg_1085_assign_proc : process (ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if ((ap_const_boolean_1 = ap_condition_640)) then
if (((icmp_ln363_reg_3126 = ap_const_lv1_1) and (icmp_ln335_reg_3117 = ap_const_lv1_0))) then
ap_phi_reg_pp2_iter2_imgblock_2_7_V_1234_reg_1085 <= grp_fu_1653_p6(19 downto 10);
elsif ((ap_const_boolean_1 = ap_const_boolean_1)) then
ap_phi_reg_pp2_iter2_imgblock_2_7_V_1234_reg_1085 <= ap_phi_reg_pp2_iter1_imgblock_2_7_V_1234_reg_1085;
end if;
end if;
end if;
end process;
ap_phi_reg_pp2_iter2_imgblock_2_8_V_1235_reg_1072_assign_proc : process (ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if ((ap_const_boolean_1 = ap_condition_640)) then
if (((icmp_ln363_reg_3126 = ap_const_lv1_1) and (icmp_ln335_reg_3117 = ap_const_lv1_0))) then
ap_phi_reg_pp2_iter2_imgblock_2_8_V_1235_reg_1072 <= grp_fu_1653_p6(29 downto 20);
elsif ((ap_const_boolean_1 = ap_const_boolean_1)) then
ap_phi_reg_pp2_iter2_imgblock_2_8_V_1235_reg_1072 <= ap_phi_reg_pp2_iter1_imgblock_2_8_V_1235_reg_1072;
end if;
end if;
end if;
end process;
ap_phi_reg_pp2_iter2_imgblock_2_9_V_1236_reg_1059_assign_proc : process (ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if ((ap_const_boolean_1 = ap_condition_640)) then
if (((icmp_ln363_reg_3126 = ap_const_lv1_1) and (icmp_ln335_reg_3117 = ap_const_lv1_0))) then
ap_phi_reg_pp2_iter2_imgblock_2_9_V_1236_reg_1059 <= grp_fu_1653_p6(39 downto 30);
elsif ((ap_const_boolean_1 = ap_const_boolean_1)) then
ap_phi_reg_pp2_iter2_imgblock_2_9_V_1236_reg_1059 <= ap_phi_reg_pp2_iter1_imgblock_2_9_V_1236_reg_1059;
end if;
end if;
end if;
end process;
ap_phi_reg_pp2_iter2_imgblock_3_6_V_1239_reg_1046_assign_proc : process (ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if ((ap_const_boolean_1 = ap_condition_640)) then
if (((icmp_ln363_reg_3126 = ap_const_lv1_1) and (icmp_ln335_reg_3117 = ap_const_lv1_0))) then
ap_phi_reg_pp2_iter2_imgblock_3_6_V_1239_reg_1046 <= imgblock_3_6_V_2_fu_2368_p1;
elsif ((ap_const_boolean_1 = ap_const_boolean_1)) then
ap_phi_reg_pp2_iter2_imgblock_3_6_V_1239_reg_1046 <= ap_phi_reg_pp2_iter1_imgblock_3_6_V_1239_reg_1046;
end if;
end if;
end if;
end process;
ap_phi_reg_pp2_iter2_imgblock_3_7_V_1240_reg_1033_assign_proc : process (ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if ((ap_const_boolean_1 = ap_condition_640)) then
if (((icmp_ln363_reg_3126 = ap_const_lv1_1) and (icmp_ln335_reg_3117 = ap_const_lv1_0))) then
ap_phi_reg_pp2_iter2_imgblock_3_7_V_1240_reg_1033 <= grp_fu_1666_p6(19 downto 10);
elsif ((ap_const_boolean_1 = ap_const_boolean_1)) then
ap_phi_reg_pp2_iter2_imgblock_3_7_V_1240_reg_1033 <= ap_phi_reg_pp2_iter1_imgblock_3_7_V_1240_reg_1033;
end if;
end if;
end if;
end process;
ap_phi_reg_pp2_iter2_imgblock_3_8_V_1241_reg_1020_assign_proc : process (ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if ((ap_const_boolean_1 = ap_condition_640)) then
if (((icmp_ln363_reg_3126 = ap_const_lv1_1) and (icmp_ln335_reg_3117 = ap_const_lv1_0))) then
ap_phi_reg_pp2_iter2_imgblock_3_8_V_1241_reg_1020 <= grp_fu_1666_p6(29 downto 20);
elsif ((ap_const_boolean_1 = ap_const_boolean_1)) then
ap_phi_reg_pp2_iter2_imgblock_3_8_V_1241_reg_1020 <= ap_phi_reg_pp2_iter1_imgblock_3_8_V_1241_reg_1020;
end if;
end if;
end if;
end process;
ap_phi_reg_pp2_iter2_imgblock_3_9_V_1242_reg_1007_assign_proc : process (ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if ((ap_const_boolean_1 = ap_condition_640)) then
if (((icmp_ln363_reg_3126 = ap_const_lv1_1) and (icmp_ln335_reg_3117 = ap_const_lv1_0))) then
ap_phi_reg_pp2_iter2_imgblock_3_9_V_1242_reg_1007 <= grp_fu_1666_p6(39 downto 30);
elsif ((ap_const_boolean_1 = ap_const_boolean_1)) then
ap_phi_reg_pp2_iter2_imgblock_3_9_V_1242_reg_1007 <= ap_phi_reg_pp2_iter1_imgblock_3_9_V_1242_reg_1007;
end if;
end if;
end if;
end process;
ap_phi_reg_pp2_iter2_imgblock_4_6_V_0_reg_959_assign_proc : process (ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if ((ap_const_boolean_1 = ap_condition_640)) then
if (((icmp_ln363_reg_3126 = ap_const_lv1_1) and (icmp_ln335_reg_3117 = ap_const_lv1_0))) then
ap_phi_reg_pp2_iter2_imgblock_4_6_V_0_reg_959 <= imgblock_4_2_V_fu_2322_p1;
elsif ((ap_const_boolean_1 = ap_const_boolean_1)) then
ap_phi_reg_pp2_iter2_imgblock_4_6_V_0_reg_959 <= ap_phi_reg_pp2_iter1_imgblock_4_6_V_0_reg_959;
end if;
end if;
end if;
end process;
ap_phi_reg_pp2_iter2_imgblock_4_7_V_0_reg_971_assign_proc : process (ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if ((ap_const_boolean_1 = ap_condition_640)) then
if (((icmp_ln363_reg_3126 = ap_const_lv1_1) and (icmp_ln335_reg_3117 = ap_const_lv1_0))) then
ap_phi_reg_pp2_iter2_imgblock_4_7_V_0_reg_971 <= ap_phi_mux_p_Val2_s_phi_fu_686_p4(19 downto 10);
elsif ((ap_const_boolean_1 = ap_const_boolean_1)) then
ap_phi_reg_pp2_iter2_imgblock_4_7_V_0_reg_971 <= ap_phi_reg_pp2_iter1_imgblock_4_7_V_0_reg_971;
end if;
end if;
end if;
end process;
ap_phi_reg_pp2_iter2_imgblock_4_8_V_0_reg_983_assign_proc : process (ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if ((ap_const_boolean_1 = ap_condition_640)) then
if (((icmp_ln363_reg_3126 = ap_const_lv1_1) and (icmp_ln335_reg_3117 = ap_const_lv1_0))) then
ap_phi_reg_pp2_iter2_imgblock_4_8_V_0_reg_983 <= ap_phi_mux_p_Val2_s_phi_fu_686_p4(29 downto 20);
elsif ((ap_const_boolean_1 = ap_const_boolean_1)) then
ap_phi_reg_pp2_iter2_imgblock_4_8_V_0_reg_983 <= ap_phi_reg_pp2_iter1_imgblock_4_8_V_0_reg_983;
end if;
end if;
end if;
end process;
ap_phi_reg_pp2_iter2_imgblock_4_9_V_0_reg_995_assign_proc : process (ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if ((ap_const_boolean_1 = ap_condition_640)) then
if (((icmp_ln363_reg_3126 = ap_const_lv1_1) and (icmp_ln335_reg_3117 = ap_const_lv1_0))) then
ap_phi_reg_pp2_iter2_imgblock_4_9_V_0_reg_995 <= ap_phi_mux_p_Val2_s_phi_fu_686_p4(39 downto 30);
elsif ((ap_const_boolean_1 = ap_const_boolean_1)) then
ap_phi_reg_pp2_iter2_imgblock_4_9_V_0_reg_995 <= ap_phi_reg_pp2_iter1_imgblock_4_9_V_0_reg_995;
end if;
end if;
end if;
end process;
bram_read_count_0_i_reg_667_assign_proc : process (ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if (((icmp_ln335_fu_2292_p2 = ap_const_lv1_0) and (ap_const_logic_1 = ap_CS_fsm_pp2_stage0) and (ap_enable_reg_pp2_iter0 = ap_const_logic_1) and (ap_const_boolean_0 = ap_block_pp2_stage0_11001))) then
bram_read_count_0_i_reg_667 <= bram_read_count_fu_2316_p2;
elsif ((ap_const_logic_1 = ap_CS_fsm_state8)) then
bram_read_count_0_i_reg_667 <= ap_const_lv15_1;
end if;
end if;
end process;
i9_0_i_reg_544_assign_proc : process (ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if ((ap_const_logic_1 = ap_CS_fsm_state18)) then
i9_0_i_reg_544 <= i_1_reg_2949;
elsif ((ap_const_logic_1 = ap_CS_fsm_state4)) then
i9_0_i_reg_544 <= ap_const_lv16_0;
end if;
end if;
end process;
i_0_i_reg_404_assign_proc : process (ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if (((icmp_ln257_reg_2860 = ap_const_lv1_0) and (ap_const_boolean_0 = ap_block_pp0_stage0_11001) and (ap_enable_reg_pp0_iter1 = ap_const_logic_1) and (ap_const_logic_1 = ap_CS_fsm_pp0_stage0))) then
i_0_i_reg_404 <= select_ln261_1_reg_2869;
elsif ((not(((src_mat_cols_empty_n = ap_const_logic_0) or (src_mat_rows_empty_n = ap_const_logic_0) or (ap_start = ap_const_logic_0) or (ap_done_reg = ap_const_logic_1))) and (ap_const_logic_1 = ap_CS_fsm_state1))) then
i_0_i_reg_404 <= ap_const_lv2_0;
end if;
end if;
end process;
imgblock_0_0_V_reg_946_assign_proc : process (ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if (((icmp_ln335_reg_3117_pp2_iter2_reg = ap_const_lv1_0) and (ap_enable_reg_pp2_iter3 = ap_const_logic_1) and (ap_const_boolean_0 = ap_block_pp2_stage0_11001))) then
imgblock_0_0_V_reg_946 <= imgblock_0_4_V_reg_903;
elsif ((ap_const_logic_1 = ap_CS_fsm_state8)) then
imgblock_0_0_V_reg_946 <= imgblock_0_4_V_1219_reg_633;
end if;
end if;
end process;
imgblock_0_1_V_reg_933_assign_proc : process (ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if (((icmp_ln335_reg_3117_pp2_iter2_reg = ap_const_lv1_0) and (ap_enable_reg_pp2_iter3 = ap_const_logic_1) and (ap_const_boolean_0 = ap_block_pp2_stage0_11001))) then
imgblock_0_1_V_reg_933 <= imgblock_0_5_V_reg_893;
elsif ((ap_const_logic_1 = ap_CS_fsm_state8)) then
imgblock_0_1_V_reg_933 <= imgblock_0_5_V_1_reg_622;
end if;
end if;
end process;
imgblock_0_2_V_reg_923_assign_proc : process (ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if (((icmp_ln335_reg_3117_pp2_iter2_reg = ap_const_lv1_0) and (ap_enable_reg_pp2_iter3 = ap_const_logic_1) and (ap_const_boolean_0 = ap_block_pp2_stage0_11001))) then
imgblock_0_2_V_reg_923 <= imgblock_0_6_V_1221_reg_1202;
elsif ((ap_const_logic_1 = ap_CS_fsm_state8)) then
imgblock_0_2_V_reg_923 <= imgblock_0_6_V_fu_2269_p1;
end if;
end if;
end process;
imgblock_0_3_V_reg_913_assign_proc : process (ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if (((icmp_ln335_reg_3117_pp2_iter2_reg = ap_const_lv1_0) and (ap_enable_reg_pp2_iter3 = ap_const_logic_1) and (ap_const_boolean_0 = ap_block_pp2_stage0_11001))) then
imgblock_0_3_V_reg_913 <= imgblock_0_7_V_1222_reg_1189;
elsif ((ap_const_logic_1 = ap_CS_fsm_state8)) then
imgblock_0_3_V_reg_913 <= grp_fu_1627_p6(19 downto 10);
end if;
end if;
end process;
imgblock_0_4_V_1219_reg_633_assign_proc : process (ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if (((icmp_ln310_fu_2077_p2 = ap_const_lv1_0) and (ap_const_logic_1 = ap_CS_fsm_state6))) then
imgblock_0_4_V_1219_reg_633 <= imgblock_0_4_V_2_fu_2089_p10;
elsif (((icmp_ln277_fu_1900_p2 = ap_const_lv1_0) and (ap_const_logic_1 = ap_CS_fsm_state5))) then
imgblock_0_4_V_1219_reg_633 <= imgblock_0_4_V_0_reg_510;
end if;
end if;
end process;
imgblock_0_4_V_reg_903_assign_proc : process (ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if (((icmp_ln335_reg_3117_pp2_iter2_reg = ap_const_lv1_0) and (ap_enable_reg_pp2_iter3 = ap_const_logic_1) and (ap_const_boolean_0 = ap_block_pp2_stage0_11001))) then
imgblock_0_4_V_reg_903 <= imgblock_0_8_V_1223_reg_1176;
elsif ((ap_const_logic_1 = ap_CS_fsm_state8)) then
imgblock_0_4_V_reg_903 <= grp_fu_1627_p6(29 downto 20);
end if;
end if;
end process;
imgblock_0_5_V_1_reg_622_assign_proc : process (ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if (((icmp_ln310_fu_2077_p2 = ap_const_lv1_0) and (ap_const_logic_1 = ap_CS_fsm_state6))) then
imgblock_0_5_V_1_reg_622 <= imgblock_0_5_V_s_fu_2111_p10;
elsif (((icmp_ln277_fu_1900_p2 = ap_const_lv1_0) and (ap_const_logic_1 = ap_CS_fsm_state5))) then
imgblock_0_5_V_1_reg_622 <= imgblock_0_5_V_0_reg_498;
end if;
end if;
end process;
imgblock_0_5_V_reg_893_assign_proc : process (ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if (((icmp_ln335_reg_3117_pp2_iter2_reg = ap_const_lv1_0) and (ap_enable_reg_pp2_iter3 = ap_const_logic_1) and (ap_const_boolean_0 = ap_block_pp2_stage0_11001))) then
imgblock_0_5_V_reg_893 <= imgblock_0_9_V_1224_reg_1163;
elsif ((ap_const_logic_1 = ap_CS_fsm_state8)) then
imgblock_0_5_V_reg_893 <= grp_fu_1627_p6(39 downto 30);
end if;
end if;
end process;
imgblock_1_0_V_reg_880_assign_proc : process (ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if (((icmp_ln335_reg_3117_pp2_iter2_reg = ap_const_lv1_0) and (ap_enable_reg_pp2_iter3 = ap_const_logic_1) and (ap_const_boolean_0 = ap_block_pp2_stage0_11001))) then
imgblock_1_0_V_reg_880 <= imgblock_1_4_V_reg_837;
elsif ((ap_const_logic_1 = ap_CS_fsm_state8)) then
imgblock_1_0_V_reg_880 <= imgblock_1_4_V_1225_reg_611;
end if;
end if;
end process;
imgblock_1_1_V_reg_867_assign_proc : process (ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if (((icmp_ln335_reg_3117_pp2_iter2_reg = ap_const_lv1_0) and (ap_enable_reg_pp2_iter3 = ap_const_logic_1) and (ap_const_boolean_0 = ap_block_pp2_stage0_11001))) then
imgblock_1_1_V_reg_867 <= imgblock_1_5_V_reg_827;
elsif ((ap_const_logic_1 = ap_CS_fsm_state8)) then
imgblock_1_1_V_reg_867 <= imgblock_1_5_V_1_reg_600;
end if;
end if;
end process;
imgblock_1_2_V_reg_857_assign_proc : process (ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if (((icmp_ln335_reg_3117_pp2_iter2_reg = ap_const_lv1_0) and (ap_enable_reg_pp2_iter3 = ap_const_logic_1) and (ap_const_boolean_0 = ap_block_pp2_stage0_11001))) then
imgblock_1_2_V_reg_857 <= imgblock_1_6_V_1227_reg_1150;
elsif ((ap_const_logic_1 = ap_CS_fsm_state8)) then
imgblock_1_2_V_reg_857 <= imgblock_1_6_V_fu_2273_p1;
end if;
end if;
end process;
imgblock_1_3_V_reg_847_assign_proc : process (ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if (((icmp_ln335_reg_3117_pp2_iter2_reg = ap_const_lv1_0) and (ap_enable_reg_pp2_iter3 = ap_const_logic_1) and (ap_const_boolean_0 = ap_block_pp2_stage0_11001))) then
imgblock_1_3_V_reg_847 <= imgblock_1_7_V_1228_reg_1137;
elsif ((ap_const_logic_1 = ap_CS_fsm_state8)) then
imgblock_1_3_V_reg_847 <= grp_fu_1640_p6(19 downto 10);
end if;
end if;
end process;
imgblock_1_4_V_1225_reg_611_assign_proc : process (ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if (((icmp_ln310_fu_2077_p2 = ap_const_lv1_0) and (ap_const_logic_1 = ap_CS_fsm_state6))) then
imgblock_1_4_V_1225_reg_611 <= imgblock_1_4_V_2_fu_2133_p10;
elsif (((icmp_ln277_fu_1900_p2 = ap_const_lv1_0) and (ap_const_logic_1 = ap_CS_fsm_state5))) then
imgblock_1_4_V_1225_reg_611 <= imgblock_1_4_V_0_reg_486;
end if;
end if;
end process;
imgblock_1_4_V_reg_837_assign_proc : process (ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if (((icmp_ln335_reg_3117_pp2_iter2_reg = ap_const_lv1_0) and (ap_enable_reg_pp2_iter3 = ap_const_logic_1) and (ap_const_boolean_0 = ap_block_pp2_stage0_11001))) then
imgblock_1_4_V_reg_837 <= imgblock_1_8_V_1229_reg_1124;
elsif ((ap_const_logic_1 = ap_CS_fsm_state8)) then
imgblock_1_4_V_reg_837 <= grp_fu_1640_p6(29 downto 20);
end if;
end if;
end process;
imgblock_1_5_V_1_reg_600_assign_proc : process (ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if (((icmp_ln310_fu_2077_p2 = ap_const_lv1_0) and (ap_const_logic_1 = ap_CS_fsm_state6))) then
imgblock_1_5_V_1_reg_600 <= imgblock_1_5_V_s_fu_2155_p10;
elsif (((icmp_ln277_fu_1900_p2 = ap_const_lv1_0) and (ap_const_logic_1 = ap_CS_fsm_state5))) then
imgblock_1_5_V_1_reg_600 <= imgblock_1_5_V_0_reg_474;
end if;
end if;
end process;
imgblock_1_5_V_reg_827_assign_proc : process (ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if (((icmp_ln335_reg_3117_pp2_iter2_reg = ap_const_lv1_0) and (ap_enable_reg_pp2_iter3 = ap_const_logic_1) and (ap_const_boolean_0 = ap_block_pp2_stage0_11001))) then
imgblock_1_5_V_reg_827 <= imgblock_1_9_V_1230_reg_1111;
elsif ((ap_const_logic_1 = ap_CS_fsm_state8)) then
imgblock_1_5_V_reg_827 <= grp_fu_1640_p6(39 downto 30);
end if;
end if;
end process;
imgblock_2_0_V_reg_814_assign_proc : process (ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if (((icmp_ln335_reg_3117_pp2_iter2_reg = ap_const_lv1_0) and (ap_enable_reg_pp2_iter3 = ap_const_logic_1) and (ap_const_boolean_0 = ap_block_pp2_stage0_11001))) then
imgblock_2_0_V_reg_814 <= imgblock_2_4_V_reg_771;
elsif ((ap_const_logic_1 = ap_CS_fsm_state8)) then
imgblock_2_0_V_reg_814 <= imgblock_2_4_V_1231_reg_589;
end if;
end if;
end process;
imgblock_2_1_V_reg_801_assign_proc : process (ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if (((icmp_ln335_reg_3117_pp2_iter2_reg = ap_const_lv1_0) and (ap_enable_reg_pp2_iter3 = ap_const_logic_1) and (ap_const_boolean_0 = ap_block_pp2_stage0_11001))) then
imgblock_2_1_V_reg_801 <= imgblock_2_5_V_reg_761;
elsif ((ap_const_logic_1 = ap_CS_fsm_state8)) then
imgblock_2_1_V_reg_801 <= imgblock_2_5_V_1_reg_578;
end if;
end if;
end process;
imgblock_2_2_V_reg_791_assign_proc : process (ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if (((icmp_ln335_reg_3117_pp2_iter2_reg = ap_const_lv1_0) and (ap_enable_reg_pp2_iter3 = ap_const_logic_1) and (ap_const_boolean_0 = ap_block_pp2_stage0_11001))) then
imgblock_2_2_V_reg_791 <= imgblock_2_6_V_1233_reg_1098;
elsif ((ap_const_logic_1 = ap_CS_fsm_state8)) then
imgblock_2_2_V_reg_791 <= imgblock_2_6_V_fu_2277_p1;
end if;
end if;
end process;
imgblock_2_3_V_reg_781_assign_proc : process (ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if (((icmp_ln335_reg_3117_pp2_iter2_reg = ap_const_lv1_0) and (ap_enable_reg_pp2_iter3 = ap_const_logic_1) and (ap_const_boolean_0 = ap_block_pp2_stage0_11001))) then
imgblock_2_3_V_reg_781 <= imgblock_2_7_V_1234_reg_1085;
elsif ((ap_const_logic_1 = ap_CS_fsm_state8)) then
imgblock_2_3_V_reg_781 <= grp_fu_1653_p6(19 downto 10);
end if;
end if;
end process;
imgblock_2_4_V_1231_reg_589_assign_proc : process (ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if (((icmp_ln310_fu_2077_p2 = ap_const_lv1_0) and (ap_const_logic_1 = ap_CS_fsm_state6))) then
imgblock_2_4_V_1231_reg_589 <= imgblock_2_4_V_2_fu_2177_p10;
elsif (((icmp_ln277_fu_1900_p2 = ap_const_lv1_0) and (ap_const_logic_1 = ap_CS_fsm_state5))) then
imgblock_2_4_V_1231_reg_589 <= imgblock_2_4_V_0_reg_462;
end if;
end if;
end process;
imgblock_2_4_V_reg_771_assign_proc : process (ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if (((icmp_ln335_reg_3117_pp2_iter2_reg = ap_const_lv1_0) and (ap_enable_reg_pp2_iter3 = ap_const_logic_1) and (ap_const_boolean_0 = ap_block_pp2_stage0_11001))) then
imgblock_2_4_V_reg_771 <= imgblock_2_8_V_1235_reg_1072;
elsif ((ap_const_logic_1 = ap_CS_fsm_state8)) then
imgblock_2_4_V_reg_771 <= grp_fu_1653_p6(29 downto 20);
end if;
end if;
end process;
imgblock_2_5_V_1_reg_578_assign_proc : process (ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if (((icmp_ln310_fu_2077_p2 = ap_const_lv1_0) and (ap_const_logic_1 = ap_CS_fsm_state6))) then
imgblock_2_5_V_1_reg_578 <= imgblock_2_5_V_s_fu_2199_p10;
elsif (((icmp_ln277_fu_1900_p2 = ap_const_lv1_0) and (ap_const_logic_1 = ap_CS_fsm_state5))) then
imgblock_2_5_V_1_reg_578 <= imgblock_2_5_V_0_reg_450;
end if;
end if;
end process;
imgblock_2_5_V_reg_761_assign_proc : process (ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if (((icmp_ln335_reg_3117_pp2_iter2_reg = ap_const_lv1_0) and (ap_enable_reg_pp2_iter3 = ap_const_logic_1) and (ap_const_boolean_0 = ap_block_pp2_stage0_11001))) then
imgblock_2_5_V_reg_761 <= imgblock_2_9_V_1236_reg_1059;
elsif ((ap_const_logic_1 = ap_CS_fsm_state8)) then
imgblock_2_5_V_reg_761 <= grp_fu_1653_p6(39 downto 30);
end if;
end if;
end process;
imgblock_3_0_V_reg_748_assign_proc : process (ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if (((icmp_ln335_reg_3117_pp2_iter2_reg = ap_const_lv1_0) and (ap_enable_reg_pp2_iter3 = ap_const_logic_1) and (ap_const_boolean_0 = ap_block_pp2_stage0_11001))) then
imgblock_3_0_V_reg_748 <= imgblock_3_4_V_reg_705;
elsif ((ap_const_logic_1 = ap_CS_fsm_state8)) then
imgblock_3_0_V_reg_748 <= imgblock_3_4_V_1237_reg_567;
end if;
end if;
end process;
imgblock_3_1_V_reg_735_assign_proc : process (ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if (((icmp_ln335_reg_3117_pp2_iter2_reg = ap_const_lv1_0) and (ap_enable_reg_pp2_iter3 = ap_const_logic_1) and (ap_const_boolean_0 = ap_block_pp2_stage0_11001))) then
imgblock_3_1_V_reg_735 <= imgblock_3_5_V_reg_695;
elsif ((ap_const_logic_1 = ap_CS_fsm_state8)) then
imgblock_3_1_V_reg_735 <= imgblock_3_5_V_1_reg_556;
end if;
end if;
end process;
imgblock_3_2_V_reg_725_assign_proc : process (ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if (((icmp_ln335_reg_3117_pp2_iter2_reg = ap_const_lv1_0) and (ap_enable_reg_pp2_iter3 = ap_const_logic_1) and (ap_const_boolean_0 = ap_block_pp2_stage0_11001))) then
imgblock_3_2_V_reg_725 <= imgblock_3_6_V_1239_reg_1046;
elsif ((ap_const_logic_1 = ap_CS_fsm_state8)) then
imgblock_3_2_V_reg_725 <= imgblock_3_6_V_fu_2281_p1;
end if;
end if;
end process;
imgblock_3_3_V_reg_715_assign_proc : process (ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if (((icmp_ln335_reg_3117_pp2_iter2_reg = ap_const_lv1_0) and (ap_enable_reg_pp2_iter3 = ap_const_logic_1) and (ap_const_boolean_0 = ap_block_pp2_stage0_11001))) then
imgblock_3_3_V_reg_715 <= imgblock_3_7_V_1240_reg_1033;
elsif ((ap_const_logic_1 = ap_CS_fsm_state8)) then
imgblock_3_3_V_reg_715 <= grp_fu_1666_p6(19 downto 10);
end if;
end if;
end process;
imgblock_3_4_V_1237_reg_567_assign_proc : process (ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if (((icmp_ln310_fu_2077_p2 = ap_const_lv1_0) and (ap_const_logic_1 = ap_CS_fsm_state6))) then
imgblock_3_4_V_1237_reg_567 <= imgblock_3_4_V_2_fu_2221_p10;
elsif (((icmp_ln277_fu_1900_p2 = ap_const_lv1_0) and (ap_const_logic_1 = ap_CS_fsm_state5))) then
imgblock_3_4_V_1237_reg_567 <= imgblock_3_4_V_0_reg_438;
end if;
end if;
end process;
imgblock_3_4_V_reg_705_assign_proc : process (ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if (((icmp_ln335_reg_3117_pp2_iter2_reg = ap_const_lv1_0) and (ap_enable_reg_pp2_iter3 = ap_const_logic_1) and (ap_const_boolean_0 = ap_block_pp2_stage0_11001))) then
imgblock_3_4_V_reg_705 <= imgblock_3_8_V_1241_reg_1020;
elsif ((ap_const_logic_1 = ap_CS_fsm_state8)) then
imgblock_3_4_V_reg_705 <= grp_fu_1666_p6(29 downto 20);
end if;
end if;
end process;
imgblock_3_5_V_1_reg_556_assign_proc : process (ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if (((icmp_ln310_fu_2077_p2 = ap_const_lv1_0) and (ap_const_logic_1 = ap_CS_fsm_state6))) then
imgblock_3_5_V_1_reg_556 <= imgblock_3_5_V_s_fu_2243_p10;
elsif (((icmp_ln277_fu_1900_p2 = ap_const_lv1_0) and (ap_const_logic_1 = ap_CS_fsm_state5))) then
imgblock_3_5_V_1_reg_556 <= imgblock_3_5_V_0_reg_426;
end if;
end if;
end process;
imgblock_3_5_V_reg_695_assign_proc : process (ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if (((icmp_ln335_reg_3117_pp2_iter2_reg = ap_const_lv1_0) and (ap_enable_reg_pp2_iter3 = ap_const_logic_1) and (ap_const_boolean_0 = ap_block_pp2_stage0_11001))) then
imgblock_3_5_V_reg_695 <= imgblock_3_9_V_1242_reg_1007;
elsif ((ap_const_logic_1 = ap_CS_fsm_state8)) then
imgblock_3_5_V_reg_695 <= grp_fu_1666_p6(39 downto 30);
end if;
end if;
end process;
indvar_flatten_reg_393_assign_proc : process (ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if (((icmp_ln257_fu_1825_p2 = ap_const_lv1_0) and (ap_const_boolean_0 = ap_block_pp0_stage0_11001) and (ap_const_logic_1 = ap_CS_fsm_pp0_stage0) and (ap_enable_reg_pp0_iter0 = ap_const_logic_1))) then
indvar_flatten_reg_393 <= add_ln257_fu_1830_p2;
elsif ((not(((src_mat_cols_empty_n = ap_const_logic_0) or (src_mat_rows_empty_n = ap_const_logic_0) or (ap_start = ap_const_logic_0) or (ap_done_reg = ap_const_logic_1))) and (ap_const_logic_1 = ap_CS_fsm_state1))) then
indvar_flatten_reg_393 <= ap_const_lv15_0;
end if;
end if;
end process;
j10_0_i_reg_655_assign_proc : process (ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if (((icmp_ln335_reg_3117 = ap_const_lv1_0) and (ap_enable_reg_pp2_iter1 = ap_const_logic_1) and (ap_const_logic_1 = ap_CS_fsm_pp2_stage0) and (ap_const_boolean_0 = ap_block_pp2_stage0_11001))) then
j10_0_i_reg_655 <= j_1_reg_3121;
elsif ((ap_const_logic_1 = ap_CS_fsm_state8)) then
j10_0_i_reg_655 <= ap_const_lv14_0;
end if;
end if;
end process;
j_0_i_reg_415_assign_proc : process (ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if (((icmp_ln257_fu_1825_p2 = ap_const_lv1_0) and (ap_const_boolean_0 = ap_block_pp0_stage0_11001) and (ap_const_logic_1 = ap_CS_fsm_pp0_stage0) and (ap_enable_reg_pp0_iter0 = ap_const_logic_1))) then
j_0_i_reg_415 <= j_fu_1875_p2;
elsif ((not(((src_mat_cols_empty_n = ap_const_logic_0) or (src_mat_rows_empty_n = ap_const_logic_0) or (ap_start = ap_const_logic_0) or (ap_done_reg = ap_const_logic_1))) and (ap_const_logic_1 = ap_CS_fsm_state1))) then
j_0_i_reg_415 <= ap_const_lv14_0;
end if;
end if;
end process;
lineStore_reg_533_assign_proc : process (ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if ((ap_const_logic_1 = ap_CS_fsm_state18)) then
lineStore_reg_533 <= add_ln277_2_fu_2829_p2;
elsif ((ap_const_logic_1 = ap_CS_fsm_state4)) then
lineStore_reg_533 <= ap_const_lv32_4;
end if;
end if;
end process;
p_0491_0_i_reg_522_assign_proc : process (ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if ((ap_const_logic_1 = ap_CS_fsm_state18)) then
p_0491_0_i_reg_522 <= select_ln879_1_reg_2960;
elsif ((ap_const_logic_1 = ap_CS_fsm_state4)) then
p_0491_0_i_reg_522 <= ap_const_lv2_3;
end if;
end if;
end process;
p_0_i_reg_644_assign_proc : process (ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if (((icmp_ln310_fu_2077_p2 = ap_const_lv1_0) and (ap_const_logic_1 = ap_CS_fsm_state6))) then
p_0_i_reg_644 <= p_fu_2083_p2;
elsif (((icmp_ln277_fu_1900_p2 = ap_const_lv1_0) and (ap_const_logic_1 = ap_CS_fsm_state5))) then
p_0_i_reg_644 <= ap_const_lv3_0;
end if;
end if;
end process;
p_Val2_s_reg_678_assign_proc : process (ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if ((ap_const_boolean_1 = ap_condition_640)) then
if (((icmp_ln343_reg_3029 = ap_const_lv1_1) and (icmp_ln335_reg_3117 = ap_const_lv1_0))) then
p_Val2_s_reg_678 <= src_mat_data_V_V_dout;
elsif ((ap_const_boolean_1 = ap_const_boolean_1)) then
p_Val2_s_reg_678 <= ap_phi_reg_pp2_iter1_p_Val2_s_reg_678;
end if;
end if;
end if;
end process;
process (ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if ((ap_const_logic_1 = ap_CS_fsm_state4)) then
add_ln277_reg_2905 <= add_ln277_fu_1881_p2;
add_ln343_reg_2910 <= add_ln343_fu_1886_p2;
add_ln363_reg_2915 <= add_ln363_fu_1891_p2;
end if;
end if;
end process;
process (ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if ((ap_const_logic_1 = ap_CS_fsm_state5)) then
i_1_reg_2949 <= i_1_fu_1905_p2;
zext_ln277_reg_2940(15 downto 0) <= zext_ln277_fu_1896_p1(15 downto 0);
end if;
end if;
end process;
process (ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if (((ap_const_boolean_0 = ap_block_pp0_stage0_11001) and (ap_const_logic_1 = ap_CS_fsm_pp0_stage0))) then
icmp_ln257_reg_2860 <= icmp_ln257_fu_1825_p2;
end if;
end if;
end process;
process (ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if (((ap_const_logic_1 = ap_CS_fsm_pp2_stage0) and (ap_const_boolean_0 = ap_block_pp2_stage0_11001))) then
icmp_ln335_reg_3117 <= icmp_ln335_fu_2292_p2;
icmp_ln335_reg_3117_pp2_iter1_reg <= icmp_ln335_reg_3117;
icmp_ln363_reg_3126_pp2_iter1_reg <= icmp_ln363_reg_3126;
j10_0_i_reg_655_pp2_iter1_reg <= j10_0_i_reg_655;
end if;
end if;
end process;
process (ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if ((ap_const_boolean_0 = ap_block_pp2_stage0_11001)) then
icmp_ln335_reg_3117_pp2_iter2_reg <= icmp_ln335_reg_3117_pp2_iter1_reg;
icmp_ln335_reg_3117_pp2_iter3_reg <= icmp_ln335_reg_3117_pp2_iter2_reg;
icmp_ln335_reg_3117_pp2_iter4_reg <= icmp_ln335_reg_3117_pp2_iter3_reg;
icmp_ln335_reg_3117_pp2_iter5_reg <= icmp_ln335_reg_3117_pp2_iter4_reg;
icmp_ln335_reg_3117_pp2_iter6_reg <= icmp_ln335_reg_3117_pp2_iter5_reg;
icmp_ln335_reg_3117_pp2_iter7_reg <= icmp_ln335_reg_3117_pp2_iter6_reg;
end if;
end if;
end process;
process (ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if ((ap_const_logic_1 = ap_CS_fsm_state7)) then
icmp_ln343_reg_3029 <= icmp_ln343_fu_2265_p2;
end if;
end if;
end process;
process (ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if (((icmp_ln335_fu_2292_p2 = ap_const_lv1_0) and (ap_const_logic_1 = ap_CS_fsm_pp2_stage0) and (ap_const_boolean_0 = ap_block_pp2_stage0_11001))) then
icmp_ln363_reg_3126 <= icmp_ln363_fu_2303_p2;
end if;
end if;
end process;
process (ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if ((ap_const_logic_1 = ap_CS_fsm_state18)) then
imgblock_0_4_V_0_reg_510 <= imgblock_0_0_V_reg_946;
imgblock_0_5_V_0_reg_498 <= imgblock_0_1_V_reg_933;
imgblock_1_4_V_0_reg_486 <= imgblock_1_0_V_reg_880;
imgblock_1_5_V_0_reg_474 <= imgblock_1_1_V_reg_867;
imgblock_2_4_V_0_reg_462 <= imgblock_2_0_V_reg_814;
imgblock_2_5_V_0_reg_450 <= imgblock_2_1_V_reg_801;
imgblock_3_4_V_0_reg_438 <= imgblock_3_0_V_reg_748;
imgblock_3_5_V_0_reg_426 <= imgblock_3_1_V_reg_735;
end if;
end if;
end process;
process (ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if (((ap_enable_reg_pp2_iter2 = ap_const_logic_1) and (ap_const_boolean_0 = ap_block_pp2_stage0_11001))) then
imgblock_0_6_V_1221_reg_1202 <= ap_phi_reg_pp2_iter2_imgblock_0_6_V_1221_reg_1202;
imgblock_0_7_V_1222_reg_1189 <= ap_phi_reg_pp2_iter2_imgblock_0_7_V_1222_reg_1189;
imgblock_0_8_V_1223_reg_1176 <= ap_phi_reg_pp2_iter2_imgblock_0_8_V_1223_reg_1176;
imgblock_0_9_V_1224_reg_1163 <= ap_phi_reg_pp2_iter2_imgblock_0_9_V_1224_reg_1163;
imgblock_1_6_V_1227_reg_1150 <= ap_phi_reg_pp2_iter2_imgblock_1_6_V_1227_reg_1150;
imgblock_1_7_V_1228_reg_1137 <= ap_phi_reg_pp2_iter2_imgblock_1_7_V_1228_reg_1137;
imgblock_1_8_V_1229_reg_1124 <= ap_phi_reg_pp2_iter2_imgblock_1_8_V_1229_reg_1124;
imgblock_1_9_V_1230_reg_1111 <= ap_phi_reg_pp2_iter2_imgblock_1_9_V_1230_reg_1111;
imgblock_2_6_V_1233_reg_1098 <= ap_phi_reg_pp2_iter2_imgblock_2_6_V_1233_reg_1098;
imgblock_2_7_V_1234_reg_1085 <= ap_phi_reg_pp2_iter2_imgblock_2_7_V_1234_reg_1085;
imgblock_2_8_V_1235_reg_1072 <= ap_phi_reg_pp2_iter2_imgblock_2_8_V_1235_reg_1072;
imgblock_2_9_V_1236_reg_1059 <= ap_phi_reg_pp2_iter2_imgblock_2_9_V_1236_reg_1059;
imgblock_3_6_V_1239_reg_1046 <= ap_phi_reg_pp2_iter2_imgblock_3_6_V_1239_reg_1046;
imgblock_3_7_V_1240_reg_1033 <= ap_phi_reg_pp2_iter2_imgblock_3_7_V_1240_reg_1033;
imgblock_3_8_V_1241_reg_1020 <= ap_phi_reg_pp2_iter2_imgblock_3_8_V_1241_reg_1020;
imgblock_3_9_V_1242_reg_1007 <= ap_phi_reg_pp2_iter2_imgblock_3_9_V_1242_reg_1007;
end if;
end if;
end process;
process (ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if (((icmp_ln335_reg_3117_pp2_iter1_reg = ap_const_lv1_0) and (ap_enable_reg_pp2_iter2 = ap_const_logic_1) and (ap_const_boolean_0 = ap_block_pp2_stage0_11001))) then
imgblock_4_0_V_fu_182 <= imgblock_4_4_V_reg_3173;
imgblock_4_1_V_fu_186 <= imgblock_4_9_V_reg_3183;
end if;
end if;
end process;
process (ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if (((icmp_ln335_reg_3117 = ap_const_lv1_0) and (ap_const_logic_1 = ap_CS_fsm_pp2_stage0) and (ap_const_boolean_0 = ap_block_pp2_stage0_11001))) then
imgblock_4_2_V_reg_3155 <= imgblock_4_2_V_fu_2322_p1;
imgblock_4_3_V_reg_3164 <= ap_phi_mux_p_Val2_s_phi_fu_686_p4(19 downto 10);
imgblock_4_4_V_reg_3173 <= ap_phi_mux_p_Val2_s_phi_fu_686_p4(29 downto 20);
imgblock_4_9_V_reg_3183 <= ap_phi_mux_p_Val2_s_phi_fu_686_p4(39 downto 30);
end if;
end if;
end process;
process (ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if (((ap_const_logic_1 = ap_CS_fsm_pp2_stage0) and (ap_enable_reg_pp2_iter0 = ap_const_logic_1) and (ap_const_boolean_0 = ap_block_pp2_stage0_11001))) then
j_1_reg_3121 <= j_1_fu_2297_p2;
end if;
end if;
end process;
process (ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if (((icmp_ln257_fu_1825_p2 = ap_const_lv1_0) and (ap_const_boolean_0 = ap_block_pp0_stage0_11001) and (ap_const_logic_1 = ap_CS_fsm_pp0_stage0))) then
linebuffer_2_V_addr_reg_2878 <= zext_ln267_fu_1867_p1(10 - 1 downto 0);
linebuffer_3_V_addr_reg_2883 <= zext_ln267_fu_1867_p1(10 - 1 downto 0);
trunc_ln261_reg_2874 <= trunc_ln261_fu_1863_p1;
end if;
end if;
end process;
process (ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if (((icmp_ln257_fu_1825_p2 = ap_const_lv1_0) and (ap_const_boolean_0 = ap_block_pp0_stage0_11001) and (ap_const_logic_1 = ap_CS_fsm_pp0_stage0) and (ap_enable_reg_pp0_iter0 = ap_const_logic_1))) then
select_ln261_1_reg_2869 <= select_ln261_1_fu_1855_p3;
end if;
end if;
end process;
process (ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if (((icmp_ln277_fu_1900_p2 = ap_const_lv1_0) and (ap_const_logic_1 = ap_CS_fsm_state5))) then
select_ln283_reg_2954 <= select_ln283_fu_1927_p3;
select_ln879_1_reg_2960 <= select_ln879_1_fu_2013_p3;
select_ln879_3_reg_2966 <= select_ln879_3_fu_2029_p3;
select_ln879_5_reg_2971 <= select_ln879_5_fu_2057_p3;
select_ln879_6_reg_2976 <= select_ln879_6_fu_2069_p3;
end if;
end if;
end process;
process (ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if ((not(((src_mat_cols_empty_n = ap_const_logic_0) or (src_mat_rows_empty_n = ap_const_logic_0) or (ap_start = ap_const_logic_0) or (ap_done_reg = ap_const_logic_1))) and (ap_const_logic_1 = ap_CS_fsm_state1))) then
src_mat_rows_read_reg_2834 <= src_mat_rows_dout;
tmp_34_reg_2844 <= src_mat_cols_dout(15 downto 2);
tmp_37_reg_2855(14 downto 1) <= tmp_37_fu_1817_p3(14 downto 1);
zext_ln257_reg_2839(15 downto 0) <= zext_ln257_fu_1799_p1(15 downto 0);
zext_ln261_reg_2849(13 downto 0) <= zext_ln261_fu_1813_p1(13 downto 0);
end if;
end if;
end process;
process (ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if (((icmp_ln335_reg_3117_pp2_iter6_reg = ap_const_lv1_0) and (ap_const_boolean_0 = ap_block_pp2_stage0_11001))) then
tmp_144_reg_3309 <= grp_Core_Process_fu_1215_ap_return_0(31 downto 10);
tmp_145_reg_3319 <= grp_Core_Process_fu_1215_ap_return_1(31 downto 10);
tmp_146_reg_3329 <= grp_Core_Process_fu_1215_ap_return_2(31 downto 10);
tmp_147_reg_3339 <= grp_Core_Process_fu_1318_ap_return_0(31 downto 10);
tmp_148_reg_3349 <= grp_Core_Process_fu_1318_ap_return_1(31 downto 10);
tmp_149_reg_3359 <= grp_Core_Process_fu_1318_ap_return_2(31 downto 10);
tmp_150_reg_3369 <= grp_Core_Process_fu_1421_ap_return_0(31 downto 10);
tmp_151_reg_3379 <= grp_Core_Process_fu_1421_ap_return_1(31 downto 10);
tmp_152_reg_3389 <= grp_Core_Process_fu_1421_ap_return_2(31 downto 10);
tmp_153_reg_3399 <= grp_Core_Process_fu_1524_ap_return_0(31 downto 10);
tmp_154_reg_3409 <= grp_Core_Process_fu_1524_ap_return_1(31 downto 10);
tmp_155_reg_3419 <= grp_Core_Process_fu_1524_ap_return_2(31 downto 10);
trunc_ln41_10_reg_3414 <= trunc_ln41_10_fu_2638_p1;
trunc_ln41_11_reg_3424 <= trunc_ln41_11_fu_2652_p1;
trunc_ln41_1_reg_3324 <= trunc_ln41_1_fu_2476_p1;
trunc_ln41_2_reg_3334 <= trunc_ln41_2_fu_2490_p1;
trunc_ln41_3_reg_3344 <= trunc_ln41_3_fu_2516_p1;
trunc_ln41_4_reg_3354 <= trunc_ln41_4_fu_2530_p1;
trunc_ln41_5_reg_3364 <= trunc_ln41_5_fu_2544_p1;
trunc_ln41_6_reg_3374 <= trunc_ln41_6_fu_2570_p1;
trunc_ln41_7_reg_3384 <= trunc_ln41_7_fu_2584_p1;
trunc_ln41_8_reg_3394 <= trunc_ln41_8_fu_2598_p1;
trunc_ln41_9_reg_3404 <= trunc_ln41_9_fu_2624_p1;
trunc_ln41_reg_3314 <= trunc_ln41_fu_2462_p1;
end if;
end if;
end process;
process (ap_clk)
begin
if (ap_clk'event and ap_clk = '1') then
if ((ap_const_logic_1 = ap_CS_fsm_state8)) then
trunc_ln321_reg_3113 <= trunc_ln321_fu_2285_p1;
end if;
end if;
end process;
zext_ln257_reg_2839(16) <= '0';
zext_ln261_reg_2849(14) <= '0';
tmp_37_reg_2855(0) <= '0';
zext_ln277_reg_2940(16) <= '0';
ap_NS_fsm_assign_proc : process (ap_start, ap_done_reg, ap_CS_fsm, ap_CS_fsm_state1, src_mat_rows_empty_n, src_mat_cols_empty_n, ap_enable_reg_pp2_iter1, ap_enable_reg_pp2_iter8, icmp_ln257_fu_1825_p2, ap_enable_reg_pp0_iter0, ap_CS_fsm_state5, icmp_ln277_fu_1900_p2, ap_CS_fsm_state6, icmp_ln310_fu_2077_p2, ap_block_pp0_stage0_subdone, ap_block_pp2_stage0_subdone, ap_enable_reg_pp2_iter2, ap_enable_reg_pp2_iter3, ap_enable_reg_pp2_iter7)
begin
case ap_CS_fsm is
when ap_ST_fsm_state1 =>
if ((not(((src_mat_cols_empty_n = ap_const_logic_0) or (src_mat_rows_empty_n = ap_const_logic_0) or (ap_start = ap_const_logic_0) or (ap_done_reg = ap_const_logic_1))) and (ap_const_logic_1 = ap_CS_fsm_state1))) then
ap_NS_fsm <= ap_ST_fsm_pp0_stage0;
else
ap_NS_fsm <= ap_ST_fsm_state1;
end if;
when ap_ST_fsm_pp0_stage0 =>
if (not(((icmp_ln257_fu_1825_p2 = ap_const_lv1_1) and (ap_const_boolean_0 = ap_block_pp0_stage0_subdone) and (ap_enable_reg_pp0_iter0 = ap_const_logic_1)))) then
ap_NS_fsm <= ap_ST_fsm_pp0_stage0;
elsif (((icmp_ln257_fu_1825_p2 = ap_const_lv1_1) and (ap_const_boolean_0 = ap_block_pp0_stage0_subdone) and (ap_enable_reg_pp0_iter0 = ap_const_logic_1))) then
ap_NS_fsm <= ap_ST_fsm_state4;
else
ap_NS_fsm <= ap_ST_fsm_pp0_stage0;
end if;
when ap_ST_fsm_state4 =>
ap_NS_fsm <= ap_ST_fsm_state5;
when ap_ST_fsm_state5 =>
if (((icmp_ln277_fu_1900_p2 = ap_const_lv1_1) and (ap_const_logic_1 = ap_CS_fsm_state5))) then
ap_NS_fsm <= ap_ST_fsm_state1;
else
ap_NS_fsm <= ap_ST_fsm_state6;
end if;
when ap_ST_fsm_state6 =>
if (((icmp_ln310_fu_2077_p2 = ap_const_lv1_0) and (ap_const_logic_1 = ap_CS_fsm_state6))) then
ap_NS_fsm <= ap_ST_fsm_state6;
else
ap_NS_fsm <= ap_ST_fsm_state7;
end if;
when ap_ST_fsm_state7 =>
ap_NS_fsm <= ap_ST_fsm_state8;
when ap_ST_fsm_state8 =>
ap_NS_fsm <= ap_ST_fsm_pp2_stage0;
when ap_ST_fsm_pp2_stage0 =>
if ((not(((ap_enable_reg_pp2_iter3 = ap_const_logic_0) and (ap_enable_reg_pp2_iter1 = ap_const_logic_0) and (ap_const_boolean_0 = ap_block_pp2_stage0_subdone) and (ap_enable_reg_pp2_iter2 = ap_const_logic_1))) and not(((ap_enable_reg_pp2_iter7 = ap_const_logic_0) and (ap_const_boolean_0 = ap_block_pp2_stage0_subdone) and (ap_enable_reg_pp2_iter8 = ap_const_logic_1))))) then
ap_NS_fsm <= ap_ST_fsm_pp2_stage0;
elsif ((((ap_enable_reg_pp2_iter7 = ap_const_logic_0) and (ap_const_boolean_0 = ap_block_pp2_stage0_subdone) and (ap_enable_reg_pp2_iter8 = ap_const_logic_1)) or ((ap_enable_reg_pp2_iter3 = ap_const_logic_0) and (ap_enable_reg_pp2_iter1 = ap_const_logic_0) and (ap_const_boolean_0 = ap_block_pp2_stage0_subdone) and (ap_enable_reg_pp2_iter2 = ap_const_logic_1)))) then
ap_NS_fsm <= ap_ST_fsm_state18;
else
ap_NS_fsm <= ap_ST_fsm_pp2_stage0;
end if;
when ap_ST_fsm_state18 =>
ap_NS_fsm <= ap_ST_fsm_state5;
when others =>
ap_NS_fsm <= "XXXXXXXXX";
end case;
end process;
add_ln257_fu_1830_p2 <= std_logic_vector(unsigned(indvar_flatten_reg_393) + unsigned(ap_const_lv15_1));
add_ln277_2_fu_2829_p2 <= std_logic_vector(unsigned(select_ln283_reg_2954) + unsigned(ap_const_lv32_1));
add_ln277_fu_1881_p2 <= std_logic_vector(unsigned(zext_ln261_reg_2849) + unsigned(ap_const_lv15_1));
add_ln343_fu_1886_p2 <= std_logic_vector(unsigned(zext_ln257_reg_2839) + unsigned(ap_const_lv17_1FFFE));
add_ln363_fu_1891_p2 <= std_logic_vector(unsigned(zext_ln261_reg_2849) + unsigned(ap_const_lv15_7FFF));
and_ln879_fu_1993_p2 <= (xor_ln879_fu_1987_p2 and icmp_ln879_1_fu_1941_p2);
ap_CS_fsm_pp0_stage0 <= ap_CS_fsm(1);
ap_CS_fsm_pp2_stage0 <= ap_CS_fsm(7);
ap_CS_fsm_state1 <= ap_CS_fsm(0);
ap_CS_fsm_state18 <= ap_CS_fsm(8);
ap_CS_fsm_state4 <= ap_CS_fsm(2);
ap_CS_fsm_state5 <= ap_CS_fsm(3);
ap_CS_fsm_state6 <= ap_CS_fsm(4);
ap_CS_fsm_state7 <= ap_CS_fsm(5);
ap_CS_fsm_state8 <= ap_CS_fsm(6);
ap_block_pp0_assign_proc : process(ap_CS_fsm, ap_block_pp0_stage0_subdone)
begin
ap_block_pp0 <= ((ap_ST_fsm_pp0_stage0 = ap_CS_fsm) and (ap_const_boolean_1 = ap_block_pp0_stage0_subdone));
end process;
ap_block_pp0_stage0 <= not((ap_const_boolean_1 = ap_const_boolean_1));
ap_block_pp0_stage0_11001_assign_proc : process(src_mat_data_V_V_empty_n, ap_enable_reg_pp0_iter1, icmp_ln257_reg_2860)
begin
ap_block_pp0_stage0_11001 <= ((icmp_ln257_reg_2860 = ap_const_lv1_0) and (src_mat_data_V_V_empty_n = ap_const_logic_0) and (ap_enable_reg_pp0_iter1 = ap_const_logic_1));
end process;
ap_block_pp0_stage0_subdone_assign_proc : process(src_mat_data_V_V_empty_n, ap_enable_reg_pp0_iter1, icmp_ln257_reg_2860)
begin
ap_block_pp0_stage0_subdone <= ((icmp_ln257_reg_2860 = ap_const_lv1_0) and (src_mat_data_V_V_empty_n = ap_const_logic_0) and (ap_enable_reg_pp0_iter1 = ap_const_logic_1));
end process;
ap_block_pp2_assign_proc : process(ap_CS_fsm, ap_block_pp2_stage0_subdone)
begin
ap_block_pp2 <= ((ap_const_boolean_1 = ap_block_pp2_stage0_subdone) and (ap_ST_fsm_pp2_stage0 = ap_CS_fsm));
end process;
ap_block_pp2_stage0 <= not((ap_const_boolean_1 = ap_const_boolean_1));
ap_block_pp2_stage0_01001_assign_proc : process(src_mat_data_V_V_empty_n, dst_mat_data_V_V_full_n, ap_enable_reg_pp2_iter1, ap_enable_reg_pp2_iter8, icmp_ln335_reg_3117_pp2_iter7_reg, ap_predicate_op207_read_state10)
begin
ap_block_pp2_stage0_01001 <= (((icmp_ln335_reg_3117_pp2_iter7_reg = ap_const_lv1_0) and (dst_mat_data_V_V_full_n = ap_const_logic_0) and (ap_enable_reg_pp2_iter8 = ap_const_logic_1)) or ((src_mat_data_V_V_empty_n = ap_const_logic_0) and (ap_predicate_op207_read_state10 = ap_const_boolean_1) and (ap_enable_reg_pp2_iter1 = ap_const_logic_1)));
end process;
ap_block_pp2_stage0_11001_assign_proc : process(src_mat_data_V_V_empty_n, dst_mat_data_V_V_full_n, ap_enable_reg_pp2_iter1, ap_enable_reg_pp2_iter8, icmp_ln335_reg_3117_pp2_iter7_reg, ap_predicate_op207_read_state10)
begin
ap_block_pp2_stage0_11001 <= (((icmp_ln335_reg_3117_pp2_iter7_reg = ap_const_lv1_0) and (dst_mat_data_V_V_full_n = ap_const_logic_0) and (ap_enable_reg_pp2_iter8 = ap_const_logic_1)) or ((src_mat_data_V_V_empty_n = ap_const_logic_0) and (ap_predicate_op207_read_state10 = ap_const_boolean_1) and (ap_enable_reg_pp2_iter1 = ap_const_logic_1)));
end process;
ap_block_pp2_stage0_11001_ignoreCallOp313_assign_proc : process(src_mat_data_V_V_empty_n, dst_mat_data_V_V_full_n, ap_enable_reg_pp2_iter1, ap_enable_reg_pp2_iter8, icmp_ln335_reg_3117_pp2_iter7_reg, ap_predicate_op207_read_state10)
begin
ap_block_pp2_stage0_11001_ignoreCallOp313 <= (((icmp_ln335_reg_3117_pp2_iter7_reg = ap_const_lv1_0) and (dst_mat_data_V_V_full_n = ap_const_logic_0) and (ap_enable_reg_pp2_iter8 = ap_const_logic_1)) or ((src_mat_data_V_V_empty_n = ap_const_logic_0) and (ap_predicate_op207_read_state10 = ap_const_boolean_1) and (ap_enable_reg_pp2_iter1 = ap_const_logic_1)));
end process;
ap_block_pp2_stage0_11001_ignoreCallOp315_assign_proc : process(src_mat_data_V_V_empty_n, dst_mat_data_V_V_full_n, ap_enable_reg_pp2_iter1, ap_enable_reg_pp2_iter8, icmp_ln335_reg_3117_pp2_iter7_reg, ap_predicate_op207_read_state10)
begin
ap_block_pp2_stage0_11001_ignoreCallOp315 <= (((icmp_ln335_reg_3117_pp2_iter7_reg = ap_const_lv1_0) and (dst_mat_data_V_V_full_n = ap_const_logic_0) and (ap_enable_reg_pp2_iter8 = ap_const_logic_1)) or ((src_mat_data_V_V_empty_n = ap_const_logic_0) and (ap_predicate_op207_read_state10 = ap_const_boolean_1) and (ap_enable_reg_pp2_iter1 = ap_const_logic_1)));
end process;
ap_block_pp2_stage0_11001_ignoreCallOp317_assign_proc : process(src_mat_data_V_V_empty_n, dst_mat_data_V_V_full_n, ap_enable_reg_pp2_iter1, ap_enable_reg_pp2_iter8, icmp_ln335_reg_3117_pp2_iter7_reg, ap_predicate_op207_read_state10)
begin
ap_block_pp2_stage0_11001_ignoreCallOp317 <= (((icmp_ln335_reg_3117_pp2_iter7_reg = ap_const_lv1_0) and (dst_mat_data_V_V_full_n = ap_const_logic_0) and (ap_enable_reg_pp2_iter8 = ap_const_logic_1)) or ((src_mat_data_V_V_empty_n = ap_const_logic_0) and (ap_predicate_op207_read_state10 = ap_const_boolean_1) and (ap_enable_reg_pp2_iter1 = ap_const_logic_1)));
end process;
ap_block_pp2_stage0_11001_ignoreCallOp319_assign_proc : process(src_mat_data_V_V_empty_n, dst_mat_data_V_V_full_n, ap_enable_reg_pp2_iter1, ap_enable_reg_pp2_iter8, icmp_ln335_reg_3117_pp2_iter7_reg, ap_predicate_op207_read_state10)
begin
ap_block_pp2_stage0_11001_ignoreCallOp319 <= (((icmp_ln335_reg_3117_pp2_iter7_reg = ap_const_lv1_0) and (dst_mat_data_V_V_full_n = ap_const_logic_0) and (ap_enable_reg_pp2_iter8 = ap_const_logic_1)) or ((src_mat_data_V_V_empty_n = ap_const_logic_0) and (ap_predicate_op207_read_state10 = ap_const_boolean_1) and (ap_enable_reg_pp2_iter1 = ap_const_logic_1)));
end process;
ap_block_pp2_stage0_subdone_assign_proc : process(src_mat_data_V_V_empty_n, dst_mat_data_V_V_full_n, ap_enable_reg_pp2_iter1, ap_enable_reg_pp2_iter8, icmp_ln335_reg_3117_pp2_iter7_reg, ap_predicate_op207_read_state10)
begin
ap_block_pp2_stage0_subdone <= (((icmp_ln335_reg_3117_pp2_iter7_reg = ap_const_lv1_0) and (dst_mat_data_V_V_full_n = ap_const_logic_0) and (ap_enable_reg_pp2_iter8 = ap_const_logic_1)) or ((src_mat_data_V_V_empty_n = ap_const_logic_0) and (ap_predicate_op207_read_state10 = ap_const_boolean_1) and (ap_enable_reg_pp2_iter1 = ap_const_logic_1)));
end process;
ap_block_state1_assign_proc : process(ap_start, ap_done_reg, src_mat_rows_empty_n, src_mat_cols_empty_n)
begin
ap_block_state1 <= ((src_mat_cols_empty_n = ap_const_logic_0) or (src_mat_rows_empty_n = ap_const_logic_0) or (ap_start = ap_const_logic_0) or (ap_done_reg = ap_const_logic_1));
end process;
ap_block_state10_pp2_stage0_iter1_assign_proc : process(src_mat_data_V_V_empty_n, ap_predicate_op207_read_state10)
begin
ap_block_state10_pp2_stage0_iter1 <= ((src_mat_data_V_V_empty_n = ap_const_logic_0) and (ap_predicate_op207_read_state10 = ap_const_boolean_1));
end process;
ap_block_state10_pp2_stage0_iter1_ignore_call24_assign_proc : process(src_mat_data_V_V_empty_n, ap_predicate_op207_read_state10)
begin
ap_block_state10_pp2_stage0_iter1_ignore_call24 <= ((src_mat_data_V_V_empty_n = ap_const_logic_0) and (ap_predicate_op207_read_state10 = ap_const_boolean_1));
end process;
ap_block_state10_pp2_stage0_iter1_ignore_call41_assign_proc : process(src_mat_data_V_V_empty_n, ap_predicate_op207_read_state10)
begin
ap_block_state10_pp2_stage0_iter1_ignore_call41 <= ((src_mat_data_V_V_empty_n = ap_const_logic_0) and (ap_predicate_op207_read_state10 = ap_const_boolean_1));
end process;
ap_block_state10_pp2_stage0_iter1_ignore_call58_assign_proc : process(src_mat_data_V_V_empty_n, ap_predicate_op207_read_state10)
begin
ap_block_state10_pp2_stage0_iter1_ignore_call58 <= ((src_mat_data_V_V_empty_n = ap_const_logic_0) and (ap_predicate_op207_read_state10 = ap_const_boolean_1));
end process;
ap_block_state10_pp2_stage0_iter1_ignore_call75_assign_proc : process(src_mat_data_V_V_empty_n, ap_predicate_op207_read_state10)
begin
ap_block_state10_pp2_stage0_iter1_ignore_call75 <= ((src_mat_data_V_V_empty_n = ap_const_logic_0) and (ap_predicate_op207_read_state10 = ap_const_boolean_1));
end process;
ap_block_state11_pp2_stage0_iter2 <= not((ap_const_boolean_1 = ap_const_boolean_1));
ap_block_state11_pp2_stage0_iter2_ignore_call24 <= not((ap_const_boolean_1 = ap_const_boolean_1));
ap_block_state11_pp2_stage0_iter2_ignore_call41 <= not((ap_const_boolean_1 = ap_const_boolean_1));
ap_block_state11_pp2_stage0_iter2_ignore_call58 <= not((ap_const_boolean_1 = ap_const_boolean_1));
ap_block_state11_pp2_stage0_iter2_ignore_call75 <= not((ap_const_boolean_1 = ap_const_boolean_1));
ap_block_state12_pp2_stage0_iter3 <= not((ap_const_boolean_1 = ap_const_boolean_1));
ap_block_state12_pp2_stage0_iter3_ignore_call24 <= not((ap_const_boolean_1 = ap_const_boolean_1));
ap_block_state12_pp2_stage0_iter3_ignore_call41 <= not((ap_const_boolean_1 = ap_const_boolean_1));
ap_block_state12_pp2_stage0_iter3_ignore_call58 <= not((ap_const_boolean_1 = ap_const_boolean_1));
ap_block_state12_pp2_stage0_iter3_ignore_call75 <= not((ap_const_boolean_1 = ap_const_boolean_1));
ap_block_state13_pp2_stage0_iter4 <= not((ap_const_boolean_1 = ap_const_boolean_1));
ap_block_state13_pp2_stage0_iter4_ignore_call24 <= not((ap_const_boolean_1 = ap_const_boolean_1));
ap_block_state13_pp2_stage0_iter4_ignore_call41 <= not((ap_const_boolean_1 = ap_const_boolean_1));
ap_block_state13_pp2_stage0_iter4_ignore_call58 <= not((ap_const_boolean_1 = ap_const_boolean_1));
ap_block_state13_pp2_stage0_iter4_ignore_call75 <= not((ap_const_boolean_1 = ap_const_boolean_1));
ap_block_state14_pp2_stage0_iter5 <= not((ap_const_boolean_1 = ap_const_boolean_1));
ap_block_state14_pp2_stage0_iter5_ignore_call24 <= not((ap_const_boolean_1 = ap_const_boolean_1));
ap_block_state14_pp2_stage0_iter5_ignore_call41 <= not((ap_const_boolean_1 = ap_const_boolean_1));
ap_block_state14_pp2_stage0_iter5_ignore_call58 <= not((ap_const_boolean_1 = ap_const_boolean_1));
ap_block_state14_pp2_stage0_iter5_ignore_call75 <= not((ap_const_boolean_1 = ap_const_boolean_1));
ap_block_state15_pp2_stage0_iter6 <= not((ap_const_boolean_1 = ap_const_boolean_1));
ap_block_state15_pp2_stage0_iter6_ignore_call24 <= not((ap_const_boolean_1 = ap_const_boolean_1));
ap_block_state15_pp2_stage0_iter6_ignore_call41 <= not((ap_const_boolean_1 = ap_const_boolean_1));
ap_block_state15_pp2_stage0_iter6_ignore_call58 <= not((ap_const_boolean_1 = ap_const_boolean_1));
ap_block_state15_pp2_stage0_iter6_ignore_call75 <= not((ap_const_boolean_1 = ap_const_boolean_1));
ap_block_state16_pp2_stage0_iter7 <= not((ap_const_boolean_1 = ap_const_boolean_1));
ap_block_state16_pp2_stage0_iter7_ignore_call24 <= not((ap_const_boolean_1 = ap_const_boolean_1));
ap_block_state16_pp2_stage0_iter7_ignore_call41 <= not((ap_const_boolean_1 = ap_const_boolean_1));
ap_block_state16_pp2_stage0_iter7_ignore_call58 <= not((ap_const_boolean_1 = ap_const_boolean_1));
ap_block_state16_pp2_stage0_iter7_ignore_call75 <= not((ap_const_boolean_1 = ap_const_boolean_1));
ap_block_state17_pp2_stage0_iter8_assign_proc : process(dst_mat_data_V_V_full_n, icmp_ln335_reg_3117_pp2_iter7_reg)
begin
ap_block_state17_pp2_stage0_iter8 <= ((icmp_ln335_reg_3117_pp2_iter7_reg = ap_const_lv1_0) and (dst_mat_data_V_V_full_n = ap_const_logic_0));
end process;
ap_block_state17_pp2_stage0_iter8_ignore_call24_assign_proc : process(dst_mat_data_V_V_full_n, icmp_ln335_reg_3117_pp2_iter7_reg)
begin
ap_block_state17_pp2_stage0_iter8_ignore_call24 <= ((icmp_ln335_reg_3117_pp2_iter7_reg = ap_const_lv1_0) and (dst_mat_data_V_V_full_n = ap_const_logic_0));
end process;
ap_block_state17_pp2_stage0_iter8_ignore_call41_assign_proc : process(dst_mat_data_V_V_full_n, icmp_ln335_reg_3117_pp2_iter7_reg)
begin
ap_block_state17_pp2_stage0_iter8_ignore_call41 <= ((icmp_ln335_reg_3117_pp2_iter7_reg = ap_const_lv1_0) and (dst_mat_data_V_V_full_n = ap_const_logic_0));
end process;
ap_block_state17_pp2_stage0_iter8_ignore_call58_assign_proc : process(dst_mat_data_V_V_full_n, icmp_ln335_reg_3117_pp2_iter7_reg)
begin
ap_block_state17_pp2_stage0_iter8_ignore_call58 <= ((icmp_ln335_reg_3117_pp2_iter7_reg = ap_const_lv1_0) and (dst_mat_data_V_V_full_n = ap_const_logic_0));
end process;
ap_block_state17_pp2_stage0_iter8_ignore_call75_assign_proc : process(dst_mat_data_V_V_full_n, icmp_ln335_reg_3117_pp2_iter7_reg)
begin
ap_block_state17_pp2_stage0_iter8_ignore_call75 <= ((icmp_ln335_reg_3117_pp2_iter7_reg = ap_const_lv1_0) and (dst_mat_data_V_V_full_n = ap_const_logic_0));
end process;
ap_block_state2_pp0_stage0_iter0 <= not((ap_const_boolean_1 = ap_const_boolean_1));
ap_block_state3_pp0_stage0_iter1_assign_proc : process(src_mat_data_V_V_empty_n, icmp_ln257_reg_2860)
begin
ap_block_state3_pp0_stage0_iter1 <= ((icmp_ln257_reg_2860 = ap_const_lv1_0) and (src_mat_data_V_V_empty_n = ap_const_logic_0));
end process;
ap_block_state9_pp2_stage0_iter0 <= not((ap_const_boolean_1 = ap_const_boolean_1));
ap_block_state9_pp2_stage0_iter0_ignore_call24 <= not((ap_const_boolean_1 = ap_const_boolean_1));
ap_block_state9_pp2_stage0_iter0_ignore_call41 <= not((ap_const_boolean_1 = ap_const_boolean_1));
ap_block_state9_pp2_stage0_iter0_ignore_call58 <= not((ap_const_boolean_1 = ap_const_boolean_1));
ap_block_state9_pp2_stage0_iter0_ignore_call75 <= not((ap_const_boolean_1 = ap_const_boolean_1));
ap_condition_2223_assign_proc : process(ap_block_pp2_stage0, trunc_ln321_reg_3113, icmp_ln335_reg_3117_pp2_iter1_reg, ap_enable_reg_pp2_iter2)
begin
ap_condition_2223 <= ((ap_const_boolean_0 = ap_block_pp2_stage0) and (icmp_ln335_reg_3117_pp2_iter1_reg = ap_const_lv1_0) and (trunc_ln321_reg_3113 = ap_const_lv2_0) and (ap_enable_reg_pp2_iter2 = ap_const_logic_1));
end process;
ap_condition_2226_assign_proc : process(ap_block_pp2_stage0, trunc_ln321_reg_3113, icmp_ln335_reg_3117_pp2_iter1_reg, ap_enable_reg_pp2_iter2)
begin
ap_condition_2226 <= ((ap_const_boolean_0 = ap_block_pp2_stage0) and (icmp_ln335_reg_3117_pp2_iter1_reg = ap_const_lv1_0) and (trunc_ln321_reg_3113 = ap_const_lv2_1) and (ap_enable_reg_pp2_iter2 = ap_const_logic_1));
end process;
ap_condition_2229_assign_proc : process(ap_block_pp2_stage0, trunc_ln321_reg_3113, icmp_ln335_reg_3117_pp2_iter1_reg, ap_enable_reg_pp2_iter2)
begin
ap_condition_2229 <= ((ap_const_boolean_0 = ap_block_pp2_stage0) and (icmp_ln335_reg_3117_pp2_iter1_reg = ap_const_lv1_0) and (trunc_ln321_reg_3113 = ap_const_lv2_2) and (ap_enable_reg_pp2_iter2 = ap_const_logic_1));
end process;
ap_condition_2232_assign_proc : process(ap_block_pp2_stage0, trunc_ln321_reg_3113, icmp_ln335_reg_3117_pp2_iter1_reg, ap_enable_reg_pp2_iter2)
begin
ap_condition_2232 <= ((ap_const_boolean_0 = ap_block_pp2_stage0) and (icmp_ln335_reg_3117_pp2_iter1_reg = ap_const_lv1_0) and (trunc_ln321_reg_3113 = ap_const_lv2_3) and (ap_enable_reg_pp2_iter2 = ap_const_logic_1));
end process;
ap_condition_568_assign_proc : process(ap_CS_fsm_pp2_stage0, ap_block_pp2_stage0_11001, ap_enable_reg_pp2_iter0)
begin
ap_condition_568 <= ((ap_const_logic_1 = ap_CS_fsm_pp2_stage0) and (ap_enable_reg_pp2_iter0 = ap_const_logic_1) and (ap_const_boolean_0 = ap_block_pp2_stage0_11001));
end process;
ap_condition_640_assign_proc : process(ap_CS_fsm_pp2_stage0, ap_enable_reg_pp2_iter1, ap_block_pp2_stage0_11001)
begin
ap_condition_640 <= ((ap_enable_reg_pp2_iter1 = ap_const_logic_1) and (ap_const_logic_1 = ap_CS_fsm_pp2_stage0) and (ap_const_boolean_0 = ap_block_pp2_stage0_11001));
end process;
ap_condition_pp0_exit_iter0_state2_assign_proc : process(icmp_ln257_fu_1825_p2)
begin
if ((icmp_ln257_fu_1825_p2 = ap_const_lv1_1)) then
ap_condition_pp0_exit_iter0_state2 <= ap_const_logic_1;
else
ap_condition_pp0_exit_iter0_state2 <= ap_const_logic_0;
end if;
end process;
ap_condition_pp2_exit_iter2_state11_assign_proc : process(ap_enable_reg_pp2_iter1, ap_enable_reg_pp2_iter2)
begin
if (((ap_enable_reg_pp2_iter2 = ap_const_logic_1) and (ap_enable_reg_pp2_iter1 = ap_const_logic_0))) then
ap_condition_pp2_exit_iter2_state11 <= ap_const_logic_1;
else
ap_condition_pp2_exit_iter2_state11 <= ap_const_logic_0;
end if;
end process;
ap_done_assign_proc : process(ap_done_reg, ap_CS_fsm_state5, icmp_ln277_fu_1900_p2)
begin
if (((icmp_ln277_fu_1900_p2 = ap_const_lv1_1) and (ap_const_logic_1 = ap_CS_fsm_state5))) then
ap_done <= ap_const_logic_1;
else
ap_done <= ap_done_reg;
end if;
end process;
ap_enable_operation_198_assign_proc : process(ap_predicate_op198_load_state9)
begin
ap_enable_operation_198 <= (ap_predicate_op198_load_state9 = ap_const_boolean_1);
end process;
ap_enable_operation_200_assign_proc : process(ap_predicate_op200_load_state9)
begin
ap_enable_operation_200 <= (ap_predicate_op200_load_state9 = ap_const_boolean_1);
end process;
ap_enable_operation_202_assign_proc : process(ap_predicate_op202_load_state9)
begin
ap_enable_operation_202 <= (ap_predicate_op202_load_state9 = ap_const_boolean_1);
end process;
ap_enable_operation_204_assign_proc : process(ap_predicate_op204_load_state9)
begin
ap_enable_operation_204 <= (ap_predicate_op204_load_state9 = ap_const_boolean_1);
end process;
ap_enable_operation_214_assign_proc : process(ap_predicate_op214_load_state10)
begin
ap_enable_operation_214 <= (ap_predicate_op214_load_state10 = ap_const_boolean_1);
end process;
ap_enable_operation_215_assign_proc : process(ap_predicate_op215_load_state10)
begin
ap_enable_operation_215 <= (ap_predicate_op215_load_state10 = ap_const_boolean_1);
end process;
ap_enable_operation_216_assign_proc : process(ap_predicate_op216_load_state10)
begin
ap_enable_operation_216 <= (ap_predicate_op216_load_state10 = ap_const_boolean_1);
end process;
ap_enable_operation_217_assign_proc : process(ap_predicate_op217_load_state10)
begin
ap_enable_operation_217 <= (ap_predicate_op217_load_state10 = ap_const_boolean_1);
end process;
ap_enable_operation_269_assign_proc : process(ap_predicate_op269_store_state11)
begin
ap_enable_operation_269 <= (ap_predicate_op269_store_state11 = ap_const_boolean_1);
end process;
ap_enable_operation_271_assign_proc : process(ap_predicate_op271_store_state11)
begin
ap_enable_operation_271 <= (ap_predicate_op271_store_state11 = ap_const_boolean_1);
end process;
ap_enable_operation_273_assign_proc : process(ap_predicate_op273_store_state11)
begin
ap_enable_operation_273 <= (ap_predicate_op273_store_state11 = ap_const_boolean_1);
end process;
ap_enable_operation_275_assign_proc : process(ap_predicate_op275_store_state11)
begin
ap_enable_operation_275 <= (ap_predicate_op275_store_state11 = ap_const_boolean_1);
end process;
ap_enable_operation_282_assign_proc : process(ap_predicate_op282_store_state11)
begin
ap_enable_operation_282 <= (ap_predicate_op282_store_state11 = ap_const_boolean_1);
end process;
ap_enable_operation_284_assign_proc : process(ap_predicate_op284_store_state11)
begin
ap_enable_operation_284 <= (ap_predicate_op284_store_state11 = ap_const_boolean_1);
end process;
ap_enable_operation_286_assign_proc : process(ap_predicate_op286_store_state11)
begin
ap_enable_operation_286 <= (ap_predicate_op286_store_state11 = ap_const_boolean_1);
end process;
ap_enable_operation_288_assign_proc : process(ap_predicate_op288_store_state11)
begin
ap_enable_operation_288 <= (ap_predicate_op288_store_state11 = ap_const_boolean_1);
end process;
ap_enable_pp0 <= (ap_idle_pp0 xor ap_const_logic_1);
ap_enable_pp2 <= (ap_idle_pp2 xor ap_const_logic_1);
ap_enable_state10_pp2_iter1_stage0_assign_proc : process(ap_CS_fsm_pp2_stage0, ap_enable_reg_pp2_iter1)
begin
ap_enable_state10_pp2_iter1_stage0 <= ((ap_enable_reg_pp2_iter1 = ap_const_logic_1) and (ap_const_logic_1 = ap_CS_fsm_pp2_stage0));
end process;
ap_enable_state11_pp2_iter2_stage0_assign_proc : process(ap_CS_fsm_pp2_stage0, ap_enable_reg_pp2_iter2)
begin
ap_enable_state11_pp2_iter2_stage0 <= ((ap_enable_reg_pp2_iter2 = ap_const_logic_1) and (ap_const_logic_1 = ap_CS_fsm_pp2_stage0));
end process;
ap_enable_state9_pp2_iter0_stage0_assign_proc : process(ap_CS_fsm_pp2_stage0, ap_enable_reg_pp2_iter0)
begin
ap_enable_state9_pp2_iter0_stage0 <= ((ap_const_logic_1 = ap_CS_fsm_pp2_stage0) and (ap_enable_reg_pp2_iter0 = ap_const_logic_1));
end process;
ap_idle_assign_proc : process(ap_start, ap_CS_fsm_state1)
begin
if (((ap_start = ap_const_logic_0) and (ap_const_logic_1 = ap_CS_fsm_state1))) then
ap_idle <= ap_const_logic_1;
else
ap_idle <= ap_const_logic_0;
end if;
end process;
ap_idle_pp0_assign_proc : process(ap_enable_reg_pp0_iter1, ap_enable_reg_pp0_iter0)
begin
if (((ap_enable_reg_pp0_iter1 = ap_const_logic_0) and (ap_enable_reg_pp0_iter0 = ap_const_logic_0))) then
ap_idle_pp0 <= ap_const_logic_1;
else
ap_idle_pp0 <= ap_const_logic_0;
end if;
end process;
ap_idle_pp2_assign_proc : process(ap_enable_reg_pp2_iter1, ap_enable_reg_pp2_iter8, ap_enable_reg_pp2_iter0, ap_enable_reg_pp2_iter2, ap_enable_reg_pp2_iter3, ap_enable_reg_pp2_iter4, ap_enable_reg_pp2_iter5, ap_enable_reg_pp2_iter6, ap_enable_reg_pp2_iter7)
begin
if (((ap_enable_reg_pp2_iter8 = ap_const_logic_0) and (ap_enable_reg_pp2_iter7 = ap_const_logic_0) and (ap_enable_reg_pp2_iter6 = ap_const_logic_0) and (ap_enable_reg_pp2_iter5 = ap_const_logic_0) and (ap_enable_reg_pp2_iter4 = ap_const_logic_0) and (ap_enable_reg_pp2_iter3 = ap_const_logic_0) and (ap_enable_reg_pp2_iter2 = ap_const_logic_0) and (ap_enable_reg_pp2_iter1 = ap_const_logic_0) and (ap_enable_reg_pp2_iter0 = ap_const_logic_0))) then
ap_idle_pp2 <= ap_const_logic_1;
else
ap_idle_pp2 <= ap_const_logic_0;
end if;
end process;
ap_phi_mux_i_0_i_phi_fu_408_p4_assign_proc : process(ap_CS_fsm_pp0_stage0, ap_enable_reg_pp0_iter1, ap_block_pp0_stage0, icmp_ln257_reg_2860, i_0_i_reg_404, select_ln261_1_reg_2869)
begin
if (((icmp_ln257_reg_2860 = ap_const_lv1_0) and (ap_const_boolean_0 = ap_block_pp0_stage0) and (ap_enable_reg_pp0_iter1 = ap_const_logic_1) and (ap_const_logic_1 = ap_CS_fsm_pp0_stage0))) then
ap_phi_mux_i_0_i_phi_fu_408_p4 <= select_ln261_1_reg_2869;
else
ap_phi_mux_i_0_i_phi_fu_408_p4 <= i_0_i_reg_404;
end if;
end process;
ap_phi_mux_imgblock_0_0_V_phi_fu_950_p4_assign_proc : process(ap_block_pp2_stage0, imgblock_0_4_V_reg_903, imgblock_0_0_V_reg_946, icmp_ln335_reg_3117_pp2_iter2_reg, ap_enable_reg_pp2_iter3)
begin
if (((ap_const_boolean_0 = ap_block_pp2_stage0) and (icmp_ln335_reg_3117_pp2_iter2_reg = ap_const_lv1_0) and (ap_enable_reg_pp2_iter3 = ap_const_logic_1))) then
ap_phi_mux_imgblock_0_0_V_phi_fu_950_p4 <= imgblock_0_4_V_reg_903;
else
ap_phi_mux_imgblock_0_0_V_phi_fu_950_p4 <= imgblock_0_0_V_reg_946;
end if;
end process;
ap_phi_mux_imgblock_0_1_V_phi_fu_937_p4_assign_proc : process(ap_block_pp2_stage0, imgblock_0_5_V_reg_893, imgblock_0_1_V_reg_933, icmp_ln335_reg_3117_pp2_iter2_reg, ap_enable_reg_pp2_iter3)
begin
if (((ap_const_boolean_0 = ap_block_pp2_stage0) and (icmp_ln335_reg_3117_pp2_iter2_reg = ap_const_lv1_0) and (ap_enable_reg_pp2_iter3 = ap_const_logic_1))) then
ap_phi_mux_imgblock_0_1_V_phi_fu_937_p4 <= imgblock_0_5_V_reg_893;
else
ap_phi_mux_imgblock_0_1_V_phi_fu_937_p4 <= imgblock_0_1_V_reg_933;
end if;
end process;
ap_phi_mux_imgblock_0_2_V_phi_fu_926_p4_assign_proc : process(ap_block_pp2_stage0, imgblock_0_2_V_reg_923, imgblock_0_6_V_1221_reg_1202, icmp_ln335_reg_3117_pp2_iter2_reg, ap_enable_reg_pp2_iter3)
begin
if (((ap_const_boolean_0 = ap_block_pp2_stage0) and (icmp_ln335_reg_3117_pp2_iter2_reg = ap_const_lv1_0) and (ap_enable_reg_pp2_iter3 = ap_const_logic_1))) then
ap_phi_mux_imgblock_0_2_V_phi_fu_926_p4 <= imgblock_0_6_V_1221_reg_1202;
else
ap_phi_mux_imgblock_0_2_V_phi_fu_926_p4 <= imgblock_0_2_V_reg_923;
end if;
end process;
ap_phi_mux_imgblock_0_3_V_phi_fu_916_p4_assign_proc : process(ap_block_pp2_stage0, imgblock_0_3_V_reg_913, imgblock_0_7_V_1222_reg_1189, icmp_ln335_reg_3117_pp2_iter2_reg, ap_enable_reg_pp2_iter3)
begin
if (((ap_const_boolean_0 = ap_block_pp2_stage0) and (icmp_ln335_reg_3117_pp2_iter2_reg = ap_const_lv1_0) and (ap_enable_reg_pp2_iter3 = ap_const_logic_1))) then
ap_phi_mux_imgblock_0_3_V_phi_fu_916_p4 <= imgblock_0_7_V_1222_reg_1189;
else
ap_phi_mux_imgblock_0_3_V_phi_fu_916_p4 <= imgblock_0_3_V_reg_913;
end if;
end process;
ap_phi_mux_imgblock_0_4_V_phi_fu_906_p4_assign_proc : process(ap_block_pp2_stage0, imgblock_0_4_V_reg_903, imgblock_0_8_V_1223_reg_1176, icmp_ln335_reg_3117_pp2_iter2_reg, ap_enable_reg_pp2_iter3)
begin
if (((ap_const_boolean_0 = ap_block_pp2_stage0) and (icmp_ln335_reg_3117_pp2_iter2_reg = ap_const_lv1_0) and (ap_enable_reg_pp2_iter3 = ap_const_logic_1))) then
ap_phi_mux_imgblock_0_4_V_phi_fu_906_p4 <= imgblock_0_8_V_1223_reg_1176;
else
ap_phi_mux_imgblock_0_4_V_phi_fu_906_p4 <= imgblock_0_4_V_reg_903;
end if;
end process;
ap_phi_mux_imgblock_0_5_V_phi_fu_896_p4_assign_proc : process(ap_block_pp2_stage0, imgblock_0_5_V_reg_893, imgblock_0_9_V_1224_reg_1163, icmp_ln335_reg_3117_pp2_iter2_reg, ap_enable_reg_pp2_iter3)
begin
if (((ap_const_boolean_0 = ap_block_pp2_stage0) and (icmp_ln335_reg_3117_pp2_iter2_reg = ap_const_lv1_0) and (ap_enable_reg_pp2_iter3 = ap_const_logic_1))) then
ap_phi_mux_imgblock_0_5_V_phi_fu_896_p4 <= imgblock_0_9_V_1224_reg_1163;
else
ap_phi_mux_imgblock_0_5_V_phi_fu_896_p4 <= imgblock_0_5_V_reg_893;
end if;
end process;
ap_phi_mux_imgblock_1_0_V_phi_fu_884_p4_assign_proc : process(ap_block_pp2_stage0, imgblock_1_4_V_reg_837, imgblock_1_0_V_reg_880, icmp_ln335_reg_3117_pp2_iter2_reg, ap_enable_reg_pp2_iter3)
begin
if (((ap_const_boolean_0 = ap_block_pp2_stage0) and (icmp_ln335_reg_3117_pp2_iter2_reg = ap_const_lv1_0) and (ap_enable_reg_pp2_iter3 = ap_const_logic_1))) then
ap_phi_mux_imgblock_1_0_V_phi_fu_884_p4 <= imgblock_1_4_V_reg_837;
else
ap_phi_mux_imgblock_1_0_V_phi_fu_884_p4 <= imgblock_1_0_V_reg_880;
end if;
end process;
ap_phi_mux_imgblock_1_1_V_phi_fu_871_p4_assign_proc : process(ap_block_pp2_stage0, imgblock_1_5_V_reg_827, imgblock_1_1_V_reg_867, icmp_ln335_reg_3117_pp2_iter2_reg, ap_enable_reg_pp2_iter3)
begin
if (((ap_const_boolean_0 = ap_block_pp2_stage0) and (icmp_ln335_reg_3117_pp2_iter2_reg = ap_const_lv1_0) and (ap_enable_reg_pp2_iter3 = ap_const_logic_1))) then
ap_phi_mux_imgblock_1_1_V_phi_fu_871_p4 <= imgblock_1_5_V_reg_827;
else
ap_phi_mux_imgblock_1_1_V_phi_fu_871_p4 <= imgblock_1_1_V_reg_867;
end if;
end process;
ap_phi_mux_imgblock_1_2_V_phi_fu_860_p4_assign_proc : process(ap_block_pp2_stage0, imgblock_1_2_V_reg_857, imgblock_1_6_V_1227_reg_1150, icmp_ln335_reg_3117_pp2_iter2_reg, ap_enable_reg_pp2_iter3)
begin
if (((ap_const_boolean_0 = ap_block_pp2_stage0) and (icmp_ln335_reg_3117_pp2_iter2_reg = ap_const_lv1_0) and (ap_enable_reg_pp2_iter3 = ap_const_logic_1))) then
ap_phi_mux_imgblock_1_2_V_phi_fu_860_p4 <= imgblock_1_6_V_1227_reg_1150;
else
ap_phi_mux_imgblock_1_2_V_phi_fu_860_p4 <= imgblock_1_2_V_reg_857;
end if;
end process;
ap_phi_mux_imgblock_1_3_V_phi_fu_850_p4_assign_proc : process(ap_block_pp2_stage0, imgblock_1_3_V_reg_847, imgblock_1_7_V_1228_reg_1137, icmp_ln335_reg_3117_pp2_iter2_reg, ap_enable_reg_pp2_iter3)
begin
if (((ap_const_boolean_0 = ap_block_pp2_stage0) and (icmp_ln335_reg_3117_pp2_iter2_reg = ap_const_lv1_0) and (ap_enable_reg_pp2_iter3 = ap_const_logic_1))) then
ap_phi_mux_imgblock_1_3_V_phi_fu_850_p4 <= imgblock_1_7_V_1228_reg_1137;
else
ap_phi_mux_imgblock_1_3_V_phi_fu_850_p4 <= imgblock_1_3_V_reg_847;
end if;
end process;
ap_phi_mux_imgblock_1_4_V_phi_fu_840_p4_assign_proc : process(ap_block_pp2_stage0, imgblock_1_4_V_reg_837, imgblock_1_8_V_1229_reg_1124, icmp_ln335_reg_3117_pp2_iter2_reg, ap_enable_reg_pp2_iter3)
begin
if (((ap_const_boolean_0 = ap_block_pp2_stage0) and (icmp_ln335_reg_3117_pp2_iter2_reg = ap_const_lv1_0) and (ap_enable_reg_pp2_iter3 = ap_const_logic_1))) then
ap_phi_mux_imgblock_1_4_V_phi_fu_840_p4 <= imgblock_1_8_V_1229_reg_1124;
else
ap_phi_mux_imgblock_1_4_V_phi_fu_840_p4 <= imgblock_1_4_V_reg_837;
end if;
end process;
ap_phi_mux_imgblock_1_5_V_phi_fu_830_p4_assign_proc : process(ap_block_pp2_stage0, imgblock_1_5_V_reg_827, imgblock_1_9_V_1230_reg_1111, icmp_ln335_reg_3117_pp2_iter2_reg, ap_enable_reg_pp2_iter3)
begin
if (((ap_const_boolean_0 = ap_block_pp2_stage0) and (icmp_ln335_reg_3117_pp2_iter2_reg = ap_const_lv1_0) and (ap_enable_reg_pp2_iter3 = ap_const_logic_1))) then
ap_phi_mux_imgblock_1_5_V_phi_fu_830_p4 <= imgblock_1_9_V_1230_reg_1111;
else
ap_phi_mux_imgblock_1_5_V_phi_fu_830_p4 <= imgblock_1_5_V_reg_827;
end if;
end process;
ap_phi_mux_imgblock_2_0_V_phi_fu_818_p4_assign_proc : process(ap_block_pp2_stage0, imgblock_2_4_V_reg_771, imgblock_2_0_V_reg_814, icmp_ln335_reg_3117_pp2_iter2_reg, ap_enable_reg_pp2_iter3)
begin
if (((ap_const_boolean_0 = ap_block_pp2_stage0) and (icmp_ln335_reg_3117_pp2_iter2_reg = ap_const_lv1_0) and (ap_enable_reg_pp2_iter3 = ap_const_logic_1))) then
ap_phi_mux_imgblock_2_0_V_phi_fu_818_p4 <= imgblock_2_4_V_reg_771;
else
ap_phi_mux_imgblock_2_0_V_phi_fu_818_p4 <= imgblock_2_0_V_reg_814;
end if;
end process;
ap_phi_mux_imgblock_2_1_V_phi_fu_805_p4_assign_proc : process(ap_block_pp2_stage0, imgblock_2_5_V_reg_761, imgblock_2_1_V_reg_801, icmp_ln335_reg_3117_pp2_iter2_reg, ap_enable_reg_pp2_iter3)
begin
if (((ap_const_boolean_0 = ap_block_pp2_stage0) and (icmp_ln335_reg_3117_pp2_iter2_reg = ap_const_lv1_0) and (ap_enable_reg_pp2_iter3 = ap_const_logic_1))) then
ap_phi_mux_imgblock_2_1_V_phi_fu_805_p4 <= imgblock_2_5_V_reg_761;
else
ap_phi_mux_imgblock_2_1_V_phi_fu_805_p4 <= imgblock_2_1_V_reg_801;
end if;
end process;
ap_phi_mux_imgblock_2_2_V_phi_fu_794_p4_assign_proc : process(ap_block_pp2_stage0, imgblock_2_2_V_reg_791, imgblock_2_6_V_1233_reg_1098, icmp_ln335_reg_3117_pp2_iter2_reg, ap_enable_reg_pp2_iter3)
begin
if (((ap_const_boolean_0 = ap_block_pp2_stage0) and (icmp_ln335_reg_3117_pp2_iter2_reg = ap_const_lv1_0) and (ap_enable_reg_pp2_iter3 = ap_const_logic_1))) then
ap_phi_mux_imgblock_2_2_V_phi_fu_794_p4 <= imgblock_2_6_V_1233_reg_1098;
else
ap_phi_mux_imgblock_2_2_V_phi_fu_794_p4 <= imgblock_2_2_V_reg_791;
end if;
end process;
ap_phi_mux_imgblock_2_3_V_phi_fu_784_p4_assign_proc : process(ap_block_pp2_stage0, imgblock_2_3_V_reg_781, imgblock_2_7_V_1234_reg_1085, icmp_ln335_reg_3117_pp2_iter2_reg, ap_enable_reg_pp2_iter3)
begin
if (((ap_const_boolean_0 = ap_block_pp2_stage0) and (icmp_ln335_reg_3117_pp2_iter2_reg = ap_const_lv1_0) and (ap_enable_reg_pp2_iter3 = ap_const_logic_1))) then
ap_phi_mux_imgblock_2_3_V_phi_fu_784_p4 <= imgblock_2_7_V_1234_reg_1085;
else
ap_phi_mux_imgblock_2_3_V_phi_fu_784_p4 <= imgblock_2_3_V_reg_781;
end if;
end process;
ap_phi_mux_imgblock_2_4_V_phi_fu_774_p4_assign_proc : process(ap_block_pp2_stage0, imgblock_2_4_V_reg_771, imgblock_2_8_V_1235_reg_1072, icmp_ln335_reg_3117_pp2_iter2_reg, ap_enable_reg_pp2_iter3)
begin
if (((ap_const_boolean_0 = ap_block_pp2_stage0) and (icmp_ln335_reg_3117_pp2_iter2_reg = ap_const_lv1_0) and (ap_enable_reg_pp2_iter3 = ap_const_logic_1))) then
ap_phi_mux_imgblock_2_4_V_phi_fu_774_p4 <= imgblock_2_8_V_1235_reg_1072;
else
ap_phi_mux_imgblock_2_4_V_phi_fu_774_p4 <= imgblock_2_4_V_reg_771;
end if;
end process;
ap_phi_mux_imgblock_2_5_V_phi_fu_764_p4_assign_proc : process(ap_block_pp2_stage0, imgblock_2_5_V_reg_761, imgblock_2_9_V_1236_reg_1059, icmp_ln335_reg_3117_pp2_iter2_reg, ap_enable_reg_pp2_iter3)
begin
if (((ap_const_boolean_0 = ap_block_pp2_stage0) and (icmp_ln335_reg_3117_pp2_iter2_reg = ap_const_lv1_0) and (ap_enable_reg_pp2_iter3 = ap_const_logic_1))) then
ap_phi_mux_imgblock_2_5_V_phi_fu_764_p4 <= imgblock_2_9_V_1236_reg_1059;
else
ap_phi_mux_imgblock_2_5_V_phi_fu_764_p4 <= imgblock_2_5_V_reg_761;
end if;
end process;
ap_phi_mux_imgblock_3_0_V_phi_fu_752_p4_assign_proc : process(ap_block_pp2_stage0, imgblock_3_4_V_reg_705, imgblock_3_0_V_reg_748, icmp_ln335_reg_3117_pp2_iter2_reg, ap_enable_reg_pp2_iter3)
begin
if (((ap_const_boolean_0 = ap_block_pp2_stage0) and (icmp_ln335_reg_3117_pp2_iter2_reg = ap_const_lv1_0) and (ap_enable_reg_pp2_iter3 = ap_const_logic_1))) then
ap_phi_mux_imgblock_3_0_V_phi_fu_752_p4 <= imgblock_3_4_V_reg_705;
else
ap_phi_mux_imgblock_3_0_V_phi_fu_752_p4 <= imgblock_3_0_V_reg_748;
end if;
end process;
ap_phi_mux_imgblock_3_1_V_phi_fu_739_p4_assign_proc : process(ap_block_pp2_stage0, imgblock_3_5_V_reg_695, imgblock_3_1_V_reg_735, icmp_ln335_reg_3117_pp2_iter2_reg, ap_enable_reg_pp2_iter3)
begin
if (((ap_const_boolean_0 = ap_block_pp2_stage0) and (icmp_ln335_reg_3117_pp2_iter2_reg = ap_const_lv1_0) and (ap_enable_reg_pp2_iter3 = ap_const_logic_1))) then
ap_phi_mux_imgblock_3_1_V_phi_fu_739_p4 <= imgblock_3_5_V_reg_695;
else
ap_phi_mux_imgblock_3_1_V_phi_fu_739_p4 <= imgblock_3_1_V_reg_735;
end if;
end process;
ap_phi_mux_imgblock_3_2_V_phi_fu_728_p4_assign_proc : process(ap_block_pp2_stage0, imgblock_3_2_V_reg_725, imgblock_3_6_V_1239_reg_1046, icmp_ln335_reg_3117_pp2_iter2_reg, ap_enable_reg_pp2_iter3)
begin
if (((ap_const_boolean_0 = ap_block_pp2_stage0) and (icmp_ln335_reg_3117_pp2_iter2_reg = ap_const_lv1_0) and (ap_enable_reg_pp2_iter3 = ap_const_logic_1))) then
ap_phi_mux_imgblock_3_2_V_phi_fu_728_p4 <= imgblock_3_6_V_1239_reg_1046;
else
ap_phi_mux_imgblock_3_2_V_phi_fu_728_p4 <= imgblock_3_2_V_reg_725;
end if;
end process;
ap_phi_mux_imgblock_3_3_V_phi_fu_718_p4_assign_proc : process(ap_block_pp2_stage0, imgblock_3_3_V_reg_715, imgblock_3_7_V_1240_reg_1033, icmp_ln335_reg_3117_pp2_iter2_reg, ap_enable_reg_pp2_iter3)
begin
if (((ap_const_boolean_0 = ap_block_pp2_stage0) and (icmp_ln335_reg_3117_pp2_iter2_reg = ap_const_lv1_0) and (ap_enable_reg_pp2_iter3 = ap_const_logic_1))) then
ap_phi_mux_imgblock_3_3_V_phi_fu_718_p4 <= imgblock_3_7_V_1240_reg_1033;
else
ap_phi_mux_imgblock_3_3_V_phi_fu_718_p4 <= imgblock_3_3_V_reg_715;
end if;
end process;
ap_phi_mux_imgblock_3_4_V_phi_fu_708_p4_assign_proc : process(ap_block_pp2_stage0, imgblock_3_4_V_reg_705, imgblock_3_8_V_1241_reg_1020, icmp_ln335_reg_3117_pp2_iter2_reg, ap_enable_reg_pp2_iter3)
begin
if (((ap_const_boolean_0 = ap_block_pp2_stage0) and (icmp_ln335_reg_3117_pp2_iter2_reg = ap_const_lv1_0) and (ap_enable_reg_pp2_iter3 = ap_const_logic_1))) then
ap_phi_mux_imgblock_3_4_V_phi_fu_708_p4 <= imgblock_3_8_V_1241_reg_1020;
else
ap_phi_mux_imgblock_3_4_V_phi_fu_708_p4 <= imgblock_3_4_V_reg_705;
end if;
end process;
ap_phi_mux_imgblock_3_5_V_phi_fu_698_p4_assign_proc : process(ap_block_pp2_stage0, imgblock_3_5_V_reg_695, imgblock_3_9_V_1242_reg_1007, icmp_ln335_reg_3117_pp2_iter2_reg, ap_enable_reg_pp2_iter3)
begin
if (((ap_const_boolean_0 = ap_block_pp2_stage0) and (icmp_ln335_reg_3117_pp2_iter2_reg = ap_const_lv1_0) and (ap_enable_reg_pp2_iter3 = ap_const_logic_1))) then
ap_phi_mux_imgblock_3_5_V_phi_fu_698_p4 <= imgblock_3_9_V_1242_reg_1007;
else
ap_phi_mux_imgblock_3_5_V_phi_fu_698_p4 <= imgblock_3_5_V_reg_695;
end if;
end process;
ap_phi_mux_j10_0_i_phi_fu_659_p4_assign_proc : process(ap_CS_fsm_pp2_stage0, ap_enable_reg_pp2_iter1, ap_block_pp2_stage0, icmp_ln335_reg_3117, j10_0_i_reg_655, j_1_reg_3121)
begin
if (((ap_const_boolean_0 = ap_block_pp2_stage0) and (icmp_ln335_reg_3117 = ap_const_lv1_0) and (ap_enable_reg_pp2_iter1 = ap_const_logic_1) and (ap_const_logic_1 = ap_CS_fsm_pp2_stage0))) then
ap_phi_mux_j10_0_i_phi_fu_659_p4 <= j_1_reg_3121;
else
ap_phi_mux_j10_0_i_phi_fu_659_p4 <= j10_0_i_reg_655;
end if;
end process;
ap_phi_mux_p_Val2_s_phi_fu_686_p4_assign_proc : process(src_mat_data_V_V_dout, icmp_ln335_reg_3117, icmp_ln343_reg_3029, ap_phi_reg_pp2_iter1_p_Val2_s_reg_678)
begin
if (((icmp_ln343_reg_3029 = ap_const_lv1_1) and (icmp_ln335_reg_3117 = ap_const_lv1_0))) then
ap_phi_mux_p_Val2_s_phi_fu_686_p4 <= src_mat_data_V_V_dout;
else
ap_phi_mux_p_Val2_s_phi_fu_686_p4 <= ap_phi_reg_pp2_iter1_p_Val2_s_reg_678;
end if;
end process;
ap_phi_reg_pp2_iter0_imgblock_0_6_V_1221_reg_1202 <= "XXXXXXXXXX";
ap_phi_reg_pp2_iter0_imgblock_0_7_V_1222_reg_1189 <= "XXXXXXXXXX";
ap_phi_reg_pp2_iter0_imgblock_0_8_V_1223_reg_1176 <= "XXXXXXXXXX";
ap_phi_reg_pp2_iter0_imgblock_0_9_V_1224_reg_1163 <= "XXXXXXXXXX";
ap_phi_reg_pp2_iter0_imgblock_1_6_V_1227_reg_1150 <= "XXXXXXXXXX";
ap_phi_reg_pp2_iter0_imgblock_1_7_V_1228_reg_1137 <= "XXXXXXXXXX";
ap_phi_reg_pp2_iter0_imgblock_1_8_V_1229_reg_1124 <= "XXXXXXXXXX";
ap_phi_reg_pp2_iter0_imgblock_1_9_V_1230_reg_1111 <= "XXXXXXXXXX";
ap_phi_reg_pp2_iter0_imgblock_2_6_V_1233_reg_1098 <= "XXXXXXXXXX";
ap_phi_reg_pp2_iter0_imgblock_2_7_V_1234_reg_1085 <= "XXXXXXXXXX";
ap_phi_reg_pp2_iter0_imgblock_2_8_V_1235_reg_1072 <= "XXXXXXXXXX";
ap_phi_reg_pp2_iter0_imgblock_2_9_V_1236_reg_1059 <= "XXXXXXXXXX";
ap_phi_reg_pp2_iter0_imgblock_3_6_V_1239_reg_1046 <= "XXXXXXXXXX";
ap_phi_reg_pp2_iter0_imgblock_3_7_V_1240_reg_1033 <= "XXXXXXXXXX";
ap_phi_reg_pp2_iter0_imgblock_3_8_V_1241_reg_1020 <= "XXXXXXXXXX";
ap_phi_reg_pp2_iter0_imgblock_3_9_V_1242_reg_1007 <= "XXXXXXXXXX";
ap_phi_reg_pp2_iter0_imgblock_4_6_V_0_reg_959 <= "XXXXXXXXXX";
ap_phi_reg_pp2_iter0_imgblock_4_7_V_0_reg_971 <= "XXXXXXXXXX";
ap_phi_reg_pp2_iter0_imgblock_4_8_V_0_reg_983 <= "XXXXXXXXXX";
ap_phi_reg_pp2_iter0_imgblock_4_9_V_0_reg_995 <= "XXXXXXXXXX";
ap_phi_reg_pp2_iter0_p_Val2_s_reg_678 <= "XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX";
ap_predicate_op198_load_state9_assign_proc : process(icmp_ln335_fu_2292_p2, icmp_ln363_fu_2303_p2)
begin
ap_predicate_op198_load_state9 <= ((icmp_ln363_fu_2303_p2 = ap_const_lv1_1) and (icmp_ln335_fu_2292_p2 = ap_const_lv1_0));
end process;
ap_predicate_op200_load_state9_assign_proc : process(icmp_ln335_fu_2292_p2, icmp_ln363_fu_2303_p2)
begin
ap_predicate_op200_load_state9 <= ((icmp_ln363_fu_2303_p2 = ap_const_lv1_1) and (icmp_ln335_fu_2292_p2 = ap_const_lv1_0));
end process;
ap_predicate_op202_load_state9_assign_proc : process(icmp_ln335_fu_2292_p2, icmp_ln363_fu_2303_p2)
begin
ap_predicate_op202_load_state9 <= ((icmp_ln363_fu_2303_p2 = ap_const_lv1_1) and (icmp_ln335_fu_2292_p2 = ap_const_lv1_0));
end process;
ap_predicate_op204_load_state9_assign_proc : process(icmp_ln335_fu_2292_p2, icmp_ln363_fu_2303_p2)
begin
ap_predicate_op204_load_state9 <= ((icmp_ln363_fu_2303_p2 = ap_const_lv1_1) and (icmp_ln335_fu_2292_p2 = ap_const_lv1_0));
end process;
ap_predicate_op207_read_state10_assign_proc : process(icmp_ln335_reg_3117, icmp_ln343_reg_3029)
begin
ap_predicate_op207_read_state10 <= ((icmp_ln343_reg_3029 = ap_const_lv1_1) and (icmp_ln335_reg_3117 = ap_const_lv1_0));
end process;
ap_predicate_op214_load_state10_assign_proc : process(icmp_ln335_reg_3117, icmp_ln363_reg_3126)
begin
ap_predicate_op214_load_state10 <= ((icmp_ln363_reg_3126 = ap_const_lv1_1) and (icmp_ln335_reg_3117 = ap_const_lv1_0));
end process;
ap_predicate_op215_load_state10_assign_proc : process(icmp_ln335_reg_3117, icmp_ln363_reg_3126)
begin
ap_predicate_op215_load_state10 <= ((icmp_ln363_reg_3126 = ap_const_lv1_1) and (icmp_ln335_reg_3117 = ap_const_lv1_0));
end process;
ap_predicate_op216_load_state10_assign_proc : process(icmp_ln335_reg_3117, icmp_ln363_reg_3126)
begin
ap_predicate_op216_load_state10 <= ((icmp_ln363_reg_3126 = ap_const_lv1_1) and (icmp_ln335_reg_3117 = ap_const_lv1_0));
end process;
ap_predicate_op217_load_state10_assign_proc : process(icmp_ln335_reg_3117, icmp_ln363_reg_3126)
begin
ap_predicate_op217_load_state10 <= ((icmp_ln363_reg_3126 = ap_const_lv1_1) and (icmp_ln335_reg_3117 = ap_const_lv1_0));
end process;
ap_predicate_op269_store_state11_assign_proc : process(trunc_ln321_reg_3113, icmp_ln335_reg_3117_pp2_iter1_reg, icmp_ln363_reg_3126_pp2_iter1_reg)
begin
ap_predicate_op269_store_state11 <= ((icmp_ln363_reg_3126_pp2_iter1_reg = ap_const_lv1_0) and (icmp_ln335_reg_3117_pp2_iter1_reg = ap_const_lv1_0) and (trunc_ln321_reg_3113 = ap_const_lv2_2));
end process;
ap_predicate_op271_store_state11_assign_proc : process(trunc_ln321_reg_3113, icmp_ln335_reg_3117_pp2_iter1_reg, icmp_ln363_reg_3126_pp2_iter1_reg)
begin
ap_predicate_op271_store_state11 <= ((icmp_ln363_reg_3126_pp2_iter1_reg = ap_const_lv1_0) and (icmp_ln335_reg_3117_pp2_iter1_reg = ap_const_lv1_0) and (trunc_ln321_reg_3113 = ap_const_lv2_1));
end process;
ap_predicate_op273_store_state11_assign_proc : process(trunc_ln321_reg_3113, icmp_ln335_reg_3117_pp2_iter1_reg, icmp_ln363_reg_3126_pp2_iter1_reg)
begin
ap_predicate_op273_store_state11 <= ((icmp_ln363_reg_3126_pp2_iter1_reg = ap_const_lv1_0) and (icmp_ln335_reg_3117_pp2_iter1_reg = ap_const_lv1_0) and (trunc_ln321_reg_3113 = ap_const_lv2_0));
end process;
ap_predicate_op275_store_state11_assign_proc : process(trunc_ln321_reg_3113, icmp_ln335_reg_3117_pp2_iter1_reg, icmp_ln363_reg_3126_pp2_iter1_reg)
begin
ap_predicate_op275_store_state11 <= ((icmp_ln363_reg_3126_pp2_iter1_reg = ap_const_lv1_0) and (icmp_ln335_reg_3117_pp2_iter1_reg = ap_const_lv1_0) and (trunc_ln321_reg_3113 = ap_const_lv2_3));
end process;
ap_predicate_op282_store_state11_assign_proc : process(trunc_ln321_reg_3113, icmp_ln335_reg_3117_pp2_iter1_reg, icmp_ln363_reg_3126_pp2_iter1_reg)
begin
ap_predicate_op282_store_state11 <= ((icmp_ln363_reg_3126_pp2_iter1_reg = ap_const_lv1_1) and (icmp_ln335_reg_3117_pp2_iter1_reg = ap_const_lv1_0) and (trunc_ln321_reg_3113 = ap_const_lv2_2));
end process;
ap_predicate_op284_store_state11_assign_proc : process(trunc_ln321_reg_3113, icmp_ln335_reg_3117_pp2_iter1_reg, icmp_ln363_reg_3126_pp2_iter1_reg)
begin
ap_predicate_op284_store_state11 <= ((icmp_ln363_reg_3126_pp2_iter1_reg = ap_const_lv1_1) and (icmp_ln335_reg_3117_pp2_iter1_reg = ap_const_lv1_0) and (trunc_ln321_reg_3113 = ap_const_lv2_1));
end process;
ap_predicate_op286_store_state11_assign_proc : process(trunc_ln321_reg_3113, icmp_ln335_reg_3117_pp2_iter1_reg, icmp_ln363_reg_3126_pp2_iter1_reg)
begin
ap_predicate_op286_store_state11 <= ((icmp_ln363_reg_3126_pp2_iter1_reg = ap_const_lv1_1) and (icmp_ln335_reg_3117_pp2_iter1_reg = ap_const_lv1_0) and (trunc_ln321_reg_3113 = ap_const_lv2_0));
end process;
ap_predicate_op288_store_state11_assign_proc : process(trunc_ln321_reg_3113, icmp_ln335_reg_3117_pp2_iter1_reg, icmp_ln363_reg_3126_pp2_iter1_reg)
begin
ap_predicate_op288_store_state11 <= ((icmp_ln363_reg_3126_pp2_iter1_reg = ap_const_lv1_1) and (icmp_ln335_reg_3117_pp2_iter1_reg = ap_const_lv1_0) and (trunc_ln321_reg_3113 = ap_const_lv2_3));
end process;
ap_ready_assign_proc : process(ap_CS_fsm_state5, icmp_ln277_fu_1900_p2)
begin
if (((icmp_ln277_fu_1900_p2 = ap_const_lv1_1) and (ap_const_logic_1 = ap_CS_fsm_state5))) then
ap_ready <= ap_const_logic_1;
else
ap_ready <= ap_const_logic_0;
end if;
end process;
bram_read_count_fu_2316_p2 <= std_logic_vector(unsigned(ap_const_lv15_1) + unsigned(bram_read_count_0_i_reg_667));
dst_mat_data_V_V_blk_n_assign_proc : process(dst_mat_data_V_V_full_n, ap_block_pp2_stage0, ap_enable_reg_pp2_iter8, icmp_ln335_reg_3117_pp2_iter7_reg)
begin
if (((ap_const_boolean_0 = ap_block_pp2_stage0) and (icmp_ln335_reg_3117_pp2_iter7_reg = ap_const_lv1_0) and (ap_enable_reg_pp2_iter8 = ap_const_logic_1))) then
dst_mat_data_V_V_blk_n <= dst_mat_data_V_V_full_n;
else
dst_mat_data_V_V_blk_n <= ap_const_logic_1;
end if;
end process;
dst_mat_data_V_V_din <= (((((((((((select_ln41_11_fu_2793_p3 & select_ln41_10_fu_2781_p3) & select_ln41_9_fu_2769_p3) & select_ln41_8_fu_2757_p3) & select_ln41_7_fu_2745_p3) & select_ln41_6_fu_2733_p3) & select_ln41_5_fu_2721_p3) & select_ln41_4_fu_2709_p3) & select_ln41_3_fu_2697_p3) & select_ln41_2_fu_2685_p3) & select_ln41_1_fu_2673_p3) & select_ln41_fu_2661_p3);
dst_mat_data_V_V_write_assign_proc : process(ap_enable_reg_pp2_iter8, icmp_ln335_reg_3117_pp2_iter7_reg, ap_block_pp2_stage0_11001)
begin
if (((icmp_ln335_reg_3117_pp2_iter7_reg = ap_const_lv1_0) and (ap_enable_reg_pp2_iter8 = ap_const_logic_1) and (ap_const_boolean_0 = ap_block_pp2_stage0_11001))) then
dst_mat_data_V_V_write <= ap_const_logic_1;
else
dst_mat_data_V_V_write <= ap_const_logic_0;
end if;
end process;
grp_Core_Process_fu_1215_ap_ce_assign_proc : process(ap_CS_fsm_pp2_stage0, ap_block_pp2_stage0_11001_ignoreCallOp313)
begin
if (((ap_const_boolean_0 = ap_block_pp2_stage0_11001_ignoreCallOp313) and (ap_const_logic_1 = ap_CS_fsm_pp2_stage0))) then
grp_Core_Process_fu_1215_ap_ce <= ap_const_logic_1;
else
grp_Core_Process_fu_1215_ap_ce <= ap_const_logic_0;
end if;
end process;
grp_Core_Process_fu_1318_ap_ce_assign_proc : process(ap_CS_fsm_pp2_stage0, ap_block_pp2_stage0_11001_ignoreCallOp315)
begin
if (((ap_const_boolean_0 = ap_block_pp2_stage0_11001_ignoreCallOp315) and (ap_const_logic_1 = ap_CS_fsm_pp2_stage0))) then
grp_Core_Process_fu_1318_ap_ce <= ap_const_logic_1;
else
grp_Core_Process_fu_1318_ap_ce <= ap_const_logic_0;
end if;
end process;
grp_Core_Process_fu_1318_col <= (shl_ln_fu_2402_p3 or ap_const_lv16_1);
grp_Core_Process_fu_1421_ap_ce_assign_proc : process(ap_CS_fsm_pp2_stage0, ap_block_pp2_stage0_11001_ignoreCallOp317)
begin
if (((ap_const_logic_1 = ap_CS_fsm_pp2_stage0) and (ap_const_boolean_0 = ap_block_pp2_stage0_11001_ignoreCallOp317))) then
grp_Core_Process_fu_1421_ap_ce <= ap_const_logic_1;
else
grp_Core_Process_fu_1421_ap_ce <= ap_const_logic_0;
end if;
end process;
grp_Core_Process_fu_1421_col <= (shl_ln_fu_2402_p3 or ap_const_lv16_2);
grp_Core_Process_fu_1524_ap_ce_assign_proc : process(ap_CS_fsm_pp2_stage0, ap_block_pp2_stage0_11001_ignoreCallOp319)
begin
if (((ap_const_logic_1 = ap_CS_fsm_pp2_stage0) and (ap_const_boolean_0 = ap_block_pp2_stage0_11001_ignoreCallOp319))) then
grp_Core_Process_fu_1524_ap_ce <= ap_const_logic_1;
else
grp_Core_Process_fu_1524_ap_ce <= ap_const_logic_0;
end if;
end process;
grp_Core_Process_fu_1524_col <= (shl_ln_fu_2402_p3 or ap_const_lv16_3);
i_1_fu_1905_p2 <= std_logic_vector(unsigned(i9_0_i_reg_544) + unsigned(ap_const_lv16_1));
i_fu_1836_p2 <= std_logic_vector(unsigned(ap_const_lv2_1) + unsigned(ap_phi_mux_i_0_i_phi_fu_408_p4));
icmp_ln257_fu_1825_p2 <= "1" when (indvar_flatten_reg_393 = tmp_37_reg_2855) else "0";
icmp_ln261_fu_1842_p2 <= "0" when (j_0_i_reg_415 = tmp_34_reg_2844) else "1";
icmp_ln277_fu_1900_p2 <= "1" when (i9_0_i_reg_544 = src_mat_rows_read_reg_2834) else "0";
icmp_ln283_fu_1921_p2 <= "1" when (signed(tmp_143_fu_1911_p4) > signed(ap_const_lv30_0)) else "0";
icmp_ln310_fu_2077_p2 <= "1" when (p_0_i_reg_644 = ap_const_lv3_4) else "0";
icmp_ln335_fu_2292_p2 <= "1" when (bram_read_count_0_i_reg_667 = add_ln277_reg_2905) else "0";
icmp_ln343_fu_2265_p2 <= "1" when (signed(zext_ln277_reg_2940) < signed(add_ln343_reg_2910)) else "0";
icmp_ln363_fu_2303_p2 <= "1" when (signed(zext_ln335_fu_2288_p1) < signed(add_ln363_reg_2915)) else "0";
icmp_ln41_10_fu_2776_p2 <= "1" when (signed(tmp_154_reg_3409) > signed(ap_const_lv22_0)) else "0";
icmp_ln41_11_fu_2788_p2 <= "1" when (signed(tmp_155_reg_3419) > signed(ap_const_lv22_0)) else "0";
icmp_ln41_1_fu_2668_p2 <= "1" when (signed(tmp_145_reg_3319) > signed(ap_const_lv22_0)) else "0";
icmp_ln41_2_fu_2680_p2 <= "1" when (signed(tmp_146_reg_3329) > signed(ap_const_lv22_0)) else "0";
icmp_ln41_3_fu_2692_p2 <= "1" when (signed(tmp_147_reg_3339) > signed(ap_const_lv22_0)) else "0";
icmp_ln41_4_fu_2704_p2 <= "1" when (signed(tmp_148_reg_3349) > signed(ap_const_lv22_0)) else "0";
icmp_ln41_5_fu_2716_p2 <= "1" when (signed(tmp_149_reg_3359) > signed(ap_const_lv22_0)) else "0";
icmp_ln41_6_fu_2728_p2 <= "1" when (signed(tmp_150_reg_3369) > signed(ap_const_lv22_0)) else "0";
icmp_ln41_7_fu_2740_p2 <= "1" when (signed(tmp_151_reg_3379) > signed(ap_const_lv22_0)) else "0";
icmp_ln41_8_fu_2752_p2 <= "1" when (signed(tmp_152_reg_3389) > signed(ap_const_lv22_0)) else "0";
icmp_ln41_9_fu_2764_p2 <= "1" when (signed(tmp_153_reg_3399) > signed(ap_const_lv22_0)) else "0";
icmp_ln41_fu_2656_p2 <= "1" when (signed(tmp_144_reg_3309) > signed(ap_const_lv22_0)) else "0";
icmp_ln879_1_fu_1941_p2 <= "1" when (p_0491_0_i_reg_522 = ap_const_lv2_1) else "0";
icmp_ln879_2_fu_1947_p2 <= "1" when (p_0491_0_i_reg_522 = ap_const_lv2_2) else "0";
icmp_ln879_fu_1935_p2 <= "1" when (p_0491_0_i_reg_522 = ap_const_lv2_0) else "0";
imgblock_0_6_V_2_fu_2356_p1 <= grp_fu_1627_p6(10 - 1 downto 0);
imgblock_0_6_V_fu_2269_p1 <= grp_fu_1627_p6(10 - 1 downto 0);
imgblock_1_6_V_2_fu_2360_p1 <= grp_fu_1640_p6(10 - 1 downto 0);
imgblock_1_6_V_fu_2273_p1 <= grp_fu_1640_p6(10 - 1 downto 0);
imgblock_2_6_V_2_fu_2364_p1 <= grp_fu_1653_p6(10 - 1 downto 0);
imgblock_2_6_V_fu_2277_p1 <= grp_fu_1653_p6(10 - 1 downto 0);
imgblock_3_6_V_2_fu_2368_p1 <= grp_fu_1666_p6(10 - 1 downto 0);
imgblock_3_6_V_fu_2281_p1 <= grp_fu_1666_p6(10 - 1 downto 0);
imgblock_4_2_V_fu_2322_p1 <= ap_phi_mux_p_Val2_s_phi_fu_686_p4(10 - 1 downto 0);
j_1_fu_2297_p2 <= std_logic_vector(unsigned(ap_phi_mux_j10_0_i_phi_fu_659_p4) + unsigned(ap_const_lv14_1));
j_fu_1875_p2 <= std_logic_vector(unsigned(select_ln261_fu_1847_p3) + unsigned(ap_const_lv14_1));
linebuffer_0_V_address0_assign_proc : process(ap_CS_fsm_pp0_stage0, ap_block_pp0_stage0, ap_CS_fsm_pp2_stage0, ap_block_pp2_stage0, ap_enable_reg_pp0_iter0, ap_CS_fsm_state7, ap_enable_reg_pp2_iter0, zext_ln267_fu_1867_p1, zext_ln366_fu_2308_p1)
begin
if (((ap_const_boolean_0 = ap_block_pp2_stage0) and (ap_const_logic_1 = ap_CS_fsm_pp2_stage0) and (ap_enable_reg_pp2_iter0 = ap_const_logic_1))) then
linebuffer_0_V_address0 <= zext_ln366_fu_2308_p1(10 - 1 downto 0);
elsif ((ap_const_logic_1 = ap_CS_fsm_state7)) then
linebuffer_0_V_address0 <= ap_const_lv64_0(10 - 1 downto 0);
elsif (((ap_const_boolean_0 = ap_block_pp0_stage0) and (ap_const_logic_1 = ap_CS_fsm_pp0_stage0) and (ap_enable_reg_pp0_iter0 = ap_const_logic_1))) then
linebuffer_0_V_address0 <= zext_ln267_fu_1867_p1(10 - 1 downto 0);
else
linebuffer_0_V_address0 <= "XXXXXXXXXX";
end if;
end process;
linebuffer_0_V_address1_assign_proc : process(icmp_ln363_reg_3126_pp2_iter1_reg, zext_ln386_fu_2372_p1, zext_ln379_fu_2380_p1, ap_condition_2223)
begin
if ((ap_const_boolean_1 = ap_condition_2223)) then
if ((icmp_ln363_reg_3126_pp2_iter1_reg = ap_const_lv1_1)) then
linebuffer_0_V_address1 <= zext_ln379_fu_2380_p1(10 - 1 downto 0);
elsif ((icmp_ln363_reg_3126_pp2_iter1_reg = ap_const_lv1_0)) then
linebuffer_0_V_address1 <= zext_ln386_fu_2372_p1(10 - 1 downto 0);
else
linebuffer_0_V_address1 <= "XXXXXXXXXX";
end if;
else
linebuffer_0_V_address1 <= "XXXXXXXXXX";
end if;
end process;
linebuffer_0_V_ce0_assign_proc : process(ap_CS_fsm_pp0_stage0, ap_CS_fsm_pp2_stage0, ap_block_pp2_stage0_11001, ap_block_pp0_stage0_11001, ap_enable_reg_pp0_iter0, ap_CS_fsm_state7, ap_enable_reg_pp2_iter0)
begin
if (((ap_const_logic_1 = ap_CS_fsm_state7) or ((ap_const_logic_1 = ap_CS_fsm_pp2_stage0) and (ap_enable_reg_pp2_iter0 = ap_const_logic_1) and (ap_const_boolean_0 = ap_block_pp2_stage0_11001)) or ((ap_const_boolean_0 = ap_block_pp0_stage0_11001) and (ap_const_logic_1 = ap_CS_fsm_pp0_stage0) and (ap_enable_reg_pp0_iter0 = ap_const_logic_1)))) then
linebuffer_0_V_ce0 <= ap_const_logic_1;
else
linebuffer_0_V_ce0 <= ap_const_logic_0;
end if;
end process;
linebuffer_0_V_ce1_assign_proc : process(ap_block_pp2_stage0_11001, trunc_ln321_reg_3113, icmp_ln335_reg_3117_pp2_iter1_reg, icmp_ln363_reg_3126_pp2_iter1_reg, ap_enable_reg_pp2_iter2)
begin
if ((((icmp_ln363_reg_3126_pp2_iter1_reg = ap_const_lv1_1) and (icmp_ln335_reg_3117_pp2_iter1_reg = ap_const_lv1_0) and (trunc_ln321_reg_3113 = ap_const_lv2_0) and (ap_enable_reg_pp2_iter2 = ap_const_logic_1) and (ap_const_boolean_0 = ap_block_pp2_stage0_11001)) or ((icmp_ln363_reg_3126_pp2_iter1_reg = ap_const_lv1_0) and (icmp_ln335_reg_3117_pp2_iter1_reg = ap_const_lv1_0) and (trunc_ln321_reg_3113 = ap_const_lv2_0) and (ap_enable_reg_pp2_iter2 = ap_const_logic_1) and (ap_const_boolean_0 = ap_block_pp2_stage0_11001)))) then
linebuffer_0_V_ce1 <= ap_const_logic_1;
else
linebuffer_0_V_ce1 <= ap_const_logic_0;
end if;
end process;
linebuffer_0_V_we0_assign_proc : process(ap_CS_fsm_pp0_stage0, icmp_ln257_fu_1825_p2, ap_block_pp0_stage0_11001, ap_enable_reg_pp0_iter0, trunc_ln261_fu_1863_p1)
begin
if (((trunc_ln261_fu_1863_p1 = ap_const_lv1_0) and (icmp_ln257_fu_1825_p2 = ap_const_lv1_0) and (ap_const_boolean_0 = ap_block_pp0_stage0_11001) and (ap_const_logic_1 = ap_CS_fsm_pp0_stage0) and (ap_enable_reg_pp0_iter0 = ap_const_logic_1))) then
linebuffer_0_V_we0 <= ap_const_logic_1;
else
linebuffer_0_V_we0 <= ap_const_logic_0;
end if;
end process;
linebuffer_0_V_we1_assign_proc : process(ap_block_pp2_stage0_11001, trunc_ln321_reg_3113, icmp_ln335_reg_3117_pp2_iter1_reg, icmp_ln363_reg_3126_pp2_iter1_reg, ap_enable_reg_pp2_iter2)
begin
if ((((icmp_ln363_reg_3126_pp2_iter1_reg = ap_const_lv1_1) and (icmp_ln335_reg_3117_pp2_iter1_reg = ap_const_lv1_0) and (trunc_ln321_reg_3113 = ap_const_lv2_0) and (ap_enable_reg_pp2_iter2 = ap_const_logic_1) and (ap_const_boolean_0 = ap_block_pp2_stage0_11001)) or ((icmp_ln363_reg_3126_pp2_iter1_reg = ap_const_lv1_0) and (icmp_ln335_reg_3117_pp2_iter1_reg = ap_const_lv1_0) and (trunc_ln321_reg_3113 = ap_const_lv2_0) and (ap_enable_reg_pp2_iter2 = ap_const_logic_1) and (ap_const_boolean_0 = ap_block_pp2_stage0_11001)))) then
linebuffer_0_V_we1 <= ap_const_logic_1;
else
linebuffer_0_V_we1 <= ap_const_logic_0;
end if;
end process;
linebuffer_1_V_address0_assign_proc : process(ap_CS_fsm_pp0_stage0, ap_block_pp0_stage0, ap_CS_fsm_pp2_stage0, ap_block_pp2_stage0, ap_enable_reg_pp0_iter0, ap_CS_fsm_state7, ap_enable_reg_pp2_iter0, zext_ln267_fu_1867_p1, zext_ln366_fu_2308_p1)
begin
if (((ap_const_boolean_0 = ap_block_pp2_stage0) and (ap_const_logic_1 = ap_CS_fsm_pp2_stage0) and (ap_enable_reg_pp2_iter0 = ap_const_logic_1))) then
linebuffer_1_V_address0 <= zext_ln366_fu_2308_p1(10 - 1 downto 0);
elsif ((ap_const_logic_1 = ap_CS_fsm_state7)) then
linebuffer_1_V_address0 <= ap_const_lv64_0(10 - 1 downto 0);
elsif (((ap_const_boolean_0 = ap_block_pp0_stage0) and (ap_const_logic_1 = ap_CS_fsm_pp0_stage0) and (ap_enable_reg_pp0_iter0 = ap_const_logic_1))) then
linebuffer_1_V_address0 <= zext_ln267_fu_1867_p1(10 - 1 downto 0);
else
linebuffer_1_V_address0 <= "XXXXXXXXXX";
end if;
end process;
linebuffer_1_V_address1_assign_proc : process(icmp_ln363_reg_3126_pp2_iter1_reg, zext_ln386_fu_2372_p1, zext_ln379_fu_2380_p1, ap_condition_2226)
begin
if ((ap_const_boolean_1 = ap_condition_2226)) then
if ((icmp_ln363_reg_3126_pp2_iter1_reg = ap_const_lv1_1)) then
linebuffer_1_V_address1 <= zext_ln379_fu_2380_p1(10 - 1 downto 0);
elsif ((icmp_ln363_reg_3126_pp2_iter1_reg = ap_const_lv1_0)) then
linebuffer_1_V_address1 <= zext_ln386_fu_2372_p1(10 - 1 downto 0);
else
linebuffer_1_V_address1 <= "XXXXXXXXXX";
end if;
else
linebuffer_1_V_address1 <= "XXXXXXXXXX";
end if;
end process;
linebuffer_1_V_ce0_assign_proc : process(ap_CS_fsm_pp0_stage0, ap_CS_fsm_pp2_stage0, ap_block_pp2_stage0_11001, ap_block_pp0_stage0_11001, ap_enable_reg_pp0_iter0, ap_CS_fsm_state7, ap_enable_reg_pp2_iter0)
begin
if (((ap_const_logic_1 = ap_CS_fsm_state7) or ((ap_const_logic_1 = ap_CS_fsm_pp2_stage0) and (ap_enable_reg_pp2_iter0 = ap_const_logic_1) and (ap_const_boolean_0 = ap_block_pp2_stage0_11001)) or ((ap_const_boolean_0 = ap_block_pp0_stage0_11001) and (ap_const_logic_1 = ap_CS_fsm_pp0_stage0) and (ap_enable_reg_pp0_iter0 = ap_const_logic_1)))) then
linebuffer_1_V_ce0 <= ap_const_logic_1;
else
linebuffer_1_V_ce0 <= ap_const_logic_0;
end if;
end process;
linebuffer_1_V_ce1_assign_proc : process(ap_block_pp2_stage0_11001, trunc_ln321_reg_3113, icmp_ln335_reg_3117_pp2_iter1_reg, icmp_ln363_reg_3126_pp2_iter1_reg, ap_enable_reg_pp2_iter2)
begin
if ((((icmp_ln363_reg_3126_pp2_iter1_reg = ap_const_lv1_1) and (icmp_ln335_reg_3117_pp2_iter1_reg = ap_const_lv1_0) and (trunc_ln321_reg_3113 = ap_const_lv2_1) and (ap_enable_reg_pp2_iter2 = ap_const_logic_1) and (ap_const_boolean_0 = ap_block_pp2_stage0_11001)) or ((icmp_ln363_reg_3126_pp2_iter1_reg = ap_const_lv1_0) and (icmp_ln335_reg_3117_pp2_iter1_reg = ap_const_lv1_0) and (trunc_ln321_reg_3113 = ap_const_lv2_1) and (ap_enable_reg_pp2_iter2 = ap_const_logic_1) and (ap_const_boolean_0 = ap_block_pp2_stage0_11001)))) then
linebuffer_1_V_ce1 <= ap_const_logic_1;
else
linebuffer_1_V_ce1 <= ap_const_logic_0;
end if;
end process;
linebuffer_1_V_we0_assign_proc : process(ap_CS_fsm_pp0_stage0, icmp_ln257_fu_1825_p2, ap_block_pp0_stage0_11001, ap_enable_reg_pp0_iter0, trunc_ln261_fu_1863_p1)
begin
if (((trunc_ln261_fu_1863_p1 = ap_const_lv1_1) and (icmp_ln257_fu_1825_p2 = ap_const_lv1_0) and (ap_const_boolean_0 = ap_block_pp0_stage0_11001) and (ap_const_logic_1 = ap_CS_fsm_pp0_stage0) and (ap_enable_reg_pp0_iter0 = ap_const_logic_1))) then
linebuffer_1_V_we0 <= ap_const_logic_1;
else
linebuffer_1_V_we0 <= ap_const_logic_0;
end if;
end process;
linebuffer_1_V_we1_assign_proc : process(ap_block_pp2_stage0_11001, trunc_ln321_reg_3113, icmp_ln335_reg_3117_pp2_iter1_reg, icmp_ln363_reg_3126_pp2_iter1_reg, ap_enable_reg_pp2_iter2)
begin
if ((((icmp_ln363_reg_3126_pp2_iter1_reg = ap_const_lv1_1) and (icmp_ln335_reg_3117_pp2_iter1_reg = ap_const_lv1_0) and (trunc_ln321_reg_3113 = ap_const_lv2_1) and (ap_enable_reg_pp2_iter2 = ap_const_logic_1) and (ap_const_boolean_0 = ap_block_pp2_stage0_11001)) or ((icmp_ln363_reg_3126_pp2_iter1_reg = ap_const_lv1_0) and (icmp_ln335_reg_3117_pp2_iter1_reg = ap_const_lv1_0) and (trunc_ln321_reg_3113 = ap_const_lv2_1) and (ap_enable_reg_pp2_iter2 = ap_const_logic_1) and (ap_const_boolean_0 = ap_block_pp2_stage0_11001)))) then
linebuffer_1_V_we1 <= ap_const_logic_1;
else
linebuffer_1_V_we1 <= ap_const_logic_0;
end if;
end process;
linebuffer_2_V_address0_assign_proc : process(ap_CS_fsm_pp0_stage0, ap_enable_reg_pp0_iter1, ap_block_pp0_stage0, ap_CS_fsm_pp2_stage0, ap_block_pp2_stage0, linebuffer_2_V_addr_reg_2878, ap_CS_fsm_state7, ap_enable_reg_pp2_iter0, zext_ln366_fu_2308_p1)
begin
if (((ap_const_boolean_0 = ap_block_pp2_stage0) and (ap_const_logic_1 = ap_CS_fsm_pp2_stage0) and (ap_enable_reg_pp2_iter0 = ap_const_logic_1))) then
linebuffer_2_V_address0 <= zext_ln366_fu_2308_p1(10 - 1 downto 0);
elsif ((ap_const_logic_1 = ap_CS_fsm_state7)) then
linebuffer_2_V_address0 <= ap_const_lv64_0(10 - 1 downto 0);
elsif (((ap_const_boolean_0 = ap_block_pp0_stage0) and (ap_enable_reg_pp0_iter1 = ap_const_logic_1) and (ap_const_logic_1 = ap_CS_fsm_pp0_stage0))) then
linebuffer_2_V_address0 <= linebuffer_2_V_addr_reg_2878;
else
linebuffer_2_V_address0 <= "XXXXXXXXXX";
end if;
end process;
linebuffer_2_V_address1_assign_proc : process(icmp_ln363_reg_3126_pp2_iter1_reg, zext_ln386_fu_2372_p1, zext_ln379_fu_2380_p1, ap_condition_2229)
begin
if ((ap_const_boolean_1 = ap_condition_2229)) then
if ((icmp_ln363_reg_3126_pp2_iter1_reg = ap_const_lv1_1)) then
linebuffer_2_V_address1 <= zext_ln379_fu_2380_p1(10 - 1 downto 0);
elsif ((icmp_ln363_reg_3126_pp2_iter1_reg = ap_const_lv1_0)) then
linebuffer_2_V_address1 <= zext_ln386_fu_2372_p1(10 - 1 downto 0);
else
linebuffer_2_V_address1 <= "XXXXXXXXXX";
end if;
else
linebuffer_2_V_address1 <= "XXXXXXXXXX";
end if;
end process;
linebuffer_2_V_ce0_assign_proc : process(ap_CS_fsm_pp0_stage0, ap_enable_reg_pp0_iter1, ap_CS_fsm_pp2_stage0, ap_block_pp2_stage0_11001, ap_block_pp0_stage0_11001, ap_CS_fsm_state7, ap_enable_reg_pp2_iter0)
begin
if (((ap_const_logic_1 = ap_CS_fsm_state7) or ((ap_const_logic_1 = ap_CS_fsm_pp2_stage0) and (ap_enable_reg_pp2_iter0 = ap_const_logic_1) and (ap_const_boolean_0 = ap_block_pp2_stage0_11001)) or ((ap_const_boolean_0 = ap_block_pp0_stage0_11001) and (ap_enable_reg_pp0_iter1 = ap_const_logic_1) and (ap_const_logic_1 = ap_CS_fsm_pp0_stage0)))) then
linebuffer_2_V_ce0 <= ap_const_logic_1;
else
linebuffer_2_V_ce0 <= ap_const_logic_0;
end if;
end process;
linebuffer_2_V_ce1_assign_proc : process(ap_block_pp2_stage0_11001, trunc_ln321_reg_3113, icmp_ln335_reg_3117_pp2_iter1_reg, icmp_ln363_reg_3126_pp2_iter1_reg, ap_enable_reg_pp2_iter2)
begin
if ((((icmp_ln363_reg_3126_pp2_iter1_reg = ap_const_lv1_1) and (icmp_ln335_reg_3117_pp2_iter1_reg = ap_const_lv1_0) and (trunc_ln321_reg_3113 = ap_const_lv2_2) and (ap_enable_reg_pp2_iter2 = ap_const_logic_1) and (ap_const_boolean_0 = ap_block_pp2_stage0_11001)) or ((icmp_ln363_reg_3126_pp2_iter1_reg = ap_const_lv1_0) and (icmp_ln335_reg_3117_pp2_iter1_reg = ap_const_lv1_0) and (trunc_ln321_reg_3113 = ap_const_lv2_2) and (ap_enable_reg_pp2_iter2 = ap_const_logic_1) and (ap_const_boolean_0 = ap_block_pp2_stage0_11001)))) then
linebuffer_2_V_ce1 <= ap_const_logic_1;
else
linebuffer_2_V_ce1 <= ap_const_logic_0;
end if;
end process;
linebuffer_2_V_we0_assign_proc : process(ap_CS_fsm_pp0_stage0, ap_enable_reg_pp0_iter1, ap_block_pp0_stage0_11001, trunc_ln261_reg_2874)
begin
if (((trunc_ln261_reg_2874 = ap_const_lv1_0) and (ap_const_boolean_0 = ap_block_pp0_stage0_11001) and (ap_enable_reg_pp0_iter1 = ap_const_logic_1) and (ap_const_logic_1 = ap_CS_fsm_pp0_stage0))) then
linebuffer_2_V_we0 <= ap_const_logic_1;
else
linebuffer_2_V_we0 <= ap_const_logic_0;
end if;
end process;
linebuffer_2_V_we1_assign_proc : process(ap_block_pp2_stage0_11001, trunc_ln321_reg_3113, icmp_ln335_reg_3117_pp2_iter1_reg, icmp_ln363_reg_3126_pp2_iter1_reg, ap_enable_reg_pp2_iter2)
begin
if ((((icmp_ln363_reg_3126_pp2_iter1_reg = ap_const_lv1_1) and (icmp_ln335_reg_3117_pp2_iter1_reg = ap_const_lv1_0) and (trunc_ln321_reg_3113 = ap_const_lv2_2) and (ap_enable_reg_pp2_iter2 = ap_const_logic_1) and (ap_const_boolean_0 = ap_block_pp2_stage0_11001)) or ((icmp_ln363_reg_3126_pp2_iter1_reg = ap_const_lv1_0) and (icmp_ln335_reg_3117_pp2_iter1_reg = ap_const_lv1_0) and (trunc_ln321_reg_3113 = ap_const_lv2_2) and (ap_enable_reg_pp2_iter2 = ap_const_logic_1) and (ap_const_boolean_0 = ap_block_pp2_stage0_11001)))) then
linebuffer_2_V_we1 <= ap_const_logic_1;
else
linebuffer_2_V_we1 <= ap_const_logic_0;
end if;
end process;
linebuffer_3_V_address0_assign_proc : process(ap_CS_fsm_pp0_stage0, ap_enable_reg_pp0_iter1, ap_block_pp0_stage0, ap_CS_fsm_pp2_stage0, ap_block_pp2_stage0, linebuffer_3_V_addr_reg_2883, ap_CS_fsm_state7, ap_enable_reg_pp2_iter0, zext_ln366_fu_2308_p1)
begin
if (((ap_const_boolean_0 = ap_block_pp2_stage0) and (ap_const_logic_1 = ap_CS_fsm_pp2_stage0) and (ap_enable_reg_pp2_iter0 = ap_const_logic_1))) then
linebuffer_3_V_address0 <= zext_ln366_fu_2308_p1(10 - 1 downto 0);
elsif ((ap_const_logic_1 = ap_CS_fsm_state7)) then
linebuffer_3_V_address0 <= ap_const_lv64_0(10 - 1 downto 0);
elsif (((ap_const_boolean_0 = ap_block_pp0_stage0) and (ap_enable_reg_pp0_iter1 = ap_const_logic_1) and (ap_const_logic_1 = ap_CS_fsm_pp0_stage0))) then
linebuffer_3_V_address0 <= linebuffer_3_V_addr_reg_2883;
else
linebuffer_3_V_address0 <= "XXXXXXXXXX";
end if;
end process;
linebuffer_3_V_address1_assign_proc : process(icmp_ln363_reg_3126_pp2_iter1_reg, zext_ln386_fu_2372_p1, zext_ln379_fu_2380_p1, ap_condition_2232)
begin
if ((ap_const_boolean_1 = ap_condition_2232)) then
if ((icmp_ln363_reg_3126_pp2_iter1_reg = ap_const_lv1_1)) then
linebuffer_3_V_address1 <= zext_ln379_fu_2380_p1(10 - 1 downto 0);
elsif ((icmp_ln363_reg_3126_pp2_iter1_reg = ap_const_lv1_0)) then
linebuffer_3_V_address1 <= zext_ln386_fu_2372_p1(10 - 1 downto 0);
else
linebuffer_3_V_address1 <= "XXXXXXXXXX";
end if;
else
linebuffer_3_V_address1 <= "XXXXXXXXXX";
end if;
end process;
linebuffer_3_V_ce0_assign_proc : process(ap_CS_fsm_pp0_stage0, ap_enable_reg_pp0_iter1, ap_CS_fsm_pp2_stage0, ap_block_pp2_stage0_11001, ap_block_pp0_stage0_11001, ap_CS_fsm_state7, ap_enable_reg_pp2_iter0)
begin
if (((ap_const_logic_1 = ap_CS_fsm_state7) or ((ap_const_logic_1 = ap_CS_fsm_pp2_stage0) and (ap_enable_reg_pp2_iter0 = ap_const_logic_1) and (ap_const_boolean_0 = ap_block_pp2_stage0_11001)) or ((ap_const_boolean_0 = ap_block_pp0_stage0_11001) and (ap_enable_reg_pp0_iter1 = ap_const_logic_1) and (ap_const_logic_1 = ap_CS_fsm_pp0_stage0)))) then
linebuffer_3_V_ce0 <= ap_const_logic_1;
else
linebuffer_3_V_ce0 <= ap_const_logic_0;
end if;
end process;
linebuffer_3_V_ce1_assign_proc : process(ap_block_pp2_stage0_11001, trunc_ln321_reg_3113, icmp_ln335_reg_3117_pp2_iter1_reg, icmp_ln363_reg_3126_pp2_iter1_reg, ap_enable_reg_pp2_iter2)
begin
if ((((icmp_ln363_reg_3126_pp2_iter1_reg = ap_const_lv1_1) and (icmp_ln335_reg_3117_pp2_iter1_reg = ap_const_lv1_0) and (trunc_ln321_reg_3113 = ap_const_lv2_3) and (ap_enable_reg_pp2_iter2 = ap_const_logic_1) and (ap_const_boolean_0 = ap_block_pp2_stage0_11001)) or ((icmp_ln363_reg_3126_pp2_iter1_reg = ap_const_lv1_0) and (icmp_ln335_reg_3117_pp2_iter1_reg = ap_const_lv1_0) and (trunc_ln321_reg_3113 = ap_const_lv2_3) and (ap_enable_reg_pp2_iter2 = ap_const_logic_1) and (ap_const_boolean_0 = ap_block_pp2_stage0_11001)))) then
linebuffer_3_V_ce1 <= ap_const_logic_1;
else
linebuffer_3_V_ce1 <= ap_const_logic_0;
end if;
end process;
linebuffer_3_V_we0_assign_proc : process(ap_CS_fsm_pp0_stage0, ap_enable_reg_pp0_iter1, ap_block_pp0_stage0_11001, trunc_ln261_reg_2874)
begin
if (((trunc_ln261_reg_2874 = ap_const_lv1_1) and (ap_const_boolean_0 = ap_block_pp0_stage0_11001) and (ap_enable_reg_pp0_iter1 = ap_const_logic_1) and (ap_const_logic_1 = ap_CS_fsm_pp0_stage0))) then
linebuffer_3_V_we0 <= ap_const_logic_1;
else
linebuffer_3_V_we0 <= ap_const_logic_0;
end if;
end process;
linebuffer_3_V_we1_assign_proc : process(ap_block_pp2_stage0_11001, trunc_ln321_reg_3113, icmp_ln335_reg_3117_pp2_iter1_reg, icmp_ln363_reg_3126_pp2_iter1_reg, ap_enable_reg_pp2_iter2)
begin
if ((((icmp_ln363_reg_3126_pp2_iter1_reg = ap_const_lv1_1) and (icmp_ln335_reg_3117_pp2_iter1_reg = ap_const_lv1_0) and (trunc_ln321_reg_3113 = ap_const_lv2_3) and (ap_enable_reg_pp2_iter2 = ap_const_logic_1) and (ap_const_boolean_0 = ap_block_pp2_stage0_11001)) or ((icmp_ln363_reg_3126_pp2_iter1_reg = ap_const_lv1_0) and (icmp_ln335_reg_3117_pp2_iter1_reg = ap_const_lv1_0) and (trunc_ln321_reg_3113 = ap_const_lv2_3) and (ap_enable_reg_pp2_iter2 = ap_const_logic_1) and (ap_const_boolean_0 = ap_block_pp2_stage0_11001)))) then
linebuffer_3_V_we1 <= ap_const_logic_1;
else
linebuffer_3_V_we1 <= ap_const_logic_0;
end if;
end process;
or_ln879_1_fu_2043_p2 <= (xor_ln879_1_fu_2037_p2 or icmp_ln879_fu_1935_p2);
or_ln879_fu_2007_p2 <= (icmp_ln879_fu_1935_p2 or and_ln879_fu_1993_p2);
p_fu_2083_p2 <= std_logic_vector(unsigned(p_0_i_reg_644) + unsigned(ap_const_lv3_1));
select_ln261_1_fu_1855_p3 <=
ap_phi_mux_i_0_i_phi_fu_408_p4 when (icmp_ln261_fu_1842_p2(0) = '1') else
i_fu_1836_p2;
select_ln261_fu_1847_p3 <=
j_0_i_reg_415 when (icmp_ln261_fu_1842_p2(0) = '1') else
ap_const_lv14_0;
select_ln283_fu_1927_p3 <=
ap_const_lv32_0 when (icmp_ln283_fu_1921_p2(0) = '1') else
lineStore_reg_533;
select_ln296_1_fu_1979_p3 <=
ap_const_lv2_2 when (icmp_ln879_2_fu_1947_p2(0) = '1') else
ap_const_lv2_3;
select_ln296_2_fu_1953_p3 <=
ap_const_lv2_3 when (icmp_ln879_2_fu_1947_p2(0) = '1') else
ap_const_lv2_0;
select_ln296_fu_1971_p3 <=
ap_const_lv2_1 when (icmp_ln879_2_fu_1947_p2(0) = '1') else
ap_const_lv2_2;
select_ln41_10_fu_2781_p3 <=
ap_const_lv10_3FF when (icmp_ln41_10_fu_2776_p2(0) = '1') else
trunc_ln41_10_reg_3414;
select_ln41_11_fu_2793_p3 <=
ap_const_lv10_3FF when (icmp_ln41_11_fu_2788_p2(0) = '1') else
trunc_ln41_11_reg_3424;
select_ln41_1_fu_2673_p3 <=
ap_const_lv10_3FF when (icmp_ln41_1_fu_2668_p2(0) = '1') else
trunc_ln41_1_reg_3324;
select_ln41_2_fu_2685_p3 <=
ap_const_lv10_3FF when (icmp_ln41_2_fu_2680_p2(0) = '1') else
trunc_ln41_2_reg_3334;
select_ln41_3_fu_2697_p3 <=
ap_const_lv10_3FF when (icmp_ln41_3_fu_2692_p2(0) = '1') else
trunc_ln41_3_reg_3344;
select_ln41_4_fu_2709_p3 <=
ap_const_lv10_3FF when (icmp_ln41_4_fu_2704_p2(0) = '1') else
trunc_ln41_4_reg_3354;
select_ln41_5_fu_2721_p3 <=
ap_const_lv10_3FF when (icmp_ln41_5_fu_2716_p2(0) = '1') else
trunc_ln41_5_reg_3364;
select_ln41_6_fu_2733_p3 <=
ap_const_lv10_3FF when (icmp_ln41_6_fu_2728_p2(0) = '1') else
trunc_ln41_6_reg_3374;
select_ln41_7_fu_2745_p3 <=
ap_const_lv10_3FF when (icmp_ln41_7_fu_2740_p2(0) = '1') else
trunc_ln41_7_reg_3384;
select_ln41_8_fu_2757_p3 <=
ap_const_lv10_3FF when (icmp_ln41_8_fu_2752_p2(0) = '1') else
trunc_ln41_8_reg_3394;
select_ln41_9_fu_2769_p3 <=
ap_const_lv10_3FF when (icmp_ln41_9_fu_2764_p2(0) = '1') else
trunc_ln41_9_reg_3404;
select_ln41_fu_2661_p3 <=
ap_const_lv10_3FF when (icmp_ln41_fu_2656_p2(0) = '1') else
trunc_ln41_reg_3314;
select_ln879_1_fu_2013_p3 <=
select_ln879_fu_1999_p3 when (or_ln879_fu_2007_p2(0) = '1') else
select_ln296_2_fu_1953_p3;
select_ln879_2_fu_2021_p3 <=
ap_const_lv2_3 when (and_ln879_fu_1993_p2(0) = '1') else
ap_const_lv2_2;
select_ln879_3_fu_2029_p3 <=
select_ln879_2_fu_2021_p3 when (or_ln879_fu_2007_p2(0) = '1') else
zext_ln296_fu_1967_p1;
select_ln879_4_fu_2049_p3 <=
ap_const_lv2_3 when (or_ln879_1_fu_2043_p2(0) = '1') else
ap_const_lv2_0;
select_ln879_5_fu_2057_p3 <=
select_ln879_4_fu_2049_p3 when (or_ln879_fu_2007_p2(0) = '1') else
select_ln296_fu_1971_p3;
select_ln879_6_fu_2069_p3 <=
zext_ln879_fu_2065_p1 when (or_ln879_fu_2007_p2(0) = '1') else
select_ln296_1_fu_1979_p3;
select_ln879_fu_1999_p3 <=
ap_const_lv2_2 when (and_ln879_fu_1993_p2(0) = '1') else
ap_const_lv2_1;
shl_ln_fu_2402_p3 <= (j10_0_i_reg_655_pp2_iter1_reg & ap_const_lv2_0);
src_mat_cols_blk_n_assign_proc : process(ap_start, ap_done_reg, ap_CS_fsm_state1, src_mat_cols_empty_n)
begin
if ((not(((ap_start = ap_const_logic_0) or (ap_done_reg = ap_const_logic_1))) and (ap_const_logic_1 = ap_CS_fsm_state1))) then
src_mat_cols_blk_n <= src_mat_cols_empty_n;
else
src_mat_cols_blk_n <= ap_const_logic_1;
end if;
end process;
src_mat_cols_read_assign_proc : process(ap_start, ap_done_reg, ap_CS_fsm_state1, src_mat_rows_empty_n, src_mat_cols_empty_n)
begin
if ((not(((src_mat_cols_empty_n = ap_const_logic_0) or (src_mat_rows_empty_n = ap_const_logic_0) or (ap_start = ap_const_logic_0) or (ap_done_reg = ap_const_logic_1))) and (ap_const_logic_1 = ap_CS_fsm_state1))) then
src_mat_cols_read <= ap_const_logic_1;
else
src_mat_cols_read <= ap_const_logic_0;
end if;
end process;
src_mat_data_V_V_blk_n_assign_proc : process(src_mat_data_V_V_empty_n, ap_CS_fsm_pp0_stage0, ap_enable_reg_pp0_iter1, ap_block_pp0_stage0, icmp_ln257_reg_2860, ap_CS_fsm_pp2_stage0, ap_enable_reg_pp2_iter1, ap_block_pp2_stage0, icmp_ln335_reg_3117, icmp_ln343_reg_3029)
begin
if ((((icmp_ln343_reg_3029 = ap_const_lv1_1) and (ap_const_boolean_0 = ap_block_pp2_stage0) and (icmp_ln335_reg_3117 = ap_const_lv1_0) and (ap_enable_reg_pp2_iter1 = ap_const_logic_1) and (ap_const_logic_1 = ap_CS_fsm_pp2_stage0)) or ((icmp_ln257_reg_2860 = ap_const_lv1_0) and (ap_const_boolean_0 = ap_block_pp0_stage0) and (ap_enable_reg_pp0_iter1 = ap_const_logic_1) and (ap_const_logic_1 = ap_CS_fsm_pp0_stage0)))) then
src_mat_data_V_V_blk_n <= src_mat_data_V_V_empty_n;
else
src_mat_data_V_V_blk_n <= ap_const_logic_1;
end if;
end process;
src_mat_data_V_V_read_assign_proc : process(ap_CS_fsm_pp0_stage0, ap_enable_reg_pp0_iter1, icmp_ln257_reg_2860, ap_CS_fsm_pp2_stage0, ap_enable_reg_pp2_iter1, ap_predicate_op207_read_state10, ap_block_pp2_stage0_11001, ap_block_pp0_stage0_11001)
begin
if ((((ap_predicate_op207_read_state10 = ap_const_boolean_1) and (ap_enable_reg_pp2_iter1 = ap_const_logic_1) and (ap_const_logic_1 = ap_CS_fsm_pp2_stage0) and (ap_const_boolean_0 = ap_block_pp2_stage0_11001)) or ((icmp_ln257_reg_2860 = ap_const_lv1_0) and (ap_const_boolean_0 = ap_block_pp0_stage0_11001) and (ap_enable_reg_pp0_iter1 = ap_const_logic_1) and (ap_const_logic_1 = ap_CS_fsm_pp0_stage0)))) then
src_mat_data_V_V_read <= ap_const_logic_1;
else
src_mat_data_V_V_read <= ap_const_logic_0;
end if;
end process;
src_mat_rows_blk_n_assign_proc : process(ap_start, ap_done_reg, ap_CS_fsm_state1, src_mat_rows_empty_n)
begin
if ((not(((ap_start = ap_const_logic_0) or (ap_done_reg = ap_const_logic_1))) and (ap_const_logic_1 = ap_CS_fsm_state1))) then
src_mat_rows_blk_n <= src_mat_rows_empty_n;
else
src_mat_rows_blk_n <= ap_const_logic_1;
end if;
end process;
src_mat_rows_read_assign_proc : process(ap_start, ap_done_reg, ap_CS_fsm_state1, src_mat_rows_empty_n, src_mat_cols_empty_n)
begin
if ((not(((src_mat_cols_empty_n = ap_const_logic_0) or (src_mat_rows_empty_n = ap_const_logic_0) or (ap_start = ap_const_logic_0) or (ap_done_reg = ap_const_logic_1))) and (ap_const_logic_1 = ap_CS_fsm_state1))) then
src_mat_rows_read <= ap_const_logic_1;
else
src_mat_rows_read <= ap_const_logic_0;
end if;
end process;
tmp_143_fu_1911_p4 <= lineStore_reg_533(31 downto 2);
tmp_34_fu_1803_p4 <= src_mat_cols_dout(15 downto 2);
tmp_37_fu_1817_p3 <= (tmp_34_fu_1803_p4 & ap_const_lv1_0);
trunc_ln261_fu_1863_p1 <= select_ln261_1_fu_1855_p3(1 - 1 downto 0);
trunc_ln321_fu_2285_p1 <= select_ln283_reg_2954(2 - 1 downto 0);
trunc_ln41_10_fu_2638_p1 <= grp_Core_Process_fu_1524_ap_return_1(10 - 1 downto 0);
trunc_ln41_11_fu_2652_p1 <= grp_Core_Process_fu_1524_ap_return_2(10 - 1 downto 0);
trunc_ln41_1_fu_2476_p1 <= grp_Core_Process_fu_1215_ap_return_1(10 - 1 downto 0);
trunc_ln41_2_fu_2490_p1 <= grp_Core_Process_fu_1215_ap_return_2(10 - 1 downto 0);
trunc_ln41_3_fu_2516_p1 <= grp_Core_Process_fu_1318_ap_return_0(10 - 1 downto 0);
trunc_ln41_4_fu_2530_p1 <= grp_Core_Process_fu_1318_ap_return_1(10 - 1 downto 0);
trunc_ln41_5_fu_2544_p1 <= grp_Core_Process_fu_1318_ap_return_2(10 - 1 downto 0);
trunc_ln41_6_fu_2570_p1 <= grp_Core_Process_fu_1421_ap_return_0(10 - 1 downto 0);
trunc_ln41_7_fu_2584_p1 <= grp_Core_Process_fu_1421_ap_return_1(10 - 1 downto 0);
trunc_ln41_8_fu_2598_p1 <= grp_Core_Process_fu_1421_ap_return_2(10 - 1 downto 0);
trunc_ln41_9_fu_2624_p1 <= grp_Core_Process_fu_1524_ap_return_0(10 - 1 downto 0);
trunc_ln41_fu_2462_p1 <= grp_Core_Process_fu_1215_ap_return_0(10 - 1 downto 0);
xor_ln296_fu_1961_p2 <= (icmp_ln879_2_fu_1947_p2 xor ap_const_lv1_1);
xor_ln879_1_fu_2037_p2 <= (icmp_ln879_1_fu_1941_p2 xor ap_const_lv1_1);
xor_ln879_fu_1987_p2 <= (icmp_ln879_fu_1935_p2 xor ap_const_lv1_1);
zext_ln257_fu_1799_p1 <= std_logic_vector(IEEE.numeric_std.resize(unsigned(src_mat_rows_dout),17));
zext_ln261_fu_1813_p1 <= std_logic_vector(IEEE.numeric_std.resize(unsigned(tmp_34_fu_1803_p4),15));
zext_ln267_fu_1867_p1 <= std_logic_vector(IEEE.numeric_std.resize(unsigned(select_ln261_fu_1847_p3),64));
zext_ln277_fu_1896_p1 <= std_logic_vector(IEEE.numeric_std.resize(unsigned(i9_0_i_reg_544),17));
zext_ln296_fu_1967_p1 <= std_logic_vector(IEEE.numeric_std.resize(unsigned(xor_ln296_fu_1961_p2),2));
zext_ln335_fu_2288_p1 <= std_logic_vector(IEEE.numeric_std.resize(unsigned(ap_phi_mux_j10_0_i_phi_fu_659_p4),15));
zext_ln366_fu_2308_p1 <= std_logic_vector(IEEE.numeric_std.resize(unsigned(bram_read_count_0_i_reg_667),64));
zext_ln379_fu_2380_p1 <= std_logic_vector(IEEE.numeric_std.resize(unsigned(j10_0_i_reg_655_pp2_iter1_reg),64));
zext_ln386_fu_2372_p1 <= std_logic_vector(IEEE.numeric_std.resize(unsigned(j10_0_i_reg_655_pp2_iter1_reg),64));
zext_ln879_fu_2065_p1 <= std_logic_vector(IEEE.numeric_std.resize(unsigned(and_ln879_fu_1993_p2),2));
end behav;
| VHDL | 4 | hito0512/Vitis-AI | Whole-App-Acceleration/apps/resnet50/build_flow/DPUCVDX8G_vck190/vck190_platform/hw/source/ip/isppipeline_accel/hdl/vhdl/demosaicing.vhd | [
"Apache-2.0"
] |
#!/usr/bin/pike
// -*- mode: pike -*-
// $Id: wc.pike,v 1.1 2004-05-19 18:13:51 bfulgham Exp $
// http://www.bagley.org/~doug/shootout/
// from Per Hedbor, optimized by David Hedbor
enum State { Outside, Inside };
void main() {
int nl = 0, nw = 0, nc = 0; // line, word and character counters
int sl; // Size of input
State state = Outside; // Inside or outside word
string buf;
string rest="";
array l;
do {
buf = replace(Stdio.stdin.read( 4196 ), "\t", " ");
if(strlen(buf)) {
nc += sizeof(buf);
l = (rest+ buf) / "\n";
nl += sizeof(l)-1;
foreach(l[..sizeof(l)-2], rest) {
nw += sizeof(rest / " " - ({""}));
}
if(sizeof(l)>1) {
rest = l[-1];
} //else rest="";
} else {
nw += sizeof(rest / " " - ({""}));
break;
}
} while( 1 );
write("%d %d %d\n", nl, nw, nc);
}
| Pike | 3 | kragen/shootout | bench/wc/wc.pike | [
"BSD-3-Clause"
] |
config var n : int = 4;
var d = {1..n, 1..n, 1..n};
var a : [d] real;
for (i,j,k) in d do
a(i,j,k) = 1.0 * ((i-1)*n**2 + (j-1)*n + k);
for ijk in d do
writeln(a(ijk));
| Chapel | 4 | jhh67/chapel | test/arrays/deitz/part1/test_array_3D_float.chpl | [
"ECL-2.0",
"Apache-2.0"
] |
!include MultiUser.nsh
!include MUI2.nsh
!include Util.nsh
!include x64.nsh
!include nsDialogs.nsh
!include LogicLib.nsh
!include StrFunc.nsh
!include WinVer.nsh
!include FileFunc.nsh
!include package\nsis\lib\FileAssoc.nsh
| NSIS | 2 | mocheer/keeweb | package/nsis/includes.nsh | [
"Apache-2.0",
"MIT"
] |
var t2 binary;
var t3 binary;
var t1 binary;
minimize obj:t2*(1-0.25*((1-t3)
+(1-t3)
+(1-t3)))
+t3*(1-0.25*((1-t2)
+(1-t2)
+(1-t2)))
+t1*(1-0.25*(1));
subject to c1: t1+t3>=1;
subject to c2: t2+t3>=1;
subject to c3: t2>=1;
| AMPL | 2 | jwlin/Nemo | example/nemo-nonlinear.ampl | [
"MIT"
] |
Class {
#name : #GtReturnPragmasShouldPointToExistingClasses,
#superclass : #GtPharoConstraint,
#category : #'GToolkit-Constraints'
}
{ #category : #accessing }
GtReturnPragmasShouldPointToExistingClasses >> description [
^ 'The type defined in ==<return: #AType>== must exist in the image.'
]
{ #category : #accessing }
GtReturnPragmasShouldPointToExistingClasses >> issues [
^ ((#return: gtPragmas | #return:or: gtPragmas | #return:of: gtPragmas) &
(RBParser parseRewriteMethod: '
a
<return: `{:node |
node isLiteralNode and: [
| name |
name := node value.
(name indexOfSubCollection: '' class'') > 0 ifTrue: [name := name copyFrom: 1 to: name size - 6].
(Smalltalk includesKey: name asSymbol) not]}>') pragmas first gtASTMatches) result toArray wait
]
{ #category : #accessing }
GtReturnPragmasShouldPointToExistingClasses >> name [
^ 'Methods with return pragmas pointing to missing classes'
]
| Smalltalk | 3 | feenkcom/gtoolk | src/GToolkit-Constraints/GtReturnPragmasShouldPointToExistingClasses.class.st | [
"MIT"
] |
#define TORCH_ASSERT_NO_OPERATORS
#include <ATen/native/TensorIterator.h>
#include <ATen/native/cuda/Reduce.cuh>
#include <ATen/native/DispatchStub.h>
#include <ATen/native/SharedReduceOps.h>
#include <ATen/Dispatch.h>
#include <ATen/native/ReduceOps.h>
namespace at { namespace native {
template <typename scalar_t, typename acc_t = scalar_t, typename out_t = scalar_t>
struct sum_functor {
void operator()(TensorIterator& iter) {
gpu_reduce_kernel<scalar_t, out_t>(
iter, func_wrapper<out_t>([] GPU_LAMBDA(acc_t a, acc_t b) -> acc_t {
return a + b;
}));
}
};
template <typename scalar_t, typename acc_t = scalar_t, typename out_t = scalar_t>
struct nansum_functor {
void operator()(TensorIterator& iter) {
gpu_reduce_kernel<scalar_t, out_t>(
iter, NanSumOps<acc_t, out_t>{});
}
};
template <typename scalar_t, typename acc_t = scalar_t, typename out_t = scalar_t>
struct prod_functor {
void operator()(TensorIterator& iter) {
gpu_reduce_kernel<scalar_t, out_t>(
iter, func_wrapper<out_t>([] GPU_LAMBDA(acc_t a, acc_t b) -> acc_t {
return a * b;
}), 1);
}
};
// Workaround for the error: '*' in boolean context, suggest '&&' instead [-Werror=int-in-bool-context]
template <>
struct prod_functor<bool> {
void operator()(TensorIterator& iter) {
gpu_reduce_kernel<bool, bool>(
iter, func_wrapper<bool>([] GPU_LAMBDA(bool a, bool b) -> bool {
return a && b;
}), 1);
}
};
// The function `reduce_dispatch` below dispatches to the kernel based
// on the type of `iter`. It takes care of the common logic
// for handling Half-Precision floating types.
// Otherwise the functor `op` is called to dispatch to the kernel
// of relevant type.
//
// Note: Functor `op` should take care of all the types to be supported
// except for `at::Half` and `at::BFloat16`.
template <
template <
typename scalar_t,
typename acc_t = scalar_t,
typename out_t = scalar_t>
typename OpFunctor,
typename GeneralDispatcher>
static void reduce_dispatch(TensorIterator& iter, GeneralDispatcher op) {
if (iter.dtype() == kHalf) {
return OpFunctor<at::Half, float>{}(iter);
} else if (iter.dtype(1) == kHalf && iter.dtype() == kFloat) {
// type promotion that does cast and reduction in a single kernel
return OpFunctor<at::Half, float, float>{}(iter);
} else if (iter.dtype() == kBFloat16) {
return OpFunctor<at::BFloat16, float>{}(iter);
} else if (iter.dtype(1) == kBFloat16 && iter.dtype() == kFloat) {
// type promotion that does cast and reduction in a single kernel
return OpFunctor<at::BFloat16, float, float>{}(iter);
}
op(iter);
}
static void sum_kernel_cuda(TensorIterator& iter){
auto general_dispatcher = [](TensorIterator& iter) {
AT_DISPATCH_ALL_TYPES_AND_COMPLEX_AND(
ScalarType::Bool, iter.dtype(), "sum_cuda", [&]() {
sum_functor<scalar_t>{}(iter);
});
};
reduce_dispatch<sum_functor>(iter, general_dispatcher);
}
static void nansum_kernel_cuda(TensorIterator& iter) {
auto general_dispatcher = [](TensorIterator& iter) {
AT_DISPATCH_FLOATING_TYPES(iter.dtype(), "nansum_cuda", [&]() {
nansum_functor<scalar_t>{}(iter);
});
};
reduce_dispatch<nansum_functor>(iter, general_dispatcher);
}
static void prod_kernel_cuda(TensorIterator& iter) {
auto general_dispatcher = [](TensorIterator& iter) {
AT_DISPATCH_ALL_TYPES_AND_COMPLEX_AND(ScalarType::Bool, iter.dtype(), "prod_cuda", [&]() {
prod_functor<scalar_t>{}(iter);
});
};
reduce_dispatch<prod_functor>(iter, general_dispatcher);
}
REGISTER_DISPATCH(sum_stub, &sum_kernel_cuda);
REGISTER_DISPATCH(nansum_stub, &nansum_kernel_cuda);
REGISTER_DISPATCH(prod_stub, &prod_kernel_cuda);
}} // namespace at::native
| Cuda | 3 | xiaohanhuang/pytorch | aten/src/ATen/native/cuda/ReduceSumProdKernel.cu | [
"Intel"
] |
@keyframes name { from { color: red } } | CSS | 2 | mengxy/swc | crates/swc_css_parser/tests/fixture/esbuild/misc/Jmhb8p_Oc2-nzkcDSk0dww/input.css | [
"Apache-2.0"
] |
//keep this enum in sync with the CPU version (in btCollidable.h)
//written by Erwin Coumans
#define SHAPE_CONVEX_HULL 3
#define SHAPE_CONCAVE_TRIMESH 5
#define TRIANGLE_NUM_CONVEX_FACES 5
#define SHAPE_COMPOUND_OF_CONVEX_HULLS 6
#define B3_MAX_STACK_DEPTH 256
typedef unsigned int u32;
///keep this in sync with btCollidable.h
typedef struct
{
union {
int m_numChildShapes;
int m_bvhIndex;
};
union
{
float m_radius;
int m_compoundBvhIndex;
};
int m_shapeType;
int m_shapeIndex;
} btCollidableGpu;
#define MAX_NUM_PARTS_IN_BITS 10
///b3QuantizedBvhNode is a compressed aabb node, 16 bytes.
///Node can be used for leafnode or internal node. Leafnodes can point to 32-bit triangle index (non-negative range).
typedef struct
{
//12 bytes
unsigned short int m_quantizedAabbMin[3];
unsigned short int m_quantizedAabbMax[3];
//4 bytes
int m_escapeIndexOrTriangleIndex;
} b3QuantizedBvhNode;
typedef struct
{
float4 m_aabbMin;
float4 m_aabbMax;
float4 m_quantization;
int m_numNodes;
int m_numSubTrees;
int m_nodeOffset;
int m_subTreeOffset;
} b3BvhInfo;
int getTriangleIndex(const b3QuantizedBvhNode* rootNode)
{
unsigned int x=0;
unsigned int y = (~(x&0))<<(31-MAX_NUM_PARTS_IN_BITS);
// Get only the lower bits where the triangle index is stored
return (rootNode->m_escapeIndexOrTriangleIndex&~(y));
}
int getTriangleIndexGlobal(__global const b3QuantizedBvhNode* rootNode)
{
unsigned int x=0;
unsigned int y = (~(x&0))<<(31-MAX_NUM_PARTS_IN_BITS);
// Get only the lower bits where the triangle index is stored
return (rootNode->m_escapeIndexOrTriangleIndex&~(y));
}
int isLeafNode(const b3QuantizedBvhNode* rootNode)
{
//skipindex is negative (internal node), triangleindex >=0 (leafnode)
return (rootNode->m_escapeIndexOrTriangleIndex >= 0)? 1 : 0;
}
int isLeafNodeGlobal(__global const b3QuantizedBvhNode* rootNode)
{
//skipindex is negative (internal node), triangleindex >=0 (leafnode)
return (rootNode->m_escapeIndexOrTriangleIndex >= 0)? 1 : 0;
}
int getEscapeIndex(const b3QuantizedBvhNode* rootNode)
{
return -rootNode->m_escapeIndexOrTriangleIndex;
}
int getEscapeIndexGlobal(__global const b3QuantizedBvhNode* rootNode)
{
return -rootNode->m_escapeIndexOrTriangleIndex;
}
typedef struct
{
//12 bytes
unsigned short int m_quantizedAabbMin[3];
unsigned short int m_quantizedAabbMax[3];
//4 bytes, points to the root of the subtree
int m_rootNodeIndex;
//4 bytes
int m_subtreeSize;
int m_padding[3];
} b3BvhSubtreeInfo;
typedef struct
{
float4 m_childPosition;
float4 m_childOrientation;
int m_shapeIndex;
int m_unused0;
int m_unused1;
int m_unused2;
} btGpuChildShape;
typedef struct
{
float4 m_pos;
float4 m_quat;
float4 m_linVel;
float4 m_angVel;
u32 m_collidableIdx;
float m_invMass;
float m_restituitionCoeff;
float m_frictionCoeff;
} BodyData;
typedef struct
{
float4 m_localCenter;
float4 m_extents;
float4 mC;
float4 mE;
float m_radius;
int m_faceOffset;
int m_numFaces;
int m_numVertices;
int m_vertexOffset;
int m_uniqueEdgesOffset;
int m_numUniqueEdges;
int m_unused;
} ConvexPolyhedronCL;
typedef struct
{
union
{
float4 m_min;
float m_minElems[4];
int m_minIndices[4];
};
union
{
float4 m_max;
float m_maxElems[4];
int m_maxIndices[4];
};
} btAabbCL;
#include "Bullet3Collision/BroadPhaseCollision/shared/b3Aabb.h"
#include "Bullet3Common/shared/b3Int2.h"
typedef struct
{
float4 m_plane;
int m_indexOffset;
int m_numIndices;
} btGpuFace;
#define make_float4 (float4)
__inline
float4 cross3(float4 a, float4 b)
{
return cross(a,b);
// float4 a1 = make_float4(a.xyz,0.f);
// float4 b1 = make_float4(b.xyz,0.f);
// return cross(a1,b1);
//float4 c = make_float4(a.y*b.z - a.z*b.y,a.z*b.x - a.x*b.z,a.x*b.y - a.y*b.x,0.f);
// float4 c = make_float4(a.y*b.z - a.z*b.y,1.f,a.x*b.y - a.y*b.x,0.f);
//return c;
}
__inline
float dot3F4(float4 a, float4 b)
{
float4 a1 = make_float4(a.xyz,0.f);
float4 b1 = make_float4(b.xyz,0.f);
return dot(a1, b1);
}
__inline
float4 fastNormalize4(float4 v)
{
v = make_float4(v.xyz,0.f);
return fast_normalize(v);
}
///////////////////////////////////////
// Quaternion
///////////////////////////////////////
typedef float4 Quaternion;
__inline
Quaternion qtMul(Quaternion a, Quaternion b);
__inline
Quaternion qtNormalize(Quaternion in);
__inline
float4 qtRotate(Quaternion q, float4 vec);
__inline
Quaternion qtInvert(Quaternion q);
__inline
Quaternion qtMul(Quaternion a, Quaternion b)
{
Quaternion ans;
ans = cross3( a, b );
ans += a.w*b+b.w*a;
// ans.w = a.w*b.w - (a.x*b.x+a.y*b.y+a.z*b.z);
ans.w = a.w*b.w - dot3F4(a, b);
return ans;
}
__inline
Quaternion qtNormalize(Quaternion in)
{
return fastNormalize4(in);
// in /= length( in );
// return in;
}
__inline
float4 qtRotate(Quaternion q, float4 vec)
{
Quaternion qInv = qtInvert( q );
float4 vcpy = vec;
vcpy.w = 0.f;
float4 out = qtMul(qtMul(q,vcpy),qInv);
return out;
}
__inline
Quaternion qtInvert(Quaternion q)
{
return (Quaternion)(-q.xyz, q.w);
}
__inline
float4 qtInvRotate(const Quaternion q, float4 vec)
{
return qtRotate( qtInvert( q ), vec );
}
__inline
float4 transform(const float4* p, const float4* translation, const Quaternion* orientation)
{
return qtRotate( *orientation, *p ) + (*translation);
}
__inline
float4 normalize3(const float4 a)
{
float4 n = make_float4(a.x, a.y, a.z, 0.f);
return fastNormalize4( n );
}
inline void projectLocal(const ConvexPolyhedronCL* hull, const float4 pos, const float4 orn,
const float4* dir, const float4* vertices, float* min, float* max)
{
min[0] = FLT_MAX;
max[0] = -FLT_MAX;
int numVerts = hull->m_numVertices;
const float4 localDir = qtInvRotate(orn,*dir);
float offset = dot(pos,*dir);
for(int i=0;i<numVerts;i++)
{
float dp = dot(vertices[hull->m_vertexOffset+i],localDir);
if(dp < min[0])
min[0] = dp;
if(dp > max[0])
max[0] = dp;
}
if(min[0]>max[0])
{
float tmp = min[0];
min[0] = max[0];
max[0] = tmp;
}
min[0] += offset;
max[0] += offset;
}
inline void project(__global const ConvexPolyhedronCL* hull, const float4 pos, const float4 orn,
const float4* dir, __global const float4* vertices, float* min, float* max)
{
min[0] = FLT_MAX;
max[0] = -FLT_MAX;
int numVerts = hull->m_numVertices;
const float4 localDir = qtInvRotate(orn,*dir);
float offset = dot(pos,*dir);
for(int i=0;i<numVerts;i++)
{
float dp = dot(vertices[hull->m_vertexOffset+i],localDir);
if(dp < min[0])
min[0] = dp;
if(dp > max[0])
max[0] = dp;
}
if(min[0]>max[0])
{
float tmp = min[0];
min[0] = max[0];
max[0] = tmp;
}
min[0] += offset;
max[0] += offset;
}
inline bool TestSepAxisLocalA(const ConvexPolyhedronCL* hullA, __global const ConvexPolyhedronCL* hullB,
const float4 posA,const float4 ornA,
const float4 posB,const float4 ornB,
float4* sep_axis, const float4* verticesA, __global const float4* verticesB,float* depth)
{
float Min0,Max0;
float Min1,Max1;
projectLocal(hullA,posA,ornA,sep_axis,verticesA, &Min0, &Max0);
project(hullB,posB,ornB, sep_axis,verticesB, &Min1, &Max1);
if(Max0<Min1 || Max1<Min0)
return false;
float d0 = Max0 - Min1;
float d1 = Max1 - Min0;
*depth = d0<d1 ? d0:d1;
return true;
}
inline bool IsAlmostZero(const float4 v)
{
if(fabs(v.x)>1e-6f || fabs(v.y)>1e-6f || fabs(v.z)>1e-6f)
return false;
return true;
}
bool findSeparatingAxisLocalA( const ConvexPolyhedronCL* hullA, __global const ConvexPolyhedronCL* hullB,
const float4 posA1,
const float4 ornA,
const float4 posB1,
const float4 ornB,
const float4 DeltaC2,
const float4* verticesA,
const float4* uniqueEdgesA,
const btGpuFace* facesA,
const int* indicesA,
__global const float4* verticesB,
__global const float4* uniqueEdgesB,
__global const btGpuFace* facesB,
__global const int* indicesB,
float4* sep,
float* dmin)
{
float4 posA = posA1;
posA.w = 0.f;
float4 posB = posB1;
posB.w = 0.f;
int curPlaneTests=0;
{
int numFacesA = hullA->m_numFaces;
// Test normals from hullA
for(int i=0;i<numFacesA;i++)
{
const float4 normal = facesA[hullA->m_faceOffset+i].m_plane;
float4 faceANormalWS = qtRotate(ornA,normal);
if (dot3F4(DeltaC2,faceANormalWS)<0)
faceANormalWS*=-1.f;
curPlaneTests++;
float d;
if(!TestSepAxisLocalA( hullA, hullB, posA,ornA,posB,ornB,&faceANormalWS, verticesA, verticesB,&d))
return false;
if(d<*dmin)
{
*dmin = d;
*sep = faceANormalWS;
}
}
}
if((dot3F4(-DeltaC2,*sep))>0.0f)
{
*sep = -(*sep);
}
return true;
}
bool findSeparatingAxisLocalB( __global const ConvexPolyhedronCL* hullA, const ConvexPolyhedronCL* hullB,
const float4 posA1,
const float4 ornA,
const float4 posB1,
const float4 ornB,
const float4 DeltaC2,
__global const float4* verticesA,
__global const float4* uniqueEdgesA,
__global const btGpuFace* facesA,
__global const int* indicesA,
const float4* verticesB,
const float4* uniqueEdgesB,
const btGpuFace* facesB,
const int* indicesB,
float4* sep,
float* dmin)
{
float4 posA = posA1;
posA.w = 0.f;
float4 posB = posB1;
posB.w = 0.f;
int curPlaneTests=0;
{
int numFacesA = hullA->m_numFaces;
// Test normals from hullA
for(int i=0;i<numFacesA;i++)
{
const float4 normal = facesA[hullA->m_faceOffset+i].m_plane;
float4 faceANormalWS = qtRotate(ornA,normal);
if (dot3F4(DeltaC2,faceANormalWS)<0)
faceANormalWS *= -1.f;
curPlaneTests++;
float d;
if(!TestSepAxisLocalA( hullB, hullA, posB,ornB,posA,ornA, &faceANormalWS, verticesB,verticesA, &d))
return false;
if(d<*dmin)
{
*dmin = d;
*sep = faceANormalWS;
}
}
}
if((dot3F4(-DeltaC2,*sep))>0.0f)
{
*sep = -(*sep);
}
return true;
}
bool findSeparatingAxisEdgeEdgeLocalA( const ConvexPolyhedronCL* hullA, __global const ConvexPolyhedronCL* hullB,
const float4 posA1,
const float4 ornA,
const float4 posB1,
const float4 ornB,
const float4 DeltaC2,
const float4* verticesA,
const float4* uniqueEdgesA,
const btGpuFace* facesA,
const int* indicesA,
__global const float4* verticesB,
__global const float4* uniqueEdgesB,
__global const btGpuFace* facesB,
__global const int* indicesB,
float4* sep,
float* dmin)
{
float4 posA = posA1;
posA.w = 0.f;
float4 posB = posB1;
posB.w = 0.f;
int curPlaneTests=0;
int curEdgeEdge = 0;
// Test edges
for(int e0=0;e0<hullA->m_numUniqueEdges;e0++)
{
const float4 edge0 = uniqueEdgesA[hullA->m_uniqueEdgesOffset+e0];
float4 edge0World = qtRotate(ornA,edge0);
for(int e1=0;e1<hullB->m_numUniqueEdges;e1++)
{
const float4 edge1 = uniqueEdgesB[hullB->m_uniqueEdgesOffset+e1];
float4 edge1World = qtRotate(ornB,edge1);
float4 crossje = cross3(edge0World,edge1World);
curEdgeEdge++;
if(!IsAlmostZero(crossje))
{
crossje = normalize3(crossje);
if (dot3F4(DeltaC2,crossje)<0)
crossje *= -1.f;
float dist;
bool result = true;
{
float Min0,Max0;
float Min1,Max1;
projectLocal(hullA,posA,ornA,&crossje,verticesA, &Min0, &Max0);
project(hullB,posB,ornB,&crossje,verticesB, &Min1, &Max1);
if(Max0<Min1 || Max1<Min0)
result = false;
float d0 = Max0 - Min1;
float d1 = Max1 - Min0;
dist = d0<d1 ? d0:d1;
result = true;
}
if(dist<*dmin)
{
*dmin = dist;
*sep = crossje;
}
}
}
}
if((dot3F4(-DeltaC2,*sep))>0.0f)
{
*sep = -(*sep);
}
return true;
}
inline int findClippingFaces(const float4 separatingNormal,
const ConvexPolyhedronCL* hullA,
__global const ConvexPolyhedronCL* hullB,
const float4 posA, const Quaternion ornA,const float4 posB, const Quaternion ornB,
__global float4* worldVertsA1,
__global float4* worldNormalsA1,
__global float4* worldVertsB1,
int capacityWorldVerts,
const float minDist, float maxDist,
const float4* verticesA,
const btGpuFace* facesA,
const int* indicesA,
__global const float4* verticesB,
__global const btGpuFace* facesB,
__global const int* indicesB,
__global int4* clippingFaces, int pairIndex)
{
int numContactsOut = 0;
int numWorldVertsB1= 0;
int closestFaceB=0;
float dmax = -FLT_MAX;
{
for(int face=0;face<hullB->m_numFaces;face++)
{
const float4 Normal = make_float4(facesB[hullB->m_faceOffset+face].m_plane.x,
facesB[hullB->m_faceOffset+face].m_plane.y, facesB[hullB->m_faceOffset+face].m_plane.z,0.f);
const float4 WorldNormal = qtRotate(ornB, Normal);
float d = dot3F4(WorldNormal,separatingNormal);
if (d > dmax)
{
dmax = d;
closestFaceB = face;
}
}
}
{
const btGpuFace polyB = facesB[hullB->m_faceOffset+closestFaceB];
int numVertices = polyB.m_numIndices;
if (numVertices>capacityWorldVerts)
numVertices = capacityWorldVerts;
if (numVertices<0)
numVertices = 0;
for(int e0=0;e0<numVertices;e0++)
{
if (e0<capacityWorldVerts)
{
const float4 b = verticesB[hullB->m_vertexOffset+indicesB[polyB.m_indexOffset+e0]];
worldVertsB1[pairIndex*capacityWorldVerts+numWorldVertsB1++] = transform(&b,&posB,&ornB);
}
}
}
int closestFaceA=0;
{
float dmin = FLT_MAX;
for(int face=0;face<hullA->m_numFaces;face++)
{
const float4 Normal = make_float4(
facesA[hullA->m_faceOffset+face].m_plane.x,
facesA[hullA->m_faceOffset+face].m_plane.y,
facesA[hullA->m_faceOffset+face].m_plane.z,
0.f);
const float4 faceANormalWS = qtRotate(ornA,Normal);
float d = dot3F4(faceANormalWS,separatingNormal);
if (d < dmin)
{
dmin = d;
closestFaceA = face;
worldNormalsA1[pairIndex] = faceANormalWS;
}
}
}
int numVerticesA = facesA[hullA->m_faceOffset+closestFaceA].m_numIndices;
if (numVerticesA>capacityWorldVerts)
numVerticesA = capacityWorldVerts;
if (numVerticesA<0)
numVerticesA=0;
for(int e0=0;e0<numVerticesA;e0++)
{
if (e0<capacityWorldVerts)
{
const float4 a = verticesA[hullA->m_vertexOffset+indicesA[facesA[hullA->m_faceOffset+closestFaceA].m_indexOffset+e0]];
worldVertsA1[pairIndex*capacityWorldVerts+e0] = transform(&a, &posA,&ornA);
}
}
clippingFaces[pairIndex].x = closestFaceA;
clippingFaces[pairIndex].y = closestFaceB;
clippingFaces[pairIndex].z = numVerticesA;
clippingFaces[pairIndex].w = numWorldVertsB1;
return numContactsOut;
}
// work-in-progress
__kernel void findConcaveSeparatingAxisVertexFaceKernel( __global int4* concavePairs,
__global const BodyData* rigidBodies,
__global const btCollidableGpu* collidables,
__global const ConvexPolyhedronCL* convexShapes,
__global const float4* vertices,
__global const float4* uniqueEdges,
__global const btGpuFace* faces,
__global const int* indices,
__global const btGpuChildShape* gpuChildShapes,
__global btAabbCL* aabbs,
__global float4* concaveSeparatingNormalsOut,
__global int* concaveHasSeparatingNormals,
__global int4* clippingFacesOut,
__global float4* worldVertsA1GPU,
__global float4* worldNormalsAGPU,
__global float4* worldVertsB1GPU,
__global float* dmins,
int vertexFaceCapacity,
int numConcavePairs
)
{
int i = get_global_id(0);
if (i>=numConcavePairs)
return;
concaveHasSeparatingNormals[i] = 0;
int pairIdx = i;
int bodyIndexA = concavePairs[i].x;
int bodyIndexB = concavePairs[i].y;
int collidableIndexA = rigidBodies[bodyIndexA].m_collidableIdx;
int collidableIndexB = rigidBodies[bodyIndexB].m_collidableIdx;
int shapeIndexA = collidables[collidableIndexA].m_shapeIndex;
int shapeIndexB = collidables[collidableIndexB].m_shapeIndex;
if (collidables[collidableIndexB].m_shapeType!=SHAPE_CONVEX_HULL&&
collidables[collidableIndexB].m_shapeType!=SHAPE_COMPOUND_OF_CONVEX_HULLS)
{
concavePairs[pairIdx].w = -1;
return;
}
int numFacesA = convexShapes[shapeIndexA].m_numFaces;
int numActualConcaveConvexTests = 0;
int f = concavePairs[i].z;
bool overlap = false;
ConvexPolyhedronCL convexPolyhedronA;
//add 3 vertices of the triangle
convexPolyhedronA.m_numVertices = 3;
convexPolyhedronA.m_vertexOffset = 0;
float4 localCenter = make_float4(0.f,0.f,0.f,0.f);
btGpuFace face = faces[convexShapes[shapeIndexA].m_faceOffset+f];
float4 triMinAabb, triMaxAabb;
btAabbCL triAabb;
triAabb.m_min = make_float4(1e30f,1e30f,1e30f,0.f);
triAabb.m_max = make_float4(-1e30f,-1e30f,-1e30f,0.f);
float4 verticesA[3];
for (int i=0;i<3;i++)
{
int index = indices[face.m_indexOffset+i];
float4 vert = vertices[convexShapes[shapeIndexA].m_vertexOffset+index];
verticesA[i] = vert;
localCenter += vert;
triAabb.m_min = min(triAabb.m_min,vert);
triAabb.m_max = max(triAabb.m_max,vert);
}
overlap = true;
overlap = (triAabb.m_min.x > aabbs[bodyIndexB].m_max.x || triAabb.m_max.x < aabbs[bodyIndexB].m_min.x) ? false : overlap;
overlap = (triAabb.m_min.z > aabbs[bodyIndexB].m_max.z || triAabb.m_max.z < aabbs[bodyIndexB].m_min.z) ? false : overlap;
overlap = (triAabb.m_min.y > aabbs[bodyIndexB].m_max.y || triAabb.m_max.y < aabbs[bodyIndexB].m_min.y) ? false : overlap;
if (overlap)
{
float dmin = FLT_MAX;
int hasSeparatingAxis=5;
float4 sepAxis=make_float4(1,2,3,4);
int localCC=0;
numActualConcaveConvexTests++;
//a triangle has 3 unique edges
convexPolyhedronA.m_numUniqueEdges = 3;
convexPolyhedronA.m_uniqueEdgesOffset = 0;
float4 uniqueEdgesA[3];
uniqueEdgesA[0] = (verticesA[1]-verticesA[0]);
uniqueEdgesA[1] = (verticesA[2]-verticesA[1]);
uniqueEdgesA[2] = (verticesA[0]-verticesA[2]);
convexPolyhedronA.m_faceOffset = 0;
float4 normal = make_float4(face.m_plane.x,face.m_plane.y,face.m_plane.z,0.f);
btGpuFace facesA[TRIANGLE_NUM_CONVEX_FACES];
int indicesA[3+3+2+2+2];
int curUsedIndices=0;
int fidx=0;
//front size of triangle
{
facesA[fidx].m_indexOffset=curUsedIndices;
indicesA[0] = 0;
indicesA[1] = 1;
indicesA[2] = 2;
curUsedIndices+=3;
float c = face.m_plane.w;
facesA[fidx].m_plane.x = normal.x;
facesA[fidx].m_plane.y = normal.y;
facesA[fidx].m_plane.z = normal.z;
facesA[fidx].m_plane.w = c;
facesA[fidx].m_numIndices=3;
}
fidx++;
//back size of triangle
{
facesA[fidx].m_indexOffset=curUsedIndices;
indicesA[3]=2;
indicesA[4]=1;
indicesA[5]=0;
curUsedIndices+=3;
float c = dot(normal,verticesA[0]);
float c1 = -face.m_plane.w;
facesA[fidx].m_plane.x = -normal.x;
facesA[fidx].m_plane.y = -normal.y;
facesA[fidx].m_plane.z = -normal.z;
facesA[fidx].m_plane.w = c;
facesA[fidx].m_numIndices=3;
}
fidx++;
bool addEdgePlanes = true;
if (addEdgePlanes)
{
int numVertices=3;
int prevVertex = numVertices-1;
for (int i=0;i<numVertices;i++)
{
float4 v0 = verticesA[i];
float4 v1 = verticesA[prevVertex];
float4 edgeNormal = normalize(cross(normal,v1-v0));
float c = -dot(edgeNormal,v0);
facesA[fidx].m_numIndices = 2;
facesA[fidx].m_indexOffset=curUsedIndices;
indicesA[curUsedIndices++]=i;
indicesA[curUsedIndices++]=prevVertex;
facesA[fidx].m_plane.x = edgeNormal.x;
facesA[fidx].m_plane.y = edgeNormal.y;
facesA[fidx].m_plane.z = edgeNormal.z;
facesA[fidx].m_plane.w = c;
fidx++;
prevVertex = i;
}
}
convexPolyhedronA.m_numFaces = TRIANGLE_NUM_CONVEX_FACES;
convexPolyhedronA.m_localCenter = localCenter*(1.f/3.f);
float4 posA = rigidBodies[bodyIndexA].m_pos;
posA.w = 0.f;
float4 posB = rigidBodies[bodyIndexB].m_pos;
posB.w = 0.f;
float4 ornA = rigidBodies[bodyIndexA].m_quat;
float4 ornB =rigidBodies[bodyIndexB].m_quat;
///////////////////
///compound shape support
if (collidables[collidableIndexB].m_shapeType==SHAPE_COMPOUND_OF_CONVEX_HULLS)
{
int compoundChild = concavePairs[pairIdx].w;
int childShapeIndexB = compoundChild;//collidables[collidableIndexB].m_shapeIndex+compoundChild;
int childColIndexB = gpuChildShapes[childShapeIndexB].m_shapeIndex;
float4 childPosB = gpuChildShapes[childShapeIndexB].m_childPosition;
float4 childOrnB = gpuChildShapes[childShapeIndexB].m_childOrientation;
float4 newPosB = transform(&childPosB,&posB,&ornB);
float4 newOrnB = qtMul(ornB,childOrnB);
posB = newPosB;
ornB = newOrnB;
shapeIndexB = collidables[childColIndexB].m_shapeIndex;
}
//////////////////
float4 c0local = convexPolyhedronA.m_localCenter;
float4 c0 = transform(&c0local, &posA, &ornA);
float4 c1local = convexShapes[shapeIndexB].m_localCenter;
float4 c1 = transform(&c1local,&posB,&ornB);
const float4 DeltaC2 = c0 - c1;
bool sepA = findSeparatingAxisLocalA( &convexPolyhedronA, &convexShapes[shapeIndexB],
posA,ornA,
posB,ornB,
DeltaC2,
verticesA,uniqueEdgesA,facesA,indicesA,
vertices,uniqueEdges,faces,indices,
&sepAxis,&dmin);
hasSeparatingAxis = 4;
if (!sepA)
{
hasSeparatingAxis = 0;
} else
{
bool sepB = findSeparatingAxisLocalB( &convexShapes[shapeIndexB],&convexPolyhedronA,
posB,ornB,
posA,ornA,
DeltaC2,
vertices,uniqueEdges,faces,indices,
verticesA,uniqueEdgesA,facesA,indicesA,
&sepAxis,&dmin);
if (!sepB)
{
hasSeparatingAxis = 0;
} else
{
hasSeparatingAxis = 1;
}
}
if (hasSeparatingAxis)
{
dmins[i] = dmin;
concaveSeparatingNormalsOut[pairIdx]=sepAxis;
concaveHasSeparatingNormals[i]=1;
} else
{
//mark this pair as in-active
concavePairs[pairIdx].w = -1;
}
}
else
{
//mark this pair as in-active
concavePairs[pairIdx].w = -1;
}
}
// work-in-progress
__kernel void findConcaveSeparatingAxisEdgeEdgeKernel( __global int4* concavePairs,
__global const BodyData* rigidBodies,
__global const btCollidableGpu* collidables,
__global const ConvexPolyhedronCL* convexShapes,
__global const float4* vertices,
__global const float4* uniqueEdges,
__global const btGpuFace* faces,
__global const int* indices,
__global const btGpuChildShape* gpuChildShapes,
__global btAabbCL* aabbs,
__global float4* concaveSeparatingNormalsOut,
__global int* concaveHasSeparatingNormals,
__global int4* clippingFacesOut,
__global float4* worldVertsA1GPU,
__global float4* worldNormalsAGPU,
__global float4* worldVertsB1GPU,
__global float* dmins,
int vertexFaceCapacity,
int numConcavePairs
)
{
int i = get_global_id(0);
if (i>=numConcavePairs)
return;
if (!concaveHasSeparatingNormals[i])
return;
int pairIdx = i;
int bodyIndexA = concavePairs[i].x;
int bodyIndexB = concavePairs[i].y;
int collidableIndexA = rigidBodies[bodyIndexA].m_collidableIdx;
int collidableIndexB = rigidBodies[bodyIndexB].m_collidableIdx;
int shapeIndexA = collidables[collidableIndexA].m_shapeIndex;
int shapeIndexB = collidables[collidableIndexB].m_shapeIndex;
int numFacesA = convexShapes[shapeIndexA].m_numFaces;
int numActualConcaveConvexTests = 0;
int f = concavePairs[i].z;
bool overlap = false;
ConvexPolyhedronCL convexPolyhedronA;
//add 3 vertices of the triangle
convexPolyhedronA.m_numVertices = 3;
convexPolyhedronA.m_vertexOffset = 0;
float4 localCenter = make_float4(0.f,0.f,0.f,0.f);
btGpuFace face = faces[convexShapes[shapeIndexA].m_faceOffset+f];
float4 triMinAabb, triMaxAabb;
btAabbCL triAabb;
triAabb.m_min = make_float4(1e30f,1e30f,1e30f,0.f);
triAabb.m_max = make_float4(-1e30f,-1e30f,-1e30f,0.f);
float4 verticesA[3];
for (int i=0;i<3;i++)
{
int index = indices[face.m_indexOffset+i];
float4 vert = vertices[convexShapes[shapeIndexA].m_vertexOffset+index];
verticesA[i] = vert;
localCenter += vert;
triAabb.m_min = min(triAabb.m_min,vert);
triAabb.m_max = max(triAabb.m_max,vert);
}
overlap = true;
overlap = (triAabb.m_min.x > aabbs[bodyIndexB].m_max.x || triAabb.m_max.x < aabbs[bodyIndexB].m_min.x) ? false : overlap;
overlap = (triAabb.m_min.z > aabbs[bodyIndexB].m_max.z || triAabb.m_max.z < aabbs[bodyIndexB].m_min.z) ? false : overlap;
overlap = (triAabb.m_min.y > aabbs[bodyIndexB].m_max.y || triAabb.m_max.y < aabbs[bodyIndexB].m_min.y) ? false : overlap;
if (overlap)
{
float dmin = dmins[i];
int hasSeparatingAxis=5;
float4 sepAxis=make_float4(1,2,3,4);
sepAxis = concaveSeparatingNormalsOut[pairIdx];
int localCC=0;
numActualConcaveConvexTests++;
//a triangle has 3 unique edges
convexPolyhedronA.m_numUniqueEdges = 3;
convexPolyhedronA.m_uniqueEdgesOffset = 0;
float4 uniqueEdgesA[3];
uniqueEdgesA[0] = (verticesA[1]-verticesA[0]);
uniqueEdgesA[1] = (verticesA[2]-verticesA[1]);
uniqueEdgesA[2] = (verticesA[0]-verticesA[2]);
convexPolyhedronA.m_faceOffset = 0;
float4 normal = make_float4(face.m_plane.x,face.m_plane.y,face.m_plane.z,0.f);
btGpuFace facesA[TRIANGLE_NUM_CONVEX_FACES];
int indicesA[3+3+2+2+2];
int curUsedIndices=0;
int fidx=0;
//front size of triangle
{
facesA[fidx].m_indexOffset=curUsedIndices;
indicesA[0] = 0;
indicesA[1] = 1;
indicesA[2] = 2;
curUsedIndices+=3;
float c = face.m_plane.w;
facesA[fidx].m_plane.x = normal.x;
facesA[fidx].m_plane.y = normal.y;
facesA[fidx].m_plane.z = normal.z;
facesA[fidx].m_plane.w = c;
facesA[fidx].m_numIndices=3;
}
fidx++;
//back size of triangle
{
facesA[fidx].m_indexOffset=curUsedIndices;
indicesA[3]=2;
indicesA[4]=1;
indicesA[5]=0;
curUsedIndices+=3;
float c = dot(normal,verticesA[0]);
float c1 = -face.m_plane.w;
facesA[fidx].m_plane.x = -normal.x;
facesA[fidx].m_plane.y = -normal.y;
facesA[fidx].m_plane.z = -normal.z;
facesA[fidx].m_plane.w = c;
facesA[fidx].m_numIndices=3;
}
fidx++;
bool addEdgePlanes = true;
if (addEdgePlanes)
{
int numVertices=3;
int prevVertex = numVertices-1;
for (int i=0;i<numVertices;i++)
{
float4 v0 = verticesA[i];
float4 v1 = verticesA[prevVertex];
float4 edgeNormal = normalize(cross(normal,v1-v0));
float c = -dot(edgeNormal,v0);
facesA[fidx].m_numIndices = 2;
facesA[fidx].m_indexOffset=curUsedIndices;
indicesA[curUsedIndices++]=i;
indicesA[curUsedIndices++]=prevVertex;
facesA[fidx].m_plane.x = edgeNormal.x;
facesA[fidx].m_plane.y = edgeNormal.y;
facesA[fidx].m_plane.z = edgeNormal.z;
facesA[fidx].m_plane.w = c;
fidx++;
prevVertex = i;
}
}
convexPolyhedronA.m_numFaces = TRIANGLE_NUM_CONVEX_FACES;
convexPolyhedronA.m_localCenter = localCenter*(1.f/3.f);
float4 posA = rigidBodies[bodyIndexA].m_pos;
posA.w = 0.f;
float4 posB = rigidBodies[bodyIndexB].m_pos;
posB.w = 0.f;
float4 ornA = rigidBodies[bodyIndexA].m_quat;
float4 ornB =rigidBodies[bodyIndexB].m_quat;
///////////////////
///compound shape support
if (collidables[collidableIndexB].m_shapeType==SHAPE_COMPOUND_OF_CONVEX_HULLS)
{
int compoundChild = concavePairs[pairIdx].w;
int childShapeIndexB = compoundChild;//collidables[collidableIndexB].m_shapeIndex+compoundChild;
int childColIndexB = gpuChildShapes[childShapeIndexB].m_shapeIndex;
float4 childPosB = gpuChildShapes[childShapeIndexB].m_childPosition;
float4 childOrnB = gpuChildShapes[childShapeIndexB].m_childOrientation;
float4 newPosB = transform(&childPosB,&posB,&ornB);
float4 newOrnB = qtMul(ornB,childOrnB);
posB = newPosB;
ornB = newOrnB;
shapeIndexB = collidables[childColIndexB].m_shapeIndex;
}
//////////////////
float4 c0local = convexPolyhedronA.m_localCenter;
float4 c0 = transform(&c0local, &posA, &ornA);
float4 c1local = convexShapes[shapeIndexB].m_localCenter;
float4 c1 = transform(&c1local,&posB,&ornB);
const float4 DeltaC2 = c0 - c1;
{
bool sepEE = findSeparatingAxisEdgeEdgeLocalA( &convexPolyhedronA, &convexShapes[shapeIndexB],
posA,ornA,
posB,ornB,
DeltaC2,
verticesA,uniqueEdgesA,facesA,indicesA,
vertices,uniqueEdges,faces,indices,
&sepAxis,&dmin);
if (!sepEE)
{
hasSeparatingAxis = 0;
} else
{
hasSeparatingAxis = 1;
}
}
if (hasSeparatingAxis)
{
sepAxis.w = dmin;
dmins[i] = dmin;
concaveSeparatingNormalsOut[pairIdx]=sepAxis;
concaveHasSeparatingNormals[i]=1;
float minDist = -1e30f;
float maxDist = 0.02f;
findClippingFaces(sepAxis,
&convexPolyhedronA,
&convexShapes[shapeIndexB],
posA,ornA,
posB,ornB,
worldVertsA1GPU,
worldNormalsAGPU,
worldVertsB1GPU,
vertexFaceCapacity,
minDist, maxDist,
verticesA,
facesA,
indicesA,
vertices,
faces,
indices,
clippingFacesOut, pairIdx);
} else
{
//mark this pair as in-active
concavePairs[pairIdx].w = -1;
}
}
else
{
//mark this pair as in-active
concavePairs[pairIdx].w = -1;
}
concavePairs[i].z = -1;//for the next stage, z is used to determine existing contact points
}
| OpenCL | 5 | N0hbdy/godot | thirdparty/bullet/Bullet3OpenCL/NarrowphaseCollision/kernels/satConcave.cl | [
"CC-BY-3.0",
"Apache-2.0",
"MIT"
] |
(declare-const str String)
(assert (= (str.len str) 3))
(assert (= (str.len str) 2))
(check-sat)
| SMT | 1 | mauguignard/cbmc | regression/smt2_strings/length_input_unsat/length_input_unsat.smt2 | [
"BSD-4-Clause"
] |
\nonstopmode
\documentclass{article}
\usepackage{agda}
\begin{document}
\begin{code}
module _ where
id : {A : Set} → A → A
id x = x
\end{code}
\end{document}
| Literate Agda | 4 | shlevy/agda | test/LaTeXAndHTML/succeed/Issue2536.lagda | [
"BSD-3-Clause"
] |
# Solve binary knapsack instances, task P9
# Input file
param file := "instances/rucksack0010.txt";
# Parameters
param n := read file as "1n" skip 0 use 1 comment "#";
set N := {1 to n};
param values[N] := read file as "1n" skip 1 use n comment "#";
param weights[N] := read file as "2n" skip 1 use n comment "#";
param capacity := read file as "1n" skip 1+n use 1 comment "#";
# Variables
var x[N] binary;
# Objective
maximize objective:
sum <i> in N: x[i] * values[i];
# Constraints
# Don't go over the capacity of the knapsack
subto maxWeight:
sum <i> in N: x[i] * weights[i] <= capacity;
| Zimpl | 5 | ArielMant0/ko2017 | sheet9/taskP9/knapsack.zpl | [
"MIT"
] |
package jadx.tests.integration.types;
import java.util.ArrayList;
import java.util.Collections;
import java.util.List;
import org.junit.jupiter.api.Test;
import jadx.core.dex.nodes.ClassNode;
import jadx.tests.api.IntegrationTest;
import static jadx.tests.api.utils.JadxMatchers.containsOne;
import static org.hamcrest.MatcherAssert.assertThat;
public class TestGenerics3 extends IntegrationTest {
public static class TestCls {
public static void test() {
List<String> classes = getClasses();
Collections.sort(classes);
int passed = 0;
for (String cls : classes) {
if (runTest(cls)) {
passed++;
}
}
int failed = classes.size() - passed;
System.out.println("failed: " + failed);
}
private static boolean runTest(String clsName) {
return false;
}
private static List<String> getClasses() {
return new ArrayList<>();
}
}
@Test
public void test() {
ClassNode cls = getClassNode(TestCls.class);
String code = cls.getCode().toString();
assertThat(code, containsOne("List<String> classes"));
assertThat(code, containsOne("for (String cls : classes) {"));
}
@Test
public void testNoDebug() {
noDebugInfo();
ClassNode cls = getClassNode(TestCls.class);
String code = cls.getCode().toString();
assertThat(code, containsOne("List<String> classes"));
}
}
| Java | 4 | Dev-kishan1999/jadx | jadx-core/src/test/java/jadx/tests/integration/types/TestGenerics3.java | [
"Apache-2.0"
] |
= simple_form_for :email, url: authentications_emails_path, method: :post do |f|
= f.input :address, label: t('.email_address')
= f.button :submit, t('.save'), class: "btn btn-default btn-lg pull-right btn"
= content_for :guide_title do
h3
i.fa.fa-envelope.fa-2x
span = t('.title')
= content_for :guide do
p.text-warning
= t('.warning')
| Slim | 4 | gsmlg/peatio | app/views/authentications/emails/new.html.slim | [
"MIT"
] |
module fifo (
input clk_50,
input clk_2,
input reset_n,
output [7:0] data_out,
output empty
);
| SystemVerilog | 4 | JavascriptID/sourcerer-app | src/test/resources/samples/langs/SystemVerilog/fifo.sv | [
"MIT"
] |
{ lib
, buildPythonPackage
, pytest
, tornado
, fetchPypi
}:
buildPythonPackage rec {
pname = "pytest-tornado";
version = "0.8.1";
src = fetchPypi {
inherit pname version;
sha256 = "1cgisd7lb9q2hf55558cbn5jfhv65vsgk46ykgidzf9kqcq1kymr";
};
# package has no tests
doCheck = false;
buildInputs = [ pytest ];
propagatedBuildInputs = [ tornado ];
meta = with lib; {
description = "A py.test plugin providing fixtures and markers to simplify testing of asynchronous tornado applications.";
homepage = "https://github.com/eugeniy/pytest-tornado";
license = licenses.asl20;
maintainers = with maintainers; [ ixxie ];
};
}
| Nix | 4 | arjix/nixpkgs | pkgs/development/python-modules/pytest-tornado/default.nix | [
"MIT"
] |
# serial 11
# Copyright (C) 2009-2017 Free Software Foundation, Inc.
#
# This file is free software; the Free Software Foundation
# gives unlimited permission to copy and/or distribute it,
# with or without modifications, as long as this notice is preserved.
AC_DEFUN([gl_FUNC_STAT],
[
AC_REQUIRE([AC_CANONICAL_HOST]) dnl for cross-compiles
AC_REQUIRE([gl_SYS_STAT_H_DEFAULTS])
AC_CHECK_FUNCS_ONCE([lstat])
dnl mingw is the only known platform where stat(".") and stat("./") differ
AC_CACHE_CHECK([whether stat handles trailing slashes on directories],
[gl_cv_func_stat_dir_slash],
[AC_RUN_IFELSE(
[AC_LANG_PROGRAM(
[[#include <sys/stat.h>
]], [[struct stat st; return stat (".", &st) != stat ("./", &st);]])],
[gl_cv_func_stat_dir_slash=yes], [gl_cv_func_stat_dir_slash=no],
[case $host_os in
mingw*) gl_cv_func_stat_dir_slash="guessing no";;
*) gl_cv_func_stat_dir_slash="guessing yes";;
esac])])
dnl AIX 7.1, Solaris 9, mingw64 mistakenly succeed on stat("file/").
dnl (For mingw, this is due to a broken stat() override in libmingwex.a.)
dnl FreeBSD 7.2 mistakenly succeeds on stat("link-to-file/").
AC_CACHE_CHECK([whether stat handles trailing slashes on files],
[gl_cv_func_stat_file_slash],
[touch conftest.tmp
# Assume that if we have lstat, we can also check symlinks.
if test $ac_cv_func_lstat = yes; then
ln -s conftest.tmp conftest.lnk
fi
AC_RUN_IFELSE(
[AC_LANG_PROGRAM(
[[#include <sys/stat.h>
]], [[int result = 0;
struct stat st;
if (!stat ("conftest.tmp/", &st))
result |= 1;
#if HAVE_LSTAT
if (!stat ("conftest.lnk/", &st))
result |= 2;
#endif
return result;
]])],
[gl_cv_func_stat_file_slash=yes], [gl_cv_func_stat_file_slash=no],
[case "$host_os" in
# Guess yes on glibc systems.
*-gnu*) gl_cv_func_stat_file_slash="guessing yes" ;;
# If we don't know, assume the worst.
*) gl_cv_func_stat_file_slash="guessing no" ;;
esac
])
rm -f conftest.tmp conftest.lnk])
case $gl_cv_func_stat_dir_slash in
*no) REPLACE_STAT=1
AC_DEFINE([REPLACE_FUNC_STAT_DIR], [1], [Define to 1 if stat needs
help when passed a directory name with a trailing slash]);;
esac
case $gl_cv_func_stat_file_slash in
*no) REPLACE_STAT=1
AC_DEFINE([REPLACE_FUNC_STAT_FILE], [1], [Define to 1 if stat needs
help when passed a file name with a trailing slash]);;
esac
])
# Prerequisites of lib/stat.c.
AC_DEFUN([gl_PREREQ_STAT], [:])
| M4 | 3 | YuPf1989/BGAQRCode-Android | zbar/src/main/jni/libiconv-1.15/srcm4/stat.m4 | [
"Apache-2.0"
] |
## Receipt.L2 (object)
+ txHash: `0x466a9432e5337ee85deb9092526bb96377d316b9a1f0717ae4027798837fb85b` (string, required),
+ rollupBlock: 99812 (number, required, nullable),
+ status: committed (TxState, required),
+ failReason: null (string, required, nullable)
## Receipt.L1 (object)
+ status: committed (L1Status, required),
+ ethBlock: 134300 (number, required),
+ rollupBlock: 99812 (number, required, nullable),
+ id: 12001 (number, required)
## Receipt (enum)
- (Receipt.L1)
- (Receipt.L2)
## L1Status (enum)
+ committed
+ finalized
+ queued
| API Blueprint | 3 | smishraIOV/ri-aggregation | infrastructure/api-docs/blueprint/types/receipt.apib | [
"Apache-2.0",
"MIT"
] |
-- @shouldFailWith TransitiveExportError
module Test (bar) where
import Prelude
class Foo a where
bar :: a -> a
| PureScript | 4 | metaleap/purs-with-dump-coreimp | examples/failing/MissingClassExport.purs | [
"BSD-3-Clause"
] |
f ← { diff ← {1↓⍵-¯1⌽⍵} ⋄ signal ← {¯50⌈50⌊50×(diff 0,⍵)÷0.01+⍵} ⋄ +/ signal ⍳ ⍵ }
f 1000
| APL | 3 | mbudde/apltail | tests/signal1.apl | [
"MIT"
] |
provider "aws" {
region = "eu-central-1"
}
data "aws_region" "current" {}
data "aws_availability_zones" "available" {
state = "available"
}
| HCL | 3 | tetianakravchenko/beats | metricbeat/module/kubernetes/_meta/terraform/eks/aws.tf | [
"ECL-2.0",
"Apache-2.0"
] |
#include "caffe2/core/context_gpu.h"
#include "caffe2/operators/multi_class_accuracy_op.h"
#include "caffe2/utils/GpuAtomics.cuh"
#include "caffe2/utils/math.h"
namespace caffe2 {
namespace {
__global__ void MultiClassAccuracyKernel(const int N, const int D, const float* Xdata,
const int* labeldata, float* accuracies, int* amounts) {
CUDA_1D_KERNEL_LOOP(i, N) {
float maxval = Xdata[i * D];
int maxid = 0;
for (int j = 1; j < D; ++j) {
if (Xdata[i * D + j] > maxval) {
maxval = Xdata[i * D + j];
maxid = j;
}
}
int labelid = labeldata[i];
if (maxid == labelid) {
gpu_atomic_add(accuracies + labelid, static_cast<float>(1));
}
gpu_atomic_add(amounts + labelid, static_cast<int>(1));
}
}
__global__ void MultiClassAccuracyDivideKernel(
const int D, float* accuracies, const int* amounts) {
CUDA_1D_KERNEL_LOOP(i, D) {
if (amounts[i]) {
accuracies[i] /= amounts[i];
}
}
}
} // namespace
template <>
bool MultiClassAccuracyOp<float, CUDAContext>::RunOnDevice() {
auto& X = Input(PREDICTION);
auto& label = Input(LABEL);
DCHECK_EQ(X.dim(), 2);
// amount, number of instances
int N = X.dim32(0);
// dimension, number of classes
int D = X.dim32(1);
DCHECK_EQ(label.dim(), 1);
DCHECK_EQ(label.dim32(0), N);
auto* Y0 = Output(0, {D}, at::dtype<float>());
auto* Y1 = Output(1, {D}, at::dtype<int>());
const float* Xdata = X.data<float>();
const int* labeldata = label.data<int>();
float* accuracies = Y0->template mutable_data<float>();
int* amounts = Y1->template mutable_data<int>();
math::Set<float, CUDAContext>(D, 0.0, accuracies, &context_);
math::Set<int, CUDAContext>(D, 0, amounts, &context_);
MultiClassAccuracyKernel<<<CAFFE_GET_BLOCKS(N), CAFFE_CUDA_NUM_THREADS,
0, context_.cuda_stream()>>>(
N, D, Xdata, labeldata, accuracies, amounts);
C10_CUDA_KERNEL_LAUNCH_CHECK();
MultiClassAccuracyDivideKernel<<<CAFFE_GET_BLOCKS(D), CAFFE_CUDA_NUM_THREADS,
0, context_.cuda_stream()>>>(
D, accuracies, amounts);
C10_CUDA_KERNEL_LAUNCH_CHECK();
return true;
}
REGISTER_CUDA_OPERATOR(
MultiClassAccuracy, MultiClassAccuracyOp<float, CUDAContext>);
} // namespace caffe2
| Cuda | 4 | Hacky-DH/pytorch | caffe2/operators/multi_class_accuracy_op.cu | [
"Intel"
] |
#ifndef NVIM_CURSOR_H
#define NVIM_CURSOR_H
#include <stdbool.h>
#include "nvim/vim.h"
#ifdef INCLUDE_GENERATED_DECLARATIONS
# include "cursor.h.generated.h"
#endif
#endif // NVIM_CURSOR_H
| C | 2 | uga-rosa/neovim | src/nvim/cursor.h | [
"Vim"
] |
(*
Module: Pam
Parses /etc/pam.conf and /etc/pam.d/* service files
Author: David Lutterkort <[email protected]>
About: Reference
This lens tries to keep as close as possible to `man pam.conf` where
possible.
About: Licence
This file is licensed under the LGPL v2+, like the rest of Augeas.
About: Lens Usage
About: Configuration files
This lens autoloads /etc/pam.d/* for service specific files. See <filter>.
It provides a lens for /etc/pam.conf, which is used in the PamConf module.
*)
module Pam =
autoload xfm
let eol = Util.eol
let indent = Util.indent
let space = del /([ \t]|\\\\\n)+/ " "
(* For the control syntax of [key=value ..] we could split the key value *)
(* pairs into an array and generate a subtree control/N/KEY = VALUE *)
(* The valid control values if the [...] syntax is not used, is *)
(* required|requisite|optional|sufficient|include|substack *)
(* We allow more than that because this list is not case sensitive and *)
(* to be more lenient with typos *)
let control = /(\[[^]#\n]*\]|[a-zA-Z]+)/
let word = /([^# \t\n\\]|\\\\.)+/
(* Allowed types *)
let types = /(auth|session|account|password)/i
(* This isn't entirely right: arguments enclosed in [ .. ] can contain *)
(* a ']' if escaped with a '\' and can be on multiple lines ('\') *)
let argument = /(\[[^]#\n]+\]|[^[#\n \t\\][^#\n \t\\]*)/
let comment = Util.comment
let comment_or_eol = Util.comment_or_eol
let empty = Util.empty
(* Not mentioned in the man page, but Debian uses the syntax *)
(* @include module *)
(* quite a bit *)
let include = [ indent . Util.del_str "@" . key "include" .
space . store word . eol ]
(* Shared with PamConf *)
let record = [ label "optional" . del "-" "-" ]? .
[ label "type" . store types ] .
space .
[ label "control" . store control] .
space .
[ label "module" . store word ] .
[ space . label "argument" . store argument ]* .
comment_or_eol
let record_svc = [ seq "record" . indent . record ]
let lns = ( empty | comment | include | record_svc ) *
let filter = incl "/etc/pam.d/*"
. excl "/etc/pam.d/allow.pamlist"
. excl "/etc/pam.d/README"
. Util.stdexcl
let xfm = transform lns filter
(* Local Variables: *)
(* mode: caml *)
(* End: *)
| Augeas | 4 | zwass/launcher | pkg/augeas/assets/lenses/pam.aug | [
"MIT"
] |
; ModuleID = 'bpftrace'
source_filename = "bpftrace"
target datalayout = "e-m:e-p:64:64-i64:64-i128:128-n32:64-S128"
target triple = "bpf-pc-linux"
; Function Attrs: nounwind
declare i64 @llvm.bpf.pseudo(i64 %0, i64 %1) #0
define i64 @"kprobe:f"(i8* %0) section "s_kprobe:f_1" {
entry:
%"@_newval" = alloca i64, align 8
%lookup_elem_val9 = alloca i64, align 8
%"@_key3" = alloca i64, align 8
%lookup_elem_val = alloca i64, align 8
%"@_key1" = alloca i64, align 8
%"@_ptr" = alloca i64, align 8
%"@_key" = alloca i64, align 8
%1 = bitcast i64* %"@_key" to i8*
call void @llvm.lifetime.start.p0i8(i64 -1, i8* %1)
store i64 0, i64* %"@_key", align 8
%2 = bitcast i64* %"@_ptr" to i8*
call void @llvm.lifetime.start.p0i8(i64 -1, i8* %2)
store i64 1000, i64* %"@_ptr", align 8
%pseudo = call i64 @llvm.bpf.pseudo(i64 1, i64 0)
%update_elem = call i64 inttoptr (i64 2 to i64 (i64, i64*, i64*, i64)*)(i64 %pseudo, i64* %"@_key", i64* %"@_ptr", i64 0)
%3 = bitcast i64* %"@_ptr" to i8*
call void @llvm.lifetime.end.p0i8(i64 -1, i8* %3)
%4 = bitcast i64* %"@_key" to i8*
call void @llvm.lifetime.end.p0i8(i64 -1, i8* %4)
%5 = bitcast i64* %"@_key1" to i8*
call void @llvm.lifetime.start.p0i8(i64 -1, i8* %5)
store i64 0, i64* %"@_key1", align 8
%pseudo2 = call i64 @llvm.bpf.pseudo(i64 1, i64 0)
%lookup_elem = call i8* inttoptr (i64 1 to i8* (i64, i64*)*)(i64 %pseudo2, i64* %"@_key1")
%6 = bitcast i64* %lookup_elem_val to i8*
call void @llvm.lifetime.start.p0i8(i64 -1, i8* %6)
%map_lookup_cond = icmp ne i8* %lookup_elem, null
br i1 %map_lookup_cond, label %lookup_success, label %lookup_failure
lookup_success: ; preds = %entry
%cast = bitcast i8* %lookup_elem to i64*
%7 = load i64, i64* %cast, align 8
store i64 %7, i64* %lookup_elem_val, align 8
br label %lookup_merge
lookup_failure: ; preds = %entry
store i64 0, i64* %lookup_elem_val, align 8
br label %lookup_merge
lookup_merge: ; preds = %lookup_failure, %lookup_success
%8 = load i64, i64* %lookup_elem_val, align 8
%9 = bitcast i64* %lookup_elem_val to i8*
call void @llvm.lifetime.end.p0i8(i64 -1, i8* %9)
%10 = bitcast i64* %"@_key1" to i8*
call void @llvm.lifetime.end.p0i8(i64 -1, i8* %10)
%11 = bitcast i64* %"@_key3" to i8*
call void @llvm.lifetime.start.p0i8(i64 -1, i8* %11)
store i64 0, i64* %"@_key3", align 8
%pseudo4 = call i64 @llvm.bpf.pseudo(i64 1, i64 0)
%lookup_elem5 = call i8* inttoptr (i64 1 to i8* (i64, i64*)*)(i64 %pseudo4, i64* %"@_key3")
%12 = bitcast i64* %lookup_elem_val9 to i8*
call void @llvm.lifetime.start.p0i8(i64 -1, i8* %12)
%map_lookup_cond10 = icmp ne i8* %lookup_elem5, null
br i1 %map_lookup_cond10, label %lookup_success6, label %lookup_failure7
lookup_success6: ; preds = %lookup_merge
%cast11 = bitcast i8* %lookup_elem5 to i64*
%13 = load i64, i64* %cast11, align 8
store i64 %13, i64* %lookup_elem_val9, align 8
br label %lookup_merge8
lookup_failure7: ; preds = %lookup_merge
store i64 0, i64* %lookup_elem_val9, align 8
br label %lookup_merge8
lookup_merge8: ; preds = %lookup_failure7, %lookup_success6
%14 = load i64, i64* %lookup_elem_val9, align 8
%15 = bitcast i64* %lookup_elem_val9 to i8*
call void @llvm.lifetime.end.p0i8(i64 -1, i8* %15)
%16 = bitcast i64* %"@_newval" to i8*
call void @llvm.lifetime.start.p0i8(i64 -1, i8* %16)
%17 = add i64 %14, 2
store i64 %17, i64* %"@_newval", align 8
%pseudo12 = call i64 @llvm.bpf.pseudo(i64 1, i64 0)
%update_elem13 = call i64 inttoptr (i64 2 to i64 (i64, i64*, i64*, i64)*)(i64 %pseudo12, i64* %"@_key3", i64* %"@_newval", i64 0)
%18 = bitcast i64* %"@_newval" to i8*
call void @llvm.lifetime.end.p0i8(i64 -1, i8* %18)
%19 = bitcast i64* %"@_key3" to i8*
call void @llvm.lifetime.end.p0i8(i64 -1, i8* %19)
ret i64 0
}
; Function Attrs: argmemonly nofree nosync nounwind willreturn
declare void @llvm.lifetime.start.p0i8(i64 immarg %0, i8* nocapture %1) #1
; Function Attrs: argmemonly nofree nosync nounwind willreturn
declare void @llvm.lifetime.end.p0i8(i64 immarg %0, i8* nocapture %1) #1
attributes #0 = { nounwind }
attributes #1 = { argmemonly nofree nosync nounwind willreturn }
| LLVM | 2 | casparant/bpftrace | tests/codegen/llvm/pointer_inc_map.ll | [
"Apache-2.0"
] |
JAR = CVE-2012-0507.jar
CLASSES = \
msf/x/Exploit.java \
msf/x/Help.java \
msf/x/PayloadX.java
.SUFFIXES: .java .class
.java.class:
javac -d bin -source 1.2 -target 1.2 $*.java
all: $(CLASSES:.java=.class)
(cd bin; jar cvf ../$(JAR) *)
install:
mv $(JAR) ../../../../data/exploits/
clean:
rm -f $(JAR)
rm -rf bin/*
| Makefile | 3 | OsmanDere/metasploit-framework | external/source/exploits/CVE-2012-0507/Makefile | [
"BSD-2-Clause",
"BSD-3-Clause"
] |
%%%
%%% Author:
%%% Christian Schulte <[email protected]>
%%%
%%% Copyright:
%%% Christian Schulte, 1997
%%%
%%% Last change:
%%% $Date$ by $Author$
%%% $Revision$
%%%
%%% This file is part of Mozart, an implementation
%%% of Oz 3
%%% http://www.mozart-oz.org
%%%
%%% See the file "LICENSE" or
%%% http://www.mozart-oz.org/LICENSE.html
%%% for information on usage and redistribution
%%% of this file, and for a DISCLAIMER OF ALL
%%% WARRANTIES.
%%%
local
local
\insert 'HtmlTable.oz'
fun {GetOptions As N ?M}
case As of nil then M=N nil
[] A|Ar then
if {IsInt A} then {GetOptions Ar N+1 M}
else M=N As
end
end
end
fun {BuildOptions As Tag}
case As of nil then ''
[] A|Ar then ' '#A#'="'#Tag.A#'"'#{BuildOptions Ar Tag}
end
end
fun {TagBody I Tag}
if I>0 then {TagBody I-1 Tag}#{Tag2Vs Tag.I} else '' end
end
in
fun {Tag2Vs Tag}
if {IsTuple Tag} then L={Label Tag} in
if {HtmlTable.isTag L} then
'<'#L#'>'#{TagBody {Width Tag} Tag}#
if {HtmlTable.isNonFinalTag L} then '' else
'</'#L#'>'
end
elseif L=='#' then {Record.map Tag Tag2Vs}
else Tag
end
elseif {IsRecord Tag} then L={Label Tag} in
if {HtmlTable.isTag L} then
N As={GetOptions {Arity Tag} 0 ?N}
in
'<'#L#{BuildOptions As Tag}#'>' #
{TagBody N Tag} #
if {HtmlTable.isNonFinalTag L} then '' else
'</'#L#'>'
end
else Tag
end
elseif {IsProcedure Tag} then {Tag2Vs {Tag}}
else Tag
end
end
end
ReadSize = 1024
ReadSizeAll = 4096
KillTime = 500
%%
%% Attributes and Methods common to all open classes
%%
InitLocks = {NewName}
CloseDescs = {NewName}
ReadLock = {NewName}
WriteLock = {NewName}
ReadDesc = {NewName}
WriteDesc = {NewName}
Buff = {NewName}
Last = {NewName}
AtEnd = {NewName}
TimeOut = {NewName}
Missing = {NewName}
NoArg = {NewName}
local
%% Some records for mapping various descriptions to OS specs
ModeMap=map(owner: access(read: ['S_IRUSR']
write: ['S_IWUSR']
execute: ['S_IXUSR'])
group: access(read: ['S_IRGRP']
write: ['S_IWGRP']
execute: ['S_IXGRP'])
others: access(read: ['S_IROTH']
write: ['S_IWOTH']
execute: ['S_IXOTH'])
all: access(read: ['S_IRUSR' 'S_IRGRP' 'S_IROTH']
write: ['S_IWUSR' 'S_IWGRP' 'S_IWOTH']
execute: ['S_IXUSR' 'S_IXGRP' 'S_IXOTH']))
in
fun {ModeToOS Mode}
{Record.foldLInd Mode
fun {$ Cat In What}
{FoldL What
fun {$ In Access}
if In==false then false
elseif
{HasFeature ModeMap Cat} andthen
{HasFeature ModeMap.Cat Access}
then {Append ModeMap.Cat.Access In}
else false
end
end In}
end nil}
end
end
local
FlagMap = map(append: 'O_APPEND'
'create': 'O_CREAT'
truncate: 'O_TRUNC'
exclude: 'O_EXCL'
text: 'O_TEXT'
binary: 'O_BINARY')
in
fun {FlagsToOS FlagS}
{FoldL FlagS
fun {$ In Flag}
if In==false then false
elseif Flag==read orelse Flag==write then In
elseif {HasFeature FlagMap Flag} then FlagMap.Flag|In
else false
end
end
[if {Member read FlagS} andthen {Member write FlagS} then
'O_RDWR'
elseif {Member write FlagS} then 'O_WRONLY'
else 'O_RDONLY'
end]}
end
end
in
functor
import
OS(open
fileDesc
close
write
read
lSeek
socket
bind
listen
connect
accept
shutDown
send
sendTo
receiveFrom
receiveFromAnon
getSockName
acceptSelect
deSelect
pipe
wait
kill
)
Error(registerFormatter)
% ZlibIO(compressedFile:CompressedFile) at 'x-oz://system/ZlibIO.ozf' % Not yet implemented in Mozart 2
Resolve(open)
export
file: File
text: Text
socket: Socket
pipe: Pipe
html: Html
% compressedFile: CompressedFile % See above
define
%%
%% Exception handling
%%
proc {RaiseClosed S M}
{Raise {Exception.system open(alreadyClosed S M)}}
end
%%
%% The common base-class providing for descriptor manipulation
%%
fun {DoWrite D V M}
case {OS.write D V}
of suspend(N S V) then {Wait S} {DoWrite D V N+M}
elseof N then N+M
end
end
fun {DoReadAll Desc ?Xs Xt N}
Ys Xr
in
case {OS.read Desc ReadSizeAll Ys Xr}
of 0 then
Xs = Ys
Xr = Xt
N
elseof M then
Xs = Ys
{DoReadAll Desc Xr Xt N+M}
end
end
class DescClass
prop
sited
feat
!ReadLock
!WriteLock
attr
!ReadDesc: false % Not yet initialized (true = closed, int ...)
!WriteDesc: false % Not yet initialized (true = closed, int ...)
!Buff: nil % The buffer is empty
!Last: [0] % The last char read is initialized to nul
!AtEnd: false % Reading is not at end!
meth !InitLocks(M)
%% Initialize locks
try
self.ReadLock = {NewLock}
self.WriteLock = {NewLock}
catch failure(debug:_) then
{Raise {Exception.system open(alreadyInitialized self M)}}
end
end
meth dOpen(RD WD)
DescClass, InitLocks(dOpen(RD WD))
ReadDesc <- RD
WriteDesc <- WD
end
meth getDesc(?RD ?WD)
lock self.ReadLock then
lock self.WriteLock then
RD = @ReadDesc
WD = @WriteDesc
end
end
end
meth !CloseDescs
lock self.ReadLock then
lock self.WriteLock then
RD=@ReadDesc WD=@WriteDesc
in
if {IsInt RD} then
{OS.deSelect RD} {OS.close RD}
if RD\=WD then
{OS.deSelect WD} {OS.close WD}
end
ReadDesc <- true
WriteDesc <- true
end
end
end
end
end
%%
%% The File Object
%%
class File from DescClass
meth init(name: Name <= NoArg
url: Url <= NoArg
flags: FlagS <= [read]
mode: Mode <= mode(owner:[write] all:[read])) = M
DescClass, InitLocks(M)
%% Handle read&write flags
case {FlagsToOS FlagS}
of false then {Raise {Exception.system
open(illegalFlags self M)}}
elseof OSFlagS then
%% Handle access modes
case {ModeToOS Mode}
of false then {Raise {Exception.system
open(illegalModes self M)}}
elseof OSModeS then
%% Handle special filenames
if
(Name==NoArg andthen Url==NoArg) orelse
(Name\=NoArg andthen Url\=NoArg)
then
{Raise {Exception.system
open(nameOrUrl self M)}}
else
D = case Name
of 'stdin' then {OS.fileDesc 'STDIN_FILENO'}
[] 'stdout' then {OS.fileDesc 'STDOUT_FILENO'}
[] 'stderr' then {OS.fileDesc 'STDERR_FILENO'}
[] !NoArg then
if
{Member 'O_RDWR' OSFlagS} orelse
{Member 'O_WRONLY' OSFlagS}
then
{Raise {Exception.system
open(urlIsReadOnly self M)}}
_
else {Resolve.open Url}
end
else
{OS.open Name OSFlagS OSModeS}
end
in
ReadDesc <- D
WriteDesc <- D
end
end
end
end
meth read(size:Size <=ReadSize
list:?Is tail:It<=nil len:?N<=_)
lock self.ReadLock then
lock self.WriteLock then D=@ReadDesc in
if {IsInt D} then
case Size of all then
N = {DoReadAll D ?Is It 0}
else NL IsL in
NL = {OS.read D Size ?IsL It}
N = NL
Is = IsL
end
else
{RaiseClosed self
read(size:Size list:Is tail:It len:N)}
end
end
end
end
meth write(vs:V len:I<=_)
lock self.ReadLock then
lock self.WriteLock then D=@WriteDesc in
if {IsInt D} then I={DoWrite D V 0}
else {RaiseClosed self write(vs:V len:I)}
end
end
end
end
meth seek(whence:W<='set' offset:O<=0)
lock self.ReadLock then
lock self.WriteLock then D=@WriteDesc in
if {IsInt D} then
{OS.lSeek D O case W
of 'set' then 'SEEK_SET'
[] 'current' then 'SEEK_CUR'
[] 'end' then 'SEEK_END'
end _}
else {RaiseClosed self seek(whence:W offset:O)}
end
end
end
end
meth tell(offset:?O)
lock self.ReadLock then
lock self.WriteLock then D=@WriteDesc in
if {IsInt D} then O={OS.lSeek D 0 'SEEK_CUR'}
else {RaiseClosed self tell(offset:O)}
end
end
end
end
meth close
DescClass, CloseDescs
end
end
%%
%% Sockets and Pipes
%%
class SockAndPipe from DescClass
meth read(size: Size <= ReadSize
len: Len <= _
list: List
tail: Tail <= nil)
lock self.ReadLock then D=@ReadDesc in
if {IsInt D} then
case Size of all then
Len = {DoReadAll D ?List Tail 0}
else ListL LenL in
LenL = {OS.read D Size ?ListL Tail}
Len = LenL
List = ListL
end
else {RaiseClosed self
read(size:Size len:Len list:List tail:Tail)}
end
end
end
meth write(vs:V len:I<=_)
lock self.WriteLock then D=@WriteDesc in
if {IsInt D} then I={DoWrite D V 0}
else {RaiseClosed self write(vs:V len:I)}
end
end
end
meth flush(how:How<=[receive send])
R = {Member receive How}
S = {Member send How}
in
if R andthen S then
lock self.ReadLock then
lock self.WriteLock then skip end
end
elseif R then
lock self.ReadLock then skip end
elseif S then
lock self.WriteLock then skip end
end
end
end
local
fun {DoSend D V M}
case {OS.send D V nil}
of suspend(N S V) then {Wait S} {DoSend D V N+M}
elseof N then N+M
end
end
fun {DoSendTo Desc V Host Port M}
case {OS.sendTo Desc V nil Host Port}
of suspend(N S V) then {Wait S} {DoSendTo Desc V Host Port N+M}
elseof N then N+M
end
end
in
class Socket
from SockAndPipe
%% Implementation of socket
feat !TimeOut
meth init(type:T <=stream protocol:P <= nil time:Time <=~1) = M
DescClass, InitLocks(M)
D = {OS.socket 'PF_INET' case T
of 'stream' then 'SOCK_STREAM'
[] 'datagram' then 'SOCK_DGRAM'
end P}
in
self.TimeOut = Time
ReadDesc <- D
WriteDesc <- D
end
meth server(port:OP<=_ host:H<=_ ...) = M
P
in
Socket, init
if {HasFeature M takePort} then
Socket, bind(port:P takePort:M.takePort)
else
Socket, bind(port:P)
end
Socket, listen(backLog:1)
P=OP
Socket, accept(host:H)
end
meth client(host:H<='localhost' port:P)
Socket, init
Socket, connect(host:H port:P)
end
meth listen(backLog:Log<=5)
lock self.ReadLock then
lock self.WriteLock then D=@ReadDesc in
if {IsInt D} then {OS.listen D Log}
else {RaiseClosed self listen(backLog:Log)}
end
end
end
end
meth bind(port:P <= _ ...) = M
lock self.ReadLock then
lock self.WriteLock then D=@ReadDesc in
if {IsInt D} then
P = if {HasFeature M takePort} then
{OS.bind D M.takePort}
M.takePort
else %% Generate port
{OS.bind D 0}
{OS.getSockName D}
end
else {RaiseClosed self M}
end
end
end
end
meth accept(host:H <=_ port:P <=_ ...) = M
lock self.ReadLock then
lock self.WriteLock then D=@ReadDesc in
if {IsInt D} then
TimeAcc = case self.TimeOut of ~1 then _
elseof TO then {Alarm TO}
end
WaitAcc = thread
{OS.acceptSelect D}
unit
end
in
{WaitOr TimeAcc WaitAcc}
if {IsDet WaitAcc} then
AD={OS.accept D H P}
in
if {HasFeature M accepted} then
%% Create new Socket Object
M.accepted = {New M.acceptClass dOpen(AD AD)}
else
DescClass, CloseDescs
ReadDesc <- AD
WriteDesc <- AD
end
else P=false H=false
end
else {RaiseClosed self M}
end
end
end
end
meth connect(host:H<='localhost' port:P)
lock self.ReadLock then
lock self.WriteLock then D=@ReadDesc in
if {IsInt D} then {OS.connect D H P}
else {RaiseClosed self connect(host:H port:P)}
end
end
end
end
meth send(vs:V len:I<=_ port:P<=Missing host:H<='localhost')
lock self.WriteLock then D=@WriteDesc in
if {IsInt D} then
I = if P\=Missing then {DoSendTo D V H P 0}
else {DoSend D V 0}
end
else {RaiseClosed self send(vs:V len:I port:P host:H)}
end
end
end
meth receive(list:List tail:Tail <= nil len:Len<=_
size:Size<=ReadSize
host:Host<=Missing port:Port<=Missing)
lock self.ReadLock then D=@ReadDesc in
if {IsInt D} then
if {IsDet Host} andthen Host==Missing andthen
{IsDet Port} andthen Port==Missing then
Len={OS.receiveFromAnon D Size nil List Tail}
else
RealHost = if {IsDet Host} andthen Host==Missing then _
else Host
end
RealPort = if {IsDet Port} andthen Port==Missing then _
else Port
end
in
Len={OS.receiveFrom D Size nil List Tail
RealHost RealPort}
end
else {RaiseClosed self
receive(list:List tail:Tail len:Len
size:Size host:Host port:Port)}
end
end
end
%% methods for closing a connection
meth shutDown(how:How<=[receive send])
R = {Member receive How}
S = {Member send How}
in
if R andthen S then
lock self.ReadLock then
lock self.WriteLock then
RD=@ReadDesc WD=@WriteDesc
in
if {IsInt RD} andthen {IsInt WD} then
if RD==WD then {OS.shutDown WD 2}
else
{OS.shutDown RD 0}
{OS.shutDown WD 1}
end
else {RaiseClosed self shutDown(how:How)}
end
end
end
elseif R then
lock self.ReadLock then D=@ReadDesc in
if {IsInt D} then {OS.shutDown D 0}
else {RaiseClosed self shutDown(how:How)}
end
end
elseif S then
lock self.WriteLock then D=@WriteDesc in
if {IsInt D} then {OS.shutDown D 1}
else {RaiseClosed self shutDown(how:How)}
end
end
end
end
meth close
DescClass, CloseDescs
end
end
end
%%
%% Object for reading and writing of lines of text
%%
local
fun {DoReadLine Is Desc ?UnusedIs ?AtEnd}
case Is
of I|Ir then
case I of &\n then UnusedIs=Ir AtEnd=false nil
else I|{DoReadLine Ir Desc ?UnusedIs ?AtEnd}
end
[] nil then Is in
case {OS.read Desc ReadSize Is nil}
of 0 then UnusedIs=nil AtEnd=true nil
else {DoReadLine Is Desc ?UnusedIs ?AtEnd}
end
end
end
fun {DoReadOne Is Desc ?UnusedIs ?AtEnd}
case Is
of I|Ir then UnusedIs=Ir AtEnd=false I
[] nil then Is in
case {OS.read Desc ReadSize Is nil}
of 0 then UnusedIs=nil AtEnd=true false
else {DoReadOne Is Desc ?UnusedIs ?AtEnd}
end
end
end
in
class Text from DescClass
meth getC(?I)
lock self.ReadLock then
YetEnd = @AtEnd NextEnd
YetBuff = @Buff NextBuff
YetLast = @Last NextLast
GetDesc = @ReadDesc
in
if {IsInt GetDesc} then
AtEnd <- NextEnd
Buff <- NextBuff
Last <- NextLast
if YetEnd then
I=false
NextEnd=true NextBuff=nil NextLast=YetLast
else
I={DoReadOne YetBuff GetDesc NextBuff NextEnd}
NextLast=I
end
else {RaiseClosed self getC(I)}
end
end
end
meth putC(I)
{self write(vs:[I])}
end
meth getS(Result)
lock self.ReadLock then
YetEnd = @AtEnd NextEnd
YetBuff = @Buff NextBuff
GetDesc = @ReadDesc
in
if {IsInt GetDesc} then
AtEnd <- NextEnd
Buff <- NextBuff
Result = if YetEnd then
NextEnd=true NextBuff=nil
false
else
It={DoReadLine YetBuff GetDesc
NextBuff NextEnd}
in
if NextEnd then
case It of nil then false else It end
else It
end
end
else {RaiseClosed self getS(Result)}
end
end
end
meth putS(Is)
{self write(vs:Is#'\n')}
end
meth unGetC
lock self.ReadLock then
Buff <- @Last|@Buff
Last <- [0]
AtEnd <- false
end
end
meth atEnd($)
lock self.ReadLock then
@Buff==nil andthen @AtEnd
end
end
end
end
%%
%% The pipe object
%%
class Pipe from SockAndPipe
feat PID
meth init(cmd:Cmd args:ArgS<=nil pid:Pid<=_) = M
DescClass, InitLocks(M)
RD#WD = {OS.pipe Cmd ArgS ?Pid}
in
self.PID = Pid
ReadDesc <- RD
WriteDesc <- WD
end
meth Kill(SIG)
{OS.kill self.PID SIG _}
%% Ignore errors, since process may be killed anyway
{Delay KillTime}
{OS.wait _ _}
{OS.wait _ _}
end
meth close(DoKill <= false)
if DoKill then
Pipe,Kill('SIGKILL')
end
lock self.ReadLock then
lock self.WriteLock then
if DoKill then skip else
Pipe,Kill('SIGTERM')
end
DescClass, CloseDescs
end
end
end
end
class Html
meth header
{self write(vs:'Content-type: text/html\n\n')}
end
meth tag(Tag)
{self write(vs:{Tag2Vs Tag})}%
end
end
%%
%% Error formatting
%%
{Error.registerFormatter open
fun {$ E}
T = 'error in Open module'
in
case E
of open(What O M) then
%% expected What: atom, O: object
error(kind: T
msg: case What
of alreadyClosed then
'Object already closed'
[] alreadyInitialized then
'Object already initialized'
[] illegalFlags then
'Illegal value for flags'
[] illegalModes then
'Illegal value for mode'
[] nameOrUrl then
'Exactly one of \'name\' or \'url\' feature needed'
[] urlIsReadOnly then
'Only reading access to url-files allowed'
else 'Unknown' end
items: [hint(l:'Object Application'
m:'{' # oz(O) # ' ' # oz(M) # '}')])
else
error(kind: T
items: [line(oz(E))])
end
end}
end
end
| Oz | 4 | Ahzed11/mozart2 | lib/main/op/Open.oz | [
"BSD-2-Clause"
] |
// Atom Dark Syntax theme
@import "styles/syntax-variables.less";
@import "styles/editor.less";
@import "styles/syntax-legacy/_base.less";
@import "styles/syntax/base.less";
@import "styles/syntax/css.less";
@import "styles/syntax/html.less";
| Less | 4 | Embodimentgeniuslm3/BDB11A0E2DE062D2E39E4C5301B2FE5E | packages/atom-dark-syntax/index.less | [
"MIT"
] |
{-# LANGUAGE CPP, EmptyDataDecls, TypeSynonymInstances, FlexibleInstances, MultiParamTypeClasses, FlexibleContexts #-}
{-# OPTIONS_GHC -fno-warn-orphans #-}
module Graphics.UI.FLTK.LowLevel.Base.LightButton
(
lightButtonNew,
lightButtonCustom
, drawLightButtonBase
, handleLightButtonBase
, resizeLightButtonBase
, hideLightButtonBase
, showWidgetLightButtonBase
-- * Hierarchy
--
-- $hierarchy
-- * Functions
--
-- $functions
)
where
#include "Fl_ExportMacros.h"
#include "Fl_Types.h"
#include "Fl_Light_ButtonC.h"
#include "Fl_WidgetC.h"
import C2HS hiding (cFromEnum, cFromBool, cToBool,cToEnum)
import Graphics.UI.FLTK.LowLevel.Fl_Types
import Graphics.UI.FLTK.LowLevel.Utils
import Graphics.UI.FLTK.LowLevel.Hierarchy
import Graphics.UI.FLTK.LowLevel.Dispatch
import qualified Data.Text as T
import Graphics.UI.FLTK.LowLevel.Fl_Enumerations
import Graphics.UI.FLTK.LowLevel.Base.Widget
{# fun Fl_OverriddenLight_Button_New_WithLabel as overriddenWidgetNewWithLabel' { `Int',`Int',`Int',`Int', `CString', id `Ptr ()'} -> `Ptr ()' id #}
{# fun Fl_OverriddenLight_Button_New as overriddenWidgetNew' { `Int',`Int',`Int',`Int', id `Ptr ()'} -> `Ptr ()' id #}
lightButtonCustom ::
Rectangle -- ^ The bounds of this LightButton
-> Maybe T.Text -- ^ The LightButton label
-> Maybe (Ref LightButton -> IO ()) -- ^ Optional custom drawing function
-> Maybe (CustomWidgetFuncs LightButton) -- ^ Optional custom widget functions
-> IO (Ref LightButton)
lightButtonCustom rectangle l' draw' funcs' =
widgetMaker
rectangle
l'
draw'
funcs'
overriddenWidgetNew'
overriddenWidgetNewWithLabel'
{# fun Fl_Light_Button_New as widgetNew' { `Int',`Int',`Int',`Int' } -> `Ptr ()' id #}
{# fun Fl_Light_Button_New_WithLabel as widgetNewWithLabel' { `Int',`Int',`Int',`Int', `CString'} -> `Ptr ()' id #}
lightButtonNew :: Rectangle -> Maybe T.Text -> IO (Ref LightButton)
lightButtonNew rectangle l' =
widgetMaker
rectangle
l'
Nothing
Nothing
overriddenWidgetNew'
overriddenWidgetNewWithLabel'
{# fun Fl_Light_Button_draw_super as drawSuper' { id `Ptr ()' } -> `()' supressWarningAboutRes #}
drawLightButtonBase :: Ref LightButtonBase -> IO ()
drawLightButtonBase lightButton = withRef lightButton $ \lightButtonPtr -> drawSuper' lightButtonPtr
{# fun Fl_Light_Button_handle_super as handleSuper' { id `Ptr ()',`Int' } -> `Int' #}
handleLightButtonBase :: Ref LightButtonBase -> Event -> IO (Either UnknownEvent ())
handleLightButtonBase lightButton event = withRef lightButton $ \lightButtonPtr -> handleSuper' lightButtonPtr (fromIntegral (fromEnum event)) >>= return . successOrUnknownEvent
{# fun Fl_Light_Button_resize_super as resizeSuper' { id `Ptr ()',`Int',`Int',`Int',`Int' } -> `()' supressWarningAboutRes #}
resizeLightButtonBase :: Ref LightButtonBase -> Rectangle -> IO ()
resizeLightButtonBase lightButton rectangle =
let (x_pos, y_pos, width, height) = fromRectangle rectangle
in withRef lightButton $ \lightButtonPtr -> resizeSuper' lightButtonPtr x_pos y_pos width height
{# fun Fl_Light_Button_hide_super as hideSuper' { id `Ptr ()' } -> `()' supressWarningAboutRes #}
hideLightButtonBase :: Ref LightButtonBase -> IO ()
hideLightButtonBase lightButton = withRef lightButton $ \lightButtonPtr -> hideSuper' lightButtonPtr
{# fun Fl_Light_Button_show_super as showSuper' { id `Ptr ()' } -> `()' supressWarningAboutRes #}
showWidgetLightButtonBase :: Ref LightButtonBase -> IO ()
showWidgetLightButtonBase lightButton = withRef lightButton $ \lightButtonPtr -> showSuper' lightButtonPtr
{# fun Fl_Light_Button_Destroy as widgetDestroy' { id `Ptr ()' } -> `()' supressWarningAboutRes #}
instance (impl ~ (IO ())) => Op (Destroy ()) LightButtonBase orig impl where
runOp _ _ button = swapRef button $
\buttonPtr ->
widgetDestroy' buttonPtr >>
return nullPtr
{#fun Fl_DerivedLight_Button_handle as buttonHandle' { id `Ptr ()', id `CInt' } -> `Int' #}
instance (impl ~ ((Event -> IO (Either UnknownEvent ())))) => Op (Handle ()) LightButtonBase orig impl where
runOp _ _ button event = withRef button (\p -> buttonHandle' p (fromIntegral . fromEnum $ event)) >>= return . successOrUnknownEvent
{# fun Fl_DerivedLight_Button_resize as resize' { id `Ptr ()',`Int',`Int',`Int',`Int' } -> `()' supressWarningAboutRes #}
instance (impl ~ ((Rectangle -> IO ()))) => Op (Resize ()) LightButtonBase orig impl where
runOp _ _ button rectangle = withRef button $ \buttonPtr -> do
let (x_pos,y_pos,w_pos,h_pos) = fromRectangle rectangle
resize' buttonPtr x_pos y_pos w_pos h_pos
{# fun Fl_DerivedLight_Button_show as buttonShow' {id `Ptr ()'} -> `()' supressWarningAboutRes #}
instance (impl ~ ((IO ()))) => Op (ShowWidget ()) LightButtonBase orig impl where
runOp _ _ button = withRef button $ (\p -> buttonShow' p)
{# fun Fl_DerivedLight_Button_hide as hide' { id `Ptr ()' } -> `()' supressWarningAboutRes #}
instance (impl ~ (( IO ()))) => Op (Hide ()) LightButtonBase orig impl where
runOp _ _ button = withRef button $ \buttonPtr -> hide' buttonPtr
{# fun Fl_Light_Button_draw as draw'' { id `Ptr ()' } -> `()' #}
instance (impl ~ ( IO ())) => Op (Draw ()) LightButtonBase orig impl where
runOp _ _ lightButton = withRef lightButton $ \lightButtonPtr -> draw'' lightButtonPtr
-- $hierarchy
-- @
-- "Graphics.UI.FLTK.LowLevel.Base.Widget"
-- |
-- v
-- "Graphics.UI.FLTK.LowLevel.Base.Button"
-- |
-- v
-- "Graphics.UI.FLTK.LowLevel.Base.LightButton"
-- @
-- $functions
-- @
-- destroy :: 'Ref' 'LightButtonBase' -> 'IO' ()
--
-- draw :: 'Ref' 'LightButtonBase' -> 'IO' ()
--
-- handle :: 'Ref' 'LightButtonBase' -> ('Event' -> 'IO' ('Either' 'UnknownEvent' ()))
--
-- hide :: 'Ref' 'LightButtonBase' -> ( 'IO' ())
--
-- resize :: 'Ref' 'LightButtonBase' -> ('Rectangle' -> 'IO' ())
--
-- showWidget :: 'Ref' 'LightButtonBase' -> ('IO' ())
-- @
| C2hs Haskell | 5 | ericu/fltkhs | src/Graphics/UI/FLTK/LowLevel/Base/LightButton.chs | [
"MIT"
] |
#include <torch/csrc/jit/ir/ir.h>
#include <torch/csrc/jit/ir/ir_views.h>
#include <torch/csrc/jit/jit_log.h>
#include <torch/csrc/jit/passes/frozen_linear_transpose.h>
#include <torch/csrc/jit/passes/utils/optimization_utils.h>
#include <torch/csrc/jit/runtime/graph_executor.h>
#include <torch/csrc/jit/runtime/graph_iterator.h>
#include <iostream>
namespace torch {
namespace jit {
namespace {
using Tensor = at::Tensor;
class TransposeFrozenLinear {
public:
TransposeFrozenLinear(std::shared_ptr<Graph> graph)
: graph_(std::move(graph)) {}
bool run() {
// Can't delete nodes while also iterating over it
DepthFirstGraphNodeIterator graph_it(graph_);
for (auto next_node = graph_it.next(); next_node != nullptr;) {
Node* node = next_node;
next_node = graph_it.next();
if (is_constant_linear_op(node)) {
replace_linear_with_matmul(node);
}
}
return graph_modified_;
}
bool is_constant_linear_op(Node* node) {
if (node->kind() != aten::linear) {
return false;
}
// This also filters out out-variants of the linear op.
return !nonConstantParameters(node);
}
void replace_linear_with_matmul(Node* node) {
graph_modified_ = true;
Node* matmul = nullptr;
{
WithInsertPoint insert_guard(node);
auto weight = node->namedInput("weight");
Tensor weight_tensor = constant_as<Tensor>(weight).value();
Tensor weight_t_tensor = at::transpose(weight_tensor, 1, 0)
.clone(at::MemoryFormat::Contiguous);
Value* weight_t = graph_->insertConstant(weight_t_tensor);
matmul = graph_->create(aten::matmul, {node->inputs()[0], weight_t});
matmul->insertAfter(node);
}
// Handle a bias if there is any
WithInsertPoint insert_guard(matmul);
auto bias = node->namedInput("bias");
if (bias->type() == NoneType::get()) {
node->replaceAllUsesWith(matmul);
} else {
Value* bias_scale = graph_->insertConstant(1);
Node* bias_result =
graph_->create(aten::add, {matmul->output(), bias, bias_scale});
bias_result->insertAfter(matmul);
node->replaceAllUsesWith(bias_result);
}
node->destroy();
};
void handleBlockAndSubblocks(Block* block) {}
private:
std::shared_ptr<Graph> graph_;
bool graph_modified_ = false;
};
} // namespace
TORCH_API bool FrozenLinearTranspose(std::shared_ptr<Graph>& graph) {
TransposeFrozenLinear transposeWeight(graph);
GRAPH_DUMP("Before FrozenLinearTranspose", graph);
bool changed = transposeWeight.run();
if (changed) {
GRAPH_DUMP("After FrozenLinearTranspose", graph);
}
return changed;
}
} // namespace jit
} // namespace torch
| C++ | 5 | xiaohanhuang/pytorch | torch/csrc/jit/passes/frozen_linear_transpose.cpp | [
"Intel"
] |
// @filename: working.ts
// minmal samples from #33395
export namespace ns {
interface Function<T extends (...args: any) => any> {
throttle(): Function<T>;
}
interface Function<T> {
unary(): Function<() => ReturnType<T>>;
}
}
// @filename: regression.ts
export namespace ns {
interface Function<T> {
unary(): Function<() => ReturnType<T>>;
}
interface Function<T extends (...args: any) => any> {
throttle(): Function<T>;
}
} | TypeScript | 3 | monciego/TypeScript | tests/cases/compiler/interfaceMergedUnconstrainedNoErrorIrrespectiveOfOrder.ts | [
"Apache-2.0"
] |
-@ var body: String
-@ var title: String = "My App"
- import controllers._
- var stylesheets = Seq(routes.Assets.versioned("stylesheets/application.css"))
- var icon = routes.Assets.versioned("images/favicon.png")
- var javascripts = Seq( routes.Assets.versioned("javascripts/jquery.min.js"), routes.Assets.versioned("javascripts/bootstrap.min.js") )
!!!5
%html(lang="en")
%head
%meta(charset="UTF-8")
%meta(http-equiv="X-UA-Compatible" content="IE=edge")
%meta(name="viewport" content="width=device-width, initial-scale=1")
%title #{title}
%link(rel="shortcut icon" type="image/png" href=icon)
- for( css <- stylesheets )
%link(rel="stylesheet" media="screen" href=css)
- for{ js <- javascripts }
%script(src=js)
%body
-unescape(body) | Scaml | 4 | MaximilianoFelice/mop-organizer | app/views/layouts/default.scaml | [
"Apache-2.0"
] |
// Copyright 2015 The Bazel Authors. All rights reserved.
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
/*
* Include this file in a target if it requires some source but you don't have
* any.
*
* ios_extension_binary rules only generate a static library Xcode target, and
* the ios_extension will generate an actual bundling Xcode target. Application
* and app extension targets need at least one source file for Xcode to be
* happy, so we can add this file for them.
*/
static int dummy __attribute__((unused,used)) = 0;
| Objective-C++ | 3 | jobechoi/bazel | tools/objc/objc_dummy.mm | [
"Apache-2.0"
] |
Make sanity check for web-handler return value working in release mode
| Cucumber | 2 | ikrivosheev/aiohttp | CHANGES/3540.feature | [
"Apache-2.0"
] |
[\2cns|attr] {} | CSS | 0 | mengxy/swc | crates/swc_css_parser/tests/fixture/esbuild/misc/MCJc58-6bYzpgizSxt8jQg/input.css | [
"Apache-2.0"
] |
Gramatika
0 $accept: File $end
1 $@1: %empty
2 File: PackageDecl $@1 Imports
3 PackageDecl: 'P' Symbol ';'
4 Imports: 'I'
5 Symbol: 'S'
Terminály s pravidly, ve kterých se objevují
$end (0) 0
';' (59) 3
'I' (73) 4
'P' (80) 3
'S' (83) 5
error (256)
Neterminály s pravidly, ve kterých se objevují
$accept (7)
vlevo: 0
File (8)
vlevo: 2, vpravo: 0
$@1 (9)
vlevo: 1, vpravo: 2
PackageDecl (10)
vlevo: 3, vpravo: 2
Imports (11)
vlevo: 4, vpravo: 2
Symbol (12)
vlevo: 5, vpravo: 3
State 0
0 $accept: . File $end
2 File: . PackageDecl $@1 Imports
3 PackageDecl: . 'P' Symbol ';'
'P' posunout a přejít do stavu 1
File přejít do stavu 2
PackageDecl přejít do stavu 3
State 1
3 PackageDecl: 'P' . Symbol ';'
5 Symbol: . 'S'
'S' posunout a přejít do stavu 4
Symbol přejít do stavu 5
State 2
0 $accept: File . $end
$end posunout a přejít do stavu 6
State 3
1 $@1: . %empty
2 File: PackageDecl . $@1 Imports
$výchozí reduce using rule 1 ($@1)
$@1 přejít do stavu 7
State 4
5 Symbol: 'S' .
$výchozí reduce using rule 5 (Symbol)
State 5
3 PackageDecl: 'P' Symbol . ';'
';' posunout a přejít do stavu 8
State 6
0 $accept: File $end .
$výchozí přijmout
State 7
2 File: PackageDecl $@1 . Imports
4 Imports: . 'I'
'I' posunout a přejít do stavu 9
Imports přejít do stavu 10
State 8
3 PackageDecl: 'P' Symbol ';' .
$výchozí reduce using rule 3 (PackageDecl)
State 9
4 Imports: 'I' .
$výchozí reduce using rule 4 (Imports)
State 10
2 File: PackageDecl $@1 Imports .
$výchozí reduce using rule 2 (File)
| Bison | 3 | YKG/y | testdata/dev/go0.y.bison | [
"BSD-3-Clause"
] |
// Copyright 2006-2015 Las Venturas Playground. All rights reserved.
// Use of this source code is governed by the GPLv2 license, a copy of which can
// be found in the LICENSE file.
#pragma testcase TimeTestSuite
TimeTestSuite() {
// String we'll use for testing purposes.
new timeString[8];
// Test second value < 0
Time->formatRemainingTime(-30, timeString, sizeof(timeString));
assert_string_equals(timeString, "0", "Remaining time should show 0 when second value is negative.");
// Test second value == 0
Time->formatRemainingTime(0, timeString, sizeof(timeString));
assert_string_equals(timeString, "0", "Remaining time should show 0 when second value is 0");
// Test second value > 0 && value < 60
Time->formatRemainingTime(30, timeString, sizeof(timeString));
assert_string_equals(timeString, "30", "Remaining time shouldn't show minute units when second value > 0 && value < 60");
// Test second value == 60
Time->formatRemainingTime(60, timeString, sizeof(timeString));
assert_string_equals(timeString, "1:00", "Remaining time should show 1:00 when second value is 60");
// Test second value > 60 && value < 3600
Time->formatRemainingTime(121, timeString, sizeof(timeString));
assert_string_equals(timeString, "2:01", "Remaining time should show minute units when second value > 60 && value < 3600");
// Test second value > 3600
Time->formatRemainingTime(3601, timeString, sizeof(timeString));
assert_string_equals(timeString, "1:00:01", "Remaining time should show hour units when second value > 3600");
}
| PAWN | 4 | EPIC-striker/playground | pawn/Interface/Time.tests.pwn | [
"MIT"
] |
python "%~dp0\update-checkout" %*
| Batchfile | 1 | lwhsu/swift | utils/update-checkout.cmd | [
"Apache-2.0"
] |
import asyncdispatch, net, asyncnet
proc recvTwice(socket: Socket | AsyncSocket,
size: int): Future[string] {.multisync.} =
var x = await socket.recv(size)
var y = await socket.recv(size+1)
return x & "aboo" & y
| Nimrod | 4 | alehander92/Nim | tests/async/tmultisync.nim | [
"MIT"
] |
0 reg32_t "dword"
1 code_t "proc*"
2 num32_t "int"
3 uint32_t "unsigned int"
4 num8_t "char"
3 uint32_t "size_t"
5 ptr(struct(0:num32_t,4:ptr(num8_t),8:ptr(num8_t),12:ptr(num8_t),16:ptr(num8_t),20:ptr(num8_t),24:ptr(num8_t),28:ptr(num8_t),32:ptr(num8_t),36:ptr(num8_t),40:ptr(num8_t),44:ptr(num8_t),48:ptr(struct(0:ptr(TOP),4:ptr(struct(0:num32_t,4:ptr(reg8_t),8:ptr(reg8_t),12:ptr(reg8_t),16:ptr(reg8_t),20:ptr(reg8_t),24:ptr(reg8_t),28:ptr(reg8_t),32:ptr(reg8_t),36:ptr(reg8_t),40:ptr(reg8_t),44:ptr(reg8_t),48:ptr(TOP),52:ptr(TOP),56:num32_t,60:num32_t,64:num32_t,68:uint16_t,70:int8_t,71:array(num8_t,1),72:ptr(TOP),76:num64_t,84:ptr(TOP),88:ptr(TOP),92:ptr(TOP),96:ptr(TOP),100:uint32_t,104:num32_t,108:array(num8_t,40))),8:num32_t)),52:ptr(struct(0:num32_t,4:ptr(num8_t),8:ptr(num8_t),12:ptr(num8_t),16:ptr(num8_t),20:ptr(num8_t),24:ptr(num8_t),28:ptr(num8_t),32:ptr(num8_t),36:ptr(num8_t),40:ptr(num8_t),44:ptr(num8_t),48:ptr(struct(0:ptr(TOP),4:ptr(TOP),8:num32_t)),52:ptr(TOP),56:num32_t,60:num32_t,64:num32_t,68:uint16_t,70:int8_t,71:array(num8_t,1),72:ptr(TOP),76:num64_t,84:ptr(TOP),88:ptr(TOP),92:ptr(TOP),96:ptr(TOP),100:uint32_t,104:num32_t,108:array(num8_t,40))),56:num32_t,60:num32_t,64:num32_t,68:uint16_t,70:int8_t,71:array(num8_t,1),72:ptr(TOP),76:num64_t,84:ptr(TOP),88:ptr(TOP),92:ptr(TOP),96:ptr(TOP),100:uint32_t,104:num32_t,108:array(num8_t,40))) "FILE*"
6 ptr(num8_t) "char*"
7 ptr(TOP) "void*"
2 num32_t "__pid_t"
8 ptr(array(reg8_t,128)) "unknown_1024*"
9 ptr(struct(0:num32_t,4:num32_t)) "timeval*"
10 ptr(ptr(num8_t)) "char**"
11 ptr(reg64_t) "qword*"
12 union(ptr(num8_t),ptr(struct(0:reg16_t,2:num8_t))) "Union_0"
13 float64_t "double"
14 ptr(array(reg8_t,16)) "unknown_128*"
15 ptr(array(reg8_t,56)) "unknown_448*"
16 ptr(array(reg8_t,291)) "unknown_2328*"
17 union(ptr(struct(0:reg32_t,4:ptr(TOP))),ptr(struct(0:reg32_t,4:ptr(TOP))),ptr(ptr(struct(0:reg32_t,4:ptr(TOP))))) "Union_20"
18 ptr(struct(0:array(reg8_t,36),36:union(ptr(struct(0:reg32_t,4:ptr(TOP))),ptr(struct(0:reg32_t,4:ptr(TOP))),ptr(ptr(struct(0:reg32_t,4:ptr(TOP))))))) "StructFrag_37*"
19 ptr(struct(0:array(reg8_t,36),36:reg32_t)) "StructFrag_19*"
6 ptr(num8_t) "char[]"
20 ptr(array(reg8_t,58)) "unknown_464*"
21 union(ptr(reg32_t),ptr(struct(0:uint64_t,4:num32_t))) "Union_25"
22 ptr(num32_t) "int*"
23 ptr(struct(0:uint64_t,4:num32_t)) "Struct_78*"
24 ptr(reg32_t) "dword*"
25 ptr(struct(0:union(ptr(num8_t),ptr(struct(0:reg16_t,2:num8_t))),4:uint32_t,8:uint32_t,12:reg32_t,16:reg32_t,36:reg32_t,44:num32_t,48:num32_t)) "Struct_40*"
26 reg64_t "qword"
27 ptr(struct(0:float32_t,4:float32_t,8:float32_t,12:float32_t)) "Struct_8*"
28 float32_t "float"
29 ptr(struct(0:array(reg8_t,20),20:ptr(struct(0:float32_t,4:float32_t,8:float32_t,12:float32_t)))) "StructFrag_35*"
30 ptr(struct(0:reg16_t,2:num8_t)) "StructFrag_0*"
31 reg16_t "word"
32 num64_t "long long"
33 ptr(struct(8:float32_t,16:num8_t)) "Struct_9*"
34 int32_t "signed int"
35 union(ptr(reg32_t),ptr(int32_t)) "Union_23"
2 num32_t "__ssize_t"
36 ptr(struct(0:union(uint32_t,uint32_t),4:reg32_t)) "Struct_42*"
37 ptr(struct(0:array(reg8_t,36),36:ptr(struct(0:reg32_t,4:ptr(TOP))))) "StructFrag_38*"
38 ptr(struct(0:reg32_t,4:ptr(TOP))) "StructFrag_31*"
24 ptr(reg32_t) "dword[]"
39 ptr(struct(0:reg32_t,4:ptr(struct(0:reg32_t,4:ptr(TOP))))) "Struct_64*"
40 ptr(struct(0:ptr(TOP),12:reg32_t,32:code_t)) "Struct_22*"
41 union(ptr(ptr(num8_t)),ptr(struct(0:ptr(num8_t),4:reg32_t,8:reg32_t,40:num8_t,42:num8_t,44:num32_t,48:num32_t,52:reg32_t,56:num32_t))) "Union_4"
42 ptr(struct(0:ptr(TOP),4:ptr(TOP),8:reg32_t,12:ptr(struct(0:reg32_t,4:ptr(TOP))),16:ptr(struct(0:reg32_t,4:ptr(TOP))),20:ptr(num8_t),36:ptr(struct(0:reg32_t,4:ptr(TOP))))) "Struct_51*"
43 ptr(struct(0:ptr(struct(0:reg32_t,4:ptr(TOP))),4:reg32_t)) "Struct_66*"
44 union(ptr(struct(0:ptr(TOP),12:reg32_t,16:reg32_t,20:ptr(struct(0:float32_t,4:float32_t,8:float32_t,12:float32_t)))),ptr(struct(24:code_t,28:code_t)),ptr(struct(0:ptr(TOP),4:ptr(TOP),8:reg32_t,12:ptr(struct(0:reg32_t,4:ptr(TOP))),16:ptr(struct(0:reg32_t,4:ptr(TOP))),20:ptr(num8_t),36:ptr(struct(0:reg32_t,4:ptr(TOP)))))) "Union_14"
45 struct(0:ptr(TOP)) "Singleton_0"
46 union(ptr(ptr(num8_t)),ptr(struct(0:ptr(num8_t),4:reg32_t,8:reg32_t,40:num8_t,42:num8_t,44:num32_t,48:num32_t,52:reg32_t,56:num32_t)),struct(0:union(ptr(ptr(num8_t)),ptr(struct(0:ptr(num8_t),4:reg32_t,8:reg32_t,40:num8_t,42:num8_t,44:num32_t,48:num32_t,52:reg32_t,56:num32_t))),4:ptr(reg64_t))) "Union_15"
47 ptr(struct(0:ptr(TOP))) "Singleton_0*"
48 ptr(struct(0:ptr(struct(0:reg32_t,4:ptr(TOP))),32:code_t,36:ptr(struct(0:reg32_t,4:ptr(TOP))))) "Struct_23*"
49 ptr(struct(0:ptr(TOP),4:reg32_t,16:reg32_t)) "Struct_63*"
38 ptr(struct(0:reg32_t,4:ptr(TOP))) "Struct_0*"
43 ptr(struct(0:ptr(struct(0:reg32_t,4:ptr(TOP))),4:reg32_t)) "Struct_45*"
50 ptr(struct(0:reg64_t,8:reg32_t)) "StructFrag_13*"
51 ptr(struct(0:array(reg8_t,12),12:reg32_t)) "StructFrag_12*"
52 ptr(struct(0:array(reg8_t,16),16:reg32_t)) "StructFrag_5*"
53 ptr(struct(4:reg32_t,24:code_t)) "Struct_49*"
38 ptr(struct(0:reg32_t,4:ptr(TOP))) "StructFrag_11*"
54 union(ptr(struct(0:array(reg8_t,24),24:code_t)),ptr(struct(4:reg32_t,24:code_t))) "Union_9"
55 ptr(array(reg8_t,30)) "unknown_240*"
56 ptr(array(reg8_t,37)) "unknown_296*"
57 union(ptr(struct(0:ptr(TOP),12:reg32_t,16:reg32_t,20:ptr(struct(0:float32_t,4:float32_t,8:float32_t,12:float32_t)))),ptr(struct(0:array(reg8_t,16),16:reg32_t)),ptr(struct(0:array(reg8_t,24),24:code_t))) "Union_3"
58 ptr(struct(0:ptr(TOP),12:reg32_t,16:reg32_t,20:ptr(struct(0:float32_t,4:float32_t,8:float32_t,12:float32_t)))) "Struct_13*"
59 ptr(struct(0:union(ptr(ptr(num8_t)),ptr(struct(0:ptr(num8_t),4:reg32_t,8:reg32_t,40:num8_t,42:num8_t,44:num32_t,48:num32_t,52:reg32_t,56:num32_t))),4:union(ptr(struct(0:reg32_t,4:ptr(TOP))),ptr(ptr(struct(0:reg32_t,4:ptr(TOP))))))) "Struct_50*"
60 union(ptr(struct(0:reg32_t,4:ptr(TOP))),ptr(ptr(struct(0:reg32_t,4:ptr(TOP))))) "Union_10"
61 ptr(struct(24:code_t,28:code_t)) "Struct_47*"
62 ptr(struct(0:union(ptr(ptr(num8_t)),ptr(struct(0:ptr(num8_t),4:reg32_t,8:reg32_t,40:num8_t,42:num8_t,44:num32_t,48:num32_t,52:reg32_t,56:num32_t))),4:ptr(TOP))) "Struct_48*"
63 union(ptr(struct(0:array(reg8_t,24),24:code_t)),ptr(struct(24:code_t,28:code_t))) "Union_8"
64 ptr(struct(0:ptr(struct(0:reg32_t,4:ptr(TOP))),8:reg32_t,12:reg32_t,16:reg32_t)) "Struct_20*"
65 ptr(struct(0:ptr(TOP),4:ptr(TOP),8:uint32_t,12:reg32_t,16:reg32_t,20:ptr(struct(8:float32_t,16:num8_t)),24:reg32_t,28:reg32_t,32:reg32_t,36:reg32_t)) "Struct_55*"
66 ptr(struct(0:ptr(TOP),4:ptr(TOP),8:uint32_t,12:reg32_t,20:ptr(struct(8:float32_t,16:num8_t)),24:reg32_t,28:reg32_t,32:reg32_t,36:reg32_t)) "Struct_56*"
67 ptr(struct(0:ptr(struct(0:reg32_t,4:ptr(TOP))),4:reg32_t,12:reg32_t,16:reg32_t)) "Struct_46*"
68 ptr(struct(0:num32_t,4:ptr(struct(0:array(reg8_t,16),16:reg32_t)),4294967292:reg32_t)) "Struct_28*"
69 uint64_t "uintmax_t"
70 ptr(struct(0:union(ptr(num8_t),ptr(struct(0:reg16_t,2:num8_t))),4:reg32_t,40:num8_t,44:num32_t,48:num32_t)) "Struct_31*"
71 ptr(struct(0:array(reg8_t,40),40:num8_t)) "StructFrag_6*"
72 ptr(struct(0:array(reg8_t,6),6:num8_t)) "StructFrag_3*"
73 ptr(struct(0:uint64_t,4:reg32_t)) "Struct_2*"
74 ptr(ptr(struct(0:reg32_t,4:num8_t))) "StructFrag_1**"
75 ptr(struct(0:array(reg8_t,16),16:ptr(struct(0:reg16_t,2:num8_t)))) "StructFrag_41*"
76 union(num32_t,uint32_t) "Union_7"
77 ptr(struct(0:ptr(num8_t),4:num32_t,8:ptr(num32_t),12:num32_t)) "option*"
78 ptr(float64_t) "double*"
79 ptr(struct(0:reg32_t,40:ptr(num8_t),44:ptr(num8_t))) "Struct_3*"
80 ptr(struct(40:ptr(num8_t),44:ptr(num8_t))) "Struct_24*"
81 ptr(uint32_t) "size_t*"
82 array(reg8_t,3) "unknown_24"
83 array(reg8_t,32) "unknown_256"
84 union(ptr(ptr(num8_t)),ptr(num8_t)) "Union_5"
85 union(ptr(ptr(num8_t)),ptr(struct(0:ptr(num8_t),4:reg32_t,8:reg32_t,40:num8_t,42:num8_t,44:num32_t,48:num32_t,52:reg32_t,56:num32_t)),struct(0:reg32_t,4:ptr(reg64_t))) "Union_18"
86 ptr(struct(0:reg32_t,8:reg32_t,24:code_t)) "Struct_65*"
81 ptr(uint32_t) "unsigned int*"
87 union(ptr(reg32_t),ptr(struct(0:reg32_t,40:ptr(num8_t),44:ptr(num8_t)))) "Union_21"
88 union(num32_t,num32_t) "Union_22"
89 union(uint32_t,uint32_t) "Union_6"
90 ptr(struct(0:union(ptr(num8_t),ptr(struct(0:reg16_t,2:num8_t))),4:reg32_t,40:num8_t,42:num8_t,44:num32_t,48:num32_t,52:reg32_t)) "Struct_18*"
91 ptr(struct(0:ptr(num8_t),4:reg32_t,8:reg32_t,40:num8_t,42:num8_t,44:num32_t,48:num32_t,52:reg32_t,56:num32_t)) "Struct_38*"
92 ptr(struct(0:array(reg8_t,32),32:num8_t)) "StructFrag_24*"
93 ptr(struct(0:struct(0:reg32_t,4:ptr(reg64_t)),4:ptr(struct(4:ptr(TOP))))) "Struct_57*"
94 union(ptr(struct(0:reg32_t,4:ptr(TOP))),ptr(struct(0:reg32_t,4:ptr(TOP)))) "Union_16"
95 struct(0:reg32_t,4:ptr(reg64_t)) "StructFrag_31"
96 ptr(struct(12:reg32_t,24:code_t,36:union(ptr(struct(0:reg32_t,4:ptr(TOP))),ptr(struct(0:reg32_t,4:ptr(TOP)))))) "Struct_61*"
97 union(ptr(struct(0:array(reg8_t,12),12:reg32_t)),ptr(struct(12:reg32_t,24:code_t,36:union(ptr(struct(0:reg32_t,4:ptr(TOP))),ptr(struct(0:reg32_t,4:ptr(TOP))))))) "Union_17"
98 ptr(struct(0:ptr(struct(0:struct(0:reg32_t,4:ptr(reg64_t)),4:ptr(struct(4:ptr(TOP))))),4:reg32_t,12:reg32_t)) "Struct_60*"
99 ptr(struct(0:array(reg8_t,56),56:reg32_t)) "StructFrag_25*"
100 union(ptr(num8_t),ptr(struct(0:reg32_t,4:ptr(TOP)))) "Union_24"
101 ptr(ptr(uint16_t)) "unsigned short**"
102 ptr(struct(0:array(reg8_t,44),44:reg32_t)) "StructFrag_20*"
103 ptr(struct(0:array(reg8_t,44),44:num32_t)) "StructFrag_21*"
104 ptr(struct(0:array(reg8_t,52),52:reg32_t)) "StructFrag_22*"
105 ptr(struct(0:array(reg8_t,41),41:num8_t)) "StructFrag_34*"
106 ptr(struct(0:array(reg8_t,60),60:reg32_t)) "StructFrag_26*"
107 ptr(union(ptr(num8_t),ptr(struct(0:reg16_t,2:num8_t)))) "Union_0*"
108 ptr(struct(0:array(reg8_t,48),48:reg32_t)) "StructFrag_27*"
109 ptr(struct(0:array(reg8_t,64),64:reg32_t)) "StructFrag_28*"
110 ptr(ptr(struct(0:reg16_t,2:num8_t))) "StructFrag_0**"
111 union(ptr(struct(0:reg32_t,4:ptr(TOP))),ptr(struct(0:union(ptr(ptr(num8_t)),ptr(struct(0:ptr(num8_t),4:reg32_t,8:reg32_t,40:num8_t,42:num8_t,44:num32_t,48:num32_t,52:reg32_t,56:num32_t))),4:ptr(TOP))),ptr(struct(0:reg32_t,4:ptr(TOP))),ptr(struct(0:ptr(TOP))),ptr(struct(0:struct(0:reg32_t,4:ptr(reg64_t)),4:ptr(struct(4:ptr(TOP)))))) "Union_19"
112 ptr(struct(0:array(reg8_t,16),16:uint32_t)) "StructFrag_42*"
113 ptr(code_t) "proc**"
114 ptr(uint16_t) "unsigned short*"
115 ptr(reg16_t) "word*"
116 ptr(struct(0:reg32_t,4:ptr(num8_t))) "StructFrag_44*"
117 union(ptr(num8_t),ptr(struct(0:reg32_t,4:num8_t))) "Union_1"
118 ptr(struct(0:reg32_t,4:num8_t)) "StructFrag_1*"
119 ptr(struct(0:array(reg8_t,139946),139946:reg32_t)) "StructFrag_15*"
120 ptr(struct(0:array(reg8_t,536870908),4294967292:reg32_t)) "StructFrag_16*"
121 ptr(struct(0:array(reg8_t,48),48:num32_t)) "StructFrag_23*"
122 ptr(struct(0:array(reg8_t,60),60:num32_t)) "StructFrag_29*"
123 ptr(struct(0:array(reg8_t,56),56:num32_t)) "StructFrag_30*"
124 ptr(struct(0:array(reg8_t,50972),50972:reg32_t)) "StructFrag_17*"
125 ptr(struct(0:array(reg8_t,648),648:reg32_t)) "StructFrag_18*"
81 ptr(uint32_t) "unsigned int[]"
126 array(reg8_t,4096) "unknown_32768"
127 array(reg8_t,135168) "unknown_1081344"
128 array(reg8_t,30) "unknown_240"
129 array(reg8_t,5) "unknown_40"
130 array(reg8_t,29) "unknown_232"
131 array(reg8_t,16) "unknown_128"
132 array(reg8_t,41) "unknown_328"
133 array(reg8_t,7) "unknown_56"
134 array(reg8_t,51) "unknown_408"
135 array(reg8_t,13) "unknown_104"
136 array(reg8_t,27) "unknown_216"
137 array(reg8_t,47) "unknown_376"
138 array(reg8_t,142) "unknown_1136"
139 array(reg8_t,53) "unknown_424"
140 array(reg8_t,55) "unknown_440"
141 array(reg8_t,133) "unknown_1064"
142 array(reg8_t,45) "unknown_360"
143 array(reg8_t,38) "unknown_304"
144 array(reg8_t,63) "unknown_504"
145 array(reg8_t,85) "unknown_680"
146 array(reg8_t,107) "unknown_856"
147 array(reg8_t,10) "unknown_80"
148 array(reg8_t,23) "unknown_184"
149 array(reg8_t,387) "unknown_3096"
150 array(reg8_t,11) "unknown_88"
151 array(reg8_t,50) "unknown_400"
152 array(reg8_t,161) "unknown_1288"
153 array(reg8_t,83) "unknown_664"
154 array(reg8_t,24) "unknown_192"
155 array(reg8_t,111) "unknown_888"
156 array(reg8_t,93) "unknown_744"
157 array(reg8_t,122) "unknown_976"
158 array(reg8_t,14) "unknown_112"
159 array(reg8_t,138) "unknown_1104"
160 array(reg8_t,95) "unknown_760"
161 array(reg8_t,48) "unknown_384"
162 array(reg8_t,145) "unknown_1160"
163 array(reg8_t,168) "unknown_1344"
164 array(reg8_t,166) "unknown_1328"
165 array(reg8_t,82) "unknown_656"
166 array(reg8_t,17) "unknown_136"
167 array(reg8_t,46) "unknown_368"
168 array(reg8_t,120) "unknown_960"
169 array(reg8_t,102) "unknown_816"
170 array(reg8_t,156) "unknown_1248"
171 array(reg8_t,56) "unknown_448"
172 array(reg8_t,119) "unknown_952"
173 array(reg8_t,131) "unknown_1048"
174 array(reg8_t,25) "unknown_200"
175 array(reg8_t,175) "unknown_1400"
176 array(reg8_t,60) "unknown_480"
177 array(reg8_t,19) "unknown_152"
178 array(reg8_t,18) "unknown_144"
179 array(reg8_t,15) "unknown_120"
180 array(reg8_t,36) "unknown_288"
181 array(reg8_t,61) "unknown_488"
182 array(reg8_t,6) "unknown_48"
183 array(reg8_t,39) "unknown_312"
184 array(reg8_t,37) "unknown_296"
185 array(reg8_t,101) "unknown_808"
186 array(reg8_t,209) "unknown_1672"
187 array(reg8_t,76) "unknown_608"
188 array(reg8_t,72) "unknown_576"
189 array(reg8_t,65) "unknown_520"
190 array(reg8_t,20) "unknown_160"
191 array(reg8_t,84) "unknown_672"
192 array(reg8_t,71) "unknown_568"
193 array(reg8_t,94) "unknown_752"
194 array(reg8_t,80) "unknown_640"
195 array(reg8_t,147) "unknown_1176"
196 array(reg8_t,104) "unknown_832"
197 array(reg8_t,57) "unknown_456"
198 array(reg8_t,148) "unknown_1184"
199 array(reg8_t,135) "unknown_1080"
200 array(reg8_t,52) "unknown_416"
201 array(reg8_t,58) "unknown_464"
202 array(reg8_t,78) "unknown_624"
203 array(reg8_t,34) "unknown_272"
204 array(reg8_t,9) "unknown_72"
205 array(reg8_t,79) "unknown_632"
206 array(reg8_t,22) "unknown_176"
207 array(reg8_t,44) "unknown_352"
208 array(reg8_t,130) "unknown_1040"
209 array(reg8_t,163) "unknown_1304"
210 array(reg8_t,112) "unknown_896"
211 array(reg8_t,42) "unknown_336"
212 array(reg8_t,12) "unknown_96"
213 array(reg8_t,33) "unknown_264"
214 array(reg8_t,92) "unknown_736"
215 array(reg8_t,88) "unknown_704"
216 array(reg8_t,96) "unknown_768"
217 array(reg8_t,35) "unknown_280"
218 array(reg8_t,121) "unknown_968"
219 array(reg8_t,146) "unknown_1168"
220 array(reg8_t,89) "unknown_712"
221 array(reg8_t,239) "unknown_1912"
222 array(reg8_t,159) "unknown_1272"
223 array(reg8_t,98) "unknown_784"
224 array(reg8_t,21) "unknown_168"
225 array(reg8_t,87) "unknown_696"
226 array(reg8_t,206) "unknown_1648"
227 array(reg8_t,90) "unknown_720"
228 array(reg8_t,69) "unknown_552"
229 array(reg8_t,40) "unknown_320"
230 array(reg8_t,125) "unknown_1000"
231 array(reg8_t,139) "unknown_1112"
232 array(reg8_t,54) "unknown_432"
233 array(reg8_t,31) "unknown_248"
234 array(reg8_t,64) "unknown_512"
235 array(reg8_t,115) "unknown_920"
236 array(reg8_t,127) "unknown_1016"
237 array(reg8_t,177) "unknown_1416"
238 array(reg8_t,73) "unknown_584"
239 array(reg8_t,26) "unknown_208"
240 array(reg8_t,75) "unknown_600"
241 array(reg8_t,179) "unknown_1432"
242 array(reg8_t,99) "unknown_792"
243 array(reg8_t,67) "unknown_536"
244 array(reg8_t,28) "unknown_224"
245 array(reg8_t,49) "unknown_392"
246 array(reg8_t,66) "unknown_528"
247 array(reg8_t,108) "unknown_864"
248 array(reg8_t,86) "unknown_688"
249 array(reg8_t,291) "unknown_2328"
250 array(reg8_t,43) "unknown_344"
251 array(reg8_t,137) "unknown_1096"
252 array(reg8_t,59) "unknown_472"
253 array(reg8_t,213) "unknown_1704"
254 array(reg8_t,280) "unknown_2240"
255 array(reg8_t,70) "unknown_560"
256 array(reg8_t,91) "unknown_728"
257 array(reg8_t,126) "unknown_1008"
258 array(reg8_t,190) "unknown_1520"
259 array(reg8_t,173) "unknown_1384"
260 array(reg8_t,149) "unknown_1192"
261 array(reg8_t,77) "unknown_616"
262 array(reg8_t,140) "unknown_1120"
263 array(reg8_t,97) "unknown_776"
264 array(reg8_t,113) "unknown_904"
265 array(reg8_t,100) "unknown_800"
266 array(reg8_t,62) "unknown_496"
267 array(reg8_t,129) "unknown_1032"
268 array(reg8_t,105) "unknown_840"
269 array(num8_t,75) "char[75]"
270 array(num8_t,23) "char[23]"
271 array(num8_t,39) "char[39]"
272 array(num8_t,14) "char[14]"
273 array(num8_t,4) "char[4]"
274 array(num8_t,69) "char[69]"
275 array(num8_t,65) "char[65]"
276 struct(0:ptr(num8_t),4:num32_t,8:ptr(num32_t),12:num32_t) "option"
277 array(reg8_t,224) "unknown_1792"
278 array(num8_t,33) "char[33]"
279 array(num8_t,186) "char[186]"
280 array(num8_t,146) "char[146]"
281 array(num8_t,234) "char[234]"
282 array(num8_t,549) "char[549]"
283 array(num8_t,216) "char[216]"
284 array(num8_t,331) "char[331]"
285 array(num8_t,45) "char[45]"
286 array(num8_t,54) "char[54]"
287 array(num8_t,332) "char[332]"
288 array(num8_t,437) "char[437]"
289 array(num8_t,2) "char[2]"
290 array(num8_t,15) "char[15]"
291 array(num8_t,19) "char[19]"
292 array(num8_t,16) "char[16]"
293 array(num8_t,17) "char[17]"
294 array(num8_t,29) "char[29]"
295 array(num8_t,38) "char[38]"
296 array(num8_t,42) "char[42]"
297 array(num8_t,11) "char[11]"
298 array(num8_t,93) "char[93]"
299 array(num8_t,22) "char[22]"
300 array(num8_t,49) "char[49]"
301 array(num8_t,20) "char[20]"
302 array(num8_t,66) "char[66]"
303 array(num8_t,27) "char[27]"
304 array(num8_t,3) "char[3]"
305 array(num8_t,64) "char[64]"
306 array(num8_t,12) "char[12]"
307 array(num8_t,25) "char[25]"
308 array(num8_t,44) "char[44]"
309 array(num8_t,35) "char[35]"
310 array(num8_t,36) "char[36]"
311 array(num8_t,28) "char[28]"
312 array(num8_t,31) "char[31]"
313 array(num8_t,67) "char[67]"
314 array(num8_t,26) "char[26]"
315 array(num8_t,13) "char[13]"
316 array(num8_t,24) "char[24]"
317 array(num8_t,7) "char[7]"
318 array(num8_t,9) "char[9]"
319 array(num8_t,60) "char[60]"
320 array(num8_t,30) "char[30]"
321 array(num8_t,5) "char[5]"
322 array(num8_t,37) "char[37]"
323 array(num8_t,21) "char[21]"
324 array(num8_t,53) "char[53]"
325 array(num8_t,62) "char[62]"
326 array(num8_t,51) "char[51]"
327 array(num8_t,90) "char[90]"
328 array(num8_t,10) "char[10]"
329 array(num8_t,8) "char[8]"
330 array(num8_t,56) "char[56]"
331 array(num8_t,6) "char[6]"
332 array(reg32_t,127) "dword[127]"
333 array(reg32_t,30) "dword[30]"
334 array(reg32_t,34) "dword[34]"
335 array(num8_t,203) "char[203]"
336 array(num8_t,32) "char[32]"
337 array(num8_t,40) "char[40]"
338 array(num8_t,48) "char[48]"
339 array(num8_t,52) "char[52]"
340 array(num8_t,47) "char[47]"
341 array(ptr(TOP),54) "void*[54]"
342 array(num8_t,81) "char[81]"
343 array(reg8_t,1668) "unknown_13344"
344 array(reg8_t,7124) "unknown_56992"
345 array(reg8_t,7376) "unknown_59008"
1 code_t "(void -?-> dword)*"
346 array(reg8_t,232) "unknown_1856"
347 array(reg8_t,256) "unknown_2048"
| BlitzBasic | 1 | matt-noonan/retypd-data | data/tail.decls | [
"MIT"
] |
`define INITS \
assign a = -1; \
assign b = -2; \
assign c = -3; \
assign d = -4; \
assign a_ext = a; \
assign b_ext = b; \
assign c_ext = c; \
assign d_ext = d;
module gate_a(
output byte a,
output byte unsigned b,
output shortint c,
output shortint unsigned d,
output [31:0] a_ext,
output [31:0] b_ext,
output [31:0] c_ext,
output [31:0] d_ext
);
`INITS
endmodule
module gate_b(
a, b, c, d,
a_ext, b_ext, c_ext, d_ext
);
output byte a;
output byte unsigned b;
output shortint c;
output shortint unsigned d;
output [31:0] a_ext;
output [31:0] b_ext;
output [31:0] c_ext;
output [31:0] d_ext;
`INITS
endmodule
module gold(
output signed [7:0] a,
output unsigned [7:0] b,
output signed [15:0] c,
output unsigned [15:0] d,
output [31:0] a_ext,
output [31:0] b_ext,
output [31:0] c_ext,
output [31:0] d_ext
);
`INITS
endmodule
| SystemVerilog | 3 | gudeh/yosys | tests/verilog/port_int_types.sv | [
"ISC"
] |
--TEST--
Use of parent inside a class that has / has no parent (failure case 1)
--FILE--
<?php
// Illegal: A::parent is ill-defined
class A {
public function method(parent $x) {}
}
class B extends A {
public function method(parent $x) {}
}
?>
--EXPECTF--
Fatal error: Cannot use "parent" when current class scope has no parent in %s on line %d
| PHP | 3 | thiagooak/php-src | Zend/tests/type_declarations/variance/parent_in_class_failure1.phpt | [
"PHP-3.01"
] |
#include <QMap>
#include <QSoundEffect>
#include <QString>
#include "selfdrive/hardware/hw.h"
#include "selfdrive/ui/ui.h"
const std::tuple<AudibleAlert, QString, int> sound_list[] = {
// AudibleAlert, file name, loop count
{AudibleAlert::ENGAGE, "engage.wav", 0},
{AudibleAlert::DISENGAGE, "disengage.wav", 0},
{AudibleAlert::REFUSE, "refuse.wav", 0},
{AudibleAlert::PROMPT, "prompt.wav", 0},
{AudibleAlert::PROMPT_REPEAT, "prompt.wav", QSoundEffect::Infinite},
{AudibleAlert::PROMPT_DISTRACTED, "prompt_distracted.wav", QSoundEffect::Infinite},
{AudibleAlert::WARNING_SOFT, "warning_soft.wav", QSoundEffect::Infinite},
{AudibleAlert::WARNING_IMMEDIATE, "warning_immediate.wav", QSoundEffect::Infinite},
};
class Sound : public QObject {
public:
explicit Sound(QObject *parent = 0);
protected:
void update();
void setAlert(const Alert &alert);
Alert current_alert = {};
QMap<AudibleAlert, QPair<QSoundEffect *, int>> sounds;
SubMaster sm;
uint64_t started_frame;
};
| C | 4 | GratefulJinx77/openpilot-1 | selfdrive/ui/soundd/sound.h | [
"MIT"
] |
// !DIAGNOSTICS: -UNUSED_PARAMETER
class Outer {
inner class Test1
inner class Test2(val x: Int)
inner class Test3(val x: Any)
inner class Test4<T>(val x: T)
inner class Test5(val x: Int) {
constructor() : this(0)
private constructor(z: String) : this(z.length)
}
class TestNested
internal class TestInternal
protected class TestProtected
private class TestPrivate
}
fun Outer.Test1() {}
fun Outer.Test2(x: Int) {}
fun Outer.Test3(x: String) {}
fun <T> Outer.Test3(x: T) {}
fun <T : Number> Outer.Test4(x: T) {}
fun Outer.Test5() {}
fun Outer.Test5(z: String) {}
fun Outer.TestNested() {}
fun Outer.TestInternal() {}
fun Outer.TestProtected() {}
fun Outer.TestPrivate() {} | Kotlin | 3 | Mu-L/kotlin | compiler/testData/diagnostics/tests/redeclarations/shadowedExtension/extensionFunShadowedByInnerClassConstructor.fir.kt | [
"ECL-2.0",
"Apache-2.0"
] |
set(SWIFT_HOST_VARIANT_SDK WINDOWS CACHE STRING "")
set(SWIFT_HOST_VARIANT_ARCH x86_64 CACHE STRING "")
# NOTE(compnerd) disable the tools, we are trying to build just the standard
# library.
set(SWIFT_INCLUDE_TOOLS NO CACHE BOOL "")
# NOTE(compnerd) cannot build tests since the tests require the toolchain
set(SWIFT_INCLUDE_TESTS NO CACHE BOOL "")
# NOTE(compnerd) cannot build docs since that requires perl
set(SWIFT_INCLUDE_DOCS NO CACHE BOOL "")
# NOTE(compnerd) these are part of the toolchain, not the runtime.
set(SWIFT_BUILD_SYNTAXPARSERLIB NO CACHE BOOL "")
set(SWIFT_BUILD_SOURCEKIT NO CACHE BOOL "")
# NOTE(compnerd) build with the compiler specified, not a just built compiler.
set(SWIFT_BUILD_RUNTIME_WITH_HOST_COMPILER YES CACHE BOOL "")
| CMake | 3 | gandhi56/swift | cmake/caches/Runtime-Windows-x86_64.cmake | [
"Apache-2.0"
] |
DROP TYPE IF EXISTS "Role";
CREATE TYPE "Role" AS ENUM ('USER', 'ADMIN');
DROP TABLE IF EXISTS "public"."Post" CASCADE;
CREATE TABLE "public"."Post" (
"id" text NOT NULL,
"createdAt" timestamp(3) NOT NULL DEFAULT CURRENT_TIMESTAMP,
"updatedAt" timestamp(3) NOT NULL DEFAULT '1970-01-01 00:00:00'::timestamp without time zone,
"published" boolean NOT NULL DEFAULT false,
"title" text NOT NULL,
"content" text,
"authorId" text,
"jsonData" jsonb,
PRIMARY KEY ("id")
);
DROP TABLE IF EXISTS "public"."User" CASCADE;
CREATE TABLE "public"."User" (
"id" text,
"email" text NOT NULL,
"name" text,
PRIMARY KEY ("id")
);
CREATE UNIQUE INDEX "User.email" ON "public"."User"("email");
ALTER TABLE "public"."Post"
ADD FOREIGN KEY ("authorId") REFERENCES "public"."User"("id") ON DELETE
SET NULL ON UPDATE CASCADE;
INSERT INTO "public"."User" (email, id, name)
VALUES (
'[email protected]',
'576eddf9-2434-421f-9a86-58bede16fd91',
'alice'
);
INSERT INTO "public"."User" (email, id, name)
VALUES (
'[email protected]',
'576eddf9-2434-421f-9a86-58bede16fd92',
'Alice'
);
INSERT INTO "public"."User" (email, id, name)
VALUES (
'[email protected]',
'576eddf9-2434-421f-9a86-58bede16fd93',
'ALICE'
);
INSERT INTO "public"."User" (email, id, name)
VALUES (
'[email protected]',
'576eddf9-2434-421f-9a86-58bede16fd94',
'AliCe'
);
INSERT INTO "public"."User" (email, id, name)
VALUES (
'[email protected]',
'576eddf9-2434-421f-9a86-58bede16fd95',
'AlIce'
);
INSERT INTO "public"."User" (email, id, name)
VALUES (
'[email protected]',
'576eddf9-2434-421f-9a86-58bede16fd96',
'alicE'
); | SQL | 3 | safareli/prisma | packages/client/src/__tests__/integration/happy/insensitive-postgresql/setup.sql | [
"Apache-2.0"
] |
color("red") sphere(5); | OpenSCAD | 1 | heristhesiya/OpenJSCAD.org | packages/io/scad-deserializer/tests/transformations/colorEx2.scad | [
"MIT"
] |
\* Copyright (c) 2012-2021 Bruno Deferrari. All rights reserved. *\
\* BSD 3-Clause License: http://opensource.org/licenses/BSD-3-Clause *\
(load "src/compiler.shen")
(assert-equal
(_scm.force-boolean true)
true)
(assert-equal
(_scm.force-boolean false) false)
(assert-equal
(_scm.force-boolean [number? 1])
[number? 1])
(assert-equal
(_scm.force-boolean [+ 1 2])
[_scm.assert-boolean [+ 1 2]])
(assert-equal
(_scm.force-boolean [let X 1 [number? X]])
[let X 1 [number? X]])
(assert-equal
(_scm.force-boolean [let X 1 [+ X X]])
[_scm.assert-boolean [let X 1 [+ X X]]])
(assert-equal
(_scm.force-boolean [and true false])
[and true false])
(assert-equal
(_scm.prefix-op test)
(intern "kl:test"))
\\ compile-expression
(assert-equal
(_scm.kl->scheme [])
[quote []])
(assert-equal
(_scm.kl->scheme true)
true)
(assert-equal
(_scm.kl->scheme false)
false)
(assert-equal
(_scm.kl->scheme {)
[quote {])
(assert-equal
(_scm.kl->scheme })
[quote }])
(assert-equal
(_scm.kl->scheme ;)
[quote ;])
(assert-equal
(_scm.kl->scheme ,)
[quote ,])
(assert-equal
(_scm.kl->scheme some-symbol)
[quote some-symbol])
(assert-equal
(_scm.kl->scheme [let A 1 [+ A A]])
[let [[A 1]] [+ A A]])
(assert-equal
(_scm.kl->scheme [lambda X [= X 1]])
[lambda [X] [eqv? X 1]])
(assert-equal
(_scm.compile-expression [and [some-func X] [= 1 2]] [X])
[and [(_scm.prefix-op _scm.assert-boolean) [(_scm.prefix-op some-func) X]] [eqv? 1 2]])
(assert-equal
(_scm.compile-expression [or [some-func X] [= 1 2]] [X])
[or [(_scm.prefix-op _scm.assert-boolean) [(_scm.prefix-op some-func) X]] [eqv? 1 2]])
(assert-equal
(_scm.kl->scheme [trap-error [+ 1 2] [lambda E 0]])
[guard [E [else 0]] [+ 1 2]])
(assert-equal
(_scm.kl->scheme [do 1 2])
[begin 1 2])
(assert-equal
(_scm.kl->scheme [freeze [print "hello"]])
[lambda [] [(_scm.prefix-op print) "hello"]])
(assert-equal
(_scm.kl->scheme [fail])
[(_scm.prefix-op fail)])
(assert-equal
(_scm.kl->scheme [blah 1 2])
[(_scm.prefix-op blah) 1 2])
(assert-equal
(_scm.kl->scheme 1)
1)
(assert-equal
(_scm.kl->scheme "string")
"string")
(assert-equal
(_scm.kl->scheme [defun some-name [A B C] [cons symbol [+ A B]]])
[define [(_scm.prefix-op some-name) A B C] [cons [quote symbol] [+ A B]]])
(assert-equal
(_scm.compile-expression [F 1 2 3] [F])
[[[F 1] 2] 3])
(define takes-0-args -> 0)
(assert-equal
(_scm.kl->scheme [takes-0-args])
[(_scm.prefix-op takes-0-args)])
(assert-equal
(_scm.kl->scheme [takes-?-args])
[(_scm.prefix-op takes-?-args)])
(assert-equal
(_scm.kl->scheme [takes-?-args 1 2 3])
[(_scm.prefix-op takes-?-args) 1 2 3])
(set _scm.*compiling-shen-sources* true)
(define default D E -> D)
(assert-equal
(_scm.kl->scheme [trap-error [value varname] [lambda E default]])
(_scm.kl->scheme [scm.value/or varname [freeze default]]))
(assert-equal
(_scm.kl->scheme [trap-error [<-address Var [+ 10 10]] [lambda E default]])
(_scm.kl->scheme [scm.<-address/or Var [+ 10 10] [freeze default]]))
(assert-equal
(_scm.kl->scheme [trap-error [<-vector Var [+ 10 10]] [lambda E default]])
(_scm.kl->scheme [scm.<-vector/or Var [+ 10 10] [freeze default]]))
(assert-equal
(_scm.kl->scheme [trap-error [get Var prop Dict] [lambda E default]])
(_scm.kl->scheme [scm.get/or Var prop Dict [freeze default]]))
(assert-equal
(_scm.kl->scheme [scm. "(+ 1 2)"])
[+ 1 2])
(assert-equal
(_scm.kl->scheme [scm. "symbol"])
symbol)
(assert-equal
(_scm.kl->scheme [scm. "(lambda () 1)"])
[lambda [] 1])
(assert-equal
(_scm.kl->scheme [scm.letrec [[X 1] [Y 2]] [+ X Y]])
[letrec [[X 1] [Y 2]] [+ X Y]])
| Shen | 4 | tizoc/chibi-shen | tests/compiler-tests.shen | [
"BSD-3-Clause"
] |
-- Copyright (c) 2010 The Chromium Authors. All rights reserved.
-- Use of this source code is governed by a BSD-style license that can be
-- found in the LICENSE file.
tell application "Chromium"
set var to bookmark folder "New" of bookmarks bar
-- Change the folder to whichever you want.
repeat with i in (bookmark items of var)
set u to URL of i
tell window 1 to make new tab with properties {u}
end repeat
end tell
| AppleScript | 4 | zealoussnow/chromium | chrome/browser/ui/cocoa/applescript/examples/open_tabs_from_bookmark_folder.applescript | [
"BSD-3-Clause-No-Nuclear-License-2014",
"BSD-3-Clause"
] |
/// <reference path='fourslash.ts' />
// @Filename: /main.ts
////// leading trivia
////import { a } from "./a";
////import { b } from "./b";
////import { c } from "./c";
// @Filename: /a.ts
////export const a = null;
// @Filename: /b.ts
////export const b = null;
// @Filename: /c.ts
////export const c = null;
verify.codeFix({
index: 0,
description: "Remove import from './a'",
newFileContent:
`// leading trivia
import { b } from "./b";
import { c } from "./c";`,
});
verify.codeFix({
index: 1,
description: "Remove import from './b'",
newFileContent:
`// leading trivia
import { a } from "./a";
import { c } from "./c";`,
});
verify.codeFix({
index: 2,
description: "Remove import from './c'",
newFileContent:
`// leading trivia
import { a } from "./a";
import { b } from "./b";
`,
});
| TypeScript | 4 | monciego/TypeScript | tests/cases/fourslash/unusedImportDeclaration_withEmptyPath5.ts | [
"Apache-2.0"
] |
(import os)
(setv repl-spy True
repl-output-fn (fn [x]
(.replace (repr x) " " "_")))
(defmacro hello-world []
`(+ 1 1))
| Hy | 4 | lafrenierejm/hy | tests/resources/hystartup.hy | [
"MIT"
] |
trait Foo {
pub type Foo;
//~^ ERROR unnecessary visibility qualifier
}
fn main() {}
| Rust | 3 | Eric-Arellano/rust | src/test/ui/parser/trait-pub-assoc-ty.rs | [
"ECL-2.0",
"Apache-2.0",
"MIT-0",
"MIT"
] |
import { expect } from 'chai';
import { adapterToUse } from './test-utils';
import { findClosestEnabledDate } from './date-utils';
describe('findClosestEnabledDate', () => {
const day18thText = adapterToUse.format(
adapterToUse.date('2018-08-18T00:00:00.000'),
'dayOfMonth',
);
const only18th = (date: any) => adapterToUse.format(date, 'dayOfMonth') !== day18thText;
it('should fallback to today if all dates are disabled', () => {
const result = findClosestEnabledDate({
date: adapterToUse.date('2000-01-01T00:00:00.000'),
minDate: adapterToUse.date('1999-01-01T00:00:00.000'), // Use close-by min/max dates to reduce the test runtime.
maxDate: adapterToUse.date('2001-01-01T00:00:00.000'),
utils: adapterToUse,
shouldDisableDate: () => true,
disableFuture: false,
disablePast: false,
});
expect(result).toEqualDateTime(adapterToUse.startOfDay(adapterToUse.date()));
});
it('should return given date if it is enabled', () => {
const result = findClosestEnabledDate({
date: adapterToUse.date('2000-01-01T00:00:00.000'),
minDate: adapterToUse.date('1900-01-01T00:00:00.000'),
maxDate: adapterToUse.date('2100-01-01T00:00:00.000'),
utils: adapterToUse,
shouldDisableDate: () => false,
disableFuture: false,
disablePast: false,
})!;
expect(adapterToUse.isSameDay(result, adapterToUse.date('2000-01-01T00:00:00.000'))).to.equal(
true,
);
});
it('should return next 18th going from 10th', () => {
const result = findClosestEnabledDate({
date: adapterToUse.date('2018-08-10T00:00:00.000'),
minDate: adapterToUse.date('1900-01-01T00:00:00.000'),
maxDate: adapterToUse.date('2100-01-01T00:00:00.000'),
utils: adapterToUse,
shouldDisableDate: only18th,
disableFuture: false,
disablePast: false,
})!;
expect(adapterToUse.isSameDay(result, adapterToUse.date('2018-08-18T00:00:00.000'))).to.equal(
true,
);
});
it('should return previous 18th going from 1st', () => {
const result = findClosestEnabledDate({
date: adapterToUse.date('2018-08-01T00:00:00.000'),
minDate: adapterToUse.date('1900-01-01T00:00:00.000'),
maxDate: adapterToUse.date('2100-01-01T00:00:00.000'),
utils: adapterToUse,
shouldDisableDate: only18th,
disableFuture: false,
disablePast: false,
})!;
expect(adapterToUse.isSameDay(result, adapterToUse.date('2018-07-18T00:00:00.000'))).to.equal(
true,
);
});
it('should return future 18th if disablePast', () => {
const today = adapterToUse.startOfDay(adapterToUse.date());
const result = findClosestEnabledDate({
date: adapterToUse.date('2000-01-01T00:00:00.000'),
minDate: adapterToUse.date('1900-01-01T00:00:00.000'),
maxDate: adapterToUse.date('2100-01-01T00:00:00.000'),
utils: adapterToUse,
shouldDisableDate: only18th,
disableFuture: false,
disablePast: true,
})!;
expect(adapterToUse.isBefore(result, today)).to.equal(false);
expect(adapterToUse.isBefore(result, adapterToUse.addDays(today, 31))).to.equal(true);
});
it('should return now if disablePast+disableFuture and now is valid', () => {
const today = adapterToUse.startOfDay(adapterToUse.date());
const result = findClosestEnabledDate({
date: adapterToUse.date('2000-01-01T00:00:00.000'),
minDate: adapterToUse.date('1900-01-01T00:00:00.000'),
maxDate: adapterToUse.date('2100-01-01T00:00:00.000'),
utils: adapterToUse,
shouldDisableDate: () => false,
disableFuture: true,
disablePast: true,
})!;
expect(adapterToUse.isSameDay(result, today)).to.equal(true);
});
it('should fallback to today if disablePast+disableFuture and now is invalid', () => {
const today = adapterToUse.date();
const result = findClosestEnabledDate({
date: adapterToUse.date('2000-01-01T00:00:00.000'),
minDate: adapterToUse.date('1900-01-01T00:00:00.000'),
maxDate: adapterToUse.date('2100-01-01T00:00:00.000'),
utils: adapterToUse,
shouldDisableDate: (date) => adapterToUse.isSameDay(date, today),
disableFuture: true,
disablePast: true,
});
expect(adapterToUse.isEqual(result, adapterToUse.date()));
});
it('should return minDate if it is after the date and valid', () => {
const result = findClosestEnabledDate({
date: adapterToUse.date('2000-01-01T00:00:00.000'),
minDate: adapterToUse.date('2018-08-18T00:00:00.000'),
maxDate: adapterToUse.date('2100-01-01T00:00:00.000'),
utils: adapterToUse,
shouldDisableDate: only18th,
disableFuture: false,
disablePast: false,
})!;
expect(adapterToUse.isSameDay(result, adapterToUse.date('2018-08-18T00:00:00.000'))).to.equal(
true,
);
});
it('should return next 18th after minDate', () => {
const result = findClosestEnabledDate({
date: adapterToUse.date('2000-01-01T00:00:00.000'),
minDate: adapterToUse.date('2018-08-01T00:00:00.000'),
maxDate: adapterToUse.date('2100-01-01T00:00:00.000'),
utils: adapterToUse,
shouldDisableDate: only18th,
disableFuture: false,
disablePast: false,
})!;
expect(adapterToUse.isSameDay(result, adapterToUse.date('2018-08-18T00:00:00.000'))).to.equal(
true,
);
});
it('should return maxDate if it is before the date and valid', () => {
const result = findClosestEnabledDate({
date: adapterToUse.date('2050-01-01T00:00:00.000'),
minDate: adapterToUse.date('1900-01-01T00:00:00.000'),
maxDate: adapterToUse.date('2018-07-18T00:00:00.000'),
utils: adapterToUse,
shouldDisableDate: only18th,
disableFuture: false,
disablePast: false,
})!;
expect(adapterToUse.isSameDay(result, adapterToUse.date('2018-07-18T00:00:00.000'))).to.equal(
true,
);
});
it('should return previous 18th before maxDate', () => {
const result = findClosestEnabledDate({
date: adapterToUse.date('2050-01-01T00:00:00.000'),
minDate: adapterToUse.date('1900-01-01T00:00:00.000'),
maxDate: adapterToUse.date('2018-08-17T00:00:00.000'),
utils: adapterToUse,
shouldDisableDate: only18th,
disableFuture: false,
disablePast: false,
})!;
expect(adapterToUse.isSameDay(result, adapterToUse.date('2018-07-18T00:00:00.000'))).to.equal(
true,
);
});
it('should fallback to today if minDate is after maxDate', () => {
const result = findClosestEnabledDate({
date: adapterToUse.date('2000-01-01T00:00:00.000'),
minDate: adapterToUse.date('2000-01-01T00:00:00.000'),
maxDate: adapterToUse.date('1999-01-01T00:00:00.000'),
utils: adapterToUse,
shouldDisableDate: () => false,
disableFuture: false,
disablePast: false,
})!;
expect(result).toEqualDateTime(adapterToUse.startOfDay(adapterToUse.date()));
});
});
| TypeScript | 4 | dany-freeman/material-ui | packages/mui-lab/src/internal/pickers/date-utils.test.ts | [
"MIT"
] |
<body>
<canvas width="570" height="570" id="myCanvas"></canvas>
<script src="cube.js">
</script>
</body> | HTML | 2 | zakuro9715/v | examples/js_dom_cube/index.html | [
"MIT"
] |
@0xd30600b3651feef7;
using Cxx = import "/capnp/c++.capnp";
$Cxx.namespace("test::proto");
struct Message {
text @0 :Text;
}
| Cap'n Proto | 2 | Arthapz/xmake | tests/projects/c++/capnproto/proto/message.capnp | [
"Apache-2.0"
] |
_ = require "underscore"
React = require "react"
ReactDOM = require 'react-dom'
ReactTestUtils = require 'react-addons-test-utils'
Fields = require('../lib/fields').default
CollapsedParticipants = require('../lib/collapsed-participants').default
{Contact} = require 'nylas-exports'
describe "CollapsedParticipants", ->
makeField = (props={}) ->
@fields = ReactTestUtils.renderIntoDocument(
<CollapsedParticipants {...props} />
)
numStr = ->
ReactDOM.findDOMNode(ReactTestUtils.findRenderedDOMComponentWithClass(@fields, "num-remaining")).innerHTML
it "doesn't render num remaining when nothing remains", ->
makeField.call(@)
els = ReactTestUtils.scryRenderedDOMComponentsWithClass(@fields, "num-remaining")
expect(els.length).toBe 0
it "renders num remaining when remaining with no bcc", ->
makeField.call(@)
spyOn(@fields, "_setNumHiddenParticipants")
@fields.setState numRemaining: 10, numBccRemaining: 0
str = numStr.call(@)
expect(str).toBe "10 more"
it "renders num remaining when only bcc", ->
makeField.call(@)
spyOn(@fields, "_setNumHiddenParticipants")
@fields.setState numRemaining: 0, numBccRemaining: 5
str = numStr.call(@)
expect(str).toBe "5 Bcc"
it "renders num remaining when both remaining andj bcc", ->
makeField.call(@)
spyOn(@fields, "_setNumHiddenParticipants")
@fields.setState numRemaining: 10, numBccRemaining: 5
str = numStr.call(@)
expect(str).toBe "15 more (5 Bcc)"
| CoffeeScript | 4 | cnheider/nylas-mail | packages/client-app/internal_packages/composer/spec/collapsed-participants-spec.cjsx | [
"MIT"
] |
(defmacro zzz (g)
`(lambda(s/c) (lambda() (funcall ,g s/c))))
(defmacro disj+
((cons g '()) `(zzz ,g))
((cons g gs) `(: mkr disj (zzz ,g) (disj+ ,@gs))))
(defmacro conj+
((cons g '()) `(zzz ,g))
((cons g gs) `(: mkr conj (zzz ,g) (conj+ ,@gs))))
(defmacro fresh
(e (cond
((== '() (car e))
`(conj+ ,@(cdr e)))
(else
`(: mkr call/fresh (lambda (,(car (car e)))
(fresh ,(cdr (car e)) ,@(cdr e))))))))
(defmacro conde
(goals
(let ((conjd-goals
(: lists map
(lambda(conde-line)
(if (== 'else (car conde-line))
`(conj+ ,@(cdr conde-line))
`(conj+ ,@conde-line))) goals)))
`(disj+ ,@conjd-goals))))
(defmacro run
((cons n goals)
`(: mkr-user mK-reify
(: mkr-user take ,n
(: mkr-user call/empty-state
(fresh ,@goals))))))
(defmacro run*
(goals
`(: mkr-user mK-reify
(: mkr-user take-all
(: mkr-user call/empty-state
(fresh ,@goals))))))
(defmacro = (a b)
`(: mkr = ,a ,b))
| LFE | 4 | pzel/mkr | include/mkr-user.lfe | [
"MIT"
] |
package ucl
import (
"fmt"
"strconv"
"strings"
)
type parserError struct {
machine string
offset int
state int
}
func (e parserError) Error() string {
return fmt.Sprintf("error parsing %s at char %d", e.machine, e.offset)
}
%%{
machine common;
alphtype rune;
action error {
return nil, -1, fmt.Errorf("parse error at byte %d (state=%d)", fpc, cs)
}
action done { fhold; fbreak; }
ws = [ \t\r\n];
unescaped = (0x20..0x21 | 0x23..0x5B | 0x5D..0x10FFFF);
char = (unescaped | "\\" . ([\"\\/bfnrt] | "u" . [0-9a-fA-F]{4}));
string = ("\"" . char** . "\"");
}%%
//go:generate sh -c "ragel -Z -S number -V -p ucl.rl | dot -Tpng > number.png"
%%{
machine number;
include common;
action end_number {
if strings.IndexAny(string(data[start:fpc]), ".eE") >= 0 {
v, err := strconv.ParseFloat(string(data[start:fpc]), 64)
if err != nil {
return nil, -1, err
}
ret = &Number{Value: v}
} else {
v, err := strconv.ParseInt(string(data[start:fpc]), 10, 64)
if err != nil {
return nil, -1, err
}
ret = &Integer{Value: v}
}
}
int = "0" | ([1-9] . [0-9]*);
main := "-"? . int . ("." . [0-9]+)? . ([eE] . [\+\-]? . [0-9]+)? (^[0-9eE\-\+.] @end_number @done);
write data;
}%%
func parse_number(data []rune, p int, pe int) (Value, int, error) {
var (
cs int
eof = pe
ret Value
start = p
)
_ = eof
%% write init;
%% write exec;
if cs >= number_first_final {
return ret, p, nil
}
return nil, -1, parserError{machine: "number", offset: p, state: cs}
}
//go:generate sh -c "ragel -Z -S object -V -p ucl.rl | dot -Tpng > object.png"
%%{
machine object;
include common;
action parse_value {
v, newp, err := parse_value(data, fpc, pe);
if err != nil { return nil, -1, err };
ret.Value[key] = v;
fexec newp;
}
action start_tok {
start = fpc
}
action end_key {
s, err := jsonUnescape(string(data[start+1:fpc]))
if err != nil {
return nil, -1, err
}
key = Key{Value: s, Index: index}
index++
}
key = string >start_tok @end_key;
member = (key . ws* . ":" . ws* . (^ws >parse_value));
object_content = (member . (ws* . "," . ws* . member)*);
main := (ws* . "{" . ws* . object_content? . ws* . ("}" %*done));
write data;
}%%
func parse_object(data []rune, p int, pe int) (Value, int, error) {
var (
cs int
eof = pe
ret = &Object{Value: map[Key]Value{}}
key Key
start int
index int
)
_ = eof
%% write init;
%% write exec;
if cs >= object_first_final {
return ret, p, nil
}
return nil, -1, parserError{machine: "object", offset: p, state: cs}
}
//go:generate sh -c "ragel -Z -S array -V -p ucl.rl | dot -Tpng > array.png"
%%{
machine array;
include common;
action parse_value {
v, newp, err := parse_value(data, fpc, pe);
if err != nil { return nil, -1, err };
ret.Value = append(ret.Value, v)
fexec newp;
}
value = ^(ws | "]") >parse_value;
array_content = (value . (ws* . "," . ws* . value)*);
main := (ws* . "[" . ws* . array_content? . ws* . ("]" %*done));
write data;
}%%
func parse_array(data []rune, p int, pe int) (Value, int, error) {
var (
cs int
eof = pe
ret = &Array{}
)
_ = eof
%% write init;
%% write exec;
if cs >= array_first_final {
return ret, p, nil
}
return nil, -1, parserError{machine: "array", offset: p, state: cs}
}
//go:generate sh -c "ragel -Z -S value -V -p ucl.rl | dot -Tpng > value.png"
%%{
machine value;
include common;
action parse_object {
v, newp, err := parse_object(data, fpc, pe);
if err != nil { return nil, -1, err };
ret = v;
fexec newp;
}
action parse_array {
v, newp, err := parse_array(data, fpc, pe);
if err != nil { return nil, -1, err };
ret = v;
fexec newp;
}
action parse_number {
v, newp, err := parse_number(data, fpc, pe)
if err != nil { return nil, -1, err };
ret = v;
fexec newp;
}
action start_tok {
start = fpc
}
action end_string {
s, err := jsonUnescape(string(data[start+1:fpc]))
if err != nil {
return nil, -1, err
}
ret = &String{Value: s}
}
false = "false" @{ret = &Bool{Value: false}};
true = "true" @{ret = &Bool{Value: true}};
nullval = "null" @{ret = &Null{}};
array = ws* . ("[" >parse_array);
object = ws* . ("{" >parse_object);
number = [\-0-9] >parse_number;
main := (false | true | nullval | object | array | number | (string >start_tok @end_string)) %*done $!error;
write data;
}%%
func parse_value(data []rune, p int, pe int) (Value, int, error) {
var (
cs int
eof = pe
ret Value
start int
)
%% write init;
%% write exec;
if cs >= value_first_final {
return ret, p, nil
}
return nil, -1, parserError{machine: "value", offset: p, state: cs}
}
//go:generate sh -c "ragel -Z -S document -V -p ucl.rl | dot -Tpng > document.png"
%%{
machine document;
include common;
action parse_object {
v, newp, err := parse_object(data, fpc, pe);
if err != nil { return nil, -1, err };
ret = v;
fexec newp;
}
action parse_array {
v, newp, err := parse_array(data, fpc, pe);
if err != nil { return nil, -1, err };
ret = v;
fexec newp;
}
array = "[" >parse_array;
object = "{" >parse_object;
document = ws* . (object | array) . ws*;
main := document $!error;
write data;
}%%
func parse_json(data []rune) (Value, int, error) {
var (
cs int
p int
pe int = len(data)
eof int = len(data)
)
var ret Value
%% write init;
%% write exec;
return ret, -1, nil
}
| Ragel in Ruby Host | 5 | kumy/rexray | vendor/github.com/cesanta/ucl/ucl.rl | [
"Apache-2.0"
] |
(defn prime? [n]
(not-any? zero? (map #(rem n %) (range 2 n))))
(range 3 33 2)
'(3 5 7 9 11 13 15 17 19 21 23 25 27 29 31)
;; :when continues through the collection even if some have the
;; condition evaluate to false, like filter
(for [x (range 3 33 2) :when (prime? x)]
x)
'(3 5 7 11 13 17 19 23 29 31)
;; :while stops at the first collection element that evaluates to
;; false, like take-while
(for [x (range 3 33 2) :while (prime? x)]
x)
'(3 5 7)
| Clojure | 4 | JavascriptID/sourcerer-app | src/test/resources/samples/langs/Clojure/for.clj | [
"MIT"
] |
package com.alibaba.json.bvt.parser.stream;
import java.util.LinkedHashMap;
import junit.framework.TestCase;
import org.junit.Assert;
import com.alibaba.fastjson.parser.DefaultJSONParser;
import com.alibaba.fastjson.parser.JSONReaderScanner;
public class JSONReaderScannerTest_type extends TestCase {
@SuppressWarnings("rawtypes")
public void test_true() throws Exception {
DefaultJSONParser parser = new DefaultJSONParser(new JSONReaderScanner("{\"@type\":\"java.util.LinkedHashMap\",\"name\":\"张三\"}"));
LinkedHashMap json = (LinkedHashMap) parser.parse();
Assert.assertEquals("张三", json.get("name"));
parser.close();
}
}
| Java | 4 | Czarek93/fastjson | src/test/java/com/alibaba/json/bvt/parser/stream/JSONReaderScannerTest_type.java | [
"Apache-2.0"
] |
/*
Alloy model to confirm the logic behind merging IAM Statements.
This proves that merging two statements based on the following conditions:
- Effects are the same
- NotAction, NotResource, NotPrincipal are the same(*)
- Of Action, Resource, Principal sets, 2 out of 3 are the same(*)
Is sound, as the model doesn't find any examples of where the meaning
of statements is changed by merging.
Find Alloy at https://alloytools.org/.
(*) Some of these sets may be empty--that is fine, the logic still works out.
*/
//-------------------------------------------------------
// Base Statement definitions
enum Effect { Allow, Deny }
enum Resource { ResourceA, ResourceB }
enum Action { ActionA, ActionB }
enum Principal { PrincipalA, PrincipalB }
sig Statement {
effect: Effect,
principal: set Principal,
notPrincipal: set Principal,
action: set Action,
notAction: set Action,
resource: set Resource,
notResource: set Resource,
} {
// Exactly one of Xxx and notXxx is non-empty
(some principal) iff not (some notPrincipal)
(some action) iff not (some notAction)
(some resource) iff not (some notResource)
}
// So that we can compare Statements using =, if two Statements have
// exactly the same properties then they are the same Statement
fact {
all a, b: Statement {
(
a.effect = b.effect and
a.principal = b.principal and
a.notPrincipal = b.notPrincipal and
a.action = b.action and
a.notAction = b.notAction and
a.resource = b.resource and
a.notResource = b.notResource) implies a = b
}
}
//-------------------------------------------------------
// Requests and evaluations
sig Request {
principal: Principal,
action: Action,
resource: Resource,
}
// Whether the statement applies to the given request
pred applies[s: Statement, req: Request] {
some s.principal implies req.principal in s.principal
some s.notPrincipal implies req.principal not in s.notPrincipal
some s.action implies req.action in s.action
some s.notAction implies req.action not in s.notAction
some s.resource implies req.resource in s.resource
some s.notResource implies req.resource not in s.notResource
}
// Whether or not to allow the given request according to the given statements
//
// A request is allowed if there's at least one statement allowing it and
// no statements denying it.
pred allow[req: Request, ss: some Statement] {
some s: ss | applies[s, req] and s.effect = Allow
no s: ss | applies[s, req] and s.effect = Deny
}
run show_some_allowed_requests {
some ss: set Statement, r: Request | allow[r, ss] and /* no useless Statements floating around */ (no s" : Statement | s" not in ss)
} for 3 but 1 Request
//-------------------------------------------------------
// Statement merging
// Assert that m is the merged version of a and b
//
// This encodes the important logic: the rules of merging.
pred merged[a: Statement, b: Statement, m: Statement] {
// Preconditions
a.effect = b.effect
a.notAction = b.notAction
a.notResource = b.notResource
a.notPrincipal = b.notPrincipal
// Merging is allowed in one of 2 cases:
// - of the pairs { Resource, Action, Principal } 2 are the same (then the 3rd pair may be merged)
// - if one statement is a full subset of the other one (then it may be subsumed) [not implemented yet]
let R = a.resource = b.resource, A = a.action = b.action, P = a.principal = b.principal {
((R and A) or (R and P) or (A and P) or
(a.resource in b.resource and a.action in b.action and a.principal in b.principal) or
(b.resource in a.resource and b.action in a.action and b.principal in a.principal))
}
// Result of merging
m.effect = a.effect
m.action = a.action + b.action
m.notAction = a.notAction
m.resource = a.resource + b.resource
m.notResource = a.notResource
m.principal = a.principal + b.principal
m.notPrincipal = a.notPrincipal
}
run show_some_nontrivial_merges {
some disj s0, s1, M: Statement | merged[s0, s1, M] and s0.action != s1.action
}
// For any pair of statements, there is only one possible merging
check merging_is_unique {
all s0, s1: Statement {
no disj m0, m1 : Statement | merged[s0, s1, m0] and merged[s0, s1, m1]
}
} for 5
// For all statements, the evaluation of the individual statements is the same as the evaluation
// of the merged statement.
check merging_does_not_change_evaluation {
all a: Statement, b: Statement, m: Statement, r: Request {
merged[a, b, m] implies (allow[r, a + b] iff allow[r, m])
}
} for 3
// There are no 3 statements such that merged(merged(s0, s1), s2) != merged(s0, merged(s1, s2))
check merging_is_associative {
no s0, s1, s2, h0, h1, m0, m1: Statement {
merged[s0, s1, h0] and merged[h0, s2, m0]
merged[s1, s2, h1] and merged[h1, s0, m1]
m0 != m1
}
} for 10
// For all statements, merged(s0, s1) = merged(s1, s0)
check merging_is_commutative {
all s0, s1, m: Statement {
merged[s0, s1, m] implies merged[s1, s0, m]
}
} for 5
//-------------------------------------------------------
// Repeated application of merging
// Whether a and b are mergeable
pred mergeable[a: Statement, b: Statement] {
some m: Statement | m != a and m != b and merged[a, b, m]
}
// Maximally merged items in a set
pred maxMerged(input: set Statement, output: set Statement) {
no disj a, b: output | mergeable[a, b]
input = output or {
#input > #output
some a, b: input | some m: Statement {
m != a
m != b
merged[a, b, m]
maxMerged[input - a - b + m, output]
}
}
}
run some_interesting_maxMerged_statements {
some input, output: set Statement {
maxMerged[input, output]
#input = 3
#output = 1
all x: output | x not in input
}
} for 5
check max_merging_does_not_change_eval {
all input, output: set Statement, r: Request {
maxMerged[input, output] implies (allow[r, input] iff allow[r, output])
}
} for 5
// This used to be written the opposite way. But you know: merging is NOT unique.
// Counterexample found by Alloy:
// {{ A, B, A }, {B, B, A} { A, B, B }}
// Reduces to either:
// {{ AB, B, A }, { A, B, B }}
// or {{ A, B, AB }, { B, B, A }}
run max_merging_is_not_unique {
some input, m0, m1: set Statement {
maxMerged[input, m0] and maxMerged[input, m1] and m0 != m1
}
} for 5
| Alloy | 5 | danwiltshire/aws-cdk | packages/@aws-cdk/aws-iam/docs/policy-merging.als | [
"Apache-2.0"
] |
/// <reference path="fourslash.ts" />
// @module: es2015
// @esModuleInterop: true
// @jsx: react
// @Filename: /types.d.ts
//// declare module "react" { var React: any; export = React; export as namespace React; }
// @Filename: /a.tsx
//// import type React from "react";
//// function Component() {}
//// (<Component/**/ />)
goTo.marker("");
verify.importFixAtPosition([
`import React from "react";
function Component() {}
(<Component />)`]); | TypeScript | 4 | monciego/TypeScript | tests/cases/fourslash/importNameCodeFix_importType6.ts | [
"Apache-2.0"
] |
This is ,,subscripted,, text. | Creole | 4 | jquorning/ada-wiki | regtests/files/wiki/subscripted.creole | [
"Apache-2.0"
] |
#*****************************************************************************
# *
# Make file for VMS *
# Author : J.Jansen ([email protected]) *
# Date : 6 October 2009 *
# *
#*****************************************************************************
.first
define wx [--.include.wx]
.ifdef __WXMOTIF__
CXX_DEFINE = /define=(__WXMOTIF__=1)/name=(as_is,short)\
/assume=(nostdnew,noglobal_array_new)/incl=([],[-])
.else
.ifdef __WXGTK__
CXX_DEFINE = /define=(__WXGTK__=1)/float=ieee/name=(as_is,short)/ieee=denorm\
/assume=(nostdnew,noglobal_array_new)/incl=([],[-])
.else
.ifdef __WXGTK2__
CXX_DEFINE = /define=(__WXGTK__=1,VMS_GTK2=1)/float=ieee/name=(as_is,short)/ieee=denorm\
/assume=(nostdnew,noglobal_array_new)/incl=([],[-])
.else
.ifdef __WXX11__
CXX_DEFINE = /define=(__WXX11__=1,__WXUNIVERSAL__==1)/float=ieee\
/name=(as_is,short)/assume=(nostdnew,noglobal_array_new)/incl=([],[-])
.else
CXX_DEFINE =
.endif
.endif
.endif
.endif
.suffixes : .cpp
.cpp.obj :
cxx $(CXXFLAGS)$(CXX_DEFINE) $(MMS$TARGET_NAME).cpp
all :
.ifdef __WXMOTIF__
$(MMS)$(MMSQUALIFIERS) console.exe
.else
.ifdef __WXGTK__
$(MMS)$(MMSQUALIFIERS) console_gtk.exe
.else
.ifdef __WXGTK2__
$(MMS)$(MMSQUALIFIERS) console_gtk2.exe
.else
.ifdef __WXX11__
$(MMS)$(MMSQUALIFIERS) console_x11.exe
.endif
.endif
.endif
.endif
OBJS=console.obj
.ifdef __WXMOTIF__
console.exe : $(OBJS)
cxxlink $(OBJS),[--.lib]vms/opt
.else
.ifdef __WXGTK__
console_gtk.exe : $(OBJS)
cxxlink/exec=console_gtk.exe $(OBJS),[--.lib]vms_gtk/opt
.else
.ifdef __WXGTK2__
console_gtk2.exe : $(OBJS)
cxxlink/exec=console_gtk2.exe $(OBJS),[--.lib]vms_gtk2/opt
.else
.ifdef __WXX11__
console_x11.exe : $(OBJS)
cxxlink/exec=console_x11.exe $(OBJS),[--.lib]vms_x11_univ/opt
.endif
.endif
.endif
.endif
console.obj : console.cpp
cxx $(CXXFLAGS)$(CXX_DEFINE)/nowarn console.cpp
| Module Management System | 3 | madanagopaltcomcast/pxCore | examples/pxScene2d/external/WinSparkle/3rdparty/wxWidgets/samples/console/descrip.mms | [
"Apache-2.0"
] |
(* ****** ****** *)
(*
** HX-2018-01:
** Hangman:
** a word-guessing game
*)
(* ****** ****** *)
//
abst@ype state
abst@ype input
//
(* ****** ****** *)
datatype
status =
| STATUSsolved of ()
| STATUStimeup of ()
| STATUSasking of ()
(* ****** ****** *)
//
extern
fun
state_check
(&state): status
extern
fun
state_update
(&state >> _, input): int
extern
fun
state_initize
( state: &state? >> _
, ntime: int, word0: string): int
(* ****** ****** *)
//
extern
fun
GameLoop
(&state >> _, stream_vt(input)): int
and
GameLoop_solved
(&state >> _, stream_vt(input)): int
and
GameLoop_timeup
(&state >> _, stream_vt(input)): int
and
GameLoop_asking
(&state >> _, stream_vt(input)): int
//
(* ****** ****** *)
implement
GameLoop
(state, xs) = let
//
val
status = state_check(state)
//
in
case+ status of
| STATUSsolved() => GameLoop_solved(state, xs)
| STATUStimeup() => GameLoop_timeup(state, xs)
| STATUSasking() => GameLoop_asking(state, xs)
end // end of [GameLoop]
(* ****** ****** *)
#include
"share/atspre_staload.hats"
#include
"share/atspre_staload_libats_ML.hats"
(* ****** ****** *)
local
assume
state = @{
ntime= int
,
word0= string
,
guess= list0(char)
}
assume input = char
fun
is_guessed
( c0: char
, guess: list0(char)
) : bool =
(guess).exists()(lam(c1) => c0=c1)
fun
is_contained
( c0: char
, word0: string
) : bool =
(word0).exists()(lam(c1) => c0=c1)
fun
is_solved
( w0: string
, guess: list0(char)
) : bool =
(w0).forall()
(lam(c0) => is_guessed(c0, guess))
fun
word_display
( word0: string
, guess: list0(char)
) : void =
(
(word0).foreach()
(lam(c0) =>
print_char
(if is_guessed(c0, guess) then c0 else '_')
)
) (* end of [word_display] *)
in (* in-of-local *)
implement
state_check
(state) = let
//
val word0 = state.word0
val guess = state.guess
//
in
//
(
ifcase
| is_solved
(word0, guess) => STATUSsolved()
| state.ntime = 0 => STATUStimeup()
| _ (*otherwise*) => STATUSasking()
)
//
end // end of [state_check]
implement
state_update
(state, input) = let
//
val c0 = input
val nt = state.ntime
val w0 = state.word0
val cs = state.guess
//
in
//
ifcase
| is_guessed
(c0, cs) => (0)
| is_contained
(c0, w0) =>
(state.guess := list0_cons(c0, cs); 0)
| _ (* otherwise *) =>
(state.ntime := nt-1;
state.guess := list0_cons(c0, cs); 1)
//
end // end of [state_update]
implement
state_initize
( state
, ntime, word0) = (0) where
{
//
val () = (state.ntime := ntime)
val () = (state.word0 := word0)
val () = (state.guess := list0_nil())
//
} // end of [state_initize]
implement
GameLoop_solved
(state, xs) =
state.ntime where
{
val () = free(xs)
val () = println! ("You solved it: ", state.word0)
}
implement
GameLoop_timeup
(state, xs) =
state.ntime where
{
val () = free(xs)
val () = println! ("Sorry, you have no more chances.")
}
implement
GameLoop_asking
(state, xs) = let
//
val () =
println!
("Chances: ", state.ntime)
val () =
println!
("Guessed: ", state.guess)
val () =
word_display
(state.word0, state.guess)
//
val () = println!((*void*))
//
in
//
case+ !xs of
| ~stream_vt_nil() => (~1) where
{
val () =
println!
("ERROR: no input from the player!!!")
}
| ~stream_vt_cons(x0, xs) =>
let
val err =
state_update(state, x0) in GameLoop(state, xs)
end
//
end // end of [GameLoop_asking]
end // end of [local]
(* ****** ****** *)
implement
main0() = () where
{
//
val nt = 6
val w0 = "camouflage"
//
val () = println!("Start!")
//
var
state: state
val err =
state_initize(state, nt, w0)
//
val lines =
streamize_fileref_line(stdin_ref)
val chars = auxmain(lines) where
{
//
fun
auxmain
(
xs:
stream_vt(string)
) : stream_vt(char) = $ldelay
(
(
case+ !xs of
| ~stream_vt_nil() =>
stream_vt_nil()
| ~stream_vt_cons(x0, xs) => let
val x0 = g1ofg0(x0)
in
if
iseqz(x0)
then !(auxmain(xs))
else stream_vt_cons(x0[0], auxmain(xs))
end // end of [stream_vt_cons]
)
, (lazy_vt_free(xs))
)
}
//
val ntime =
GameLoop(state, chars) where { reassume input }
//
val ((*void*)) = println! ("Game Over: ", ntime)
//
} (* end of [main0] *)
(* ****** ****** *)
(* end of [Hangman.dats] *)
| ATS | 5 | ats-lang/ATS-CodeBook | RECIPE/Hangman/Hangman.dats | [
"MIT"
] |
a.svelte-xyz b c span.svelte-xyz{color:red;font-size:2em;font-family:'Comic Sans MS'}.foo.svelte-xyz.svelte-xyz{color:green} | CSS | 0 | Theo-Steiner/svelte | test/css/samples/preserve-specificity/expected.css | [
"MIT"
] |
import { stringifyRequest } from '../stringify-request'
export type ClientPagesLoaderOptions = {
absolutePagePath: string
page: string
isServerComponent?: boolean
}
// this parameter: https://www.typescriptlang.org/docs/handbook/functions.html#this-parameters
function nextClientPagesLoader(this: any) {
const pagesLoaderSpan = this.currentTraceSpan.traceChild(
'next-client-pages-loader'
)
return pagesLoaderSpan.traceFn(() => {
const { absolutePagePath, page, isServerComponent } =
this.getOptions() as ClientPagesLoaderOptions
pagesLoaderSpan.setAttribute('absolutePagePath', absolutePagePath)
const stringifiedPageRequest = isServerComponent
? JSON.stringify(absolutePagePath + '!')
: stringifyRequest(this, absolutePagePath)
const stringifiedPage = JSON.stringify(page)
return `
(window.__NEXT_P = window.__NEXT_P || []).push([
${stringifiedPage},
function () {
return require(${stringifiedPageRequest});
}
]);
if(module.hot) {
module.hot.dispose(function () {
window.__NEXT_P.push([${stringifiedPage}])
});
}
`
})
}
export default nextClientPagesLoader
| TypeScript | 4 | nazarepiedady/next.js | packages/next/build/webpack/loaders/next-client-pages-loader.ts | [
"MIT"
] |
#!/usr/bin/env bash
##
# @license Copyright 2021 The Lighthouse Authors. All Rights Reserved.
# Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0
# Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License.
##
# Prints to stdout text that, when it changes, indicates that the devtools tests
# should be run again.
SCRIPT_DIR="$( cd "$( dirname "${BASH_SOURCE[0]}" )" && pwd )"
LH_ROOT="$SCRIPT_DIR/../.."
cd "$LH_ROOT"
bash .github/scripts/print-devtools-relevant-commits.sh
md5 \
.github/workflows/devtools.yml \
build/build-bundle.js \
build/build-dt-report-resources.js \
clients/devtools-entry.js \
report/**/*.js \
lighthouse-core/test/chromium-web-tests/* \
third-party/chromium-webtests/webtests/http/tests/devtools/lighthouse/*.js
| Shell | 3 | zhangpeidong-peyton/lighthouse | .github/scripts/generate-devtools-hash.sh | [
"Apache-2.0"
] |
HEADERS += \
$$PWD/stream.h
SOURCES += \
$$PWD/stream.cpp
| QMake | 2 | jiadxin/QtScrcpy | QtScrcpy/device/stream/stream.pri | [
"Apache-2.0"
] |
#! /bin/sh /usr/share/dpatch/dpatch-run
## 001cassandra_yaml_dirs.dpatch by Tyler Hobbs <[email protected]>
##
## All lines beginning with `## DP:' are a description of the patch.
## DP: No description.
@DPATCH@
diff -urNad '--exclude=CVS' '--exclude=.svn' '--exclude=.git' '--exclude=.arch' '--exclude=.hg' '--exclude=_darcs' '--exclude=.bzr' cassandra~/conf/cassandra.yaml cassandra/conf/cassandra.yaml
--- cassandra~/conf/cassandra.yaml 2014-06-05 13:36:22.000000000 -0500
+++ cassandra/conf/cassandra.yaml 2014-06-05 13:39:20.569034040 -0500
@@ -94,13 +94,13 @@
# will spread data evenly across them, subject to the granularity of
# the configured compaction strategy.
# If not set, the default directory is $CASSANDRA_HOME/data/data.
-# data_file_directories:
-# - /var/lib/cassandra/data
+data_file_directories:
+ - /var/lib/cassandra/data
# commit log. when running on magnetic HDD, this should be a
# separate spindle than the data directories.
# If not set, the default directory is $CASSANDRA_HOME/data/commitlog.
-# commitlog_directory: /var/lib/cassandra/commitlog
+commitlog_directory: /var/lib/cassandra/commitlog
# policy for data disk failures:
# stop_paranoid: shut down gossip and Thrift even for single-sstable errors.
@@ -203,7 +203,7 @@
# saved caches
# If not set, the default directory is $CASSANDRA_HOME/data/saved_caches.
-# saved_caches_directory: /var/lib/cassandra/saved_caches
+saved_caches_directory: /var/lib/cassandra/saved_caches
# commitlog_sync may be either "periodic" or "batch."
# When in batch mode, Cassandra won't ack writes until the commit log
| Darcs Patch | 2 | mghosh4/cassandra | debian/patches/001cassandra_yaml_dirs.dpatch | [
"Apache-2.0"
] |
/*******************************************************************************
* This file is owned and controlled by Xilinx and must be used solely *
* for design, simulation, implementation and creation of design files *
* limited to Xilinx devices or technologies. Use with non-Xilinx *
* devices or technologies is expressly prohibited and immediately *
* terminates your license. *
* *
* XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS" SOLELY *
* FOR USE IN DEVELOPING PROGRAMS AND SOLUTIONS FOR XILINX DEVICES. BY *
* PROVIDING THIS DESIGN, CODE, OR INFORMATION AS ONE POSSIBLE *
* IMPLEMENTATION OF THIS FEATURE, APPLICATION OR STANDARD, XILINX IS *
* MAKING NO REPRESENTATION THAT THIS IMPLEMENTATION IS FREE FROM ANY *
* CLAIMS OF INFRINGEMENT, AND YOU ARE RESPONSIBLE FOR OBTAINING ANY *
* RIGHTS YOU MAY REQUIRE FOR YOUR IMPLEMENTATION. XILINX EXPRESSLY *
* DISCLAIMS ANY WARRANTY WHATSOEVER WITH RESPECT TO THE ADEQUACY OF THE *
* IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY WARRANTIES OR *
* REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM CLAIMS OF *
* INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A *
* PARTICULAR PURPOSE. *
* *
* Xilinx products are not intended for use in life support appliances, *
* devices, or systems. Use in such applications are expressly *
* prohibited. *
* *
* (c) Copyright 1995-2019 Xilinx, Inc. *
* All rights reserved. *
*******************************************************************************/
/*******************************************************************************
* Generated from core with identifier: xilinx.com:ip:mult_gen:11.2 *
* *
* Multiplication is a fundamental DSP operation. This core allows *
* parallel and constant-coefficient multipliers to be generated. The *
* user can specify if dedicated hardware multipliers, slice logic or a *
* combination of resources should be utilized. *
*******************************************************************************/
// Interfaces:
// a_intf
// clk_intf
// sclr_intf
// ce_intf
// b_intf
// zero_detect_intf
// p_intf
// pcasc_intf
// The following must be inserted into your Verilog file for this
// core to be instantiated. Change the instance name and port connections
// (in parentheses) to your own signal names.
//----------- Begin Cut here for INSTANTIATION Template ---// INST_TAG
mult your_instance_name (
.clk(clk), // input clk
.a(a), // input [15 : 0] a
.b(b), // input [15 : 0] b
.p(p) // output [31 : 0] p
);
// INST_TAG_END ------ End INSTANTIATION Template ---------
// You must compile the wrapper file mult.v when simulating
// the core, mult. When compiling the wrapper file, be sure to
// reference the XilinxCoreLib Verilog simulation library. For detailed
// instructions, please refer to the "CORE Generator Help".
| Verilog | 4 | jakeszler/chomp-verilog | ipcore_dir/mult.veo | [
"MIT"
] |
VERS_1.0 {
global:
*AcquireFlexDelegate*;
local:
*;
}; | Linker Script | 0 | EricRemmerswaal/tensorflow | tensorflow/lite/delegates/flex/version_script.lds | [
"Apache-2.0"
] |
package TbTL;
import TL::*;
interface Lamp;
method Bool changed;
method Action show_offs;
method Action show_ons;
method Action reset;
endinterface
module mkLamp#(String name, Bool lamp)(Lamp);
Reg#(Bool) prev <- mkReg(False);
method changed = (prev != lamp);
method Action show_offs;
if (prev && !lamp)
$write (name + " off, ");
endmethod
method Action show_ons;
if (!prev && lamp)
$write (name + " on, ");
endmethod
method Action reset;
prev <= lamp;
endmethod
endmodule
(* synthesize *)
module mkTest();
let dut <- sysTL;
Reg#(Bit#(16)) ctr <- mkReg(0);
Reg#(Bool) carN <- mkReg(False);
Reg#(Bool) carS <- mkReg(False);
Reg#(Bool) carE <- mkReg(False);
Reg#(Bool) carW <- mkReg(False);
Lamp lamps[12];
lamps[0] <- mkLamp("0: NS red ", dut.lampRedNS);
lamps[1] <- mkLamp("1: NS amber", dut.lampAmberNS);
lamps[2] <- mkLamp("2: NS green", dut.lampGreenNS);
lamps[3] <- mkLamp("3: E red ", dut.lampRedE);
lamps[4] <- mkLamp("4: E amber", dut.lampAmberE);
lamps[5] <- mkLamp("5: E green", dut.lampGreenE);
lamps[6] <- mkLamp("6: W red ", dut.lampRedW);
lamps[7] <- mkLamp("7: W amber", dut.lampAmberW);
lamps[8] <- mkLamp("8: W green", dut.lampGreenW);
lamps[9] <- mkLamp("9: Ped red ", dut.lampRedPed);
lamps[10] <- mkLamp("10: Ped amber", dut.lampAmberPed);
lamps[11] <- mkLamp("11: Ped green", dut.lampGreenPed);
rule start (ctr == 0);
$dumpvars;
endrule
rule detect_cars;
dut.set_car_state_N(carN);
dut.set_car_state_S(carS);
dut.set_car_state_E(carE);
dut.set_car_state_W(carW);
endrule
rule go;
ctr <= ctr + 1;
if (ctr == 5000) carN <= True;
if (ctr == 6500) carN <= False;
if (ctr == 12_000) dut.ped_button_push;
endrule
rule stop (ctr > 32768);
$display("TESTS FINISHED");
$finish(0);
endrule
function do_offs(l) = l.show_offs;
function do_ons(l) = l.show_ons;
function do_reset(l) = l.reset;
function do_it(f);
action
for (Integer i=0; i<12; i=i+1)
f(lamps[i]);
endaction
endfunction
function any_changes();
Bool b = False;
for (Integer i=0; i<12; i=i+1)
b = b || lamps[i].changed;
return b;
endfunction
rule show (any_changes());
do_it(do_offs);
do_it(do_ons);
do_it(do_reset);
$display("(at time %d)", $time);
endrule
endmodule
endpackage
| Bluespec | 5 | JavascriptID/sourcerer-app | src/test/resources/samples/langs/Bluespec/TbTL.bsv | [
"MIT"
] |
/*
[The "BSD licence"]
Copyright (c) 2013 Sam Harwell
All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions
are met:
1. Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in the
documentation and/or other materials provided with the distribution.
3. The name of the author may not be used to endorse or promote products
derived from this software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/* Changes made to the original C.g4:
- renamed to C11 to make C standard version explicit
(following n1570.pdf)
- split in separate CParser.g4 and CLexer.g4
- fixes various CPP rules in Lexer
- made use of literals in Parser consistent
Copyright (c) 2020 International Business Machines Corporation
Prepared by: Geert Janssen <[email protected]>
*/
/** C 2011 grammar built from the C11 Spec */
grammar C11;
import C11_lexer_common;
primaryExpression
: Identifier
| Constant
| StringLiteral+
| '(' expression ')'
| genericSelection
| '__extension__'? '(' compoundStatement ')' // Blocks (GCC extension)
| '__builtin_va_arg' '(' unaryExpression ',' typeName ')'
| '__builtin_offsetof' '(' typeName ',' unaryExpression ')'
;
genericSelection
: '_Generic' '(' assignmentExpression ',' genericAssocList ')'
;
genericAssocList
: genericAssociation
| genericAssocList ',' genericAssociation
;
genericAssociation
: typeName ':' assignmentExpression
| 'default' ':' assignmentExpression
;
postfixExpression
: primaryExpression
| postfixExpression '[' expression ']'
| postfixExpression '(' argumentExpressionList? ')'
| postfixExpression '.' Identifier
| postfixExpression '->' Identifier
| postfixExpression '++'
| postfixExpression '--'
| '(' typeName ')' '{' initializerList '}'
| '(' typeName ')' '{' initializerList ',' '}'
| '__extension__' '(' typeName ')' '{' initializerList '}'
| '__extension__' '(' typeName ')' '{' initializerList ',' '}'
;
argumentExpressionList
: assignmentExpression
| argumentExpressionList ',' assignmentExpression
;
unaryExpression
: postfixExpression
| '++' unaryExpression
| '--' unaryExpression
| unaryOperator castExpression
| 'sizeof' unaryExpression
| 'sizeof' '(' typeName ')'
| '_Alignof' '(' typeName ')'
| '&&' Identifier // GCC extension address of label
;
unaryOperator
: '&' | '*' | '+' | '-' | '~' | '!'
;
castExpression
: '(' typeName ')' castExpression
| '__extension__' '(' typeName ')' castExpression
| unaryExpression
| DigitSequence // for
;
multiplicativeExpression
: castExpression
| multiplicativeExpression '*' castExpression
| multiplicativeExpression '/' castExpression
| multiplicativeExpression '%' castExpression
;
additiveExpression
: multiplicativeExpression
| additiveExpression '+' multiplicativeExpression
| additiveExpression '-' multiplicativeExpression
;
shiftExpression
: additiveExpression
| shiftExpression '<<' additiveExpression
| shiftExpression '>>' additiveExpression
;
relationalExpression
: shiftExpression
| relationalExpression '<' shiftExpression
| relationalExpression '>' shiftExpression
| relationalExpression '<=' shiftExpression
| relationalExpression '>=' shiftExpression
;
equalityExpression
: relationalExpression
| equalityExpression '==' relationalExpression
| equalityExpression '!=' relationalExpression
;
andExpression
: equalityExpression
| andExpression '&' equalityExpression
;
exclusiveOrExpression
: andExpression
| exclusiveOrExpression '^' andExpression
;
inclusiveOrExpression
: exclusiveOrExpression
| inclusiveOrExpression '|' exclusiveOrExpression
;
logicalAndExpression
: inclusiveOrExpression
| logicalAndExpression '&&' inclusiveOrExpression
;
logicalOrExpression
: logicalAndExpression
| logicalOrExpression '||' logicalAndExpression
;
conditionalExpression
: logicalOrExpression ('?' expression ':' conditionalExpression)?
;
assignmentExpression
: conditionalExpression
| unaryExpression assignmentOperator assignmentExpression
| DigitSequence // for
;
assignmentOperator
: '=' | '*=' | '/=' | '%=' | '+=' | '-=' | '<<=' | '>>=' | '&=' | '^=' | '|='
;
expression
: assignmentExpression
| expression ',' assignmentExpression
;
constantExpression
: conditionalExpression
;
declaration
: declarationSpecifiers initDeclaratorList ';'
| declarationSpecifiers ';'
| staticAssertDeclaration
;
declarationSpecifiers
: declarationSpecifier+
;
declarationSpecifiers2
: declarationSpecifier+
;
declarationSpecifier
: storageClassSpecifier
| typeSpecifier
| typeQualifier
| functionSpecifier
| alignmentSpecifier
;
initDeclaratorList
: initDeclarator
| initDeclaratorList ',' initDeclarator
;
initDeclarator
: declarator
| declarator '=' initializer
;
storageClassSpecifier
: 'typedef'
| 'extern'
| 'static'
| '_Thread_local'
| 'auto'
| 'register'
;
typeSpecifier
: ('void'
| 'char'
| 'short'
| 'int'
| 'long'
| 'float'
| 'double'
| 'signed'
| 'unsigned'
| '_Bool'
| '_Complex'
| '__m128'
| '__m128d'
| '__m128i')
| '__extension__' '(' ('__m128' | '__m128d' | '__m128i') ')'
| atomicTypeSpecifier
| structOrUnionSpecifier
| enumSpecifier
| typedefName
| '__typeof__' '(' constantExpression ')' // GCC extension
| typeSpecifier pointer
;
structOrUnionSpecifier
: structOrUnion Identifier? '{' structDeclarationList '}'
| structOrUnion Identifier
;
structOrUnion
: 'struct'
| 'union'
;
structDeclarationList
: structDeclaration
| structDeclarationList structDeclaration
;
structDeclaration
: specifierQualifierList structDeclaratorList? ';'
| staticAssertDeclaration
;
specifierQualifierList
: typeSpecifier specifierQualifierList?
| typeQualifier specifierQualifierList?
;
structDeclaratorList
: structDeclarator
| structDeclaratorList ',' structDeclarator
;
structDeclarator
: declarator
| declarator? ':' constantExpression
;
enumSpecifier
: 'enum' Identifier? '{' enumeratorList '}'
| 'enum' Identifier? '{' enumeratorList ',' '}'
| 'enum' Identifier
;
enumeratorList
: enumerator
| enumeratorList ',' enumerator
;
enumerator
: enumerationConstant
| enumerationConstant '=' constantExpression
;
enumerationConstant
: Identifier
;
atomicTypeSpecifier
: '_Atomic' '(' typeName ')'
;
typeQualifier
: 'const'
| 'restrict'
| 'volatile'
| '_Atomic'
;
functionSpecifier
: ('inline'
| '_Noreturn'
| '__inline__' // GCC extension
| '__stdcall')
| gccAttributeSpecifier
| '__declspec' '(' Identifier ')'
;
alignmentSpecifier
: '_Alignas' '(' typeName ')'
| '_Alignas' '(' constantExpression ')'
;
declarator
: pointer? directDeclarator gccDeclaratorExtension*
;
directDeclarator
: Identifier
| '(' declarator ')'
| directDeclarator '[' typeQualifierList? assignmentExpression? ']'
| directDeclarator '[' 'static' typeQualifierList? assignmentExpression ']'
| directDeclarator '[' typeQualifierList 'static' assignmentExpression ']'
| directDeclarator '[' typeQualifierList? '*' ']'
| directDeclarator '(' parameterTypeList ')'
| directDeclarator '(' identifierList? ')'
| Identifier ':' DigitSequence // bit field
| '(' typeSpecifier? pointer directDeclarator ')' // function pointer like: (__cdecl *f)
;
gccDeclaratorExtension
: '__asm' '(' StringLiteral+ ')'
| gccAttributeSpecifier
;
gccAttributeSpecifier
: '__attribute__' '(' '(' gccAttributeList ')' ')'
;
gccAttributeList
: gccAttribute (',' gccAttribute)*
| // empty
;
gccAttribute
: ~(',' | '(' | ')') // relaxed def for "identifier or reserved word"
('(' argumentExpressionList? ')')?
| // empty
;
nestedParenthesesBlock
: ( ~('(' | ')')
| '(' nestedParenthesesBlock ')'
)*
;
pointer
: '*' typeQualifierList?
| '*' typeQualifierList? pointer
| '^' typeQualifierList? // Blocks language extension
| '^' typeQualifierList? pointer // Blocks language extension
;
typeQualifierList
: typeQualifier
| typeQualifierList typeQualifier
;
parameterTypeList
: parameterList
| parameterList ',' '...'
;
parameterList
: parameterDeclaration
| parameterList ',' parameterDeclaration
;
parameterDeclaration
: declarationSpecifiers declarator
| declarationSpecifiers2 abstractDeclarator?
;
identifierList
: Identifier
| identifierList ',' Identifier
;
typeName
: specifierQualifierList abstractDeclarator?
;
abstractDeclarator
: pointer
| pointer? directAbstractDeclarator gccDeclaratorExtension*
;
directAbstractDeclarator
: '(' abstractDeclarator ')' gccDeclaratorExtension*
| '[' typeQualifierList? assignmentExpression? ']'
| '[' 'static' typeQualifierList? assignmentExpression ']'
| '[' typeQualifierList 'static' assignmentExpression ']'
| '[' '*' ']'
| '(' parameterTypeList? ')' gccDeclaratorExtension*
| directAbstractDeclarator '[' typeQualifierList? assignmentExpression? ']'
| directAbstractDeclarator '[' 'static' typeQualifierList? assignmentExpression ']'
| directAbstractDeclarator '[' typeQualifierList 'static' assignmentExpression ']'
| directAbstractDeclarator '[' '*' ']'
| directAbstractDeclarator '(' parameterTypeList? ')' gccDeclaratorExtension*
;
typedefName
: Identifier
;
initializer
: assignmentExpression
| '{' initializerList '}'
| '{' initializerList ',' '}'
;
initializerList
: designation? initializer
| initializerList ',' designation? initializer
;
designation
: designatorList '='
;
designatorList
: designator
| designatorList designator
;
designator
: '[' constantExpression ']'
| '.' Identifier
;
staticAssertDeclaration
: '_Static_assert' '(' constantExpression ',' StringLiteral+ ')' ';'
;
statement
: labeledStatement
| compoundStatement
| expressionStatement
| selectionStatement
| iterationStatement
| jumpStatement
| ('__asm' | '__asm__') ('volatile' | '__volatile__') '(' (logicalOrExpression (',' logicalOrExpression)*)? (':' (logicalOrExpression (',' logicalOrExpression)*)?)* ')' ';'
;
labeledStatement
: Identifier ':' statement
| 'case' constantExpression ':' statement
| 'default' ':' statement
;
compoundStatement
: '{' blockItemList? '}'
;
blockItemList
: blockItem
| blockItemList blockItem
;
blockItem
: statement
| declaration
;
expressionStatement
: expression? ';'
;
selectionStatement
: 'if' '(' expression ')' statement ('else' statement)?
| 'switch' '(' expression ')' statement
;
iterationStatement
: 'while' '(' expression ')' statement
| 'do' statement 'while' '(' expression ')' ';'
| 'for' '(' forCondition ')' statement
;
// | 'for' '(' expression? ';' expression? ';' forUpdate? ')' statement
// | 'for' '(' declaration expression? ';' expression? ')' statement
forCondition
: forDeclaration ';' forExpression? ';' forExpression?
| expression? ';' forExpression? ';' forExpression?
;
forDeclaration
: declarationSpecifiers initDeclaratorList
| declarationSpecifiers
;
forExpression
: assignmentExpression
| forExpression ',' assignmentExpression
;
jumpStatement
: 'goto' Identifier ';'
| 'continue' ';'
| 'break' ';'
| 'return' expression? ';'
| 'goto' unaryExpression ';' // GCC extension
;
compilationUnit
: translationUnit? EOF
;
translationUnit
: externalDeclaration
| translationUnit externalDeclaration
;
externalDeclaration
: functionDefinition
| declaration
| ';' // stray ;
;
functionDefinition
: declarationSpecifiers? declarator declarationList? compoundStatement
;
declarationList
: declaration
| declarationList declaration
;
Constant
: IntegerConstant
| FloatingConstant
//| EnumerationConstant
| CharacterConstant
;
| ANTLR | 4 | yingkitw/Project_CodeNet | tools/spt-generator/src/com/ibm/ai4code/parser/c_multi/C11.g4 | [
"Apache-2.0"
] |
pragma solidity ^0.4.0;
contract Misc {
constructor() public {}
function double(uint a) public pure returns(uint) {
return 2*a;
}
}
| Solidity | 4 | MatrixAINetwork/aimanj | codegen/src/test/resources/solidity/misc/Misc.sol | [
"Apache-2.0"
] |
<script>
/*! jQuery v3.1.0 | (c) jQuery Foundation | jquery.org/license */
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| HTML+Django | 1 | MalcolmScoffable/openapi-generator | modules/openapi-generator/src/main/resources/htmlDocs2/js_jquery.mustache | [
"Apache-2.0"
] |
(*
Module: Nsswitch
Parses /etc/nsswitch.conf
Author: Raphael Pinson <[email protected]>
About: Reference
This lens tries to keep as close as possible to `man nsswitch.conf` where possible.
About: Licence
This file is licensed under the LGPL v2+, like the rest of Augeas.
About: Lens Usage
About: Configuration files
This lens applies to /etc/nsswitch.conf. See <filter>.
*)
module Nsswitch =
autoload xfm
(************************************************************************
* Group: USEFUL PRIMITIVES
*************************************************************************)
(* View: comment *)
let comment = Util.comment
(* View: empty *)
let empty = Util.empty
(* View: sep_colon
The separator for database entries *)
let sep_colon = del /:[ \t]*/ ": "
(* View: database_kw
The database specification like `passwd', `shadow', or `hosts' *)
let database_kw = Rx.word
(* View: service
The service specification like `files', `db', or `nis' *)
let service = [ label "service" . store Rx.word ]
(* View: reaction
The reaction on lookup result like `[NOTFOUND=return]'
TODO: Use case-insensitive regexps when ticket #147 is fixed.
*)
let reaction =
let status_kw = /[Ss][Uu][Cc][Cc][Ee][Ss][Ss]/
| /[Nn][Oo][Tt][Ff][Oo][Uu][Nn][Dd]/
| /[Uu][Nn][Aa][Vv][Aa][Ii][Ll]/
| /[Tt][Rr][Yy][Aa][Gg][Aa][Ii][Nn]/
in let action_kw = /[Rr][Ee][Tt][Uu][Rr][Nn]/
| /[Cc][Oo][Nn][Tt][Ii][Nn][Uu][Ee]/
| /[Mm][Ee][Rr][Gg][Ee]/
in let negate = [ Util.del_str "!" . label "negate" ]
in let reaction_entry = [ label "status" . negate?
. store status_kw
. Util.del_str "="
. [ label "action" . store action_kw ] ]
in Util.del_str "["
. [ label "reaction"
. (Build.opt_list reaction_entry Sep.space) ]
. Util.del_str "]"
(* View: database *)
let database =
[ label "database" . store database_kw
. sep_colon
. (Build.opt_list
(service|reaction)
Sep.space)
. Util.comment_or_eol ]
(* View: lns *)
let lns = ( empty | comment | database )*
(* Variable: filter *)
let filter = (incl "/etc/nsswitch.conf")
let xfm = transform lns filter
| Augeas | 5 | zwass/launcher | pkg/augeas/assets/lenses/nsswitch.aug | [
"MIT"
] |