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- llava-v1.6-mistral-7b-STIC-Iter1_2_concat_lora
- llava-v1.6-mistral-7b-STIC-Iter1_2_concat_new_lora
- llava-v1.6-mistral-7b-STIC-Iter1_2_lora
- llava-v1.6-mistral-7b-STIC-Iter1_2_new_lora
- llava-v1.6-mistral-7b-STIC-Iter1_lora
- llava-v1.6-mistral-7b-STIC-Iter1_lora_2ep
- llava-v1.6-mistral-7b-STIC-Iter2_lora
- llava-v1.6-mistral-7b-STIC-gt-judge_lora
- llava-v1.6-mistral-7b-STIC-judge_lora
- llava-v1.6-mistral-7b-STIC-judge_new_lora
- llava-v1.6-mistral-7b-STIC-judge_v2_lora
- llava-v1.6-mistral-7b-STIC-judge_v2_lora_2ep
- llava-v1.6-mistral-7b-STIC-stage1-Iter1_2_concat_lora
- llava-v1.6-mistral-7b-STIC-stage1-Iter1_2_lora
- llava-v1.6-mistral-7b-STIC-stage1-Iter1_lora
- llava-v1.6-mistral-7b-STIC-stage1-Iter1_lora_2ep
- llava-v1.6-mistral-7b-STIC-stage1-Iter2_lora
- llava-v1.6-mistral-7b-STIC-stage1-judge_lora
- llava-v1.6-mistral-7b-STIC-stage1-judge_new_lora
- whole_model