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| Ticket Name: Linux/TDA2: QSPI 128MB 2 instances Read/Write error | |
| Query Text: | |
| Part Number: TDA2 Tool/software: Linux Dear Experts, We are using a 1Gbit(128MB) QSPI Flash(S70FL01GS) with kernel 4.4(VisionSDK 3.2). This chip is built from 2 64MB QSPI instances with 2 chip select.(correctly connected to TDA2's CS0 and CS1) When we operate on 2 instances, read/write result is incorrect. We add 2 64MB instance in linux device tree, and 2 instances are correctly recongnized by kernel from log. Here is some of our test notes: 1. kernel detect 2 chips. we only operate on any single chip, it works well. 2. kernel detect 2 chips, we read from 1, then write data to 2, then read again from 1, the result is incorrect. Read/write CS pin works well. Thanks & Best Regards! ZM | |
| Responses: | |
| HI On our EVM we only have a single instance of SPI ,hence we have not validated this configuration(though it should work) Can you share the device tree snippet corresponding to the QSPI configuration From you description , you have verified that on your board the right chip select is being asserted when you access the 2 chips - please confirm Also, from your description, writes to chip2, is impacting the data present in chip1 - essentially implying that the 2 regions are being aliased, right? | |
| &qspi { | |
| status = "okay"; | |
| spi-max-frequency = <76800000>; | |
| #if 1 | |
| m25p80@0 { | |
| compatible = "s25fl512s"; | |
| spi-max-frequency = <76800000>; | |
| reg = <0>; | |
| spi-tx-bus-width = <1>; | |
| spi-rx-bus-width = <4>; | |
| #address-cells = <1>; | |
| #size-cells = <1>; | |
| /* MTD partition table. | |
| * The ROM checks the first four physical blocks | |
| * for a valid file to boot and the flash here is | |
| * 64KiB block size. | |
| */ | |
| partition@0 { | |
| label = "QSPI.SPL"; | |
| reg = <0x00000000 0x000040000>; | |
| }; | |
| partition@1 { | |
| label = "QSPI.u-boot"; | |
| reg = <0x00040000 0x00100000>; | |
| }; | |
| partition@2 { | |
| label = "QSPI.u-boot-spl-os"; | |
| reg = <0x00140000 0x00080000>; | |
| }; | |
| partition@3 { | |
| label = "QSPI.u-boot-env"; | |
| reg = <0x001c0000 0x00040000>; | |
| }; | |
| partition@4 { | |
| label = "QSPI.kernel"; | |
| reg = <0x00200000 0x0500000>; | |
| }; | |
| partition@5 { | |
| label = "QSPI.file-system"; | |
| reg = <0x00700000 0x03900000>; | |
| }; | |
| }; | |
| #endif | |
| #if 1 | |
| m25p80@1 { | |
| compatible = "s25fl512s"; | |
| spi-max-frequency = <76800000>; | |
| reg = <1>; | |
| spi-tx-bus-width = <1>; | |
| spi-rx-bus-width = <4>; | |
| #address-cells = <1>; | |
| #size-cells = <1>; | |
| /* MTD partition table. | |
| * The ROM checks the first four physical blocks | |
| * for a valid file to boot and the flash here is | |
| * 64KiB block size. | |
| */ | |
| partition@0 { | |
| label = "QSPI.Extern"; | |
| reg = <0x00000000 0x04000000>; | |
| }; | |
| }; | |
| #endif | |
| }; | |
| Chip select pin is working correctly. Data read from chip is all zero if 2 chip is accessed. | |
| Hi Srirama, After onsite check, I found that chip select is not correct. Finally, I find a bug in Kernel QSPI driver: diff --git a/ti_components/os_tools/linux/kernel/omap/drivers/spi/spi-ti-qspi.c b/ti_components/os_tools/linux/kernel/omap/drivers/spi/spi-ti-qspi.c | |
| index 3f225f959..89ec31848 100644 | |
| --- a/ti_components/os_tools/linux/kernel/omap/drivers/spi/spi-ti-qspi.c | |
| +++ b/ti_components/os_tools/linux/kernel/omap/drivers/spi/spi-ti-qspi.c | |
| @@ -495,8 +495,8 @@ static void ti_qspi_enable_memory_map(struct spi_device *spi) | |
| ti_qspi_write(qspi, MM_SWITCH, QSPI_SPI_SWITCH_REG); | |
| if (qspi->ctrl_base) { | |
| regmap_update_bits(qspi->ctrl_base, qspi->ctrl_reg, | |
| - MEM_CS_EN(spi->chip_select), | |
| - MEM_CS_MASK); | |
| + MEM_CS_MASK, | |
| + MEM_CS_EN(spi->chip_select)); | |
| } | |
| qspi->mmap_enabled = true; | |
| } | |
| @@ -508,7 +508,7 @@ static void ti_qspi_disable_memory_map(struct spi_device *spi) | |
| ti_qspi_write(qspi, 0, QSPI_SPI_SWITCH_REG); | |
| if (qspi->ctrl_base) | |
| regmap_update_bits(qspi->ctrl_base, qspi->ctrl_reg, | |
| - 0, MEM_CS_MASK); | |
| + MEM_CS_MASK, 0); | |
| qspi->mmap_enabled = false; | |
| } | |
| Thanks & Best Regards! ZM | |