sample_embedding_folder2/0764784.txt

Ticket Name: Linux/TDA2: The diagnostic function in TDAx

Query Text:
Part Number: TDA2 Tool/software: Linux We know that the EMIF1 channel can support the 2-bit ECC DDR diagnostic function. We are worried that if the DDR has a 2-bit data error, it may cause the system to run out of track. How can SOC record this information? Our hardware design supports another MCU to communicate with the SOC through the serial port. But if the program runs away, communication may fail. For other types of diagnosis, we are worried about the same result. E.g：Dual error detection (SECDED) error correcting code (ECC) diagnostic of the on-chip RAM E.g：The L3 interconnect timeout .

Responses:
Hi, One suggestion is to isolate the code communicating to the MCU to reside in on-chip memory. Thus, if the primary code communicating with DDR has a 2-bit error and impacts the program operation, the code running from on-chip memory would be able to detect and report to the MCU. Best regards, Kevin