sample_embedding_folder2/0731859.txt

Ticket Name: TDA2: data flow of cascade_radar_object_detect

Query Text:
Part Number: TDA2 Hi, I am about to use TDA2 to collect and process cascaded 1243 data. I downloaded and installed the PROCESSOR_SDK_RADAR_03_04_00_00 package. For C:\ti\PROCESSOR_SDK_RADAR_03_04_00_00\vision_sdk\apps\src\rtos\radar\src\usecases\cascade_radar_object_detect this demo, I see the datapath is shown in the figure below: I am wondering if the Select step is to select data from different 1243 radar(Q0,Q1,Q2,Q3) and what is the order of merging the data after fft? And if possible, where could I find the source code doing this step? Thanks.

Responses:
Hi, The order of merging is Q0, Q1, Q2, Q3. The merge would make a System_VideoFrameCompositeBuffer type container which contains the buffer addresses of individual buffer outputs in the multi-dimensional array bufAddr. If you are looking at how the data is read from these 4 separate buffer addresses captured in bufAddr, you can refer to PROCESSOR_SDK_RADAR_03_04_00_00\vision_sdk\apps\src\rtos\radar\src\alg_plugins\alg_fxns\radardspprocess\radarDspProcess.c function AlgorithmFxn_RadarDspProcessProcess onwards. Thanks and Regards, Piyali

Thanks for the quick response. you are right that AlgorithmFxn_RadarDspProcessProcess is a good function to know how data is processed separately. But I would like to know if the source code of Merge is available in the package? Can I assume that Q0 stands for data from master device and Q1, Q2 and Q3 stand for data from slave devices 1,2 and 3? If so, the order of output data of Merge would be master, slave 1, slave 2 and slave 3. Am I right about this? Thanks.

Hi The source for the merge is at PROCESSOR_SDK_RADAR_03_04_00_00\vision_sdk\links_fw\src\rtos\links_common\merge The Q0, Q1, Q2, Q3 would be based on how the board is designed to connect the VIN channels. On the TI cascade Radar EVM, VIN1A is connected to Slave 3 (Q0) , VIN2A is Master (Q1) , VIN3A is Slave 1 (Q2) , VIN4A is Slave 2 (Q3). Thanks and Regards, Piyali