sample_embedding_folder2/0728605.txt

Ticket Name: CCS/TDA2PXEVM: Hwi_disable() function definition

Query Text:
Part Number: TDA2PXEVM Other Parts Discussed in Thread: TDA2 Tool/software: Code Composer Studio Hi, I'm trying to test whether interrupts are enabled for a vision SDK usecase by setting a breakpoint at Hwi_disable(), but I can't seem to find the function definition? Thanks, Richard

Responses:
Hi Richard, Hwi_disable is a BIOS API. You will have to build SDK in debug mode and step into BIOS APIs to see the definition. You are trying this on which CPU? Regards, Rishabh

Hi Rishabh, I'm not interested in the internals of hwi_disable per se, I just wanted to be able to set a breakpoint there for debugging. Since it's a BIOS API, does this mean I can't set a breakpoint at its definition? I am trying this for the camera + radar combo usecase, which registers the interrupt handler to GPIO7_9 on the TDA2PxEVM board. However, I am not sure which CPU GPIO7_9 corresponds to. My problem is that when I probe GPIO7_9, I can see the interrupt request come over. In the software for the usecase, the interrupt handler is also registered to GPIO7_9. However, when I add a breakpoint at and printf() to the interrupt handler, I can tell that it's never invoked. Alternatively, is there some better way for me to verify whether interrupts are enabled correctly for this usecase, rather than stepping through the code and examining every call to hwi_enable and hwi_disable? Thanks, Richard

Hi Richard, GPIO7_9 does not correspond to any CPU. User decides to run on a particular CPU for a particular use case. Can you point to the name of exact use case which you are trying to run. Regards, Rishabh

Hi Rishabh, I am running the "Camera and Radar Capture + Radar Processing (DSP1) + Display (HDMI)" usecase, under "Camera and Radar Combo Use Cases". Based on the usecase files, it looks like the CPUs IPU1_0 and DSP1 are used. Thanks, Richard

Hi Richard, You need to know what is the exact CPU where you are running this code. In case you want to check if interrupt is getting set you should check the GPIO registers for IPR bit. In case IPR is set in GPIO you should make sure that crossbar is configured correctly. Regards, Rishabh

Hi Rishabh, The IPU1_0 is the CPU running this code. Here is what my CCS registers tab looks like: How can I tell which are the GPIO registers? Thanks, Richard

Hi Richard, Ok so you are running on IPU. Can you refer to TRM for GPIO7 registers. Regards, Rishabh

Hi Rishabh, I looked in the TRM and found the "PM_L4PER_GPIO7_WKDEP" register. Is this the relevant interrupt enable register? When I view the register after loading binaries onto the TDA2 board, the value indicates all wakeup dependencies are disabled. When I try to view it again once the code has progressed to the point at which it's waiting for the interrupt, I get a "target failed to read" error. Are there additional settings I need to configure in order to view the register once the code has begun to execute? In addition, I don't see any reference to an IPR bit for any of the GPIO registers. Thanks, Richard

Hi Rishabh, I figured out that the interrupts were correctly enabled. Thanks, Richard

Hi Richard, It is not clear to me if the issue is resolved or not. Can you let me know what was the root cause? Regards, Rishabh

Hi Rishabh, I rolled back my modified Vision SDK to an earlier version, added only the essential modifications from the current version, and interrupts from the radar chip were successfully detected. I was not able to identify a specific root cause. Thanks, Richard

Ok thanks. I will close this thread. Regards, Rishabh