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Ticket Name: DRA74: TDP of DRA74 | |
Query Text: | |
Part Number: DRA74 For the TDP on DRA74 or TDA2 If we already have the power consumption of the chip, how do we get the TDP value? What is the conversion efficiency between the two? We downloaded the model data of TDA2 on the official website as follows, can the Power(W) value of 2.568 be fixed? Should we fill in the power consumption or TDP? | |
Responses: | |
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Feng, The thermal design power estimate should be based on a realistic load for your application running on the SoC, generally considering a run-time in the 'minutes' range. You should contact your local TI representative to fill out a "resource loading" for your application, and we can use that to provide a power estimate. Is that how you got the 2.568W number that you quote? Regards, Kyle | |
Hi Kyle 2.568W is a default value in the thermal simulation model of the official website. We have already filled in the "resource loading" you mentioned. According to the basic principle of the circuit, power (P) = current (A) × voltage (V).we calculate that the total power (P) is 15W. But you know, thermal design power (TDP) is not the same as power (P). TDP refers to the thermal effect of CPU current and other forms of heat. We want to know the TDP value for the thermal design. | |
Feng, We do not specify a single TDP value for the SoC. You are right that 15W is almost certainly too high of a power estimate to make sense for thermal analysis. In general, the Resource Loading (and resulting power estimate) can be populated with different analysis types in mind. From a PMIC capacity perspective, the load on any given processor(s) and domain(s) whether concurrent or serialized must be met by the PMIC so in this case configuring all cores active with relatively high load may make sense. From a thermal analysis perspective, a different approach should be followed. There is no single right answer. You can either reduce the utilization for each core to a value that makes sense over an extended period of time (minutes). Or you can define multiple resource loadings representing different time slices of activity for the SoC (1 second high activity, 5 second moderate activity 10 second idle, repeat...). This must be done with a knowledge of the application, and can't simply be derated based on a TDP value. Regards, Kyle | |