Spaces:
Sleeping
Sleeping
| Ticket Name: TDA2EVM5777: TDA2EVM5777 NAND flash & NOR flash | |
| Query Text: | |
| Part Number: TDA2EVM5777 Other Parts Discussed in Thread: TDA2 Hello I study form the EVM schematics that data pins of nand flash & nor flash is all connected to SW2 & SW3 in page23, which will be set to pull down by 10k or pull up by 1k. why the data pin can be pull up by 1k? is there no problem when SoC is communicating with nand or nor flash? data pin can be pull low when communicating although it is strongly pull up by SW2 or SW3? thank you~ | |
| Responses: | |
| Hi, EVM has so many switches, jumpers, and muxes so that as much as possible of the SoC features can be tested or debugged. For the field design, much of the switches will not be needed, therefore much of those kind schematics will not be seen. In most of the cases, only the pull-ups, only pull-downs, or none will be on the board. Particularly for the overriding with a 1k the 10k, yes, it is neither an efficient nor good idea, but it is simple and it is working okay in practice for an EVM. Regards, Stan | |
| Hello If we use just only eMMC & SPI flash,could we remove SW5 & U57? What is the purpose of U57? read the SW5 status by software? thank you~ | |
| Hi, Typically it is rare to need in real life design: - switches - some that are needed can be replaced with jumpers or resistor jumpers. typically that are the sysboot pin configs and some user configs if any. - muxing ICs - logic ICs - GPIO expander ICs (like U57) Please note that everything depends on design needs, peripheral needs and many other decisions that should be taken during design time. Regards, Stan | |
| Hello We have no need of GPIO expander(U57) bu we don't know what is the purpose of U57 in EVM what is the function of U57 in EVM? for SoC to read SW5's status? thank you | |
| For P10-P17, I think they only monitor SW5 for software. However every signal must be evaluated individually. For example, P17 (FORCE_EMU) is a signal to software only. The other 7 go directly to hardware muxes to do the job, and software can monitor them through U57. P0 (SEL_GPMC_AD_VID_S0), on the other hand, is controlled THROUGH software (output from U57) . Similar is for P3-P5, however for P3, P4, there are some notes on the diagram saying it is not supported for them in software. As I already recommended - every signal must be evaluated individually. Regards, Stan | |
| Hi Stan I have no need to monitor the SW5 by software,and there is no need to use RU33,RU88,RU89 cause I removed them from our design. So I don't need the P0 of U57, I didn't use USB function, so I don't need P1&P2,I didn't use I2C3 ,CAN2 & Ethernet, so I don't need P3&P4. I control the MMC_PWR directly from GPIO pin, so I don't need P5. So I can remove the U57 directly,right? thank you~ | |
| Sure. I hope you will manage to remove as much as possible of those discrete muxes and logic. TDA2 contains a sophisticated internal muxing covering most of the use-cases in the field. Regards, Stan | |