text
stringlengths 197
24.1M
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### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global memmove
.type memmove, %function
memmove:
.LFB0:
.cfi_startproc
sub sp, sp, #48
.cfi_def_cfa_offset 48
str x0, [sp, 24]
str x1, [sp, 16]
str x2, [sp, 8]
ldr x0, [sp, 16]
str x0, [sp, 40]
ldr x0, [sp, 24]
str x0, [sp, 32]
ldr x1, [sp, 40]
ldr x0, [sp, 32]
cmp x1, x0
bcs .L6
b .L3
.L4:
ldr x1, [sp, 40]
ldr x0, [sp, 8]
add x1, x1, x0
ldr x2, [sp, 32]
ldr x0, [sp, 8]
add x0, x2, x0
ldrb w1, [x1]
strb w1, [x0]
.L3:
ldr x0, [sp, 8]
sub x1, x0, #1
str x1, [sp, 8]
cmp x0, 0
bne .L4
b .L5
.L7:
ldr x1, [sp, 40]
add x0, x1, 1
str x0, [sp, 40]
ldr x0, [sp, 32]
add x2, x0, 1
str x2, [sp, 32]
ldrb w1, [x1]
strb w1, [x0]
.L6:
ldr x0, [sp, 8]
sub x1, x0, #1
str x1, [sp, 8]
cmp x0, 0
bne .L7
.L5:
ldr x0, [sp, 24]
add sp, sp, 48
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size memmove, .-memmove
.align 2
.global bcopy
.type bcopy, %function
bcopy:
.LFB1:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 40]
str x1, [sp, 32]
str x2, [sp, 24]
ldr x2, [sp, 24]
ldr x1, [sp, 40]
ldr x0, [sp, 32]
bl memmove
nop
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE1:
.size bcopy, .-bcopy
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC0:
.string "LP64"
.text
.align 2
.global print_datamodel
.type print_datamodel, %function
print_datamodel:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -16]!
.cfi_def_cfa_offset 16
.cfi_offset 29, -16
.cfi_offset 30, -8
mov x29, sp
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl printf
nop
ldp x29, x30, [sp], 16
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size print_datamodel, .-print_datamodel
.section .rodata
.align 3
.LC1:
.string "Size of basic integer types:"
.align 3
.LC2:
.string "Size of char: %ld bytes.\n"
.align 3
.LC3:
.string "Size of short: %ld bytes.\n"
.align 3
.LC4:
.string "Size of int: %ld bytes.\n"
.align 3
.LC5:
.string "Size of long: %ld bytes.\n"
.align 3
.LC6:
.string "Size of void*: %ld bytes.\n"
.align 3
.LC7:
.string "Datamodel is: "
.align 3
.LC8:
.string "Size of floating-point types:"
.align 3
.LC9:
.string "Size of float: %ld bytes.\n"
.align 3
.LC10:
.string "Size of double: %ld bytes.\n"
.text
.align 2
.global main
.type main, %function
main:
.LFB1:
.cfi_startproc
stp x29, x30, [sp, -16]!
.cfi_def_cfa_offset 16
.cfi_offset 29, -16
.cfi_offset 30, -8
mov x29, sp
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl puts
mov x1, 1
adrp x0, .LC2
add x0, x0, :lo12:.LC2
bl printf
mov x1, 2
adrp x0, .LC3
add x0, x0, :lo12:.LC3
bl printf
mov x1, 4
adrp x0, .LC4
add x0, x0, :lo12:.LC4
bl printf
mov x1, 8
adrp x0, .LC5
add x0, x0, :lo12:.LC5
bl printf
mov x1, 8
adrp x0, .LC6
add x0, x0, :lo12:.LC6
bl printf
adrp x0, .LC7
add x0, x0, :lo12:.LC7
bl printf
bl print_datamodel
mov w0, 10
bl putchar
mov w0, 10
bl putchar
adrp x0, .LC8
add x0, x0, :lo12:.LC8
bl puts
mov x1, 4
adrp x0, .LC9
add x0, x0, :lo12:.LC9
bl printf
mov x1, 8
adrp x0, .LC10
add x0, x0, :lo12:.LC10
bl printf
mov w0, 0
ldp x29, x30, [sp], 16
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE1:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global my_strdup
.type my_strdup, %function
my_strdup:
.LFB6:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
str x1, [sp, 16]
ldr x0, [sp, 16]
bl my_strlen
add w0, w0, 1
sxtw x0, w0
bl malloc
str x0, [sp, 24]
str wzr, [sp, 44]
b .L2
.L3:
ldrsw x0, [sp, 44]
ldr x1, [sp, 16]
add x1, x1, x0
ldrsw x0, [sp, 44]
ldr x2, [sp, 24]
add x0, x2, x0
ldrb w1, [x1]
strb w1, [x0]
ldrsw x0, [sp, 44]
add x0, x0, 1
ldr x1, [sp, 24]
add x0, x1, x0
strb wzr, [x0]
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L2:
ldrsw x0, [sp, 44]
ldr x1, [sp, 16]
add x0, x1, x0
ldrb w0, [x0]
cmp w0, 0
bne .L3
ldr x0, [sp, 24]
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE6:
.size my_strdup, .-my_strdup
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC0:
.ascii "/* two small different kernels are better than one big */ "
.ascii " \n "
.ascii " \n#define NUM_INTENSIT"
.ascii "IES 256 \n"
.ascii " "
.ascii " \nkernel void kernel_oilify(global float4 "
.ascii "*in, \n "
.ascii " global float4 *out, \n"
.ascii " const int mask_radius, "
.ascii " \n const int i"
.ascii "ntensities, \n "
.ascii " const float exponent) \n"
.ascii "{ "
.ascii " \n int gidx = get_global_id(0); "
.ascii " \n int gidy = get_glo"
.ascii "bal_id(1); \n"
.ascii " int x = gidx + mask_radius; "
.ascii " \n int y = gidy + mask_radius; "
.ascii " \n int dst_width = ge"
.ascii "t_global_size(0); \n"
.ascii " int src_width = dst_width + mask_radius * 2; "
.ascii " \n float4 hist[NUM_INTENSITIES]; "
.ascii " \n float4 hist_max = "
.ascii "1.0; \n"
.ascii " int i, j, intensity; "
.ascii " \n int radius_sq = mask_radius * mask_rad"
.ascii "ius; \n float4 temp_pixel;"
.ascii " \n"
.ascii " for (i = 0; i < intensities; i++) "
.ascii " \n hist[i] = 0.0; "
.ascii " \n "
.ascii " \n"
.ascii " for (i = -mask_radius; i <= mask_radius; i++) "
.ascii " \n { "
.ascii " \n f"
.ascii "or (j = -mask_radius; j <= mask_radius; j++) "
.ascii " \n { "
.ascii " \n if (i*i + j*j <= "
.ascii "radius_sq) \n "
.ascii " { "
.ascii " \n temp_pixel = in[x + i + (y + j) *"
.ascii " src_width]; \n hist[(int)(te"
.ascii "mp_pixel.x * (intensities - 1))].x+=1; \n "
.ascii " hist[(int)(temp_pixel.y * (intensities - 1))].y+=1; "
.ascii " \n hist[(int)(temp_pixel.z * (intens"
.ascii "ities - 1))].z+=1; \n hist[(int)(te"
.ascii "mp_pixel.w * (intensities - 1))].w+=1; \n "
.ascii " } "
.ascii " \n } "
.ascii " \n } "
.ascii " \n "
.ascii " "
.ascii " \n for (i = 0; i < intensities; i++) { "
.ascii " \n if(hist_max.x < hist["
.ascii "i].x) \n "
.ascii " hist_max.x = hist[i].x; "
.ascii " \n if(hist_max.y < hist[i].y) "
.ascii " \n hist_max.y = hist[i"
.ascii "].y; \n i"
.ascii "f(hist_max.z < hist[i].z) "
.ascii " \n hist_max.z = hist[i].z; "
.ascii " \n if(hist_max.w < hist["
.ascii "i].w) \n "
.ascii " hist_max.w = hist[i].w; "
.ascii " \n } "
.ascii " \n float4 div = 0.0; "
.ascii " \n flo"
.ascii "at4 sum = 0.0; "
.ascii " \n float4 ratio, weight; "
.ascii " \n for (i ="
.ascii " 0; i < intensities; i++) "
.ascii " \n { "
.ascii " \n ratio = hist[i] / hist_max"
.ascii "; \n weight"
.ascii " = pow(ratio, (float4)exponent); "
.ascii " \n sum += weight * (float4)i; "
.ascii " \n div += weight; "
.ascii " \n } "
.ascii " "
.ascii " \n out[gidx + gidy * dst_width] = sum / div / (floa"
.ascii "t)(intensities - 1); \n} "
.ascii " \n "
.ascii " "
.ascii " \nkernel void kernel_oilify_inten(global float4 *in,"
.ascii " \n g"
.ascii "lobal float4 *out, \n "
.ascii " const int mask_radius, "
.ascii " \n const int intensities"
.ascii ", \n c"
.ascii "onst float exponent) \n{ "
.ascii " "
.ascii " \n int gidx = get_global_id(0); "
.ascii " \n int gidy = get_global_id(1);"
.ascii " \n int x = "
.ascii "gidx + mask_radius; "
.ascii " \n int y = gidy + mask_radius; "
.ascii " \n int dst_width = get_global_s"
.ascii "ize(0); \n int src_"
.ascii "width = dst_width + mask_radius * 2; "
.ascii " \n float4 cumulative_rgb[NUM_INTENSITIES]; "
.ascii " \n int hist_inten[NUM_INTENSITI"
.ascii "ES], inten_max; "
.ascii " \n int i, j, intensity; "
.ascii " \n int radius_sq = mask_radius * mas"
.ascii "k_radius; \n float4 temp_p"
.ascii "ixel; "
.ascii " \n for (i = 0; i < intensities; i++) "
.ascii " \n { "
.ascii " \n hist_inten["
.ascii "i] = 0; "
.ascii " \n cumulative_rgb[i] = 0.0; "
.ascii " \n } "
.ascii " \n for (i = -mas"
.ascii "k_radius; i <= mask_radius; i++) "
.ascii " \n { "
.ascii " \n for (j = -mask_radius; j <= mas"
.ascii "k_radius; j++) \n { "
.ascii " "
.ascii " \n if (i*i + j*j <= radius_sq) "
.ascii " \n { "
.ascii " \n tem"
.ascii "p_pixel = in[x + i + (y + j) * src_width]; "
.ascii " \n /*Calculate intensity on the fly, GPU does "
.ascii "it fast*/ \n intensity = (int)((0.29"
.ascii "9 * temp_pixel.x \n "
.ascii " +0.587 * temp_pixel.y "
.ascii " \n +0.114 * temp_pixel.z) * (float)("
.ascii "intensities-1)); \n hist_inten[intensity] +"
.ascii "= 1; \n cum"
.ascii "ulative_rgb[intensity] += temp_pixel; "
.ascii " \n } "
.ascii " \n } "
.ascii " \n } "
.ascii " "
.ascii " \n inten_max = 1; "
.ascii " \n "
.ascii " \n "
.ascii " /* calculated maximums */ "
.ascii " \n for (i = 0; i < intensities; i++) { "
.ascii " \n if(hist_inten[i] "
.ascii "> inten_max) \n "
.ascii " inten_max = hist_inten[i]; "
.ascii " \n } "
.ascii " \n float div = 0.0; "
.ascii " \n "
.ascii " float ratio, weight, mult_inten; "
.ascii " \n "
.ascii " \n float4 color = 0.0;"
.ascii " \n "
.ascii " for (i = 0; i < intensities; i++) "
.ascii " \n { "
.ascii " \n if (hist_inten[i]"
.ascii " > 0) \n "
.ascii " { "
.ascii " \n ratio = (float)(hist_inten[i]) / (f"
.ascii "loat)(inten_max); \n weight = pow(ra"
.ascii "tio, exponent); \n "
.ascii " mult_inten = weight / (float)(hist_inten[i]); "
.ascii " \n "
.ascii " \n div += weight; "
.ascii " \n "
.ascii " color += mult_inten * cumulative_rgb[i]; "
.ascii " \n } "
.ascii " "
.string " \n } \n out[gidx + gidy * dst_width] = color/div; \n} \n"
.section .data.rel.local,"aw"
.align 3
.type oilify_cl_source, %object
.size oilify_cl_source, 8
oilify_cl_source:
.xword .LC0
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC1:
.string "sum is %d\n"
.text
.align 2
.global main
.type main, %function
main:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -80]!
.cfi_def_cfa_offset 80
.cfi_offset 29, -80
.cfi_offset 30, -72
mov x29, sp
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 72]
mov x1, 0
adrp x0, .LC0
add x1, x0, :lo12:.LC0
add x0, sp, 32
ldp q0, q1, [x1]
stp q0, q1, [x0]
ldr x1, [x1, 32]
str x1, [x0, 32]
mov w0, 10
str w0, [sp, 28]
add x0, sp, 32
ldr w1, [sp, 28]
bl addArray
mov w1, w0
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl printf
mov w0, 0
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 72]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L3
bl __stack_chk_fail
.L3:
mov w0, w1
ldp x29, x30, [sp], 80
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size main, .-main
.section .rodata
.align 3
.LC0:
.word 4
.word 3
.word 2
.word 1
.word 0
.word 5
.word 6
.word 7
.word 8
.word 9
.text
.align 2
.global addArray
.type addArray, %function
addArray:
.LFB1:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str x0, [sp, 8]
str w1, [sp, 4]
str wzr, [sp, 24]
str wzr, [sp, 28]
b .L5
.L6:
ldrsw x0, [sp, 28]
lsl x0, x0, 2
ldr x1, [sp, 8]
add x0, x1, x0
ldr w0, [x0]
ldr w1, [sp, 24]
add w0, w1, w0
str w0, [sp, 24]
ldr w0, [sp, 28]
add w0, w0, 1
str w0, [sp, 28]
.L5:
ldr w1, [sp, 28]
ldr w0, [sp, 4]
cmp w1, w0
blt .L6
ldr w0, [sp, 24]
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE1:
.size addArray, .-addArray
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.global glui_img_checkbox_0_dis
.data
.align 3
.type glui_img_checkbox_0_dis, %object
.size glui_img_checkbox_0_dis, 2036
glui_img_checkbox_0_dis:
.word 13
.word 13
.word 255
.word 255
.word 255
.word 255
.word 255
.word 255
.word 255
.word 255
.word 255
.word 255
.word 255
.word 255
.word 255
.word 255
.word 255
.word 255
.word 255
.word 255
.word 255
.word 255
.word 255
.word 255
.word 255
.word 255
.word 255
.word 255
.word 255
.word 255
.word 255
.word 255
.word 255
.word 255
.word 255
.word 255
.word 255
.word 255
.word 255
.word 255
.word 255
.word 128
.word 128
.word 128
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 255
.word 255
.word 255
.word 128
.word 128
.word 128
.word 64
.word 64
.word 64
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 255
.word 255
.word 255
.word 128
.word 128
.word 128
.word 64
.word 64
.word 64
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 255
.word 255
.word 255
.word 128
.word 128
.word 128
.word 64
.word 64
.word 64
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 255
.word 255
.word 255
.word 128
.word 128
.word 128
.word 64
.word 64
.word 64
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 255
.word 255
.word 255
.word 128
.word 128
.word 128
.word 64
.word 64
.word 64
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 255
.word 255
.word 255
.word 128
.word 128
.word 128
.word 64
.word 64
.word 64
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 255
.word 255
.word 255
.word 128
.word 128
.word 128
.word 64
.word 64
.word 64
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 255
.word 255
.word 255
.word 128
.word 128
.word 128
.word 64
.word 64
.word 64
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 255
.word 255
.word 255
.word 128
.word 128
.word 128
.word 64
.word 64
.word 64
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 192
.word 255
.word 255
.word 255
.word 128
.word 128
.word 128
.word 64
.word 64
.word 64
.word 64
.word 64
.word 64
.word 64
.word 64
.word 64
.word 64
.word 64
.word 64
.word 64
.word 64
.word 64
.word 64
.word 64
.word 64
.word 64
.word 64
.word 64
.word 64
.word 64
.word 64
.word 64
.word 64
.word 64
.word 64
.word 64
.word 64
.word 192
.word 192
.word 192
.word 255
.word 255
.word 255
.word 128
.word 128
.word 128
.word 128
.word 128
.word 128
.word 128
.word 128
.word 128
.word 128
.word 128
.word 128
.word 128
.word 128
.word 128
.word 128
.word 128
.word 128
.word 128
.word 128
.word 128
.word 128
.word 128
.word 128
.word 128
.word 128
.word 128
.word 128
.word 128
.word 128
.word 128
.word 128
.word 128
.word 128
.word 128
.word 128
.word 255
.word 255
.word 255
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.global procid
.bss
.align 3
.type procid, %object
.size procid, 8
procid:
.zero 8
.section .tbss,"awT",@nobits
.align 2
.type skip_segv, %object
.size skip_segv, 4
skip_segv:
.zero 4
.align 3
.type segv_env, %object
.size segv_env, 312
segv_env:
.zero 312
.text
.align 2
.type segv_handler, %function
segv_handler:
.LFB34:
.cfi_startproc
stp x29, x30, [sp, -80]!
.cfi_def_cfa_offset 80
.cfi_offset 29, -80
.cfi_offset 30, -72
mov x29, sp
str w0, [sp, 44]
str x1, [sp, 32]
str x2, [sp, 24]
ldr x0, [sp, 32]
ldr x0, [x0, 16]
str x0, [sp, 56]
mov x0, 1048576
str x0, [sp, 64]
mov x0, 104857600
str x0, [sp, 72]
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:skip_segv, lsl #12
add x0, x0, #:tprel_lo12_nc:skip_segv
ldr w0, [x0]
cmp w0, 0
beq .L2
ldr x1, [sp, 56]
ldr x0, [sp, 64]
cmp x1, x0
bcc .L3
ldr x1, [sp, 56]
ldr x0, [sp, 72]
cmp x1, x0
bls .L2
.L3:
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:segv_env, lsl #12
add x0, x0, #:tprel_lo12_nc:segv_env
mov w1, 1
bl _longjmp
.L2:
ldr w0, [sp, 44]
bl exit
.cfi_endproc
.LFE34:
.size segv_handler, .-segv_handler
.align 2
.type install_segv_handler, %function
install_segv_handler:
.LFB35:
.cfi_startproc
stp x29, x30, [sp, -176]!
.cfi_def_cfa_offset 176
.cfi_offset 29, -176
.cfi_offset 30, -168
mov x29, sp
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 168]
mov x1, 0
add x0, sp, 16
mov x2, 152
mov w1, 0
bl memset
mov x0, 1
str x0, [sp, 16]
add x0, sp, 16
mov w4, 8
mov x3, 0
mov x2, x0
mov w1, 32
mov x0, 134
bl syscall
add x0, sp, 16
mov w4, 8
mov x3, 0
mov x2, x0
mov w1, 33
mov x0, 134
bl syscall
add x0, sp, 16
mov x2, 152
mov w1, 0
bl memset
adrp x0, segv_handler
add x0, x0, :lo12:segv_handler
str x0, [sp, 16]
mov w0, 4
movk w0, 0x4000, lsl 16
str w0, [sp, 152]
add x0, sp, 16
mov x2, 0
mov x1, x0
mov w0, 11
bl sigaction
add x0, sp, 16
mov x2, 0
mov x1, x0
mov w0, 7
bl sigaction
nop
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [sp, 168]
ldr x1, [x0]
subs x2, x2, x1
mov x1, 0
beq .L5
bl __stack_chk_fail
.L5:
ldp x29, x30, [sp], 176
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE35:
.size install_segv_handler, .-install_segv_handler
.align 2
.type sleep_ms, %function
sleep_ms:
.LFB36:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str x0, [sp, 24]
ldr x0, [sp, 24]
mov w1, w0
mov w0, 1000
mul w0, w1, w0
bl usleep
nop
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE36:
.size sleep_ms, .-sleep_ms
.align 2
.type current_time_ms, %function
current_time_ms:
.LFB37:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 40]
mov x1, 0
add x0, sp, 24
mov x1, x0
mov w0, 1
bl clock_gettime
cmp w0, 0
beq .L8
mov w0, 1
bl exit
.L8:
ldr x0, [sp, 24]
mov x1, x0
mov x0, x1
lsl x0, x0, 5
sub x0, x0, x1
lsl x0, x0, 2
add x0, x0, x1
lsl x0, x0, 3
mov x1, x0
ldr x0, [sp, 32]
mov x2, x0
mov x0, 13531
movk x0, 0xd7b6, lsl 16
movk x0, 0xde82, lsl 32
movk x0, 0x431b, lsl 48
umulh x0, x2, x0
lsr x0, x0, 18
add x0, x1, x0
mov x1, x0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 40]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L10
bl __stack_chk_fail
.L10:
mov x0, x1
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE37:
.size current_time_ms, .-current_time_ms
.align 2
.type thread_start, %function
thread_start:
.LFB38:
.cfi_startproc
stp x29, x30, [sp, -128]!
.cfi_def_cfa_offset 128
.cfi_offset 29, -128
.cfi_offset 30, -120
mov x29, sp
str x0, [sp, 24]
str x1, [sp, 16]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 120]
mov x1, 0
add x0, sp, 56
bl pthread_attr_init
add x0, sp, 56
mov x1, 131072
bl pthread_attr_setstacksize
str wzr, [sp, 44]
b .L12
.L18:
add x1, sp, 56
add x0, sp, 48
ldr x3, [sp, 16]
ldr x2, [sp, 24]
bl pthread_create
cmp w0, 0
bne .L13
add x0, sp, 56
bl pthread_attr_destroy
nop
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [sp, 120]
ldr x1, [x0]
subs x2, x2, x1
mov x1, 0
beq .L19
b .L20
.L13:
bl __errno_location
ldr w0, [x0]
cmp w0, 11
bne .L21
mov w0, 50
bl usleep
nop
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L12:
ldr w0, [sp, 44]
cmp w0, 99
ble .L18
b .L17
.L21:
nop
.L17:
mov w0, 1
bl exit
.L20:
bl __stack_chk_fail
.L19:
ldp x29, x30, [sp], 128
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE38:
.size thread_start, .-thread_start
.align 2
.type event_init, %function
event_init:
.LFB39:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str x0, [sp, 8]
ldr x0, [sp, 8]
str wzr, [x0]
nop
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE39:
.size event_init, .-event_init
.align 2
.type event_reset, %function
event_reset:
.LFB40:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str x0, [sp, 8]
ldr x0, [sp, 8]
str wzr, [x0]
nop
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE40:
.size event_reset, .-event_reset
.align 2
.type event_set, %function
event_set:
.LFB41:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str x0, [sp, 24]
ldr x0, [sp, 24]
ldr w0, [x0]
cmp w0, 0
beq .L25
mov w0, 1
bl exit
.L25:
ldr x0, [sp, 24]
mov w1, 1
stlr w1, [x0]
ldr x0, [sp, 24]
mov w2, 129
mov x1, x0
mov x0, 98
bl syscall
nop
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE41:
.size event_set, .-event_set
.align 2
.type event_wait, %function
event_wait:
.LFB42:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str x0, [sp, 24]
b .L27
.L28:
ldr x0, [sp, 24]
mov w4, 0
mov w3, 0
mov w2, 128
mov x1, x0
mov x0, 98
bl syscall
.L27:
ldr x0, [sp, 24]
ldar w0, [x0]
cmp w0, 0
beq .L28
nop
nop
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE42:
.size event_wait, .-event_wait
.align 2
.type event_isset, %function
event_isset:
.LFB43:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str x0, [sp, 8]
ldr x0, [sp, 8]
ldar w0, [x0]
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE43:
.size event_isset, .-event_isset
.align 2
.type event_timedwait, %function
event_timedwait:
.LFB44:
.cfi_startproc
stp x29, x30, [sp, -80]!
.cfi_def_cfa_offset 80
.cfi_offset 29, -80
.cfi_offset 30, -72
mov x29, sp
str x0, [sp, 24]
str x1, [sp, 16]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 72]
mov x1, 0
bl current_time_ms
str x0, [sp, 40]
ldr x0, [sp, 40]
str x0, [sp, 32]
.L35:
ldr x1, [sp, 40]
ldr x0, [sp, 32]
sub x0, x1, x0
ldr x1, [sp, 16]
add x0, x1, x0
str x0, [sp, 48]
ldr x0, [sp, 48]
lsr x1, x0, 3
mov x0, 63439
movk x0, 0xe353, lsl 16
movk x0, 0x9ba5, lsl 32
movk x0, 0x20c4, lsl 48
umulh x0, x1, x0
lsr x0, x0, 4
str x0, [sp, 56]
ldr x2, [sp, 48]
lsr x1, x2, 3
mov x0, 63439
movk x0, 0xe353, lsl 16
movk x0, 0x9ba5, lsl 32
movk x0, 0x20c4, lsl 48
umulh x0, x1, x0
lsr x1, x0, 4
mov x0, x1
lsl x0, x0, 5
sub x0, x0, x1
lsl x0, x0, 2
add x0, x0, x1
lsl x0, x0, 3
sub x1, x2, x0
mov x0, 16960
movk x0, 0xf, lsl 16
mul x0, x1, x0
str x0, [sp, 64]
ldr x0, [sp, 24]
add x1, sp, 56
mov x4, x1
mov w3, 0
mov w2, 128
mov x1, x0
mov x0, 98
bl syscall
ldr x0, [sp, 24]
ldr w0, [x0]
cmp w0, 0
beq .L32
mov w0, 1
b .L36
.L32:
bl current_time_ms
str x0, [sp, 32]
ldr x1, [sp, 32]
ldr x0, [sp, 40]
sub x0, x1, x0
ldr x1, [sp, 16]
cmp x1, x0
bcs .L35
mov w0, 0
.L36:
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 72]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L37
bl __stack_chk_fail
.L37:
mov w0, w1
ldp x29, x30, [sp], 80
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE44:
.size event_timedwait, .-event_timedwait
.align 2
.type write_file, %function
write_file:
.LFB45:
.cfi_startproc
sub sp, sp, #1328
.cfi_def_cfa_offset 1328
stp x29, x30, [sp]
.cfi_offset 29, -1328
.cfi_offset 30, -1320
mov x29, sp
str x0, [sp, 56]
str x1, [sp, 48]
str x2, [sp, 1280]
str x3, [sp, 1288]
str x4, [sp, 1296]
str x5, [sp, 1304]
str x6, [sp, 1312]
str x7, [sp, 1320]
add x0, sp, 1024
str q0, [x0, 128]
add x0, sp, 1024
str q1, [x0, 144]
add x0, sp, 1024
str q2, [x0, 160]
add x0, sp, 1024
str q3, [x0, 176]
add x0, sp, 1024
str q4, [x0, 192]
add x0, sp, 1024
str q5, [x0, 208]
add x0, sp, 1024
str q6, [x0, 224]
add x0, sp, 1024
str q7, [x0, 240]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 1144]
mov x1, 0
add x0, sp, 1328
str x0, [sp, 88]
add x0, sp, 1328
str x0, [sp, 96]
add x0, sp, 1280
str x0, [sp, 104]
mov w0, -48
str w0, [sp, 112]
mov w0, -128
str w0, [sp, 116]
add x0, sp, 16
add x1, sp, 88
ldp q0, q1, [x1]
stp q0, q1, [x0]
add x1, sp, 16
add x0, sp, 120
mov x3, x1
ldr x2, [sp, 48]
mov x1, 1024
bl vsnprintf
strb wzr, [sp, 1143]
add x0, sp, 120
bl strlen
str w0, [sp, 76]
mov w1, 1
movk w1, 0x8, lsl 16
ldr x0, [sp, 56]
bl open
str w0, [sp, 80]
ldr w0, [sp, 80]
cmn w0, #1
bne .L39
mov w0, 0
b .L42
.L39:
ldrsw x1, [sp, 76]
add x0, sp, 120
mov x2, x1
mov x1, x0
ldr w0, [sp, 80]
bl write
mov x1, x0
ldrsw x0, [sp, 76]
cmp x1, x0
beq .L41
bl __errno_location
ldr w0, [x0]
str w0, [sp, 84]
ldr w0, [sp, 80]
bl close
bl __errno_location
mov x1, x0
ldr w0, [sp, 84]
str w0, [x1]
mov w0, 0
b .L42
.L41:
ldr w0, [sp, 80]
bl close
mov w0, 1
.L42:
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 1144]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L43
bl __stack_chk_fail
.L43:
mov w0, w1
ldp x29, x30, [sp]
add sp, sp, 1328
.cfi_restore 29
.cfi_restore 30
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE45:
.size write_file, .-write_file
.local nlmsg
.comm nlmsg,1104,8
.align 2
.type netlink_init, %function
netlink_init:
.LFB46:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str w0, [sp, 44]
str w1, [sp, 40]
str x2, [sp, 32]
str w3, [sp, 28]
mov x2, 1104
mov w1, 0
adrp x0, nlmsg
add x0, x0, :lo12:nlmsg
bl memset
adrp x0, nlmsg+80
add x0, x0, :lo12:nlmsg+80
str x0, [sp, 56]
ldr w0, [sp, 44]
and w1, w0, 65535
ldr x0, [sp, 56]
strh w1, [x0, 4]
ldr w0, [sp, 40]
sxth w1, w0
mov w0, 5
orr w0, w1, w0
sxth w0, w0
and w1, w0, 65535
ldr x0, [sp, 56]
strh w1, [x0, 6]
ldr x0, [sp, 56]
add x0, x0, 16
ldrsw x1, [sp, 28]
mov x2, x1
ldr x1, [sp, 32]
bl memcpy
ldr w0, [sp, 28]
add w0, w0, 3
uxtw x0, w0
and x0, x0, 4294967292
add x0, x0, 16
ldr x1, [sp, 56]
add x1, x1, x0
adrp x0, nlmsg
add x0, x0, :lo12:nlmsg
str x1, [x0]
nop
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE46:
.size netlink_init, .-netlink_init
.align 2
.type netlink_attr, %function
netlink_attr:
.LFB47:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str w0, [sp, 28]
str x1, [sp, 16]
str w2, [sp, 24]
adrp x0, nlmsg
add x0, x0, :lo12:nlmsg
ldr x0, [x0]
str x0, [sp, 40]
ldr w0, [sp, 24]
and w0, w0, 65535
add w0, w0, 4
and w1, w0, 65535
ldr x0, [sp, 40]
strh w1, [x0]
ldr w0, [sp, 28]
and w1, w0, 65535
ldr x0, [sp, 40]
strh w1, [x0, 2]
ldr x0, [sp, 40]
add x0, x0, 4
ldrsw x1, [sp, 24]
mov x2, x1
ldr x1, [sp, 16]
bl memcpy
adrp x0, nlmsg
add x0, x0, :lo12:nlmsg
ldr x1, [x0]
ldr x0, [sp, 40]
ldrh w0, [x0]
add w0, w0, 3
uxtw x0, w0
and x0, x0, 4294967292
add x1, x1, x0
adrp x0, nlmsg
add x0, x0, :lo12:nlmsg
str x1, [x0]
nop
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE47:
.size netlink_attr, .-netlink_attr
.align 2
.type netlink_nest, %function
netlink_nest:
.LFB48:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str w0, [sp, 12]
adrp x0, nlmsg
add x0, x0, :lo12:nlmsg
ldr x0, [x0]
str x0, [sp, 24]
ldr w0, [sp, 12]
and w1, w0, 65535
ldr x0, [sp, 24]
strh w1, [x0, 2]
adrp x0, nlmsg
add x0, x0, :lo12:nlmsg
ldr x0, [x0]
add x1, x0, 4
adrp x0, nlmsg
add x0, x0, :lo12:nlmsg
str x1, [x0]
adrp x0, nlmsg
add x0, x0, :lo12:nlmsg
ldr w0, [x0, 8]
add w2, w0, 1
adrp x1, nlmsg
add x1, x1, :lo12:nlmsg
str w2, [x1, 8]
adrp x1, nlmsg
add x1, x1, :lo12:nlmsg
sxtw x0, w0
add x0, x0, 2
ldr x2, [sp, 24]
str x2, [x1, x0, lsl 3]
nop
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE48:
.size netlink_nest, .-netlink_nest
.align 2
.type netlink_done, %function
netlink_done:
.LFB49:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
adrp x0, nlmsg
add x0, x0, :lo12:nlmsg
ldr w0, [x0, 8]
sub w1, w0, #1
adrp x0, nlmsg
add x0, x0, :lo12:nlmsg
str w1, [x0, 8]
adrp x0, nlmsg
add x0, x0, :lo12:nlmsg
ldr w1, [x0, 8]
adrp x0, nlmsg
add x0, x0, :lo12:nlmsg
sxtw x1, w1
add x1, x1, 2
ldr x0, [x0, x1, lsl 3]
str x0, [sp, 8]
adrp x0, nlmsg
add x0, x0, :lo12:nlmsg
ldr x1, [x0]
ldr x0, [sp, 8]
sub x0, x1, x0
and w1, w0, 65535
ldr x0, [sp, 8]
strh w1, [x0]
nop
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE49:
.size netlink_done, .-netlink_done
.align 2
.type netlink_send, %function
netlink_send:
.LFB50:
.cfi_startproc
stp x29, x30, [sp, -80]!
.cfi_def_cfa_offset 80
.cfi_offset 29, -80
.cfi_offset 30, -72
mov x29, sp
str w0, [sp, 28]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 72]
mov x1, 0
adrp x0, nlmsg
add x0, x0, :lo12:nlmsg
ldr x1, [x0]
adrp x0, nlmsg+1104
add x0, x0, :lo12:nlmsg+1104
cmp x1, x0
bhi .L49
adrp x0, nlmsg
add x0, x0, :lo12:nlmsg
ldr w0, [x0, 8]
cmp w0, 0
beq .L50
.L49:
mov w0, 1
bl exit
.L50:
adrp x0, nlmsg+80
add x0, x0, :lo12:nlmsg+80
str x0, [sp, 48]
adrp x0, nlmsg
add x0, x0, :lo12:nlmsg
ldr x1, [x0]
adrp x0, nlmsg+80
add x0, x0, :lo12:nlmsg+80
sub x0, x1, x0
mov w1, w0
ldr x0, [sp, 48]
str w1, [x0]
add x0, sp, 56
mov x2, 12
mov w1, 0
bl memset
mov w0, 16
strh w0, [sp, 56]
ldr x0, [sp, 48]
ldr w0, [x0]
uxtw x0, w0
add x1, sp, 56
mov w5, 12
mov x4, x1
mov w3, 0
mov x2, x0
adrp x0, nlmsg+80
add x1, x0, :lo12:nlmsg+80
ldr w0, [sp, 28]
bl sendto
str w0, [sp, 44]
ldr x0, [sp, 48]
ldr w0, [x0]
ldr w1, [sp, 44]
cmp w1, w0
beq .L51
mov w0, 1
bl exit
.L51:
mov w3, 0
mov x2, 1024
adrp x0, nlmsg+80
add x1, x0, :lo12:nlmsg+80
ldr w0, [sp, 28]
bl recv
str w0, [sp, 44]
ldr w0, [sp, 44]
cmp w0, 35
bhi .L52
mov w0, 1
bl exit
.L52:
ldr x0, [sp, 48]
ldrh w0, [x0, 4]
cmp w0, 2
beq .L53
mov w0, 1
bl exit
.L53:
ldr x0, [sp, 48]
add x0, x0, 16
ldr w0, [x0]
neg w0, w0
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 72]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L55
bl __stack_chk_fail
.L55:
mov w0, w1
ldp x29, x30, [sp], 80
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE50:
.size netlink_send, .-netlink_send
.align 2
.type netlink_add_device_impl, %function
netlink_add_device_impl:
.LFB51:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str x0, [sp, 24]
str x1, [sp, 16]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 56]
mov x1, 0
add x0, sp, 40
mov x2, 16
mov w1, 0
bl memset
add x0, sp, 40
mov w3, 16
mov x2, x0
mov w1, 1536
mov w0, 16
bl netlink_init
ldr x0, [sp, 16]
cmp x0, 0
beq .L57
ldr x0, [sp, 16]
bl strlen
mov w2, w0
ldr x1, [sp, 16]
mov w0, 3
bl netlink_attr
.L57:
mov w0, 18
bl netlink_nest
ldr x0, [sp, 24]
bl strlen
mov w2, w0
ldr x1, [sp, 24]
mov w0, 1
bl netlink_attr
nop
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [sp, 56]
ldr x1, [x0]
subs x2, x2, x1
mov x1, 0
beq .L58
bl __stack_chk_fail
.L58:
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE51:
.size netlink_add_device_impl, .-netlink_add_device_impl
.align 2
.type netlink_add_device, %function
netlink_add_device:
.LFB52:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str w0, [sp, 44]
str x1, [sp, 32]
str x2, [sp, 24]
ldr x1, [sp, 24]
ldr x0, [sp, 32]
bl netlink_add_device_impl
bl netlink_done
ldr w0, [sp, 44]
bl netlink_send
str w0, [sp, 60]
nop
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE52:
.size netlink_add_device, .-netlink_add_device
.section .rodata
.align 3
.LC4:
.string "veth"
.text
.align 2
.type netlink_add_veth, %function
netlink_add_veth:
.LFB53:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str w0, [sp, 44]
str x1, [sp, 32]
str x2, [sp, 24]
ldr x1, [sp, 32]
adrp x0, .LC4
add x0, x0, :lo12:.LC4
bl netlink_add_device_impl
mov w0, 2
bl netlink_nest
mov w0, 1
bl netlink_nest
adrp x0, nlmsg
add x0, x0, :lo12:nlmsg
ldr x0, [x0]
add x1, x0, 16
adrp x0, nlmsg
add x0, x0, :lo12:nlmsg
str x1, [x0]
ldr x0, [sp, 24]
bl strlen
mov w2, w0
ldr x1, [sp, 24]
mov w0, 3
bl netlink_attr
bl netlink_done
bl netlink_done
bl netlink_done
ldr w0, [sp, 44]
bl netlink_send
str w0, [sp, 60]
nop
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE53:
.size netlink_add_veth, .-netlink_add_veth
.section .rodata
.align 3
.LC5:
.string "hsr"
.text
.align 2
.type netlink_add_hsr, %function
netlink_add_hsr:
.LFB54:
.cfi_startproc
stp x29, x30, [sp, -80]!
.cfi_def_cfa_offset 80
.cfi_offset 29, -80
.cfi_offset 30, -72
mov x29, sp
str w0, [sp, 44]
str x1, [sp, 32]
str x2, [sp, 24]
str x3, [sp, 16]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 72]
mov x1, 0
ldr x1, [sp, 32]
adrp x0, .LC5
add x0, x0, :lo12:.LC5
bl netlink_add_device_impl
mov w0, 2
bl netlink_nest
ldr x0, [sp, 24]
bl if_nametoindex
str w0, [sp, 60]
add x0, sp, 60
mov w2, 4
mov x1, x0
mov w0, 1
bl netlink_attr
ldr x0, [sp, 16]
bl if_nametoindex
str w0, [sp, 64]
add x0, sp, 64
mov w2, 4
mov x1, x0
mov w0, 2
bl netlink_attr
bl netlink_done
bl netlink_done
ldr w0, [sp, 44]
bl netlink_send
str w0, [sp, 68]
nop
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [sp, 72]
ldr x1, [x0]
subs x2, x2, x1
mov x1, 0
beq .L62
bl __stack_chk_fail
.L62:
ldp x29, x30, [sp], 80
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE54:
.size netlink_add_hsr, .-netlink_add_hsr
.align 2
.type netlink_device_change, %function
netlink_device_change:
.LFB55:
.cfi_startproc
stp x29, x30, [sp, -96]!
.cfi_def_cfa_offset 96
.cfi_offset 29, -96
.cfi_offset 30, -88
mov x29, sp
str w0, [sp, 60]
str x1, [sp, 48]
strb w2, [sp, 59]
str x3, [sp, 40]
str x4, [sp, 32]
str w5, [sp, 28]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 88]
mov x1, 0
add x0, sp, 72
mov x2, 16
mov w1, 0
bl memset
ldrb w0, [sp, 59]
cmp w0, 0
beq .L64
mov w0, 1
str w0, [sp, 84]
ldr w0, [sp, 84]
str w0, [sp, 80]
.L64:
add x0, sp, 72
mov w3, 16
mov x2, x0
mov w1, 0
mov w0, 16
bl netlink_init
ldr x0, [sp, 48]
bl strlen
mov w2, w0
ldr x1, [sp, 48]
mov w0, 3
bl netlink_attr
ldr x0, [sp, 40]
cmp x0, 0
beq .L65
ldr x0, [sp, 40]
bl if_nametoindex
str w0, [sp, 64]
add x0, sp, 64
mov w2, 4
mov x1, x0
mov w0, 10
bl netlink_attr
.L65:
ldr w0, [sp, 28]
cmp w0, 0
beq .L66
ldr w2, [sp, 28]
ldr x1, [sp, 32]
mov w0, 1
bl netlink_attr
.L66:
ldr w0, [sp, 60]
bl netlink_send
str w0, [sp, 68]
nop
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [sp, 88]
ldr x1, [x0]
subs x2, x2, x1
mov x1, 0
beq .L67
bl __stack_chk_fail
.L67:
ldp x29, x30, [sp], 96
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE55:
.size netlink_device_change, .-netlink_device_change
.align 2
.type netlink_add_addr, %function
netlink_add_addr:
.LFB56:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str w0, [sp, 44]
str x1, [sp, 32]
str x2, [sp, 24]
str w3, [sp, 40]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 56]
mov x1, 0
add x0, sp, 48
mov x2, 8
mov w1, 0
bl memset
ldr w0, [sp, 40]
cmp w0, 4
bne .L69
mov w0, 2
b .L70
.L69:
mov w0, 10
.L70:
strb w0, [sp, 48]
ldr w0, [sp, 40]
cmp w0, 4
bne .L71
mov w0, 24
b .L72
.L71:
mov w0, 120
.L72:
strb w0, [sp, 49]
strb wzr, [sp, 51]
ldr x0, [sp, 32]
bl if_nametoindex
str w0, [sp, 52]
add x0, sp, 48
mov w3, 8
mov x2, x0
mov w1, 1280
mov w0, 20
bl netlink_init
ldr w2, [sp, 40]
ldr x1, [sp, 24]
mov w0, 2
bl netlink_attr
ldr w2, [sp, 40]
ldr x1, [sp, 24]
mov w0, 1
bl netlink_attr
ldr w0, [sp, 44]
bl netlink_send
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 56]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L74
bl __stack_chk_fail
.L74:
mov w0, w1
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE56:
.size netlink_add_addr, .-netlink_add_addr
.align 2
.type netlink_add_addr4, %function
netlink_add_addr4:
.LFB57:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str w0, [sp, 44]
str x1, [sp, 32]
str x2, [sp, 24]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 56]
mov x1, 0
add x0, sp, 48
mov x2, x0
ldr x1, [sp, 24]
mov w0, 2
bl inet_pton
add x0, sp, 48
mov w3, 4
mov x2, x0
ldr x1, [sp, 32]
ldr w0, [sp, 44]
bl netlink_add_addr
str w0, [sp, 52]
nop
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [sp, 56]
ldr x1, [x0]
subs x2, x2, x1
mov x1, 0
beq .L76
bl __stack_chk_fail
.L76:
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE57:
.size netlink_add_addr4, .-netlink_add_addr4
.align 2
.type netlink_add_addr6, %function
netlink_add_addr6:
.LFB58:
.cfi_startproc
stp x29, x30, [sp, -80]!
.cfi_def_cfa_offset 80
.cfi_offset 29, -80
.cfi_offset 30, -72
mov x29, sp
str w0, [sp, 44]
str x1, [sp, 32]
str x2, [sp, 24]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 72]
mov x1, 0
add x0, sp, 56
mov x2, x0
ldr x1, [sp, 24]
mov w0, 10
bl inet_pton
add x0, sp, 56
mov w3, 16
mov x2, x0
ldr x1, [sp, 32]
ldr w0, [sp, 44]
bl netlink_add_addr
str w0, [sp, 52]
nop
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [sp, 72]
ldr x1, [x0]
subs x2, x2, x1
mov x1, 0
beq .L78
bl __stack_chk_fail
.L78:
ldp x29, x30, [sp], 80
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE58:
.size netlink_add_addr6, .-netlink_add_addr6
.section .rodata
.align 3
.LC6:
.string "netdevsim%d"
.align 3
.LC7:
.string "ip6gretap"
.align 3
.LC8:
.string "ip6gretap0"
.align 3
.LC0:
.string "bridge"
.align 3
.LC9:
.string "bridge0"
.align 3
.LC10:
.string "vcan"
.align 3
.LC11:
.string "vcan0"
.align 3
.LC1:
.string "bond"
.align 3
.LC12:
.string "bond0"
.align 3
.LC2:
.string "team"
.align 3
.LC13:
.string "team0"
.align 3
.LC14:
.string "dummy"
.align 3
.LC15:
.string "dummy0"
.align 3
.LC16:
.string "nlmon"
.align 3
.LC17:
.string "nlmon0"
.align 3
.LC18:
.string "caif"
.align 3
.LC19:
.string "caif0"
.align 3
.LC20:
.string "batadv"
.align 3
.LC21:
.string "batadv0"
.align 3
.LC22:
.string "vxcan"
.align 3
.LC23:
.string "vxcan1"
.align 3
.LC24:
.string "netdevsim"
.align 3
.LC26:
.string "lo"
.align 3
.LC27:
.string "sit0"
.align 3
.LC28:
.string "tunl0"
.align 3
.LC29:
.string "gre0"
.align 3
.LC30:
.string "gretap0"
.align 3
.LC31:
.string "ip_vti0"
.align 3
.LC32:
.string "ip6_vti0"
.align 3
.LC33:
.string "ip6tnl0"
.align 3
.LC34:
.string "ip6gre0"
.align 3
.LC35:
.string "erspan0"
.align 3
.LC36:
.string "veth0"
.align 3
.LC37:
.string "veth1"
.align 3
.LC38:
.string "veth0_to_bridge"
.align 3
.LC39:
.string "veth1_to_bridge"
.align 3
.LC40:
.string "veth0_to_bond"
.align 3
.LC41:
.string "veth1_to_bond"
.align 3
.LC42:
.string "veth0_to_team"
.align 3
.LC43:
.string "veth1_to_team"
.align 3
.LC44:
.string "veth0_to_hsr"
.align 3
.LC45:
.string "veth1_to_hsr"
.align 3
.LC46:
.string "hsr0"
.align 3
.LC47:
.string "%s_slave_0"
.align 3
.LC48:
.string "veth0_to_%s"
.align 3
.LC49:
.string "%s_slave_1"
.align 3
.LC50:
.string "veth1_to_%s"
.align 3
.LC51:
.string "%s0"
.align 3
.LC52:
.string "bridge_slave_0"
.align 3
.LC53:
.string "bridge_slave_1"
.align 3
.LC54:
.string "hsr_slave_0"
.align 3
.LC55:
.string "hsr_slave_1"
.align 3
.LC56:
.string "172.20.20.%d"
.align 3
.LC57:
.string "fe80::%02x"
.text
.align 2
.type initialize_netdevices, %function
initialize_netdevices:
.LFB59:
.cfi_startproc
sub sp, sp, #944
.cfi_def_cfa_offset 944
stp x29, x30, [sp]
.cfi_offset 29, -944
.cfi_offset 30, -936
mov x29, sp
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 936]
mov x1, 0
adrp x0, procid
add x0, x0, :lo12:procid
ldr x0, [x0]
add x3, sp, 760
mov w2, w0
adrp x0, .LC6
add x1, x0, :lo12:.LC6
mov x0, x3
bl sprintf
adrp x0, .LC7
add x0, x0, :lo12:.LC7
str x0, [sp, 56]
adrp x0, .LC8
add x0, x0, :lo12:.LC8
str x0, [sp, 64]
adrp x0, .LC0
add x0, x0, :lo12:.LC0
str x0, [sp, 72]
adrp x0, .LC9
add x0, x0, :lo12:.LC9
str x0, [sp, 80]
adrp x0, .LC10
add x0, x0, :lo12:.LC10
str x0, [sp, 88]
adrp x0, .LC11
add x0, x0, :lo12:.LC11
str x0, [sp, 96]
adrp x0, .LC1
add x0, x0, :lo12:.LC1
str x0, [sp, 104]
adrp x0, .LC12
add x0, x0, :lo12:.LC12
str x0, [sp, 112]
adrp x0, .LC2
add x0, x0, :lo12:.LC2
str x0, [sp, 120]
adrp x0, .LC13
add x0, x0, :lo12:.LC13
str x0, [sp, 128]
adrp x0, .LC14
add x0, x0, :lo12:.LC14
str x0, [sp, 136]
adrp x0, .LC15
add x0, x0, :lo12:.LC15
str x0, [sp, 144]
adrp x0, .LC16
add x0, x0, :lo12:.LC16
str x0, [sp, 152]
adrp x0, .LC17
add x0, x0, :lo12:.LC17
str x0, [sp, 160]
adrp x0, .LC18
add x0, x0, :lo12:.LC18
str x0, [sp, 168]
adrp x0, .LC19
add x0, x0, :lo12:.LC19
str x0, [sp, 176]
adrp x0, .LC20
add x0, x0, :lo12:.LC20
str x0, [sp, 184]
adrp x0, .LC21
add x0, x0, :lo12:.LC21
str x0, [sp, 192]
adrp x0, .LC22
add x0, x0, :lo12:.LC22
str x0, [sp, 200]
adrp x0, .LC23
add x0, x0, :lo12:.LC23
str x0, [sp, 208]
adrp x0, .LC24
add x0, x0, :lo12:.LC24
str x0, [sp, 216]
add x0, sp, 760
str x0, [sp, 224]
adrp x0, .LC4
add x0, x0, :lo12:.LC4
str x0, [sp, 232]
str xzr, [sp, 240]
adrp x0, .LC25
add x0, x0, :lo12:.LC25
add x2, sp, 32
mov x3, x0
ldp x0, x1, [x3]
stp x0, x1, [x2]
ldr x0, [x3, 16]
str x0, [x2, 16]
add x0, sp, 248
mov x1, 512
mov x2, x1
mov w1, 0
bl memset
adrp x0, .LC26
add x0, x0, :lo12:.LC26
str x0, [sp, 248]
mov w0, 6
str w0, [sp, 256]
adrp x0, .LC27
add x0, x0, :lo12:.LC27
str x0, [sp, 264]
adrp x0, .LC9
add x0, x0, :lo12:.LC9
str x0, [sp, 280]
mov w0, 6
str w0, [sp, 288]
adrp x0, .LC11
add x0, x0, :lo12:.LC11
str x0, [sp, 296]
mov w0, 1
strb w0, [sp, 308]
adrp x0, .LC28
add x0, x0, :lo12:.LC28
str x0, [sp, 312]
adrp x0, .LC29
add x0, x0, :lo12:.LC29
str x0, [sp, 328]
adrp x0, .LC30
add x0, x0, :lo12:.LC30
str x0, [sp, 344]
mov w0, 6
str w0, [sp, 352]
adrp x0, .LC31
add x0, x0, :lo12:.LC31
str x0, [sp, 360]
adrp x0, .LC32
add x0, x0, :lo12:.LC32
str x0, [sp, 376]
adrp x0, .LC33
add x0, x0, :lo12:.LC33
str x0, [sp, 392]
adrp x0, .LC34
add x0, x0, :lo12:.LC34
str x0, [sp, 408]
adrp x0, .LC8
add x0, x0, :lo12:.LC8
str x0, [sp, 424]
mov w0, 6
str w0, [sp, 432]
adrp x0, .LC35
add x0, x0, :lo12:.LC35
str x0, [sp, 440]
mov w0, 6
str w0, [sp, 448]
adrp x0, .LC12
add x0, x0, :lo12:.LC12
str x0, [sp, 456]
mov w0, 6
str w0, [sp, 464]
adrp x0, .LC36
add x0, x0, :lo12:.LC36
str x0, [sp, 472]
mov w0, 6
str w0, [sp, 480]
adrp x0, .LC37
add x0, x0, :lo12:.LC37
str x0, [sp, 488]
mov w0, 6
str w0, [sp, 496]
adrp x0, .LC13
add x0, x0, :lo12:.LC13
str x0, [sp, 504]
mov w0, 6
str w0, [sp, 512]
adrp x0, .LC38
add x0, x0, :lo12:.LC38
str x0, [sp, 520]
mov w0, 6
str w0, [sp, 528]
adrp x0, .LC39
add x0, x0, :lo12:.LC39
str x0, [sp, 536]
mov w0, 6
str w0, [sp, 544]
adrp x0, .LC40
add x0, x0, :lo12:.LC40
str x0, [sp, 552]
mov w0, 6
str w0, [sp, 560]
adrp x0, .LC41
add x0, x0, :lo12:.LC41
str x0, [sp, 568]
mov w0, 6
str w0, [sp, 576]
adrp x0, .LC42
add x0, x0, :lo12:.LC42
str x0, [sp, 584]
mov w0, 6
str w0, [sp, 592]
adrp x0, .LC43
add x0, x0, :lo12:.LC43
str x0, [sp, 600]
mov w0, 6
str w0, [sp, 608]
adrp x0, .LC44
add x0, x0, :lo12:.LC44
str x0, [sp, 616]
mov w0, 6
str w0, [sp, 624]
adrp x0, .LC45
add x0, x0, :lo12:.LC45
str x0, [sp, 632]
mov w0, 6
str w0, [sp, 640]
adrp x0, .LC46
add x0, x0, :lo12:.LC46
str x0, [sp, 648]
adrp x0, .LC15
add x0, x0, :lo12:.LC15
str x0, [sp, 664]
mov w0, 6
str w0, [sp, 672]
adrp x0, .LC17
add x0, x0, :lo12:.LC17
str x0, [sp, 680]
adrp x0, .LC23
add x0, x0, :lo12:.LC23
str x0, [sp, 696]
mov w0, 1
strb w0, [sp, 708]
adrp x0, .LC19
add x0, x0, :lo12:.LC19
str x0, [sp, 712]
mov w0, 6
str w0, [sp, 720]
adrp x0, .LC21
add x0, x0, :lo12:.LC21
str x0, [sp, 728]
mov w0, 6
str w0, [sp, 736]
add x0, sp, 760
str x0, [sp, 744]
mov w0, 6
str w0, [sp, 752]
mov w2, 0
mov w1, 3
mov w0, 16
bl socket
str w0, [sp, 20]
ldr w0, [sp, 20]
cmn w0, #1
bne .L80
mov w0, 1
bl exit
.L80:
str wzr, [sp, 16]
b .L81
.L82:
ldr w0, [sp, 16]
lsl x0, x0, 4
add x1, sp, 56
ldr x3, [x1, x0]
ldr w0, [sp, 16]
lsl x0, x0, 4
add x1, sp, 64
ldr x0, [x1, x0]
mov x2, x0
mov x1, x3
ldr w0, [sp, 20]
bl netlink_add_device
ldr w0, [sp, 16]
add w0, w0, 1
str w0, [sp, 16]
.L81:
ldr w0, [sp, 16]
cmp w0, 11
bls .L82
str wzr, [sp, 16]
b .L83
.L84:
ldr w0, [sp, 16]
lsl x0, x0, 3
add x1, sp, 32
ldr x0, [x1, x0]
add x3, sp, 808
mov x2, x0
adrp x0, .LC47
add x1, x0, :lo12:.LC47
mov x0, x3
bl sprintf
ldr w0, [sp, 16]
lsl x0, x0, 3
add x1, sp, 32
ldr x0, [x1, x0]
add x3, sp, 840
mov x2, x0
adrp x0, .LC48
add x1, x0, :lo12:.LC48
mov x0, x3
bl sprintf
add x1, sp, 840
add x0, sp, 808
mov x2, x1
mov x1, x0
ldr w0, [sp, 20]
bl netlink_add_veth
ldr w0, [sp, 16]
lsl x0, x0, 3
add x1, sp, 32
ldr x0, [x1, x0]
add x3, sp, 872
mov x2, x0
adrp x0, .LC49
add x1, x0, :lo12:.LC49
mov x0, x3
bl sprintf
ldr w0, [sp, 16]
lsl x0, x0, 3
add x1, sp, 32
ldr x0, [x1, x0]
add x3, sp, 904
mov x2, x0
adrp x0, .LC50
add x1, x0, :lo12:.LC50
mov x0, x3
bl sprintf
add x1, sp, 904
add x0, sp, 872
mov x2, x1
mov x1, x0
ldr w0, [sp, 20]
bl netlink_add_veth
ldr w0, [sp, 16]
lsl x0, x0, 3
add x1, sp, 32
ldr x0, [x1, x0]
add x3, sp, 776
mov x2, x0
adrp x0, .LC51
add x1, x0, :lo12:.LC51
mov x0, x3
bl sprintf
add x1, sp, 776
add x0, sp, 808
mov w5, 0
mov x4, 0
mov x3, x1
mov w2, 0
mov x1, x0
ldr w0, [sp, 20]
bl netlink_device_change
add x1, sp, 776
add x0, sp, 872
mov w5, 0
mov x4, 0
mov x3, x1
mov w2, 0
mov x1, x0
ldr w0, [sp, 20]
bl netlink_device_change
ldr w0, [sp, 16]
add w0, w0, 1
str w0, [sp, 16]
.L83:
ldr w0, [sp, 16]
cmp w0, 2
bls .L84
mov w5, 0
mov x4, 0
mov x3, 0
mov w2, 1
adrp x0, .LC52
add x1, x0, :lo12:.LC52
ldr w0, [sp, 20]
bl netlink_device_change
mov w5, 0
mov x4, 0
mov x3, 0
mov w2, 1
adrp x0, .LC53
add x1, x0, :lo12:.LC53
ldr w0, [sp, 20]
bl netlink_device_change
adrp x0, .LC44
add x2, x0, :lo12:.LC44
adrp x0, .LC54
add x1, x0, :lo12:.LC54
ldr w0, [sp, 20]
bl netlink_add_veth
adrp x0, .LC45
add x2, x0, :lo12:.LC45
adrp x0, .LC55
add x1, x0, :lo12:.LC55
ldr w0, [sp, 20]
bl netlink_add_veth
adrp x0, .LC55
add x3, x0, :lo12:.LC55
adrp x0, .LC54
add x2, x0, :lo12:.LC54
adrp x0, .LC46
add x1, x0, :lo12:.LC46
ldr w0, [sp, 20]
bl netlink_add_hsr
mov w5, 0
mov x4, 0
mov x3, 0
mov w2, 1
adrp x0, .LC54
add x1, x0, :lo12:.LC54
ldr w0, [sp, 20]
bl netlink_device_change
mov w5, 0
mov x4, 0
mov x3, 0
mov w2, 1
adrp x0, .LC55
add x1, x0, :lo12:.LC55
ldr w0, [sp, 20]
bl netlink_device_change
str wzr, [sp, 16]
b .L85
.L87:
ldr w0, [sp, 16]
add w0, w0, 10
add x3, sp, 904
mov w2, w0
adrp x0, .LC56
add x1, x0, :lo12:.LC56
mov x0, x3
bl sprintf
ldr w0, [sp, 16]
lsl x0, x0, 4
add x1, sp, 248
ldr x0, [x1, x0]
add x1, sp, 904
mov x2, x1
mov x1, x0
ldr w0, [sp, 20]
bl netlink_add_addr4
ldr w0, [sp, 16]
lsl x0, x0, 4
add x1, sp, 260
ldrb w0, [x1, x0]
eor w0, w0, 1
and w0, w0, 255
cmp w0, 0
beq .L86
ldr w0, [sp, 16]
add w0, w0, 10
add x3, sp, 904
mov w2, w0
adrp x0, .LC57
add x1, x0, :lo12:.LC57
mov x0, x3
bl sprintf
ldr w0, [sp, 16]
lsl x0, x0, 4
add x1, sp, 248
ldr x0, [x1, x0]
add x1, sp, 904
mov x2, x1
mov x1, x0
ldr w0, [sp, 20]
bl netlink_add_addr6
.L86:
ldr w0, [sp, 16]
add x0, x0, 10
lsl x1, x0, 40
mov w0, 2863311530
movk x0, 0xaa, lsl 32
add x0, x1, x0
str x0, [sp, 24]
ldr w0, [sp, 16]
lsl x0, x0, 4
add x1, sp, 248
ldr x6, [x1, x0]
ldr w0, [sp, 16]
lsl x0, x0, 4
add x1, sp, 256
ldr w1, [x1, x0]
add x0, sp, 24
mov w5, w1
mov x4, x0
mov x3, 0
mov w2, 1
mov x1, x6
ldr w0, [sp, 20]
bl netlink_device_change
ldr w0, [sp, 16]
add w0, w0, 1
str w0, [sp, 16]
.L85:
ldr w0, [sp, 16]
cmp w0, 31
bls .L87
ldr w0, [sp, 20]
bl close
nop
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [sp, 936]
ldr x1, [x0]
subs x2, x2, x1
mov x1, 0
beq .L88
bl __stack_chk_fail
.L88:
ldp x29, x30, [sp]
add sp, sp, 944
.cfi_restore 29
.cfi_restore 30
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE59:
.size initialize_netdevices, .-initialize_netdevices
.data
.align 3
.LC25:
.xword .LC0
.xword .LC1
.xword .LC2
.text
.section .rodata
.align 3
.LC58:
.string "nr"
.align 3
.LC59:
.string "rose"
.align 3
.LC60:
.string "%s%d"
.align 3
.LC61:
.string "172.30.%d.%d"
.align 3
.LC62:
.string "fe88::%02x:%02x"
.text
.align 2
.type initialize_netdevices_init, %function
initialize_netdevices_init:
.LFB60:
.cfi_startproc
stp x29, x30, [sp, -144]!
.cfi_def_cfa_offset 144
.cfi_offset 29, -144
.cfi_offset 30, -136
mov x29, sp
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 136]
mov x1, 0
mov w2, 0
mov w1, 3
mov w0, 16
bl socket
str w0, [sp, 24]
ldr w0, [sp, 24]
cmn w0, #1
bne .L90
mov w0, 1
bl exit
.L90:
stp xzr, xzr, [sp, 40]
stp xzr, xzr, [sp, 56]
adrp x0, .LC58
add x0, x0, :lo12:.LC58
str x0, [sp, 40]
mov w0, 7
str w0, [sp, 48]
mov w0, 1
strb w0, [sp, 52]
adrp x0, .LC59
add x0, x0, :lo12:.LC59
str x0, [sp, 56]
mov w0, 5
str w0, [sp, 64]
mov w0, 1
strb w0, [sp, 68]
mov w0, 1
strb w0, [sp, 69]
str wzr, [sp, 20]
b .L91
.L93:
ldr w0, [sp, 20]
lsl x0, x0, 4
add x1, sp, 40
ldr x1, [x1, x0]
adrp x0, procid
add x0, x0, :lo12:procid
ldr x0, [x0]
add x4, sp, 72
mov w3, w0
mov x2, x1
adrp x0, .LC60
add x1, x0, :lo12:.LC60
mov x0, x4
bl sprintf
adrp x0, procid
add x0, x0, :lo12:procid
ldr x0, [x0]
add w0, w0, 1
add x4, sp, 104
mov w3, w0
ldr w2, [sp, 20]
adrp x0, .LC61
add x1, x0, :lo12:.LC61
mov x0, x4
bl sprintf
add x1, sp, 104
add x0, sp, 72
mov x2, x1
mov x1, x0
ldr w0, [sp, 24]
bl netlink_add_addr4
ldr w0, [sp, 20]
lsl x0, x0, 4
add x1, sp, 52
ldrb w0, [x1, x0]
eor w0, w0, 1
and w0, w0, 255
cmp w0, 0
beq .L92
adrp x0, procid
add x0, x0, :lo12:procid
ldr x0, [x0]
add w0, w0, 1
add x4, sp, 104
mov w3, w0
ldr w2, [sp, 20]
adrp x0, .LC62
add x1, x0, :lo12:.LC62
mov x0, x4
bl sprintf
add x1, sp, 104
add x0, sp, 72
mov x2, x1
mov x1, x0
ldr w0, [sp, 24]
bl netlink_add_addr6
.L92:
ldr w0, [sp, 20]
lsl x0, x0, 4
add x1, sp, 48
ldr w0, [x1, x0]
str w0, [sp, 28]
ldr w1, [sp, 20]
ldr w0, [sp, 28]
sub w0, w0, #2
lsl w0, w0, 3
lsl x1, x1, x0
adrp x0, procid
add x0, x0, :lo12:procid
ldr x2, [x0]
ldr w0, [sp, 28]
sub w0, w0, #1
lsl w0, w0, 3
lsl x0, x2, x0
add x1, x1, x0
mov x0, 48059
movk x0, 0xbb, lsl 16
add x0, x1, x0
str x0, [sp, 32]
ldr w0, [sp, 20]
lsl x0, x0, 4
add x1, sp, 53
ldrb w0, [x1, x0]
cmp w0, 0
cset w0, ne
and w0, w0, 255
eor w0, w0, 1
and w0, w0, 255
and w0, w0, 1
and w2, w0, 255
add x1, sp, 32
add x0, sp, 72
ldr w5, [sp, 28]
mov x4, x1
mov x3, 0
mov x1, x0
ldr w0, [sp, 24]
bl netlink_device_change
ldr w0, [sp, 20]
add w0, w0, 1
str w0, [sp, 20]
.L91:
ldr w0, [sp, 20]
cmp w0, 1
bls .L93
ldr w0, [sp, 24]
bl close
nop
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [sp, 136]
ldr x1, [x0]
subs x2, x2, x1
mov x1, 0
beq .L94
bl __stack_chk_fail
.L94:
ldp x29, x30, [sp], 144
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE60:
.size initialize_netdevices_init, .-initialize_netdevices_init
.global kInitNetNsFd
.section .rodata
.align 2
.type kInitNetNsFd, %object
.size kInitNetNsFd, 4
kInitNetNsFd:
.word 239
.align 3
.LC63:
.string "/proc/self/ns/net"
.text
.align 2
.type syz_init_net_socket, %function
syz_init_net_socket:
.LFB61:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str x0, [sp, 40]
str x1, [sp, 32]
str x2, [sp, 24]
mov w1, 0
adrp x0, .LC63
add x0, x0, :lo12:.LC63
bl open
str w0, [sp, 52]
ldr w0, [sp, 52]
cmn w0, #1
bne .L96
ldrsw x0, [sp, 52]
b .L97
.L96:
mov w0, 239
mov w1, 0
bl setns
cmp w0, 0
beq .L98
mov x0, -1
b .L97
.L98:
ldr x0, [sp, 40]
ldr x1, [sp, 32]
ldr x2, [sp, 24]
mov x3, x2
mov x2, x1
mov x1, x0
mov x0, 198
bl syscall
str w0, [sp, 56]
bl __errno_location
ldr w0, [x0]
str w0, [sp, 60]
mov w1, 0
ldr w0, [sp, 52]
bl setns
cmp w0, 0
beq .L99
mov w0, 1
bl exit
.L99:
ldr w0, [sp, 52]
bl close
bl __errno_location
mov x1, x0
ldr w0, [sp, 60]
str w0, [x1]
ldrsw x0, [sp, 56]
.L97:
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE61:
.size syz_init_net_socket, .-syz_init_net_socket
.section .rodata
.align 3
.LC64:
.string "fusectl"
.align 3
.LC65:
.string "/sys/fs/fuse/connections"
.text
.align 2
.type setup_common, %function
setup_common:
.LFB62:
.cfi_startproc
stp x29, x30, [sp, -16]!
.cfi_def_cfa_offset 16
.cfi_offset 29, -16
.cfi_offset 30, -8
mov x29, sp
mov x4, 0
mov x3, 0
adrp x0, .LC64
add x2, x0, :lo12:.LC64
adrp x0, .LC65
add x1, x0, :lo12:.LC65
mov x0, 0
bl mount
nop
ldp x29, x30, [sp], 16
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE62:
.size setup_common, .-setup_common
.align 2
.type sandbox_common, %function
sandbox_common:
.LFB63:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 40]
mov x1, 0
mov w4, 0
mov w3, 0
mov w2, 0
mov w1, 9
mov w0, 1
bl prctl
bl setpgrp
bl setsid
mov w1, 0
adrp x0, .LC63
add x0, x0, :lo12:.LC63
bl open
str w0, [sp, 20]
ldr w0, [sp, 20]
cmn w0, #1
bne .L102
mov w0, 1
bl exit
.L102:
mov w0, 239
mov w1, w0
ldr w0, [sp, 20]
bl dup2
cmp w0, 0
bge .L103
mov w0, 1
bl exit
.L103:
ldr w0, [sp, 20]
bl close
mov x0, 209715200
str x0, [sp, 32]
ldr x0, [sp, 32]
str x0, [sp, 24]
add x0, sp, 24
mov x1, x0
mov w0, 9
bl setrlimit
mov x0, 33554432
str x0, [sp, 32]
ldr x0, [sp, 32]
str x0, [sp, 24]
add x0, sp, 24
mov x1, x0
mov w0, 8
bl setrlimit
mov x0, 142606336
str x0, [sp, 32]
ldr x0, [sp, 32]
str x0, [sp, 24]
add x0, sp, 24
mov x1, x0
mov w0, 1
bl setrlimit
mov x0, 1048576
str x0, [sp, 32]
ldr x0, [sp, 32]
str x0, [sp, 24]
add x0, sp, 24
mov x1, x0
mov w0, 3
bl setrlimit
str xzr, [sp, 32]
ldr x0, [sp, 32]
str x0, [sp, 24]
add x0, sp, 24
mov x1, x0
mov w0, 4
bl setrlimit
mov x0, 256
str x0, [sp, 32]
ldr x0, [sp, 32]
str x0, [sp, 24]
add x0, sp, 24
mov x1, x0
mov w0, 7
bl setrlimit
mov w0, 131072
bl unshare
mov w0, 134217728
bl unshare
mov w0, 33554432
bl unshare
mov w0, 67108864
bl unshare
mov w0, 262144
bl unshare
str wzr, [sp, 16]
b .L104
.L105:
adrp x0, sysctls.0
add x1, x0, :lo12:sysctls.0
ldr w0, [sp, 16]
lsl x0, x0, 4
add x0, x1, x0
ldr x2, [x0]
adrp x0, sysctls.0
add x1, x0, :lo12:sysctls.0
ldr w0, [sp, 16]
lsl x0, x0, 4
add x0, x1, x0
ldr x0, [x0, 8]
mov x1, x0
mov x0, x2
bl write_file
ldr w0, [sp, 16]
add w0, w0, 1
str w0, [sp, 16]
.L104:
ldr w0, [sp, 16]
cmp w0, 6
bls .L105
nop
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [sp, 40]
ldr x1, [x0]
subs x2, x2, x1
mov x1, 0
beq .L106
bl __stack_chk_fail
.L106:
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE63:
.size sandbox_common, .-sandbox_common
.align 2
.global wait_for_loop
.type wait_for_loop, %function
wait_for_loop:
.LFB64:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str w0, [sp, 28]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 40]
mov x1, 0
ldr w0, [sp, 28]
cmp w0, 0
bge .L108
mov w0, 1
bl exit
.L108:
str wzr, [sp, 36]
nop
.L109:
add x0, sp, 36
mov w2, 1073741824
mov x1, x0
mov w0, -1
bl waitpid
mov w1, w0
ldr w0, [sp, 28]
cmp w0, w1
bne .L109
ldr w0, [sp, 36]
asr w0, w0, 8
and w0, w0, 255
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 40]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L111
bl __stack_chk_fail
.L111:
mov w0, w1
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE64:
.size wait_for_loop, .-wait_for_loop
.align 2
.type drop_caps, %function
drop_caps:
.LFB65:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 56]
mov x1, 0
str xzr, [sp, 24]
stp xzr, xzr, [sp, 32]
str xzr, [sp, 48]
mov w0, 1314
movk w0, 0x2008, lsl 16
str w0, [sp, 24]
bl getpid
str w0, [sp, 28]
add x1, sp, 32
add x0, sp, 24
mov x2, x1
mov x1, x0
mov x0, 90
bl syscall
cmp x0, 0
beq .L113
mov w0, 1
bl exit
.L113:
mov w0, 8912896
str w0, [sp, 20]
ldr w1, [sp, 32]
ldr w0, [sp, 20]
mvn w0, w0
and w0, w1, w0
str w0, [sp, 32]
ldr w1, [sp, 36]
ldr w0, [sp, 20]
mvn w0, w0
and w0, w1, w0
str w0, [sp, 36]
ldr w1, [sp, 40]
ldr w0, [sp, 20]
mvn w0, w0
and w0, w1, w0
str w0, [sp, 40]
add x1, sp, 32
add x0, sp, 24
mov x2, x1
mov x1, x0
mov x0, 91
bl syscall
cmp x0, 0
beq .L116
mov w0, 1
bl exit
.L116:
nop
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [sp, 56]
ldr x1, [x0]
subs x2, x2, x1
mov x1, 0
beq .L115
bl __stack_chk_fail
.L115:
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE65:
.size drop_caps, .-drop_caps
.align 2
.type do_sandbox_none, %function
do_sandbox_none:
.LFB66:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
mov w0, 536870912
bl unshare
bl fork
str w0, [sp, 28]
ldr w0, [sp, 28]
cmp w0, 0
beq .L118
ldr w0, [sp, 28]
bl wait_for_loop
b .L120
.L118:
bl setup_common
bl sandbox_common
bl drop_caps
bl initialize_netdevices_init
mov w0, 1073741824
bl unshare
bl initialize_netdevices
bl loop
mov w0, 1
bl exit
.L120:
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE66:
.size do_sandbox_none, .-do_sandbox_none
.section .rodata
.align 3
.LC66:
.string "."
.align 3
.LC67:
.string ".."
.align 3
.LC68:
.string "/sys/fs/fuse/connections/%s/abort"
.text
.align 2
.type kill_and_wait, %function
kill_and_wait:
.LFB67:
.cfi_startproc
stp x29, x30, [sp, -368]!
.cfi_def_cfa_offset 368
.cfi_offset 29, -368
.cfi_offset 30, -360
mov x29, sp
str w0, [sp, 28]
str x1, [sp, 16]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 360]
mov x1, 0
ldr w0, [sp, 28]
neg w0, w0
mov w1, 9
bl kill
mov w1, 9
ldr w0, [sp, 28]
bl kill
str wzr, [sp, 32]
b .L122
.L125:
mov w2, 1
movk w2, 0x4000, lsl 16
ldr x1, [sp, 16]
mov w0, -1
bl waitpid
mov w1, w0
ldr w0, [sp, 28]
cmp w0, w1
beq .L136
mov w0, 1000
bl usleep
ldr w0, [sp, 32]
add w0, w0, 1
str w0, [sp, 32]
.L122:
ldr w0, [sp, 32]
cmp w0, 99
ble .L125
adrp x0, .LC65
add x0, x0, :lo12:.LC65
bl opendir
str x0, [sp, 40]
ldr x0, [sp, 40]
cmp x0, 0
beq .L139
.L133:
ldr x0, [sp, 40]
bl readdir
str x0, [sp, 48]
ldr x0, [sp, 48]
cmp x0, 0
bne .L127
ldr x0, [sp, 40]
bl closedir
b .L139
.L127:
ldr x0, [sp, 48]
add x2, x0, 19
adrp x0, .LC66
add x1, x0, :lo12:.LC66
mov x0, x2
bl strcmp
cmp w0, 0
beq .L137
ldr x0, [sp, 48]
add x2, x0, 19
adrp x0, .LC67
add x1, x0, :lo12:.LC67
mov x0, x2
bl strcmp
cmp w0, 0
beq .L137
ldr x0, [sp, 48]
add x0, x0, 19
add x4, sp, 56
mov x3, x0
adrp x0, .LC68
add x2, x0, :lo12:.LC68
mov x1, 300
mov x0, x4
bl snprintf
add x0, sp, 56
mov w1, 1
bl open
str w0, [sp, 36]
ldr w0, [sp, 36]
cmn w0, #1
beq .L138
add x0, sp, 56
mov x2, 1
mov x1, x0
ldr w0, [sp, 36]
bl write
ldr w0, [sp, 36]
bl close
b .L133
.L137:
nop
b .L133
.L138:
nop
b .L133
.L139:
nop
.L134:
mov w2, 1073741824
ldr x1, [sp, 16]
mov w0, -1
bl waitpid
mov w1, w0
ldr w0, [sp, 28]
cmp w0, w1
bne .L134
b .L121
.L136:
nop
.L121:
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [sp, 360]
ldr x1, [x0]
subs x2, x2, x1
mov x1, 0
beq .L135
bl __stack_chk_fail
.L135:
ldp x29, x30, [sp], 368
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE67:
.size kill_and_wait, .-kill_and_wait
.section .rodata
.align 3
.LC69:
.string "1000"
.align 3
.LC70:
.string "/proc/self/oom_score_adj"
.text
.align 2
.type setup_test, %function
setup_test:
.LFB68:
.cfi_startproc
stp x29, x30, [sp, -16]!
.cfi_def_cfa_offset 16
.cfi_offset 29, -16
.cfi_offset 30, -8
mov x29, sp
mov w4, 0
mov w3, 0
mov w2, 0
mov w1, 9
mov w0, 1
bl prctl
bl setpgrp
adrp x0, .LC69
add x1, x0, :lo12:.LC69
adrp x0, .LC70
add x0, x0, :lo12:.LC70
bl write_file
nop
ldp x29, x30, [sp], 16
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE68:
.size setup_test, .-setup_test
.align 2
.type close_fds, %function
close_fds:
.LFB69:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
mov w0, 3
str w0, [sp, 28]
b .L142
.L143:
ldr w0, [sp, 28]
bl close
ldr w0, [sp, 28]
add w0, w0, 1
str w0, [sp, 28]
.L142:
ldr w0, [sp, 28]
cmp w0, 29
ble .L143
nop
nop
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE69:
.size close_fds, .-close_fds
.local threads
.comm threads,256,8
.local running
.comm running,4,4
.global __aarch64_ldadd4_relax
.align 2
.type thr, %function
thr:
.LFB70:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
ldr x0, [sp, 24]
str x0, [sp, 40]
.L145:
ldr x0, [sp, 40]
add x0, x0, 8
bl event_wait
ldr x0, [sp, 40]
add x0, x0, 8
bl event_reset
ldr x0, [sp, 40]
ldr w0, [x0, 4]
bl execute_call
adrp x0, running
add x1, x0, :lo12:running
mov w0, 1
neg w0, w0
bl __aarch64_ldadd4_relax
ldr x0, [sp, 40]
add x0, x0, 12
bl event_set
b .L145
.cfi_endproc
.LFE70:
.size thr, .-thr
.align 2
.type execute_one, %function
execute_one:
.LFB71:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str wzr, [sp, 36]
.L147:
str wzr, [sp, 28]
b .L148
.L156:
str wzr, [sp, 32]
b .L149
.L155:
ldrsw x0, [sp, 32]
lsl x1, x0, 4
adrp x0, threads
add x0, x0, :lo12:threads
add x0, x1, x0
str x0, [sp, 40]
ldr x0, [sp, 40]
ldr w0, [x0]
cmp w0, 0
bne .L150
ldr x0, [sp, 40]
mov w1, 1
str w1, [x0]
ldr x0, [sp, 40]
add x0, x0, 8
bl event_init
ldr x0, [sp, 40]
add x0, x0, 12
bl event_init
ldr x0, [sp, 40]
add x0, x0, 12
bl event_set
ldr x1, [sp, 40]
adrp x0, thr
add x0, x0, :lo12:thr
bl thread_start
.L150:
ldr x0, [sp, 40]
add x0, x0, 12
bl event_isset
cmp w0, 0
beq .L162
ldr x0, [sp, 40]
add x0, x0, 12
bl event_reset
ldr x0, [sp, 40]
ldr w1, [sp, 28]
str w1, [x0, 4]
adrp x0, running
add x0, x0, :lo12:running
mov x1, x0
mov w0, 1
bl __aarch64_ldadd4_relax
ldr x0, [sp, 40]
add x0, x0, 8
bl event_set
ldr w0, [sp, 36]
cmp w0, 0
beq .L153
ldr w0, [sp, 28]
and w0, w0, 1
cmp w0, 0
beq .L163
.L153:
ldr x0, [sp, 40]
add x0, x0, 12
mov x1, 45
bl event_timedwait
b .L154
.L162:
nop
ldr w0, [sp, 32]
add w0, w0, 1
str w0, [sp, 32]
.L149:
ldr w0, [sp, 32]
cmp w0, 15
ble .L155
b .L154
.L163:
nop
.L154:
ldr w0, [sp, 28]
add w0, w0, 1
str w0, [sp, 28]
.L148:
ldr w0, [sp, 28]
cmp w0, 3
ble .L156
str wzr, [sp, 24]
b .L157
.L159:
mov x0, 1
bl sleep_ms
ldr w0, [sp, 24]
add w0, w0, 1
str w0, [sp, 24]
.L157:
ldr w0, [sp, 24]
cmp w0, 99
bgt .L158
adrp x0, running
add x0, x0, :lo12:running
ldr w0, [x0]
cmp w0, 0
bne .L159
.L158:
bl close_fds
ldr w0, [sp, 36]
cmp w0, 0
bne .L164
mov w0, 1
str w0, [sp, 36]
b .L147
.L164:
nop
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE71:
.size execute_one, .-execute_one
.align 2
.type loop, %function
loop:
.LFB72:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 40]
mov x1, 0
str wzr, [sp, 24]
.L173:
bl fork
str w0, [sp, 28]
ldr w0, [sp, 28]
cmp w0, 0
bge .L166
mov w0, 1
bl exit
.L166:
ldr w0, [sp, 28]
cmp w0, 0
bne .L167
bl setup_test
bl execute_one
mov w0, 0
bl exit
.L167:
str wzr, [sp, 20]
bl current_time_ms
str x0, [sp, 32]
.L172:
add x0, sp, 20
mov w2, 1
movk w2, 0x4000, lsl 16
mov x1, x0
mov w0, -1
bl waitpid
mov w1, w0
ldr w0, [sp, 28]
cmp w0, w1
beq .L176
mov x0, 1
bl sleep_ms
bl current_time_ms
mov x1, x0
ldr x0, [sp, 32]
sub x1, x1, x0
mov x0, 4999
cmp x1, x0
bls .L177
add x0, sp, 20
mov x1, x0
ldr w0, [sp, 28]
bl kill_and_wait
b .L169
.L177:
nop
b .L172
.L176:
nop
.L169:
ldr w0, [sp, 24]
add w0, w0, 1
str w0, [sp, 24]
b .L173
.cfi_endproc
.LFE72:
.size loop, .-loop
.global r
.data
.align 3
.type r, %object
.size r, 8
r:
.xword -1
.global __aarch64_ldadd4_acq_rel
.text
.align 2
.type execute_call, %function
execute_call:
.LFB73:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str w0, [sp, 28]
ldr w0, [sp, 28]
cmp w0, 3
beq .L179
ldr w0, [sp, 28]
cmp w0, 3
bgt .L241
ldr w0, [sp, 28]
cmp w0, 2
beq .L181
ldr w0, [sp, 28]
cmp w0, 2
bgt .L241
ldr w0, [sp, 28]
cmp w0, 0
beq .L182
ldr w0, [sp, 28]
cmp w0, 1
beq .L183
b .L241
.L182:
mov x2, 0
mov x1, 5
mov x0, 6
bl syz_init_net_socket
str x0, [sp, 40]
ldr x0, [sp, 40]
cmn x0, #1
beq .L242
ldr x1, [sp, 40]
adrp x0, r
add x0, x0, :lo12:r
str x1, [x0]
b .L242
.L183:
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:skip_segv, lsl #12
add x0, x0, #:tprel_lo12_nc:skip_segv
mov x1, x0
mov w0, 1
bl __aarch64_ldadd4_acq_rel
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:segv_env, lsl #12
add x0, x0, #:tprel_lo12_nc:segv_env
bl _setjmp
cmp w0, 0
bne .L186
mov x0, 536870912
mov w1, 6
strh w1, [x0]
.L186:
mrs x0, tpidr_el0
add x1, x0, #:tprel_hi12:skip_segv, lsl #12
add x1, x1, #:tprel_lo12_nc:skip_segv
mov w0, 1
neg w0, w0
bl __aarch64_ldadd4_acq_rel
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:skip_segv, lsl #12
add x0, x0, #:tprel_lo12_nc:skip_segv
mov x1, x0
mov w0, 1
bl __aarch64_ldadd4_acq_rel
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:segv_env, lsl #12
add x0, x0, #:tprel_lo12_nc:segv_env
bl _setjmp
cmp w0, 0
bne .L187
mov x0, 2
movk x0, 0x2000, lsl 16
mov w1, -69
strb w1, [x0]
.L187:
mrs x0, tpidr_el0
add x1, x0, #:tprel_hi12:skip_segv, lsl #12
add x1, x1, #:tprel_lo12_nc:skip_segv
mov w0, 1
neg w0, w0
bl __aarch64_ldadd4_acq_rel
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:skip_segv, lsl #12
add x0, x0, #:tprel_lo12_nc:skip_segv
mov x1, x0
mov w0, 1
bl __aarch64_ldadd4_acq_rel
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:segv_env, lsl #12
add x0, x0, #:tprel_lo12_nc:segv_env
bl _setjmp
cmp w0, 0
bne .L188
mov x0, 3
movk x0, 0x2000, lsl 16
mov w1, -69
strb w1, [x0]
.L188:
mrs x0, tpidr_el0
add x1, x0, #:tprel_hi12:skip_segv, lsl #12
add x1, x1, #:tprel_lo12_nc:skip_segv
mov w0, 1
neg w0, w0
bl __aarch64_ldadd4_acq_rel
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:skip_segv, lsl #12
add x0, x0, #:tprel_lo12_nc:skip_segv
mov x1, x0
mov w0, 1
bl __aarch64_ldadd4_acq_rel
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:segv_env, lsl #12
add x0, x0, #:tprel_lo12_nc:segv_env
bl _setjmp
cmp w0, 0
bne .L189
mov x0, 4
movk x0, 0x2000, lsl 16
mov w1, -69
strb w1, [x0]
.L189:
mrs x0, tpidr_el0
add x1, x0, #:tprel_hi12:skip_segv, lsl #12
add x1, x1, #:tprel_lo12_nc:skip_segv
mov w0, 1
neg w0, w0
bl __aarch64_ldadd4_acq_rel
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:skip_segv, lsl #12
add x0, x0, #:tprel_lo12_nc:skip_segv
mov x1, x0
mov w0, 1
bl __aarch64_ldadd4_acq_rel
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:segv_env, lsl #12
add x0, x0, #:tprel_lo12_nc:segv_env
bl _setjmp
cmp w0, 0
bne .L190
mov x0, 5
movk x0, 0x2000, lsl 16
mov w1, 1
strb w1, [x0]
.L190:
mrs x0, tpidr_el0
add x1, x0, #:tprel_hi12:skip_segv, lsl #12
add x1, x1, #:tprel_lo12_nc:skip_segv
mov w0, 1
neg w0, w0
bl __aarch64_ldadd4_acq_rel
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:skip_segv, lsl #12
add x0, x0, #:tprel_lo12_nc:skip_segv
mov x1, x0
mov w0, 1
bl __aarch64_ldadd4_acq_rel
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:segv_env, lsl #12
add x0, x0, #:tprel_lo12_nc:segv_env
bl _setjmp
cmp w0, 0
bne .L191
mov x0, 6
movk x0, 0x2000, lsl 16
strb wzr, [x0]
.L191:
mrs x0, tpidr_el0
add x1, x0, #:tprel_hi12:skip_segv, lsl #12
add x1, x1, #:tprel_lo12_nc:skip_segv
mov w0, 1
neg w0, w0
bl __aarch64_ldadd4_acq_rel
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:skip_segv, lsl #12
add x0, x0, #:tprel_lo12_nc:skip_segv
mov x1, x0
mov w0, 1
bl __aarch64_ldadd4_acq_rel
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:segv_env, lsl #12
add x0, x0, #:tprel_lo12_nc:segv_env
bl _setjmp
cmp w0, 0
bne .L192
mov x0, 12
movk x0, 0x2000, lsl 16
str wzr, [x0]
.L192:
mrs x0, tpidr_el0
add x1, x0, #:tprel_hi12:skip_segv, lsl #12
add x1, x1, #:tprel_lo12_nc:skip_segv
mov w0, 1
neg w0, w0
bl __aarch64_ldadd4_acq_rel
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:skip_segv, lsl #12
add x0, x0, #:tprel_lo12_nc:skip_segv
mov x1, x0
mov w0, 1
bl __aarch64_ldadd4_acq_rel
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:segv_env, lsl #12
add x0, x0, #:tprel_lo12_nc:segv_env
bl _setjmp
cmp w0, 0
bne .L193
mov x0, 16
movk x0, 0x2000, lsl 16
mov w1, -69
strb w1, [x0]
.L193:
mrs x0, tpidr_el0
add x1, x0, #:tprel_hi12:skip_segv, lsl #12
add x1, x1, #:tprel_lo12_nc:skip_segv
mov w0, 1
neg w0, w0
bl __aarch64_ldadd4_acq_rel
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:skip_segv, lsl #12
add x0, x0, #:tprel_lo12_nc:skip_segv
mov x1, x0
mov w0, 1
bl __aarch64_ldadd4_acq_rel
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:segv_env, lsl #12
add x0, x0, #:tprel_lo12_nc:segv_env
bl _setjmp
cmp w0, 0
bne .L194
mov x0, 17
movk x0, 0x2000, lsl 16
mov w1, -69
strb w1, [x0]
.L194:
mrs x0, tpidr_el0
add x1, x0, #:tprel_hi12:skip_segv, lsl #12
add x1, x1, #:tprel_lo12_nc:skip_segv
mov w0, 1
neg w0, w0
bl __aarch64_ldadd4_acq_rel
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:skip_segv, lsl #12
add x0, x0, #:tprel_lo12_nc:skip_segv
mov x1, x0
mov w0, 1
bl __aarch64_ldadd4_acq_rel
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:segv_env, lsl #12
add x0, x0, #:tprel_lo12_nc:segv_env
bl _setjmp
cmp w0, 0
bne .L195
mov x0, 18
movk x0, 0x2000, lsl 16
mov w1, -69
strb w1, [x0]
.L195:
mrs x0, tpidr_el0
add x1, x0, #:tprel_hi12:skip_segv, lsl #12
add x1, x1, #:tprel_lo12_nc:skip_segv
mov w0, 1
neg w0, w0
bl __aarch64_ldadd4_acq_rel
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:skip_segv, lsl #12
add x0, x0, #:tprel_lo12_nc:skip_segv
mov x1, x0
mov w0, 1
bl __aarch64_ldadd4_acq_rel
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:segv_env, lsl #12
add x0, x0, #:tprel_lo12_nc:segv_env
bl _setjmp
cmp w0, 0
bne .L196
mov x0, 19
movk x0, 0x2000, lsl 16
mov w1, 1
strb w1, [x0]
.L196:
mrs x0, tpidr_el0
add x1, x0, #:tprel_hi12:skip_segv, lsl #12
add x1, x1, #:tprel_lo12_nc:skip_segv
mov w0, 1
neg w0, w0
bl __aarch64_ldadd4_acq_rel
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:skip_segv, lsl #12
add x0, x0, #:tprel_lo12_nc:skip_segv
mov x1, x0
mov w0, 1
bl __aarch64_ldadd4_acq_rel
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:segv_env, lsl #12
add x0, x0, #:tprel_lo12_nc:segv_env
bl _setjmp
cmp w0, 0
bne .L197
mov x0, 20
movk x0, 0x2000, lsl 16
strb wzr, [x0]
.L197:
mrs x0, tpidr_el0
add x1, x0, #:tprel_hi12:skip_segv, lsl #12
add x1, x1, #:tprel_lo12_nc:skip_segv
mov w0, 1
neg w0, w0
bl __aarch64_ldadd4_acq_rel
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:skip_segv, lsl #12
add x0, x0, #:tprel_lo12_nc:skip_segv
mov x1, x0
mov w0, 1
bl __aarch64_ldadd4_acq_rel
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:segv_env, lsl #12
add x0, x0, #:tprel_lo12_nc:segv_env
bl _setjmp
cmp w0, 0
bne .L198
mov x0, 23
movk x0, 0x2000, lsl 16
mov w1, -69
strb w1, [x0]
.L198:
mrs x0, tpidr_el0
add x1, x0, #:tprel_hi12:skip_segv, lsl #12
add x1, x1, #:tprel_lo12_nc:skip_segv
mov w0, 1
neg w0, w0
bl __aarch64_ldadd4_acq_rel
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:skip_segv, lsl #12
add x0, x0, #:tprel_lo12_nc:skip_segv
mov x1, x0
mov w0, 1
bl __aarch64_ldadd4_acq_rel
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:segv_env, lsl #12
add x0, x0, #:tprel_lo12_nc:segv_env
bl _setjmp
cmp w0, 0
bne .L199
mov x0, 24
movk x0, 0x2000, lsl 16
mov w1, -69
strb w1, [x0]
.L199:
mrs x0, tpidr_el0
add x1, x0, #:tprel_hi12:skip_segv, lsl #12
add x1, x1, #:tprel_lo12_nc:skip_segv
mov w0, 1
neg w0, w0
bl __aarch64_ldadd4_acq_rel
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:skip_segv, lsl #12
add x0, x0, #:tprel_lo12_nc:skip_segv
mov x1, x0
mov w0, 1
bl __aarch64_ldadd4_acq_rel
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:segv_env, lsl #12
add x0, x0, #:tprel_lo12_nc:segv_env
bl _setjmp
cmp w0, 0
bne .L200
mov x0, 25
movk x0, 0x2000, lsl 16
mov w1, -69
strb w1, [x0]
.L200:
mrs x0, tpidr_el0
add x1, x0, #:tprel_hi12:skip_segv, lsl #12
add x1, x1, #:tprel_lo12_nc:skip_segv
mov w0, 1
neg w0, w0
bl __aarch64_ldadd4_acq_rel
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:skip_segv, lsl #12
add x0, x0, #:tprel_lo12_nc:skip_segv
mov x1, x0
mov w0, 1
bl __aarch64_ldadd4_acq_rel
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:segv_env, lsl #12
add x0, x0, #:tprel_lo12_nc:segv_env
bl _setjmp
cmp w0, 0
bne .L201
mov x0, 26
movk x0, 0x2000, lsl 16
mov w1, 1
strb w1, [x0]
.L201:
mrs x0, tpidr_el0
add x1, x0, #:tprel_hi12:skip_segv, lsl #12
add x1, x1, #:tprel_lo12_nc:skip_segv
mov w0, 1
neg w0, w0
bl __aarch64_ldadd4_acq_rel
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:skip_segv, lsl #12
add x0, x0, #:tprel_lo12_nc:skip_segv
mov x1, x0
mov w0, 1
bl __aarch64_ldadd4_acq_rel
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:segv_env, lsl #12
add x0, x0, #:tprel_lo12_nc:segv_env
bl _setjmp
cmp w0, 0
bne .L202
mov x0, 27
movk x0, 0x2000, lsl 16
strb wzr, [x0]
.L202:
mrs x0, tpidr_el0
add x1, x0, #:tprel_hi12:skip_segv, lsl #12
add x1, x1, #:tprel_lo12_nc:skip_segv
mov w0, 1
neg w0, w0
bl __aarch64_ldadd4_acq_rel
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:skip_segv, lsl #12
add x0, x0, #:tprel_lo12_nc:skip_segv
mov x1, x0
mov w0, 1
bl __aarch64_ldadd4_acq_rel
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:segv_env, lsl #12
add x0, x0, #:tprel_lo12_nc:segv_env
bl _setjmp
cmp w0, 0
bne .L203
mov x0, 30
movk x0, 0x2000, lsl 16
mov w1, -104
strb w1, [x0]
.L203:
mrs x0, tpidr_el0
add x1, x0, #:tprel_hi12:skip_segv, lsl #12
add x1, x1, #:tprel_lo12_nc:skip_segv
mov w0, 1
neg w0, w0
bl __aarch64_ldadd4_acq_rel
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:skip_segv, lsl #12
add x0, x0, #:tprel_lo12_nc:skip_segv
mov x1, x0
mov w0, 1
bl __aarch64_ldadd4_acq_rel
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:segv_env, lsl #12
add x0, x0, #:tprel_lo12_nc:segv_env
bl _setjmp
cmp w0, 0
bne .L204
mov x0, 31
movk x0, 0x2000, lsl 16
mov w1, -110
strb w1, [x0]
.L204:
mrs x0, tpidr_el0
add x1, x0, #:tprel_hi12:skip_segv, lsl #12
add x1, x1, #:tprel_lo12_nc:skip_segv
mov w0, 1
neg w0, w0
bl __aarch64_ldadd4_acq_rel
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:skip_segv, lsl #12
add x0, x0, #:tprel_lo12_nc:skip_segv
mov x1, x0
mov w0, 1
bl __aarch64_ldadd4_acq_rel
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:segv_env, lsl #12
add x0, x0, #:tprel_lo12_nc:segv_env
bl _setjmp
cmp w0, 0
bne .L205
mov x0, 32
movk x0, 0x2000, lsl 16
mov w1, -100
strb w1, [x0]
.L205:
mrs x0, tpidr_el0
add x1, x0, #:tprel_hi12:skip_segv, lsl #12
add x1, x1, #:tprel_lo12_nc:skip_segv
mov w0, 1
neg w0, w0
bl __aarch64_ldadd4_acq_rel
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:skip_segv, lsl #12
add x0, x0, #:tprel_lo12_nc:skip_segv
mov x1, x0
mov w0, 1
bl __aarch64_ldadd4_acq_rel
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:segv_env, lsl #12
add x0, x0, #:tprel_lo12_nc:segv_env
bl _setjmp
cmp w0, 0
bne .L206
mov x0, 33
movk x0, 0x2000, lsl 16
mov w1, -86
strb w1, [x0]
.L206:
mrs x0, tpidr_el0
add x1, x0, #:tprel_hi12:skip_segv, lsl #12
add x1, x1, #:tprel_lo12_nc:skip_segv
mov w0, 1
neg w0, w0
bl __aarch64_ldadd4_acq_rel
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:skip_segv, lsl #12
add x0, x0, #:tprel_lo12_nc:skip_segv
mov x1, x0
mov w0, 1
bl __aarch64_ldadd4_acq_rel
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:segv_env, lsl #12
add x0, x0, #:tprel_lo12_nc:segv_env
bl _setjmp
cmp w0, 0
bne .L207
mov x0, 34
movk x0, 0x2000, lsl 16
mov w1, -80
strb w1, [x0]
.L207:
mrs x0, tpidr_el0
add x1, x0, #:tprel_hi12:skip_segv, lsl #12
add x1, x1, #:tprel_lo12_nc:skip_segv
mov w0, 1
neg w0, w0
bl __aarch64_ldadd4_acq_rel
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:skip_segv, lsl #12
add x0, x0, #:tprel_lo12_nc:skip_segv
mov x1, x0
mov w0, 1
bl __aarch64_ldadd4_acq_rel
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:segv_env, lsl #12
add x0, x0, #:tprel_lo12_nc:segv_env
bl _setjmp
cmp w0, 0
bne .L208
mov x0, 35
movk x0, 0x2000, lsl 16
mov w1, 64
strb w1, [x0]
.L208:
mrs x0, tpidr_el0
add x1, x0, #:tprel_hi12:skip_segv, lsl #12
add x1, x1, #:tprel_lo12_nc:skip_segv
mov w0, 1
neg w0, w0
bl __aarch64_ldadd4_acq_rel
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:skip_segv, lsl #12
add x0, x0, #:tprel_lo12_nc:skip_segv
mov x1, x0
mov w0, 1
bl __aarch64_ldadd4_acq_rel
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:segv_env, lsl #12
add x0, x0, #:tprel_lo12_nc:segv_env
bl _setjmp
cmp w0, 0
bne .L209
mov x0, 36
movk x0, 0x2000, lsl 16
mov w1, 2
strb w1, [x0]
.L209:
mrs x0, tpidr_el0
add x1, x0, #:tprel_hi12:skip_segv, lsl #12
add x1, x1, #:tprel_lo12_nc:skip_segv
mov w0, 1
neg w0, w0
bl __aarch64_ldadd4_acq_rel
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:skip_segv, lsl #12
add x0, x0, #:tprel_lo12_nc:skip_segv
mov x1, x0
mov w0, 1
bl __aarch64_ldadd4_acq_rel
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:segv_env, lsl #12
add x0, x0, #:tprel_lo12_nc:segv_env
bl _setjmp
cmp w0, 0
bne .L210
mov x0, 37
movk x0, 0x2000, lsl 16
mov w1, -69
strb w1, [x0]
.L210:
mrs x0, tpidr_el0
add x1, x0, #:tprel_hi12:skip_segv, lsl #12
add x1, x1, #:tprel_lo12_nc:skip_segv
mov w0, 1
neg w0, w0
bl __aarch64_ldadd4_acq_rel
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:skip_segv, lsl #12
add x0, x0, #:tprel_lo12_nc:skip_segv
mov x1, x0
mov w0, 1
bl __aarch64_ldadd4_acq_rel
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:segv_env, lsl #12
add x0, x0, #:tprel_lo12_nc:segv_env
bl _setjmp
cmp w0, 0
bne .L211
mov x0, 38
movk x0, 0x2000, lsl 16
mov w1, -69
strb w1, [x0]
.L211:
mrs x0, tpidr_el0
add x1, x0, #:tprel_hi12:skip_segv, lsl #12
add x1, x1, #:tprel_lo12_nc:skip_segv
mov w0, 1
neg w0, w0
bl __aarch64_ldadd4_acq_rel
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:skip_segv, lsl #12
add x0, x0, #:tprel_lo12_nc:skip_segv
mov x1, x0
mov w0, 1
bl __aarch64_ldadd4_acq_rel
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:segv_env, lsl #12
add x0, x0, #:tprel_lo12_nc:segv_env
bl _setjmp
cmp w0, 0
bne .L212
mov x0, 39
movk x0, 0x2000, lsl 16
mov w1, -69
strb w1, [x0]
.L212:
mrs x0, tpidr_el0
add x1, x0, #:tprel_hi12:skip_segv, lsl #12
add x1, x1, #:tprel_lo12_nc:skip_segv
mov w0, 1
neg w0, w0
bl __aarch64_ldadd4_acq_rel
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:skip_segv, lsl #12
add x0, x0, #:tprel_lo12_nc:skip_segv
mov x1, x0
mov w0, 1
bl __aarch64_ldadd4_acq_rel
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:segv_env, lsl #12
add x0, x0, #:tprel_lo12_nc:segv_env
bl _setjmp
cmp w0, 0
bne .L213
mov x0, 40
movk x0, 0x2000, lsl 16
mov w1, -69
strb w1, [x0]
.L213:
mrs x0, tpidr_el0
add x1, x0, #:tprel_hi12:skip_segv, lsl #12
add x1, x1, #:tprel_lo12_nc:skip_segv
mov w0, 1
neg w0, w0
bl __aarch64_ldadd4_acq_rel
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:skip_segv, lsl #12
add x0, x0, #:tprel_lo12_nc:skip_segv
mov x1, x0
mov w0, 1
bl __aarch64_ldadd4_acq_rel
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:segv_env, lsl #12
add x0, x0, #:tprel_lo12_nc:segv_env
bl _setjmp
cmp w0, 0
bne .L214
mov x0, 41
movk x0, 0x2000, lsl 16
mov w1, -69
strb w1, [x0]
.L214:
mrs x0, tpidr_el0
add x1, x0, #:tprel_hi12:skip_segv, lsl #12
add x1, x1, #:tprel_lo12_nc:skip_segv
mov w0, 1
neg w0, w0
bl __aarch64_ldadd4_acq_rel
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:skip_segv, lsl #12
add x0, x0, #:tprel_lo12_nc:skip_segv
mov x1, x0
mov w0, 1
bl __aarch64_ldadd4_acq_rel
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:segv_env, lsl #12
add x0, x0, #:tprel_lo12_nc:segv_env
bl _setjmp
cmp w0, 0
bne .L215
mov x0, 42
movk x0, 0x2000, lsl 16
strb wzr, [x0]
.L215:
mrs x0, tpidr_el0
add x1, x0, #:tprel_hi12:skip_segv, lsl #12
add x1, x1, #:tprel_lo12_nc:skip_segv
mov w0, 1
neg w0, w0
bl __aarch64_ldadd4_acq_rel
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:skip_segv, lsl #12
add x0, x0, #:tprel_lo12_nc:skip_segv
mov x1, x0
mov w0, 1
bl __aarch64_ldadd4_acq_rel
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:segv_env, lsl #12
add x0, x0, #:tprel_lo12_nc:segv_env
bl _setjmp
cmp w0, 0
bne .L216
mov x0, 43
movk x0, 0x2000, lsl 16
strb wzr, [x0]
.L216:
mrs x0, tpidr_el0
add x1, x0, #:tprel_hi12:skip_segv, lsl #12
add x1, x1, #:tprel_lo12_nc:skip_segv
mov w0, 1
neg w0, w0
bl __aarch64_ldadd4_acq_rel
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:skip_segv, lsl #12
add x0, x0, #:tprel_lo12_nc:skip_segv
mov x1, x0
mov w0, 1
bl __aarch64_ldadd4_acq_rel
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:segv_env, lsl #12
add x0, x0, #:tprel_lo12_nc:segv_env
bl _setjmp
cmp w0, 0
bne .L217
mov x0, 44
movk x0, 0x2000, lsl 16
mov w1, -69
strb w1, [x0]
.L217:
mrs x0, tpidr_el0
add x1, x0, #:tprel_hi12:skip_segv, lsl #12
add x1, x1, #:tprel_lo12_nc:skip_segv
mov w0, 1
neg w0, w0
bl __aarch64_ldadd4_acq_rel
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:skip_segv, lsl #12
add x0, x0, #:tprel_lo12_nc:skip_segv
mov x1, x0
mov w0, 1
bl __aarch64_ldadd4_acq_rel
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:segv_env, lsl #12
add x0, x0, #:tprel_lo12_nc:segv_env
bl _setjmp
cmp w0, 0
bne .L218
mov x0, 45
movk x0, 0x2000, lsl 16
mov w1, -69
strb w1, [x0]
.L218:
mrs x0, tpidr_el0
add x1, x0, #:tprel_hi12:skip_segv, lsl #12
add x1, x1, #:tprel_lo12_nc:skip_segv
mov w0, 1
neg w0, w0
bl __aarch64_ldadd4_acq_rel
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:skip_segv, lsl #12
add x0, x0, #:tprel_lo12_nc:skip_segv
mov x1, x0
mov w0, 1
bl __aarch64_ldadd4_acq_rel
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:segv_env, lsl #12
add x0, x0, #:tprel_lo12_nc:segv_env
bl _setjmp
cmp w0, 0
bne .L219
mov x0, 46
movk x0, 0x2000, lsl 16
mov w1, -69
strb w1, [x0]
.L219:
mrs x0, tpidr_el0
add x1, x0, #:tprel_hi12:skip_segv, lsl #12
add x1, x1, #:tprel_lo12_nc:skip_segv
mov w0, 1
neg w0, w0
bl __aarch64_ldadd4_acq_rel
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:skip_segv, lsl #12
add x0, x0, #:tprel_lo12_nc:skip_segv
mov x1, x0
mov w0, 1
bl __aarch64_ldadd4_acq_rel
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:segv_env, lsl #12
add x0, x0, #:tprel_lo12_nc:segv_env
bl _setjmp
cmp w0, 0
bne .L220
mov x0, 47
movk x0, 0x2000, lsl 16
mov w1, -69
strb w1, [x0]
.L220:
mrs x0, tpidr_el0
add x1, x0, #:tprel_hi12:skip_segv, lsl #12
add x1, x1, #:tprel_lo12_nc:skip_segv
mov w0, 1
neg w0, w0
bl __aarch64_ldadd4_acq_rel
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:skip_segv, lsl #12
add x0, x0, #:tprel_lo12_nc:skip_segv
mov x1, x0
mov w0, 1
bl __aarch64_ldadd4_acq_rel
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:segv_env, lsl #12
add x0, x0, #:tprel_lo12_nc:segv_env
bl _setjmp
cmp w0, 0
bne .L221
mov x0, 48
movk x0, 0x2000, lsl 16
mov w1, -69
strb w1, [x0]
.L221:
mrs x0, tpidr_el0
add x1, x0, #:tprel_hi12:skip_segv, lsl #12
add x1, x1, #:tprel_lo12_nc:skip_segv
mov w0, 1
neg w0, w0
bl __aarch64_ldadd4_acq_rel
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:skip_segv, lsl #12
add x0, x0, #:tprel_lo12_nc:skip_segv
mov x1, x0
mov w0, 1
bl __aarch64_ldadd4_acq_rel
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:segv_env, lsl #12
add x0, x0, #:tprel_lo12_nc:segv_env
bl _setjmp
cmp w0, 0
bne .L222
mov x0, 49
movk x0, 0x2000, lsl 16
strb wzr, [x0]
.L222:
mrs x0, tpidr_el0
add x1, x0, #:tprel_hi12:skip_segv, lsl #12
add x1, x1, #:tprel_lo12_nc:skip_segv
mov w0, 1
neg w0, w0
bl __aarch64_ldadd4_acq_rel
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:skip_segv, lsl #12
add x0, x0, #:tprel_lo12_nc:skip_segv
mov x1, x0
mov w0, 1
bl __aarch64_ldadd4_acq_rel
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:segv_env, lsl #12
add x0, x0, #:tprel_lo12_nc:segv_env
bl _setjmp
cmp w0, 0
bne .L223
mov x0, 50
movk x0, 0x2000, lsl 16
strb wzr, [x0]
.L223:
mrs x0, tpidr_el0
add x1, x0, #:tprel_hi12:skip_segv, lsl #12
add x1, x1, #:tprel_lo12_nc:skip_segv
mov w0, 1
neg w0, w0
bl __aarch64_ldadd4_acq_rel
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:skip_segv, lsl #12
add x0, x0, #:tprel_lo12_nc:skip_segv
mov x1, x0
mov w0, 1
bl __aarch64_ldadd4_acq_rel
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:segv_env, lsl #12
add x0, x0, #:tprel_lo12_nc:segv_env
bl _setjmp
cmp w0, 0
bne .L224
mov x0, 51
movk x0, 0x2000, lsl 16
mov w1, -69
strb w1, [x0]
.L224:
mrs x0, tpidr_el0
add x1, x0, #:tprel_hi12:skip_segv, lsl #12
add x1, x1, #:tprel_lo12_nc:skip_segv
mov w0, 1
neg w0, w0
bl __aarch64_ldadd4_acq_rel
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:skip_segv, lsl #12
add x0, x0, #:tprel_lo12_nc:skip_segv
mov x1, x0
mov w0, 1
bl __aarch64_ldadd4_acq_rel
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:segv_env, lsl #12
add x0, x0, #:tprel_lo12_nc:segv_env
bl _setjmp
cmp w0, 0
bne .L225
mov x0, 52
movk x0, 0x2000, lsl 16
mov w1, -69
strb w1, [x0]
.L225:
mrs x0, tpidr_el0
add x1, x0, #:tprel_hi12:skip_segv, lsl #12
add x1, x1, #:tprel_lo12_nc:skip_segv
mov w0, 1
neg w0, w0
bl __aarch64_ldadd4_acq_rel
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:skip_segv, lsl #12
add x0, x0, #:tprel_lo12_nc:skip_segv
mov x1, x0
mov w0, 1
bl __aarch64_ldadd4_acq_rel
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:segv_env, lsl #12
add x0, x0, #:tprel_lo12_nc:segv_env
bl _setjmp
cmp w0, 0
bne .L226
mov x0, 53
movk x0, 0x2000, lsl 16
mov w1, -69
strb w1, [x0]
.L226:
mrs x0, tpidr_el0
add x1, x0, #:tprel_hi12:skip_segv, lsl #12
add x1, x1, #:tprel_lo12_nc:skip_segv
mov w0, 1
neg w0, w0
bl __aarch64_ldadd4_acq_rel
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:skip_segv, lsl #12
add x0, x0, #:tprel_lo12_nc:skip_segv
mov x1, x0
mov w0, 1
bl __aarch64_ldadd4_acq_rel
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:segv_env, lsl #12
add x0, x0, #:tprel_lo12_nc:segv_env
bl _setjmp
cmp w0, 0
bne .L227
mov x0, 54
movk x0, 0x2000, lsl 16
mov w1, 1
strb w1, [x0]
.L227:
mrs x0, tpidr_el0
add x1, x0, #:tprel_hi12:skip_segv, lsl #12
add x1, x1, #:tprel_lo12_nc:skip_segv
mov w0, 1
neg w0, w0
bl __aarch64_ldadd4_acq_rel
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:skip_segv, lsl #12
add x0, x0, #:tprel_lo12_nc:skip_segv
mov x1, x0
mov w0, 1
bl __aarch64_ldadd4_acq_rel
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:segv_env, lsl #12
add x0, x0, #:tprel_lo12_nc:segv_env
bl _setjmp
cmp w0, 0
bne .L228
mov x0, 55
movk x0, 0x2000, lsl 16
strb wzr, [x0]
.L228:
mrs x0, tpidr_el0
add x1, x0, #:tprel_hi12:skip_segv, lsl #12
add x1, x1, #:tprel_lo12_nc:skip_segv
mov w0, 1
neg w0, w0
bl __aarch64_ldadd4_acq_rel
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:skip_segv, lsl #12
add x0, x0, #:tprel_lo12_nc:skip_segv
mov x1, x0
mov w0, 1
bl __aarch64_ldadd4_acq_rel
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:segv_env, lsl #12
add x0, x0, #:tprel_lo12_nc:segv_env
bl _setjmp
cmp w0, 0
bne .L229
mov x0, 58
movk x0, 0x2000, lsl 16
mov w1, -69
strb w1, [x0]
.L229:
mrs x0, tpidr_el0
add x1, x0, #:tprel_hi12:skip_segv, lsl #12
add x1, x1, #:tprel_lo12_nc:skip_segv
mov w0, 1
neg w0, w0
bl __aarch64_ldadd4_acq_rel
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:skip_segv, lsl #12
add x0, x0, #:tprel_lo12_nc:skip_segv
mov x1, x0
mov w0, 1
bl __aarch64_ldadd4_acq_rel
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:segv_env, lsl #12
add x0, x0, #:tprel_lo12_nc:segv_env
bl _setjmp
cmp w0, 0
bne .L230
mov x0, 59
movk x0, 0x2000, lsl 16
mov w1, -69
strb w1, [x0]
.L230:
mrs x0, tpidr_el0
add x1, x0, #:tprel_hi12:skip_segv, lsl #12
add x1, x1, #:tprel_lo12_nc:skip_segv
mov w0, 1
neg w0, w0
bl __aarch64_ldadd4_acq_rel
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:skip_segv, lsl #12
add x0, x0, #:tprel_lo12_nc:skip_segv
mov x1, x0
mov w0, 1
bl __aarch64_ldadd4_acq_rel
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:segv_env, lsl #12
add x0, x0, #:tprel_lo12_nc:segv_env
bl _setjmp
cmp w0, 0
bne .L231
mov x0, 60
movk x0, 0x2000, lsl 16
mov w1, -69
strb w1, [x0]
.L231:
mrs x0, tpidr_el0
add x1, x0, #:tprel_hi12:skip_segv, lsl #12
add x1, x1, #:tprel_lo12_nc:skip_segv
mov w0, 1
neg w0, w0
bl __aarch64_ldadd4_acq_rel
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:skip_segv, lsl #12
add x0, x0, #:tprel_lo12_nc:skip_segv
mov x1, x0
mov w0, 1
bl __aarch64_ldadd4_acq_rel
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:segv_env, lsl #12
add x0, x0, #:tprel_lo12_nc:segv_env
bl _setjmp
cmp w0, 0
bne .L232
mov x0, 61
movk x0, 0x2000, lsl 16
mov w1, 1
strb w1, [x0]
.L232:
mrs x0, tpidr_el0
add x1, x0, #:tprel_hi12:skip_segv, lsl #12
add x1, x1, #:tprel_lo12_nc:skip_segv
mov w0, 1
neg w0, w0
bl __aarch64_ldadd4_acq_rel
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:skip_segv, lsl #12
add x0, x0, #:tprel_lo12_nc:skip_segv
mov x1, x0
mov w0, 1
bl __aarch64_ldadd4_acq_rel
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:segv_env, lsl #12
add x0, x0, #:tprel_lo12_nc:segv_env
bl _setjmp
cmp w0, 0
bne .L233
mov x0, 62
movk x0, 0x2000, lsl 16
strb wzr, [x0]
.L233:
mrs x0, tpidr_el0
add x1, x0, #:tprel_hi12:skip_segv, lsl #12
add x1, x1, #:tprel_lo12_nc:skip_segv
mov w0, 1
neg w0, w0
bl __aarch64_ldadd4_acq_rel
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:skip_segv, lsl #12
add x0, x0, #:tprel_lo12_nc:skip_segv
mov x1, x0
mov w0, 1
bl __aarch64_ldadd4_acq_rel
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:segv_env, lsl #12
add x0, x0, #:tprel_lo12_nc:segv_env
bl _setjmp
cmp w0, 0
bne .L234
mov x0, 65
movk x0, 0x2000, lsl 16
mov w1, -52
strb w1, [x0]
.L234:
mrs x0, tpidr_el0
add x1, x0, #:tprel_hi12:skip_segv, lsl #12
add x1, x1, #:tprel_lo12_nc:skip_segv
mov w0, 1
neg w0, w0
bl __aarch64_ldadd4_acq_rel
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:skip_segv, lsl #12
add x0, x0, #:tprel_lo12_nc:skip_segv
mov x1, x0
mov w0, 1
bl __aarch64_ldadd4_acq_rel
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:segv_env, lsl #12
add x0, x0, #:tprel_lo12_nc:segv_env
bl _setjmp
cmp w0, 0
bne .L235
mov x0, 66
movk x0, 0x2000, lsl 16
mov w1, -52
strb w1, [x0]
.L235:
mrs x0, tpidr_el0
add x1, x0, #:tprel_hi12:skip_segv, lsl #12
add x1, x1, #:tprel_lo12_nc:skip_segv
mov w0, 1
neg w0, w0
bl __aarch64_ldadd4_acq_rel
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:skip_segv, lsl #12
add x0, x0, #:tprel_lo12_nc:skip_segv
mov x1, x0
mov w0, 1
bl __aarch64_ldadd4_acq_rel
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:segv_env, lsl #12
add x0, x0, #:tprel_lo12_nc:segv_env
bl _setjmp
cmp w0, 0
bne .L236
mov x0, 67
movk x0, 0x2000, lsl 16
mov w1, -52
strb w1, [x0]
.L236:
mrs x0, tpidr_el0
add x1, x0, #:tprel_hi12:skip_segv, lsl #12
add x1, x1, #:tprel_lo12_nc:skip_segv
mov w0, 1
neg w0, w0
bl __aarch64_ldadd4_acq_rel
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:skip_segv, lsl #12
add x0, x0, #:tprel_lo12_nc:skip_segv
mov x1, x0
mov w0, 1
bl __aarch64_ldadd4_acq_rel
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:segv_env, lsl #12
add x0, x0, #:tprel_lo12_nc:segv_env
bl _setjmp
cmp w0, 0
bne .L237
mov x0, 68
movk x0, 0x2000, lsl 16
mov w1, -52
strb w1, [x0]
.L237:
mrs x0, tpidr_el0
add x1, x0, #:tprel_hi12:skip_segv, lsl #12
add x1, x1, #:tprel_lo12_nc:skip_segv
mov w0, 1
neg w0, w0
bl __aarch64_ldadd4_acq_rel
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:skip_segv, lsl #12
add x0, x0, #:tprel_lo12_nc:skip_segv
mov x1, x0
mov w0, 1
bl __aarch64_ldadd4_acq_rel
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:segv_env, lsl #12
add x0, x0, #:tprel_lo12_nc:segv_env
bl _setjmp
cmp w0, 0
bne .L238
mov x0, 69
movk x0, 0x2000, lsl 16
mov w1, -52
strb w1, [x0]
.L238:
mrs x0, tpidr_el0
add x1, x0, #:tprel_hi12:skip_segv, lsl #12
add x1, x1, #:tprel_lo12_nc:skip_segv
mov w0, 1
neg w0, w0
bl __aarch64_ldadd4_acq_rel
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:skip_segv, lsl #12
add x0, x0, #:tprel_lo12_nc:skip_segv
mov x1, x0
mov w0, 1
bl __aarch64_ldadd4_acq_rel
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:segv_env, lsl #12
add x0, x0, #:tprel_lo12_nc:segv_env
bl _setjmp
cmp w0, 0
bne .L239
mov x0, 70
movk x0, 0x2000, lsl 16
mov w1, -52
strb w1, [x0]
.L239:
mrs x0, tpidr_el0
add x1, x0, #:tprel_hi12:skip_segv, lsl #12
add x1, x1, #:tprel_lo12_nc:skip_segv
mov w0, 1
neg w0, w0
bl __aarch64_ldadd4_acq_rel
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:skip_segv, lsl #12
add x0, x0, #:tprel_lo12_nc:skip_segv
mov x1, x0
mov w0, 1
bl __aarch64_ldadd4_acq_rel
mrs x0, tpidr_el0
add x0, x0, #:tprel_hi12:segv_env, lsl #12
add x0, x0, #:tprel_lo12_nc:segv_env
bl _setjmp
cmp w0, 0
bne .L240
mov x0, 71
movk x0, 0x2000, lsl 16
strb wzr, [x0]
.L240:
mrs x0, tpidr_el0
add x1, x0, #:tprel_hi12:skip_segv, lsl #12
add x1, x1, #:tprel_lo12_nc:skip_segv
mov w0, 1
neg w0, w0
bl __aarch64_ldadd4_acq_rel
adrp x0, r
add x0, x0, :lo12:r
ldr x0, [x0]
mov w3, 72
mov w2, 536870912
mov x1, x0
mov x0, 203
bl syscall
b .L180
.L181:
adrp x0, r
add x0, x0, :lo12:r
ldr x0, [x0]
mov w2, 0
mov x1, x0
mov x0, 201
bl syscall
b .L180
.L179:
adrp x0, r
add x0, x0, :lo12:r
ldr x0, [x0]
mov w3, 0
mov w2, 0
mov x1, x0
mov x0, 202
bl syscall
b .L180
.L242:
nop
.L180:
.L241:
nop
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE73:
.size execute_call, .-execute_call
.align 2
.global main
.type main, %function
main:
.LFB74:
.cfi_startproc
stp x29, x30, [sp, -16]!
.cfi_def_cfa_offset 16
.cfi_offset 29, -16
.cfi_offset 30, -8
mov x29, sp
mov w6, 0
mov w5, -1
mov w4, 50
mov w3, 3
mov w2, 16777216
mov w1, 536870912
mov x0, 222
bl syscall
bl install_segv_handler
adrp x0, procid
add x0, x0, :lo12:procid
str xzr, [x0]
b .L244
.L246:
bl fork
cmp w0, 0
bne .L245
bl do_sandbox_none
.L245:
adrp x0, procid
add x0, x0, :lo12:procid
ldr x0, [x0]
add x1, x0, 1
adrp x0, procid
add x0, x0, :lo12:procid
str x1, [x0]
.L244:
adrp x0, procid
add x0, x0, :lo12:procid
ldr x0, [x0]
cmp x0, 5
bls .L246
mov w0, 16960
movk w0, 0xf, lsl 16
bl sleep
mov w0, 0
ldp x29, x30, [sp], 16
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE74:
.size main, .-main
.section .rodata
.align 3
.LC71:
.string "/proc/sys/kernel/shmmax"
.align 3
.LC72:
.string "16777216"
.align 3
.LC73:
.string "/proc/sys/kernel/shmall"
.align 3
.LC74:
.string "536870912"
.align 3
.LC75:
.string "/proc/sys/kernel/shmmni"
.align 3
.LC76:
.string "1024"
.align 3
.LC77:
.string "/proc/sys/kernel/msgmax"
.align 3
.LC78:
.string "8192"
.align 3
.LC79:
.string "/proc/sys/kernel/msgmni"
.align 3
.LC80:
.string "/proc/sys/kernel/msgmnb"
.align 3
.LC81:
.string "/proc/sys/kernel/sem"
.align 3
.LC82:
.string "1024 1048576 500 1024"
.section .data.rel.ro.local,"aw"
.align 3
.type sysctls.0, %object
.size sysctls.0, 112
sysctls.0:
.xword .LC71
.xword .LC72
.xword .LC73
.xword .LC74
.xword .LC75
.xword .LC76
.xword .LC77
.xword .LC78
.xword .LC79
.xword .LC76
.xword .LC80
.xword .LC76
.xword .LC81
.xword .LC82
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.global n
.bss
.align 2
.type n, %object
.size n, 4
n:
.zero 4
.global x
.align 2
.type x, %object
.size x, 4
x:
.zero 4
.global y
.align 2
.type y, %object
.size y, 4
y:
.zero 4
.global __1
.align 2
.type __1, %object
.size __1, 4
__1:
.zero 4
.global __2
.align 2
.type __2, %object
.size __2, 4
__2:
.zero 4
.global __3
.align 2
.type __3, %object
.size __3, 4
__3:
.zero 4
.global __4
.align 2
.type __4, %object
.size __4, 4
__4:
.zero 4
.global __5
.align 2
.type __5, %object
.size __5, 4
__5:
.zero 4
.global __6
.align 2
.type __6, %object
.size __6, 4
__6:
.zero 4
.text
.align 2
.global main
.type main, %function
main:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -16]!
.cfi_def_cfa_offset 16
.cfi_offset 29, -16
.cfi_offset 30, -8
mov x29, sp
bl __VERIFIER_nondet_int
.cfi_endproc
.LFE0:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC0:
.string "usage: mkbuiltin1 sys\n"
.align 3
.LC1:
.string "in file $1.6 s/PACKAGE/$1/\n"
.align 3
.LC2:
.string "init_%s_function"
.align 3
.LC3:
.string "O"
.align 3
.LC4:
.string "%s.%s"
.align 3
.LC5:
.string "r"
.align 3
.LC6:
.string "open %s: %s\n"
.align 3
.LC7:
.string "$$"
.align 3
.LC8:
.string "did not find beginning of imports\n"
.align 3
.LC9:
.string "char *%simport =\n"
.align 3
.LC10:
.string "\t\""
.align 3
.LC11:
.string "%s"
.align 3
.LC12:
.string "PACKAGE"
.align 3
.LC13:
.string "\\n\"\n"
.align 3
.LC14:
.string "did not find end of imports\n"
.align 3
.LC15:
.string "\t\"$$\\n\";"
.text
.align 2
.global main
.type main, %function
main:
.LFB6:
.cfi_startproc
sub sp, sp, #2144
.cfi_def_cfa_offset 2144
stp x29, x30, [sp]
.cfi_offset 29, -2144
.cfi_offset 30, -2136
mov x29, sp
str x19, [sp, 16]
.cfi_offset 19, -2128
str w0, [sp, 44]
str x1, [sp, 32]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 2136]
mov x1, 0
ldr w0, [sp, 44]
cmp w0, 2
beq .L2
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x0, [x0]
mov x3, x0
mov x2, 22
mov x1, 1
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl fwrite
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x0, [x0]
mov x3, x0
mov x2, 27
mov x1, 1
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl fwrite
mov w0, 1
bl exit
.L2:
ldr x0, [sp, 32]
ldr x0, [x0, 8]
str x0, [sp, 64]
add x4, sp, 1112
ldr x3, [sp, 64]
adrp x0, .LC2
add x2, x0, :lo12:.LC2
mov x1, 1024
mov x0, x4
bl snprintf
adrp x0, .LC3
add x0, x0, :lo12:.LC3
bl getenv
add x5, sp, 88
mov x4, x0
ldr x3, [sp, 64]
adrp x0, .LC4
add x2, x0, :lo12:.LC4
mov x1, 1024
mov x0, x5
bl snprintf
add x2, sp, 88
adrp x0, .LC5
add x1, x0, :lo12:.LC5
mov x0, x2
bl fopen
str x0, [sp, 72]
ldr x0, [sp, 72]
cmp x0, 0
bne .L4
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x19, [x0]
bl __errno_location
ldr w0, [x0]
bl strerror
mov x1, x0
add x0, sp, 88
mov x3, x1
mov x2, x0
adrp x0, .LC6
add x1, x0, :lo12:.LC6
mov x0, x19
bl fprintf
mov w0, 1
bl exit
.L6:
add x2, sp, 88
adrp x0, .LC7
add x1, x0, :lo12:.LC7
mov x0, x2
bl strstr
cmp x0, 0
bne .L20
.L4:
add x0, sp, 88
ldr x2, [sp, 72]
mov w1, 1024
bl fgets
cmp x0, 0
bne .L6
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x0, [x0]
mov x3, x0
mov x2, 34
mov x1, 1
adrp x0, .LC8
add x0, x0, :lo12:.LC8
bl fwrite
mov w0, 1
bl exit
.L20:
nop
.L5:
ldr x1, [sp, 64]
adrp x0, .LC9
add x0, x0, :lo12:.LC9
bl printf
b .L7
.L15:
add x0, sp, 88
bl strlen
sub x0, x0, #1
add x1, sp, 88
strb wzr, [x1, x0]
add x2, sp, 88
adrp x0, .LC7
add x1, x0, :lo12:.LC7
mov x0, x2
bl strstr
cmp x0, 0
bne .L21
add x0, sp, 88
str x0, [sp, 56]
b .L10
.L11:
ldr x0, [sp, 56]
add x0, x0, 1
str x0, [sp, 56]
.L10:
ldr x0, [sp, 56]
ldrb w0, [x0]
cmp w0, 32
beq .L11
ldr x0, [sp, 56]
ldrb w0, [x0]
cmp w0, 9
beq .L11
add x1, sp, 1112
add x0, sp, 88
bl strstr
cmp x0, 0
beq .L12
b .L7
.L12:
adrp x0, .LC10
add x0, x0, :lo12:.LC10
bl printf
b .L13
.L14:
ldr x0, [sp, 80]
strb wzr, [x0]
ldr x0, [sp, 56]
bl esc
ldr x1, [sp, 64]
adrp x0, .LC11
add x0, x0, :lo12:.LC11
bl printf
ldr x0, [sp, 80]
add x0, x0, 7
str x0, [sp, 56]
.L13:
adrp x0, .LC12
add x1, x0, :lo12:.LC12
ldr x0, [sp, 56]
bl strstr
str x0, [sp, 80]
ldr x0, [sp, 80]
cmp x0, 0
bne .L14
ldr x0, [sp, 56]
bl esc
ldr x1, [sp, 56]
adrp x0, .LC13
add x0, x0, :lo12:.LC13
bl printf
.L7:
add x0, sp, 88
ldr x2, [sp, 72]
mov w1, 1024
bl fgets
cmp x0, 0
bne .L15
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x0, [x0]
mov x3, x0
mov x2, 28
mov x1, 1
adrp x0, .LC14
add x0, x0, :lo12:.LC14
bl fwrite
mov w0, 1
bl exit
.L21:
nop
.L9:
adrp x0, .LC15
add x0, x0, :lo12:.LC15
bl puts
mov w0, 0
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 2136]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L17
bl __stack_chk_fail
.L17:
mov w0, w1
ldr x19, [sp, 16]
ldp x29, x30, [sp]
add sp, sp, 2144
.cfi_restore 29
.cfi_restore 30
.cfi_restore 19
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE6:
.size main, .-main
.align 2
.global esc
.type esc, %function
esc:
.LFB7:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str x0, [sp, 24]
b .L23
.L26:
ldr x0, [sp, 24]
ldrb w0, [x0]
cmp w0, 92
beq .L24
ldr x0, [sp, 24]
ldrb w0, [x0]
cmp w0, 34
bne .L25
.L24:
mov w0, 92
bl putchar
.L25:
ldr x0, [sp, 24]
ldrb w0, [x0]
bl putchar
ldr x0, [sp, 24]
add x0, x0, 1
str x0, [sp, 24]
.L23:
ldr x0, [sp, 24]
ldrb w0, [x0]
cmp w0, 0
bne .L26
nop
nop
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE7:
.size esc, .-esc
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.type MESSAGE, %object
.size MESSAGE, 18
MESSAGE:
.string "TODAYISMYBIRTHDAY"
.align 3
.type CIPHER, %object
.size CIPHER, 7
CIPHER:
.string "REDDIT"
.align 3
.LC0:
.string "%s"
.text
.align 2
.global main
.type main, %function
main:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
mov x0, 17
str x0, [sp, 24]
mov x0, 6
str x0, [sp, 32]
ldr x0, [sp, 24]
add x0, x0, 1
mov x1, 1
bl calloc
str x0, [sp, 40]
str wzr, [sp, 16]
str wzr, [sp, 20]
b .L2
.L3:
adrp x0, MESSAGE
add x1, x0, :lo12:MESSAGE
ldrsw x0, [sp, 16]
ldrb w0, [x1, x0]
sub w0, w0, #65
adrp x1, CIPHER
add x2, x1, :lo12:CIPHER
ldrsw x1, [sp, 20]
ldrb w1, [x2, x1]
add w0, w0, w1
sub w0, w0, #65
mov w1, 60495
movk w1, 0x4ec4, lsl 16
smull x1, w0, w1
lsr x1, x1, 32
asr w2, w1, 3
asr w1, w0, 31
sub w1, w2, w1
mov w2, 26
mul w1, w1, w2
sub w1, w0, w1
and w1, w1, 255
ldrsw x0, [sp, 16]
ldr x2, [sp, 40]
add x0, x2, x0
add w1, w1, 65
and w1, w1, 255
strb w1, [x0]
ldr w0, [sp, 16]
add w0, w0, 1
str w0, [sp, 16]
ldrsw x0, [sp, 16]
ldr x1, [sp, 32]
udiv x2, x0, x1
ldr x1, [sp, 32]
mul x1, x2, x1
sub x0, x0, x1
str w0, [sp, 20]
.L2:
ldrsw x0, [sp, 16]
ldr x1, [sp, 24]
cmp x1, x0
bhi .L3
ldr x1, [sp, 40]
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl printf
ldr x0, [sp, 40]
bl free
mov w0, 0
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC0:
.string "\n%d"
.text
.align 2
.global main
.type main, %function
main:
.LFB6:
.cfi_startproc
stp x29, x30, [sp, -80]!
.cfi_def_cfa_offset 80
.cfi_offset 29, -80
.cfi_offset 30, -72
mov x29, sp
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 72]
mov x1, 0
str wzr, [sp, 16]
mov x0, 0
bl time
bl srand
b .L2
.L7:
bl rand
mov w2, w0
mov w0, 26215
movk w0, 0x6666, lsl 16
smull x0, w2, w0
lsr x0, x0, 32
asr w1, w0, 2
asr w0, w2, 31
sub w1, w1, w0
mov w0, w1
lsl w0, w0, 2
add w0, w0, w1
lsl w0, w0, 1
sub w1, w2, w0
add w0, w1, 1
str w0, [sp, 28]
str wzr, [sp, 24]
str wzr, [sp, 20]
b .L3
.L6:
ldrsw x0, [sp, 20]
lsl x0, x0, 2
add x1, sp, 32
ldr w0, [x1, x0]
ldr w1, [sp, 28]
cmp w1, w0
bne .L4
mov w0, 1
str w0, [sp, 24]
b .L5
.L4:
ldr w0, [sp, 20]
add w0, w0, 1
str w0, [sp, 20]
.L3:
ldr w1, [sp, 20]
ldr w0, [sp, 16]
cmp w1, w0
blt .L6
.L5:
ldr w0, [sp, 24]
cmp w0, 0
bne .L2
ldrsw x0, [sp, 16]
lsl x0, x0, 2
add x1, sp, 32
ldr w2, [sp, 28]
str w2, [x1, x0]
ldr w1, [sp, 28]
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl printf
ldr w0, [sp, 16]
add w0, w0, 1
str w0, [sp, 16]
.L2:
ldr w0, [sp, 16]
cmp w0, 9
ble .L7
mov w0, 0
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 72]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L9
bl __stack_chk_fail
.L9:
mov w0, w1
ldp x29, x30, [sp], 80
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE6:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.type tray_init, %function
tray_init:
.LFB0:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str x0, [sp, 8]
mov w0, -1
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size tray_init, .-tray_init
.align 2
.type tray_loop, %function
tray_loop:
.LFB1:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str w0, [sp, 12]
mov w0, -1
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE1:
.size tray_loop, .-tray_loop
.align 2
.type tray_update, %function
tray_update:
.LFB2:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str x0, [sp, 8]
nop
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE2:
.size tray_update, .-tray_update
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global float_absval
.type float_absval, %function
float_absval:
.LFB0:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str w0, [sp, 12]
ldr w0, [sp, 12]
lsr w0, w0, 23
and w0, w0, 255
str w0, [sp, 24]
ldr w0, [sp, 12]
and w0, w0, 8388607
str w0, [sp, 28]
ldr w0, [sp, 24]
cmp w0, 255
bne .L2
ldr w0, [sp, 28]
cmp w0, 0
beq .L2
ldr w0, [sp, 12]
b .L3
.L2:
ldr w0, [sp, 24]
lsl w1, w0, 23
ldr w0, [sp, 28]
orr w0, w1, w0
.L3:
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size float_absval, .-float_absval
.align 2
.global f2u
.type f2u, %function
f2u:
.LFB1:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str s0, [sp, 12]
ldr s0, [sp, 12]
str s0, [sp, 24]
ldr w0, [sp, 24]
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE1:
.size f2u, .-f2u
.section .rodata
.align 3
.LC0:
.string "%f(0x%X): %f\n"
.text
.align 2
.global main
.type main, %function
main:
.LFB2:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str d8, [sp, 16]
.cfi_offset 72, -32
movi v0.2s, 0x80, lsl 24
str s0, [sp, 40]
ldr s0, [sp, 40]
bl f2u
str w0, [sp, 44]
ldr s0, [sp, 40]
fcvt d8, s0
ldr w0, [sp, 44]
bl float_absval
bl u2f
fcvt d0, s0
fmov d1, d0
ldr w1, [sp, 44]
fmov d0, d8
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl printf
str wzr, [sp, 40]
ldr s0, [sp, 40]
bl f2u
str w0, [sp, 44]
ldr s0, [sp, 40]
fcvt d8, s0
ldr w0, [sp, 44]
bl float_absval
bl u2f
fcvt d0, s0
fmov d1, d0
ldr w1, [sp, 44]
fmov d0, d8
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl printf
fmov s0, 1.0e+0
str s0, [sp, 40]
ldr s0, [sp, 40]
bl f2u
str w0, [sp, 44]
ldr s0, [sp, 40]
fcvt d8, s0
ldr w0, [sp, 44]
bl float_absval
bl u2f
fcvt d0, s0
fmov d1, d0
ldr w1, [sp, 44]
fmov d0, d8
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl printf
fmov s0, -1.0e+0
str s0, [sp, 40]
ldr s0, [sp, 40]
bl f2u
str w0, [sp, 44]
ldr s0, [sp, 40]
fcvt d8, s0
ldr w0, [sp, 44]
bl float_absval
bl u2f
fcvt d0, s0
fmov d1, d0
ldr w1, [sp, 44]
fmov d0, d8
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl printf
mov w0, 2139095040
bl u2f
str s0, [sp, 40]
ldr s0, [sp, 40]
bl f2u
str w0, [sp, 44]
ldr s0, [sp, 40]
fcvt d8, s0
ldr w0, [sp, 44]
bl float_absval
bl u2f
fcvt d0, s0
fmov d1, d0
ldr w1, [sp, 44]
fmov d0, d8
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl printf
mov w0, -8388608
bl u2f
str s0, [sp, 40]
ldr s0, [sp, 40]
bl f2u
str w0, [sp, 44]
ldr s0, [sp, 40]
fcvt d8, s0
ldr w0, [sp, 44]
bl float_absval
bl u2f
fcvt d0, s0
fmov d1, d0
ldr w1, [sp, 44]
fmov d0, d8
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl printf
mov w0, 1
movk w0, 0x7f80, lsl 16
bl u2f
str s0, [sp, 40]
ldr s0, [sp, 40]
bl f2u
str w0, [sp, 44]
ldr s0, [sp, 40]
fcvt d8, s0
ldr w0, [sp, 44]
bl float_absval
bl u2f
fcvt d0, s0
fmov d1, d0
ldr w1, [sp, 44]
fmov d0, d8
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl printf
mov w0, 0
ldr d8, [sp, 16]
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_restore 72
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE2:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC0:
.string "\nEnter an integer > "
.align 3
.LC1:
.string "%d"
.align 3
.LC2:
.string "\n%d\nThat's all, have a nice day!\n"
.align 3
.LC3:
.string "\n%d"
.align 3
.LC4:
.string "\nThat's all, have a nice day!"
.text
.align 2
.global main
.type main, %function
main:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 24]
mov x1, 0
str wzr, [sp, 20]
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl printf
add x0, sp, 16
mov x1, x0
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl __isoc99_scanf
ldr w0, [sp, 16]
cmp w0, 0
bne .L2
ldr w1, [sp, 20]
adrp x0, .LC2
add x0, x0, :lo12:.LC2
bl printf
.L2:
ldr w0, [sp, 16]
cmp w0, 0
ble .L3
.L4:
ldr w2, [sp, 16]
mov w0, 26215
movk w0, 0x6666, lsl 16
smull x0, w2, w0
lsr x0, x0, 32
asr w1, w0, 2
asr w0, w2, 31
sub w1, w1, w0
mov w0, w1
lsl w0, w0, 2
add w0, w0, w1
lsl w0, w0, 1
sub w1, w2, w0
adrp x0, .LC3
add x0, x0, :lo12:.LC3
bl printf
ldr w0, [sp, 16]
mov w1, 26215
movk w1, 0x6666, lsl 16
smull x1, w0, w1
lsr x1, x1, 32
asr w1, w1, 2
asr w0, w0, 31
sub w0, w1, w0
str w0, [sp, 16]
ldr w0, [sp, 16]
cmp w0, 0
bgt .L4
adrp x0, .LC4
add x0, x0, :lo12:.LC4
bl puts
b .L5
.L3:
ldr w0, [sp, 16]
cmp w0, 0
bge .L5
.L8:
ldr w0, [sp, 16]
cmn w0, #10
bge .L6
ldr w2, [sp, 16]
mov w0, 26215
movk w0, 0x6666, lsl 16
smull x0, w2, w0
lsr x0, x0, 32
asr w1, w0, 2
asr w0, w2, 31
sub w1, w1, w0
mov w0, w1
lsl w0, w0, 2
add w0, w0, w1
lsl w0, w0, 1
sub w1, w2, w0
neg w0, w1
mov w1, w0
adrp x0, .LC3
add x0, x0, :lo12:.LC3
bl printf
ldr w0, [sp, 16]
mov w1, 26215
movk w1, 0x6666, lsl 16
smull x1, w0, w1
lsr x1, x1, 32
asr w1, w1, 2
asr w0, w0, 31
sub w0, w1, w0
str w0, [sp, 16]
b .L7
.L6:
ldr w2, [sp, 16]
mov w0, 26215
movk w0, 0x6666, lsl 16
smull x0, w2, w0
lsr x0, x0, 32
asr w1, w0, 2
asr w0, w2, 31
sub w1, w1, w0
mov w0, w1
lsl w0, w0, 2
add w0, w0, w1
lsl w0, w0, 1
sub w1, w2, w0
adrp x0, .LC3
add x0, x0, :lo12:.LC3
bl printf
ldr w0, [sp, 16]
mov w1, 26215
movk w1, 0x6666, lsl 16
smull x1, w0, w1
lsr x1, x1, 32
asr w1, w1, 2
asr w0, w0, 31
sub w0, w1, w0
str w0, [sp, 16]
.L7:
ldr w0, [sp, 16]
cmp w0, 0
blt .L8
adrp x0, .LC4
add x0, x0, :lo12:.LC4
bl puts
.L5:
mov w0, 0
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 24]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L10
bl __stack_chk_fail
.L10:
mov w0, w1
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC0:
.string "\n Entre com numero:"
.align 3
.LC1:
.string "%d"
.text
.align 2
.global main
.type main, %function
main:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -448]!
.cfi_def_cfa_offset 448
.cfi_offset 29, -448
.cfi_offset 30, -440
mov x29, sp
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 440]
mov x1, 0
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl printf
add x0, sp, 24
mov x1, x0
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl __isoc99_scanf
str wzr, [sp, 28]
b .L2
.L3:
ldr w0, [sp, 28]
add w2, w0, 1
ldrsw x0, [sp, 28]
lsl x0, x0, 2
add x1, sp, 40
str w2, [x1, x0]
ldr w0, [sp, 28]
add w0, w0, 1
str w0, [sp, 28]
.L2:
ldr w0, [sp, 24]
ldr w1, [sp, 28]
cmp w1, w0
blt .L3
ldr w0, [sp, 24]
str w0, [sp, 32]
str wzr, [sp, 28]
b .L4
.L7:
ldr w0, [sp, 28]
str w0, [sp, 36]
b .L5
.L6:
ldr w0, [sp, 36]
add w0, w0, 1
mov w1, w0
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl printf
ldr w0, [sp, 36]
add w0, w0, 1
str w0, [sp, 36]
.L5:
ldr w1, [sp, 36]
ldr w0, [sp, 32]
cmp w1, w0
blt .L6
mov w0, 10
bl putchar
ldr w0, [sp, 28]
add w0, w0, 1
str w0, [sp, 28]
ldr w0, [sp, 32]
sub w0, w0, #1
str w0, [sp, 32]
.L4:
ldr w1, [sp, 28]
ldr w0, [sp, 32]
cmp w1, w0
ble .L7
mov w0, 0
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 440]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L9
bl __stack_chk_fail
.L9:
mov w0, w1
ldp x29, x30, [sp], 448
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC0:
.string "rb"
.text
.align 2
.global read_buffer
.type read_buffer, %function
read_buffer:
.LFB6:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str x0, [sp, 24]
str x1, [sp, 16]
adrp x0, .LC0
add x1, x0, :lo12:.LC0
ldr x0, [sp, 24]
bl fopen
str x0, [sp, 40]
ldr x0, [sp, 40]
cmp x0, 0
bne .L2
mov x0, 0
b .L3
.L2:
mov w2, 2
mov x1, 0
ldr x0, [sp, 40]
bl fseek
ldr x0, [sp, 40]
bl ftell
str x0, [sp, 48]
mov w2, 0
mov x1, 0
ldr x0, [sp, 40]
bl fseek
ldr x0, [sp, 48]
add x0, x0, 1
bl malloc
str x0, [sp, 56]
ldr x3, [sp, 40]
ldr x2, [sp, 48]
mov x1, 1
ldr x0, [sp, 56]
bl fread
ldr x1, [sp, 56]
ldr x0, [sp, 48]
add x0, x1, x0
strb wzr, [x0]
ldr x0, [sp, 16]
cmp x0, 0
beq .L4
ldr x0, [sp, 16]
ldr x1, [sp, 48]
str x1, [x0]
.L4:
ldr x0, [sp, 56]
.L3:
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE6:
.size read_buffer, .-read_buffer
.section .rodata
.align 3
.LC1:
.string "w+"
.text
.align 2
.global write_buffer
.type write_buffer, %function
write_buffer:
.LFB7:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str x0, [sp, 40]
str x1, [sp, 32]
str x2, [sp, 24]
adrp x0, .LC1
add x1, x0, :lo12:.LC1
ldr x0, [sp, 40]
bl fopen
str x0, [sp, 56]
ldr x0, [sp, 32]
cmp x0, 0
beq .L6
ldr x3, [sp, 56]
ldr x2, [sp, 24]
mov x1, 1
ldr x0, [sp, 32]
bl fwrite
.L6:
ldr x0, [sp, 56]
bl fclose
nop
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE7:
.size write_buffer, .-write_buffer
.section .rodata
.align 3
.LC2:
.string "error: call to 'clGetPlatformIDs' failed"
.align 3
.LC3:
.string "Number of platforms: %d\n"
.align 3
.LC4:
.string "platform=%p\n"
.align 3
.LC5:
.string "error: call to 'clGetPlatformInfo' failed"
.align 3
.LC6:
.string "platform.name='%s'\n\n"
.align 3
.LC7:
.string "error: call to 'clGetDeviceIDs' failed"
.align 3
.LC8:
.string "Number of devices: %d\n"
.align 3
.LC9:
.string "device=%p\n"
.align 3
.LC10:
.string "error: call to 'clGetDeviceInfo' failed"
.align 3
.LC11:
.string "device.name='%s'\n"
.align 3
.LC12:
.string "error: call to 'clCreateContext' failed"
.align 3
.LC13:
.string "context=%p\n"
.align 3
.LC14:
.string "error: call to 'clCreateCommandQueue' failed"
.align 3
.LC15:
.string "command_queue=%p\n"
.align 3
.LC16:
.string "hadd_uintuint.cl"
.align 3
.LC17:
.string "error: call to 'clCreateProgramWithSource' failed"
.align 3
.LC18:
.string "program=%p\n"
.align 3
.LC19:
.string "error: call to 'clBuildProgram' failed:\n%s\n"
.align 3
.LC20:
.string "program built"
.align 3
.LC21:
.string "hadd_uintuint"
.align 3
.LC22:
.string "error: call to 'clCreateKernel' failed"
.align 3
.LC23:
.string "error: could not create source buffer"
.align 3
.LC24:
.string "error: call to 'clEnqueueWriteBuffer' failed"
.align 3
.LC25:
.string "error: could not create dst buffer"
.align 3
.LC26:
.string "error: call to 'clSetKernelArg' failed"
.align 3
.LC27:
.string "error: call to 'clEnqueueNDRangeKernel' failed"
.align 3
.LC28:
.string "error: call to 'clEnqueueReadBuffer' failed"
.align 3
.LC29:
.string "%s.result"
.align 3
.LC30:
.string "Result dumped to %s\n"
.align 3
.LC31:
.string "error: call to 'clReleaseMemObject' failed"
.align 3
.LC32:
.string "error: call to 'clReleaseKernel' failed"
.align 3
.LC33:
.string "error: call to 'clReleaseProgram' failed"
.align 3
.LC34:
.string "error: call to 'clReleaseCommandQueue' failed"
.align 3
.LC35:
.string "error: call to 'clReleaseContext' failed"
.text
.align 2
.global main
.type main, %function
main:
.LFB8:
.cfi_startproc
sub sp, sp, #544
.cfi_def_cfa_offset 544
stp x29, x30, [sp, 16]
.cfi_offset 29, -528
.cfi_offset 30, -520
add x29, sp, 16
str w0, [sp, 44]
str x1, [sp, 32]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 536]
mov x1, 0
add x1, sp, 60
add x0, sp, 80
mov x2, x1
mov x1, x0
mov w0, 1
bl clGetPlatformIDs
str w0, [sp, 64]
ldr w0, [sp, 64]
cmp w0, 0
beq .L8
adrp x0, .LC2
add x0, x0, :lo12:.LC2
bl puts
mov w0, 1
bl exit
.L8:
ldr w0, [sp, 60]
mov w1, w0
adrp x0, .LC3
add x0, x0, :lo12:.LC3
bl printf
ldr x0, [sp, 80]
mov x1, x0
adrp x0, .LC4
add x0, x0, :lo12:.LC4
bl printf
ldr x0, [sp, 80]
add x1, sp, 224
mov x4, 0
mov x3, x1
mov x2, 100
mov w1, 2306
bl clGetPlatformInfo
str w0, [sp, 64]
ldr w0, [sp, 64]
cmp w0, 0
beq .L9
adrp x0, .LC5
add x0, x0, :lo12:.LC5
bl puts
mov w0, 1
bl exit
.L9:
add x0, sp, 224
mov x1, x0
adrp x0, .LC6
add x0, x0, :lo12:.LC6
bl printf
ldr x0, [sp, 80]
add x2, sp, 68
add x1, sp, 88
mov x4, x2
mov x3, x1
mov w2, 1
mov x1, 4
bl clGetDeviceIDs
str w0, [sp, 64]
ldr w0, [sp, 64]
cmp w0, 0
beq .L10
adrp x0, .LC7
add x0, x0, :lo12:.LC7
bl puts
mov w0, 1
bl exit
.L10:
ldr w0, [sp, 68]
mov w1, w0
adrp x0, .LC8
add x0, x0, :lo12:.LC8
bl printf
ldr x0, [sp, 88]
mov x1, x0
adrp x0, .LC9
add x0, x0, :lo12:.LC9
bl printf
ldr x0, [sp, 88]
add x1, sp, 328
mov x4, 0
mov x3, x1
mov x2, 100
mov w1, 4139
bl clGetDeviceInfo
str w0, [sp, 64]
ldr w0, [sp, 64]
cmp w0, 0
beq .L11
adrp x0, .LC10
add x0, x0, :lo12:.LC10
bl puts
mov w0, 1
bl exit
.L11:
add x0, sp, 328
mov x1, x0
adrp x0, .LC11
add x0, x0, :lo12:.LC11
bl printf
mov w0, 10
bl putchar
add x1, sp, 64
add x0, sp, 88
mov x5, x1
mov x4, 0
mov x3, 0
mov x2, x0
mov w1, 1
mov x0, 0
bl clCreateContext
str x0, [sp, 152]
ldr w0, [sp, 64]
cmp w0, 0
beq .L12
adrp x0, .LC12
add x0, x0, :lo12:.LC12
bl puts
mov w0, 1
bl exit
.L12:
ldr x1, [sp, 152]
adrp x0, .LC13
add x0, x0, :lo12:.LC13
bl printf
ldr x0, [sp, 88]
add x1, sp, 64
mov x3, x1
mov x2, 0
mov x1, x0
ldr x0, [sp, 152]
bl clCreateCommandQueue
str x0, [sp, 160]
ldr w0, [sp, 64]
cmp w0, 0
beq .L13
adrp x0, .LC14
add x0, x0, :lo12:.LC14
bl puts
mov w0, 1
bl exit
.L13:
ldr x1, [sp, 160]
adrp x0, .LC15
add x0, x0, :lo12:.LC15
bl printf
mov w0, 10
bl putchar
add x0, sp, 104
mov x1, x0
adrp x0, .LC16
add x0, x0, :lo12:.LC16
bl read_buffer
str x0, [sp, 96]
add x2, sp, 64
add x1, sp, 104
add x0, sp, 96
mov x4, x2
mov x3, x1
mov x2, x0
mov w1, 1
ldr x0, [sp, 152]
bl clCreateProgramWithSource
str x0, [sp, 168]
ldr w0, [sp, 64]
cmp w0, 0
beq .L14
adrp x0, .LC17
add x0, x0, :lo12:.LC17
bl puts
mov w0, 1
bl exit
.L14:
ldr x1, [sp, 168]
adrp x0, .LC18
add x0, x0, :lo12:.LC18
bl printf
add x0, sp, 88
mov x5, 0
mov x4, 0
mov x3, 0
mov x2, x0
mov w1, 1
ldr x0, [sp, 168]
bl clBuildProgram
str w0, [sp, 64]
ldr w0, [sp, 64]
cmp w0, 0
beq .L15
ldr x0, [sp, 88]
add x1, sp, 144
mov x5, x1
mov x4, 0
mov x3, 0
mov w2, 4483
mov x1, x0
ldr x0, [sp, 168]
bl clGetProgramBuildInfo
ldr x0, [sp, 144]
bl malloc
str x0, [sp, 216]
ldr x0, [sp, 88]
ldr x1, [sp, 144]
mov x5, 0
ldr x4, [sp, 216]
mov x3, x1
mov w2, 4483
mov x1, x0
ldr x0, [sp, 168]
bl clGetProgramBuildInfo
ldr x1, [sp, 216]
adrp x0, .LC19
add x0, x0, :lo12:.LC19
bl printf
ldr x0, [sp, 216]
bl free
mov w0, 1
bl exit
.L15:
adrp x0, .LC20
add x0, x0, :lo12:.LC20
bl puts
mov w0, 10
bl putchar
add x0, sp, 64
mov x2, x0
adrp x0, .LC21
add x1, x0, :lo12:.LC21
ldr x0, [sp, 168]
bl clCreateKernel
str x0, [sp, 176]
ldr w0, [sp, 64]
cmp w0, 0
beq .L16
adrp x0, .LC22
add x0, x0, :lo12:.LC22
bl puts
mov w0, 1
bl exit
.L16:
mov x0, 10
str x0, [sp, 184]
ldr x0, [sp, 184]
lsl x0, x0, 2
bl malloc
str x0, [sp, 192]
str wzr, [sp, 72]
b .L17
.L18:
ldrsw x0, [sp, 72]
lsl x0, x0, 2
ldr x1, [sp, 192]
add x0, x1, x0
mov w1, 2
str w1, [x0]
ldr w0, [sp, 72]
add w0, w0, 1
str w0, [sp, 72]
.L17:
ldrsw x0, [sp, 72]
ldr x1, [sp, 184]
cmp x1, x0
bhi .L18
ldr x0, [sp, 184]
lsl x0, x0, 2
add x1, sp, 64
mov x4, x1
mov x3, 0
mov x2, x0
mov x1, 4
ldr x0, [sp, 152]
bl clCreateBuffer
str x0, [sp, 112]
ldr w0, [sp, 64]
cmp w0, 0
beq .L19
adrp x0, .LC23
add x0, x0, :lo12:.LC23
bl puts
mov w0, 1
bl exit
.L19:
ldr x1, [sp, 112]
ldr x0, [sp, 184]
lsl x0, x0, 2
str xzr, [sp]
mov x7, 0
mov w6, 0
ldr x5, [sp, 192]
mov x4, x0
mov x3, 0
mov w2, 1
ldr x0, [sp, 160]
bl clEnqueueWriteBuffer
str w0, [sp, 64]
ldr w0, [sp, 64]
cmp w0, 0
beq .L20
adrp x0, .LC24
add x0, x0, :lo12:.LC24
bl puts
mov w0, 1
bl exit
.L20:
ldr x0, [sp, 184]
lsl x0, x0, 2
bl malloc
str x0, [sp, 200]
str wzr, [sp, 76]
b .L21
.L22:
ldrsw x0, [sp, 76]
lsl x0, x0, 2
ldr x1, [sp, 200]
add x0, x1, x0
mov w1, 2
str w1, [x0]
ldr w0, [sp, 76]
add w0, w0, 1
str w0, [sp, 76]
.L21:
ldrsw x0, [sp, 76]
ldr x1, [sp, 184]
cmp x1, x0
bhi .L22
ldr x0, [sp, 184]
lsl x0, x0, 2
add x1, sp, 64
mov x4, x1
mov x3, 0
mov x2, x0
mov x1, 4
ldr x0, [sp, 152]
bl clCreateBuffer
str x0, [sp, 120]
ldr w0, [sp, 64]
cmp w0, 0
beq .L23
adrp x0, .LC23
add x0, x0, :lo12:.LC23
bl puts
mov w0, 1
bl exit
.L23:
ldr x1, [sp, 120]
ldr x0, [sp, 184]
lsl x0, x0, 2
str xzr, [sp]
mov x7, 0
mov w6, 0
ldr x5, [sp, 200]
mov x4, x0
mov x3, 0
mov w2, 1
ldr x0, [sp, 160]
bl clEnqueueWriteBuffer
str w0, [sp, 64]
ldr w0, [sp, 64]
cmp w0, 0
beq .L24
adrp x0, .LC24
add x0, x0, :lo12:.LC24
bl puts
mov w0, 1
bl exit
.L24:
ldr x0, [sp, 184]
lsl x0, x0, 2
bl malloc
str x0, [sp, 208]
ldr x0, [sp, 184]
lsl x0, x0, 2
mov x2, x0
mov w1, 1
ldr x0, [sp, 208]
bl memset
ldr x0, [sp, 184]
lsl x0, x0, 2
add x1, sp, 64
mov x4, x1
mov x3, 0
mov x2, x0
mov x1, 2
ldr x0, [sp, 152]
bl clCreateBuffer
str x0, [sp, 128]
ldr w0, [sp, 64]
cmp w0, 0
beq .L25
adrp x0, .LC25
add x0, x0, :lo12:.LC25
bl puts
mov w0, 1
bl exit
.L25:
str wzr, [sp, 64]
add x0, sp, 112
mov x3, x0
mov x2, 8
mov w1, 0
ldr x0, [sp, 176]
bl clSetKernelArg
mov w1, w0
ldr w0, [sp, 64]
orr w0, w1, w0
str w0, [sp, 64]
add x0, sp, 120
mov x3, x0
mov x2, 8
mov w1, 1
ldr x0, [sp, 176]
bl clSetKernelArg
mov w1, w0
ldr w0, [sp, 64]
orr w0, w1, w0
str w0, [sp, 64]
add x0, sp, 128
mov x3, x0
mov x2, 8
mov w1, 2
ldr x0, [sp, 176]
bl clSetKernelArg
mov w1, w0
ldr w0, [sp, 64]
orr w0, w1, w0
str w0, [sp, 64]
ldr w0, [sp, 64]
cmp w0, 0
beq .L26
adrp x0, .LC26
add x0, x0, :lo12:.LC26
bl puts
mov w0, 1
bl exit
.L26:
ldr x0, [sp, 184]
str x0, [sp, 136]
ldr x0, [sp, 184]
str x0, [sp, 144]
add x1, sp, 144
add x0, sp, 136
str xzr, [sp]
mov x7, 0
mov w6, 0
mov x5, x1
mov x4, x0
mov x3, 0
mov w2, 1
ldr x1, [sp, 176]
ldr x0, [sp, 160]
bl clEnqueueNDRangeKernel
str w0, [sp, 64]
ldr w0, [sp, 64]
cmp w0, 0
beq .L27
adrp x0, .LC27
add x0, x0, :lo12:.LC27
bl puts
mov w0, 1
bl exit
.L27:
ldr x0, [sp, 160]
bl clFinish
ldr x1, [sp, 128]
ldr x0, [sp, 184]
lsl x0, x0, 2
str xzr, [sp]
mov x7, 0
mov w6, 0
ldr x5, [sp, 208]
mov x4, x0
mov x3, 0
mov w2, 1
ldr x0, [sp, 160]
bl clEnqueueReadBuffer
str w0, [sp, 64]
ldr w0, [sp, 64]
cmp w0, 0
beq .L28
adrp x0, .LC28
add x0, x0, :lo12:.LC28
bl puts
mov w0, 1
bl exit
.L28:
ldr x0, [sp, 32]
ldr x0, [x0]
add x3, sp, 432
mov x2, x0
adrp x0, .LC29
add x1, x0, :lo12:.LC29
mov x0, x3
bl sprintf
ldr x0, [sp, 184]
lsl x1, x0, 2
add x0, sp, 432
mov x2, x1
ldr x1, [sp, 208]
bl write_buffer
add x0, sp, 432
mov x1, x0
adrp x0, .LC30
add x0, x0, :lo12:.LC30
bl printf
ldr x0, [sp, 208]
bl free
ldr x0, [sp, 128]
bl clReleaseMemObject
str w0, [sp, 64]
ldr w0, [sp, 64]
cmp w0, 0
beq .L29
adrp x0, .LC31
add x0, x0, :lo12:.LC31
bl puts
mov w0, 1
bl exit
.L29:
ldr x0, [sp, 192]
bl free
ldr x0, [sp, 112]
bl clReleaseMemObject
str w0, [sp, 64]
ldr w0, [sp, 64]
cmp w0, 0
beq .L30
adrp x0, .LC31
add x0, x0, :lo12:.LC31
bl puts
mov w0, 1
bl exit
.L30:
ldr x0, [sp, 200]
bl free
ldr x0, [sp, 120]
bl clReleaseMemObject
str w0, [sp, 64]
ldr w0, [sp, 64]
cmp w0, 0
beq .L31
adrp x0, .LC31
add x0, x0, :lo12:.LC31
bl puts
mov w0, 1
bl exit
.L31:
ldr x0, [sp, 176]
bl clReleaseKernel
str w0, [sp, 64]
ldr w0, [sp, 64]
cmp w0, 0
beq .L32
adrp x0, .LC32
add x0, x0, :lo12:.LC32
bl puts
mov w0, 1
bl exit
.L32:
ldr x0, [sp, 168]
bl clReleaseProgram
str w0, [sp, 64]
ldr w0, [sp, 64]
cmp w0, 0
beq .L33
adrp x0, .LC33
add x0, x0, :lo12:.LC33
bl puts
mov w0, 1
bl exit
.L33:
ldr x0, [sp, 160]
bl clReleaseCommandQueue
str w0, [sp, 64]
ldr w0, [sp, 64]
cmp w0, 0
beq .L34
adrp x0, .LC34
add x0, x0, :lo12:.LC34
bl puts
mov w0, 1
bl exit
.L34:
ldr x0, [sp, 152]
bl clReleaseContext
str w0, [sp, 64]
ldr w0, [sp, 64]
cmp w0, 0
beq .L35
adrp x0, .LC35
add x0, x0, :lo12:.LC35
bl puts
mov w0, 1
bl exit
.L35:
mov w0, 0
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 536]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L37
bl __stack_chk_fail
.L37:
mov w0, w1
ldp x29, x30, [sp, 16]
add sp, sp, 544
.cfi_restore 29
.cfi_restore 30
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE8:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.global arr
.bss
.align 3
.type arr, %object
.size arr, 56
arr:
.zero 56
.section .rodata
.align 3
.LC0:
.string "%d %d"
.align 3
.LC1:
.string "%d\n"
.text
.align 2
.global main
.type main, %function
main:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 56]
mov x1, 0
str xzr, [sp, 48]
add x1, sp, 28
add x0, sp, 24
mov x2, x1
mov x1, x0
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl __isoc99_scanf
str wzr, [sp, 40]
b .L2
.L3:
add x1, sp, 36
add x0, sp, 32
mov x2, x1
mov x1, x0
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl __isoc99_scanf
ldr w5, [sp, 32]
ldr w4, [sp, 36]
adrp x0, arr
add x2, x0, :lo12:arr
sxtw x3, w4
sxtw x1, w5
mov x0, x1
lsl x0, x0, 3
sub x0, x0, x1
add x0, x0, x3
ldr w0, [x2, x0, lsl 2]
add w3, w0, 1
adrp x0, arr
add x2, x0, :lo12:arr
sxtw x4, w4
sxtw x1, w5
mov x0, x1
lsl x0, x0, 3
sub x0, x0, x1
add x0, x0, x4
str w3, [x2, x0, lsl 2]
ldr w0, [sp, 40]
add w0, w0, 1
str w0, [sp, 40]
.L2:
ldr w0, [sp, 24]
ldr w1, [sp, 40]
cmp w1, w0
blt .L3
str wzr, [sp, 40]
b .L4
.L7:
str wzr, [sp, 44]
b .L5
.L6:
adrp x0, arr
add x2, x0, :lo12:arr
ldrsw x3, [sp, 44]
ldrsw x1, [sp, 40]
mov x0, x1
lsl x0, x0, 3
sub x0, x0, x1
add x0, x0, x3
ldr w0, [x2, x0, lsl 2]
scvtf d1, w0
ldr w0, [sp, 28]
scvtf d0, w0
fdiv d0, d1, d0
bl ceil
fmov d1, d0
ldr d0, [sp, 48]
fadd d0, d0, d1
str d0, [sp, 48]
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L5:
ldr w0, [sp, 44]
cmp w0, 6
ble .L6
ldr w0, [sp, 40]
add w0, w0, 1
str w0, [sp, 40]
.L4:
ldr w0, [sp, 40]
cmp w0, 1
ble .L7
ldr d0, [sp, 48]
fcvtzs w0, d0
mov w1, w0
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl printf
mov w0, 0
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 56]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L9
bl __stack_chk_fail
.L9:
mov w0, w1
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC0:
.string " C F"
.align 3
.LC1:
.string "%3.0f %6.1f\n"
.text
.align 2
.global main
.type main, %function
main:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str wzr, [sp, 32]
mov w0, 300
str w0, [sp, 36]
mov w0, 20
str w0, [sp, 40]
ldr s0, [sp, 32]
scvtf s0, s0
str s0, [sp, 28]
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl puts
b .L2
.L3:
ldr s0, [sp, 28]
fcvt d0, s0
adrp x0, .LC2
ldr d1, [x0, #:lo12:.LC2]
fmul d0, d0, d1
mov x0, 4629700416936869888
fmov d1, x0
fadd d0, d0, d1
fcvt s0, d0
str s0, [sp, 44]
ldr s0, [sp, 28]
fcvt d2, s0
ldr s0, [sp, 44]
fcvt d0, s0
fmov d1, d0
fmov d0, d2
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl printf
ldr s0, [sp, 40]
scvtf s0, s0
ldr s1, [sp, 28]
fadd s0, s1, s0
str s0, [sp, 28]
.L2:
ldr s0, [sp, 36]
scvtf s0, s0
ldr s1, [sp, 28]
fcmpe s1, s0
bls .L3
mov w0, 0
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size main, .-main
.section .rodata
.align 3
.LC2:
.word -858993459
.word 1073532108
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global ft_strcmp
.type ft_strcmp, %function
ft_strcmp:
.LFB0:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str x0, [sp, 8]
str x1, [sp]
.L5:
ldr x0, [sp, 8]
ldrb w1, [x0]
ldr x0, [sp]
ldrb w0, [x0]
cmp w1, w0
beq .L2
ldr x0, [sp, 8]
ldrb w0, [x0]
mov w1, w0
ldr x0, [sp]
ldrb w0, [x0]
sub w0, w1, w0
b .L3
.L2:
ldr x0, [sp, 8]
ldrb w0, [x0]
cmp w0, 0
beq .L4
ldr x0, [sp]
ldrb w0, [x0]
cmp w0, 0
beq .L4
ldr x0, [sp, 8]
add x0, x0, 1
str x0, [sp, 8]
ldr x0, [sp]
add x0, x0, 1
str x0, [sp]
b .L5
.L4:
mov w0, 0
.L3:
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size ft_strcmp, .-ft_strcmp
.align 2
.global ft_swap
.type ft_swap, %function
ft_swap:
.LFB1:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str x0, [sp, 8]
str x1, [sp]
ldr x0, [sp, 8]
ldr x0, [x0]
str x0, [sp, 24]
ldr x0, [sp]
ldr x1, [x0]
ldr x0, [sp, 8]
str x1, [x0]
ldr x0, [sp]
ldr x1, [sp, 24]
str x1, [x0]
nop
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE1:
.size ft_swap, .-ft_swap
.align 2
.global qsort_iteration
.type qsort_iteration, %function
qsort_iteration:
.LFB2:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 40]
str w1, [sp, 36]
str x2, [sp, 24]
ldr x0, [sp, 24]
ldr w0, [x0]
cmp w0, 0
bne .L8
ldr x0, [sp, 40]
ldr x2, [x0]
ldrsw x0, [sp, 36]
lsl x0, x0, 3
ldr x1, [sp, 40]
add x0, x1, x0
ldr x0, [x0]
mov x1, x0
mov x0, x2
bl ft_strcmp
cmp w0, 0
ble .L9
ldrsw x0, [sp, 36]
lsl x0, x0, 3
ldr x1, [sp, 40]
add x0, x1, x0
mov x1, x0
ldr x0, [sp, 40]
bl ft_swap
ldr x0, [sp, 24]
ldr w0, [x0]
cmp w0, 0
cset w0, eq
and w0, w0, 255
mov w1, w0
ldr x0, [sp, 24]
str w1, [x0]
ldrsw x0, [sp, 36]
lsl x0, x0, 3
ldr x1, [sp, 40]
add x0, x1, x0
str x0, [sp, 40]
b .L9
.L8:
ldr x0, [sp, 40]
ldr x2, [x0]
ldrsw x0, [sp, 36]
lsl x0, x0, 3
neg x0, x0
ldr x1, [sp, 40]
add x0, x1, x0
ldr x0, [x0]
mov x1, x0
mov x0, x2
bl ft_strcmp
cmp w0, 0
bge .L9
ldrsw x0, [sp, 36]
lsl x0, x0, 3
neg x0, x0
ldr x1, [sp, 40]
add x0, x1, x0
mov x1, x0
ldr x0, [sp, 40]
bl ft_swap
ldr x0, [sp, 24]
ldr w0, [x0]
cmp w0, 0
cset w0, eq
and w0, w0, 255
mov w1, w0
ldr x0, [sp, 24]
str w1, [x0]
ldrsw x0, [sp, 36]
lsl x0, x0, 3
neg x0, x0
ldr x1, [sp, 40]
add x0, x1, x0
str x0, [sp, 40]
.L9:
ldr x0, [sp, 40]
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE2:
.size qsort_iteration, .-qsort_iteration
.align 2
.global ft_qsort_strings
.type ft_qsort_strings, %function
ft_qsort_strings:
.LFB3:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str x0, [sp, 24]
str w1, [sp, 20]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 56]
mov x1, 0
ldr w0, [sp, 20]
sub w0, w0, #1
str w0, [sp, 44]
ldr x0, [sp, 24]
str x0, [sp, 48]
str wzr, [sp, 40]
b .L12
.L13:
add x0, sp, 40
mov x2, x0
ldr w1, [sp, 44]
ldr x0, [sp, 48]
bl qsort_iteration
str x0, [sp, 48]
ldr w0, [sp, 44]
sub w0, w0, #1
str w0, [sp, 44]
.L12:
ldr w0, [sp, 44]
cmp w0, 0
bgt .L13
ldr x1, [sp, 48]
ldr x0, [sp, 24]
sub x0, x1, x0
cmp x0, 8
ble .L14
ldr x1, [sp, 48]
ldr x0, [sp, 24]
sub x0, x1, x0
asr x0, x0, 3
mov w1, w0
ldr x0, [sp, 24]
bl ft_qsort_strings
.L14:
ldrsw x0, [sp, 20]
lsl x0, x0, 3
ldr x1, [sp, 24]
add x1, x1, x0
ldr x0, [sp, 48]
sub x0, x1, x0
cmp x0, 16
ble .L17
ldr x0, [sp, 48]
add x2, x0, 8
ldrsw x0, [sp, 20]
lsl x0, x0, 3
ldr x1, [sp, 24]
add x1, x1, x0
ldr x0, [sp, 48]
sub x0, x1, x0
asr x0, x0, 3
sub w0, w0, #1
mov w1, w0
mov x0, x2
bl ft_qsort_strings
.L17:
nop
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [sp, 56]
ldr x1, [x0]
subs x2, x2, x1
mov x1, 0
beq .L16
bl __stack_chk_fail
.L16:
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE3:
.size ft_qsort_strings, .-ft_qsort_strings
.align 2
.global main
.type main, %function
main:
.LFB4:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str w0, [sp, 28]
str x1, [sp, 16]
ldr w0, [sp, 28]
add w0, w0, 1
str w0, [sp, 28]
str wzr, [sp, 44]
ldr x0, [sp, 16]
add x0, x0, 8
str x0, [sp, 16]
ldr x0, [sp, 16]
str x0, [sp, 48]
b .L19
.L20:
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L19:
ldr x0, [sp, 16]
add x1, x0, 8
str x1, [sp, 16]
ldr x0, [x0]
cmp x0, 0
bne .L20
ldr w1, [sp, 44]
ldr x0, [sp, 48]
bl ft_qsort_strings
b .L21
.L24:
ldr x0, [sp, 48]
add x1, x0, 8
str x1, [sp, 48]
ldr x0, [x0]
str x0, [sp, 56]
b .L22
.L23:
ldr x0, [sp, 56]
add x1, x0, 1
str x1, [sp, 56]
ldrb w0, [x0]
bl ft_putchar
.L22:
ldr x0, [sp, 56]
ldrb w0, [x0]
cmp w0, 0
bne .L23
mov w0, 10
bl ft_putchar
.L21:
ldr x0, [sp, 48]
ldr x0, [x0]
cmp x0, 0
bne .L24
mov w0, 0
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE4:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.global shellcode
.section .rodata
.align 3
.type shellcode, %object
.size shellcode, 26
shellcode:
.string "|Ie\330\354\"\374\266\251\310\365//&8\254\276?_\344?g\360\202d"
.text
.align 2
.type initialize_state, %function
initialize_state:
.LFB0:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str x0, [sp, 8]
str wzr, [sp, 28]
b .L2
.L3:
ldr w0, [sp, 28]
and w2, w0, 255
ldr x1, [sp, 8]
ldr w0, [sp, 28]
strb w2, [x1, x0]
ldr w0, [sp, 28]
add w0, w0, 1
str w0, [sp, 28]
.L2:
ldr w0, [sp, 28]
cmp w0, 255
bls .L3
ldr x0, [sp, 8]
strb wzr, [x0, 256]
ldr x0, [sp, 8]
strb wzr, [x0, 257]
ldr x0, [sp, 8]
strb wzr, [x0, 258]
ldr x0, [sp, 8]
strb wzr, [x0, 259]
ldr x0, [sp, 8]
mov w1, 1
strb w1, [x0, 260]
ldr x0, [sp, 8]
strb wzr, [x0, 261]
nop
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size initialize_state, .-initialize_state
.align 2
.type update, %function
update:
.LFB1:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str x0, [sp, 8]
ldr x0, [sp, 8]
ldrb w1, [x0, 257]
ldr x0, [sp, 8]
ldrb w0, [x0, 260]
add w0, w1, w0
and w1, w0, 255
ldr x0, [sp, 8]
strb w1, [x0, 257]
ldr x0, [sp, 8]
ldrb w1, [x0, 258]
ldr x0, [sp, 8]
ldrb w0, [x0, 257]
ldr x2, [sp, 8]
sxtw x0, w0
ldrb w0, [x2, x0]
add w0, w1, w0
strb w0, [sp, 30]
ldr x0, [sp, 8]
ldrb w1, [x0, 259]
ldrb w0, [sp, 30]
ldr x2, [sp, 8]
sxtw x0, w0
ldrb w0, [x2, x0]
add w0, w1, w0
and w1, w0, 255
ldr x0, [sp, 8]
strb w1, [x0, 258]
ldr x0, [sp, 8]
ldrb w1, [x0, 257]
ldr x0, [sp, 8]
ldrb w0, [x0, 259]
add w0, w1, w0
and w1, w0, 255
ldr x0, [sp, 8]
ldrb w0, [x0, 258]
ldr x2, [sp, 8]
sxtw x0, w0
ldrb w0, [x2, x0]
add w0, w1, w0
and w1, w0, 255
ldr x0, [sp, 8]
strb w1, [x0, 259]
ldr x0, [sp, 8]
ldrb w0, [x0, 257]
ldr x1, [sp, 8]
sxtw x0, w0
ldrb w0, [x1, x0]
strb w0, [sp, 31]
ldr x0, [sp, 8]
ldrb w0, [x0, 258]
mov w2, w0
ldr x0, [sp, 8]
ldrb w0, [x0, 257]
mov w3, w0
ldr x1, [sp, 8]
sxtw x0, w2
ldrb w2, [x1, x0]
ldr x1, [sp, 8]
sxtw x0, w3
strb w2, [x1, x0]
ldr x0, [sp, 8]
ldrb w0, [x0, 258]
ldr x1, [sp, 8]
sxtw x0, w0
ldrb w2, [sp, 31]
strb w2, [x1, x0]
nop
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE1:
.size update, .-update
.align 2
.type output, %function
output:
.LFB2:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str x0, [sp, 8]
ldr x0, [sp, 8]
ldrb w1, [x0, 261]
ldr x0, [sp, 8]
ldrb w0, [x0, 259]
add w0, w1, w0
strb w0, [sp, 29]
ldr x0, [sp, 8]
ldrb w1, [x0, 257]
ldrb w0, [sp, 29]
ldr x2, [sp, 8]
sxtw x0, w0
ldrb w0, [x2, x0]
add w0, w1, w0
strb w0, [sp, 30]
ldr x0, [sp, 8]
ldrb w1, [x0, 258]
ldrb w0, [sp, 30]
ldr x2, [sp, 8]
sxtw x0, w0
ldrb w0, [x2, x0]
add w0, w1, w0
strb w0, [sp, 31]
ldrb w0, [sp, 31]
ldr x1, [sp, 8]
sxtw x0, w0
ldrb w1, [x1, x0]
ldr x0, [sp, 8]
strb w1, [x0, 261]
ldr x0, [sp, 8]
ldrb w0, [x0, 261]
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE2:
.size output, .-output
.align 2
.type crush, %function
crush:
.LFB3:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str x0, [sp, 8]
strb wzr, [sp, 28]
b .L8
.L11:
ldrb w0, [sp, 28]
mvn w0, w0
strb w0, [sp, 29]
ldrb w0, [sp, 28]
ldr x1, [sp, 8]
sxtw x0, w0
ldrb w0, [x1, x0]
strb w0, [sp, 30]
ldrb w0, [sp, 29]
ldr x1, [sp, 8]
sxtw x0, w0
ldrb w0, [x1, x0]
strb w0, [sp, 31]
ldrb w1, [sp, 30]
ldrb w0, [sp, 31]
cmp w1, w0
bls .L9
ldrb w0, [sp, 28]
ldr x1, [sp, 8]
sxtw x0, w0
ldrb w2, [sp, 31]
strb w2, [x1, x0]
ldrb w0, [sp, 29]
ldr x1, [sp, 8]
sxtw x0, w0
ldrb w2, [sp, 30]
strb w2, [x1, x0]
b .L10
.L9:
ldrb w0, [sp, 28]
ldr x1, [sp, 8]
sxtw x0, w0
ldrb w2, [sp, 30]
strb w2, [x1, x0]
ldrb w0, [sp, 29]
ldr x1, [sp, 8]
sxtw x0, w0
ldrb w2, [sp, 31]
strb w2, [x1, x0]
.L10:
ldrb w0, [sp, 28]
add w0, w0, 1
strb w0, [sp, 28]
.L8:
ldrsb w0, [sp, 28]
cmp w0, 0
bge .L11
nop
nop
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE3:
.size crush, .-crush
.align 2
.type whip, %function
whip:
.LFB4:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
mov w0, 512
str w0, [sp, 44]
str wzr, [sp, 40]
b .L13
.L14:
ldr x0, [sp, 24]
bl update
ldr w0, [sp, 40]
add w0, w0, 1
str w0, [sp, 40]
.L13:
ldr w1, [sp, 40]
ldr w0, [sp, 44]
cmp w1, w0
bcc .L14
ldr x0, [sp, 24]
ldrb w0, [x0, 260]
add w0, w0, 2
and w1, w0, 255
ldr x0, [sp, 24]
strb w1, [x0, 260]
nop
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE4:
.size whip, .-whip
.align 2
.type shuffle, %function
shuffle:
.LFB5:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str x0, [sp, 24]
ldr x0, [sp, 24]
bl whip
ldr x0, [sp, 24]
bl crush
ldr x0, [sp, 24]
bl whip
ldr x0, [sp, 24]
bl crush
ldr x0, [sp, 24]
bl whip
ldr x0, [sp, 24]
strb wzr, [x0, 256]
nop
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE5:
.size shuffle, .-shuffle
.align 2
.type absorb_stop, %function
absorb_stop:
.LFB6:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str x0, [sp, 24]
ldr x0, [sp, 24]
ldrb w0, [x0, 256]
cmp w0, 128
bne .L17
ldr x0, [sp, 24]
bl shuffle
.L17:
ldr x0, [sp, 24]
ldrb w0, [x0, 256]
add w0, w0, 1
and w1, w0, 255
ldr x0, [sp, 24]
strb w1, [x0, 256]
nop
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE6:
.size absorb_stop, .-absorb_stop
.align 2
.type absorb_nibble, %function
absorb_nibble:
.LFB7:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
strb w1, [sp, 23]
ldr x0, [sp, 24]
ldrb w0, [x0, 256]
cmp w0, 128
bne .L19
ldr x0, [sp, 24]
bl shuffle
.L19:
ldrb w0, [sp, 23]
sub w0, w0, #128
strb w0, [sp, 46]
ldr x0, [sp, 24]
ldrb w0, [x0, 256]
ldr x1, [sp, 24]
sxtw x0, w0
ldrb w0, [x1, x0]
strb w0, [sp, 47]
ldrb w2, [sp, 46]
ldr x0, [sp, 24]
ldrb w0, [x0, 256]
mov w3, w0
ldr x1, [sp, 24]
sxtw x0, w2
ldrb w2, [x1, x0]
ldr x1, [sp, 24]
sxtw x0, w3
strb w2, [x1, x0]
ldrb w0, [sp, 46]
ldr x1, [sp, 24]
sxtw x0, w0
ldrb w2, [sp, 47]
strb w2, [x1, x0]
ldr x0, [sp, 24]
ldrb w0, [x0, 256]
add w0, w0, 1
and w1, w0, 255
ldr x0, [sp, 24]
strb w1, [x0, 256]
nop
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE7:
.size absorb_nibble, .-absorb_nibble
.align 2
.type absorb_byte, %function
absorb_byte:
.LFB8:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str x0, [sp, 24]
strb w1, [sp, 23]
ldrb w0, [sp, 23]
and w0, w0, 15
and w0, w0, 255
mov w1, w0
ldr x0, [sp, 24]
bl absorb_nibble
ldrb w0, [sp, 23]
lsr w0, w0, 4
and w0, w0, 255
mov w1, w0
ldr x0, [sp, 24]
bl absorb_nibble
nop
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE8:
.size absorb_byte, .-absorb_byte
.align 2
.type absorb, %function
absorb:
.LFB9:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str x0, [sp, 40]
str x1, [sp, 32]
str x2, [sp, 24]
str xzr, [sp, 56]
b .L22
.L23:
ldr x1, [sp, 32]
ldr x0, [sp, 56]
add x0, x1, x0
ldrb w0, [x0]
mov w1, w0
ldr x0, [sp, 40]
bl absorb_byte
ldr x0, [sp, 56]
add x0, x0, 1
str x0, [sp, 56]
.L22:
ldr x1, [sp, 56]
ldr x0, [sp, 24]
cmp x1, x0
bcc .L23
nop
nop
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE9:
.size absorb, .-absorb
.align 2
.type drip, %function
drip:
.LFB10:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str x0, [sp, 24]
ldr x0, [sp, 24]
ldrb w0, [x0, 256]
cmp w0, 0
beq .L25
ldr x0, [sp, 24]
bl shuffle
.L25:
ldr x0, [sp, 24]
bl update
ldr x0, [sp, 24]
bl output
and w0, w0, 255
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE10:
.size drip, .-drip
.align 2
.type squeeze, %function
squeeze:
.LFB11:
.cfi_startproc
stp x29, x30, [sp, -80]!
.cfi_def_cfa_offset 80
.cfi_offset 29, -80
.cfi_offset 30, -72
mov x29, sp
str x19, [sp, 16]
.cfi_offset 19, -64
str x0, [sp, 56]
str x1, [sp, 48]
str x2, [sp, 40]
ldr x0, [sp, 56]
ldrb w0, [x0, 256]
cmp w0, 0
beq .L28
ldr x0, [sp, 56]
bl shuffle
.L28:
str xzr, [sp, 72]
b .L29
.L30:
ldr x1, [sp, 48]
ldr x0, [sp, 72]
add x19, x1, x0
ldr x0, [sp, 56]
bl drip
and w0, w0, 255
strb w0, [x19]
ldr x0, [sp, 72]
add x0, x0, 1
str x0, [sp, 72]
.L29:
ldr x1, [sp, 72]
ldr x0, [sp, 40]
cmp x1, x0
bcc .L30
nop
nop
ldr x19, [sp, 16]
ldp x29, x30, [sp], 80
.cfi_restore 30
.cfi_restore 29
.cfi_restore 19
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE11:
.size squeeze, .-squeeze
.align 2
.type memzero, %function
memzero:
.LFB12:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str x0, [sp, 8]
str x1, [sp]
ldr x0, [sp, 8]
str x0, [sp, 24]
str xzr, [sp, 16]
b .L32
.L33:
ldr x0, [sp, 16]
add x1, x0, 1
str x1, [sp, 16]
ldr x1, [sp, 24]
add x0, x1, x0
strb wzr, [x0]
.L32:
ldr x1, [sp, 16]
ldr x0, [sp]
cmp x1, x0
bcc .L33
nop
nop
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE12:
.size memzero, .-memzero
.align 2
.type key_setup, %function
key_setup:
.LFB13:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 40]
str x1, [sp, 32]
str x2, [sp, 24]
ldr x0, [sp, 40]
bl initialize_state
ldr x2, [sp, 24]
ldr x1, [sp, 32]
ldr x0, [sp, 40]
bl absorb
nop
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE13:
.size key_setup, .-key_setup
.align 2
.global encrypt
.type encrypt, %function
encrypt:
.LFB14:
.cfi_startproc
stp x29, x30, [sp, -432]!
.cfi_def_cfa_offset 432
.cfi_offset 29, -432
.cfi_offset 30, -424
mov x29, sp
stp x19, x20, [sp, 16]
.cfi_offset 19, -416
.cfi_offset 20, -408
str x0, [sp, 72]
str x1, [sp, 64]
str x2, [sp, 56]
str x3, [sp, 48]
str x4, [sp, 40]
add x0, sp, 432
sub x0, x0, #336
add x0, x0, 63
lsr x0, x0, 6
lsl x19, x0, 6
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 424]
mov x1, 0
ldr x2, [sp, 40]
ldr x1, [sp, 48]
mov x0, x19
bl key_setup
str xzr, [sp, 88]
b .L36
.L37:
ldr x1, [sp, 64]
ldr x0, [sp, 88]
add x0, x1, x0
ldrb w20, [x0]
mov x0, x19
bl drip
and w1, w0, 255
ldr x2, [sp, 72]
ldr x0, [sp, 88]
add x0, x2, x0
add w1, w20, w1
and w1, w1, 255
strb w1, [x0]
ldr x0, [sp, 88]
add x0, x0, 1
str x0, [sp, 88]
.L36:
ldr x1, [sp, 88]
ldr x0, [sp, 56]
cmp x1, x0
bcc .L37
mov x1, 262
mov x0, x19
bl memzero
mov w0, 0
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 424]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L39
bl __stack_chk_fail
.L39:
mov w0, w1
ldp x19, x20, [sp, 16]
ldp x29, x30, [sp], 432
.cfi_restore 30
.cfi_restore 29
.cfi_restore 19
.cfi_restore 20
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE14:
.size encrypt, .-encrypt
.align 2
.global decrypt
.type decrypt, %function
decrypt:
.LFB15:
.cfi_startproc
stp x29, x30, [sp, -432]!
.cfi_def_cfa_offset 432
.cfi_offset 29, -432
.cfi_offset 30, -424
mov x29, sp
stp x19, x20, [sp, 16]
.cfi_offset 19, -416
.cfi_offset 20, -408
str x0, [sp, 72]
str x1, [sp, 64]
str x2, [sp, 56]
str x3, [sp, 48]
str x4, [sp, 40]
add x0, sp, 432
sub x0, x0, #336
add x0, x0, 63
lsr x0, x0, 6
lsl x19, x0, 6
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 424]
mov x1, 0
ldr x2, [sp, 40]
ldr x1, [sp, 48]
mov x0, x19
bl key_setup
str xzr, [sp, 88]
b .L41
.L42:
ldr x1, [sp, 64]
ldr x0, [sp, 88]
add x0, x1, x0
ldrb w20, [x0]
mov x0, x19
bl drip
and w1, w0, 255
ldr x2, [sp, 72]
ldr x0, [sp, 88]
add x0, x2, x0
sub w1, w20, w1
and w1, w1, 255
strb w1, [x0]
ldr x0, [sp, 88]
add x0, x0, 1
str x0, [sp, 88]
.L41:
ldr x1, [sp, 88]
ldr x0, [sp, 56]
cmp x1, x0
bcc .L42
mov x1, 262
mov x0, x19
bl memzero
mov w0, 0
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 424]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L44
bl __stack_chk_fail
.L44:
mov w0, w1
ldp x19, x20, [sp, 16]
ldp x29, x30, [sp], 432
.cfi_restore 30
.cfi_restore 29
.cfi_restore 19
.cfi_restore 20
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE15:
.size decrypt, .-decrypt
.section .rodata
.align 3
.LC0:
.string "Please provide a key\n"
.align 3
.LC1:
.string "Key is too long. It should be less than 256 characters"
.align 3
.LC2:
.string "\\x%02x"
.align 3
.LC3:
.string "\n\t!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!"
.align 3
.LC4:
.string "\t!! WARNING !!"
.align 3
.LC5:
.string "\t!! Found %02d bad char !!\n"
.align 3
.LC6:
.string "\t!! Found %02d bad chars !!\n"
.align 3
.LC7:
.string "\t!!---------------------------------!!"
.align 3
.LC8:
.string "\t!! Please use a different password !!"
.align 3
.LC9:
.string "\t!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!\n"
.text
.align 2
.global main
.type main, %function
main:
.LFB16:
.cfi_startproc
sub sp, sp, #2144
.cfi_def_cfa_offset 2144
stp x29, x30, [sp]
.cfi_offset 29, -2144
.cfi_offset 30, -2136
mov x29, sp
str w0, [sp, 28]
str x1, [sp, 16]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 2136]
mov x1, 0
mov x0, 26
str x0, [sp, 56]
str wzr, [sp, 44]
add x0, sp, 88
str x0, [sp, 64]
ldr w0, [sp, 28]
cmp w0, 1
bne .L46
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x0, [x0]
mov x3, x0
mov x2, 21
mov x1, 1
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl fwrite
mov w0, -1
b .L56
.L46:
ldr x0, [sp, 16]
ldr x0, [x0, 8]
str x0, [sp, 72]
ldr x0, [sp, 72]
bl strlen
str x0, [sp, 80]
ldr x0, [sp, 80]
cmp x0, 256
bls .L48
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl puts
mov w0, -1
b .L56
.L48:
ldr w0, [sp, 28]
cmp w0, 2
ble .L49
add x5, sp, 88
ldr x4, [sp, 80]
ldr x3, [sp, 72]
ldr x2, [sp, 56]
adrp x0, shellcode
add x1, x0, :lo12:shellcode
mov x0, x5
bl encrypt
str xzr, [sp, 48]
b .L50
.L52:
ldr x0, [sp, 48]
add x1, sp, 88
ldrb w0, [x1, x0]
mov w1, w0
adrp x0, .LC2
add x0, x0, :lo12:.LC2
bl printf
ldr x0, [sp, 48]
add x1, sp, 88
ldrb w0, [x1, x0]
cmp w0, 0
bne .L51
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L51:
ldr x0, [sp, 48]
add x0, x0, 1
str x0, [sp, 48]
.L50:
ldr x0, [sp, 56]
sub x0, x0, #1
ldr x1, [sp, 48]
cmp x1, x0
bcc .L52
mov w0, 10
bl putchar
ldr w0, [sp, 44]
cmp w0, 0
ble .L53
adrp x0, .LC3
add x0, x0, :lo12:.LC3
bl puts
adrp x0, .LC4
add x0, x0, :lo12:.LC4
bl puts
ldr w0, [sp, 44]
cmp w0, 1
bne .L54
ldr w1, [sp, 44]
adrp x0, .LC5
add x0, x0, :lo12:.LC5
bl printf
b .L55
.L54:
ldr w1, [sp, 44]
adrp x0, .LC6
add x0, x0, :lo12:.LC6
bl printf
.L55:
adrp x0, .LC7
add x0, x0, :lo12:.LC7
bl puts
adrp x0, .LC8
add x0, x0, :lo12:.LC8
bl puts
adrp x0, .LC9
add x0, x0, :lo12:.LC9
bl puts
b .L53
.L49:
add x5, sp, 88
ldr x4, [sp, 80]
ldr x3, [sp, 72]
ldr x2, [sp, 56]
adrp x0, shellcode
add x1, x0, :lo12:shellcode
mov x0, x5
bl decrypt
ldr x0, [sp, 64]
blr x0
.L53:
mov w0, 0
.L56:
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 2136]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L57
bl __stack_chk_fail
.L57:
mov w0, w1
ldp x29, x30, [sp]
add sp, sp, 2144
.cfi_restore 29
.cfi_restore 30
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE16:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.global r
.data
.align 3
.type r, %object
.size r, 8
r:
.xword -1
.section .rodata
.align 3
.LC0:
.string "("
.string ""
.string ""
.string "0"
.string "\001"
.string ""
.string ""
.string ""
.string ""
.string "f\363\006\232\b\371\343\253\024"
.string "\001"
.string "\020"
.string "\001"
.string "\b"
.string "\001"
.string "ife"
.string "\303"
.string ""
.string ""
.string ""
.text
.align 2
.global main
.type main, %function
main:
.LFB6:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
mov w6, 0
mov w5, -1
mov w4, 50
mov w3, 3
mov w2, 16777216
mov w1, 536870912
mov x0, 222
bl syscall
str xzr, [sp, 24]
mov w3, 0
mov w2, 3
mov w1, 16
mov x0, 198
bl syscall
str x0, [sp, 24]
ldr x0, [sp, 24]
cmn x0, #1
beq .L2
ldr x1, [sp, 24]
adrp x0, r
add x0, x0, :lo12:r
str x1, [x0]
.L2:
mov x0, 384
movk x0, 0x2000, lsl 16
str xzr, [x0]
mov x0, 392
movk x0, 0x2000, lsl 16
str wzr, [x0]
mov x0, 400
movk x0, 0x2000, lsl 16
mov x1, 320
movk x1, 0x2000, lsl 16
str x1, [x0]
mov x0, 320
movk x0, 0x2000, lsl 16
mov x1, 512
movk x1, 0x2000, lsl 16
str x1, [x0]
mov x2, 40
adrp x0, .LC0
add x1, x0, :lo12:.LC0
mov x0, 512
movk x0, 0x2000, lsl 16
bl memcpy
mov x0, 328
movk x0, 0x2000, lsl 16
mov x1, 40
str x1, [x0]
mov x0, 408
movk x0, 0x2000, lsl 16
mov x1, 1
str x1, [x0]
mov x0, 416
movk x0, 0x2000, lsl 16
str xzr, [x0]
mov x0, 424
movk x0, 0x2000, lsl 16
str xzr, [x0]
mov x0, 432
movk x0, 0x2000, lsl 16
str wzr, [x0]
adrp x0, r
add x0, x0, :lo12:r
ldr x0, [x0]
mov w3, 0
mov w2, 384
movk w2, 0x2000, lsl 16
mov x1, x0
mov x0, 211
bl syscall
mov w0, 0
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE6:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC0:
.string "%d %d"
.align 3
.LC1:
.string "%d"
.align 3
.LC2:
.string "%d\n"
.text
.align 2
.global main
.type main, %function
main:
.LFB0:
.cfi_startproc
sub sp, sp, #560
.cfi_def_cfa_offset 560
stp x29, x30, [sp, 16]
.cfi_offset 29, -544
.cfi_offset 30, -536
add x29, sp, 16
.cfi_def_cfa 29, 544
stp x19, x20, [sp, 32]
stp x21, x22, [sp, 48]
stp x23, x24, [sp, 64]
stp x25, x26, [sp, 80]
str x27, [sp, 96]
.cfi_offset 19, -528
.cfi_offset 20, -520
.cfi_offset 21, -512
.cfi_offset 22, -504
.cfi_offset 23, -496
.cfi_offset 24, -488
.cfi_offset 25, -480
.cfi_offset 26, -472
.cfi_offset 27, -464
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [x29, 536]
mov x1, 0
mov x0, sp
mov x19, x0
add x1, x29, 424
add x0, x29, 428
mov x2, x1
mov x1, x0
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl __isoc99_scanf
ldr w1, [x29, 428]
sxtw x0, w1
sub x0, x0, #1
str x0, [x29, 440]
sxtw x0, w1
mov x22, x0
mov x23, 0
lsr x0, x22, 59
lsl x21, x23, 5
orr x21, x0, x21
lsl x20, x22, 5
sxtw x0, w1
mov x26, x0
mov x27, 0
lsr x0, x26, 59
lsl x25, x27, 5
orr x25, x0, x25
lsl x24, x26, 5
sxtw x0, w1
lsl x0, x0, 2
add x0, x0, 15
lsr x0, x0, 4
lsl x1, x0, 4
and x0, x1, -65536
sub x0, sp, x0
.L2:
cmp sp, x0
beq .L3
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L2
.L3:
and x0, x1, 65535
sub sp, sp, x0
str xzr, [sp]
and x0, x1, 65535
cmp x0, 1024
bcc .L4
str xzr, [sp, 1024]
.L4:
add x0, sp, 16
add x0, x0, 3
lsr x0, x0, 2
lsl x0, x0, 2
str x0, [x29, 448]
str wzr, [x29, 432]
b .L5
.L6:
ldrsw x0, [x29, 432]
lsl x1, x0, 2
ldr x0, [x29, 448]
add x0, x0, x1
mov x1, x0
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl __isoc99_scanf
ldr w0, [x29, 432]
add w0, w0, 1
str w0, [x29, 432]
.L5:
ldr w1, [x29, 428]
ldr w0, [x29, 432]
cmp w0, w1
blt .L6
ldr w1, [x29, 424]
sxtw x0, w1
sub x0, x0, #1
str x0, [x29, 456]
sxtw x0, w1
str x0, [x29, 240]
str xzr, [x29, 248]
ldp x2, x3, [x29, 240]
mov x0, x2
lsr x0, x0, 59
mov x4, x3
lsl x4, x4, 5
str x4, [x29, 408]
ldr x4, [x29, 408]
orr x0, x0, x4
str x0, [x29, 408]
mov x0, x2
lsl x0, x0, 5
str x0, [x29, 400]
sxtw x0, w1
str x0, [x29, 224]
str xzr, [x29, 232]
ldp x2, x3, [x29, 224]
mov x0, x2
lsr x0, x0, 59
mov x4, x3
lsl x4, x4, 5
str x4, [x29, 392]
ldr x4, [x29, 392]
orr x0, x0, x4
str x0, [x29, 392]
mov x0, x2
lsl x0, x0, 5
str x0, [x29, 384]
sxtw x0, w1
lsl x0, x0, 2
add x0, x0, 15
lsr x0, x0, 4
lsl x1, x0, 4
and x0, x1, -65536
sub x0, sp, x0
.L7:
cmp sp, x0
beq .L8
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L7
.L8:
and x0, x1, 65535
sub sp, sp, x0
str xzr, [sp]
and x0, x1, 65535
cmp x0, 1024
bcc .L9
str xzr, [sp, 1024]
.L9:
add x0, sp, 16
add x0, x0, 3
lsr x0, x0, 2
lsl x0, x0, 2
str x0, [x29, 464]
ldr w1, [x29, 424]
sxtw x0, w1
sub x0, x0, #1
str x0, [x29, 472]
sxtw x0, w1
str x0, [x29, 208]
str xzr, [x29, 216]
ldp x2, x3, [x29, 208]
mov x0, x2
lsr x0, x0, 59
mov x4, x3
lsl x4, x4, 5
str x4, [x29, 376]
ldr x4, [x29, 376]
orr x0, x0, x4
str x0, [x29, 376]
mov x0, x2
lsl x0, x0, 5
str x0, [x29, 368]
sxtw x0, w1
str x0, [x29, 192]
str xzr, [x29, 200]
ldp x2, x3, [x29, 192]
mov x0, x2
lsr x0, x0, 59
mov x4, x3
lsl x4, x4, 5
str x4, [x29, 360]
ldr x4, [x29, 360]
orr x0, x0, x4
str x0, [x29, 360]
mov x0, x2
lsl x0, x0, 5
str x0, [x29, 352]
sxtw x0, w1
lsl x0, x0, 2
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L10:
cmp sp, x1
beq .L11
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L10
.L11:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L12
str xzr, [sp, 1024]
.L12:
add x0, sp, 16
add x0, x0, 3
lsr x0, x0, 2
lsl x0, x0, 2
str x0, [x29, 480]
ldr w0, [x29, 424]
sxtw x1, w0
sub x1, x1, #1
str x1, [x29, 488]
sxtw x1, w0
str x1, [x29, 176]
str xzr, [x29, 184]
ldp x2, x3, [x29, 176]
mov x1, x2
lsr x1, x1, 59
mov x4, x3
lsl x4, x4, 5
str x4, [x29, 344]
ldr x4, [x29, 344]
orr x1, x1, x4
str x1, [x29, 344]
mov x1, x2
lsl x1, x1, 5
str x1, [x29, 336]
sxtw x1, w0
str x1, [x29, 160]
str xzr, [x29, 168]
ldp x2, x3, [x29, 160]
mov x1, x2
lsr x1, x1, 59
mov x4, x3
lsl x4, x4, 5
str x4, [x29, 328]
ldr x4, [x29, 328]
orr x1, x1, x4
str x1, [x29, 328]
mov x1, x2
lsl x1, x1, 5
str x1, [x29, 320]
sxtw x0, w0
lsl x0, x0, 2
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L13:
cmp sp, x1
beq .L14
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L13
.L14:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L15
str xzr, [sp, 1024]
.L15:
add x0, sp, 16
add x0, x0, 3
lsr x0, x0, 2
lsl x0, x0, 2
str x0, [x29, 496]
ldr w0, [x29, 424]
sxtw x1, w0
sub x1, x1, #1
str x1, [x29, 504]
sxtw x1, w0
str x1, [x29, 144]
str xzr, [x29, 152]
ldp x2, x3, [x29, 144]
mov x1, x2
lsr x1, x1, 59
mov x4, x3
lsl x4, x4, 5
str x4, [x29, 312]
ldr x4, [x29, 312]
orr x1, x1, x4
str x1, [x29, 312]
mov x1, x2
lsl x1, x1, 5
str x1, [x29, 304]
sxtw x1, w0
str x1, [x29, 128]
str xzr, [x29, 136]
ldp x2, x3, [x29, 128]
mov x1, x2
lsr x1, x1, 59
mov x4, x3
lsl x4, x4, 5
str x4, [x29, 296]
ldr x4, [x29, 296]
orr x1, x1, x4
str x1, [x29, 296]
mov x1, x2
lsl x1, x1, 5
str x1, [x29, 288]
sxtw x0, w0
lsl x0, x0, 2
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L16:
cmp sp, x1
beq .L17
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L16
.L17:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L18
str xzr, [sp, 1024]
.L18:
add x0, sp, 16
add x0, x0, 3
lsr x0, x0, 2
lsl x0, x0, 2
str x0, [x29, 512]
ldr w0, [x29, 424]
sxtw x1, w0
sub x1, x1, #1
str x1, [x29, 520]
sxtw x1, w0
str x1, [x29, 112]
str xzr, [x29, 120]
ldp x2, x3, [x29, 112]
mov x1, x2
lsr x1, x1, 59
mov x4, x3
lsl x4, x4, 5
str x4, [x29, 280]
ldr x4, [x29, 280]
orr x1, x1, x4
str x1, [x29, 280]
mov x1, x2
lsl x1, x1, 5
str x1, [x29, 272]
sxtw x1, w0
str x1, [x29, 96]
str xzr, [x29, 104]
ldp x2, x3, [x29, 96]
mov x1, x2
lsr x1, x1, 59
mov x4, x3
lsl x4, x4, 5
str x4, [x29, 264]
ldr x4, [x29, 264]
orr x1, x1, x4
str x1, [x29, 264]
mov x1, x2
lsl x1, x1, 5
str x1, [x29, 256]
sxtw x0, w0
lsl x0, x0, 2
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L19:
cmp sp, x1
beq .L20
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L19
.L20:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L21
str xzr, [sp, 1024]
.L21:
add x0, sp, 16
add x0, x0, 3
lsr x0, x0, 2
lsl x0, x0, 2
str x0, [x29, 528]
str wzr, [x29, 432]
b .L22
.L23:
ldrsw x0, [x29, 432]
lsl x0, x0, 2
ldr x1, [x29, 464]
add x3, x1, x0
ldrsw x0, [x29, 432]
lsl x0, x0, 2
ldr x1, [x29, 480]
add x0, x1, x0
mov x2, x0
mov x1, x3
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl __isoc99_scanf
ldr x0, [x29, 496]
ldrsw x1, [x29, 432]
str wzr, [x0, x1, lsl 2]
ldr x0, [x29, 512]
ldrsw x1, [x29, 432]
mov w2, 1
str w2, [x0, x1, lsl 2]
ldr w0, [x29, 432]
add w0, w0, 1
str w0, [x29, 432]
.L22:
ldr w0, [x29, 424]
ldr w1, [x29, 432]
cmp w1, w0
blt .L23
str wzr, [x29, 432]
b .L24
.L27:
ldr x0, [x29, 464]
ldrsw x1, [x29, 432]
ldr w0, [x0, x1, lsl 2]
str w0, [x29, 436]
b .L25
.L26:
ldr x0, [x29, 496]
ldrsw x1, [x29, 432]
ldr w1, [x0, x1, lsl 2]
ldr x0, [x29, 448]
ldrsw x2, [x29, 436]
ldr w0, [x0, x2, lsl 2]
add w2, w1, w0
ldr x0, [x29, 496]
ldrsw x1, [x29, 432]
str w2, [x0, x1, lsl 2]
ldr w0, [x29, 436]
add w0, w0, 1
str w0, [x29, 436]
.L25:
ldr x0, [x29, 480]
ldrsw x1, [x29, 432]
ldr w0, [x0, x1, lsl 2]
ldr w1, [x29, 436]
cmp w1, w0
ble .L26
ldr x0, [x29, 496]
ldrsw x1, [x29, 432]
ldr w0, [x0, x1, lsl 2]
ldr w1, [x29, 428]
sdiv w2, w0, w1
mul w1, w2, w1
sub w2, w0, w1
ldr x0, [x29, 496]
ldrsw x1, [x29, 432]
str w2, [x0, x1, lsl 2]
ldr w0, [x29, 432]
add w0, w0, 1
str w0, [x29, 432]
.L24:
ldr w0, [x29, 424]
ldr w1, [x29, 432]
cmp w1, w0
blt .L27
str wzr, [x29, 432]
b .L28
.L31:
ldr x0, [x29, 464]
ldrsw x1, [x29, 432]
ldr w0, [x0, x1, lsl 2]
str w0, [x29, 436]
b .L29
.L30:
ldr x0, [x29, 512]
ldrsw x1, [x29, 432]
ldr w1, [x0, x1, lsl 2]
ldr x0, [x29, 448]
ldrsw x2, [x29, 436]
ldr w0, [x0, x2, lsl 2]
mul w2, w1, w0
ldr x0, [x29, 512]
ldrsw x1, [x29, 432]
str w2, [x0, x1, lsl 2]
ldr x0, [x29, 512]
ldrsw x1, [x29, 432]
ldr w0, [x0, x1, lsl 2]
ldr w1, [x29, 428]
sdiv w2, w0, w1
mul w1, w2, w1
sub w2, w0, w1
ldr x0, [x29, 512]
ldrsw x1, [x29, 432]
str w2, [x0, x1, lsl 2]
ldr w0, [x29, 436]
add w0, w0, 1
str w0, [x29, 436]
.L29:
ldr x0, [x29, 480]
ldrsw x1, [x29, 432]
ldr w0, [x0, x1, lsl 2]
ldr w1, [x29, 436]
cmp w1, w0
ble .L30
ldr w0, [x29, 432]
add w0, w0, 1
str w0, [x29, 432]
.L28:
ldr w0, [x29, 424]
ldr w1, [x29, 432]
cmp w1, w0
blt .L31
str wzr, [x29, 432]
b .L32
.L35:
ldr x0, [x29, 512]
ldrsw x1, [x29, 432]
ldr w1, [x0, x1, lsl 2]
ldr x0, [x29, 496]
ldrsw x2, [x29, 432]
ldr w0, [x0, x2, lsl 2]
cmp w1, w0
csel w1, w1, w0, le
ldr x0, [x29, 448]
sxtw x1, w1
ldr w2, [x0, x1, lsl 2]
ldr x0, [x29, 528]
ldrsw x1, [x29, 432]
str w2, [x0, x1, lsl 2]
ldr x0, [x29, 512]
ldrsw x1, [x29, 432]
ldr w1, [x0, x1, lsl 2]
ldr x0, [x29, 496]
ldrsw x2, [x29, 432]
ldr w0, [x0, x2, lsl 2]
cmp w1, w0
csel w0, w1, w0, le
str w0, [x29, 436]
b .L33
.L34:
ldr x0, [x29, 528]
ldrsw x1, [x29, 432]
ldr w1, [x0, x1, lsl 2]
ldr w0, [x29, 436]
add w2, w0, 1
ldr x0, [x29, 448]
sxtw x2, w2
ldr w0, [x0, x2, lsl 2]
eor w2, w1, w0
ldr x0, [x29, 528]
ldrsw x1, [x29, 432]
str w2, [x0, x1, lsl 2]
ldr w0, [x29, 436]
add w0, w0, 1
str w0, [x29, 436]
.L33:
ldr x0, [x29, 496]
ldrsw x1, [x29, 432]
ldr w1, [x0, x1, lsl 2]
ldr x0, [x29, 512]
ldrsw x2, [x29, 432]
ldr w0, [x0, x2, lsl 2]
cmp w1, w0
csel w0, w1, w0, ge
ldr w1, [x29, 436]
cmp w1, w0
blt .L34
ldr w0, [x29, 432]
add w0, w0, 1
str w0, [x29, 432]
.L32:
ldr w0, [x29, 424]
ldr w1, [x29, 432]
cmp w1, w0
blt .L35
str wzr, [x29, 432]
b .L36
.L37:
ldr x0, [x29, 528]
ldrsw x1, [x29, 432]
ldr w0, [x0, x1, lsl 2]
mov w1, w0
adrp x0, .LC2
add x0, x0, :lo12:.LC2
bl printf
ldr w0, [x29, 432]
add w0, w0, 1
str w0, [x29, 432]
.L36:
ldr w0, [x29, 424]
ldr w1, [x29, 432]
cmp w1, w0
blt .L37
mov w0, 0
mov sp, x19
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [x29, 536]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L39
bl __stack_chk_fail
.L39:
mov w0, w1
sub sp, x29, #16
.cfi_def_cfa 31, 560
ldp x19, x20, [sp, 32]
ldp x21, x22, [sp, 48]
ldp x23, x24, [sp, 64]
ldp x25, x26, [sp, 80]
ldr x27, [sp, 96]
ldp x29, x30, [sp, 16]
add sp, sp, 560
.cfi_restore 29
.cfi_restore 30
.cfi_restore 27
.cfi_restore 25
.cfi_restore 26
.cfi_restore 23
.cfi_restore 24
.cfi_restore 21
.cfi_restore 22
.cfi_restore 19
.cfi_restore 20
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC0:
.string "%s"
.text
.align 2
.global main
.type main, %function
main:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
mov w0, 1
str w0, [sp, 28]
ldr w1, [sp, 28]
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl printf
mov w0, 0
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global main
.type main, %function
main:
.LFB0:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str w0, [sp, 12]
str x1, [sp]
ldr w0, [sp, 12]
cmp w0, 0
beq .L2
mov w0, 0
b .L3
.L2:
mov w0, 1
.L3:
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC0:
.string "Hello, world!"
.text
.align 2
.global main
.type main, %function
main:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -16]!
.cfi_def_cfa_offset 16
.cfi_offset 29, -16
.cfi_offset 30, -8
mov x29, sp
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl puts
mov w0, 0
ldp x29, x30, [sp], 16
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global RandomFunc
.type RandomFunc, %function
RandomFunc:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -80]!
.cfi_def_cfa_offset 80
.cfi_offset 29, -80
.cfi_offset 30, -72
mov x29, sp
str x0, [sp, 24]
str x1, [sp, 16]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 72]
mov x1, 0
ldr x0, [sp, 24]
ldr x0, [x0]
lsr x1, x0, 3
mov x0, 47797
movk x0, 0x61, lsl 16
orr x0, x1, x0
str x0, [sp, 64]
str xzr, [sp, 56]
b .L2
.L7:
str xzr, [sp, 48]
b .L3
.L6:
ldr x1, [sp, 64]
ldr x2, [sp, 48]
ldr x0, [sp, 56]
and x0, x2, x0
cmp x1, x0
bls .L4
ldr x0, [sp, 48]
lsl x0, x0, 3
add x1, sp, 64
ldr x1, [x1, x0]
ldr x0, [sp, 48]
lsl x0, x0, 3
add x2, sp, 64
ldr x0, [x2, x0]
and w0, w0, 6
orr w0, w0, 1
lsr x2, x1, x0
ldr x0, [sp, 56]
lsl x0, x0, 3
add x1, sp, 64
str x2, [x1, x0]
b .L5
.L4:
add x0, sp, 64
add x0, x0, 6
ldrh w0, [x0]
strh w0, [sp, 46]
add x1, sp, 64
add x1, x1, 2
add x0, sp, 64
add x0, x0, 6
ldrh w1, [x1]
strh w1, [x0]
add x0, sp, 64
add x0, x0, 2
ldrh w1, [sp, 46]
strh w1, [x0]
.L5:
ldr x0, [sp, 48]
add x0, x0, 2
str x0, [sp, 48]
.L3:
ldr x0, [sp, 24]
add x0, x0, 8
ldr x0, [x0]
ldr x1, [sp, 48]
cmp x1, x0
bcc .L6
ldr x0, [sp, 56]
add x0, x0, 2
str x0, [sp, 56]
.L2:
ldr x0, [sp, 24]
add x0, x0, 8
ldr x0, [x0]
ldr x1, [sp, 56]
cmp x1, x0
bcc .L7
ldr x0, [sp, 64]
lsl x1, x0, 1
mov x0, 33313
movk x0, 0x75, lsl 16
eor x1, x1, x0
ldr x0, [sp, 16]
str x1, [x0]
nop
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [sp, 72]
ldr x1, [x0]
subs x2, x2, x1
mov x1, 0
beq .L8
bl __stack_chk_fail
.L8:
ldp x29, x30, [sp], 80
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size RandomFunc, .-RandomFunc
.align 2
.global megaInit
.type megaInit, %function
megaInit:
.LFB1:
.cfi_startproc
nop
ret
.cfi_endproc
.LFE1:
.size megaInit, .-megaInit
.section .rodata
.align 3
.LC0:
.string "Call this program with %i arguments\n"
.align 3
.LC1:
.string "You win!"
.align 3
.LC2:
.string "%lu\n"
.text
.align 2
.global main
.type main, %function
main:
.LFB2:
.cfi_startproc
stp x29, x30, [sp, -80]!
.cfi_def_cfa_offset 80
.cfi_offset 29, -80
.cfi_offset 30, -72
mov x29, sp
str w0, [sp, 28]
str x1, [sp, 16]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 72]
mov x1, 0
bl megaInit
ldr w0, [sp, 28]
cmp w0, 2
beq .L11
mov w1, 1
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl printf
mov w0, -1
bl exit
.L11:
str wzr, [sp, 40]
b .L12
.L13:
ldrsw x0, [sp, 40]
add x0, x0, 1
lsl x0, x0, 3
ldr x1, [sp, 16]
add x0, x1, x0
ldr x0, [x0]
mov w2, 10
mov x1, 0
bl strtoul
str x0, [sp, 48]
ldrsw x0, [sp, 40]
lsl x0, x0, 3
add x1, sp, 56
ldr x2, [sp, 48]
str x2, [x1, x0]
ldr w0, [sp, 40]
add w0, w0, 1
str w0, [sp, 40]
.L12:
ldr w0, [sp, 40]
cmp w0, 0
ble .L13
add x1, sp, 64
add x0, sp, 56
bl RandomFunc
ldr x1, [sp, 64]
mov x0, 16818
movk x0, 0xfcde, lsl 16
cmp x1, x0
bne .L14
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl puts
.L14:
str wzr, [sp, 44]
b .L15
.L16:
ldrsw x0, [sp, 44]
lsl x0, x0, 3
add x1, sp, 64
ldr x0, [x1, x0]
mov x1, x0
adrp x0, .LC2
add x0, x0, :lo12:.LC2
bl printf
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L15:
ldr w0, [sp, 44]
cmp w0, 0
ble .L16
mov w0, 0
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 72]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L18
bl __stack_chk_fail
.L18:
mov w0, w1
ldp x29, x30, [sp], 80
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE2:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.type swapfunc, %function
swapfunc:
.LFB6:
.cfi_startproc
sub sp, sp, #96
.cfi_def_cfa_offset 96
str x0, [sp, 24]
str x1, [sp, 16]
str w2, [sp, 12]
str w3, [sp, 8]
ldr w0, [sp, 8]
cmp w0, 1
bgt .L2
ldrsw x0, [sp, 12]
lsr x0, x0, 3
str x0, [sp, 40]
ldr x0, [sp, 24]
str x0, [sp, 48]
ldr x0, [sp, 16]
str x0, [sp, 56]
.L3:
ldr x0, [sp, 48]
ldr x0, [x0]
str x0, [sp, 88]
ldr x0, [sp, 48]
add x1, x0, 8
str x1, [sp, 48]
ldr x1, [sp, 56]
ldr x1, [x1]
str x1, [x0]
ldr x0, [sp, 56]
add x1, x0, 8
str x1, [sp, 56]
ldr x1, [sp, 88]
str x1, [x0]
ldr x0, [sp, 40]
sub x0, x0, #1
str x0, [sp, 40]
ldr x0, [sp, 40]
cmp x0, 0
bgt .L3
b .L6
.L2:
ldrsw x0, [sp, 12]
str x0, [sp, 64]
ldr x0, [sp, 24]
str x0, [sp, 72]
ldr x0, [sp, 16]
str x0, [sp, 80]
.L5:
ldr x0, [sp, 72]
ldrb w0, [x0]
strb w0, [sp, 39]
ldr x0, [sp, 72]
add x1, x0, 1
str x1, [sp, 72]
ldr x1, [sp, 80]
ldrb w1, [x1]
strb w1, [x0]
ldr x0, [sp, 80]
add x1, x0, 1
str x1, [sp, 80]
ldrb w1, [sp, 39]
strb w1, [x0]
ldr x0, [sp, 64]
sub x0, x0, #1
str x0, [sp, 64]
ldr x0, [sp, 64]
cmp x0, 0
bgt .L5
.L6:
nop
add sp, sp, 96
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE6:
.size swapfunc, .-swapfunc
.align 2
.type med3, %function
med3:
.LFB7:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str x0, [sp, 56]
str x1, [sp, 48]
str x2, [sp, 40]
str x3, [sp, 32]
str x4, [sp, 24]
ldr x2, [sp, 32]
ldr x1, [sp, 48]
ldr x0, [sp, 56]
blr x2
cmp w0, 0
bge .L8
ldr x2, [sp, 32]
ldr x1, [sp, 40]
ldr x0, [sp, 48]
blr x2
cmp w0, 0
blt .L9
ldr x2, [sp, 32]
ldr x1, [sp, 40]
ldr x0, [sp, 56]
blr x2
cmp w0, 0
bge .L10
ldr x0, [sp, 40]
b .L18
.L10:
ldr x0, [sp, 56]
b .L18
.L9:
ldr x0, [sp, 48]
b .L18
.L8:
ldr x2, [sp, 32]
ldr x1, [sp, 40]
ldr x0, [sp, 48]
blr x2
cmp w0, 0
bgt .L14
ldr x2, [sp, 32]
ldr x1, [sp, 40]
ldr x0, [sp, 56]
blr x2
cmp w0, 0
bge .L15
ldr x0, [sp, 56]
b .L18
.L15:
ldr x0, [sp, 40]
b .L18
.L14:
ldr x0, [sp, 48]
.L18:
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE7:
.size med3, .-med3
.align 2
.global igraph_qsort
.type igraph_qsort, %function
igraph_qsort:
.LFB8:
.cfi_startproc
stp x29, x30, [sp, -176]!
.cfi_def_cfa_offset 176
.cfi_offset 29, -176
.cfi_offset 30, -168
mov x29, sp
str x0, [sp, 40]
str x1, [sp, 32]
str x2, [sp, 24]
str x3, [sp, 16]
.L20:
ldr x0, [sp, 40]
and x0, x0, 7
cmp x0, 0
bne .L21
ldr x0, [sp, 24]
and x0, x0, 7
cmp x0, 0
bne .L21
ldr x0, [sp, 24]
cmp x0, 8
cset w0, ne
and w0, w0, 255
b .L22
.L21:
mov w0, 2
.L22:
str w0, [sp, 60]
str wzr, [sp, 56]
ldr x0, [sp, 32]
cmp x0, 6
bhi .L23
ldr x1, [sp, 40]
ldr x0, [sp, 24]
add x0, x1, x0
str x0, [sp, 112]
b .L24
.L30:
ldr x0, [sp, 112]
str x0, [sp, 104]
b .L25
.L29:
ldr w0, [sp, 60]
cmp w0, 0
bne .L26
ldr x0, [sp, 104]
ldr x0, [x0]
str x0, [sp, 168]
ldr x0, [sp, 24]
neg x0, x0
ldr x1, [sp, 104]
add x0, x1, x0
ldr x1, [x0]
ldr x0, [sp, 104]
str x1, [x0]
ldr x0, [sp, 24]
neg x0, x0
ldr x1, [sp, 104]
add x0, x1, x0
ldr x1, [sp, 168]
str x1, [x0]
b .L27
.L26:
ldr x0, [sp, 24]
neg x0, x0
ldr x1, [sp, 104]
add x0, x1, x0
ldr x1, [sp, 24]
ldr w3, [sp, 60]
mov w2, w1
mov x1, x0
ldr x0, [sp, 104]
bl swapfunc
.L27:
ldr x0, [sp, 24]
neg x0, x0
ldr x1, [sp, 104]
add x0, x1, x0
str x0, [sp, 104]
.L25:
ldr x1, [sp, 104]
ldr x0, [sp, 40]
cmp x1, x0
bls .L28
ldr x0, [sp, 24]
neg x0, x0
ldr x1, [sp, 104]
add x0, x1, x0
ldr x2, [sp, 16]
ldr x1, [sp, 104]
blr x2
cmp w0, 0
bgt .L29
.L28:
ldr x1, [sp, 112]
ldr x0, [sp, 24]
add x0, x1, x0
str x0, [sp, 112]
.L24:
ldr x1, [sp, 32]
ldr x0, [sp, 24]
mul x0, x1, x0
ldr x1, [sp, 40]
add x0, x1, x0
ldr x1, [sp, 112]
cmp x1, x0
bcc .L30
b .L19
.L23:
ldr x0, [sp, 32]
lsr x1, x0, 1
ldr x0, [sp, 24]
mul x0, x1, x0
ldr x1, [sp, 40]
add x0, x1, x0
str x0, [sp, 112]
ldr x0, [sp, 32]
cmp x0, 7
bls .L32
ldr x0, [sp, 40]
str x0, [sp, 104]
ldr x0, [sp, 32]
sub x1, x0, #1
ldr x0, [sp, 24]
mul x0, x1, x0
ldr x1, [sp, 40]
add x0, x1, x0
str x0, [sp, 120]
ldr x0, [sp, 32]
cmp x0, 40
bls .L33
ldr x0, [sp, 32]
lsr x0, x0, 3
mov w1, w0
ldr x0, [sp, 24]
mul w0, w1, w0
str w0, [sp, 64]
ldrsw x0, [sp, 64]
ldr x1, [sp, 104]
add x5, x1, x0
ldr w0, [sp, 64]
lsl w0, w0, 1
sxtw x0, w0
ldr x1, [sp, 104]
add x0, x1, x0
mov x4, 0
ldr x3, [sp, 16]
mov x2, x0
mov x1, x5
ldr x0, [sp, 104]
bl med3
str x0, [sp, 104]
ldrsw x0, [sp, 64]
neg x0, x0
ldr x1, [sp, 112]
add x5, x1, x0
ldrsw x0, [sp, 64]
ldr x1, [sp, 112]
add x0, x1, x0
mov x4, 0
ldr x3, [sp, 16]
mov x2, x0
ldr x1, [sp, 112]
mov x0, x5
bl med3
str x0, [sp, 112]
ldr w0, [sp, 64]
lsl w0, w0, 1
sxtw x0, w0
neg x0, x0
ldr x1, [sp, 120]
add x5, x1, x0
ldrsw x0, [sp, 64]
neg x0, x0
ldr x1, [sp, 120]
add x0, x1, x0
mov x4, 0
ldr x3, [sp, 16]
ldr x2, [sp, 120]
mov x1, x0
mov x0, x5
bl med3
str x0, [sp, 120]
.L33:
mov x4, 0
ldr x3, [sp, 16]
ldr x2, [sp, 120]
ldr x1, [sp, 112]
ldr x0, [sp, 104]
bl med3
str x0, [sp, 112]
.L32:
ldr w0, [sp, 60]
cmp w0, 0
bne .L34
ldr x0, [sp, 40]
ldr x0, [x0]
str x0, [sp, 128]
ldr x0, [sp, 112]
ldr x1, [x0]
ldr x0, [sp, 40]
str x1, [x0]
ldr x0, [sp, 112]
ldr x1, [sp, 128]
str x1, [x0]
b .L35
.L34:
ldr x0, [sp, 24]
ldr w3, [sp, 60]
mov w2, w0
ldr x1, [sp, 112]
ldr x0, [sp, 40]
bl swapfunc
.L35:
ldr x1, [sp, 40]
ldr x0, [sp, 24]
add x0, x1, x0
str x0, [sp, 80]
ldr x0, [sp, 80]
str x0, [sp, 72]
ldr x0, [sp, 32]
sub x1, x0, #1
ldr x0, [sp, 24]
mul x0, x1, x0
ldr x1, [sp, 40]
add x0, x1, x0
str x0, [sp, 96]
ldr x0, [sp, 96]
str x0, [sp, 88]
b .L36
.L41:
ldr w0, [sp, 68]
cmp w0, 0
bne .L37
mov w0, 1
str w0, [sp, 56]
ldr w0, [sp, 60]
cmp w0, 0
bne .L38
ldr x0, [sp, 72]
ldr x0, [x0]
str x0, [sp, 136]
ldr x0, [sp, 80]
ldr x1, [x0]
ldr x0, [sp, 72]
str x1, [x0]
ldr x0, [sp, 80]
ldr x1, [sp, 136]
str x1, [x0]
b .L39
.L38:
ldr x0, [sp, 24]
ldr w3, [sp, 60]
mov w2, w0
ldr x1, [sp, 80]
ldr x0, [sp, 72]
bl swapfunc
.L39:
ldr x1, [sp, 72]
ldr x0, [sp, 24]
add x0, x1, x0
str x0, [sp, 72]
.L37:
ldr x1, [sp, 80]
ldr x0, [sp, 24]
add x0, x1, x0
str x0, [sp, 80]
.L36:
ldr x1, [sp, 80]
ldr x0, [sp, 88]
cmp x1, x0
bhi .L42
ldr x2, [sp, 16]
ldr x1, [sp, 40]
ldr x0, [sp, 80]
blr x2
str w0, [sp, 68]
ldr w0, [sp, 68]
cmp w0, 0
ble .L41
b .L42
.L47:
ldr w0, [sp, 68]
cmp w0, 0
bne .L43
mov w0, 1
str w0, [sp, 56]
ldr w0, [sp, 60]
cmp w0, 0
bne .L44
ldr x0, [sp, 88]
ldr x0, [x0]
str x0, [sp, 144]
ldr x0, [sp, 96]
ldr x1, [x0]
ldr x0, [sp, 88]
str x1, [x0]
ldr x0, [sp, 96]
ldr x1, [sp, 144]
str x1, [x0]
b .L45
.L44:
ldr x0, [sp, 24]
ldr w3, [sp, 60]
mov w2, w0
ldr x1, [sp, 96]
ldr x0, [sp, 88]
bl swapfunc
.L45:
ldr x0, [sp, 24]
neg x0, x0
ldr x1, [sp, 96]
add x0, x1, x0
str x0, [sp, 96]
.L43:
ldr x0, [sp, 24]
neg x0, x0
ldr x1, [sp, 88]
add x0, x1, x0
str x0, [sp, 88]
.L42:
ldr x1, [sp, 80]
ldr x0, [sp, 88]
cmp x1, x0
bhi .L46
ldr x2, [sp, 16]
ldr x1, [sp, 40]
ldr x0, [sp, 88]
blr x2
str w0, [sp, 68]
ldr w0, [sp, 68]
cmp w0, 0
bge .L47
.L46:
ldr x1, [sp, 80]
ldr x0, [sp, 88]
cmp x1, x0
bhi .L65
ldr w0, [sp, 60]
cmp w0, 0
bne .L50
ldr x0, [sp, 80]
ldr x0, [x0]
str x0, [sp, 152]
ldr x0, [sp, 88]
ldr x1, [x0]
ldr x0, [sp, 80]
str x1, [x0]
ldr x0, [sp, 88]
ldr x1, [sp, 152]
str x1, [x0]
b .L51
.L50:
ldr x0, [sp, 24]
ldr w3, [sp, 60]
mov w2, w0
ldr x1, [sp, 88]
ldr x0, [sp, 80]
bl swapfunc
.L51:
mov w0, 1
str w0, [sp, 56]
ldr x1, [sp, 80]
ldr x0, [sp, 24]
add x0, x1, x0
str x0, [sp, 80]
ldr x0, [sp, 24]
neg x0, x0
ldr x1, [sp, 88]
add x0, x1, x0
str x0, [sp, 88]
b .L36
.L65:
nop
ldr w0, [sp, 56]
cmp w0, 0
bne .L53
ldr x1, [sp, 40]
ldr x0, [sp, 24]
add x0, x1, x0
str x0, [sp, 112]
b .L54
.L60:
ldr x0, [sp, 112]
str x0, [sp, 104]
b .L55
.L59:
ldr w0, [sp, 60]
cmp w0, 0
bne .L56
ldr x0, [sp, 104]
ldr x0, [x0]
str x0, [sp, 160]
ldr x0, [sp, 24]
neg x0, x0
ldr x1, [sp, 104]
add x0, x1, x0
ldr x1, [x0]
ldr x0, [sp, 104]
str x1, [x0]
ldr x0, [sp, 24]
neg x0, x0
ldr x1, [sp, 104]
add x0, x1, x0
ldr x1, [sp, 160]
str x1, [x0]
b .L57
.L56:
ldr x0, [sp, 24]
neg x0, x0
ldr x1, [sp, 104]
add x0, x1, x0
ldr x1, [sp, 24]
ldr w3, [sp, 60]
mov w2, w1
mov x1, x0
ldr x0, [sp, 104]
bl swapfunc
.L57:
ldr x0, [sp, 24]
neg x0, x0
ldr x1, [sp, 104]
add x0, x1, x0
str x0, [sp, 104]
.L55:
ldr x1, [sp, 104]
ldr x0, [sp, 40]
cmp x1, x0
bls .L58
ldr x0, [sp, 24]
neg x0, x0
ldr x1, [sp, 104]
add x0, x1, x0
ldr x2, [sp, 16]
ldr x1, [sp, 104]
blr x2
cmp w0, 0
bgt .L59
.L58:
ldr x1, [sp, 112]
ldr x0, [sp, 24]
add x0, x1, x0
str x0, [sp, 112]
.L54:
ldr x1, [sp, 32]
ldr x0, [sp, 24]
mul x0, x1, x0
ldr x1, [sp, 40]
add x0, x1, x0
ldr x1, [sp, 112]
cmp x1, x0
bcc .L60
b .L19
.L53:
ldr x1, [sp, 32]
ldr x0, [sp, 24]
mul x0, x1, x0
ldr x1, [sp, 40]
add x0, x1, x0
str x0, [sp, 120]
ldr x1, [sp, 80]
ldr x0, [sp, 72]
sub x1, x1, x0
ldr x2, [sp, 72]
ldr x0, [sp, 40]
sub x0, x2, x0
cmp x1, x0
csel x0, x1, x0, le
str w0, [sp, 68]
ldr w0, [sp, 68]
cmp w0, 0
ble .L61
ldrsw x0, [sp, 68]
neg x0, x0
ldr x1, [sp, 80]
add x0, x1, x0
ldr w3, [sp, 60]
ldr w2, [sp, 68]
mov x1, x0
ldr x0, [sp, 40]
bl swapfunc
.L61:
ldr x1, [sp, 120]
ldr x0, [sp, 96]
sub x0, x1, x0
mov x1, x0
ldr x0, [sp, 24]
sub x0, x1, x0
ldr x2, [sp, 96]
ldr x1, [sp, 88]
sub x1, x2, x1
cmp x0, x1
csel x0, x0, x1, ls
str w0, [sp, 68]
ldr w0, [sp, 68]
cmp w0, 0
ble .L62
ldrsw x0, [sp, 68]
neg x0, x0
ldr x1, [sp, 120]
add x0, x1, x0
ldr w3, [sp, 60]
ldr w2, [sp, 68]
mov x1, x0
ldr x0, [sp, 80]
bl swapfunc
.L62:
ldr x1, [sp, 80]
ldr x0, [sp, 72]
sub x0, x1, x0
str w0, [sp, 68]
ldrsw x0, [sp, 68]
ldr x1, [sp, 24]
cmp x1, x0
bcs .L63
ldrsw x1, [sp, 68]
ldr x0, [sp, 24]
udiv x0, x1, x0
ldr x3, [sp, 16]
ldr x2, [sp, 24]
mov x1, x0
ldr x0, [sp, 40]
bl igraph_qsort
.L63:
ldr x1, [sp, 96]
ldr x0, [sp, 88]
sub x0, x1, x0
str w0, [sp, 68]
ldrsw x0, [sp, 68]
ldr x1, [sp, 24]
cmp x1, x0
bcs .L19
ldrsw x0, [sp, 68]
neg x0, x0
ldr x1, [sp, 120]
add x0, x1, x0
str x0, [sp, 40]
ldrsw x1, [sp, 68]
ldr x0, [sp, 24]
udiv x0, x1, x0
str x0, [sp, 32]
b .L20
.L19:
ldp x29, x30, [sp], 176
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE8:
.size igraph_qsort, .-igraph_qsort
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global send_string
.type send_string, %function
send_string:
.LFB6:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str w0, [sp, 28]
str x1, [sp, 16]
ldr x0, [sp, 16]
bl strlen
str w0, [sp, 40]
b .L2
.L5:
ldrsw x0, [sp, 40]
mov w3, 0
mov x2, x0
ldr x1, [sp, 16]
ldr w0, [sp, 28]
bl send
str w0, [sp, 44]
ldr w0, [sp, 44]
cmn w0, #1
bne .L3
mov w0, 0
b .L4
.L3:
ldr w1, [sp, 40]
ldr w0, [sp, 44]
sub w0, w1, w0
str w0, [sp, 40]
ldrsw x0, [sp, 44]
ldr x1, [sp, 16]
add x0, x1, x0
str x0, [sp, 16]
.L2:
ldr w0, [sp, 40]
cmp w0, 0
bgt .L5
mov w0, 1
.L4:
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE6:
.size send_string, .-send_string
.align 2
.global recv_line
.type recv_line, %function
recv_line:
.LFB7:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str w0, [sp, 28]
str x1, [sp, 16]
str wzr, [sp, 36]
ldr x0, [sp, 16]
str x0, [sp, 40]
b .L7
.L11:
ldr x0, [sp, 40]
ldrb w1, [x0]
adrp x0, .LC0
add x2, x0, :lo12:.LC0
ldrsw x0, [sp, 36]
ldrb w0, [x2, x0]
cmp w1, w0
bne .L8
ldr w0, [sp, 36]
add w0, w0, 1
str w0, [sp, 36]
ldr w0, [sp, 36]
cmp w0, 2
bne .L9
ldr x0, [sp, 40]
sub x0, x0, #1
strb wzr, [x0]
ldr x0, [sp, 16]
bl strlen
b .L10
.L8:
str wzr, [sp, 36]
.L9:
ldr x0, [sp, 40]
add x0, x0, 1
str x0, [sp, 40]
.L7:
mov w3, 0
mov x2, 1
ldr x1, [sp, 40]
ldr w0, [sp, 28]
bl recv
cmp x0, 1
beq .L11
mov w0, 0
.L10:
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE7:
.size recv_line, .-recv_line
.section .rodata
.align 3
.LC0:
.string "\r\n"
.text
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global main
.type main, %function
main:
.LFB6:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str w0, [sp, 28]
str x1, [sp, 16]
mov w0, 256
str w0, [sp, 44]
ldrsw x0, [sp, 44]
bl malloc
str x0, [sp, 48]
ldrsw x0, [sp, 44]
mov x1, x0
ldr x0, [sp, 48]
bl acc_present_or_create
str x0, [sp, 56]
ldr x0, [sp, 56]
cmp x0, 0
bne .L2
bl abort
.L2:
mov x1, 1
ldr x0, [sp, 48]
bl acc_is_present
cmp w0, 1
beq .L3
bl abort
.L3:
ldrsw x0, [sp, 44]
mov x1, x0
ldr x0, [sp, 48]
bl acc_delete
ldr x0, [sp, 48]
bl free
mov w0, 0
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE6:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global trailingZeroes
.type trailingZeroes, %function
trailingZeroes:
.LFB0:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str w0, [sp, 12]
mov w0, 5
str w0, [sp, 28]
str wzr, [sp, 24]
b .L2
.L3:
ldr w1, [sp, 12]
ldr w0, [sp, 28]
sdiv w0, w1, w0
str w0, [sp, 12]
ldr w1, [sp, 24]
ldr w0, [sp, 12]
add w0, w1, w0
str w0, [sp, 24]
.L2:
ldr w0, [sp, 12]
cmp w0, 0
bgt .L3
ldr w0, [sp, 24]
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size trailingZeroes, .-trailingZeroes
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global longestSequence
.type longestSequence, %function
longestSequence:
.LFB0:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str w0, [sp, 12]
str wzr, [sp, 28]
b .L2
.L4:
ldr w0, [sp, 12]
lsl w0, w0, 1
ldr w1, [sp, 12]
and w0, w1, w0
str w0, [sp, 12]
.L2:
ldr w0, [sp, 12]
cmp w0, 0
beq .L3
ldr w0, [sp, 28]
add w0, w0, 1
str w0, [sp, 28]
ldr w0, [sp, 28]
cmp w0, 0
bne .L4
.L3:
ldr w0, [sp, 28]
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size longestSequence, .-longestSequence
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global main
.type main, %function
main:
.LFB0:
.cfi_startproc
sub sp, sp, #1072
.cfi_def_cfa_offset 1072
stp x29, x30, [sp]
.cfi_offset 29, -1072
.cfi_offset 30, -1064
mov x29, sp
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 1064]
mov x1, 0
str wzr, [sp, 28]
b .L2
.L3:
ldrsw x0, [sp, 28]
lsl x0, x0, 2
add x1, sp, 40
str wzr, [x1, x0]
ldr w0, [sp, 28]
add w0, w0, 1
str w0, [sp, 28]
.L2:
ldr w0, [sp, 28]
cmp w0, 255
ble .L3
b .L4
.L5:
ldrsw x0, [sp, 36]
lsl x0, x0, 2
add x1, sp, 40
ldr w0, [x1, x0]
add w2, w0, 1
ldrsw x0, [sp, 36]
lsl x0, x0, 2
add x1, sp, 40
str w2, [x1, x0]
.L4:
bl getchar
str w0, [sp, 36]
ldr w0, [sp, 36]
cmn w0, #1
bne .L5
str wzr, [sp, 28]
b .L6
.L11:
ldrsw x0, [sp, 28]
lsl x0, x0, 2
add x1, sp, 40
ldr w0, [x1, x0]
cmp w0, 0
beq .L14
ldr w0, [sp, 28]
bl putchar
str wzr, [sp, 32]
b .L9
.L10:
mov w0, 42
bl putchar
ldr w0, [sp, 32]
add w0, w0, 1
str w0, [sp, 32]
.L9:
ldrsw x0, [sp, 28]
lsl x0, x0, 2
add x1, sp, 40
ldr w0, [x1, x0]
ldr w1, [sp, 32]
cmp w1, w0
blt .L10
mov w0, 10
bl putchar
b .L8
.L14:
nop
.L8:
ldr w0, [sp, 28]
add w0, w0, 1
str w0, [sp, 28]
.L6:
ldr w0, [sp, 28]
cmp w0, 255
ble .L11
mov w0, 0
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 1064]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L13
bl __stack_chk_fail
.L13:
mov w0, w1
ldp x29, x30, [sp]
add sp, sp, 1072
.cfi_restore 29
.cfi_restore 30
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC1:
.string "rb"
.text
.align 2
.global read_buffer
.type read_buffer, %function
read_buffer:
.LFB6:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str x0, [sp, 24]
str x1, [sp, 16]
adrp x0, .LC1
add x1, x0, :lo12:.LC1
ldr x0, [sp, 24]
bl fopen
str x0, [sp, 40]
ldr x0, [sp, 40]
cmp x0, 0
bne .L2
mov x0, 0
b .L3
.L2:
mov w2, 2
mov x1, 0
ldr x0, [sp, 40]
bl fseek
ldr x0, [sp, 40]
bl ftell
str x0, [sp, 48]
mov w2, 0
mov x1, 0
ldr x0, [sp, 40]
bl fseek
ldr x0, [sp, 48]
add x0, x0, 1
bl malloc
str x0, [sp, 56]
ldr x3, [sp, 40]
ldr x2, [sp, 48]
mov x1, 1
ldr x0, [sp, 56]
bl fread
ldr x1, [sp, 56]
ldr x0, [sp, 48]
add x0, x1, x0
strb wzr, [x0]
ldr x0, [sp, 16]
cmp x0, 0
beq .L4
ldr x0, [sp, 16]
ldr x1, [sp, 48]
str x1, [x0]
.L4:
ldr x0, [sp, 56]
.L3:
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE6:
.size read_buffer, .-read_buffer
.section .rodata
.align 3
.LC2:
.string "w+"
.text
.align 2
.global write_buffer
.type write_buffer, %function
write_buffer:
.LFB7:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str x0, [sp, 40]
str x1, [sp, 32]
str x2, [sp, 24]
adrp x0, .LC2
add x1, x0, :lo12:.LC2
ldr x0, [sp, 40]
bl fopen
str x0, [sp, 56]
ldr x0, [sp, 32]
cmp x0, 0
beq .L6
ldr x3, [sp, 56]
ldr x2, [sp, 24]
mov x1, 1
ldr x0, [sp, 32]
bl fwrite
.L6:
ldr x0, [sp, 56]
bl fclose
nop
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE7:
.size write_buffer, .-write_buffer
.section .rodata
.align 3
.LC3:
.string "error: call to 'clGetPlatformIDs' failed"
.align 3
.LC4:
.string "Number of platforms: %d\n"
.align 3
.LC5:
.string "platform=%p\n"
.align 3
.LC6:
.string "error: call to 'clGetPlatformInfo' failed"
.align 3
.LC7:
.string "platform.name='%s'\n\n"
.align 3
.LC8:
.string "error: call to 'clGetDeviceIDs' failed"
.align 3
.LC9:
.string "Number of devices: %d\n"
.align 3
.LC10:
.string "device=%p\n"
.align 3
.LC11:
.string "error: call to 'clGetDeviceInfo' failed"
.align 3
.LC12:
.string "device.name='%s'\n"
.align 3
.LC13:
.string "error: call to 'clCreateContext' failed"
.align 3
.LC14:
.string "context=%p\n"
.align 3
.LC15:
.string "error: call to 'clCreateCommandQueue' failed"
.align 3
.LC16:
.string "command_queue=%p\n"
.align 3
.LC17:
.string "error: No binary specified"
.align 3
.LC18:
.string "error: call to 'clCreateProgramWithBinary' failed"
.align 3
.LC19:
.string "error: Invalid binary for device"
.align 3
.LC20:
.string "program=%p\n"
.align 3
.LC21:
.string "program binary loaded"
.align 3
.LC22:
.string "error: call to 'clBuildProgram' failed:\n%s\n"
.align 3
.LC23:
.string "program built"
.align 3
.LC24:
.string "erf_float16"
.align 3
.LC25:
.string "error: call to 'clCreateKernel' failed"
.align 3
.LC26:
.string "error: could not create source buffer"
.align 3
.LC27:
.string "error: call to 'clEnqueueWriteBuffer' failed"
.align 3
.LC28:
.string "error: could not create dst buffer"
.align 3
.LC29:
.string "error: call to 'clSetKernelArg' failed"
.align 3
.LC30:
.string "error: call to 'clEnqueueNDRangeKernel' failed"
.align 3
.LC31:
.string "error: call to 'clEnqueueReadBuffer' failed"
.align 3
.LC32:
.string "%s.result"
.align 3
.LC33:
.string "Result dumped to %s\n"
.align 3
.LC34:
.string "error: call to 'clReleaseMemObject' failed"
.align 3
.LC35:
.string "error: call to 'clReleaseKernel' failed"
.align 3
.LC36:
.string "error: call to 'clReleaseProgram' failed"
.align 3
.LC37:
.string "error: call to 'clReleaseCommandQueue' failed"
.align 3
.LC38:
.string "error: call to 'clReleaseContext' failed"
.text
.align 2
.global main
.type main, %function
main:
.LFB8:
.cfi_startproc
sub sp, sp, #640
.cfi_def_cfa_offset 640
stp x29, x30, [sp, 16]
.cfi_offset 29, -624
.cfi_offset 30, -616
add x29, sp, 16
str w0, [sp, 44]
str x1, [sp, 32]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 632]
mov x1, 0
add x1, sp, 60
add x0, sp, 80
mov x2, x1
mov x1, x0
mov w0, 1
bl clGetPlatformIDs
str w0, [sp, 64]
ldr w0, [sp, 64]
cmp w0, 0
beq .L8
adrp x0, .LC3
add x0, x0, :lo12:.LC3
bl puts
mov w0, 1
bl exit
.L8:
ldr w0, [sp, 60]
mov w1, w0
adrp x0, .LC4
add x0, x0, :lo12:.LC4
bl printf
ldr x0, [sp, 80]
mov x1, x0
adrp x0, .LC5
add x0, x0, :lo12:.LC5
bl printf
ldr x0, [sp, 80]
add x1, sp, 320
mov x4, 0
mov x3, x1
mov x2, 100
mov w1, 2306
bl clGetPlatformInfo
str w0, [sp, 64]
ldr w0, [sp, 64]
cmp w0, 0
beq .L9
adrp x0, .LC6
add x0, x0, :lo12:.LC6
bl puts
mov w0, 1
bl exit
.L9:
add x0, sp, 320
mov x1, x0
adrp x0, .LC7
add x0, x0, :lo12:.LC7
bl printf
ldr x0, [sp, 80]
add x2, sp, 68
add x1, sp, 88
mov x4, x2
mov x3, x1
mov w2, 1
mov x1, 4
bl clGetDeviceIDs
str w0, [sp, 64]
ldr w0, [sp, 64]
cmp w0, 0
beq .L10
adrp x0, .LC8
add x0, x0, :lo12:.LC8
bl puts
mov w0, 1
bl exit
.L10:
ldr w0, [sp, 68]
mov w1, w0
adrp x0, .LC9
add x0, x0, :lo12:.LC9
bl printf
ldr x0, [sp, 88]
mov x1, x0
adrp x0, .LC10
add x0, x0, :lo12:.LC10
bl printf
ldr x0, [sp, 88]
add x1, sp, 424
mov x4, 0
mov x3, x1
mov x2, 100
mov w1, 4139
bl clGetDeviceInfo
str w0, [sp, 64]
ldr w0, [sp, 64]
cmp w0, 0
beq .L11
adrp x0, .LC11
add x0, x0, :lo12:.LC11
bl puts
mov w0, 1
bl exit
.L11:
add x0, sp, 424
mov x1, x0
adrp x0, .LC12
add x0, x0, :lo12:.LC12
bl printf
mov w0, 10
bl putchar
add x1, sp, 64
add x0, sp, 88
mov x5, x1
mov x4, 0
mov x3, 0
mov x2, x0
mov w1, 1
mov x0, 0
bl clCreateContext
str x0, [sp, 144]
ldr w0, [sp, 64]
cmp w0, 0
beq .L12
adrp x0, .LC13
add x0, x0, :lo12:.LC13
bl puts
mov w0, 1
bl exit
.L12:
ldr x1, [sp, 144]
adrp x0, .LC14
add x0, x0, :lo12:.LC14
bl printf
ldr x0, [sp, 88]
add x1, sp, 64
mov x3, x1
mov x2, 0
mov x1, x0
ldr x0, [sp, 144]
bl clCreateCommandQueue
str x0, [sp, 152]
ldr w0, [sp, 64]
cmp w0, 0
beq .L13
adrp x0, .LC15
add x0, x0, :lo12:.LC15
bl puts
mov w0, 1
bl exit
.L13:
ldr x1, [sp, 152]
adrp x0, .LC16
add x0, x0, :lo12:.LC16
bl printf
mov w0, 10
bl putchar
ldr w0, [sp, 44]
cmp w0, 2
bne .L14
ldr x0, [sp, 32]
add x0, x0, 8
ldr x0, [x0]
add x1, sp, 104
bl read_buffer
str x0, [sp, 96]
add x4, sp, 64
add x3, sp, 72
add x2, sp, 96
add x1, sp, 104
add x0, sp, 88
mov x6, x4
mov x5, x3
mov x4, x2
mov x3, x1
mov x2, x0
mov w1, 1
ldr x0, [sp, 144]
bl clCreateProgramWithBinary
str x0, [sp, 160]
ldr w0, [sp, 64]
cmp w0, 0
beq .L16
b .L36
.L14:
adrp x0, .LC17
add x0, x0, :lo12:.LC17
bl puts
mov w0, 1
bl exit
.L36:
adrp x0, .LC18
add x0, x0, :lo12:.LC18
bl puts
mov w0, 1
bl exit
.L16:
ldr w0, [sp, 72]
cmp w0, 0
beq .L17
adrp x0, .LC19
add x0, x0, :lo12:.LC19
bl puts
mov w0, 1
bl exit
.L17:
ldr x1, [sp, 160]
adrp x0, .LC20
add x0, x0, :lo12:.LC20
bl printf
ldr x0, [sp, 96]
bl free
adrp x0, .LC21
add x0, x0, :lo12:.LC21
bl puts
mov w0, 10
bl putchar
add x0, sp, 88
mov x5, 0
mov x4, 0
mov x3, 0
mov x2, x0
mov w1, 1
ldr x0, [sp, 160]
bl clBuildProgram
str w0, [sp, 64]
ldr w0, [sp, 64]
cmp w0, 0
beq .L18
ldr x0, [sp, 88]
add x1, sp, 136
mov x5, x1
mov x4, 0
mov x3, 0
mov w2, 4483
mov x1, x0
ldr x0, [sp, 160]
bl clGetProgramBuildInfo
ldr x0, [sp, 136]
bl malloc
str x0, [sp, 200]
ldr x0, [sp, 88]
ldr x1, [sp, 136]
mov x5, 0
ldr x4, [sp, 200]
mov x3, x1
mov w2, 4483
mov x1, x0
ldr x0, [sp, 160]
bl clGetProgramBuildInfo
ldr x1, [sp, 200]
adrp x0, .LC22
add x0, x0, :lo12:.LC22
bl printf
ldr x0, [sp, 200]
bl free
mov w0, 1
bl exit
.L18:
adrp x0, .LC23
add x0, x0, :lo12:.LC23
bl puts
mov w0, 10
bl putchar
add x0, sp, 64
mov x2, x0
adrp x0, .LC24
add x1, x0, :lo12:.LC24
ldr x0, [sp, 160]
bl clCreateKernel
str x0, [sp, 168]
ldr w0, [sp, 64]
cmp w0, 0
beq .L19
adrp x0, .LC25
add x0, x0, :lo12:.LC25
bl puts
mov w0, 1
bl exit
.L19:
mov x0, 10
str x0, [sp, 176]
ldr x0, [sp, 176]
lsl x0, x0, 6
bl malloc
str x0, [sp, 184]
str wzr, [sp, 76]
b .L20
.L21:
ldrsw x0, [sp, 76]
lsl x0, x0, 6
ldr x1, [sp, 184]
add x2, x1, x0
adrp x0, .LC0
add x1, x0, :lo12:.LC0
mov x0, x2
ldp q0, q1, [x1]
stp q0, q1, [x0]
ldp q0, q1, [x1, 32]
stp q0, q1, [x0, 32]
ldr w0, [sp, 76]
add w0, w0, 1
str w0, [sp, 76]
.L20:
ldrsw x0, [sp, 76]
ldr x1, [sp, 176]
cmp x1, x0
bhi .L21
ldr x0, [sp, 176]
lsl x0, x0, 6
add x1, sp, 64
mov x4, x1
mov x3, 0
mov x2, x0
mov x1, 4
ldr x0, [sp, 144]
bl clCreateBuffer
str x0, [sp, 112]
ldr w0, [sp, 64]
cmp w0, 0
beq .L22
adrp x0, .LC26
add x0, x0, :lo12:.LC26
bl puts
mov w0, 1
bl exit
.L22:
ldr x1, [sp, 112]
ldr x0, [sp, 176]
lsl x0, x0, 6
str xzr, [sp]
mov x7, 0
mov w6, 0
ldr x5, [sp, 184]
mov x4, x0
mov x3, 0
mov w2, 1
ldr x0, [sp, 152]
bl clEnqueueWriteBuffer
str w0, [sp, 64]
ldr w0, [sp, 64]
cmp w0, 0
beq .L23
adrp x0, .LC27
add x0, x0, :lo12:.LC27
bl puts
mov w0, 1
bl exit
.L23:
ldr x0, [sp, 176]
lsl x0, x0, 6
bl malloc
str x0, [sp, 192]
ldr x0, [sp, 176]
lsl x0, x0, 6
mov x2, x0
mov w1, 1
ldr x0, [sp, 192]
bl memset
ldr x0, [sp, 176]
lsl x0, x0, 6
add x1, sp, 64
mov x4, x1
mov x3, 0
mov x2, x0
mov x1, 2
ldr x0, [sp, 144]
bl clCreateBuffer
str x0, [sp, 120]
ldr w0, [sp, 64]
cmp w0, 0
beq .L24
adrp x0, .LC28
add x0, x0, :lo12:.LC28
bl puts
mov w0, 1
bl exit
.L24:
str wzr, [sp, 64]
add x0, sp, 112
mov x3, x0
mov x2, 8
mov w1, 0
ldr x0, [sp, 168]
bl clSetKernelArg
mov w1, w0
ldr w0, [sp, 64]
orr w0, w1, w0
str w0, [sp, 64]
add x0, sp, 120
mov x3, x0
mov x2, 8
mov w1, 1
ldr x0, [sp, 168]
bl clSetKernelArg
mov w1, w0
ldr w0, [sp, 64]
orr w0, w1, w0
str w0, [sp, 64]
ldr w0, [sp, 64]
cmp w0, 0
beq .L25
adrp x0, .LC29
add x0, x0, :lo12:.LC29
bl puts
mov w0, 1
bl exit
.L25:
ldr x0, [sp, 176]
str x0, [sp, 128]
ldr x0, [sp, 176]
str x0, [sp, 136]
add x1, sp, 136
add x0, sp, 128
str xzr, [sp]
mov x7, 0
mov w6, 0
mov x5, x1
mov x4, x0
mov x3, 0
mov w2, 1
ldr x1, [sp, 168]
ldr x0, [sp, 152]
bl clEnqueueNDRangeKernel
str w0, [sp, 64]
ldr w0, [sp, 64]
cmp w0, 0
beq .L26
adrp x0, .LC30
add x0, x0, :lo12:.LC30
bl puts
mov w0, 1
bl exit
.L26:
ldr x0, [sp, 152]
bl clFinish
ldr x1, [sp, 120]
ldr x0, [sp, 176]
lsl x0, x0, 6
str xzr, [sp]
mov x7, 0
mov w6, 0
ldr x5, [sp, 192]
mov x4, x0
mov x3, 0
mov w2, 1
ldr x0, [sp, 152]
bl clEnqueueReadBuffer
str w0, [sp, 64]
ldr w0, [sp, 64]
cmp w0, 0
beq .L27
adrp x0, .LC31
add x0, x0, :lo12:.LC31
bl puts
mov w0, 1
bl exit
.L27:
ldr x0, [sp, 32]
ldr x0, [x0]
add x3, sp, 528
mov x2, x0
adrp x0, .LC32
add x1, x0, :lo12:.LC32
mov x0, x3
bl sprintf
ldr x0, [sp, 176]
lsl x1, x0, 6
add x0, sp, 528
mov x2, x1
ldr x1, [sp, 192]
bl write_buffer
add x0, sp, 528
mov x1, x0
adrp x0, .LC33
add x0, x0, :lo12:.LC33
bl printf
ldr x0, [sp, 192]
bl free
ldr x0, [sp, 120]
bl clReleaseMemObject
str w0, [sp, 64]
ldr w0, [sp, 64]
cmp w0, 0
beq .L28
adrp x0, .LC34
add x0, x0, :lo12:.LC34
bl puts
mov w0, 1
bl exit
.L28:
ldr x0, [sp, 184]
bl free
ldr x0, [sp, 112]
bl clReleaseMemObject
str w0, [sp, 64]
ldr w0, [sp, 64]
cmp w0, 0
beq .L29
adrp x0, .LC34
add x0, x0, :lo12:.LC34
bl puts
mov w0, 1
bl exit
.L29:
ldr x0, [sp, 168]
bl clReleaseKernel
str w0, [sp, 64]
ldr w0, [sp, 64]
cmp w0, 0
beq .L30
adrp x0, .LC35
add x0, x0, :lo12:.LC35
bl puts
mov w0, 1
bl exit
.L30:
ldr x0, [sp, 160]
bl clReleaseProgram
str w0, [sp, 64]
ldr w0, [sp, 64]
cmp w0, 0
beq .L31
adrp x0, .LC36
add x0, x0, :lo12:.LC36
bl puts
mov w0, 1
bl exit
.L31:
ldr x0, [sp, 152]
bl clReleaseCommandQueue
str w0, [sp, 64]
ldr w0, [sp, 64]
cmp w0, 0
beq .L32
adrp x0, .LC37
add x0, x0, :lo12:.LC37
bl puts
mov w0, 1
bl exit
.L32:
ldr x0, [sp, 144]
bl clReleaseContext
str w0, [sp, 64]
ldr w0, [sp, 64]
cmp w0, 0
beq .L33
adrp x0, .LC38
add x0, x0, :lo12:.LC38
bl puts
mov w0, 1
bl exit
.L33:
mov w0, 0
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 632]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L35
bl __stack_chk_fail
.L35:
mov w0, w1
ldp x29, x30, [sp, 16]
add sp, sp, 640
.cfi_restore 29
.cfi_restore 30
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE8:
.size main, .-main
.section .rodata
.align 6
.LC0:
.word 1073741824
.word 1073741824
.word 1073741824
.word 1073741824
.word 1073741824
.word 1073741824
.word 1073741824
.word 1073741824
.word 1073741824
.word 1073741824
.word 1073741824
.word 1073741824
.word 1073741824
.word 1073741824
.word 1073741824
.word 1073741824
.text
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global f
.type f, %function
f:
.LFB0:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str s0, [sp, 12]
mov w0, 0
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size f, .-f
.align 2
.global g
.type g, %function
g:
.LFB1:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
fmov s2, s0
fmov s0, s1
fmov s1, s2
str s1, [sp, 8]
str s0, [sp, 12]
mov w0, 0
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE1:
.size g, .-g
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.local sss
.comm sss,16,8
.section .rodata
.align 3
.LC0:
.string "+++Struct double inside struct starting with pointer:"
.align 3
.LC1:
.string "size=%d,align=%d\n"
.align 3
.LC2:
.string "offset-pointer=%d,offset-sss-double=%d,\nalign-pointer=%d,align-sss-double=%d\n"
.text
.align 2
.global main
.type main, %function
main:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -16]!
.cfi_def_cfa_offset 16
.cfi_offset 29, -16
.cfi_offset 30, -8
mov x29, sp
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl puts
mov x2, 8
mov x1, 16
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl printf
mov x4, 8
mov x3, 8
mov x2, 8
mov x1, 0
adrp x0, .LC2
add x0, x0, :lo12:.LC2
bl printf
mov w0, 0
ldp x29, x30, [sp], 16
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.global ME_MEDIA_SAMPLE
.section .rodata
.align 3
.type ME_MEDIA_SAMPLE, %object
.size ME_MEDIA_SAMPLE, 24
ME_MEDIA_SAMPLE:
.xword 2677278136
.hword -4505
.hword 18089
.ascii "\246\330W&\247\r2\362"
.zero 4
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global my_strlen
.type my_strlen, %function
my_strlen:
.LFB0:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str x0, [sp, 8]
str wzr, [sp, 28]
b .L2
.L3:
ldr x0, [sp, 8]
add x0, x0, 1
str x0, [sp, 8]
ldr w0, [sp, 28]
add w0, w0, 1
str w0, [sp, 28]
.L2:
ldr x0, [sp, 8]
ldrb w0, [x0]
cmp w0, 0
bne .L3
ldr w0, [sp, 28]
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size my_strlen, .-my_strlen
.section .rodata
.align 3
.LC0:
.string "abcXYZ"
.text
.align 2
.global main
.type main, %function
main:
.LFB1:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl my_strlen
str w0, [sp, 28]
ldr w0, [sp, 28]
cmp w0, 6
cset w0, eq
and w0, w0, 255
bl assert
mov w0, 0
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE1:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global getMilliseconds
.type getMilliseconds, %function
getMilliseconds:
.LFB6:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 40]
mov x1, 0
add x0, sp, 24
mov x1, 0
bl gettimeofday
ldr d0, [sp, 24]
scvtf d0, d0
mov x0, 70368744177664
movk x0, 0x408f, lsl 48
fmov d1, x0
fmul d1, d0, d1
ldr d0, [sp, 32]
scvtf d0, d0
mov x0, 70368744177664
movk x0, 0x408f, lsl 48
fmov d2, x0
fdiv d0, d0, d2
fadd d0, d1, d0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [sp, 40]
ldr x1, [x0]
subs x2, x2, x1
mov x1, 0
beq .L3
bl __stack_chk_fail
.L3:
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE6:
.size getMilliseconds, .-getMilliseconds
.align 2
.global merge
.type merge, %function
merge:
.LFB7:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str x0, [sp, 40]
str x1, [sp, 32]
str w2, [sp, 28]
str w3, [sp, 24]
str w4, [sp, 20]
ldr w0, [sp, 28]
str w0, [sp, 56]
ldr w0, [sp, 24]
str w0, [sp, 60]
ldr w0, [sp, 28]
str w0, [sp, 52]
b .L5
.L11:
ldr w1, [sp, 56]
ldr w0, [sp, 24]
cmp w1, w0
bge .L6
ldr w1, [sp, 60]
ldr w0, [sp, 20]
cmp w1, w0
bge .L6
ldrsw x0, [sp, 56]
lsl x0, x0, 2
ldr x1, [sp, 40]
add x0, x1, x0
ldr w1, [x0]
ldrsw x0, [sp, 60]
lsl x0, x0, 2
ldr x2, [sp, 40]
add x0, x2, x0
ldr w0, [x0]
cmp w1, w0
bge .L7
ldr w0, [sp, 56]
add w1, w0, 1
str w1, [sp, 56]
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 40]
add x1, x1, x0
ldrsw x0, [sp, 52]
lsl x0, x0, 2
ldr x2, [sp, 32]
add x0, x2, x0
ldr w1, [x1]
str w1, [x0]
b .L9
.L7:
ldr w0, [sp, 60]
add w1, w0, 1
str w1, [sp, 60]
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 40]
add x1, x1, x0
ldrsw x0, [sp, 52]
lsl x0, x0, 2
ldr x2, [sp, 32]
add x0, x2, x0
ldr w1, [x1]
str w1, [x0]
b .L9
.L6:
ldr w1, [sp, 56]
ldr w0, [sp, 24]
cmp w1, w0
bge .L10
ldr w0, [sp, 56]
add w1, w0, 1
str w1, [sp, 56]
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 40]
add x1, x1, x0
ldrsw x0, [sp, 52]
lsl x0, x0, 2
ldr x2, [sp, 32]
add x0, x2, x0
ldr w1, [x1]
str w1, [x0]
b .L9
.L10:
ldr w0, [sp, 60]
add w1, w0, 1
str w1, [sp, 60]
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 40]
add x1, x1, x0
ldrsw x0, [sp, 52]
lsl x0, x0, 2
ldr x2, [sp, 32]
add x0, x2, x0
ldr w1, [x1]
str w1, [x0]
.L9:
ldr w0, [sp, 52]
add w0, w0, 1
str w0, [sp, 52]
.L5:
ldr w1, [sp, 52]
ldr w0, [sp, 20]
cmp w1, w0
blt .L11
ldrsw x0, [sp, 28]
lsl x0, x0, 2
ldr x1, [sp, 40]
add x3, x1, x0
ldrsw x0, [sp, 28]
lsl x0, x0, 2
ldr x1, [sp, 32]
add x4, x1, x0
ldr w1, [sp, 20]
ldr w0, [sp, 28]
sub w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
mov x2, x0
mov x1, x4
mov x0, x3
bl memcpy
nop
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE7:
.size merge, .-merge
.align 2
.global merge_sort_ric
.type merge_sort_ric, %function
merge_sort_ric:
.LFB8:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str x0, [sp, 40]
str x1, [sp, 32]
str w2, [sp, 28]
str w3, [sp, 24]
ldr w0, [sp, 28]
add w0, w0, 1
ldr w1, [sp, 24]
cmp w1, w0
ble .L15
ldr w1, [sp, 28]
ldr w0, [sp, 24]
add w0, w1, w0
lsr w1, w0, 31
add w0, w1, w0
asr w0, w0, 1
str w0, [sp, 60]
ldr w3, [sp, 60]
ldr w2, [sp, 28]
ldr x1, [sp, 32]
ldr x0, [sp, 40]
bl merge_sort_ric
ldr w3, [sp, 24]
ldr w2, [sp, 60]
ldr x1, [sp, 32]
ldr x0, [sp, 40]
bl merge_sort_ric
ldr w4, [sp, 24]
ldr w3, [sp, 60]
ldr w2, [sp, 28]
ldr x1, [sp, 32]
ldr x0, [sp, 40]
bl merge
b .L12
.L15:
nop
.L12:
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE8:
.size merge_sort_ric, .-merge_sort_ric
.align 2
.global merge_sort
.type merge_sort, %function
merge_sort:
.LFB9:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
str w1, [sp, 20]
ldrsw x0, [sp, 20]
lsl x0, x0, 2
bl malloc
str x0, [sp, 40]
ldr x0, [sp, 40]
cmp x0, 0
bne .L17
mov w0, 1
bl exit
.L17:
ldr w3, [sp, 20]
mov w2, 0
ldr x1, [sp, 40]
ldr x0, [sp, 24]
bl merge_sort_ric
ldr x0, [sp, 40]
bl free
nop
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE9:
.size merge_sort, .-merge_sort
.section .rodata
.align 3
.LC1:
.string "[ test program ] time elapsed: %.3f sec\n"
.text
.align 2
.global main
.type main, %function
main:
.LFB10:
.cfi_startproc
stp x29, x30, [sp, -112]!
.cfi_def_cfa_offset 112
.cfi_offset 29, -112
.cfi_offset 30, -104
mov x29, sp
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 104]
mov x1, 0
bl getMilliseconds
str d0, [sp, 32]
str wzr, [sp, 24]
b .L19
.L20:
adrp x0, .LC0
add x1, x0, :lo12:.LC0
add x0, sp, 40
ldp q0, q1, [x1]
stp q0, q1, [x0]
ldr q0, [x1, 32]
str q0, [x0, 32]
ldr q0, [x1, 44]
str q0, [x0, 44]
mov w0, 15
str w0, [sp, 28]
add x0, sp, 40
ldr w1, [sp, 28]
bl merge_sort
ldr w0, [sp, 24]
add w0, w0, 1
str w0, [sp, 24]
.L19:
ldr w1, [sp, 24]
mov w0, 34463
movk w0, 0x1, lsl 16
cmp w1, w0
ble .L20
bl getMilliseconds
fmov d1, d0
ldr d0, [sp, 32]
fsub d0, d1, d0
str d0, [sp, 32]
mov x0, 70368744177664
movk x0, 0x408f, lsl 48
fmov d1, x0
ldr d0, [sp, 32]
fdiv d0, d0, d1
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl printf
mov w0, 0
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 104]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L22
bl __stack_chk_fail
.L22:
mov w0, w1
ldp x29, x30, [sp], 112
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE10:
.size main, .-main
.section .rodata
.align 3
.LC0:
.word 5
.word 2
.word 4
.word 8
.word 5
.word 8
.word 3
.word 2
.word 9
.word 0
.word 12
.word 4
.word 25
.word 5
.word 6
.text
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.data
.align 3
.type junk, %object
.size junk, 30
junk:
.string "\n@(#)LIBF77 VERSION 19990503\n"
.text
.align 2
.type spow_ui, %function
spow_ui:
.LFB10:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str s0, [sp, 12]
str w0, [sp, 8]
fmov s0, 1.0e+0
str s0, [sp, 20]
ldr w0, [sp, 8]
cmp w0, 0
beq .L2
ldr w0, [sp, 8]
cmp w0, 0
bge .L3
ldr w0, [sp, 8]
neg w0, w0
str w0, [sp, 8]
ldr s0, [sp, 12]
fmov s1, 1.0e+0
fdiv s0, s1, s0
str s0, [sp, 12]
.L3:
ldrsw x0, [sp, 8]
str x0, [sp, 24]
.L7:
ldr x0, [sp, 24]
and x0, x0, 1
cmp x0, 0
beq .L4
ldr s1, [sp, 20]
ldr s0, [sp, 12]
fmul s0, s1, s0
str s0, [sp, 20]
.L4:
ldr x0, [sp, 24]
lsr x0, x0, 1
str x0, [sp, 24]
ldr x0, [sp, 24]
cmp x0, 0
beq .L9
ldr s0, [sp, 12]
fmul s0, s0, s0
str s0, [sp, 12]
b .L7
.L9:
nop
.L2:
ldr s0, [sp, 20]
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE10:
.size spow_ui, .-spow_ui
.align 2
.type dpow_ui, %function
dpow_ui:
.LFB11:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str d0, [sp, 8]
str w0, [sp, 4]
fmov d0, 1.0e+0
str d0, [sp, 16]
ldr w0, [sp, 4]
cmp w0, 0
beq .L11
ldr w0, [sp, 4]
cmp w0, 0
bge .L12
ldr w0, [sp, 4]
neg w0, w0
str w0, [sp, 4]
ldr d0, [sp, 8]
fmov d1, 1.0e+0
fdiv d0, d1, d0
str d0, [sp, 8]
.L12:
ldrsw x0, [sp, 4]
str x0, [sp, 24]
.L16:
ldr x0, [sp, 24]
and x0, x0, 1
cmp x0, 0
beq .L13
ldr d1, [sp, 16]
ldr d0, [sp, 8]
fmul d0, d1, d0
str d0, [sp, 16]
.L13:
ldr x0, [sp, 24]
lsr x0, x0, 1
str x0, [sp, 24]
ldr x0, [sp, 24]
cmp x0, 0
beq .L18
ldr d0, [sp, 8]
fmul d0, d0, d0
str d0, [sp, 8]
b .L16
.L18:
nop
.L11:
ldr d0, [sp, 16]
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE11:
.size dpow_ui, .-dpow_ui
.align 2
.type cpow_ui, %function
cpow_ui:
.LFB12:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
fmov s2, s0
fmov s0, s1
fmov s1, s2
str s1, [sp, 24]
str s0, [sp, 28]
str w0, [sp, 20]
ldr s0, [sp, 24]
str s0, [sp, 32]
ldr s0, [sp, 28]
str s0, [sp, 36]
fmov s0, 1.0e+0
str s0, [sp, 56]
str wzr, [sp, 60]
ldr w0, [sp, 20]
cmp w0, 0
beq .L27
ldr w0, [sp, 20]
cmp w0, 0
bge .L21
ldr w0, [sp, 20]
neg w0, w0
str w0, [sp, 20]
ldr s3, [sp, 36]
ldr s2, [sp, 32]
movi v1.2s, #0
fmov s0, 1.0e+0
bl __divsc3
fmov s2, s0
fmov s0, s1
str s2, [sp, 24]
str s0, [sp, 28]
ldr s0, [sp, 24]
str s0, [sp, 32]
ldr s0, [sp, 28]
str s0, [sp, 36]
.L21:
ldrsw x0, [sp, 20]
str x0, [sp, 48]
str wzr, [sp, 44]
fmov s0, 1.0e+0
str s0, [sp, 40]
.L25:
ldr x0, [sp, 48]
and x0, x0, 1
cmp x0, 0
beq .L22
ldr s3, [sp, 36]
ldr s2, [sp, 32]
ldr s1, [sp, 44]
ldr s0, [sp, 40]
bl __mulsc3
fmov s2, s0
fmov s0, s1
str s2, [sp, 56]
str s0, [sp, 60]
ldr s0, [sp, 56]
str s0, [sp, 40]
ldr s0, [sp, 60]
str s0, [sp, 44]
.L22:
ldr x0, [sp, 48]
lsr x0, x0, 1
str x0, [sp, 48]
ldr x0, [sp, 48]
cmp x0, 0
beq .L28
ldr s3, [sp, 36]
ldr s2, [sp, 32]
ldr s1, [sp, 36]
ldr s0, [sp, 32]
bl __mulsc3
fmov s2, s0
fmov s0, s1
str s2, [sp, 24]
str s0, [sp, 28]
ldr s0, [sp, 24]
str s0, [sp, 32]
ldr s0, [sp, 28]
str s0, [sp, 36]
b .L25
.L27:
str wzr, [sp, 44]
fmov s0, 1.0e+0
str s0, [sp, 40]
b .L20
.L28:
nop
.L20:
ldr s1, [sp, 40]
ldr s0, [sp, 44]
fmov s2, s1
fmov s1, s0
fmov s0, s2
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE12:
.size cpow_ui, .-cpow_ui
.align 2
.type zpow_ui, %function
zpow_ui:
.LFB13:
.cfi_startproc
stp x29, x30, [sp, -112]!
.cfi_def_cfa_offset 112
.cfi_offset 29, -112
.cfi_offset 30, -104
mov x29, sp
fmov d2, d0
fmov d0, d1
fmov d1, d2
str d1, [sp, 32]
str d0, [sp, 40]
str w0, [sp, 28]
ldr d0, [sp, 32]
str d0, [sp, 64]
ldr d0, [sp, 40]
str d0, [sp, 72]
fmov d0, 1.0e+0
str d0, [sp, 96]
str xzr, [sp, 104]
ldr w0, [sp, 28]
cmp w0, 0
beq .L37
ldr w0, [sp, 28]
cmp w0, 0
bge .L31
ldr w0, [sp, 28]
neg w0, w0
str w0, [sp, 28]
ldr d3, [sp, 72]
ldr d2, [sp, 64]
movi d1, #0
fmov d0, 1.0e+0
bl __divdc3
fmov d2, d0
fmov d0, d1
str d2, [sp, 32]
str d0, [sp, 40]
ldr d0, [sp, 32]
str d0, [sp, 64]
ldr d0, [sp, 40]
str d0, [sp, 72]
.L31:
ldrsw x0, [sp, 28]
str x0, [sp, 56]
str xzr, [sp, 88]
fmov d0, 1.0e+0
str d0, [sp, 80]
.L35:
ldr x0, [sp, 56]
and x0, x0, 1
cmp x0, 0
beq .L32
ldr d3, [sp, 72]
ldr d2, [sp, 64]
ldr d1, [sp, 88]
ldr d0, [sp, 80]
bl __muldc3
fmov d2, d0
fmov d0, d1
str d2, [sp, 96]
str d0, [sp, 104]
ldr d0, [sp, 96]
str d0, [sp, 80]
ldr d0, [sp, 104]
str d0, [sp, 88]
.L32:
ldr x0, [sp, 56]
lsr x0, x0, 1
str x0, [sp, 56]
ldr x0, [sp, 56]
cmp x0, 0
beq .L38
ldr d3, [sp, 72]
ldr d2, [sp, 64]
ldr d1, [sp, 72]
ldr d0, [sp, 64]
bl __muldc3
fmov d2, d0
fmov d0, d1
str d2, [sp, 32]
str d0, [sp, 40]
ldr d0, [sp, 32]
str d0, [sp, 64]
ldr d0, [sp, 40]
str d0, [sp, 72]
b .L35
.L37:
str xzr, [sp, 88]
fmov d0, 1.0e+0
str d0, [sp, 80]
b .L30
.L38:
nop
.L30:
ldr d1, [sp, 80]
ldr d0, [sp, 88]
fmov d2, d1
fmov d1, d0
fmov d0, d2
ldp x29, x30, [sp], 112
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE13:
.size zpow_ui, .-zpow_ui
.align 2
.type pow_ii, %function
pow_ii:
.LFB14:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str w0, [sp, 12]
str w1, [sp, 8]
ldr w0, [sp, 8]
cmp w0, 0
bgt .L40
ldr w0, [sp, 8]
cmp w0, 0
beq .L41
ldr w0, [sp, 12]
cmp w0, 1
bne .L42
.L41:
mov w0, 1
str w0, [sp, 20]
b .L40
.L42:
ldr w0, [sp, 12]
cmn w0, #1
beq .L43
ldr w0, [sp, 12]
cmp w0, 0
bne .L44
mov w1, 1
ldr w0, [sp, 12]
sdiv w0, w1, w0
b .L45
.L44:
mov w0, 0
.L45:
str w0, [sp, 20]
b .L40
.L43:
ldr w0, [sp, 8]
neg w0, w0
str w0, [sp, 8]
.L40:
ldr w0, [sp, 8]
cmp w0, 0
bgt .L46
ldr w0, [sp, 8]
cmp w0, 0
beq .L47
ldr w0, [sp, 12]
cmp w0, 1
beq .L47
ldr w0, [sp, 12]
cmn w0, #1
bne .L47
.L46:
ldrsw x0, [sp, 8]
str x0, [sp, 24]
mov w0, 1
str w0, [sp, 20]
.L51:
ldr x0, [sp, 24]
and x0, x0, 1
cmp x0, 0
beq .L48
ldr w1, [sp, 20]
ldr w0, [sp, 12]
mul w0, w1, w0
str w0, [sp, 20]
.L48:
ldr x0, [sp, 24]
lsr x0, x0, 1
str x0, [sp, 24]
ldr x0, [sp, 24]
cmp x0, 0
beq .L53
ldr w0, [sp, 12]
mul w0, w0, w0
str w0, [sp, 12]
b .L51
.L53:
nop
.L47:
ldr w0, [sp, 20]
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE14:
.size pow_ii, .-pow_ii
.align 2
.type dmaxloc_, %function
dmaxloc_:
.LFB15:
.cfi_startproc
sub sp, sp, #48
.cfi_def_cfa_offset 48
str x0, [sp, 24]
str w1, [sp, 20]
str w2, [sp, 16]
str x3, [sp, 8]
ldrsw x0, [sp, 20]
lsl x0, x0, 3
sub x0, x0, #8
ldr x1, [sp, 24]
add x0, x1, x0
ldr d0, [x0]
str d0, [sp, 40]
ldr w0, [sp, 20]
str w0, [sp, 36]
ldr w0, [sp, 20]
add w0, w0, 1
str w0, [sp, 32]
b .L55
.L58:
ldrsw x0, [sp, 32]
lsl x0, x0, 3
sub x0, x0, #8
ldr x1, [sp, 24]
add x0, x1, x0
ldr d0, [x0]
ldr d1, [sp, 40]
fcmpe d1, d0
bmi .L60
b .L56
.L60:
ldr w0, [sp, 32]
str w0, [sp, 36]
ldrsw x0, [sp, 32]
lsl x0, x0, 3
sub x0, x0, #8
ldr x1, [sp, 24]
add x0, x1, x0
ldr d0, [x0]
str d0, [sp, 40]
.L56:
ldr w0, [sp, 32]
add w0, w0, 1
str w0, [sp, 32]
.L55:
ldr w1, [sp, 32]
ldr w0, [sp, 16]
cmp w1, w0
ble .L58
ldr w1, [sp, 36]
ldr w0, [sp, 20]
sub w0, w1, w0
add w0, w0, 1
add sp, sp, 48
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE15:
.size dmaxloc_, .-dmaxloc_
.align 2
.type smaxloc_, %function
smaxloc_:
.LFB16:
.cfi_startproc
sub sp, sp, #48
.cfi_def_cfa_offset 48
str x0, [sp, 24]
str w1, [sp, 20]
str w2, [sp, 16]
str x3, [sp, 8]
ldrsw x0, [sp, 20]
lsl x0, x0, 2
sub x0, x0, #4
ldr x1, [sp, 24]
add x0, x1, x0
ldr s0, [x0]
str s0, [sp, 36]
ldr w0, [sp, 20]
str w0, [sp, 44]
ldr w0, [sp, 20]
add w0, w0, 1
str w0, [sp, 40]
b .L62
.L65:
ldrsw x0, [sp, 40]
lsl x0, x0, 2
sub x0, x0, #4
ldr x1, [sp, 24]
add x0, x1, x0
ldr s0, [x0]
ldr s1, [sp, 36]
fcmpe s1, s0
bmi .L67
b .L63
.L67:
ldr w0, [sp, 40]
str w0, [sp, 44]
ldrsw x0, [sp, 40]
lsl x0, x0, 2
sub x0, x0, #4
ldr x1, [sp, 24]
add x0, x1, x0
ldr s0, [x0]
str s0, [sp, 36]
.L63:
ldr w0, [sp, 40]
add w0, w0, 1
str w0, [sp, 40]
.L62:
ldr w1, [sp, 40]
ldr w0, [sp, 16]
cmp w1, w0
ble .L65
ldr w1, [sp, 44]
ldr w0, [sp, 20]
sub w0, w1, w0
add w0, w0, 1
add sp, sp, 48
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE16:
.size smaxloc_, .-smaxloc_
.data
.align 2
.type c__1, %object
.size c__1, 4
c__1:
.word 1
.section .rodata
.align 3
.LC0:
.string "Nonunit"
.align 3
.LC1:
.string "Upper"
.text
.align 2
.global slaein_
.type slaein_, %function
slaein_:
.LFB21:
.cfi_startproc
sub sp, sp, #384
.cfi_def_cfa_offset 384
stp x29, x30, [sp, 32]
.cfi_offset 29, -352
.cfi_offset 30, -344
add x29, sp, 32
str d8, [sp, 48]
.cfi_offset 72, -336
str x0, [sp, 184]
str x1, [sp, 176]
str x2, [sp, 168]
str x3, [sp, 160]
str x4, [sp, 152]
str x5, [sp, 144]
str x6, [sp, 136]
str x7, [sp, 128]
ldr x0, [sp, 384]
str x0, [sp, 120]
ldr x0, [sp, 392]
str x0, [sp, 112]
ldr x0, [sp, 400]
str x0, [sp, 104]
ldr x0, [sp, 408]
str x0, [sp, 96]
ldr x0, [sp, 416]
str x0, [sp, 88]
ldr x0, [sp, 424]
str x0, [sp, 80]
ldr x0, [sp, 432]
str x0, [sp, 72]
ldr x0, [sp, 440]
str x0, [sp, 64]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 376]
mov x1, 0
ldr x0, [sp, 152]
ldr w0, [x0]
str w0, [sp, 288]
ldr w0, [sp, 288]
add w0, w0, 1
str w0, [sp, 292]
ldrsw x0, [sp, 292]
lsl x0, x0, 2
neg x0, x0
ldr x1, [sp, 160]
add x0, x1, x0
str x0, [sp, 160]
ldr x0, [sp, 128]
sub x0, x0, #4
str x0, [sp, 128]
ldr x0, [sp, 120]
sub x0, x0, #4
str x0, [sp, 120]
ldr x0, [sp, 104]
ldr w0, [x0]
str w0, [sp, 296]
ldr w0, [sp, 296]
add w0, w0, 1
str w0, [sp, 300]
ldrsw x0, [sp, 300]
lsl x0, x0, 2
neg x0, x0
ldr x1, [sp, 112]
add x0, x1, x0
str x0, [sp, 112]
ldr x0, [sp, 96]
sub x0, x0, #4
str x0, [sp, 96]
ldr x0, [sp, 64]
str wzr, [x0]
ldr x0, [sp, 168]
ldr s0, [x0]
scvtf s0, s0
fcvt d0, s0
bl sqrt
fcvt s0, d0
str s0, [sp, 304]
ldr s0, [sp, 304]
mov w0, 52429
movk w0, 0x3dcc, lsl 16
fmov s1, w0
fdiv s0, s1, s0
str s0, [sp, 308]
fmov s0, 1.0e+0
str s0, [sp, 216]
ldr x0, [sp, 88]
ldr s1, [x0]
ldr s0, [sp, 304]
fmul s0, s1, s0
str s0, [sp, 220]
ldr s1, [sp, 216]
ldr s0, [sp, 220]
fcmpe s1, s0
bge .L233
b .L261
.L233:
ldr s0, [sp, 216]
b .L71
.L261:
ldr s0, [sp, 220]
.L71:
ldr x0, [sp, 80]
ldr s1, [x0]
fmul s0, s0, s1
str s0, [sp, 312]
ldr x0, [sp, 168]
ldr w0, [x0]
str w0, [sp, 204]
mov w0, 1
str w0, [sp, 252]
b .L72
.L75:
ldr w0, [sp, 252]
sub w0, w0, #1
str w0, [sp, 208]
mov w0, 1
str w0, [sp, 248]
b .L73
.L74:
ldr w1, [sp, 252]
ldr w0, [sp, 288]
mul w1, w1, w0
ldr w0, [sp, 248]
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 160]
add x1, x1, x0
ldr w2, [sp, 252]
ldr w0, [sp, 296]
mul w2, w2, w0
ldr w0, [sp, 248]
add w0, w2, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x2, [sp, 112]
add x0, x2, x0
ldr s0, [x1]
str s0, [x0]
ldr w0, [sp, 248]
add w0, w0, 1
str w0, [sp, 248]
.L73:
ldr w0, [sp, 208]
ldr w1, [sp, 248]
cmp w1, w0
ble .L74
ldr w1, [sp, 252]
ldr w0, [sp, 288]
mul w1, w1, w0
ldr w0, [sp, 252]
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 160]
add x0, x1, x0
ldr s1, [x0]
ldr x0, [sp, 144]
ldr s0, [x0]
ldr w1, [sp, 252]
ldr w0, [sp, 296]
mul w1, w1, w0
ldr w0, [sp, 252]
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 112]
add x0, x1, x0
fsub s0, s1, s0
str s0, [x0]
ldr w0, [sp, 252]
add w0, w0, 1
str w0, [sp, 252]
.L72:
ldr w0, [sp, 204]
ldr w1, [sp, 252]
cmp w1, w0
ble .L75
ldr x0, [sp, 136]
ldr s0, [x0]
fcmp s0, #0.0
bne .L76
ldr x0, [sp, 176]
ldr w0, [x0]
cmp w0, 0
beq .L77
ldr x0, [sp, 168]
ldr w0, [x0]
str w0, [sp, 204]
mov w0, 1
str w0, [sp, 248]
b .L78
.L79:
ldrsw x0, [sp, 248]
lsl x0, x0, 2
ldr x1, [sp, 128]
add x0, x1, x0
ldr x1, [sp, 88]
ldr s0, [x1]
str s0, [x0]
ldr w0, [sp, 248]
add w0, w0, 1
str w0, [sp, 248]
.L78:
ldr w0, [sp, 204]
ldr w1, [sp, 248]
cmp w1, w0
ble .L79
b .L80
.L77:
ldr x0, [sp, 128]
add x1, x0, 4
adrp x0, c__1
add x2, x0, :lo12:c__1
ldr x0, [sp, 168]
bl snrm2_
str s0, [sp, 272]
ldr x0, [sp, 88]
ldr s1, [x0]
ldr s0, [sp, 304]
fmul s1, s1, s0
ldr s2, [sp, 272]
ldr s0, [sp, 312]
fcmpe s2, s0
bge .L234
b .L262
.L234:
ldr s0, [sp, 272]
b .L83
.L262:
ldr s0, [sp, 312]
.L83:
fdiv s0, s1, s0
str s0, [sp, 216]
ldr x0, [sp, 128]
add x2, x0, 4
add x1, sp, 216
adrp x0, c__1
add x3, x0, :lo12:c__1
ldr x0, [sp, 168]
bl sscal_
.L80:
ldr x0, [sp, 184]
ldr w0, [x0]
cmp w0, 0
beq .L84
ldr x0, [sp, 168]
ldr w0, [x0]
sub w0, w0, #1
str w0, [sp, 204]
mov w0, 1
str w0, [sp, 248]
b .L85
.L100:
ldr w0, [sp, 248]
add w1, w0, 1
ldr w2, [sp, 248]
ldr w0, [sp, 288]
mul w0, w2, w0
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 160]
add x0, x1, x0
ldr s0, [x0]
str s0, [sp, 328]
ldr w1, [sp, 248]
ldr w0, [sp, 296]
mul w1, w1, w0
ldr w0, [sp, 248]
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 112]
add x0, x1, x0
ldr s0, [x0]
str s0, [sp, 216]
ldr s0, [sp, 216]
fcmpe s0, #0.0
bge .L235
b .L263
.L235:
ldr s1, [sp, 216]
b .L88
.L263:
ldr s0, [sp, 216]
fneg s1, s0
.L88:
ldr s0, [sp, 328]
fcmpe s0, #0.0
bge .L236
b .L264
.L236:
ldr s0, [sp, 328]
b .L91
.L264:
ldr s0, [sp, 328]
fneg s0, s0
.L91:
fcmpe s1, s0
bmi .L237
b .L265
.L237:
ldr w1, [sp, 248]
ldr w0, [sp, 296]
mul w1, w1, w0
ldr w0, [sp, 248]
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 112]
add x0, x1, x0
ldr s1, [x0]
ldr s0, [sp, 328]
fdiv s0, s1, s0
str s0, [sp, 356]
ldr w1, [sp, 248]
ldr w0, [sp, 296]
mul w1, w1, w0
ldr w0, [sp, 248]
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 112]
add x0, x1, x0
ldr s0, [sp, 328]
str s0, [x0]
ldr x0, [sp, 168]
ldr w0, [x0]
str w0, [sp, 208]
ldr w0, [sp, 248]
add w0, w0, 1
str w0, [sp, 252]
b .L94
.L95:
ldr w0, [sp, 248]
add w1, w0, 1
ldr w2, [sp, 252]
ldr w0, [sp, 296]
mul w0, w2, w0
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 112]
add x0, x1, x0
ldr s0, [x0]
str s0, [sp, 324]
ldr w1, [sp, 252]
ldr w0, [sp, 296]
mul w1, w1, w0
ldr w0, [sp, 248]
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 112]
add x0, x1, x0
ldr s1, [x0]
ldr s2, [sp, 356]
ldr s0, [sp, 324]
fmul s0, s2, s0
ldr w0, [sp, 248]
add w1, w0, 1
ldr w2, [sp, 252]
ldr w0, [sp, 296]
mul w0, w2, w0
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 112]
add x0, x1, x0
fsub s0, s1, s0
str s0, [x0]
ldr w1, [sp, 252]
ldr w0, [sp, 296]
mul w1, w1, w0
ldr w0, [sp, 248]
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 112]
add x0, x1, x0
ldr s0, [sp, 324]
str s0, [x0]
ldr w0, [sp, 252]
add w0, w0, 1
str w0, [sp, 252]
.L94:
ldr w0, [sp, 208]
ldr w1, [sp, 252]
cmp w1, w0
ble .L95
b .L96
.L265:
ldr w1, [sp, 248]
ldr w0, [sp, 296]
mul w1, w1, w0
ldr w0, [sp, 248]
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 112]
add x0, x1, x0
ldr s0, [x0]
fcmp s0, #0.0
bne .L97
ldr w1, [sp, 248]
ldr w0, [sp, 296]
mul w1, w1, w0
ldr w0, [sp, 248]
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 112]
add x0, x1, x0
ldr x1, [sp, 88]
ldr s0, [x1]
str s0, [x0]
.L97:
ldr w1, [sp, 248]
ldr w0, [sp, 296]
mul w1, w1, w0
ldr w0, [sp, 248]
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 112]
add x0, x1, x0
ldr s0, [x0]
ldr s1, [sp, 328]
fdiv s0, s1, s0
str s0, [sp, 356]
ldr s0, [sp, 356]
fcmp s0, #0.0
beq .L96
ldr x0, [sp, 168]
ldr w0, [x0]
str w0, [sp, 208]
ldr w0, [sp, 248]
add w0, w0, 1
str w0, [sp, 252]
b .L98
.L99:
ldr w0, [sp, 248]
add w1, w0, 1
ldr w2, [sp, 252]
ldr w0, [sp, 296]
mul w0, w2, w0
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 112]
add x0, x1, x0
ldr s1, [x0]
ldr w1, [sp, 252]
ldr w0, [sp, 296]
mul w1, w1, w0
ldr w0, [sp, 248]
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 112]
add x0, x1, x0
ldr s2, [x0]
ldr s0, [sp, 356]
fmul s0, s2, s0
ldr w0, [sp, 248]
add w1, w0, 1
ldr w2, [sp, 252]
ldr w0, [sp, 296]
mul w0, w2, w0
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 112]
add x0, x1, x0
fsub s0, s1, s0
str s0, [x0]
ldr w0, [sp, 252]
add w0, w0, 1
str w0, [sp, 252]
.L98:
ldr w0, [sp, 208]
ldr w1, [sp, 252]
cmp w1, w0
ble .L99
.L96:
ldr w0, [sp, 248]
add w0, w0, 1
str w0, [sp, 248]
.L85:
ldr w0, [sp, 204]
ldr w1, [sp, 248]
cmp w1, w0
ble .L100
ldr x0, [sp, 168]
ldr w1, [x0]
ldr x0, [sp, 168]
ldr w2, [x0]
ldr w0, [sp, 296]
mul w0, w2, w0
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 112]
add x0, x1, x0
ldr s0, [x0]
fcmp s0, #0.0
bne .L101
ldr x0, [sp, 168]
ldr w1, [x0]
ldr x0, [sp, 168]
ldr w2, [x0]
ldr w0, [sp, 296]
mul w0, w2, w0
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 112]
add x0, x1, x0
ldr x1, [sp, 88]
ldr s0, [x1]
str s0, [x0]
.L101:
add x0, sp, 360
mov w1, 78
strb w1, [x0]
b .L102
.L84:
ldr x0, [sp, 168]
ldr w0, [x0]
str w0, [sp, 252]
b .L103
.L118:
ldr w0, [sp, 252]
sub w1, w0, #1
ldr w0, [sp, 288]
mul w1, w1, w0
ldr w0, [sp, 252]
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 160]
add x0, x1, x0
ldr s0, [x0]
str s0, [sp, 320]
ldr w1, [sp, 252]
ldr w0, [sp, 296]
mul w1, w1, w0
ldr w0, [sp, 252]
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 112]
add x0, x1, x0
ldr s0, [x0]
str s0, [sp, 216]
ldr s0, [sp, 216]
fcmpe s0, #0.0
bge .L238
b .L266
.L238:
ldr s1, [sp, 216]
b .L106
.L266:
ldr s0, [sp, 216]
fneg s1, s0
.L106:
ldr s0, [sp, 320]
fcmpe s0, #0.0
bge .L239
b .L267
.L239:
ldr s0, [sp, 320]
b .L109
.L267:
ldr s0, [sp, 320]
fneg s0, s0
.L109:
fcmpe s1, s0
bmi .L240
b .L268
.L240:
ldr w1, [sp, 252]
ldr w0, [sp, 296]
mul w1, w1, w0
ldr w0, [sp, 252]
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 112]
add x0, x1, x0
ldr s1, [x0]
ldr s0, [sp, 320]
fdiv s0, s1, s0
str s0, [sp, 356]
ldr w1, [sp, 252]
ldr w0, [sp, 296]
mul w1, w1, w0
ldr w0, [sp, 252]
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 112]
add x0, x1, x0
ldr s0, [sp, 320]
str s0, [x0]
ldr w0, [sp, 252]
sub w0, w0, #1
str w0, [sp, 204]
mov w0, 1
str w0, [sp, 248]
b .L112
.L113:
ldr w0, [sp, 252]
sub w1, w0, #1
ldr w0, [sp, 296]
mul w1, w1, w0
ldr w0, [sp, 248]
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 112]
add x0, x1, x0
ldr s0, [x0]
str s0, [sp, 324]
ldr w1, [sp, 252]
ldr w0, [sp, 296]
mul w1, w1, w0
ldr w0, [sp, 248]
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 112]
add x0, x1, x0
ldr s1, [x0]
ldr s2, [sp, 356]
ldr s0, [sp, 324]
fmul s0, s2, s0
ldr w0, [sp, 252]
sub w1, w0, #1
ldr w0, [sp, 296]
mul w1, w1, w0
ldr w0, [sp, 248]
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 112]
add x0, x1, x0
fsub s0, s1, s0
str s0, [x0]
ldr w1, [sp, 252]
ldr w0, [sp, 296]
mul w1, w1, w0
ldr w0, [sp, 248]
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 112]
add x0, x1, x0
ldr s0, [sp, 324]
str s0, [x0]
ldr w0, [sp, 248]
add w0, w0, 1
str w0, [sp, 248]
.L112:
ldr w0, [sp, 204]
ldr w1, [sp, 248]
cmp w1, w0
ble .L113
b .L114
.L268:
ldr w1, [sp, 252]
ldr w0, [sp, 296]
mul w1, w1, w0
ldr w0, [sp, 252]
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 112]
add x0, x1, x0
ldr s0, [x0]
fcmp s0, #0.0
bne .L115
ldr w1, [sp, 252]
ldr w0, [sp, 296]
mul w1, w1, w0
ldr w0, [sp, 252]
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 112]
add x0, x1, x0
ldr x1, [sp, 88]
ldr s0, [x1]
str s0, [x0]
.L115:
ldr w1, [sp, 252]
ldr w0, [sp, 296]
mul w1, w1, w0
ldr w0, [sp, 252]
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 112]
add x0, x1, x0
ldr s0, [x0]
ldr s1, [sp, 320]
fdiv s0, s1, s0
str s0, [sp, 356]
ldr s0, [sp, 356]
fcmp s0, #0.0
beq .L114
ldr w0, [sp, 252]
sub w0, w0, #1
str w0, [sp, 204]
mov w0, 1
str w0, [sp, 248]
b .L116
.L117:
ldr w0, [sp, 252]
sub w1, w0, #1
ldr w0, [sp, 296]
mul w1, w1, w0
ldr w0, [sp, 248]
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 112]
add x0, x1, x0
ldr s1, [x0]
ldr w1, [sp, 252]
ldr w0, [sp, 296]
mul w1, w1, w0
ldr w0, [sp, 248]
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 112]
add x0, x1, x0
ldr s2, [x0]
ldr s0, [sp, 356]
fmul s0, s2, s0
ldr w0, [sp, 252]
sub w1, w0, #1
ldr w0, [sp, 296]
mul w1, w1, w0
ldr w0, [sp, 248]
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 112]
add x0, x1, x0
fsub s0, s1, s0
str s0, [x0]
ldr w0, [sp, 248]
add w0, w0, 1
str w0, [sp, 248]
.L116:
ldr w0, [sp, 204]
ldr w1, [sp, 248]
cmp w1, w0
ble .L117
.L114:
ldr w0, [sp, 252]
sub w0, w0, #1
str w0, [sp, 252]
.L103:
ldr w0, [sp, 252]
cmp w0, 1
bgt .L118
ldrsw x0, [sp, 296]
add x0, x0, 1
lsl x0, x0, 2
ldr x1, [sp, 112]
add x0, x1, x0
ldr s0, [x0]
fcmp s0, #0.0
bne .L119
ldrsw x0, [sp, 296]
add x0, x0, 1
lsl x0, x0, 2
ldr x1, [sp, 112]
add x0, x1, x0
ldr x1, [sp, 88]
ldr s0, [x1]
str s0, [x0]
.L119:
add x0, sp, 360
mov w1, 84
strb w1, [x0]
.L102:
add x0, sp, 368
mov w1, 78
strb w1, [x0]
ldr x0, [sp, 168]
ldr w0, [x0]
str w0, [sp, 204]
mov w0, 1
str w0, [sp, 284]
b .L120
.L126:
ldrsw x0, [sp, 300]
lsl x0, x0, 2
ldr x1, [sp, 112]
add x3, x1, x0
ldr x0, [sp, 128]
add x4, x0, 4
ldr x0, [sp, 96]
add x0, x0, 4
add x2, sp, 368
add x8, sp, 360
add x1, sp, 224
str x1, [sp, 16]
str x0, [sp, 8]
add x0, sp, 228
str x0, [sp]
mov x7, x4
ldr x6, [sp, 104]
mov x5, x3
ldr x4, [sp, 168]
mov x3, x2
adrp x0, .LC0
add x2, x0, :lo12:.LC0
mov x1, x8
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl slatrs_
add x0, sp, 368
mov w1, 89
strb w1, [x0]
ldr x0, [sp, 128]
add x1, x0, 4
adrp x0, c__1
add x2, x0, :lo12:c__1
ldr x0, [sp, 168]
bl sasum_
str s0, [sp, 272]
ldr s1, [sp, 228]
ldr s0, [sp, 308]
fmul s0, s1, s0
ldr s1, [sp, 272]
fcmpe s1, s0
bge .L286
ldr x0, [sp, 88]
ldr s1, [x0]
ldr s2, [sp, 304]
fmov s0, 1.0e+0
fadd s0, s2, s0
fdiv s0, s1, s0
str s0, [sp, 324]
ldr x0, [sp, 128]
add x0, x0, 4
ldr x1, [sp, 88]
ldr s0, [x1]
str s0, [x0]
ldr x0, [sp, 168]
ldr w0, [x0]
str w0, [sp, 208]
mov w0, 2
str w0, [sp, 248]
b .L124
.L125:
ldrsw x0, [sp, 248]
lsl x0, x0, 2
ldr x1, [sp, 128]
add x0, x1, x0
ldr s0, [sp, 324]
str s0, [x0]
ldr w0, [sp, 248]
add w0, w0, 1
str w0, [sp, 248]
.L124:
ldr w0, [sp, 208]
ldr w1, [sp, 248]
cmp w1, w0
ble .L125
ldr x0, [sp, 168]
ldr w1, [x0]
ldr w0, [sp, 284]
sub w0, w1, w0
sxtw x0, w0
add x0, x0, 1
lsl x0, x0, 2
ldr x1, [sp, 128]
add x0, x1, x0
ldr s1, [x0]
ldr x0, [sp, 88]
ldr s2, [x0]
ldr s0, [sp, 304]
fmul s0, s2, s0
ldr x0, [sp, 168]
ldr w1, [x0]
ldr w0, [sp, 284]
sub w0, w1, w0
sxtw x0, w0
add x0, x0, 1
lsl x0, x0, 2
ldr x1, [sp, 128]
add x0, x1, x0
fsub s0, s1, s0
str s0, [x0]
ldr w0, [sp, 284]
add w0, w0, 1
str w0, [sp, 284]
.L120:
ldr w0, [sp, 204]
ldr w1, [sp, 284]
cmp w1, w0
ble .L126
ldr x0, [sp, 64]
mov w1, 1
str w1, [x0]
b .L123
.L286:
nop
.L123:
ldr x0, [sp, 128]
add x1, x0, 4
adrp x0, c__1
add x2, x0, :lo12:c__1
ldr x0, [sp, 168]
bl isamax_
str w0, [sp, 248]
ldrsw x0, [sp, 248]
lsl x0, x0, 2
ldr x1, [sp, 128]
add x0, x1, x0
ldr s0, [x0]
str s0, [sp, 216]
ldr s0, [sp, 216]
fcmpe s0, #0.0
bge .L241
b .L269
.L241:
ldr s0, [sp, 216]
b .L129
.L269:
ldr s0, [sp, 216]
fneg s0, s0
.L129:
fmov s1, 1.0e+0
fdiv s0, s1, s0
str s0, [sp, 220]
ldr x0, [sp, 128]
add x2, x0, 4
add x1, sp, 220
adrp x0, c__1
add x3, x0, :lo12:c__1
ldr x0, [sp, 168]
bl sscal_
b .L130
.L76:
ldr x0, [sp, 176]
ldr w0, [x0]
cmp w0, 0
beq .L131
ldr x0, [sp, 168]
ldr w0, [x0]
str w0, [sp, 204]
mov w0, 1
str w0, [sp, 248]
b .L132
.L133:
ldrsw x0, [sp, 248]
lsl x0, x0, 2
ldr x1, [sp, 128]
add x0, x1, x0
ldr x1, [sp, 88]
ldr s0, [x1]
str s0, [x0]
ldrsw x0, [sp, 248]
lsl x0, x0, 2
ldr x1, [sp, 120]
add x0, x1, x0
str wzr, [x0]
ldr w0, [sp, 248]
add w0, w0, 1
str w0, [sp, 248]
.L132:
ldr w0, [sp, 204]
ldr w1, [sp, 248]
cmp w1, w0
ble .L133
b .L134
.L131:
ldr x0, [sp, 128]
add x1, x0, 4
adrp x0, c__1
add x2, x0, :lo12:c__1
ldr x0, [sp, 168]
bl snrm2_
str s0, [sp, 216]
ldr x0, [sp, 120]
add x1, x0, 4
adrp x0, c__1
add x2, x0, :lo12:c__1
ldr x0, [sp, 168]
bl snrm2_
str s0, [sp, 220]
add x1, sp, 220
add x0, sp, 216
bl slapy2_
str s0, [sp, 316]
ldr x0, [sp, 88]
ldr s1, [x0]
ldr s0, [sp, 304]
fmul s1, s1, s0
ldr s2, [sp, 316]
ldr s0, [sp, 312]
fcmpe s2, s0
bge .L242
b .L270
.L242:
ldr s0, [sp, 316]
b .L137
.L270:
ldr s0, [sp, 312]
.L137:
fdiv s0, s1, s0
str s0, [sp, 240]
ldr x0, [sp, 128]
add x2, x0, 4
add x1, sp, 240
adrp x0, c__1
add x3, x0, :lo12:c__1
ldr x0, [sp, 168]
bl sscal_
ldr x0, [sp, 120]
add x2, x0, 4
add x1, sp, 240
adrp x0, c__1
add x3, x0, :lo12:c__1
ldr x0, [sp, 168]
bl sscal_
.L134:
ldr x0, [sp, 184]
ldr w0, [x0]
cmp w0, 0
beq .L138
ldr x0, [sp, 136]
ldr s0, [x0]
ldrsw x0, [sp, 296]
add x0, x0, 2
lsl x0, x0, 2
ldr x1, [sp, 112]
add x0, x1, x0
fneg s0, s0
str s0, [x0]
ldr x0, [sp, 168]
ldr w0, [x0]
str w0, [sp, 204]
mov w0, 2
str w0, [sp, 248]
b .L139
.L140:
ldr w0, [sp, 248]
add w1, w0, 1
ldr w0, [sp, 296]
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 112]
add x0, x1, x0
str wzr, [x0]
ldr w0, [sp, 248]
add w0, w0, 1
str w0, [sp, 248]
.L139:
ldr w0, [sp, 204]
ldr w1, [sp, 248]
cmp w1, w0
ble .L140
ldr x0, [sp, 168]
ldr w0, [x0]
sub w0, w0, #1
str w0, [sp, 204]
mov w0, 1
str w0, [sp, 248]
b .L141
.L153:
ldr w1, [sp, 248]
ldr w0, [sp, 296]
mul w1, w1, w0
ldr w0, [sp, 248]
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 112]
add x3, x1, x0
ldr w0, [sp, 248]
add w1, w0, 1
ldr w2, [sp, 248]
ldr w0, [sp, 296]
mul w0, w2, w0
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 112]
add x0, x1, x0
mov x1, x0
mov x0, x3
bl slapy2_
str s0, [sp, 276]
ldr w0, [sp, 248]
add w1, w0, 1
ldr w2, [sp, 248]
ldr w0, [sp, 288]
mul w0, w2, w0
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 160]
add x0, x1, x0
ldr s0, [x0]
str s0, [sp, 328]
ldr s0, [sp, 328]
fcmpe s0, #0.0
bge .L243
b .L271
.L243:
ldr s0, [sp, 328]
b .L144
.L271:
ldr s0, [sp, 328]
fneg s0, s0
.L144:
ldr s1, [sp, 276]
fcmpe s0, s1
bgt .L244
b .L272
.L244:
ldr w1, [sp, 248]
ldr w0, [sp, 296]
mul w1, w1, w0
ldr w0, [sp, 248]
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 112]
add x0, x1, x0
ldr s1, [x0]
ldr s0, [sp, 328]
fdiv s0, s1, s0
str s0, [sp, 236]
ldr w0, [sp, 248]
add w1, w0, 1
ldr w2, [sp, 248]
ldr w0, [sp, 296]
mul w0, w2, w0
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 112]
add x0, x1, x0
ldr s1, [x0]
ldr s0, [sp, 328]
fdiv s0, s1, s0
str s0, [sp, 232]
ldr w1, [sp, 248]
ldr w0, [sp, 296]
mul w1, w1, w0
ldr w0, [sp, 248]
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 112]
add x0, x1, x0
ldr s0, [sp, 328]
str s0, [x0]
ldr w0, [sp, 248]
add w1, w0, 1
ldr w2, [sp, 248]
ldr w0, [sp, 296]
mul w0, w2, w0
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 112]
add x0, x1, x0
str wzr, [x0]
ldr x0, [sp, 168]
ldr w0, [x0]
str w0, [sp, 208]
ldr w0, [sp, 248]
add w0, w0, 1
str w0, [sp, 252]
b .L147
.L148:
ldr w0, [sp, 248]
add w1, w0, 1
ldr w2, [sp, 252]
ldr w0, [sp, 296]
mul w0, w2, w0
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 112]
add x0, x1, x0
ldr s0, [x0]
str s0, [sp, 324]
ldr w1, [sp, 252]
ldr w0, [sp, 296]
mul w1, w1, w0
ldr w0, [sp, 248]
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 112]
add x0, x1, x0
ldr s1, [x0]
ldr s2, [sp, 236]
ldr s0, [sp, 324]
fmul s0, s2, s0
ldr w0, [sp, 248]
add w1, w0, 1
ldr w2, [sp, 252]
ldr w0, [sp, 296]
mul w0, w2, w0
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 112]
add x0, x1, x0
fsub s0, s1, s0
str s0, [x0]
ldr w0, [sp, 252]
add w1, w0, 1
ldr w2, [sp, 248]
ldr w0, [sp, 296]
mul w0, w2, w0
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 112]
add x0, x1, x0
ldr s1, [x0]
ldr s2, [sp, 232]
ldr s0, [sp, 324]
fmul s0, s2, s0
ldr w0, [sp, 252]
add w1, w0, 1
ldr w0, [sp, 248]
add w2, w0, 1
ldr w0, [sp, 296]
mul w0, w2, w0
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 112]
add x0, x1, x0
fsub s0, s1, s0
str s0, [x0]
ldr w1, [sp, 252]
ldr w0, [sp, 296]
mul w1, w1, w0
ldr w0, [sp, 248]
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 112]
add x0, x1, x0
ldr s0, [sp, 324]
str s0, [x0]
ldr w0, [sp, 252]
add w1, w0, 1
ldr w2, [sp, 248]
ldr w0, [sp, 296]
mul w0, w2, w0
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 112]
add x0, x1, x0
str wzr, [x0]
ldr w0, [sp, 252]
add w0, w0, 1
str w0, [sp, 252]
.L147:
ldr w0, [sp, 208]
ldr w1, [sp, 252]
cmp w1, w0
ble .L148
ldr x0, [sp, 136]
ldr s0, [x0]
ldr w0, [sp, 248]
add w1, w0, 2
ldr w2, [sp, 248]
ldr w0, [sp, 296]
mul w0, w2, w0
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 112]
add x0, x1, x0
fneg s0, s0
str s0, [x0]
ldr w0, [sp, 248]
add w1, w0, 1
ldr w0, [sp, 248]
add w2, w0, 1
ldr w0, [sp, 296]
mul w0, w2, w0
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 112]
add x0, x1, x0
ldr s1, [x0]
ldr x0, [sp, 136]
ldr s2, [x0]
ldr s0, [sp, 232]
fmul s0, s2, s0
ldr w0, [sp, 248]
add w1, w0, 1
ldr w0, [sp, 248]
add w2, w0, 1
ldr w0, [sp, 296]
mul w0, w2, w0
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 112]
add x0, x1, x0
fsub s0, s1, s0
str s0, [x0]
ldr w0, [sp, 248]
add w1, w0, 2
ldr w0, [sp, 248]
add w2, w0, 1
ldr w0, [sp, 296]
mul w0, w2, w0
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 112]
add x0, x1, x0
ldr s1, [x0]
ldr x0, [sp, 136]
ldr s2, [x0]
ldr s0, [sp, 236]
fmul s0, s2, s0
ldr w0, [sp, 248]
add w1, w0, 2
ldr w0, [sp, 248]
add w2, w0, 1
ldr w0, [sp, 296]
mul w0, w2, w0
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 112]
add x0, x1, x0
fadd s0, s1, s0
str s0, [x0]
b .L149
.L272:
ldr s0, [sp, 276]
fcmp s0, #0.0
bne .L150
ldr w1, [sp, 248]
ldr w0, [sp, 296]
mul w1, w1, w0
ldr w0, [sp, 248]
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 112]
add x0, x1, x0
ldr x1, [sp, 88]
ldr s0, [x1]
str s0, [x0]
ldr w0, [sp, 248]
add w1, w0, 1
ldr w2, [sp, 248]
ldr w0, [sp, 296]
mul w0, w2, w0
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 112]
add x0, x1, x0
str wzr, [x0]
ldr x0, [sp, 88]
ldr s0, [x0]
str s0, [sp, 276]
.L150:
ldr s0, [sp, 276]
ldr s1, [sp, 328]
fdiv s1, s1, s0
ldr s0, [sp, 276]
fdiv s0, s1, s0
str s0, [sp, 328]
ldr w1, [sp, 248]
ldr w0, [sp, 296]
mul w1, w1, w0
ldr w0, [sp, 248]
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 112]
add x0, x1, x0
ldr s1, [x0]
ldr s0, [sp, 328]
fmul s0, s1, s0
str s0, [sp, 236]
ldr w0, [sp, 248]
add w1, w0, 1
ldr w2, [sp, 248]
ldr w0, [sp, 296]
mul w0, w2, w0
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 112]
add x0, x1, x0
ldr s0, [x0]
fneg s1, s0
ldr s0, [sp, 328]
fmul s0, s1, s0
str s0, [sp, 232]
ldr x0, [sp, 168]
ldr w0, [x0]
str w0, [sp, 208]
ldr w0, [sp, 248]
add w0, w0, 1
str w0, [sp, 252]
b .L151
.L152:
ldr w0, [sp, 248]
add w1, w0, 1
ldr w2, [sp, 252]
ldr w0, [sp, 296]
mul w0, w2, w0
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 112]
add x0, x1, x0
ldr s1, [x0]
ldr w1, [sp, 252]
ldr w0, [sp, 296]
mul w1, w1, w0
ldr w0, [sp, 248]
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 112]
add x0, x1, x0
ldr s2, [x0]
ldr s0, [sp, 236]
fmul s0, s2, s0
fsub s1, s1, s0
ldr w0, [sp, 252]
add w1, w0, 1
ldr w2, [sp, 248]
ldr w0, [sp, 296]
mul w0, w2, w0
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 112]
add x0, x1, x0
ldr s2, [x0]
ldr s0, [sp, 232]
fmul s0, s2, s0
ldr w0, [sp, 248]
add w1, w0, 1
ldr w2, [sp, 252]
ldr w0, [sp, 296]
mul w0, w2, w0
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 112]
add x0, x1, x0
fadd s0, s1, s0
str s0, [x0]
ldr s0, [sp, 236]
fneg s1, s0
ldr w0, [sp, 252]
add w1, w0, 1
ldr w2, [sp, 248]
ldr w0, [sp, 296]
mul w0, w2, w0
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 112]
add x0, x1, x0
ldr s0, [x0]
fmul s1, s1, s0
ldr w1, [sp, 252]
ldr w0, [sp, 296]
mul w1, w1, w0
ldr w0, [sp, 248]
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 112]
add x0, x1, x0
ldr s2, [x0]
ldr s0, [sp, 232]
fmul s0, s2, s0
ldr w0, [sp, 252]
add w1, w0, 1
ldr w0, [sp, 248]
add w2, w0, 1
ldr w0, [sp, 296]
mul w0, w2, w0
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 112]
add x0, x1, x0
fsub s0, s1, s0
str s0, [x0]
ldr w0, [sp, 252]
add w0, w0, 1
str w0, [sp, 252]
.L151:
ldr w0, [sp, 208]
ldr w1, [sp, 252]
cmp w1, w0
ble .L152
ldr w0, [sp, 248]
add w1, w0, 2
ldr w0, [sp, 248]
add w2, w0, 1
ldr w0, [sp, 296]
mul w0, w2, w0
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 112]
add x0, x1, x0
ldr s1, [x0]
ldr x0, [sp, 136]
ldr s0, [x0]
ldr w0, [sp, 248]
add w1, w0, 2
ldr w0, [sp, 248]
add w2, w0, 1
ldr w0, [sp, 296]
mul w0, w2, w0
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 112]
add x0, x1, x0
fsub s0, s1, s0
str s0, [x0]
.L149:
ldr x0, [sp, 168]
ldr w1, [x0]
ldr w0, [sp, 248]
sub w0, w1, w0
str w0, [sp, 208]
ldr x0, [sp, 168]
ldr w1, [x0]
ldr w0, [sp, 248]
sub w0, w1, w0
str w0, [sp, 212]
ldr w0, [sp, 248]
add w1, w0, 1
ldr w0, [sp, 296]
mul w1, w1, w0
ldr w0, [sp, 248]
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 112]
add x1, x1, x0
add x0, sp, 208
ldr x2, [sp, 104]
bl sasum_
fmov s8, s0
ldr w0, [sp, 248]
add w1, w0, 2
ldr w2, [sp, 248]
ldr w0, [sp, 296]
mul w0, w2, w0
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 112]
add x1, x1, x0
add x3, sp, 212
adrp x0, c__1
add x2, x0, :lo12:c__1
mov x0, x3
bl sasum_
ldrsw x0, [sp, 248]
lsl x0, x0, 2
ldr x1, [sp, 96]
add x0, x1, x0
fadd s0, s8, s0
str s0, [x0]
ldr w0, [sp, 248]
add w0, w0, 1
str w0, [sp, 248]
.L141:
ldr w0, [sp, 204]
ldr w1, [sp, 248]
cmp w1, w0
ble .L153
ldr x0, [sp, 168]
ldr w1, [x0]
ldr x0, [sp, 168]
ldr w2, [x0]
ldr w0, [sp, 296]
mul w0, w2, w0
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 112]
add x0, x1, x0
ldr s0, [x0]
fcmp s0, #0.0
bne .L154
ldr x0, [sp, 168]
ldr w0, [x0]
add w1, w0, 1
ldr x0, [sp, 168]
ldr w2, [x0]
ldr w0, [sp, 296]
mul w0, w2, w0
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 112]
add x0, x1, x0
ldr s0, [x0]
fcmp s0, #0.0
bne .L154
ldr x0, [sp, 168]
ldr w1, [x0]
ldr x0, [sp, 168]
ldr w2, [x0]
ldr w0, [sp, 296]
mul w0, w2, w0
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 112]
add x0, x1, x0
ldr x1, [sp, 88]
ldr s0, [x1]
str s0, [x0]
.L154:
ldr x0, [sp, 168]
ldr w0, [x0]
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 96]
add x0, x1, x0
str wzr, [x0]
ldr x0, [sp, 168]
ldr w0, [x0]
str w0, [sp, 260]
mov w0, 1
str w0, [sp, 264]
mov w0, -1
str w0, [sp, 268]
b .L155
.L138:
ldr x0, [sp, 168]
ldr w0, [x0]
add w1, w0, 1
ldr x0, [sp, 168]
ldr w2, [x0]
ldr w0, [sp, 296]
mul w0, w2, w0
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 112]
add x0, x1, x0
ldr x1, [sp, 136]
ldr s0, [x1]
str s0, [x0]
ldr x0, [sp, 168]
ldr w0, [x0]
sub w0, w0, #1
str w0, [sp, 204]
mov w0, 1
str w0, [sp, 252]
b .L156
.L157:
ldr x0, [sp, 168]
ldr w0, [x0]
add w1, w0, 1
ldr w2, [sp, 252]
ldr w0, [sp, 296]
mul w0, w2, w0
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 112]
add x0, x1, x0
str wzr, [x0]
ldr w0, [sp, 252]
add w0, w0, 1
str w0, [sp, 252]
.L156:
ldr w0, [sp, 204]
ldr w1, [sp, 252]
cmp w1, w0
ble .L157
ldr x0, [sp, 168]
ldr w0, [x0]
str w0, [sp, 252]
b .L158
.L170:
ldr w0, [sp, 252]
sub w1, w0, #1
ldr w0, [sp, 288]
mul w1, w1, w0
ldr w0, [sp, 252]
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 160]
add x0, x1, x0
ldr s0, [x0]
str s0, [sp, 320]
ldr w1, [sp, 252]
ldr w0, [sp, 296]
mul w1, w1, w0
ldr w0, [sp, 252]
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 112]
add x3, x1, x0
ldr w0, [sp, 252]
add w1, w0, 1
ldr w2, [sp, 252]
ldr w0, [sp, 296]
mul w0, w2, w0
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 112]
add x0, x1, x0
mov x1, x0
mov x0, x3
bl slapy2_
str s0, [sp, 280]
ldr s0, [sp, 320]
fcmpe s0, #0.0
bge .L245
b .L273
.L245:
ldr s0, [sp, 320]
b .L161
.L273:
ldr s0, [sp, 320]
fneg s0, s0
.L161:
ldr s1, [sp, 280]
fcmpe s0, s1
bgt .L246
b .L274
.L246:
ldr w1, [sp, 252]
ldr w0, [sp, 296]
mul w1, w1, w0
ldr w0, [sp, 252]
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 112]
add x0, x1, x0
ldr s1, [x0]
ldr s0, [sp, 320]
fdiv s0, s1, s0
str s0, [sp, 236]
ldr w0, [sp, 252]
add w1, w0, 1
ldr w2, [sp, 252]
ldr w0, [sp, 296]
mul w0, w2, w0
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 112]
add x0, x1, x0
ldr s1, [x0]
ldr s0, [sp, 320]
fdiv s0, s1, s0
str s0, [sp, 232]
ldr w1, [sp, 252]
ldr w0, [sp, 296]
mul w1, w1, w0
ldr w0, [sp, 252]
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 112]
add x0, x1, x0
ldr s0, [sp, 320]
str s0, [x0]
ldr w0, [sp, 252]
add w1, w0, 1
ldr w2, [sp, 252]
ldr w0, [sp, 296]
mul w0, w2, w0
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 112]
add x0, x1, x0
str wzr, [x0]
ldr w0, [sp, 252]
sub w0, w0, #1
str w0, [sp, 204]
mov w0, 1
str w0, [sp, 248]
b .L164
.L165:
ldr w0, [sp, 252]
sub w1, w0, #1
ldr w0, [sp, 296]
mul w1, w1, w0
ldr w0, [sp, 248]
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 112]
add x0, x1, x0
ldr s0, [x0]
str s0, [sp, 324]
ldr w1, [sp, 252]
ldr w0, [sp, 296]
mul w1, w1, w0
ldr w0, [sp, 248]
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 112]
add x0, x1, x0
ldr s1, [x0]
ldr s2, [sp, 236]
ldr s0, [sp, 324]
fmul s0, s2, s0
ldr w0, [sp, 252]
sub w1, w0, #1
ldr w0, [sp, 296]
mul w1, w1, w0
ldr w0, [sp, 248]
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 112]
add x0, x1, x0
fsub s0, s1, s0
str s0, [x0]
ldr w0, [sp, 252]
add w1, w0, 1
ldr w2, [sp, 248]
ldr w0, [sp, 296]
mul w0, w2, w0
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 112]
add x0, x1, x0
ldr s1, [x0]
ldr s2, [sp, 232]
ldr s0, [sp, 324]
fmul s0, s2, s0
ldr w1, [sp, 248]
ldr w0, [sp, 296]
mul w1, w1, w0
ldr w0, [sp, 252]
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 112]
add x0, x1, x0
fsub s0, s1, s0
str s0, [x0]
ldr w1, [sp, 252]
ldr w0, [sp, 296]
mul w1, w1, w0
ldr w0, [sp, 248]
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 112]
add x0, x1, x0
ldr s0, [sp, 324]
str s0, [x0]
ldr w0, [sp, 252]
add w1, w0, 1
ldr w2, [sp, 248]
ldr w0, [sp, 296]
mul w0, w2, w0
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 112]
add x0, x1, x0
str wzr, [x0]
ldr w0, [sp, 248]
add w0, w0, 1
str w0, [sp, 248]
.L164:
ldr w0, [sp, 204]
ldr w1, [sp, 248]
cmp w1, w0
ble .L165
ldr w0, [sp, 252]
add w1, w0, 1
ldr w0, [sp, 252]
sub w2, w0, #1
ldr w0, [sp, 296]
mul w0, w2, w0
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 112]
add x0, x1, x0
ldr x1, [sp, 136]
ldr s0, [x1]
str s0, [x0]
ldr w0, [sp, 252]
sub w1, w0, #1
ldr w0, [sp, 252]
sub w2, w0, #1
ldr w0, [sp, 296]
mul w0, w2, w0
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 112]
add x0, x1, x0
ldr s1, [x0]
ldr x0, [sp, 136]
ldr s2, [x0]
ldr s0, [sp, 232]
fmul s0, s2, s0
ldr w0, [sp, 252]
sub w1, w0, #1
ldr w0, [sp, 252]
sub w2, w0, #1
ldr w0, [sp, 296]
mul w0, w2, w0
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 112]
add x0, x1, x0
fadd s0, s1, s0
str s0, [x0]
ldr w0, [sp, 252]
sub w1, w0, #1
ldr w0, [sp, 296]
mul w1, w1, w0
ldr w0, [sp, 252]
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 112]
add x0, x1, x0
ldr s1, [x0]
ldr x0, [sp, 136]
ldr s2, [x0]
ldr s0, [sp, 236]
fmul s0, s2, s0
ldr w0, [sp, 252]
sub w1, w0, #1
ldr w0, [sp, 296]
mul w1, w1, w0
ldr w0, [sp, 252]
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 112]
add x0, x1, x0
fsub s0, s1, s0
str s0, [x0]
b .L166
.L274:
ldr s0, [sp, 280]
fcmp s0, #0.0
bne .L167
ldr w1, [sp, 252]
ldr w0, [sp, 296]
mul w1, w1, w0
ldr w0, [sp, 252]
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 112]
add x0, x1, x0
ldr x1, [sp, 88]
ldr s0, [x1]
str s0, [x0]
ldr w0, [sp, 252]
add w1, w0, 1
ldr w2, [sp, 252]
ldr w0, [sp, 296]
mul w0, w2, w0
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 112]
add x0, x1, x0
str wzr, [x0]
ldr x0, [sp, 88]
ldr s0, [x0]
str s0, [sp, 280]
.L167:
ldr s0, [sp, 280]
ldr s1, [sp, 320]
fdiv s1, s1, s0
ldr s0, [sp, 280]
fdiv s0, s1, s0
str s0, [sp, 320]
ldr w1, [sp, 252]
ldr w0, [sp, 296]
mul w1, w1, w0
ldr w0, [sp, 252]
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 112]
add x0, x1, x0
ldr s1, [x0]
ldr s0, [sp, 320]
fmul s0, s1, s0
str s0, [sp, 236]
ldr w0, [sp, 252]
add w1, w0, 1
ldr w2, [sp, 252]
ldr w0, [sp, 296]
mul w0, w2, w0
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 112]
add x0, x1, x0
ldr s0, [x0]
fneg s1, s0
ldr s0, [sp, 320]
fmul s0, s1, s0
str s0, [sp, 232]
ldr w0, [sp, 252]
sub w0, w0, #1
str w0, [sp, 204]
mov w0, 1
str w0, [sp, 248]
b .L168
.L169:
ldr w0, [sp, 252]
sub w1, w0, #1
ldr w0, [sp, 296]
mul w1, w1, w0
ldr w0, [sp, 248]
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 112]
add x0, x1, x0
ldr s1, [x0]
ldr w1, [sp, 252]
ldr w0, [sp, 296]
mul w1, w1, w0
ldr w0, [sp, 248]
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 112]
add x0, x1, x0
ldr s2, [x0]
ldr s0, [sp, 236]
fmul s0, s2, s0
fsub s1, s1, s0
ldr w0, [sp, 252]
add w1, w0, 1
ldr w2, [sp, 248]
ldr w0, [sp, 296]
mul w0, w2, w0
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 112]
add x0, x1, x0
ldr s2, [x0]
ldr s0, [sp, 232]
fmul s0, s2, s0
ldr w0, [sp, 252]
sub w1, w0, #1
ldr w0, [sp, 296]
mul w1, w1, w0
ldr w0, [sp, 248]
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 112]
add x0, x1, x0
fadd s0, s1, s0
str s0, [x0]
ldr s0, [sp, 236]
fneg s1, s0
ldr w0, [sp, 252]
add w1, w0, 1
ldr w2, [sp, 248]
ldr w0, [sp, 296]
mul w0, w2, w0
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 112]
add x0, x1, x0
ldr s0, [x0]
fmul s1, s1, s0
ldr w1, [sp, 252]
ldr w0, [sp, 296]
mul w1, w1, w0
ldr w0, [sp, 248]
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 112]
add x0, x1, x0
ldr s2, [x0]
ldr s0, [sp, 232]
fmul s0, s2, s0
ldr w1, [sp, 248]
ldr w0, [sp, 296]
mul w1, w1, w0
ldr w0, [sp, 252]
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 112]
add x0, x1, x0
fsub s0, s1, s0
str s0, [x0]
ldr w0, [sp, 248]
add w0, w0, 1
str w0, [sp, 248]
.L168:
ldr w0, [sp, 204]
ldr w1, [sp, 248]
cmp w1, w0
ble .L169
ldr w0, [sp, 252]
sub w1, w0, #1
ldr w0, [sp, 296]
mul w1, w1, w0
ldr w0, [sp, 252]
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 112]
add x0, x1, x0
ldr s1, [x0]
ldr x0, [sp, 136]
ldr s0, [x0]
ldr w0, [sp, 252]
sub w1, w0, #1
ldr w0, [sp, 296]
mul w1, w1, w0
ldr w0, [sp, 252]
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 112]
add x0, x1, x0
fadd s0, s1, s0
str s0, [x0]
.L166:
ldr w0, [sp, 252]
sub w0, w0, #1
str w0, [sp, 204]
ldr w0, [sp, 252]
sub w0, w0, #1
str w0, [sp, 208]
ldr w1, [sp, 252]
ldr w0, [sp, 296]
mul w0, w1, w0
sxtw x0, w0
add x0, x0, 1
lsl x0, x0, 2
ldr x1, [sp, 112]
add x1, x1, x0
add x3, sp, 204
adrp x0, c__1
add x2, x0, :lo12:c__1
mov x0, x3
bl sasum_
fmov s8, s0
ldr w0, [sp, 252]
add w1, w0, 1
ldr w0, [sp, 296]
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 112]
add x1, x1, x0
add x0, sp, 208
ldr x2, [sp, 104]
bl sasum_
ldrsw x0, [sp, 252]
lsl x0, x0, 2
ldr x1, [sp, 96]
add x0, x1, x0
fadd s0, s8, s0
str s0, [x0]
ldr w0, [sp, 252]
sub w0, w0, #1
str w0, [sp, 252]
.L158:
ldr w0, [sp, 252]
cmp w0, 1
bgt .L170
ldrsw x0, [sp, 296]
add x0, x0, 1
lsl x0, x0, 2
ldr x1, [sp, 112]
add x0, x1, x0
ldr s0, [x0]
fcmp s0, #0.0
bne .L171
ldrsw x0, [sp, 296]
add x0, x0, 2
lsl x0, x0, 2
ldr x1, [sp, 112]
add x0, x1, x0
ldr s0, [x0]
fcmp s0, #0.0
bne .L171
ldrsw x0, [sp, 296]
add x0, x0, 1
lsl x0, x0, 2
ldr x1, [sp, 112]
add x0, x1, x0
ldr x1, [sp, 88]
ldr s0, [x1]
str s0, [x0]
.L171:
ldr x0, [sp, 96]
add x0, x0, 4
str wzr, [x0]
mov w0, 1
str w0, [sp, 260]
ldr x0, [sp, 168]
ldr w0, [x0]
str w0, [sp, 264]
mov w0, 1
str w0, [sp, 268]
.L155:
ldr x0, [sp, 168]
ldr w0, [x0]
str w0, [sp, 204]
mov w0, 1
str w0, [sp, 284]
b .L172
.L219:
fmov s0, 1.0e+0
str s0, [sp, 228]
fmov s0, 1.0e+0
str s0, [sp, 244]
ldr x0, [sp, 72]
ldr s0, [x0]
str s0, [sp, 256]
ldr w0, [sp, 264]
str w0, [sp, 208]
ldr w0, [sp, 268]
str w0, [sp, 212]
ldr w0, [sp, 260]
str w0, [sp, 248]
b .L173
.L213:
ldrsw x0, [sp, 248]
lsl x0, x0, 2
ldr x1, [sp, 96]
add x0, x1, x0
ldr s0, [x0]
ldr s1, [sp, 256]
fcmpe s1, s0
bmi .L247
b .L174
.L247:
ldr s0, [sp, 244]
fmov s1, 1.0e+0
fdiv s0, s1, s0
str s0, [sp, 240]
ldr x0, [sp, 128]
add x2, x0, 4
add x1, sp, 240
adrp x0, c__1
add x3, x0, :lo12:c__1
ldr x0, [sp, 168]
bl sscal_
ldr x0, [sp, 120]
add x2, x0, 4
add x1, sp, 240
adrp x0, c__1
add x3, x0, :lo12:c__1
ldr x0, [sp, 168]
bl sscal_
ldr s1, [sp, 228]
ldr s0, [sp, 240]
fmul s0, s1, s0
str s0, [sp, 228]
fmov s0, 1.0e+0
str s0, [sp, 244]
ldr x0, [sp, 72]
ldr s0, [x0]
str s0, [sp, 256]
.L174:
ldrsw x0, [sp, 248]
lsl x0, x0, 2
ldr x1, [sp, 128]
add x0, x1, x0
ldr s0, [x0]
str s0, [sp, 236]
ldrsw x0, [sp, 248]
lsl x0, x0, 2
ldr x1, [sp, 120]
add x0, x1, x0
ldr s0, [x0]
str s0, [sp, 232]
ldr x0, [sp, 184]
ldr w0, [x0]
cmp w0, 0
beq .L176
ldr x0, [sp, 168]
ldr w0, [x0]
str w0, [sp, 336]
ldr w0, [sp, 248]
add w0, w0, 1
str w0, [sp, 252]
b .L177
.L178:
ldr s1, [sp, 236]
ldr w1, [sp, 252]
ldr w0, [sp, 296]
mul w1, w1, w0
ldr w0, [sp, 248]
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 112]
add x0, x1, x0
ldr s2, [x0]
ldrsw x0, [sp, 252]
lsl x0, x0, 2
ldr x1, [sp, 128]
add x0, x1, x0
ldr s0, [x0]
fmul s0, s2, s0
fsub s1, s1, s0
ldr w0, [sp, 252]
add w1, w0, 1
ldr w2, [sp, 248]
ldr w0, [sp, 296]
mul w0, w2, w0
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 112]
add x0, x1, x0
ldr s2, [x0]
ldrsw x0, [sp, 252]
lsl x0, x0, 2
ldr x1, [sp, 120]
add x0, x1, x0
ldr s0, [x0]
fmul s0, s2, s0
fadd s0, s1, s0
str s0, [sp, 236]
ldr s1, [sp, 232]
ldr w1, [sp, 252]
ldr w0, [sp, 296]
mul w1, w1, w0
ldr w0, [sp, 248]
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 112]
add x0, x1, x0
ldr s2, [x0]
ldrsw x0, [sp, 252]
lsl x0, x0, 2
ldr x1, [sp, 120]
add x0, x1, x0
ldr s0, [x0]
fmul s0, s2, s0
fsub s1, s1, s0
ldr w0, [sp, 252]
add w1, w0, 1
ldr w2, [sp, 248]
ldr w0, [sp, 296]
mul w0, w2, w0
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 112]
add x0, x1, x0
ldr s2, [x0]
ldrsw x0, [sp, 252]
lsl x0, x0, 2
ldr x1, [sp, 128]
add x0, x1, x0
ldr s0, [x0]
fmul s0, s2, s0
fsub s0, s1, s0
str s0, [sp, 232]
ldr w0, [sp, 252]
add w0, w0, 1
str w0, [sp, 252]
.L177:
ldr w1, [sp, 252]
ldr w0, [sp, 336]
cmp w1, w0
ble .L178
b .L179
.L176:
ldr w0, [sp, 248]
sub w0, w0, #1
str w0, [sp, 336]
mov w0, 1
str w0, [sp, 252]
b .L180
.L181:
ldr s1, [sp, 236]
ldr w1, [sp, 248]
ldr w0, [sp, 296]
mul w1, w1, w0
ldr w0, [sp, 252]
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 112]
add x0, x1, x0
ldr s2, [x0]
ldrsw x0, [sp, 252]
lsl x0, x0, 2
ldr x1, [sp, 128]
add x0, x1, x0
ldr s0, [x0]
fmul s0, s2, s0
fsub s1, s1, s0
ldr w0, [sp, 248]
add w1, w0, 1
ldr w2, [sp, 252]
ldr w0, [sp, 296]
mul w0, w2, w0
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 112]
add x0, x1, x0
ldr s2, [x0]
ldrsw x0, [sp, 252]
lsl x0, x0, 2
ldr x1, [sp, 120]
add x0, x1, x0
ldr s0, [x0]
fmul s0, s2, s0
fadd s0, s1, s0
str s0, [sp, 236]
ldr s1, [sp, 232]
ldr w1, [sp, 248]
ldr w0, [sp, 296]
mul w1, w1, w0
ldr w0, [sp, 252]
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 112]
add x0, x1, x0
ldr s2, [x0]
ldrsw x0, [sp, 252]
lsl x0, x0, 2
ldr x1, [sp, 120]
add x0, x1, x0
ldr s0, [x0]
fmul s0, s2, s0
fsub s1, s1, s0
ldr w0, [sp, 248]
add w1, w0, 1
ldr w2, [sp, 252]
ldr w0, [sp, 296]
mul w0, w2, w0
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 112]
add x0, x1, x0
ldr s2, [x0]
ldrsw x0, [sp, 252]
lsl x0, x0, 2
ldr x1, [sp, 128]
add x0, x1, x0
ldr s0, [x0]
fmul s0, s2, s0
fsub s0, s1, s0
str s0, [sp, 232]
ldr w0, [sp, 252]
add w0, w0, 1
str w0, [sp, 252]
.L180:
ldr w1, [sp, 252]
ldr w0, [sp, 336]
cmp w1, w0
ble .L181
.L179:
ldr w1, [sp, 248]
ldr w0, [sp, 296]
mul w1, w1, w0
ldr w0, [sp, 248]
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 112]
add x0, x1, x0
ldr s0, [x0]
str s0, [sp, 216]
ldr w0, [sp, 248]
add w1, w0, 1
ldr w2, [sp, 248]
ldr w0, [sp, 296]
mul w0, w2, w0
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 112]
add x0, x1, x0
ldr s0, [x0]
str s0, [sp, 220]
ldr s0, [sp, 216]
fcmpe s0, #0.0
bge .L248
b .L275
.L248:
ldr s1, [sp, 216]
b .L184
.L275:
ldr s0, [sp, 216]
fneg s1, s0
.L184:
ldr s0, [sp, 220]
fcmpe s0, #0.0
bge .L249
b .L276
.L249:
ldr s0, [sp, 220]
b .L187
.L276:
ldr s0, [sp, 220]
fneg s0, s0
.L187:
fadd s0, s1, s0
str s0, [sp, 340]
ldr x0, [sp, 80]
ldr s0, [x0]
ldr s1, [sp, 340]
fcmpe s1, s0
bgt .L250
b .L277
.L250:
ldr s1, [sp, 340]
fmov s0, 1.0e+0
fcmpe s1, s0
bmi .L251
b .L190
.L251:
ldr s0, [sp, 236]
fcmpe s0, #0.0
bge .L252
b .L278
.L252:
ldr s1, [sp, 236]
b .L194
.L278:
ldr s0, [sp, 236]
fneg s1, s0
.L194:
ldr s0, [sp, 232]
fcmpe s0, #0.0
bge .L253
b .L279
.L253:
ldr s0, [sp, 232]
b .L197
.L279:
ldr s0, [sp, 232]
fneg s0, s0
.L197:
fadd s0, s1, s0
str s0, [sp, 344]
ldr x0, [sp, 72]
ldr s1, [x0]
ldr s0, [sp, 340]
fmul s0, s1, s0
ldr s1, [sp, 344]
fcmpe s1, s0
bgt .L254
b .L190
.L254:
ldr s0, [sp, 344]
fmov s1, 1.0e+0
fdiv s0, s1, s0
str s0, [sp, 240]
ldr x0, [sp, 128]
add x2, x0, 4
add x1, sp, 240
adrp x0, c__1
add x3, x0, :lo12:c__1
ldr x0, [sp, 168]
bl sscal_
ldr x0, [sp, 120]
add x2, x0, 4
add x1, sp, 240
adrp x0, c__1
add x3, x0, :lo12:c__1
ldr x0, [sp, 168]
bl sscal_
ldrsw x0, [sp, 248]
lsl x0, x0, 2
ldr x1, [sp, 128]
add x0, x1, x0
ldr s0, [x0]
str s0, [sp, 236]
ldrsw x0, [sp, 248]
lsl x0, x0, 2
ldr x1, [sp, 120]
add x0, x1, x0
ldr s0, [x0]
str s0, [sp, 232]
ldr s1, [sp, 228]
ldr s0, [sp, 240]
fmul s0, s1, s0
str s0, [sp, 228]
ldr s0, [sp, 240]
ldr s1, [sp, 244]
fmul s0, s1, s0
str s0, [sp, 244]
.L190:
ldr w1, [sp, 248]
ldr w0, [sp, 296]
mul w1, w1, w0
ldr w0, [sp, 248]
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 112]
add x6, x1, x0
ldr w0, [sp, 248]
add w1, w0, 1
ldr w2, [sp, 248]
ldr w0, [sp, 296]
mul w0, w2, w0
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 112]
add x2, x1, x0
ldrsw x0, [sp, 248]
lsl x0, x0, 2
ldr x1, [sp, 128]
add x3, x1, x0
ldrsw x0, [sp, 248]
lsl x0, x0, 2
ldr x1, [sp, 120]
add x4, x1, x0
add x1, sp, 232
add x0, sp, 236
mov x5, x4
mov x4, x3
mov x3, x2
mov x2, x6
bl sladiv_
ldrsw x0, [sp, 248]
lsl x0, x0, 2
ldr x1, [sp, 128]
add x0, x1, x0
ldr s0, [x0]
str s0, [sp, 216]
ldrsw x0, [sp, 248]
lsl x0, x0, 2
ldr x1, [sp, 120]
add x0, x1, x0
ldr s0, [x0]
str s0, [sp, 220]
ldr s0, [sp, 216]
fcmpe s0, #0.0
bge .L255
b .L280
.L255:
ldr s1, [sp, 216]
b .L201
.L280:
ldr s0, [sp, 216]
fneg s1, s0
.L201:
ldr s0, [sp, 220]
fcmpe s0, #0.0
bge .L256
b .L281
.L256:
ldr s0, [sp, 220]
b .L204
.L281:
ldr s0, [sp, 220]
fneg s0, s0
.L204:
fadd s0, s1, s0
str s0, [sp, 348]
ldr s1, [sp, 348]
ldr s0, [sp, 244]
fcmpe s1, s0
bge .L257
b .L282
.L257:
ldr s0, [sp, 348]
b .L207
.L282:
ldr s0, [sp, 244]
.L207:
str s0, [sp, 244]
ldr x0, [sp, 72]
ldr s1, [x0]
ldr s0, [sp, 244]
fdiv s0, s1, s0
str s0, [sp, 256]
b .L208
.L277:
ldr x0, [sp, 168]
ldr w0, [x0]
str w0, [sp, 336]
mov w0, 1
str w0, [sp, 252]
b .L209
.L210:
ldrsw x0, [sp, 252]
lsl x0, x0, 2
ldr x1, [sp, 128]
add x0, x1, x0
str wzr, [x0]
ldrsw x0, [sp, 252]
lsl x0, x0, 2
ldr x1, [sp, 120]
add x0, x1, x0
str wzr, [x0]
ldr w0, [sp, 252]
add w0, w0, 1
str w0, [sp, 252]
.L209:
ldr w1, [sp, 252]
ldr w0, [sp, 336]
cmp w1, w0
ble .L210
ldrsw x0, [sp, 248]
lsl x0, x0, 2
ldr x1, [sp, 128]
add x0, x1, x0
fmov s0, 1.0e+0
str s0, [x0]
ldrsw x0, [sp, 248]
lsl x0, x0, 2
ldr x1, [sp, 120]
add x0, x1, x0
fmov s0, 1.0e+0
str s0, [x0]
str wzr, [sp, 228]
fmov s0, 1.0e+0
str s0, [sp, 244]
ldr x0, [sp, 72]
ldr s0, [x0]
str s0, [sp, 256]
.L208:
ldr w0, [sp, 212]
ldr w1, [sp, 248]
add w0, w1, w0
str w0, [sp, 248]
.L173:
ldr w0, [sp, 212]
cmp w0, 0
bge .L211
ldr w0, [sp, 208]
ldr w1, [sp, 248]
cmp w1, w0
cset w0, ge
and w0, w0, 255
b .L212
.L211:
ldr w0, [sp, 208]
ldr w1, [sp, 248]
cmp w1, w0
cset w0, le
and w0, w0, 255
.L212:
cmp w0, 0
bne .L213
ldr x0, [sp, 128]
add x1, x0, 4
adrp x0, c__1
add x2, x0, :lo12:c__1
ldr x0, [sp, 168]
bl sasum_
fmov s8, s0
ldr x0, [sp, 120]
add x1, x0, 4
adrp x0, c__1
add x2, x0, :lo12:c__1
ldr x0, [sp, 168]
bl sasum_
fadd s0, s8, s0
str s0, [sp, 272]
ldr s1, [sp, 228]
ldr s0, [sp, 308]
fmul s0, s1, s0
ldr s1, [sp, 272]
fcmpe s1, s0
bge .L287
ldr x0, [sp, 88]
ldr s1, [x0]
ldr s2, [sp, 304]
fmov s0, 1.0e+0
fadd s0, s2, s0
fdiv s0, s1, s0
str s0, [sp, 332]
ldr x0, [sp, 128]
add x0, x0, 4
ldr x1, [sp, 88]
ldr s0, [x1]
str s0, [x0]
ldr x0, [sp, 120]
add x0, x0, 4
str wzr, [x0]
ldr x0, [sp, 168]
ldr w0, [x0]
str w0, [sp, 212]
mov w0, 2
str w0, [sp, 248]
b .L217
.L218:
ldrsw x0, [sp, 248]
lsl x0, x0, 2
ldr x1, [sp, 128]
add x0, x1, x0
ldr s0, [sp, 332]
str s0, [x0]
ldrsw x0, [sp, 248]
lsl x0, x0, 2
ldr x1, [sp, 120]
add x0, x1, x0
str wzr, [x0]
ldr w0, [sp, 248]
add w0, w0, 1
str w0, [sp, 248]
.L217:
ldr w0, [sp, 212]
ldr w1, [sp, 248]
cmp w1, w0
ble .L218
ldr x0, [sp, 168]
ldr w1, [x0]
ldr w0, [sp, 284]
sub w0, w1, w0
sxtw x0, w0
add x0, x0, 1
lsl x0, x0, 2
ldr x1, [sp, 128]
add x0, x1, x0
ldr s1, [x0]
ldr x0, [sp, 88]
ldr s2, [x0]
ldr s0, [sp, 304]
fmul s0, s2, s0
ldr x0, [sp, 168]
ldr w1, [x0]
ldr w0, [sp, 284]
sub w0, w1, w0
sxtw x0, w0
add x0, x0, 1
lsl x0, x0, 2
ldr x1, [sp, 128]
add x0, x1, x0
fsub s0, s1, s0
str s0, [x0]
ldr w0, [sp, 284]
add w0, w0, 1
str w0, [sp, 284]
.L172:
ldr w0, [sp, 204]
ldr w1, [sp, 284]
cmp w1, w0
ble .L219
ldr x0, [sp, 64]
mov w1, 1
str w1, [x0]
b .L216
.L287:
nop
.L216:
str wzr, [sp, 272]
ldr x0, [sp, 168]
ldr w0, [x0]
str w0, [sp, 204]
mov w0, 1
str w0, [sp, 248]
b .L220
.L230:
ldr s0, [sp, 272]
str s0, [sp, 348]
ldrsw x0, [sp, 248]
lsl x0, x0, 2
ldr x1, [sp, 128]
add x0, x1, x0
ldr s0, [x0]
str s0, [sp, 216]
ldrsw x0, [sp, 248]
lsl x0, x0, 2
ldr x1, [sp, 120]
add x0, x1, x0
ldr s0, [x0]
str s0, [sp, 220]
ldr s0, [sp, 216]
fcmpe s0, #0.0
bge .L258
b .L283
.L258:
ldr s1, [sp, 216]
b .L223
.L283:
ldr s0, [sp, 216]
fneg s1, s0
.L223:
ldr s0, [sp, 220]
fcmpe s0, #0.0
bge .L259
b .L284
.L259:
ldr s0, [sp, 220]
b .L226
.L284:
ldr s0, [sp, 220]
fneg s0, s0
.L226:
fadd s0, s1, s0
str s0, [sp, 352]
ldr s1, [sp, 348]
ldr s0, [sp, 352]
fcmpe s1, s0
bge .L260
b .L285
.L260:
ldr s0, [sp, 348]
b .L229
.L285:
ldr s0, [sp, 352]
.L229:
str s0, [sp, 272]
ldr w0, [sp, 248]
add w0, w0, 1
str w0, [sp, 248]
.L220:
ldr w0, [sp, 204]
ldr w1, [sp, 248]
cmp w1, w0
ble .L230
ldr s0, [sp, 272]
fmov s1, 1.0e+0
fdiv s0, s1, s0
str s0, [sp, 216]
ldr x0, [sp, 128]
add x2, x0, 4
add x1, sp, 216
adrp x0, c__1
add x3, x0, :lo12:c__1
ldr x0, [sp, 168]
bl sscal_
ldr s0, [sp, 272]
fmov s1, 1.0e+0
fdiv s0, s1, s0
str s0, [sp, 216]
ldr x0, [sp, 120]
add x2, x0, 4
add x1, sp, 216
adrp x0, c__1
add x3, x0, :lo12:c__1
ldr x0, [sp, 168]
bl sscal_
.L130:
mov w0, 0
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 376]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L232
bl __stack_chk_fail
.L232:
mov w0, w1
ldr d8, [sp, 48]
ldp x29, x30, [sp, 32]
add sp, sp, 384
.cfi_restore 29
.cfi_restore 30
.cfi_restore 72
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE21:
.size slaein_, .-slaein_
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.global a
.bss
.align 3
.type a, %object
.size a, 40
a:
.zero 40
.global length
.data
.align 2
.type length, %object
.size length, 4
length:
.word 10
.text
.align 2
.global max_a
.type max_a, %function
max_a:
.LFB0:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str x0, [sp, 8]
ldr x0, [sp, 8]
ldr w0, [x0]
str w0, [sp, 28]
str wzr, [sp, 24]
b .L2
.L4:
ldrsw x0, [sp, 24]
lsl x0, x0, 2
ldr x1, [sp, 8]
add x0, x1, x0
ldr w0, [x0]
ldr w1, [sp, 28]
cmp w1, w0
bge .L3
ldrsw x0, [sp, 24]
lsl x0, x0, 2
ldr x1, [sp, 8]
add x0, x1, x0
ldr w0, [x0]
str w0, [sp, 28]
.L3:
ldr w0, [sp, 24]
add w0, w0, 1
str w0, [sp, 24]
.L2:
adrp x0, length
add x0, x0, :lo12:length
ldr w0, [x0]
ldr w1, [sp, 24]
cmp w1, w0
blt .L4
ldr w0, [sp, 28]
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size max_a, .-max_a
.align 2
.global min_a
.type min_a, %function
min_a:
.LFB1:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str x0, [sp, 8]
ldr x0, [sp, 8]
ldr w0, [x0]
str w0, [sp, 28]
str wzr, [sp, 24]
b .L7
.L9:
ldrsw x0, [sp, 24]
lsl x0, x0, 2
ldr x1, [sp, 8]
add x0, x1, x0
ldr w0, [x0]
ldr w1, [sp, 28]
cmp w1, w0
ble .L8
ldrsw x0, [sp, 24]
lsl x0, x0, 2
ldr x1, [sp, 8]
add x0, x1, x0
ldr w0, [x0]
str w0, [sp, 28]
.L8:
ldr w0, [sp, 24]
add w0, w0, 1
str w0, [sp, 24]
.L7:
adrp x0, length
add x0, x0, :lo12:length
ldr w0, [x0]
ldr w1, [sp, 24]
cmp w1, w0
blt .L9
ldr w0, [sp, 28]
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE1:
.size min_a, .-min_a
.align 2
.global ave_a
.type ave_a, %function
ave_a:
.LFB2:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str x0, [sp, 8]
str wzr, [sp, 28]
str wzr, [sp, 24]
b .L12
.L13:
ldrsw x0, [sp, 24]
lsl x0, x0, 2
ldr x1, [sp, 8]
add x0, x1, x0
ldr s0, [x0]
scvtf s0, s0
ldr s1, [sp, 28]
fadd s0, s1, s0
str s0, [sp, 28]
ldr w0, [sp, 24]
add w0, w0, 1
str w0, [sp, 24]
.L12:
adrp x0, length
add x0, x0, :lo12:length
ldr w0, [x0]
ldr w1, [sp, 24]
cmp w1, w0
blt .L13
adrp x0, length
add x0, x0, :lo12:length
ldr s0, [x0]
scvtf s0, s0
ldr s1, [sp, 28]
fdiv s0, s1, s0
str s0, [sp, 28]
ldr s0, [sp, 28]
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE2:
.size ave_a, .-ave_a
.section .rodata
.align 3
.LC0:
.string "Please input 10 integers:"
.align 3
.LC1:
.string "%d"
.align 3
.LC2:
.string "max=%d,min=%d,average=%.2f\n"
.text
.align 2
.global main
.type main, %function
main:
.LFB3:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
stp x19, x20, [sp, 16]
.cfi_offset 19, -32
.cfi_offset 20, -24
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl puts
str wzr, [sp, 44]
b .L16
.L17:
ldrsw x0, [sp, 44]
lsl x1, x0, 2
adrp x0, a
add x0, x0, :lo12:a
add x0, x1, x0
mov x1, x0
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl __isoc99_scanf
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L16:
ldr w0, [sp, 44]
cmp w0, 9
ble .L17
adrp x0, a
add x0, x0, :lo12:a
bl max_a
mov w19, w0
adrp x0, a
add x0, x0, :lo12:a
bl min_a
mov w20, w0
adrp x0, a
add x0, x0, :lo12:a
bl ave_a
fcvt d0, s0
mov w2, w20
mov w1, w19
adrp x0, .LC2
add x0, x0, :lo12:.LC2
bl printf
mov w0, 0
ldp x19, x20, [sp, 16]
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_restore 19
.cfi_restore 20
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE3:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC0:
.string "%d"
.align 3
.LC1:
.string "Nije savrsen"
.align 3
.LC2:
.string "%u = %u^%u\n"
.text
.align 2
.global main
.type main, %function
main:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 40]
mov x1, 0
add x0, sp, 28
mov x1, x0
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl __isoc99_scanf
ldr w0, [sp, 28]
add x2, sp, 36
add x1, sp, 32
bl savrsen_stepen
cmp w0, 0
bne .L2
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl puts
b .L3
.L2:
ldr w0, [sp, 28]
ldr w1, [sp, 32]
ldr w2, [sp, 36]
mov w3, w2
mov w2, w1
mov w1, w0
adrp x0, .LC2
add x0, x0, :lo12:.LC2
bl printf
.L3:
mov w0, 0
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 40]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L5
bl __stack_chk_fail
.L5:
mov w0, w1
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC0:
.string "Amount on deposit"
.align 3
.LC1:
.string "Year"
.align 3
.LC2:
.string "%4s%21s\n"
.align 3
.LC3:
.string "%4d%21.2f\n"
.text
.align 2
.global main
.type main, %function
main:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
mov x0, 70368744177664
movk x0, 0x408f, lsl 48
fmov d0, x0
str d0, [sp, 24]
fmov d0, 5.0e-1
str d0, [sp, 32]
adrp x0, .LC0
add x2, x0, :lo12:.LC0
adrp x0, .LC1
add x1, x0, :lo12:.LC1
adrp x0, .LC2
add x0, x0, :lo12:.LC2
bl printf
mov w0, 1
str w0, [sp, 20]
b .L2
.L3:
ldr d1, [sp, 32]
fmov d0, 1.0e+0
fadd d0, d1, d0
ldr w0, [sp, 20]
scvtf d1, w0
bl pow
fmov d1, d0
ldr d0, [sp, 24]
fmul d0, d0, d1
str d0, [sp, 40]
ldr d0, [sp, 40]
ldr w1, [sp, 20]
adrp x0, .LC3
add x0, x0, :lo12:.LC3
bl printf
ldr w0, [sp, 20]
add w0, w0, 1
str w0, [sp, 20]
.L2:
ldr w0, [sp, 20]
cmp w0, 10
ble .L3
mov w0, 0
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC0:
.string "Enter text:"
.align 3
.LC1:
.string "%s%s%s"
.align 3
.LC2:
.string "\ns1 = %s\ns2 = %s\ns3 = %s\n"
.text
.align 2
.global main
.type main, %function
main:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -288]!
.cfi_def_cfa_offset 288
.cfi_offset 29, -288
.cfi_offset 30, -280
mov x29, sp
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 280]
mov x1, 0
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl puts
add x2, sp, 192
add x1, sp, 104
add x0, sp, 16
mov x3, x2
mov x2, x1
mov x1, x0
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl __isoc99_scanf
add x2, sp, 192
add x1, sp, 104
add x0, sp, 16
mov x3, x2
mov x2, x1
mov x1, x0
adrp x0, .LC2
add x0, x0, :lo12:.LC2
bl printf
mov w0, 0
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 280]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L3
bl __stack_chk_fail
.L3:
mov w0, w1
ldp x29, x30, [sp], 288
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global main
.type main, %function
main:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 40]
mov x1, 0
ldr x0, [sp, 32]
add x1, sp, 28
str x1, [x0]
mov w0, 0
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 40]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L3
bl __stack_chk_fail
.L3:
mov w0, w1
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.global arch
.data
.align 3
.type arch, %object
.size arch, 8
arch:
.string "PowerPC"
.global descr
.align 3
.type descr, %object
.size descr, 24
descr:
.word -1
.word 12582912
.word -1
.word -1
.word -1
.word 16384
.global buf
.bss
.align 3
.type buf, %object
.size buf, 512
buf:
.zero 512
.global elf_magic
.data
.align 3
.type elf_magic, %object
.size elf_magic, 4
elf_magic:
.ascii "\177ELF"
.section .rodata
.align 3
.LC0:
.string "Usage: %s elf-file\n"
.align 3
.LC1:
.string "read"
.align 3
.LC2:
.string "%s is not a big-endian 32-bit ELF image\n"
.align 3
.LC3:
.string "%s already has a note entry\n"
.align 3
.LC4:
.string "write"
.align 3
.LC5:
.string "%s: write truncated\n"
.align 3
.LC6:
.string "%s does not appear to be an ELF file\n"
.align 3
.LC7:
.string "sorry, I can't find space in %s to put the note\n"
.text
.align 2
.global main
.type main, %function
main:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str w0, [sp, 28]
str x1, [sp, 16]
ldr w0, [sp, 28]
cmp w0, 2
beq .L2
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x3, [x0]
ldr x0, [sp, 16]
ldr x0, [x0]
mov x2, x0
adrp x0, .LC0
add x1, x0, :lo12:.LC0
mov x0, x3
bl fprintf
mov w0, 1
bl exit
.L2:
ldr x0, [sp, 16]
add x0, x0, 8
ldr x0, [x0]
mov w1, 2
bl open
str w0, [sp, 40]
ldr w0, [sp, 40]
cmp w0, 0
bge .L3
ldr x0, [sp, 16]
add x0, x0, 8
ldr x0, [x0]
bl perror
mov w0, 1
bl exit
.L3:
adrp x0, arch
add x0, x0, :lo12:arch
bl strlen
add w0, w0, 37
str w0, [sp, 44]
mov x2, 512
adrp x0, buf
add x1, x0, :lo12:buf
ldr w0, [sp, 40]
bl read
str w0, [sp, 48]
ldr w0, [sp, 48]
cmp w0, 0
bge .L4
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl perror
mov w0, 1
bl exit
.L4:
ldr w0, [sp, 48]
cmp w0, 51
ble .L24
mov x2, 4
adrp x0, elf_magic
add x1, x0, :lo12:elf_magic
adrp x0, buf
add x0, x0, :lo12:buf
bl memcmp
cmp w0, 0
bne .L24
adrp x0, buf
add x0, x0, :lo12:buf
ldrb w0, [x0, 4]
cmp w0, 1
bne .L8
adrp x0, buf
add x0, x0, :lo12:buf
ldrb w0, [x0, 5]
cmp w0, 2
beq .L9
.L8:
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x3, [x0]
ldr x0, [sp, 16]
add x0, x0, 8
ldr x0, [x0]
mov x2, x0
adrp x0, .LC2
add x1, x0, :lo12:.LC2
mov x0, x3
bl fprintf
mov w0, 1
bl exit
.L9:
adrp x0, buf
add x0, x0, :lo12:buf
ldrb w0, [x0, 28]
lsl w0, w0, 8
adrp x1, buf
add x1, x1, :lo12:buf
ldrb w1, [x1, 29]
add w0, w0, w1
lsl w1, w0, 16
adrp x0, buf
add x0, x0, :lo12:buf
ldrb w0, [x0, 30]
lsl w0, w0, 8
adrp x2, buf
add x2, x2, :lo12:buf
ldrb w2, [x2, 31]
add w0, w0, w2
add w0, w1, w0
str w0, [sp, 36]
adrp x0, buf
add x0, x0, :lo12:buf
ldrb w0, [x0, 42]
lsl w0, w0, 8
adrp x1, buf
add x1, x1, :lo12:buf
ldrb w1, [x1, 43]
add w0, w0, w1
str w0, [sp, 52]
adrp x0, buf
add x0, x0, :lo12:buf
ldrb w0, [x0, 44]
lsl w0, w0, 8
adrp x1, buf
add x1, x1, :lo12:buf
ldrb w1, [x1, 45]
add w0, w0, w1
str w0, [sp, 56]
ldr w0, [sp, 36]
cmp w0, 51
ble .L25
ldr w0, [sp, 52]
cmp w0, 31
ble .L25
ldr w0, [sp, 56]
cmp w0, 0
ble .L25
ldr w0, [sp, 56]
add w1, w0, 1
ldr w0, [sp, 52]
mul w1, w1, w0
ldr w0, [sp, 36]
add w1, w1, w0
ldr w0, [sp, 44]
add w0, w1, w0
ldr w1, [sp, 48]
cmp w1, w0
blt .L26
str wzr, [sp, 32]
b .L14
.L16:
adrp x0, buf
add x1, x0, :lo12:buf
ldrsw x0, [sp, 36]
ldrb w0, [x1, x0]
lsl w0, w0, 8
ldr w1, [sp, 36]
add w3, w1, 1
adrp x1, buf
add x2, x1, :lo12:buf
sxtw x1, w3
ldrb w1, [x2, x1]
add w0, w0, w1
lsl w1, w0, 16
ldr w0, [sp, 36]
add w3, w0, 2
adrp x0, buf
add x2, x0, :lo12:buf
sxtw x0, w3
ldrb w0, [x2, x0]
lsl w0, w0, 8
ldr w2, [sp, 36]
add w4, w2, 3
adrp x2, buf
add x3, x2, :lo12:buf
sxtw x2, w4
ldrb w2, [x3, x2]
add w0, w0, w2
add w0, w1, w0
cmp w0, 4
bne .L15
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x3, [x0]
ldr x0, [sp, 16]
add x0, x0, 8
ldr x0, [x0]
mov x2, x0
adrp x0, .LC3
add x1, x0, :lo12:.LC3
mov x0, x3
bl fprintf
mov w0, 0
bl exit
.L15:
ldr w1, [sp, 36]
ldr w0, [sp, 52]
add w0, w1, w0
str w0, [sp, 36]
ldr w0, [sp, 32]
add w0, w0, 1
str w0, [sp, 32]
.L14:
ldr w1, [sp, 32]
ldr w0, [sp, 56]
cmp w1, w0
blt .L16
str wzr, [sp, 32]
b .L17
.L19:
ldr w1, [sp, 36]
ldr w0, [sp, 32]
add w2, w1, w0
adrp x0, buf
add x1, x0, :lo12:buf
sxtw x0, w2
ldrb w0, [x1, x0]
cmp w0, 0
bne .L27
ldr w0, [sp, 32]
add w0, w0, 1
str w0, [sp, 32]
.L17:
ldr w1, [sp, 52]
ldr w0, [sp, 44]
add w0, w1, w0
ldr w1, [sp, 32]
cmp w1, w0
blt .L19
ldr w1, [sp, 36]
ldr w0, [sp, 52]
add w0, w1, w0
str w0, [sp, 60]
adrp x0, buf
add x1, x0, :lo12:buf
ldrsw x0, [sp, 36]
strb wzr, [x1, x0]
ldr w0, [sp, 36]
add w2, w0, 1
adrp x0, buf
add x1, x0, :lo12:buf
sxtw x0, w2
strb wzr, [x1, x0]
ldr w0, [sp, 36]
add w2, w0, 2
adrp x0, buf
add x1, x0, :lo12:buf
sxtw x0, w2
strb wzr, [x1, x0]
ldr w0, [sp, 36]
add w2, w0, 3
adrp x0, buf
add x1, x0, :lo12:buf
sxtw x0, w2
mov w2, 4
strb w2, [x1, x0]
ldr w0, [sp, 60]
lsr w1, w0, 24
ldr w0, [sp, 36]
add w3, w0, 4
and w2, w1, 255
adrp x0, buf
add x1, x0, :lo12:buf
sxtw x0, w3
strb w2, [x1, x0]
ldr w0, [sp, 60]
asr w1, w0, 16
ldr w0, [sp, 36]
add w3, w0, 5
and w2, w1, 255
adrp x0, buf
add x1, x0, :lo12:buf
sxtw x0, w3
strb w2, [x1, x0]
ldr w0, [sp, 60]
asr w1, w0, 8
ldr w0, [sp, 36]
add w3, w0, 6
and w2, w1, 255
adrp x0, buf
add x1, x0, :lo12:buf
sxtw x0, w3
strb w2, [x1, x0]
ldr w0, [sp, 36]
add w3, w0, 7
ldr w0, [sp, 60]
and w2, w0, 255
adrp x0, buf
add x1, x0, :lo12:buf
sxtw x0, w3
strb w2, [x1, x0]
ldr w0, [sp, 44]
lsr w1, w0, 24
ldr w0, [sp, 36]
add w3, w0, 16
and w2, w1, 255
adrp x0, buf
add x1, x0, :lo12:buf
sxtw x0, w3
strb w2, [x1, x0]
ldr w0, [sp, 44]
asr w1, w0, 16
ldr w0, [sp, 36]
add w3, w0, 17
and w2, w1, 255
adrp x0, buf
add x1, x0, :lo12:buf
sxtw x0, w3
strb w2, [x1, x0]
ldr w0, [sp, 44]
asr w1, w0, 8
ldr w0, [sp, 36]
add w3, w0, 18
and w2, w1, 255
adrp x0, buf
add x1, x0, :lo12:buf
sxtw x0, w3
strb w2, [x1, x0]
ldr w0, [sp, 36]
add w3, w0, 19
ldr w0, [sp, 44]
and w2, w0, 255
adrp x0, buf
add x1, x0, :lo12:buf
sxtw x0, w3
strb w2, [x1, x0]
adrp x0, arch
add x0, x0, :lo12:arch
bl strlen
add x0, x0, 1
lsr x0, x0, 24
and w2, w0, 255
adrp x0, buf
add x1, x0, :lo12:buf
ldrsw x0, [sp, 60]
strb w2, [x1, x0]
adrp x0, arch
add x0, x0, :lo12:arch
bl strlen
add x0, x0, 1
lsr x1, x0, 16
ldr w0, [sp, 60]
add w3, w0, 1
and w2, w1, 255
adrp x0, buf
add x1, x0, :lo12:buf
sxtw x0, w3
strb w2, [x1, x0]
adrp x0, arch
add x0, x0, :lo12:arch
bl strlen
add x0, x0, 1
lsr x1, x0, 8
ldr w0, [sp, 60]
add w3, w0, 2
and w2, w1, 255
adrp x0, buf
add x1, x0, :lo12:buf
sxtw x0, w3
strb w2, [x1, x0]
adrp x0, arch
add x0, x0, :lo12:arch
bl strlen
and w0, w0, 255
ldr w1, [sp, 60]
add w3, w1, 3
add w0, w0, 1
and w2, w0, 255
adrp x0, buf
add x1, x0, :lo12:buf
sxtw x0, w3
strb w2, [x1, x0]
ldr w0, [sp, 60]
add w2, w0, 4
adrp x0, buf
add x1, x0, :lo12:buf
sxtw x0, w2
strb wzr, [x1, x0]
ldr w0, [sp, 60]
add w2, w0, 5
adrp x0, buf
add x1, x0, :lo12:buf
sxtw x0, w2
strb wzr, [x1, x0]
ldr w0, [sp, 60]
add w2, w0, 6
adrp x0, buf
add x1, x0, :lo12:buf
sxtw x0, w2
strb wzr, [x1, x0]
ldr w0, [sp, 60]
add w2, w0, 7
adrp x0, buf
add x1, x0, :lo12:buf
sxtw x0, w2
mov w2, 24
strb w2, [x1, x0]
ldr w0, [sp, 60]
add w2, w0, 8
adrp x0, buf
add x1, x0, :lo12:buf
sxtw x0, w2
strb wzr, [x1, x0]
ldr w0, [sp, 60]
add w2, w0, 9
adrp x0, buf
add x1, x0, :lo12:buf
sxtw x0, w2
strb wzr, [x1, x0]
ldr w0, [sp, 60]
add w2, w0, 10
adrp x0, buf
add x1, x0, :lo12:buf
sxtw x0, w2
mov w2, 18
strb w2, [x1, x0]
ldr w0, [sp, 60]
add w2, w0, 11
adrp x0, buf
add x1, x0, :lo12:buf
sxtw x0, w2
mov w2, 117
strb w2, [x1, x0]
ldr w0, [sp, 60]
add w0, w0, 12
sxtw x1, w0
adrp x0, buf
add x0, x0, :lo12:buf
add x2, x1, x0
adrp x0, arch
add x1, x0, :lo12:arch
mov x0, x2
bl strcpy
adrp x0, arch
add x0, x0, :lo12:arch
bl strlen
mov w1, w0
ldr w0, [sp, 60]
add w0, w1, w0
add w0, w0, 13
str w0, [sp, 60]
str wzr, [sp, 32]
b .L20
.L21:
adrp x0, descr
add x0, x0, :lo12:descr
ldrsw x1, [sp, 32]
ldr w0, [x0, x1, lsl 2]
lsr w2, w0, 24
ldr w0, [sp, 32]
lsl w1, w0, 2
ldr w0, [sp, 60]
add w3, w1, w0
and w2, w2, 255
adrp x0, buf
add x1, x0, :lo12:buf
sxtw x0, w3
strb w2, [x1, x0]
adrp x0, descr
add x0, x0, :lo12:descr
ldrsw x1, [sp, 32]
ldr w0, [x0, x1, lsl 2]
lsr w2, w0, 16
ldr w0, [sp, 32]
lsl w1, w0, 2
ldr w0, [sp, 60]
add w0, w1, w0
add w3, w0, 1
and w2, w2, 255
adrp x0, buf
add x1, x0, :lo12:buf
sxtw x0, w3
strb w2, [x1, x0]
adrp x0, descr
add x0, x0, :lo12:descr
ldrsw x1, [sp, 32]
ldr w0, [x0, x1, lsl 2]
lsr w2, w0, 8
ldr w0, [sp, 32]
lsl w1, w0, 2
ldr w0, [sp, 60]
add w0, w1, w0
add w3, w0, 2
and w2, w2, 255
adrp x0, buf
add x1, x0, :lo12:buf
sxtw x0, w3
strb w2, [x1, x0]
adrp x0, descr
add x0, x0, :lo12:descr
ldrsw x1, [sp, 32]
ldr w2, [x0, x1, lsl 2]
ldr w0, [sp, 32]
lsl w1, w0, 2
ldr w0, [sp, 60]
add w0, w1, w0
add w3, w0, 3
and w2, w2, 255
adrp x0, buf
add x1, x0, :lo12:buf
sxtw x0, w3
strb w2, [x1, x0]
ldr w0, [sp, 32]
add w0, w0, 1
str w0, [sp, 32]
.L20:
ldr w0, [sp, 32]
cmp w0, 5
ble .L21
ldr w0, [sp, 56]
add w0, w0, 1
asr w0, w0, 8
and w1, w0, 255
adrp x0, buf
add x0, x0, :lo12:buf
strb w1, [x0, 44]
ldr w0, [sp, 56]
and w0, w0, 255
add w0, w0, 1
and w1, w0, 255
adrp x0, buf
add x0, x0, :lo12:buf
strb w1, [x0, 45]
mov w2, 0
mov x1, 0
ldr w0, [sp, 40]
bl lseek
ldrsw x0, [sp, 48]
mov x2, x0
adrp x0, buf
add x1, x0, :lo12:buf
ldr w0, [sp, 40]
bl write
str w0, [sp, 32]
ldr w0, [sp, 32]
cmp w0, 0
bge .L22
adrp x0, .LC4
add x0, x0, :lo12:.LC4
bl perror
mov w0, 1
bl exit
.L22:
ldr w1, [sp, 32]
ldr w0, [sp, 48]
cmp w1, w0
bge .L23
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x3, [x0]
ldr x0, [sp, 16]
add x0, x0, 8
ldr x0, [x0]
mov x2, x0
adrp x0, .LC5
add x1, x0, :lo12:.LC5
mov x0, x3
bl fprintf
mov w0, 1
bl exit
.L23:
mov w0, 0
bl exit
.L24:
nop
b .L7
.L25:
nop
.L7:
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x3, [x0]
ldr x0, [sp, 16]
ldr x0, [x0]
mov x2, x0
adrp x0, .LC6
add x1, x0, :lo12:.LC6
mov x0, x3
bl fprintf
mov w0, 1
bl exit
.L26:
nop
b .L13
.L27:
nop
.L13:
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x3, [x0]
ldr x0, [sp, 16]
ldr x0, [x0]
mov x2, x0
adrp x0, .LC7
add x1, x0, :lo12:.LC7
mov x0, x3
bl fprintf
mov w0, 1
bl exit
.cfi_endproc
.LFE0:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC0:
.string "-"
.text
.align 2
.global ft_putnbr
.type ft_putnbr, %function
ft_putnbr:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str w0, [sp, 28]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 40]
mov x1, 0
ldr w0, [sp, 28]
cmp w0, 0
bge .L2
mov x2, 1
adrp x0, .LC0
add x1, x0, :lo12:.LC0
mov w0, 1
bl write
ldr w0, [sp, 28]
neg w0, w0
str w0, [sp, 36]
b .L3
.L2:
ldr w0, [sp, 28]
str w0, [sp, 36]
.L3:
ldr w0, [sp, 36]
cmp w0, 9
bhi .L4
ldr w0, [sp, 36]
and w0, w0, 255
add w0, w0, 48
and w0, w0, 255
strb w0, [sp, 35]
add x0, sp, 35
mov x2, 1
mov x1, x0
mov w0, 1
bl write
b .L7
.L4:
ldr w1, [sp, 36]
mov w0, 52429
movk w0, 0xcccc, lsl 16
umull x0, w1, w0
lsr x0, x0, 32
lsr w0, w0, 3
bl ft_putnbr
ldr w2, [sp, 36]
mov w0, 52429
movk w0, 0xcccc, lsl 16
umull x0, w2, w0
lsr x0, x0, 32
lsr w1, w0, 3
mov w0, w1
lsl w0, w0, 2
add w0, w0, w1
lsl w0, w0, 1
sub w1, w2, w0
and w0, w1, 255
add w0, w0, 48
and w0, w0, 255
strb w0, [sp, 35]
add x0, sp, 35
mov x2, 1
mov x1, x0
mov w0, 1
bl write
.L7:
nop
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [sp, 40]
ldr x1, [x0]
subs x2, x2, x1
mov x1, 0
beq .L6
bl __stack_chk_fail
.L6:
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size ft_putnbr, .-ft_putnbr
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global foo
.type foo, %function
foo:
.LFB0:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str w0, [sp, 12]
str w1, [sp, 8]
ldr w0, [sp, 12]
str w0, [sp, 28]
b .L2
.L3:
adrp x0, :got:b
ldr x0, [x0, #:got_lo12:b]
ldr x1, [x0]
adrp x0, :got:a
ldr x0, [x0, #:got_lo12:a]
ldr w0, [x0]
sxtw x0, w0
lsl x0, x0, 3
add x0, x1, x0
ldr x1, [x0]
ldrsw x0, [sp, 28]
lsl x0, x0, 3
add x0, x1, x0
ldr x1, [x0]
adrp x0, :got:b
ldr x0, [x0, #:got_lo12:b]
ldr x2, [x0]
adrp x0, :got:a
ldr x0, [x0, #:got_lo12:a]
ldr w0, [x0]
sxtw x0, w0
lsl x0, x0, 3
add x0, x2, x0
ldr x2, [x0]
ldrsw x0, [sp, 28]
lsl x0, x0, 3
add x0, x2, x0
ldr x0, [x0]
ldr w1, [x1]
str w1, [x0, 4]
ldr w0, [sp, 28]
add w0, w0, 1
str w0, [sp, 28]
.L2:
ldr w1, [sp, 28]
ldr w0, [sp, 8]
cmp w1, w0
ble .L3
nop
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size foo, .-foo
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global manip1
.type manip1, %function
manip1:
.LFB0:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str x0, [sp, 8]
ldr x0, [sp, 8]
add x0, x0, 4
str x0, [sp, 8]
nop
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size manip1, .-manip1
.align 2
.global manip2
.type manip2, %function
manip2:
.LFB1:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str x0, [sp, 8]
ldr x0, [sp, 8]
ldr w0, [x0]
add w1, w0, 1
ldr x0, [sp, 8]
str w1, [x0]
nop
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE1:
.size manip2, .-manip2
.section .rodata
.align 3
.LC0:
.string "(main) x = %d\n"
.align 3
.LC1:
.string "(main)x = %d\n"
.text
.align 2
.global main
.type main, %function
main:
.LFB2:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 24]
mov x1, 0
mov w0, 1
str w0, [sp, 20]
ldr w0, [sp, 20]
mov w1, w0
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl printf
add x0, sp, 20
bl manip2
ldr w0, [sp, 20]
mov w1, w0
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl printf
mov w0, 0
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 24]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L7
bl __stack_chk_fail
.L7:
mov w0, w1
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE2:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global read_regs
.type read_regs, %function
read_regs:
.LFB0:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str x0, [sp, 8]
str x1, [sp]
ldr x0, [sp, 8]
#APP
// 23 "program.c" 1
wstrd wR0, [x0]
// 0 "" 2
#NO_APP
ldr x0, [sp, 8]
add x0, x0, 8
#APP
// 24 "program.c" 1
wstrd wR1, [x0]
// 0 "" 2
#NO_APP
ldr x0, [sp, 8]
add x0, x0, 16
#APP
// 25 "program.c" 1
wstrd wR2, [x0]
// 0 "" 2
#NO_APP
ldr x0, [sp, 8]
add x0, x0, 24
#APP
// 26 "program.c" 1
wstrd wR3, [x0]
// 0 "" 2
#NO_APP
ldr x0, [sp, 8]
add x0, x0, 32
#APP
// 27 "program.c" 1
wstrd wR4, [x0]
// 0 "" 2
#NO_APP
ldr x0, [sp, 8]
add x0, x0, 40
#APP
// 28 "program.c" 1
wstrd wR5, [x0]
// 0 "" 2
#NO_APP
ldr x0, [sp, 8]
add x0, x0, 48
#APP
// 29 "program.c" 1
wstrd wR6, [x0]
// 0 "" 2
#NO_APP
ldr x0, [sp, 8]
add x0, x0, 56
#APP
// 30 "program.c" 1
wstrd wR7, [x0]
// 0 "" 2
#NO_APP
ldr x0, [sp, 8]
add x0, x0, 64
#APP
// 31 "program.c" 1
wstrd wR8, [x0]
// 0 "" 2
#NO_APP
ldr x0, [sp, 8]
add x0, x0, 72
#APP
// 32 "program.c" 1
wstrd wR9, [x0]
// 0 "" 2
#NO_APP
ldr x0, [sp, 8]
add x0, x0, 80
#APP
// 33 "program.c" 1
wstrd wR10, [x0]
// 0 "" 2
#NO_APP
ldr x0, [sp, 8]
add x0, x0, 88
#APP
// 34 "program.c" 1
wstrd wR11, [x0]
// 0 "" 2
#NO_APP
ldr x0, [sp, 8]
add x0, x0, 96
#APP
// 35 "program.c" 1
wstrd wR12, [x0]
// 0 "" 2
#NO_APP
ldr x0, [sp, 8]
add x0, x0, 104
#APP
// 36 "program.c" 1
wstrd wR13, [x0]
// 0 "" 2
#NO_APP
ldr x0, [sp, 8]
add x0, x0, 112
#APP
// 37 "program.c" 1
wstrd wR14, [x0]
// 0 "" 2
#NO_APP
ldr x0, [sp, 8]
add x0, x0, 120
#APP
// 38 "program.c" 1
wstrd wR15, [x0]
// 0 "" 2
#NO_APP
ldr x0, [sp]
#APP
// 40 "program.c" 1
wstrw wCSSF, [x0]
// 0 "" 2
#NO_APP
ldr x0, [sp]
add x0, x0, 8
#APP
// 41 "program.c" 1
wstrw wCASF, [x0]
// 0 "" 2
#NO_APP
ldr x0, [sp]
add x0, x0, 16
#APP
// 42 "program.c" 1
wstrw wCGR0, [x0]
// 0 "" 2
#NO_APP
ldr x0, [sp]
add x0, x0, 24
#APP
// 43 "program.c" 1
wstrw wCGR1, [x0]
// 0 "" 2
#NO_APP
ldr x0, [sp]
add x0, x0, 32
#APP
// 44 "program.c" 1
wstrw wCGR2, [x0]
// 0 "" 2
#NO_APP
ldr x0, [sp]
add x0, x0, 40
#APP
// 45 "program.c" 1
wstrw wCGR3, [x0]
// 0 "" 2
#NO_APP
nop
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size read_regs, .-read_regs
.align 2
.global write_regs
.type write_regs, %function
write_regs:
.LFB1:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str x0, [sp, 8]
str x1, [sp]
ldr x0, [sp, 8]
#APP
// 51 "program.c" 1
wldrd wR0, [x0]
// 0 "" 2
#NO_APP
ldr x0, [sp, 8]
add x0, x0, 8
#APP
// 52 "program.c" 1
wldrd wR1, [x0]
// 0 "" 2
#NO_APP
ldr x0, [sp, 8]
add x0, x0, 16
#APP
// 53 "program.c" 1
wldrd wR2, [x0]
// 0 "" 2
#NO_APP
ldr x0, [sp, 8]
add x0, x0, 24
#APP
// 54 "program.c" 1
wldrd wR3, [x0]
// 0 "" 2
#NO_APP
ldr x0, [sp, 8]
add x0, x0, 32
#APP
// 55 "program.c" 1
wldrd wR4, [x0]
// 0 "" 2
#NO_APP
ldr x0, [sp, 8]
add x0, x0, 40
#APP
// 56 "program.c" 1
wldrd wR5, [x0]
// 0 "" 2
#NO_APP
ldr x0, [sp, 8]
add x0, x0, 48
#APP
// 57 "program.c" 1
wldrd wR6, [x0]
// 0 "" 2
#NO_APP
ldr x0, [sp, 8]
add x0, x0, 56
#APP
// 58 "program.c" 1
wldrd wR7, [x0]
// 0 "" 2
#NO_APP
ldr x0, [sp, 8]
add x0, x0, 64
#APP
// 59 "program.c" 1
wldrd wR8, [x0]
// 0 "" 2
#NO_APP
ldr x0, [sp, 8]
add x0, x0, 72
#APP
// 60 "program.c" 1
wldrd wR9, [x0]
// 0 "" 2
#NO_APP
ldr x0, [sp, 8]
add x0, x0, 80
#APP
// 61 "program.c" 1
wldrd wR10, [x0]
// 0 "" 2
#NO_APP
ldr x0, [sp, 8]
add x0, x0, 88
#APP
// 62 "program.c" 1
wldrd wR11, [x0]
// 0 "" 2
#NO_APP
ldr x0, [sp, 8]
add x0, x0, 96
#APP
// 63 "program.c" 1
wldrd wR12, [x0]
// 0 "" 2
#NO_APP
ldr x0, [sp, 8]
add x0, x0, 104
#APP
// 64 "program.c" 1
wldrd wR13, [x0]
// 0 "" 2
#NO_APP
ldr x0, [sp, 8]
add x0, x0, 112
#APP
// 65 "program.c" 1
wldrd wR14, [x0]
// 0 "" 2
#NO_APP
ldr x0, [sp, 8]
add x0, x0, 120
#APP
// 66 "program.c" 1
wldrd wR15, [x0]
// 0 "" 2
#NO_APP
ldr x0, [sp]
#APP
// 68 "program.c" 1
wldrw wCSSF, [x0]
// 0 "" 2
#NO_APP
ldr x0, [sp]
add x0, x0, 8
#APP
// 69 "program.c" 1
wldrw wCASF, [x0]
// 0 "" 2
#NO_APP
ldr x0, [sp]
add x0, x0, 16
#APP
// 70 "program.c" 1
wldrw wCGR0, [x0]
// 0 "" 2
#NO_APP
ldr x0, [sp]
add x0, x0, 24
#APP
// 71 "program.c" 1
wldrw wCGR1, [x0]
// 0 "" 2
#NO_APP
ldr x0, [sp]
add x0, x0, 32
#APP
// 72 "program.c" 1
wldrw wCGR2, [x0]
// 0 "" 2
#NO_APP
ldr x0, [sp]
add x0, x0, 40
#APP
// 73 "program.c" 1
wldrw wCGR3, [x0]
// 0 "" 2
#NO_APP
nop
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE1:
.size write_regs, .-write_regs
.align 2
.global main
.type main, %function
main:
.LFB2:
.cfi_startproc
stp x29, x30, [sp, -208]!
.cfi_def_cfa_offset 208
.cfi_offset 29, -208
.cfi_offset 30, -200
mov x29, sp
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 200]
mov x1, 0
add x1, sp, 24
add x0, sp, 72
bl read_regs
add x1, sp, 24
add x0, sp, 72
bl write_regs
mov w0, 0
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 200]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L5
bl __stack_chk_fail
.L5:
mov w0, w1
ldp x29, x30, [sp], 208
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE2:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC1:
.string "\346\216\222\345\272\217\345\220\216\347\232\204\346\225\260\347\273\204\345\205\203\347\264\240\344\270\272\357\274\232"
.align 3
.LC2:
.string " %d "
.text
.align 2
.global main
.type main, %function
main:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -96]!
.cfi_def_cfa_offset 96
.cfi_offset 29, -96
.cfi_offset 30, -88
mov x29, sp
str w0, [sp, 28]
str x1, [sp, 16]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 88]
mov x1, 0
adrp x0, .LC0
add x1, x0, :lo12:.LC0
add x0, sp, 56
ldp q0, q1, [x1]
stp q0, q1, [x0]
mov w0, 1
str w0, [sp, 44]
b .L2
.L6:
mov w0, 1
str w0, [sp, 48]
b .L3
.L5:
ldrsw x0, [sp, 48]
lsl x0, x0, 2
add x1, sp, 56
ldr w1, [x1, x0]
ldr w0, [sp, 48]
add w0, w0, 1
sxtw x0, w0
lsl x0, x0, 2
add x2, sp, 56
ldr w0, [x2, x0]
cmp w1, w0
ble .L4
ldrsw x0, [sp, 48]
lsl x0, x0, 2
add x1, sp, 56
ldr w0, [x1, x0]
str w0, [sp, 52]
ldr w0, [sp, 48]
add w0, w0, 1
sxtw x0, w0
lsl x0, x0, 2
add x1, sp, 56
ldr w2, [x1, x0]
ldrsw x0, [sp, 48]
lsl x0, x0, 2
add x1, sp, 56
str w2, [x1, x0]
ldr w0, [sp, 48]
add w0, w0, 1
sxtw x0, w0
lsl x0, x0, 2
add x1, sp, 56
ldr w2, [sp, 52]
str w2, [x1, x0]
.L4:
ldr w0, [sp, 48]
add w0, w0, 1
str w0, [sp, 48]
.L3:
mov w1, 7
ldr w0, [sp, 44]
sub w0, w1, w0
ldr w1, [sp, 48]
cmp w1, w0
ble .L5
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L2:
ldr w0, [sp, 44]
cmp w0, 6
ble .L6
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl puts
mov w0, 1
str w0, [sp, 44]
b .L7
.L8:
ldrsw x0, [sp, 44]
lsl x0, x0, 2
add x1, sp, 56
ldr w0, [x1, x0]
mov w1, w0
adrp x0, .LC2
add x0, x0, :lo12:.LC2
bl printf
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L7:
ldr w0, [sp, 44]
cmp w0, 7
ble .L8
mov w0, 10
bl putchar
mov w0, 0
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 88]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L10
bl __stack_chk_fail
.L10:
mov w0, w1
ldp x29, x30, [sp], 96
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size main, .-main
.section .rodata
.align 3
.LC0:
.word 48
.word 37
.word 64
.word 97
.word 75
.word 12
.word 26
.word 49
.text
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.global str_side
.section .rodata
.align 3
.LC0:
.string "WHITE"
.align 3
.LC1:
.string "RED"
.align 3
.LC2:
.string "BLUE"
.align 3
.LC3:
.string "ORANGE"
.align 3
.LC4:
.string "GREEN"
.align 3
.LC5:
.string "YELLOW"
.section .data.rel.local,"aw"
.align 3
.type str_side, %object
.size str_side, 48
str_side:
.xword .LC0
.xword .LC1
.xword .LC2
.xword .LC3
.xword .LC4
.xword .LC5
.global str_direction
.section .rodata
.align 3
.LC6:
.string "CLOCKWISE"
.align 3
.LC7:
.string "!CLOCKWISE"
.section .data.rel.local
.align 3
.type str_direction, %object
.size str_direction, 16
str_direction:
.xword .LC6
.xword .LC7
.text
.align 2
.global opposite
.type opposite, %function
opposite:
.LFB6:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str w0, [sp, 12]
ldr w0, [sp, 12]
cmp w0, 5
beq .L2
ldr w0, [sp, 12]
cmp w0, 5
bgt .L3
ldr w0, [sp, 12]
cmp w0, 4
beq .L4
ldr w0, [sp, 12]
cmp w0, 4
bgt .L3
ldr w0, [sp, 12]
cmp w0, 3
beq .L5
ldr w0, [sp, 12]
cmp w0, 3
bgt .L3
ldr w0, [sp, 12]
cmp w0, 2
beq .L6
ldr w0, [sp, 12]
cmp w0, 2
bgt .L3
ldr w0, [sp, 12]
cmp w0, 0
beq .L7
ldr w0, [sp, 12]
cmp w0, 1
beq .L8
b .L3
.L7:
mov w0, 5
b .L1
.L8:
mov w0, 3
b .L1
.L6:
mov w0, 4
b .L1
.L5:
mov w0, 1
b .L1
.L4:
mov w0, 2
b .L1
.L2:
mov w0, 0
b .L1
.L3:
.L1:
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE6:
.size opposite, .-opposite
.align 2
.global rubix_color
.type rubix_color, %function
rubix_color:
.LFB7:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str w0, [sp, 12]
ldr w0, [sp, 12]
cmp w0, 5
beq .L11
ldr w0, [sp, 12]
cmp w0, 5
bgt .L12
ldr w0, [sp, 12]
cmp w0, 4
beq .L13
ldr w0, [sp, 12]
cmp w0, 4
bgt .L12
ldr w0, [sp, 12]
cmp w0, 3
beq .L14
ldr w0, [sp, 12]
cmp w0, 3
bgt .L12
ldr w0, [sp, 12]
cmp w0, 2
beq .L15
ldr w0, [sp, 12]
cmp w0, 2
bgt .L12
ldr w0, [sp, 12]
cmp w0, 0
beq .L16
ldr w0, [sp, 12]
cmp w0, 1
beq .L17
b .L12
.L16:
mov w0, 0
b .L10
.L17:
mov w0, 1
b .L10
.L15:
mov w0, 2
b .L10
.L14:
mov w0, 3
b .L10
.L13:
mov w0, 4
b .L10
.L11:
mov w0, 5
b .L10
.L12:
.L10:
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE7:
.size rubix_color, .-rubix_color
.align 2
.global char_color
.type char_color, %function
char_color:
.LFB8:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str w0, [sp, 12]
mov w0, 42
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE8:
.size char_color, .-char_color
.align 2
.global init_side
.type init_side, %function
init_side:
.LFB9:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str x0, [sp, 8]
str w1, [sp, 4]
str wzr, [sp, 24]
b .L22
.L25:
str wzr, [sp, 28]
b .L23
.L24:
ldrsw x1, [sp, 24]
mov x0, x1
lsl x0, x0, 1
add x0, x0, x1
lsl x0, x0, 2
mov x1, x0
ldr x0, [sp, 8]
add x0, x0, x1
ldrsw x1, [sp, 28]
ldr w2, [sp, 4]
str w2, [x0, x1, lsl 2]
ldr w0, [sp, 28]
add w0, w0, 1
str w0, [sp, 28]
.L23:
ldr w0, [sp, 28]
cmp w0, 2
ble .L24
ldr w0, [sp, 24]
add w0, w0, 1
str w0, [sp, 24]
.L22:
ldr w0, [sp, 24]
cmp w0, 2
ble .L25
nop
nop
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE9:
.size init_side, .-init_side
.align 2
.global init_siden
.type init_siden, %function
init_siden:
.LFB10:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str x0, [sp, 8]
str wzr, [sp, 24]
b .L27
.L30:
str wzr, [sp, 28]
b .L28
.L29:
ldr w1, [sp, 24]
mov w0, w1
lsl w0, w0, 1
add w1, w0, w1
ldr w0, [sp, 28]
add w2, w1, w0
ldrsw x1, [sp, 24]
mov x0, x1
lsl x0, x0, 1
add x0, x0, x1
lsl x0, x0, 2
mov x1, x0
ldr x0, [sp, 8]
add x0, x0, x1
add w2, w2, 1
ldrsw x1, [sp, 28]
str w2, [x0, x1, lsl 2]
ldr w0, [sp, 28]
add w0, w0, 1
str w0, [sp, 28]
.L28:
ldr w0, [sp, 28]
cmp w0, 2
ble .L29
ldr w0, [sp, 24]
add w0, w0, 1
str w0, [sp, 24]
.L27:
ldr w0, [sp, 24]
cmp w0, 2
ble .L30
nop
nop
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE10:
.size init_siden, .-init_siden
.align 2
.global init_cube
.type init_cube, %function
init_cube:
.LFB11:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
str wzr, [sp, 44]
b .L32
.L33:
ldrsw x1, [sp, 44]
mov x0, x1
lsl x0, x0, 3
add x0, x0, x1
lsl x0, x0, 2
mov x1, x0
ldr x0, [sp, 24]
add x0, x0, x1
ldr w1, [sp, 44]
bl init_side
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L32:
ldr w0, [sp, 44]
cmp w0, 5
ble .L33
nop
nop
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE11:
.size init_cube, .-init_cube
.section .rodata
.align 3
.LC8:
.string "%2i "
.text
.align 2
.global print_side1
.type print_side1, %function
print_side1:
.LFB12:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
str wzr, [sp, 40]
b .L35
.L38:
str wzr, [sp, 44]
b .L36
.L37:
ldrsw x1, [sp, 40]
mov x0, x1
lsl x0, x0, 1
add x0, x0, x1
lsl x0, x0, 2
mov x1, x0
ldr x0, [sp, 24]
add x0, x0, x1
ldrsw x1, [sp, 44]
ldr w0, [x0, x1, lsl 2]
mov w1, w0
adrp x0, .LC8
add x0, x0, :lo12:.LC8
bl printf
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L36:
ldr w0, [sp, 44]
cmp w0, 2
ble .L37
mov w0, 10
bl putchar
ldr w0, [sp, 40]
add w0, w0, 1
str w0, [sp, 40]
.L35:
ldr w0, [sp, 40]
cmp w0, 2
ble .L38
nop
nop
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE12:
.size print_side1, .-print_side1
.align 2
.global print_cube1
.type print_cube1, %function
print_cube1:
.LFB13:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
str wzr, [sp, 44]
b .L40
.L41:
ldrsw x1, [sp, 44]
mov x0, x1
lsl x0, x0, 3
add x0, x0, x1
lsl x0, x0, 2
mov x1, x0
ldr x0, [sp, 24]
add x0, x0, x1
bl print_side1
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L40:
ldr w0, [sp, 44]
cmp w0, 5
ble .L41
nop
nop
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE13:
.size print_cube1, .-print_cube1
.section .rodata
.align 3
.LC9:
.string "\033[43m%2c \033[0m"
.align 3
.LC10:
.string "\033[47m%2c \033[0m"
.align 3
.LC11:
.string "\033[41m%2c \033[0m"
.align 3
.LC12:
.string "\033[44m%2c \033[0m"
.align 3
.LC13:
.string "\033[45m%2c \033[0m"
.align 3
.LC14:
.string "\033[42m%2c \033[0m"
.text
.align 2
.global printf_colored
.type printf_colored, %function
printf_colored:
.LFB14:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str w0, [sp, 28]
ldr w0, [sp, 28]
bl rubix_color
cmp w0, 5
beq .L43
cmp w0, 5
bgt .L50
cmp w0, 4
beq .L45
cmp w0, 4
bgt .L50
cmp w0, 3
beq .L46
cmp w0, 3
bgt .L50
cmp w0, 2
beq .L47
cmp w0, 2
bgt .L50
cmp w0, 0
beq .L48
cmp w0, 1
beq .L49
b .L50
.L43:
ldr w0, [sp, 28]
bl char_color
and w0, w0, 255
mov w1, w0
adrp x0, .LC9
add x0, x0, :lo12:.LC9
bl printf
b .L44
.L48:
ldr w0, [sp, 28]
bl char_color
and w0, w0, 255
mov w1, w0
adrp x0, .LC10
add x0, x0, :lo12:.LC10
bl printf
b .L44
.L49:
ldr w0, [sp, 28]
bl char_color
and w0, w0, 255
mov w1, w0
adrp x0, .LC11
add x0, x0, :lo12:.LC11
bl printf
b .L44
.L47:
ldr w0, [sp, 28]
bl char_color
and w0, w0, 255
mov w1, w0
adrp x0, .LC12
add x0, x0, :lo12:.LC12
bl printf
b .L44
.L46:
ldr w0, [sp, 28]
bl char_color
and w0, w0, 255
mov w1, w0
adrp x0, .LC13
add x0, x0, :lo12:.LC13
bl printf
b .L44
.L45:
ldr w0, [sp, 28]
bl char_color
and w0, w0, 255
mov w1, w0
adrp x0, .LC14
add x0, x0, :lo12:.LC14
bl printf
nop
.L44:
.L50:
nop
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE14:
.size printf_colored, .-printf_colored
.section .rodata
.align 3
.LC15:
.string " "
.text
.align 2
.global print_side2
.type print_side2, %function
print_side2:
.LFB15:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
str wzr, [sp, 40]
b .L52
.L57:
str wzr, [sp, 44]
b .L53
.L54:
adrp x0, .LC15
add x0, x0, :lo12:.LC15
bl printf
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L53:
ldr w0, [sp, 44]
cmp w0, 2
ble .L54
str wzr, [sp, 44]
b .L55
.L56:
ldrsw x1, [sp, 40]
mov x0, x1
lsl x0, x0, 1
add x0, x0, x1
lsl x0, x0, 2
mov x1, x0
ldr x0, [sp, 24]
add x0, x0, x1
ldrsw x1, [sp, 44]
ldr w0, [x0, x1, lsl 2]
bl printf_colored
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L55:
ldr w0, [sp, 44]
cmp w0, 2
ble .L56
mov w0, 10
bl putchar
ldr w0, [sp, 40]
add w0, w0, 1
str w0, [sp, 40]
.L52:
ldr w0, [sp, 40]
cmp w0, 2
ble .L57
nop
nop
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE15:
.size print_side2, .-print_side2
.align 2
.global print_cube2
.type print_cube2, %function
print_cube2:
.LFB16:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
ldr x0, [sp, 24]
bl print_side2
str wzr, [sp, 36]
b .L59
.L64:
mov w0, 1
str w0, [sp, 44]
b .L60
.L63:
str wzr, [sp, 40]
b .L61
.L62:
ldrsw x1, [sp, 44]
mov x0, x1
lsl x0, x0, 3
add x0, x0, x1
lsl x0, x0, 2
mov x1, x0
ldr x0, [sp, 24]
add x2, x0, x1
ldrsw x3, [sp, 40]
ldrsw x1, [sp, 36]
mov x0, x1
lsl x0, x0, 1
add x0, x0, x1
add x0, x0, x3
ldr w0, [x2, x0, lsl 2]
bl printf_colored
ldr w0, [sp, 40]
add w0, w0, 1
str w0, [sp, 40]
.L61:
ldr w0, [sp, 40]
cmp w0, 2
ble .L62
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L60:
ldr w0, [sp, 44]
cmp w0, 4
ble .L63
mov w0, 10
bl putchar
ldr w0, [sp, 36]
add w0, w0, 1
str w0, [sp, 36]
.L59:
ldr w0, [sp, 36]
cmp w0, 2
ble .L64
ldr x0, [sp, 24]
add x0, x0, 180
bl print_side2
mov w0, 10
bl putchar
nop
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE16:
.size print_cube2, .-print_cube2
.align 2
.global swap
.type swap, %function
swap:
.LFB17:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str x0, [sp, 8]
str x1, [sp]
ldr x0, [sp, 8]
ldr w0, [x0]
str w0, [sp, 28]
ldr x0, [sp]
ldr w1, [x0]
ldr x0, [sp, 8]
str w1, [x0]
ldr x0, [sp]
ldr w1, [sp, 28]
str w1, [x0]
nop
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE17:
.size swap, .-swap
.align 2
.global rotate_side
.type rotate_side, %function
rotate_side:
.LFB18:
.cfi_startproc
stp x29, x30, [sp, -96]!
.cfi_def_cfa_offset 96
.cfi_offset 29, -96
.cfi_offset 30, -88
mov x29, sp
str x0, [sp, 24]
str w1, [sp, 20]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 88]
mov x1, 0
str wzr, [sp, 32]
b .L67
.L72:
str wzr, [sp, 36]
b .L68
.L71:
ldr w0, [sp, 20]
cmp w0, 1
bne .L69
ldr w0, [sp, 36]
str w0, [sp, 40]
mov w1, 2
ldr w0, [sp, 32]
sub w0, w1, w0
str w0, [sp, 44]
b .L70
.L69:
mov w1, 2
ldr w0, [sp, 36]
sub w0, w1, w0
str w0, [sp, 40]
ldr w0, [sp, 32]
str w0, [sp, 44]
.L70:
ldrsw x1, [sp, 32]
mov x0, x1
lsl x0, x0, 1
add x0, x0, x1
lsl x0, x0, 2
mov x1, x0
ldr x0, [sp, 24]
add x0, x0, x1
ldrsw x1, [sp, 36]
ldr w2, [x0, x1, lsl 2]
ldrsw x3, [sp, 44]
ldrsw x1, [sp, 40]
mov x0, x1
lsl x0, x0, 1
add x0, x0, x1
add x0, x0, x3
lsl x0, x0, 2
add x1, sp, 48
str w2, [x1, x0]
ldr w0, [sp, 36]
add w0, w0, 1
str w0, [sp, 36]
.L68:
ldr w0, [sp, 36]
cmp w0, 2
ble .L71
ldr w0, [sp, 32]
add w0, w0, 1
str w0, [sp, 32]
.L67:
ldr w0, [sp, 32]
cmp w0, 2
ble .L72
add x0, sp, 48
mov x2, 36
mov x1, x0
ldr x0, [sp, 24]
bl memcpy
nop
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [sp, 88]
ldr x1, [x0]
subs x2, x2, x1
mov x1, 0
beq .L73
bl __stack_chk_fail
.L73:
ldp x29, x30, [sp], 96
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE18:
.size rotate_side, .-rotate_side
.align 2
.global rotate_cube
.type rotate_cube, %function
rotate_cube:
.LFB19:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
str w1, [sp, 20]
str w2, [sp, 16]
ldrsw x1, [sp, 20]
mov x0, x1
lsl x0, x0, 3
add x0, x0, x1
lsl x0, x0, 2
mov x1, x0
ldr x0, [sp, 24]
add x0, x0, x1
ldr w1, [sp, 16]
bl rotate_side
ldr w0, [sp, 20]
cmp w0, 5
beq .L75
ldr w0, [sp, 20]
cmp w0, 5
bgt .L118
ldr w0, [sp, 20]
cmp w0, 4
beq .L77
ldr w0, [sp, 20]
cmp w0, 4
bgt .L118
ldr w0, [sp, 20]
cmp w0, 3
beq .L78
ldr w0, [sp, 20]
cmp w0, 3
bgt .L118
ldr w0, [sp, 20]
cmp w0, 2
beq .L79
ldr w0, [sp, 20]
cmp w0, 2
bgt .L118
ldr w0, [sp, 20]
cmp w0, 0
beq .L80
ldr w0, [sp, 20]
cmp w0, 1
beq .L81
b .L118
.L80:
ldr w0, [sp, 16]
cmp w0, 1
bne .L82
str wzr, [sp, 40]
b .L83
.L84:
ldr x0, [sp, 24]
add x0, x0, 36
ldrsw x1, [sp, 40]
ldr w0, [x0, x1, lsl 2]
str w0, [sp, 44]
ldr x0, [sp, 24]
add x1, x0, 72
ldr x0, [sp, 24]
add x0, x0, 36
ldrsw x2, [sp, 40]
ldr w2, [x1, x2, lsl 2]
ldrsw x1, [sp, 40]
str w2, [x0, x1, lsl 2]
ldr x0, [sp, 24]
add x1, x0, 108
ldr x0, [sp, 24]
add x0, x0, 72
ldrsw x2, [sp, 40]
ldr w2, [x1, x2, lsl 2]
ldrsw x1, [sp, 40]
str w2, [x0, x1, lsl 2]
ldr x0, [sp, 24]
add x1, x0, 144
ldr x0, [sp, 24]
add x0, x0, 108
ldrsw x2, [sp, 40]
ldr w2, [x1, x2, lsl 2]
ldrsw x1, [sp, 40]
str w2, [x0, x1, lsl 2]
ldr x0, [sp, 24]
add x0, x0, 144
ldrsw x1, [sp, 40]
ldr w2, [sp, 44]
str w2, [x0, x1, lsl 2]
ldr w0, [sp, 40]
add w0, w0, 1
str w0, [sp, 40]
.L83:
ldr w0, [sp, 40]
cmp w0, 2
ble .L84
b .L76
.L82:
str wzr, [sp, 40]
b .L86
.L87:
ldr x0, [sp, 24]
add x0, x0, 36
ldrsw x1, [sp, 40]
ldr w0, [x0, x1, lsl 2]
str w0, [sp, 44]
ldr x0, [sp, 24]
add x1, x0, 144
ldr x0, [sp, 24]
add x0, x0, 36
ldrsw x2, [sp, 40]
ldr w2, [x1, x2, lsl 2]
ldrsw x1, [sp, 40]
str w2, [x0, x1, lsl 2]
ldr x0, [sp, 24]
add x1, x0, 108
ldr x0, [sp, 24]
add x0, x0, 144
ldrsw x2, [sp, 40]
ldr w2, [x1, x2, lsl 2]
ldrsw x1, [sp, 40]
str w2, [x0, x1, lsl 2]
ldr x0, [sp, 24]
add x1, x0, 72
ldr x0, [sp, 24]
add x0, x0, 108
ldrsw x2, [sp, 40]
ldr w2, [x1, x2, lsl 2]
ldrsw x1, [sp, 40]
str w2, [x0, x1, lsl 2]
ldr x0, [sp, 24]
add x0, x0, 72
ldrsw x1, [sp, 40]
ldr w2, [sp, 44]
str w2, [x0, x1, lsl 2]
ldr w0, [sp, 40]
add w0, w0, 1
str w0, [sp, 40]
.L86:
ldr w0, [sp, 40]
cmp w0, 2
ble .L87
b .L76
.L81:
ldr w0, [sp, 16]
cmp w0, 1
bne .L88
str wzr, [sp, 40]
b .L89
.L90:
ldr x0, [sp, 24]
add x2, x0, 72
ldrsw x1, [sp, 40]
mov x0, x1
lsl x0, x0, 1
add x0, x0, x1
lsl x0, x0, 2
add x0, x2, x0
ldr w0, [x0]
str w0, [sp, 44]
ldr x0, [sp, 24]
add x3, x0, 72
ldr x2, [sp, 24]
ldrsw x1, [sp, 40]
mov x0, x1
lsl x0, x0, 1
add x0, x0, x1
lsl x0, x0, 2
add x0, x2, x0
ldr w2, [x0]
ldrsw x1, [sp, 40]
mov x0, x1
lsl x0, x0, 1
add x0, x0, x1
lsl x0, x0, 2
add x0, x3, x0
str w2, [x0]
ldr x0, [sp, 24]
add x2, x0, 144
mov w1, 2
ldr w0, [sp, 40]
sub w0, w1, w0
sxtw x1, w0
mov x0, x1
lsl x0, x0, 1
add x0, x0, x1
lsl x0, x0, 2
add x0, x2, x0
ldr w2, [x0, 8]
ldr x3, [sp, 24]
ldrsw x1, [sp, 40]
mov x0, x1
lsl x0, x0, 1
add x0, x0, x1
lsl x0, x0, 2
add x0, x3, x0
str w2, [x0]
ldr x0, [sp, 24]
add x2, x0, 180
ldr x0, [sp, 24]
add x3, x0, 144
mov w1, 2
ldr w0, [sp, 40]
sub w4, w1, w0
ldrsw x1, [sp, 40]
mov x0, x1
lsl x0, x0, 1
add x0, x0, x1
lsl x0, x0, 2
add x0, x2, x0
ldr w2, [x0]
sxtw x1, w4
mov x0, x1
lsl x0, x0, 1
add x0, x0, x1
lsl x0, x0, 2
add x0, x3, x0
str w2, [x0, 8]
ldr x0, [sp, 24]
add x2, x0, 180
ldrsw x1, [sp, 40]
mov x0, x1
lsl x0, x0, 1
add x0, x0, x1
lsl x0, x0, 2
add x0, x2, x0
ldr w1, [sp, 44]
str w1, [x0]
ldr w0, [sp, 40]
add w0, w0, 1
str w0, [sp, 40]
.L89:
ldr w0, [sp, 40]
cmp w0, 2
ble .L90
b .L76
.L88:
str wzr, [sp, 40]
b .L92
.L93:
ldr x0, [sp, 24]
add x2, x0, 72
ldrsw x1, [sp, 40]
mov x0, x1
lsl x0, x0, 1
add x0, x0, x1
lsl x0, x0, 2
add x0, x2, x0
ldr w0, [x0]
str w0, [sp, 44]
ldr x0, [sp, 24]
add x2, x0, 180
ldr x0, [sp, 24]
add x3, x0, 72
ldrsw x1, [sp, 40]
mov x0, x1
lsl x0, x0, 1
add x0, x0, x1
lsl x0, x0, 2
add x0, x2, x0
ldr w2, [x0]
ldrsw x1, [sp, 40]
mov x0, x1
lsl x0, x0, 1
add x0, x0, x1
lsl x0, x0, 2
add x0, x3, x0
str w2, [x0]
ldr x0, [sp, 24]
add x2, x0, 144
mov w1, 2
ldr w0, [sp, 40]
sub w1, w1, w0
ldr x0, [sp, 24]
add x3, x0, 180
sxtw x1, w1
mov x0, x1
lsl x0, x0, 1
add x0, x0, x1
lsl x0, x0, 2
add x0, x2, x0
ldr w2, [x0, 8]
ldrsw x1, [sp, 40]
mov x0, x1
lsl x0, x0, 1
add x0, x0, x1
lsl x0, x0, 2
add x0, x3, x0
str w2, [x0]
ldr x0, [sp, 24]
add x3, x0, 144
mov w1, 2
ldr w0, [sp, 40]
sub w4, w1, w0
ldr x2, [sp, 24]
ldrsw x1, [sp, 40]
mov x0, x1
lsl x0, x0, 1
add x0, x0, x1
lsl x0, x0, 2
add x0, x2, x0
ldr w2, [x0]
sxtw x1, w4
mov x0, x1
lsl x0, x0, 1
add x0, x0, x1
lsl x0, x0, 2
add x0, x3, x0
str w2, [x0, 8]
ldr x2, [sp, 24]
ldrsw x1, [sp, 40]
mov x0, x1
lsl x0, x0, 1
add x0, x0, x1
lsl x0, x0, 2
add x0, x2, x0
ldr w1, [sp, 44]
str w1, [x0]
ldr w0, [sp, 40]
add w0, w0, 1
str w0, [sp, 40]
.L92:
ldr w0, [sp, 40]
cmp w0, 2
ble .L93
b .L76
.L79:
ldr w0, [sp, 16]
cmp w0, 1
bne .L94
str wzr, [sp, 40]
b .L95
.L96:
ldr x0, [sp, 24]
add x2, x0, 108
ldrsw x1, [sp, 40]
mov x0, x1
lsl x0, x0, 1
add x0, x0, x1
lsl x0, x0, 2
add x0, x2, x0
ldr w0, [x0]
str w0, [sp, 44]
ldr x0, [sp, 24]
add x3, x0, 108
ldr x0, [sp, 24]
ldrsw x1, [sp, 40]
add x1, x1, 6
ldr w2, [x0, x1, lsl 2]
ldrsw x1, [sp, 40]
mov x0, x1
lsl x0, x0, 1
add x0, x0, x1
lsl x0, x0, 2
add x0, x3, x0
str w2, [x0]
ldr x0, [sp, 24]
add x2, x0, 36
mov w1, 2
ldr w0, [sp, 40]
sub w0, w1, w0
sxtw x1, w0
mov x0, x1
lsl x0, x0, 1
add x0, x0, x1
lsl x0, x0, 2
add x0, x2, x0
ldr w2, [x0, 8]
ldr x0, [sp, 24]
ldrsw x1, [sp, 40]
add x1, x1, 6
str w2, [x0, x1, lsl 2]
ldr x0, [sp, 24]
add x0, x0, 180
mov w2, 2
ldr w1, [sp, 40]
sub w5, w2, w1
ldr x1, [sp, 24]
add x3, x1, 36
mov w2, 2
ldr w1, [sp, 40]
sub w4, w2, w1
sxtw x1, w5
ldr w2, [x0, x1, lsl 2]
sxtw x1, w4
mov x0, x1
lsl x0, x0, 1
add x0, x0, x1
lsl x0, x0, 2
add x0, x3, x0
str w2, [x0, 8]
ldr x0, [sp, 24]
add x0, x0, 180
mov w2, 2
ldr w1, [sp, 40]
sub w1, w2, w1
sxtw x1, w1
ldr w2, [sp, 44]
str w2, [x0, x1, lsl 2]
ldr w0, [sp, 40]
add w0, w0, 1
str w0, [sp, 40]
.L95:
ldr w0, [sp, 40]
cmp w0, 2
ble .L96
b .L76
.L94:
str wzr, [sp, 40]
b .L98
.L99:
ldr x0, [sp, 24]
add x2, x0, 108
ldrsw x1, [sp, 40]
mov x0, x1
lsl x0, x0, 1
add x0, x0, x1
lsl x0, x0, 2
add x0, x2, x0
ldr w0, [x0]
str w0, [sp, 44]
ldr x0, [sp, 24]
add x0, x0, 180
mov w2, 2
ldr w1, [sp, 40]
sub w2, w2, w1
ldr x1, [sp, 24]
add x3, x1, 108
sxtw x1, w2
ldr w2, [x0, x1, lsl 2]
ldrsw x1, [sp, 40]
mov x0, x1
lsl x0, x0, 1
add x0, x0, x1
lsl x0, x0, 2
add x0, x3, x0
str w2, [x0]
ldr x0, [sp, 24]
add x3, x0, 36
mov w1, 2
ldr w0, [sp, 40]
sub w5, w1, w0
ldr x0, [sp, 24]
add x2, x0, 180
mov w1, 2
ldr w0, [sp, 40]
sub w4, w1, w0
sxtw x1, w5
mov x0, x1
lsl x0, x0, 1
add x0, x0, x1
lsl x0, x0, 2
add x0, x3, x0
ldr w1, [x0, 8]
sxtw x0, w4
str w1, [x2, x0, lsl 2]
ldr x0, [sp, 24]
add x3, x0, 36
mov w1, 2
ldr w0, [sp, 40]
sub w4, w1, w0
ldr x0, [sp, 24]
ldrsw x1, [sp, 40]
add x1, x1, 6
ldr w2, [x0, x1, lsl 2]
sxtw x1, w4
mov x0, x1
lsl x0, x0, 1
add x0, x0, x1
lsl x0, x0, 2
add x0, x3, x0
str w2, [x0, 8]
ldr x0, [sp, 24]
ldrsw x1, [sp, 40]
add x1, x1, 6
ldr w2, [sp, 44]
str w2, [x0, x1, lsl 2]
ldr w0, [sp, 40]
add w0, w0, 1
str w0, [sp, 40]
.L98:
ldr w0, [sp, 40]
cmp w0, 2
ble .L99
b .L76
.L78:
ldr w0, [sp, 16]
cmp w0, 1
bne .L100
str wzr, [sp, 40]
b .L101
.L102:
ldr x0, [sp, 24]
add x2, x0, 144
ldrsw x1, [sp, 40]
mov x0, x1
lsl x0, x0, 1
add x0, x0, x1
lsl x0, x0, 2
add x0, x2, x0
ldr w0, [x0]
str w0, [sp, 44]
mov w1, 2
ldr w0, [sp, 40]
sub w1, w1, w0
ldr x0, [sp, 24]
add x3, x0, 144
ldr x2, [sp, 24]
sxtw x1, w1
mov x0, x1
lsl x0, x0, 1
add x0, x0, x1
lsl x0, x0, 2
add x0, x2, x0
ldr w2, [x0, 8]
ldrsw x1, [sp, 40]
mov x0, x1
lsl x0, x0, 1
add x0, x0, x1
lsl x0, x0, 2
add x0, x3, x0
str w2, [x0]
ldr x0, [sp, 24]
add x2, x0, 72
mov w1, 2
ldr w0, [sp, 40]
sub w3, w1, w0
mov w1, 2
ldr w0, [sp, 40]
sub w4, w1, w0
sxtw x1, w3
mov x0, x1
lsl x0, x0, 1
add x0, x0, x1
lsl x0, x0, 2
add x0, x2, x0
ldr w2, [x0, 8]
ldr x3, [sp, 24]
sxtw x1, w4
mov x0, x1
lsl x0, x0, 1
add x0, x0, x1
lsl x0, x0, 2
add x0, x3, x0
str w2, [x0, 8]
ldr x0, [sp, 24]
add x2, x0, 180
mov w1, 2
ldr w0, [sp, 40]
sub w5, w1, w0
ldr x0, [sp, 24]
add x3, x0, 72
mov w1, 2
ldr w0, [sp, 40]
sub w4, w1, w0
sxtw x1, w5
mov x0, x1
lsl x0, x0, 1
add x0, x0, x1
lsl x0, x0, 2
add x0, x2, x0
ldr w2, [x0, 8]
sxtw x1, w4
mov x0, x1
lsl x0, x0, 1
add x0, x0, x1
lsl x0, x0, 2
add x0, x3, x0
str w2, [x0, 8]
ldr x0, [sp, 24]
add x2, x0, 180
mov w1, 2
ldr w0, [sp, 40]
sub w0, w1, w0
sxtw x1, w0
mov x0, x1
lsl x0, x0, 1
add x0, x0, x1
lsl x0, x0, 2
add x0, x2, x0
ldr w1, [sp, 44]
str w1, [x0, 8]
ldr w0, [sp, 40]
add w0, w0, 1
str w0, [sp, 40]
.L101:
ldr w0, [sp, 40]
cmp w0, 2
ble .L102
b .L76
.L100:
str wzr, [sp, 40]
b .L104
.L105:
ldr x0, [sp, 24]
add x2, x0, 144
ldrsw x1, [sp, 40]
mov x0, x1
lsl x0, x0, 1
add x0, x0, x1
lsl x0, x0, 2
add x0, x2, x0
ldr w0, [x0]
str w0, [sp, 44]
ldr x0, [sp, 24]
add x2, x0, 180
mov w1, 2
ldr w0, [sp, 40]
sub w1, w1, w0
ldr x0, [sp, 24]
add x3, x0, 144
sxtw x1, w1
mov x0, x1
lsl x0, x0, 1
add x0, x0, x1
lsl x0, x0, 2
add x0, x2, x0
ldr w2, [x0, 8]
ldrsw x1, [sp, 40]
mov x0, x1
lsl x0, x0, 1
add x0, x0, x1
lsl x0, x0, 2
add x0, x3, x0
str w2, [x0]
ldr x0, [sp, 24]
add x2, x0, 72
mov w1, 2
ldr w0, [sp, 40]
sub w5, w1, w0
ldr x0, [sp, 24]
add x3, x0, 180
mov w1, 2
ldr w0, [sp, 40]
sub w4, w1, w0
sxtw x1, w5
mov x0, x1
lsl x0, x0, 1
add x0, x0, x1
lsl x0, x0, 2
add x0, x2, x0
ldr w2, [x0, 8]
sxtw x1, w4
mov x0, x1
lsl x0, x0, 1
add x0, x0, x1
lsl x0, x0, 2
add x0, x3, x0
str w2, [x0, 8]
mov w1, 2
ldr w0, [sp, 40]
sub w5, w1, w0
ldr x0, [sp, 24]
add x3, x0, 72
mov w1, 2
ldr w0, [sp, 40]
sub w4, w1, w0
ldr x2, [sp, 24]
sxtw x1, w5
mov x0, x1
lsl x0, x0, 1
add x0, x0, x1
lsl x0, x0, 2
add x0, x2, x0
ldr w2, [x0, 8]
sxtw x1, w4
mov x0, x1
lsl x0, x0, 1
add x0, x0, x1
lsl x0, x0, 2
add x0, x3, x0
str w2, [x0, 8]
mov w1, 2
ldr w0, [sp, 40]
sub w0, w1, w0
ldr x2, [sp, 24]
sxtw x1, w0
mov x0, x1
lsl x0, x0, 1
add x0, x0, x1
lsl x0, x0, 2
add x0, x2, x0
ldr w1, [sp, 44]
str w1, [x0, 8]
ldr w0, [sp, 40]
add w0, w0, 1
str w0, [sp, 40]
.L104:
ldr w0, [sp, 40]
cmp w0, 2
ble .L105
b .L76
.L77:
ldr w0, [sp, 16]
cmp w0, 1
bne .L106
str wzr, [sp, 40]
b .L107
.L108:
ldr x0, [sp, 24]
add x2, x0, 36
ldrsw x1, [sp, 40]
mov x0, x1
lsl x0, x0, 1
add x0, x0, x1
lsl x0, x0, 2
add x0, x2, x0
ldr w0, [x0]
str w0, [sp, 44]
mov w1, 2
ldr w0, [sp, 40]
sub w1, w1, w0
ldr x0, [sp, 24]
add x3, x0, 36
ldr x0, [sp, 24]
sxtw x1, w1
ldr w2, [x0, x1, lsl 2]
ldrsw x1, [sp, 40]
mov x0, x1
lsl x0, x0, 1
add x0, x0, x1
lsl x0, x0, 2
add x0, x3, x0
str w2, [x0]
ldr x0, [sp, 24]
add x2, x0, 108
mov w1, 2
ldr w0, [sp, 40]
sub w4, w1, w0
mov w1, 2
ldr w0, [sp, 40]
sub w3, w1, w0
sxtw x1, w4
mov x0, x1
lsl x0, x0, 1
add x0, x0, x1
lsl x0, x0, 2
add x0, x2, x0
ldr w2, [x0, 8]
ldr x0, [sp, 24]
sxtw x1, w3
str w2, [x0, x1, lsl 2]
ldr x0, [sp, 24]
add x0, x0, 180
ldr x1, [sp, 24]
add x3, x1, 108
mov w2, 2
ldr w1, [sp, 40]
sub w4, w2, w1
ldrsw x1, [sp, 40]
add x1, x1, 6
ldr w2, [x0, x1, lsl 2]
sxtw x1, w4
mov x0, x1
lsl x0, x0, 1
add x0, x0, x1
lsl x0, x0, 2
add x0, x3, x0
str w2, [x0, 8]
ldr x0, [sp, 24]
add x0, x0, 180
ldrsw x1, [sp, 40]
add x1, x1, 6
ldr w2, [sp, 44]
str w2, [x0, x1, lsl 2]
ldr w0, [sp, 40]
add w0, w0, 1
str w0, [sp, 40]
.L107:
ldr w0, [sp, 40]
cmp w0, 2
ble .L108
b .L76
.L106:
str wzr, [sp, 40]
b .L110
.L111:
ldr x0, [sp, 24]
add x2, x0, 36
ldrsw x1, [sp, 40]
mov x0, x1
lsl x0, x0, 1
add x0, x0, x1
lsl x0, x0, 2
add x0, x2, x0
ldr w0, [x0]
str w0, [sp, 44]
ldr x0, [sp, 24]
add x0, x0, 180
ldr x1, [sp, 24]
add x3, x1, 36
ldrsw x1, [sp, 40]
add x1, x1, 6
ldr w2, [x0, x1, lsl 2]
ldrsw x1, [sp, 40]
mov x0, x1
lsl x0, x0, 1
add x0, x0, x1
lsl x0, x0, 2
add x0, x3, x0
str w2, [x0]
ldr x0, [sp, 24]
add x3, x0, 108
mov w1, 2
ldr w0, [sp, 40]
sub w1, w1, w0
ldr x0, [sp, 24]
add x2, x0, 180
sxtw x1, w1
mov x0, x1
lsl x0, x0, 1
add x0, x0, x1
lsl x0, x0, 2
add x0, x3, x0
ldr w1, [x0, 8]
ldrsw x0, [sp, 40]
add x0, x0, 6
str w1, [x2, x0, lsl 2]
mov w1, 2
ldr w0, [sp, 40]
sub w2, w1, w0
ldr x0, [sp, 24]
add x3, x0, 108
mov w1, 2
ldr w0, [sp, 40]
sub w4, w1, w0
ldr x0, [sp, 24]
sxtw x1, w2
ldr w2, [x0, x1, lsl 2]
sxtw x1, w4
mov x0, x1
lsl x0, x0, 1
add x0, x0, x1
lsl x0, x0, 2
add x0, x3, x0
str w2, [x0, 8]
mov w1, 2
ldr w0, [sp, 40]
sub w1, w1, w0
ldr x0, [sp, 24]
sxtw x1, w1
ldr w2, [sp, 44]
str w2, [x0, x1, lsl 2]
ldr w0, [sp, 40]
add w0, w0, 1
str w0, [sp, 40]
.L110:
ldr w0, [sp, 40]
cmp w0, 2
ble .L111
b .L76
.L75:
ldr w0, [sp, 16]
cmp w0, 1
bne .L112
str wzr, [sp, 40]
b .L113
.L114:
ldr x0, [sp, 24]
add x0, x0, 36
ldrsw x1, [sp, 40]
add x1, x1, 6
ldr w0, [x0, x1, lsl 2]
str w0, [sp, 44]
ldr x0, [sp, 24]
add x1, x0, 144
ldr x0, [sp, 24]
add x0, x0, 36
ldrsw x2, [sp, 40]
add x2, x2, 6
ldr w2, [x1, x2, lsl 2]
ldrsw x1, [sp, 40]
add x1, x1, 6
str w2, [x0, x1, lsl 2]
ldr x0, [sp, 24]
add x1, x0, 108
ldr x0, [sp, 24]
add x0, x0, 144
ldrsw x2, [sp, 40]
add x2, x2, 6
ldr w2, [x1, x2, lsl 2]
ldrsw x1, [sp, 40]
add x1, x1, 6
str w2, [x0, x1, lsl 2]
ldr x0, [sp, 24]
add x1, x0, 72
ldr x0, [sp, 24]
add x0, x0, 108
ldrsw x2, [sp, 40]
add x2, x2, 6
ldr w2, [x1, x2, lsl 2]
ldrsw x1, [sp, 40]
add x1, x1, 6
str w2, [x0, x1, lsl 2]
ldr x0, [sp, 24]
add x0, x0, 72
ldrsw x1, [sp, 40]
add x1, x1, 6
ldr w2, [sp, 44]
str w2, [x0, x1, lsl 2]
ldr w0, [sp, 40]
add w0, w0, 1
str w0, [sp, 40]
.L113:
ldr w0, [sp, 40]
cmp w0, 2
ble .L114
b .L119
.L112:
str wzr, [sp, 40]
b .L116
.L117:
ldr x0, [sp, 24]
add x0, x0, 36
ldrsw x1, [sp, 40]
add x1, x1, 6
ldr w0, [x0, x1, lsl 2]
str w0, [sp, 44]
ldr x0, [sp, 24]
add x1, x0, 72
ldr x0, [sp, 24]
add x0, x0, 36
ldrsw x2, [sp, 40]
add x2, x2, 6
ldr w2, [x1, x2, lsl 2]
ldrsw x1, [sp, 40]
add x1, x1, 6
str w2, [x0, x1, lsl 2]
ldr x0, [sp, 24]
add x1, x0, 108
ldr x0, [sp, 24]
add x0, x0, 72
ldrsw x2, [sp, 40]
add x2, x2, 6
ldr w2, [x1, x2, lsl 2]
ldrsw x1, [sp, 40]
add x1, x1, 6
str w2, [x0, x1, lsl 2]
ldr x0, [sp, 24]
add x1, x0, 144
ldr x0, [sp, 24]
add x0, x0, 108
ldrsw x2, [sp, 40]
add x2, x2, 6
ldr w2, [x1, x2, lsl 2]
ldrsw x1, [sp, 40]
add x1, x1, 6
str w2, [x0, x1, lsl 2]
ldr x0, [sp, 24]
add x0, x0, 144
ldrsw x1, [sp, 40]
add x1, x1, 6
ldr w2, [sp, 44]
str w2, [x0, x1, lsl 2]
ldr w0, [sp, 40]
add w0, w0, 1
str w0, [sp, 40]
.L116:
ldr w0, [sp, 40]
cmp w0, 2
ble .L117
.L119:
nop
.L76:
.L118:
nop
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE19:
.size rotate_cube, .-rotate_cube
.align 2
.global print_cube
.type print_cube, %function
print_cube:
.LFB20:
.cfi_startproc
stp x29, x30, [sp, -96]!
.cfi_def_cfa_offset 96
.cfi_offset 29, -96
.cfi_offset 30, -88
mov x29, sp
str x0, [sp, 24]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 88]
mov x1, 0
str wzr, [sp, 40]
b .L121
.L126:
str wzr, [sp, 44]
b .L122
.L123:
adrp x0, .LC15
add x0, x0, :lo12:.LC15
bl printf
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L122:
ldr w0, [sp, 44]
cmp w0, 2
ble .L123
str wzr, [sp, 44]
b .L124
.L125:
ldr x2, [sp, 24]
ldrsw x3, [sp, 44]
ldrsw x1, [sp, 40]
mov x0, x1
lsl x0, x0, 1
add x0, x0, x1
add x0, x0, x3
ldr w0, [x2, x0, lsl 2]
bl printf_colored
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L124:
ldr w0, [sp, 44]
cmp w0, 2
ble .L125
mov w0, 10
bl putchar
ldr w0, [sp, 40]
add w0, w0, 1
str w0, [sp, 40]
.L121:
ldr w0, [sp, 40]
cmp w0, 2
ble .L126
str wzr, [sp, 40]
b .L127
.L132:
str wzr, [sp, 44]
b .L128
.L129:
ldr x0, [sp, 24]
add x2, x0, 36
ldrsw x3, [sp, 44]
ldrsw x1, [sp, 40]
mov x0, x1
lsl x0, x0, 1
add x0, x0, x1
add x0, x0, x3
ldr w0, [x2, x0, lsl 2]
bl printf_colored
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L128:
ldr w0, [sp, 44]
cmp w0, 2
ble .L129
str wzr, [sp, 44]
b .L130
.L131:
ldr x0, [sp, 24]
add x2, x0, 72
ldrsw x3, [sp, 44]
ldrsw x1, [sp, 40]
mov x0, x1
lsl x0, x0, 1
add x0, x0, x1
add x0, x0, x3
ldr w0, [x2, x0, lsl 2]
bl printf_colored
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L130:
ldr w0, [sp, 44]
cmp w0, 2
ble .L131
mov w0, 10
bl putchar
ldr w0, [sp, 40]
add w0, w0, 1
str w0, [sp, 40]
.L127:
ldr w0, [sp, 40]
cmp w0, 2
ble .L132
ldr x0, [sp, 24]
add x1, x0, 108
add x0, sp, 48
mov x2, 36
bl memcpy
add x0, sp, 48
mov w1, 1
bl rotate_side
str wzr, [sp, 40]
b .L133
.L140:
str wzr, [sp, 44]
b .L134
.L135:
adrp x0, .LC15
add x0, x0, :lo12:.LC15
bl printf
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L134:
ldr w0, [sp, 44]
cmp w0, 2
ble .L135
str wzr, [sp, 44]
b .L136
.L137:
ldr x0, [sp, 24]
add x2, x0, 180
ldrsw x3, [sp, 44]
ldrsw x1, [sp, 40]
mov x0, x1
lsl x0, x0, 1
add x0, x0, x1
add x0, x0, x3
ldr w0, [x2, x0, lsl 2]
bl printf_colored
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L136:
ldr w0, [sp, 44]
cmp w0, 2
ble .L137
str wzr, [sp, 44]
b .L138
.L139:
ldrsw x2, [sp, 44]
ldrsw x1, [sp, 40]
mov x0, x1
lsl x0, x0, 1
add x0, x0, x1
add x0, x0, x2
lsl x0, x0, 2
add x1, sp, 48
ldr w0, [x1, x0]
bl printf_colored
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L138:
ldr w0, [sp, 44]
cmp w0, 2
ble .L139
mov w0, 10
bl putchar
ldr w0, [sp, 40]
add w0, w0, 1
str w0, [sp, 40]
.L133:
ldr w0, [sp, 40]
cmp w0, 2
ble .L140
ldr x0, [sp, 24]
add x1, x0, 144
add x0, sp, 48
mov x2, 36
bl memcpy
add x0, sp, 48
mov w1, 1
bl rotate_side
add x0, sp, 48
mov w1, 1
bl rotate_side
str wzr, [sp, 40]
b .L141
.L146:
str wzr, [sp, 44]
b .L142
.L143:
adrp x0, .LC15
add x0, x0, :lo12:.LC15
bl printf
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L142:
ldr w0, [sp, 44]
cmp w0, 2
ble .L143
str wzr, [sp, 44]
b .L144
.L145:
ldrsw x2, [sp, 44]
ldrsw x1, [sp, 40]
mov x0, x1
lsl x0, x0, 1
add x0, x0, x1
add x0, x0, x2
lsl x0, x0, 2
add x1, sp, 48
ldr w0, [x1, x0]
bl printf_colored
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L144:
ldr w0, [sp, 44]
cmp w0, 2
ble .L145
mov w0, 10
bl putchar
ldr w0, [sp, 40]
add w0, w0, 1
str w0, [sp, 40]
.L141:
ldr w0, [sp, 40]
cmp w0, 2
ble .L146
mov w0, 10
bl putchar
nop
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [sp, 88]
ldr x1, [x0]
subs x2, x2, x1
mov x1, 0
beq .L147
bl __stack_chk_fail
.L147:
ldp x29, x30, [sp], 96
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE20:
.size print_cube, .-print_cube
.align 2
.global corner_move
.type corner_move, %function
corner_move:
.LFB21:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 40]
str w1, [sp, 36]
str w2, [sp, 32]
str w3, [sp, 28]
mov w2, 1
ldr w1, [sp, 36]
ldr x0, [sp, 40]
bl rotate_cube
ldr w0, [sp, 36]
bl opposite
mov w2, 0
mov w1, w0
ldr x0, [sp, 40]
bl rotate_cube
ldr w2, [sp, 28]
ldr w1, [sp, 32]
ldr x0, [sp, 40]
bl rotate_cube
ldr w0, [sp, 28]
cmp w0, 1
bne .L149
mov w2, 0
ldr w1, [sp, 36]
ldr x0, [sp, 40]
bl rotate_cube
b .L150
.L149:
ldr w0, [sp, 36]
bl opposite
mov w2, 1
mov w1, w0
ldr x0, [sp, 40]
bl rotate_cube
.L150:
ldr w0, [sp, 28]
cmp w0, 0
cset w0, eq
and w0, w0, 255
mov w2, w0
ldr w1, [sp, 32]
ldr x0, [sp, 40]
bl rotate_cube
ldr w0, [sp, 28]
cmp w0, 1
bne .L151
ldr w0, [sp, 36]
bl opposite
mov w2, 1
mov w1, w0
ldr x0, [sp, 40]
bl rotate_cube
b .L152
.L151:
mov w2, 0
ldr w1, [sp, 36]
ldr x0, [sp, 40]
bl rotate_cube
.L152:
ldr w2, [sp, 28]
ldr w1, [sp, 32]
ldr x0, [sp, 40]
bl rotate_cube
ldr w0, [sp, 28]
cmp w0, 1
bne .L153
mov w2, 1
ldr w1, [sp, 36]
ldr x0, [sp, 40]
bl rotate_cube
b .L154
.L153:
ldr w0, [sp, 36]
bl opposite
mov w2, 0
mov w1, w0
ldr x0, [sp, 40]
bl rotate_cube
.L154:
ldr w0, [sp, 28]
cmp w0, 0
cset w0, eq
and w0, w0, 255
mov w2, w0
ldr w1, [sp, 32]
ldr x0, [sp, 40]
bl rotate_cube
ldr w0, [sp, 28]
cmp w0, 1
bne .L155
mov w2, 0
ldr w1, [sp, 36]
ldr x0, [sp, 40]
bl rotate_cube
b .L157
.L155:
ldr w0, [sp, 36]
bl opposite
mov w2, 1
mov w1, w0
ldr x0, [sp, 40]
bl rotate_cube
.L157:
nop
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE21:
.size corner_move, .-corner_move
.align 2
.global reverse_corner_move
.type reverse_corner_move, %function
reverse_corner_move:
.LFB22:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 40]
str w1, [sp, 36]
str w2, [sp, 32]
str w3, [sp, 28]
ldr w0, [sp, 28]
cmp w0, 1
bne .L159
mov w2, 1
ldr w1, [sp, 36]
ldr x0, [sp, 40]
bl rotate_cube
b .L160
.L159:
ldr w0, [sp, 36]
bl opposite
mov w2, 0
mov w1, w0
ldr x0, [sp, 40]
bl rotate_cube
.L160:
ldr w2, [sp, 28]
ldr w1, [sp, 32]
ldr x0, [sp, 40]
bl rotate_cube
ldr w0, [sp, 28]
cmp w0, 1
bne .L161
mov w2, 0
ldr w1, [sp, 36]
ldr x0, [sp, 40]
bl rotate_cube
b .L162
.L161:
ldr w0, [sp, 36]
bl opposite
mov w2, 1
mov w1, w0
ldr x0, [sp, 40]
bl rotate_cube
.L162:
ldr w0, [sp, 28]
cmp w0, 0
cset w0, eq
and w0, w0, 255
mov w2, w0
ldr w1, [sp, 32]
ldr x0, [sp, 40]
bl rotate_cube
ldr w0, [sp, 28]
cmp w0, 1
bne .L163
ldr w0, [sp, 36]
bl opposite
mov w2, 0
mov w1, w0
ldr x0, [sp, 40]
bl rotate_cube
b .L164
.L163:
mov w2, 1
ldr w1, [sp, 36]
ldr x0, [sp, 40]
bl rotate_cube
.L164:
ldr w2, [sp, 28]
ldr w1, [sp, 32]
ldr x0, [sp, 40]
bl rotate_cube
ldr w0, [sp, 28]
cmp w0, 1
bne .L165
mov w2, 1
ldr w1, [sp, 36]
ldr x0, [sp, 40]
bl rotate_cube
b .L166
.L165:
ldr w0, [sp, 36]
bl opposite
mov w2, 0
mov w1, w0
ldr x0, [sp, 40]
bl rotate_cube
.L166:
ldr w0, [sp, 28]
cmp w0, 0
cset w0, eq
and w0, w0, 255
mov w2, w0
ldr w1, [sp, 32]
ldr x0, [sp, 40]
bl rotate_cube
mov w2, 0
ldr w1, [sp, 36]
ldr x0, [sp, 40]
bl rotate_cube
ldr w0, [sp, 36]
bl opposite
mov w2, 1
mov w1, w0
ldr x0, [sp, 40]
bl rotate_cube
nop
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE22:
.size reverse_corner_move, .-reverse_corner_move
.align 2
.global cube2x2gen
.type cube2x2gen, %function
cube2x2gen:
.LFB23:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 40]
str w1, [sp, 36]
str w2, [sp, 32]
str w3, [sp, 28]
ldr w0, [sp, 36]
bl opposite
mov w2, 0
mov w1, w0
ldr x0, [sp, 40]
bl rotate_cube
mov w2, 1
ldr w1, [sp, 32]
ldr x0, [sp, 40]
bl rotate_cube
mov w2, 1
ldr w1, [sp, 36]
ldr x0, [sp, 40]
bl rotate_cube
ldr w0, [sp, 28]
bl opposite
mov w2, 0
mov w1, w0
ldr x0, [sp, 40]
bl rotate_cube
ldr w0, [sp, 28]
bl opposite
mov w2, 0
mov w1, w0
ldr x0, [sp, 40]
bl rotate_cube
ldr w0, [sp, 36]
bl opposite
mov w2, 0
mov w1, w0
ldr x0, [sp, 40]
bl rotate_cube
ldr w0, [sp, 28]
bl opposite
mov w2, 1
mov w1, w0
ldr x0, [sp, 40]
bl rotate_cube
mov w2, 0
ldr w1, [sp, 36]
ldr x0, [sp, 40]
bl rotate_cube
mov w2, 1
ldr w1, [sp, 32]
ldr x0, [sp, 40]
bl rotate_cube
ldr w0, [sp, 28]
bl opposite
mov w2, 1
mov w1, w0
ldr x0, [sp, 40]
bl rotate_cube
mov w2, 0
ldr w1, [sp, 32]
ldr x0, [sp, 40]
bl rotate_cube
mov w2, 0
ldr w1, [sp, 28]
ldr x0, [sp, 40]
bl rotate_cube
ldr w0, [sp, 36]
bl opposite
mov w2, 1
mov w1, w0
ldr x0, [sp, 40]
bl rotate_cube
mov w2, 1
ldr w1, [sp, 28]
ldr x0, [sp, 40]
bl rotate_cube
ldr w0, [sp, 36]
bl opposite
mov w2, 1
mov w1, w0
ldr x0, [sp, 40]
bl rotate_cube
mov w2, 1
ldr w1, [sp, 32]
ldr x0, [sp, 40]
bl rotate_cube
ldr w0, [sp, 36]
bl opposite
mov w2, 0
mov w1, w0
ldr x0, [sp, 40]
bl rotate_cube
mov w2, 0
ldr w1, [sp, 32]
ldr x0, [sp, 40]
bl rotate_cube
ldr w0, [sp, 36]
bl opposite
mov w2, 0
mov w1, w0
ldr x0, [sp, 40]
bl rotate_cube
ldr w0, [sp, 28]
bl opposite
mov w2, 0
mov w1, w0
ldr x0, [sp, 40]
bl rotate_cube
ldr w0, [sp, 36]
bl opposite
mov w2, 1
mov w1, w0
ldr x0, [sp, 40]
bl rotate_cube
ldr w0, [sp, 28]
bl opposite
mov w2, 1
mov w1, w0
ldr x0, [sp, 40]
bl rotate_cube
ldr w0, [sp, 36]
bl opposite
mov w2, 1
mov w1, w0
ldr x0, [sp, 40]
bl rotate_cube
ldr w0, [sp, 32]
bl opposite
mov w2, 1
mov w1, w0
ldr x0, [sp, 40]
bl rotate_cube
ldr w0, [sp, 36]
bl opposite
mov w2, 0
mov w1, w0
ldr x0, [sp, 40]
bl rotate_cube
ldr w0, [sp, 32]
bl opposite
mov w2, 0
mov w1, w0
ldr x0, [sp, 40]
bl rotate_cube
ldr w0, [sp, 36]
bl opposite
mov w2, 1
mov w1, w0
ldr x0, [sp, 40]
bl rotate_cube
ldr w0, [sp, 36]
bl opposite
mov w2, 1
mov w1, w0
ldr x0, [sp, 40]
bl rotate_cube
ldr w0, [sp, 28]
bl opposite
mov w2, 1
mov w1, w0
ldr x0, [sp, 40]
bl rotate_cube
ldr w0, [sp, 36]
bl opposite
mov w2, 1
mov w1, w0
ldr x0, [sp, 40]
bl rotate_cube
ldr w0, [sp, 28]
bl opposite
mov w2, 0
mov w1, w0
ldr x0, [sp, 40]
bl rotate_cube
ldr w0, [sp, 36]
bl opposite
mov w2, 0
mov w1, w0
ldr x0, [sp, 40]
bl rotate_cube
mov w2, 0
ldr w1, [sp, 32]
ldr x0, [sp, 40]
bl rotate_cube
ldr w0, [sp, 36]
bl opposite
mov w2, 0
mov w1, w0
ldr x0, [sp, 40]
bl rotate_cube
mov w2, 1
ldr w1, [sp, 32]
ldr x0, [sp, 40]
bl rotate_cube
ldr w0, [sp, 36]
bl opposite
mov w2, 1
mov w1, w0
ldr x0, [sp, 40]
bl rotate_cube
mov w2, 1
ldr w1, [sp, 32]
ldr x0, [sp, 40]
bl rotate_cube
ldr w0, [sp, 36]
bl opposite
mov w2, 1
mov w1, w0
ldr x0, [sp, 40]
bl rotate_cube
mov w2, 0
ldr w1, [sp, 32]
ldr x0, [sp, 40]
bl rotate_cube
ldr w0, [sp, 36]
bl opposite
mov w2, 1
mov w1, w0
ldr x0, [sp, 40]
bl rotate_cube
mov w2, 1
ldr w1, [sp, 32]
ldr x0, [sp, 40]
bl rotate_cube
ldr w0, [sp, 36]
bl opposite
mov w2, 1
mov w1, w0
ldr x0, [sp, 40]
bl rotate_cube
ldr w0, [sp, 36]
bl opposite
mov w2, 1
mov w1, w0
ldr x0, [sp, 40]
bl rotate_cube
mov w2, 0
ldr w1, [sp, 32]
ldr x0, [sp, 40]
bl rotate_cube
ldr w0, [sp, 36]
bl opposite
mov w2, 1
mov w1, w0
ldr x0, [sp, 40]
bl rotate_cube
ldr w0, [sp, 36]
bl opposite
mov w2, 1
mov w1, w0
ldr x0, [sp, 40]
bl rotate_cube
ldr w0, [sp, 28]
bl opposite
mov w2, 1
mov w1, w0
ldr x0, [sp, 40]
bl rotate_cube
ldr w0, [sp, 36]
bl opposite
mov w2, 1
mov w1, w0
ldr x0, [sp, 40]
bl rotate_cube
ldr w0, [sp, 28]
bl opposite
mov w2, 0
mov w1, w0
ldr x0, [sp, 40]
bl rotate_cube
ldr w0, [sp, 36]
bl opposite
mov w2, 0
mov w1, w0
ldr x0, [sp, 40]
bl rotate_cube
mov w2, 0
ldr w1, [sp, 28]
ldr x0, [sp, 40]
bl rotate_cube
ldr w0, [sp, 36]
bl opposite
mov w2, 1
mov w1, w0
ldr x0, [sp, 40]
bl rotate_cube
ldr w0, [sp, 28]
bl opposite
mov w2, 1
mov w1, w0
ldr x0, [sp, 40]
bl rotate_cube
ldr w0, [sp, 36]
bl opposite
mov w2, 0
mov w1, w0
ldr x0, [sp, 40]
bl rotate_cube
mov w2, 1
ldr w1, [sp, 28]
ldr x0, [sp, 40]
bl rotate_cube
ldr w0, [sp, 28]
bl opposite
mov w2, 0
mov w1, w0
ldr x0, [sp, 40]
bl rotate_cube
mov w2, 1
ldr w1, [sp, 36]
ldr x0, [sp, 40]
bl rotate_cube
ldr w0, [sp, 36]
bl opposite
mov w2, 0
mov w1, w0
ldr x0, [sp, 40]
bl rotate_cube
ldr w0, [sp, 28]
bl opposite
mov w2, 1
mov w1, w0
ldr x0, [sp, 40]
bl rotate_cube
mov w2, 0
ldr w1, [sp, 36]
ldr x0, [sp, 40]
bl rotate_cube
ldr w0, [sp, 28]
bl opposite
mov w2, 0
mov w1, w0
ldr x0, [sp, 40]
bl rotate_cube
ldr w0, [sp, 36]
bl opposite
mov w2, 1
mov w1, w0
ldr x0, [sp, 40]
bl rotate_cube
ldr w0, [sp, 28]
bl opposite
mov w2, 1
mov w1, w0
ldr x0, [sp, 40]
bl rotate_cube
mov w2, 1
ldr w1, [sp, 36]
ldr x0, [sp, 40]
bl rotate_cube
ldr w0, [sp, 28]
bl opposite
mov w2, 0
mov w1, w0
ldr x0, [sp, 40]
bl rotate_cube
mov w2, 0
ldr w1, [sp, 36]
ldr x0, [sp, 40]
bl rotate_cube
mov w2, 0
ldr w1, [sp, 32]
ldr x0, [sp, 40]
bl rotate_cube
ldr w0, [sp, 32]
bl opposite
mov w2, 1
mov w1, w0
ldr x0, [sp, 40]
bl rotate_cube
ldr w0, [sp, 28]
bl opposite
mov w2, 0
mov w1, w0
ldr x0, [sp, 40]
bl rotate_cube
mov w2, 1
ldr w1, [sp, 32]
ldr x0, [sp, 40]
bl rotate_cube
ldr w0, [sp, 28]
bl opposite
mov w2, 1
mov w1, w0
ldr x0, [sp, 40]
bl rotate_cube
ldr w0, [sp, 32]
bl opposite
mov w2, 0
mov w1, w0
ldr x0, [sp, 40]
bl rotate_cube
ldr w0, [sp, 28]
bl opposite
mov w2, 0
mov w1, w0
ldr x0, [sp, 40]
bl rotate_cube
mov w2, 0
ldr w1, [sp, 32]
ldr x0, [sp, 40]
bl rotate_cube
ldr w0, [sp, 28]
bl opposite
mov w2, 1
mov w1, w0
ldr x0, [sp, 40]
bl rotate_cube
mov w2, 1
ldr w1, [sp, 32]
ldr x0, [sp, 40]
bl rotate_cube
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE23:
.size cube2x2gen, .-cube2x2gen
.align 2
.global cross3gen
.type cross3gen, %function
cross3gen:
.LFB24:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 40]
str w1, [sp, 36]
str w2, [sp, 32]
str w3, [sp, 28]
mov w2, 0
ldr w1, [sp, 32]
ldr x0, [sp, 40]
bl rotate_cube
ldr w0, [sp, 32]
bl opposite
mov w2, 1
mov w1, w0
ldr x0, [sp, 40]
bl rotate_cube
ldr w0, [sp, 28]
bl opposite
mov w2, 1
mov w1, w0
ldr x0, [sp, 40]
bl rotate_cube
ldr w0, [sp, 28]
bl opposite
mov w2, 1
mov w1, w0
ldr x0, [sp, 40]
bl rotate_cube
mov w2, 1
ldr w1, [sp, 32]
ldr x0, [sp, 40]
bl rotate_cube
ldr w0, [sp, 32]
bl opposite
mov w2, 0
mov w1, w0
ldr x0, [sp, 40]
bl rotate_cube
mov w2, 1
ldr w1, [sp, 32]
ldr x0, [sp, 40]
bl rotate_cube
ldr w0, [sp, 32]
bl opposite
mov w2, 0
mov w1, w0
ldr x0, [sp, 40]
bl rotate_cube
mov w2, 1
ldr w1, [sp, 28]
ldr x0, [sp, 40]
bl rotate_cube
mov w2, 1
ldr w1, [sp, 28]
ldr x0, [sp, 40]
bl rotate_cube
mov w2, 0
ldr w1, [sp, 32]
ldr x0, [sp, 40]
bl rotate_cube
ldr w0, [sp, 32]
bl opposite
mov w2, 1
mov w1, w0
ldr x0, [sp, 40]
bl rotate_cube
mov w2, 0
ldr w1, [sp, 32]
ldr x0, [sp, 40]
bl rotate_cube
mov w2, 0
ldr w1, [sp, 28]
ldr x0, [sp, 40]
bl rotate_cube
ldr w0, [sp, 28]
bl opposite
mov w2, 1
mov w1, w0
ldr x0, [sp, 40]
bl rotate_cube
mov w2, 0
ldr w1, [sp, 28]
ldr x0, [sp, 40]
bl rotate_cube
ldr w0, [sp, 28]
bl opposite
mov w2, 1
mov w1, w0
ldr x0, [sp, 40]
bl rotate_cube
mov w2, 0
ldr w1, [sp, 36]
ldr x0, [sp, 40]
bl rotate_cube
ldr w0, [sp, 36]
bl opposite
mov w2, 1
mov w1, w0
ldr x0, [sp, 40]
bl rotate_cube
mov w2, 1
ldr w1, [sp, 28]
ldr x0, [sp, 40]
bl rotate_cube
mov w2, 1
ldr w1, [sp, 28]
ldr x0, [sp, 40]
bl rotate_cube
mov w2, 1
ldr w1, [sp, 36]
ldr x0, [sp, 40]
bl rotate_cube
ldr w0, [sp, 36]
bl opposite
mov w2, 0
mov w1, w0
ldr x0, [sp, 40]
bl rotate_cube
mov w2, 1
ldr w1, [sp, 36]
ldr x0, [sp, 40]
bl rotate_cube
ldr w0, [sp, 36]
bl opposite
mov w2, 0
mov w1, w0
ldr x0, [sp, 40]
bl rotate_cube
ldr w0, [sp, 28]
bl opposite
mov w2, 1
mov w1, w0
ldr x0, [sp, 40]
bl rotate_cube
ldr w0, [sp, 28]
bl opposite
mov w2, 1
mov w1, w0
ldr x0, [sp, 40]
bl rotate_cube
mov w2, 0
ldr w1, [sp, 36]
ldr x0, [sp, 40]
bl rotate_cube
ldr w0, [sp, 36]
bl opposite
mov w2, 1
mov w1, w0
ldr x0, [sp, 40]
bl rotate_cube
mov w2, 1
ldr w1, [sp, 32]
ldr x0, [sp, 40]
bl rotate_cube
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE24:
.size cross3gen, .-cross3gen
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC0:
.string "r"
.align 3
.LC1:
.string "num=%d,total=%lld,min=%d,max=%d,avg=%.2lg\n"
.text
.align 2
.global main
.type main, %function
main:
.LFB0:
.cfi_startproc
sub sp, sp, #2144
.cfi_def_cfa_offset 2144
stp x29, x30, [sp]
.cfi_offset 29, -2144
.cfi_offset 30, -2136
mov x29, sp
str w0, [sp, 28]
str x1, [sp, 16]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 2136]
mov x1, 0
str xzr, [sp, 40]
str xzr, [sp, 48]
str xzr, [sp, 56]
str xzr, [sp, 64]
adrp x0, :got:stdin
ldr x0, [x0, #:got_lo12:stdin]
ldr x0, [x0]
str x0, [sp, 32]
ldr w0, [sp, 28]
cmp w0, 1
ble .L4
ldr x0, [sp, 16]
add x0, x0, 8
ldr x2, [x0]
adrp x0, .LC0
add x1, x0, :lo12:.LC0
mov x0, x2
bl fopen
str x0, [sp, 32]
ldr x0, [sp, 32]
cmp x0, 0
bne .L4
ldr x0, [sp, 16]
add x0, x0, 8
ldr x0, [x0]
bl perror
mov w0, 1
b .L14
.L12:
add x0, sp, 88
ldr x2, [sp, 32]
mov w1, 2048
bl fgets
ldr x0, [sp, 32]
bl feof
cmp w0, 0
bne .L16
add x0, sp, 88
mov w1, 61
bl strrchr
str x0, [sp, 72]
ldr x0, [sp, 72]
cmp x0, 0
beq .L4
ldr x0, [sp, 72]
ldrb w0, [x0]
cmp w0, 61
beq .L8
b .L4
.L8:
ldr x0, [sp, 72]
add x0, x0, 1
str x0, [sp, 72]
ldr x0, [sp, 72]
bl atoi
sxtw x0, w0
str x0, [sp, 80]
ldr x1, [sp, 80]
ldr x0, [sp, 48]
cmp x1, x0
ble .L9
ldr x0, [sp, 80]
str x0, [sp, 48]
.L9:
ldr x0, [sp, 56]
cmp x0, 0
beq .L10
ldr x1, [sp, 80]
ldr x0, [sp, 56]
cmp x1, x0
bge .L11
.L10:
ldr x0, [sp, 80]
str x0, [sp, 56]
.L11:
ldr x0, [sp, 40]
add x0, x0, 1
str x0, [sp, 40]
ldr x1, [sp, 64]
ldr x0, [sp, 80]
add x0, x1, x0
str x0, [sp, 64]
.L4:
ldr x0, [sp, 32]
bl ferror
cmp w0, 0
beq .L12
b .L6
.L16:
nop
.L6:
ldr d0, [sp, 64]
scvtf d1, d0
ldr d0, [sp, 40]
scvtf d0, d0
fdiv d0, d1, d0
ldr x4, [sp, 48]
ldr x3, [sp, 56]
ldr x2, [sp, 64]
ldr x1, [sp, 40]
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl printf
adrp x0, :got:stdin
ldr x0, [x0, #:got_lo12:stdin]
ldr x0, [x0]
ldr x1, [sp, 32]
cmp x1, x0
beq .L13
ldr x0, [sp, 32]
bl fclose
.L13:
mov w0, 0
.L14:
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 2136]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L15
bl __stack_chk_fail
.L15:
mov w0, w1
ldp x29, x30, [sp]
add sp, sp, 2144
.cfi_restore 29
.cfi_restore 30
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global tag_reg
.type tag_reg, %function
tag_reg:
.LFB0:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str x0, [sp, 8]
str x1, [sp]
mov w0, 0
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size tag_reg, .-tag_reg
.align 2
.global tag_unreg
.type tag_unreg, %function
tag_unreg:
.LFB1:
.cfi_startproc
mov w0, 0
ret
.cfi_endproc
.LFE1:
.size tag_unreg, .-tag_unreg
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC0:
.string "Usage: %s <FileName>\n"
.align 3
.LC1:
.string "%s: Can't readlink '%s' %s(%d)\n"
.text
.align 2
.global main
.type main, %function
main:
.LFB6:
.cfi_startproc
mov x12, 8304
sub sp, sp, x12
.cfi_def_cfa_offset 8304
stp x29, x30, [sp]
.cfi_offset 29, -8304
.cfi_offset 30, -8296
mov x29, sp
stp x19, x20, [sp, 16]
str x21, [sp, 32]
.cfi_offset 19, -8288
.cfi_offset 20, -8280
.cfi_offset 21, -8272
str w0, [sp, 60]
str x1, [sp, 48]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 8296]
mov x1, 0
ldr w0, [sp, 60]
cmp w0, 2
beq .L2
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x3, [x0]
ldr x0, [sp, 48]
ldr x0, [x0]
mov x2, x0
adrp x0, .LC0
add x1, x0, :lo12:.LC0
mov x0, x3
bl fprintf
mov w0, 1
bl exit
.L2:
add x0, sp, 104
str x0, [sp, 72]
add x0, sp, 4096
add x0, x0, 104
str x0, [sp, 80]
ldr x0, [sp, 48]
add x0, x0, 8
ldr x0, [x0]
mov x2, 4096
mov x1, x0
ldr x0, [sp, 72]
bl strncpy
ldr x0, [sp, 72]
add x0, x0, 4095
strb wzr, [x0]
.L7:
mov x2, 4096
mov w1, 0
ldr x0, [sp, 80]
bl memset
mov x2, 4095
ldr x1, [sp, 80]
ldr x0, [sp, 72]
bl readlink
str w0, [sp, 68]
ldr w0, [sp, 68]
cmn w0, #1
bne .L3
bl __errno_location
ldr w0, [x0]
cmp w0, 22
bne .L4
ldr x0, [sp, 72]
bl puts
mov w0, 0
bl exit
.L4:
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x19, [x0]
ldr x0, [sp, 48]
ldr x20, [x0]
bl __errno_location
ldr w0, [x0]
bl strerror
mov x21, x0
bl __errno_location
ldr w0, [x0]
mov w5, w0
mov x4, x21
ldr x3, [sp, 72]
mov x2, x20
adrp x0, .LC1
add x1, x0, :lo12:.LC1
mov x0, x19
bl fprintf
mov w0, 1
bl exit
.L3:
ldr x0, [sp, 80]
ldrb w0, [x0]
cmp w0, 47
beq .L5
mov w1, 47
ldr x0, [sp, 72]
bl rindex
str x0, [sp, 96]
ldr x0, [sp, 96]
add x0, x0, 1
ldr x1, [sp, 80]
bl strcpy
b .L7
.L5:
ldr x0, [sp, 72]
str x0, [sp, 88]
ldr x0, [sp, 80]
str x0, [sp, 72]
ldr x0, [sp, 88]
str x0, [sp, 80]
b .L7
.cfi_endproc
.LFE6:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global main
.type main, %function
main:
.LFB0:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str x0, [sp, 8]
str w1, [sp, 4]
str wzr, [sp, 20]
b .L2
.L3:
ldr x0, [sp, 8]
ldr w0, [x0]
str w0, [sp, 24]
ldr w0, [sp, 20]
add w0, w0, 1
str w0, [sp, 20]
.L2:
ldr w1, [sp, 20]
ldr w0, [sp, 4]
cmp w1, w0
blt .L3
ldr w1, [sp, 28]
ldr w0, [sp, 24]
add w0, w1, w0
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC0:
.string "Enter the sentence or text:"
.align 3
.LC1:
.string "The number of words in given sentence/text are: %d\n"
.text
.align 2
.global main
.type main, %function
main:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -240]!
.cfi_def_cfa_offset 240
.cfi_offset 29, -240
.cfi_offset 30, -232
mov x29, sp
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 232]
mov x1, 0
str wzr, [sp, 28]
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl puts
adrp x0, :got:stdin
ldr x0, [x0, #:got_lo12:stdin]
ldr x1, [x0]
add x0, sp, 32
mov x2, x1
mov w1, 200
bl fgets
bl __ctype_b_loc
ldr x1, [x0]
ldrb w0, [sp, 32]
and x0, x0, 255
lsl x0, x0, 1
add x0, x1, x0
ldrh w0, [x0]
and w0, w0, 1024
cmp w0, 0
beq .L2
mov w0, 1
str w0, [sp, 28]
.L2:
str wzr, [sp, 24]
b .L3
.L7:
ldrsw x0, [sp, 24]
add x1, sp, 32
ldrb w0, [x1, x0]
cmp w0, 32
bne .L4
b .L5
.L6:
ldr w0, [sp, 24]
add w0, w0, 1
str w0, [sp, 24]
.L5:
bl __ctype_b_loc
ldr x1, [x0]
ldrsw x0, [sp, 24]
add x2, sp, 32
ldrb w0, [x2, x0]
and x0, x0, 255
lsl x0, x0, 1
add x0, x1, x0
ldrh w0, [x0]
and w0, w0, 8192
cmp w0, 0
bne .L6
ldrsw x0, [sp, 24]
add x1, sp, 32
ldrb w0, [x1, x0]
cmp w0, 0
beq .L4
ldr w0, [sp, 28]
add w0, w0, 1
str w0, [sp, 28]
.L4:
ldr w0, [sp, 24]
add w0, w0, 1
str w0, [sp, 24]
.L3:
ldrsw x0, [sp, 24]
add x1, sp, 32
ldrb w0, [x1, x0]
cmp w0, 0
bne .L7
ldr w1, [sp, 28]
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl printf
nop
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [sp, 232]
ldr x1, [x0]
subs x2, x2, x1
mov x1, 0
beq .L8
bl __stack_chk_fail
.L8:
ldp x29, x30, [sp], 240
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC2:
.string "file not supplied..\n."
.align 3
.LC3:
.string "r"
.align 3
.LC4:
.string "invalid file name"
.text
.align 2
.global main
.type main, %function
main:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str w0, [sp, 28]
str x1, [sp, 16]
ldr w0, [sp, 28]
cmp w0, 2
beq .L2
adrp x0, .LC2
add x0, x0, :lo12:.LC2
bl printf
mov w0, 0
b .L3
.L2:
ldr x0, [sp, 16]
add x0, x0, 8
ldr x2, [x0]
adrp x0, .LC3
add x1, x0, :lo12:.LC3
mov x0, x2
bl fopen
str x0, [sp, 40]
ldr x0, [sp, 40]
cmp x0, 0
bne .L4
adrp x0, .LC4
add x0, x0, :lo12:.LC4
bl puts
mov w0, 1
b .L3
.L4:
ldr x0, [sp, 40]
bl sha256
ldr x0, [sp, 40]
bl fclose
mov w0, 0
.L3:
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size main, .-main
.section .rodata
.align 3
.LC5:
.string ""
.string "\377"
.align 3
.LC6:
.string "%08x%08x%08x%08x%08x%08x%08x%08x\n"
.text
.align 2
.global sha256
.type sha256, %function
sha256:
.LFB1:
.cfi_startproc
sub sp, sp, #736
.cfi_def_cfa_offset 736
stp x29, x30, [sp, 16]
.cfi_offset 29, -720
.cfi_offset 30, -712
add x29, sp, 16
str x19, [sp, 32]
.cfi_offset 19, -704
str x0, [sp, 56]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 728]
mov x1, 0
str xzr, [sp, 112]
str wzr, [sp, 64]
adrp x0, .LC0
add x1, x0, :lo12:.LC0
add x0, sp, 216
ldp q0, q1, [x1]
stp q0, q1, [x0]
ldp q0, q1, [x1, 32]
stp q0, q1, [x0, 32]
ldp q0, q1, [x1, 64]
stp q0, q1, [x0, 64]
ldp q0, q1, [x1, 96]
stp q0, q1, [x0, 96]
ldp q0, q1, [x1, 128]
stp q0, q1, [x0, 128]
ldp q0, q1, [x1, 160]
stp q0, q1, [x0, 160]
ldp q0, q1, [x1, 192]
stp q0, q1, [x0, 192]
ldp q0, q1, [x1, 224]
stp q0, q1, [x0, 224]
adrp x0, .LC1
add x1, x0, :lo12:.LC1
add x0, sp, 120
ldp q0, q1, [x1]
stp q0, q1, [x0]
b .L6
.L13:
str wzr, [sp, 100]
b .L7
.L8:
ldrsw x0, [sp, 100]
lsl x0, x0, 2
add x1, sp, 152
ldr w0, [x1, x0]
lsr w1, w0, 24
ldrsw x0, [sp, 100]
lsl x0, x0, 2
add x2, sp, 152
ldr w0, [x2, x0]
lsr w0, w0, 8
and w0, w0, 65280
orr w1, w1, w0
ldrsw x0, [sp, 100]
lsl x0, x0, 2
add x2, sp, 152
ldr w0, [x2, x0]
lsl w0, w0, 8
and w0, w0, 16711680
orr w1, w1, w0
ldrsw x0, [sp, 100]
lsl x0, x0, 2
add x2, sp, 152
ldr w0, [x2, x0]
lsl w0, w0, 24
orr w2, w1, w0
ldrsw x0, [sp, 100]
lsl x0, x0, 2
add x1, sp, 472
str w2, [x1, x0]
ldr w0, [sp, 100]
add w0, w0, 1
str w0, [sp, 100]
.L7:
ldr w0, [sp, 100]
cmp w0, 15
ble .L8
mov w0, 16
str w0, [sp, 100]
b .L9
.L10:
ldr w0, [sp, 100]
sub w0, w0, #2
sxtw x0, w0
lsl x0, x0, 2
add x1, sp, 472
ldr w0, [x1, x0]
bl sig1
mov w2, w0
ldr w0, [sp, 100]
sub w0, w0, #7
sxtw x0, w0
lsl x0, x0, 2
add x1, sp, 472
ldr w0, [x1, x0]
add w19, w2, w0
ldr w0, [sp, 100]
sub w0, w0, #15
sxtw x0, w0
lsl x0, x0, 2
add x1, sp, 472
ldr w0, [x1, x0]
bl sig0
add w1, w19, w0
ldr w0, [sp, 100]
sub w0, w0, #16
sxtw x0, w0
lsl x0, x0, 2
add x2, sp, 472
ldr w0, [x2, x0]
add w2, w1, w0
ldrsw x0, [sp, 100]
lsl x0, x0, 2
add x1, sp, 472
str w2, [x1, x0]
ldr w0, [sp, 100]
add w0, w0, 1
str w0, [sp, 100]
.L9:
ldr w0, [sp, 100]
cmp w0, 63
ble .L10
ldr w0, [sp, 120]
str w0, [sp, 68]
ldr w0, [sp, 124]
str w0, [sp, 72]
ldr w0, [sp, 128]
str w0, [sp, 76]
ldr w0, [sp, 132]
str w0, [sp, 80]
ldr w0, [sp, 136]
str w0, [sp, 84]
ldr w0, [sp, 140]
str w0, [sp, 88]
ldr w0, [sp, 144]
str w0, [sp, 92]
ldr w0, [sp, 148]
str w0, [sp, 96]
str wzr, [sp, 100]
b .L11
.L12:
ldr w0, [sp, 84]
bl SIG1
mov w1, w0
ldr w0, [sp, 96]
add w19, w1, w0
ldr w2, [sp, 92]
ldr w1, [sp, 88]
ldr w0, [sp, 84]
bl Ch
add w1, w19, w0
ldrsw x0, [sp, 100]
lsl x0, x0, 2
add x2, sp, 216
ldr w0, [x2, x0]
add w1, w1, w0
ldrsw x0, [sp, 100]
lsl x0, x0, 2
add x2, sp, 472
ldr w0, [x2, x0]
add w0, w1, w0
str w0, [sp, 104]
ldr w0, [sp, 68]
bl SIG0
mov w19, w0
ldr w2, [sp, 76]
ldr w1, [sp, 72]
ldr w0, [sp, 68]
bl Maj
add w0, w19, w0
str w0, [sp, 108]
ldr w0, [sp, 92]
str w0, [sp, 96]
ldr w0, [sp, 88]
str w0, [sp, 92]
ldr w0, [sp, 84]
str w0, [sp, 88]
ldr w1, [sp, 80]
ldr w0, [sp, 104]
add w0, w1, w0
str w0, [sp, 84]
ldr w0, [sp, 76]
str w0, [sp, 80]
ldr w0, [sp, 80]
str w0, [sp, 76]
ldr w0, [sp, 68]
str w0, [sp, 72]
ldr w1, [sp, 104]
ldr w0, [sp, 108]
add w0, w1, w0
str w0, [sp, 68]
ldr w0, [sp, 100]
add w0, w0, 1
str w0, [sp, 100]
.L11:
ldr w0, [sp, 100]
cmp w0, 63
ble .L12
ldr w1, [sp, 120]
ldr w0, [sp, 68]
add w0, w1, w0
str w0, [sp, 120]
ldr w1, [sp, 124]
ldr w0, [sp, 72]
add w0, w1, w0
str w0, [sp, 124]
ldr w1, [sp, 128]
ldr w0, [sp, 76]
add w0, w1, w0
str w0, [sp, 128]
ldr w1, [sp, 132]
ldr w0, [sp, 80]
add w0, w1, w0
str w0, [sp, 132]
ldr w1, [sp, 136]
ldr w0, [sp, 84]
add w0, w1, w0
str w0, [sp, 136]
ldr w1, [sp, 140]
ldr w0, [sp, 88]
add w0, w1, w0
str w0, [sp, 140]
ldr w1, [sp, 144]
ldr w0, [sp, 92]
add w0, w1, w0
str w0, [sp, 144]
ldr w1, [sp, 148]
ldr w0, [sp, 96]
add w0, w1, w0
str w0, [sp, 148]
.L6:
add x2, sp, 112
add x1, sp, 64
add x0, sp, 152
mov x3, x2
mov x2, x1
mov x1, x0
ldr x0, [sp, 56]
bl nextmsgblock
cmp w0, 0
bne .L13
mov w0, 10
bl putchar
adrp x0, .LC5
add x0, x0, :lo12:.LC5
ldrh w0, [x0]
cmp w0, 255
bhi .L14
ldr w1, [sp, 120]
ldr w2, [sp, 124]
ldr w3, [sp, 128]
ldr w4, [sp, 132]
ldr w5, [sp, 136]
ldr w6, [sp, 140]
ldr w7, [sp, 144]
ldr w0, [sp, 148]
str w0, [sp]
adrp x0, .LC6
add x0, x0, :lo12:.LC6
bl printf
b .L17
.L14:
ldr w0, [sp, 120]
lsr w1, w0, 24
ldr w0, [sp, 120]
lsr w0, w0, 8
and w0, w0, 65280
orr w1, w1, w0
ldr w0, [sp, 120]
lsl w0, w0, 8
and w0, w0, 16711680
orr w1, w1, w0
ldr w0, [sp, 120]
lsl w0, w0, 24
orr w8, w1, w0
ldr w0, [sp, 124]
lsr w1, w0, 24
ldr w0, [sp, 124]
lsr w0, w0, 8
and w0, w0, 65280
orr w1, w1, w0
ldr w0, [sp, 124]
lsl w0, w0, 8
and w0, w0, 16711680
orr w1, w1, w0
ldr w0, [sp, 124]
lsl w0, w0, 24
orr w2, w1, w0
ldr w0, [sp, 128]
lsr w1, w0, 24
ldr w0, [sp, 128]
lsr w0, w0, 8
and w0, w0, 65280
orr w1, w1, w0
ldr w0, [sp, 128]
lsl w0, w0, 8
and w0, w0, 16711680
orr w1, w1, w0
ldr w0, [sp, 128]
lsl w0, w0, 24
orr w3, w1, w0
ldr w0, [sp, 132]
lsr w1, w0, 24
ldr w0, [sp, 132]
lsr w0, w0, 8
and w0, w0, 65280
orr w1, w1, w0
ldr w0, [sp, 132]
lsl w0, w0, 8
and w0, w0, 16711680
orr w1, w1, w0
ldr w0, [sp, 132]
lsl w0, w0, 24
orr w4, w1, w0
ldr w0, [sp, 136]
lsr w1, w0, 24
ldr w0, [sp, 136]
lsr w0, w0, 8
and w0, w0, 65280
orr w1, w1, w0
ldr w0, [sp, 136]
lsl w0, w0, 8
and w0, w0, 16711680
orr w1, w1, w0
ldr w0, [sp, 136]
lsl w0, w0, 24
orr w5, w1, w0
ldr w0, [sp, 140]
lsr w1, w0, 24
ldr w0, [sp, 140]
lsr w0, w0, 8
and w0, w0, 65280
orr w1, w1, w0
ldr w0, [sp, 140]
lsl w0, w0, 8
and w0, w0, 16711680
orr w1, w1, w0
ldr w0, [sp, 140]
lsl w0, w0, 24
orr w6, w1, w0
ldr w0, [sp, 144]
lsr w1, w0, 24
ldr w0, [sp, 144]
lsr w0, w0, 8
and w0, w0, 65280
orr w1, w1, w0
ldr w0, [sp, 144]
lsl w0, w0, 8
and w0, w0, 16711680
orr w1, w1, w0
ldr w0, [sp, 144]
lsl w0, w0, 24
orr w7, w1, w0
ldr w0, [sp, 148]
lsr w1, w0, 24
ldr w0, [sp, 148]
lsr w0, w0, 8
and w0, w0, 65280
orr w1, w1, w0
ldr w0, [sp, 148]
lsl w0, w0, 8
and w0, w0, 16711680
orr w1, w1, w0
ldr w0, [sp, 148]
lsl w0, w0, 24
orr w0, w1, w0
str w0, [sp]
mov w1, w8
adrp x0, .LC6
add x0, x0, :lo12:.LC6
bl printf
.L17:
nop
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [sp, 728]
ldr x1, [x0]
subs x2, x2, x1
mov x1, 0
beq .L16
bl __stack_chk_fail
.L16:
ldr x19, [sp, 32]
ldp x29, x30, [sp, 16]
add sp, sp, 736
.cfi_restore 29
.cfi_restore 30
.cfi_restore 19
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE1:
.size sha256, .-sha256
.section .rodata
.align 3
.LC0:
.word 1116352408
.word 1899447441
.word -1245643825
.word -373957723
.word 961987163
.word 1508970993
.word -1841331548
.word -1424204075
.word -670586216
.word 310598401
.word 607225278
.word 1426881987
.word 1925078388
.word -2132889090
.word -1680079193
.word -1046744716
.word -459576895
.word -272742522
.word 264347078
.word 604807628
.word 770255983
.word 1249150122
.word 1555081692
.word 1996064986
.word -1740746414
.word -1473132947
.word -1341970488
.word -1084653625
.word -958395405
.word -710438585
.word 113926993
.word 338241895
.word 666307205
.word 773529912
.word 1294757372
.word 1396182291
.word 1695183700
.word 1986661051
.word -2117940946
.word -1838011259
.word -1564481375
.word -1474664885
.word -1035236496
.word -949202525
.word -778901479
.word -694614492
.word -200395387
.word 275423344
.word 430227734
.word 506948616
.word 659060556
.word 883997877
.word 958139571
.word 1322822218
.word 1537002063
.word 1747873779
.word 1955562222
.word 2024104815
.word -2067236844
.word -1933114872
.word -1866530822
.word -1538233109
.word -1090935817
.word -965641998
.align 3
.LC1:
.word 1779033703
.word -1150833019
.word 1013904242
.word -1521486534
.word 1359893119
.word -1694144372
.word 528734635
.word 1541459225
.text
.align 2
.global rotr
.type rotr, %function
rotr:
.LFB2:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str w0, [sp, 12]
str w1, [sp, 8]
ldr w0, [sp, 12]
ldr w1, [sp, 8]
ror w0, w1, w0
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE2:
.size rotr, .-rotr
.align 2
.global shr
.type shr, %function
shr:
.LFB3:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str w0, [sp, 12]
str w1, [sp, 8]
ldr w0, [sp, 12]
ldr w1, [sp, 8]
lsr w0, w1, w0
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE3:
.size shr, .-shr
.align 2
.global sig0
.type sig0, %function
sig0:
.LFB4:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x19, [sp, 16]
.cfi_offset 19, -32
str w0, [sp, 44]
ldr w1, [sp, 44]
mov w0, 7
bl rotr
mov w19, w0
ldr w1, [sp, 44]
mov w0, 18
bl rotr
eor w19, w19, w0
ldr w1, [sp, 44]
mov w0, 3
bl shr
eor w0, w19, w0
ldr x19, [sp, 16]
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_restore 19
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE4:
.size sig0, .-sig0
.align 2
.global sig1
.type sig1, %function
sig1:
.LFB5:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x19, [sp, 16]
.cfi_offset 19, -32
str w0, [sp, 44]
ldr w1, [sp, 44]
mov w0, 17
bl rotr
mov w19, w0
ldr w1, [sp, 44]
mov w0, 19
bl rotr
eor w19, w19, w0
ldr w1, [sp, 44]
mov w0, 10
bl shr
eor w0, w19, w0
ldr x19, [sp, 16]
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_restore 19
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE5:
.size sig1, .-sig1
.align 2
.global SIG0
.type SIG0, %function
SIG0:
.LFB6:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x19, [sp, 16]
.cfi_offset 19, -32
str w0, [sp, 44]
ldr w1, [sp, 44]
mov w0, 2
bl rotr
mov w19, w0
ldr w1, [sp, 44]
mov w0, 13
bl rotr
eor w19, w19, w0
ldr w1, [sp, 44]
mov w0, 22
bl rotr
eor w0, w19, w0
ldr x19, [sp, 16]
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_restore 19
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE6:
.size SIG0, .-SIG0
.align 2
.global SIG1
.type SIG1, %function
SIG1:
.LFB7:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x19, [sp, 16]
.cfi_offset 19, -32
str w0, [sp, 44]
ldr w1, [sp, 44]
mov w0, 6
bl rotr
mov w19, w0
ldr w1, [sp, 44]
mov w0, 11
bl rotr
eor w19, w19, w0
ldr w1, [sp, 44]
mov w0, 25
bl rotr
eor w0, w19, w0
ldr x19, [sp, 16]
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_restore 19
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE7:
.size SIG1, .-SIG1
.align 2
.global Ch
.type Ch, %function
Ch:
.LFB8:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str w0, [sp, 12]
str w1, [sp, 8]
str w2, [sp, 4]
ldr w1, [sp, 12]
ldr w0, [sp, 8]
and w1, w1, w0
ldr w0, [sp, 12]
mvn w2, w0
ldr w0, [sp, 4]
and w0, w2, w0
eor w0, w1, w0
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE8:
.size Ch, .-Ch
.align 2
.global Maj
.type Maj, %function
Maj:
.LFB9:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str w0, [sp, 12]
str w1, [sp, 8]
str w2, [sp, 4]
ldr w1, [sp, 8]
ldr w0, [sp, 4]
eor w1, w1, w0
ldr w0, [sp, 12]
and w1, w1, w0
ldr w2, [sp, 8]
ldr w0, [sp, 4]
and w0, w2, w0
eor w0, w1, w0
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE9:
.size Maj, .-Maj
.align 2
.global nextmsgblock
.type nextmsgblock, %function
nextmsgblock:
.LFB10:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str x0, [sp, 40]
str x1, [sp, 32]
str x2, [sp, 24]
str x3, [sp, 16]
ldr x0, [sp, 24]
ldr w0, [x0]
cmp w0, 3
bne .L35
mov w0, 0
b .L36
.L35:
ldr x0, [sp, 24]
ldr w0, [x0]
cmp w0, 1
beq .L37
ldr x0, [sp, 24]
ldr w0, [x0]
cmp w0, 2
bne .L38
.L37:
str wzr, [sp, 52]
b .L39
.L40:
ldr x1, [sp, 32]
ldrsw x0, [sp, 52]
strb wzr, [x1, x0]
ldr w0, [sp, 52]
add w0, w0, 1
str w0, [sp, 52]
.L39:
ldr w0, [sp, 52]
cmp w0, 55
ble .L40
ldr x0, [sp, 16]
ldr x0, [x0]
lsr x1, x0, 56
ldr x0, [sp, 16]
ldr x0, [x0]
lsr x0, x0, 40
and x0, x0, 65280
orr x1, x1, x0
ldr x0, [sp, 16]
ldr x0, [x0]
lsr x0, x0, 24
and x0, x0, 16711680
orr x1, x1, x0
ldr x0, [sp, 16]
ldr x0, [x0]
lsr x0, x0, 8
and x0, x0, 4278190080
orr x1, x1, x0
ldr x0, [sp, 16]
ldr x0, [x0]
lsl x0, x0, 8
and x0, x0, 1095216660480
orr x1, x1, x0
ldr x0, [sp, 16]
ldr x0, [x0]
lsl x0, x0, 24
and x0, x0, 280375465082880
orr x1, x1, x0
ldr x0, [sp, 16]
ldr x0, [x0]
lsl x0, x0, 40
and x0, x0, 71776119061217280
orr x1, x1, x0
ldr x0, [sp, 16]
ldr x0, [x0]
lsl x0, x0, 56
orr x1, x1, x0
ldr x0, [sp, 32]
str x1, [x0, 56]
ldr x0, [sp, 24]
mov w1, 3
str w1, [x0]
ldr x0, [sp, 24]
ldr w0, [x0]
cmp w0, 2
bne .L41
ldr x0, [sp, 32]
mov w1, -128
strb w1, [x0]
.L41:
mov w0, 1
b .L36
.L38:
ldr x0, [sp, 32]
ldr x3, [sp, 40]
mov x2, 64
mov x1, 1
bl fread
str x0, [sp, 56]
ldr x0, [sp, 16]
ldr x1, [x0]
ldr x0, [sp, 56]
lsl x0, x0, 3
add x1, x1, x0
ldr x0, [sp, 16]
str x1, [x0]
ldr x0, [sp, 56]
cmp x0, 55
bhi .L42
ldr x1, [sp, 32]
ldr x0, [sp, 56]
add x0, x1, x0
mov w1, -128
strb w1, [x0]
b .L43
.L44:
ldr x0, [sp, 56]
add x0, x0, 1
str x0, [sp, 56]
ldr x1, [sp, 32]
ldr x0, [sp, 56]
add x0, x1, x0
strb wzr, [x0]
.L43:
ldr x0, [sp, 56]
cmp x0, 55
bls .L44
ldr x0, [sp, 16]
ldr x1, [x0]
ldr x0, [sp, 32]
str x1, [x0, 56]
ldr x0, [sp, 24]
mov w1, 3
str w1, [x0]
b .L45
.L42:
ldr x0, [sp, 56]
cmp x0, 63
bhi .L46
ldr x0, [sp, 24]
mov w1, 1
str w1, [x0]
ldr x1, [sp, 32]
ldr x0, [sp, 56]
add x0, x1, x0
mov w1, -128
strb w1, [x0]
b .L47
.L48:
ldr x0, [sp, 56]
add x0, x0, 1
str x0, [sp, 56]
ldr x1, [sp, 32]
ldr x0, [sp, 56]
add x0, x1, x0
strb wzr, [x0]
.L47:
ldr x0, [sp, 56]
cmp x0, 63
bls .L48
b .L45
.L46:
ldr x0, [sp, 40]
bl feof
cmp w0, 0
beq .L45
ldr x0, [sp, 24]
mov w1, 2
str w1, [x0]
.L45:
mov w0, 1
.L36:
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE10:
.size nextmsgblock, .-nextmsgblock
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC0:
.string "arg1 is : %s, arg2 is : %d, arg3 is : %f\n"
.text
.align 2
.global thfn
.type thfn, %function
thfn:
.LFB6:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
ldr x0, [sp, 24]
str x0, [sp, 40]
ldr x1, [sp, 40]
ldr x0, [sp, 40]
ldr w2, [x0, 12]
ldr x0, [sp, 40]
ldr s0, [x0, 16]
fcvt d0, s0
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl printf
mov x0, 0
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE6:
.size thfn, .-thfn
.section .rodata
.align 3
.LC1:
.string "can\342\200\231t create thread %s\n"
.text
.align 2
.global main
.type main, %function
main:
.LFB7:
.cfi_startproc
stp x29, x30, [sp, -80]!
.cfi_def_cfa_offset 80
.cfi_offset 29, -80
.cfi_offset 30, -72
mov x29, sp
str w0, [sp, 28]
str x1, [sp, 16]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 72]
mov x1, 0
ldr x0, [sp, 16]
add x0, x0, 8
ldr x1, [x0]
add x0, sp, 48
bl strcpy
ldr x0, [sp, 16]
add x0, x0, 16
ldr x0, [x0]
bl atoi
str w0, [sp, 60]
ldr x0, [sp, 16]
add x0, x0, 24
ldr x0, [x0]
bl atof
fcvt s0, d0
str s0, [sp, 64]
add x0, sp, 48
add x4, sp, 40
mov x3, x0
adrp x0, thfn
add x2, x0, :lo12:thfn
mov x1, 0
mov x0, x4
bl pthread_create
str w0, [sp, 36]
ldr w0, [sp, 36]
cmp w0, 0
beq .L4
ldr w0, [sp, 36]
bl strerror
mov x1, x0
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl printf
mov w0, 1
bl exit
.L4:
mov w0, 1
bl sleep
mov w0, 0
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 72]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L6
bl __stack_chk_fail
.L6:
mov w0, w1
ldp x29, x30, [sp], 80
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE7:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC0:
.string "dimensione variabile struttura packed s %ld \n"
.align 3
.LC1:
.string "dimensione vettore di strutture packed vet %ld \n"
.text
.align 2
.global main
.type main, %function
main:
.LFB6:
.cfi_startproc
stp x29, x30, [sp, -96]!
.cfi_def_cfa_offset 96
.cfi_offset 29, -96
.cfi_offset 30, -88
mov x29, sp
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 88]
mov x1, 0
mov x1, 5
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl printf
mov x1, 50
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl printf
mov w0, 0
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 88]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L3
bl __stack_chk_fail
.L3:
mov w0, w1
ldp x29, x30, [sp], 96
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE6:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global correct
.type correct, %function
correct:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
bl omp_get_thread_num
str w0, [sp, 28]
ldr w0, [sp, 28]
bl work
nop
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size correct, .-correct
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.global STEPS_1K
.section .rodata
.align 2
.type STEPS_1K, %object
.size STEPS_1K, 4
STEPS_1K:
.word 1024
.global STEPS_1M
.align 2
.type STEPS_1M, %object
.size STEPS_1M, 4
STEPS_1M:
.word 1048576
.global STEPS_10M
.align 2
.type STEPS_10M, %object
.size STEPS_10M, 4
STEPS_10M:
.word 10485760
.global STEPS_100M
.align 2
.type STEPS_100M, %object
.size STEPS_100M, 4
STEPS_100M:
.word 104857600
.global PI
.align 3
.type PI, %object
.size PI, 8
PI:
.word 1413754136
.word 1074340347
.global DOUBLE_PI
.align 3
.type DOUBLE_PI, %object
.size DOUBLE_PI, 8
DOUBLE_PI:
.word 1413754136
.word 1075388923
.global HALF_PI
.align 3
.type HALF_PI, %object
.size HALF_PI, 8
HALF_PI:
.word 1413754136
.word 1073291771
.global QUARTER_PI
.align 3
.type QUARTER_PI, %object
.size QUARTER_PI, 8
QUARTER_PI:
.word 1413754136
.word 1072243195
.global THIRD_PI
.align 3
.type THIRD_PI, %object
.size THIRD_PI, 8
THIRD_PI:
.word 942502758
.word 1072742738
.global ONE_OVER_PI
.align 3
.type ONE_OVER_PI, %object
.size ONE_OVER_PI, 8
ONE_OVER_PI:
.word 1841940611
.word 1070882608
.global THREE_OVER_PI
.align 3
.type THREE_OVER_PI, %object
.size THREE_OVER_PI, 8
THREE_OVER_PI:
.word -1532056380
.word 1072598728
.global ONE_OVER_DOUBLE_PI
.align 3
.type ONE_OVER_DOUBLE_PI, %object
.size ONE_OVER_DOUBLE_PI, 8
ONE_OVER_DOUBLE_PI:
.word 1841940611
.word 1069834032
.global PI_OVER_180
.align 3
.type PI_OVER_180, %object
.size PI_OVER_180, 8
PI_OVER_180:
.word -1571644103
.word 1066524486
.global ONE_EIGHTY_OVER_PI
.align 3
.type ONE_EIGHTY_OVER_PI, %object
.size ONE_EIGHTY_OVER_PI, 8
ONE_EIGHTY_OVER_PI:
.word 442745336
.word 1078765020
.global SQRT2
.align 3
.type SQRT2, %object
.size SQRT2, 8
SQRT2:
.word 1719614413
.word 1073127582
.global SQRT3
.align 3
.type SQRT3, %object
.size SQRT3, 8
SQRT3:
.word -396866390
.word 1073460858
.global SQRT6
.align 3
.type SQRT6, %object
.size SQRT6, 8
SQRT6:
.word 336142638
.word 1073977486
.global THREE_SQRT2_OVER_PI
.align 3
.type THREE_SQRT2_OVER_PI, %object
.size THREE_SQRT2_OVER_PI, 8
THREE_SQRT2_OVER_PI:
.word 525257881
.word 1073060747
.global PI_OVER_THREE_SQRT2
.align 3
.type PI_OVER_THREE_SQRT2, %object
.size PI_OVER_THREE_SQRT2, 8
PI_OVER_THREE_SQRT2:
.word 600955184
.word 1072148996
.global SQRT6_OVER_PI
.align 3
.type SQRT6_OVER_PI, %object
.size SQRT6_OVER_PI, 8
SQRT6_OVER_PI:
.word -1262287425
.word 1072231238
.global FLOAT_EPSILON
.align 3
.type FLOAT_EPSILON, %object
.size FLOAT_EPSILON, 8
FLOAT_EPSILON:
.word -1598689907
.word 1051772663
.global DOUBLE_EPSILON
.align 3
.type DOUBLE_EPSILON, %object
.size DOUBLE_EPSILON, 8
DOUBLE_EPSILON:
.word -640172613
.word 1037794527
.global DSTATE_THRESHOLD
.align 3
.type DSTATE_THRESHOLD, %object
.size DSTATE_THRESHOLD, 8
DSTATE_THRESHOLD:
.word 0
.word 1079574528
.global INDEX_NOT_EXIST
.align 2
.type INDEX_NOT_EXIST, %object
.size INDEX_NOT_EXIST, 4
INDEX_NOT_EXIST:
.word 1000000000
.global INFINITE_THRESHOLD
.align 3
.type INFINITE_THRESHOLD, %object
.size INFINITE_THRESHOLD, 8
INFINITE_THRESHOLD:
.word 0
.word 1104006501
.global STEPS_MAX_TOOLKIT_SIZE
.align 2
.type STEPS_MAX_TOOLKIT_SIZE, %object
.size STEPS_MAX_TOOLKIT_SIZE, 4
STEPS_MAX_TOOLKIT_SIZE:
.word 1000
.global STEPS_MAX_TEMP_CHAR_BUFFER_SIZE
.align 2
.type STEPS_MAX_TEMP_CHAR_BUFFER_SIZE, %object
.size STEPS_MAX_TEMP_CHAR_BUFFER_SIZE, 4
STEPS_MAX_TEMP_CHAR_BUFFER_SIZE:
.word 500
.global STEPS_MODEL_FEEDBACK_LOOP_INTEGRATION_COUNT
.align 2
.type STEPS_MODEL_FEEDBACK_LOOP_INTEGRATION_COUNT, %object
.size STEPS_MODEL_FEEDBACK_LOOP_INTEGRATION_COUNT, 4
STEPS_MODEL_FEEDBACK_LOOP_INTEGRATION_COUNT:
.word 2
.global STEPS_MAX_LOAD_RELAY_STAGE
.align 2
.type STEPS_MAX_LOAD_RELAY_STAGE, %object
.size STEPS_MAX_LOAD_RELAY_STAGE, 4
STEPS_MAX_LOAD_RELAY_STAGE:
.word 50
.global STEPS_MAX_RELAY_COUNT
.align 2
.type STEPS_MAX_RELAY_COUNT, %object
.size STEPS_MAX_RELAY_COUNT, 4
STEPS_MAX_RELAY_COUNT:
.word 5
.global STEPS_MAX_STABILIZER_INPUT_SIGNAL_SLOT
.align 2
.type STEPS_MAX_STABILIZER_INPUT_SIGNAL_SLOT, %object
.size STEPS_MAX_STABILIZER_INPUT_SIGNAL_SLOT, 4
STEPS_MAX_STABILIZER_INPUT_SIGNAL_SLOT:
.word 5
.global STEPS_MAX_CONTINUOUS_BUFFER_SIZE
.align 2
.type STEPS_MAX_CONTINUOUS_BUFFER_SIZE, %object
.size STEPS_MAX_CONTINUOUS_BUFFER_SIZE, 4
STEPS_MAX_CONTINUOUS_BUFFER_SIZE:
.word 1000
.global STEPS_MAX_WIND_RECORD_SIZE
.align 2
.type STEPS_MAX_WIND_RECORD_SIZE, %object
.size STEPS_MAX_WIND_RECORD_SIZE, 4
STEPS_MAX_WIND_RECORD_SIZE:
.word 100
.global STEPS_MAX_WIND_TURBINE_MAXIMUM_LOOP
.align 2
.type STEPS_MAX_WIND_TURBINE_MAXIMUM_LOOP, %object
.size STEPS_MAX_WIND_TURBINE_MAXIMUM_LOOP, 4
STEPS_MAX_WIND_TURBINE_MAXIMUM_LOOP:
.word 100
.global STEPS_MAX_WIND_TURBINE_POWER_SPEED_LOOKUP_TABLE_SIZE
.align 2
.type STEPS_MAX_WIND_TURBINE_POWER_SPEED_LOOKUP_TABLE_SIZE, %object
.size STEPS_MAX_WIND_TURBINE_POWER_SPEED_LOOKUP_TABLE_SIZE, 4
STEPS_MAX_WIND_TURBINE_POWER_SPEED_LOOKUP_TABLE_SIZE:
.word 24
.global STEPS_MAX_VDCOL_TABLE_SIZE
.align 2
.type STEPS_MAX_VDCOL_TABLE_SIZE, %object
.size STEPS_MAX_VDCOL_TABLE_SIZE, 4
STEPS_MAX_VDCOL_TABLE_SIZE:
.word 10
.global STEPS_MAX_HVDC_BYPASS_RECORD_SIZE
.align 2
.type STEPS_MAX_HVDC_BYPASS_RECORD_SIZE, %object
.size STEPS_MAX_HVDC_BYPASS_RECORD_SIZE, 4
STEPS_MAX_HVDC_BYPASS_RECORD_SIZE:
.word 10
.global STEPS_SHORT_STRING_SIZE
.align 2
.type STEPS_SHORT_STRING_SIZE, %object
.size STEPS_SHORT_STRING_SIZE, 4
STEPS_SHORT_STRING_SIZE:
.word 64
.global STEPS_MEDIUM_STRING_SIZE
.align 2
.type STEPS_MEDIUM_STRING_SIZE, %object
.size STEPS_MEDIUM_STRING_SIZE, 4
STEPS_MEDIUM_STRING_SIZE:
.word 128
.global STEPS_LONG_STRING_SIZE
.align 2
.type STEPS_LONG_STRING_SIZE, %object
.size STEPS_LONG_STRING_SIZE, 4
STEPS_LONG_STRING_SIZE:
.word 256
.global STEPS_METER_TYPE_STRING_SIZE
.align 2
.type STEPS_METER_TYPE_STRING_SIZE, %object
.size STEPS_METER_TYPE_STRING_SIZE, 4
STEPS_METER_TYPE_STRING_SIZE:
.word 64
.global STEPS_MODEL_MAX_ALLOWED_DEVICE_COUNT
.align 2
.type STEPS_MODEL_MAX_ALLOWED_DEVICE_COUNT, %object
.size STEPS_MODEL_MAX_ALLOWED_DEVICE_COUNT, 4
STEPS_MODEL_MAX_ALLOWED_DEVICE_COUNT:
.word 2
.global STEPS_MAX_DC_NETWORK_BUS_SIZE
.align 2
.type STEPS_MAX_DC_NETWORK_BUS_SIZE, %object
.size STEPS_MAX_DC_NETWORK_BUS_SIZE, 4
STEPS_MAX_DC_NETWORK_BUS_SIZE:
.word 20
.global STEPS_MAX_DC_NETWORK_LINE_SIZE
.align 2
.type STEPS_MAX_DC_NETWORK_LINE_SIZE, %object
.size STEPS_MAX_DC_NETWORK_LINE_SIZE, 4
STEPS_MAX_DC_NETWORK_LINE_SIZE:
.word 10
.global STEPS_MAGIC1
.align 2
.type STEPS_MAGIC1, %object
.size STEPS_MAGIC1, 4
STEPS_MAGIC1:
.word 621877636
.global STEPS_MAGIC2
.align 2
.type STEPS_MAGIC2, %object
.size STEPS_MAGIC2, 4
STEPS_MAGIC2:
.word 40966531
.global STEPS_MAGIC3
.align 2
.type STEPS_MAGIC3, %object
.size STEPS_MAGIC3, 4
STEPS_MAGIC3:
.word 20389910
.global STEPS_MAGIC4
.align 2
.type STEPS_MAGIC4, %object
.size STEPS_MAGIC4, 4
STEPS_MAGIC4:
.word 7807000
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global test_vreinterprets32_p16
.type test_vreinterprets32_p16, %function
test_vreinterprets32_p16:
.LFB4340:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
ldr d0, [sp, 8]
str d0, [sp, 24]
ldr d0, [sp, 24]
str d0, [sp, 16]
nop
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE4340:
.size test_vreinterprets32_p16, .-test_vreinterprets32_p16
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC0:
.string "%s"
.text
.align 2
.global main
.type main, %function
main:
.LFB0:
.cfi_startproc
sub sp, sp, #2048
.cfi_def_cfa_offset 2048
stp x29, x30, [sp]
.cfi_offset 29, -2048
.cfi_offset 30, -2040
mov x29, sp
str w0, [sp, 28]
str x1, [sp, 16]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 2040]
mov x1, 0
str wzr, [sp, 32]
b .L2
.L3:
ldr w1, [sp, 36]
ldr w0, [sp, 32]
cmp w1, w0
ble .L2
ldr w0, [sp, 36]
str w0, [sp, 32]
add x1, sp, 40
add x0, sp, 1040
bl copy
.L2:
add x0, sp, 40
mov w1, 1000
bl getlin
str w0, [sp, 36]
ldr w0, [sp, 36]
cmp w0, 0
bgt .L3
ldr w0, [sp, 32]
cmp w0, 0
ble .L4
add x0, sp, 1040
mov x1, x0
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl printf
.L4:
mov w0, 0
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 2040]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L6
bl __stack_chk_fail
.L6:
mov w0, w1
ldp x29, x30, [sp]
add sp, sp, 2048
.cfi_restore 29
.cfi_restore 30
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size main, .-main
.align 2
.global getlin
.type getlin, %function
getlin:
.LFB1:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
str w1, [sp, 20]
str wzr, [sp, 44]
b .L8
.L10:
ldrsw x0, [sp, 44]
ldr x1, [sp, 24]
add x0, x1, x0
ldr w1, [sp, 40]
and w1, w1, 255
strb w1, [x0]
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L8:
ldr w0, [sp, 20]
sub w0, w0, #1
ldr w1, [sp, 44]
cmp w1, w0
bge .L9
bl getchar
str w0, [sp, 40]
ldr w0, [sp, 40]
cmn w0, #1
beq .L9
ldr w0, [sp, 40]
cmp w0, 10
bne .L10
.L9:
ldr w0, [sp, 40]
cmp w0, 10
bne .L11
ldrsw x0, [sp, 44]
ldr x1, [sp, 24]
add x0, x1, x0
ldr w1, [sp, 40]
and w1, w1, 255
strb w1, [x0]
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L11:
ldrsw x0, [sp, 44]
ldr x1, [sp, 24]
add x0, x1, x0
strb wzr, [x0]
ldr w0, [sp, 44]
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE1:
.size getlin, .-getlin
.align 2
.global copy
.type copy, %function
copy:
.LFB2:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str x0, [sp, 8]
str x1, [sp]
str wzr, [sp, 28]
b .L14
.L15:
ldr w0, [sp, 28]
add w0, w0, 1
str w0, [sp, 28]
.L14:
ldrsw x0, [sp, 28]
ldr x1, [sp]
add x1, x1, x0
ldrsw x0, [sp, 28]
ldr x2, [sp, 8]
add x0, x2, x0
ldrb w1, [x1]
strb w1, [x0]
ldrb w0, [x0]
cmp w0, 10
bne .L15
nop
nop
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE2:
.size copy, .-copy
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global check
.type check, %function
check:
.LFB0:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str w0, [sp, 12]
ldr w0, [sp, 12]
cmp w0, 1
bne .L4
mov w0, 0
b .L3
.L4:
nop
.L2:
mov w0, 0
.L3:
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size check, .-check
.align 2
.global main
.type main, %function
main:
.LFB1:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str wzr, [sp, 20]
str wzr, [sp, 24]
ldr w0, [sp, 24]
cmp w0, 0
bne .L6
ldr w0, [sp, 20]
add w0, w0, 1
str w0, [sp, 20]
ldr w0, [sp, 20]
bl check
str w0, [sp, 28]
ldr w0, [sp, 28]
b .L8
.L6:
mov w0, 0
.L8:
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE1:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global findNumber
.type findNumber, %function
findNumber:
.LFB0:
.cfi_startproc
sub sp, sp, #48
.cfi_def_cfa_offset 48
str x0, [sp, 24]
str x1, [sp, 16]
str x2, [sp, 8]
str w3, [sp, 4]
str wzr, [sp, 40]
ldr x0, [sp, 8]
ldr w0, [x0]
str w0, [sp, 44]
ldr x0, [sp, 24]
cmp x0, 0
bne .L4
mov w0, 0
b .L3
.L8:
ldrsw x0, [sp, 40]
lsl x0, x0, 4
ldr x1, [sp, 24]
add x0, x1, x0
ldrsw x1, [sp, 44]
ldr w0, [x0, x1, lsl 2]
ldr w1, [sp, 4]
cmp w1, w0
bne .L5
ldr x0, [sp, 16]
ldr w1, [sp, 40]
str w1, [x0]
ldr x0, [sp, 8]
ldr w1, [sp, 44]
str w1, [x0]
mov w0, 1
b .L3
.L5:
ldrsw x0, [sp, 40]
lsl x0, x0, 4
ldr x1, [sp, 24]
add x0, x1, x0
ldrsw x1, [sp, 44]
ldr w0, [x0, x1, lsl 2]
ldr w1, [sp, 4]
cmp w1, w0
ble .L6
ldr w0, [sp, 40]
add w0, w0, 1
str w0, [sp, 40]
b .L4
.L6:
ldrsw x0, [sp, 40]
lsl x0, x0, 4
ldr x1, [sp, 24]
add x0, x1, x0
ldrsw x1, [sp, 44]
ldr w0, [x0, x1, lsl 2]
ldr w1, [sp, 4]
cmp w1, w0
bge .L4
ldr w0, [sp, 44]
sub w0, w0, #1
str w0, [sp, 44]
.L4:
ldr w0, [sp, 40]
cmp w0, 3
bgt .L7
ldr w0, [sp, 44]
cmp w0, 0
blt .L7
ldr x0, [sp, 24]
cmp x0, 0
bne .L8
.L7:
mov w0, 0
.L3:
add sp, sp, 48
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size findNumber, .-findNumber
.section .rodata
.align 3
.LC1:
.string "%d,%d\n"
.text
.align 2
.global main
.type main, %function
main:
.LFB1:
.cfi_startproc
stp x29, x30, [sp, -128]!
.cfi_def_cfa_offset 128
.cfi_offset 29, -128
.cfi_offset 30, -120
mov x29, sp
str w0, [sp, 28]
str x1, [sp, 16]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 120]
mov x1, 0
mov w0, 3
str w0, [sp, 44]
mov w0, 3
str w0, [sp, 48]
adrp x0, .LC0
add x1, x0, :lo12:.LC0
add x0, sp, 56
ldp q0, q1, [x1]
stp q0, q1, [x0]
ldp q0, q1, [x1, 32]
stp q0, q1, [x0, 32]
add x2, sp, 48
add x1, sp, 44
add x0, sp, 56
mov w3, 7
bl findNumber
str w0, [sp, 52]
ldr w0, [sp, 44]
ldr w1, [sp, 48]
mov w2, w1
mov w1, w0
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl printf
mov w0, 0
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 120]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L11
bl __stack_chk_fail
.L11:
mov w0, w1
ldp x29, x30, [sp], 128
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE1:
.size main, .-main
.section .rodata
.align 3
.LC0:
.word 1
.word 2
.word 8
.word 9
.word 2
.word 4
.word 9
.word 12
.word 4
.word 7
.word 10
.word 13
.word 6
.word 8
.word 11
.word 15
.text
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.global WPD_FUNCTIONAL_CATEGORY_VIDEO_CAPTURE
.section .rodata
.align 3
.type WPD_FUNCTIONAL_CATEGORY_VIDEO_CAPTURE, %object
.size WPD_FUNCTIONAL_CATEGORY_VIDEO_CAPTURE, 24
WPD_FUNCTIONAL_CATEGORY_VIDEO_CAPTURE:
.xword 3795738475
.hword 29251
.hword 17322
.ascii "\215\361\016\263\331h\251\030"
.zero 4
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global main
.type main, %function
main:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 56]
mov x1, 0
add x0, sp, 20
str x0, [sp, 32]
ldr w0, [sp, 48]
mov w1, w0
ldr w0, [sp, 20]
add w0, w1, w0
add w0, w0, 8
str w0, [sp, 24]
ldr w0, [sp, 24]
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 56]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L3
bl __stack_chk_fail
.L3:
mov w0, w1
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC0:
.string "-------------------------------------------"
.text
.align 2
.global println
.type println, %function
println:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -16]!
.cfi_def_cfa_offset 16
.cfi_offset 29, -16
.cfi_offset 30, -8
mov x29, sp
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl printf
mov w0, 10
bl putchar
nop
ldp x29, x30, [sp], 16
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size println, .-println
.section .rodata
.align 3
.LC1:
.string "C\350\257\255\350\250\200\344\270\255\346\226\207\347\275\221"
.align 3
.LC2:
.string "http://c.biancheng.net"
.align 3
.LC3:
.string "c"
.string ""
.string ""
.string " "
.string ""
.string ""
.string "i"
.string ""
.string ""
.string "s"
.string ""
.string ""
.string " "
.string ""
.string ""
.string "%"
.string ""
.string ""
.string "s"
.string ""
.string ""
.string "\n"
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.align 3
.LC4:
.string "c size is %ld\n"
.align 3
.LC5:
.string "\345\217\202"
.align 3
.LC6:
.string "%d\n"
.align 3
.LC7:
.string "a->%c,\t b->%c,\t cap->%d\n"
.align 3
.LC8:
.string "z->%c\n"
.align 3
.LC9:
.string "123abc"
.text
.align 2
.global main
.type main, %function
main:
.LFB1:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl puts
adrp x0, .LC2
add x0, x0, :lo12:.LC2
bl puts
mov w0, 20013
str w0, [sp, 28]
ldr w0, [sp, 28]
bl putwchar
mov w0, 10
bl putwchar
ldr w1, [sp, 28]
adrp x0, .LC3
add x0, x0, :lo12:.LC3
bl wprintf
mov x1, 4
adrp x0, .LC4
add x0, x0, :lo12:.LC4
bl printf
adrp x0, .LC5
add x0, x0, :lo12:.LC5
ldr w0, [x0]
str w0, [sp, 32]
ldr w1, [sp, 32]
adrp x0, .LC6
add x0, x0, :lo12:.LC6
bl printf
bl println
mov w0, 32
str w0, [sp, 36]
mov w0, 49
strb w0, [sp, 25]
mov w0, 97
strb w0, [sp, 26]
mov w0, 97
strb w0, [sp, 27]
ldrb w0, [sp, 25]
ldrb w1, [sp, 26]
ldr w3, [sp, 36]
mov w2, w1
mov w1, w0
adrp x0, .LC7
add x0, x0, :lo12:.LC7
bl printf
ldrb w1, [sp, 27]
ldr w0, [sp, 36]
sub w0, w1, w0
mov w1, w0
adrp x0, .LC8
add x0, x0, :lo12:.LC8
bl printf
bl println
adrp x0, .LC9
add x0, x0, :lo12:.LC9
str x0, [sp, 40]
ldr x0, [sp, 40]
bl puts
bl println
adrp x0, .LC2
add x0, x0, :lo12:.LC2
bl puts
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl puts
mov w0, 0
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE1:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC0:
.string "Enter fahrenheit: "
.align 3
.LC1:
.string "%f/n"
.align 3
.LC2:
.string "Centigrade: %.2f"
.text
.align 2
.global main
.type main, %function
main:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 24]
mov x1, 0
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl printf
add x0, sp, 16
mov x1, x0
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl __isoc99_scanf
ldr s1, [sp, 16]
movi v0.2s, 0x42, lsl 24
fsub s0, s1, s0
fcvt d0, s0
adrp x0, .LC3
ldr d1, [x0, #:lo12:.LC3]
fdiv d0, d0, d1
fcvt s0, d0
str s0, [sp, 20]
ldr s0, [sp, 20]
fcvt d0, s0
adrp x0, .LC2
add x0, x0, :lo12:.LC2
bl printf
nop
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [sp, 24]
ldr x1, [x0]
subs x2, x2, x1
mov x1, 0
beq .L3
bl __stack_chk_fail
.L3:
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size main, .-main
.section .rodata
.align 3
.LC3:
.word -858993459
.word 1073532108
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global reverse
.type reverse, %function
reverse:
.LFB0:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str x0, [sp, 8]
str w1, [sp, 4]
str w2, [sp]
b .L2
.L3:
ldrsw x0, [sp, 4]
ldr x1, [sp, 8]
add x0, x1, x0
ldrb w0, [x0]
strb w0, [sp, 31]
ldrsw x0, [sp]
ldr x1, [sp, 8]
add x1, x1, x0
ldrsw x0, [sp, 4]
ldr x2, [sp, 8]
add x0, x2, x0
ldrb w1, [x1]
strb w1, [x0]
ldrsw x0, [sp]
ldr x1, [sp, 8]
add x0, x1, x0
ldrb w1, [sp, 31]
strb w1, [x0]
ldr w0, [sp, 4]
add w0, w0, 1
str w0, [sp, 4]
ldr w0, [sp]
sub w0, w0, #1
str w0, [sp]
.L2:
ldr w1, [sp, 4]
ldr w0, [sp]
cmp w1, w0
blt .L3
nop
nop
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size reverse, .-reverse
.section .rodata
.align 3
.LC0:
.string "%s"
.text
.align 2
.global rev
.type rev, %function
rev:
.LFB1:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str x19, [sp, 16]
.cfi_offset 19, -48
str x0, [sp, 40]
ldr x0, [sp, 40]
bl strlen
sub w0, w0, #1
mov w2, w0
mov w1, 0
ldr x0, [sp, 40]
bl reverse
str wzr, [sp, 56]
str wzr, [sp, 60]
b .L5
.L7:
ldrsw x0, [sp, 60]
ldr x1, [sp, 40]
add x0, x1, x0
ldrb w0, [x0]
cmp w0, 32
bne .L6
ldr w0, [sp, 60]
sub w0, w0, #1
mov w2, w0
ldr w1, [sp, 56]
ldr x0, [sp, 40]
bl reverse
ldr w0, [sp, 60]
add w0, w0, 1
str w0, [sp, 56]
.L6:
ldr w0, [sp, 60]
add w0, w0, 1
str w0, [sp, 60]
.L5:
ldrsw x19, [sp, 60]
ldr x0, [sp, 40]
bl strlen
cmp x19, x0
bcc .L7
ldr w0, [sp, 60]
sub w0, w0, #1
mov w2, w0
ldr w1, [sp, 56]
ldr x0, [sp, 40]
bl reverse
ldr x1, [sp, 40]
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl printf
nop
ldr x19, [sp, 16]
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_restore 19
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE1:
.size rev, .-rev
.section .rodata
.align 3
.LC2:
.string "\n%d, %d"
.align 3
.LC3:
.string "%d"
.align 3
.LC4:
.string "\n%x"
.text
.align 2
.global main
.type main, %function
main:
.LFB2:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 56]
mov x1, 0
adrp x0, .LC1
add x0, x0, :lo12:.LC1
add x2, sp, 32
mov x3, x0
ldp x0, x1, [x3]
stp x0, x1, [x2]
ldrb w0, [x3, 16]
strb w0, [x2, 16]
add x0, sp, 32
bl rev
mov w0, 2
str w0, [sp, 24]
mov w0, 3
str w0, [sp, 28]
ldr w0, [sp, 24]
add w1, w0, 1
str w1, [sp, 24]
ldr w1, [sp, 28]
add w1, w1, 1
str w1, [sp, 28]
ldr w1, [sp, 28]
mul w0, w1, w0
str w0, [sp, 24]
ldr w0, [sp, 24]
add w0, w0, 1
str w0, [sp, 24]
ldr w0, [sp, 28]
add w0, w0, 1
str w0, [sp, 28]
ldr w1, [sp, 28]
ldr w0, [sp, 24]
add w0, w1, w0
str w0, [sp, 28]
ldr w2, [sp, 28]
ldr w1, [sp, 24]
adrp x0, .LC2
add x0, x0, :lo12:.LC2
bl printf
mov x1, 8
adrp x0, .LC3
add x0, x0, :lo12:.LC3
bl printf
mov w1, -16
adrp x0, .LC4
add x0, x0, :lo12:.LC4
bl printf
mov w0, 0
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 56]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L10
bl __stack_chk_fail
.L10:
mov w0, w1
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE2:
.size main, .-main
.section .rodata
.align 3
.LC1:
.string "hello abcd world"
.text
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC0:
.string "%d\n"
.text
.align 2
.global main
.type main, %function
main:
.LFB6:
.cfi_startproc
stp x29, x30, [sp, -16]!
.cfi_def_cfa_offset 16
.cfi_offset 29, -16
.cfi_offset 30, -8
mov x29, sp
bl getppid
mov w1, w0
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl printf
mov w0, 0
ldp x29, x30, [sp], 16
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE6:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC0:
.string "ASSERTION ERROR"
.text
.align 2
.global asrt
.type asrt, %function
asrt:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str w0, [sp, 28]
ldr w0, [sp, 28]
cmp w0, 0
bne .L2
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl puts
bl abort
.L2:
nop
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size asrt, .-asrt
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global setpriority
.type setpriority, %function
setpriority:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str w0, [sp, 28]
str w1, [sp, 24]
str w2, [sp, 20]
ldr w3, [sp, 20]
ldr w2, [sp, 24]
ldr w1, [sp, 28]
mov w0, 140
bl syscall
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size setpriority, .-setpriority
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.global gServos
.bss
.align 3
.type gServos, %object
.size gServos, 16
gServos:
.zero 16
.section .rodata
.align 3
.LC0:
.string "/dev/mem"
.align 3
.LC1:
.string "Mapping memory for absolute memory access failed -- Test Try\n"
.text
.align 2
.global servo_init
.type servo_init, %function
servo_init:
.LFB6:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
mov w1, 2
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl open
mov w1, w0
adrp x0, gServos
add x0, x0, :lo12:gServos
str w1, [x0, 8]
mov x0, 1074593792
str x0, [sp, 24]
adrp x0, gServos
add x0, x0, :lo12:gServos
mov w1, 255
str w1, [x0, 12]
adrp x0, gServos
add x0, x0, :lo12:gServos
ldr w0, [x0, 12]
sxtw x1, w0
adrp x0, gServos
add x0, x0, :lo12:gServos
ldr w0, [x0, 8]
ldr x2, [sp, 24]
mov x5, x2
mov w4, w0
mov w3, 1
mov w2, 3
mov x0, 0
bl mmap
mov x1, x0
adrp x0, gServos
add x0, x0, :lo12:gServos
str x1, [x0]
adrp x0, gServos
add x0, x0, :lo12:gServos
ldr x0, [x0]
cmn x0, #1
bne .L2
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl perror
mov w0, 1
b .L3
.L2:
adrp x0, gServos
add x0, x0, :lo12:gServos
ldr x0, [x0]
add x0, x0, 256
mov w1, 150
str w1, [x0]
adrp x0, gServos
add x0, x0, :lo12:gServos
ldr x0, [x0]
add x0, x0, 260
mov w1, 190
str w1, [x0]
adrp x0, gServos
add x0, x0, :lo12:gServos
ldr x0, [x0]
add x0, x0, 264
mov w1, 190
str w1, [x0]
adrp x0, gServos
add x0, x0, :lo12:gServos
ldr x0, [x0]
add x0, x0, 268
mov w1, 100
str w1, [x0]
adrp x0, gServos
add x0, x0, :lo12:gServos
ldr x0, [x0]
add x0, x0, 272
mov w1, 150
str w1, [x0]
mov w0, 0
.L3:
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE6:
.size servo_init, .-servo_init
.align 2
.global servo_move
.type servo_move, %function
servo_move:
.LFB7:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str w0, [sp, 12]
str w1, [sp, 8]
ldr w0, [sp, 12]
cmp w0, 5
beq .L5
ldr w0, [sp, 12]
cmp w0, 5
bgt .L12
ldr w0, [sp, 12]
cmp w0, 4
beq .L7
ldr w0, [sp, 12]
cmp w0, 4
bgt .L12
ldr w0, [sp, 12]
cmp w0, 3
beq .L8
ldr w0, [sp, 12]
cmp w0, 3
bgt .L12
ldr w0, [sp, 12]
cmp w0, 1
beq .L9
ldr w0, [sp, 12]
cmp w0, 2
beq .L10
b .L12
.L9:
adrp x0, gServos
add x0, x0, :lo12:gServos
ldr x0, [x0]
add x0, x0, 256
ldr w1, [sp, 8]
str w1, [x0]
b .L11
.L10:
adrp x0, gServos
add x0, x0, :lo12:gServos
ldr x0, [x0]
add x0, x0, 260
ldr w1, [sp, 8]
str w1, [x0]
b .L11
.L8:
adrp x0, gServos
add x0, x0, :lo12:gServos
ldr x0, [x0]
add x0, x0, 264
ldr w1, [sp, 8]
str w1, [x0]
b .L11
.L7:
adrp x0, gServos
add x0, x0, :lo12:gServos
ldr x0, [x0]
add x0, x0, 268
ldr w1, [sp, 8]
str w1, [x0]
b .L11
.L5:
adrp x0, gServos
add x0, x0, :lo12:gServos
ldr x0, [x0]
add x0, x0, 272
ldr w1, [sp, 8]
str w1, [x0]
b .L11
.L12:
nop
.L11:
nop
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE7:
.size servo_move, .-servo_move
.align 2
.global servo_moveHelper
.type servo_moveHelper, %function
servo_moveHelper:
.LFB8:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str w0, [sp, 28]
str w1, [sp, 24]
str w2, [sp, 20]
adrp x0, gServos
add x0, x0, :lo12:gServos
ldr x1, [x0]
ldr w0, [sp, 28]
lsl w0, w0, 2
sxtw x0, w0
add x0, x0, 150
add x0, x1, x0
ldr w0, [x0]
str w0, [sp, 44]
ldr w1, [sp, 24]
ldr w0, [sp, 44]
cmp w1, w0
bge .L14
ldr w0, [sp, 20]
neg w0, w0
str w0, [sp, 20]
.L14:
ldr w0, [sp, 44]
str w0, [sp, 40]
b .L15
.L16:
ldr w1, [sp, 40]
ldr w0, [sp, 28]
bl servo_move
mov w0, 3392
movk w0, 0x3, lsl 16
bl usleep
ldr w0, [sp, 20]
mov w1, 26215
movk w1, 0x6666, lsl 16
smull x1, w0, w1
lsr x1, x1, 32
asr w1, w1, 1
asr w0, w0, 31
sub w0, w1, w0
ldr w1, [sp, 40]
add w0, w1, w0
str w0, [sp, 40]
.L15:
ldr w1, [sp, 40]
ldr w0, [sp, 44]
sub w1, w1, w0
ldr w2, [sp, 44]
ldr w0, [sp, 24]
sub w0, w2, w0
eor w0, w1, w0
cmp w0, 0
bge .L16
ldr w1, [sp, 24]
ldr w0, [sp, 28]
bl servo_move
nop
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE8:
.size servo_moveHelper, .-servo_moveHelper
.align 2
.global servo_release
.type servo_release, %function
servo_release:
.LFB9:
.cfi_startproc
stp x29, x30, [sp, -16]!
.cfi_def_cfa_offset 16
.cfi_offset 29, -16
.cfi_offset 30, -8
mov x29, sp
adrp x0, gServos
add x0, x0, :lo12:gServos
ldr x2, [x0]
adrp x0, gServos
add x0, x0, :lo12:gServos
ldr w0, [x0, 12]
sxtw x0, w0
mov x1, x0
mov x0, x2
bl munmap
adrp x0, gServos
add x0, x0, :lo12:gServos
ldr w0, [x0, 8]
bl close
nop
ldp x29, x30, [sp], 16
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE9:
.size servo_release, .-servo_release
.section .rodata
.align 3
.LC2:
.string "\n------------- Robot TESTING --------------------\n"
.align 3
.LC3:
.string "Enter servo number (1-5) or enter 0 to exit:"
.align 3
.LC4:
.string "%d"
.align 3
.LC5:
.string "Enter position (60 - 240): Speed in degrees/s:"
.align 3
.LC6:
.string "%d %d"
.text
.align 2
.global main
.type main, %function
main:
.LFB10:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 40]
mov x1, 0
str wzr, [sp, 28]
str wzr, [sp, 32]
mov w0, 10
str w0, [sp, 36]
adrp x0, .LC2
add x0, x0, :lo12:.LC2
bl puts
bl servo_init
cmp w0, 0
beq .L19
mov w0, -1
b .L22
.L19:
adrp x0, .LC3
add x0, x0, :lo12:.LC3
bl puts
add x0, sp, 28
mov x1, x0
adrp x0, .LC4
add x0, x0, :lo12:.LC4
bl __isoc99_scanf
ldr w0, [sp, 28]
cmp w0, 0
beq .L21
adrp x0, .LC5
add x0, x0, :lo12:.LC5
bl puts
add x1, sp, 36
add x0, sp, 32
mov x2, x1
mov x1, x0
adrp x0, .LC6
add x0, x0, :lo12:.LC6
bl __isoc99_scanf
ldr w0, [sp, 28]
ldr w1, [sp, 32]
ldr w2, [sp, 36]
bl servo_moveHelper
.L21:
ldr w0, [sp, 28]
cmp w0, 0
bne .L19
bl servo_release
mov w0, 0
.L22:
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 40]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L23
bl __stack_chk_fail
.L23:
mov w0, w1
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE10:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global main
.type main, %function
main:
.LFB6:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 40]
mov x1, 0
add x0, sp, 24
bl foo
mov w0, 0
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 40]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L3
bl __stack_chk_fail
.L3:
mov w0, w1
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE6:
.size main, .-main
.align 2
.global foo
.type foo, %function
foo:
.LFB7:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str x0, [sp, 8]
str wzr, [sp, 16]
b .L5
.L8:
mov w1, 3
ldr w0, [sp, 16]
sub w0, w1, w0
str w0, [sp, 24]
ldr w1, [sp, 24]
mov w0, w1
lsl w0, w0, 2
add w1, w0, w1
adrp x0, t16.1
add x0, x0, :lo12:t16.1
sxtw x1, w1
ldr s0, [x0, x1, lsl 2]
str s0, [sp, 28]
ldr w0, [sp, 24]
add w0, w0, 1
str w0, [sp, 20]
b .L6
.L7:
ldr w0, [sp, 20]
lsl w1, w0, 2
ldr w0, [sp, 24]
add w1, w1, w0
adrp x0, t16.1
add x0, x0, :lo12:t16.1
sxtw x1, w1
ldr s1, [x0, x1, lsl 2]
ldr s0, [sp, 28]
fmul s0, s1, s0
adrp x0, tmp.0
add x0, x0, :lo12:tmp.0
ldrsw x1, [sp, 24]
str s0, [x0, x1, lsl 2]
ldr w0, [sp, 20]
add w0, w0, 1
str w0, [sp, 20]
.L6:
ldr w0, [sp, 20]
cmp w0, 3
ble .L7
ldr w0, [sp, 16]
add w0, w0, 1
str w0, [sp, 16]
.L5:
ldr w0, [sp, 16]
cmp w0, 3
ble .L8
adrp x0, tmp.0
add x0, x0, :lo12:tmp.0
ldr s0, [x0]
ldr x0, [sp, 8]
str s0, [x0]
ldr x0, [sp, 8]
add x0, x0, 4
adrp x1, tmp.0
add x1, x1, :lo12:tmp.0
ldr s0, [x1, 4]
str s0, [x0]
ldr x0, [sp, 8]
add x0, x0, 8
adrp x1, tmp.0
add x1, x1, :lo12:tmp.0
ldr s0, [x1, 8]
str s0, [x0]
ldr x0, [sp, 8]
add x0, x0, 12
adrp x1, tmp.0
add x1, x1, :lo12:tmp.0
ldr s0, [x1, 12]
str s0, [x0]
nop
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE7:
.size foo, .-foo
.data
.align 3
.type t16.1, %object
.size t16.1, 64
t16.1:
.word 1065353216
.word 1073741824
.word 1077936128
.word 1082130432
.word 1084227584
.word 1086324736
.word 1088421888
.word 1090519040
.word 1091567616
.word 1092616192
.word 1093664768
.word 1094713344
.word 1095761920
.word 1096810496
.word 1097859072
.word 1098907648
.local tmp.0
.comm tmp.0,16,8
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.global library
.bss
.align 3
.type library, %object
.size library, 8
library:
.zero 8
.text
.align 2
.global loadLib
.type loadLib, %function
loadLib:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str x0, [sp, 24]
adrp x0, library
add x0, x0, :lo12:library
ldr x0, [x0]
cmp x0, 0
beq .L2
mov w0, -1
b .L3
.L2:
ldr x0, [sp, 24]
cmp x0, 0
beq .L4
ldr x0, [sp, 24]
ldrb w0, [x0]
cmp w0, 0
bne .L5
.L4:
mov w0, -2
b .L3
.L5:
mov w1, 2
ldr x0, [sp, 24]
bl dlopen
mov x1, x0
adrp x0, library
add x0, x0, :lo12:library
str x1, [x0]
adrp x0, library
add x0, x0, :lo12:library
ldr x0, [x0]
cmp x0, 0
bne .L6
mov w0, -3
b .L3
.L6:
mov w0, 0
.L3:
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size loadLib, .-loadLib
.align 2
.global unloadLib
.type unloadLib, %function
unloadLib:
.LFB1:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
adrp x0, library
add x0, x0, :lo12:library
ldr x0, [x0]
cmp x0, 0
bne .L8
mov w0, -1
b .L9
.L8:
adrp x0, library
add x0, x0, :lo12:library
ldr x0, [x0]
bl dlclose
str w0, [sp, 28]
adrp x0, library
add x0, x0, :lo12:library
str xzr, [x0]
ldr w0, [sp, 28]
.L9:
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE1:
.size unloadLib, .-unloadLib
.align 2
.global getFunction
.type getFunction, %function
getFunction:
.LFB2:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
adrp x0, library
add x0, x0, :lo12:library
ldr x0, [x0]
cmp x0, 0
bne .L11
mov x0, 0
b .L12
.L11:
adrp x0, library
add x0, x0, :lo12:library
ldr x0, [x0]
ldr x1, [sp, 24]
bl dlsym
str x0, [sp, 40]
ldr x0, [sp, 40]
cmp x0, 0
bne .L13
mov x0, 0
b .L12
.L13:
ldr x0, [sp, 40]
.L12:
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE2:
.size getFunction, .-getFunction
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global ft_toupper
.type ft_toupper, %function
ft_toupper:
.LFB0:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str w0, [sp, 12]
ldr w0, [sp, 12]
cmp w0, 96
ble .L2
ldr w0, [sp, 12]
cmp w0, 122
bgt .L2
ldr w0, [sp, 12]
sub w0, w0, #32
str w0, [sp, 12]
ldr w0, [sp, 12]
b .L3
.L2:
ldr w0, [sp, 12]
.L3:
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size ft_toupper, .-ft_toupper
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global main
.type main, %function
main:
.LFB0:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
mov w0, 5
str w0, [sp, 12]
.L4:
ldr w0, [sp, 12]
add w0, w0, 1
str w0, [sp, 12]
ldr w0, [sp, 12]
cmp w0, 99
ble .L7
b .L4
.L7:
nop
ldr w0, [sp, 12]
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global hash
.type hash, %function
hash:
.LFB6:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str x0, [sp, 8]
strb wzr, [sp, 27]
str wzr, [sp, 28]
b .L2
.L3:
ldr w0, [sp, 28]
ldr x1, [sp, 8]
add x0, x1, x0
ldrb w1, [x0]
ldrb w0, [sp, 27]
eor w0, w1, w0
strb w0, [sp, 27]
ldr w0, [sp, 28]
add w0, w0, 1
str w0, [sp, 28]
.L2:
ldr w0, [sp, 28]
cmp w0, 7
bls .L3
ldrb w0, [sp, 27]
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE6:
.size hash, .-hash
.align 2
.global main
.type main, %function
main:
.LFB7:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
mov x0, 4
bl malloc
str x0, [sp, 24]
ldr x0, [sp, 24]
str wzr, [x0]
ldr x0, [sp, 24]
bl hash
and w0, w0, 255
and x0, x0, 255
and x1, x0, 15
ldr x0, [sp, 24]
orr x0, x1, x0
str x0, [sp, 32]
ldr x0, [sp, 32]
and x0, x0, -16
str x0, [sp, 40]
ldr x0, [sp, 40]
ldr w0, [x0]
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE7:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC0:
.string "Quantos dias tem em...?\nDigite, primeiro, um numero qualquer de anos\nDepois, digite um numero qualquer de dias\nApos isso irei te dizer quanto isso equivale em dias!"
.align 3
.LC1:
.string "%d%d"
.align 3
.LC2:
.string "Voce me deu um total de %d dias\n"
.text
.align 2
.global main
.type main, %function
main:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 40]
mov x1, 0
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl puts
add x1, sp, 32
add x0, sp, 28
mov x2, x1
mov x1, x0
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl __isoc99_scanf
ldr w1, [sp, 28]
mov w0, w1
lsl w0, w0, 1
add w0, w0, w1
lsl w0, w0, 2
mov w1, w0
ldr w0, [sp, 32]
add w0, w1, w0
str w0, [sp, 32]
ldr w1, [sp, 32]
mov w0, w1
lsl w0, w0, 4
sub w0, w0, w1
lsl w0, w0, 1
str w0, [sp, 36]
ldr w1, [sp, 36]
adrp x0, .LC2
add x0, x0, :lo12:.LC2
bl printf
mov w0, 0
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 40]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L3
bl __stack_chk_fail
.L3:
mov w0, w1
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC0:
.string "Child PID: %d\n"
.align 3
.LC1:
.string "program.c"
.align 3
.LC2:
.string "printf(\"Child PID: %d\\n\", getpid()) != 0"
.align 3
.LC3:
.string "Parent PID: %d\n"
.align 3
.LC4:
.string "printf(\"Parent PID: %d\\n\", getppid()) != 0"
.align 3
.LC5:
.string "Process: %d %d\n"
.align 3
.LC6:
.string "printf(\"Process: %d %d\\n\", getpid(), i) != 0"
.text
.align 2
.global main
.type main, %function
main:
.LFB6:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str w0, [sp, 28]
str x1, [sp, 16]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 56]
mov x1, 0
bl getpid
mov w1, w0
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl printf
cmp w0, 0
bne .L2
adrp x0, __PRETTY_FUNCTION__.0
add x3, x0, :lo12:__PRETTY_FUNCTION__.0
mov w2, 9
adrp x0, .LC1
add x1, x0, :lo12:.LC1
adrp x0, .LC2
add x0, x0, :lo12:.LC2
bl __assert_fail
.L2:
bl getppid
mov w1, w0
adrp x0, .LC3
add x0, x0, :lo12:.LC3
bl printf
cmp w0, 0
bne .L3
adrp x0, __PRETTY_FUNCTION__.0
add x3, x0, :lo12:__PRETTY_FUNCTION__.0
mov w2, 10
adrp x0, .LC1
add x1, x0, :lo12:.LC1
adrp x0, .LC4
add x0, x0, :lo12:.LC4
bl __assert_fail
.L3:
str wzr, [sp, 36]
ldr w0, [sp, 28]
cmp w0, 2
bne .L4
ldr x0, [sp, 16]
add x0, x0, 8
ldr x0, [x0]
add x1, sp, 40
mov w2, 0
bl strtol
str x0, [sp, 48]
mov w0, 1
str w0, [sp, 36]
b .L5
.L7:
bl getpid
ldr w2, [sp, 36]
mov w1, w0
adrp x0, .LC5
add x0, x0, :lo12:.LC5
bl printf
cmp w0, 0
bne .L6
adrp x0, __PRETTY_FUNCTION__.0
add x3, x0, :lo12:__PRETTY_FUNCTION__.0
mov w2, 16
adrp x0, .LC1
add x1, x0, :lo12:.LC1
adrp x0, .LC6
add x0, x0, :lo12:.LC6
bl __assert_fail
.L6:
ldr w0, [sp, 36]
add w0, w0, 1
str w0, [sp, 36]
.L5:
ldrsw x0, [sp, 36]
ldr x1, [sp, 48]
cmp x1, x0
bge .L7
.L4:
ldr w0, [sp, 36]
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 56]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L9
bl __stack_chk_fail
.L9:
mov w0, w1
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE6:
.size main, .-main
.section .rodata
.align 3
.type __PRETTY_FUNCTION__.0, %object
.size __PRETTY_FUNCTION__.0, 5
__PRETTY_FUNCTION__.0:
.string "main"
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC0:
.string "%[^\n]"
.align 3
.LC1:
.string "Hello, World!"
.align 3
.LC2:
.string "%s"
.text
.align 2
.global main
.type main, %function
main:
.LFB6:
.cfi_startproc
stp x29, x30, [sp, -128]!
.cfi_def_cfa_offset 128
.cfi_offset 29, -128
.cfi_offset 30, -120
mov x29, sp
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 120]
mov x1, 0
add x0, sp, 16
mov x1, x0
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl __isoc99_scanf
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl puts
add x0, sp, 16
mov x1, x0
adrp x0, .LC2
add x0, x0, :lo12:.LC2
bl printf
mov w0, 0
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 120]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L3
bl __stack_chk_fail
.L3:
mov w0, w1
ldp x29, x30, [sp], 128
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE6:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC0:
.string "%c %d"
.text
.align 2
.global main
.type main, %function
main:
.LFB0:
.cfi_startproc
mov x12, 11088
sub sp, sp, x12
.cfi_def_cfa_offset 11088
stp x29, x30, [sp]
.cfi_offset 29, -11088
.cfi_offset 30, -11080
mov x29, sp
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 11080]
mov x1, 0
add x0, sp, 48
mov x1, 1024
mov x2, x1
mov w1, 0
bl memset
str wzr, [sp, 28]
str wzr, [sp, 32]
str wzr, [sp, 36]
add x0, sp, 1072
bl gets
add x0, sp, 1072
bl strlen
str w0, [sp, 40]
str wzr, [sp, 28]
b .L2
.L3:
ldrsw x0, [sp, 28]
add x1, sp, 1072
ldrb w0, [x1, x0]
str w0, [sp, 44]
ldrsw x0, [sp, 44]
lsl x0, x0, 2
add x1, sp, 48
ldr w0, [x1, x0]
add w2, w0, 1
ldrsw x0, [sp, 44]
lsl x0, x0, 2
add x1, sp, 48
str w2, [x1, x0]
ldr w0, [sp, 28]
add w0, w0, 1
str w0, [sp, 28]
.L2:
ldr w1, [sp, 28]
ldr w0, [sp, 40]
cmp w1, w0
blt .L3
ldr w0, [sp, 48]
str w0, [sp, 32]
mov w0, 1
str w0, [sp, 28]
b .L4
.L6:
ldrsw x0, [sp, 28]
lsl x0, x0, 2
add x1, sp, 48
ldr w0, [x1, x0]
ldr w1, [sp, 32]
cmp w1, w0
bge .L5
ldrsw x0, [sp, 28]
lsl x0, x0, 2
add x1, sp, 48
ldr w0, [x1, x0]
ldr w1, [sp, 32]
cmp w1, w0
beq .L5
ldrsw x0, [sp, 28]
lsl x0, x0, 2
add x1, sp, 48
ldr w0, [x1, x0]
str w0, [sp, 32]
ldr w0, [sp, 28]
str w0, [sp, 36]
.L5:
ldr w0, [sp, 28]
add w0, w0, 1
str w0, [sp, 28]
.L4:
ldr w0, [sp, 28]
cmp w0, 255
ble .L6
ldr w2, [sp, 32]
ldr w1, [sp, 36]
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl printf
mov w0, 0
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 11080]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L8
bl __stack_chk_fail
.L8:
mov w0, w1
ldp x29, x30, [sp]
mov x12, 11088
add sp, sp, x12
.cfi_restore 29
.cfi_restore 30
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.local cont
.comm cont,8,8
.local sys_pagesize
.comm sys_pagesize,4,4
.local cont_left
.comm cont_left,4,4
.align 2
.global _sbrk
.type _sbrk, %function
_sbrk:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str w0, [sp, 28]
adrp x0, sys_pagesize
add x0, x0, :lo12:sys_pagesize
ldr w0, [x0]
cmp w0, 0
bne .L2
bl getpagesize
mov w1, w0
adrp x0, sys_pagesize
add x0, x0, :lo12:sys_pagesize
str w1, [x0]
.L2:
adrp x0, cont
add x0, x0, :lo12:cont
ldr x0, [x0]
cmp x0, 0
beq .L3
adrp x0, cont_left
add x0, x0, :lo12:cont_left
ldr w0, [x0]
ldr w1, [sp, 28]
cmp w1, w0
bgt .L3
adrp x0, cont
add x0, x0, :lo12:cont
ldr x0, [x0]
str x0, [sp, 40]
adrp x0, cont_left
add x0, x0, :lo12:cont_left
ldr w1, [x0]
ldr w0, [sp, 28]
sub w1, w1, w0
adrp x0, cont_left
add x0, x0, :lo12:cont_left
str w1, [x0]
adrp x0, cont_left
add x0, x0, :lo12:cont_left
ldr w0, [x0]
cmp w0, 0
beq .L4
adrp x0, cont
add x0, x0, :lo12:cont
ldr x1, [x0]
ldrsw x0, [sp, 28]
add x1, x1, x0
adrp x0, cont
add x0, x0, :lo12:cont
str x1, [x0]
b .L5
.L4:
adrp x0, cont
add x0, x0, :lo12:cont
str xzr, [x0]
.L5:
ldr x0, [sp, 40]
b .L6
.L3:
ldrsw x0, [sp, 28]
mov x5, 0
mov w4, -1
mov w3, 33
mov w2, 3
mov x1, x0
mov x0, 0
bl mmap
str x0, [sp, 40]
ldr x0, [sp, 40]
cmp x0, 0
beq .L7
adrp x0, sys_pagesize
add x0, x0, :lo12:sys_pagesize
ldr w2, [x0]
adrp x0, sys_pagesize
add x0, x0, :lo12:sys_pagesize
ldr w1, [x0]
ldr w0, [sp, 28]
sdiv w3, w0, w1
mul w1, w3, w1
sub w0, w0, w1
sub w1, w2, w0
adrp x0, cont_left
add x0, x0, :lo12:cont_left
str w1, [x0]
adrp x0, cont_left
add x0, x0, :lo12:cont_left
ldr w0, [x0]
cmp w0, 0
beq .L8
ldrsw x0, [sp, 28]
ldr x1, [sp, 40]
add x1, x1, x0
adrp x0, cont
add x0, x0, :lo12:cont
str x1, [x0]
b .L7
.L8:
adrp x0, cont
add x0, x0, :lo12:cont
str xzr, [x0]
.L7:
ldr x0, [sp, 40]
.L6:
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size _sbrk, .-_sbrk
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.type Cd, %function
Cd:
.LFB7:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str x0, [sp, 8]
ldr x0, [sp, 8]
ldr d0, [x0, 8]
ldr x0, [sp, 8]
ldr d2, [x0]
movi d1, #0
fmul d1, d0, d1
fadd d1, d2, d1
fmov d2, d1
fmov d1, d0
fmov d0, d2
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE7:
.size Cd, .-Cd
.align 2
.type _pCd, %function
_pCd:
.LFB9:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str x0, [sp, 8]
ldr x0, [sp, 8]
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE9:
.size _pCd, .-_pCd
.data
.align 3
.type junk, %object
.size junk, 30
junk:
.string "\n@(#)LIBF77 VERSION 19990503\n"
.text
.align 2
.type spow_ui, %function
spow_ui:
.LFB10:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str s0, [sp, 12]
str w0, [sp, 8]
fmov s0, 1.0e+0
str s0, [sp, 20]
ldr w0, [sp, 8]
cmp w0, 0
beq .L6
ldr w0, [sp, 8]
cmp w0, 0
bge .L7
ldr w0, [sp, 8]
neg w0, w0
str w0, [sp, 8]
ldr s0, [sp, 12]
fmov s1, 1.0e+0
fdiv s0, s1, s0
str s0, [sp, 12]
.L7:
ldrsw x0, [sp, 8]
str x0, [sp, 24]
.L11:
ldr x0, [sp, 24]
and x0, x0, 1
cmp x0, 0
beq .L8
ldr s1, [sp, 20]
ldr s0, [sp, 12]
fmul s0, s1, s0
str s0, [sp, 20]
.L8:
ldr x0, [sp, 24]
lsr x0, x0, 1
str x0, [sp, 24]
ldr x0, [sp, 24]
cmp x0, 0
beq .L13
ldr s0, [sp, 12]
fmul s0, s0, s0
str s0, [sp, 12]
b .L11
.L13:
nop
.L6:
ldr s0, [sp, 20]
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE10:
.size spow_ui, .-spow_ui
.align 2
.type dpow_ui, %function
dpow_ui:
.LFB11:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str d0, [sp, 8]
str w0, [sp, 4]
fmov d0, 1.0e+0
str d0, [sp, 16]
ldr w0, [sp, 4]
cmp w0, 0
beq .L15
ldr w0, [sp, 4]
cmp w0, 0
bge .L16
ldr w0, [sp, 4]
neg w0, w0
str w0, [sp, 4]
ldr d0, [sp, 8]
fmov d1, 1.0e+0
fdiv d0, d1, d0
str d0, [sp, 8]
.L16:
ldrsw x0, [sp, 4]
str x0, [sp, 24]
.L20:
ldr x0, [sp, 24]
and x0, x0, 1
cmp x0, 0
beq .L17
ldr d1, [sp, 16]
ldr d0, [sp, 8]
fmul d0, d1, d0
str d0, [sp, 16]
.L17:
ldr x0, [sp, 24]
lsr x0, x0, 1
str x0, [sp, 24]
ldr x0, [sp, 24]
cmp x0, 0
beq .L22
ldr d0, [sp, 8]
fmul d0, d0, d0
str d0, [sp, 8]
b .L20
.L22:
nop
.L15:
ldr d0, [sp, 16]
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE11:
.size dpow_ui, .-dpow_ui
.align 2
.type cpow_ui, %function
cpow_ui:
.LFB12:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
fmov s2, s0
fmov s0, s1
fmov s1, s2
str s1, [sp, 24]
str s0, [sp, 28]
str w0, [sp, 20]
ldr s0, [sp, 24]
str s0, [sp, 32]
ldr s0, [sp, 28]
str s0, [sp, 36]
fmov s0, 1.0e+0
str s0, [sp, 56]
str wzr, [sp, 60]
ldr w0, [sp, 20]
cmp w0, 0
beq .L31
ldr w0, [sp, 20]
cmp w0, 0
bge .L25
ldr w0, [sp, 20]
neg w0, w0
str w0, [sp, 20]
ldr s3, [sp, 36]
ldr s2, [sp, 32]
movi v1.2s, #0
fmov s0, 1.0e+0
bl __divsc3
fmov s2, s0
fmov s0, s1
str s2, [sp, 24]
str s0, [sp, 28]
ldr s0, [sp, 24]
str s0, [sp, 32]
ldr s0, [sp, 28]
str s0, [sp, 36]
.L25:
ldrsw x0, [sp, 20]
str x0, [sp, 48]
str wzr, [sp, 44]
fmov s0, 1.0e+0
str s0, [sp, 40]
.L29:
ldr x0, [sp, 48]
and x0, x0, 1
cmp x0, 0
beq .L26
ldr s3, [sp, 36]
ldr s2, [sp, 32]
ldr s1, [sp, 44]
ldr s0, [sp, 40]
bl __mulsc3
fmov s2, s0
fmov s0, s1
str s2, [sp, 56]
str s0, [sp, 60]
ldr s0, [sp, 56]
str s0, [sp, 40]
ldr s0, [sp, 60]
str s0, [sp, 44]
.L26:
ldr x0, [sp, 48]
lsr x0, x0, 1
str x0, [sp, 48]
ldr x0, [sp, 48]
cmp x0, 0
beq .L32
ldr s3, [sp, 36]
ldr s2, [sp, 32]
ldr s1, [sp, 36]
ldr s0, [sp, 32]
bl __mulsc3
fmov s2, s0
fmov s0, s1
str s2, [sp, 24]
str s0, [sp, 28]
ldr s0, [sp, 24]
str s0, [sp, 32]
ldr s0, [sp, 28]
str s0, [sp, 36]
b .L29
.L31:
str wzr, [sp, 44]
fmov s0, 1.0e+0
str s0, [sp, 40]
b .L24
.L32:
nop
.L24:
ldr s1, [sp, 40]
ldr s0, [sp, 44]
fmov s2, s1
fmov s1, s0
fmov s0, s2
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE12:
.size cpow_ui, .-cpow_ui
.align 2
.type zpow_ui, %function
zpow_ui:
.LFB13:
.cfi_startproc
stp x29, x30, [sp, -112]!
.cfi_def_cfa_offset 112
.cfi_offset 29, -112
.cfi_offset 30, -104
mov x29, sp
fmov d2, d0
fmov d0, d1
fmov d1, d2
str d1, [sp, 32]
str d0, [sp, 40]
str w0, [sp, 28]
ldr d0, [sp, 32]
str d0, [sp, 64]
ldr d0, [sp, 40]
str d0, [sp, 72]
fmov d0, 1.0e+0
str d0, [sp, 96]
str xzr, [sp, 104]
ldr w0, [sp, 28]
cmp w0, 0
beq .L41
ldr w0, [sp, 28]
cmp w0, 0
bge .L35
ldr w0, [sp, 28]
neg w0, w0
str w0, [sp, 28]
ldr d3, [sp, 72]
ldr d2, [sp, 64]
movi d1, #0
fmov d0, 1.0e+0
bl __divdc3
fmov d2, d0
fmov d0, d1
str d2, [sp, 32]
str d0, [sp, 40]
ldr d0, [sp, 32]
str d0, [sp, 64]
ldr d0, [sp, 40]
str d0, [sp, 72]
.L35:
ldrsw x0, [sp, 28]
str x0, [sp, 56]
str xzr, [sp, 88]
fmov d0, 1.0e+0
str d0, [sp, 80]
.L39:
ldr x0, [sp, 56]
and x0, x0, 1
cmp x0, 0
beq .L36
ldr d3, [sp, 72]
ldr d2, [sp, 64]
ldr d1, [sp, 88]
ldr d0, [sp, 80]
bl __muldc3
fmov d2, d0
fmov d0, d1
str d2, [sp, 96]
str d0, [sp, 104]
ldr d0, [sp, 96]
str d0, [sp, 80]
ldr d0, [sp, 104]
str d0, [sp, 88]
.L36:
ldr x0, [sp, 56]
lsr x0, x0, 1
str x0, [sp, 56]
ldr x0, [sp, 56]
cmp x0, 0
beq .L42
ldr d3, [sp, 72]
ldr d2, [sp, 64]
ldr d1, [sp, 72]
ldr d0, [sp, 64]
bl __muldc3
fmov d2, d0
fmov d0, d1
str d2, [sp, 32]
str d0, [sp, 40]
ldr d0, [sp, 32]
str d0, [sp, 64]
ldr d0, [sp, 40]
str d0, [sp, 72]
b .L39
.L41:
str xzr, [sp, 88]
fmov d0, 1.0e+0
str d0, [sp, 80]
b .L34
.L42:
nop
.L34:
ldr d1, [sp, 80]
ldr d0, [sp, 88]
fmov d2, d1
fmov d1, d0
fmov d0, d2
ldp x29, x30, [sp], 112
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE13:
.size zpow_ui, .-zpow_ui
.align 2
.type pow_ii, %function
pow_ii:
.LFB14:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str w0, [sp, 12]
str w1, [sp, 8]
ldr w0, [sp, 8]
cmp w0, 0
bgt .L44
ldr w0, [sp, 8]
cmp w0, 0
beq .L45
ldr w0, [sp, 12]
cmp w0, 1
bne .L46
.L45:
mov w0, 1
str w0, [sp, 20]
b .L44
.L46:
ldr w0, [sp, 12]
cmn w0, #1
beq .L47
ldr w0, [sp, 12]
cmp w0, 0
bne .L48
mov w1, 1
ldr w0, [sp, 12]
sdiv w0, w1, w0
b .L49
.L48:
mov w0, 0
.L49:
str w0, [sp, 20]
b .L44
.L47:
ldr w0, [sp, 8]
neg w0, w0
str w0, [sp, 8]
.L44:
ldr w0, [sp, 8]
cmp w0, 0
bgt .L50
ldr w0, [sp, 8]
cmp w0, 0
beq .L51
ldr w0, [sp, 12]
cmp w0, 1
beq .L51
ldr w0, [sp, 12]
cmn w0, #1
bne .L51
.L50:
ldrsw x0, [sp, 8]
str x0, [sp, 24]
mov w0, 1
str w0, [sp, 20]
.L55:
ldr x0, [sp, 24]
and x0, x0, 1
cmp x0, 0
beq .L52
ldr w1, [sp, 20]
ldr w0, [sp, 12]
mul w0, w1, w0
str w0, [sp, 20]
.L52:
ldr x0, [sp, 24]
lsr x0, x0, 1
str x0, [sp, 24]
ldr x0, [sp, 24]
cmp x0, 0
beq .L57
ldr w0, [sp, 12]
mul w0, w0, w0
str w0, [sp, 12]
b .L55
.L57:
nop
.L51:
ldr w0, [sp, 20]
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE14:
.size pow_ii, .-pow_ii
.align 2
.type dmaxloc_, %function
dmaxloc_:
.LFB15:
.cfi_startproc
sub sp, sp, #48
.cfi_def_cfa_offset 48
str x0, [sp, 24]
str w1, [sp, 20]
str w2, [sp, 16]
str x3, [sp, 8]
ldrsw x0, [sp, 20]
lsl x0, x0, 3
sub x0, x0, #8
ldr x1, [sp, 24]
add x0, x1, x0
ldr d0, [x0]
str d0, [sp, 40]
ldr w0, [sp, 20]
str w0, [sp, 36]
ldr w0, [sp, 20]
add w0, w0, 1
str w0, [sp, 32]
b .L59
.L62:
ldrsw x0, [sp, 32]
lsl x0, x0, 3
sub x0, x0, #8
ldr x1, [sp, 24]
add x0, x1, x0
ldr d0, [x0]
ldr d1, [sp, 40]
fcmpe d1, d0
bmi .L64
b .L60
.L64:
ldr w0, [sp, 32]
str w0, [sp, 36]
ldrsw x0, [sp, 32]
lsl x0, x0, 3
sub x0, x0, #8
ldr x1, [sp, 24]
add x0, x1, x0
ldr d0, [x0]
str d0, [sp, 40]
.L60:
ldr w0, [sp, 32]
add w0, w0, 1
str w0, [sp, 32]
.L59:
ldr w1, [sp, 32]
ldr w0, [sp, 16]
cmp w1, w0
ble .L62
ldr w1, [sp, 36]
ldr w0, [sp, 20]
sub w0, w1, w0
add w0, w0, 1
add sp, sp, 48
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE15:
.size dmaxloc_, .-dmaxloc_
.align 2
.type smaxloc_, %function
smaxloc_:
.LFB16:
.cfi_startproc
sub sp, sp, #48
.cfi_def_cfa_offset 48
str x0, [sp, 24]
str w1, [sp, 20]
str w2, [sp, 16]
str x3, [sp, 8]
ldrsw x0, [sp, 20]
lsl x0, x0, 2
sub x0, x0, #4
ldr x1, [sp, 24]
add x0, x1, x0
ldr s0, [x0]
str s0, [sp, 36]
ldr w0, [sp, 20]
str w0, [sp, 44]
ldr w0, [sp, 20]
add w0, w0, 1
str w0, [sp, 40]
b .L66
.L69:
ldrsw x0, [sp, 40]
lsl x0, x0, 2
sub x0, x0, #4
ldr x1, [sp, 24]
add x0, x1, x0
ldr s0, [x0]
ldr s1, [sp, 36]
fcmpe s1, s0
bmi .L71
b .L67
.L71:
ldr w0, [sp, 40]
str w0, [sp, 44]
ldrsw x0, [sp, 40]
lsl x0, x0, 2
sub x0, x0, #4
ldr x1, [sp, 24]
add x0, x1, x0
ldr s0, [x0]
str s0, [sp, 36]
.L67:
ldr w0, [sp, 40]
add w0, w0, 1
str w0, [sp, 40]
.L66:
ldr w1, [sp, 40]
ldr w0, [sp, 16]
cmp w1, w0
ble .L69
ldr w1, [sp, 44]
ldr w0, [sp, 20]
sub w0, w1, w0
add w0, w0, 1
add sp, sp, 48
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE16:
.size smaxloc_, .-smaxloc_
.align 2
.type zdotc_, %function
zdotc_:
.LFB18:
.cfi_startproc
stp x29, x30, [sp, -128]!
.cfi_def_cfa_offset 128
.cfi_offset 29, -128
.cfi_offset 30, -120
mov x29, sp
stp d8, d9, [sp, 16]
.cfi_offset 72, -112
.cfi_offset 73, -104
str x0, [sp, 72]
str x1, [sp, 64]
str x2, [sp, 56]
str x3, [sp, 48]
str x4, [sp, 40]
str x5, [sp, 32]
ldr x0, [sp, 64]
ldr w0, [x0]
str w0, [sp, 84]
ldr x0, [sp, 48]
ldr w0, [x0]
str w0, [sp, 88]
ldr x0, [sp, 32]
ldr w0, [x0]
str w0, [sp, 92]
str xzr, [sp, 112]
str xzr, [sp, 120]
ldr w0, [sp, 88]
cmp w0, 1
bne .L73
ldr w0, [sp, 92]
cmp w0, 1
bne .L73
str wzr, [sp, 80]
str xzr, [sp, 104]
str xzr, [sp, 96]
b .L74
.L75:
ldrsw x0, [sp, 80]
lsl x0, x0, 4
ldr x1, [sp, 56]
add x0, x1, x0
bl Cd
fmov d2, d0
fmov d0, d1
fmov d1, d2
fmov d9, d1
fneg d8, d0
ldrsw x0, [sp, 80]
lsl x0, x0, 4
ldr x1, [sp, 40]
add x0, x1, x0
bl Cd
fmov d2, d0
fmov d0, d1
fmov d1, d0
fmov d0, d2
fmov d3, d1
fmov d2, d0
fmov d1, d8
fmov d0, d9
bl __muldc3
fmov d2, d0
fmov d0, d1
fmov d1, d2
fmov d2, d0
ldr d0, [sp, 96]
fadd d1, d1, d0
ldr d0, [sp, 104]
fadd d0, d2, d0
str d1, [sp, 112]
str d0, [sp, 120]
str d1, [sp, 96]
str d0, [sp, 104]
ldr w0, [sp, 80]
add w0, w0, 1
str w0, [sp, 80]
.L74:
ldr w1, [sp, 80]
ldr w0, [sp, 84]
cmp w1, w0
blt .L75
b .L76
.L73:
str wzr, [sp, 80]
str xzr, [sp, 104]
str xzr, [sp, 96]
b .L77
.L78:
ldr w1, [sp, 80]
ldr w0, [sp, 88]
mul w0, w1, w0
sxtw x0, w0
lsl x0, x0, 4
ldr x1, [sp, 56]
add x0, x1, x0
bl Cd
fmov d2, d0
fmov d0, d1
fmov d1, d2
fmov d9, d1
fneg d8, d0
ldr w1, [sp, 80]
ldr w0, [sp, 92]
mul w0, w1, w0
sxtw x0, w0
lsl x0, x0, 4
ldr x1, [sp, 40]
add x0, x1, x0
bl Cd
fmov d2, d0
fmov d0, d1
fmov d1, d0
fmov d0, d2
fmov d3, d1
fmov d2, d0
fmov d1, d8
fmov d0, d9
bl __muldc3
fmov d2, d0
fmov d0, d1
fmov d1, d2
fmov d2, d0
ldr d0, [sp, 96]
fadd d1, d1, d0
ldr d0, [sp, 104]
fadd d0, d2, d0
str d1, [sp, 112]
str d0, [sp, 120]
str d1, [sp, 96]
str d0, [sp, 104]
ldr w0, [sp, 80]
add w0, w0, 1
str w0, [sp, 80]
.L77:
ldr w1, [sp, 80]
ldr w0, [sp, 84]
cmp w1, w0
blt .L78
.L76:
ldr x0, [sp, 72]
bl _pCd
ldr d0, [sp, 96]
str d0, [x0]
ldr d0, [sp, 104]
str d0, [x0, 8]
nop
ldp d8, d9, [sp, 16]
ldp x29, x30, [sp], 128
.cfi_restore 30
.cfi_restore 29
.cfi_restore 72
.cfi_restore 73
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE18:
.size zdotc_, .-zdotc_
.local c_b1
.comm c_b1,16,8
.data
.align 3
.type c_b2, %object
.size c_b2, 16
c_b2:
.word 0
.word 1072693248
.word 0
.word 0
.align 2
.type c__3, %object
.size c__3, 4
c__3:
.word 3
.align 2
.type c__1, %object
.size c__1, 4
c__1:
.word 1
.section .rodata
.align 3
.LC0:
.string "ZLAGSY"
.align 3
.LC1:
.string "Lower"
.align 3
.LC2:
.string "Conjugate transpose"
.text
.align 2
.global zlagsy_
.type zlagsy_, %function
zlagsy_:
.LFB21:
.cfi_startproc
sub sp, sp, #384
.cfi_def_cfa_offset 384
stp x29, x30, [sp, 32]
.cfi_offset 29, -352
.cfi_offset 30, -344
add x29, sp, 32
str x19, [sp, 48]
stp d8, d9, [sp, 64]
stp d10, d11, [sp, 80]
.cfi_offset 19, -336
.cfi_offset 72, -320
.cfi_offset 73, -312
.cfi_offset 74, -304
.cfi_offset 75, -296
str x0, [sp, 152]
str x1, [sp, 144]
str x2, [sp, 136]
str x3, [sp, 128]
str x4, [sp, 120]
str x5, [sp, 112]
str x6, [sp, 104]
str x7, [sp, 96]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 376]
mov x1, 0
ldr x0, [sp, 136]
sub x0, x0, #8
str x0, [sp, 136]
ldr x0, [sp, 120]
ldr w0, [x0]
str w0, [sp, 200]
ldr w0, [sp, 200]
add w0, w0, 1
str w0, [sp, 204]
ldrsw x0, [sp, 204]
lsl x0, x0, 4
neg x0, x0
ldr x1, [sp, 128]
add x0, x1, x0
str x0, [sp, 128]
ldr x0, [sp, 112]
sub x0, x0, #4
str x0, [sp, 112]
ldr x0, [sp, 104]
sub x0, x0, #16
str x0, [sp, 104]
ldr x0, [sp, 96]
str wzr, [x0]
ldr x0, [sp, 152]
ldr w0, [x0]
cmp w0, 0
bge .L80
ldr x0, [sp, 96]
mov w1, -1
str w1, [x0]
b .L81
.L80:
ldr x0, [sp, 144]
ldr w0, [x0]
cmp w0, 0
blt .L82
ldr x0, [sp, 152]
ldr w1, [x0]
ldr x0, [sp, 144]
ldr w0, [x0]
cmp w1, w0
bgt .L83
.L82:
ldr x0, [sp, 96]
mov w1, -2
str w1, [x0]
b .L81
.L83:
ldr x0, [sp, 120]
ldr w1, [x0]
ldr x0, [sp, 152]
ldr w0, [x0]
mov w2, 1
cmp w0, 0
csel w0, w0, w2, gt
cmp w1, w0
bge .L81
ldr x0, [sp, 96]
mov w1, -5
str w1, [x0]
.L81:
ldr x0, [sp, 96]
ldr w0, [x0]
cmp w0, 0
bge .L84
ldr x0, [sp, 96]
ldr w0, [x0]
neg w0, w0
str w0, [sp, 172]
add x0, sp, 172
mov x1, x0
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl xerbla_
mov w0, 0
b .L114
.L84:
ldr x0, [sp, 152]
ldr w0, [x0]
str w0, [sp, 172]
mov w0, 1
str w0, [sp, 188]
b .L86
.L89:
ldr x0, [sp, 152]
ldr w0, [x0]
str w0, [sp, 176]
ldr w0, [sp, 188]
add w0, w0, 1
str w0, [sp, 184]
b .L87
.L88:
ldr w1, [sp, 188]
ldr w0, [sp, 200]
mul w1, w1, w0
ldr w0, [sp, 184]
add w0, w1, w0
str w0, [sp, 180]
ldr w0, [sp, 180]
sxtw x0, w0
lsl x0, x0, 4
ldr x1, [sp, 128]
add x0, x1, x0
str xzr, [x0]
ldr w0, [sp, 180]
sxtw x0, w0
lsl x0, x0, 4
ldr x1, [sp, 128]
add x0, x1, x0
str xzr, [x0, 8]
ldr w0, [sp, 184]
add w0, w0, 1
str w0, [sp, 184]
.L87:
ldr w0, [sp, 176]
ldr w1, [sp, 184]
cmp w1, w0
ble .L88
ldr w0, [sp, 188]
add w0, w0, 1
str w0, [sp, 188]
.L86:
ldr w0, [sp, 172]
ldr w1, [sp, 188]
cmp w1, w0
ble .L89
ldr x0, [sp, 152]
ldr w0, [x0]
str w0, [sp, 172]
mov w0, 1
str w0, [sp, 184]
b .L90
.L91:
ldr w1, [sp, 184]
ldr w0, [sp, 200]
mul w1, w1, w0
ldr w0, [sp, 184]
add w0, w1, w0
str w0, [sp, 176]
ldr w0, [sp, 184]
str w0, [sp, 180]
ldr w0, [sp, 180]
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 136]
add x1, x1, x0
ldr w0, [sp, 176]
sxtw x0, w0
lsl x0, x0, 4
ldr x2, [sp, 128]
add x0, x2, x0
ldr d0, [x1]
str d0, [x0]
ldr w0, [sp, 176]
sxtw x0, w0
lsl x0, x0, 4
ldr x1, [sp, 128]
add x0, x1, x0
str xzr, [x0, 8]
ldr w0, [sp, 184]
add w0, w0, 1
str w0, [sp, 184]
.L90:
ldr w0, [sp, 172]
ldr w1, [sp, 184]
cmp w1, w0
ble .L91
ldr x0, [sp, 152]
ldr w0, [x0]
sub w0, w0, #1
str w0, [sp, 184]
b .L92
.L99:
ldr x0, [sp, 152]
ldr w1, [x0]
ldr w0, [sp, 184]
sub w0, w1, w0
add w0, w0, 1
str w0, [sp, 172]
ldr x0, [sp, 112]
add x1, x0, 4
ldr x0, [sp, 104]
add x2, x0, 16
add x0, sp, 172
mov x3, x2
mov x2, x0
adrp x0, c__3
add x0, x0, :lo12:c__3
bl zlarnv_
ldr x0, [sp, 152]
ldr w1, [x0]
ldr w0, [sp, 184]
sub w0, w1, w0
add w0, w0, 1
str w0, [sp, 172]
ldr x0, [sp, 104]
add x1, x0, 16
add x3, sp, 172
adrp x0, c__1
add x2, x0, :lo12:c__1
mov x0, x3
bl dznrm2_
str d0, [sp, 232]
ldr x0, [sp, 104]
add x0, x0, 16
bl Cd
fmov d2, d0
fmov d0, d1
fmov d1, d0
fmov d0, d2
bl cabs
fmov d1, d0
ldr d0, [sp, 232]
fdiv d0, d0, d1
str d0, [sp, 240]
ldr x0, [sp, 104]
add x0, x0, 16
ldr d1, [x0]
ldr d0, [sp, 240]
fmul d0, d1, d0
str d0, [sp, 248]
ldr x0, [sp, 104]
add x0, x0, 16
ldr d1, [x0, 8]
ldr d0, [sp, 240]
fmul d0, d1, d0
str d0, [sp, 256]
ldr d0, [sp, 248]
str d0, [sp, 328]
ldr d0, [sp, 256]
str d0, [sp, 336]
ldr d0, [sp, 232]
fcmp d0, #0.0
bne .L93
str xzr, [sp, 360]
str xzr, [sp, 368]
b .L94
.L93:
ldr x0, [sp, 104]
add x0, x0, 16
ldr d1, [x0]
ldr d0, [sp, 328]
fadd d0, d1, d0
str d0, [sp, 248]
ldr x0, [sp, 104]
add x0, x0, 16
ldr d1, [x0, 8]
ldr d0, [sp, 336]
fadd d0, d1, d0
str d0, [sp, 256]
ldr d0, [sp, 248]
str d0, [sp, 344]
ldr d0, [sp, 256]
str d0, [sp, 352]
ldr x0, [sp, 152]
ldr w1, [x0]
ldr w0, [sp, 184]
sub w0, w1, w0
str w0, [sp, 172]
adrp x0, c_b2
add x0, x0, :lo12:c_b2
bl Cd
fmov d2, d0
fmov d0, d1
fmov d1, d2
fmov d8, d1
fmov d9, d0
add x0, sp, 344
bl Cd
fmov d2, d0
fmov d0, d1
fmov d1, d2
fmov d10, d1
fmov d11, d0
add x0, sp, 248
bl _pCd
mov x19, x0
fmov d3, d11
fmov d2, d10
fmov d1, d9
fmov d0, d8
bl __divdc3
fmov d2, d0
fmov d0, d1
fmov d1, d2
str d1, [x19]
str d0, [x19, 8]
ldr x0, [sp, 104]
add x2, x0, 32
add x1, sp, 248
add x4, sp, 172
adrp x0, c__1
add x3, x0, :lo12:c__1
mov x0, x4
bl zscal_
ldr x0, [sp, 104]
add x0, x0, 16
fmov d0, 1.0e+0
str d0, [x0]
ldr x0, [sp, 104]
add x0, x0, 16
str xzr, [x0, 8]
add x0, sp, 344
bl Cd
fmov d2, d0
fmov d0, d1
fmov d1, d2
fmov d8, d1
fmov d9, d0
add x0, sp, 328
bl Cd
fmov d2, d0
fmov d0, d1
fmov d1, d2
fmov d10, d1
fmov d11, d0
add x0, sp, 248
bl _pCd
mov x19, x0
fmov d3, d11
fmov d2, d10
fmov d1, d9
fmov d0, d8
bl __divdc3
fmov d2, d0
fmov d0, d1
fmov d1, d2
str d1, [x19]
str d0, [x19, 8]
ldr d0, [sp, 248]
str d0, [sp, 240]
ldr d0, [sp, 240]
str d0, [sp, 360]
str xzr, [sp, 368]
.L94:
ldr x0, [sp, 152]
ldr w1, [x0]
ldr w0, [sp, 184]
sub w0, w1, w0
add w0, w0, 1
str w0, [sp, 172]
ldr x0, [sp, 104]
add x1, x0, 16
add x3, sp, 172
adrp x0, c__1
add x2, x0, :lo12:c__1
mov x0, x3
bl zlacgv_
ldr x0, [sp, 152]
ldr w1, [x0]
ldr w0, [sp, 184]
sub w0, w1, w0
add w0, w0, 1
str w0, [sp, 172]
ldr w1, [sp, 184]
ldr w0, [sp, 200]
mul w1, w1, w0
ldr w0, [sp, 184]
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 4
ldr x1, [sp, 128]
add x3, x1, x0
ldr x0, [sp, 104]
add x4, x0, 16
ldr x0, [sp, 152]
ldr w0, [x0]
sxtw x0, w0
add x0, x0, 1
lsl x0, x0, 4
ldr x1, [sp, 104]
add x0, x1, x0
add x2, sp, 360
add x8, sp, 172
adrp x1, c__1
add x1, x1, :lo12:c__1
str x1, [sp, 8]
str x0, [sp]
adrp x0, c_b1
add x7, x0, :lo12:c_b1
adrp x0, c__1
add x6, x0, :lo12:c__1
mov x5, x4
ldr x4, [sp, 120]
mov x1, x8
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl zsymv_
ldr x0, [sp, 152]
ldr w1, [x0]
ldr w0, [sp, 184]
sub w0, w1, w0
add w0, w0, 1
str w0, [sp, 172]
ldr x0, [sp, 104]
add x1, x0, 16
add x3, sp, 172
adrp x0, c__1
add x2, x0, :lo12:c__1
mov x0, x3
bl zlacgv_
fmov d0, -5.0e-1
str d0, [sp, 280]
str xzr, [sp, 288]
ldr d1, [sp, 280]
ldr d0, [sp, 360]
fmul d1, d1, d0
ldr d2, [sp, 288]
ldr d0, [sp, 368]
fmul d0, d2, d0
fsub d0, d1, d0
str d0, [sp, 264]
ldr d1, [sp, 280]
ldr d0, [sp, 368]
fmul d1, d1, d0
ldr d2, [sp, 288]
ldr d0, [sp, 360]
fmul d0, d2, d0
fadd d0, d1, d0
str d0, [sp, 272]
ldr x0, [sp, 152]
ldr w1, [x0]
ldr w0, [sp, 184]
sub w0, w1, w0
add w0, w0, 1
str w0, [sp, 172]
ldr x0, [sp, 104]
add x2, x0, 16
ldr x0, [sp, 152]
ldr w0, [x0]
sxtw x0, w0
add x0, x0, 1
lsl x0, x0, 4
ldr x1, [sp, 104]
add x3, x1, x0
add x1, sp, 172
add x6, sp, 296
adrp x0, c__1
add x5, x0, :lo12:c__1
mov x4, x3
adrp x0, c__1
add x3, x0, :lo12:c__1
mov x0, x6
bl zdotc_
ldr d1, [sp, 264]
ldr d0, [sp, 296]
fmul d1, d1, d0
ldr d2, [sp, 272]
ldr d0, [sp, 304]
fmul d0, d2, d0
fsub d0, d1, d0
str d0, [sp, 248]
ldr d1, [sp, 264]
ldr d0, [sp, 304]
fmul d1, d1, d0
ldr d2, [sp, 272]
ldr d0, [sp, 296]
fmul d0, d2, d0
fadd d0, d1, d0
str d0, [sp, 256]
ldr d0, [sp, 248]
str d0, [sp, 312]
ldr d0, [sp, 256]
str d0, [sp, 320]
ldr x0, [sp, 152]
ldr w1, [x0]
ldr w0, [sp, 184]
sub w0, w1, w0
add w0, w0, 1
str w0, [sp, 172]
ldr x0, [sp, 104]
add x2, x0, 16
ldr x0, [sp, 152]
ldr w0, [x0]
sxtw x0, w0
add x0, x0, 1
lsl x0, x0, 4
ldr x1, [sp, 104]
add x3, x1, x0
add x1, sp, 312
add x6, sp, 172
adrp x0, c__1
add x5, x0, :lo12:c__1
mov x4, x3
adrp x0, c__1
add x3, x0, :lo12:c__1
mov x0, x6
bl zaxpy_
ldr x0, [sp, 152]
ldr w0, [x0]
str w0, [sp, 172]
ldr w0, [sp, 184]
str w0, [sp, 196]
b .L95
.L98:
ldr x0, [sp, 152]
ldr w0, [x0]
str w0, [sp, 176]
ldr w0, [sp, 196]
str w0, [sp, 192]
b .L96
.L97:
ldr w1, [sp, 196]
ldr w0, [sp, 200]
mul w1, w1, w0
ldr w0, [sp, 192]
add w0, w1, w0
str w0, [sp, 180]
ldr w1, [sp, 196]
ldr w0, [sp, 200]
mul w0, w1, w0
ldr w1, [sp, 192]
add w0, w1, w0
str w0, [sp, 208]
ldr w1, [sp, 192]
ldr w0, [sp, 184]
sub w0, w1, w0
add w0, w0, 1
str w0, [sp, 212]
ldr x0, [sp, 152]
ldr w1, [x0]
ldr w0, [sp, 196]
add w1, w1, w0
ldr w0, [sp, 184]
sub w0, w1, w0
add w0, w0, 1
str w0, [sp, 216]
ldrsw x0, [sp, 212]
lsl x0, x0, 4
ldr x1, [sp, 104]
add x0, x1, x0
ldr d1, [x0]
ldrsw x0, [sp, 216]
lsl x0, x0, 4
ldr x1, [sp, 104]
add x0, x1, x0
ldr d0, [x0]
fmul d1, d1, d0
ldrsw x0, [sp, 212]
lsl x0, x0, 4
ldr x1, [sp, 104]
add x0, x1, x0
ldr d2, [x0, 8]
ldrsw x0, [sp, 216]
lsl x0, x0, 4
ldr x1, [sp, 104]
add x0, x1, x0
ldr d0, [x0, 8]
fmul d0, d2, d0
fsub d0, d1, d0
str d0, [sp, 280]
ldrsw x0, [sp, 212]
lsl x0, x0, 4
ldr x1, [sp, 104]
add x0, x1, x0
ldr d1, [x0]
ldrsw x0, [sp, 216]
lsl x0, x0, 4
ldr x1, [sp, 104]
add x0, x1, x0
ldr d0, [x0, 8]
fmul d1, d1, d0
ldrsw x0, [sp, 212]
lsl x0, x0, 4
ldr x1, [sp, 104]
add x0, x1, x0
ldr d2, [x0, 8]
ldrsw x0, [sp, 216]
lsl x0, x0, 4
ldr x1, [sp, 104]
add x0, x1, x0
ldr d0, [x0]
fmul d0, d2, d0
fadd d0, d1, d0
str d0, [sp, 288]
ldrsw x0, [sp, 208]
lsl x0, x0, 4
ldr x1, [sp, 128]
add x0, x1, x0
ldr d1, [x0]
ldr d0, [sp, 280]
fsub d0, d1, d0
str d0, [sp, 264]
ldrsw x0, [sp, 208]
lsl x0, x0, 4
ldr x1, [sp, 128]
add x0, x1, x0
ldr d1, [x0, 8]
ldr d0, [sp, 288]
fsub d0, d1, d0
str d0, [sp, 272]
ldr x0, [sp, 152]
ldr w1, [x0]
ldr w0, [sp, 192]
add w1, w1, w0
ldr w0, [sp, 184]
sub w0, w1, w0
add w0, w0, 1
str w0, [sp, 220]
ldr w1, [sp, 196]
ldr w0, [sp, 184]
sub w0, w1, w0
add w0, w0, 1
str w0, [sp, 224]
ldrsw x0, [sp, 220]
lsl x0, x0, 4
ldr x1, [sp, 104]
add x0, x1, x0
ldr d1, [x0]
ldrsw x0, [sp, 224]
lsl x0, x0, 4
ldr x1, [sp, 104]
add x0, x1, x0
ldr d0, [x0]
fmul d1, d1, d0
ldrsw x0, [sp, 220]
lsl x0, x0, 4
ldr x1, [sp, 104]
add x0, x1, x0
ldr d2, [x0, 8]
ldrsw x0, [sp, 224]
lsl x0, x0, 4
ldr x1, [sp, 104]
add x0, x1, x0
ldr d0, [x0, 8]
fmul d0, d2, d0
fsub d0, d1, d0
str d0, [sp, 296]
ldrsw x0, [sp, 220]
lsl x0, x0, 4
ldr x1, [sp, 104]
add x0, x1, x0
ldr d1, [x0]
ldrsw x0, [sp, 224]
lsl x0, x0, 4
ldr x1, [sp, 104]
add x0, x1, x0
ldr d0, [x0, 8]
fmul d1, d1, d0
ldrsw x0, [sp, 220]
lsl x0, x0, 4
ldr x1, [sp, 104]
add x0, x1, x0
ldr d2, [x0, 8]
ldrsw x0, [sp, 224]
lsl x0, x0, 4
ldr x1, [sp, 104]
add x0, x1, x0
ldr d0, [x0]
fmul d0, d2, d0
fadd d0, d1, d0
str d0, [sp, 304]
ldr d1, [sp, 264]
ldr d0, [sp, 296]
fsub d0, d1, d0
str d0, [sp, 248]
ldr d1, [sp, 272]
ldr d0, [sp, 304]
fsub d0, d1, d0
str d0, [sp, 256]
ldr w0, [sp, 180]
sxtw x0, w0
lsl x0, x0, 4
ldr x1, [sp, 128]
add x0, x1, x0
ldr d0, [sp, 248]
str d0, [x0]
ldr w0, [sp, 180]
sxtw x0, w0
lsl x0, x0, 4
ldr x1, [sp, 128]
add x0, x1, x0
ldr d0, [sp, 256]
str d0, [x0, 8]
ldr w0, [sp, 192]
add w0, w0, 1
str w0, [sp, 192]
.L96:
ldr w0, [sp, 176]
ldr w1, [sp, 192]
cmp w1, w0
ble .L97
ldr w0, [sp, 196]
add w0, w0, 1
str w0, [sp, 196]
.L95:
ldr w0, [sp, 172]
ldr w1, [sp, 196]
cmp w1, w0
ble .L98
ldr w0, [sp, 184]
sub w0, w0, #1
str w0, [sp, 184]
.L92:
ldr w0, [sp, 184]
cmp w0, 0
bgt .L99
ldr x0, [sp, 152]
ldr w0, [x0]
sub w1, w0, #1
ldr x0, [sp, 144]
ldr w0, [x0]
sub w0, w1, w0
str w0, [sp, 172]
mov w0, 1
str w0, [sp, 184]
b .L100
.L109:
ldr x0, [sp, 152]
ldr w1, [x0]
ldr x0, [sp, 144]
ldr w0, [x0]
sub w1, w1, w0
ldr w0, [sp, 184]
sub w0, w1, w0
add w0, w0, 1
str w0, [sp, 176]
ldr x0, [sp, 144]
ldr w1, [x0]
ldr w0, [sp, 184]
add w1, w1, w0
ldr w2, [sp, 184]
ldr w0, [sp, 200]
mul w0, w2, w0
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 4
ldr x1, [sp, 128]
add x1, x1, x0
add x3, sp, 176
adrp x0, c__1
add x2, x0, :lo12:c__1
mov x0, x3
bl dznrm2_
str d0, [sp, 232]
ldr x0, [sp, 144]
ldr w1, [x0]
ldr w0, [sp, 184]
add w1, w1, w0
ldr w2, [sp, 184]
ldr w0, [sp, 200]
mul w0, w2, w0
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 4
ldr x1, [sp, 128]
add x0, x1, x0
bl Cd
fmov d2, d0
fmov d0, d1
fmov d1, d0
fmov d0, d2
bl cabs
fmov d1, d0
ldr d0, [sp, 232]
fdiv d0, d0, d1
str d0, [sp, 240]
ldr x0, [sp, 144]
ldr w1, [x0]
ldr w0, [sp, 184]
add w1, w1, w0
ldr w2, [sp, 184]
ldr w0, [sp, 200]
mul w0, w2, w0
add w0, w1, w0
str w0, [sp, 176]
ldr w0, [sp, 176]
sxtw x0, w0
lsl x0, x0, 4
ldr x1, [sp, 128]
add x0, x1, x0
ldr d1, [x0]
ldr d0, [sp, 240]
fmul d0, d1, d0
str d0, [sp, 248]
ldr w0, [sp, 176]
sxtw x0, w0
lsl x0, x0, 4
ldr x1, [sp, 128]
add x0, x1, x0
ldr d1, [x0, 8]
ldr d0, [sp, 240]
fmul d0, d1, d0
str d0, [sp, 256]
ldr d0, [sp, 248]
str d0, [sp, 328]
ldr d0, [sp, 256]
str d0, [sp, 336]
ldr d0, [sp, 232]
fcmp d0, #0.0
bne .L101
str xzr, [sp, 360]
str xzr, [sp, 368]
b .L102
.L101:
ldr x0, [sp, 144]
ldr w1, [x0]
ldr w0, [sp, 184]
add w1, w1, w0
ldr w2, [sp, 184]
ldr w0, [sp, 200]
mul w0, w2, w0
add w0, w1, w0
str w0, [sp, 176]
ldr w0, [sp, 176]
sxtw x0, w0
lsl x0, x0, 4
ldr x1, [sp, 128]
add x0, x1, x0
ldr d1, [x0]
ldr d0, [sp, 328]
fadd d0, d1, d0
str d0, [sp, 248]
ldr w0, [sp, 176]
sxtw x0, w0
lsl x0, x0, 4
ldr x1, [sp, 128]
add x0, x1, x0
ldr d1, [x0, 8]
ldr d0, [sp, 336]
fadd d0, d1, d0
str d0, [sp, 256]
ldr d0, [sp, 248]
str d0, [sp, 344]
ldr d0, [sp, 256]
str d0, [sp, 352]
ldr x0, [sp, 152]
ldr w1, [x0]
ldr x0, [sp, 144]
ldr w0, [x0]
sub w1, w1, w0
ldr w0, [sp, 184]
sub w0, w1, w0
str w0, [sp, 176]
adrp x0, c_b2
add x0, x0, :lo12:c_b2
bl Cd
fmov d2, d0
fmov d0, d1
fmov d1, d2
fmov d8, d1
fmov d9, d0
add x0, sp, 344
bl Cd
fmov d2, d0
fmov d0, d1
fmov d1, d2
fmov d10, d1
fmov d11, d0
add x0, sp, 248
bl _pCd
mov x19, x0
fmov d3, d11
fmov d2, d10
fmov d1, d9
fmov d0, d8
bl __divdc3
fmov d2, d0
fmov d0, d1
fmov d1, d2
str d1, [x19]
str d0, [x19, 8]
ldr x0, [sp, 144]
ldr w1, [x0]
ldr w0, [sp, 184]
add w0, w1, w0
add w1, w0, 1
ldr w2, [sp, 184]
ldr w0, [sp, 200]
mul w0, w2, w0
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 4
ldr x1, [sp, 128]
add x2, x1, x0
add x1, sp, 248
add x4, sp, 176
adrp x0, c__1
add x3, x0, :lo12:c__1
mov x0, x4
bl zscal_
ldr x0, [sp, 144]
ldr w1, [x0]
ldr w0, [sp, 184]
add w1, w1, w0
ldr w2, [sp, 184]
ldr w0, [sp, 200]
mul w0, w2, w0
add w0, w1, w0
str w0, [sp, 176]
ldr w0, [sp, 176]
sxtw x0, w0
lsl x0, x0, 4
ldr x1, [sp, 128]
add x0, x1, x0
fmov d0, 1.0e+0
str d0, [x0]
ldr w0, [sp, 176]
sxtw x0, w0
lsl x0, x0, 4
ldr x1, [sp, 128]
add x0, x1, x0
str xzr, [x0, 8]
add x0, sp, 344
bl Cd
fmov d2, d0
fmov d0, d1
fmov d1, d2
fmov d8, d1
fmov d9, d0
add x0, sp, 328
bl Cd
fmov d2, d0
fmov d0, d1
fmov d1, d2
fmov d10, d1
fmov d11, d0
add x0, sp, 248
bl _pCd
mov x19, x0
fmov d3, d11
fmov d2, d10
fmov d1, d9
fmov d0, d8
bl __divdc3
fmov d2, d0
fmov d0, d1
fmov d1, d2
str d1, [x19]
str d0, [x19, 8]
ldr d0, [sp, 248]
str d0, [sp, 240]
ldr d0, [sp, 240]
str d0, [sp, 360]
str xzr, [sp, 368]
.L102:
ldr x0, [sp, 152]
ldr w1, [x0]
ldr x0, [sp, 144]
ldr w0, [x0]
sub w1, w1, w0
ldr w0, [sp, 184]
sub w0, w1, w0
add w0, w0, 1
str w0, [sp, 176]
ldr x0, [sp, 144]
ldr w0, [x0]
sub w0, w0, #1
str w0, [sp, 180]
ldr x0, [sp, 144]
ldr w1, [x0]
ldr w0, [sp, 184]
add w1, w1, w0
ldr w0, [sp, 184]
add w2, w0, 1
ldr w0, [sp, 200]
mul w0, w2, w0
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 4
ldr x1, [sp, 128]
add x3, x1, x0
ldr x0, [sp, 144]
ldr w1, [x0]
ldr w0, [sp, 184]
add w1, w1, w0
ldr w2, [sp, 184]
ldr w0, [sp, 200]
mul w0, w2, w0
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 4
ldr x1, [sp, 128]
add x4, x1, x0
ldr x0, [sp, 104]
add x0, x0, 16
add x2, sp, 180
add x8, sp, 176
adrp x1, c__1
add x1, x1, :lo12:c__1
str x1, [sp, 16]
str x0, [sp, 8]
adrp x0, c_b1
add x0, x0, :lo12:c_b1
str x0, [sp]
adrp x0, c__1
add x7, x0, :lo12:c__1
mov x6, x4
ldr x5, [sp, 120]
mov x4, x3
adrp x0, c_b2
add x3, x0, :lo12:c_b2
mov x1, x8
adrp x0, .LC2
add x0, x0, :lo12:.LC2
bl zgemv_
ldr x0, [sp, 152]
ldr w1, [x0]
ldr x0, [sp, 144]
ldr w0, [x0]
sub w1, w1, w0
ldr w0, [sp, 184]
sub w0, w1, w0
add w0, w0, 1
str w0, [sp, 176]
ldr x0, [sp, 144]
ldr w0, [x0]
sub w0, w0, #1
str w0, [sp, 180]
ldr d0, [sp, 360]
fneg d0, d0
str d0, [sp, 248]
ldr d0, [sp, 368]
fneg d0, d0
str d0, [sp, 256]
ldr x0, [sp, 144]
ldr w1, [x0]
ldr w0, [sp, 184]
add w1, w1, w0
ldr w2, [sp, 184]
ldr w0, [sp, 200]
mul w0, w2, w0
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 4
ldr x1, [sp, 128]
add x3, x1, x0
ldr x0, [sp, 104]
add x4, x0, 16
ldr x0, [sp, 144]
ldr w1, [x0]
ldr w0, [sp, 184]
add w1, w1, w0
ldr w0, [sp, 184]
add w2, w0, 1
ldr w0, [sp, 200]
mul w0, w2, w0
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 4
ldr x1, [sp, 128]
add x5, x1, x0
add x2, sp, 248
add x1, sp, 180
add x8, sp, 176
ldr x0, [sp, 120]
str x0, [sp]
mov x7, x5
adrp x0, c__1
add x6, x0, :lo12:c__1
mov x5, x4
adrp x0, c__1
add x4, x0, :lo12:c__1
mov x0, x8
bl zgerc_
ldr x0, [sp, 152]
ldr w1, [x0]
ldr x0, [sp, 144]
ldr w0, [x0]
sub w1, w1, w0
ldr w0, [sp, 184]
sub w0, w1, w0
add w0, w0, 1
str w0, [sp, 176]
ldr x0, [sp, 144]
ldr w1, [x0]
ldr w0, [sp, 184]
add w1, w1, w0
ldr w2, [sp, 184]
ldr w0, [sp, 200]
mul w0, w2, w0
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 4
ldr x1, [sp, 128]
add x1, x1, x0
add x3, sp, 176
adrp x0, c__1
add x2, x0, :lo12:c__1
mov x0, x3
bl zlacgv_
ldr x0, [sp, 152]
ldr w1, [x0]
ldr x0, [sp, 144]
ldr w0, [x0]
sub w1, w1, w0
ldr w0, [sp, 184]
sub w0, w1, w0
add w0, w0, 1
str w0, [sp, 176]
ldr x0, [sp, 144]
ldr w1, [x0]
ldr w0, [sp, 184]
add w1, w1, w0
ldr x0, [sp, 144]
ldr w2, [x0]
ldr w0, [sp, 184]
add w2, w2, w0
ldr w0, [sp, 200]
mul w0, w2, w0
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 4
ldr x1, [sp, 128]
add x3, x1, x0
ldr x0, [sp, 144]
ldr w1, [x0]
ldr w0, [sp, 184]
add w1, w1, w0
ldr w2, [sp, 184]
ldr w0, [sp, 200]
mul w0, w2, w0
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 4
ldr x1, [sp, 128]
add x4, x1, x0
ldr x0, [sp, 104]
add x0, x0, 16
add x2, sp, 360
add x8, sp, 176
adrp x1, c__1
add x1, x1, :lo12:c__1
str x1, [sp, 8]
str x0, [sp]
adrp x0, c_b1
add x7, x0, :lo12:c_b1
adrp x0, c__1
add x6, x0, :lo12:c__1
mov x5, x4
ldr x4, [sp, 120]
mov x1, x8
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl zsymv_
ldr x0, [sp, 152]
ldr w1, [x0]
ldr x0, [sp, 144]
ldr w0, [x0]
sub w1, w1, w0
ldr w0, [sp, 184]
sub w0, w1, w0
add w0, w0, 1
str w0, [sp, 176]
ldr x0, [sp, 144]
ldr w1, [x0]
ldr w0, [sp, 184]
add w1, w1, w0
ldr w2, [sp, 184]
ldr w0, [sp, 200]
mul w0, w2, w0
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 4
ldr x1, [sp, 128]
add x1, x1, x0
add x3, sp, 176
adrp x0, c__1
add x2, x0, :lo12:c__1
mov x0, x3
bl zlacgv_
fmov d0, -5.0e-1
str d0, [sp, 280]
str xzr, [sp, 288]
ldr d1, [sp, 280]
ldr d0, [sp, 360]
fmul d1, d1, d0
ldr d2, [sp, 288]
ldr d0, [sp, 368]
fmul d0, d2, d0
fsub d0, d1, d0
str d0, [sp, 264]
ldr d1, [sp, 280]
ldr d0, [sp, 368]
fmul d1, d1, d0
ldr d2, [sp, 288]
ldr d0, [sp, 360]
fmul d0, d2, d0
fadd d0, d1, d0
str d0, [sp, 272]
ldr x0, [sp, 152]
ldr w1, [x0]
ldr x0, [sp, 144]
ldr w0, [x0]
sub w1, w1, w0
ldr w0, [sp, 184]
sub w0, w1, w0
add w0, w0, 1
str w0, [sp, 176]
ldr x0, [sp, 144]
ldr w1, [x0]
ldr w0, [sp, 184]
add w1, w1, w0
ldr w2, [sp, 184]
ldr w0, [sp, 200]
mul w0, w2, w0
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 4
ldr x1, [sp, 128]
add x2, x1, x0
ldr x0, [sp, 104]
add x3, x0, 16
add x1, sp, 176
add x6, sp, 296
adrp x0, c__1
add x5, x0, :lo12:c__1
mov x4, x3
adrp x0, c__1
add x3, x0, :lo12:c__1
mov x0, x6
bl zdotc_
ldr d1, [sp, 264]
ldr d0, [sp, 296]
fmul d1, d1, d0
ldr d2, [sp, 272]
ldr d0, [sp, 304]
fmul d0, d2, d0
fsub d0, d1, d0
str d0, [sp, 248]
ldr d1, [sp, 264]
ldr d0, [sp, 304]
fmul d1, d1, d0
ldr d2, [sp, 272]
ldr d0, [sp, 296]
fmul d0, d2, d0
fadd d0, d1, d0
str d0, [sp, 256]
ldr d0, [sp, 248]
str d0, [sp, 312]
ldr d0, [sp, 256]
str d0, [sp, 320]
ldr x0, [sp, 152]
ldr w1, [x0]
ldr x0, [sp, 144]
ldr w0, [x0]
sub w1, w1, w0
ldr w0, [sp, 184]
sub w0, w1, w0
add w0, w0, 1
str w0, [sp, 176]
ldr x0, [sp, 144]
ldr w1, [x0]
ldr w0, [sp, 184]
add w1, w1, w0
ldr w2, [sp, 184]
ldr w0, [sp, 200]
mul w0, w2, w0
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 4
ldr x1, [sp, 128]
add x2, x1, x0
ldr x0, [sp, 104]
add x3, x0, 16
add x1, sp, 312
add x6, sp, 176
adrp x0, c__1
add x5, x0, :lo12:c__1
mov x4, x3
adrp x0, c__1
add x3, x0, :lo12:c__1
mov x0, x6
bl zaxpy_
ldr x0, [sp, 152]
ldr w0, [x0]
str w0, [sp, 176]
ldr x0, [sp, 144]
ldr w0, [x0]
ldr w1, [sp, 184]
add w0, w1, w0
str w0, [sp, 196]
b .L103
.L106:
ldr x0, [sp, 152]
ldr w0, [x0]
str w0, [sp, 180]
ldr w0, [sp, 196]
str w0, [sp, 192]
b .L104
.L105:
ldr w1, [sp, 196]
ldr w0, [sp, 200]
mul w0, w1, w0
ldr w1, [sp, 192]
add w0, w1, w0
str w0, [sp, 208]
ldr w1, [sp, 196]
ldr w0, [sp, 200]
mul w0, w1, w0
ldr w1, [sp, 192]
add w0, w1, w0
str w0, [sp, 212]
ldr w1, [sp, 184]
ldr w0, [sp, 200]
mul w0, w1, w0
ldr w1, [sp, 192]
add w0, w1, w0
str w0, [sp, 216]
ldr x0, [sp, 144]
ldr w0, [x0]
ldr w1, [sp, 196]
sub w1, w1, w0
ldr w0, [sp, 184]
sub w0, w1, w0
add w0, w0, 1
str w0, [sp, 220]
ldrsw x0, [sp, 216]
lsl x0, x0, 4
ldr x1, [sp, 128]
add x0, x1, x0
ldr d1, [x0]
ldrsw x0, [sp, 220]
lsl x0, x0, 4
ldr x1, [sp, 104]
add x0, x1, x0
ldr d0, [x0]
fmul d1, d1, d0
ldrsw x0, [sp, 216]
lsl x0, x0, 4
ldr x1, [sp, 128]
add x0, x1, x0
ldr d2, [x0, 8]
ldrsw x0, [sp, 220]
lsl x0, x0, 4
ldr x1, [sp, 104]
add x0, x1, x0
ldr d0, [x0, 8]
fmul d0, d2, d0
fsub d0, d1, d0
str d0, [sp, 280]
ldrsw x0, [sp, 216]
lsl x0, x0, 4
ldr x1, [sp, 128]
add x0, x1, x0
ldr d1, [x0]
ldrsw x0, [sp, 220]
lsl x0, x0, 4
ldr x1, [sp, 104]
add x0, x1, x0
ldr d0, [x0, 8]
fmul d1, d1, d0
ldrsw x0, [sp, 216]
lsl x0, x0, 4
ldr x1, [sp, 128]
add x0, x1, x0
ldr d2, [x0, 8]
ldrsw x0, [sp, 220]
lsl x0, x0, 4
ldr x1, [sp, 104]
add x0, x1, x0
ldr d0, [x0]
fmul d0, d2, d0
fadd d0, d1, d0
str d0, [sp, 288]
ldrsw x0, [sp, 212]
lsl x0, x0, 4
ldr x1, [sp, 128]
add x0, x1, x0
ldr d1, [x0]
ldr d0, [sp, 280]
fsub d0, d1, d0
str d0, [sp, 264]
ldrsw x0, [sp, 212]
lsl x0, x0, 4
ldr x1, [sp, 128]
add x0, x1, x0
ldr d1, [x0, 8]
ldr d0, [sp, 288]
fsub d0, d1, d0
str d0, [sp, 272]
ldr x0, [sp, 144]
ldr w0, [x0]
ldr w1, [sp, 192]
sub w1, w1, w0
ldr w0, [sp, 184]
sub w0, w1, w0
add w0, w0, 1
str w0, [sp, 224]
ldr w1, [sp, 184]
ldr w0, [sp, 200]
mul w0, w1, w0
ldr w1, [sp, 196]
add w0, w1, w0
str w0, [sp, 228]
ldrsw x0, [sp, 224]
lsl x0, x0, 4
ldr x1, [sp, 104]
add x0, x1, x0
ldr d1, [x0]
ldrsw x0, [sp, 228]
lsl x0, x0, 4
ldr x1, [sp, 128]
add x0, x1, x0
ldr d0, [x0]
fmul d1, d1, d0
ldrsw x0, [sp, 224]
lsl x0, x0, 4
ldr x1, [sp, 104]
add x0, x1, x0
ldr d2, [x0, 8]
ldrsw x0, [sp, 228]
lsl x0, x0, 4
ldr x1, [sp, 128]
add x0, x1, x0
ldr d0, [x0, 8]
fmul d0, d2, d0
fsub d0, d1, d0
str d0, [sp, 296]
ldrsw x0, [sp, 224]
lsl x0, x0, 4
ldr x1, [sp, 104]
add x0, x1, x0
ldr d1, [x0]
ldrsw x0, [sp, 228]
lsl x0, x0, 4
ldr x1, [sp, 128]
add x0, x1, x0
ldr d0, [x0, 8]
fmul d1, d1, d0
ldrsw x0, [sp, 224]
lsl x0, x0, 4
ldr x1, [sp, 104]
add x0, x1, x0
ldr d2, [x0, 8]
ldrsw x0, [sp, 228]
lsl x0, x0, 4
ldr x1, [sp, 128]
add x0, x1, x0
ldr d0, [x0]
fmul d0, d2, d0
fadd d0, d1, d0
str d0, [sp, 304]
ldr d1, [sp, 264]
ldr d0, [sp, 296]
fsub d0, d1, d0
str d0, [sp, 248]
ldr d1, [sp, 272]
ldr d0, [sp, 304]
fsub d0, d1, d0
str d0, [sp, 256]
ldrsw x0, [sp, 208]
lsl x0, x0, 4
ldr x1, [sp, 128]
add x0, x1, x0
ldr d0, [sp, 248]
str d0, [x0]
ldrsw x0, [sp, 208]
lsl x0, x0, 4
ldr x1, [sp, 128]
add x0, x1, x0
ldr d0, [sp, 256]
str d0, [x0, 8]
ldr w0, [sp, 192]
add w0, w0, 1
str w0, [sp, 192]
.L104:
ldr w0, [sp, 180]
ldr w1, [sp, 192]
cmp w1, w0
ble .L105
ldr w0, [sp, 196]
add w0, w0, 1
str w0, [sp, 196]
.L103:
ldr w0, [sp, 176]
ldr w1, [sp, 196]
cmp w1, w0
ble .L106
ldr x0, [sp, 144]
ldr w1, [x0]
ldr w0, [sp, 184]
add w1, w1, w0
ldr w2, [sp, 184]
ldr w0, [sp, 200]
mul w0, w2, w0
add w0, w1, w0
str w0, [sp, 176]
ldr d0, [sp, 328]
fneg d0, d0
str d0, [sp, 248]
ldr d0, [sp, 336]
fneg d0, d0
str d0, [sp, 256]
ldr w0, [sp, 176]
sxtw x0, w0
lsl x0, x0, 4
ldr x1, [sp, 128]
add x0, x1, x0
ldr d0, [sp, 248]
str d0, [x0]
ldr w0, [sp, 176]
sxtw x0, w0
lsl x0, x0, 4
ldr x1, [sp, 128]
add x0, x1, x0
ldr d0, [sp, 256]
str d0, [x0, 8]
ldr x0, [sp, 152]
ldr w0, [x0]
str w0, [sp, 176]
ldr x0, [sp, 144]
ldr w1, [x0]
ldr w0, [sp, 184]
add w0, w1, w0
add w0, w0, 1
str w0, [sp, 188]
b .L107
.L108:
ldr w1, [sp, 184]
ldr w0, [sp, 200]
mul w1, w1, w0
ldr w0, [sp, 188]
add w0, w1, w0
str w0, [sp, 180]
ldr w0, [sp, 180]
sxtw x0, w0
lsl x0, x0, 4
ldr x1, [sp, 128]
add x0, x1, x0
str xzr, [x0]
ldr w0, [sp, 180]
sxtw x0, w0
lsl x0, x0, 4
ldr x1, [sp, 128]
add x0, x1, x0
str xzr, [x0, 8]
ldr w0, [sp, 188]
add w0, w0, 1
str w0, [sp, 188]
.L107:
ldr w0, [sp, 176]
ldr w1, [sp, 188]
cmp w1, w0
ble .L108
ldr w0, [sp, 184]
add w0, w0, 1
str w0, [sp, 184]
.L100:
ldr w0, [sp, 172]
ldr w1, [sp, 184]
cmp w1, w0
ble .L109
ldr x0, [sp, 152]
ldr w0, [x0]
str w0, [sp, 172]
mov w0, 1
str w0, [sp, 188]
b .L110
.L113:
ldr x0, [sp, 152]
ldr w0, [x0]
str w0, [sp, 176]
ldr w0, [sp, 188]
add w0, w0, 1
str w0, [sp, 184]
b .L111
.L112:
ldr w1, [sp, 184]
ldr w0, [sp, 200]
mul w1, w1, w0
ldr w0, [sp, 188]
add w0, w1, w0
str w0, [sp, 180]
ldr w1, [sp, 188]
ldr w0, [sp, 200]
mul w0, w1, w0
ldr w1, [sp, 184]
add w0, w1, w0
str w0, [sp, 208]
ldrsw x0, [sp, 208]
lsl x0, x0, 4
ldr x1, [sp, 128]
add x1, x1, x0
ldr w0, [sp, 180]
sxtw x0, w0
lsl x0, x0, 4
ldr x2, [sp, 128]
add x0, x2, x0
ldr d0, [x1]
str d0, [x0]
ldrsw x0, [sp, 208]
lsl x0, x0, 4
ldr x1, [sp, 128]
add x1, x1, x0
ldr w0, [sp, 180]
sxtw x0, w0
lsl x0, x0, 4
ldr x2, [sp, 128]
add x0, x2, x0
ldr d0, [x1, 8]
str d0, [x0, 8]
ldr w0, [sp, 184]
add w0, w0, 1
str w0, [sp, 184]
.L111:
ldr w0, [sp, 176]
ldr w1, [sp, 184]
cmp w1, w0
ble .L112
ldr w0, [sp, 188]
add w0, w0, 1
str w0, [sp, 188]
.L110:
ldr w0, [sp, 172]
ldr w1, [sp, 188]
cmp w1, w0
ble .L113
mov w0, 0
.L114:
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 376]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L115
bl __stack_chk_fail
.L115:
mov w0, w1
ldp d8, d9, [sp, 64]
ldp d10, d11, [sp, 80]
ldr x19, [sp, 48]
ldp x29, x30, [sp, 32]
add sp, sp, 384
.cfi_restore 29
.cfi_restore 30
.cfi_restore 19
.cfi_restore 74
.cfi_restore 75
.cfi_restore 72
.cfi_restore 73
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE21:
.size zlagsy_, .-zlagsy_
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC0:
.string "Error openning raw socket! Make sure this is launched with root priviliges\n"
.align 3
.LC1:
.string "Error receiving packet!\n"
.align 3
.LC2:
.string "\nEthernet Header"
.align 3
.LC3:
.string "\t|-Source Address : %.2X:%.2X:%.2X:%.2X:%.2X:%.2X\n"
.align 3
.LC4:
.string "\t|-Destination Address : %.2X:%.2X:%.2X:%.2X:%.2X:%.2X\n"
.align 3
.LC5:
.string "\t|-Protocol : %d\n"
.align 3
.LC6:
.string "%.2X "
.text
.align 2
.global main
.type main, %function
main:
.LFB6:
.cfi_startproc
stp x29, x30, [sp, -80]!
.cfi_def_cfa_offset 80
.cfi_offset 29, -80
.cfi_offset 30, -72
mov x29, sp
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 72]
mov x1, 0
mov x0, 65536
bl malloc
str x0, [sp, 40]
mov x2, 65536
mov w1, 0
ldr x0, [sp, 40]
bl memset
mov w0, 16
str w0, [sp, 24]
mov w0, 3
bl htons
and w0, w0, 65535
mov w2, w0
mov w1, 3
mov w0, 17
bl socket
str w0, [sp, 32]
ldr w0, [sp, 32]
cmp w0, 0
bge .L2
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x0, [x0]
mov x3, x0
mov x2, 75
mov x1, 1
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl fwrite
mov w0, -1
b .L8
.L2:
add x1, sp, 24
add x0, sp, 56
mov x5, x1
mov x4, x0
mov w3, 0
mov x2, 65536
ldr x1, [sp, 40]
ldr w0, [sp, 32]
bl recvfrom
str w0, [sp, 36]
ldr w0, [sp, 36]
cmp w0, 0
bge .L4
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x0, [x0]
mov x3, x0
mov x2, 24
mov x1, 1
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl fwrite
mov w0, -1
b .L8
.L4:
ldr x0, [sp, 40]
str x0, [sp, 48]
adrp x0, .LC2
add x0, x0, :lo12:.LC2
bl puts
ldr x0, [sp, 48]
ldrb w0, [x0, 6]
mov w1, w0
ldr x0, [sp, 48]
ldrb w0, [x0, 7]
mov w2, w0
ldr x0, [sp, 48]
ldrb w0, [x0, 8]
mov w3, w0
ldr x0, [sp, 48]
ldrb w0, [x0, 9]
mov w4, w0
ldr x0, [sp, 48]
ldrb w0, [x0, 10]
mov w5, w0
ldr x0, [sp, 48]
ldrb w0, [x0, 11]
mov w6, w0
adrp x0, .LC3
add x0, x0, :lo12:.LC3
bl printf
ldr x0, [sp, 48]
ldrb w0, [x0]
mov w1, w0
ldr x0, [sp, 48]
ldrb w0, [x0, 1]
mov w2, w0
ldr x0, [sp, 48]
ldrb w0, [x0, 2]
mov w3, w0
ldr x0, [sp, 48]
ldrb w0, [x0, 3]
mov w4, w0
ldr x0, [sp, 48]
ldrb w0, [x0, 4]
mov w5, w0
ldr x0, [sp, 48]
ldrb w0, [x0, 5]
mov w6, w0
adrp x0, .LC4
add x0, x0, :lo12:.LC4
bl printf
ldr x0, [sp, 48]
ldrh w0, [x0, 12]
mov w1, w0
adrp x0, .LC5
add x0, x0, :lo12:.LC5
bl printf
str wzr, [sp, 28]
b .L5
.L7:
ldr w0, [sp, 28]
cmp w0, 0
beq .L6
ldr w0, [sp, 28]
and w0, w0, 15
cmp w0, 0
bne .L6
mov w0, 10
bl putchar
.L6:
ldrsw x0, [sp, 28]
ldr x1, [sp, 40]
add x0, x1, x0
ldrb w0, [x0]
mov w1, w0
adrp x0, .LC6
add x0, x0, :lo12:.LC6
bl printf
ldr w0, [sp, 28]
add w0, w0, 1
str w0, [sp, 28]
.L5:
ldr w1, [sp, 28]
ldr w0, [sp, 36]
cmp w1, w0
blt .L7
mov w0, 10
bl putchar
ldr w0, [sp, 32]
bl close
ldr x0, [sp, 40]
bl free
mov w0, 0
.L8:
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 72]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L9
bl __stack_chk_fail
.L9:
mov w0, w1
ldp x29, x30, [sp], 80
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE6:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC0:
.string "tmp/fifo"
.align 3
.LC1:
.string "tmp/fifo[SERVIDOR]"
.align 3
.LC2:
.string "tmp/logs"
.align 3
.LC3:
.string "tmp/logs[SERVIDOR]"
.text
.align 2
.global main
.type main, %function
main:
.LFB6:
.cfi_startproc
stp x29, x30, [sp, -176]!
.cfi_def_cfa_offset 176
.cfi_offset 29, -176
.cfi_offset 30, -168
mov x29, sp
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 168]
mov x1, 0
mov w1, 0
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl open
str w0, [sp, 28]
ldr w0, [sp, 28]
cmn w0, #1
bne .L2
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl perror
mov w0, -1
bl exit
.L2:
mov w2, 438
mov w1, 1089
adrp x0, .LC2
add x0, x0, :lo12:.LC2
bl open
str w0, [sp, 32]
ldr w0, [sp, 32]
cmn w0, #1
bne .L4
adrp x0, .LC3
add x0, x0, :lo12:.LC3
bl perror
mov w0, -1
bl exit
.L5:
ldrsw x1, [sp, 36]
add x0, sp, 40
mov x2, x1
mov x1, x0
ldr w0, [sp, 32]
bl write
.L4:
add x0, sp, 40
mov x2, 128
mov x1, x0
ldr w0, [sp, 28]
bl read
str w0, [sp, 36]
ldr w0, [sp, 36]
cmp w0, 0
bgt .L5
mov w0, 0
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 168]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L7
bl __stack_chk_fail
.L7:
mov w0, w1
ldp x29, x30, [sp], 176
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE6:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC0:
.string "Usage: %s <server name> <port number> <msg>\n"
.align 3
.LC1:
.string "Problem creating socket"
.align 3
.LC2:
.string "Invalid or unknown host"
.align 3
.LC3:
.string "Problem setsockopt"
.align 3
.LC4:
.string "Problem connect"
.align 3
.LC5:
.string "Problem sending data"
.align 3
.LC6:
.string "Problem in recvfrom"
.align 3
.LC7:
.string "Got back %d bytes\n"
.align 3
.LC8:
.string "%02x"
.text
.align 2
.global main
.type main, %function
main:
.LFB6:
.cfi_startproc
stp x29, x30, [sp, -112]!
.cfi_def_cfa_offset 112
.cfi_offset 29, -112
.cfi_offset 30, -104
mov x29, sp
str w0, [sp, 28]
str x1, [sp, 16]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 104]
mov x1, 0
mov x0, 256
movk x0, 0x302, lsl 16
movk x0, 0x504, lsl 32
movk x0, 0x706, lsl 48
str x0, [sp, 88]
mov x0, 2
str x0, [sp, 56]
str xzr, [sp, 64]
ldr w0, [sp, 28]
cmp w0, 3
beq .L2
ldr x0, [sp, 16]
ldr x0, [x0]
mov x1, x0
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl printf
mov w0, 0
bl exit
.L2:
mov w2, 0
mov w1, 2
mov w0, 2
bl socket
str w0, [sp, 40]
ldr w0, [sp, 40]
cmp w0, 0
bge .L3
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl puts
mov w0, 1
bl exit
.L3:
mov w0, 2
strh w0, [sp, 72]
ldr x0, [sp, 16]
add x0, x0, 8
ldr x0, [x0]
bl gethostbyname
str x0, [sp, 48]
ldr x0, [sp, 48]
cmp x0, 0
bne .L4
adrp x0, .LC2
add x0, x0, :lo12:.LC2
bl puts
mov w0, 1
bl exit
.L4:
ldr x0, [sp, 48]
ldr x0, [x0, 24]
ldr x1, [x0]
ldr x0, [sp, 48]
ldr w0, [x0, 20]
sxtw x2, w0
add x0, sp, 72
add x0, x0, 4
bl memcpy
ldr x0, [sp, 16]
add x0, x0, 16
ldr x0, [x0]
bl atoi
and w0, w0, 65535
bl htons
and w0, w0, 65535
strh w0, [sp, 74]
add x0, sp, 56
mov w4, 16
mov x3, x0
mov w2, 20
mov w1, 1
ldr w0, [sp, 40]
bl setsockopt
str w0, [sp, 44]
ldr w0, [sp, 44]
cmp w0, 0
bge .L5
adrp x0, .LC3
add x0, x0, :lo12:.LC3
bl perror
mov w0, 1
bl exit
.L5:
add x0, sp, 72
mov w2, 16
mov x1, x0
ldr w0, [sp, 40]
bl connect
str w0, [sp, 44]
ldr w0, [sp, 44]
cmp w0, 0
bge .L6
adrp x0, .LC4
add x0, x0, :lo12:.LC4
bl perror
mov w0, 1
bl exit
.L6:
add x0, sp, 88
mov w3, 0
mov x2, 8
mov x1, x0
ldr w0, [sp, 40]
bl send
str w0, [sp, 44]
ldr w0, [sp, 44]
cmp w0, 0
bge .L7
adrp x0, .LC5
add x0, x0, :lo12:.LC5
bl perror
mov w0, 1
bl exit
.L7:
add x0, sp, 96
mov x5, 0
mov x4, 0
mov w3, 0
mov x2, 8
mov x1, x0
ldr w0, [sp, 40]
bl recvfrom
str w0, [sp, 44]
ldr w0, [sp, 44]
cmp w0, 0
bge .L8
adrp x0, .LC6
add x0, x0, :lo12:.LC6
bl perror
mov w0, 1
bl exit
.L8:
ldr w1, [sp, 44]
adrp x0, .LC7
add x0, x0, :lo12:.LC7
bl printf
str wzr, [sp, 36]
b .L9
.L10:
ldrsw x0, [sp, 36]
add x1, sp, 96
ldrb w0, [x1, x0]
mov w1, w0
adrp x0, .LC8
add x0, x0, :lo12:.LC8
bl printf
ldr w0, [sp, 36]
add w0, w0, 1
str w0, [sp, 36]
.L9:
ldr w1, [sp, 36]
ldr w0, [sp, 44]
cmp w1, w0
blt .L10
mov w0, 10
bl putchar
mov w0, 0
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 104]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L12
bl __stack_chk_fail
.L12:
mov w0, w1
ldp x29, x30, [sp], 112
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE6:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global f1
.type f1, %function
f1:
.LFB6:
.cfi_startproc
sub sp, sp, #48
.cfi_def_cfa_offset 48
str x0, [sp, 24]
str x1, [sp, 16]
str x2, [sp, 8]
str xzr, [sp, 40]
b .L2
.L3:
ldr x1, [sp, 24]
ldr x0, [sp, 40]
add x0, x1, x0
mov w1, 4
strb w1, [x0]
ldr x1, [sp, 16]
ldr x0, [sp, 40]
add x0, x1, x0
mov w1, 9
strb w1, [x0]
ldr x0, [sp, 40]
add x0, x0, 1
str x0, [sp, 40]
.L2:
ldr x1, [sp, 40]
ldr x0, [sp, 8]
cmp x1, x0
bcc .L3
nop
nop
add sp, sp, 48
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE6:
.size f1, .-f1
.align 2
.global f2
.type f2, %function
f2:
.LFB7:
.cfi_startproc
sub sp, sp, #48
.cfi_def_cfa_offset 48
str x0, [sp, 24]
str x1, [sp, 16]
str x2, [sp, 8]
str xzr, [sp, 40]
b .L5
.L6:
ldr x1, [sp, 24]
ldr x0, [sp, 40]
add x0, x1, x0
mov w1, 4
strb w1, [x0]
ldr x1, [sp, 16]
ldr x0, [sp, 40]
add x0, x1, x0
mov w1, 9
strb w1, [x0]
ldr x0, [sp, 40]
add x0, x0, 1
str x0, [sp, 40]
.L5:
ldr x1, [sp, 40]
ldr x0, [sp, 8]
cmp x1, x0
bcc .L6
nop
nop
add sp, sp, 48
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE7:
.size f2, .-f2
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global power
.type power, %function
power:
.LFB0:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str w0, [sp, 12]
str w1, [sp, 8]
mov w0, 1
str w0, [sp, 28]
b .L2
.L3:
ldr w1, [sp, 28]
ldr w0, [sp, 12]
mul w0, w1, w0
str w0, [sp, 28]
ldr w0, [sp, 8]
sub w0, w0, #1
str w0, [sp, 8]
.L2:
ldr w0, [sp, 8]
cmp w0, 0
bgt .L3
ldr w0, [sp, 28]
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size power, .-power
.align 2
.global binary_form
.type binary_form, %function
binary_form:
.LFB1:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str x0, [sp, 8]
str w1, [sp, 4]
str wzr, [sp, 24]
b .L6
.L7:
ldr w0, [sp, 4]
cmp w0, 0
and w0, w0, 1
csneg w0, w0, w0, ge
str w0, [sp, 28]
ldr w0, [sp, 4]
lsr w1, w0, 31
add w0, w1, w0
asr w0, w0, 1
str w0, [sp, 4]
ldr w0, [sp, 24]
add w1, w0, 1
str w1, [sp, 24]
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 8]
add x0, x1, x0
ldr w1, [sp, 28]
str w1, [x0]
.L6:
ldr w0, [sp, 4]
cmp w0, 0
bne .L7
nop
nop
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE1:
.size binary_form, .-binary_form
.section .rodata
.align 3
.LC1:
.string ", %d"
.align 3
.LC2:
.string "%d"
.align 3
.LC3:
.string "},"
.text
.align 2
.global power_set
.type power_set, %function
power_set:
.LFB2:
.cfi_startproc
stp x29, x30, [sp, -464]!
.cfi_def_cfa_offset 464
.cfi_offset 29, -464
.cfi_offset 30, -456
mov x29, sp
str x0, [sp, 24]
str w1, [sp, 20]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 456]
mov x1, 0
ldr w1, [sp, 20]
mov w0, 2
bl power
str w0, [sp, 52]
add x0, sp, 56
mov x1, 400
mov x2, x1
mov w1, 0
bl memset
str wzr, [sp, 40]
mov w0, 123
bl putchar
str wzr, [sp, 44]
b .L9
.L16:
mov w0, 123
bl putchar
add x0, sp, 56
ldr w1, [sp, 44]
bl binary_form
str wzr, [sp, 48]
b .L10
.L13:
ldrsw x0, [sp, 48]
lsl x0, x0, 2
add x1, sp, 56
ldr w0, [x1, x0]
cmp w0, 1
bne .L11
ldr w0, [sp, 40]
cmp w0, 1
bne .L12
ldrsw x0, [sp, 48]
lsl x0, x0, 2
ldr x1, [sp, 24]
add x0, x1, x0
ldr w0, [x0]
mov w1, w0
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl printf
b .L11
.L12:
ldrsw x0, [sp, 48]
lsl x0, x0, 2
ldr x1, [sp, 24]
add x0, x1, x0
ldr w0, [x0]
mov w1, w0
adrp x0, .LC2
add x0, x0, :lo12:.LC2
bl printf
mov w0, 1
str w0, [sp, 40]
.L11:
ldr w0, [sp, 48]
add w0, w0, 1
str w0, [sp, 48]
.L10:
ldr w1, [sp, 48]
ldr w0, [sp, 20]
cmp w1, w0
blt .L13
str wzr, [sp, 40]
ldr w0, [sp, 52]
sub w0, w0, #1
ldr w1, [sp, 44]
cmp w1, w0
bne .L14
mov w0, 125
bl putchar
b .L15
.L14:
adrp x0, .LC3
add x0, x0, :lo12:.LC3
bl printf
.L15:
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L9:
ldr w1, [sp, 44]
ldr w0, [sp, 52]
cmp w1, w0
blt .L16
mov w0, 125
bl putchar
nop
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [sp, 456]
ldr x1, [x0]
subs x2, x2, x1
mov x1, 0
beq .L17
bl __stack_chk_fail
.L17:
ldp x29, x30, [sp], 464
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE2:
.size power_set, .-power_set
.align 2
.global main
.type main, %function
main:
.LFB3:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 40]
mov x1, 0
adrp x0, .LC0
add x1, x0, :lo12:.LC0
add x0, sp, 24
ldr x2, [x1]
str x2, [x0]
ldr w1, [x1, 8]
str w1, [x0, 8]
mov w0, 3
str w0, [sp, 20]
add x0, sp, 24
ldr w1, [sp, 20]
bl power_set
mov w0, 0
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 40]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L20
bl __stack_chk_fail
.L20:
mov w0, w1
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE3:
.size main, .-main
.section .rodata
.align 3
.LC0:
.word 1
.word 2
.word 3
.text
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.global turon_md5_rotate_array
.section .rodata
.align 3
.type turon_md5_rotate_array, %object
.size turon_md5_rotate_array, 256
turon_md5_rotate_array:
.word -680876936
.word -389564586
.word 606105819
.word -1044525330
.word -176418897
.word 1200080426
.word -1473231341
.word -45705983
.word 1770035416
.word -1958414417
.word -42063
.word -1990404162
.word 1804603682
.word -40341101
.word -1502002290
.word 1236535329
.word -165796510
.word -1069501632
.word 643717713
.word -373897302
.word -701558691
.word 38016083
.word -660478335
.word -405537848
.word 568446438
.word -1019803690
.word -187363961
.word 1163531501
.word -1444681467
.word -51403784
.word 1735328473
.word -1926607734
.word -378558
.word -2022574463
.word 1839030562
.word -35309556
.word -1530992060
.word 1272893353
.word -155497632
.word -1094730640
.word 681279174
.word -358537222
.word -722521979
.word 76029189
.word -640364487
.word -421815835
.word 530742520
.word -995338651
.word -198630844
.word 1126891415
.word -1416354905
.word -57434055
.word 1700485571
.word -1894986606
.word -1051523
.word -2054922799
.word 1873313359
.word -30611744
.word -1560198380
.word 1309151649
.word -145523070
.word -1120210379
.word 718787259
.word -343485551
.global turon_md5_shift_array
.align 3
.type turon_md5_shift_array, %object
.size turon_md5_shift_array, 256
turon_md5_shift_array:
.word 7
.word 12
.word 17
.word 22
.word 7
.word 12
.word 17
.word 22
.word 7
.word 12
.word 17
.word 22
.word 7
.word 12
.word 17
.word 22
.word 5
.word 9
.word 14
.word 20
.word 5
.word 9
.word 14
.word 20
.word 5
.word 9
.word 14
.word 20
.word 5
.word 9
.word 14
.word 20
.word 4
.word 11
.word 16
.word 23
.word 4
.word 11
.word 16
.word 23
.word 4
.word 11
.word 16
.word 23
.word 4
.word 11
.word 16
.word 23
.word 6
.word 10
.word 15
.word 21
.word 6
.word 10
.word 15
.word 21
.word 6
.word 10
.word 15
.word 21
.word 6
.word 10
.word 15
.word 21
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.local offset
.comm offset,4,4
.data
.align 2
.type ino, %object
.size ino, 4
ino:
.word 721
.text
.align 2
.type push_string, %function
push_string:
.LFB6:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
ldr x0, [sp, 24]
bl strlen
add w0, w0, 1
str w0, [sp, 44]
adrp x0, :got:stdout
ldr x0, [x0, #:got_lo12:stdout]
ldr x0, [x0]
mov x1, x0
ldr x0, [sp, 24]
bl fputs
mov w0, 0
bl putchar
adrp x0, offset
add x0, x0, :lo12:offset
ldr w1, [x0]
ldr w0, [sp, 44]
add w1, w1, w0
adrp x0, offset
add x0, x0, :lo12:offset
str w1, [x0]
nop
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE6:
.size push_string, .-push_string
.align 2
.type push_pad, %function
push_pad:
.LFB7:
.cfi_startproc
stp x29, x30, [sp, -16]!
.cfi_def_cfa_offset 16
.cfi_offset 29, -16
.cfi_offset 30, -8
mov x29, sp
b .L3
.L4:
mov w0, 0
bl putchar
adrp x0, offset
add x0, x0, :lo12:offset
ldr w0, [x0]
add w1, w0, 1
adrp x0, offset
add x0, x0, :lo12:offset
str w1, [x0]
.L3:
adrp x0, offset
add x0, x0, :lo12:offset
ldr w0, [x0]
and w0, w0, 3
cmp w0, 0
bne .L4
nop
nop
ldp x29, x30, [sp], 16
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE7:
.size push_pad, .-push_pad
.align 2
.type push_rest, %function
push_rest:
.LFB8:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
ldr x0, [sp, 24]
bl strlen
add w0, w0, 1
str w0, [sp, 44]
adrp x0, :got:stdout
ldr x0, [x0, #:got_lo12:stdout]
ldr x0, [x0]
mov x1, x0
ldr x0, [sp, 24]
bl fputs
mov w0, 0
bl putchar
adrp x0, offset
add x0, x0, :lo12:offset
ldr w1, [x0]
ldr w0, [sp, 44]
add w1, w1, w0
adrp x0, offset
add x0, x0, :lo12:offset
str w1, [x0]
ldr w0, [sp, 44]
add w0, w0, 110
str w0, [sp, 40]
b .L6
.L7:
mov w0, 0
bl putchar
adrp x0, offset
add x0, x0, :lo12:offset
ldr w0, [x0]
add w1, w0, 1
adrp x0, offset
add x0, x0, :lo12:offset
str w1, [x0]
ldr w0, [sp, 40]
add w0, w0, 1
str w0, [sp, 40]
.L6:
ldr w0, [sp, 40]
and w0, w0, 3
cmp w0, 0
bne .L7
nop
nop
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE8:
.size push_rest, .-push_rest
.align 2
.type push_hdr, %function
push_hdr:
.LFB9:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str x0, [sp, 24]
adrp x0, :got:stdout
ldr x0, [x0, #:got_lo12:stdout]
ldr x0, [x0]
mov x1, x0
ldr x0, [sp, 24]
bl fputs
adrp x0, offset
add x0, x0, :lo12:offset
ldr w0, [x0]
add w1, w0, 110
adrp x0, offset
add x0, x0, :lo12:offset
str w1, [x0]
nop
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE9:
.size push_hdr, .-push_hdr
.section .rodata
.align 3
.LC1:
.string "070701"
.align 3
.LC2:
.string "%s%08X%08X%08lX%08lX%08X%08lX%08X%08X%08X%08X%08X%08X%08X"
.text
.align 2
.type cpio_trailer, %function
cpio_trailer:
.LFB10:
.cfi_startproc
sub sp, sp, #368
.cfi_def_cfa_offset 368
stp x29, x30, [sp, 64]
.cfi_offset 29, -304
.cfi_offset 30, -296
add x29, sp, 64
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 360]
mov x1, 0
adrp x0, .LC0
add x1, x0, :lo12:.LC0
add x0, sp, 88
ldr x2, [x1]
str x2, [x0]
ldr w1, [x1, 7]
str w1, [x0, 7]
add x8, sp, 104
str wzr, [sp, 56]
mov w0, 11
str w0, [sp, 48]
str wzr, [sp, 40]
str wzr, [sp, 32]
str wzr, [sp, 24]
str wzr, [sp, 16]
str wzr, [sp, 8]
str xzr, [sp]
mov w7, 1
mov x6, 0
mov x5, 0
mov w4, 0
mov w3, 0
adrp x0, .LC1
add x2, x0, :lo12:.LC1
adrp x0, .LC2
add x1, x0, :lo12:.LC2
mov x0, x8
bl sprintf
add x0, sp, 104
bl push_hdr
add x0, sp, 88
bl push_rest
b .L10
.L11:
mov w0, 0
bl putchar
adrp x0, offset
add x0, x0, :lo12:offset
ldr w0, [x0]
add w1, w0, 1
adrp x0, offset
add x0, x0, :lo12:offset
str w1, [x0]
.L10:
adrp x0, offset
add x0, x0, :lo12:offset
ldr w0, [x0]
and w0, w0, 511
cmp w0, 0
bne .L11
nop
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [sp, 360]
ldr x1, [x0]
subs x2, x2, x1
mov x1, 0
beq .L12
bl __stack_chk_fail
.L12:
ldp x29, x30, [sp, 64]
add sp, sp, 368
.cfi_restore 29
.cfi_restore 30
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE10:
.size cpio_trailer, .-cpio_trailer
.section .rodata
.align 3
.LC0:
.string "TRAILER!!!"
.text
.align 2
.type cpio_mkslink, %function
cpio_mkslink:
.LFB11:
.cfi_startproc
sub sp, sp, #432
.cfi_def_cfa_offset 432
stp x29, x30, [sp, 64]
.cfi_offset 29, -368
.cfi_offset 30, -360
add x29, sp, 64
stp x19, x20, [sp, 80]
stp x21, x22, [sp, 96]
str x23, [sp, 112]
.cfi_offset 19, -352
.cfi_offset 20, -344
.cfi_offset 21, -336
.cfi_offset 22, -328
.cfi_offset 23, -320
str x0, [sp, 152]
str x1, [sp, 144]
str w2, [sp, 140]
str w3, [sp, 136]
str w4, [sp, 132]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 424]
mov x1, 0
mov x0, 0
bl time
str x0, [sp, 160]
adrp x0, ino
add x0, x0, :lo12:ino
ldr w19, [x0]
add w1, w19, 1
adrp x0, ino
add x0, x0, :lo12:ino
str w1, [x0]
ldr w1, [sp, 140]
mov w0, 40960
orr w21, w1, w0
ldr w22, [sp, 136]
ldr w23, [sp, 132]
ldr x0, [sp, 144]
bl strlen
add w20, w0, 1
ldr x0, [sp, 152]
bl strlen
add w0, w0, 1
add x8, sp, 168
str wzr, [sp, 56]
str w0, [sp, 48]
str wzr, [sp, 40]
str wzr, [sp, 32]
mov w0, 1
str w0, [sp, 24]
mov w0, 3
str w0, [sp, 16]
str w20, [sp, 8]
ldr x0, [sp, 160]
str x0, [sp]
mov w7, 1
mov x6, x23
mov x5, x22
mov w4, w21
mov w3, w19
adrp x0, .LC1
add x2, x0, :lo12:.LC1
adrp x0, .LC2
add x1, x0, :lo12:.LC2
mov x0, x8
bl sprintf
add x0, sp, 168
bl push_hdr
ldr x0, [sp, 152]
bl push_string
bl push_pad
ldr x0, [sp, 144]
bl push_string
bl push_pad
mov w0, 0
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 424]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L15
bl __stack_chk_fail
.L15:
mov w0, w1
ldp x19, x20, [sp, 80]
ldp x21, x22, [sp, 96]
ldr x23, [sp, 112]
ldp x29, x30, [sp, 64]
add sp, sp, 432
.cfi_restore 29
.cfi_restore 30
.cfi_restore 23
.cfi_restore 21
.cfi_restore 22
.cfi_restore 19
.cfi_restore 20
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE11:
.size cpio_mkslink, .-cpio_mkslink
.section .rodata
.align 3
.LC3:
.string "%4096s %4096s %o %d %d"
.align 3
.LC4:
.string "Unrecognized dir format '%s'"
.text
.align 2
.type cpio_mkslink_line, %function
cpio_mkslink_line:
.LFB12:
.cfi_startproc
mov x12, 8272
sub sp, sp, x12
.cfi_def_cfa_offset 8272
stp x29, x30, [sp]
.cfi_offset 29, -8272
.cfi_offset 30, -8264
mov x29, sp
str x0, [sp, 24]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 8264]
mov x1, 0
mov w0, -1
str w0, [sp, 52]
add x4, sp, 48
add x3, sp, 44
add x2, sp, 40
add x1, sp, 4096
add x1, x1, 64
add x0, sp, 56
mov x6, x4
mov x5, x3
mov x4, x2
mov x3, x1
mov x2, x0
adrp x0, .LC3
add x1, x0, :lo12:.LC3
ldr x0, [sp, 24]
bl __isoc99_sscanf
cmp w0, 5
beq .L17
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x3, [x0]
ldr x2, [sp, 24]
adrp x0, .LC4
add x1, x0, :lo12:.LC4
mov x0, x3
bl fprintf
b .L18
.L17:
ldr w2, [sp, 40]
ldr w0, [sp, 44]
mov w3, w0
ldr w0, [sp, 48]
mov w4, w0
add x1, sp, 4096
add x1, x1, 64
add x0, sp, 56
bl cpio_mkslink
str w0, [sp, 52]
.L18:
ldr w0, [sp, 52]
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 8264]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L20
bl __stack_chk_fail
.L20:
mov w0, w1
ldp x29, x30, [sp]
mov x12, 8272
add sp, sp, x12
.cfi_restore 29
.cfi_restore 30
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE12:
.size cpio_mkslink_line, .-cpio_mkslink_line
.align 2
.type cpio_mkgeneric, %function
cpio_mkgeneric:
.LFB13:
.cfi_startproc
sub sp, sp, #416
.cfi_def_cfa_offset 416
stp x29, x30, [sp, 64]
.cfi_offset 29, -352
.cfi_offset 30, -344
add x29, sp, 64
stp x19, x20, [sp, 80]
str x21, [sp, 96]
.cfi_offset 19, -336
.cfi_offset 20, -328
.cfi_offset 21, -320
str x0, [sp, 136]
str w1, [sp, 132]
str w2, [sp, 128]
str w3, [sp, 124]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 408]
mov x1, 0
mov x0, 0
bl time
str x0, [sp, 144]
adrp x0, ino
add x0, x0, :lo12:ino
ldr w19, [x0]
add w1, w19, 1
adrp x0, ino
add x0, x0, :lo12:ino
str w1, [x0]
ldr w20, [sp, 128]
ldr w21, [sp, 124]
ldr x0, [sp, 136]
bl strlen
add w0, w0, 1
add x8, sp, 152
str wzr, [sp, 56]
str w0, [sp, 48]
str wzr, [sp, 40]
str wzr, [sp, 32]
mov w0, 1
str w0, [sp, 24]
mov w0, 3
str w0, [sp, 16]
str wzr, [sp, 8]
ldr x0, [sp, 144]
str x0, [sp]
mov w7, 2
mov x6, x21
mov x5, x20
ldr w4, [sp, 132]
mov w3, w19
adrp x0, .LC1
add x2, x0, :lo12:.LC1
adrp x0, .LC2
add x1, x0, :lo12:.LC2
mov x0, x8
bl sprintf
add x0, sp, 152
bl push_hdr
ldr x0, [sp, 136]
bl push_rest
mov w0, 0
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 408]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L23
bl __stack_chk_fail
.L23:
mov w0, w1
ldp x19, x20, [sp, 80]
ldr x21, [sp, 96]
ldp x29, x30, [sp, 64]
add sp, sp, 416
.cfi_restore 29
.cfi_restore 30
.cfi_restore 21
.cfi_restore 19
.cfi_restore 20
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE13:
.size cpio_mkgeneric, .-cpio_mkgeneric
.section .rodata
.align 3
.LC5:
.string "dir"
.align 3
.LC6:
.string "pipe"
.align 3
.LC7:
.string "sock"
.section .data.rel.local,"aw"
.align 3
.type generic_type_table, %object
.size generic_type_table, 48
generic_type_table:
.xword .LC5
.word 16384
.zero 4
.xword .LC6
.word 4096
.zero 4
.xword .LC7
.word 49152
.zero 4
.section .rodata
.align 3
.LC8:
.string "%4096s %o %d %d"
.align 3
.LC9:
.string "Unrecognized %s format '%s'"
.text
.align 2
.type cpio_mkgeneric_line, %function
cpio_mkgeneric_line:
.LFB14:
.cfi_startproc
mov x12, 4160
sub sp, sp, x12
.cfi_def_cfa_offset 4160
stp x29, x30, [sp]
.cfi_offset 29, -4160
.cfi_offset 30, -4152
mov x29, sp
str x0, [sp, 24]
str w1, [sp, 20]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 4152]
mov x1, 0
mov w0, -1
str w0, [sp, 44]
add x3, sp, 40
add x2, sp, 36
add x1, sp, 32
add x0, sp, 48
mov x5, x3
mov x4, x2
mov x3, x1
mov x2, x0
adrp x0, .LC8
add x1, x0, :lo12:.LC8
ldr x0, [sp, 24]
bl __isoc99_sscanf
cmp w0, 4
beq .L25
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x4, [x0]
adrp x0, generic_type_table
add x1, x0, :lo12:generic_type_table
ldr w0, [sp, 20]
lsl x0, x0, 4
add x0, x1, x0
ldr x0, [x0]
mov x3, x0
ldr x2, [sp, 24]
adrp x0, .LC9
add x1, x0, :lo12:.LC9
mov x0, x4
bl fprintf
b .L26
.L25:
adrp x0, generic_type_table
add x1, x0, :lo12:generic_type_table
ldr w0, [sp, 20]
lsl x0, x0, 4
add x0, x1, x0
ldr w1, [x0, 8]
ldr w0, [sp, 32]
orr w0, w1, w0
str w0, [sp, 32]
ldr w1, [sp, 32]
ldr w0, [sp, 36]
mov w2, w0
ldr w0, [sp, 40]
mov w3, w0
add x0, sp, 48
bl cpio_mkgeneric
str w0, [sp, 44]
.L26:
ldr w0, [sp, 44]
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 4152]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L28
bl __stack_chk_fail
.L28:
mov w0, w1
ldp x29, x30, [sp]
mov x12, 4160
add sp, sp, x12
.cfi_restore 29
.cfi_restore 30
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE14:
.size cpio_mkgeneric_line, .-cpio_mkgeneric_line
.align 2
.type cpio_mkdir_line, %function
cpio_mkdir_line:
.LFB15:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str x0, [sp, 24]
mov w1, 0
ldr x0, [sp, 24]
bl cpio_mkgeneric_line
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE15:
.size cpio_mkdir_line, .-cpio_mkdir_line
.align 2
.type cpio_mkpipe_line, %function
cpio_mkpipe_line:
.LFB16:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str x0, [sp, 24]
mov w1, 1
ldr x0, [sp, 24]
bl cpio_mkgeneric_line
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE16:
.size cpio_mkpipe_line, .-cpio_mkpipe_line
.align 2
.type cpio_mksock_line, %function
cpio_mksock_line:
.LFB17:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str x0, [sp, 24]
mov w1, 2
ldr x0, [sp, 24]
bl cpio_mkgeneric_line
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE17:
.size cpio_mksock_line, .-cpio_mksock_line
.align 2
.type cpio_mknod, %function
cpio_mknod:
.LFB18:
.cfi_startproc
sub sp, sp, #416
.cfi_def_cfa_offset 416
stp x29, x30, [sp, 64]
.cfi_offset 29, -352
.cfi_offset 30, -344
add x29, sp, 64
stp x19, x20, [sp, 80]
str x21, [sp, 96]
.cfi_offset 19, -336
.cfi_offset 20, -328
.cfi_offset 21, -320
str x0, [sp, 136]
str w1, [sp, 132]
str w2, [sp, 128]
str w3, [sp, 124]
strb w4, [sp, 123]
str w5, [sp, 116]
str w6, [sp, 112]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 408]
mov x1, 0
mov x0, 0
bl time
str x0, [sp, 144]
ldrb w0, [sp, 123]
cmp w0, 98
bne .L36
ldr w0, [sp, 132]
orr w0, w0, 24576
str w0, [sp, 132]
b .L37
.L36:
ldr w0, [sp, 132]
orr w0, w0, 8192
str w0, [sp, 132]
.L37:
adrp x0, ino
add x0, x0, :lo12:ino
ldr w19, [x0]
add w1, w19, 1
adrp x0, ino
add x0, x0, :lo12:ino
str w1, [x0]
ldr w20, [sp, 128]
ldr w21, [sp, 124]
ldr x0, [sp, 136]
bl strlen
add w0, w0, 1
add x8, sp, 152
str wzr, [sp, 56]
str w0, [sp, 48]
ldr w0, [sp, 112]
str w0, [sp, 40]
ldr w0, [sp, 116]
str w0, [sp, 32]
mov w0, 1
str w0, [sp, 24]
mov w0, 3
str w0, [sp, 16]
str wzr, [sp, 8]
ldr x0, [sp, 144]
str x0, [sp]
mov w7, 1
mov x6, x21
mov x5, x20
ldr w4, [sp, 132]
mov w3, w19
adrp x0, .LC1
add x2, x0, :lo12:.LC1
adrp x0, .LC2
add x1, x0, :lo12:.LC2
mov x0, x8
bl sprintf
add x0, sp, 152
bl push_hdr
ldr x0, [sp, 136]
bl push_rest
mov w0, 0
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 408]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L39
bl __stack_chk_fail
.L39:
mov w0, w1
ldp x19, x20, [sp, 80]
ldr x21, [sp, 96]
ldp x29, x30, [sp, 64]
add sp, sp, 416
.cfi_restore 29
.cfi_restore 30
.cfi_restore 21
.cfi_restore 19
.cfi_restore 20
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE18:
.size cpio_mknod, .-cpio_mknod
.section .rodata
.align 3
.LC10:
.string "%4096s %o %d %d %c %u %u"
.align 3
.LC11:
.string "Unrecognized nod format '%s'"
.text
.align 2
.type cpio_mknod_line, %function
cpio_mknod_line:
.LFB19:
.cfi_startproc
mov x12, 4192
sub sp, sp, x12
.cfi_def_cfa_offset 4192
stp x29, x30, [sp, 16]
.cfi_offset 29, -4176
.cfi_offset 30, -4168
add x29, sp, 16
str x0, [sp, 40]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 4184]
mov x1, 0
mov w0, -1
str w0, [sp, 76]
add x6, sp, 68
add x5, sp, 55
add x4, sp, 64
add x3, sp, 60
add x2, sp, 56
add x1, sp, 80
add x0, sp, 72
str x0, [sp]
mov x7, x6
mov x6, x5
mov x5, x4
mov x4, x3
mov x3, x2
mov x2, x1
adrp x0, .LC10
add x1, x0, :lo12:.LC10
ldr x0, [sp, 40]
bl __isoc99_sscanf
cmp w0, 7
beq .L41
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x3, [x0]
ldr x2, [sp, 40]
adrp x0, .LC11
add x1, x0, :lo12:.LC11
mov x0, x3
bl fprintf
b .L42
.L41:
ldr w1, [sp, 56]
ldr w0, [sp, 60]
mov w7, w0
ldr w0, [sp, 64]
mov w8, w0
ldrb w4, [sp, 55]
ldr w2, [sp, 68]
ldr w3, [sp, 72]
add x0, sp, 80
mov w6, w3
mov w5, w2
mov w3, w8
mov w2, w7
bl cpio_mknod
str w0, [sp, 76]
.L42:
ldr w0, [sp, 76]
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 4184]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L44
bl __stack_chk_fail
.L44:
mov w0, w1
ldp x29, x30, [sp, 16]
mov x12, 4192
add sp, sp, x12
.cfi_restore 29
.cfi_restore 30
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE19:
.size cpio_mknod_line, .-cpio_mknod_line
.section .rodata
.align 3
.LC12:
.string "File %s could not be located\n"
.align 3
.LC13:
.string "File %s could not be opened for reading\n"
.align 3
.LC14:
.string "out of memory\n"
.align 3
.LC15:
.string "Can not read %s file\n"
.text
.align 2
.type cpio_mkfile, %function
cpio_mkfile:
.LFB20:
.cfi_startproc
sub sp, sp, #576
.cfi_def_cfa_offset 576
stp x29, x30, [sp, 64]
.cfi_offset 29, -512
.cfi_offset 30, -504
add x29, sp, 64
stp x19, x20, [sp, 80]
stp x21, x22, [sp, 96]
str x23, [sp, 112]
.cfi_offset 19, -496
.cfi_offset 20, -488
.cfi_offset 21, -480
.cfi_offset 22, -472
.cfi_offset 23, -464
str x0, [sp, 152]
str x1, [sp, 144]
str w2, [sp, 140]
str w3, [sp, 136]
str w4, [sp, 132]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 568]
mov x1, 0
str xzr, [sp, 176]
mov w0, -1
str w0, [sp, 164]
mov w0, -1
str w0, [sp, 168]
ldr w0, [sp, 140]
orr w0, w0, 32768
str w0, [sp, 140]
add x0, sp, 184
mov x1, x0
ldr x0, [sp, 144]
bl stat
str w0, [sp, 172]
ldr w0, [sp, 172]
cmp w0, 0
beq .L46
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x3, [x0]
ldr x2, [sp, 144]
adrp x0, .LC12
add x1, x0, :lo12:.LC12
mov x0, x3
bl fprintf
b .L47
.L46:
mov w1, 0
ldr x0, [sp, 144]
bl open
str w0, [sp, 164]
ldr w0, [sp, 164]
cmp w0, 0
bge .L48
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x3, [x0]
ldr x2, [sp, 144]
adrp x0, .LC13
add x1, x0, :lo12:.LC13
mov x0, x3
bl fprintf
b .L47
.L48:
ldr x0, [sp, 232]
bl malloc
str x0, [sp, 176]
ldr x0, [sp, 176]
cmp x0, 0
bne .L49
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x0, [x0]
mov x3, x0
mov x2, 14
mov x1, 1
adrp x0, .LC14
add x0, x0, :lo12:.LC14
bl fwrite
b .L47
.L49:
ldr x0, [sp, 232]
mov x2, x0
ldr x1, [sp, 176]
ldr w0, [sp, 164]
bl read
str w0, [sp, 172]
ldr w0, [sp, 172]
cmp w0, 0
bge .L50
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x3, [x0]
ldr x2, [sp, 144]
adrp x0, .LC15
add x1, x0, :lo12:.LC15
mov x0, x3
bl fprintf
b .L47
.L50:
adrp x0, ino
add x0, x0, :lo12:ino
ldr w19, [x0]
add w1, w19, 1
adrp x0, ino
add x0, x0, :lo12:ino
str w1, [x0]
ldr w21, [sp, 136]
ldr w22, [sp, 132]
ldr x20, [sp, 272]
ldr x0, [sp, 232]
mov w23, w0
ldr x0, [sp, 152]
bl strlen
add w0, w0, 1
add x8, sp, 312
str wzr, [sp, 56]
str w0, [sp, 48]
str wzr, [sp, 40]
str wzr, [sp, 32]
mov w0, 1
str w0, [sp, 24]
mov w0, 3
str w0, [sp, 16]
str w23, [sp, 8]
str x20, [sp]
mov w7, 1
mov x6, x22
mov x5, x21
ldr w4, [sp, 140]
mov w3, w19
adrp x0, .LC1
add x2, x0, :lo12:.LC1
adrp x0, .LC2
add x1, x0, :lo12:.LC2
mov x0, x8
bl sprintf
add x0, sp, 312
bl push_hdr
ldr x0, [sp, 152]
bl push_string
bl push_pad
ldr x0, [sp, 232]
mov x1, x0
adrp x0, :got:stdout
ldr x0, [x0, #:got_lo12:stdout]
ldr x0, [x0]
mov x3, x0
mov x2, 1
ldr x0, [sp, 176]
bl fwrite
ldr x0, [sp, 232]
mov w1, w0
adrp x0, offset
add x0, x0, :lo12:offset
ldr w0, [x0]
add w1, w1, w0
adrp x0, offset
add x0, x0, :lo12:offset
str w1, [x0]
bl push_pad
str wzr, [sp, 168]
.L47:
ldr x0, [sp, 176]
cmp x0, 0
beq .L51
ldr x0, [sp, 176]
bl free
.L51:
ldr w0, [sp, 164]
cmp w0, 0
blt .L52
ldr w0, [sp, 164]
bl close
.L52:
ldr w0, [sp, 168]
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 568]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L54
bl __stack_chk_fail
.L54:
mov w0, w1
ldp x19, x20, [sp, 80]
ldp x21, x22, [sp, 96]
ldr x23, [sp, 112]
ldp x29, x30, [sp, 64]
add sp, sp, 576
.cfi_restore 29
.cfi_restore 30
.cfi_restore 23
.cfi_restore 21
.cfi_restore 22
.cfi_restore 19
.cfi_restore 20
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE20:
.size cpio_mkfile, .-cpio_mkfile
.section .rodata
.align 3
.LC16:
.string "Unrecognized file format '%s'"
.text
.align 2
.type cpio_mkfile_line, %function
cpio_mkfile_line:
.LFB21:
.cfi_startproc
mov x12, 8272
sub sp, sp, x12
.cfi_def_cfa_offset 8272
stp x29, x30, [sp]
.cfi_offset 29, -8272
.cfi_offset 30, -8264
mov x29, sp
str x0, [sp, 24]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 8264]
mov x1, 0
mov w0, -1
str w0, [sp, 52]
add x4, sp, 48
add x3, sp, 44
add x2, sp, 40
add x1, sp, 4096
add x1, x1, 64
add x0, sp, 56
mov x6, x4
mov x5, x3
mov x4, x2
mov x3, x1
mov x2, x0
adrp x0, .LC3
add x1, x0, :lo12:.LC3
ldr x0, [sp, 24]
bl __isoc99_sscanf
cmp w0, 5
beq .L56
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x3, [x0]
ldr x2, [sp, 24]
adrp x0, .LC16
add x1, x0, :lo12:.LC16
mov x0, x3
bl fprintf
b .L57
.L56:
ldr w2, [sp, 40]
ldr w0, [sp, 44]
mov w3, w0
ldr w0, [sp, 48]
mov w4, w0
add x1, sp, 4096
add x1, x1, 64
add x0, sp, 56
bl cpio_mkfile
str w0, [sp, 52]
.L57:
ldr w0, [sp, 52]
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 8264]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L59
bl __stack_chk_fail
.L59:
mov w0, w1
ldp x29, x30, [sp]
mov x12, 8272
add sp, sp, x12
.cfi_restore 29
.cfi_restore 30
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE21:
.size cpio_mkfile_line, .-cpio_mkfile_line
.section .rodata
.align 3
.LC17:
.ascii "Usage:\n\t%s <cpio_list>\n\n<cpio_list> is a file containing"
.ascii " newline separated entries that\ndescribe the files to be in"
.ascii "cluded in the initramfs archive:\n\n# a comment\nfile <name>"
.ascii " <location> <mode> <uid> <gid>\ndir <name> <mode> <uid> <gid"
.ascii ">\nnod <name> <mode> <uid> <gid> <dev_type> <maj> <min>\nsli"
.ascii "nk <name> <target> <mode> <uid> <gid>\npipe <name> <mode> <u"
.ascii "id> <gid>\nsock <name> <mode> <uid> <gid>\n\n<name> nam"
.ascii "e of the file/dir/nod/etc in the archive\n<location> locati"
.ascii "on of the file in the current filesystem\n<target> link t"
.ascii "arget\n<mode> mode/permissions of the file\n<uid> "
.ascii " user id (0=root)\n<gid> group id (0=root)\n<dev_type>"
.ascii " device type (b="
.string "block, c=character)\n<maj> major number of nod\n<min> minor number of nod\n\nexample:\n# A simple initramfs\ndir /dev 0755 0 0\nnod /dev/console 0600 0 0 c 5 1\ndir /root 0700 0 0\ndir /sbin 0755 0 0\nfile /sbin/kinit /usr/src/klibc/kinit/kinit 0755 0 0\n"
.text
.align 2
.global usage
.type usage, %function
usage:
.LFB22:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str x0, [sp, 24]
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x3, [x0]
ldr x2, [sp, 24]
adrp x0, .LC17
add x1, x0, :lo12:.LC17
mov x0, x3
bl fprintf
nop
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE22:
.size usage, .-usage
.global file_handler_table
.section .rodata
.align 3
.LC18:
.string "file"
.align 3
.LC19:
.string "nod"
.align 3
.LC20:
.string "slink"
.section .data.rel.local
.align 3
.type file_handler_table, %object
.size file_handler_table, 112
file_handler_table:
.xword .LC18
.xword cpio_mkfile_line
.xword .LC19
.xword cpio_mknod_line
.xword .LC5
.xword cpio_mkdir_line
.xword .LC20
.xword cpio_mkslink_line
.xword .LC6
.xword cpio_mkpipe_line
.xword .LC7
.xword cpio_mksock_line
.xword 0
.xword 0
.section .rodata
.align 3
.LC21:
.string "r"
.align 3
.LC22:
.string "ERROR: unable to open '%s': %s\n\n"
.align 3
.LC23:
.string " \t"
.align 3
.LC24:
.string "ERROR: incorrect format, could not locate file type line %d: '%s'\n"
.align 3
.LC25:
.string "\n"
.align 3
.LC26:
.string "ERROR: incorrect format, newline required line %d: '%s'\n"
.align 3
.LC27:
.string " line %d\n"
.align 3
.LC28:
.string "unknown file type line %d: '%s'\n"
.text
.align 2
.global main
.type main, %function
main:
.LFB23:
.cfi_startproc
mov x12, 8352
sub sp, sp, x12
.cfi_def_cfa_offset 8352
stp x29, x30, [sp]
.cfi_offset 29, -8352
.cfi_offset 30, -8344
mov x29, sp
stp x19, x20, [sp, 16]
.cfi_offset 19, -8336
.cfi_offset 20, -8328
str w0, [sp, 44]
str x1, [sp, 32]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 8344]
mov x1, 0
str wzr, [sp, 48]
str wzr, [sp, 52]
ldr w0, [sp, 44]
cmp w0, 2
beq .L62
ldr x0, [sp, 32]
ldr x0, [x0]
bl usage
mov w0, 1
bl exit
.L62:
ldr x0, [sp, 32]
add x0, x0, 8
ldr x2, [x0]
adrp x0, .LC21
add x1, x0, :lo12:.LC21
mov x0, x2
bl fopen
str x0, [sp, 64]
ldr x0, [sp, 64]
cmp x0, 0
bne .L64
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x19, [x0]
ldr x0, [sp, 32]
add x0, x0, 8
ldr x20, [x0]
bl __errno_location
ldr w0, [x0]
bl strerror
mov x3, x0
mov x2, x20
adrp x0, .LC22
add x1, x0, :lo12:.LC22
mov x0, x19
bl fprintf
ldr x0, [sp, 32]
ldr x0, [x0]
bl usage
mov w0, 1
bl exit
.L75:
add x0, sp, 96
bl strlen
str x0, [sp, 72]
ldr w0, [sp, 52]
add w0, w0, 1
str w0, [sp, 52]
ldrb w0, [sp, 96]
cmp w0, 35
bne .L65
b .L64
.L65:
add x2, sp, 96
adrp x0, .LC23
add x1, x0, :lo12:.LC23
mov x0, x2
bl strtok
str x0, [sp, 80]
ldr x0, [sp, 80]
cmp x0, 0
bne .L66
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x4, [x0]
add x0, sp, 96
mov x3, x0
ldr w2, [sp, 52]
adrp x0, .LC24
add x1, x0, :lo12:.LC24
mov x0, x4
bl fprintf
mov w0, -1
str w0, [sp, 48]
.L66:
ldr x0, [sp, 80]
ldrb w0, [x0]
cmp w0, 10
bne .L67
b .L64
.L67:
ldr x0, [sp, 80]
bl strlen
mov x1, x0
ldr x0, [sp, 72]
cmp x0, x1
bne .L68
b .L64
.L68:
adrp x0, .LC25
add x1, x0, :lo12:.LC25
mov x0, 0
bl strtok
str x0, [sp, 88]
ldr x0, [sp, 88]
cmp x0, 0
bne .L69
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x4, [x0]
add x0, sp, 96
mov x3, x0
ldr w2, [sp, 52]
adrp x0, .LC26
add x1, x0, :lo12:.LC26
mov x0, x4
bl fprintf
mov w0, -1
str w0, [sp, 48]
.L69:
str wzr, [sp, 56]
b .L70
.L74:
adrp x0, file_handler_table
add x1, x0, :lo12:file_handler_table
ldrsw x0, [sp, 56]
lsl x0, x0, 4
add x0, x1, x0
ldr x1, [x0]
add x0, sp, 96
bl strcmp
cmp w0, 0
bne .L71
adrp x0, file_handler_table
add x1, x0, :lo12:file_handler_table
ldrsw x0, [sp, 56]
lsl x0, x0, 4
add x0, x1, x0
ldr x1, [x0, 8]
ldr x0, [sp, 88]
blr x1
str w0, [sp, 60]
ldr w0, [sp, 60]
cmp w0, 0
beq .L77
ldr w0, [sp, 60]
str w0, [sp, 48]
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x3, [x0]
ldr w2, [sp, 52]
adrp x0, .LC27
add x1, x0, :lo12:.LC27
mov x0, x3
bl fprintf
b .L77
.L71:
ldr w0, [sp, 56]
add w0, w0, 1
str w0, [sp, 56]
.L70:
adrp x0, file_handler_table
add x1, x0, :lo12:file_handler_table
ldrsw x0, [sp, 56]
lsl x0, x0, 4
add x0, x1, x0
ldr x0, [x0]
cmp x0, 0
bne .L74
b .L73
.L77:
nop
.L73:
adrp x0, file_handler_table
add x1, x0, :lo12:file_handler_table
ldrsw x0, [sp, 56]
lsl x0, x0, 4
add x0, x1, x0
ldr x0, [x0]
cmp x0, 0
bne .L64
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x4, [x0]
add x0, sp, 96
mov x3, x0
ldr w2, [sp, 52]
adrp x0, .LC28
add x1, x0, :lo12:.LC28
mov x0, x4
bl fprintf
.L64:
add x0, sp, 96
ldr x2, [sp, 64]
mov w1, 8242
bl fgets
cmp x0, 0
bne .L75
bl cpio_trailer
ldr w0, [sp, 48]
bl exit
.cfi_endproc
.LFE23:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.type SEQ_MCAP_OFF, %object
.size SEQ_MCAP_OFF, 3
SEQ_MCAP_OFF:
.string "\260\004"
.align 3
.type SEQ_MCAP_ON, %object
.size SEQ_MCAP_ON, 3
SEQ_MCAP_ON:
.string "\260\003"
.align 3
.type SEQ_ID_REG, %object
.size SEQ_ID_REG, 3
SEQ_ID_REG:
.string "\301"
.string ""
.align 3
.type SEQ_SET_ADDR_MODE, %object
.size SEQ_SET_ADDR_MODE, 3
SEQ_SET_ADDR_MODE:
.string "6\300"
.align 3
.type SEQ_DISPLAY_CONDITION_SET, %object
.size SEQ_DISPLAY_CONDITION_SET, 4
SEQ_DISPLAY_CONDITION_SET:
.ascii "\362\200\003\r"
.align 3
.type SEQ_GAMMA_UPDATE, %object
.size SEQ_GAMMA_UPDATE, 3
SEQ_GAMMA_UPDATE:
.string "\367\003"
.align 3
.type SEQ_ELVSS_CTRL, %object
.size SEQ_ELVSS_CTRL, 3
SEQ_ELVSS_CTRL:
.ascii "\261\004\225"
.align 3
.type SEQ_SLEEP_OUT, %object
.size SEQ_SLEEP_OUT, 3
SEQ_SLEEP_OUT:
.string "\021"
.string ""
.align 3
.type SEQ_DISP_ON, %object
.size SEQ_DISP_ON, 3
SEQ_DISP_ON:
.string ")"
.string ""
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.global X_SIZE_VALUE
.bss
.align 2
.type X_SIZE_VALUE, %object
.size X_SIZE_VALUE, 4
X_SIZE_VALUE:
.zero 4
.global overflow_mode
.data
.align 2
.type overflow_mode, %object
.size overflow_mode, 4
overflow_mode:
.word 1
.global rounding_mode
.bss
.align 2
.type rounding_mode, %object
.size rounding_mode, 4
rounding_mode:
.zero 4
.text
.align 2
.global __DSVERIFIER_assume
.type __DSVERIFIER_assume, %function
__DSVERIFIER_assume:
.LFB6:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
strb w0, [sp, 31]
ldrb w0, [sp, 31]
bl __CPROVER_assume
nop
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE6:
.size __DSVERIFIER_assume, .-__DSVERIFIER_assume
.section .rodata
.align 3
.LC0:
.string "/home/yashchopda/Desktop/dsverifier-v2.0.3-esbmc-v4.0-cbmc-5.6/bmc/core/compatibility.h"
.align 3
.LC1:
.string "expression"
.text
.align 2
.global __DSVERIFIER_assert
.type __DSVERIFIER_assert, %function
__DSVERIFIER_assert:
.LFB7:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
strb w0, [sp, 31]
ldrb w0, [sp, 31]
cmp w0, 0
bne .L4
adrp x0, __PRETTY_FUNCTION__.21
add x3, x0, :lo12:__PRETTY_FUNCTION__.21
mov w2, 36
adrp x0, .LC0
add x1, x0, :lo12:.LC0
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl __assert_fail
.L4:
nop
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE7:
.size __DSVERIFIER_assert, .-__DSVERIFIER_assert
.section .rodata
.align 3
.LC2:
.string "%s"
.text
.align 2
.global __DSVERIFIER_assert_msg
.type __DSVERIFIER_assert_msg, %function
__DSVERIFIER_assert_msg:
.LFB8:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
strb w0, [sp, 31]
str x1, [sp, 16]
ldr x1, [sp, 16]
adrp x0, .LC2
add x0, x0, :lo12:.LC2
bl printf
ldrb w0, [sp, 31]
cmp w0, 0
bne .L7
adrp x0, __PRETTY_FUNCTION__.20
add x3, x0, :lo12:__PRETTY_FUNCTION__.20
mov w2, 41
adrp x0, .LC0
add x1, x0, :lo12:.LC0
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl __assert_fail
.L7:
nop
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE8:
.size __DSVERIFIER_assert_msg, .-__DSVERIFIER_assert_msg
.global _fxp_one
.bss
.align 3
.type _fxp_one, %object
.size _fxp_one, 8
_fxp_one:
.zero 8
.global _fxp_half
.align 3
.type _fxp_half, %object
.size _fxp_half, 8
_fxp_half:
.zero 8
.global _fxp_minus_one
.align 3
.type _fxp_minus_one, %object
.size _fxp_minus_one, 8
_fxp_minus_one:
.zero 8
.global _fxp_min
.align 3
.type _fxp_min, %object
.size _fxp_min, 8
_fxp_min:
.zero 8
.global _fxp_max
.align 3
.type _fxp_max, %object
.size _fxp_max, 8
_fxp_max:
.zero 8
.global _dbl_max
.align 3
.type _dbl_max, %object
.size _dbl_max, 8
_dbl_max:
.zero 8
.global _dbl_min
.align 3
.type _dbl_min, %object
.size _dbl_min, 8
_dbl_min:
.zero 8
.global _fxp_fmask
.align 3
.type _fxp_fmask, %object
.size _fxp_fmask, 8
_fxp_fmask:
.zero 8
.global _fxp_imask
.align 3
.type _fxp_imask, %object
.size _fxp_imask, 8
_fxp_imask:
.zero 8
.section .rodata
.align 3
.type scale_factor, %object
.size scale_factor, 248
scale_factor:
.word 0
.word 1072693248
.word 0
.word 1073741824
.word 0
.word 1074790400
.word 0
.word 1075838976
.word 0
.word 1076887552
.word 0
.word 1077936128
.word 0
.word 1078984704
.word 0
.word 1080033280
.word 0
.word 1081081856
.word 0
.word 1082130432
.word 0
.word 1083179008
.word 0
.word 1084227584
.word 0
.word 1085276160
.word 0
.word 1086324736
.word 0
.word 1087373312
.word 0
.word 1088421888
.word 0
.word 1089470464
.word 0
.word 1090519040
.word 0
.word 1091567616
.word 0
.word 1092616192
.word 0
.word 1093664768
.word 0
.word 1094713344
.word 0
.word 1095761920
.word 0
.word 1096810496
.word 0
.word 1097859072
.word 0
.word 1098907648
.word 0
.word 1099956224
.word 0
.word 1101004800
.word 0
.word 1102053376
.word 0
.word 1103101952
.word 0
.word 1104150528
.align 3
.type scale_factor_inv, %object
.size scale_factor_inv, 248
scale_factor_inv:
.word 0
.word 1072693248
.word 0
.word 1071644672
.word 0
.word 1070596096
.word 0
.word 1069547520
.word 0
.word 1068498944
.word 0
.word 1067450368
.word 0
.word 1066401792
.word 0
.word 1065353216
.word 0
.word 1064304640
.word 0
.word 1063256064
.word 0
.word 1062207488
.word 0
.word 1061158912
.word 0
.word 1060110336
.word 0
.word 1059061760
.word 0
.word 1058013184
.word 0
.word 1056964608
.word 147574
.word 1055916032
.word -295148
.word 1054867455
.word 442722
.word 1053818880
.word 442722
.word 1052770304
.word -3836923
.word 1051721727
.word -3836923
.word 1050673151
.word -3836923
.word 1049624575
.word 16971005
.word 1048576000
.word 16971005
.word 1047527424
.word -117173718
.word 1046478847
.word -117173718
.word 1045430271
.word 243644596
.word 1044381696
.word -721636628
.word 1043333119
.word -721636628
.word 1042284543
.word 2057033325
.word 1041235968
.align 3
.type rand_uni, %object
.size rand_uni, 40000
rand_uni:
.word -1090980738
.word -1112175576
.word -1106268981
.word 1050290517
.word 1036740293
.word 1064879289
.word 1065104477
.word 1057904025
.word 1058341827
.word -1105391874
.word 1053059208
.word -1096031224
.word 1064997005
.word -1098026844
.word 1053276161
.word -1103670874
.word 1060153685
.word -1084269022
.word -1082623921
.word -1089152099
.word -1089971858
.word -1099598916
.word -1087529625
.word 1051914755
.word -1101560469
.word 1062690036
.word -1091405365
.word 1059638621
.word -1087982995
.word -1082784013
.word -1113135698
.word 1058999736
.word -1085745433
.word 1019435440
.word 1053364041
.word 1061609359
.word 1035087920
.word 1063349407
.word 1063397950
.word -1098958981
.word -1087313908
.word 1058285497
.word -1082567766
.word -1108276165
.word -1086763766
.word -1091084444
.word -1085128895
.word -1091870424
.word 1041742704
.word 1055095857
.word -1096370585
.word 1057705193
.word -1104590464
.word 1040973022
.word 1057691271
.word 1055864390
.word -1095576813
.word -1087832828
.word 1063848842
.word 1064699740
.word -1085717922
.word 1050443251
.word 1057146058
.word 1036170702
.word 1043458992
.word 1041495254
.word 1016835224
.word -1097256952
.word 1050334643
.word -1086652520
.word 1060129563
.word 1040855016
.word 1057530281
.word -1156296968
.word -1089489913
.word 1055300184
.word -1089353932
.word 1064584069
.word -1098726324
.word -1086159967
.word -1084558434
.word -1105796200
.word -1097153790
.word -1088136037
.word -1094968157
.word 1056690938
.word -1089811181
.word -1083165686
.word 1060051278
.word 1050076832
.word 1004086943
.word -1083287383
.word 1042023236
.word 1059961369
.word -1089932017
.word 1064213982
.word -1122769874
.word -1084694163
.word -1082534712
.word 1059033125
.word -1087813048
.word 1060730859
.word 1050505517
.word 1005731364
.word -1094086494
.word 1023443447
.word 1033720214
.word -1087967840
.word 1063074669
.word -1089027007
.word 1056830924
.word -1084263516
.word 1064997214
.word -1090437037
.word -1091781398
.word 1013462154
.word 1061487913
.word 1064434379
.word -1085783916
.word -1084945539
.word 1061085669
.word -1087214440
.word -1115018716
.word -1107539666
.word -1095244881
.word -1094079747
.word 1054997360
.word -1084992721
.word -1097179506
.word -1082193925
.word 1064256557
.word -1097819440
.word -1083345928
.word -1092631710
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.word 1064506801
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.word 1062010719
.word -1090327798
.word 1050565392
.word -1101775798
.word 1064188676
.word -1085871250
.word -1090877093
.word -1106652338
.word 1049776288
.word 1044034835
.word -1089778989
.word 1049530284
.word -1089574061
.word 1058290743
.word 1040834867
.word 1058690157
.word -1105506895
.word 1043924977
.word -1087975760
.word 1049620521
.word -1089176069
.word 1060116763
.word 1049562456
.word -1084589500
.word -1089971946
.word -1085130923
.word -1103519824
.word -1082400569
.word -1111129859
.word 1063355442
.word 1037186736
.word 1063568378
.word -1098596375
.word 1060308102
.word 1053707835
.word -1109212671
.word 1034768304
.word 1062345615
.word 1061923599
.word -1090681976
.word 1049352786
.word -1098295281
.word 1047366845
.word 1060222933
.word 1063003581
.word 1064673460
.word -1093103650
.word -1109360283
.word 1054719639
.word 1060219822
.word 1052752822
.word -1097442375
.word -1094001525
.word -1115589625
.word -1125542376
.word 1062531190
.word -1089704622
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.word 1051099679
.word 1042219100
.word -1108989595
.word -1087593042
.word 1059360412
.word -1088577714
.word -1096472376
.word -1093561192
.word 1057771088
.word -1094332377
.word -1114119013
.word 1058971827
.word -1085222409
.word 1064775246
.word 1059035048
.word -1085659782
.word 1060936615
.word -1126385027
.word 1001574693
.word -1096702703
.word -1083974080
.word -1084321697
.word -1094493936
.word -1109376765
.word 1040619167
.word -1100018138
.word 1059653825
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.word -1094387449
.word -1083582038
.word 1061445852
.word -1108620992
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.word -1116243746
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.word -1093554385
.word 1058213156
.word -1120632006
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.word -1083639004
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.word -1085254036
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.word 1057568025
.word -1085369128
.word -1088383176
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.word -1090060453
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.word 1053586973
.word 1040763984
.word -1103514382
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.word -1088421851
.word -1097454853
.word 1010465629
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.word -1092564044
.word 1063223340
.word 1059663131
.word 1009437053
.word 1058833930
.word -1099852117
.word 1045711641
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.word 1040409012
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.word 1047747199
.word 1058813470
.word -1088421293
.word -1082724185
.word -1096453257
.word 1064707786
.word -1085593648
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.word 1050727010
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.word 1061214592
.word 1042581728
.word -1088051683
.word -1102075866
.word 1059449452
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.word 1064889301
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.word -1113348555
.word 1063959689
.word -1097927155
.word -1102031732
.word -1089954654
.word 1057695456
.word 1063351880
.word -1089685496
.word 1012214508
.word -1089599008
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.word -1146888239
.word 1053928943
.word -1089169765
.word 1062409750
.word -1098768917
.word 1059575306
.word 1059130444
.word -1087330811
.word -1087963089
.word 1043195251
.word 1064052303
.word 1051992247
.word 1063278586
.word -1090292782
.word -1088398697
.word -1086581584
.word 1048280378
.word -1084215153
.word -1094257659
.word 1011885356
.word -1123577871
.word -1093035517
.word 1021753465
.word 1048959908
.word 1064510686
.word 1064005105
.word 1057040162
.word 1034376718
.word 1050923756
.word 1047171104
.word -1118701853
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.word -1110994531
.word 1057514493
.word -1090756830
.word 1056725401
.word -1097580155
.word 1047176778
.word 1060279566
.word 1063689843
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.word -1088536598
.word -1089961341
.word -1083171359
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.word 1056922600
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.word -1102302604
.word 1060744018
.word -1125821916
.word -1083986230
.word -1092122572
.word -1090947991
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.word 1061618703
.word 1053277685
.word -1088924150
.word -1084735719
.word -1083895063
.word 1029963625
.word 1045272046
.word 1056334694
.word -1112609010
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.word -1107100041
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.word 1047453695
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.word 1064570154
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.word 1064476148
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.word 1061473312
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.text
.align 2
.global wrap
.type wrap, %function
wrap:
.LFB9:
.cfi_startproc
sub sp, sp, #48
.cfi_def_cfa_offset 48
str x0, [sp, 24]
str x1, [sp, 16]
str x2, [sp, 8]
ldr x0, [sp, 8]
mov w1, w0
ldr x0, [sp, 16]
sub w0, w1, w0
add w0, w0, 1
str w0, [sp, 44]
ldr x1, [sp, 24]
ldr x0, [sp, 16]
cmp x1, x0
bge .L9
ldrsw x1, [sp, 44]
ldr x2, [sp, 16]
ldr x0, [sp, 24]
sub x2, x2, x0
ldrsw x0, [sp, 44]
sdiv x0, x2, x0
add x0, x0, 1
mul x0, x1, x0
ldr x1, [sp, 24]
add x0, x1, x0
str x0, [sp, 24]
.L9:
ldr x1, [sp, 24]
ldr x0, [sp, 16]
sub x0, x1, x0
ldrsw x1, [sp, 44]
sdiv x2, x0, x1
mul x1, x2, x1
sub x1, x0, x1
ldr x0, [sp, 16]
add x0, x1, x0
add sp, sp, 48
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE9:
.size wrap, .-wrap
.align 2
.global fxp_get_int_part
.type fxp_get_int_part, %function
fxp_get_int_part:
.LFB10:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str x0, [sp, 8]
ldr x0, [sp, 8]
cmp x0, 0
bge .L12
ldr x0, [sp, 8]
neg x1, x0
adrp x0, _fxp_imask
add x0, x0, :lo12:_fxp_imask
ldr x0, [x0]
and x0, x1, x0
neg x0, x0
b .L14
.L12:
adrp x0, _fxp_imask
add x0, x0, :lo12:_fxp_imask
ldr x1, [x0]
ldr x0, [sp, 8]
and x0, x1, x0
.L14:
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE10:
.size fxp_get_int_part, .-fxp_get_int_part
.align 2
.global fxp_get_frac_part
.type fxp_get_frac_part, %function
fxp_get_frac_part:
.LFB11:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str x0, [sp, 8]
ldr x0, [sp, 8]
cmp x0, 0
bge .L16
ldr x0, [sp, 8]
neg x1, x0
adrp x0, _fxp_fmask
add x0, x0, :lo12:_fxp_fmask
ldr x0, [x0]
and x0, x1, x0
neg x0, x0
b .L18
.L16:
adrp x0, _fxp_fmask
add x0, x0, :lo12:_fxp_fmask
ldr x1, [x0]
ldr x0, [sp, 8]
and x0, x1, x0
.L18:
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE11:
.size fxp_get_frac_part, .-fxp_get_frac_part
.align 2
.global fxp_quantize
.type fxp_quantize, %function
fxp_quantize:
.LFB12:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str x0, [sp, 24]
adrp x0, overflow_mode
add x0, x0, :lo12:overflow_mode
ldr w0, [x0]
cmp w0, 2
bne .L20
adrp x0, _fxp_min
add x0, x0, :lo12:_fxp_min
ldr x0, [x0]
ldr x1, [sp, 24]
cmp x1, x0
bge .L21
adrp x0, _fxp_min
add x0, x0, :lo12:_fxp_min
ldr x0, [x0]
b .L22
.L21:
adrp x0, _fxp_max
add x0, x0, :lo12:_fxp_max
ldr x0, [x0]
ldr x1, [sp, 24]
cmp x1, x0
ble .L23
adrp x0, _fxp_max
add x0, x0, :lo12:_fxp_max
ldr x0, [x0]
b .L22
.L20:
adrp x0, overflow_mode
add x0, x0, :lo12:overflow_mode
ldr w0, [x0]
cmp w0, 3
bne .L23
adrp x0, _fxp_min
add x0, x0, :lo12:_fxp_min
ldr x0, [x0]
ldr x1, [sp, 24]
cmp x1, x0
blt .L24
adrp x0, _fxp_max
add x0, x0, :lo12:_fxp_max
ldr x0, [x0]
ldr x1, [sp, 24]
cmp x1, x0
ble .L23
.L24:
adrp x0, _fxp_min
add x0, x0, :lo12:_fxp_min
ldr x1, [x0]
adrp x0, _fxp_max
add x0, x0, :lo12:_fxp_max
ldr x0, [x0]
mov x2, x0
ldr x0, [sp, 24]
bl wrap
b .L22
.L23:
ldr x0, [sp, 24]
.L22:
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE12:
.size fxp_quantize, .-fxp_quantize
.section .rodata
.align 3
.LC3:
.string "An Overflow Occurred in system's output"
.text
.align 2
.global fxp_verify_overflow
.type fxp_verify_overflow, %function
fxp_verify_overflow:
.LFB13:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str x0, [sp, 24]
ldr x0, [sp, 24]
bl fxp_quantize
adrp x0, .LC3
add x0, x0, :lo12:.LC3
bl printf
adrp x0, _fxp_max
add x0, x0, :lo12:_fxp_max
ldr x0, [x0]
ldr x1, [sp, 24]
cmp x1, x0
bgt .L26
adrp x0, _fxp_min
add x0, x0, :lo12:_fxp_min
ldr x0, [x0]
ldr x1, [sp, 24]
cmp x1, x0
blt .L26
mov w0, 1
b .L27
.L26:
mov w0, 0
.L27:
and w0, w0, 1
and w0, w0, 255
bl __DSVERIFIER_assert
nop
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE13:
.size fxp_verify_overflow, .-fxp_verify_overflow
.align 2
.global fxp_verify_overflow_node
.type fxp_verify_overflow_node, %function
fxp_verify_overflow_node:
.LFB14:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str x0, [sp, 24]
str x1, [sp, 16]
ldr x1, [sp, 16]
adrp x0, .LC2
add x0, x0, :lo12:.LC2
bl printf
adrp x0, _fxp_max
add x0, x0, :lo12:_fxp_max
ldr x0, [x0]
ldr x1, [sp, 24]
cmp x1, x0
bgt .L29
adrp x0, _fxp_min
add x0, x0, :lo12:_fxp_min
ldr x0, [x0]
ldr x1, [sp, 24]
cmp x1, x0
blt .L29
mov w0, 1
b .L30
.L29:
mov w0, 0
.L30:
and w0, w0, 1
and w0, w0, 255
bl __DSVERIFIER_assert
nop
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE14:
.size fxp_verify_overflow_node, .-fxp_verify_overflow_node
.align 2
.global fxp_verify_overflow_array
.type fxp_verify_overflow_array, %function
fxp_verify_overflow_array:
.LFB15:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
str w1, [sp, 20]
str wzr, [sp, 44]
str wzr, [sp, 44]
b .L32
.L33:
ldrsw x0, [sp, 44]
lsl x0, x0, 3
ldr x1, [sp, 24]
add x0, x1, x0
ldr x0, [x0]
bl fxp_verify_overflow
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L32:
ldr w1, [sp, 44]
ldr w0, [sp, 20]
cmp w1, w0
blt .L33
nop
nop
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE15:
.size fxp_verify_overflow_array, .-fxp_verify_overflow_array
.align 2
.global fxp_int_to_fxp
.type fxp_int_to_fxp, %function
fxp_int_to_fxp:
.LFB16:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str w0, [sp, 12]
ldrsw x1, [sp, 12]
adrp x0, _fxp_one
add x0, x0, :lo12:_fxp_one
ldr x0, [x0]
mul x0, x1, x0
str x0, [sp, 24]
ldr x0, [sp, 24]
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE16:
.size fxp_int_to_fxp, .-fxp_int_to_fxp
.align 2
.global fxp_to_int
.type fxp_to_int, %function
fxp_to_int:
.LFB17:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str x0, [sp, 8]
ldr x0, [sp, 8]
cmp x0, 0
blt .L37
adrp x0, _fxp_half
add x0, x0, :lo12:_fxp_half
ldr x0, [x0]
ldr x1, [sp, 8]
add x0, x1, x0
str x0, [sp, 8]
b .L38
.L37:
adrp x0, _fxp_half
add x0, x0, :lo12:_fxp_half
ldr x0, [x0]
ldr x1, [sp, 8]
sub x0, x1, x0
str x0, [sp, 8]
.L38:
adrp x0, impl
add x0, x0, :lo12:impl
ldr w0, [x0, 4]
ldr x1, [sp, 8]
asr x0, x1, x0
str x0, [sp, 8]
ldr x0, [sp, 8]
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE17:
.size fxp_to_int, .-fxp_to_int
.align 2
.global fxp_float_to_fxp
.type fxp_float_to_fxp, %function
fxp_float_to_fxp:
.LFB18:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str s0, [sp, 12]
ldr s0, [sp, 12]
fcvt d1, s0
adrp x0, impl
add x0, x0, :lo12:impl
ldr w1, [x0, 4]
adrp x0, scale_factor
add x0, x0, :lo12:scale_factor
sxtw x1, w1
ldr d0, [x0, x1, lsl 3]
fmul d0, d1, d0
str d0, [sp, 24]
ldr s0, [sp, 12]
fcmpe s0, #0.0
bge .L45
b .L46
.L45:
ldr d1, [sp, 24]
fmov d0, 5.0e-1
fadd d0, d1, d0
fcvtzs d0, d0
str d0, [sp, 16]
b .L43
.L46:
ldr d1, [sp, 24]
fmov d0, 5.0e-1
fsub d0, d1, d0
fcvtzs d0, d0
str d0, [sp, 16]
.L43:
ldr x0, [sp, 16]
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE18:
.size fxp_float_to_fxp, .-fxp_float_to_fxp
.align 2
.global fxp_double_to_fxp
.type fxp_double_to_fxp, %function
fxp_double_to_fxp:
.LFB19:
.cfi_startproc
sub sp, sp, #48
.cfi_def_cfa_offset 48
str d0, [sp, 8]
adrp x0, impl
add x0, x0, :lo12:impl
ldr w1, [x0, 4]
adrp x0, scale_factor
add x0, x0, :lo12:scale_factor
sxtw x1, w1
ldr d0, [x0, x1, lsl 3]
ldr d1, [sp, 8]
fmul d0, d1, d0
str d0, [sp, 32]
adrp x0, rounding_mode
add x0, x0, :lo12:rounding_mode
ldr w0, [x0]
cmp w0, 0
bne .L48
ldr d0, [sp, 8]
fcmpe d0, #0.0
bge .L55
b .L57
.L55:
ldr d1, [sp, 32]
fmov d0, 5.0e-1
fadd d0, d1, d0
fcvtzs d0, d0
str d0, [sp, 24]
b .L51
.L57:
ldr d1, [sp, 32]
fmov d0, 5.0e-1
fsub d0, d1, d0
fcvtzs d0, d0
str d0, [sp, 24]
b .L51
.L48:
adrp x0, rounding_mode
add x0, x0, :lo12:rounding_mode
ldr w0, [x0]
cmp w0, 1
bne .L52
ldr d0, [sp, 32]
fcvtzs d0, d0
str d0, [sp, 24]
ldr d0, [sp, 24]
scvtf d0, d0
ldr d1, [sp, 32]
fsub d0, d1, d0
str d0, [sp, 40]
ldr d0, [sp, 8]
fcmpe d0, #0.0
bmi .L56
b .L51
.L56:
ldr d0, [sp, 40]
fcmp d0, #0.0
beq .L51
ldr d1, [sp, 32]
fmov d0, 1.0e+0
fsub d0, d1, d0
str d0, [sp, 32]
ldr d0, [sp, 32]
fcvtzs d0, d0
str d0, [sp, 24]
b .L51
.L52:
adrp x0, rounding_mode
add x0, x0, :lo12:rounding_mode
ldr w0, [x0]
cmp w0, 0
bne .L51
ldr d0, [sp, 32]
fcvtzs d0, d0
str d0, [sp, 24]
.L51:
ldr x0, [sp, 24]
add sp, sp, 48
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE19:
.size fxp_double_to_fxp, .-fxp_double_to_fxp
.align 2
.global fxp_float_to_fxp_array
.type fxp_float_to_fxp_array, %function
fxp_float_to_fxp_array:
.LFB20:
.cfi_startproc
stp x29, x30, [sp, -80]!
.cfi_def_cfa_offset 80
.cfi_offset 29, -80
.cfi_offset 30, -72
mov x29, sp
str x19, [sp, 16]
.cfi_offset 19, -64
str x0, [sp, 56]
str x1, [sp, 48]
str w2, [sp, 44]
str wzr, [sp, 76]
b .L59
.L60:
ldrsw x0, [sp, 76]
lsl x0, x0, 2
ldr x1, [sp, 56]
add x0, x1, x0
ldr s0, [x0]
ldrsw x0, [sp, 76]
lsl x0, x0, 3
ldr x1, [sp, 48]
add x19, x1, x0
bl fxp_float_to_fxp
str x0, [x19]
ldr w0, [sp, 76]
add w0, w0, 1
str w0, [sp, 76]
.L59:
ldr w1, [sp, 76]
ldr w0, [sp, 44]
cmp w1, w0
blt .L60
nop
nop
ldr x19, [sp, 16]
ldp x29, x30, [sp], 80
.cfi_restore 30
.cfi_restore 29
.cfi_restore 19
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE20:
.size fxp_float_to_fxp_array, .-fxp_float_to_fxp_array
.align 2
.global fxp_double_to_fxp_array
.type fxp_double_to_fxp_array, %function
fxp_double_to_fxp_array:
.LFB21:
.cfi_startproc
stp x29, x30, [sp, -80]!
.cfi_def_cfa_offset 80
.cfi_offset 29, -80
.cfi_offset 30, -72
mov x29, sp
str x19, [sp, 16]
.cfi_offset 19, -64
str x0, [sp, 56]
str x1, [sp, 48]
str w2, [sp, 44]
str wzr, [sp, 76]
b .L62
.L63:
ldrsw x0, [sp, 76]
lsl x0, x0, 3
ldr x1, [sp, 56]
add x0, x1, x0
ldr d0, [x0]
ldrsw x0, [sp, 76]
lsl x0, x0, 3
ldr x1, [sp, 48]
add x19, x1, x0
bl fxp_double_to_fxp
str x0, [x19]
ldr w0, [sp, 76]
add w0, w0, 1
str w0, [sp, 76]
.L62:
ldr w1, [sp, 76]
ldr w0, [sp, 44]
cmp w1, w0
blt .L63
nop
nop
ldr x19, [sp, 16]
ldp x29, x30, [sp], 80
.cfi_restore 30
.cfi_restore 29
.cfi_restore 19
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE21:
.size fxp_double_to_fxp_array, .-fxp_double_to_fxp_array
.align 2
.global fxp_to_float
.type fxp_to_float, %function
fxp_to_float:
.LFB22:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str x0, [sp, 8]
ldr x0, [sp, 8]
str w0, [sp, 24]
ldr w0, [sp, 24]
scvtf d1, w0
adrp x0, impl
add x0, x0, :lo12:impl
ldr w1, [x0, 4]
adrp x0, scale_factor_inv
add x0, x0, :lo12:scale_factor_inv
sxtw x1, w1
ldr d0, [x0, x1, lsl 3]
fmul d0, d1, d0
fcvt s0, d0
str s0, [sp, 28]
ldr s0, [sp, 28]
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE22:
.size fxp_to_float, .-fxp_to_float
.align 2
.global fxp_to_double
.type fxp_to_double, %function
fxp_to_double:
.LFB23:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str x0, [sp, 8]
ldr x0, [sp, 8]
str w0, [sp, 20]
ldr w0, [sp, 20]
scvtf d1, w0
adrp x0, impl
add x0, x0, :lo12:impl
ldr w1, [x0, 4]
adrp x0, scale_factor_inv
add x0, x0, :lo12:scale_factor_inv
sxtw x1, w1
ldr d0, [x0, x1, lsl 3]
fmul d0, d1, d0
str d0, [sp, 24]
ldr d0, [sp, 24]
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE23:
.size fxp_to_double, .-fxp_to_double
.align 2
.global fxp_to_float_array
.type fxp_to_float_array, %function
fxp_to_float_array:
.LFB24:
.cfi_startproc
stp x29, x30, [sp, -80]!
.cfi_def_cfa_offset 80
.cfi_offset 29, -80
.cfi_offset 30, -72
mov x29, sp
str x19, [sp, 16]
.cfi_offset 19, -64
str x0, [sp, 56]
str x1, [sp, 48]
str w2, [sp, 44]
str wzr, [sp, 76]
b .L69
.L70:
ldrsw x0, [sp, 76]
lsl x0, x0, 3
ldr x1, [sp, 48]
add x0, x1, x0
ldr x2, [x0]
ldrsw x0, [sp, 76]
lsl x0, x0, 2
ldr x1, [sp, 56]
add x19, x1, x0
mov x0, x2
bl fxp_to_float
str s0, [x19]
ldr w0, [sp, 76]
add w0, w0, 1
str w0, [sp, 76]
.L69:
ldr w1, [sp, 76]
ldr w0, [sp, 44]
cmp w1, w0
blt .L70
nop
nop
ldr x19, [sp, 16]
ldp x29, x30, [sp], 80
.cfi_restore 30
.cfi_restore 29
.cfi_restore 19
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE24:
.size fxp_to_float_array, .-fxp_to_float_array
.align 2
.global fxp_to_double_array
.type fxp_to_double_array, %function
fxp_to_double_array:
.LFB25:
.cfi_startproc
stp x29, x30, [sp, -80]!
.cfi_def_cfa_offset 80
.cfi_offset 29, -80
.cfi_offset 30, -72
mov x29, sp
str x19, [sp, 16]
.cfi_offset 19, -64
str x0, [sp, 56]
str x1, [sp, 48]
str w2, [sp, 44]
str wzr, [sp, 76]
b .L72
.L73:
ldrsw x0, [sp, 76]
lsl x0, x0, 3
ldr x1, [sp, 48]
add x0, x1, x0
ldr x2, [x0]
ldrsw x0, [sp, 76]
lsl x0, x0, 3
ldr x1, [sp, 56]
add x19, x1, x0
mov x0, x2
bl fxp_to_double
str d0, [x19]
ldr w0, [sp, 76]
add w0, w0, 1
str w0, [sp, 76]
.L72:
ldr w1, [sp, 76]
ldr w0, [sp, 44]
cmp w1, w0
blt .L73
nop
nop
ldr x19, [sp, 16]
ldp x29, x30, [sp], 80
.cfi_restore 30
.cfi_restore 29
.cfi_restore 19
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE25:
.size fxp_to_double_array, .-fxp_to_double_array
.align 2
.global fxp_abs
.type fxp_abs, %function
fxp_abs:
.LFB26:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
ldr x0, [sp, 24]
cmp x0, 0
csneg x0, x0, x0, ge
str x0, [sp, 40]
ldr x0, [sp, 40]
bl fxp_quantize
str x0, [sp, 40]
ldr x0, [sp, 40]
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE26:
.size fxp_abs, .-fxp_abs
.align 2
.global fxp_add
.type fxp_add, %function
fxp_add:
.LFB27:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
str x1, [sp, 16]
ldr x1, [sp, 24]
ldr x0, [sp, 16]
add x0, x1, x0
str x0, [sp, 40]
ldr x0, [sp, 40]
bl fxp_quantize
str x0, [sp, 40]
ldr x0, [sp, 40]
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE27:
.size fxp_add, .-fxp_add
.align 2
.global fxp_sub
.type fxp_sub, %function
fxp_sub:
.LFB28:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
str x1, [sp, 16]
ldr x1, [sp, 24]
ldr x0, [sp, 16]
sub x0, x1, x0
str x0, [sp, 40]
ldr x0, [sp, 40]
bl fxp_quantize
str x0, [sp, 40]
ldr x0, [sp, 40]
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE28:
.size fxp_sub, .-fxp_sub
.align 2
.global fxp_mult
.type fxp_mult, %function
fxp_mult:
.LFB29:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
str x1, [sp, 16]
ldr x1, [sp, 24]
ldr x0, [sp, 16]
mul x0, x1, x0
str x0, [sp, 40]
ldr x0, [sp, 40]
cmp x0, 0
blt .L81
adrp x0, impl
add x0, x0, :lo12:impl
ldr w0, [x0, 4]
sub w0, w0, #1
mov w1, 1
lsl w0, w1, w0
sxtw x1, w0
ldr x0, [sp, 40]
and x0, x1, x0
lsl x1, x0, 1
ldr x0, [sp, 40]
add x1, x1, x0
adrp x0, impl
add x0, x0, :lo12:impl
ldr w0, [x0, 4]
asr x0, x1, x0
str x0, [sp, 32]
b .L82
.L81:
ldr x0, [sp, 40]
neg x1, x0
adrp x0, impl
add x0, x0, :lo12:impl
ldr w0, [x0, 4]
sub w0, w0, #1
mov w2, 1
lsl w0, w2, w0
sxtw x0, w0
and x0, x1, x0
lsl x1, x0, 1
ldr x0, [sp, 40]
sub x1, x1, x0
adrp x0, impl
add x0, x0, :lo12:impl
ldr w0, [x0, 4]
asr x0, x1, x0
neg x0, x0
str x0, [sp, 32]
.L82:
ldr x0, [sp, 32]
bl fxp_quantize
str x0, [sp, 32]
ldr x0, [sp, 32]
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE29:
.size fxp_mult, .-fxp_mult
.align 2
.global fxp_div
.type fxp_div, %function
fxp_div:
.LFB30:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
str x1, [sp, 16]
ldr x0, [sp, 16]
cmp x0, 0
cset w0, ne
and w0, w0, 255
bl __DSVERIFIER_assume
adrp x0, impl
add x0, x0, :lo12:impl
ldr w0, [x0, 4]
ldr x1, [sp, 24]
lsl x1, x1, x0
ldr x0, [sp, 16]
sdiv x0, x1, x0
str x0, [sp, 40]
ldr x0, [sp, 40]
bl fxp_quantize
str x0, [sp, 40]
ldr x0, [sp, 40]
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE30:
.size fxp_div, .-fxp_div
.align 2
.global fxp_neg
.type fxp_neg, %function
fxp_neg:
.LFB31:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
ldr x0, [sp, 24]
neg x0, x0
str x0, [sp, 40]
ldr x0, [sp, 40]
bl fxp_quantize
str x0, [sp, 40]
ldr x0, [sp, 40]
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE31:
.size fxp_neg, .-fxp_neg
.align 2
.global fxp_sign
.type fxp_sign, %function
fxp_sign:
.LFB32:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str x0, [sp, 8]
ldr x0, [sp, 8]
cmp x0, 0
beq .L89
ldr x0, [sp, 8]
cmp x0, 0
bge .L90
adrp x0, _fxp_minus_one
add x0, x0, :lo12:_fxp_minus_one
ldr x0, [x0]
b .L93
.L90:
adrp x0, _fxp_one
add x0, x0, :lo12:_fxp_one
ldr x0, [x0]
b .L93
.L89:
mov x0, 0
.L93:
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE32:
.size fxp_sign, .-fxp_sign
.align 2
.global fxp_shrl
.type fxp_shrl, %function
fxp_shrl:
.LFB33:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str x0, [sp, 8]
str w1, [sp, 4]
ldr x0, [sp, 8]
mov w1, w0
ldr w0, [sp, 4]
lsr w0, w1, w0
uxtw x0, w0
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE33:
.size fxp_shrl, .-fxp_shrl
.align 2
.global fxp_square
.type fxp_square, %function
fxp_square:
.LFB34:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str x0, [sp, 24]
ldr x1, [sp, 24]
ldr x0, [sp, 24]
bl fxp_mult
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE34:
.size fxp_square, .-fxp_square
.section .rodata
.align 3
.LC4:
.string "\n%i"
.text
.align 2
.global fxp_print_int
.type fxp_print_int, %function
fxp_print_int:
.LFB35:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str x0, [sp, 24]
ldr x0, [sp, 24]
mov w1, w0
adrp x0, .LC4
add x0, x0, :lo12:.LC4
bl printf
nop
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE35:
.size fxp_print_int, .-fxp_print_int
.section .rodata
.align 3
.LC5:
.string "\n%f"
.text
.align 2
.global fxp_print_float
.type fxp_print_float, %function
fxp_print_float:
.LFB36:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str x0, [sp, 24]
ldr x0, [sp, 24]
bl fxp_to_float
fcvt d0, s0
adrp x0, .LC5
add x0, x0, :lo12:.LC5
bl printf
nop
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE36:
.size fxp_print_float, .-fxp_print_float
.align 2
.global fxp_print_float_array
.type fxp_print_float_array, %function
fxp_print_float_array:
.LFB37:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
str w1, [sp, 20]
str wzr, [sp, 44]
b .L101
.L102:
ldrsw x0, [sp, 44]
lsl x0, x0, 3
ldr x1, [sp, 24]
add x0, x1, x0
ldr x0, [x0]
bl fxp_to_float
fcvt d0, s0
adrp x0, .LC5
add x0, x0, :lo12:.LC5
bl printf
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L101:
ldr w1, [sp, 44]
ldr w0, [sp, 20]
cmp w1, w0
blt .L102
nop
nop
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE37:
.size fxp_print_float_array, .-fxp_print_float_array
.section .rodata
.align 3
.LC6:
.string "%s = {"
.align 3
.LC7:
.string " %jd "
.align 3
.LC8:
.string "}"
.text
.align 2
.global print_fxp_array_elements
.type print_fxp_array_elements, %function
print_fxp_array_elements:
.LFB38:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str x0, [sp, 40]
str x1, [sp, 32]
str w2, [sp, 28]
ldr x1, [sp, 40]
adrp x0, .LC6
add x0, x0, :lo12:.LC6
bl printf
str wzr, [sp, 60]
b .L104
.L105:
ldrsw x0, [sp, 60]
lsl x0, x0, 3
ldr x1, [sp, 32]
add x0, x1, x0
ldr x0, [x0]
mov x1, x0
adrp x0, .LC7
add x0, x0, :lo12:.LC7
bl printf
ldr w0, [sp, 60]
add w0, w0, 1
str w0, [sp, 60]
.L104:
ldr w1, [sp, 60]
ldr w0, [sp, 28]
cmp w1, w0
blt .L105
adrp x0, .LC8
add x0, x0, :lo12:.LC8
bl puts
nop
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE38:
.size print_fxp_array_elements, .-print_fxp_array_elements
.align 2
.global initialize_array
.type initialize_array, %function
initialize_array:
.LFB39:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str x0, [sp, 8]
str w1, [sp, 4]
str wzr, [sp, 28]
b .L107
.L108:
ldrsw x0, [sp, 28]
lsl x0, x0, 3
ldr x1, [sp, 8]
add x0, x1, x0
str xzr, [x0]
ldr w0, [sp, 28]
add w0, w0, 1
str w0, [sp, 28]
.L107:
ldr w1, [sp, 28]
ldr w0, [sp, 4]
cmp w1, w0
blt .L108
nop
nop
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE39:
.size initialize_array, .-initialize_array
.align 2
.global revert_array
.type revert_array, %function
revert_array:
.LFB40:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str x0, [sp, 40]
str x1, [sp, 32]
str w2, [sp, 28]
ldr w1, [sp, 28]
ldr x0, [sp, 32]
bl initialize_array
str wzr, [sp, 60]
b .L110
.L111:
ldr w1, [sp, 28]
ldr w0, [sp, 60]
sub w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
sub x0, x0, #8
ldr x1, [sp, 40]
add x1, x1, x0
ldrsw x0, [sp, 60]
lsl x0, x0, 3
ldr x2, [sp, 32]
add x0, x2, x0
ldr d0, [x1]
str d0, [x0]
ldr w0, [sp, 60]
add w0, w0, 1
str w0, [sp, 60]
.L110:
ldr w1, [sp, 60]
ldr w0, [sp, 28]
cmp w1, w0
blt .L111
nop
nop
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE40:
.size revert_array, .-revert_array
.align 2
.global internal_pow
.type internal_pow, %function
internal_pow:
.LFB41:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str d0, [sp, 8]
str d1, [sp]
fmov d0, 1.0e+0
str d0, [sp, 24]
str wzr, [sp, 20]
b .L113
.L114:
ldr d1, [sp, 24]
ldr d0, [sp, 8]
fmul d0, d1, d0
str d0, [sp, 24]
ldr w0, [sp, 20]
add w0, w0, 1
str w0, [sp, 20]
.L113:
ldr w0, [sp, 20]
scvtf d0, w0
ldr d1, [sp]
fcmpe d1, d0
bgt .L114
ldr d0, [sp, 24]
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE41:
.size internal_pow, .-internal_pow
.align 2
.global internal_abs
.type internal_abs, %function
internal_abs:
.LFB42:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str d0, [sp, 8]
ldr d0, [sp, 8]
fcmpe d0, #0.0
bmi .L121
b .L122
.L121:
ldr d0, [sp, 8]
fneg d0, d0
b .L120
.L122:
ldr d0, [sp, 8]
.L120:
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE42:
.size internal_abs, .-internal_abs
.align 2
.global fatorial
.type fatorial, %function
fatorial:
.LFB43:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str w0, [sp, 28]
ldr w0, [sp, 28]
cmp w0, 0
beq .L124
ldr w0, [sp, 28]
sub w0, w0, #1
bl fatorial
mov w1, w0
ldr w0, [sp, 28]
mul w0, w1, w0
b .L126
.L124:
mov w0, 1
.L126:
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE43:
.size fatorial, .-fatorial
.section .rodata
.align 3
.LC9:
.string "[DEBUG] the first constraint of Jury criteria failed: (F(1) > 0)"
.align 3
.LC10:
.string "[DEBUG] the second constraint of Jury criteria failed: (F(-1)*(-1)^n > 0)"
.align 3
.LC11:
.string "[DEBUG] the third constraint of Jury criteria failed: (abs(a0) < a_{n}*z^{n})"
.text
.align 2
.global check_stability
.type check_stability, %function
check_stability:
.LFB44:
.cfi_startproc
stp x29, x30, [sp, -256]!
.cfi_def_cfa_offset 256
.cfi_offset 29, -256
.cfi_offset 30, -248
mov x29, sp
.cfi_def_cfa_register 29
stp x19, x20, [sp, 16]
stp x21, x22, [sp, 32]
stp x23, x24, [sp, 48]
stp x25, x26, [sp, 64]
stp x27, x28, [sp, 80]
str d8, [sp, 96]
sub sp, sp, #16
.cfi_offset 19, -240
.cfi_offset 20, -232
.cfi_offset 21, -224
.cfi_offset 22, -216
.cfi_offset 23, -208
.cfi_offset 24, -200
.cfi_offset 25, -192
.cfi_offset 26, -184
.cfi_offset 27, -176
.cfi_offset 28, -168
.cfi_offset 72, -160
str x0, [x29, 152]
str w1, [x29, 148]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [x29, 248]
mov x1, 0
mov x0, sp
str x0, [x29, 120]
ldr w0, [x29, 148]
lsl w0, w0, 1
sub w0, w0, #1
str w0, [x29, 188]
ldr w0, [x29, 148]
str w0, [x29, 172]
ldr w28, [x29, 148]
ldr w30, [x29, 188]
sxtw x0, w28
sub x0, x0, #1
str x0, [x29, 208]
sxtw x0, w28
mov x20, x0
mov x21, 0
lsr x0, x20, 58
lsl x19, x21, 6
orr x19, x0, x19
lsl x18, x20, 6
sxtw x0, w28
lsl x19, x0, 3
sxtw x0, w30
sub x0, x0, #1
str x0, [x29, 216]
sxtw x0, w28
mov x8, x0
mov x9, 0
sxtw x0, w30
mov x6, x0
mov x7, 0
mul x1, x8, x6
umulh x0, x8, x6
madd x0, x9, x6, x0
madd x0, x8, x7, x0
str x1, [x29, 128]
str x0, [x29, 136]
ldp x6, x7, [x29, 128]
mov x0, x6
lsr x0, x0, 58
mov x1, x7
lsl x17, x1, 6
orr x17, x0, x17
mov x0, x6
lsl x16, x0, 6
sxtw x0, w28
mov x4, x0
mov x5, 0
sxtw x0, w30
mov x2, x0
mov x3, 0
mul x1, x4, x2
umulh x0, x4, x2
madd x0, x5, x2, x0
madd x0, x4, x3, x0
mov x26, x1
mov x27, x0
lsr x0, x26, 58
lsl x15, x27, 6
orr x15, x0, x15
lsl x14, x26, 6
sxtw x1, w28
sxtw x0, w30
mul x0, x1, x0
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L128:
cmp sp, x1
beq .L129
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L128
.L129:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L130
str xzr, [sp, 1024]
.L130:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 224]
ldr w0, [x29, 148]
sxtw x1, w0
sub x1, x1, #1
str x1, [x29, 232]
sxtw x1, w0
mov x24, x1
mov x25, 0
lsr x1, x24, 58
lsl x13, x25, 6
orr x13, x1, x13
lsl x12, x24, 6
sxtw x1, w0
mov x22, x1
mov x23, 0
lsr x1, x22, 58
lsl x11, x23, 6
orr x11, x1, x11
lsl x10, x22, 6
sxtw x0, w0
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L131:
cmp sp, x1
beq .L132
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L131
.L132:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L133
str xzr, [sp, 1024]
.L133:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 240]
str wzr, [x29, 176]
b .L134
.L135:
ldrsw x0, [x29, 176]
lsl x0, x0, 3
ldr x1, [x29, 152]
add x0, x1, x0
ldr d0, [x0]
ldr x0, [x29, 240]
ldrsw x1, [x29, 176]
str d0, [x0, x1, lsl 3]
ldr w0, [x29, 176]
add w0, w0, 1
str w0, [x29, 176]
.L134:
ldr w1, [x29, 176]
ldr w0, [x29, 148]
cmp w1, w0
blt .L135
str xzr, [x29, 200]
str wzr, [x29, 176]
b .L136
.L137:
ldrsw x0, [x29, 176]
lsl x0, x0, 3
ldr x1, [x29, 152]
add x0, x1, x0
ldr d0, [x0]
ldr d1, [x29, 200]
fadd d0, d1, d0
str d0, [x29, 200]
ldr w0, [x29, 176]
add w0, w0, 1
str w0, [x29, 176]
.L136:
ldr w1, [x29, 176]
ldr w0, [x29, 148]
cmp w1, w0
blt .L137
ldr d0, [x29, 200]
fcmpe d0, #0.0
bls .L166
b .L169
.L166:
adrp x0, .LC9
add x0, x0, :lo12:.LC9
bl printf
mov w0, 0
b .L140
.L169:
str xzr, [x29, 200]
str wzr, [x29, 176]
b .L141
.L142:
ldrsw x0, [x29, 176]
lsl x0, x0, 3
ldr x1, [x29, 152]
add x0, x1, x0
ldr d8, [x0]
ldr w0, [x29, 148]
sub w1, w0, #1
ldr w0, [x29, 176]
sub w0, w1, w0
scvtf d0, w0
fmov d1, d0
fmov d0, -1.0e+0
bl internal_pow
fmul d0, d8, d0
ldr d1, [x29, 200]
fadd d0, d1, d0
str d0, [x29, 200]
ldr w0, [x29, 176]
add w0, w0, 1
str w0, [x29, 176]
.L141:
ldr w1, [x29, 176]
ldr w0, [x29, 148]
cmp w1, w0
blt .L142
ldr w0, [x29, 148]
sub w0, w0, #1
scvtf d0, w0
fmov d1, d0
fmov d0, -1.0e+0
bl internal_pow
fmov d1, d0
ldr d0, [x29, 200]
fmul d0, d0, d1
str d0, [x29, 200]
ldr d0, [x29, 200]
fcmpe d0, #0.0
bls .L167
b .L170
.L167:
adrp x0, .LC10
add x0, x0, :lo12:.LC10
bl printf
mov w0, 0
b .L140
.L170:
ldrsw x0, [x29, 148]
lsl x0, x0, 3
sub x0, x0, #8
ldr x1, [x29, 152]
add x0, x1, x0
ldr d0, [x0]
bl internal_abs
fmov d1, d0
ldr x0, [x29, 152]
ldr d0, [x0]
fcmpe d1, d0
bgt .L168
b .L171
.L168:
adrp x0, .LC11
add x0, x0, :lo12:.LC11
bl printf
mov w0, 0
b .L140
.L171:
str wzr, [x29, 176]
b .L147
.L150:
str wzr, [x29, 180]
b .L148
.L149:
lsr x1, x19, 3
ldr x0, [x29, 224]
ldrsw x2, [x29, 180]
ldrsw x3, [x29, 176]
mul x1, x3, x1
add x1, x2, x1
str xzr, [x0, x1, lsl 3]
ldr w0, [x29, 180]
add w0, w0, 1
str w0, [x29, 180]
.L148:
ldr w1, [x29, 180]
ldr w0, [x29, 172]
cmp w1, w0
blt .L149
ldr w0, [x29, 176]
add w0, w0, 1
str w0, [x29, 176]
.L147:
ldr w1, [x29, 176]
ldr w0, [x29, 188]
cmp w1, w0
blt .L150
str wzr, [x29, 176]
b .L151
.L159:
str wzr, [x29, 180]
b .L152
.L158:
ldr w0, [x29, 176]
cmp w0, 0
bne .L153
ldrsw x0, [x29, 180]
lsl x0, x0, 3
ldr x1, [x29, 152]
add x0, x1, x0
lsr x1, x19, 3
ldr d0, [x0]
ldr x0, [x29, 224]
ldrsw x2, [x29, 180]
ldrsw x3, [x29, 176]
mul x1, x3, x1
add x1, x2, x1
str d0, [x0, x1, lsl 3]
b .L154
.L153:
ldr w0, [x29, 176]
and w0, w0, 1
cmp w0, 0
beq .L155
str wzr, [x29, 184]
b .L156
.L157:
lsr x2, x19, 3
ldr w0, [x29, 176]
sub w4, w0, #1
ldr w1, [x29, 172]
ldr w0, [x29, 184]
sub w0, w1, w0
sub w3, w0, #1
lsr x1, x19, 3
ldr x0, [x29, 224]
sxtw x3, w3
sxtw x4, w4
mul x2, x4, x2
add x2, x3, x2
ldr d0, [x0, x2, lsl 3]
ldr x0, [x29, 224]
ldrsw x2, [x29, 184]
ldrsw x3, [x29, 176]
mul x1, x3, x1
add x1, x2, x1
str d0, [x0, x1, lsl 3]
ldr w0, [x29, 184]
add w0, w0, 1
str w0, [x29, 184]
.L156:
ldr w1, [x29, 184]
ldr w0, [x29, 172]
cmp w1, w0
blt .L157
ldr w0, [x29, 172]
sub w0, w0, #1
str w0, [x29, 172]
ldr w0, [x29, 172]
str w0, [x29, 180]
b .L154
.L155:
lsr x1, x19, 3
ldr w0, [x29, 176]
sub w3, w0, #2
ldr x0, [x29, 224]
ldrsw x2, [x29, 180]
sxtw x3, w3
mul x1, x3, x1
add x1, x2, x1
ldr d1, [x0, x1, lsl 3]
lsr x1, x19, 3
ldr w0, [x29, 176]
sub w3, w0, #2
ldr x0, [x29, 224]
ldrsw x2, [x29, 172]
sxtw x3, w3
mul x1, x3, x1
add x1, x2, x1
ldr d2, [x0, x1, lsl 3]
lsr x1, x19, 3
ldr w0, [x29, 176]
sub w2, w0, #2
ldr x0, [x29, 224]
sxtw x2, w2
mul x1, x2, x1
ldr d0, [x0, x1, lsl 3]
fdiv d2, d2, d0
lsr x1, x19, 3
ldr w0, [x29, 176]
sub w3, w0, #1
ldr x0, [x29, 224]
ldrsw x2, [x29, 180]
sxtw x3, w3
mul x1, x3, x1
add x1, x2, x1
ldr d0, [x0, x1, lsl 3]
fmul d0, d2, d0
lsr x1, x19, 3
fsub d0, d1, d0
ldr x0, [x29, 224]
ldrsw x2, [x29, 180]
ldrsw x3, [x29, 176]
mul x1, x3, x1
add x1, x2, x1
str d0, [x0, x1, lsl 3]
.L154:
ldr w0, [x29, 180]
add w0, w0, 1
str w0, [x29, 180]
.L152:
ldr w1, [x29, 180]
ldr w0, [x29, 172]
cmp w1, w0
blt .L158
ldr w0, [x29, 176]
add w0, w0, 1
str w0, [x29, 176]
.L151:
ldr w1, [x29, 176]
ldr w0, [x29, 188]
cmp w1, w0
blt .L159
ldr x0, [x29, 224]
ldr d0, [x0]
fcmpe d0, #0.0
cset w0, ge
and w0, w0, 255
str w0, [x29, 192]
str wzr, [x29, 176]
b .L160
.L163:
ldr w0, [x29, 176]
and w0, w0, 1
cmp w0, 0
bne .L161
lsr x1, x19, 3
ldr x0, [x29, 224]
ldrsw x2, [x29, 176]
mul x1, x2, x1
ldr d0, [x0, x1, lsl 3]
fcmpe d0, #0.0
cset w0, ge
and w0, w0, 255
str w0, [x29, 196]
ldr w1, [x29, 192]
ldr w0, [x29, 196]
cmp w1, w0
beq .L172
mov w0, 0
b .L140
.L172:
nop
.L161:
ldr w0, [x29, 176]
add w0, w0, 1
str w0, [x29, 176]
.L160:
ldr w1, [x29, 176]
ldr w0, [x29, 188]
cmp w1, w0
blt .L163
mov w0, 1
.L140:
ldr x1, [x29, 120]
mov sp, x1
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [x29, 248]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L165
bl __stack_chk_fail
.L165:
mov w0, w1
mov sp, x29
ldr d8, [sp, 96]
ldp x19, x20, [sp, 16]
ldp x21, x22, [sp, 32]
ldp x23, x24, [sp, 48]
ldp x25, x26, [sp, 64]
ldp x27, x28, [sp, 80]
ldp x29, x30, [sp], 256
.cfi_restore 30
.cfi_restore 29
.cfi_restore 27
.cfi_restore 28
.cfi_restore 25
.cfi_restore 26
.cfi_restore 23
.cfi_restore 24
.cfi_restore 21
.cfi_restore 22
.cfi_restore 19
.cfi_restore 20
.cfi_restore 72
.cfi_def_cfa 31, 0
ret
.cfi_endproc
.LFE44:
.size check_stability, .-check_stability
.align 2
.global poly_sum
.type poly_sum, %function
poly_sum:
.LFB45:
.cfi_startproc
sub sp, sp, #64
.cfi_def_cfa_offset 64
str x0, [sp, 40]
str w1, [sp, 36]
str x2, [sp, 24]
str w3, [sp, 32]
str x4, [sp, 16]
str w5, [sp, 12]
ldr w0, [sp, 36]
ldr w2, [sp, 32]
ldr w1, [sp, 32]
cmp w2, w0
csel w0, w1, w0, ge
str w0, [sp, 12]
str wzr, [sp, 60]
b .L174
.L177:
ldr w1, [sp, 36]
ldr w0, [sp, 32]
cmp w1, w0
ble .L175
ldrsw x0, [sp, 60]
lsl x0, x0, 3
ldr x1, [sp, 40]
add x1, x1, x0
ldrsw x0, [sp, 60]
lsl x0, x0, 3
ldr x2, [sp, 16]
add x0, x2, x0
ldr d0, [x1]
str d0, [x0]
ldr w1, [sp, 36]
ldr w0, [sp, 32]
sub w0, w1, w0
ldr w1, [sp, 60]
cmp w1, w0
blt .L176
ldrsw x0, [sp, 60]
lsl x0, x0, 3
ldr x1, [sp, 16]
add x0, x1, x0
ldr d1, [x0]
ldr w1, [sp, 60]
ldr w0, [sp, 36]
sub w1, w1, w0
ldr w0, [sp, 32]
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 24]
add x0, x1, x0
ldr d0, [x0]
ldrsw x0, [sp, 60]
lsl x0, x0, 3
ldr x1, [sp, 16]
add x0, x1, x0
fadd d0, d1, d0
str d0, [x0]
b .L176
.L175:
ldrsw x0, [sp, 60]
lsl x0, x0, 3
ldr x1, [sp, 24]
add x1, x1, x0
ldrsw x0, [sp, 60]
lsl x0, x0, 3
ldr x2, [sp, 16]
add x0, x2, x0
ldr d0, [x1]
str d0, [x0]
ldr w1, [sp, 32]
ldr w0, [sp, 36]
sub w0, w1, w0
ldr w1, [sp, 60]
cmp w1, w0
blt .L176
ldrsw x0, [sp, 60]
lsl x0, x0, 3
ldr x1, [sp, 16]
add x0, x1, x0
ldr d1, [x0]
ldr w1, [sp, 60]
ldr w0, [sp, 32]
sub w1, w1, w0
ldr w0, [sp, 36]
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 40]
add x0, x1, x0
ldr d0, [x0]
ldrsw x0, [sp, 60]
lsl x0, x0, 3
ldr x1, [sp, 16]
add x0, x1, x0
fadd d0, d1, d0
str d0, [x0]
.L176:
ldr w0, [sp, 60]
add w0, w0, 1
str w0, [sp, 60]
.L174:
ldr w1, [sp, 60]
ldr w0, [sp, 12]
cmp w1, w0
blt .L177
nop
nop
add sp, sp, 64
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE45:
.size poly_sum, .-poly_sum
.align 2
.global poly_mult
.type poly_mult, %function
poly_mult:
.LFB46:
.cfi_startproc
sub sp, sp, #64
.cfi_def_cfa_offset 64
str x0, [sp, 40]
str w1, [sp, 36]
str x2, [sp, 24]
str w3, [sp, 32]
str x4, [sp, 16]
str w5, [sp, 12]
ldr w1, [sp, 36]
ldr w0, [sp, 32]
add w0, w1, w0
sub w0, w0, #1
str w0, [sp, 12]
str wzr, [sp, 52]
b .L179
.L182:
str wzr, [sp, 56]
b .L180
.L181:
ldr w1, [sp, 36]
ldr w0, [sp, 32]
add w1, w1, w0
ldr w0, [sp, 52]
sub w1, w1, w0
ldr w0, [sp, 56]
sub w0, w1, w0
sub w0, w0, #2
str w0, [sp, 60]
ldrsw x0, [sp, 60]
lsl x0, x0, 3
ldr x1, [sp, 16]
add x0, x1, x0
str xzr, [x0]
ldr w0, [sp, 56]
add w0, w0, 1
str w0, [sp, 56]
.L180:
ldr w1, [sp, 56]
ldr w0, [sp, 32]
cmp w1, w0
blt .L181
ldr w0, [sp, 52]
add w0, w0, 1
str w0, [sp, 52]
.L179:
ldr w1, [sp, 52]
ldr w0, [sp, 36]
cmp w1, w0
blt .L182
str wzr, [sp, 52]
b .L183
.L186:
str wzr, [sp, 56]
b .L184
.L185:
ldr w1, [sp, 36]
ldr w0, [sp, 32]
add w1, w1, w0
ldr w0, [sp, 52]
sub w1, w1, w0
ldr w0, [sp, 56]
sub w0, w1, w0
sub w0, w0, #2
str w0, [sp, 60]
ldrsw x0, [sp, 60]
lsl x0, x0, 3
ldr x1, [sp, 16]
add x0, x1, x0
ldr d1, [x0]
ldr w1, [sp, 36]
ldr w0, [sp, 52]
sub w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
sub x0, x0, #8
ldr x1, [sp, 40]
add x0, x1, x0
ldr d2, [x0]
ldr w1, [sp, 32]
ldr w0, [sp, 56]
sub w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
sub x0, x0, #8
ldr x1, [sp, 24]
add x0, x1, x0
ldr d0, [x0]
fmul d0, d2, d0
ldrsw x0, [sp, 60]
lsl x0, x0, 3
ldr x1, [sp, 16]
add x0, x1, x0
fadd d0, d1, d0
str d0, [x0]
ldr w0, [sp, 56]
add w0, w0, 1
str w0, [sp, 56]
.L184:
ldr w1, [sp, 56]
ldr w0, [sp, 32]
cmp w1, w0
blt .L185
ldr w0, [sp, 52]
add w0, w0, 1
str w0, [sp, 52]
.L183:
ldr w1, [sp, 52]
ldr w0, [sp, 36]
cmp w1, w0
blt .L186
nop
nop
add sp, sp, 64
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE46:
.size poly_mult, .-poly_mult
.section .rodata
.align 3
.LC12:
.string "/home/yashchopda/Desktop/dsverifier-v2.0.3-esbmc-v4.0-cbmc-5.6/bmc/core/util.h"
.align 3
.LC13:
.string "!(window_count == window_size)"
.text
.align 2
.global double_check_oscillations
.type double_check_oscillations, %function
double_check_oscillations:
.LFB47:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str x0, [sp, 24]
str w1, [sp, 20]
ldr x0, [sp, 24]
ldr d1, [x0]
ldrsw x0, [sp, 20]
lsl x0, x0, 3
sub x0, x0, #8
ldr x1, [sp, 24]
add x0, x1, x0
ldr d0, [x0]
fcmp d1, d0
cset w0, ne
and w0, w0, 255
bl __DSVERIFIER_assume
str wzr, [sp, 40]
str wzr, [sp, 44]
mov w0, 2
str w0, [sp, 48]
b .L188
.L195:
ldr w0, [sp, 48]
str w0, [sp, 56]
str wzr, [sp, 52]
b .L189
.L194:
ldr w1, [sp, 40]
ldr w0, [sp, 56]
cmp w1, w0
ble .L190
str wzr, [sp, 40]
str wzr, [sp, 44]
.L190:
ldr w1, [sp, 52]
ldr w0, [sp, 56]
add w0, w1, w0
str w0, [sp, 60]
ldr w1, [sp, 60]
ldr w0, [sp, 20]
cmp w1, w0
bge .L196
ldrsw x0, [sp, 52]
lsl x0, x0, 3
ldr x1, [sp, 24]
add x0, x1, x0
ldr d1, [x0]
ldrsw x0, [sp, 60]
lsl x0, x0, 3
ldr x1, [sp, 24]
add x0, x1, x0
ldr d0, [x0]
fcmp d1, d0
bne .L192
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
ldr w1, [sp, 44]
ldr w0, [sp, 56]
cmp w1, w0
bne .L192
adrp x0, __PRETTY_FUNCTION__.19
add x3, x0, :lo12:__PRETTY_FUNCTION__.19
mov w2, 209
adrp x0, .LC12
add x1, x0, :lo12:.LC12
adrp x0, .LC13
add x0, x0, :lo12:.LC13
bl __assert_fail
.L192:
ldr w0, [sp, 40]
add w0, w0, 1
str w0, [sp, 40]
ldr w0, [sp, 52]
add w0, w0, 1
str w0, [sp, 52]
.L189:
ldr w1, [sp, 52]
ldr w0, [sp, 20]
cmp w1, w0
blt .L194
b .L193
.L196:
nop
.L193:
ldr w0, [sp, 48]
add w0, w0, 1
str w0, [sp, 48]
.L188:
ldr w1, [sp, 48]
ldr w0, [sp, 20]
cmp w1, w0
blt .L195
nop
nop
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE47:
.size double_check_oscillations, .-double_check_oscillations
.section .rodata
.align 3
.LC14:
.string "window_size %d\n"
.align 3
.LC15:
.string "%.0f == %.0f\n"
.align 3
.LC16:
.string "desired_elements %d\n"
.align 3
.LC17:
.string "found_elements %d\n"
.text
.align 2
.global double_check_limit_cycle
.type double_check_limit_cycle, %function
double_check_limit_cycle:
.LFB48:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str x0, [sp, 24]
str w1, [sp, 20]
ldrsw x0, [sp, 20]
lsl x0, x0, 3
sub x0, x0, #8
ldr x1, [sp, 24]
add x0, x1, x0
ldr d0, [x0]
str d0, [sp, 56]
str wzr, [sp, 36]
mov w0, 1
str w0, [sp, 40]
ldr w0, [sp, 20]
sub w0, w0, #2
str w0, [sp, 36]
b .L198
.L202:
ldrsw x0, [sp, 36]
lsl x0, x0, 3
ldr x1, [sp, 24]
add x0, x1, x0
ldr d0, [x0]
ldr d1, [sp, 56]
fcmp d1, d0
beq .L209
ldr w0, [sp, 40]
add w0, w0, 1
str w0, [sp, 40]
ldr w0, [sp, 36]
sub w0, w0, #1
str w0, [sp, 36]
.L198:
ldr w0, [sp, 36]
cmp w0, 0
bge .L202
b .L201
.L209:
nop
.L201:
ldr w1, [sp, 40]
ldr w0, [sp, 20]
cmp w1, w0
beq .L203
ldr w0, [sp, 40]
cmp w0, 1
beq .L203
mov w0, 1
b .L204
.L203:
mov w0, 0
.L204:
and w0, w0, 1
and w0, w0, 255
bl __DSVERIFIER_assume
ldr w1, [sp, 40]
adrp x0, .LC14
add x0, x0, :lo12:.LC14
bl printf
ldr w0, [sp, 40]
lsl w0, w0, 1
str w0, [sp, 48]
str wzr, [sp, 44]
ldr w0, [sp, 20]
sub w0, w0, #1
str w0, [sp, 36]
b .L205
.L208:
ldr w1, [sp, 20]
ldr w0, [sp, 40]
sub w0, w1, w0
ldr w1, [sp, 36]
cmp w1, w0
blt .L206
ldrsw x0, [sp, 36]
lsl x0, x0, 3
ldr x1, [sp, 24]
add x0, x1, x0
ldr d0, [x0]
ldr w1, [sp, 36]
ldr w0, [sp, 40]
sub w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 24]
add x0, x1, x0
ldr d1, [x0]
adrp x0, .LC15
add x0, x0, :lo12:.LC15
bl printf
ldr w1, [sp, 36]
ldr w0, [sp, 40]
sub w0, w1, w0
str w0, [sp, 52]
ldr w0, [sp, 52]
cmp w0, 0
ble .L207
ldrsw x0, [sp, 36]
lsl x0, x0, 3
ldr x1, [sp, 24]
add x0, x1, x0
ldr d1, [x0]
ldr w1, [sp, 36]
ldr w0, [sp, 40]
sub w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 24]
add x0, x1, x0
ldr d0, [x0]
fcmp d1, d0
bne .L207
ldr w0, [sp, 44]
add w0, w0, 2
str w0, [sp, 44]
.L206:
ldr w0, [sp, 36]
sub w0, w0, #1
str w0, [sp, 36]
.L205:
ldr w0, [sp, 36]
cmp w0, 0
bge .L208
.L207:
ldr w1, [sp, 48]
adrp x0, .LC16
add x0, x0, :lo12:.LC16
bl printf
ldr w1, [sp, 44]
adrp x0, .LC17
add x0, x0, :lo12:.LC17
bl printf
ldr w1, [sp, 48]
ldr w0, [sp, 44]
cmp w1, w0
cset w0, ne
and w0, w0, 255
bl __DSVERIFIER_assert
nop
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE48:
.size double_check_limit_cycle, .-double_check_limit_cycle
.align 2
.global double_check_persistent_limit_cycle
.type double_check_persistent_limit_cycle, %function
double_check_persistent_limit_cycle:
.LFB49:
.cfi_startproc
stp x29, x30, [sp, -176]!
.cfi_def_cfa_offset 176
.cfi_offset 29, -176
.cfi_offset 30, -168
mov x29, sp
.cfi_def_cfa_register 29
stp x19, x20, [sp, 16]
stp x21, x22, [sp, 32]
stp x23, x24, [sp, 48]
stp x25, x26, [sp, 64]
str x27, [sp, 80]
sub sp, sp, #16
.cfi_offset 19, -160
.cfi_offset 20, -152
.cfi_offset 21, -144
.cfi_offset 22, -136
.cfi_offset 23, -128
.cfi_offset 24, -120
.cfi_offset 25, -112
.cfi_offset 26, -104
.cfi_offset 27, -96
str x0, [x29, 104]
str w1, [x29, 100]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [x29, 168]
mov x1, 0
mov x0, sp
mov x19, x0
str wzr, [x29, 128]
str wzr, [x29, 132]
str wzr, [x29, 136]
ldr x0, [x29, 104]
ldr d0, [x0]
str d0, [x29, 144]
str wzr, [x29, 128]
b .L211
.L216:
ldrsw x0, [x29, 128]
lsl x0, x0, 3
ldr x1, [x29, 104]
add x0, x1, x0
ldr d0, [x0]
ldr d1, [x29, 144]
fcmp d1, d0
beq .L212
ldr w0, [x29, 136]
add w0, w0, 1
str w0, [x29, 136]
b .L213
.L212:
ldr w0, [x29, 136]
cmp w0, 0
bne .L232
ldr w0, [x29, 132]
add w0, w0, 1
str w0, [x29, 132]
.L213:
ldr w0, [x29, 128]
add w0, w0, 1
str w0, [x29, 128]
.L211:
ldr w1, [x29, 128]
ldr w0, [x29, 100]
cmp w1, w0
blt .L216
b .L215
.L232:
nop
.L215:
ldr w1, [x29, 136]
ldr w0, [x29, 132]
add w0, w1, w0
str w0, [x29, 136]
ldr w0, [x29, 136]
cmp w0, 1
ble .L217
ldr w0, [x29, 100]
lsr w1, w0, 31
add w0, w1, w0
asr w0, w0, 1
mov w1, w0
ldr w0, [x29, 136]
cmp w0, w1
bgt .L217
mov w0, 1
b .L218
.L217:
mov w0, 0
.L218:
and w0, w0, 1
and w0, w0, 255
bl __DSVERIFIER_assume
ldr w0, [x29, 136]
sxtw x1, w0
sub x1, x1, #1
str x1, [x29, 152]
sxtw x1, w0
mov x26, x1
mov x27, 0
lsr x1, x26, 58
lsl x23, x27, 6
orr x23, x1, x23
lsl x22, x26, 6
sxtw x1, w0
mov x24, x1
mov x25, 0
lsr x1, x24, 58
lsl x21, x25, 6
orr x21, x1, x21
lsl x20, x24, 6
sxtw x0, w0
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L219:
cmp sp, x1
beq .L220
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L219
.L220:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L221
str xzr, [sp, 1024]
.L221:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 160]
str wzr, [x29, 128]
b .L222
.L224:
ldr w1, [x29, 128]
ldr w0, [x29, 136]
cmp w1, w0
bge .L223
ldrsw x0, [x29, 128]
lsl x0, x0, 3
ldr x1, [x29, 104]
add x0, x1, x0
ldr d0, [x0]
ldr x0, [x29, 160]
ldrsw x1, [x29, 128]
str d0, [x0, x1, lsl 3]
.L223:
ldr w0, [x29, 128]
add w0, w0, 1
str w0, [x29, 128]
.L222:
ldr w1, [x29, 128]
ldr w0, [x29, 100]
cmp w1, w0
blt .L224
str wzr, [x29, 128]
str wzr, [x29, 140]
strb wzr, [x29, 127]
b .L225
.L229:
ldr w0, [x29, 128]
add w1, w0, 1
str w1, [x29, 128]
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [x29, 104]
add x0, x1, x0
ldr d1, [x0]
ldr w0, [x29, 140]
add w1, w0, 1
str w1, [x29, 140]
ldr x1, [x29, 160]
sxtw x0, w0
ldr d0, [x1, x0, lsl 3]
fcmp d1, d0
bne .L226
mov w0, 1
strb w0, [x29, 127]
ldr w1, [x29, 140]
ldr w0, [x29, 136]
cmp w1, w0
bne .L225
b .L231
.L226:
strb wzr, [x29, 127]
b .L228
.L231:
str wzr, [x29, 140]
.L225:
ldr w1, [x29, 128]
ldr w0, [x29, 100]
cmp w1, w0
blt .L229
.L228:
ldrb w0, [x29, 127]
cmp w0, 0
cset w0, ne
and w0, w0, 255
eor w0, w0, 1
and w0, w0, 255
and w0, w0, 1
and w0, w0, 255
bl __DSVERIFIER_assert
mov sp, x19
nop
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [x29, 168]
ldr x1, [x0]
subs x2, x2, x1
mov x1, 0
beq .L230
bl __stack_chk_fail
.L230:
mov sp, x29
ldp x19, x20, [sp, 16]
ldp x21, x22, [sp, 32]
ldp x23, x24, [sp, 48]
ldp x25, x26, [sp, 64]
ldr x27, [sp, 80]
ldp x29, x30, [sp], 176
.cfi_restore 30
.cfi_restore 29
.cfi_restore 27
.cfi_restore 25
.cfi_restore 26
.cfi_restore 23
.cfi_restore 24
.cfi_restore 21
.cfi_restore 22
.cfi_restore 19
.cfi_restore 20
.cfi_def_cfa 31, 0
ret
.cfi_endproc
.LFE49:
.size double_check_persistent_limit_cycle, .-double_check_persistent_limit_cycle
.section .rodata
.align 3
.LC18:
.string " %.32f "
.text
.align 2
.global print_array_elements
.type print_array_elements, %function
print_array_elements:
.LFB50:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str x0, [sp, 40]
str x1, [sp, 32]
str w2, [sp, 28]
ldr x1, [sp, 40]
adrp x0, .LC6
add x0, x0, :lo12:.LC6
bl printf
str wzr, [sp, 60]
b .L234
.L235:
ldrsw x0, [sp, 60]
lsl x0, x0, 3
ldr x1, [sp, 32]
add x0, x1, x0
ldr d0, [x0]
adrp x0, .LC18
add x0, x0, :lo12:.LC18
bl printf
ldr w0, [sp, 60]
add w0, w0, 1
str w0, [sp, 60]
.L234:
ldr w1, [sp, 60]
ldr w0, [sp, 28]
cmp w1, w0
blt .L235
adrp x0, .LC8
add x0, x0, :lo12:.LC8
bl puts
nop
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE50:
.size print_array_elements, .-print_array_elements
.align 2
.global double_add_matrix
.type double_add_matrix, %function
double_add_matrix:
.LFB51:
.cfi_startproc
sub sp, sp, #48
.cfi_def_cfa_offset 48
str w0, [sp, 28]
str w1, [sp, 24]
str x2, [sp, 16]
str x3, [sp, 8]
str x4, [sp]
str wzr, [sp, 40]
b .L237
.L240:
str wzr, [sp, 44]
b .L238
.L239:
ldr w0, [sp, 40]
lsl x0, x0, 5
ldr x1, [sp, 16]
add x0, x1, x0
ldr w1, [sp, 44]
ldr d1, [x0, x1, lsl 3]
ldr w0, [sp, 40]
lsl x0, x0, 5
ldr x1, [sp, 8]
add x0, x1, x0
ldr w1, [sp, 44]
ldr d0, [x0, x1, lsl 3]
ldr w0, [sp, 40]
lsl x0, x0, 5
ldr x1, [sp]
add x0, x1, x0
fadd d0, d1, d0
ldr w1, [sp, 44]
str d0, [x0, x1, lsl 3]
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L238:
ldr w1, [sp, 44]
ldr w0, [sp, 24]
cmp w1, w0
bcc .L239
ldr w0, [sp, 40]
add w0, w0, 1
str w0, [sp, 40]
.L237:
ldr w1, [sp, 40]
ldr w0, [sp, 28]
cmp w1, w0
bcc .L240
nop
nop
add sp, sp, 48
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE51:
.size double_add_matrix, .-double_add_matrix
.align 2
.global double_sub_matrix
.type double_sub_matrix, %function
double_sub_matrix:
.LFB52:
.cfi_startproc
sub sp, sp, #48
.cfi_def_cfa_offset 48
str w0, [sp, 28]
str w1, [sp, 24]
str x2, [sp, 16]
str x3, [sp, 8]
str x4, [sp]
str wzr, [sp, 40]
b .L242
.L245:
str wzr, [sp, 44]
b .L243
.L244:
ldr w0, [sp, 40]
lsl x0, x0, 5
ldr x1, [sp, 16]
add x0, x1, x0
ldr w1, [sp, 44]
ldr d1, [x0, x1, lsl 3]
ldr w0, [sp, 40]
lsl x0, x0, 5
ldr x1, [sp, 8]
add x0, x1, x0
ldr w1, [sp, 44]
ldr d0, [x0, x1, lsl 3]
ldr w0, [sp, 40]
lsl x0, x0, 5
ldr x1, [sp]
add x0, x1, x0
fsub d0, d1, d0
ldr w1, [sp, 44]
str d0, [x0, x1, lsl 3]
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L243:
ldr w1, [sp, 44]
ldr w0, [sp, 24]
cmp w1, w0
bcc .L244
ldr w0, [sp, 40]
add w0, w0, 1
str w0, [sp, 40]
.L242:
ldr w1, [sp, 40]
ldr w0, [sp, 28]
cmp w1, w0
bcc .L245
nop
nop
add sp, sp, 48
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE52:
.size double_sub_matrix, .-double_sub_matrix
.section .rodata
.align 3
.LC19:
.string "\nError! Operation invalid, please enter with valid matrices."
.text
.align 2
.global double_matrix_multiplication
.type double_matrix_multiplication, %function
double_matrix_multiplication:
.LFB53:
.cfi_startproc
stp x29, x30, [sp, -96]!
.cfi_def_cfa_offset 96
.cfi_offset 29, -96
.cfi_offset 30, -88
mov x29, sp
str w0, [sp, 60]
str w1, [sp, 56]
str w2, [sp, 52]
str w3, [sp, 48]
str x4, [sp, 40]
str x5, [sp, 32]
str x6, [sp, 24]
ldr w1, [sp, 56]
ldr w0, [sp, 52]
cmp w1, w0
bne .L247
str wzr, [sp, 76]
b .L248
.L251:
str wzr, [sp, 80]
b .L249
.L250:
ldr w0, [sp, 76]
lsl x0, x0, 5
ldr x1, [sp, 24]
add x0, x1, x0
ldr w1, [sp, 80]
str xzr, [x0, x1, lsl 3]
ldr w0, [sp, 80]
add w0, w0, 1
str w0, [sp, 80]
.L249:
ldr w1, [sp, 80]
ldr w0, [sp, 48]
cmp w1, w0
bcc .L250
ldr w0, [sp, 76]
add w0, w0, 1
str w0, [sp, 76]
.L248:
ldr w1, [sp, 76]
ldr w0, [sp, 60]
cmp w1, w0
bcc .L251
str wzr, [sp, 76]
b .L252
.L257:
str wzr, [sp, 80]
b .L253
.L256:
str wzr, [sp, 84]
b .L254
.L255:
ldr w0, [sp, 76]
lsl x0, x0, 5
ldr x1, [sp, 40]
add x0, x1, x0
ldr w1, [sp, 84]
ldr d1, [x0, x1, lsl 3]
ldr w0, [sp, 84]
lsl x0, x0, 5
ldr x1, [sp, 32]
add x0, x1, x0
ldr w1, [sp, 80]
ldr d0, [x0, x1, lsl 3]
fmul d0, d1, d0
str d0, [sp, 88]
ldr w0, [sp, 76]
lsl x0, x0, 5
ldr x1, [sp, 24]
add x0, x1, x0
ldr w1, [sp, 80]
ldr d1, [x0, x1, lsl 3]
ldr w0, [sp, 76]
lsl x0, x0, 5
ldr x1, [sp, 40]
add x0, x1, x0
ldr w1, [sp, 84]
ldr d2, [x0, x1, lsl 3]
ldr w0, [sp, 84]
lsl x0, x0, 5
ldr x1, [sp, 32]
add x0, x1, x0
ldr w1, [sp, 80]
ldr d0, [x0, x1, lsl 3]
fmul d0, d2, d0
ldr w0, [sp, 76]
lsl x0, x0, 5
ldr x1, [sp, 24]
add x0, x1, x0
fadd d0, d1, d0
ldr w1, [sp, 80]
str d0, [x0, x1, lsl 3]
ldr w0, [sp, 84]
add w0, w0, 1
str w0, [sp, 84]
.L254:
ldr w1, [sp, 84]
ldr w0, [sp, 56]
cmp w1, w0
bcc .L255
ldr w0, [sp, 80]
add w0, w0, 1
str w0, [sp, 80]
.L253:
ldr w1, [sp, 80]
ldr w0, [sp, 48]
cmp w1, w0
bcc .L256
ldr w0, [sp, 76]
add w0, w0, 1
str w0, [sp, 76]
.L252:
ldr w1, [sp, 76]
ldr w0, [sp, 60]
cmp w1, w0
bcc .L257
b .L259
.L247:
adrp x0, .LC19
add x0, x0, :lo12:.LC19
bl puts
.L259:
nop
ldp x29, x30, [sp], 96
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE53:
.size double_matrix_multiplication, .-double_matrix_multiplication
.align 2
.global fxp_matrix_multiplication
.type fxp_matrix_multiplication, %function
fxp_matrix_multiplication:
.LFB54:
.cfi_startproc
stp x29, x30, [sp, -96]!
.cfi_def_cfa_offset 96
.cfi_offset 29, -96
.cfi_offset 30, -88
mov x29, sp
stp x19, x20, [sp, 16]
.cfi_offset 19, -80
.cfi_offset 20, -72
str w0, [sp, 76]
str w1, [sp, 72]
str w2, [sp, 68]
str w3, [sp, 64]
str x4, [sp, 56]
str x5, [sp, 48]
str x6, [sp, 40]
ldr w1, [sp, 72]
ldr w0, [sp, 68]
cmp w1, w0
bne .L261
str wzr, [sp, 84]
b .L262
.L265:
str wzr, [sp, 88]
b .L263
.L264:
ldr w0, [sp, 84]
lsl x0, x0, 5
ldr x1, [sp, 40]
add x0, x1, x0
ldr w1, [sp, 88]
str xzr, [x0, x1, lsl 3]
ldr w0, [sp, 88]
add w0, w0, 1
str w0, [sp, 88]
.L263:
ldr w1, [sp, 88]
ldr w0, [sp, 64]
cmp w1, w0
bcc .L264
ldr w0, [sp, 84]
add w0, w0, 1
str w0, [sp, 84]
.L262:
ldr w1, [sp, 84]
ldr w0, [sp, 76]
cmp w1, w0
bcc .L265
str wzr, [sp, 84]
b .L266
.L271:
str wzr, [sp, 88]
b .L267
.L270:
str wzr, [sp, 92]
b .L268
.L269:
ldr w0, [sp, 84]
lsl x0, x0, 5
ldr x1, [sp, 40]
add x0, x1, x0
ldr w1, [sp, 88]
ldr x20, [x0, x1, lsl 3]
ldr w0, [sp, 84]
lsl x0, x0, 5
ldr x1, [sp, 56]
add x0, x1, x0
ldr w1, [sp, 92]
ldr x2, [x0, x1, lsl 3]
ldr w0, [sp, 92]
lsl x0, x0, 5
ldr x1, [sp, 48]
add x0, x1, x0
ldr w1, [sp, 88]
ldr x0, [x0, x1, lsl 3]
mov x1, x0
mov x0, x2
bl fxp_mult
mov x2, x0
ldr w0, [sp, 84]
lsl x0, x0, 5
ldr x1, [sp, 40]
add x19, x1, x0
mov x1, x2
mov x0, x20
bl fxp_add
mov x1, x0
ldr w0, [sp, 88]
str x1, [x19, x0, lsl 3]
ldr w0, [sp, 92]
add w0, w0, 1
str w0, [sp, 92]
.L268:
ldr w1, [sp, 92]
ldr w0, [sp, 72]
cmp w1, w0
bcc .L269
ldr w0, [sp, 88]
add w0, w0, 1
str w0, [sp, 88]
.L267:
ldr w1, [sp, 88]
ldr w0, [sp, 64]
cmp w1, w0
bcc .L270
ldr w0, [sp, 84]
add w0, w0, 1
str w0, [sp, 84]
.L266:
ldr w1, [sp, 84]
ldr w0, [sp, 76]
cmp w1, w0
bcc .L271
b .L273
.L261:
adrp x0, .LC19
add x0, x0, :lo12:.LC19
bl puts
.L273:
nop
ldp x19, x20, [sp, 16]
ldp x29, x30, [sp], 96
.cfi_restore 30
.cfi_restore 29
.cfi_restore 19
.cfi_restore 20
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE54:
.size fxp_matrix_multiplication, .-fxp_matrix_multiplication
.align 2
.global fxp_exp_matrix
.type fxp_exp_matrix, %function
fxp_exp_matrix:
.LFB55:
.cfi_startproc
stp x29, x30, [sp, -224]!
.cfi_def_cfa_offset 224
.cfi_offset 29, -224
.cfi_offset 30, -216
mov x29, sp
stp x19, x20, [sp, 16]
.cfi_offset 19, -208
.cfi_offset 20, -200
str w0, [sp, 60]
str w1, [sp, 56]
str x2, [sp, 48]
str w3, [sp, 44]
str x4, [sp, 32]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 216]
mov x1, 0
ldr w0, [sp, 44]
cmp w0, 0
bne .L275
str wzr, [sp, 72]
b .L276
.L281:
str wzr, [sp, 76]
b .L277
.L280:
ldr w1, [sp, 72]
ldr w0, [sp, 76]
cmp w1, w0
bne .L278
ldr w0, [sp, 72]
lsl x0, x0, 5
ldr x1, [sp, 32]
add x19, x1, x0
fmov d0, 1.0e+0
bl fxp_double_to_fxp
mov x1, x0
ldr w0, [sp, 76]
str x1, [x19, x0, lsl 3]
b .L279
.L278:
ldr w0, [sp, 72]
lsl x0, x0, 5
ldr x1, [sp, 32]
add x0, x1, x0
ldr w1, [sp, 76]
str xzr, [x0, x1, lsl 3]
.L279:
ldr w0, [sp, 76]
add w0, w0, 1
str w0, [sp, 76]
.L277:
ldr w1, [sp, 76]
ldr w0, [sp, 56]
cmp w1, w0
bcc .L280
ldr w0, [sp, 72]
add w0, w0, 1
str w0, [sp, 72]
.L276:
ldr w1, [sp, 72]
ldr w0, [sp, 60]
cmp w1, w0
bcc .L281
b .L274
.L275:
str wzr, [sp, 72]
b .L283
.L286:
str wzr, [sp, 76]
b .L284
.L285:
ldr w0, [sp, 72]
lsl x0, x0, 5
ldr x1, [sp, 48]
add x1, x1, x0
ldr w0, [sp, 72]
lsl x0, x0, 5
ldr x2, [sp, 32]
add x0, x2, x0
ldr w2, [sp, 76]
ldr x2, [x1, x2, lsl 3]
ldr w1, [sp, 76]
str x2, [x0, x1, lsl 3]
ldr w0, [sp, 76]
add w0, w0, 1
str w0, [sp, 76]
.L284:
ldr w1, [sp, 76]
ldr w0, [sp, 56]
cmp w1, w0
bcc .L285
ldr w0, [sp, 72]
add w0, w0, 1
str w0, [sp, 72]
.L283:
ldr w1, [sp, 72]
ldr w0, [sp, 60]
cmp w1, w0
bcc .L286
ldr w0, [sp, 44]
cmp w0, 1
beq .L306
mov w0, 1
str w0, [sp, 80]
b .L288
.L303:
str wzr, [sp, 72]
b .L289
.L292:
str wzr, [sp, 76]
b .L290
.L291:
ldr w0, [sp, 72]
lsl x0, x0, 5
ldr x1, [sp, 32]
add x0, x1, x0
ldr w1, [sp, 76]
ldr x2, [x0, x1, lsl 3]
ldr w0, [sp, 76]
ldr w1, [sp, 72]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 88
str x2, [x1, x0]
ldr w0, [sp, 76]
add w0, w0, 1
str w0, [sp, 76]
.L290:
ldr w1, [sp, 76]
ldr w0, [sp, 56]
cmp w1, w0
bcc .L291
ldr w0, [sp, 72]
add w0, w0, 1
str w0, [sp, 72]
.L289:
ldr w1, [sp, 72]
ldr w0, [sp, 60]
cmp w1, w0
bcc .L292
str wzr, [sp, 72]
b .L293
.L296:
str wzr, [sp, 76]
b .L294
.L295:
ldr w0, [sp, 72]
lsl x0, x0, 5
ldr x1, [sp, 32]
add x0, x1, x0
ldr w1, [sp, 76]
str xzr, [x0, x1, lsl 3]
ldr w0, [sp, 76]
add w0, w0, 1
str w0, [sp, 76]
.L294:
ldr w1, [sp, 76]
ldr w0, [sp, 56]
cmp w1, w0
bcc .L295
ldr w0, [sp, 72]
add w0, w0, 1
str w0, [sp, 72]
.L293:
ldr w1, [sp, 72]
ldr w0, [sp, 60]
cmp w1, w0
bcc .L296
str wzr, [sp, 72]
b .L297
.L302:
str wzr, [sp, 76]
b .L298
.L301:
str wzr, [sp, 84]
b .L299
.L300:
ldr w0, [sp, 72]
lsl x0, x0, 5
ldr x1, [sp, 32]
add x0, x1, x0
ldr w1, [sp, 76]
ldr x20, [x0, x1, lsl 3]
ldr w0, [sp, 84]
ldr w1, [sp, 72]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 88
ldr x2, [x1, x0]
ldr w0, [sp, 84]
lsl x0, x0, 5
ldr x1, [sp, 48]
add x0, x1, x0
ldr w1, [sp, 76]
ldr x0, [x0, x1, lsl 3]
mov x1, x0
mov x0, x2
bl fxp_mult
mov x2, x0
ldr w0, [sp, 72]
lsl x0, x0, 5
ldr x1, [sp, 32]
add x19, x1, x0
mov x1, x2
mov x0, x20
bl fxp_add
mov x1, x0
ldr w0, [sp, 76]
str x1, [x19, x0, lsl 3]
ldr w0, [sp, 84]
add w0, w0, 1
str w0, [sp, 84]
.L299:
ldr w1, [sp, 84]
ldr w0, [sp, 56]
cmp w1, w0
bcc .L300
ldr w0, [sp, 76]
add w0, w0, 1
str w0, [sp, 76]
.L298:
ldr w1, [sp, 76]
ldr w0, [sp, 56]
cmp w1, w0
bcc .L301
ldr w0, [sp, 72]
add w0, w0, 1
str w0, [sp, 72]
.L297:
ldr w1, [sp, 72]
ldr w0, [sp, 60]
cmp w1, w0
bcc .L302
ldr w0, [sp, 80]
add w0, w0, 1
str w0, [sp, 80]
.L288:
ldr w1, [sp, 80]
ldr w0, [sp, 44]
cmp w1, w0
bcc .L303
b .L274
.L306:
nop
.L274:
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [sp, 216]
ldr x1, [x0]
subs x2, x2, x1
mov x1, 0
beq .L305
bl __stack_chk_fail
.L305:
ldp x19, x20, [sp, 16]
ldp x29, x30, [sp], 224
.cfi_restore 30
.cfi_restore 29
.cfi_restore 19
.cfi_restore 20
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE55:
.size fxp_exp_matrix, .-fxp_exp_matrix
.align 2
.global double_exp_matrix
.type double_exp_matrix, %function
double_exp_matrix:
.LFB56:
.cfi_startproc
stp x29, x30, [sp, -208]!
.cfi_def_cfa_offset 208
.cfi_offset 29, -208
.cfi_offset 30, -200
mov x29, sp
str w0, [sp, 44]
str w1, [sp, 40]
str x2, [sp, 32]
str w3, [sp, 28]
str x4, [sp, 16]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 200]
mov x1, 0
ldr w0, [sp, 28]
cmp w0, 0
bne .L308
str wzr, [sp, 56]
b .L309
.L314:
str wzr, [sp, 60]
b .L310
.L313:
ldr w1, [sp, 56]
ldr w0, [sp, 60]
cmp w1, w0
bne .L311
ldr w0, [sp, 56]
lsl x0, x0, 5
ldr x1, [sp, 16]
add x0, x1, x0
ldr w1, [sp, 60]
fmov d0, 1.0e+0
str d0, [x0, x1, lsl 3]
b .L312
.L311:
ldr w0, [sp, 56]
lsl x0, x0, 5
ldr x1, [sp, 16]
add x0, x1, x0
ldr w1, [sp, 60]
str xzr, [x0, x1, lsl 3]
.L312:
ldr w0, [sp, 60]
add w0, w0, 1
str w0, [sp, 60]
.L310:
ldr w1, [sp, 60]
ldr w0, [sp, 40]
cmp w1, w0
bcc .L313
ldr w0, [sp, 56]
add w0, w0, 1
str w0, [sp, 56]
.L309:
ldr w1, [sp, 56]
ldr w0, [sp, 44]
cmp w1, w0
bcc .L314
b .L307
.L308:
str wzr, [sp, 56]
b .L316
.L319:
str wzr, [sp, 60]
b .L317
.L318:
ldr w0, [sp, 56]
lsl x0, x0, 5
ldr x1, [sp, 32]
add x1, x1, x0
ldr w0, [sp, 56]
lsl x0, x0, 5
ldr x2, [sp, 16]
add x0, x2, x0
ldr w2, [sp, 60]
ldr d0, [x1, x2, lsl 3]
ldr w1, [sp, 60]
str d0, [x0, x1, lsl 3]
ldr w0, [sp, 60]
add w0, w0, 1
str w0, [sp, 60]
.L317:
ldr w1, [sp, 60]
ldr w0, [sp, 40]
cmp w1, w0
bcc .L318
ldr w0, [sp, 56]
add w0, w0, 1
str w0, [sp, 56]
.L316:
ldr w1, [sp, 56]
ldr w0, [sp, 44]
cmp w1, w0
bcc .L319
ldr w0, [sp, 28]
cmp w0, 1
beq .L339
mov w0, 1
str w0, [sp, 68]
b .L321
.L336:
str wzr, [sp, 56]
b .L322
.L325:
str wzr, [sp, 60]
b .L323
.L324:
ldr w0, [sp, 56]
lsl x0, x0, 5
ldr x1, [sp, 16]
add x0, x1, x0
ldr w1, [sp, 60]
ldr d0, [x0, x1, lsl 3]
ldr w0, [sp, 60]
ldr w1, [sp, 56]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 72
str d0, [x1, x0]
ldr w0, [sp, 60]
add w0, w0, 1
str w0, [sp, 60]
.L323:
ldr w1, [sp, 60]
ldr w0, [sp, 40]
cmp w1, w0
bcc .L324
ldr w0, [sp, 56]
add w0, w0, 1
str w0, [sp, 56]
.L322:
ldr w1, [sp, 56]
ldr w0, [sp, 44]
cmp w1, w0
bcc .L325
str wzr, [sp, 56]
b .L326
.L329:
str wzr, [sp, 60]
b .L327
.L328:
ldr w0, [sp, 56]
lsl x0, x0, 5
ldr x1, [sp, 16]
add x0, x1, x0
ldr w1, [sp, 60]
str xzr, [x0, x1, lsl 3]
ldr w0, [sp, 60]
add w0, w0, 1
str w0, [sp, 60]
.L327:
ldr w1, [sp, 60]
ldr w0, [sp, 40]
cmp w1, w0
bcc .L328
ldr w0, [sp, 56]
add w0, w0, 1
str w0, [sp, 56]
.L326:
ldr w1, [sp, 56]
ldr w0, [sp, 44]
cmp w1, w0
bcc .L329
str wzr, [sp, 56]
b .L330
.L335:
str wzr, [sp, 60]
b .L331
.L334:
str wzr, [sp, 64]
b .L332
.L333:
ldr w0, [sp, 56]
lsl x0, x0, 5
ldr x1, [sp, 16]
add x0, x1, x0
ldr w1, [sp, 60]
ldr d1, [x0, x1, lsl 3]
ldr w0, [sp, 64]
ldr w1, [sp, 56]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 72
ldr d2, [x1, x0]
ldr w0, [sp, 64]
lsl x0, x0, 5
ldr x1, [sp, 32]
add x0, x1, x0
ldr w1, [sp, 60]
ldr d0, [x0, x1, lsl 3]
fmul d0, d2, d0
ldr w0, [sp, 56]
lsl x0, x0, 5
ldr x1, [sp, 16]
add x0, x1, x0
fadd d0, d1, d0
ldr w1, [sp, 60]
str d0, [x0, x1, lsl 3]
ldr w0, [sp, 64]
add w0, w0, 1
str w0, [sp, 64]
.L332:
ldr w1, [sp, 64]
ldr w0, [sp, 40]
cmp w1, w0
bcc .L333
ldr w0, [sp, 60]
add w0, w0, 1
str w0, [sp, 60]
.L331:
ldr w1, [sp, 60]
ldr w0, [sp, 40]
cmp w1, w0
bcc .L334
ldr w0, [sp, 56]
add w0, w0, 1
str w0, [sp, 56]
.L330:
ldr w1, [sp, 56]
ldr w0, [sp, 44]
cmp w1, w0
bcc .L335
ldr w0, [sp, 68]
add w0, w0, 1
str w0, [sp, 68]
.L321:
ldr w1, [sp, 68]
ldr w0, [sp, 28]
cmp w1, w0
bcc .L336
b .L307
.L339:
nop
.L307:
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [sp, 200]
ldr x1, [x0]
subs x2, x2, x1
mov x1, 0
beq .L338
bl __stack_chk_fail
.L338:
ldp x29, x30, [sp], 208
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE56:
.size double_exp_matrix, .-double_exp_matrix
.align 2
.global fxp_add_matrix
.type fxp_add_matrix, %function
fxp_add_matrix:
.LFB57:
.cfi_startproc
stp x29, x30, [sp, -80]!
.cfi_def_cfa_offset 80
.cfi_offset 29, -80
.cfi_offset 30, -72
mov x29, sp
str x19, [sp, 16]
.cfi_offset 19, -64
str w0, [sp, 60]
str w1, [sp, 56]
str x2, [sp, 48]
str x3, [sp, 40]
str x4, [sp, 32]
str wzr, [sp, 72]
b .L341
.L344:
str wzr, [sp, 76]
b .L342
.L343:
ldr w0, [sp, 72]
lsl x0, x0, 5
ldr x1, [sp, 48]
add x0, x1, x0
ldr w1, [sp, 76]
ldr x2, [x0, x1, lsl 3]
ldr w0, [sp, 72]
lsl x0, x0, 5
ldr x1, [sp, 40]
add x0, x1, x0
ldr w1, [sp, 76]
ldr x3, [x0, x1, lsl 3]
ldr w0, [sp, 72]
lsl x0, x0, 5
ldr x1, [sp, 32]
add x19, x1, x0
mov x1, x3
mov x0, x2
bl fxp_add
mov x1, x0
ldr w0, [sp, 76]
str x1, [x19, x0, lsl 3]
ldr w0, [sp, 76]
add w0, w0, 1
str w0, [sp, 76]
.L342:
ldr w1, [sp, 76]
ldr w0, [sp, 56]
cmp w1, w0
bcc .L343
ldr w0, [sp, 72]
add w0, w0, 1
str w0, [sp, 72]
.L341:
ldr w1, [sp, 72]
ldr w0, [sp, 60]
cmp w1, w0
bcc .L344
nop
nop
ldr x19, [sp, 16]
ldp x29, x30, [sp], 80
.cfi_restore 30
.cfi_restore 29
.cfi_restore 19
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE57:
.size fxp_add_matrix, .-fxp_add_matrix
.align 2
.global fxp_sub_matrix
.type fxp_sub_matrix, %function
fxp_sub_matrix:
.LFB58:
.cfi_startproc
stp x29, x30, [sp, -80]!
.cfi_def_cfa_offset 80
.cfi_offset 29, -80
.cfi_offset 30, -72
mov x29, sp
str x19, [sp, 16]
.cfi_offset 19, -64
str w0, [sp, 60]
str w1, [sp, 56]
str x2, [sp, 48]
str x3, [sp, 40]
str x4, [sp, 32]
str wzr, [sp, 72]
b .L346
.L349:
str wzr, [sp, 76]
b .L347
.L348:
ldr w0, [sp, 72]
lsl x0, x0, 5
ldr x1, [sp, 48]
add x0, x1, x0
ldr w1, [sp, 76]
ldr x2, [x0, x1, lsl 3]
ldr w0, [sp, 72]
lsl x0, x0, 5
ldr x1, [sp, 40]
add x0, x1, x0
ldr w1, [sp, 76]
ldr x3, [x0, x1, lsl 3]
ldr w0, [sp, 72]
lsl x0, x0, 5
ldr x1, [sp, 32]
add x19, x1, x0
mov x1, x3
mov x0, x2
bl fxp_sub
mov x1, x0
ldr w0, [sp, 76]
str x1, [x19, x0, lsl 3]
ldr w0, [sp, 76]
add w0, w0, 1
str w0, [sp, 76]
.L347:
ldr w1, [sp, 76]
ldr w0, [sp, 56]
cmp w1, w0
bcc .L348
ldr w0, [sp, 72]
add w0, w0, 1
str w0, [sp, 72]
.L346:
ldr w1, [sp, 72]
ldr w0, [sp, 60]
cmp w1, w0
bcc .L349
nop
nop
ldr x19, [sp, 16]
ldp x29, x30, [sp], 80
.cfi_restore 30
.cfi_restore 29
.cfi_restore 19
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE58:
.size fxp_sub_matrix, .-fxp_sub_matrix
.section .rodata
.align 3
.LC20:
.string "\nMatrix\n=====================\n"
.align 3
.LC21:
.string "#matrix[%d][%d]: %2.2f "
.text
.align 2
.global print_matrix
.type print_matrix, %function
print_matrix:
.LFB59:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
str w1, [sp, 20]
str w2, [sp, 16]
adrp x0, .LC20
add x0, x0, :lo12:.LC20
bl puts
str wzr, [sp, 40]
b .L351
.L354:
str wzr, [sp, 44]
b .L352
.L353:
ldr w0, [sp, 40]
lsl x0, x0, 5
ldr x1, [sp, 24]
add x0, x1, x0
ldr w1, [sp, 44]
ldr d0, [x0, x1, lsl 3]
ldr w2, [sp, 44]
ldr w1, [sp, 40]
adrp x0, .LC21
add x0, x0, :lo12:.LC21
bl printf
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L352:
ldr w1, [sp, 44]
ldr w0, [sp, 16]
cmp w1, w0
bcc .L353
mov w0, 10
bl putchar
ldr w0, [sp, 40]
add w0, w0, 1
str w0, [sp, 40]
.L351:
ldr w1, [sp, 40]
ldr w0, [sp, 20]
cmp w1, w0
bcc .L354
mov w0, 10
bl putchar
nop
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE59:
.size print_matrix, .-print_matrix
.align 2
.global determinant
.type determinant, %function
determinant:
.LFB60:
.cfi_startproc
stp x29, x30, [sp, -208]!
.cfi_def_cfa_offset 208
.cfi_offset 29, -208
.cfi_offset 30, -200
mov x29, sp
str d8, [sp, 16]
.cfi_offset 72, -192
str x0, [sp, 40]
str w1, [sp, 36]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 200]
mov x1, 0
str xzr, [sp, 64]
ldr w0, [sp, 36]
cmp w0, 0
ble .L356
ldr w0, [sp, 36]
cmp w0, 1
bne .L357
ldr x0, [sp, 40]
ldr d0, [x0]
str d0, [sp, 64]
b .L356
.L357:
ldr w0, [sp, 36]
cmp w0, 2
bne .L358
ldr x0, [sp, 40]
ldr d1, [x0]
ldr x0, [sp, 40]
add x0, x0, 32
ldr d0, [x0, 8]
fmul d1, d1, d0
ldr x0, [sp, 40]
add x0, x0, 32
ldr d2, [x0]
ldr x0, [sp, 40]
ldr d0, [x0, 8]
fmul d0, d2, d0
fsub d0, d1, d0
str d0, [sp, 64]
b .L356
.L358:
str xzr, [sp, 64]
str wzr, [sp, 56]
b .L359
.L368:
str wzr, [sp, 48]
b .L360
.L367:
mov w0, 1
str w0, [sp, 48]
b .L361
.L366:
str wzr, [sp, 60]
str wzr, [sp, 52]
b .L362
.L365:
ldr w1, [sp, 52]
ldr w0, [sp, 56]
cmp w1, w0
beq .L371
ldrsw x0, [sp, 48]
lsl x0, x0, 5
ldr x1, [sp, 40]
add x0, x1, x0
ldr w1, [sp, 48]
sub w2, w1, #1
ldrsw x1, [sp, 52]
ldr d0, [x0, x1, lsl 3]
ldrsw x0, [sp, 60]
sxtw x1, w2
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 72
str d0, [x1, x0]
ldr w0, [sp, 60]
add w0, w0, 1
str w0, [sp, 60]
b .L364
.L371:
nop
.L364:
ldr w0, [sp, 52]
add w0, w0, 1
str w0, [sp, 52]
.L362:
ldr w1, [sp, 52]
ldr w0, [sp, 36]
cmp w1, w0
blt .L365
ldr w0, [sp, 48]
add w0, w0, 1
str w0, [sp, 48]
.L361:
ldr w1, [sp, 48]
ldr w0, [sp, 36]
cmp w1, w0
blt .L366
ldr w0, [sp, 48]
add w0, w0, 1
str w0, [sp, 48]
.L360:
ldr w0, [sp, 36]
sub w0, w0, #1
ldr w1, [sp, 48]
cmp w1, w0
blt .L367
ldr w0, [sp, 56]
scvtf d1, w0
fmov d0, 1.0e+0
fadd d1, d1, d0
fmov d0, 1.0e+0
fadd d0, d1, d0
fmov d1, d0
fmov d0, -1.0e+0
bl internal_pow
fmov d1, d0
ldr x0, [sp, 40]
ldrsw x1, [sp, 56]
ldr d0, [x0, x1, lsl 3]
fmul d8, d1, d0
ldr w0, [sp, 36]
sub w1, w0, #1
add x0, sp, 72
bl determinant
fmul d0, d8, d0
ldr d1, [sp, 64]
fadd d0, d1, d0
str d0, [sp, 64]
ldr w0, [sp, 56]
add w0, w0, 1
str w0, [sp, 56]
.L359:
ldr w1, [sp, 56]
ldr w0, [sp, 36]
cmp w1, w0
blt .L368
.L356:
ldr d0, [sp, 64]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [sp, 200]
ldr x1, [x0]
subs x2, x2, x1
mov x1, 0
beq .L370
bl __stack_chk_fail
.L370:
ldr d8, [sp, 16]
ldp x29, x30, [sp], 208
.cfi_restore 30
.cfi_restore 29
.cfi_restore 72
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE60:
.size determinant, .-determinant
.align 2
.global fxp_determinant
.type fxp_determinant, %function
fxp_determinant:
.LFB61:
.cfi_startproc
stp x29, x30, [sp, -336]!
.cfi_def_cfa_offset 336
.cfi_offset 29, -336
.cfi_offset 30, -328
mov x29, sp
str d8, [sp, 16]
.cfi_offset 72, -320
str x0, [sp, 40]
str w1, [sp, 36]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 328]
mov x1, 0
str wzr, [sp, 48]
b .L373
.L376:
str wzr, [sp, 52]
b .L374
.L375:
ldrsw x0, [sp, 48]
lsl x0, x0, 5
ldr x1, [sp, 40]
add x0, x1, x0
ldrsw x1, [sp, 52]
ldr x0, [x0, x1, lsl 3]
bl fxp_to_double
ldrsw x0, [sp, 52]
ldrsw x1, [sp, 48]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 72
str d0, [x1, x0]
ldr w0, [sp, 52]
add w0, w0, 1
str w0, [sp, 52]
.L374:
ldr w1, [sp, 52]
ldr w0, [sp, 36]
cmp w1, w0
blt .L375
ldr w0, [sp, 48]
add w0, w0, 1
str w0, [sp, 48]
.L373:
ldr w1, [sp, 48]
ldr w0, [sp, 36]
cmp w1, w0
blt .L376
str xzr, [sp, 64]
ldr w0, [sp, 36]
cmp w0, 0
ble .L377
ldr w0, [sp, 36]
cmp w0, 1
bne .L378
ldr d0, [sp, 72]
str d0, [sp, 64]
b .L377
.L378:
ldr w0, [sp, 36]
cmp w0, 2
bne .L379
ldr d1, [sp, 72]
ldr d0, [sp, 112]
fmul d1, d1, d0
ldr d2, [sp, 104]
ldr d0, [sp, 80]
fmul d0, d2, d0
fsub d0, d1, d0
str d0, [sp, 64]
b .L377
.L379:
str xzr, [sp, 64]
str wzr, [sp, 56]
b .L380
.L389:
str wzr, [sp, 48]
b .L381
.L388:
mov w0, 1
str w0, [sp, 48]
b .L382
.L387:
str wzr, [sp, 60]
str wzr, [sp, 52]
b .L383
.L386:
ldr w1, [sp, 52]
ldr w0, [sp, 56]
cmp w1, w0
beq .L392
ldr w0, [sp, 48]
sub w2, w0, #1
ldrsw x0, [sp, 52]
ldrsw x1, [sp, 48]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 72
ldr d0, [x1, x0]
ldrsw x0, [sp, 60]
sxtw x1, w2
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 200
str d0, [x1, x0]
ldr w0, [sp, 60]
add w0, w0, 1
str w0, [sp, 60]
b .L385
.L392:
nop
.L385:
ldr w0, [sp, 52]
add w0, w0, 1
str w0, [sp, 52]
.L383:
ldr w1, [sp, 52]
ldr w0, [sp, 36]
cmp w1, w0
blt .L386
ldr w0, [sp, 48]
add w0, w0, 1
str w0, [sp, 48]
.L382:
ldr w1, [sp, 48]
ldr w0, [sp, 36]
cmp w1, w0
blt .L387
ldr w0, [sp, 48]
add w0, w0, 1
str w0, [sp, 48]
.L381:
ldr w0, [sp, 36]
sub w0, w0, #1
ldr w1, [sp, 48]
cmp w1, w0
blt .L388
ldr w0, [sp, 56]
scvtf d1, w0
fmov d0, 1.0e+0
fadd d1, d1, d0
fmov d0, 1.0e+0
fadd d0, d1, d0
fmov d1, d0
fmov d0, -1.0e+0
bl internal_pow
fmov d1, d0
ldrsw x0, [sp, 56]
lsl x0, x0, 3
add x1, sp, 72
ldr d0, [x1, x0]
fmul d8, d1, d0
ldr w0, [sp, 36]
sub w1, w0, #1
add x0, sp, 200
bl determinant
fmul d0, d8, d0
ldr d1, [sp, 64]
fadd d0, d1, d0
str d0, [sp, 64]
ldr w0, [sp, 56]
add w0, w0, 1
str w0, [sp, 56]
.L380:
ldr w1, [sp, 56]
ldr w0, [sp, 36]
cmp w1, w0
blt .L389
.L377:
ldr d0, [sp, 64]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [sp, 328]
ldr x1, [x0]
subs x2, x2, x1
mov x1, 0
beq .L391
bl __stack_chk_fail
.L391:
ldr d8, [sp, 16]
ldp x29, x30, [sp], 336
.cfi_restore 30
.cfi_restore 29
.cfi_restore 72
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE61:
.size fxp_determinant, .-fxp_determinant
.align 2
.global transpose
.type transpose, %function
transpose:
.LFB62:
.cfi_startproc
sub sp, sp, #48
.cfi_def_cfa_offset 48
str x0, [sp, 24]
str x1, [sp, 16]
str w2, [sp, 12]
str w3, [sp, 8]
str wzr, [sp, 40]
b .L394
.L397:
str wzr, [sp, 44]
b .L395
.L396:
ldrsw x0, [sp, 40]
lsl x0, x0, 5
ldr x1, [sp, 24]
add x1, x1, x0
ldrsw x0, [sp, 44]
lsl x0, x0, 5
ldr x2, [sp, 16]
add x0, x2, x0
ldrsw x2, [sp, 44]
ldr d0, [x1, x2, lsl 3]
ldrsw x1, [sp, 40]
str d0, [x0, x1, lsl 3]
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L395:
ldr w1, [sp, 44]
ldr w0, [sp, 8]
cmp w1, w0
blt .L396
ldr w0, [sp, 40]
add w0, w0, 1
str w0, [sp, 40]
.L394:
ldr w1, [sp, 40]
ldr w0, [sp, 12]
cmp w1, w0
blt .L397
nop
nop
add sp, sp, 48
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE62:
.size transpose, .-transpose
.align 2
.global fxp_transpose
.type fxp_transpose, %function
fxp_transpose:
.LFB63:
.cfi_startproc
sub sp, sp, #48
.cfi_def_cfa_offset 48
str x0, [sp, 24]
str x1, [sp, 16]
str w2, [sp, 12]
str w3, [sp, 8]
str wzr, [sp, 40]
b .L399
.L402:
str wzr, [sp, 44]
b .L400
.L401:
ldrsw x0, [sp, 40]
lsl x0, x0, 5
ldr x1, [sp, 24]
add x1, x1, x0
ldrsw x0, [sp, 44]
lsl x0, x0, 5
ldr x2, [sp, 16]
add x0, x2, x0
ldrsw x2, [sp, 44]
ldr x2, [x1, x2, lsl 3]
ldrsw x1, [sp, 40]
str x2, [x0, x1, lsl 3]
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L400:
ldr w1, [sp, 44]
ldr w0, [sp, 8]
cmp w1, w0
blt .L401
ldr w0, [sp, 40]
add w0, w0, 1
str w0, [sp, 40]
.L399:
ldr w1, [sp, 40]
ldr w0, [sp, 12]
cmp w1, w0
blt .L402
nop
nop
add sp, sp, 48
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE63:
.size fxp_transpose, .-fxp_transpose
.align 2
.global generic_timing_shift_l_double
.type generic_timing_shift_l_double, %function
generic_timing_shift_l_double:
.LFB64:
.cfi_startproc
sub sp, sp, #48
.cfi_def_cfa_offset 48
str d0, [sp, 24]
str x0, [sp, 16]
str w1, [sp, 12]
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 24]
lsl w2, w0, 1
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 28]
mov w0, w1
lsl w0, w0, 1
add w0, w0, w1
add w2, w2, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 40]
mov w0, w1
lsl w0, w0, 1
add w0, w0, w1
add w1, w2, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 32]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 36]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 44]
lsl w0, w0, 3
add w1, w1, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
ldr w0, [x0]
add w1, w1, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
str w1, [x0]
ldr x0, [sp, 16]
ldr d0, [x0]
str d0, [sp, 40]
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 48]
mov w0, w1
lsl w0, w0, 2
add w1, w0, w1
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 84]
lsl w0, w0, 1
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 44]
lsl w0, w0, 2
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 92]
add w1, w1, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
ldr w0, [x0]
add w1, w1, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
str w1, [x0]
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 44]
lsl w1, w0, 1
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 80]
add w1, w1, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
ldr w0, [x0]
add w1, w1, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
str w1, [x0]
str wzr, [sp, 36]
b .L404
.L405:
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 48]
mov w0, w1
lsl w0, w0, 4
add w1, w0, w1
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 60]
lsl w0, w0, 2
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 64]
lsl w0, w0, 2
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 68]
lsl w0, w0, 1
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 72]
lsl w0, w0, 1
add w2, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 84]
mov w0, w1
lsl w0, w0, 1
add w0, w0, w1
lsl w0, w0, 1
add w1, w2, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 76]
lsl w0, w0, 1
add w2, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 44]
mov w0, w1
lsl w0, w0, 2
add w0, w0, w1
add w1, w2, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 92]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 124]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 52]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 88]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 100]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 104]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 128]
add w1, w1, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
ldr w0, [x0]
add w1, w1, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
str w1, [x0]
ldrsw x0, [sp, 36]
add x0, x0, 1
lsl x0, x0, 3
ldr x1, [sp, 16]
add x1, x1, x0
ldrsw x0, [sp, 36]
lsl x0, x0, 3
ldr x2, [sp, 16]
add x0, x2, x0
ldr d0, [x1]
str d0, [x0]
ldr w0, [sp, 36]
add w0, w0, 1
str w0, [sp, 36]
.L404:
ldr w0, [sp, 12]
sub w0, w0, #1
ldr w1, [sp, 36]
cmp w1, w0
blt .L405
ldrsw x0, [sp, 12]
lsl x0, x0, 3
sub x0, x0, #8
ldr x1, [sp, 16]
add x0, x1, x0
ldr d0, [sp, 24]
str d0, [x0]
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 48]
mov w0, w1
lsl w0, w0, 1
add w0, w0, w1
lsl w0, w0, 2
mov w2, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 84]
mov w0, w1
lsl w0, w0, 1
add w0, w0, w1
lsl w0, w0, 1
add w2, w2, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 44]
mov w0, w1
lsl w0, w0, 1
add w0, w0, w1
add w1, w2, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 60]
lsl w0, w0, 1
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 64]
lsl w0, w0, 1
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 72]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 68]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 52]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 56]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 124]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 76]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 28]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 36]
add w1, w1, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
ldr w0, [x0]
add w1, w1, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
str w1, [x0]
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 40]
mov w0, w1
lsl w0, w0, 1
add w1, w0, w1
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 116]
lsl w0, w0, 1
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 120]
add w1, w1, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
ldr w0, [x0]
add w1, w1, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
str w1, [x0]
ldr d0, [sp, 40]
add sp, sp, 48
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE64:
.size generic_timing_shift_l_double, .-generic_timing_shift_l_double
.align 2
.global generic_timing_shift_r_double
.type generic_timing_shift_r_double, %function
generic_timing_shift_r_double:
.LFB65:
.cfi_startproc
sub sp, sp, #48
.cfi_def_cfa_offset 48
str d0, [sp, 24]
str x0, [sp, 16]
str w1, [sp, 12]
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 24]
lsl w2, w0, 1
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 28]
mov w0, w1
lsl w0, w0, 1
add w0, w0, w1
add w2, w2, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 40]
mov w0, w1
lsl w0, w0, 1
add w0, w0, w1
add w1, w2, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 32]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 36]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 44]
lsl w0, w0, 3
add w1, w1, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
ldr w0, [x0]
add w1, w1, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
str w1, [x0]
ldrsw x0, [sp, 12]
lsl x0, x0, 3
sub x0, x0, #8
ldr x1, [sp, 16]
add x0, x1, x0
ldr d0, [x0]
str d0, [sp, 40]
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 48]
mov w0, w1
lsl w0, w0, 3
sub w1, w0, w1
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 64]
lsl w0, w0, 1
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 60]
lsl w0, w0, 1
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 84]
lsl w0, w0, 1
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 44]
lsl w0, w0, 2
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 68]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 72]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 92]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 52]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 56]
add w1, w1, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
ldr w0, [x0]
add w1, w1, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
str w1, [x0]
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 48]
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 44]
add w0, w1, w0
lsl w1, w0, 1
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 32]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 80]
add w1, w1, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
ldr w0, [x0]
add w1, w1, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
str w1, [x0]
ldr w0, [sp, 12]
sub w0, w0, #1
str w0, [sp, 36]
b .L408
.L409:
ldrsw x0, [sp, 36]
lsl x0, x0, 3
sub x0, x0, #8
ldr x1, [sp, 16]
add x1, x1, x0
ldrsw x0, [sp, 36]
lsl x0, x0, 3
ldr x2, [sp, 16]
add x0, x2, x0
ldr d0, [x1]
str d0, [x0]
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 48]
mov w0, w1
lsl w0, w0, 4
sub w1, w0, w1
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 60]
lsl w0, w0, 2
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 64]
lsl w0, w0, 2
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 68]
lsl w0, w0, 1
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 72]
lsl w0, w0, 1
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 84]
lsl w0, w0, 2
add w2, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 44]
mov w0, w1
lsl w0, w0, 2
add w0, w0, w1
add w1, w2, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 52]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 56]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 92]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 124]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 32]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 100]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 104]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 128]
add w1, w1, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
ldr w0, [x0]
add w1, w1, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
str w1, [x0]
ldr w0, [sp, 36]
sub w0, w0, #1
str w0, [sp, 36]
.L408:
ldr w0, [sp, 36]
cmp w0, 0
bgt .L409
ldr x0, [sp, 16]
ldr d0, [sp, 24]
str d0, [x0]
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 48]
mov w0, w1
lsl w0, w0, 2
add w0, w0, w1
lsl w0, w0, 1
mov w2, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 84]
mov w0, w1
lsl w0, w0, 2
add w0, w0, w1
add w2, w2, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 44]
mov w0, w1
lsl w0, w0, 1
add w0, w0, w1
add w2, w2, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 40]
mov w0, w1
lsl w0, w0, 1
add w0, w0, w1
add w1, w2, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 116]
lsl w0, w0, 1
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 120]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 120]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 36]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 28]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 124]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 76]
add w1, w1, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
ldr w0, [x0]
add w1, w1, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
str w1, [x0]
ldr d0, [sp, 40]
add sp, sp, 48
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE65:
.size generic_timing_shift_r_double, .-generic_timing_shift_r_double
.align 2
.global shiftL
.type shiftL, %function
shiftL:
.LFB66:
.cfi_startproc
sub sp, sp, #48
.cfi_def_cfa_offset 48
str x0, [sp, 24]
str x1, [sp, 16]
str w2, [sp, 12]
ldr x0, [sp, 16]
ldr x0, [x0]
str x0, [sp, 40]
str wzr, [sp, 36]
b .L412
.L413:
ldrsw x0, [sp, 36]
add x0, x0, 1
lsl x0, x0, 3
ldr x1, [sp, 16]
add x1, x1, x0
ldrsw x0, [sp, 36]
lsl x0, x0, 3
ldr x2, [sp, 16]
add x0, x2, x0
ldr x1, [x1]
str x1, [x0]
ldr w0, [sp, 36]
add w0, w0, 1
str w0, [sp, 36]
.L412:
ldr w0, [sp, 12]
sub w0, w0, #1
ldr w1, [sp, 36]
cmp w1, w0
blt .L413
ldrsw x0, [sp, 12]
lsl x0, x0, 3
sub x0, x0, #8
ldr x1, [sp, 16]
add x0, x1, x0
ldr x1, [sp, 24]
str x1, [x0]
ldr x0, [sp, 40]
add sp, sp, 48
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE66:
.size shiftL, .-shiftL
.align 2
.global shiftR
.type shiftR, %function
shiftR:
.LFB67:
.cfi_startproc
sub sp, sp, #48
.cfi_def_cfa_offset 48
str x0, [sp, 24]
str x1, [sp, 16]
str w2, [sp, 12]
ldrsw x0, [sp, 12]
lsl x0, x0, 3
sub x0, x0, #8
ldr x1, [sp, 16]
add x0, x1, x0
ldr x0, [x0]
str x0, [sp, 40]
ldr w0, [sp, 12]
sub w0, w0, #1
str w0, [sp, 36]
b .L416
.L417:
ldrsw x0, [sp, 36]
lsl x0, x0, 3
sub x0, x0, #8
ldr x1, [sp, 16]
add x1, x1, x0
ldrsw x0, [sp, 36]
lsl x0, x0, 3
ldr x2, [sp, 16]
add x0, x2, x0
ldr x1, [x1]
str x1, [x0]
ldr w0, [sp, 36]
sub w0, w0, #1
str w0, [sp, 36]
.L416:
ldr w0, [sp, 36]
cmp w0, 0
bgt .L417
ldr x0, [sp, 16]
ldr x1, [sp, 24]
str x1, [x0]
ldr x0, [sp, 40]
add sp, sp, 48
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE67:
.size shiftR, .-shiftR
.align 2
.global shiftLfloat
.type shiftLfloat, %function
shiftLfloat:
.LFB68:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str s0, [sp, 12]
str x0, [sp]
str w1, [sp, 8]
ldr x0, [sp]
ldr s0, [x0]
str s0, [sp, 28]
str wzr, [sp, 24]
b .L420
.L421:
ldrsw x0, [sp, 24]
add x0, x0, 1
lsl x0, x0, 2
ldr x1, [sp]
add x1, x1, x0
ldrsw x0, [sp, 24]
lsl x0, x0, 2
ldr x2, [sp]
add x0, x2, x0
ldr s0, [x1]
str s0, [x0]
ldr w0, [sp, 24]
add w0, w0, 1
str w0, [sp, 24]
.L420:
ldr w0, [sp, 8]
sub w0, w0, #1
ldr w1, [sp, 24]
cmp w1, w0
blt .L421
ldrsw x0, [sp, 8]
lsl x0, x0, 2
sub x0, x0, #4
ldr x1, [sp]
add x0, x1, x0
ldr s0, [sp, 12]
str s0, [x0]
ldr s0, [sp, 28]
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE68:
.size shiftLfloat, .-shiftLfloat
.align 2
.global shiftRfloat
.type shiftRfloat, %function
shiftRfloat:
.LFB69:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str s0, [sp, 12]
str x0, [sp]
str w1, [sp, 8]
ldrsw x0, [sp, 8]
lsl x0, x0, 2
sub x0, x0, #4
ldr x1, [sp]
add x0, x1, x0
ldr s0, [x0]
str s0, [sp, 28]
ldr w0, [sp, 8]
sub w0, w0, #1
str w0, [sp, 24]
b .L424
.L425:
ldrsw x0, [sp, 24]
lsl x0, x0, 2
sub x0, x0, #4
ldr x1, [sp]
add x1, x1, x0
ldrsw x0, [sp, 24]
lsl x0, x0, 2
ldr x2, [sp]
add x0, x2, x0
ldr s0, [x1]
str s0, [x0]
ldr w0, [sp, 24]
sub w0, w0, #1
str w0, [sp, 24]
.L424:
ldr w0, [sp, 24]
cmp w0, 0
bgt .L425
ldr x0, [sp]
ldr s0, [sp, 12]
str s0, [x0]
ldr s0, [sp, 28]
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE69:
.size shiftRfloat, .-shiftRfloat
.align 2
.global shiftRDdouble
.type shiftRDdouble, %function
shiftRDdouble:
.LFB70:
.cfi_startproc
sub sp, sp, #48
.cfi_def_cfa_offset 48
str d0, [sp, 24]
str x0, [sp, 16]
str w1, [sp, 12]
ldr x0, [sp, 16]
ldr d0, [x0]
str d0, [sp, 40]
str wzr, [sp, 36]
b .L428
.L429:
ldrsw x0, [sp, 36]
add x0, x0, 1
lsl x0, x0, 3
ldr x1, [sp, 16]
add x1, x1, x0
ldrsw x0, [sp, 36]
lsl x0, x0, 3
ldr x2, [sp, 16]
add x0, x2, x0
ldr d0, [x1]
str d0, [x0]
ldr w0, [sp, 36]
add w0, w0, 1
str w0, [sp, 36]
.L428:
ldr w0, [sp, 12]
sub w0, w0, #1
ldr w1, [sp, 36]
cmp w1, w0
blt .L429
ldrsw x0, [sp, 12]
lsl x0, x0, 3
sub x0, x0, #8
ldr x1, [sp, 16]
add x0, x1, x0
ldr d0, [sp, 24]
str d0, [x0]
ldr d0, [sp, 40]
add sp, sp, 48
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE70:
.size shiftRDdouble, .-shiftRDdouble
.align 2
.global shiftRdouble
.type shiftRdouble, %function
shiftRdouble:
.LFB71:
.cfi_startproc
sub sp, sp, #48
.cfi_def_cfa_offset 48
str d0, [sp, 24]
str x0, [sp, 16]
str w1, [sp, 12]
ldrsw x0, [sp, 12]
lsl x0, x0, 3
sub x0, x0, #8
ldr x1, [sp, 16]
add x0, x1, x0
ldr d0, [x0]
str d0, [sp, 40]
ldr w0, [sp, 12]
sub w0, w0, #1
str w0, [sp, 36]
b .L432
.L433:
ldrsw x0, [sp, 36]
lsl x0, x0, 3
sub x0, x0, #8
ldr x1, [sp, 16]
add x1, x1, x0
ldrsw x0, [sp, 36]
lsl x0, x0, 3
ldr x2, [sp, 16]
add x0, x2, x0
ldr d0, [x1]
str d0, [x0]
ldr w0, [sp, 36]
sub w0, w0, #1
str w0, [sp, 36]
.L432:
ldr w0, [sp, 36]
cmp w0, 0
bgt .L433
ldr x0, [sp, 16]
ldr d0, [sp, 24]
str d0, [x0]
ldr d0, [sp, 40]
add sp, sp, 48
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE71:
.size shiftRdouble, .-shiftRdouble
.align 2
.global shiftLDouble
.type shiftLDouble, %function
shiftLDouble:
.LFB72:
.cfi_startproc
sub sp, sp, #48
.cfi_def_cfa_offset 48
str d0, [sp, 24]
str x0, [sp, 16]
str w1, [sp, 12]
ldr x0, [sp, 16]
ldr d0, [x0]
str d0, [sp, 40]
str wzr, [sp, 36]
b .L436
.L437:
ldrsw x0, [sp, 36]
add x0, x0, 1
lsl x0, x0, 3
ldr x1, [sp, 16]
add x1, x1, x0
ldrsw x0, [sp, 36]
lsl x0, x0, 3
ldr x2, [sp, 16]
add x0, x2, x0
ldr d0, [x1]
str d0, [x0]
ldr w0, [sp, 36]
add w0, w0, 1
str w0, [sp, 36]
.L436:
ldr w0, [sp, 12]
sub w0, w0, #1
ldr w1, [sp, 36]
cmp w1, w0
blt .L437
ldrsw x0, [sp, 12]
lsl x0, x0, 3
sub x0, x0, #8
ldr x1, [sp, 16]
add x0, x1, x0
ldr d0, [sp, 24]
str d0, [x0]
ldr d0, [sp, 40]
add sp, sp, 48
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE72:
.size shiftLDouble, .-shiftLDouble
.align 2
.global shiftLboth
.type shiftLboth, %function
shiftLboth:
.LFB73:
.cfi_startproc
sub sp, sp, #48
.cfi_def_cfa_offset 48
str s0, [sp, 28]
str x0, [sp, 16]
str x1, [sp, 8]
str x2, [sp]
str w3, [sp, 24]
ldr x0, [sp]
ldr x0, [x0]
str x0, [sp, 40]
ldr x0, [sp, 16]
ldr s0, [x0]
str s0, [sp, 36]
str wzr, [sp, 32]
b .L440
.L441:
ldrsw x0, [sp, 32]
add x0, x0, 1
lsl x0, x0, 3
ldr x1, [sp]
add x1, x1, x0
ldrsw x0, [sp, 32]
lsl x0, x0, 3
ldr x2, [sp]
add x0, x2, x0
ldr x1, [x1]
str x1, [x0]
ldrsw x0, [sp, 32]
add x0, x0, 1
lsl x0, x0, 2
ldr x1, [sp, 16]
add x1, x1, x0
ldrsw x0, [sp, 32]
lsl x0, x0, 2
ldr x2, [sp, 16]
add x0, x2, x0
ldr s0, [x1]
str s0, [x0]
ldr w0, [sp, 32]
add w0, w0, 1
str w0, [sp, 32]
.L440:
ldr w0, [sp, 24]
sub w0, w0, #1
ldr w1, [sp, 32]
cmp w1, w0
blt .L441
ldrsw x0, [sp, 24]
lsl x0, x0, 3
sub x0, x0, #8
ldr x1, [sp]
add x0, x1, x0
ldr x1, [sp, 8]
str x1, [x0]
ldrsw x0, [sp, 24]
lsl x0, x0, 2
sub x0, x0, #4
ldr x1, [sp, 16]
add x0, x1, x0
ldr s0, [sp, 28]
str s0, [x0]
nop
add sp, sp, 48
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE73:
.size shiftLboth, .-shiftLboth
.align 2
.global shiftRboth
.type shiftRboth, %function
shiftRboth:
.LFB74:
.cfi_startproc
sub sp, sp, #48
.cfi_def_cfa_offset 48
str s0, [sp, 28]
str x0, [sp, 16]
str x1, [sp, 8]
str x2, [sp]
str w3, [sp, 24]
ldrsw x0, [sp, 24]
lsl x0, x0, 3
sub x0, x0, #8
ldr x1, [sp]
add x0, x1, x0
ldr x0, [x0]
str x0, [sp, 40]
ldrsw x0, [sp, 24]
lsl x0, x0, 2
sub x0, x0, #4
ldr x1, [sp, 16]
add x0, x1, x0
ldr s0, [x0]
str s0, [sp, 36]
ldr w0, [sp, 24]
sub w0, w0, #1
str w0, [sp, 32]
b .L443
.L444:
ldrsw x0, [sp, 32]
lsl x0, x0, 3
sub x0, x0, #8
ldr x1, [sp]
add x1, x1, x0
ldrsw x0, [sp, 32]
lsl x0, x0, 3
ldr x2, [sp]
add x0, x2, x0
ldr x1, [x1]
str x1, [x0]
ldrsw x0, [sp, 32]
lsl x0, x0, 2
sub x0, x0, #4
ldr x1, [sp, 16]
add x1, x1, x0
ldrsw x0, [sp, 32]
lsl x0, x0, 2
ldr x2, [sp, 16]
add x0, x2, x0
ldr s0, [x1]
str s0, [x0]
ldr w0, [sp, 32]
sub w0, w0, #1
str w0, [sp, 32]
.L443:
ldr w0, [sp, 32]
cmp w0, 0
bgt .L444
ldr x0, [sp]
ldr x1, [sp, 8]
str x1, [x0]
ldr x0, [sp, 16]
ldr s0, [sp, 28]
str s0, [x0]
nop
add sp, sp, 48
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE74:
.size shiftRboth, .-shiftRboth
.align 2
.global order
.type order, %function
order:
.LFB75:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str w0, [sp, 12]
str w1, [sp, 8]
ldr w1, [sp, 12]
ldr w0, [sp, 8]
cmp w1, w0
ble .L446
ldr w0, [sp, 12]
sub w0, w0, #1
b .L448
.L446:
ldr w0, [sp, 8]
sub w0, w0, #1
.L448:
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE75:
.size order, .-order
.align 2
.global fxp_check_limit_cycle
.type fxp_check_limit_cycle, %function
fxp_check_limit_cycle:
.LFB76:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str x0, [sp, 24]
str w1, [sp, 20]
ldrsw x0, [sp, 20]
lsl x0, x0, 3
sub x0, x0, #8
ldr x1, [sp, 24]
add x0, x1, x0
ldr x0, [x0]
str x0, [sp, 56]
str wzr, [sp, 36]
mov w0, 1
str w0, [sp, 40]
ldr w0, [sp, 20]
sub w0, w0, #2
str w0, [sp, 36]
b .L450
.L454:
ldrsw x0, [sp, 36]
lsl x0, x0, 3
ldr x1, [sp, 24]
add x0, x1, x0
ldr x0, [x0]
ldr x1, [sp, 56]
cmp x1, x0
beq .L461
ldr w0, [sp, 40]
add w0, w0, 1
str w0, [sp, 40]
ldr w0, [sp, 36]
sub w0, w0, #1
str w0, [sp, 36]
.L450:
ldr w0, [sp, 36]
cmp w0, 0
bge .L454
b .L453
.L461:
nop
.L453:
ldr w1, [sp, 40]
ldr w0, [sp, 20]
cmp w1, w0
beq .L455
ldr w0, [sp, 40]
cmp w0, 1
beq .L455
mov w0, 1
b .L456
.L455:
mov w0, 0
.L456:
and w0, w0, 1
and w0, w0, 255
bl __DSVERIFIER_assume
ldr w1, [sp, 40]
adrp x0, .LC14
add x0, x0, :lo12:.LC14
bl printf
ldr w0, [sp, 40]
lsl w0, w0, 1
str w0, [sp, 48]
str wzr, [sp, 44]
ldr w0, [sp, 20]
sub w0, w0, #1
str w0, [sp, 36]
b .L457
.L460:
ldr w1, [sp, 20]
ldr w0, [sp, 40]
sub w0, w1, w0
ldr w1, [sp, 36]
cmp w1, w0
blt .L458
ldrsw x0, [sp, 36]
lsl x0, x0, 3
ldr x1, [sp, 24]
add x0, x1, x0
ldr x3, [x0]
ldr w1, [sp, 36]
ldr w0, [sp, 40]
sub w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 24]
add x0, x1, x0
ldr x0, [x0]
mov x2, x0
mov x1, x3
adrp x0, .LC15
add x0, x0, :lo12:.LC15
bl printf
ldr w1, [sp, 36]
ldr w0, [sp, 40]
sub w0, w1, w0
str w0, [sp, 52]
ldr w0, [sp, 52]
cmp w0, 0
ble .L459
ldrsw x0, [sp, 36]
lsl x0, x0, 3
ldr x1, [sp, 24]
add x0, x1, x0
ldr x1, [x0]
ldr w2, [sp, 36]
ldr w0, [sp, 40]
sub w0, w2, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x2, [sp, 24]
add x0, x2, x0
ldr x0, [x0]
cmp x1, x0
bne .L459
ldr w0, [sp, 44]
add w0, w0, 2
str w0, [sp, 44]
.L458:
ldr w0, [sp, 36]
sub w0, w0, #1
str w0, [sp, 36]
.L457:
ldr w0, [sp, 36]
cmp w0, 0
bge .L460
.L459:
ldr w0, [sp, 44]
cmp w0, 0
cset w0, gt
and w0, w0, 255
bl __DSVERIFIER_assume
ldr w1, [sp, 48]
adrp x0, .LC16
add x0, x0, :lo12:.LC16
bl printf
ldr w1, [sp, 44]
adrp x0, .LC17
add x0, x0, :lo12:.LC17
bl printf
ldr w1, [sp, 44]
ldr w0, [sp, 48]
cmp w1, w0
cset w0, eq
and w0, w0, 255
bl __DSVERIFIER_assume
mov w0, 0
bl __DSVERIFIER_assert
nop
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE76:
.size fxp_check_limit_cycle, .-fxp_check_limit_cycle
.align 2
.global fxp_check_persistent_limit_cycle
.type fxp_check_persistent_limit_cycle, %function
fxp_check_persistent_limit_cycle:
.LFB77:
.cfi_startproc
stp x29, x30, [sp, -176]!
.cfi_def_cfa_offset 176
.cfi_offset 29, -176
.cfi_offset 30, -168
mov x29, sp
.cfi_def_cfa_register 29
stp x19, x20, [sp, 16]
stp x21, x22, [sp, 32]
stp x23, x24, [sp, 48]
stp x25, x26, [sp, 64]
str x27, [sp, 80]
sub sp, sp, #16
.cfi_offset 19, -160
.cfi_offset 20, -152
.cfi_offset 21, -144
.cfi_offset 22, -136
.cfi_offset 23, -128
.cfi_offset 24, -120
.cfi_offset 25, -112
.cfi_offset 26, -104
.cfi_offset 27, -96
str x0, [x29, 104]
str w1, [x29, 100]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [x29, 168]
mov x1, 0
mov x0, sp
mov x19, x0
str wzr, [x29, 128]
str wzr, [x29, 132]
str wzr, [x29, 136]
ldr x0, [x29, 104]
ldr x0, [x0]
str x0, [x29, 144]
str wzr, [x29, 128]
b .L463
.L468:
ldrsw x0, [x29, 128]
lsl x0, x0, 3
ldr x1, [x29, 104]
add x0, x1, x0
ldr x0, [x0]
ldr x1, [x29, 144]
cmp x1, x0
beq .L464
ldr w0, [x29, 136]
add w0, w0, 1
str w0, [x29, 136]
b .L465
.L464:
ldr w0, [x29, 136]
cmp w0, 0
bne .L484
ldr w0, [x29, 132]
add w0, w0, 1
str w0, [x29, 132]
.L465:
ldr w0, [x29, 128]
add w0, w0, 1
str w0, [x29, 128]
.L463:
ldr w1, [x29, 128]
ldr w0, [x29, 100]
cmp w1, w0
blt .L468
b .L467
.L484:
nop
.L467:
ldr w1, [x29, 136]
ldr w0, [x29, 132]
add w0, w1, w0
str w0, [x29, 136]
ldr w0, [x29, 136]
cmp w0, 1
ble .L469
ldr w0, [x29, 100]
lsr w1, w0, 31
add w0, w1, w0
asr w0, w0, 1
mov w1, w0
ldr w0, [x29, 136]
cmp w0, w1
bgt .L469
mov w0, 1
b .L470
.L469:
mov w0, 0
.L470:
and w0, w0, 1
and w0, w0, 255
bl __DSVERIFIER_assume
ldr w0, [x29, 136]
sxtw x1, w0
sub x1, x1, #1
str x1, [x29, 152]
sxtw x1, w0
mov x26, x1
mov x27, 0
lsr x1, x26, 58
lsl x23, x27, 6
orr x23, x1, x23
lsl x22, x26, 6
sxtw x1, w0
mov x24, x1
mov x25, 0
lsr x1, x24, 58
lsl x21, x25, 6
orr x21, x1, x21
lsl x20, x24, 6
sxtw x0, w0
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L471:
cmp sp, x1
beq .L472
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L471
.L472:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L473
str xzr, [sp, 1024]
.L473:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 160]
str wzr, [x29, 128]
b .L474
.L476:
ldr w1, [x29, 128]
ldr w0, [x29, 136]
cmp w1, w0
bge .L475
ldrsw x0, [x29, 128]
lsl x0, x0, 3
ldr x1, [x29, 104]
add x0, x1, x0
ldr x2, [x0]
ldr x0, [x29, 160]
ldrsw x1, [x29, 128]
str x2, [x0, x1, lsl 3]
.L475:
ldr w0, [x29, 128]
add w0, w0, 1
str w0, [x29, 128]
.L474:
ldr w1, [x29, 128]
ldr w0, [x29, 100]
cmp w1, w0
blt .L476
str wzr, [x29, 128]
str wzr, [x29, 140]
strb wzr, [x29, 127]
b .L477
.L481:
ldr w0, [x29, 128]
add w1, w0, 1
str w1, [x29, 128]
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [x29, 104]
add x0, x1, x0
ldr x1, [x0]
ldr w0, [x29, 140]
add w2, w0, 1
str w2, [x29, 140]
ldr x2, [x29, 160]
sxtw x0, w0
ldr x0, [x2, x0, lsl 3]
cmp x1, x0
bne .L478
mov w0, 1
strb w0, [x29, 127]
ldr w1, [x29, 140]
ldr w0, [x29, 136]
cmp w1, w0
bne .L477
b .L483
.L478:
strb wzr, [x29, 127]
b .L480
.L483:
str wzr, [x29, 140]
.L477:
ldr w1, [x29, 128]
ldr w0, [x29, 100]
cmp w1, w0
blt .L481
.L480:
ldrb w0, [x29, 127]
cmp w0, 0
cset w0, ne
and w0, w0, 255
eor w0, w0, 1
and w0, w0, 255
and w0, w0, 1
and w0, w0, 255
bl __DSVERIFIER_assert
mov sp, x19
nop
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [x29, 168]
ldr x1, [x0]
subs x2, x2, x1
mov x1, 0
beq .L482
bl __stack_chk_fail
.L482:
mov sp, x29
ldp x19, x20, [sp, 16]
ldp x21, x22, [sp, 32]
ldp x23, x24, [sp, 48]
ldp x25, x26, [sp, 64]
ldr x27, [sp, 80]
ldp x29, x30, [sp], 176
.cfi_restore 30
.cfi_restore 29
.cfi_restore 27
.cfi_restore 25
.cfi_restore 26
.cfi_restore 23
.cfi_restore 24
.cfi_restore 21
.cfi_restore 22
.cfi_restore 19
.cfi_restore 20
.cfi_def_cfa 31, 0
ret
.cfi_endproc
.LFE77:
.size fxp_check_persistent_limit_cycle, .-fxp_check_persistent_limit_cycle
.align 2
.global fxp_check_oscillations
.type fxp_check_oscillations, %function
fxp_check_oscillations:
.LFB78:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str x0, [sp, 24]
str w1, [sp, 20]
ldr x0, [sp, 24]
ldr x1, [x0]
ldrsw x0, [sp, 20]
lsl x0, x0, 3
sub x0, x0, #8
ldr x2, [sp, 24]
add x0, x2, x0
ldr x0, [x0]
cmp x1, x0
beq .L486
ldrsw x0, [sp, 20]
lsl x0, x0, 3
sub x0, x0, #8
ldr x1, [sp, 24]
add x0, x1, x0
ldr x1, [x0]
ldrsw x0, [sp, 20]
lsl x0, x0, 3
sub x0, x0, #16
ldr x2, [sp, 24]
add x0, x2, x0
ldr x0, [x0]
cmp x1, x0
beq .L486
mov w0, 1
b .L487
.L486:
mov w0, 0
.L487:
and w0, w0, 1
and w0, w0, 255
bl __DSVERIFIER_assume
str wzr, [sp, 40]
str wzr, [sp, 44]
mov w0, 2
str w0, [sp, 48]
b .L488
.L495:
ldr w0, [sp, 48]
str w0, [sp, 56]
str wzr, [sp, 52]
b .L489
.L494:
ldr w1, [sp, 40]
ldr w0, [sp, 56]
cmp w1, w0
ble .L490
str wzr, [sp, 40]
str wzr, [sp, 44]
.L490:
ldr w1, [sp, 52]
ldr w0, [sp, 56]
add w0, w1, w0
str w0, [sp, 60]
ldr w1, [sp, 60]
ldr w0, [sp, 20]
cmp w1, w0
bge .L496
ldrsw x0, [sp, 52]
lsl x0, x0, 3
ldr x1, [sp, 24]
add x0, x1, x0
ldr x1, [x0]
ldrsw x0, [sp, 60]
lsl x0, x0, 3
ldr x2, [sp, 24]
add x0, x2, x0
ldr x0, [x0]
cmp x1, x0
bne .L492
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
ldr w1, [sp, 44]
ldr w0, [sp, 56]
cmp w1, w0
cset w0, ne
and w0, w0, 255
bl __DSVERIFIER_assert
.L492:
ldr w0, [sp, 40]
add w0, w0, 1
str w0, [sp, 40]
ldr w0, [sp, 52]
add w0, w0, 1
str w0, [sp, 52]
.L489:
ldr w1, [sp, 52]
ldr w0, [sp, 20]
cmp w1, w0
blt .L494
b .L493
.L496:
nop
.L493:
ldr w0, [sp, 48]
add w0, w0, 1
str w0, [sp, 48]
.L488:
ldr w1, [sp, 48]
ldr w0, [sp, 20]
cmp w1, w0
blt .L495
nop
nop
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE78:
.size fxp_check_oscillations, .-fxp_check_oscillations
.align 2
.global fxp_ln
.type fxp_ln, %function
fxp_ln:
.LFB79:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str w0, [sp, 12]
mov w0, 26031
movk w0, 0xa, lsl 16
str w0, [sp, 24]
ldr w1, [sp, 12]
mov w0, 32767
cmp w1, w0
bgt .L498
ldr w0, [sp, 12]
lsl w0, w0, 16
str w0, [sp, 12]
ldr w1, [sp, 24]
mov w0, 59615
movk w0, 0xfff4, lsl 16
add w0, w1, w0
str w0, [sp, 24]
.L498:
ldr w1, [sp, 12]
mov w0, 8388607
cmp w1, w0
bgt .L499
ldr w0, [sp, 12]
lsl w0, w0, 8
str w0, [sp, 12]
ldr w1, [sp, 24]
mov w0, 29807
movk w0, 0xfffa, lsl 16
add w0, w1, w0
str w0, [sp, 24]
.L499:
ldr w1, [sp, 12]
mov w0, 134217727
cmp w1, w0
bgt .L500
ldr w0, [sp, 12]
lsl w0, w0, 4
str w0, [sp, 12]
ldr w1, [sp, 24]
mov w0, 14904
movk w0, 0xfffd, lsl 16
add w0, w1, w0
str w0, [sp, 24]
.L500:
ldr w1, [sp, 12]
mov w0, 536870911
cmp w1, w0
bgt .L501
ldr w0, [sp, 12]
lsl w0, w0, 2
str w0, [sp, 12]
ldr w1, [sp, 24]
mov w0, 40220
movk w0, 0xfffe, lsl 16
add w0, w1, w0
str w0, [sp, 24]
.L501:
ldr w1, [sp, 12]
mov w0, 1073741823
cmp w1, w0
bgt .L502
ldr w0, [sp, 12]
lsl w0, w0, 1
str w0, [sp, 12]
ldr w1, [sp, 24]
mov w0, -45426
add w0, w1, w0
str w0, [sp, 24]
.L502:
ldr w0, [sp, 12]
asr w0, w0, 1
ldr w1, [sp, 12]
add w0, w1, w0
str w0, [sp, 28]
ldr w0, [sp, 28]
cmp w0, 0
blt .L503
ldr w0, [sp, 28]
str w0, [sp, 12]
ldr w1, [sp, 24]
mov w0, -26573
add w0, w1, w0
str w0, [sp, 24]
.L503:
ldr w0, [sp, 12]
asr w0, w0, 2
ldr w1, [sp, 12]
add w0, w1, w0
str w0, [sp, 28]
ldr w0, [sp, 28]
cmp w0, 0
blt .L504
ldr w0, [sp, 28]
str w0, [sp, 12]
ldr w1, [sp, 24]
mov w0, -14624
add w0, w1, w0
str w0, [sp, 24]
.L504:
ldr w0, [sp, 12]
asr w0, w0, 3
ldr w1, [sp, 12]
add w0, w1, w0
str w0, [sp, 28]
ldr w0, [sp, 28]
cmp w0, 0
blt .L505
ldr w0, [sp, 28]
str w0, [sp, 12]
ldr w1, [sp, 24]
mov w0, -7719
add w0, w1, w0
str w0, [sp, 24]
.L505:
ldr w0, [sp, 12]
asr w0, w0, 4
ldr w1, [sp, 12]
add w0, w1, w0
str w0, [sp, 28]
ldr w0, [sp, 28]
cmp w0, 0
blt .L506
ldr w0, [sp, 28]
str w0, [sp, 12]
ldr w0, [sp, 24]
sub w0, w0, #3973
str w0, [sp, 24]
.L506:
ldr w0, [sp, 12]
asr w0, w0, 5
ldr w1, [sp, 12]
add w0, w1, w0
str w0, [sp, 28]
ldr w0, [sp, 28]
cmp w0, 0
blt .L507
ldr w0, [sp, 28]
str w0, [sp, 12]
ldr w0, [sp, 24]
sub w0, w0, #2017
str w0, [sp, 24]
.L507:
ldr w0, [sp, 12]
asr w0, w0, 6
ldr w1, [sp, 12]
add w0, w1, w0
str w0, [sp, 28]
ldr w0, [sp, 28]
cmp w0, 0
blt .L508
ldr w0, [sp, 28]
str w0, [sp, 12]
ldr w0, [sp, 24]
sub w0, w0, #1016
str w0, [sp, 24]
.L508:
ldr w0, [sp, 12]
asr w0, w0, 7
ldr w1, [sp, 12]
add w0, w1, w0
str w0, [sp, 28]
ldr w0, [sp, 28]
cmp w0, 0
blt .L509
ldr w0, [sp, 28]
str w0, [sp, 12]
ldr w0, [sp, 24]
sub w0, w0, #510
str w0, [sp, 24]
.L509:
ldr w0, [sp, 12]
mov w1, -2147483648
sub w0, w1, w0
str w0, [sp, 12]
ldr w0, [sp, 12]
asr w0, w0, 15
ldr w1, [sp, 24]
sub w0, w1, w0
str w0, [sp, 24]
ldr w0, [sp, 24]
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE79:
.size fxp_ln, .-fxp_ln
.align 2
.global fxp_log10_low
.type fxp_log10_low, %function
fxp_log10_low:
.LFB80:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str d0, [sp, 24]
ldr d0, [sp, 24]
mov x0, 4679240012837945344
fmov d1, x0
fmul d1, d0, d1
fmov d0, 5.0e-1
fadd d0, d1, d0
fcvtzs w0, d0
str w0, [sp, 36]
ldr w0, [sp, 36]
bl fxp_ln
str w0, [sp, 40]
mov w0, 655360
bl fxp_ln
str w0, [sp, 44]
ldr w0, [sp, 40]
scvtf d1, w0
ldr w0, [sp, 44]
scvtf d0, w0
fdiv d0, d1, d0
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE80:
.size fxp_log10_low, .-fxp_log10_low
.align 2
.global fxp_log10
.type fxp_log10, %function
fxp_log10:
.LFB81:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str d0, [sp, 24]
ldr d0, [sp, 24]
mov x0, 281200098803712
movk x0, 0x40df, lsl 48
fmov d1, x0
fcmpe d0, d1
bgt .L519
b .L521
.L519:
ldr d0, [sp, 24]
adrp x0, .LC22
ldr d1, [x0, #:lo12:.LC22]
fcmpe d0, d1
bgt .L520
b .L522
.L520:
adrp x0, .LC22
ldr d1, [x0, #:lo12:.LC22]
ldr d0, [sp, 24]
fdiv d0, d0, d1
str d0, [sp, 24]
ldr d0, [sp, 24]
bl fxp_log10_low
adrp x0, .LC23
ldr d1, [x0, #:lo12:.LC23]
fadd d0, d0, d1
b .L518
.L522:
mov x0, 281200098803712
movk x0, 0x40df, lsl 48
fmov d1, x0
ldr d0, [sp, 24]
fdiv d0, d0, d1
str d0, [sp, 24]
ldr d0, [sp, 24]
bl fxp_log10_low
adrp x0, .LC24
ldr d1, [x0, #:lo12:.LC24]
fadd d0, d0, d1
b .L518
.L521:
ldr d0, [sp, 24]
bl fxp_log10_low
.L518:
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE81:
.size fxp_log10, .-fxp_log10
.section .rodata
.align 3
.LC25:
.string "/home/yashchopda/Desktop/dsverifier-v2.0.3-esbmc-v4.0-cbmc-5.6/bmc/core/functions.h"
.align 3
.LC26:
.string "sv >= nv"
.text
.align 2
.global snrVariance
.type snrVariance, %function
snrVariance:
.LFB82:
.cfi_startproc
stp x29, x30, [sp, -96]!
.cfi_def_cfa_offset 96
.cfi_offset 29, -96
.cfi_offset 30, -88
mov x29, sp
str x0, [sp, 40]
str x1, [sp, 32]
str w2, [sp, 28]
str xzr, [sp, 56]
str xzr, [sp, 64]
str xzr, [sp, 72]
str xzr, [sp, 80]
str wzr, [sp, 52]
b .L524
.L525:
ldrsw x0, [sp, 52]
lsl x0, x0, 2
ldr x1, [sp, 40]
add x0, x1, x0
ldr s0, [x0]
fcvt d0, s0
ldr d1, [sp, 56]
fadd d0, d1, d0
str d0, [sp, 56]
ldrsw x0, [sp, 52]
lsl x0, x0, 2
ldr x1, [sp, 32]
add x0, x1, x0
ldr s0, [x0]
fcvt d0, s0
ldr d1, [sp, 64]
fadd d0, d1, d0
str d0, [sp, 64]
ldr w0, [sp, 52]
add w0, w0, 1
str w0, [sp, 52]
.L524:
ldr w1, [sp, 52]
ldr w0, [sp, 28]
cmp w1, w0
blt .L525
ldr w0, [sp, 28]
scvtf d0, w0
ldr d1, [sp, 56]
fdiv d0, d1, d0
str d0, [sp, 56]
ldr w0, [sp, 28]
scvtf d0, w0
ldr d1, [sp, 64]
fdiv d0, d1, d0
str d0, [sp, 64]
str wzr, [sp, 52]
b .L526
.L527:
ldrsw x0, [sp, 52]
lsl x0, x0, 2
ldr x1, [sp, 40]
add x0, x1, x0
ldr s0, [x0]
fcvt d1, s0
ldr d0, [sp, 56]
fsub d1, d1, d0
ldrsw x0, [sp, 52]
lsl x0, x0, 2
ldr x1, [sp, 40]
add x0, x1, x0
ldr s0, [x0]
fcvt d2, s0
ldr d0, [sp, 56]
fsub d0, d2, d0
fmul d0, d1, d0
ldr d1, [sp, 72]
fadd d0, d1, d0
str d0, [sp, 72]
ldrsw x0, [sp, 52]
lsl x0, x0, 2
ldr x1, [sp, 32]
add x0, x1, x0
ldr s0, [x0]
fcvt d1, s0
ldr d0, [sp, 64]
fsub d1, d1, d0
ldrsw x0, [sp, 52]
lsl x0, x0, 2
ldr x1, [sp, 32]
add x0, x1, x0
ldr s0, [x0]
fcvt d2, s0
ldr d0, [sp, 64]
fsub d0, d2, d0
fmul d0, d1, d0
ldr d1, [sp, 80]
fadd d0, d1, d0
str d0, [sp, 80]
ldr w0, [sp, 52]
add w0, w0, 1
str w0, [sp, 52]
.L526:
ldr w1, [sp, 52]
ldr w0, [sp, 28]
cmp w1, w0
blt .L527
ldr d0, [sp, 80]
fcmp d0, #0.0
beq .L528
ldr d1, [sp, 72]
ldr d0, [sp, 80]
fcmpe d1, d0
bge .L529
adrp x0, __PRETTY_FUNCTION__.18
add x3, x0, :lo12:__PRETTY_FUNCTION__.18
mov w2, 373
adrp x0, .LC25
add x1, x0, :lo12:.LC25
adrp x0, .LC26
add x0, x0, :lo12:.LC26
bl __assert_fail
.L529:
ldr d0, [sp, 80]
ldr d1, [sp, 72]
fdiv d0, d1, d0
str d0, [sp, 88]
ldr d0, [sp, 88]
fcvt s0, d0
b .L530
.L528:
mov w0, 16282
movk w0, 0x461c, lsl 16
fmov s0, w0
.L530:
ldp x29, x30, [sp], 96
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE82:
.size snrVariance, .-snrVariance
.align 2
.global snrPower
.type snrPower, %function
snrPower:
.LFB83:
.cfi_startproc
stp x29, x30, [sp, -80]!
.cfi_def_cfa_offset 80
.cfi_offset 29, -80
.cfi_offset 30, -72
mov x29, sp
str x0, [sp, 40]
str x1, [sp, 32]
str w2, [sp, 28]
str xzr, [sp, 56]
str xzr, [sp, 64]
str wzr, [sp, 52]
b .L532
.L533:
ldrsw x0, [sp, 52]
lsl x0, x0, 2
ldr x1, [sp, 40]
add x0, x1, x0
ldr s1, [x0]
ldrsw x0, [sp, 52]
lsl x0, x0, 2
ldr x1, [sp, 40]
add x0, x1, x0
ldr s0, [x0]
fmul s0, s1, s0
fcvt d0, s0
ldr d1, [sp, 56]
fadd d0, d1, d0
str d0, [sp, 56]
ldrsw x0, [sp, 52]
lsl x0, x0, 2
ldr x1, [sp, 32]
add x0, x1, x0
ldr s1, [x0]
ldrsw x0, [sp, 52]
lsl x0, x0, 2
ldr x1, [sp, 32]
add x0, x1, x0
ldr s0, [x0]
fmul s0, s1, s0
fcvt d0, s0
ldr d1, [sp, 64]
fadd d0, d1, d0
str d0, [sp, 64]
ldr w0, [sp, 52]
add w0, w0, 1
str w0, [sp, 52]
.L532:
ldr w1, [sp, 52]
ldr w0, [sp, 28]
cmp w1, w0
blt .L533
ldr d0, [sp, 64]
fcmp d0, #0.0
beq .L534
ldr d1, [sp, 56]
ldr d0, [sp, 64]
fcmpe d1, d0
bge .L535
adrp x0, __PRETTY_FUNCTION__.17
add x3, x0, :lo12:__PRETTY_FUNCTION__.17
mov w2, 394
adrp x0, .LC25
add x1, x0, :lo12:.LC25
adrp x0, .LC26
add x0, x0, :lo12:.LC26
bl __assert_fail
.L535:
ldr d0, [sp, 64]
ldr d1, [sp, 56]
fdiv d0, d1, d0
str d0, [sp, 72]
ldr d0, [sp, 72]
fcvt s0, d0
b .L536
.L534:
mov w0, 16282
movk w0, 0x461c, lsl 16
fmov s0, w0
.L536:
ldp x29, x30, [sp], 80
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE83:
.size snrPower, .-snrPower
.section .rodata
.align 3
.LC27:
.string "power >= 1.0f"
.text
.align 2
.global snrPoint
.type snrPoint, %function
snrPoint:
.LFB84:
.cfi_startproc
stp x29, x30, [sp, -80]!
.cfi_def_cfa_offset 80
.cfi_offset 29, -80
.cfi_offset 30, -72
mov x29, sp
str x0, [sp, 40]
str x1, [sp, 32]
str w2, [sp, 28]
str xzr, [sp, 64]
str xzr, [sp, 72]
str wzr, [sp, 60]
b .L538
.L544:
ldrsw x0, [sp, 60]
lsl x0, x0, 2
ldr x1, [sp, 32]
add x0, x1, x0
ldr s0, [x0]
fcmp s0, #0.0
beq .L546
ldrsw x0, [sp, 60]
lsl x0, x0, 2
ldr x1, [sp, 40]
add x0, x1, x0
ldr s1, [x0]
ldrsw x0, [sp, 60]
lsl x0, x0, 2
ldr x1, [sp, 32]
add x0, x1, x0
ldr s0, [x0]
fdiv s0, s1, s0
fcvt d0, s0
str d0, [sp, 64]
ldr d0, [sp, 64]
mov x0, 211106232532992
movk x0, 0x4062, lsl 48
fmov d1, x0
fcmpe d0, d1
bgt .L547
ldr d0, [sp, 64]
mov x0, 211106232532992
movk x0, 0xc062, lsl 48
fmov d1, x0
fcmpe d0, d1
bmi .L547
ldr d0, [sp, 64]
fmul d0, d0, d0
str d0, [sp, 72]
ldr d1, [sp, 72]
fmov d0, 1.0e+0
fcmpe d1, d0
bge .L540
adrp x0, __PRETTY_FUNCTION__.16
add x3, x0, :lo12:__PRETTY_FUNCTION__.16
mov w2, 412
adrp x0, .LC25
add x1, x0, :lo12:.LC25
adrp x0, .LC27
add x0, x0, :lo12:.LC27
bl __assert_fail
.L546:
nop
b .L540
.L547:
nop
.L540:
ldr w0, [sp, 60]
add w0, w0, 1
str w0, [sp, 60]
.L538:
ldr w1, [sp, 60]
ldr w0, [sp, 28]
cmp w1, w0
blt .L544
mov w0, 16282
movk w0, 0x461c, lsl 16
fmov s0, w0
ldp x29, x30, [sp], 80
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE84:
.size snrPoint, .-snrPoint
.global next
.data
.align 3
.type next, %object
.size next, 8
next:
.xword 1
.text
.align 2
.global rand
.type rand, %function
rand:
.LFB85:
.cfi_startproc
adrp x0, next
add x0, x0, :lo12:next
ldr x1, [x0]
mov x0, 20077
movk x0, 0x41c6, lsl 16
mul x1, x1, x0
mov x0, 12345
add x1, x1, x0
adrp x0, next
add x0, x0, :lo12:next
str x1, [x0]
adrp x0, next
add x0, x0, :lo12:next
ldr x0, [x0]
lsr x0, x0, 16
and w0, w0, 32767
ret
.cfi_endproc
.LFE85:
.size rand, .-rand
.align 2
.global srand
.type srand, %function
srand:
.LFB86:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str w0, [sp, 12]
ldr w1, [sp, 12]
adrp x0, next
add x0, x0, :lo12:next
str x1, [x0]
nop
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE86:
.size srand, .-srand
.section .rodata
.align 3
.LC28:
.string "(double)timer1*CYCLE <= (double)DEADLINE"
.text
.align 2
.global iirIIOutTime
.type iirIIOutTime, %function
iirIIOutTime:
.LFB87:
.cfi_startproc
stp x29, x30, [sp, -112]!
.cfi_def_cfa_offset 112
.cfi_offset 29, -112
.cfi_offset 30, -104
mov x29, sp
str x0, [sp, 56]
str s0, [sp, 52]
str x1, [sp, 40]
str x2, [sp, 32]
str w3, [sp, 48]
str w4, [sp, 28]
str wzr, [sp, 72]
str wzr, [sp, 76]
ldr x0, [sp, 40]
add x0, x0, 4
str x0, [sp, 88]
ldr x0, [sp, 32]
str x0, [sp, 96]
ldr x0, [sp, 56]
add x0, x0, 4
str x0, [sp, 104]
ldr w0, [sp, 72]
add w0, w0, 71
str w0, [sp, 72]
mov w0, 1
str w0, [sp, 84]
b .L552
.L553:
ldr x0, [sp, 88]
add x1, x0, 4
str x1, [sp, 88]
ldr s1, [x0]
ldr x0, [sp, 104]
add x1, x0, 4
str x1, [sp, 104]
ldr s0, [x0]
fmul s0, s1, s0
ldr x0, [sp, 56]
ldr s1, [x0]
fsub s0, s1, s0
ldr x0, [sp, 56]
str s0, [x0]
ldr w0, [sp, 72]
add w0, w0, 54
str w0, [sp, 72]
ldr w0, [sp, 84]
add w0, w0, 1
str w0, [sp, 84]
.L552:
ldr w1, [sp, 84]
ldr w0, [sp, 48]
cmp w1, w0
blt .L553
ldr x0, [sp, 56]
ldr s1, [x0]
ldr s0, [sp, 52]
fadd s0, s1, s0
ldr x0, [sp, 56]
str s0, [x0]
ldr x0, [sp, 56]
str x0, [sp, 104]
str wzr, [sp, 80]
b .L554
.L555:
ldr x0, [sp, 96]
add x1, x0, 4
str x1, [sp, 96]
ldr s1, [x0]
ldr x0, [sp, 104]
add x1, x0, 4
str x1, [sp, 104]
ldr s0, [x0]
fmul s0, s1, s0
ldr s1, [sp, 76]
fadd s0, s1, s0
str s0, [sp, 76]
ldr w0, [sp, 72]
add w0, w0, 46
str w0, [sp, 72]
ldr w0, [sp, 80]
add w0, w0, 1
str w0, [sp, 80]
.L554:
ldr w1, [sp, 80]
ldr w0, [sp, 28]
cmp w1, w0
blt .L555
ldr w0, [sp, 72]
add w0, w0, 38
str w0, [sp, 72]
ldr w0, [sp, 72]
scvtf d0, w0
mov x0, 145685290680320
movk x0, 0x416e, lsl 48
fmov d1, x0
fdiv d0, d0, d1
adrp x0, .LC29
ldr d1, [x0, #:lo12:.LC29]
fcmpe d0, d1
bls .L556
adrp x0, __PRETTY_FUNCTION__.15
add x3, x0, :lo12:__PRETTY_FUNCTION__.15
mov w2, 450
adrp x0, .LC25
add x1, x0, :lo12:.LC25
adrp x0, .LC28
add x0, x0, :lo12:.LC28
bl __assert_fail
.L556:
ldr s0, [sp, 76]
ldp x29, x30, [sp], 112
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE87:
.size iirIIOutTime, .-iirIIOutTime
.align 2
.global iirIItOutTime
.type iirIItOutTime, %function
iirIItOutTime:
.LFB88:
.cfi_startproc
stp x29, x30, [sp, -96]!
.cfi_def_cfa_offset 96
.cfi_offset 29, -96
.cfi_offset 30, -88
mov x29, sp
str x0, [sp, 56]
str s0, [sp, 52]
str x1, [sp, 40]
str x2, [sp, 32]
str w3, [sp, 48]
str w4, [sp, 28]
str wzr, [sp, 64]
str wzr, [sp, 72]
ldr x0, [sp, 40]
add x0, x0, 4
str x0, [sp, 80]
ldr x0, [sp, 32]
str x0, [sp, 88]
ldr w0, [sp, 48]
ldr w2, [sp, 28]
ldr w1, [sp, 28]
cmp w2, w0
csel w0, w1, w0, ge
str w0, [sp, 76]
ldr x0, [sp, 88]
add x1, x0, 4
str x1, [sp, 88]
ldr s1, [x0]
ldr s0, [sp, 52]
fmul s1, s1, s0
ldr x0, [sp, 56]
ldr s0, [x0]
fadd s0, s1, s0
str s0, [sp, 72]
ldr w0, [sp, 64]
add w0, w0, 105
str w0, [sp, 64]
str wzr, [sp, 68]
b .L559
.L562:
ldrsw x0, [sp, 68]
add x0, x0, 1
lsl x0, x0, 2
ldr x1, [sp, 56]
add x1, x1, x0
ldrsw x0, [sp, 68]
lsl x0, x0, 2
ldr x2, [sp, 56]
add x0, x2, x0
ldr s0, [x1]
str s0, [x0]
ldr w0, [sp, 48]
sub w0, w0, #1
ldr w1, [sp, 68]
cmp w1, w0
bge .L560
ldr x0, [sp, 80]
add x1, x0, 4
str x1, [sp, 80]
ldr s1, [x0]
ldr s0, [sp, 72]
fmul s0, s1, s0
ldrsw x0, [sp, 68]
lsl x0, x0, 2
ldr x1, [sp, 56]
add x0, x1, x0
ldr s1, [x0]
ldrsw x0, [sp, 68]
lsl x0, x0, 2
ldr x1, [sp, 56]
add x0, x1, x0
fsub s0, s1, s0
str s0, [x0]
ldr w0, [sp, 64]
add w0, w0, 41
str w0, [sp, 64]
.L560:
ldr w0, [sp, 28]
sub w0, w0, #1
ldr w1, [sp, 68]
cmp w1, w0
bge .L561
ldr x0, [sp, 88]
add x1, x0, 4
str x1, [sp, 88]
ldr s1, [x0]
ldr s0, [sp, 52]
fmul s1, s1, s0
ldrsw x0, [sp, 68]
lsl x0, x0, 2
ldr x1, [sp, 56]
add x0, x1, x0
ldr s0, [x0]
ldrsw x0, [sp, 68]
lsl x0, x0, 2
ldr x1, [sp, 56]
add x0, x1, x0
fadd s0, s1, s0
str s0, [x0]
ldr w0, [sp, 64]
add w0, w0, 38
str w0, [sp, 64]
.L561:
ldr w0, [sp, 64]
add w0, w0, 54
str w0, [sp, 64]
ldr w0, [sp, 68]
add w0, w0, 1
str w0, [sp, 68]
.L559:
ldr w0, [sp, 76]
sub w0, w0, #1
ldr w1, [sp, 68]
cmp w1, w0
blt .L562
ldr w0, [sp, 64]
add w0, w0, 7
str w0, [sp, 64]
ldr w0, [sp, 64]
scvtf d0, w0
mov x0, 145685290680320
movk x0, 0x416e, lsl 48
fmov d1, x0
fdiv d0, d0, d1
adrp x0, .LC29
ldr d1, [x0, #:lo12:.LC29]
fcmpe d0, d1
bls .L563
adrp x0, __PRETTY_FUNCTION__.14
add x3, x0, :lo12:__PRETTY_FUNCTION__.14
mov w2, 477
adrp x0, .LC25
add x1, x0, :lo12:.LC25
adrp x0, .LC28
add x0, x0, :lo12:.LC28
bl __assert_fail
.L563:
ldr s0, [sp, 72]
ldp x29, x30, [sp], 96
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE88:
.size iirIItOutTime, .-iirIItOutTime
.align 2
.global iirIItOutTime_double
.type iirIItOutTime_double, %function
iirIItOutTime_double:
.LFB89:
.cfi_startproc
stp x29, x30, [sp, -112]!
.cfi_def_cfa_offset 112
.cfi_offset 29, -112
.cfi_offset 30, -104
mov x29, sp
str x0, [sp, 56]
str d0, [sp, 48]
str x1, [sp, 40]
str x2, [sp, 32]
str w3, [sp, 28]
str w4, [sp, 24]
str wzr, [sp, 76]
str xzr, [sp, 104]
ldr x0, [sp, 40]
add x0, x0, 8
str x0, [sp, 88]
ldr x0, [sp, 32]
str x0, [sp, 96]
ldr w0, [sp, 28]
ldr w2, [sp, 24]
ldr w1, [sp, 24]
cmp w2, w0
csel w0, w1, w0, ge
str w0, [sp, 84]
ldr x0, [sp, 96]
add x1, x0, 8
str x1, [sp, 96]
ldr d1, [x0]
ldr d0, [sp, 48]
fmul d1, d1, d0
ldr x0, [sp, 56]
ldr d0, [x0]
fadd d0, d1, d0
str d0, [sp, 104]
ldr w0, [sp, 76]
add w0, w0, 105
str w0, [sp, 76]
str wzr, [sp, 80]
b .L566
.L569:
ldrsw x0, [sp, 80]
add x0, x0, 1
lsl x0, x0, 3
ldr x1, [sp, 56]
add x1, x1, x0
ldrsw x0, [sp, 80]
lsl x0, x0, 3
ldr x2, [sp, 56]
add x0, x2, x0
ldr d0, [x1]
str d0, [x0]
ldr w0, [sp, 28]
sub w0, w0, #1
ldr w1, [sp, 80]
cmp w1, w0
bge .L567
ldr x0, [sp, 88]
add x1, x0, 8
str x1, [sp, 88]
ldr d1, [x0]
ldr d0, [sp, 104]
fmul d0, d1, d0
ldrsw x0, [sp, 80]
lsl x0, x0, 3
ldr x1, [sp, 56]
add x0, x1, x0
ldr d1, [x0]
ldrsw x0, [sp, 80]
lsl x0, x0, 3
ldr x1, [sp, 56]
add x0, x1, x0
fsub d0, d1, d0
str d0, [x0]
ldr w0, [sp, 76]
add w0, w0, 41
str w0, [sp, 76]
.L567:
ldr w0, [sp, 24]
sub w0, w0, #1
ldr w1, [sp, 80]
cmp w1, w0
bge .L568
ldr x0, [sp, 96]
add x1, x0, 8
str x1, [sp, 96]
ldr d1, [x0]
ldr d0, [sp, 48]
fmul d1, d1, d0
ldrsw x0, [sp, 80]
lsl x0, x0, 3
ldr x1, [sp, 56]
add x0, x1, x0
ldr d0, [x0]
ldrsw x0, [sp, 80]
lsl x0, x0, 3
ldr x1, [sp, 56]
add x0, x1, x0
fadd d0, d1, d0
str d0, [x0]
ldr w0, [sp, 76]
add w0, w0, 38
str w0, [sp, 76]
.L568:
ldr w0, [sp, 76]
add w0, w0, 54
str w0, [sp, 76]
ldr w0, [sp, 80]
add w0, w0, 1
str w0, [sp, 80]
.L566:
ldr w0, [sp, 84]
sub w0, w0, #1
ldr w1, [sp, 80]
cmp w1, w0
blt .L569
ldr w0, [sp, 76]
add w0, w0, 7
str w0, [sp, 76]
ldr w0, [sp, 76]
scvtf d0, w0
mov x0, 145685290680320
movk x0, 0x416e, lsl 48
fmov d1, x0
fdiv d0, d0, d1
adrp x0, .LC29
ldr d1, [x0, #:lo12:.LC29]
fcmpe d0, d1
bls .L570
adrp x0, __PRETTY_FUNCTION__.13
add x3, x0, :lo12:__PRETTY_FUNCTION__.13
mov w2, 504
adrp x0, .LC25
add x1, x0, :lo12:.LC25
adrp x0, .LC28
add x0, x0, :lo12:.LC28
bl __assert_fail
.L570:
ldr d0, [sp, 104]
ldp x29, x30, [sp], 112
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE89:
.size iirIItOutTime_double, .-iirIItOutTime_double
.align 2
.global iirOutBoth
.type iirOutBoth, %function
iirOutBoth:
.LFB90:
.cfi_startproc
stp x29, x30, [sp, -176]!
.cfi_def_cfa_offset 176
.cfi_offset 29, -176
.cfi_offset 30, -168
mov x29, sp
str x0, [sp, 72]
str x1, [sp, 64]
str x2, [sp, 56]
str x3, [sp, 48]
str x4, [sp, 40]
str x5, [sp, 32]
str x6, [sp, 24]
str x7, [sp, 16]
str xzr, [sp, 168]
str wzr, [sp, 92]
ldr x0, [sp, 16]
add x0, x0, 8
str x0, [sp, 104]
ldrsw x0, [sp, 192]
lsl x0, x0, 3
sub x0, x0, #8
ldr x1, [sp, 32]
add x0, x1, x0
str x0, [sp, 112]
ldr x0, [sp, 176]
str x0, [sp, 120]
ldrsw x0, [sp, 200]
lsl x0, x0, 3
sub x0, x0, #8
ldr x1, [sp, 24]
add x0, x1, x0
str x0, [sp, 128]
ldr x0, [sp, 56]
add x0, x0, 4
str x0, [sp, 136]
ldrsw x0, [sp, 192]
lsl x0, x0, 2
sub x0, x0, #4
ldr x1, [sp, 72]
add x0, x1, x0
str x0, [sp, 144]
ldr x0, [sp, 48]
str x0, [sp, 152]
ldrsw x0, [sp, 200]
lsl x0, x0, 2
sub x0, x0, #4
ldr x1, [sp, 64]
add x0, x1, x0
str x0, [sp, 160]
str wzr, [sp, 96]
b .L573
.L574:
ldr x0, [sp, 120]
add x1, x0, 8
str x1, [sp, 120]
ldr x2, [x0]
ldr x0, [sp, 128]
sub x1, x0, #8
str x1, [sp, 128]
ldr x0, [x0]
mov x1, x0
mov x0, x2
bl fxp_mult
mov x1, x0
ldr x0, [sp, 168]
bl fxp_add
str x0, [sp, 168]
ldr x0, [sp, 152]
add x1, x0, 4
str x1, [sp, 152]
ldr s1, [x0]
ldr x0, [sp, 160]
sub x1, x0, #4
str x1, [sp, 160]
ldr s0, [x0]
fmul s0, s1, s0
ldr s1, [sp, 92]
fadd s0, s1, s0
str s0, [sp, 92]
ldr w0, [sp, 96]
add w0, w0, 1
str w0, [sp, 96]
.L573:
ldr w1, [sp, 96]
ldr w0, [sp, 200]
cmp w1, w0
blt .L574
mov w0, 1
str w0, [sp, 100]
b .L575
.L576:
ldr x0, [sp, 104]
add x1, x0, 8
str x1, [sp, 104]
ldr x2, [x0]
ldr x0, [sp, 112]
sub x1, x0, #8
str x1, [sp, 112]
ldr x0, [x0]
mov x1, x0
mov x0, x2
bl fxp_mult
mov x1, x0
ldr x0, [sp, 168]
bl fxp_sub
str x0, [sp, 168]
ldr x0, [sp, 136]
add x1, x0, 4
str x1, [sp, 136]
ldr s1, [x0]
ldr x0, [sp, 144]
sub x1, x0, #4
str x1, [sp, 144]
ldr s0, [x0]
fmul s0, s1, s0
ldr s1, [sp, 92]
fsub s0, s1, s0
str s0, [sp, 92]
ldr w0, [sp, 100]
add w0, w0, 1
str w0, [sp, 100]
.L575:
ldr w1, [sp, 100]
ldr w0, [sp, 192]
cmp w1, w0
blt .L576
ldr x0, [sp, 184]
ldr x1, [sp, 168]
str x1, [x0]
ldr x0, [sp, 40]
ldr s0, [sp, 92]
str s0, [x0]
nop
ldp x29, x30, [sp], 176
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE90:
.size iirOutBoth, .-iirOutBoth
.align 2
.global iirOutFixedL
.type iirOutFixedL, %function
iirOutFixedL:
.LFB91:
.cfi_startproc
stp x29, x30, [sp, -112]!
.cfi_def_cfa_offset 112
.cfi_offset 29, -112
.cfi_offset 30, -104
mov x29, sp
str x0, [sp, 56]
str x1, [sp, 48]
str x2, [sp, 40]
str x3, [sp, 32]
str x4, [sp, 24]
str w5, [sp, 20]
str w6, [sp, 16]
str xzr, [sp, 104]
ldrsw x0, [sp, 20]
lsl x0, x0, 3
sub x0, x0, #8
ldr x1, [sp, 32]
add x0, x1, x0
str x0, [sp, 72]
ldr x0, [sp, 56]
add x0, x0, 8
str x0, [sp, 80]
ldrsw x0, [sp, 16]
lsl x0, x0, 3
sub x0, x0, #8
ldr x1, [sp, 24]
add x0, x1, x0
str x0, [sp, 88]
ldr x0, [sp, 48]
str x0, [sp, 96]
str wzr, [sp, 64]
b .L578
.L579:
ldrsw x0, [sp, 64]
add x0, x0, 1
lsl x0, x0, 3
ldr x1, [sp, 48]
add x1, x1, x0
ldrsw x0, [sp, 64]
lsl x0, x0, 3
ldr x2, [sp, 48]
add x0, x2, x0
ldr x1, [x1]
str x1, [x0]
ldr x0, [sp, 88]
sub x1, x0, #8
str x1, [sp, 88]
ldr x2, [x0]
ldr x0, [sp, 96]
add x1, x0, 8
str x1, [sp, 96]
ldr x0, [x0]
mov x1, x0
mov x0, x2
bl fxp_mult
mov x1, x0
ldr x0, [sp, 104]
bl fxp_add
str x0, [sp, 104]
ldr w0, [sp, 64]
add w0, w0, 1
str w0, [sp, 64]
.L578:
ldr w0, [sp, 16]
sub w0, w0, #1
ldr w1, [sp, 64]
cmp w1, w0
blt .L579
ldrsw x0, [sp, 16]
lsl x0, x0, 3
sub x0, x0, #8
ldr x1, [sp, 48]
add x0, x1, x0
ldr x1, [sp, 40]
str x1, [x0]
ldr x0, [sp, 88]
sub x1, x0, #8
str x1, [sp, 88]
ldr x2, [x0]
ldr x0, [sp, 96]
add x1, x0, 8
str x1, [sp, 96]
ldr x0, [x0]
mov x1, x0
mov x0, x2
bl fxp_mult
mov x1, x0
ldr x0, [sp, 104]
bl fxp_add
str x0, [sp, 104]
mov w0, 1
str w0, [sp, 68]
b .L580
.L581:
ldr x0, [sp, 72]
sub x1, x0, #8
str x1, [sp, 72]
ldr x2, [x0]
ldr x0, [sp, 80]
add x1, x0, 8
str x1, [sp, 80]
ldr x0, [x0]
mov x1, x0
mov x0, x2
bl fxp_mult
mov x1, x0
ldr x0, [sp, 104]
bl fxp_sub
str x0, [sp, 104]
ldrsw x0, [sp, 68]
add x0, x0, 1
lsl x0, x0, 3
ldr x1, [sp, 56]
add x1, x1, x0
ldrsw x0, [sp, 68]
lsl x0, x0, 3
ldr x2, [sp, 56]
add x0, x2, x0
ldr x1, [x1]
str x1, [x0]
ldr w0, [sp, 68]
add w0, w0, 1
str w0, [sp, 68]
.L580:
ldr w0, [sp, 20]
sub w0, w0, #1
ldr w1, [sp, 68]
cmp w1, w0
blt .L581
ldr w0, [sp, 20]
cmp w0, 1
ble .L582
ldr x0, [sp, 72]
sub x1, x0, #8
str x1, [sp, 72]
ldr x2, [x0]
ldr x0, [sp, 80]
add x1, x0, 8
str x1, [sp, 80]
ldr x0, [x0]
mov x1, x0
mov x0, x2
bl fxp_mult
mov x1, x0
ldr x0, [sp, 104]
bl fxp_sub
str x0, [sp, 104]
.L582:
ldrsw x0, [sp, 20]
lsl x0, x0, 3
sub x0, x0, #8
ldr x1, [sp, 56]
add x0, x1, x0
ldr x1, [sp, 104]
str x1, [x0]
ldr x0, [sp, 104]
ldp x29, x30, [sp], 112
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE91:
.size iirOutFixedL, .-iirOutFixedL
.align 2
.global iirOutFloatL
.type iirOutFloatL, %function
iirOutFloatL:
.LFB92:
.cfi_startproc
sub sp, sp, #96
.cfi_def_cfa_offset 96
str x0, [sp, 40]
str x1, [sp, 32]
str s0, [sp, 28]
str x2, [sp, 16]
str x3, [sp, 8]
str w4, [sp, 24]
str w5, [sp, 4]
str wzr, [sp, 52]
ldrsw x0, [sp, 24]
lsl x0, x0, 2
sub x0, x0, #4
ldr x1, [sp, 16]
add x0, x1, x0
str x0, [sp, 64]
ldr x0, [sp, 40]
add x0, x0, 4
str x0, [sp, 72]
ldrsw x0, [sp, 4]
lsl x0, x0, 2
sub x0, x0, #4
ldr x1, [sp, 8]
add x0, x1, x0
str x0, [sp, 80]
ldr x0, [sp, 32]
str x0, [sp, 88]
str wzr, [sp, 56]
b .L585
.L586:
ldrsw x0, [sp, 56]
add x0, x0, 1
lsl x0, x0, 2
ldr x1, [sp, 32]
add x1, x1, x0
ldrsw x0, [sp, 56]
lsl x0, x0, 2
ldr x2, [sp, 32]
add x0, x2, x0
ldr s0, [x1]
str s0, [x0]
ldr x0, [sp, 80]
sub x1, x0, #4
str x1, [sp, 80]
ldr s1, [x0]
ldr x0, [sp, 88]
add x1, x0, 4
str x1, [sp, 88]
ldr s0, [x0]
fmul s0, s1, s0
ldr s1, [sp, 52]
fadd s0, s1, s0
str s0, [sp, 52]
ldr w0, [sp, 56]
add w0, w0, 1
str w0, [sp, 56]
.L585:
ldr w0, [sp, 4]
sub w0, w0, #1
ldr w1, [sp, 56]
cmp w1, w0
blt .L586
ldrsw x0, [sp, 4]
lsl x0, x0, 2
sub x0, x0, #4
ldr x1, [sp, 32]
add x0, x1, x0
ldr s0, [sp, 28]
str s0, [x0]
ldr x0, [sp, 80]
sub x1, x0, #4
str x1, [sp, 80]
ldr s1, [x0]
ldr x0, [sp, 88]
add x1, x0, 4
str x1, [sp, 88]
ldr s0, [x0]
fmul s0, s1, s0
ldr s1, [sp, 52]
fadd s0, s1, s0
str s0, [sp, 52]
mov w0, 1
str w0, [sp, 60]
b .L587
.L588:
ldr x0, [sp, 64]
sub x1, x0, #4
str x1, [sp, 64]
ldr s1, [x0]
ldr x0, [sp, 72]
add x1, x0, 4
str x1, [sp, 72]
ldr s0, [x0]
fmul s0, s1, s0
ldr s1, [sp, 52]
fsub s0, s1, s0
str s0, [sp, 52]
ldrsw x0, [sp, 60]
add x0, x0, 1
lsl x0, x0, 2
ldr x1, [sp, 40]
add x1, x1, x0
ldrsw x0, [sp, 60]
lsl x0, x0, 2
ldr x2, [sp, 40]
add x0, x2, x0
ldr s0, [x1]
str s0, [x0]
ldr w0, [sp, 60]
add w0, w0, 1
str w0, [sp, 60]
.L587:
ldr w0, [sp, 24]
sub w0, w0, #1
ldr w1, [sp, 60]
cmp w1, w0
blt .L588
ldr w0, [sp, 24]
cmp w0, 1
ble .L589
ldr x0, [sp, 64]
sub x1, x0, #4
str x1, [sp, 64]
ldr s1, [x0]
ldr x0, [sp, 72]
add x1, x0, 4
str x1, [sp, 72]
ldr s0, [x0]
fmul s0, s1, s0
ldr s1, [sp, 52]
fsub s0, s1, s0
str s0, [sp, 52]
.L589:
ldrsw x0, [sp, 24]
lsl x0, x0, 2
sub x0, x0, #4
ldr x1, [sp, 40]
add x0, x1, x0
ldr s0, [sp, 52]
str s0, [x0]
ldr s0, [sp, 52]
add sp, sp, 96
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE92:
.size iirOutFloatL, .-iirOutFloatL
.align 2
.global iirOutBothL
.type iirOutBothL, %function
iirOutBothL:
.LFB93:
.cfi_startproc
stp x29, x30, [sp, -192]!
.cfi_def_cfa_offset 192
.cfi_offset 29, -192
.cfi_offset 30, -184
mov x29, sp
str x0, [sp, 88]
str x1, [sp, 80]
str x2, [sp, 72]
str x3, [sp, 64]
str s0, [sp, 60]
str x4, [sp, 48]
str x5, [sp, 40]
str x6, [sp, 32]
str x7, [sp, 24]
str xzr, [sp, 152]
ldrsw x0, [sp, 200]
lsl x0, x0, 3
sub x0, x0, #8
ldr x1, [sp, 32]
add x0, x1, x0
str x0, [sp, 120]
ldr x0, [sp, 48]
add x0, x0, 8
str x0, [sp, 128]
ldrsw x0, [sp, 208]
lsl x0, x0, 3
sub x0, x0, #8
ldr x1, [sp, 24]
add x0, x1, x0
str x0, [sp, 136]
ldr x0, [sp, 40]
str x0, [sp, 144]
str wzr, [sp, 108]
ldrsw x0, [sp, 200]
lsl x0, x0, 2
sub x0, x0, #4
ldr x1, [sp, 72]
add x0, x1, x0
str x0, [sp, 160]
ldr x0, [sp, 88]
add x0, x0, 4
str x0, [sp, 168]
ldrsw x0, [sp, 208]
lsl x0, x0, 2
sub x0, x0, #4
ldr x1, [sp, 64]
add x0, x1, x0
str x0, [sp, 176]
ldr x0, [sp, 80]
str x0, [sp, 184]
str wzr, [sp, 112]
b .L592
.L593:
ldrsw x0, [sp, 112]
add x0, x0, 1
lsl x0, x0, 3
ldr x1, [sp, 40]
add x1, x1, x0
ldrsw x0, [sp, 112]
lsl x0, x0, 3
ldr x2, [sp, 40]
add x0, x2, x0
ldr x1, [x1]
str x1, [x0]
ldr x0, [sp, 136]
sub x1, x0, #8
str x1, [sp, 136]
ldr x2, [x0]
ldr x0, [sp, 144]
add x1, x0, 8
str x1, [sp, 144]
ldr x0, [x0]
mov x1, x0
mov x0, x2
bl fxp_mult
mov x1, x0
ldr x0, [sp, 152]
bl fxp_add
str x0, [sp, 152]
ldrsw x0, [sp, 112]
add x0, x0, 1
lsl x0, x0, 2
ldr x1, [sp, 80]
add x1, x1, x0
ldrsw x0, [sp, 112]
lsl x0, x0, 2
ldr x2, [sp, 80]
add x0, x2, x0
ldr s0, [x1]
str s0, [x0]
ldr x0, [sp, 176]
sub x1, x0, #4
str x1, [sp, 176]
ldr s1, [x0]
ldr x0, [sp, 184]
add x1, x0, 4
str x1, [sp, 184]
ldr s0, [x0]
fmul s0, s1, s0
ldr s1, [sp, 108]
fadd s0, s1, s0
str s0, [sp, 108]
ldr w0, [sp, 112]
add w0, w0, 1
str w0, [sp, 112]
.L592:
ldr w0, [sp, 208]
sub w0, w0, #1
ldr w1, [sp, 112]
cmp w1, w0
blt .L593
ldrsw x0, [sp, 208]
lsl x0, x0, 3
sub x0, x0, #8
ldr x1, [sp, 40]
add x0, x1, x0
ldr x1, [sp, 192]
str x1, [x0]
ldr x0, [sp, 136]
sub x1, x0, #8
str x1, [sp, 136]
ldr x2, [x0]
ldr x0, [sp, 144]
add x1, x0, 8
str x1, [sp, 144]
ldr x0, [x0]
mov x1, x0
mov x0, x2
bl fxp_mult
mov x1, x0
ldr x0, [sp, 152]
bl fxp_add
str x0, [sp, 152]
ldrsw x0, [sp, 208]
lsl x0, x0, 2
sub x0, x0, #4
ldr x1, [sp, 80]
add x0, x1, x0
ldr s0, [sp, 60]
str s0, [x0]
ldr x0, [sp, 176]
sub x1, x0, #4
str x1, [sp, 176]
ldr s1, [x0]
ldr x0, [sp, 184]
add x1, x0, 4
str x1, [sp, 184]
ldr s0, [x0]
fmul s0, s1, s0
ldr s1, [sp, 108]
fadd s0, s1, s0
str s0, [sp, 108]
mov w0, 1
str w0, [sp, 116]
b .L594
.L595:
ldr x0, [sp, 120]
sub x1, x0, #8
str x1, [sp, 120]
ldr x2, [x0]
ldr x0, [sp, 128]
add x1, x0, 8
str x1, [sp, 128]
ldr x0, [x0]
mov x1, x0
mov x0, x2
bl fxp_mult
mov x1, x0
ldr x0, [sp, 152]
bl fxp_sub
str x0, [sp, 152]
ldrsw x0, [sp, 116]
add x0, x0, 1
lsl x0, x0, 3
ldr x1, [sp, 48]
add x1, x1, x0
ldrsw x0, [sp, 116]
lsl x0, x0, 3
ldr x2, [sp, 48]
add x0, x2, x0
ldr x1, [x1]
str x1, [x0]
ldr x0, [sp, 160]
sub x1, x0, #4
str x1, [sp, 160]
ldr s1, [x0]
ldr x0, [sp, 168]
add x1, x0, 4
str x1, [sp, 168]
ldr s0, [x0]
fmul s0, s1, s0
ldr s1, [sp, 108]
fsub s0, s1, s0
str s0, [sp, 108]
ldrsw x0, [sp, 116]
add x0, x0, 1
lsl x0, x0, 2
ldr x1, [sp, 88]
add x1, x1, x0
ldrsw x0, [sp, 116]
lsl x0, x0, 2
ldr x2, [sp, 88]
add x0, x2, x0
ldr s0, [x1]
str s0, [x0]
ldr w0, [sp, 116]
add w0, w0, 1
str w0, [sp, 116]
.L594:
ldr w0, [sp, 200]
sub w0, w0, #1
ldr w1, [sp, 116]
cmp w1, w0
blt .L595
ldr w0, [sp, 200]
cmp w0, 1
ble .L596
ldr x0, [sp, 120]
sub x1, x0, #8
str x1, [sp, 120]
ldr x2, [x0]
ldr x0, [sp, 128]
add x1, x0, 8
str x1, [sp, 128]
ldr x0, [x0]
mov x1, x0
mov x0, x2
bl fxp_mult
mov x1, x0
ldr x0, [sp, 152]
bl fxp_sub
str x0, [sp, 152]
.L596:
ldrsw x0, [sp, 200]
lsl x0, x0, 3
sub x0, x0, #8
ldr x1, [sp, 48]
add x0, x1, x0
ldr x1, [sp, 152]
str x1, [x0]
ldr w0, [sp, 200]
cmp w0, 1
ble .L597
ldr x0, [sp, 160]
sub x1, x0, #4
str x1, [sp, 160]
ldr s1, [x0]
ldr x0, [sp, 168]
add x1, x0, 4
str x1, [sp, 168]
ldr s0, [x0]
fmul s0, s1, s0
ldr s1, [sp, 108]
fsub s0, s1, s0
str s0, [sp, 108]
.L597:
ldrsw x0, [sp, 200]
lsl x0, x0, 2
sub x0, x0, #4
ldr x1, [sp, 88]
add x0, x1, x0
ldr s0, [sp, 108]
str s0, [x0]
ldr x0, [sp, 152]
bl fxp_to_float
fmov s1, s0
ldr s0, [sp, 108]
fsub s0, s1, s0
ldp x29, x30, [sp], 192
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE93:
.size iirOutBothL, .-iirOutBothL
.align 2
.global iirOutBothL2
.type iirOutBothL2, %function
iirOutBothL2:
.LFB94:
.cfi_startproc
stp x29, x30, [sp, -192]!
.cfi_def_cfa_offset 192
.cfi_offset 29, -192
.cfi_offset 30, -184
mov x29, sp
str x0, [sp, 88]
str x1, [sp, 80]
str x2, [sp, 72]
str x3, [sp, 64]
str s0, [sp, 60]
str x4, [sp, 48]
str x5, [sp, 40]
str x6, [sp, 32]
str x7, [sp, 24]
str xzr, [sp, 120]
ldrsw x0, [sp, 200]
lsl x0, x0, 3
sub x0, x0, #8
ldr x1, [sp, 32]
add x0, x1, x0
str x0, [sp, 128]
ldr x0, [sp, 48]
add x0, x0, 8
str x0, [sp, 136]
ldrsw x0, [sp, 208]
lsl x0, x0, 3
sub x0, x0, #8
ldr x1, [sp, 24]
add x0, x1, x0
str x0, [sp, 144]
ldr x0, [sp, 40]
str x0, [sp, 152]
str wzr, [sp, 108]
ldrsw x0, [sp, 200]
lsl x0, x0, 2
sub x0, x0, #4
ldr x1, [sp, 72]
add x0, x1, x0
str x0, [sp, 160]
ldr x0, [sp, 88]
add x0, x0, 4
str x0, [sp, 168]
ldrsw x0, [sp, 208]
lsl x0, x0, 2
sub x0, x0, #4
ldr x1, [sp, 64]
add x0, x1, x0
str x0, [sp, 176]
ldr x0, [sp, 80]
str x0, [sp, 184]
str wzr, [sp, 112]
mov w0, 1
str w0, [sp, 116]
str wzr, [sp, 112]
b .L600
.L601:
ldrsw x0, [sp, 112]
add x0, x0, 1
lsl x0, x0, 3
ldr x1, [sp, 40]
add x1, x1, x0
ldrsw x0, [sp, 112]
lsl x0, x0, 3
ldr x2, [sp, 40]
add x0, x2, x0
ldr x1, [x1]
str x1, [x0]
ldr w0, [sp, 208]
sub w1, w0, #1
ldr w0, [sp, 112]
sub w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 24]
add x0, x1, x0
ldr x2, [x0]
ldrsw x0, [sp, 112]
lsl x0, x0, 3
ldr x1, [sp, 40]
add x0, x1, x0
ldr x0, [x0]
mov x1, x0
mov x0, x2
bl fxp_mult
mov x1, x0
ldr x0, [sp, 120]
bl fxp_add
str x0, [sp, 120]
ldrsw x0, [sp, 112]
add x0, x0, 1
lsl x0, x0, 2
ldr x1, [sp, 80]
add x1, x1, x0
ldrsw x0, [sp, 112]
lsl x0, x0, 2
ldr x2, [sp, 80]
add x0, x2, x0
ldr s0, [x1]
str s0, [x0]
ldr w0, [sp, 208]
sub w1, w0, #1
ldr w0, [sp, 112]
sub w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 64]
add x0, x1, x0
ldr s1, [x0]
ldrsw x0, [sp, 112]
lsl x0, x0, 2
ldr x1, [sp, 80]
add x0, x1, x0
ldr s0, [x0]
fmul s0, s1, s0
ldr s1, [sp, 108]
fadd s0, s1, s0
str s0, [sp, 108]
ldr w0, [sp, 112]
add w0, w0, 1
str w0, [sp, 112]
.L600:
ldr w0, [sp, 208]
sub w0, w0, #1
ldr w1, [sp, 112]
cmp w1, w0
blt .L601
ldrsw x0, [sp, 208]
lsl x0, x0, 3
sub x0, x0, #8
ldr x1, [sp, 40]
add x0, x1, x0
ldr x1, [sp, 192]
str x1, [x0]
ldr w0, [sp, 208]
sub w1, w0, #1
ldr w0, [sp, 112]
sub w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 24]
add x0, x1, x0
ldr x2, [x0]
ldrsw x0, [sp, 112]
lsl x0, x0, 3
ldr x1, [sp, 40]
add x0, x1, x0
ldr x0, [x0]
mov x1, x0
mov x0, x2
bl fxp_mult
mov x1, x0
ldr x0, [sp, 120]
bl fxp_add
str x0, [sp, 120]
ldrsw x0, [sp, 208]
lsl x0, x0, 2
sub x0, x0, #4
ldr x1, [sp, 80]
add x0, x1, x0
ldr s0, [sp, 60]
str s0, [x0]
ldr w0, [sp, 208]
sub w1, w0, #1
ldr w0, [sp, 112]
sub w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 64]
add x0, x1, x0
ldr s1, [x0]
ldrsw x0, [sp, 112]
lsl x0, x0, 2
ldr x1, [sp, 80]
add x0, x1, x0
ldr s0, [x0]
fmul s0, s1, s0
ldr s1, [sp, 108]
fadd s0, s1, s0
str s0, [sp, 108]
mov w0, 1
str w0, [sp, 116]
b .L602
.L603:
ldr w1, [sp, 200]
ldr w0, [sp, 116]
sub w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 32]
add x0, x1, x0
ldr x2, [x0]
ldrsw x0, [sp, 116]
lsl x0, x0, 3
ldr x1, [sp, 48]
add x0, x1, x0
ldr x0, [x0]
mov x1, x0
mov x0, x2
bl fxp_mult
mov x1, x0
ldr x0, [sp, 120]
bl fxp_sub
str x0, [sp, 120]
ldrsw x0, [sp, 116]
add x0, x0, 1
lsl x0, x0, 3
ldr x1, [sp, 48]
add x1, x1, x0
ldrsw x0, [sp, 116]
lsl x0, x0, 3
ldr x2, [sp, 48]
add x0, x2, x0
ldr x1, [x1]
str x1, [x0]
ldr w1, [sp, 200]
ldr w0, [sp, 116]
sub w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 72]
add x0, x1, x0
ldr s1, [x0]
ldrsw x0, [sp, 116]
lsl x0, x0, 2
ldr x1, [sp, 88]
add x0, x1, x0
ldr s0, [x0]
fmul s0, s1, s0
ldr s1, [sp, 108]
fsub s0, s1, s0
str s0, [sp, 108]
ldrsw x0, [sp, 116]
add x0, x0, 1
lsl x0, x0, 2
ldr x1, [sp, 88]
add x1, x1, x0
ldrsw x0, [sp, 116]
lsl x0, x0, 2
ldr x2, [sp, 88]
add x0, x2, x0
ldr s0, [x1]
str s0, [x0]
ldr w0, [sp, 116]
add w0, w0, 1
str w0, [sp, 116]
.L602:
ldr w0, [sp, 200]
sub w0, w0, #1
ldr w1, [sp, 116]
cmp w1, w0
blt .L603
ldr w0, [sp, 200]
cmp w0, 1
ble .L604
ldr w1, [sp, 200]
ldr w0, [sp, 116]
sub w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 32]
add x0, x1, x0
ldr x2, [x0]
ldrsw x0, [sp, 116]
lsl x0, x0, 3
ldr x1, [sp, 48]
add x0, x1, x0
ldr x0, [x0]
mov x1, x0
mov x0, x2
bl fxp_mult
mov x1, x0
ldr x0, [sp, 120]
bl fxp_sub
str x0, [sp, 120]
.L604:
ldrsw x0, [sp, 200]
lsl x0, x0, 3
sub x0, x0, #8
ldr x1, [sp, 48]
add x0, x1, x0
ldr x1, [sp, 120]
str x1, [x0]
ldr w0, [sp, 200]
cmp w0, 1
ble .L605
ldr w1, [sp, 200]
ldr w0, [sp, 116]
sub w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 72]
add x0, x1, x0
ldr s1, [x0]
ldrsw x0, [sp, 116]
lsl x0, x0, 2
ldr x1, [sp, 88]
add x0, x1, x0
ldr s0, [x0]
fmul s0, s1, s0
ldr s1, [sp, 108]
fsub s0, s1, s0
str s0, [sp, 108]
.L605:
ldrsw x0, [sp, 200]
lsl x0, x0, 2
sub x0, x0, #4
ldr x1, [sp, 88]
add x0, x1, x0
ldr s0, [sp, 108]
str s0, [x0]
ldr x0, [sp, 120]
bl fxp_to_float
fmov s1, s0
ldr s0, [sp, 108]
fsub s0, s1, s0
ldp x29, x30, [sp], 192
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE94:
.size iirOutBothL2, .-iirOutBothL2
.section .rodata
.align 3
.LC30:
.string "An Overflow Occurred in the node a0"
.text
.align 2
.global fxp_direct_form_1
.type fxp_direct_form_1, %function
fxp_direct_form_1:
.LFB95:
.cfi_startproc
stp x29, x30, [sp, -112]!
.cfi_def_cfa_offset 112
.cfi_offset 29, -112
.cfi_offset 30, -104
mov x29, sp
str x0, [sp, 56]
str x1, [sp, 48]
str x2, [sp, 40]
str x3, [sp, 32]
str w4, [sp, 28]
str w5, [sp, 24]
str xzr, [sp, 104]
ldr x0, [sp, 40]
add x0, x0, 8
str x0, [sp, 72]
ldrsw x0, [sp, 28]
lsl x0, x0, 3
sub x0, x0, #8
ldr x1, [sp, 56]
add x0, x1, x0
str x0, [sp, 80]
ldr x0, [sp, 32]
str x0, [sp, 88]
ldrsw x0, [sp, 24]
lsl x0, x0, 3
sub x0, x0, #8
ldr x1, [sp, 48]
add x0, x1, x0
str x0, [sp, 96]
str wzr, [sp, 64]
b .L608
.L609:
ldr x0, [sp, 88]
add x1, x0, 8
str x1, [sp, 88]
ldr x2, [x0]
ldr x0, [sp, 96]
sub x1, x0, #8
str x1, [sp, 96]
ldr x0, [x0]
mov x1, x0
mov x0, x2
bl fxp_mult
mov x1, x0
ldr x0, [sp, 104]
bl fxp_add
str x0, [sp, 104]
ldr w0, [sp, 64]
add w0, w0, 1
str w0, [sp, 64]
.L608:
ldr w1, [sp, 64]
ldr w0, [sp, 24]
cmp w1, w0
blt .L609
mov w0, 1
str w0, [sp, 68]
b .L610
.L611:
ldr x0, [sp, 72]
add x1, x0, 8
str x1, [sp, 72]
ldr x2, [x0]
ldr x0, [sp, 80]
sub x1, x0, #8
str x1, [sp, 80]
ldr x0, [x0]
mov x1, x0
mov x0, x2
bl fxp_mult
mov x1, x0
ldr x0, [sp, 104]
bl fxp_sub
str x0, [sp, 104]
ldr w0, [sp, 68]
add w0, w0, 1
str w0, [sp, 68]
.L610:
ldr w1, [sp, 68]
ldr w0, [sp, 28]
cmp w1, w0
blt .L611
adrp x0, .LC30
add x1, x0, :lo12:.LC30
ldr x0, [sp, 104]
bl fxp_verify_overflow_node
ldr x0, [sp, 40]
ldr x0, [x0]
mov x1, x0
ldr x0, [sp, 104]
bl fxp_div
str x0, [sp, 104]
ldr x0, [sp, 104]
bl fxp_quantize
ldp x29, x30, [sp], 112
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE95:
.size fxp_direct_form_1, .-fxp_direct_form_1
.section .rodata
.align 3
.LC31:
.string "An Overflow Occurred in the node b0"
.text
.align 2
.global fxp_direct_form_2
.type fxp_direct_form_2, %function
fxp_direct_form_2:
.LFB96:
.cfi_startproc
stp x29, x30, [sp, -128]!
.cfi_def_cfa_offset 128
.cfi_offset 29, -128
.cfi_offset 30, -120
mov x29, sp
str x19, [sp, 16]
.cfi_offset 19, -112
str x0, [sp, 72]
str x1, [sp, 64]
str x2, [sp, 56]
str x3, [sp, 48]
str w4, [sp, 44]
str w5, [sp, 40]
str xzr, [sp, 120]
ldr x0, [sp, 56]
add x0, x0, 8
str x0, [sp, 96]
ldr x0, [sp, 48]
str x0, [sp, 104]
ldr x0, [sp, 72]
add x0, x0, 8
str x0, [sp, 112]
mov w0, 1
str w0, [sp, 92]
b .L614
.L615:
ldr x0, [sp, 72]
ldr x19, [x0]
ldr x0, [sp, 96]
add x1, x0, 8
str x1, [sp, 96]
ldr x2, [x0]
ldr x0, [sp, 112]
add x1, x0, 8
str x1, [sp, 112]
ldr x0, [x0]
mov x1, x0
mov x0, x2
bl fxp_mult
mov x1, x0
mov x0, x19
bl fxp_sub
mov x1, x0
ldr x0, [sp, 72]
str x1, [x0]
ldr w0, [sp, 92]
add w0, w0, 1
str w0, [sp, 92]
.L614:
ldr w1, [sp, 92]
ldr w0, [sp, 44]
cmp w1, w0
blt .L615
ldr x0, [sp, 72]
ldr x0, [x0]
ldr x1, [sp, 64]
bl fxp_add
mov x1, x0
ldr x0, [sp, 72]
str x1, [x0]
ldr x0, [sp, 72]
ldr x2, [x0]
ldr x0, [sp, 56]
ldr x0, [x0]
mov x1, x0
mov x0, x2
bl fxp_div
mov x1, x0
ldr x0, [sp, 72]
str x1, [x0]
ldr x0, [sp, 72]
ldr x2, [x0]
adrp x0, .LC31
add x1, x0, :lo12:.LC31
mov x0, x2
bl fxp_verify_overflow_node
ldr x0, [sp, 72]
str x0, [sp, 112]
str wzr, [sp, 88]
b .L616
.L617:
ldr x0, [sp, 104]
add x1, x0, 8
str x1, [sp, 104]
ldr x2, [x0]
ldr x0, [sp, 112]
add x1, x0, 8
str x1, [sp, 112]
ldr x0, [x0]
mov x1, x0
mov x0, x2
bl fxp_mult
mov x1, x0
ldr x0, [sp, 120]
bl fxp_add
str x0, [sp, 120]
ldr w0, [sp, 88]
add w0, w0, 1
str w0, [sp, 88]
.L616:
ldr w1, [sp, 88]
ldr w0, [sp, 40]
cmp w1, w0
blt .L617
ldr x0, [sp, 120]
bl fxp_quantize
ldr x19, [sp, 16]
ldp x29, x30, [sp], 128
.cfi_restore 30
.cfi_restore 29
.cfi_restore 19
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE96:
.size fxp_direct_form_2, .-fxp_direct_form_2
.align 2
.global fxp_transposed_direct_form_2
.type fxp_transposed_direct_form_2, %function
fxp_transposed_direct_form_2:
.LFB97:
.cfi_startproc
stp x29, x30, [sp, -112]!
.cfi_def_cfa_offset 112
.cfi_offset 29, -112
.cfi_offset 30, -104
mov x29, sp
stp x19, x20, [sp, 16]
.cfi_offset 19, -96
.cfi_offset 20, -88
str x0, [sp, 72]
str x1, [sp, 64]
str x2, [sp, 56]
str x3, [sp, 48]
str w4, [sp, 44]
str w5, [sp, 40]
str xzr, [sp, 104]
ldr x0, [sp, 56]
add x0, x0, 8
str x0, [sp, 88]
ldr x0, [sp, 48]
str x0, [sp, 96]
ldr w0, [sp, 44]
ldr w2, [sp, 40]
ldr w1, [sp, 40]
cmp w2, w0
csel w0, w1, w0, ge
str w0, [sp, 84]
ldr x0, [sp, 96]
add x1, x0, 8
str x1, [sp, 96]
ldr x0, [x0]
ldr x1, [sp, 64]
bl fxp_mult
mov x2, x0
ldr x0, [sp, 72]
ldr x0, [x0]
mov x1, x0
mov x0, x2
bl fxp_add
str x0, [sp, 104]
ldr x0, [sp, 56]
ldr x0, [x0]
mov x1, x0
ldr x0, [sp, 104]
bl fxp_div
str x0, [sp, 104]
str wzr, [sp, 80]
b .L620
.L623:
ldrsw x0, [sp, 80]
add x0, x0, 1
lsl x0, x0, 3
ldr x1, [sp, 72]
add x1, x1, x0
ldrsw x0, [sp, 80]
lsl x0, x0, 3
ldr x2, [sp, 72]
add x0, x2, x0
ldr x1, [x1]
str x1, [x0]
ldr w0, [sp, 44]
sub w0, w0, #1
ldr w1, [sp, 80]
cmp w1, w0
bge .L621
ldrsw x0, [sp, 80]
lsl x0, x0, 3
ldr x1, [sp, 72]
add x0, x1, x0
ldr x20, [x0]
ldr x0, [sp, 88]
add x1, x0, 8
str x1, [sp, 88]
ldr x0, [x0]
ldr x1, [sp, 104]
bl fxp_mult
mov x2, x0
ldrsw x0, [sp, 80]
lsl x0, x0, 3
ldr x1, [sp, 72]
add x19, x1, x0
mov x1, x2
mov x0, x20
bl fxp_sub
str x0, [x19]
.L621:
ldr w0, [sp, 40]
sub w0, w0, #1
ldr w1, [sp, 80]
cmp w1, w0
bge .L622
ldrsw x0, [sp, 80]
lsl x0, x0, 3
ldr x1, [sp, 72]
add x0, x1, x0
ldr x20, [x0]
ldr x0, [sp, 96]
add x1, x0, 8
str x1, [sp, 96]
ldr x0, [x0]
ldr x1, [sp, 64]
bl fxp_mult
mov x2, x0
ldrsw x0, [sp, 80]
lsl x0, x0, 3
ldr x1, [sp, 72]
add x19, x1, x0
mov x1, x2
mov x0, x20
bl fxp_add
str x0, [x19]
.L622:
ldr w0, [sp, 80]
add w0, w0, 1
str w0, [sp, 80]
.L620:
ldr w0, [sp, 84]
sub w0, w0, #1
ldr w1, [sp, 80]
cmp w1, w0
blt .L623
ldrsw x0, [sp, 80]
lsl x0, x0, 3
ldr x1, [sp, 72]
add x0, x1, x0
ldr x2, [x0]
adrp x0, .LC30
add x1, x0, :lo12:.LC30
mov x0, x2
bl fxp_verify_overflow_node
ldr x0, [sp, 104]
bl fxp_quantize
ldp x19, x20, [sp, 16]
ldp x29, x30, [sp], 112
.cfi_restore 30
.cfi_restore 29
.cfi_restore 19
.cfi_restore 20
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE97:
.size fxp_transposed_direct_form_2, .-fxp_transposed_direct_form_2
.align 2
.global double_direct_form_1
.type double_direct_form_1, %function
double_direct_form_1:
.LFB98:
.cfi_startproc
sub sp, sp, #96
.cfi_def_cfa_offset 96
str x0, [sp, 40]
str x1, [sp, 32]
str x2, [sp, 24]
str x3, [sp, 16]
str w4, [sp, 12]
str w5, [sp, 8]
str xzr, [sp, 88]
ldr x0, [sp, 24]
add x0, x0, 8
str x0, [sp, 56]
ldrsw x0, [sp, 12]
lsl x0, x0, 3
sub x0, x0, #8
ldr x1, [sp, 40]
add x0, x1, x0
str x0, [sp, 64]
ldr x0, [sp, 16]
str x0, [sp, 72]
ldrsw x0, [sp, 8]
lsl x0, x0, 3
sub x0, x0, #8
ldr x1, [sp, 32]
add x0, x1, x0
str x0, [sp, 80]
str wzr, [sp, 48]
b .L626
.L627:
ldr x0, [sp, 72]
add x1, x0, 8
str x1, [sp, 72]
ldr d1, [x0]
ldr x0, [sp, 80]
sub x1, x0, #8
str x1, [sp, 80]
ldr d0, [x0]
fmul d0, d1, d0
ldr d1, [sp, 88]
fadd d0, d1, d0
str d0, [sp, 88]
ldr w0, [sp, 48]
add w0, w0, 1
str w0, [sp, 48]
.L626:
ldr w1, [sp, 48]
ldr w0, [sp, 8]
cmp w1, w0
blt .L627
mov w0, 1
str w0, [sp, 52]
b .L628
.L629:
ldr x0, [sp, 56]
add x1, x0, 8
str x1, [sp, 56]
ldr d1, [x0]
ldr x0, [sp, 64]
sub x1, x0, #8
str x1, [sp, 64]
ldr d0, [x0]
fmul d0, d1, d0
ldr d1, [sp, 88]
fsub d0, d1, d0
str d0, [sp, 88]
ldr w0, [sp, 52]
add w0, w0, 1
str w0, [sp, 52]
.L628:
ldr w1, [sp, 52]
ldr w0, [sp, 12]
cmp w1, w0
blt .L629
ldr x0, [sp, 24]
ldr d0, [x0]
ldr d1, [sp, 88]
fdiv d0, d1, d0
str d0, [sp, 88]
ldr d0, [sp, 88]
add sp, sp, 96
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE98:
.size double_direct_form_1, .-double_direct_form_1
.align 2
.global double_direct_form_2
.type double_direct_form_2, %function
double_direct_form_2:
.LFB99:
.cfi_startproc
sub sp, sp, #96
.cfi_def_cfa_offset 96
str x0, [sp, 40]
str d0, [sp, 32]
str x1, [sp, 24]
str x2, [sp, 16]
str w3, [sp, 12]
str w4, [sp, 8]
str xzr, [sp, 88]
ldr x0, [sp, 24]
add x0, x0, 8
str x0, [sp, 64]
ldr x0, [sp, 16]
str x0, [sp, 72]
ldr x0, [sp, 40]
add x0, x0, 8
str x0, [sp, 80]
mov w0, 1
str w0, [sp, 60]
b .L632
.L633:
ldr x0, [sp, 64]
add x1, x0, 8
str x1, [sp, 64]
ldr d1, [x0]
ldr x0, [sp, 80]
add x1, x0, 8
str x1, [sp, 80]
ldr d0, [x0]
fmul d0, d1, d0
ldr x0, [sp, 40]
ldr d1, [x0]
fsub d0, d1, d0
ldr x0, [sp, 40]
str d0, [x0]
ldr w0, [sp, 60]
add w0, w0, 1
str w0, [sp, 60]
.L632:
ldr w1, [sp, 60]
ldr w0, [sp, 12]
cmp w1, w0
blt .L633
ldr x0, [sp, 40]
ldr d1, [x0]
ldr d0, [sp, 32]
fadd d0, d1, d0
ldr x0, [sp, 40]
str d0, [x0]
ldr x0, [sp, 40]
ldr d1, [x0]
ldr x0, [sp, 24]
ldr d0, [x0]
fdiv d0, d1, d0
ldr x0, [sp, 40]
str d0, [x0]
ldr x0, [sp, 40]
str x0, [sp, 80]
str wzr, [sp, 56]
b .L634
.L635:
ldr x0, [sp, 72]
add x1, x0, 8
str x1, [sp, 72]
ldr d1, [x0]
ldr x0, [sp, 80]
add x1, x0, 8
str x1, [sp, 80]
ldr d0, [x0]
fmul d0, d1, d0
ldr d1, [sp, 88]
fadd d0, d1, d0
str d0, [sp, 88]
ldr w0, [sp, 56]
add w0, w0, 1
str w0, [sp, 56]
.L634:
ldr w1, [sp, 56]
ldr w0, [sp, 8]
cmp w1, w0
blt .L635
ldr d0, [sp, 88]
add sp, sp, 96
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE99:
.size double_direct_form_2, .-double_direct_form_2
.align 2
.global double_transposed_direct_form_2
.type double_transposed_direct_form_2, %function
double_transposed_direct_form_2:
.LFB100:
.cfi_startproc
sub sp, sp, #80
.cfi_def_cfa_offset 80
str x0, [sp, 40]
str d0, [sp, 32]
str x1, [sp, 24]
str x2, [sp, 16]
str w3, [sp, 12]
str w4, [sp, 8]
str xzr, [sp, 72]
ldr x0, [sp, 24]
add x0, x0, 8
str x0, [sp, 56]
ldr x0, [sp, 16]
str x0, [sp, 64]
ldr w0, [sp, 12]
ldr w2, [sp, 8]
ldr w1, [sp, 8]
cmp w2, w0
csel w0, w1, w0, ge
str w0, [sp, 52]
ldr x0, [sp, 64]
add x1, x0, 8
str x1, [sp, 64]
ldr d1, [x0]
ldr d0, [sp, 32]
fmul d1, d1, d0
ldr x0, [sp, 40]
ldr d0, [x0]
fadd d0, d1, d0
str d0, [sp, 72]
ldr x0, [sp, 24]
ldr d0, [x0]
ldr d1, [sp, 72]
fdiv d0, d1, d0
str d0, [sp, 72]
str wzr, [sp, 48]
b .L638
.L641:
ldrsw x0, [sp, 48]
add x0, x0, 1
lsl x0, x0, 3
ldr x1, [sp, 40]
add x1, x1, x0
ldrsw x0, [sp, 48]
lsl x0, x0, 3
ldr x2, [sp, 40]
add x0, x2, x0
ldr d0, [x1]
str d0, [x0]
ldr w0, [sp, 12]
sub w0, w0, #1
ldr w1, [sp, 48]
cmp w1, w0
bge .L639
ldr x0, [sp, 56]
add x1, x0, 8
str x1, [sp, 56]
ldr d1, [x0]
ldr d0, [sp, 72]
fmul d0, d1, d0
ldrsw x0, [sp, 48]
lsl x0, x0, 3
ldr x1, [sp, 40]
add x0, x1, x0
ldr d1, [x0]
ldrsw x0, [sp, 48]
lsl x0, x0, 3
ldr x1, [sp, 40]
add x0, x1, x0
fsub d0, d1, d0
str d0, [x0]
.L639:
ldr w0, [sp, 8]
sub w0, w0, #1
ldr w1, [sp, 48]
cmp w1, w0
bge .L640
ldr x0, [sp, 64]
add x1, x0, 8
str x1, [sp, 64]
ldr d1, [x0]
ldr d0, [sp, 32]
fmul d1, d1, d0
ldrsw x0, [sp, 48]
lsl x0, x0, 3
ldr x1, [sp, 40]
add x0, x1, x0
ldr d0, [x0]
ldrsw x0, [sp, 48]
lsl x0, x0, 3
ldr x1, [sp, 40]
add x0, x1, x0
fadd d0, d1, d0
str d0, [x0]
.L640:
ldr w0, [sp, 48]
add w0, w0, 1
str w0, [sp, 48]
.L638:
ldr w0, [sp, 52]
sub w0, w0, #1
ldr w1, [sp, 48]
cmp w1, w0
blt .L641
ldr d0, [sp, 72]
add sp, sp, 80
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE100:
.size double_transposed_direct_form_2, .-double_transposed_direct_form_2
.align 2
.global float_direct_form_1
.type float_direct_form_1, %function
float_direct_form_1:
.LFB101:
.cfi_startproc
sub sp, sp, #96
.cfi_def_cfa_offset 96
str x0, [sp, 40]
str x1, [sp, 32]
str x2, [sp, 24]
str x3, [sp, 16]
str w4, [sp, 12]
str w5, [sp, 8]
str wzr, [sp, 52]
ldr x0, [sp, 24]
add x0, x0, 4
str x0, [sp, 64]
ldrsw x0, [sp, 12]
lsl x0, x0, 2
sub x0, x0, #4
ldr x1, [sp, 40]
add x0, x1, x0
str x0, [sp, 72]
ldr x0, [sp, 16]
str x0, [sp, 80]
ldrsw x0, [sp, 8]
lsl x0, x0, 2
sub x0, x0, #4
ldr x1, [sp, 32]
add x0, x1, x0
str x0, [sp, 88]
str wzr, [sp, 56]
b .L644
.L645:
ldr x0, [sp, 80]
add x1, x0, 4
str x1, [sp, 80]
ldr s1, [x0]
ldr x0, [sp, 88]
sub x1, x0, #4
str x1, [sp, 88]
ldr s0, [x0]
fmul s0, s1, s0
ldr s1, [sp, 52]
fadd s0, s1, s0
str s0, [sp, 52]
ldr w0, [sp, 56]
add w0, w0, 1
str w0, [sp, 56]
.L644:
ldr w1, [sp, 56]
ldr w0, [sp, 8]
cmp w1, w0
blt .L645
mov w0, 1
str w0, [sp, 60]
b .L646
.L647:
ldr x0, [sp, 64]
add x1, x0, 4
str x1, [sp, 64]
ldr s1, [x0]
ldr x0, [sp, 72]
sub x1, x0, #4
str x1, [sp, 72]
ldr s0, [x0]
fmul s0, s1, s0
ldr s1, [sp, 52]
fsub s0, s1, s0
str s0, [sp, 52]
ldr w0, [sp, 60]
add w0, w0, 1
str w0, [sp, 60]
.L646:
ldr w1, [sp, 60]
ldr w0, [sp, 12]
cmp w1, w0
blt .L647
ldr x0, [sp, 24]
ldr s0, [x0]
ldr s1, [sp, 52]
fdiv s0, s1, s0
str s0, [sp, 52]
ldr s0, [sp, 52]
add sp, sp, 96
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE101:
.size float_direct_form_1, .-float_direct_form_1
.align 2
.global float_direct_form_2
.type float_direct_form_2, %function
float_direct_form_2:
.LFB102:
.cfi_startproc
sub sp, sp, #96
.cfi_def_cfa_offset 96
str x0, [sp, 40]
str s0, [sp, 36]
str x1, [sp, 24]
str x2, [sp, 16]
str w3, [sp, 32]
str w4, [sp, 12]
str wzr, [sp, 60]
ldr x0, [sp, 24]
add x0, x0, 4
str x0, [sp, 72]
ldr x0, [sp, 16]
str x0, [sp, 80]
ldr x0, [sp, 40]
add x0, x0, 4
str x0, [sp, 88]
mov w0, 1
str w0, [sp, 68]
b .L650
.L651:
ldr x0, [sp, 72]
add x1, x0, 4
str x1, [sp, 72]
ldr s1, [x0]
ldr x0, [sp, 88]
add x1, x0, 4
str x1, [sp, 88]
ldr s0, [x0]
fmul s0, s1, s0
ldr x0, [sp, 40]
ldr s1, [x0]
fsub s0, s1, s0
ldr x0, [sp, 40]
str s0, [x0]
ldr w0, [sp, 68]
add w0, w0, 1
str w0, [sp, 68]
.L650:
ldr w1, [sp, 68]
ldr w0, [sp, 32]
cmp w1, w0
blt .L651
ldr x0, [sp, 40]
ldr s1, [x0]
ldr s0, [sp, 36]
fadd s0, s1, s0
ldr x0, [sp, 40]
str s0, [x0]
ldr x0, [sp, 40]
ldr s1, [x0]
ldr x0, [sp, 24]
ldr s0, [x0]
fdiv s0, s1, s0
ldr x0, [sp, 40]
str s0, [x0]
ldr x0, [sp, 40]
str x0, [sp, 88]
str wzr, [sp, 64]
b .L652
.L653:
ldr x0, [sp, 80]
add x1, x0, 4
str x1, [sp, 80]
ldr s1, [x0]
ldr x0, [sp, 88]
add x1, x0, 4
str x1, [sp, 88]
ldr s0, [x0]
fmul s0, s1, s0
ldr s1, [sp, 60]
fadd s0, s1, s0
str s0, [sp, 60]
ldr w0, [sp, 64]
add w0, w0, 1
str w0, [sp, 64]
.L652:
ldr w1, [sp, 64]
ldr w0, [sp, 12]
cmp w1, w0
blt .L653
ldr s0, [sp, 60]
add sp, sp, 96
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE102:
.size float_direct_form_2, .-float_direct_form_2
.align 2
.global float_transposed_direct_form_2
.type float_transposed_direct_form_2, %function
float_transposed_direct_form_2:
.LFB103:
.cfi_startproc
sub sp, sp, #80
.cfi_def_cfa_offset 80
str x0, [sp, 40]
str s0, [sp, 36]
str x1, [sp, 24]
str x2, [sp, 16]
str w3, [sp, 32]
str w4, [sp, 12]
str wzr, [sp, 56]
ldr x0, [sp, 24]
add x0, x0, 4
str x0, [sp, 64]
ldr x0, [sp, 16]
str x0, [sp, 72]
ldr w0, [sp, 32]
ldr w2, [sp, 12]
ldr w1, [sp, 12]
cmp w2, w0
csel w0, w1, w0, ge
str w0, [sp, 60]
ldr x0, [sp, 72]
add x1, x0, 4
str x1, [sp, 72]
ldr s1, [x0]
ldr s0, [sp, 36]
fmul s1, s1, s0
ldr x0, [sp, 40]
ldr s0, [x0]
fadd s0, s1, s0
str s0, [sp, 56]
ldr x0, [sp, 24]
ldr s0, [x0]
ldr s1, [sp, 56]
fdiv s0, s1, s0
str s0, [sp, 56]
str wzr, [sp, 52]
b .L656
.L659:
ldrsw x0, [sp, 52]
add x0, x0, 1
lsl x0, x0, 2
ldr x1, [sp, 40]
add x1, x1, x0
ldrsw x0, [sp, 52]
lsl x0, x0, 2
ldr x2, [sp, 40]
add x0, x2, x0
ldr s0, [x1]
str s0, [x0]
ldr w0, [sp, 32]
sub w0, w0, #1
ldr w1, [sp, 52]
cmp w1, w0
bge .L657
ldr x0, [sp, 64]
add x1, x0, 4
str x1, [sp, 64]
ldr s1, [x0]
ldr s0, [sp, 56]
fmul s0, s1, s0
ldrsw x0, [sp, 52]
lsl x0, x0, 2
ldr x1, [sp, 40]
add x0, x1, x0
ldr s1, [x0]
ldrsw x0, [sp, 52]
lsl x0, x0, 2
ldr x1, [sp, 40]
add x0, x1, x0
fsub s0, s1, s0
str s0, [x0]
.L657:
ldr w0, [sp, 12]
sub w0, w0, #1
ldr w1, [sp, 52]
cmp w1, w0
bge .L658
ldr x0, [sp, 72]
add x1, x0, 4
str x1, [sp, 72]
ldr s1, [x0]
ldr s0, [sp, 36]
fmul s1, s1, s0
ldrsw x0, [sp, 52]
lsl x0, x0, 2
ldr x1, [sp, 40]
add x0, x1, x0
ldr s0, [x0]
ldrsw x0, [sp, 52]
lsl x0, x0, 2
ldr x1, [sp, 40]
add x0, x1, x0
fadd s0, s1, s0
str s0, [x0]
.L658:
ldr w0, [sp, 52]
add w0, w0, 1
str w0, [sp, 52]
.L656:
ldr w0, [sp, 60]
sub w0, w0, #1
ldr w1, [sp, 52]
cmp w1, w0
blt .L659
ldr s0, [sp, 56]
add sp, sp, 80
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE103:
.size float_transposed_direct_form_2, .-float_transposed_direct_form_2
.section .rodata
.align 3
.LC32:
.string "/home/yashchopda/Desktop/dsverifier-v2.0.3-esbmc-v4.0-cbmc-5.6/bmc/core/realizations.h"
.align 3
.LC33:
.string "(double) timer1 * hw.cycle <= ds.sample_time"
.text
.align 2
.global double_direct_form_1_MSP430
.type double_direct_form_1_MSP430, %function
double_direct_form_1_MSP430:
.LFB104:
.cfi_startproc
stp x29, x30, [sp, -128]!
.cfi_def_cfa_offset 128
.cfi_offset 29, -128
.cfi_offset 30, -120
mov x29, sp
str x0, [sp, 56]
str x1, [sp, 48]
str x2, [sp, 40]
str x3, [sp, 32]
str w4, [sp, 28]
str w5, [sp, 24]
str wzr, [sp, 76]
str xzr, [sp, 120]
ldr x0, [sp, 40]
add x0, x0, 8
str x0, [sp, 88]
ldrsw x0, [sp, 28]
lsl x0, x0, 3
sub x0, x0, #8
ldr x1, [sp, 56]
add x0, x1, x0
str x0, [sp, 96]
ldr x0, [sp, 32]
str x0, [sp, 104]
ldrsw x0, [sp, 24]
lsl x0, x0, 3
sub x0, x0, #8
ldr x1, [sp, 48]
add x0, x1, x0
str x0, [sp, 112]
ldr w0, [sp, 76]
add w0, w0, 91
str w0, [sp, 76]
str wzr, [sp, 80]
b .L662
.L663:
ldr x0, [sp, 104]
add x1, x0, 8
str x1, [sp, 104]
ldr d1, [x0]
ldr x0, [sp, 112]
sub x1, x0, #8
str x1, [sp, 112]
ldr d0, [x0]
fmul d0, d1, d0
ldr d1, [sp, 120]
fadd d0, d1, d0
str d0, [sp, 120]
ldr w0, [sp, 76]
add w0, w0, 47
str w0, [sp, 76]
ldr w0, [sp, 80]
add w0, w0, 1
str w0, [sp, 80]
.L662:
ldr w1, [sp, 80]
ldr w0, [sp, 24]
cmp w1, w0
blt .L663
mov w0, 1
str w0, [sp, 84]
b .L664
.L665:
ldr x0, [sp, 88]
add x1, x0, 8
str x1, [sp, 88]
ldr d1, [x0]
ldr x0, [sp, 96]
sub x1, x0, #8
str x1, [sp, 96]
ldr d0, [x0]
fmul d0, d1, d0
ldr d1, [sp, 120]
fsub d0, d1, d0
str d0, [sp, 120]
ldr w0, [sp, 76]
add w0, w0, 57
str w0, [sp, 76]
ldr w0, [sp, 84]
add w0, w0, 1
str w0, [sp, 84]
.L664:
ldr w1, [sp, 84]
ldr w0, [sp, 28]
cmp w1, w0
blt .L665
ldr w0, [sp, 76]
add w0, w0, 3
str w0, [sp, 76]
ldr w0, [sp, 76]
scvtf d1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr d0, [x0, 16]
fmul d1, d1, d0
adrp x0, ds
add x0, x0, :lo12:ds
ldr d0, [x0, 1616]
fcmpe d1, d0
bls .L666
adrp x0, __PRETTY_FUNCTION__.12
add x3, x0, :lo12:__PRETTY_FUNCTION__.12
mov w2, 235
adrp x0, .LC32
add x1, x0, :lo12:.LC32
adrp x0, .LC33
add x0, x0, :lo12:.LC33
bl __assert_fail
.L666:
ldr d0, [sp, 120]
ldp x29, x30, [sp], 128
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE104:
.size double_direct_form_1_MSP430, .-double_direct_form_1_MSP430
.align 2
.global double_direct_form_2_MSP430
.type double_direct_form_2_MSP430, %function
double_direct_form_2_MSP430:
.LFB105:
.cfi_startproc
stp x29, x30, [sp, -112]!
.cfi_def_cfa_offset 112
.cfi_offset 29, -112
.cfi_offset 30, -104
mov x29, sp
str x0, [sp, 56]
str d0, [sp, 48]
str x1, [sp, 40]
str x2, [sp, 32]
str w3, [sp, 28]
str w4, [sp, 24]
str wzr, [sp, 68]
str xzr, [sp, 104]
ldr x0, [sp, 40]
add x0, x0, 8
str x0, [sp, 80]
ldr x0, [sp, 32]
str x0, [sp, 88]
ldr x0, [sp, 56]
add x0, x0, 8
str x0, [sp, 96]
ldr w0, [sp, 68]
add w0, w0, 71
str w0, [sp, 68]
mov w0, 1
str w0, [sp, 76]
b .L669
.L670:
ldr x0, [sp, 80]
add x1, x0, 8
str x1, [sp, 80]
ldr d1, [x0]
ldr x0, [sp, 96]
add x1, x0, 8
str x1, [sp, 96]
ldr d0, [x0]
fmul d0, d1, d0
ldr x0, [sp, 56]
ldr d1, [x0]
fsub d0, d1, d0
ldr x0, [sp, 56]
str d0, [x0]
ldr w0, [sp, 68]
add w0, w0, 54
str w0, [sp, 68]
ldr w0, [sp, 76]
add w0, w0, 1
str w0, [sp, 76]
.L669:
ldr w1, [sp, 76]
ldr w0, [sp, 28]
cmp w1, w0
blt .L670
ldr x0, [sp, 56]
ldr d1, [x0]
ldr d0, [sp, 48]
fadd d0, d1, d0
ldr x0, [sp, 56]
str d0, [x0]
ldr x0, [sp, 56]
ldr d1, [x0]
ldr x0, [sp, 40]
ldr d0, [x0]
fdiv d0, d1, d0
ldr x0, [sp, 56]
str d0, [x0]
ldr x0, [sp, 56]
str x0, [sp, 96]
str wzr, [sp, 72]
b .L671
.L672:
ldr x0, [sp, 88]
add x1, x0, 8
str x1, [sp, 88]
ldr d1, [x0]
ldr x0, [sp, 96]
add x1, x0, 8
str x1, [sp, 96]
ldr d0, [x0]
fmul d0, d1, d0
ldr d1, [sp, 104]
fadd d0, d1, d0
str d0, [sp, 104]
ldr w0, [sp, 68]
add w0, w0, 46
str w0, [sp, 68]
ldr w0, [sp, 72]
add w0, w0, 1
str w0, [sp, 72]
.L671:
ldr w1, [sp, 72]
ldr w0, [sp, 24]
cmp w1, w0
blt .L672
ldr w0, [sp, 68]
add w0, w0, 38
str w0, [sp, 68]
ldr w0, [sp, 68]
scvtf d1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr d0, [x0, 16]
fmul d1, d1, d0
adrp x0, ds
add x0, x0, :lo12:ds
ldr d0, [x0, 1616]
fcmpe d1, d0
bls .L673
adrp x0, __PRETTY_FUNCTION__.11
add x3, x0, :lo12:__PRETTY_FUNCTION__.11
mov w2, 262
adrp x0, .LC32
add x1, x0, :lo12:.LC32
adrp x0, .LC33
add x0, x0, :lo12:.LC33
bl __assert_fail
.L673:
ldr d0, [sp, 104]
ldp x29, x30, [sp], 112
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE105:
.size double_direct_form_2_MSP430, .-double_direct_form_2_MSP430
.align 2
.global double_transposed_direct_form_2_MSP430
.type double_transposed_direct_form_2_MSP430, %function
double_transposed_direct_form_2_MSP430:
.LFB106:
.cfi_startproc
stp x29, x30, [sp, -112]!
.cfi_def_cfa_offset 112
.cfi_offset 29, -112
.cfi_offset 30, -104
mov x29, sp
str x0, [sp, 56]
str d0, [sp, 48]
str x1, [sp, 40]
str x2, [sp, 32]
str w3, [sp, 28]
str w4, [sp, 24]
str wzr, [sp, 76]
str xzr, [sp, 104]
ldr x0, [sp, 40]
add x0, x0, 8
str x0, [sp, 88]
ldr x0, [sp, 32]
str x0, [sp, 96]
ldr w0, [sp, 28]
ldr w2, [sp, 24]
ldr w1, [sp, 24]
cmp w2, w0
csel w0, w1, w0, ge
str w0, [sp, 84]
ldr x0, [sp, 96]
add x1, x0, 8
str x1, [sp, 96]
ldr d1, [x0]
ldr d0, [sp, 48]
fmul d1, d1, d0
ldr x0, [sp, 56]
ldr d0, [x0]
fadd d0, d1, d0
str d0, [sp, 104]
ldr w0, [sp, 76]
add w0, w0, 105
str w0, [sp, 76]
str wzr, [sp, 80]
b .L676
.L679:
ldrsw x0, [sp, 80]
add x0, x0, 1
lsl x0, x0, 3
ldr x1, [sp, 56]
add x1, x1, x0
ldrsw x0, [sp, 80]
lsl x0, x0, 3
ldr x2, [sp, 56]
add x0, x2, x0
ldr d0, [x1]
str d0, [x0]
ldr w0, [sp, 28]
sub w0, w0, #1
ldr w1, [sp, 80]
cmp w1, w0
bge .L677
ldr x0, [sp, 88]
add x1, x0, 8
str x1, [sp, 88]
ldr d1, [x0]
ldr d0, [sp, 104]
fmul d0, d1, d0
ldrsw x0, [sp, 80]
lsl x0, x0, 3
ldr x1, [sp, 56]
add x0, x1, x0
ldr d1, [x0]
ldrsw x0, [sp, 80]
lsl x0, x0, 3
ldr x1, [sp, 56]
add x0, x1, x0
fsub d0, d1, d0
str d0, [x0]
ldr w0, [sp, 76]
add w0, w0, 41
str w0, [sp, 76]
.L677:
ldr w0, [sp, 24]
sub w0, w0, #1
ldr w1, [sp, 80]
cmp w1, w0
bge .L678
ldr x0, [sp, 96]
add x1, x0, 8
str x1, [sp, 96]
ldr d1, [x0]
ldr d0, [sp, 48]
fmul d1, d1, d0
ldrsw x0, [sp, 80]
lsl x0, x0, 3
ldr x1, [sp, 56]
add x0, x1, x0
ldr d0, [x0]
ldrsw x0, [sp, 80]
lsl x0, x0, 3
ldr x1, [sp, 56]
add x0, x1, x0
fadd d0, d1, d0
str d0, [x0]
ldr w0, [sp, 76]
add w0, w0, 38
str w0, [sp, 76]
.L678:
ldr w0, [sp, 76]
add w0, w0, 54
str w0, [sp, 76]
ldr w0, [sp, 80]
add w0, w0, 1
str w0, [sp, 80]
.L676:
ldr w0, [sp, 84]
sub w0, w0, #1
ldr w1, [sp, 80]
cmp w1, w0
blt .L679
ldr w0, [sp, 76]
add w0, w0, 7
str w0, [sp, 76]
ldr w0, [sp, 76]
scvtf d1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr d0, [x0, 16]
fmul d1, d1, d0
adrp x0, ds
add x0, x0, :lo12:ds
ldr d0, [x0, 1616]
fcmpe d1, d0
bls .L680
adrp x0, __PRETTY_FUNCTION__.10
add x3, x0, :lo12:__PRETTY_FUNCTION__.10
mov w2, 291
adrp x0, .LC32
add x1, x0, :lo12:.LC32
adrp x0, .LC33
add x0, x0, :lo12:.LC33
bl __assert_fail
.L680:
ldr d0, [sp, 104]
ldp x29, x30, [sp], 112
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE106:
.size double_transposed_direct_form_2_MSP430, .-double_transposed_direct_form_2_MSP430
.align 2
.global generic_timing_double_direct_form_1
.type generic_timing_double_direct_form_1, %function
generic_timing_double_direct_form_1:
.LFB107:
.cfi_startproc
sub sp, sp, #96
.cfi_def_cfa_offset 96
str x0, [sp, 40]
str x1, [sp, 32]
str x2, [sp, 24]
str x3, [sp, 16]
str w4, [sp, 12]
str w5, [sp, 8]
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 24]
mov w0, w1
lsl w0, w0, 1
add w0, w0, w1
lsl w0, w0, 1
mov w2, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 28]
mov w0, w1
lsl w0, w0, 1
add w0, w0, w1
add w1, w2, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 32]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 36]
add w2, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 40]
mov w0, w1
lsl w0, w0, 1
add w0, w0, w1
add w2, w2, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 44]
mov w0, w1
lsl w0, w0, 1
add w0, w0, w1
lsl w0, w0, 2
add w1, w2, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
ldr w0, [x0]
add w1, w1, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
str w1, [x0]
str xzr, [sp, 88]
ldr x0, [sp, 24]
add x0, x0, 8
str x0, [sp, 56]
ldrsw x0, [sp, 12]
lsl x0, x0, 3
sub x0, x0, #8
ldr x1, [sp, 40]
add x0, x1, x0
str x0, [sp, 64]
ldr x0, [sp, 16]
str x0, [sp, 72]
ldrsw x0, [sp, 8]
lsl x0, x0, 3
sub x0, x0, #8
ldr x1, [sp, 32]
add x0, x1, x0
str x0, [sp, 80]
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 44]
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 48]
add w1, w1, w0
mov w0, w1
lsl w0, w0, 1
add w0, w0, w1
lsl w0, w0, 1
mov w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 52]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 56]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 60]
lsl w0, w0, 1
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 64]
lsl w0, w0, 1
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 68]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 72]
add w0, w1, w0
lsl w1, w0, 1
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 76]
add w1, w1, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
ldr w0, [x0]
add w1, w1, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
str w1, [x0]
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 44]
lsl w1, w0, 1
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 80]
add w1, w1, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
ldr w0, [x0]
add w1, w1, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
str w1, [x0]
str wzr, [sp, 48]
b .L683
.L684:
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 48]
mov w0, w1
lsl w0, w0, 2
add w0, w0, w1
lsl w0, w0, 2
mov w2, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 84]
mov w0, w1
lsl w0, w0, 1
add w0, w0, w1
lsl w0, w0, 3
add w1, w2, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 52]
lsl w0, w0, 1
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 56]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 88]
add w2, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 44]
mov w0, w1
lsl w0, w0, 2
add w0, w0, w1
lsl w0, w0, 1
add w1, w2, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 92]
lsl w0, w0, 1
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 96]
lsl w0, w0, 1
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 76]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 100]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 104]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 76]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 112]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 80]
add w1, w1, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
ldr w0, [x0]
add w1, w1, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
str w1, [x0]
ldr x0, [sp, 72]
add x1, x0, 8
str x1, [sp, 72]
ldr d1, [x0]
ldr x0, [sp, 80]
sub x1, x0, #8
str x1, [sp, 80]
ldr d0, [x0]
fmul d0, d1, d0
ldr d1, [sp, 88]
fadd d0, d1, d0
str d0, [sp, 88]
ldr w0, [sp, 48]
add w0, w0, 1
str w0, [sp, 48]
.L683:
ldr w1, [sp, 48]
ldr w0, [sp, 8]
cmp w1, w0
blt .L684
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 108]
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 44]
add w0, w1, w0
lsl w1, w0, 1
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 80]
add w1, w1, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
ldr w0, [x0]
add w1, w1, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
str w1, [x0]
mov w0, 1
str w0, [sp, 52]
b .L685
.L686:
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 48]
mov w0, 22
mul w2, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 84]
mov w0, w1
lsl w0, w0, 1
add w0, w0, w1
lsl w0, w0, 3
add w1, w2, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 52]
lsl w0, w0, 1
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 44]
lsl w0, w0, 3
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 56]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 92]
lsl w0, w0, 1
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 96]
lsl w0, w0, 1
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 88]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 76]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 100]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 104]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 76]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 112]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 80]
add w1, w1, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
ldr w0, [x0]
add w1, w1, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
str w1, [x0]
ldr x0, [sp, 56]
add x1, x0, 8
str x1, [sp, 56]
ldr d1, [x0]
ldr x0, [sp, 64]
sub x1, x0, #8
str x1, [sp, 64]
ldr d0, [x0]
fmul d0, d1, d0
ldr d1, [sp, 88]
fsub d0, d1, d0
str d0, [sp, 88]
ldr w0, [sp, 52]
add w0, w0, 1
str w0, [sp, 52]
.L685:
ldr w1, [sp, 52]
ldr w0, [sp, 12]
cmp w1, w0
blt .L686
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 48]
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 84]
add w0, w1, w0
lsl w1, w0, 2
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 76]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 28]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 36]
add w2, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 40]
mov w0, w1
lsl w0, w0, 1
add w0, w0, w1
add w2, w2, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 116]
mov w0, w1
lsl w0, w0, 1
add w0, w0, w1
lsl w0, w0, 1
add w1, w2, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 120]
add w1, w1, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
ldr w0, [x0]
add w1, w1, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
str w1, [x0]
ldr d0, [sp, 88]
add sp, sp, 96
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE107:
.size generic_timing_double_direct_form_1, .-generic_timing_double_direct_form_1
.align 2
.global generic_timing_double_direct_form_2
.type generic_timing_double_direct_form_2, %function
generic_timing_double_direct_form_2:
.LFB108:
.cfi_startproc
sub sp, sp, #96
.cfi_def_cfa_offset 96
str x0, [sp, 40]
str d0, [sp, 32]
str x1, [sp, 24]
str x2, [sp, 16]
str w3, [sp, 12]
str w4, [sp, 8]
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 24]
lsl w2, w0, 3
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 44]
mov w0, w1
lsl w0, w0, 3
sub w0, w0, w1
lsl w0, w0, 1
add w2, w2, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 40]
mov w0, w1
lsl w0, w0, 1
add w0, w0, w1
add w2, w2, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 28]
mov w0, w1
lsl w0, w0, 1
add w0, w0, w1
add w1, w2, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 32]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 36]
add w1, w1, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
ldr w0, [x0]
add w1, w1, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
str w1, [x0]
str xzr, [sp, 88]
ldr x0, [sp, 24]
add x0, x0, 8
str x0, [sp, 64]
ldr x0, [sp, 16]
str x0, [sp, 72]
ldr x0, [sp, 40]
add x0, x0, 8
str x0, [sp, 80]
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 44]
mov w0, w1
lsl w0, w0, 2
add w0, w0, w1
lsl w0, w0, 1
mov w2, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 48]
mov w0, w1
lsl w0, w0, 1
add w0, w0, w1
lsl w0, w0, 1
add w1, w2, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 76]
lsl w0, w0, 1
add w1, w1, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
ldr w0, [x0]
add w1, w1, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
str w1, [x0]
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 108]
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 44]
add w0, w1, w0
lsl w1, w0, 1
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 80]
add w1, w1, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
ldr w0, [x0]
add w1, w1, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
str w1, [x0]
mov w0, 1
str w0, [sp, 60]
b .L689
.L690:
ldr x0, [sp, 64]
add x1, x0, 8
str x1, [sp, 64]
ldr d1, [x0]
ldr x0, [sp, 80]
add x1, x0, 8
str x1, [sp, 80]
ldr d0, [x0]
fmul d0, d1, d0
ldr x0, [sp, 40]
ldr d1, [x0]
fsub d0, d1, d0
ldr x0, [sp, 40]
str d0, [x0]
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 48]
mov w0, 23
mul w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 84]
lsl w0, w0, 5
add w2, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 44]
mov w0, w1
lsl w0, w0, 3
add w0, w0, w1
add w1, w2, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 52]
lsl w0, w0, 1
add w2, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 92]
mov w0, w1
lsl w0, w0, 1
add w0, w0, w1
add w1, w2, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 96]
lsl w0, w0, 1
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 56]
lsl w0, w0, 1
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 124]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 76]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 100]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 104]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 112]
add w1, w1, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
ldr w0, [x0]
add w1, w1, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
str w1, [x0]
ldr w0, [sp, 60]
add w0, w0, 1
str w0, [sp, 60]
.L689:
ldr w1, [sp, 60]
ldr w0, [sp, 12]
cmp w1, w0
blt .L690
ldr x0, [sp, 40]
ldr d1, [x0]
ldr d0, [sp, 32]
fadd d0, d1, d0
ldr x0, [sp, 40]
str d0, [x0]
ldr x0, [sp, 40]
str x0, [sp, 80]
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 48]
mov w0, 13
mul w2, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 84]
mov w0, w1
lsl w0, w0, 1
add w0, w0, w1
lsl w0, w0, 2
add w2, w2, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 44]
mov w0, w1
lsl w0, w0, 2
add w0, w0, w1
add w1, w2, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 124]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 92]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 96]
add w1, w1, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
ldr w0, [x0]
add w1, w1, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
str w1, [x0]
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 44]
lsl w1, w0, 1
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 80]
add w1, w1, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
ldr w0, [x0]
add w1, w1, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
str w1, [x0]
str wzr, [sp, 56]
b .L691
.L692:
ldr x0, [sp, 72]
add x1, x0, 8
str x1, [sp, 72]
ldr d1, [x0]
ldr x0, [sp, 80]
add x1, x0, 8
str x1, [sp, 80]
ldr d0, [x0]
fmul d0, d1, d0
ldr d1, [sp, 88]
fadd d0, d1, d0
str d0, [sp, 88]
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 48]
mov w0, w1
lsl w0, w0, 2
add w0, w0, w1
lsl w0, w0, 2
mov w2, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 84]
mov w0, w1
lsl w0, w0, 1
add w0, w0, w1
lsl w0, w0, 3
add w2, w2, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 44]
mov w0, w1
lsl w0, w0, 2
add w0, w0, w1
lsl w0, w0, 1
add w1, w2, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 96]
lsl w0, w0, 1
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 92]
lsl w0, w0, 1
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 52]
lsl w0, w0, 1
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 56]
lsl w0, w0, 1
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 76]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 100]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 104]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 112]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 80]
add w1, w1, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
ldr w0, [x0]
add w1, w1, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
str w1, [x0]
ldr w0, [sp, 56]
add w0, w0, 1
str w0, [sp, 56]
.L691:
ldr w1, [sp, 56]
ldr w0, [sp, 8]
cmp w1, w0
blt .L692
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 48]
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 84]
add w0, w1, w0
lsl w1, w0, 2
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 76]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 28]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 36]
add w2, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 40]
mov w0, w1
lsl w0, w0, 1
add w0, w0, w1
add w1, w2, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 116]
lsl w0, w0, 3
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 120]
add w1, w1, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
ldr w0, [x0]
add w1, w1, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
str w1, [x0]
ldr d0, [sp, 88]
add sp, sp, 96
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE108:
.size generic_timing_double_direct_form_2, .-generic_timing_double_direct_form_2
.align 2
.global generic_timing_double_transposed_direct_form_2
.type generic_timing_double_transposed_direct_form_2, %function
generic_timing_double_transposed_direct_form_2:
.LFB109:
.cfi_startproc
sub sp, sp, #80
.cfi_def_cfa_offset 80
str x0, [sp, 40]
str d0, [sp, 32]
str x1, [sp, 24]
str x2, [sp, 16]
str w3, [sp, 12]
str w4, [sp, 8]
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 24]
lsl w2, w0, 3
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 44]
mov w0, w1
lsl w0, w0, 3
sub w0, w0, w1
lsl w0, w0, 1
add w2, w2, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 40]
mov w0, w1
lsl w0, w0, 1
add w0, w0, w1
add w2, w2, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 28]
mov w0, w1
lsl w0, w0, 1
add w0, w0, w1
add w1, w2, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 32]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 36]
add w1, w1, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
ldr w0, [x0]
add w1, w1, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
str w1, [x0]
str xzr, [sp, 72]
ldr x0, [sp, 24]
add x0, x0, 8
str x0, [sp, 56]
ldr x0, [sp, 16]
str x0, [sp, 64]
ldr w0, [sp, 12]
ldr w2, [sp, 8]
ldr w1, [sp, 8]
cmp w2, w0
csel w0, w1, w0, ge
str w0, [sp, 52]
ldr x0, [sp, 64]
add x1, x0, 8
str x1, [sp, 64]
ldr d1, [x0]
ldr d0, [sp, 32]
fmul d1, d1, d0
ldr x0, [sp, 40]
ldr d0, [x0]
fadd d0, d1, d0
str d0, [sp, 72]
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 44]
mov w0, w1
lsl w0, w0, 4
sub w1, w0, w1
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w2, [x0, 48]
mov w0, 22
mul w0, w2, w0
add w2, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 84]
mov w0, w1
lsl w0, w0, 1
add w0, w0, w1
lsl w0, w0, 3
add w1, w2, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 96]
lsl w0, w0, 1
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 92]
lsl w0, w0, 1
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 100]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 104]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 52]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 56]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 112]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 76]
add w1, w1, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
ldr w0, [x0]
add w1, w1, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
str w1, [x0]
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 44]
lsl w1, w0, 1
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 80]
add w1, w1, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
ldr w0, [x0]
add w1, w1, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
str w1, [x0]
str wzr, [sp, 48]
b .L695
.L698:
ldrsw x0, [sp, 48]
add x0, x0, 1
lsl x0, x0, 3
ldr x1, [sp, 40]
add x1, x1, x0
ldrsw x0, [sp, 48]
lsl x0, x0, 3
ldr x2, [sp, 40]
add x0, x2, x0
ldr d0, [x1]
str d0, [x0]
ldr w0, [sp, 12]
sub w0, w0, #1
ldr w1, [sp, 48]
cmp w1, w0
bge .L696
ldr x0, [sp, 56]
add x1, x0, 8
str x1, [sp, 56]
ldr d1, [x0]
ldr d0, [sp, 72]
fmul d0, d1, d0
ldrsw x0, [sp, 48]
lsl x0, x0, 3
ldr x1, [sp, 40]
add x0, x1, x0
ldr d1, [x0]
ldrsw x0, [sp, 48]
lsl x0, x0, 3
ldr x1, [sp, 40]
add x0, x1, x0
fsub d0, d1, d0
str d0, [x0]
.L696:
ldr w0, [sp, 8]
sub w0, w0, #1
ldr w1, [sp, 48]
cmp w1, w0
bge .L697
ldr x0, [sp, 64]
add x1, x0, 8
str x1, [sp, 64]
ldr d1, [x0]
ldr d0, [sp, 32]
fmul d1, d1, d0
ldrsw x0, [sp, 48]
lsl x0, x0, 3
ldr x1, [sp, 40]
add x0, x1, x0
ldr d0, [x0]
ldrsw x0, [sp, 48]
lsl x0, x0, 3
ldr x1, [sp, 40]
add x0, x1, x0
fadd d0, d1, d0
str d0, [x0]
.L697:
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 84]
mov w0, 70
mul w2, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 48]
mov w0, w1
lsl w0, w0, 6
add w0, w0, w1
add w2, w2, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 60]
mov w0, w1
lsl w0, w0, 1
add w0, w0, w1
lsl w0, w0, 2
add w2, w2, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 64]
mov w0, w1
lsl w0, w0, 1
add w0, w0, w1
lsl w0, w0, 2
add w2, w2, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 44]
mov w0, w1
lsl w0, w0, 4
sub w0, w0, w1
add w2, w2, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 68]
mov w0, w1
lsl w0, w0, 1
add w0, w0, w1
lsl w0, w0, 1
add w2, w2, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 72]
mov w0, w1
lsl w0, w0, 1
add w0, w0, w1
lsl w0, w0, 1
add w1, w2, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 76]
lsl w0, w0, 1
add w2, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 104]
mov w0, w1
lsl w0, w0, 1
add w0, w0, w1
add w2, w2, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 100]
mov w0, w1
lsl w0, w0, 1
add w0, w0, w1
add w2, w2, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 92]
mov w0, w1
lsl w0, w0, 2
add w0, w0, w1
add w1, w2, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 96]
lsl w0, w0, 2
add w2, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 52]
mov w0, w1
lsl w0, w0, 2
add w0, w0, w1
add w2, w2, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 80]
mov w0, w1
lsl w0, w0, 1
add w0, w0, w1
add w1, w2, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 128]
lsl w0, w0, 1
add w2, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 124]
mov w0, w1
lsl w0, w0, 1
add w0, w0, w1
add w1, w2, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 56]
lsl w0, w0, 1
add w2, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 88]
mov w0, w1
lsl w0, w0, 1
add w0, w0, w1
add w1, w2, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 112]
add w1, w1, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
ldr w0, [x0]
add w1, w1, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
str w1, [x0]
ldr w0, [sp, 48]
add w0, w0, 1
str w0, [sp, 48]
.L695:
ldr w0, [sp, 52]
sub w0, w0, #1
ldr w1, [sp, 48]
cmp w1, w0
blt .L698
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 48]
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 84]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 116]
lsl w0, w0, 1
add w0, w1, w0
lsl w2, w0, 2
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 40]
mov w0, w1
lsl w0, w0, 1
add w0, w0, w1
add w1, w2, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 28]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 36]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 76]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 120]
add w1, w1, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
ldr w0, [x0]
add w1, w1, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
str w1, [x0]
ldr d0, [sp, 72]
add sp, sp, 80
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE109:
.size generic_timing_double_transposed_direct_form_2, .-generic_timing_double_transposed_direct_form_2
.align 2
.global double_direct_form_1_impl2
.type double_direct_form_1_impl2, %function
double_direct_form_1_impl2:
.LFB110:
.cfi_startproc
stp x29, x30, [sp, -96]!
.cfi_def_cfa_offset 96
.cfi_offset 29, -96
.cfi_offset 30, -88
mov x29, sp
.cfi_def_cfa_register 29
sub sp, sp, #16
str x0, [x29, 56]
str w1, [x29, 52]
str x2, [x29, 40]
str w3, [x29, 48]
str x4, [x29, 32]
str w5, [x29, 28]
str x6, [x29, 16]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [x29, 88]
mov x1, 0
mov x0, sp
mov x2, x0
str wzr, [x29, 64]
str wzr, [x29, 68]
ldr w0, [x29, 52]
sxtw x1, w0
sub x1, x1, #1
str x1, [x29, 72]
sxtw x1, w0
mov x14, x1
mov x15, 0
lsr x1, x14, 58
lsl x11, x15, 6
orr x11, x1, x11
lsl x10, x14, 6
sxtw x1, w0
mov x12, x1
mov x13, 0
lsr x1, x12, 58
lsl x9, x13, 6
orr x9, x1, x9
lsl x8, x12, 6
sxtw x0, w0
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L701:
cmp sp, x1
beq .L702
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L701
.L702:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L703
str xzr, [sp, 1024]
.L703:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 80]
str wzr, [x29, 64]
b .L704
.L709:
ldr x0, [x29, 80]
ldrsw x1, [x29, 64]
str xzr, [x0, x1, lsl 3]
str wzr, [x29, 68]
b .L705
.L708:
ldr w1, [x29, 68]
ldr w0, [x29, 64]
cmp w1, w0
bgt .L717
ldr x0, [x29, 80]
ldrsw x1, [x29, 64]
ldr d1, [x0, x1, lsl 3]
ldr w1, [x29, 64]
ldr w0, [x29, 68]
sub w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [x29, 56]
add x0, x1, x0
ldr d2, [x0]
ldrsw x0, [x29, 68]
lsl x0, x0, 3
ldr x1, [x29, 40]
add x0, x1, x0
ldr d0, [x0]
fmul d0, d2, d0
fadd d0, d1, d0
ldr x0, [x29, 80]
ldrsw x1, [x29, 64]
str d0, [x0, x1, lsl 3]
ldr w0, [x29, 68]
add w0, w0, 1
str w0, [x29, 68]
.L705:
ldr w1, [x29, 68]
ldr w0, [x29, 48]
cmp w1, w0
blt .L708
b .L707
.L717:
nop
.L707:
ldr w0, [x29, 64]
add w0, w0, 1
str w0, [x29, 64]
.L704:
ldr w1, [x29, 64]
ldr w0, [x29, 52]
cmp w1, w0
blt .L709
ldr x0, [x29, 80]
ldr d0, [x0]
ldr x0, [x29, 16]
str d0, [x0]
mov w0, 1
str w0, [x29, 64]
b .L710
.L715:
ldrsw x0, [x29, 64]
lsl x0, x0, 3
ldr x1, [x29, 16]
add x0, x1, x0
str xzr, [x0]
ldrsw x0, [x29, 64]
lsl x0, x0, 3
ldr x1, [x29, 16]
add x0, x1, x0
ldr d1, [x0]
ldr x0, [x29, 80]
ldrsw x1, [x29, 64]
ldr d0, [x0, x1, lsl 3]
ldrsw x0, [x29, 64]
lsl x0, x0, 3
ldr x1, [x29, 16]
add x0, x1, x0
fadd d0, d1, d0
str d0, [x0]
mov w0, 1
str w0, [x29, 68]
b .L711
.L714:
ldr w1, [x29, 68]
ldr w0, [x29, 64]
cmp w1, w0
bgt .L718
ldrsw x0, [x29, 64]
lsl x0, x0, 3
ldr x1, [x29, 16]
add x0, x1, x0
ldr d1, [x0]
ldr w1, [x29, 64]
ldr w0, [x29, 68]
sub w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [x29, 16]
add x0, x1, x0
ldr d2, [x0]
ldrsw x0, [x29, 68]
lsl x0, x0, 3
ldr x1, [x29, 32]
add x0, x1, x0
ldr d0, [x0]
fneg d0, d0
fmul d0, d2, d0
ldrsw x0, [x29, 64]
lsl x0, x0, 3
ldr x1, [x29, 16]
add x0, x1, x0
fadd d0, d1, d0
str d0, [x0]
ldr w0, [x29, 68]
add w0, w0, 1
str w0, [x29, 68]
.L711:
ldr w1, [x29, 68]
ldr w0, [x29, 28]
cmp w1, w0
blt .L714
b .L713
.L718:
nop
.L713:
ldr w0, [x29, 64]
add w0, w0, 1
str w0, [x29, 64]
.L710:
ldr w1, [x29, 64]
ldr w0, [x29, 52]
cmp w1, w0
blt .L715
mov sp, x2
nop
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [x29, 88]
ldr x1, [x0]
subs x2, x2, x1
mov x1, 0
beq .L716
bl __stack_chk_fail
.L716:
mov sp, x29
ldp x29, x30, [sp], 96
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa 31, 0
ret
.cfi_endproc
.LFE110:
.size double_direct_form_1_impl2, .-double_direct_form_1_impl2
.align 2
.global fxp_direct_form_1_impl2
.type fxp_direct_form_1_impl2, %function
fxp_direct_form_1_impl2:
.LFB111:
.cfi_startproc
stp x29, x30, [sp, -128]!
.cfi_def_cfa_offset 128
.cfi_offset 29, -128
.cfi_offset 30, -120
mov x29, sp
.cfi_def_cfa_register 29
stp x19, x20, [sp, 16]
str x21, [sp, 32]
sub sp, sp, #16
.cfi_offset 19, -112
.cfi_offset 20, -104
.cfi_offset 21, -96
str x0, [x29, 88]
str w1, [x29, 84]
str x2, [x29, 72]
str w3, [x29, 80]
str x4, [x29, 64]
str w5, [x29, 60]
str x6, [x29, 48]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [x29, 120]
mov x1, 0
mov x0, sp
mov x21, x0
str wzr, [x29, 96]
str wzr, [x29, 100]
ldr w0, [x29, 84]
sxtw x1, w0
sub x1, x1, #1
str x1, [x29, 104]
sxtw x1, w0
mov x14, x1
mov x15, 0
lsr x1, x14, 58
lsl x11, x15, 6
orr x11, x1, x11
lsl x10, x14, 6
sxtw x1, w0
mov x12, x1
mov x13, 0
lsr x1, x12, 58
lsl x9, x13, 6
orr x9, x1, x9
lsl x8, x12, 6
sxtw x0, w0
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L720:
cmp sp, x1
beq .L721
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L720
.L721:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L722
str xzr, [sp, 1024]
.L722:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 112]
str wzr, [x29, 96]
b .L723
.L728:
ldr x0, [x29, 112]
ldrsw x1, [x29, 96]
str xzr, [x0, x1, lsl 3]
str wzr, [x29, 100]
b .L724
.L727:
ldr w1, [x29, 100]
ldr w0, [x29, 96]
cmp w1, w0
bgt .L736
ldr x0, [x29, 112]
ldrsw x1, [x29, 96]
ldr x19, [x0, x1, lsl 3]
ldr w1, [x29, 96]
ldr w0, [x29, 100]
sub w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [x29, 88]
add x0, x1, x0
ldr x2, [x0]
ldrsw x0, [x29, 100]
lsl x0, x0, 3
ldr x1, [x29, 72]
add x0, x1, x0
ldr x0, [x0]
mov x1, x0
mov x0, x2
bl fxp_mult
mov x1, x0
mov x0, x19
bl fxp_add
mov x2, x0
ldr x0, [x29, 112]
ldrsw x1, [x29, 96]
str x2, [x0, x1, lsl 3]
ldr w0, [x29, 100]
add w0, w0, 1
str w0, [x29, 100]
.L724:
ldr w1, [x29, 100]
ldr w0, [x29, 80]
cmp w1, w0
blt .L727
b .L726
.L736:
nop
.L726:
ldr w0, [x29, 96]
add w0, w0, 1
str w0, [x29, 96]
.L723:
ldr w1, [x29, 96]
ldr w0, [x29, 84]
cmp w1, w0
blt .L728
ldr x0, [x29, 112]
ldr x1, [x0]
ldr x0, [x29, 48]
str x1, [x0]
mov w0, 1
str w0, [x29, 96]
b .L729
.L734:
ldrsw x0, [x29, 96]
lsl x0, x0, 3
ldr x1, [x29, 48]
add x0, x1, x0
str xzr, [x0]
ldrsw x0, [x29, 96]
lsl x0, x0, 3
ldr x1, [x29, 48]
add x0, x1, x0
ldr x2, [x0]
ldr x0, [x29, 112]
ldrsw x1, [x29, 96]
ldr x3, [x0, x1, lsl 3]
ldrsw x0, [x29, 96]
lsl x0, x0, 3
ldr x1, [x29, 48]
add x19, x1, x0
mov x1, x3
mov x0, x2
bl fxp_add
str x0, [x19]
mov w0, 1
str w0, [x29, 100]
b .L730
.L733:
ldr w1, [x29, 100]
ldr w0, [x29, 96]
cmp w1, w0
bgt .L737
ldrsw x0, [x29, 96]
lsl x0, x0, 3
ldr x1, [x29, 48]
add x0, x1, x0
ldr x20, [x0]
ldr w1, [x29, 96]
ldr w0, [x29, 100]
sub w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [x29, 48]
add x0, x1, x0
ldr x2, [x0]
ldrsw x0, [x29, 100]
lsl x0, x0, 3
ldr x1, [x29, 64]
add x0, x1, x0
ldr x0, [x0]
neg x0, x0
mov x1, x0
mov x0, x2
bl fxp_mult
mov x2, x0
ldrsw x0, [x29, 96]
lsl x0, x0, 3
ldr x1, [x29, 48]
add x19, x1, x0
mov x1, x2
mov x0, x20
bl fxp_add
str x0, [x19]
ldr w0, [x29, 100]
add w0, w0, 1
str w0, [x29, 100]
.L730:
ldr w1, [x29, 100]
ldr w0, [x29, 60]
cmp w1, w0
blt .L733
b .L732
.L737:
nop
.L732:
ldr w0, [x29, 96]
add w0, w0, 1
str w0, [x29, 96]
.L729:
ldr w1, [x29, 96]
ldr w0, [x29, 84]
cmp w1, w0
blt .L734
mov sp, x21
nop
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [x29, 120]
ldr x1, [x0]
subs x2, x2, x1
mov x1, 0
beq .L735
bl __stack_chk_fail
.L735:
mov sp, x29
ldp x19, x20, [sp, 16]
ldr x21, [sp, 32]
ldp x29, x30, [sp], 128
.cfi_restore 30
.cfi_restore 29
.cfi_restore 21
.cfi_restore 19
.cfi_restore 20
.cfi_def_cfa 31, 0
ret
.cfi_endproc
.LFE111:
.size fxp_direct_form_1_impl2, .-fxp_direct_form_1_impl2
.align 2
.global nchoosek
.type nchoosek, %function
nchoosek:
.LFB112:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str w0, [sp, 28]
str w1, [sp, 24]
ldr w0, [sp, 24]
cmp w0, 0
bne .L739
mov w0, 1
b .L740
.L739:
ldr w0, [sp, 28]
sub w2, w0, #1
ldr w0, [sp, 24]
sub w0, w0, #1
mov w1, w0
mov w0, w2
bl nchoosek
mov w1, w0
ldr w0, [sp, 28]
mul w1, w1, w0
ldr w0, [sp, 24]
sdiv w0, w1, w0
.L740:
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE112:
.size nchoosek, .-nchoosek
.align 2
.global generate_delta_coefficients
.type generate_delta_coefficients, %function
generate_delta_coefficients:
.LFB113:
.cfi_startproc
stp x29, x30, [sp, -96]!
.cfi_def_cfa_offset 96
.cfi_offset 29, -96
.cfi_offset 30, -88
mov x29, sp
str d8, [sp, 16]
.cfi_offset 72, -80
str x0, [sp, 56]
str x1, [sp, 48]
str w2, [sp, 44]
str d0, [sp, 32]
ldr w0, [sp, 44]
sub w0, w0, #1
str w0, [sp, 84]
str wzr, [sp, 76]
b .L742
.L745:
str xzr, [sp, 88]
str wzr, [sp, 80]
b .L743
.L744:
ldrsw x0, [sp, 80]
lsl x0, x0, 3
ldr x1, [sp, 56]
add x0, x1, x0
ldr d8, [x0]
ldr w1, [sp, 84]
ldr w0, [sp, 80]
sub w2, w1, w0
ldr w1, [sp, 76]
ldr w0, [sp, 80]
sub w0, w1, w0
mov w1, w0
mov w0, w2
bl nchoosek
scvtf d0, w0
fmul d0, d8, d0
ldr d1, [sp, 88]
fadd d0, d1, d0
str d0, [sp, 88]
ldr w0, [sp, 80]
add w0, w0, 1
str w0, [sp, 80]
.L743:
ldr w1, [sp, 80]
ldr w0, [sp, 76]
cmp w1, w0
ble .L744
ldr w1, [sp, 84]
ldr w0, [sp, 76]
sub w0, w1, w0
scvtf d0, w0
fmov d1, d0
ldr d0, [sp, 32]
bl internal_pow
fmov d1, d0
ldrsw x0, [sp, 76]
lsl x0, x0, 3
ldr x1, [sp, 48]
add x0, x1, x0
ldr d0, [sp, 88]
fmul d0, d1, d0
str d0, [x0]
ldr w0, [sp, 76]
add w0, w0, 1
str w0, [sp, 76]
.L742:
ldr w1, [sp, 76]
ldr w0, [sp, 84]
cmp w1, w0
ble .L745
nop
nop
ldr d8, [sp, 16]
ldp x29, x30, [sp], 96
.cfi_restore 30
.cfi_restore 29
.cfi_restore 72
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE113:
.size generate_delta_coefficients, .-generate_delta_coefficients
.align 2
.global get_delta_transfer_function
.type get_delta_transfer_function, %function
get_delta_transfer_function:
.LFB114:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str x0, [sp, 56]
str x1, [sp, 48]
str w2, [sp, 44]
str x3, [sp, 32]
str x4, [sp, 24]
str w5, [sp, 40]
str d0, [sp, 16]
ldr d0, [sp, 16]
ldr w2, [sp, 44]
ldr x1, [sp, 48]
ldr x0, [sp, 56]
bl generate_delta_coefficients
ldr d0, [sp, 16]
ldr w2, [sp, 40]
ldr x1, [sp, 24]
ldr x0, [sp, 32]
bl generate_delta_coefficients
nop
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE114:
.size get_delta_transfer_function, .-get_delta_transfer_function
.align 2
.global get_delta_transfer_function_with_base
.type get_delta_transfer_function_with_base, %function
get_delta_transfer_function_with_base:
.LFB115:
.cfi_startproc
stp x29, x30, [sp, -112]!
.cfi_def_cfa_offset 112
.cfi_offset 29, -112
.cfi_offset 30, -104
mov x29, sp
str d8, [sp, 16]
.cfi_offset 72, -96
str x0, [sp, 72]
str x1, [sp, 64]
str w2, [sp, 60]
str x3, [sp, 48]
str x4, [sp, 40]
str w5, [sp, 56]
str d0, [sp, 32]
ldr w0, [sp, 56]
sub w0, w0, #1
str w0, [sp, 96]
ldr w0, [sp, 60]
sub w0, w0, #1
str w0, [sp, 100]
str wzr, [sp, 88]
b .L748
.L751:
str xzr, [sp, 104]
str wzr, [sp, 92]
b .L749
.L750:
ldrsw x0, [sp, 92]
lsl x0, x0, 3
ldr x1, [sp, 48]
add x0, x1, x0
ldr d8, [x0]
ldr w1, [sp, 96]
ldr w0, [sp, 92]
sub w2, w1, w0
ldr w1, [sp, 88]
ldr w0, [sp, 92]
sub w0, w1, w0
mov w1, w0
mov w0, w2
bl nchoosek
scvtf d0, w0
fmul d0, d8, d0
ldr d1, [sp, 104]
fadd d0, d1, d0
str d0, [sp, 104]
ldr w0, [sp, 92]
add w0, w0, 1
str w0, [sp, 92]
.L749:
ldr w1, [sp, 92]
ldr w0, [sp, 88]
cmp w1, w0
ble .L750
ldr w1, [sp, 96]
ldr w0, [sp, 88]
sub w0, w1, w0
scvtf d0, w0
fmov d1, d0
ldr d0, [sp, 32]
bl internal_pow
fmov d1, d0
ldrsw x0, [sp, 88]
lsl x0, x0, 3
ldr x1, [sp, 40]
add x0, x1, x0
ldr d0, [sp, 104]
fmul d0, d1, d0
str d0, [x0]
ldr w0, [sp, 88]
add w0, w0, 1
str w0, [sp, 88]
.L748:
ldr w1, [sp, 88]
ldr w0, [sp, 96]
cmp w1, w0
ble .L751
str wzr, [sp, 88]
b .L752
.L755:
str xzr, [sp, 104]
str wzr, [sp, 92]
b .L753
.L754:
ldrsw x0, [sp, 92]
lsl x0, x0, 3
ldr x1, [sp, 72]
add x0, x1, x0
ldr d8, [x0]
ldr w1, [sp, 100]
ldr w0, [sp, 92]
sub w2, w1, w0
ldr w1, [sp, 88]
ldr w0, [sp, 92]
sub w0, w1, w0
mov w1, w0
mov w0, w2
bl nchoosek
scvtf d0, w0
fmul d0, d8, d0
ldr d1, [sp, 104]
fadd d0, d1, d0
str d0, [sp, 104]
ldr w0, [sp, 92]
add w0, w0, 1
str w0, [sp, 92]
.L753:
ldr w1, [sp, 92]
ldr w0, [sp, 88]
cmp w1, w0
ble .L754
ldr w1, [sp, 100]
ldr w0, [sp, 88]
sub w0, w1, w0
scvtf d0, w0
fmov d1, d0
ldr d0, [sp, 32]
bl internal_pow
fmov d1, d0
ldrsw x0, [sp, 88]
lsl x0, x0, 3
ldr x1, [sp, 64]
add x0, x1, x0
ldr d0, [sp, 104]
fmul d0, d1, d0
str d0, [x0]
ldr w0, [sp, 88]
add w0, w0, 1
str w0, [sp, 88]
.L752:
ldr w1, [sp, 88]
ldr w0, [sp, 100]
cmp w1, w0
ble .L755
nop
nop
ldr d8, [sp, 16]
ldp x29, x30, [sp], 112
.cfi_restore 30
.cfi_restore 29
.cfi_restore 72
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE115:
.size get_delta_transfer_function_with_base, .-get_delta_transfer_function_with_base
.align 2
.global ft_closedloop_series
.type ft_closedloop_series, %function
ft_closedloop_series:
.LFB116:
.cfi_startproc
stp x29, x30, [sp, -128]!
.cfi_def_cfa_offset 128
.cfi_offset 29, -128
.cfi_offset 30, -120
mov x29, sp
.cfi_def_cfa_register 29
str x19, [sp, 16]
sub sp, sp, #16
.cfi_offset 19, -112
str x0, [x29, 88]
str w1, [x29, 84]
str x2, [x29, 72]
str w3, [x29, 80]
str x4, [x29, 64]
str w5, [x29, 60]
str x6, [x29, 48]
str w7, [x29, 56]
ldr x0, [x29, 128]
str x0, [x29, 40]
ldr x0, [x29, 144]
str x0, [x29, 32]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [x29, 120]
mov x1, 0
mov x0, sp
mov x19, x0
ldr w1, [x29, 84]
ldr w0, [x29, 60]
add w0, w1, w0
sub w0, w0, #1
str w0, [x29, 136]
ldr w1, [x29, 80]
ldr w0, [x29, 56]
add w0, w1, w0
sub w0, w0, #1
str w0, [x29, 152]
ldr w0, [x29, 152]
sxtw x1, w0
sub x1, x1, #1
str x1, [x29, 104]
sxtw x1, w0
mov x14, x1
mov x15, 0
lsr x1, x14, 58
lsl x11, x15, 6
orr x11, x1, x11
lsl x10, x14, 6
sxtw x1, w0
mov x12, x1
mov x13, 0
lsr x1, x12, 58
lsl x9, x13, 6
orr x9, x1, x9
lsl x8, x12, 6
sxtw x0, w0
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L757:
cmp sp, x1
beq .L758
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L757
.L758:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L759
str xzr, [sp, 1024]
.L759:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 112]
ldr w5, [x29, 136]
ldr x4, [x29, 40]
ldr w3, [x29, 60]
ldr x2, [x29, 64]
ldr w1, [x29, 84]
ldr x0, [x29, 88]
bl poly_mult
ldr w5, [x29, 152]
ldr x4, [x29, 112]
ldr w3, [x29, 56]
ldr x2, [x29, 48]
ldr w1, [x29, 80]
ldr x0, [x29, 72]
bl poly_mult
ldr w5, [x29, 152]
ldr x4, [x29, 32]
ldr w3, [x29, 152]
ldr x2, [x29, 112]
ldr w1, [x29, 136]
ldr x0, [x29, 40]
bl poly_sum
mov sp, x19
nop
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [x29, 120]
ldr x1, [x0]
subs x2, x2, x1
mov x1, 0
beq .L760
bl __stack_chk_fail
.L760:
mov sp, x29
ldr x19, [sp, 16]
ldp x29, x30, [sp], 128
.cfi_restore 30
.cfi_restore 29
.cfi_restore 19
.cfi_def_cfa 31, 0
ret
.cfi_endproc
.LFE116:
.size ft_closedloop_series, .-ft_closedloop_series
.align 2
.global ft_closedloop_sensitivity
.type ft_closedloop_sensitivity, %function
ft_closedloop_sensitivity:
.LFB117:
.cfi_startproc
stp x29, x30, [sp, -128]!
.cfi_def_cfa_offset 128
.cfi_offset 29, -128
.cfi_offset 30, -120
mov x29, sp
.cfi_def_cfa_register 29
str x19, [sp, 16]
sub sp, sp, #16
.cfi_offset 19, -112
str x0, [x29, 88]
str w1, [x29, 84]
str x2, [x29, 72]
str w3, [x29, 80]
str x4, [x29, 64]
str w5, [x29, 60]
str x6, [x29, 48]
str w7, [x29, 56]
ldr x0, [x29, 128]
str x0, [x29, 40]
ldr x0, [x29, 144]
str x0, [x29, 32]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [x29, 120]
mov x1, 0
mov x0, sp
mov x19, x0
ldr w1, [x29, 84]
ldr w0, [x29, 60]
add w0, w1, w0
sub w0, w0, #1
str w0, [x29, 100]
ldr w1, [x29, 80]
ldr w0, [x29, 56]
add w0, w1, w0
sub w0, w0, #1
str w0, [x29, 152]
ldr w1, [x29, 80]
ldr w0, [x29, 56]
add w0, w1, w0
sub w0, w0, #1
str w0, [x29, 136]
ldr w0, [x29, 100]
sxtw x1, w0
sub x1, x1, #1
str x1, [x29, 104]
sxtw x1, w0
mov x14, x1
mov x15, 0
lsr x1, x14, 58
lsl x11, x15, 6
orr x11, x1, x11
lsl x10, x14, 6
sxtw x1, w0
mov x12, x1
mov x13, 0
lsr x1, x12, 58
lsl x9, x13, 6
orr x9, x1, x9
lsl x8, x12, 6
sxtw x0, w0
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L762:
cmp sp, x1
beq .L763
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L762
.L763:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L764
str xzr, [sp, 1024]
.L764:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 112]
ldr w5, [x29, 136]
ldr x4, [x29, 40]
ldr w3, [x29, 56]
ldr x2, [x29, 48]
ldr w1, [x29, 80]
ldr x0, [x29, 72]
bl poly_mult
ldr w5, [x29, 100]
ldr x4, [x29, 112]
ldr w3, [x29, 60]
ldr x2, [x29, 64]
ldr w1, [x29, 84]
ldr x0, [x29, 88]
bl poly_mult
ldr w5, [x29, 152]
ldr x4, [x29, 32]
ldr w3, [x29, 100]
ldr x2, [x29, 112]
ldr w1, [x29, 136]
ldr x0, [x29, 40]
bl poly_sum
mov sp, x19
nop
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [x29, 120]
ldr x1, [x0]
subs x2, x2, x1
mov x1, 0
beq .L765
bl __stack_chk_fail
.L765:
mov sp, x29
ldr x19, [sp, 16]
ldp x29, x30, [sp], 128
.cfi_restore 30
.cfi_restore 29
.cfi_restore 19
.cfi_def_cfa 31, 0
ret
.cfi_endproc
.LFE117:
.size ft_closedloop_sensitivity, .-ft_closedloop_sensitivity
.align 2
.global ft_closedloop_feedback
.type ft_closedloop_feedback, %function
ft_closedloop_feedback:
.LFB118:
.cfi_startproc
stp x29, x30, [sp, -176]!
.cfi_def_cfa_offset 176
.cfi_offset 29, -176
.cfi_offset 30, -168
mov x29, sp
.cfi_def_cfa_register 29
stp x19, x20, [sp, 16]
stp x21, x22, [sp, 32]
stp x23, x24, [sp, 48]
sub sp, sp, #16
.cfi_offset 19, -160
.cfi_offset 20, -152
.cfi_offset 21, -144
.cfi_offset 22, -136
.cfi_offset 23, -128
.cfi_offset 24, -120
str x0, [x29, 120]
str w1, [x29, 116]
str x2, [x29, 104]
str w3, [x29, 112]
str x4, [x29, 96]
str w5, [x29, 92]
str x6, [x29, 80]
str w7, [x29, 88]
ldr x0, [x29, 176]
str x0, [x29, 72]
ldr x0, [x29, 192]
str x0, [x29, 64]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [x29, 168]
mov x1, 0
mov x0, sp
mov x24, x0
ldr w1, [x29, 112]
ldr w0, [x29, 92]
add w0, w1, w0
sub w0, w0, #1
str w0, [x29, 184]
ldr w1, [x29, 112]
ldr w0, [x29, 88]
add w0, w1, w0
sub w0, w0, #1
str w0, [x29, 200]
ldr w1, [x29, 116]
ldr w0, [x29, 92]
add w0, w1, w0
sub w0, w0, #1
str w0, [x29, 132]
ldr w0, [x29, 200]
sxtw x1, w0
sub x1, x1, #1
str x1, [x29, 136]
sxtw x1, w0
mov x22, x1
mov x23, 0
lsr x1, x22, 58
lsl x15, x23, 6
orr x15, x1, x15
lsl x14, x22, 6
sxtw x1, w0
mov x20, x1
mov x21, 0
lsr x1, x20, 58
lsl x13, x21, 6
orr x13, x1, x13
lsl x12, x20, 6
sxtw x0, w0
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L767:
cmp sp, x1
beq .L768
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L767
.L768:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L769
str xzr, [sp, 1024]
.L769:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 144]
ldr w0, [x29, 132]
sxtw x1, w0
sub x1, x1, #1
str x1, [x29, 152]
sxtw x1, w0
mov x18, x1
mov x19, 0
lsr x1, x18, 58
lsl x11, x19, 6
orr x11, x1, x11
lsl x10, x18, 6
sxtw x1, w0
mov x16, x1
mov x17, 0
lsr x1, x16, 58
lsl x9, x17, 6
orr x9, x1, x9
lsl x8, x16, 6
sxtw x0, w0
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L770:
cmp sp, x1
beq .L771
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L770
.L771:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L772
str xzr, [sp, 1024]
.L772:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 160]
ldr w5, [x29, 132]
ldr x4, [x29, 160]
ldr w3, [x29, 92]
ldr x2, [x29, 96]
ldr w1, [x29, 116]
ldr x0, [x29, 120]
bl poly_mult
ldr w5, [x29, 200]
ldr x4, [x29, 144]
ldr w3, [x29, 88]
ldr x2, [x29, 80]
ldr w1, [x29, 112]
ldr x0, [x29, 104]
bl poly_mult
ldr w5, [x29, 200]
ldr x4, [x29, 64]
ldr w3, [x29, 200]
ldr x2, [x29, 144]
ldr w1, [x29, 132]
ldr x0, [x29, 160]
bl poly_sum
ldr w5, [x29, 184]
ldr x4, [x29, 72]
ldr w3, [x29, 92]
ldr x2, [x29, 96]
ldr w1, [x29, 112]
ldr x0, [x29, 104]
bl poly_mult
mov sp, x24
nop
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [x29, 168]
ldr x1, [x0]
subs x2, x2, x1
mov x1, 0
beq .L773
bl __stack_chk_fail
.L773:
mov sp, x29
ldp x19, x20, [sp, 16]
ldp x21, x22, [sp, 32]
ldp x23, x24, [sp, 48]
ldp x29, x30, [sp], 176
.cfi_restore 30
.cfi_restore 29
.cfi_restore 23
.cfi_restore 24
.cfi_restore 21
.cfi_restore 22
.cfi_restore 19
.cfi_restore 20
.cfi_def_cfa 31, 0
ret
.cfi_endproc
.LFE118:
.size ft_closedloop_feedback, .-ft_closedloop_feedback
.align 2
.global check_stability_closedloop
.type check_stability_closedloop, %function
check_stability_closedloop:
.LFB119:
.cfi_startproc
stp x29, x30, [sp, -224]!
.cfi_def_cfa_offset 224
.cfi_offset 29, -224
.cfi_offset 30, -216
mov x29, sp
.cfi_def_cfa_register 29
stp x19, x20, [sp, 16]
stp x21, x22, [sp, 32]
stp x23, x24, [sp, 48]
stp x25, x26, [sp, 64]
str d8, [sp, 80]
sub sp, sp, #16
.cfi_offset 19, -208
.cfi_offset 20, -200
.cfi_offset 21, -192
.cfi_offset 22, -184
.cfi_offset 23, -176
.cfi_offset 24, -168
.cfi_offset 25, -160
.cfi_offset 26, -152
.cfi_offset 72, -144
str x0, [x29, 136]
str w1, [x29, 132]
str x2, [x29, 120]
str w3, [x29, 128]
str x4, [x29, 112]
str w5, [x29, 108]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [x29, 216]
mov x1, 0
mov x0, sp
mov x26, x0
ldr w0, [x29, 132]
str w0, [x29, 148]
ldr w1, [x29, 132]
ldr w0, [x29, 132]
lsl w0, w0, 1
sub w2, w0, #1
sxtw x0, w1
sub x0, x0, #1
str x0, [x29, 176]
sxtw x0, w1
mov x24, x0
mov x25, 0
lsr x0, x24, 58
lsl x19, x25, 6
orr x19, x0, x19
lsl x18, x24, 6
sxtw x0, w1
lsl x19, x0, 3
sxtw x0, w2
sub x0, x0, #1
str x0, [x29, 184]
sxtw x0, w1
mov x12, x0
mov x13, 0
sxtw x0, w2
mov x10, x0
mov x11, 0
mul x3, x12, x10
umulh x0, x12, x10
madd x0, x13, x10, x0
madd x0, x12, x11, x0
mov x22, x3
mov x23, x0
lsr x0, x22, 58
lsl x17, x23, 6
orr x17, x0, x17
lsl x16, x22, 6
sxtw x0, w1
mov x8, x0
mov x9, 0
sxtw x0, w2
mov x6, x0
mov x7, 0
mul x3, x8, x6
umulh x0, x8, x6
madd x0, x9, x6, x0
madd x0, x8, x7, x0
mov x20, x3
mov x21, x0
lsr x0, x20, 58
lsl x15, x21, 6
orr x15, x0, x15
lsl x14, x20, 6
sxtw x1, w1
sxtw x0, w2
mul x0, x1, x0
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L775:
cmp sp, x1
beq .L776
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L775
.L776:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L777
str xzr, [sp, 1024]
.L777:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 192]
str wzr, [x29, 164]
ldr x0, [x29, 120]
str x0, [x29, 200]
ldr x0, [x29, 112]
str x0, [x29, 208]
str xzr, [x29, 168]
str wzr, [x29, 152]
b .L778
.L779:
ldrsw x0, [x29, 152]
lsl x0, x0, 3
ldr x1, [x29, 136]
add x0, x1, x0
ldr d0, [x0]
ldr d1, [x29, 168]
fadd d0, d1, d0
str d0, [x29, 168]
ldr w0, [x29, 152]
add w0, w0, 1
str w0, [x29, 152]
.L778:
ldr w1, [x29, 152]
ldr w0, [x29, 132]
cmp w1, w0
blt .L779
ldr d0, [x29, 168]
fcmpe d0, #0.0
cset w0, gt
and w0, w0, 255
bl __DSVERIFIER_assert
str xzr, [x29, 168]
str wzr, [x29, 152]
b .L780
.L781:
ldrsw x0, [x29, 152]
lsl x0, x0, 3
ldr x1, [x29, 136]
add x0, x1, x0
ldr d8, [x0]
ldr w0, [x29, 132]
sub w1, w0, #1
ldr w0, [x29, 152]
sub w0, w1, w0
scvtf d0, w0
fmov d1, d0
fmov d0, -1.0e+0
bl internal_pow
fmul d0, d8, d0
ldr d1, [x29, 168]
fadd d0, d1, d0
str d0, [x29, 168]
ldr w0, [x29, 152]
add w0, w0, 1
str w0, [x29, 152]
.L780:
ldr w1, [x29, 152]
ldr w0, [x29, 132]
cmp w1, w0
blt .L781
ldr w0, [x29, 132]
sub w0, w0, #1
scvtf d0, w0
fmov d1, d0
fmov d0, -1.0e+0
bl internal_pow
fmov d1, d0
ldr d0, [x29, 168]
fmul d0, d0, d1
str d0, [x29, 168]
ldr d0, [x29, 168]
fcmpe d0, #0.0
cset w0, gt
and w0, w0, 255
bl __DSVERIFIER_assert
ldrsw x0, [x29, 132]
lsl x0, x0, 3
sub x0, x0, #8
ldr x1, [x29, 136]
add x0, x1, x0
ldr d0, [x0]
bl internal_abs
fmov d1, d0
ldr x0, [x29, 136]
ldr d0, [x0]
fcmpe d1, d0
cset w0, mi
and w0, w0, 255
bl __DSVERIFIER_assert
str wzr, [x29, 152]
b .L782
.L794:
str wzr, [x29, 156]
b .L783
.L793:
lsr x1, x19, 3
ldr x0, [x29, 192]
ldrsw x2, [x29, 156]
ldrsw x3, [x29, 152]
mul x1, x3, x1
add x1, x2, x1
str xzr, [x0, x1, lsl 3]
ldr w0, [x29, 152]
cmp w0, 0
bne .L784
ldrsw x0, [x29, 156]
lsl x0, x0, 3
ldr x1, [x29, 136]
add x0, x1, x0
lsr x1, x19, 3
ldr d0, [x0]
ldr x0, [x29, 192]
ldrsw x2, [x29, 156]
ldrsw x3, [x29, 152]
mul x1, x3, x1
add x1, x2, x1
str d0, [x0, x1, lsl 3]
b .L785
.L784:
ldr w0, [x29, 152]
and w0, w0, 1
cmp w0, 0
beq .L786
str wzr, [x29, 160]
b .L787
.L788:
lsr x2, x19, 3
ldr w0, [x29, 152]
sub w4, w0, #1
ldr w1, [x29, 148]
ldr w0, [x29, 160]
sub w0, w1, w0
sub w3, w0, #1
lsr x1, x19, 3
ldr x0, [x29, 192]
sxtw x3, w3
sxtw x4, w4
mul x2, x4, x2
add x2, x3, x2
ldr d0, [x0, x2, lsl 3]
ldr x0, [x29, 192]
ldrsw x2, [x29, 160]
ldrsw x3, [x29, 152]
mul x1, x3, x1
add x1, x2, x1
str d0, [x0, x1, lsl 3]
ldr w0, [x29, 160]
add w0, w0, 1
str w0, [x29, 160]
.L787:
ldr w1, [x29, 160]
ldr w0, [x29, 148]
cmp w1, w0
blt .L788
ldr w0, [x29, 148]
sub w0, w0, #1
str w0, [x29, 148]
ldr w0, [x29, 148]
str w0, [x29, 156]
b .L785
.L786:
lsr x1, x19, 3
ldr w0, [x29, 152]
sub w2, w0, #2
ldr x0, [x29, 192]
sxtw x2, w2
mul x1, x2, x1
ldr d0, [x0, x1, lsl 3]
fcmpe d0, #0.0
cset w0, gt
and w0, w0, 255
bl __DSVERIFIER_assert
lsr x1, x19, 3
ldr w0, [x29, 152]
sub w3, w0, #2
ldr x0, [x29, 192]
ldrsw x2, [x29, 156]
sxtw x3, w3
mul x1, x3, x1
add x1, x2, x1
ldr d1, [x0, x1, lsl 3]
lsr x1, x19, 3
ldr w0, [x29, 152]
sub w3, w0, #2
ldr x0, [x29, 192]
ldrsw x2, [x29, 148]
sxtw x3, w3
mul x1, x3, x1
add x1, x2, x1
ldr d2, [x0, x1, lsl 3]
lsr x1, x19, 3
ldr w0, [x29, 152]
sub w2, w0, #2
ldr x0, [x29, 192]
sxtw x2, w2
mul x1, x2, x1
ldr d0, [x0, x1, lsl 3]
fdiv d2, d2, d0
lsr x1, x19, 3
ldr w0, [x29, 152]
sub w3, w0, #1
ldr x0, [x29, 192]
ldrsw x2, [x29, 156]
sxtw x3, w3
mul x1, x3, x1
add x1, x2, x1
ldr d0, [x0, x1, lsl 3]
fmul d0, d2, d0
lsr x1, x19, 3
fsub d0, d1, d0
ldr x0, [x29, 192]
ldrsw x2, [x29, 156]
ldrsw x3, [x29, 152]
mul x1, x3, x1
add x1, x2, x1
str d0, [x0, x1, lsl 3]
ldr x0, [x29, 192]
ldr d0, [x0]
fcmpe d0, #0.0
bge .L797
b .L789
.L797:
lsr x1, x19, 3
ldr x0, [x29, 192]
ldrsw x2, [x29, 152]
mul x1, x2, x1
ldr d0, [x0, x1, lsl 3]
fcmpe d0, #0.0
bge .L798
b .L789
.L798:
mov w0, 1
b .L792
.L789:
mov w0, 0
.L792:
and w0, w0, 1
and w0, w0, 255
bl __DSVERIFIER_assert
.L785:
ldr w0, [x29, 156]
add w0, w0, 1
str w0, [x29, 156]
.L783:
ldr w1, [x29, 156]
ldr w0, [x29, 148]
cmp w1, w0
blt .L793
ldr w0, [x29, 152]
add w0, w0, 1
str w0, [x29, 152]
.L782:
ldr w0, [x29, 132]
lsl w0, w0, 1
sub w0, w0, #1
ldr w1, [x29, 152]
cmp w1, w0
blt .L794
mov w0, 1
mov sp, x26
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [x29, 216]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L796
bl __stack_chk_fail
.L796:
mov w0, w1
mov sp, x29
ldr d8, [sp, 80]
ldp x19, x20, [sp, 16]
ldp x21, x22, [sp, 32]
ldp x23, x24, [sp, 48]
ldp x25, x26, [sp, 64]
ldp x29, x30, [sp], 224
.cfi_restore 30
.cfi_restore 29
.cfi_restore 25
.cfi_restore 26
.cfi_restore 23
.cfi_restore 24
.cfi_restore 21
.cfi_restore 22
.cfi_restore 19
.cfi_restore 20
.cfi_restore 72
.cfi_def_cfa 31, 0
ret
.cfi_endproc
.LFE119:
.size check_stability_closedloop, .-check_stability_closedloop
.section .rodata
.align 3
.LC34:
.string "impl.frac_bits must be less than word width!"
.align 3
.LC35:
.string "impl.int_bits must be less than word width subtracted by precision!"
.align 3
.LC36:
.string "/home/yashchopda/Desktop/dsverifier-v2.0.3-esbmc-v4.0-cbmc-5.6/bmc/core/initialization.h"
.align 3
.LC37:
.string "0"
.text
.align 2
.global initialization
.type initialization, %function
initialization:
.LFB120:
.cfi_startproc
stp x29, x30, [sp, -16]!
.cfi_def_cfa_offset 16
.cfi_offset 29, -16
.cfi_offset 30, -8
mov x29, sp
adrp x0, impl
add x0, x0, :lo12:impl
ldr w0, [x0, 4]
cmp w0, 31
ble .L800
adrp x0, .LC34
add x0, x0, :lo12:.LC34
bl puts
.L800:
adrp x0, impl
add x0, x0, :lo12:impl
ldr w1, [x0]
adrp x0, impl
add x0, x0, :lo12:impl
ldr w0, [x0, 4]
mov w2, 32
sub w0, w2, w0
cmp w1, w0
blt .L801
adrp x0, .LC35
add x0, x0, :lo12:.LC35
bl puts
adrp x0, __PRETTY_FUNCTION__.9
add x3, x0, :lo12:__PRETTY_FUNCTION__.9
mov w2, 33
adrp x0, .LC36
add x1, x0, :lo12:.LC36
adrp x0, .LC37
add x0, x0, :lo12:.LC37
bl __assert_fail
.L801:
adrp x0, impl
add x0, x0, :lo12:impl
ldr w0, [x0, 4]
cmp w0, 30
ble .L802
adrp x0, _fxp_one
add x0, x0, :lo12:_fxp_one
mov x1, 2147483647
str x1, [x0]
b .L803
.L802:
adrp x0, impl
add x0, x0, :lo12:impl
ldr w0, [x0, 4]
mov w1, 1
lsl w0, w1, w0
sxtw x1, w0
adrp x0, _fxp_one
add x0, x0, :lo12:_fxp_one
str x1, [x0]
.L803:
adrp x0, impl
add x0, x0, :lo12:impl
ldr w0, [x0, 4]
sub w0, w0, #1
mov w1, 1
lsl w0, w1, w0
sxtw x1, w0
adrp x0, _fxp_half
add x0, x0, :lo12:_fxp_half
str x1, [x0]
adrp x0, impl
add x0, x0, :lo12:impl
ldr w0, [x0, 4]
mov w1, 1
lsl w0, w1, w0
neg w0, w0
sxtw x1, w0
adrp x0, _fxp_minus_one
add x0, x0, :lo12:_fxp_minus_one
str x1, [x0]
adrp x0, impl
add x0, x0, :lo12:impl
ldr w1, [x0, 4]
adrp x0, impl
add x0, x0, :lo12:impl
ldr w0, [x0]
add w0, w1, w0
sub w0, w0, #1
mov w1, 1
lsl w0, w1, w0
neg w0, w0
sxtw x1, w0
adrp x0, _fxp_min
add x0, x0, :lo12:_fxp_min
str x1, [x0]
adrp x0, impl
add x0, x0, :lo12:impl
ldr w1, [x0, 4]
adrp x0, impl
add x0, x0, :lo12:impl
ldr w0, [x0]
add w0, w1, w0
sub w0, w0, #1
mov w1, 1
lsl w0, w1, w0
sub w0, w0, #1
sxtw x1, w0
adrp x0, _fxp_max
add x0, x0, :lo12:_fxp_max
str x1, [x0]
adrp x0, impl
add x0, x0, :lo12:impl
ldr w0, [x0, 4]
mov w1, 1
lsl w0, w1, w0
sub w0, w0, #1
sxtw x1, w0
adrp x0, _fxp_fmask
add x0, x0, :lo12:_fxp_fmask
str x1, [x0]
adrp x0, impl
add x0, x0, :lo12:impl
ldr w0, [x0, 4]
mov w1, 31
sub w0, w1, w0
mov w1, -2147483648
lsr w0, w1, w0
uxtw x1, w0
adrp x0, _fxp_imask
add x0, x0, :lo12:_fxp_imask
str x1, [x0]
adrp x0, _fxp_min
add x0, x0, :lo12:_fxp_min
ldr d0, [x0]
scvtf d0, d0
adrp x0, _dbl_min
add x0, x0, :lo12:_dbl_min
str d0, [x0]
adrp x0, _dbl_min
add x0, x0, :lo12:_dbl_min
ldr d1, [x0]
adrp x0, impl
add x0, x0, :lo12:impl
ldr w0, [x0, 4]
mov w1, 1
lsl w0, w1, w0
scvtf d0, w0
fdiv d0, d1, d0
adrp x0, _dbl_min
add x0, x0, :lo12:_dbl_min
str d0, [x0]
adrp x0, _fxp_max
add x0, x0, :lo12:_fxp_max
ldr d0, [x0]
scvtf d0, d0
adrp x0, _dbl_max
add x0, x0, :lo12:_dbl_max
str d0, [x0]
adrp x0, _dbl_max
add x0, x0, :lo12:_dbl_max
ldr d1, [x0]
adrp x0, impl
add x0, x0, :lo12:impl
ldr w0, [x0, 4]
mov w1, 1
lsl w0, w1, w0
scvtf d0, w0
fdiv d0, d1, d0
adrp x0, _dbl_max
add x0, x0, :lo12:_dbl_max
str d0, [x0]
adrp x0, impl
add x0, x0, :lo12:impl
ldr w0, [x0, 40]
cmp w0, 0
beq .L804
adrp x0, impl
add x0, x0, :lo12:impl
ldr w0, [x0, 40]
cmp w0, 1
bne .L805
.L804:
adrp x0, impl
add x0, x0, :lo12:impl
mov w1, 1
str w1, [x0, 40]
b .L799
.L805:
adrp x0, impl
add x0, x0, :lo12:impl
ldr d0, [x0, 16]
fcmp d0, #0.0
beq .L807
adrp x0, impl
add x0, x0, :lo12:impl
ldr d1, [x0, 16]
adrp x0, impl
add x0, x0, :lo12:impl
ldr w0, [x0, 40]
scvtf d0, w0
fdiv d0, d1, d0
adrp x0, impl
add x0, x0, :lo12:impl
str d0, [x0, 16]
.L807:
adrp x0, impl
add x0, x0, :lo12:impl
ldr d0, [x0, 8]
fcmp d0, #0.0
beq .L799
adrp x0, impl
add x0, x0, :lo12:impl
ldr d1, [x0, 8]
adrp x0, impl
add x0, x0, :lo12:impl
ldr w0, [x0, 40]
scvtf d0, w0
fdiv d0, d1, d0
adrp x0, impl
add x0, x0, :lo12:impl
str d0, [x0, 8]
.L799:
ldp x29, x30, [sp], 16
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE120:
.size initialization, .-initialization
.align 2
.global double_state_space_representation
.type double_state_space_representation, %function
double_state_space_representation:
.LFB121:
.cfi_startproc
stp x29, x30, [sp, -288]!
.cfi_def_cfa_offset 288
.cfi_offset 29, -288
.cfi_offset 30, -280
mov x29, sp
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 280]
mov x1, 0
str wzr, [sp, 16]
b .L809
.L812:
str wzr, [sp, 20]
b .L810
.L811:
ldrsw x0, [sp, 20]
ldrsw x1, [sp, 16]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 24
str xzr, [x1, x0]
ldrsw x0, [sp, 20]
ldrsw x1, [sp, 16]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 152
str xzr, [x1, x0]
ldr w0, [sp, 20]
add w0, w0, 1
str w0, [sp, 20]
.L810:
ldr w0, [sp, 20]
cmp w0, 3
ble .L811
ldr w0, [sp, 16]
add w0, w0, 1
str w0, [sp, 16]
.L809:
ldr w0, [sp, 16]
cmp w0, 3
ble .L812
adrp x0, :got:nOutputs
ldr x0, [x0, #:got_lo12:nOutputs]
ldr w0, [x0]
mov w7, w0
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w1, w0
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w2, w0
add x0, sp, 24
mov x6, x0
adrp x0, :got:_controller
ldr x0, [x0, #:got_lo12:_controller]
add x5, x0, 512
adrp x0, :got:_controller
ldr x0, [x0, #:got_lo12:_controller]
add x4, x0, 256
mov w3, 1
mov w0, w7
bl double_matrix_multiplication
adrp x0, :got:nOutputs
ldr x0, [x0, #:got_lo12:nOutputs]
ldr w0, [x0]
mov w7, w0
adrp x0, :got:nInputs
ldr x0, [x0, #:got_lo12:nInputs]
ldr w0, [x0]
mov w1, w0
adrp x0, :got:nInputs
ldr x0, [x0, #:got_lo12:nInputs]
ldr w0, [x0]
mov w2, w0
add x0, sp, 152
mov x6, x0
adrp x0, :got:_controller
ldr x0, [x0, #:got_lo12:_controller]
add x5, x0, 768
adrp x0, :got:_controller
ldr x0, [x0, #:got_lo12:_controller]
add x4, x0, 384
mov w3, 1
mov w0, w7
bl double_matrix_multiplication
adrp x0, :got:nOutputs
ldr x0, [x0, #:got_lo12:nOutputs]
ldr w0, [x0]
mov w5, w0
add x2, sp, 152
add x1, sp, 24
adrp x0, :got:_controller
ldr x0, [x0, #:got_lo12:_controller]
add x4, x0, 640
mov x3, x2
mov x2, x1
mov w1, 1
mov w0, w5
bl double_add_matrix
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w7, w0
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w1, w0
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w2, w0
add x0, sp, 24
mov x6, x0
adrp x0, :got:_controller
ldr x0, [x0, #:got_lo12:_controller]
add x5, x0, 512
adrp x0, :got:_controller
ldr x4, [x0, #:got_lo12:_controller]
mov w3, 1
mov w0, w7
bl double_matrix_multiplication
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w7, w0
adrp x0, :got:nInputs
ldr x0, [x0, #:got_lo12:nInputs]
ldr w0, [x0]
mov w1, w0
adrp x0, :got:nInputs
ldr x0, [x0, #:got_lo12:nInputs]
ldr w0, [x0]
mov w2, w0
add x0, sp, 152
mov x6, x0
adrp x0, :got:_controller
ldr x0, [x0, #:got_lo12:_controller]
add x5, x0, 768
adrp x0, :got:_controller
ldr x0, [x0, #:got_lo12:_controller]
add x4, x0, 128
mov w3, 1
mov w0, w7
bl double_matrix_multiplication
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w5, w0
add x2, sp, 152
add x1, sp, 24
adrp x0, :got:_controller
ldr x0, [x0, #:got_lo12:_controller]
add x4, x0, 512
mov x3, x2
mov x2, x1
mov w1, 1
mov w0, w5
bl double_add_matrix
adrp x0, :got:_controller
ldr x0, [x0, #:got_lo12:_controller]
ldr d0, [x0, 640]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [sp, 280]
ldr x1, [x0]
subs x2, x2, x1
mov x1, 0
beq .L814
bl __stack_chk_fail
.L814:
ldp x29, x30, [sp], 288
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE121:
.size double_state_space_representation, .-double_state_space_representation
.align 2
.global fxp_state_space_representation
.type fxp_state_space_representation, %function
fxp_state_space_representation:
.LFB122:
.cfi_startproc
sub sp, sp, #1184
.cfi_def_cfa_offset 1184
stp x29, x30, [sp]
.cfi_offset 29, -1184
.cfi_offset 30, -1176
mov x29, sp
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 1176]
mov x1, 0
str wzr, [sp, 16]
b .L816
.L819:
str wzr, [sp, 20]
b .L817
.L818:
ldrsw x0, [sp, 20]
ldrsw x1, [sp, 16]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 24
str xzr, [x1, x0]
ldrsw x0, [sp, 20]
ldrsw x1, [sp, 16]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 152
str xzr, [x1, x0]
ldr w0, [sp, 20]
add w0, w0, 1
str w0, [sp, 20]
.L817:
ldr w0, [sp, 20]
cmp w0, 3
ble .L818
ldr w0, [sp, 16]
add w0, w0, 1
str w0, [sp, 16]
.L816:
ldr w0, [sp, 16]
cmp w0, 3
ble .L819
str wzr, [sp, 16]
b .L820
.L823:
str wzr, [sp, 20]
b .L821
.L822:
ldrsw x0, [sp, 20]
ldrsw x1, [sp, 16]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 280
str xzr, [x1, x0]
ldr w0, [sp, 20]
add w0, w0, 1
str w0, [sp, 20]
.L821:
ldr w0, [sp, 20]
cmp w0, 3
ble .L822
ldr w0, [sp, 16]
add w0, w0, 1
str w0, [sp, 16]
.L820:
ldr w0, [sp, 16]
cmp w0, 3
ble .L823
str wzr, [sp, 16]
b .L824
.L827:
str wzr, [sp, 20]
b .L825
.L826:
ldrsw x0, [sp, 20]
ldrsw x1, [sp, 16]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 408
str xzr, [x1, x0]
ldr w0, [sp, 20]
add w0, w0, 1
str w0, [sp, 20]
.L825:
ldr w0, [sp, 20]
cmp w0, 3
ble .L826
ldr w0, [sp, 16]
add w0, w0, 1
str w0, [sp, 16]
.L824:
ldr w0, [sp, 16]
cmp w0, 3
ble .L827
str wzr, [sp, 16]
b .L828
.L831:
str wzr, [sp, 20]
b .L829
.L830:
ldrsw x0, [sp, 20]
ldrsw x1, [sp, 16]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 536
str xzr, [x1, x0]
ldr w0, [sp, 20]
add w0, w0, 1
str w0, [sp, 20]
.L829:
ldr w0, [sp, 20]
cmp w0, 3
ble .L830
ldr w0, [sp, 16]
add w0, w0, 1
str w0, [sp, 16]
.L828:
ldr w0, [sp, 16]
cmp w0, 3
ble .L831
str wzr, [sp, 16]
b .L832
.L835:
str wzr, [sp, 20]
b .L833
.L834:
ldrsw x0, [sp, 20]
ldrsw x1, [sp, 16]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 664
str xzr, [x1, x0]
ldr w0, [sp, 20]
add w0, w0, 1
str w0, [sp, 20]
.L833:
ldr w0, [sp, 20]
cmp w0, 3
ble .L834
ldr w0, [sp, 16]
add w0, w0, 1
str w0, [sp, 16]
.L832:
ldr w0, [sp, 16]
cmp w0, 3
ble .L835
str wzr, [sp, 16]
b .L836
.L839:
str wzr, [sp, 20]
b .L837
.L838:
ldrsw x0, [sp, 20]
ldrsw x1, [sp, 16]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 792
str xzr, [x1, x0]
ldr w0, [sp, 20]
add w0, w0, 1
str w0, [sp, 20]
.L837:
ldr w0, [sp, 20]
cmp w0, 3
ble .L838
ldr w0, [sp, 16]
add w0, w0, 1
str w0, [sp, 16]
.L836:
ldr w0, [sp, 16]
cmp w0, 3
ble .L839
str wzr, [sp, 16]
b .L840
.L843:
str wzr, [sp, 20]
b .L841
.L842:
ldrsw x0, [sp, 20]
ldrsw x1, [sp, 16]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 920
str xzr, [x1, x0]
ldr w0, [sp, 20]
add w0, w0, 1
str w0, [sp, 20]
.L841:
ldr w0, [sp, 20]
cmp w0, 3
ble .L842
ldr w0, [sp, 16]
add w0, w0, 1
str w0, [sp, 16]
.L840:
ldr w0, [sp, 16]
cmp w0, 3
ble .L843
str wzr, [sp, 16]
b .L844
.L847:
str wzr, [sp, 20]
b .L845
.L846:
ldrsw x0, [sp, 20]
ldrsw x1, [sp, 16]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 1048
str xzr, [x1, x0]
ldr w0, [sp, 20]
add w0, w0, 1
str w0, [sp, 20]
.L845:
ldr w0, [sp, 20]
cmp w0, 3
ble .L846
ldr w0, [sp, 16]
add w0, w0, 1
str w0, [sp, 16]
.L844:
ldr w0, [sp, 16]
cmp w0, 3
ble .L847
str wzr, [sp, 16]
b .L848
.L851:
str wzr, [sp, 20]
b .L849
.L850:
adrp x0, :got:_controller
ldr x0, [x0, #:got_lo12:_controller]
ldrsw x1, [sp, 20]
ldrsw x2, [sp, 16]
lsl x2, x2, 2
add x1, x2, x1
ldr d0, [x0, x1, lsl 3]
bl fxp_double_to_fxp
mov x2, x0
ldrsw x0, [sp, 20]
ldrsw x1, [sp, 16]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 280
str x2, [x1, x0]
ldr w0, [sp, 20]
add w0, w0, 1
str w0, [sp, 20]
.L849:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
ldr w1, [sp, 20]
cmp w1, w0
blt .L850
ldr w0, [sp, 16]
add w0, w0, 1
str w0, [sp, 16]
.L848:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
ldr w1, [sp, 16]
cmp w1, w0
blt .L851
str wzr, [sp, 16]
b .L852
.L855:
str wzr, [sp, 20]
b .L853
.L854:
adrp x0, :got:_controller
ldr x0, [x0, #:got_lo12:_controller]
ldrsw x1, [sp, 20]
ldrsw x2, [sp, 16]
lsl x2, x2, 2
add x1, x2, x1
add x1, x1, 16
ldr d0, [x0, x1, lsl 3]
bl fxp_double_to_fxp
mov x2, x0
ldrsw x0, [sp, 20]
ldrsw x1, [sp, 16]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 408
str x2, [x1, x0]
ldr w0, [sp, 20]
add w0, w0, 1
str w0, [sp, 20]
.L853:
adrp x0, :got:nInputs
ldr x0, [x0, #:got_lo12:nInputs]
ldr w0, [x0]
ldr w1, [sp, 20]
cmp w1, w0
blt .L854
ldr w0, [sp, 16]
add w0, w0, 1
str w0, [sp, 16]
.L852:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
ldr w1, [sp, 16]
cmp w1, w0
blt .L855
str wzr, [sp, 16]
b .L856
.L859:
str wzr, [sp, 20]
b .L857
.L858:
adrp x0, :got:_controller
ldr x0, [x0, #:got_lo12:_controller]
ldrsw x1, [sp, 20]
ldrsw x2, [sp, 16]
lsl x2, x2, 2
add x1, x2, x1
add x1, x1, 32
ldr d0, [x0, x1, lsl 3]
bl fxp_double_to_fxp
mov x2, x0
ldrsw x0, [sp, 20]
ldrsw x1, [sp, 16]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 536
str x2, [x1, x0]
ldr w0, [sp, 20]
add w0, w0, 1
str w0, [sp, 20]
.L857:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
ldr w1, [sp, 20]
cmp w1, w0
blt .L858
ldr w0, [sp, 16]
add w0, w0, 1
str w0, [sp, 16]
.L856:
adrp x0, :got:nOutputs
ldr x0, [x0, #:got_lo12:nOutputs]
ldr w0, [x0]
ldr w1, [sp, 16]
cmp w1, w0
blt .L859
str wzr, [sp, 16]
b .L860
.L863:
str wzr, [sp, 20]
b .L861
.L862:
adrp x0, :got:_controller
ldr x0, [x0, #:got_lo12:_controller]
ldrsw x1, [sp, 20]
ldrsw x2, [sp, 16]
lsl x2, x2, 2
add x1, x2, x1
add x1, x1, 48
ldr d0, [x0, x1, lsl 3]
bl fxp_double_to_fxp
mov x2, x0
ldrsw x0, [sp, 20]
ldrsw x1, [sp, 16]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 664
str x2, [x1, x0]
ldr w0, [sp, 20]
add w0, w0, 1
str w0, [sp, 20]
.L861:
adrp x0, :got:nInputs
ldr x0, [x0, #:got_lo12:nInputs]
ldr w0, [x0]
ldr w1, [sp, 20]
cmp w1, w0
blt .L862
ldr w0, [sp, 16]
add w0, w0, 1
str w0, [sp, 16]
.L860:
adrp x0, :got:nOutputs
ldr x0, [x0, #:got_lo12:nOutputs]
ldr w0, [x0]
ldr w1, [sp, 16]
cmp w1, w0
blt .L863
str wzr, [sp, 16]
b .L864
.L867:
str wzr, [sp, 20]
b .L865
.L866:
adrp x0, :got:_controller
ldr x0, [x0, #:got_lo12:_controller]
ldrsw x1, [sp, 20]
ldrsw x2, [sp, 16]
lsl x2, x2, 2
add x1, x2, x1
add x1, x1, 64
ldr d0, [x0, x1, lsl 3]
bl fxp_double_to_fxp
mov x2, x0
ldrsw x0, [sp, 20]
ldrsw x1, [sp, 16]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 792
str x2, [x1, x0]
ldr w0, [sp, 20]
add w0, w0, 1
str w0, [sp, 20]
.L865:
ldr w0, [sp, 20]
cmp w0, 0
ble .L866
ldr w0, [sp, 16]
add w0, w0, 1
str w0, [sp, 16]
.L864:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
ldr w1, [sp, 16]
cmp w1, w0
blt .L867
str wzr, [sp, 16]
b .L868
.L871:
str wzr, [sp, 20]
b .L869
.L870:
adrp x0, :got:_controller
ldr x0, [x0, #:got_lo12:_controller]
ldrsw x1, [sp, 20]
ldrsw x2, [sp, 16]
lsl x2, x2, 2
add x1, x2, x1
add x1, x1, 96
ldr d0, [x0, x1, lsl 3]
bl fxp_double_to_fxp
mov x2, x0
ldrsw x0, [sp, 20]
ldrsw x1, [sp, 16]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 920
str x2, [x1, x0]
ldr w0, [sp, 20]
add w0, w0, 1
str w0, [sp, 20]
.L869:
ldr w0, [sp, 20]
cmp w0, 0
ble .L870
ldr w0, [sp, 16]
add w0, w0, 1
str w0, [sp, 16]
.L868:
adrp x0, :got:nInputs
ldr x0, [x0, #:got_lo12:nInputs]
ldr w0, [x0]
ldr w1, [sp, 16]
cmp w1, w0
blt .L871
str wzr, [sp, 16]
b .L872
.L875:
str wzr, [sp, 20]
b .L873
.L874:
adrp x0, :got:_controller
ldr x0, [x0, #:got_lo12:_controller]
ldrsw x1, [sp, 20]
ldrsw x2, [sp, 16]
lsl x2, x2, 2
add x1, x2, x1
add x1, x1, 80
ldr d0, [x0, x1, lsl 3]
bl fxp_double_to_fxp
mov x2, x0
ldrsw x0, [sp, 20]
ldrsw x1, [sp, 16]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 1048
str x2, [x1, x0]
ldr w0, [sp, 20]
add w0, w0, 1
str w0, [sp, 20]
.L873:
ldr w0, [sp, 20]
cmp w0, 0
ble .L874
ldr w0, [sp, 16]
add w0, w0, 1
str w0, [sp, 16]
.L872:
adrp x0, :got:nOutputs
ldr x0, [x0, #:got_lo12:nOutputs]
ldr w0, [x0]
ldr w1, [sp, 16]
cmp w1, w0
blt .L875
adrp x0, :got:nOutputs
ldr x0, [x0, #:got_lo12:nOutputs]
ldr w0, [x0]
mov w7, w0
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w8, w0
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w9, w0
add x2, sp, 24
add x1, sp, 792
add x0, sp, 536
mov x6, x2
mov x5, x1
mov x4, x0
mov w3, 1
mov w2, w9
mov w1, w8
mov w0, w7
bl fxp_matrix_multiplication
adrp x0, :got:nOutputs
ldr x0, [x0, #:got_lo12:nOutputs]
ldr w0, [x0]
mov w7, w0
adrp x0, :got:nInputs
ldr x0, [x0, #:got_lo12:nInputs]
ldr w0, [x0]
mov w8, w0
adrp x0, :got:nInputs
ldr x0, [x0, #:got_lo12:nInputs]
ldr w0, [x0]
mov w9, w0
add x2, sp, 152
add x1, sp, 920
add x0, sp, 664
mov x6, x2
mov x5, x1
mov x4, x0
mov w3, 1
mov w2, w9
mov w1, w8
mov w0, w7
bl fxp_matrix_multiplication
adrp x0, :got:nOutputs
ldr x0, [x0, #:got_lo12:nOutputs]
ldr w0, [x0]
mov w5, w0
add x2, sp, 1048
add x1, sp, 152
add x0, sp, 24
mov x4, x2
mov x3, x1
mov x2, x0
mov w1, 1
mov w0, w5
bl fxp_add_matrix
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w7, w0
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w8, w0
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w9, w0
add x2, sp, 24
add x1, sp, 792
add x0, sp, 280
mov x6, x2
mov x5, x1
mov x4, x0
mov w3, 1
mov w2, w9
mov w1, w8
mov w0, w7
bl fxp_matrix_multiplication
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w7, w0
adrp x0, :got:nInputs
ldr x0, [x0, #:got_lo12:nInputs]
ldr w0, [x0]
mov w8, w0
adrp x0, :got:nInputs
ldr x0, [x0, #:got_lo12:nInputs]
ldr w0, [x0]
mov w9, w0
add x2, sp, 152
add x1, sp, 920
add x0, sp, 408
mov x6, x2
mov x5, x1
mov x4, x0
mov w3, 1
mov w2, w9
mov w1, w8
mov w0, w7
bl fxp_matrix_multiplication
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w5, w0
add x2, sp, 792
add x1, sp, 152
add x0, sp, 24
mov x4, x2
mov x3, x1
mov x2, x0
mov w1, 1
mov w0, w5
bl fxp_add_matrix
str wzr, [sp, 16]
b .L876
.L879:
str wzr, [sp, 20]
b .L877
.L878:
ldrsw x0, [sp, 20]
ldrsw x1, [sp, 16]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 792
ldr x0, [x1, x0]
bl fxp_to_double
adrp x0, :got:_controller
ldr x0, [x0, #:got_lo12:_controller]
ldrsw x1, [sp, 20]
ldrsw x2, [sp, 16]
lsl x2, x2, 2
add x1, x2, x1
add x1, x1, 64
str d0, [x0, x1, lsl 3]
ldr w0, [sp, 20]
add w0, w0, 1
str w0, [sp, 20]
.L877:
ldr w0, [sp, 20]
cmp w0, 0
ble .L878
ldr w0, [sp, 16]
add w0, w0, 1
str w0, [sp, 16]
.L876:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
ldr w1, [sp, 16]
cmp w1, w0
blt .L879
str wzr, [sp, 16]
b .L880
.L883:
str wzr, [sp, 20]
b .L881
.L882:
ldrsw x0, [sp, 20]
ldrsw x1, [sp, 16]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 1048
ldr x0, [x1, x0]
bl fxp_to_double
adrp x0, :got:_controller
ldr x0, [x0, #:got_lo12:_controller]
ldrsw x1, [sp, 20]
ldrsw x2, [sp, 16]
lsl x2, x2, 2
add x1, x2, x1
add x1, x1, 80
str d0, [x0, x1, lsl 3]
ldr w0, [sp, 20]
add w0, w0, 1
str w0, [sp, 20]
.L881:
ldr w0, [sp, 20]
cmp w0, 0
ble .L882
ldr w0, [sp, 16]
add w0, w0, 1
str w0, [sp, 16]
.L880:
adrp x0, :got:nOutputs
ldr x0, [x0, #:got_lo12:nOutputs]
ldr w0, [x0]
ldr w1, [sp, 16]
cmp w1, w0
blt .L883
adrp x0, :got:_controller
ldr x0, [x0, #:got_lo12:_controller]
ldr d0, [x0, 640]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [sp, 1176]
ldr x1, [x0]
subs x2, x2, x1
mov x1, 0
beq .L885
bl __stack_chk_fail
.L885:
ldp x29, x30, [sp]
add sp, sp, 1184
.cfi_restore 29
.cfi_restore 30
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE122:
.size fxp_state_space_representation, .-fxp_state_space_representation
.section .rodata
.align 3
.LC38:
.string "Warning: Function sinTyl from bmc/core/filter_functions.h: Precision must be a positive integer. Assuming 0 precision"
.align 3
.LC39:
.string "Warning: Function sinTyl from bmc/core/filter_functions.h: Precision representation exceeded. Assuming maximum precision of 6"
.text
.align 2
.global sinTyl
.type sinTyl, %function
sinTyl:
.LFB123:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str d0, [sp, 24]
str w0, [sp, 20]
ldr d0, [sp, 24]
fmul d0, d0, d0
str d0, [sp, 48]
ldr w0, [sp, 20]
cmp w0, 0
bge .L887
adrp x0, .LC38
add x0, x0, :lo12:.LC38
bl puts
str wzr, [sp, 20]
.L887:
ldr w0, [sp, 20]
cmp w0, 0
blt .L888
str xzr, [sp, 56]
ldr d0, [sp, 56]
str d0, [sp, 40]
ldr w0, [sp, 20]
cmp w0, 0
ble .L888
ldr d0, [sp, 24]
str d0, [sp, 56]
ldr d1, [sp, 40]
ldr d0, [sp, 56]
fadd d0, d1, d0
str d0, [sp, 40]
ldr w0, [sp, 20]
cmp w0, 1
ble .L888
ldr d1, [sp, 56]
ldr d0, [sp, 48]
fmul d0, d1, d0
str d0, [sp, 56]
fmov d0, 6.0e+0
ldr d1, [sp, 56]
fdiv d0, d1, d0
ldr d1, [sp, 40]
fsub d0, d1, d0
str d0, [sp, 40]
ldr w0, [sp, 20]
cmp w0, 2
ble .L888
ldr d1, [sp, 56]
ldr d0, [sp, 48]
fmul d0, d1, d0
str d0, [sp, 56]
mov x0, 4638144666238189568
fmov d1, x0
ldr d0, [sp, 56]
fdiv d0, d0, d1
ldr d1, [sp, 40]
fadd d0, d1, d0
str d0, [sp, 40]
ldr w0, [sp, 20]
cmp w0, 3
ble .L888
ldr d1, [sp, 56]
ldr d0, [sp, 48]
fmul d0, d1, d0
str d0, [sp, 56]
mov x0, 193514046488576
movk x0, 0x40b3, lsl 48
fmov d1, x0
ldr d0, [sp, 56]
fdiv d0, d0, d1
ldr d1, [sp, 40]
fsub d0, d1, d0
str d0, [sp, 40]
ldr w0, [sp, 20]
cmp w0, 4
ble .L888
ldr d1, [sp, 56]
ldr d0, [sp, 48]
fmul d0, d1, d0
str d0, [sp, 56]
mov x0, 41781441855488
movk x0, 0x4116, lsl 48
fmov d1, x0
ldr d0, [sp, 56]
fdiv d0, d0, d1
ldr d1, [sp, 40]
fadd d0, d1, d0
str d0, [sp, 40]
ldr w0, [sp, 20]
cmp w0, 5
ble .L888
ldr d1, [sp, 56]
ldr d0, [sp, 48]
fmul d0, d1, d0
str d0, [sp, 56]
mov x0, 9517647527936
movk x0, 0x4183, lsl 48
fmov d1, x0
ldr d0, [sp, 56]
fdiv d0, d0, d1
ldr d1, [sp, 40]
fsub d0, d1, d0
str d0, [sp, 40]
ldr w0, [sp, 20]
cmp w0, 6
ble .L888
adrp x0, .LC39
add x0, x0, :lo12:.LC39
bl puts
.L888:
ldr d0, [sp, 40]
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE123:
.size sinTyl, .-sinTyl
.section .rodata
.align 3
.LC40:
.string "Warning: Function cosTyl from bmc/core/filter_functions.h: Precision must be a positive integer. Assuming 0 precision"
.text
.align 2
.global cosTyl
.type cosTyl, %function
cosTyl:
.LFB124:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str d0, [sp, 24]
str w0, [sp, 20]
ldr d0, [sp, 24]
fmul d0, d0, d0
str d0, [sp, 48]
ldr w0, [sp, 20]
cmp w0, 0
bge .L891
adrp x0, .LC40
add x0, x0, :lo12:.LC40
bl puts
str wzr, [sp, 20]
.L891:
ldr w0, [sp, 20]
cmp w0, 0
blt .L892
str xzr, [sp, 56]
ldr d0, [sp, 56]
str d0, [sp, 40]
ldr w0, [sp, 20]
cmp w0, 0
ble .L892
fmov d0, 1.0e+0
str d0, [sp, 56]
fmov d0, 1.0e+0
str d0, [sp, 40]
ldr w0, [sp, 20]
cmp w0, 1
ble .L892
ldr d0, [sp, 48]
str d0, [sp, 56]
fmov d0, 2.0e+0
ldr d1, [sp, 56]
fdiv d0, d1, d0
ldr d1, [sp, 40]
fsub d0, d1, d0
str d0, [sp, 40]
ldr w0, [sp, 20]
cmp w0, 2
ble .L892
ldr d1, [sp, 56]
ldr d0, [sp, 48]
fmul d0, d1, d0
str d0, [sp, 56]
fmov d0, 2.4e+1
ldr d1, [sp, 56]
fdiv d0, d1, d0
ldr d1, [sp, 40]
fadd d0, d1, d0
str d0, [sp, 40]
ldr w0, [sp, 20]
cmp w0, 3
ble .L892
ldr d1, [sp, 56]
ldr d0, [sp, 48]
fmul d0, d1, d0
str d0, [sp, 56]
mov x0, 140737488355328
movk x0, 0x4086, lsl 48
fmov d1, x0
ldr d0, [sp, 56]
fdiv d0, d0, d1
ldr d1, [sp, 40]
fsub d0, d1, d0
str d0, [sp, 40]
ldr w0, [sp, 20]
cmp w0, 4
ble .L892
ldr d1, [sp, 56]
ldr d0, [sp, 48]
fmul d0, d1, d0
str d0, [sp, 56]
mov x0, 193514046488576
movk x0, 0x40e3, lsl 48
fmov d1, x0
ldr d0, [sp, 56]
fdiv d0, d0, d1
ldr d1, [sp, 40]
fadd d0, d1, d0
str d0, [sp, 40]
ldr w0, [sp, 20]
cmp w0, 5
ble .L892
ldr d1, [sp, 56]
ldr d0, [sp, 48]
fmul d0, d1, d0
str d0, [sp, 56]
mov x0, 192964290674688
movk x0, 0x414b, lsl 48
fmov d1, x0
ldr d0, [sp, 56]
fdiv d0, d0, d1
ldr d1, [sp, 40]
fsub d0, d1, d0
str d0, [sp, 40]
ldr w0, [sp, 20]
cmp w0, 6
ble .L892
adrp x0, .LC39
add x0, x0, :lo12:.LC39
bl puts
.L892:
ldr d0, [sp, 40]
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE124:
.size cosTyl, .-cosTyl
.section .rodata
.align 3
.LC41:
.string "Warning: Function sinTyl from bmc/core/filter_functions.h: Precision representation exceeded. Assuming maximum precision of 4"
.text
.align 2
.global atanTyl
.type atanTyl, %function
atanTyl:
.LFB125:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str d0, [sp, 24]
str w0, [sp, 20]
ldr d0, [sp, 24]
fmul d0, d0, d0
str d0, [sp, 48]
ldr w0, [sp, 20]
cmp w0, 0
bge .L895
adrp x0, .LC38
add x0, x0, :lo12:.LC38
bl puts
str wzr, [sp, 20]
.L895:
ldr w0, [sp, 20]
cmp w0, 0
blt .L896
str xzr, [sp, 56]
ldr d0, [sp, 56]
str d0, [sp, 40]
ldr w0, [sp, 20]
cmp w0, 0
ble .L896
ldr d0, [sp, 24]
str d0, [sp, 56]
ldr d0, [sp, 56]
str d0, [sp, 40]
ldr w0, [sp, 20]
cmp w0, 1
ble .L896
ldr d0, [sp, 48]
str d0, [sp, 56]
fmov d0, 3.0e+0
ldr d1, [sp, 56]
fdiv d0, d1, d0
ldr d1, [sp, 40]
fsub d0, d1, d0
str d0, [sp, 40]
ldr w0, [sp, 20]
cmp w0, 2
ble .L896
ldr d1, [sp, 56]
ldr d0, [sp, 48]
fmul d0, d1, d0
str d0, [sp, 56]
fmov d0, 5.0e+0
ldr d1, [sp, 56]
fdiv d0, d1, d0
ldr d1, [sp, 40]
fadd d0, d1, d0
str d0, [sp, 40]
ldr w0, [sp, 20]
cmp w0, 3
ble .L896
ldr d1, [sp, 56]
ldr d0, [sp, 48]
fmul d0, d1, d0
str d0, [sp, 56]
fmov d0, 7.0e+0
ldr d1, [sp, 56]
fdiv d0, d1, d0
ldr d1, [sp, 40]
fsub d0, d1, d0
str d0, [sp, 40]
ldr w0, [sp, 20]
cmp w0, 6
ble .L896
adrp x0, .LC41
add x0, x0, :lo12:.LC41
bl puts
.L896:
ldr d0, [sp, 40]
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE125:
.size atanTyl, .-atanTyl
.align 2
.global sqrt1
.type sqrt1, %function
sqrt1:
.LFB126:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str s0, [sp, 12]
ldr s1, [sp, 12]
fmov s0, 5.0e-1
fmul s0, s1, s0
str s0, [sp, 28]
ldr s0, [sp, 12]
str s0, [sp, 24]
ldr w0, [sp, 24]
asr w0, w0, 1
mov w1, 23007
movk w1, 0x5f37, lsl 16
sub w0, w1, w0
str w0, [sp, 24]
ldr s1, [sp, 24]
ldr s0, [sp, 12]
fmul s1, s1, s0
ldr s2, [sp, 24]
ldr s0, [sp, 28]
fmul s2, s2, s0
ldr s0, [sp, 24]
fmul s0, s2, s0
fmov s2, 1.5e+0
fsub s0, s2, s0
fmul s0, s1, s0
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE126:
.size sqrt1, .-sqrt1
.align 2
.global sqrt2
.type sqrt2, %function
sqrt2:
.LFB127:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str s0, [sp, 12]
ldr s0, [sp, 12]
str s0, [sp, 24]
ldr w0, [sp, 24]
asr w1, w0, 1
mov w0, 532676608
add w0, w1, w0
str w0, [sp, 24]
ldr s0, [sp, 24]
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE127:
.size sqrt2, .-sqrt2
.align 2
.global fabsolut
.type fabsolut, %function
fabsolut:
.LFB128:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str s0, [sp, 12]
ldr s0, [sp, 12]
fcmpe s0, #0.0
bmi .L906
b .L903
.L906:
ldr s0, [sp, 12]
fneg s0, s0
str s0, [sp, 12]
.L903:
ldr s0, [sp, 12]
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE128:
.size fabsolut, .-fabsolut
.align 2
.type sqrt3, %function
sqrt3:
.LFB129:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str s0, [sp, 28]
fmov s0, 1.0e+1
ldr s1, [sp, 28]
fdiv s0, s1, s0
str s0, [sp, 32]
adrp x0, .LC42
ldr d0, [x0, #:lo12:.LC42]
str d0, [sp, 48]
str wzr, [sp, 40]
ldr s0, [sp, 28]
fcmp s0, #0.0
bne .L908
str wzr, [sp, 32]
b .L909
.L908:
mov w0, 1
str w0, [sp, 36]
b .L910
.L914:
ldr w0, [sp, 40]
cmp w0, 0
bne .L912
ldr s0, [sp, 32]
fmul s0, s0, s0
ldr s1, [sp, 28]
fsub s0, s1, s0
fcvt d1, s0
ldr s0, [sp, 32]
fcvt d0, s0
fadd d0, d0, d0
fdiv d0, d1, d0
fcvt s0, d0
str s0, [sp, 44]
ldr s1, [sp, 32]
ldr s0, [sp, 44]
fadd s0, s1, s0
str s0, [sp, 32]
ldr s0, [sp, 32]
fmul s0, s0, s0
ldr s1, [sp, 28]
fsub s0, s1, s0
fcvt d0, s0
str d0, [sp, 56]
ldr d0, [sp, 56]
fcvt s0, d0
bl fabsolut
fcvt d0, s0
ldr d1, [sp, 48]
fcmpe d1, d0
bge .L916
b .L912
.L916:
mov w0, 1
str w0, [sp, 40]
.L912:
ldr w0, [sp, 36]
add w0, w0, 1
str w0, [sp, 36]
.L910:
ldr w0, [sp, 36]
cmp w0, 19
ble .L914
.L909:
ldr s0, [sp, 32]
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE129:
.size sqrt3, .-sqrt3
.align 2
.global verify_overflow
.type verify_overflow, %function
verify_overflow:
.LFB130:
.cfi_startproc
stp x29, x30, [sp, -496]!
.cfi_def_cfa_offset 496
.cfi_offset 29, -496
.cfi_offset 30, -488
mov x29, sp
.cfi_def_cfa_register 29
stp x19, x20, [sp, 16]
stp x21, x22, [sp, 32]
stp x23, x24, [sp, 48]
stp x25, x26, [sp, 64]
str x27, [sp, 80]
sub sp, sp, #16
.cfi_offset 19, -480
.cfi_offset 20, -472
.cfi_offset 21, -464
.cfi_offset 22, -456
.cfi_offset 23, -448
.cfi_offset 24, -440
.cfi_offset 25, -432
.cfi_offset 26, -424
.cfi_offset 27, -416
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [x29, 488]
mov x1, 0
mov x0, sp
mov x19, x0
adrp x0, ds
add x0, x0, :lo12:ds
ldr w1, [x0, 800]
sxtw x0, w1
sub x0, x0, #1
str x0, [x29, 360]
sxtw x0, w1
mov x4, x0
mov x5, 0
lsr x0, x4, 58
lsl x3, x5, 6
orr x3, x0, x3
lsl x2, x4, 6
sxtw x0, w1
mov x8, x0
mov x9, 0
lsr x0, x8, 58
lsl x7, x9, 6
orr x7, x0, x7
lsl x6, x8, 6
sxtw x0, w1
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x1, x0, 4
and x0, x1, -65536
sub x0, sp, x0
.L918:
cmp sp, x0
beq .L919
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L918
.L919:
and x0, x1, 65535
sub sp, sp, x0
str xzr, [sp]
and x0, x1, 65535
cmp x0, 1024
bcc .L920
str xzr, [sp, 1024]
.L920:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 368]
adrp x0, ds
add x0, x0, :lo12:ds
ldr w1, [x0, 1608]
sxtw x0, w1
sub x0, x0, #1
str x0, [x29, 376]
sxtw x0, w1
mov x14, x0
mov x15, 0
lsr x0, x14, 58
lsl x11, x15, 6
orr x11, x0, x11
lsl x10, x14, 6
sxtw x0, w1
mov x16, x0
mov x17, 0
lsr x0, x16, 58
lsl x13, x17, 6
orr x13, x0, x13
lsl x12, x16, 6
sxtw x0, w1
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x1, x0, 4
and x0, x1, -65536
sub x0, sp, x0
.L921:
cmp sp, x0
beq .L922
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L921
.L922:
and x0, x1, 65535
sub sp, sp, x0
str xzr, [sp]
and x0, x1, 65535
cmp x0, 1024
bcc .L923
str xzr, [sp, 1024]
.L923:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 384]
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 800]
mov w2, w0
ldr x1, [x29, 368]
adrp x0, ds
add x0, x0, :lo12:ds
bl fxp_double_to_fxp_array
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 1608]
mov w2, w0
ldr x1, [x29, 384]
adrp x0, ds+808
add x0, x0, :lo12:ds+808
bl fxp_double_to_fxp_array
adrp x0, impl
add x0, x0, :lo12:impl
ldr d0, [x0, 16]
bl fxp_double_to_fxp
str x0, [x29, 392]
adrp x0, impl
add x0, x0, :lo12:impl
ldr d0, [x0, 8]
bl fxp_double_to_fxp
str x0, [x29, 400]
adrp x0, X_SIZE_VALUE
add x0, x0, :lo12:X_SIZE_VALUE
ldr w1, [x0]
sxtw x0, w1
sub x0, x0, #1
str x0, [x29, 408]
sxtw x0, w1
mov x24, x0
mov x25, 0
lsr x0, x24, 58
lsl x21, x25, 6
orr x21, x0, x21
lsl x20, x24, 6
sxtw x0, w1
mov x26, x0
mov x27, 0
lsr x0, x26, 58
lsl x23, x27, 6
orr x23, x0, x23
lsl x22, x26, 6
sxtw x0, w1
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x1, x0, 4
and x0, x1, -65536
sub x0, sp, x0
.L924:
cmp sp, x0
beq .L925
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L924
.L925:
and x0, x1, 65535
sub sp, sp, x0
str xzr, [sp]
and x0, x1, 65535
cmp x0, 1024
bcc .L926
str xzr, [sp, 1024]
.L926:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 416]
adrp x0, X_SIZE_VALUE
add x0, x0, :lo12:X_SIZE_VALUE
ldr w1, [x0]
sxtw x0, w1
sub x0, x0, #1
str x0, [x29, 424]
sxtw x0, w1
str x0, [x29, 208]
str xzr, [x29, 216]
ldp x2, x3, [x29, 208]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 344]
ldr x4, [x29, 344]
orr x0, x0, x4
str x0, [x29, 344]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 336]
sxtw x0, w1
str x0, [x29, 192]
str xzr, [x29, 200]
ldp x2, x3, [x29, 192]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 328]
ldr x4, [x29, 328]
orr x0, x0, x4
str x0, [x29, 328]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 320]
sxtw x0, w1
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L927:
cmp sp, x1
beq .L928
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L927
.L928:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L929
str xzr, [sp, 1024]
.L929:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 432]
str wzr, [x29, 352]
b .L930
.L933:
ldr x0, [x29, 416]
ldrsw x1, [x29, 352]
str xzr, [x0, x1, lsl 3]
bl nondet_int
sxtw x2, w0
ldr x0, [x29, 432]
ldrsw x1, [x29, 352]
str x2, [x0, x1, lsl 3]
ldr x0, [x29, 432]
ldrsw x1, [x29, 352]
ldr x0, [x0, x1, lsl 3]
ldr x1, [x29, 392]
cmp x1, x0
bgt .L931
ldr x0, [x29, 432]
ldrsw x1, [x29, 352]
ldr x0, [x0, x1, lsl 3]
ldr x1, [x29, 400]
cmp x1, x0
blt .L931
mov w0, 1
b .L932
.L931:
mov w0, 0
.L932:
and w0, w0, 1
and w0, w0, 255
bl __DSVERIFIER_assume
ldr w0, [x29, 352]
add w0, w0, 1
str w0, [x29, 352]
.L930:
adrp x0, X_SIZE_VALUE
add x0, x0, :lo12:X_SIZE_VALUE
ldr w0, [x0]
ldr w1, [x29, 352]
cmp w1, w0
blt .L933
str wzr, [x29, 356]
adrp x0, ds
add x0, x0, :lo12:ds
ldr w1, [x0, 1608]
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 800]
cmp w1, w0
csel w0, w1, w0, ge
str w0, [x29, 356]
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 800]
sxtw x1, w0
sub x1, x1, #1
str x1, [x29, 440]
sxtw x1, w0
str x1, [x29, 176]
str xzr, [x29, 184]
ldp x2, x3, [x29, 176]
mov x1, x2
lsr x1, x1, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 312]
ldr x4, [x29, 312]
orr x1, x1, x4
str x1, [x29, 312]
mov x1, x2
lsl x1, x1, 6
str x1, [x29, 304]
sxtw x1, w0
str x1, [x29, 160]
str xzr, [x29, 168]
ldp x2, x3, [x29, 160]
mov x1, x2
lsr x1, x1, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 296]
ldr x4, [x29, 296]
orr x1, x1, x4
str x1, [x29, 296]
mov x1, x2
lsl x1, x1, 6
str x1, [x29, 288]
sxtw x0, w0
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L934:
cmp sp, x1
beq .L935
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L934
.L935:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L936
str xzr, [sp, 1024]
.L936:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 448]
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 1608]
sxtw x1, w0
sub x1, x1, #1
str x1, [x29, 456]
sxtw x1, w0
str x1, [x29, 144]
str xzr, [x29, 152]
ldp x2, x3, [x29, 144]
mov x1, x2
lsr x1, x1, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 280]
ldr x4, [x29, 280]
orr x1, x1, x4
str x1, [x29, 280]
mov x1, x2
lsl x1, x1, 6
str x1, [x29, 272]
sxtw x1, w0
str x1, [x29, 128]
str xzr, [x29, 136]
ldp x2, x3, [x29, 128]
mov x1, x2
lsr x1, x1, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 264]
ldr x4, [x29, 264]
orr x1, x1, x4
str x1, [x29, 264]
mov x1, x2
lsl x1, x1, 6
str x1, [x29, 256]
sxtw x0, w0
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L937:
cmp sp, x1
beq .L938
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L937
.L938:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L939
str xzr, [sp, 1024]
.L939:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 464]
ldr w0, [x29, 356]
sxtw x1, w0
sub x1, x1, #1
str x1, [x29, 472]
sxtw x1, w0
str x1, [x29, 112]
str xzr, [x29, 120]
ldp x2, x3, [x29, 112]
mov x1, x2
lsr x1, x1, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 248]
ldr x4, [x29, 248]
orr x1, x1, x4
str x1, [x29, 248]
mov x1, x2
lsl x1, x1, 6
str x1, [x29, 240]
sxtw x1, w0
str x1, [x29, 96]
str xzr, [x29, 104]
ldp x2, x3, [x29, 96]
mov x1, x2
lsr x1, x1, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 232]
ldr x4, [x29, 232]
orr x1, x1, x4
str x1, [x29, 232]
mov x1, x2
lsl x1, x1, 6
str x1, [x29, 224]
sxtw x0, w0
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L940:
cmp sp, x1
beq .L941
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L940
.L941:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L942
str xzr, [sp, 1024]
.L942:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 480]
str wzr, [x29, 352]
b .L943
.L944:
ldr x0, [x29, 448]
ldrsw x1, [x29, 352]
str xzr, [x0, x1, lsl 3]
ldr w0, [x29, 352]
add w0, w0, 1
str w0, [x29, 352]
.L943:
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 800]
ldr w1, [x29, 352]
cmp w1, w0
blt .L944
str wzr, [x29, 352]
b .L945
.L946:
ldr x0, [x29, 464]
ldrsw x1, [x29, 352]
str xzr, [x0, x1, lsl 3]
ldr w0, [x29, 352]
add w0, w0, 1
str w0, [x29, 352]
.L945:
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 1608]
ldr w1, [x29, 352]
cmp w1, w0
blt .L946
str wzr, [x29, 352]
b .L947
.L948:
ldr x0, [x29, 480]
ldrsw x1, [x29, 352]
str xzr, [x0, x1, lsl 3]
ldr w0, [x29, 352]
add w0, w0, 1
str w0, [x29, 352]
.L947:
ldr w1, [x29, 352]
ldr w0, [x29, 356]
cmp w1, w0
blt .L948
str wzr, [x29, 352]
b .L949
.L950:
ldr w2, [x29, 356]
ldr x1, [x29, 480]
mov x0, 0
bl shiftR
ldr x0, [x29, 432]
ldrsw x1, [x29, 352]
ldr x1, [x0, x1, lsl 3]
adrp x0, ds
add x0, x0, :lo12:ds
ldr w2, [x0, 800]
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 1608]
mov w5, w0
mov w4, w2
ldr x3, [x29, 384]
ldr x2, [x29, 368]
ldr x0, [x29, 480]
bl fxp_direct_form_2
mov x2, x0
ldr x0, [x29, 416]
ldrsw x1, [x29, 352]
str x2, [x0, x1, lsl 3]
ldr w0, [x29, 352]
add w0, w0, 1
str w0, [x29, 352]
.L949:
adrp x0, X_SIZE_VALUE
add x0, x0, :lo12:X_SIZE_VALUE
ldr w0, [x0]
ldr w1, [x29, 352]
cmp w1, w0
blt .L950
adrp x0, overflow_mode
add x0, x0, :lo12:overflow_mode
mov w1, 1
str w1, [x0]
adrp x0, X_SIZE_VALUE
add x0, x0, :lo12:X_SIZE_VALUE
ldr w0, [x0]
mov w1, w0
ldr x0, [x29, 416]
bl fxp_verify_overflow_array
mov w0, 0
mov sp, x19
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [x29, 488]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L952
bl __stack_chk_fail
.L952:
mov w0, w1
mov sp, x29
ldp x19, x20, [sp, 16]
ldp x21, x22, [sp, 32]
ldp x23, x24, [sp, 48]
ldp x25, x26, [sp, 64]
ldr x27, [sp, 80]
ldp x29, x30, [sp], 496
.cfi_restore 30
.cfi_restore 29
.cfi_restore 27
.cfi_restore 25
.cfi_restore 26
.cfi_restore 23
.cfi_restore 24
.cfi_restore 21
.cfi_restore 22
.cfi_restore 19
.cfi_restore 20
.cfi_def_cfa 31, 0
ret
.cfi_endproc
.LFE130:
.size verify_overflow, .-verify_overflow
.section .rodata
.align 3
.LC43:
.string "#matrix STATES -------------------------------"
.align 3
.LC44:
.string "#matrix OUTPUTS -------------------------------"
.align 3
.LC45:
.string "/home/yashchopda/Desktop/dsverifier-v2.0.3-esbmc-v4.0-cbmc-5.6/bmc/engine/verify_limit_cycle.h"
.text
.align 2
.global verify_limit_cycle_state_space
.type verify_limit_cycle_state_space, %function
verify_limit_cycle_state_space:
.LFB131:
.cfi_startproc
sub sp, sp, #560
.cfi_def_cfa_offset 560
stp x29, x30, [sp]
.cfi_offset 29, -560
.cfi_offset 30, -552
mov x29, sp
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 552]
mov x1, 0
str wzr, [sp, 32]
b .L954
.L957:
str wzr, [sp, 28]
b .L955
.L956:
ldrsw x0, [sp, 28]
ldrsw x1, [sp, 32]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 296
str xzr, [x1, x0]
ldrsw x0, [sp, 28]
ldrsw x1, [sp, 32]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 424
str xzr, [x1, x0]
ldrsw x0, [sp, 28]
ldrsw x1, [sp, 32]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 40
str xzr, [x1, x0]
ldrsw x0, [sp, 28]
ldrsw x1, [sp, 32]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 168
str xzr, [x1, x0]
ldr w0, [sp, 28]
add w0, w0, 1
str w0, [sp, 28]
.L955:
ldr w0, [sp, 28]
cmp w0, 3
ble .L956
ldr w0, [sp, 32]
add w0, w0, 1
str w0, [sp, 32]
.L954:
ldr w0, [sp, 32]
cmp w0, 3
ble .L957
adrp x0, :got:nOutputs
ldr x0, [x0, #:got_lo12:nOutputs]
ldr w0, [x0]
mov w7, w0
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w1, w0
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w2, w0
add x0, sp, 296
mov x6, x0
adrp x0, :got:_controller
ldr x0, [x0, #:got_lo12:_controller]
add x5, x0, 512
adrp x0, :got:_controller
ldr x0, [x0, #:got_lo12:_controller]
add x4, x0, 256
mov w3, 1
mov w0, w7
bl double_matrix_multiplication
adrp x0, :got:nOutputs
ldr x0, [x0, #:got_lo12:nOutputs]
ldr w0, [x0]
mov w7, w0
adrp x0, :got:nInputs
ldr x0, [x0, #:got_lo12:nInputs]
ldr w0, [x0]
mov w1, w0
adrp x0, :got:nInputs
ldr x0, [x0, #:got_lo12:nInputs]
ldr w0, [x0]
mov w2, w0
add x0, sp, 424
mov x6, x0
adrp x0, :got:_controller
ldr x0, [x0, #:got_lo12:_controller]
add x5, x0, 768
adrp x0, :got:_controller
ldr x0, [x0, #:got_lo12:_controller]
add x4, x0, 384
mov w3, 1
mov w0, w7
bl double_matrix_multiplication
adrp x0, :got:nOutputs
ldr x0, [x0, #:got_lo12:nOutputs]
ldr w0, [x0]
mov w5, w0
add x2, sp, 424
add x1, sp, 296
adrp x0, :got:_controller
ldr x0, [x0, #:got_lo12:_controller]
add x4, x0, 640
mov x3, x2
mov x2, x1
mov w1, 1
mov w0, w5
bl double_add_matrix
str wzr, [sp, 24]
mov w0, 1
str w0, [sp, 32]
b .L958
.L963:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w7, w0
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w1, w0
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w2, w0
add x0, sp, 296
mov x6, x0
adrp x0, :got:_controller
ldr x0, [x0, #:got_lo12:_controller]
add x5, x0, 512
adrp x0, :got:_controller
ldr x4, [x0, #:got_lo12:_controller]
mov w3, 1
mov w0, w7
bl double_matrix_multiplication
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w7, w0
adrp x0, :got:nInputs
ldr x0, [x0, #:got_lo12:nInputs]
ldr w0, [x0]
mov w1, w0
adrp x0, :got:nInputs
ldr x0, [x0, #:got_lo12:nInputs]
ldr w0, [x0]
mov w2, w0
add x0, sp, 424
mov x6, x0
adrp x0, :got:_controller
ldr x0, [x0, #:got_lo12:_controller]
add x5, x0, 768
adrp x0, :got:_controller
ldr x0, [x0, #:got_lo12:_controller]
add x4, x0, 128
mov w3, 1
mov w0, w7
bl double_matrix_multiplication
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w5, w0
add x2, sp, 424
add x1, sp, 296
adrp x0, :got:_controller
ldr x0, [x0, #:got_lo12:_controller]
add x4, x0, 512
mov x3, x2
mov x2, x1
mov w1, 1
mov w0, w5
bl double_add_matrix
adrp x0, :got:nOutputs
ldr x0, [x0, #:got_lo12:nOutputs]
ldr w0, [x0]
mov w7, w0
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w1, w0
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w2, w0
add x0, sp, 296
mov x6, x0
adrp x0, :got:_controller
ldr x0, [x0, #:got_lo12:_controller]
add x5, x0, 512
adrp x0, :got:_controller
ldr x0, [x0, #:got_lo12:_controller]
add x4, x0, 256
mov w3, 1
mov w0, w7
bl double_matrix_multiplication
adrp x0, :got:nOutputs
ldr x0, [x0, #:got_lo12:nOutputs]
ldr w0, [x0]
mov w7, w0
adrp x0, :got:nInputs
ldr x0, [x0, #:got_lo12:nInputs]
ldr w0, [x0]
mov w1, w0
adrp x0, :got:nInputs
ldr x0, [x0, #:got_lo12:nInputs]
ldr w0, [x0]
mov w2, w0
add x0, sp, 424
mov x6, x0
adrp x0, :got:_controller
ldr x0, [x0, #:got_lo12:_controller]
add x5, x0, 768
adrp x0, :got:_controller
ldr x0, [x0, #:got_lo12:_controller]
add x4, x0, 384
mov w3, 1
mov w0, w7
bl double_matrix_multiplication
adrp x0, :got:nOutputs
ldr x0, [x0, #:got_lo12:nOutputs]
ldr w0, [x0]
mov w5, w0
add x2, sp, 424
add x1, sp, 296
adrp x0, :got:_controller
ldr x0, [x0, #:got_lo12:_controller]
add x4, x0, 640
mov x3, x2
mov x2, x1
mov w1, 1
mov w0, w5
bl double_add_matrix
str wzr, [sp, 36]
b .L959
.L960:
adrp x0, :got:_controller
ldr x1, [x0, #:got_lo12:_controller]
ldrsw x0, [sp, 36]
add x0, x0, 16
lsl x0, x0, 5
add x0, x1, x0
ldr d0, [x0]
ldrsw x0, [sp, 24]
ldrsw x1, [sp, 36]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 40
str d0, [x1, x0]
ldr w0, [sp, 36]
add w0, w0, 1
str w0, [sp, 36]
.L959:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
ldr w1, [sp, 36]
cmp w1, w0
blt .L960
str wzr, [sp, 36]
b .L961
.L962:
adrp x0, :got:_controller
ldr x1, [x0, #:got_lo12:_controller]
ldrsw x0, [sp, 36]
add x0, x0, 20
lsl x0, x0, 5
add x0, x1, x0
ldr d0, [x0]
ldrsw x0, [sp, 24]
ldrsw x1, [sp, 36]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 40
str d0, [x1, x0]
ldr w0, [sp, 36]
add w0, w0, 1
str w0, [sp, 36]
.L961:
adrp x0, :got:nOutputs
ldr x0, [x0, #:got_lo12:nOutputs]
ldr w0, [x0]
ldr w1, [sp, 36]
cmp w1, w0
blt .L962
ldr w0, [sp, 24]
add w0, w0, 1
str w0, [sp, 24]
ldr w0, [sp, 32]
add w0, w0, 1
str w0, [sp, 32]
.L958:
ldr w0, [sp, 32]
cmp w0, 0
blt .L963
adrp x0, .LC43
add x0, x0, :lo12:.LC43
bl printf
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w1, w0
add x0, sp, 40
mov w2, 0
bl print_matrix
adrp x0, .LC44
add x0, x0, :lo12:.LC44
bl printf
adrp x0, :got:nOutputs
ldr x0, [x0, #:got_lo12:nOutputs]
ldr w0, [x0]
mov w1, w0
add x0, sp, 168
mov w2, 0
bl print_matrix
adrp x0, __PRETTY_FUNCTION__.8
add x3, x0, :lo12:__PRETTY_FUNCTION__.8
mov w2, 93
adrp x0, .LC45
add x1, x0, :lo12:.LC45
adrp x0, .LC37
add x0, x0, :lo12:.LC37
bl __assert_fail
.cfi_endproc
.LFE131:
.size verify_limit_cycle_state_space, .-verify_limit_cycle_state_space
.section .rodata
.align 3
.LC46:
.string "X_SIZE must be at least 2 * ds.a_size"
.text
.align 2
.global verify_limit_cycle
.type verify_limit_cycle, %function
verify_limit_cycle:
.LFB132:
.cfi_startproc
sub sp, sp, #816
.cfi_def_cfa_offset 816
stp x29, x30, [sp, 16]
.cfi_offset 29, -800
.cfi_offset 30, -792
add x29, sp, 16
.cfi_def_cfa 29, 800
stp x19, x20, [sp, 32]
stp x21, x22, [sp, 48]
stp x23, x24, [sp, 64]
stp x25, x26, [sp, 80]
str x27, [sp, 96]
.cfi_offset 19, -784
.cfi_offset 20, -776
.cfi_offset 21, -768
.cfi_offset 22, -760
.cfi_offset 23, -752
.cfi_offset 24, -744
.cfi_offset 25, -736
.cfi_offset 26, -728
.cfi_offset 27, -720
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [x29, 792]
mov x1, 0
mov x0, sp
mov x19, x0
adrp x0, overflow_mode
add x1, x0, :lo12:overflow_mode
mov w0, 3
str w0, [x1]
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 800]
lsl w0, w0, 1
str w0, [x29, 620]
adrp x0, .LC46
add x0, x0, :lo12:.LC46
bl printf
adrp x0, X_SIZE_VALUE
add x0, x0, :lo12:X_SIZE_VALUE
ldr w1, [x0]
ldr w0, [x29, 620]
cmp w0, w1
cset w0, le
and w0, w0, 255
bl __DSVERIFIER_assert
adrp x0, ds
add x0, x0, :lo12:ds
ldr w1, [x0, 800]
sxtw x0, w1
sub x0, x0, #1
str x0, [x29, 632]
sxtw x0, w1
mov x22, x0
mov x23, 0
lsr x0, x22, 58
lsl x21, x23, 6
orr x21, x0, x21
lsl x20, x22, 6
sxtw x0, w1
mov x26, x0
mov x27, 0
lsr x0, x26, 58
lsl x25, x27, 6
orr x25, x0, x25
lsl x24, x26, 6
sxtw x0, w1
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x1, x0, 4
and x0, x1, -65536
sub x0, sp, x0
.L966:
cmp sp, x0
beq .L967
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L966
.L967:
and x0, x1, 65535
sub sp, sp, x0
str xzr, [sp]
and x0, x1, 65535
cmp x0, 1024
bcc .L968
str xzr, [sp, 1024]
.L968:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 640]
adrp x0, ds
add x0, x0, :lo12:ds
ldr w1, [x0, 1608]
sxtw x0, w1
sub x0, x0, #1
str x0, [x29, 648]
sxtw x0, w1
str x0, [x29, 336]
str xzr, [x29, 344]
ldp x2, x3, [x29, 336]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 600]
ldr x4, [x29, 600]
orr x0, x0, x4
str x0, [x29, 600]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 592]
sxtw x0, w1
str x0, [x29, 320]
str xzr, [x29, 328]
ldp x2, x3, [x29, 320]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 584]
ldr x4, [x29, 584]
orr x0, x0, x4
str x0, [x29, 584]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 576]
sxtw x0, w1
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x1, x0, 4
and x0, x1, -65536
sub x0, sp, x0
.L969:
cmp sp, x0
beq .L970
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L969
.L970:
and x0, x1, 65535
sub sp, sp, x0
str xzr, [sp]
and x0, x1, 65535
cmp x0, 1024
bcc .L971
str xzr, [sp, 1024]
.L971:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 656]
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 800]
mov w2, w0
ldr x1, [x29, 640]
adrp x0, ds
add x0, x0, :lo12:ds
bl fxp_double_to_fxp_array
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 1608]
mov w2, w0
ldr x1, [x29, 656]
adrp x0, ds+808
add x0, x0, :lo12:ds+808
bl fxp_double_to_fxp_array
adrp x0, X_SIZE_VALUE
add x0, x0, :lo12:X_SIZE_VALUE
ldr w1, [x0]
sxtw x0, w1
sub x0, x0, #1
str x0, [x29, 664]
sxtw x0, w1
str x0, [x29, 304]
str xzr, [x29, 312]
ldp x2, x3, [x29, 304]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 568]
ldr x4, [x29, 568]
orr x0, x0, x4
str x0, [x29, 568]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 560]
sxtw x0, w1
str x0, [x29, 288]
str xzr, [x29, 296]
ldp x2, x3, [x29, 288]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 552]
ldr x4, [x29, 552]
orr x0, x0, x4
str x0, [x29, 552]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 544]
sxtw x0, w1
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x1, x0, 4
and x0, x1, -65536
sub x0, sp, x0
.L972:
cmp sp, x0
beq .L973
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L972
.L973:
and x0, x1, 65535
sub sp, sp, x0
str xzr, [sp]
and x0, x1, 65535
cmp x0, 1024
bcc .L974
str xzr, [sp, 1024]
.L974:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 672]
adrp x0, X_SIZE_VALUE
add x0, x0, :lo12:X_SIZE_VALUE
ldr w1, [x0]
sxtw x0, w1
sub x0, x0, #1
str x0, [x29, 680]
sxtw x0, w1
str x0, [x29, 272]
str xzr, [x29, 280]
ldp x2, x3, [x29, 272]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 536]
ldr x4, [x29, 536]
orr x0, x0, x4
str x0, [x29, 536]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 528]
sxtw x0, w1
str x0, [x29, 256]
str xzr, [x29, 264]
ldp x2, x3, [x29, 256]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 520]
ldr x4, [x29, 520]
orr x0, x0, x4
str x0, [x29, 520]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 512]
sxtw x0, w1
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x1, x0, 4
and x0, x1, -65536
sub x0, sp, x0
.L975:
cmp sp, x0
beq .L976
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L975
.L976:
and x0, x1, 65535
sub sp, sp, x0
str xzr, [sp]
and x0, x1, 65535
cmp x0, 1024
bcc .L977
str xzr, [sp, 1024]
.L977:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 688]
adrp x0, impl
add x0, x0, :lo12:impl
ldr d0, [x0, 16]
bl fxp_double_to_fxp
str x0, [x29, 696]
adrp x0, impl
add x0, x0, :lo12:impl
ldr d0, [x0, 8]
bl fxp_double_to_fxp
str x0, [x29, 704]
adrp x0, ds
add x0, x0, :lo12:ds
ldr w1, [x0, 1608]
sxtw x0, w1
sub x0, x0, #1
str x0, [x29, 712]
sxtw x0, w1
str x0, [x29, 240]
str xzr, [x29, 248]
ldp x2, x3, [x29, 240]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 504]
ldr x4, [x29, 504]
orr x0, x0, x4
str x0, [x29, 504]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 496]
sxtw x0, w1
str x0, [x29, 224]
str xzr, [x29, 232]
ldp x2, x3, [x29, 224]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 488]
ldr x4, [x29, 488]
orr x0, x0, x4
str x0, [x29, 488]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 480]
sxtw x0, w1
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x1, x0, 4
and x0, x1, -65536
sub x0, sp, x0
.L978:
cmp sp, x0
beq .L979
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L978
.L979:
and x0, x1, 65535
sub sp, sp, x0
str xzr, [sp]
and x0, x1, 65535
cmp x0, 1024
bcc .L980
str xzr, [sp, 1024]
.L980:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 720]
bl nondet_int
str w0, [x29, 624]
ldrsw x1, [x29, 624]
ldr x0, [x29, 696]
cmp x0, x1
bgt .L981
ldrsw x1, [x29, 624]
ldr x0, [x29, 704]
cmp x0, x1
blt .L981
mov w0, 1
b .L982
.L981:
mov w0, 0
.L982:
and w0, w0, 1
and w0, w0, 255
bl __DSVERIFIER_assume
str wzr, [x29, 616]
b .L983
.L984:
ldrsw x2, [x29, 624]
ldr x1, [x29, 688]
ldrsw x0, [x29, 616]
str x2, [x1, x0, lsl 3]
ldr x1, [x29, 672]
ldrsw x0, [x29, 616]
str xzr, [x1, x0, lsl 3]
ldr w0, [x29, 616]
add w0, w0, 1
str w0, [x29, 616]
.L983:
adrp x0, X_SIZE_VALUE
add x0, x0, :lo12:X_SIZE_VALUE
ldr w1, [x0]
ldr w0, [x29, 616]
cmp w0, w1
blt .L984
str wzr, [x29, 616]
b .L985
.L986:
ldrsw x2, [x29, 624]
ldr x1, [x29, 720]
ldrsw x0, [x29, 616]
str x2, [x1, x0, lsl 3]
ldr w0, [x29, 616]
add w0, w0, 1
str w0, [x29, 616]
.L985:
adrp x0, ds
add x0, x0, :lo12:ds
ldr w1, [x0, 1608]
ldr w0, [x29, 616]
cmp w0, w1
blt .L986
str wzr, [x29, 628]
adrp x0, ds
add x0, x0, :lo12:ds
ldr w1, [x0, 1608]
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 800]
cmp w1, w0
csel w0, w1, w0, ge
str w0, [x29, 628]
adrp x0, ds
add x0, x0, :lo12:ds
ldr w1, [x0, 800]
sxtw x0, w1
sub x0, x0, #1
str x0, [x29, 728]
sxtw x0, w1
str x0, [x29, 208]
str xzr, [x29, 216]
ldp x2, x3, [x29, 208]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 472]
ldr x4, [x29, 472]
orr x0, x0, x4
str x0, [x29, 472]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 464]
sxtw x0, w1
str x0, [x29, 192]
str xzr, [x29, 200]
ldp x2, x3, [x29, 192]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 456]
ldr x4, [x29, 456]
orr x0, x0, x4
str x0, [x29, 456]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 448]
sxtw x0, w1
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L987:
cmp sp, x1
beq .L988
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L987
.L988:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L989
str xzr, [sp, 1024]
.L989:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 736]
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 800]
sxtw x1, w0
sub x1, x1, #1
str x1, [x29, 744]
sxtw x1, w0
str x1, [x29, 176]
str xzr, [x29, 184]
ldp x2, x3, [x29, 176]
mov x1, x2
lsr x1, x1, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 440]
ldr x4, [x29, 440]
orr x1, x1, x4
str x1, [x29, 440]
mov x1, x2
lsl x1, x1, 6
str x1, [x29, 432]
sxtw x1, w0
str x1, [x29, 160]
str xzr, [x29, 168]
ldp x2, x3, [x29, 160]
mov x1, x2
lsr x1, x1, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 424]
ldr x4, [x29, 424]
orr x1, x1, x4
str x1, [x29, 424]
mov x1, x2
lsl x1, x1, 6
str x1, [x29, 416]
sxtw x0, w0
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L990:
cmp sp, x1
beq .L991
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L990
.L991:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L992
str xzr, [sp, 1024]
.L992:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 752]
ldr w0, [x29, 628]
sxtw x1, w0
sub x1, x1, #1
str x1, [x29, 760]
sxtw x1, w0
str x1, [x29, 144]
str xzr, [x29, 152]
ldp x2, x3, [x29, 144]
mov x1, x2
lsr x1, x1, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 408]
ldr x4, [x29, 408]
orr x1, x1, x4
str x1, [x29, 408]
mov x1, x2
lsl x1, x1, 6
str x1, [x29, 400]
sxtw x1, w0
str x1, [x29, 128]
str xzr, [x29, 136]
ldp x2, x3, [x29, 128]
mov x1, x2
lsr x1, x1, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 392]
ldr x4, [x29, 392]
orr x1, x1, x4
str x1, [x29, 392]
mov x1, x2
lsl x1, x1, 6
str x1, [x29, 384]
sxtw x0, w0
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L993:
cmp sp, x1
beq .L994
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L993
.L994:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L995
str xzr, [sp, 1024]
.L995:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 768]
ldr w0, [x29, 628]
sxtw x1, w0
sub x1, x1, #1
str x1, [x29, 776]
sxtw x1, w0
str x1, [x29, 112]
str xzr, [x29, 120]
ldp x2, x3, [x29, 112]
mov x1, x2
lsr x1, x1, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 376]
ldr x4, [x29, 376]
orr x1, x1, x4
str x1, [x29, 376]
mov x1, x2
lsl x1, x1, 6
str x1, [x29, 368]
sxtw x1, w0
str x1, [x29, 96]
str xzr, [x29, 104]
ldp x2, x3, [x29, 96]
mov x1, x2
lsr x1, x1, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 360]
ldr x4, [x29, 360]
orr x1, x1, x4
str x1, [x29, 360]
mov x1, x2
lsl x1, x1, 6
str x1, [x29, 352]
sxtw x0, w0
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L996:
cmp sp, x1
beq .L997
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L996
.L997:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L998
str xzr, [sp, 1024]
.L998:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 784]
str wzr, [x29, 616]
b .L999
.L1002:
bl nondet_int
sxtw x2, w0
ldr x0, [x29, 768]
ldrsw x1, [x29, 616]
str x2, [x0, x1, lsl 3]
ldr x0, [x29, 768]
ldrsw x1, [x29, 616]
ldr x0, [x0, x1, lsl 3]
ldr x1, [x29, 696]
cmp x1, x0
bgt .L1000
ldr x0, [x29, 768]
ldrsw x1, [x29, 616]
ldr x0, [x0, x1, lsl 3]
ldr x1, [x29, 704]
cmp x1, x0
blt .L1000
mov w0, 1
b .L1001
.L1000:
mov w0, 0
.L1001:
and w0, w0, 1
and w0, w0, 255
bl __DSVERIFIER_assume
ldr x0, [x29, 768]
ldrsw x1, [x29, 616]
ldr x2, [x0, x1, lsl 3]
ldr x0, [x29, 784]
ldrsw x1, [x29, 616]
str x2, [x0, x1, lsl 3]
ldr w0, [x29, 616]
add w0, w0, 1
str w0, [x29, 616]
.L999:
ldr w1, [x29, 616]
ldr w0, [x29, 628]
cmp w1, w0
blt .L1002
str wzr, [x29, 616]
b .L1003
.L1004:
ldr w2, [x29, 628]
ldr x1, [x29, 768]
mov x0, 0
bl shiftR
ldr x0, [x29, 688]
ldrsw x1, [x29, 616]
ldr x1, [x0, x1, lsl 3]
adrp x0, ds
add x0, x0, :lo12:ds
ldr w2, [x0, 800]
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 1608]
mov w5, w0
mov w4, w2
ldr x3, [x29, 656]
ldr x2, [x29, 640]
ldr x0, [x29, 768]
bl fxp_direct_form_2
mov x2, x0
ldr x0, [x29, 672]
ldrsw x1, [x29, 616]
str x2, [x0, x1, lsl 3]
ldr w0, [x29, 616]
add w0, w0, 1
str w0, [x29, 616]
.L1003:
adrp x0, X_SIZE_VALUE
add x0, x0, :lo12:X_SIZE_VALUE
ldr w0, [x0]
ldr w1, [x29, 616]
cmp w1, w0
blt .L1004
adrp x0, X_SIZE_VALUE
add x0, x0, :lo12:X_SIZE_VALUE
ldr w0, [x0]
mov w1, w0
ldr x0, [x29, 672]
bl fxp_check_persistent_limit_cycle
mov w0, 0
mov sp, x19
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [x29, 792]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L1006
bl __stack_chk_fail
.L1006:
mov w0, w1
sub sp, x29, #16
.cfi_def_cfa 31, 816
ldp x19, x20, [sp, 32]
ldp x21, x22, [sp, 48]
ldp x23, x24, [sp, 64]
ldp x25, x26, [sp, 80]
ldr x27, [sp, 96]
ldp x29, x30, [sp, 16]
add sp, sp, 816
.cfi_restore 29
.cfi_restore 30
.cfi_restore 27
.cfi_restore 25
.cfi_restore 26
.cfi_restore 23
.cfi_restore 24
.cfi_restore 21
.cfi_restore 22
.cfi_restore 19
.cfi_restore 20
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE132:
.size verify_limit_cycle, .-verify_limit_cycle
.align 2
.global verify_error
.type verify_error, %function
verify_error:
.LFB133:
.cfi_startproc
sub sp, sp, #1728
.cfi_def_cfa_offset 1728
stp x29, x30, [sp, 16]
.cfi_offset 29, -1712
.cfi_offset 30, -1704
add x29, sp, 16
.cfi_def_cfa 29, 1712
stp x19, x20, [sp, 32]
stp x21, x22, [sp, 48]
stp x23, x24, [sp, 64]
stp x25, x26, [sp, 80]
str x27, [sp, 96]
str d8, [sp, 104]
.cfi_offset 19, -1696
.cfi_offset 20, -1688
.cfi_offset 21, -1680
.cfi_offset 22, -1672
.cfi_offset 23, -1664
.cfi_offset 24, -1656
.cfi_offset 25, -1648
.cfi_offset 26, -1640
.cfi_offset 27, -1632
.cfi_offset 72, -1624
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [x29, 1704]
mov x1, 0
mov x0, sp
mov x19, x0
adrp x0, overflow_mode
add x1, x0, :lo12:overflow_mode
mov w0, 2
str w0, [x1]
adrp x0, ds
add x0, x0, :lo12:ds
ldr w1, [x0, 800]
sxtw x0, w1
sub x0, x0, #1
str x0, [x29, 688]
sxtw x0, w1
mov x4, x0
mov x5, 0
lsr x0, x4, 58
lsl x3, x5, 6
orr x3, x0, x3
lsl x2, x4, 6
sxtw x0, w1
mov x8, x0
mov x9, 0
lsr x0, x8, 58
lsl x7, x9, 6
orr x7, x0, x7
lsl x6, x8, 6
sxtw x0, w1
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x1, x0, 4
and x0, x1, -65536
sub x0, sp, x0
.L1008:
cmp sp, x0
beq .L1009
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1008
.L1009:
and x0, x1, 65535
sub sp, sp, x0
str xzr, [sp]
and x0, x1, 65535
cmp x0, 1024
bcc .L1010
str xzr, [sp, 1024]
.L1010:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 696]
adrp x0, ds
add x0, x0, :lo12:ds
ldr w1, [x0, 1608]
sxtw x0, w1
sub x0, x0, #1
str x0, [x29, 704]
sxtw x0, w1
mov x14, x0
mov x15, 0
lsr x0, x14, 58
lsl x11, x15, 6
orr x11, x0, x11
lsl x10, x14, 6
sxtw x0, w1
mov x16, x0
mov x17, 0
lsr x0, x16, 58
lsl x13, x17, 6
orr x13, x0, x13
lsl x12, x16, 6
sxtw x0, w1
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x1, x0, 4
and x0, x1, -65536
sub x0, sp, x0
.L1011:
cmp sp, x0
beq .L1012
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1011
.L1012:
and x0, x1, 65535
sub sp, sp, x0
str xzr, [sp]
and x0, x1, 65535
cmp x0, 1024
bcc .L1013
str xzr, [sp, 1024]
.L1013:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 712]
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 800]
mov w2, w0
ldr x1, [x29, 696]
adrp x0, ds
add x0, x0, :lo12:ds
bl fxp_double_to_fxp_array
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 1608]
mov w2, w0
ldr x1, [x29, 712]
adrp x0, ds+808
add x0, x0, :lo12:ds+808
bl fxp_double_to_fxp_array
adrp x0, impl
add x0, x0, :lo12:impl
ldr d0, [x0, 16]
bl fxp_double_to_fxp
str x0, [x29, 720]
adrp x0, impl
add x0, x0, :lo12:impl
ldr d0, [x0, 8]
bl fxp_double_to_fxp
str x0, [x29, 728]
adrp x0, X_SIZE_VALUE
add x0, x0, :lo12:X_SIZE_VALUE
ldr w1, [x0]
sxtw x0, w1
sub x0, x0, #1
str x0, [x29, 736]
sxtw x0, w1
mov x24, x0
mov x25, 0
lsr x0, x24, 58
lsl x21, x25, 6
orr x21, x0, x21
lsl x20, x24, 6
sxtw x0, w1
mov x26, x0
mov x27, 0
lsr x0, x26, 58
lsl x23, x27, 6
orr x23, x0, x23
lsl x22, x26, 6
sxtw x0, w1
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x1, x0, 4
and x0, x1, -65536
sub x0, sp, x0
.L1014:
cmp sp, x0
beq .L1015
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1014
.L1015:
and x0, x1, 65535
sub sp, sp, x0
str xzr, [sp]
and x0, x1, 65535
cmp x0, 1024
bcc .L1016
str xzr, [sp, 1024]
.L1016:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 744]
adrp x0, X_SIZE_VALUE
add x0, x0, :lo12:X_SIZE_VALUE
ldr w1, [x0]
sxtw x0, w1
sub x0, x0, #1
str x0, [x29, 752]
sxtw x0, w1
str x0, [x29, 368]
str xzr, [x29, 376]
ldp x2, x3, [x29, 368]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 664]
ldr x4, [x29, 664]
orr x0, x0, x4
str x0, [x29, 664]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 656]
sxtw x0, w1
str x0, [x29, 352]
str xzr, [x29, 360]
ldp x2, x3, [x29, 352]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 648]
ldr x4, [x29, 648]
orr x0, x0, x4
str x0, [x29, 648]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 640]
sxtw x0, w1
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x1, x0, 4
and x0, x1, -65536
sub x0, sp, x0
.L1017:
cmp sp, x0
beq .L1018
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1017
.L1018:
and x0, x1, 65535
sub sp, sp, x0
str xzr, [sp]
and x0, x1, 65535
cmp x0, 1024
bcc .L1019
str xzr, [sp, 1024]
.L1019:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 760]
adrp x0, X_SIZE_VALUE
add x0, x0, :lo12:X_SIZE_VALUE
ldr w1, [x0]
sxtw x0, w1
sub x0, x0, #1
str x0, [x29, 768]
sxtw x0, w1
str x0, [x29, 336]
str xzr, [x29, 344]
ldp x2, x3, [x29, 336]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 632]
ldr x4, [x29, 632]
orr x0, x0, x4
str x0, [x29, 632]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 624]
sxtw x0, w1
str x0, [x29, 320]
str xzr, [x29, 328]
ldp x2, x3, [x29, 320]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 616]
ldr x4, [x29, 616]
orr x0, x0, x4
str x0, [x29, 616]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 608]
sxtw x0, w1
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x1, x0, 4
and x0, x1, -65536
sub x0, sp, x0
.L1020:
cmp sp, x0
beq .L1021
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1020
.L1021:
and x0, x1, 65535
sub sp, sp, x0
str xzr, [sp]
and x0, x1, 65535
cmp x0, 1024
bcc .L1022
str xzr, [sp, 1024]
.L1022:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 776]
adrp x0, X_SIZE_VALUE
add x0, x0, :lo12:X_SIZE_VALUE
ldr w1, [x0]
sxtw x0, w1
sub x0, x0, #1
str x0, [x29, 784]
sxtw x0, w1
str x0, [x29, 304]
str xzr, [x29, 312]
ldp x2, x3, [x29, 304]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 600]
ldr x4, [x29, 600]
orr x0, x0, x4
str x0, [x29, 600]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 592]
sxtw x0, w1
str x0, [x29, 288]
str xzr, [x29, 296]
ldp x2, x3, [x29, 288]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 584]
ldr x4, [x29, 584]
orr x0, x0, x4
str x0, [x29, 584]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 576]
sxtw x0, w1
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x1, x0, 4
and x0, x1, -65536
sub x0, sp, x0
.L1023:
cmp sp, x0
beq .L1024
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1023
.L1024:
and x0, x1, 65535
sub sp, sp, x0
str xzr, [sp]
and x0, x1, 65535
cmp x0, 1024
bcc .L1025
str xzr, [sp, 1024]
.L1025:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 792]
str wzr, [x29, 684]
adrp x0, ds
add x0, x0, :lo12:ds
ldr w1, [x0, 1608]
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 800]
cmp w1, w0
csel w0, w1, w0, ge
str w0, [x29, 684]
adrp x0, ds
add x0, x0, :lo12:ds
ldr w1, [x0, 800]
sxtw x0, w1
sub x0, x0, #1
str x0, [x29, 800]
sxtw x0, w1
str x0, [x29, 272]
str xzr, [x29, 280]
ldp x2, x3, [x29, 272]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 568]
ldr x4, [x29, 568]
orr x0, x0, x4
str x0, [x29, 568]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 560]
sxtw x0, w1
str x0, [x29, 256]
str xzr, [x29, 264]
ldp x2, x3, [x29, 256]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 552]
ldr x4, [x29, 552]
orr x0, x0, x4
str x0, [x29, 552]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 544]
sxtw x0, w1
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x1, x0, 4
and x0, x1, -65536
sub x0, sp, x0
.L1026:
cmp sp, x0
beq .L1027
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1026
.L1027:
and x0, x1, 65535
sub sp, sp, x0
str xzr, [sp]
and x0, x1, 65535
cmp x0, 1024
bcc .L1028
str xzr, [sp, 1024]
.L1028:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 808]
adrp x0, ds
add x0, x0, :lo12:ds
ldr w1, [x0, 1608]
sxtw x0, w1
sub x0, x0, #1
str x0, [x29, 816]
sxtw x0, w1
str x0, [x29, 240]
str xzr, [x29, 248]
ldp x2, x3, [x29, 240]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 536]
ldr x4, [x29, 536]
orr x0, x0, x4
str x0, [x29, 536]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 528]
sxtw x0, w1
str x0, [x29, 224]
str xzr, [x29, 232]
ldp x2, x3, [x29, 224]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 520]
ldr x4, [x29, 520]
orr x0, x0, x4
str x0, [x29, 520]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 512]
sxtw x0, w1
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x1, x0, 4
and x0, x1, -65536
sub x0, sp, x0
.L1029:
cmp sp, x0
beq .L1030
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1029
.L1030:
and x0, x1, 65535
sub sp, sp, x0
str xzr, [sp]
and x0, x1, 65535
cmp x0, 1024
bcc .L1031
str xzr, [sp, 1024]
.L1031:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 824]
ldr w1, [x29, 684]
sxtw x0, w1
sub x0, x0, #1
str x0, [x29, 832]
sxtw x0, w1
str x0, [x29, 208]
str xzr, [x29, 216]
ldp x2, x3, [x29, 208]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 504]
ldr x4, [x29, 504]
orr x0, x0, x4
str x0, [x29, 504]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 496]
sxtw x0, w1
str x0, [x29, 192]
str xzr, [x29, 200]
ldp x2, x3, [x29, 192]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 488]
ldr x4, [x29, 488]
orr x0, x0, x4
str x0, [x29, 488]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 480]
sxtw x0, w1
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L1032:
cmp sp, x1
beq .L1033
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1032
.L1033:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L1034
str xzr, [sp, 1024]
.L1034:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 840]
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 800]
sxtw x1, w0
sub x1, x1, #1
str x1, [x29, 848]
sxtw x1, w0
str x1, [x29, 176]
str xzr, [x29, 184]
ldp x2, x3, [x29, 176]
mov x1, x2
lsr x1, x1, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 472]
ldr x4, [x29, 472]
orr x1, x1, x4
str x1, [x29, 472]
mov x1, x2
lsl x1, x1, 6
str x1, [x29, 464]
sxtw x1, w0
str x1, [x29, 160]
str xzr, [x29, 168]
ldp x2, x3, [x29, 160]
mov x1, x2
lsr x1, x1, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 456]
ldr x4, [x29, 456]
orr x1, x1, x4
str x1, [x29, 456]
mov x1, x2
lsl x1, x1, 6
str x1, [x29, 448]
sxtw x0, w0
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L1035:
cmp sp, x1
beq .L1036
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1035
.L1036:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L1037
str xzr, [sp, 1024]
.L1037:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 856]
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 1608]
sxtw x1, w0
sub x1, x1, #1
str x1, [x29, 864]
sxtw x1, w0
str x1, [x29, 144]
str xzr, [x29, 152]
ldp x2, x3, [x29, 144]
mov x1, x2
lsr x1, x1, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 440]
ldr x4, [x29, 440]
orr x1, x1, x4
str x1, [x29, 440]
mov x1, x2
lsl x1, x1, 6
str x1, [x29, 432]
sxtw x1, w0
str x1, [x29, 128]
str xzr, [x29, 136]
ldp x2, x3, [x29, 128]
mov x1, x2
lsr x1, x1, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 424]
ldr x4, [x29, 424]
orr x1, x1, x4
str x1, [x29, 424]
mov x1, x2
lsl x1, x1, 6
str x1, [x29, 416]
sxtw x0, w0
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L1038:
cmp sp, x1
beq .L1039
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1038
.L1039:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L1040
str xzr, [sp, 1024]
.L1040:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 872]
ldr w0, [x29, 684]
sxtw x1, w0
sub x1, x1, #1
str x1, [x29, 880]
sxtw x1, w0
str x1, [x29, 112]
str xzr, [x29, 120]
ldp x2, x3, [x29, 112]
mov x1, x2
lsr x1, x1, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 408]
ldr x4, [x29, 408]
orr x1, x1, x4
str x1, [x29, 408]
mov x1, x2
lsl x1, x1, 6
str x1, [x29, 400]
sxtw x1, w0
str x1, [x29, 96]
str xzr, [x29, 104]
ldp x2, x3, [x29, 96]
mov x1, x2
lsr x1, x1, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 392]
ldr x4, [x29, 392]
orr x1, x1, x4
str x1, [x29, 392]
mov x1, x2
lsl x1, x1, 6
str x1, [x29, 384]
sxtw x0, w0
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L1041:
cmp sp, x1
beq .L1042
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1041
.L1042:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L1043
str xzr, [sp, 1024]
.L1043:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 888]
str wzr, [x29, 680]
b .L1044
.L1045:
ldr x0, [x29, 808]
ldrsw x1, [x29, 680]
str xzr, [x0, x1, lsl 3]
ldr x0, [x29, 856]
ldrsw x1, [x29, 680]
str xzr, [x0, x1, lsl 3]
ldr w0, [x29, 680]
add w0, w0, 1
str w0, [x29, 680]
.L1044:
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 800]
ldr w1, [x29, 680]
cmp w1, w0
blt .L1045
str wzr, [x29, 680]
b .L1046
.L1047:
ldr x0, [x29, 824]
ldrsw x1, [x29, 680]
str xzr, [x0, x1, lsl 3]
ldr x0, [x29, 872]
ldrsw x1, [x29, 680]
str xzr, [x0, x1, lsl 3]
ldr w0, [x29, 680]
add w0, w0, 1
str w0, [x29, 680]
.L1046:
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 1608]
ldr w1, [x29, 680]
cmp w1, w0
blt .L1047
str wzr, [x29, 680]
b .L1048
.L1049:
ldr x0, [x29, 840]
ldrsw x1, [x29, 680]
str xzr, [x0, x1, lsl 3]
ldr x0, [x29, 888]
ldrsw x1, [x29, 680]
str xzr, [x0, x1, lsl 3]
ldr w0, [x29, 680]
add w0, w0, 1
str w0, [x29, 680]
.L1048:
ldr w1, [x29, 680]
ldr w0, [x29, 684]
cmp w1, w0
blt .L1049
str wzr, [x29, 680]
b .L1050
.L1053:
ldr x0, [x29, 744]
ldrsw x1, [x29, 680]
str xzr, [x0, x1, lsl 3]
bl nondet_int
sxtw x2, w0
ldr x0, [x29, 760]
ldrsw x1, [x29, 680]
str x2, [x0, x1, lsl 3]
ldr x0, [x29, 760]
ldrsw x1, [x29, 680]
ldr x0, [x0, x1, lsl 3]
ldr x1, [x29, 720]
cmp x1, x0
bgt .L1051
ldr x0, [x29, 760]
ldrsw x1, [x29, 680]
ldr x0, [x0, x1, lsl 3]
ldr x1, [x29, 728]
cmp x1, x0
blt .L1051
mov w0, 1
b .L1052
.L1051:
mov w0, 0
.L1052:
and w0, w0, 1
and w0, w0, 255
bl __DSVERIFIER_assume
ldr x0, [x29, 776]
ldrsw x1, [x29, 680]
str xzr, [x0, x1, lsl 3]
ldr x0, [x29, 760]
ldrsw x1, [x29, 680]
ldr x0, [x0, x1, lsl 3]
bl fxp_to_double
ldr x0, [x29, 792]
ldrsw x1, [x29, 680]
str d0, [x0, x1, lsl 3]
ldr w0, [x29, 680]
add w0, w0, 1
str w0, [x29, 680]
.L1050:
adrp x0, X_SIZE_VALUE
add x0, x0, :lo12:X_SIZE_VALUE
ldr w0, [x0]
ldr w1, [x29, 680]
cmp w1, w0
blt .L1053
str wzr, [x29, 680]
b .L1054
.L1059:
ldr w3, [x29, 684]
ldr x2, [x29, 840]
mov x1, 0
ldr x0, [x29, 888]
movi v0.2s, #0
bl shiftRboth
ldr x0, [x29, 760]
ldrsw x1, [x29, 680]
ldr x1, [x0, x1, lsl 3]
adrp x0, ds
add x0, x0, :lo12:ds
ldr w2, [x0, 800]
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 1608]
mov w5, w0
mov w4, w2
ldr x3, [x29, 712]
ldr x2, [x29, 696]
ldr x0, [x29, 840]
bl fxp_direct_form_2
mov x2, x0
ldr x0, [x29, 744]
ldrsw x1, [x29, 680]
str x2, [x0, x1, lsl 3]
ldr x0, [x29, 792]
ldrsw x1, [x29, 680]
ldr d0, [x0, x1, lsl 3]
adrp x0, ds
add x0, x0, :lo12:ds
ldr w1, [x0, 800]
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 1608]
mov w4, w0
mov w3, w1
adrp x0, ds+808
add x2, x0, :lo12:ds+808
adrp x0, ds
add x1, x0, :lo12:ds
ldr x0, [x29, 888]
bl double_direct_form_2
ldr x0, [x29, 776]
ldrsw x1, [x29, 680]
str d0, [x0, x1, lsl 3]
ldr x0, [x29, 776]
ldrsw x1, [x29, 680]
ldr d8, [x0, x1, lsl 3]
ldr x0, [x29, 744]
ldrsw x1, [x29, 680]
ldr x0, [x0, x1, lsl 3]
bl fxp_to_double
fsub d0, d8, d0
str d0, [x29, 896]
adrp x0, impl
add x0, x0, :lo12:impl
ldr d0, [x0, 48]
ldr d1, [x29, 896]
fcmpe d1, d0
bmi .L1062
b .L1055
.L1062:
adrp x0, impl
add x0, x0, :lo12:impl
ldr d0, [x0, 48]
fneg d0, d0
ldr d1, [x29, 896]
fcmpe d1, d0
bgt .L1063
b .L1055
.L1063:
mov w0, 1
b .L1058
.L1055:
mov w0, 0
.L1058:
and w0, w0, 1
and w0, w0, 255
bl __DSVERIFIER_assert
ldr w0, [x29, 680]
add w0, w0, 1
str w0, [x29, 680]
.L1054:
adrp x0, X_SIZE_VALUE
add x0, x0, :lo12:X_SIZE_VALUE
ldr w0, [x0]
ldr w1, [x29, 680]
cmp w1, w0
blt .L1059
mov w0, 0
mov sp, x19
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [x29, 1704]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L1061
bl __stack_chk_fail
.L1061:
mov w0, w1
sub sp, x29, #16
.cfi_def_cfa 31, 1728
ldr d8, [sp, 104]
ldp x19, x20, [sp, 32]
ldp x21, x22, [sp, 48]
ldp x23, x24, [sp, 64]
ldp x25, x26, [sp, 80]
ldr x27, [sp, 96]
ldp x29, x30, [sp, 16]
add sp, sp, 1728
.cfi_restore 29
.cfi_restore 30
.cfi_restore 27
.cfi_restore 25
.cfi_restore 26
.cfi_restore 23
.cfi_restore 24
.cfi_restore 21
.cfi_restore 22
.cfi_restore 19
.cfi_restore 20
.cfi_restore 72
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE133:
.size verify_error, .-verify_error
.section .rodata
.align 3
.LC47:
.string "/home/yashchopda/Desktop/dsverifier-v2.0.3-esbmc-v4.0-cbmc-5.6/bmc/engine/verify_zero_input_limit_cycle.h"
.align 3
.LC48:
.string "X_SIZE_VALUE >= Set_xsize_at_least_two_times_Na"
.text
.align 2
.global verify_zero_input_limit_cycle
.type verify_zero_input_limit_cycle, %function
verify_zero_input_limit_cycle:
.LFB134:
.cfi_startproc
sub sp, sp, #816
.cfi_def_cfa_offset 816
stp x29, x30, [sp, 16]
.cfi_offset 29, -800
.cfi_offset 30, -792
add x29, sp, 16
.cfi_def_cfa 29, 800
stp x19, x20, [sp, 32]
stp x21, x22, [sp, 48]
stp x23, x24, [sp, 64]
stp x25, x26, [sp, 80]
str x27, [sp, 96]
.cfi_offset 19, -784
.cfi_offset 20, -776
.cfi_offset 21, -768
.cfi_offset 22, -760
.cfi_offset 23, -752
.cfi_offset 24, -744
.cfi_offset 25, -736
.cfi_offset 26, -728
.cfi_offset 27, -720
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [x29, 792]
mov x1, 0
mov x0, sp
mov x19, x0
adrp x0, overflow_mode
add x1, x0, :lo12:overflow_mode
mov w0, 3
str w0, [x1]
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 800]
lsl w0, w0, 1
str w0, [x29, 624]
adrp x0, .LC46
add x0, x0, :lo12:.LC46
bl printf
adrp x0, X_SIZE_VALUE
add x0, x0, :lo12:X_SIZE_VALUE
ldr w1, [x0]
ldr w0, [x29, 624]
cmp w0, w1
ble .L1065
adrp x0, __PRETTY_FUNCTION__.7
add x3, x0, :lo12:__PRETTY_FUNCTION__.7
mov w2, 23
adrp x0, .LC47
add x1, x0, :lo12:.LC47
adrp x0, .LC48
add x0, x0, :lo12:.LC48
bl __assert_fail
.L1065:
adrp x0, ds
add x0, x0, :lo12:ds
ldr w1, [x0, 800]
sxtw x0, w1
sub x0, x0, #1
str x0, [x29, 632]
sxtw x0, w1
mov x22, x0
mov x23, 0
lsr x0, x22, 58
lsl x21, x23, 6
orr x21, x0, x21
lsl x20, x22, 6
sxtw x0, w1
mov x26, x0
mov x27, 0
lsr x0, x26, 58
lsl x25, x27, 6
orr x25, x0, x25
lsl x24, x26, 6
sxtw x0, w1
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x1, x0, 4
and x0, x1, -65536
sub x0, sp, x0
.L1066:
cmp sp, x0
beq .L1067
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1066
.L1067:
and x0, x1, 65535
sub sp, sp, x0
str xzr, [sp]
and x0, x1, 65535
cmp x0, 1024
bcc .L1068
str xzr, [sp, 1024]
.L1068:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 640]
adrp x0, ds
add x0, x0, :lo12:ds
ldr w1, [x0, 1608]
sxtw x0, w1
sub x0, x0, #1
str x0, [x29, 648]
sxtw x0, w1
str x0, [x29, 336]
str xzr, [x29, 344]
ldp x2, x3, [x29, 336]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 600]
ldr x4, [x29, 600]
orr x0, x0, x4
str x0, [x29, 600]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 592]
sxtw x0, w1
str x0, [x29, 320]
str xzr, [x29, 328]
ldp x2, x3, [x29, 320]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 584]
ldr x4, [x29, 584]
orr x0, x0, x4
str x0, [x29, 584]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 576]
sxtw x0, w1
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x1, x0, 4
and x0, x1, -65536
sub x0, sp, x0
.L1069:
cmp sp, x0
beq .L1070
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1069
.L1070:
and x0, x1, 65535
sub sp, sp, x0
str xzr, [sp]
and x0, x1, 65535
cmp x0, 1024
bcc .L1071
str xzr, [sp, 1024]
.L1071:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 656]
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 800]
mov w2, w0
ldr x1, [x29, 640]
adrp x0, ds
add x0, x0, :lo12:ds
bl fxp_double_to_fxp_array
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 1608]
mov w2, w0
ldr x1, [x29, 656]
adrp x0, ds+808
add x0, x0, :lo12:ds+808
bl fxp_double_to_fxp_array
adrp x0, impl
add x0, x0, :lo12:impl
ldr d0, [x0, 16]
bl fxp_double_to_fxp
str x0, [x29, 664]
adrp x0, impl
add x0, x0, :lo12:impl
ldr d0, [x0, 8]
bl fxp_double_to_fxp
str x0, [x29, 672]
adrp x0, X_SIZE_VALUE
add x0, x0, :lo12:X_SIZE_VALUE
ldr w1, [x0]
sxtw x0, w1
sub x0, x0, #1
str x0, [x29, 680]
sxtw x0, w1
str x0, [x29, 304]
str xzr, [x29, 312]
ldp x2, x3, [x29, 304]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 568]
ldr x4, [x29, 568]
orr x0, x0, x4
str x0, [x29, 568]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 560]
sxtw x0, w1
str x0, [x29, 288]
str xzr, [x29, 296]
ldp x2, x3, [x29, 288]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 552]
ldr x4, [x29, 552]
orr x0, x0, x4
str x0, [x29, 552]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 544]
sxtw x0, w1
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x1, x0, 4
and x0, x1, -65536
sub x0, sp, x0
.L1072:
cmp sp, x0
beq .L1073
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1072
.L1073:
and x0, x1, 65535
sub sp, sp, x0
str xzr, [sp]
and x0, x1, 65535
cmp x0, 1024
bcc .L1074
str xzr, [sp, 1024]
.L1074:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 688]
adrp x0, X_SIZE_VALUE
add x0, x0, :lo12:X_SIZE_VALUE
ldr w1, [x0]
sxtw x0, w1
sub x0, x0, #1
str x0, [x29, 696]
sxtw x0, w1
str x0, [x29, 272]
str xzr, [x29, 280]
ldp x2, x3, [x29, 272]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 536]
ldr x4, [x29, 536]
orr x0, x0, x4
str x0, [x29, 536]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 528]
sxtw x0, w1
str x0, [x29, 256]
str xzr, [x29, 264]
ldp x2, x3, [x29, 256]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 520]
ldr x4, [x29, 520]
orr x0, x0, x4
str x0, [x29, 520]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 512]
sxtw x0, w1
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x1, x0, 4
and x0, x1, -65536
sub x0, sp, x0
.L1075:
cmp sp, x0
beq .L1076
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1075
.L1076:
and x0, x1, 65535
sub sp, sp, x0
str xzr, [sp]
and x0, x1, 65535
cmp x0, 1024
bcc .L1077
str xzr, [sp, 1024]
.L1077:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 704]
str wzr, [x29, 620]
b .L1078
.L1079:
ldr x1, [x29, 688]
ldrsw x0, [x29, 620]
str xzr, [x1, x0, lsl 3]
ldr x1, [x29, 704]
ldrsw x0, [x29, 620]
str xzr, [x1, x0, lsl 3]
ldr w0, [x29, 620]
add w0, w0, 1
str w0, [x29, 620]
.L1078:
adrp x0, X_SIZE_VALUE
add x0, x0, :lo12:X_SIZE_VALUE
ldr w1, [x0]
ldr w0, [x29, 620]
cmp w0, w1
blt .L1079
str wzr, [x29, 628]
adrp x0, ds
add x0, x0, :lo12:ds
ldr w1, [x0, 1608]
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 800]
cmp w1, w0
csel w0, w1, w0, ge
str w0, [x29, 628]
adrp x0, ds
add x0, x0, :lo12:ds
ldr w1, [x0, 800]
sxtw x0, w1
sub x0, x0, #1
str x0, [x29, 712]
sxtw x0, w1
str x0, [x29, 240]
str xzr, [x29, 248]
ldp x2, x3, [x29, 240]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 504]
ldr x4, [x29, 504]
orr x0, x0, x4
str x0, [x29, 504]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 496]
sxtw x0, w1
str x0, [x29, 224]
str xzr, [x29, 232]
ldp x2, x3, [x29, 224]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 488]
ldr x4, [x29, 488]
orr x0, x0, x4
str x0, [x29, 488]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 480]
sxtw x0, w1
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x1, x0, 4
and x0, x1, -65536
sub x0, sp, x0
.L1080:
cmp sp, x0
beq .L1081
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1080
.L1081:
and x0, x1, 65535
sub sp, sp, x0
str xzr, [sp]
and x0, x1, 65535
cmp x0, 1024
bcc .L1082
str xzr, [sp, 1024]
.L1082:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 720]
adrp x0, ds
add x0, x0, :lo12:ds
ldr w1, [x0, 1608]
sxtw x0, w1
sub x0, x0, #1
str x0, [x29, 728]
sxtw x0, w1
str x0, [x29, 208]
str xzr, [x29, 216]
ldp x2, x3, [x29, 208]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 472]
ldr x4, [x29, 472]
orr x0, x0, x4
str x0, [x29, 472]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 464]
sxtw x0, w1
str x0, [x29, 192]
str xzr, [x29, 200]
ldp x2, x3, [x29, 192]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 456]
ldr x4, [x29, 456]
orr x0, x0, x4
str x0, [x29, 456]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 448]
sxtw x0, w1
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L1083:
cmp sp, x1
beq .L1084
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1083
.L1084:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L1085
str xzr, [sp, 1024]
.L1085:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 736]
ldr w0, [x29, 628]
sxtw x1, w0
sub x1, x1, #1
str x1, [x29, 744]
sxtw x1, w0
str x1, [x29, 176]
str xzr, [x29, 184]
ldp x2, x3, [x29, 176]
mov x1, x2
lsr x1, x1, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 440]
ldr x4, [x29, 440]
orr x1, x1, x4
str x1, [x29, 440]
mov x1, x2
lsl x1, x1, 6
str x1, [x29, 432]
sxtw x1, w0
str x1, [x29, 160]
str xzr, [x29, 168]
ldp x2, x3, [x29, 160]
mov x1, x2
lsr x1, x1, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 424]
ldr x4, [x29, 424]
orr x1, x1, x4
str x1, [x29, 424]
mov x1, x2
lsl x1, x1, 6
str x1, [x29, 416]
sxtw x0, w0
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L1086:
cmp sp, x1
beq .L1087
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1086
.L1087:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L1088
str xzr, [sp, 1024]
.L1088:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 752]
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 800]
sxtw x1, w0
sub x1, x1, #1
str x1, [x29, 760]
sxtw x1, w0
str x1, [x29, 144]
str xzr, [x29, 152]
ldp x2, x3, [x29, 144]
mov x1, x2
lsr x1, x1, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 408]
ldr x4, [x29, 408]
orr x1, x1, x4
str x1, [x29, 408]
mov x1, x2
lsl x1, x1, 6
str x1, [x29, 400]
sxtw x1, w0
str x1, [x29, 128]
str xzr, [x29, 136]
ldp x2, x3, [x29, 128]
mov x1, x2
lsr x1, x1, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 392]
ldr x4, [x29, 392]
orr x1, x1, x4
str x1, [x29, 392]
mov x1, x2
lsl x1, x1, 6
str x1, [x29, 384]
sxtw x0, w0
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L1089:
cmp sp, x1
beq .L1090
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1089
.L1090:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L1091
str xzr, [sp, 1024]
.L1091:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 768]
ldr w0, [x29, 628]
sxtw x1, w0
sub x1, x1, #1
str x1, [x29, 776]
sxtw x1, w0
str x1, [x29, 112]
str xzr, [x29, 120]
ldp x2, x3, [x29, 112]
mov x1, x2
lsr x1, x1, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 376]
ldr x4, [x29, 376]
orr x1, x1, x4
str x1, [x29, 376]
mov x1, x2
lsl x1, x1, 6
str x1, [x29, 368]
sxtw x1, w0
str x1, [x29, 96]
str xzr, [x29, 104]
ldp x2, x3, [x29, 96]
mov x1, x2
lsr x1, x1, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 360]
ldr x4, [x29, 360]
orr x1, x1, x4
str x1, [x29, 360]
mov x1, x2
lsl x1, x1, 6
str x1, [x29, 352]
sxtw x0, w0
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L1092:
cmp sp, x1
beq .L1093
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1092
.L1093:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L1094
str xzr, [sp, 1024]
.L1094:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 784]
str wzr, [x29, 620]
b .L1095
.L1098:
bl nondet_int
sxtw x2, w0
ldr x0, [x29, 752]
ldrsw x1, [x29, 620]
str x2, [x0, x1, lsl 3]
ldr x0, [x29, 752]
ldrsw x1, [x29, 620]
ldr x0, [x0, x1, lsl 3]
ldr x1, [x29, 664]
cmp x1, x0
bgt .L1096
ldr x0, [x29, 752]
ldrsw x1, [x29, 620]
ldr x0, [x0, x1, lsl 3]
ldr x1, [x29, 672]
cmp x1, x0
blt .L1096
mov w0, 1
b .L1097
.L1096:
mov w0, 0
.L1097:
and w0, w0, 1
and w0, w0, 255
bl __DSVERIFIER_assume
ldr x0, [x29, 752]
ldrsw x1, [x29, 620]
ldr x2, [x0, x1, lsl 3]
ldr x0, [x29, 784]
ldrsw x1, [x29, 620]
str x2, [x0, x1, lsl 3]
ldr w0, [x29, 620]
add w0, w0, 1
str w0, [x29, 620]
.L1095:
ldr w1, [x29, 620]
ldr w0, [x29, 628]
cmp w1, w0
blt .L1098
str wzr, [x29, 620]
b .L1099
.L1100:
ldr x0, [x29, 736]
ldrsw x1, [x29, 620]
str xzr, [x0, x1, lsl 3]
ldr w0, [x29, 620]
add w0, w0, 1
str w0, [x29, 620]
.L1099:
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 1608]
ldr w1, [x29, 620]
cmp w1, w0
blt .L1100
str wzr, [x29, 620]
b .L1101
.L1102:
ldr w2, [x29, 628]
ldr x1, [x29, 752]
mov x0, 0
bl shiftR
ldr x0, [x29, 704]
ldrsw x1, [x29, 620]
ldr x1, [x0, x1, lsl 3]
adrp x0, ds
add x0, x0, :lo12:ds
ldr w2, [x0, 800]
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 1608]
mov w5, w0
mov w4, w2
ldr x3, [x29, 656]
ldr x2, [x29, 640]
ldr x0, [x29, 752]
bl fxp_direct_form_2
mov x2, x0
ldr x0, [x29, 688]
ldrsw x1, [x29, 620]
str x2, [x0, x1, lsl 3]
ldr w0, [x29, 620]
add w0, w0, 1
str w0, [x29, 620]
.L1101:
adrp x0, X_SIZE_VALUE
add x0, x0, :lo12:X_SIZE_VALUE
ldr w0, [x0]
ldr w1, [x29, 620]
cmp w1, w0
blt .L1102
adrp x0, X_SIZE_VALUE
add x0, x0, :lo12:X_SIZE_VALUE
ldr w0, [x0]
mov w1, w0
ldr x0, [x29, 688]
bl fxp_check_persistent_limit_cycle
mov w0, 0
mov sp, x19
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [x29, 792]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L1104
bl __stack_chk_fail
.L1104:
mov w0, w1
sub sp, x29, #16
.cfi_def_cfa 31, 816
ldp x19, x20, [sp, 32]
ldp x21, x22, [sp, 48]
ldp x23, x24, [sp, 64]
ldp x25, x26, [sp, 80]
ldr x27, [sp, 96]
ldp x29, x30, [sp, 16]
add sp, sp, 816
.cfi_restore 29
.cfi_restore 30
.cfi_restore 27
.cfi_restore 25
.cfi_restore 26
.cfi_restore 23
.cfi_restore 24
.cfi_restore 21
.cfi_restore 22
.cfi_restore 19
.cfi_restore 20
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE134:
.size verify_zero_input_limit_cycle, .-verify_zero_input_limit_cycle
.global generic_timer
.bss
.align 2
.type generic_timer, %object
.size generic_timer, 4
generic_timer:
.zero 4
.section .rodata
.align 3
.LC49:
.string "/home/yashchopda/Desktop/dsverifier-v2.0.3-esbmc-v4.0-cbmc-5.6/bmc/engine/verify_generic_timing.h"
.align 3
.LC50:
.string "spent_time <= ds.sample_time"
.text
.align 2
.global verify_generic_timing
.type verify_generic_timing, %function
verify_generic_timing:
.LFB135:
.cfi_startproc
stp x29, x30, [sp, -336]!
.cfi_def_cfa_offset 336
.cfi_offset 29, -336
.cfi_offset 30, -328
mov x29, sp
.cfi_def_cfa_register 29
stp x19, x20, [sp, 16]
stp x21, x22, [sp, 32]
stp x23, x24, [sp, 48]
stp x25, x26, [sp, 64]
str x27, [sp, 80]
sub sp, sp, #16
.cfi_offset 19, -320
.cfi_offset 20, -312
.cfi_offset 21, -304
.cfi_offset 22, -296
.cfi_offset 23, -288
.cfi_offset 24, -280
.cfi_offset 25, -272
.cfi_offset 26, -264
.cfi_offset 27, -256
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [x29, 328]
mov x1, 0
mov x0, sp
mov x19, x0
adrp x0, X_SIZE_VALUE
add x0, x0, :lo12:X_SIZE_VALUE
ldr w1, [x0]
sxtw x0, w1
sub x0, x0, #1
str x0, [x29, 232]
sxtw x0, w1
mov x4, x0
mov x5, 0
lsr x0, x4, 58
lsl x3, x5, 6
orr x3, x0, x3
lsl x2, x4, 6
sxtw x0, w1
mov x8, x0
mov x9, 0
lsr x0, x8, 58
lsl x7, x9, 6
orr x7, x0, x7
lsl x6, x8, 6
sxtw x0, w1
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x1, x0, 4
and x0, x1, -65536
sub x0, sp, x0
.L1106:
cmp sp, x0
beq .L1107
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1106
.L1107:
and x0, x1, 65535
sub sp, sp, x0
str xzr, [sp]
and x0, x1, 65535
cmp x0, 1024
bcc .L1108
str xzr, [sp, 1024]
.L1108:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 240]
adrp x0, X_SIZE_VALUE
add x0, x0, :lo12:X_SIZE_VALUE
ldr w1, [x0]
sxtw x0, w1
sub x0, x0, #1
str x0, [x29, 248]
sxtw x0, w1
mov x16, x0
mov x17, 0
lsr x0, x16, 58
lsl x11, x17, 6
orr x11, x0, x11
lsl x10, x16, 6
sxtw x0, w1
mov x14, x0
mov x15, 0
lsr x0, x14, 58
lsl x13, x15, 6
orr x13, x0, x13
lsl x12, x14, 6
sxtw x0, w1
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L1109:
cmp sp, x1
beq .L1110
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1109
.L1110:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L1111
str xzr, [sp, 1024]
.L1111:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 256]
str wzr, [x29, 224]
b .L1112
.L1117:
ldr x0, [x29, 240]
ldrsw x1, [x29, 224]
str xzr, [x0, x1, lsl 3]
bl nondet_float
fcvt d0, s0
ldr x0, [x29, 256]
ldrsw x1, [x29, 224]
str d0, [x0, x1, lsl 3]
ldr x0, [x29, 256]
ldrsw x1, [x29, 224]
ldr d1, [x0, x1, lsl 3]
adrp x0, impl
add x0, x0, :lo12:impl
ldr d0, [x0, 16]
fcmpe d1, d0
bge .L1138
b .L1113
.L1138:
ldr x0, [x29, 256]
ldrsw x1, [x29, 224]
ldr d1, [x0, x1, lsl 3]
adrp x0, impl
add x0, x0, :lo12:impl
ldr d0, [x0, 8]
fcmpe d1, d0
bls .L1139
b .L1113
.L1139:
mov w0, 1
b .L1116
.L1113:
mov w0, 0
.L1116:
and w0, w0, 1
and w0, w0, 255
bl __DSVERIFIER_assume
ldr w0, [x29, 224]
add w0, w0, 1
str w0, [x29, 224]
.L1112:
adrp x0, X_SIZE_VALUE
add x0, x0, :lo12:X_SIZE_VALUE
ldr w0, [x0]
ldr w1, [x29, 224]
cmp w1, w0
blt .L1117
str wzr, [x29, 228]
adrp x0, ds
add x0, x0, :lo12:ds
ldr w1, [x0, 1608]
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 800]
cmp w1, w0
csel w0, w1, w0, ge
str w0, [x29, 228]
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 800]
sxtw x1, w0
sub x1, x1, #1
str x1, [x29, 264]
sxtw x1, w0
str x1, [x29, 176]
str xzr, [x29, 184]
ldp x2, x3, [x29, 176]
mov x1, x2
lsr x1, x1, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 216]
ldr x4, [x29, 216]
orr x1, x1, x4
str x1, [x29, 216]
mov x1, x2
lsl x1, x1, 6
str x1, [x29, 208]
sxtw x1, w0
str x1, [x29, 160]
str xzr, [x29, 168]
ldp x2, x3, [x29, 160]
mov x1, x2
lsr x1, x1, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 200]
ldr x4, [x29, 200]
orr x1, x1, x4
str x1, [x29, 200]
mov x1, x2
lsl x1, x1, 6
str x1, [x29, 192]
sxtw x0, w0
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L1118:
cmp sp, x1
beq .L1119
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1118
.L1119:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L1120
str xzr, [sp, 1024]
.L1120:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 272]
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 1608]
sxtw x1, w0
sub x1, x1, #1
str x1, [x29, 280]
sxtw x1, w0
str x1, [x29, 144]
str xzr, [x29, 152]
ldp x2, x3, [x29, 144]
mov x1, x2
lsr x1, x1, 58
mov x4, x3
lsl x27, x4, 6
orr x27, x1, x27
mov x1, x2
lsl x26, x1, 6
sxtw x1, w0
str x1, [x29, 128]
str xzr, [x29, 136]
ldp x2, x3, [x29, 128]
mov x1, x2
lsr x1, x1, 58
mov x4, x3
lsl x25, x4, 6
orr x25, x1, x25
mov x1, x2
lsl x24, x1, 6
sxtw x0, w0
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L1121:
cmp sp, x1
beq .L1122
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1121
.L1122:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L1123
str xzr, [sp, 1024]
.L1123:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 288]
ldr w0, [x29, 228]
sxtw x1, w0
sub x1, x1, #1
str x1, [x29, 296]
sxtw x1, w0
str x1, [x29, 112]
str xzr, [x29, 120]
ldp x2, x3, [x29, 112]
mov x1, x2
lsr x1, x1, 58
mov x4, x3
lsl x23, x4, 6
orr x23, x1, x23
mov x1, x2
lsl x22, x1, 6
sxtw x1, w0
str x1, [x29, 96]
str xzr, [x29, 104]
ldp x2, x3, [x29, 96]
mov x1, x2
lsr x1, x1, 58
mov x4, x3
lsl x21, x4, 6
orr x21, x1, x21
mov x1, x2
lsl x20, x1, 6
sxtw x0, w0
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L1124:
cmp sp, x1
beq .L1125
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1124
.L1125:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L1126
str xzr, [sp, 1024]
.L1126:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 304]
str wzr, [x29, 224]
b .L1127
.L1128:
ldr x0, [x29, 272]
ldrsw x1, [x29, 224]
str xzr, [x0, x1, lsl 3]
ldr w0, [x29, 224]
add w0, w0, 1
str w0, [x29, 224]
.L1127:
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 800]
ldr w1, [x29, 224]
cmp w1, w0
blt .L1128
str wzr, [x29, 224]
b .L1129
.L1130:
ldr x0, [x29, 288]
ldrsw x1, [x29, 224]
str xzr, [x0, x1, lsl 3]
ldr w0, [x29, 224]
add w0, w0, 1
str w0, [x29, 224]
.L1129:
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 1608]
ldr w1, [x29, 224]
cmp w1, w0
blt .L1130
str wzr, [x29, 224]
b .L1131
.L1132:
ldr x0, [x29, 304]
ldrsw x1, [x29, 224]
str xzr, [x0, x1, lsl 3]
ldr w0, [x29, 224]
add w0, w0, 1
str w0, [x29, 224]
.L1131:
ldr w1, [x29, 224]
ldr w0, [x29, 228]
cmp w1, w0
blt .L1132
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 44]
lsl w1, w0, 1
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 80]
add w1, w1, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
ldr w0, [x0]
add w1, w1, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
str w1, [x0]
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
ldr w0, [x0]
scvtf d0, w0
str d0, [x29, 312]
str wzr, [x29, 224]
b .L1133
.L1135:
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 48]
lsl w1, w0, 1
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 76]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 44]
lsl w0, w0, 1
add w1, w1, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
ldr w0, [x0]
add w1, w1, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
str w1, [x0]
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 48]
lsl w1, w0, 1
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 132]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 104]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 128]
add w1, w1, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
ldr w0, [x0]
add w1, w1, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
str w1, [x0]
ldr w1, [x29, 228]
ldr x0, [x29, 304]
movi d0, #0
bl generic_timing_shift_r_double
ldr x0, [x29, 256]
ldrsw x1, [x29, 224]
ldr d0, [x0, x1, lsl 3]
adrp x0, ds
add x0, x0, :lo12:ds
ldr w1, [x0, 800]
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 1608]
mov w4, w0
mov w3, w1
adrp x0, ds+808
add x2, x0, :lo12:ds+808
adrp x0, ds
add x1, x0, :lo12:ds
ldr x0, [x29, 304]
bl generic_timing_double_direct_form_2
ldr x0, [x29, 240]
ldrsw x1, [x29, 224]
str d0, [x0, x1, lsl 3]
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
ldr w0, [x0]
scvtf d1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr d0, [x0, 16]
fmul d0, d1, d0
str d0, [x29, 320]
adrp x0, ds
add x0, x0, :lo12:ds
ldr d0, [x0, 1616]
ldr d1, [x29, 320]
fcmpe d1, d0
bls .L1134
adrp x0, __PRETTY_FUNCTION__.6
add x3, x0, :lo12:__PRETTY_FUNCTION__.6
mov w2, 89
adrp x0, .LC49
add x1, x0, :lo12:.LC49
adrp x0, .LC50
add x0, x0, :lo12:.LC50
bl __assert_fail
.L1134:
ldr d0, [x29, 312]
fcvtzs w1, d0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
str w1, [x0]
ldr w0, [x29, 224]
add w0, w0, 1
str w0, [x29, 224]
.L1133:
adrp x0, X_SIZE_VALUE
add x0, x0, :lo12:X_SIZE_VALUE
ldr w0, [x0]
ldr w1, [x29, 224]
cmp w1, w0
blt .L1135
mov w0, 0
mov sp, x19
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [x29, 328]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L1137
bl __stack_chk_fail
.L1137:
mov w0, w1
mov sp, x29
ldp x19, x20, [sp, 16]
ldp x21, x22, [sp, 32]
ldp x23, x24, [sp, 48]
ldp x25, x26, [sp, 64]
ldr x27, [sp, 80]
ldp x29, x30, [sp], 336
.cfi_restore 30
.cfi_restore 29
.cfi_restore 27
.cfi_restore 25
.cfi_restore 26
.cfi_restore 23
.cfi_restore 24
.cfi_restore 21
.cfi_restore 22
.cfi_restore 19
.cfi_restore 20
.cfi_def_cfa 31, 0
ret
.cfi_endproc
.LFE135:
.size verify_generic_timing, .-verify_generic_timing
.align 2
.global verify_timing_msp_430
.type verify_timing_msp_430, %function
verify_timing_msp_430:
.LFB136:
.cfi_startproc
stp x29, x30, [sp, -320]!
.cfi_def_cfa_offset 320
.cfi_offset 29, -320
.cfi_offset 30, -312
mov x29, sp
.cfi_def_cfa_register 29
stp x19, x20, [sp, 16]
stp x21, x22, [sp, 32]
stp x23, x24, [sp, 48]
stp x25, x26, [sp, 64]
str x27, [sp, 80]
sub sp, sp, #16
.cfi_offset 19, -304
.cfi_offset 20, -296
.cfi_offset 21, -288
.cfi_offset 22, -280
.cfi_offset 23, -272
.cfi_offset 24, -264
.cfi_offset 25, -256
.cfi_offset 26, -248
.cfi_offset 27, -240
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [x29, 312]
mov x1, 0
mov x0, sp
mov x19, x0
adrp x0, X_SIZE_VALUE
add x0, x0, :lo12:X_SIZE_VALUE
ldr w1, [x0]
sxtw x0, w1
sub x0, x0, #1
str x0, [x29, 232]
sxtw x0, w1
mov x4, x0
mov x5, 0
lsr x0, x4, 58
lsl x3, x5, 6
orr x3, x0, x3
lsl x2, x4, 6
sxtw x0, w1
mov x8, x0
mov x9, 0
lsr x0, x8, 58
lsl x7, x9, 6
orr x7, x0, x7
lsl x6, x8, 6
sxtw x0, w1
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x1, x0, 4
and x0, x1, -65536
sub x0, sp, x0
.L1141:
cmp sp, x0
beq .L1142
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1141
.L1142:
and x0, x1, 65535
sub sp, sp, x0
str xzr, [sp]
and x0, x1, 65535
cmp x0, 1024
bcc .L1143
str xzr, [sp, 1024]
.L1143:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 240]
adrp x0, X_SIZE_VALUE
add x0, x0, :lo12:X_SIZE_VALUE
ldr w1, [x0]
sxtw x0, w1
sub x0, x0, #1
str x0, [x29, 248]
sxtw x0, w1
mov x16, x0
mov x17, 0
lsr x0, x16, 58
lsl x11, x17, 6
orr x11, x0, x11
lsl x10, x16, 6
sxtw x0, w1
mov x14, x0
mov x15, 0
lsr x0, x14, 58
lsl x13, x15, 6
orr x13, x0, x13
lsl x12, x14, 6
sxtw x0, w1
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L1144:
cmp sp, x1
beq .L1145
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1144
.L1145:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L1146
str xzr, [sp, 1024]
.L1146:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 256]
str wzr, [x29, 224]
b .L1147
.L1152:
ldr x0, [x29, 240]
ldrsw x1, [x29, 224]
str xzr, [x0, x1, lsl 3]
bl nondet_float
fcvt d0, s0
ldr x0, [x29, 256]
ldrsw x1, [x29, 224]
str d0, [x0, x1, lsl 3]
ldr x0, [x29, 256]
ldrsw x1, [x29, 224]
ldr d1, [x0, x1, lsl 3]
adrp x0, impl
add x0, x0, :lo12:impl
ldr d0, [x0, 16]
fcmpe d1, d0
bge .L1172
b .L1148
.L1172:
ldr x0, [x29, 256]
ldrsw x1, [x29, 224]
ldr d1, [x0, x1, lsl 3]
adrp x0, impl
add x0, x0, :lo12:impl
ldr d0, [x0, 8]
fcmpe d1, d0
bls .L1173
b .L1148
.L1173:
mov w0, 1
b .L1151
.L1148:
mov w0, 0
.L1151:
and w0, w0, 1
and w0, w0, 255
bl __DSVERIFIER_assume
ldr w0, [x29, 224]
add w0, w0, 1
str w0, [x29, 224]
.L1147:
adrp x0, X_SIZE_VALUE
add x0, x0, :lo12:X_SIZE_VALUE
ldr w0, [x0]
ldr w1, [x29, 224]
cmp w1, w0
blt .L1152
str wzr, [x29, 228]
adrp x0, ds
add x0, x0, :lo12:ds
ldr w1, [x0, 1608]
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 800]
cmp w1, w0
csel w0, w1, w0, ge
str w0, [x29, 228]
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 800]
sxtw x1, w0
sub x1, x1, #1
str x1, [x29, 264]
sxtw x1, w0
str x1, [x29, 176]
str xzr, [x29, 184]
ldp x2, x3, [x29, 176]
mov x1, x2
lsr x1, x1, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 216]
ldr x4, [x29, 216]
orr x1, x1, x4
str x1, [x29, 216]
mov x1, x2
lsl x1, x1, 6
str x1, [x29, 208]
sxtw x1, w0
str x1, [x29, 160]
str xzr, [x29, 168]
ldp x2, x3, [x29, 160]
mov x1, x2
lsr x1, x1, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 200]
ldr x4, [x29, 200]
orr x1, x1, x4
str x1, [x29, 200]
mov x1, x2
lsl x1, x1, 6
str x1, [x29, 192]
sxtw x0, w0
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L1153:
cmp sp, x1
beq .L1154
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1153
.L1154:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L1155
str xzr, [sp, 1024]
.L1155:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 272]
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 1608]
sxtw x1, w0
sub x1, x1, #1
str x1, [x29, 280]
sxtw x1, w0
str x1, [x29, 144]
str xzr, [x29, 152]
ldp x2, x3, [x29, 144]
mov x1, x2
lsr x1, x1, 58
mov x4, x3
lsl x27, x4, 6
orr x27, x1, x27
mov x1, x2
lsl x26, x1, 6
sxtw x1, w0
str x1, [x29, 128]
str xzr, [x29, 136]
ldp x2, x3, [x29, 128]
mov x1, x2
lsr x1, x1, 58
mov x4, x3
lsl x25, x4, 6
orr x25, x1, x25
mov x1, x2
lsl x24, x1, 6
sxtw x0, w0
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L1156:
cmp sp, x1
beq .L1157
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1156
.L1157:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L1158
str xzr, [sp, 1024]
.L1158:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 288]
ldr w0, [x29, 228]
sxtw x1, w0
sub x1, x1, #1
str x1, [x29, 296]
sxtw x1, w0
str x1, [x29, 112]
str xzr, [x29, 120]
ldp x2, x3, [x29, 112]
mov x1, x2
lsr x1, x1, 58
mov x4, x3
lsl x23, x4, 6
orr x23, x1, x23
mov x1, x2
lsl x22, x1, 6
sxtw x1, w0
str x1, [x29, 96]
str xzr, [x29, 104]
ldp x2, x3, [x29, 96]
mov x1, x2
lsr x1, x1, 58
mov x4, x3
lsl x21, x4, 6
orr x21, x1, x21
mov x1, x2
lsl x20, x1, 6
sxtw x0, w0
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L1159:
cmp sp, x1
beq .L1160
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1159
.L1160:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L1161
str xzr, [sp, 1024]
.L1161:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 304]
str wzr, [x29, 224]
b .L1162
.L1163:
ldr x0, [x29, 272]
ldrsw x1, [x29, 224]
str xzr, [x0, x1, lsl 3]
ldr w0, [x29, 224]
add w0, w0, 1
str w0, [x29, 224]
.L1162:
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 800]
ldr w1, [x29, 224]
cmp w1, w0
blt .L1163
str wzr, [x29, 224]
b .L1164
.L1165:
ldr x0, [x29, 288]
ldrsw x1, [x29, 224]
str xzr, [x0, x1, lsl 3]
ldr w0, [x29, 224]
add w0, w0, 1
str w0, [x29, 224]
.L1164:
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 1608]
ldr w1, [x29, 224]
cmp w1, w0
blt .L1165
str wzr, [x29, 224]
b .L1166
.L1167:
ldr x0, [x29, 304]
ldrsw x1, [x29, 224]
str xzr, [x0, x1, lsl 3]
ldr w0, [x29, 224]
add w0, w0, 1
str w0, [x29, 224]
.L1166:
ldr w1, [x29, 224]
ldr w0, [x29, 228]
cmp w1, w0
blt .L1167
str wzr, [x29, 224]
b .L1168
.L1169:
ldr w2, [x29, 228]
ldr x1, [x29, 304]
mov x0, 0
bl shiftR
ldr x0, [x29, 256]
ldrsw x1, [x29, 224]
ldr d0, [x0, x1, lsl 3]
adrp x0, ds
add x0, x0, :lo12:ds
ldr w1, [x0, 800]
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 1608]
mov w4, w0
mov w3, w1
adrp x0, ds+808
add x2, x0, :lo12:ds+808
adrp x0, ds
add x1, x0, :lo12:ds
ldr x0, [x29, 304]
bl double_direct_form_2_MSP430
ldr x0, [x29, 240]
ldrsw x1, [x29, 224]
str d0, [x0, x1, lsl 3]
ldr w0, [x29, 224]
add w0, w0, 1
str w0, [x29, 224]
.L1168:
adrp x0, X_SIZE_VALUE
add x0, x0, :lo12:X_SIZE_VALUE
ldr w0, [x0]
ldr w1, [x29, 224]
cmp w1, w0
blt .L1169
mov w0, 0
mov sp, x19
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [x29, 312]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L1171
bl __stack_chk_fail
.L1171:
mov w0, w1
mov sp, x29
ldp x19, x20, [sp, 16]
ldp x21, x22, [sp, 32]
ldp x23, x24, [sp, 48]
ldp x25, x26, [sp, 64]
ldr x27, [sp, 80]
ldp x29, x30, [sp], 320
.cfi_restore 30
.cfi_restore 29
.cfi_restore 27
.cfi_restore 25
.cfi_restore 26
.cfi_restore 23
.cfi_restore 24
.cfi_restore 21
.cfi_restore 22
.cfi_restore 19
.cfi_restore 20
.cfi_def_cfa 31, 0
ret
.cfi_endproc
.LFE136:
.size verify_timing_msp_430, .-verify_timing_msp_430
.section .rodata
.align 3
.LC51:
.string "/home/yashchopda/Desktop/dsverifier-v2.0.3-esbmc-v4.0-cbmc-5.6/bmc/engine/verify_stability.h"
.align 3
.LC52:
.string "check_stability(_a, ds.a_size)"
.text
.align 2
.global verify_stability
.type verify_stability, %function
verify_stability:
.LFB137:
.cfi_startproc
stp x29, x30, [sp, -144]!
.cfi_def_cfa_offset 144
.cfi_offset 29, -144
.cfi_offset 30, -136
mov x29, sp
.cfi_def_cfa_register 29
stp x19, x20, [sp, 16]
stp x21, x22, [sp, 32]
stp x23, x24, [sp, 48]
stp x25, x26, [sp, 64]
str x27, [sp, 80]
sub sp, sp, #16
.cfi_offset 19, -128
.cfi_offset 20, -120
.cfi_offset 21, -112
.cfi_offset 22, -104
.cfi_offset 23, -96
.cfi_offset 24, -88
.cfi_offset 25, -80
.cfi_offset 26, -72
.cfi_offset 27, -64
adrp x8, :got:__stack_chk_guard
ldr x8, [x8, #:got_lo12:__stack_chk_guard]
ldr x9, [x8]
str x9, [x29, 136]
mov x9, 0
mov x8, sp
mov x19, x8
adrp x8, overflow_mode
add x8, x8, :lo12:overflow_mode
str wzr, [x8]
adrp x8, ds
add x8, x8, :lo12:ds
ldr w8, [x8, 800]
sxtw x9, w8
sub x9, x9, #1
str x9, [x29, 104]
sxtw x9, w8
mov x6, x9
mov x7, 0
lsr x9, x6, 58
lsl x3, x7, 6
orr x3, x9, x3
lsl x2, x6, 6
sxtw x2, w8
mov x4, x2
mov x5, 0
lsr x2, x4, 58
lsl x1, x5, 6
orr x1, x2, x1
lsl x0, x4, 6
sxtw x0, w8
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L1175:
cmp sp, x1
beq .L1176
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1175
.L1176:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L1177
str xzr, [sp, 1024]
.L1177:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 112]
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 800]
mov w2, w0
ldr x1, [x29, 112]
adrp x0, ds
add x0, x0, :lo12:ds
bl fxp_double_to_fxp_array
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 800]
sxtw x1, w0
sub x1, x1, #1
str x1, [x29, 120]
sxtw x1, w0
mov x26, x1
mov x27, 0
lsr x1, x26, 58
lsl x23, x27, 6
orr x23, x1, x23
lsl x22, x26, 6
sxtw x1, w0
mov x24, x1
mov x25, 0
lsr x1, x24, 58
lsl x21, x25, 6
orr x21, x1, x21
lsl x20, x24, 6
sxtw x0, w0
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L1178:
cmp sp, x1
beq .L1179
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1178
.L1179:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L1180
str xzr, [sp, 1024]
.L1180:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 128]
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 800]
mov w2, w0
ldr x1, [x29, 112]
ldr x0, [x29, 128]
bl fxp_to_double_array
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 800]
mov w1, w0
ldr x0, [x29, 128]
bl check_stability
cmp w0, 0
bne .L1181
adrp x0, __PRETTY_FUNCTION__.5
add x3, x0, :lo12:__PRETTY_FUNCTION__.5
mov w2, 37
adrp x0, .LC51
add x1, x0, :lo12:.LC51
adrp x0, .LC52
add x0, x0, :lo12:.LC52
bl __assert_fail
.L1181:
mov w0, 0
mov sp, x19
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [x29, 136]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L1183
bl __stack_chk_fail
.L1183:
mov w0, w1
mov sp, x29
ldp x19, x20, [sp, 16]
ldp x21, x22, [sp, 32]
ldp x23, x24, [sp, 48]
ldp x25, x26, [sp, 64]
ldr x27, [sp, 80]
ldp x29, x30, [sp], 144
.cfi_restore 30
.cfi_restore 29
.cfi_restore 27
.cfi_restore 25
.cfi_restore 26
.cfi_restore 23
.cfi_restore 24
.cfi_restore 21
.cfi_restore 22
.cfi_restore 19
.cfi_restore 20
.cfi_def_cfa 31, 0
ret
.cfi_endproc
.LFE137:
.size verify_stability, .-verify_stability
.align 2
.global verify_minimum_phase
.type verify_minimum_phase, %function
verify_minimum_phase:
.LFB138:
.cfi_startproc
stp x29, x30, [sp, -144]!
.cfi_def_cfa_offset 144
.cfi_offset 29, -144
.cfi_offset 30, -136
mov x29, sp
.cfi_def_cfa_register 29
stp x19, x20, [sp, 16]
stp x21, x22, [sp, 32]
stp x23, x24, [sp, 48]
stp x25, x26, [sp, 64]
str x27, [sp, 80]
sub sp, sp, #16
.cfi_offset 19, -128
.cfi_offset 20, -120
.cfi_offset 21, -112
.cfi_offset 22, -104
.cfi_offset 23, -96
.cfi_offset 24, -88
.cfi_offset 25, -80
.cfi_offset 26, -72
.cfi_offset 27, -64
adrp x8, :got:__stack_chk_guard
ldr x8, [x8, #:got_lo12:__stack_chk_guard]
ldr x9, [x8]
str x9, [x29, 136]
mov x9, 0
mov x8, sp
mov x19, x8
adrp x8, overflow_mode
add x8, x8, :lo12:overflow_mode
str wzr, [x8]
adrp x8, ds
add x8, x8, :lo12:ds
ldr w8, [x8, 1608]
sxtw x9, w8
sub x9, x9, #1
str x9, [x29, 104]
sxtw x9, w8
mov x6, x9
mov x7, 0
lsr x9, x6, 58
lsl x3, x7, 6
orr x3, x9, x3
lsl x2, x6, 6
sxtw x2, w8
mov x4, x2
mov x5, 0
lsr x2, x4, 58
lsl x1, x5, 6
orr x1, x2, x1
lsl x0, x4, 6
sxtw x0, w8
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L1185:
cmp sp, x1
beq .L1186
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1185
.L1186:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L1187
str xzr, [sp, 1024]
.L1187:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 112]
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 1608]
mov w2, w0
ldr x1, [x29, 112]
adrp x0, ds+808
add x0, x0, :lo12:ds+808
bl fxp_double_to_fxp_array
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 1608]
sxtw x1, w0
sub x1, x1, #1
str x1, [x29, 120]
sxtw x1, w0
mov x26, x1
mov x27, 0
lsr x1, x26, 58
lsl x23, x27, 6
orr x23, x1, x23
lsl x22, x26, 6
sxtw x1, w0
mov x24, x1
mov x25, 0
lsr x1, x24, 58
lsl x21, x25, 6
orr x21, x1, x21
lsl x20, x24, 6
sxtw x0, w0
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L1188:
cmp sp, x1
beq .L1189
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1188
.L1189:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L1190
str xzr, [sp, 1024]
.L1190:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 128]
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 1608]
mov w2, w0
ldr x1, [x29, 112]
ldr x0, [x29, 128]
bl fxp_to_double_array
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 1608]
mov w1, w0
ldr x0, [x29, 128]
bl check_stability
cmp w0, 0
cset w0, ne
and w0, w0, 255
bl __DSVERIFIER_assert
mov w0, 0
mov sp, x19
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [x29, 136]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L1192
bl __stack_chk_fail
.L1192:
mov w0, w1
mov sp, x29
ldp x19, x20, [sp, 16]
ldp x21, x22, [sp, 32]
ldp x23, x24, [sp, 48]
ldp x25, x26, [sp, 64]
ldr x27, [sp, 80]
ldp x29, x30, [sp], 144
.cfi_restore 30
.cfi_restore 29
.cfi_restore 27
.cfi_restore 25
.cfi_restore 26
.cfi_restore 23
.cfi_restore 24
.cfi_restore 21
.cfi_restore 22
.cfi_restore 19
.cfi_restore 20
.cfi_def_cfa 31, 0
ret
.cfi_endproc
.LFE138:
.size verify_minimum_phase, .-verify_minimum_phase
.section .rodata
.align 3
.LC53:
.string "Verifying stability for closedloop function"
.text
.align 2
.global verify_stability_closedloop_using_dslib
.type verify_stability_closedloop_using_dslib, %function
verify_stability_closedloop_using_dslib:
.LFB139:
.cfi_startproc
sub sp, sp, #1168
.cfi_def_cfa_offset 1168
stp x29, x30, [sp, 16]
.cfi_offset 29, -1152
.cfi_offset 30, -1144
add x29, sp, 16
.cfi_def_cfa 29, 1152
stp x19, x20, [sp, 32]
stp x21, x22, [sp, 48]
stp x23, x24, [sp, 64]
stp x25, x26, [sp, 80]
str x27, [sp, 96]
.cfi_offset 19, -1136
.cfi_offset 20, -1128
.cfi_offset 21, -1120
.cfi_offset 22, -1112
.cfi_offset 23, -1104
.cfi_offset 24, -1096
.cfi_offset 25, -1088
.cfi_offset 26, -1080
.cfi_offset 27, -1072
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [x29, 1144]
mov x1, 0
mov x0, sp
mov x19, x0
adrp x0, :got:controller
ldr x0, [x0, #:got_lo12:controller]
add x0, x0, 808
str x0, [x29, 248]
adrp x0, :got:controller
ldr x0, [x0, #:got_lo12:controller]
ldr w0, [x0, 1608]
str w0, [x29, 224]
adrp x0, :got:controller
ldr x0, [x0, #:got_lo12:controller]
str x0, [x29, 256]
adrp x0, :got:controller
ldr x0, [x0, #:got_lo12:controller]
ldr w0, [x0, 800]
str w0, [x29, 228]
adrp x0, :got:controller
ldr x0, [x0, #:got_lo12:controller]
ldr w1, [x0, 1608]
sxtw x0, w1
sub x0, x0, #1
str x0, [x29, 264]
sxtw x0, w1
mov x8, x0
mov x9, 0
lsr x0, x8, 58
lsl x3, x9, 6
orr x3, x0, x3
lsl x2, x8, 6
sxtw x0, w1
mov x6, x0
mov x7, 0
lsr x0, x6, 58
lsl x5, x7, 6
orr x5, x0, x5
lsl x4, x6, 6
sxtw x0, w1
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L1194:
cmp sp, x1
beq .L1195
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1194
.L1195:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L1196
str xzr, [sp, 1024]
.L1196:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 272]
adrp x0, :got:controller
ldr x0, [x0, #:got_lo12:controller]
ldr w0, [x0, 1608]
mov w2, w0
ldr x1, [x29, 272]
ldr x0, [x29, 248]
bl fxp_double_to_fxp_array
adrp x0, :got:controller
ldr x0, [x0, #:got_lo12:controller]
ldr w0, [x0, 800]
sxtw x1, w0
sub x1, x1, #1
str x1, [x29, 280]
sxtw x1, w0
str x1, [x29, 176]
str xzr, [x29, 184]
ldp x2, x3, [x29, 176]
mov x1, x2
lsr x1, x1, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 216]
ldr x4, [x29, 216]
orr x1, x1, x4
str x1, [x29, 216]
mov x1, x2
lsl x1, x1, 6
str x1, [x29, 208]
sxtw x1, w0
str x1, [x29, 160]
str xzr, [x29, 168]
ldp x2, x3, [x29, 160]
mov x1, x2
lsr x1, x1, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 200]
ldr x4, [x29, 200]
orr x1, x1, x4
str x1, [x29, 200]
mov x1, x2
lsl x1, x1, 6
str x1, [x29, 192]
sxtw x0, w0
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L1197:
cmp sp, x1
beq .L1198
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1197
.L1198:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L1199
str xzr, [sp, 1024]
.L1199:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 288]
adrp x0, :got:controller
ldr x0, [x0, #:got_lo12:controller]
ldr w0, [x0, 800]
mov w2, w0
ldr x1, [x29, 288]
ldr x0, [x29, 256]
bl fxp_double_to_fxp_array
adrp x0, :got:controller
ldr x0, [x0, #:got_lo12:controller]
ldr w0, [x0, 1608]
sxtw x1, w0
sub x1, x1, #1
str x1, [x29, 296]
sxtw x1, w0
str x1, [x29, 144]
str xzr, [x29, 152]
ldp x2, x3, [x29, 144]
mov x1, x2
lsr x1, x1, 58
mov x4, x3
lsl x27, x4, 6
orr x27, x1, x27
mov x1, x2
lsl x26, x1, 6
sxtw x1, w0
str x1, [x29, 128]
str xzr, [x29, 136]
ldp x2, x3, [x29, 128]
mov x1, x2
lsr x1, x1, 58
mov x4, x3
lsl x25, x4, 6
orr x25, x1, x25
mov x1, x2
lsl x24, x1, 6
sxtw x0, w0
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L1200:
cmp sp, x1
beq .L1201
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1200
.L1201:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L1202
str xzr, [sp, 1024]
.L1202:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 304]
adrp x0, :got:controller
ldr x0, [x0, #:got_lo12:controller]
ldr w0, [x0, 1608]
mov w2, w0
ldr x1, [x29, 272]
ldr x0, [x29, 304]
bl fxp_to_double_array
adrp x0, :got:controller
ldr x0, [x0, #:got_lo12:controller]
ldr w0, [x0, 800]
sxtw x1, w0
sub x1, x1, #1
str x1, [x29, 312]
sxtw x1, w0
str x1, [x29, 112]
str xzr, [x29, 120]
ldp x2, x3, [x29, 112]
mov x1, x2
lsr x1, x1, 58
mov x4, x3
lsl x23, x4, 6
orr x23, x1, x23
mov x1, x2
lsl x22, x1, 6
sxtw x1, w0
str x1, [x29, 96]
str xzr, [x29, 104]
ldp x2, x3, [x29, 96]
mov x1, x2
lsr x1, x1, 58
mov x4, x3
lsl x21, x4, 6
orr x21, x1, x21
mov x1, x2
lsl x20, x1, 6
sxtw x0, w0
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L1203:
cmp sp, x1
beq .L1204
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1203
.L1204:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L1205
str xzr, [sp, 1024]
.L1205:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 320]
adrp x0, :got:controller
ldr x0, [x0, #:got_lo12:controller]
ldr w0, [x0, 800]
mov w2, w0
ldr x1, [x29, 288]
ldr x0, [x29, 320]
bl fxp_to_double_array
adrp x0, plant_cbmc+808
add x0, x0, :lo12:plant_cbmc+808
str x0, [x29, 328]
adrp x0, :got:plant
ldr x0, [x0, #:got_lo12:plant]
ldr w0, [x0, 1608]
str w0, [x29, 232]
adrp x0, plant_cbmc
add x0, x0, :lo12:plant_cbmc
str x0, [x29, 336]
adrp x0, :got:plant
ldr x0, [x0, #:got_lo12:plant]
ldr w0, [x0, 800]
str w0, [x29, 236]
adrp x0, :got:controller
ldr x0, [x0, #:got_lo12:controller]
ldr w1, [x0, 1608]
adrp x0, :got:plant
ldr x0, [x0, #:got_lo12:plant]
ldr w0, [x0, 1608]
add w0, w1, w0
sub w0, w0, #1
str w0, [x29, 240]
adrp x0, :got:controller
ldr x0, [x0, #:got_lo12:controller]
ldr w1, [x0, 800]
adrp x0, :got:plant
ldr x0, [x0, #:got_lo12:plant]
ldr w0, [x0, 800]
add w0, w1, w0
sub w0, w0, #1
str w0, [x29, 244]
adrp x0, .LC53
add x0, x0, :lo12:.LC53
bl puts
add x0, x29, 344
ldr w5, [x29, 236]
ldr x4, [x29, 336]
ldr w3, [x29, 232]
ldr x2, [x29, 328]
ldr w1, [x29, 244]
bl check_stability_closedloop
cmp w0, 0
cset w0, ne
and w0, w0, 255
bl __DSVERIFIER_assert
mov w0, 0
mov sp, x19
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [x29, 1144]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L1207
bl __stack_chk_fail
.L1207:
mov w0, w1
sub sp, x29, #16
.cfi_def_cfa 31, 1168
ldp x19, x20, [sp, 32]
ldp x21, x22, [sp, 48]
ldp x23, x24, [sp, 64]
ldp x25, x26, [sp, 80]
ldr x27, [sp, 96]
ldp x29, x30, [sp, 16]
add sp, sp, 1168
.cfi_restore 29
.cfi_restore 30
.cfi_restore 27
.cfi_restore 25
.cfi_restore 26
.cfi_restore 23
.cfi_restore 24
.cfi_restore 21
.cfi_restore 22
.cfi_restore 19
.cfi_restore 20
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE139:
.size verify_stability_closedloop_using_dslib, .-verify_stability_closedloop_using_dslib
.align 2
.global verify_limit_cycle_closed_loop
.type verify_limit_cycle_closed_loop, %function
verify_limit_cycle_closed_loop:
.LFB140:
.cfi_startproc
sub sp, sp, #2544
.cfi_def_cfa_offset 2544
stp x29, x30, [sp, 16]
.cfi_offset 29, -2528
.cfi_offset 30, -2520
add x29, sp, 16
.cfi_def_cfa 29, 2528
stp x19, x20, [sp, 32]
stp x21, x22, [sp, 48]
stp x23, x24, [sp, 64]
stp x25, x26, [sp, 80]
str x27, [sp, 96]
.cfi_offset 19, -2512
.cfi_offset 20, -2504
.cfi_offset 21, -2496
.cfi_offset 22, -2488
.cfi_offset 23, -2480
.cfi_offset 24, -2472
.cfi_offset 25, -2464
.cfi_offset 26, -2456
.cfi_offset 27, -2448
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [x29, 2520]
mov x1, 0
mov x0, sp
mov x19, x0
adrp x0, overflow_mode
add x1, x0, :lo12:overflow_mode
mov w0, 3
str w0, [x1]
adrp x0, :got:controller
ldr x0, [x0, #:got_lo12:controller]
add x0, x0, 808
str x0, [x29, 704]
adrp x0, :got:controller
ldr x0, [x0, #:got_lo12:controller]
ldr w0, [x0, 1608]
str w0, [x29, 676]
adrp x0, :got:controller
ldr x0, [x0, #:got_lo12:controller]
str x0, [x29, 712]
adrp x0, :got:controller
ldr x0, [x0, #:got_lo12:controller]
ldr w0, [x0, 800]
str w0, [x29, 680]
adrp x0, :got:controller
ldr x0, [x0, #:got_lo12:controller]
ldr w1, [x0, 1608]
sxtw x0, w1
sub x0, x0, #1
str x0, [x29, 720]
sxtw x0, w1
mov x4, x0
mov x5, 0
lsr x0, x4, 58
lsl x3, x5, 6
orr x3, x0, x3
lsl x2, x4, 6
sxtw x0, w1
mov x8, x0
mov x9, 0
lsr x0, x8, 58
lsl x7, x9, 6
orr x7, x0, x7
lsl x6, x8, 6
sxtw x0, w1
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x1, x0, 4
and x0, x1, -65536
sub x0, sp, x0
.L1209:
cmp sp, x0
beq .L1210
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1209
.L1210:
and x0, x1, 65535
sub sp, sp, x0
str xzr, [sp]
and x0, x1, 65535
cmp x0, 1024
bcc .L1211
str xzr, [sp, 1024]
.L1211:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 728]
adrp x0, :got:controller
ldr x0, [x0, #:got_lo12:controller]
ldr w0, [x0, 1608]
mov w2, w0
ldr x1, [x29, 728]
ldr x0, [x29, 704]
bl fxp_double_to_fxp_array
adrp x0, :got:controller
ldr x0, [x0, #:got_lo12:controller]
ldr w1, [x0, 800]
sxtw x0, w1
sub x0, x0, #1
str x0, [x29, 736]
sxtw x0, w1
mov x24, x0
mov x25, 0
lsr x0, x24, 58
lsl x21, x25, 6
orr x21, x0, x21
lsl x20, x24, 6
sxtw x0, w1
mov x26, x0
mov x27, 0
lsr x0, x26, 58
lsl x23, x27, 6
orr x23, x0, x23
lsl x22, x26, 6
sxtw x0, w1
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x1, x0, 4
and x0, x1, -65536
sub x0, sp, x0
.L1212:
cmp sp, x0
beq .L1213
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1212
.L1213:
and x0, x1, 65535
sub sp, sp, x0
str xzr, [sp]
and x0, x1, 65535
cmp x0, 1024
bcc .L1214
str xzr, [sp, 1024]
.L1214:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 744]
adrp x0, :got:controller
ldr x0, [x0, #:got_lo12:controller]
ldr w0, [x0, 800]
mov w2, w0
ldr x1, [x29, 744]
ldr x0, [x29, 712]
bl fxp_double_to_fxp_array
adrp x0, :got:controller
ldr x0, [x0, #:got_lo12:controller]
ldr w1, [x0, 1608]
sxtw x0, w1
sub x0, x0, #1
str x0, [x29, 752]
sxtw x0, w1
str x0, [x29, 368]
str xzr, [x29, 376]
ldp x2, x3, [x29, 368]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 664]
ldr x4, [x29, 664]
orr x0, x0, x4
str x0, [x29, 664]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 656]
sxtw x0, w1
str x0, [x29, 352]
str xzr, [x29, 360]
ldp x2, x3, [x29, 352]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 648]
ldr x4, [x29, 648]
orr x0, x0, x4
str x0, [x29, 648]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 640]
sxtw x0, w1
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x1, x0, 4
and x0, x1, -65536
sub x0, sp, x0
.L1215:
cmp sp, x0
beq .L1216
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1215
.L1216:
and x0, x1, 65535
sub sp, sp, x0
str xzr, [sp]
and x0, x1, 65535
cmp x0, 1024
bcc .L1217
str xzr, [sp, 1024]
.L1217:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 760]
adrp x0, :got:controller
ldr x0, [x0, #:got_lo12:controller]
ldr w0, [x0, 1608]
mov w2, w0
ldr x1, [x29, 728]
ldr x0, [x29, 760]
bl fxp_to_double_array
adrp x0, :got:controller
ldr x0, [x0, #:got_lo12:controller]
ldr w1, [x0, 800]
sxtw x0, w1
sub x0, x0, #1
str x0, [x29, 768]
sxtw x0, w1
str x0, [x29, 336]
str xzr, [x29, 344]
ldp x2, x3, [x29, 336]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 632]
ldr x4, [x29, 632]
orr x0, x0, x4
str x0, [x29, 632]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 624]
sxtw x0, w1
str x0, [x29, 320]
str xzr, [x29, 328]
ldp x2, x3, [x29, 320]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 616]
ldr x4, [x29, 616]
orr x0, x0, x4
str x0, [x29, 616]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 608]
sxtw x0, w1
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x1, x0, 4
and x0, x1, -65536
sub x0, sp, x0
.L1218:
cmp sp, x0
beq .L1219
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1218
.L1219:
and x0, x1, 65535
sub sp, sp, x0
str xzr, [sp]
and x0, x1, 65535
cmp x0, 1024
bcc .L1220
str xzr, [sp, 1024]
.L1220:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 776]
adrp x0, :got:controller
ldr x0, [x0, #:got_lo12:controller]
ldr w0, [x0, 800]
mov w2, w0
ldr x1, [x29, 744]
ldr x0, [x29, 776]
bl fxp_to_double_array
adrp x0, plant_cbmc+808
add x0, x0, :lo12:plant_cbmc+808
str x0, [x29, 784]
adrp x0, :got:plant
ldr x0, [x0, #:got_lo12:plant]
ldr w0, [x0, 1608]
str w0, [x29, 684]
adrp x0, plant_cbmc
add x0, x0, :lo12:plant_cbmc
str x0, [x29, 792]
adrp x0, :got:plant
ldr x0, [x0, #:got_lo12:plant]
ldr w0, [x0, 800]
str w0, [x29, 688]
adrp x0, :got:controller
ldr x0, [x0, #:got_lo12:controller]
ldr w1, [x0, 1608]
adrp x0, :got:plant
ldr x0, [x0, #:got_lo12:plant]
ldr w0, [x0, 1608]
add w0, w1, w0
sub w0, w0, #1
str w0, [x29, 692]
adrp x0, :got:controller
ldr x0, [x0, #:got_lo12:controller]
ldr w1, [x0, 800]
adrp x0, :got:plant
ldr x0, [x0, #:got_lo12:plant]
ldr w0, [x0, 800]
add w0, w1, w0
sub w0, w0, #1
str w0, [x29, 696]
adrp x0, X_SIZE_VALUE
add x0, x0, :lo12:X_SIZE_VALUE
ldr w1, [x0]
sxtw x0, w1
sub x0, x0, #1
str x0, [x29, 800]
sxtw x0, w1
str x0, [x29, 304]
str xzr, [x29, 312]
ldp x2, x3, [x29, 304]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 600]
ldr x4, [x29, 600]
orr x0, x0, x4
str x0, [x29, 600]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 592]
sxtw x0, w1
str x0, [x29, 288]
str xzr, [x29, 296]
ldp x2, x3, [x29, 288]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 584]
ldr x4, [x29, 584]
orr x0, x0, x4
str x0, [x29, 584]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 576]
sxtw x0, w1
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x1, x0, 4
and x0, x1, -65536
sub x0, sp, x0
.L1221:
cmp sp, x0
beq .L1222
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1221
.L1222:
and x0, x1, 65535
sub sp, sp, x0
str xzr, [sp]
and x0, x1, 65535
cmp x0, 1024
bcc .L1223
str xzr, [sp, 1024]
.L1223:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 808]
adrp x0, X_SIZE_VALUE
add x0, x0, :lo12:X_SIZE_VALUE
ldr w1, [x0]
sxtw x0, w1
sub x0, x0, #1
str x0, [x29, 816]
sxtw x0, w1
str x0, [x29, 272]
str xzr, [x29, 280]
ldp x2, x3, [x29, 272]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 568]
ldr x4, [x29, 568]
orr x0, x0, x4
str x0, [x29, 568]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 560]
sxtw x0, w1
str x0, [x29, 256]
str xzr, [x29, 264]
ldp x2, x3, [x29, 256]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 552]
ldr x4, [x29, 552]
orr x0, x0, x4
str x0, [x29, 552]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 544]
sxtw x0, w1
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x1, x0, 4
and x0, x1, -65536
sub x0, sp, x0
.L1224:
cmp sp, x0
beq .L1225
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1224
.L1225:
and x0, x1, 65535
sub sp, sp, x0
str xzr, [sp]
and x0, x1, 65535
cmp x0, 1024
bcc .L1226
str xzr, [sp, 1024]
.L1226:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 824]
ldr w1, [x29, 692]
sxtw x0, w1
sub x0, x0, #1
str x0, [x29, 832]
sxtw x0, w1
str x0, [x29, 240]
str xzr, [x29, 248]
ldp x2, x3, [x29, 240]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 536]
ldr x4, [x29, 536]
orr x0, x0, x4
str x0, [x29, 536]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 528]
sxtw x0, w1
str x0, [x29, 224]
str xzr, [x29, 232]
ldp x2, x3, [x29, 224]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 520]
ldr x4, [x29, 520]
orr x0, x0, x4
str x0, [x29, 520]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 512]
sxtw x0, w1
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x1, x0, 4
and x0, x1, -65536
sub x0, sp, x0
.L1227:
cmp sp, x0
beq .L1228
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1227
.L1228:
and x0, x1, 65535
sub sp, sp, x0
str xzr, [sp]
and x0, x1, 65535
cmp x0, 1024
bcc .L1229
str xzr, [sp, 1024]
.L1229:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 840]
bl nondet_double
str d0, [x29, 848]
adrp x0, impl
add x0, x0, :lo12:impl
ldr d0, [x0, 16]
ldr d1, [x29, 848]
fcmpe d1, d0
bge .L1260
b .L1230
.L1260:
adrp x0, impl
add x0, x0, :lo12:impl
ldr d0, [x0, 8]
ldr d1, [x29, 848]
fcmpe d1, d0
bls .L1261
b .L1230
.L1261:
mov w0, 1
b .L1233
.L1230:
mov w0, 0
.L1233:
and w0, w0, 1
and w0, w0, 255
bl __DSVERIFIER_assume
str wzr, [x29, 672]
b .L1234
.L1235:
ldr x1, [x29, 824]
ldrsw x0, [x29, 672]
ldr d0, [x29, 848]
str d0, [x1, x0, lsl 3]
ldr x1, [x29, 808]
ldrsw x0, [x29, 672]
str xzr, [x1, x0, lsl 3]
ldr w0, [x29, 672]
add w0, w0, 1
str w0, [x29, 672]
.L1234:
adrp x0, X_SIZE_VALUE
add x0, x0, :lo12:X_SIZE_VALUE
ldr w1, [x0]
ldr w0, [x29, 672]
cmp w0, w1
blt .L1235
str wzr, [x29, 672]
b .L1236
.L1237:
ldr x1, [x29, 840]
ldrsw x0, [x29, 672]
ldr d0, [x29, 848]
str d0, [x1, x0, lsl 3]
ldr w0, [x29, 672]
add w0, w0, 1
str w0, [x29, 672]
.L1236:
ldr w1, [x29, 672]
ldr w0, [x29, 692]
cmp w1, w0
blt .L1237
ldr w1, [x29, 696]
sxtw x0, w1
sub x0, x0, #1
str x0, [x29, 856]
sxtw x0, w1
str x0, [x29, 208]
str xzr, [x29, 216]
ldp x2, x3, [x29, 208]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 504]
ldr x4, [x29, 504]
orr x0, x0, x4
str x0, [x29, 504]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 496]
sxtw x0, w1
str x0, [x29, 192]
str xzr, [x29, 200]
ldp x2, x3, [x29, 192]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 488]
ldr x4, [x29, 488]
orr x0, x0, x4
str x0, [x29, 488]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 480]
sxtw x0, w1
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L1238:
cmp sp, x1
beq .L1239
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1238
.L1239:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L1240
str xzr, [sp, 1024]
.L1240:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 864]
ldr w0, [x29, 696]
sxtw x1, w0
sub x1, x1, #1
str x1, [x29, 872]
sxtw x1, w0
str x1, [x29, 176]
str xzr, [x29, 184]
ldp x2, x3, [x29, 176]
mov x1, x2
lsr x1, x1, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 472]
ldr x4, [x29, 472]
orr x1, x1, x4
str x1, [x29, 472]
mov x1, x2
lsl x1, x1, 6
str x1, [x29, 464]
sxtw x1, w0
str x1, [x29, 160]
str xzr, [x29, 168]
ldp x2, x3, [x29, 160]
mov x1, x2
lsr x1, x1, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 456]
ldr x4, [x29, 456]
orr x1, x1, x4
str x1, [x29, 456]
mov x1, x2
lsl x1, x1, 6
str x1, [x29, 448]
sxtw x0, w0
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L1241:
cmp sp, x1
beq .L1242
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1241
.L1242:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L1243
str xzr, [sp, 1024]
.L1243:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 880]
ldr w0, [x29, 696]
ldr w2, [x29, 692]
ldr w1, [x29, 692]
cmp w2, w0
csel w0, w1, w0, ge
str w0, [x29, 700]
ldr w0, [x29, 700]
sxtw x1, w0
sub x1, x1, #1
str x1, [x29, 888]
sxtw x1, w0
str x1, [x29, 144]
str xzr, [x29, 152]
ldp x2, x3, [x29, 144]
mov x1, x2
lsr x1, x1, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 440]
ldr x4, [x29, 440]
orr x1, x1, x4
str x1, [x29, 440]
mov x1, x2
lsl x1, x1, 6
str x1, [x29, 432]
sxtw x1, w0
str x1, [x29, 128]
str xzr, [x29, 136]
ldp x2, x3, [x29, 128]
mov x1, x2
lsr x1, x1, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 424]
ldr x4, [x29, 424]
orr x1, x1, x4
str x1, [x29, 424]
mov x1, x2
lsl x1, x1, 6
str x1, [x29, 416]
sxtw x0, w0
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L1244:
cmp sp, x1
beq .L1245
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1244
.L1245:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L1246
str xzr, [sp, 1024]
.L1246:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 896]
ldr w0, [x29, 700]
sxtw x1, w0
sub x1, x1, #1
str x1, [x29, 904]
sxtw x1, w0
str x1, [x29, 112]
str xzr, [x29, 120]
ldp x2, x3, [x29, 112]
mov x1, x2
lsr x1, x1, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 408]
ldr x4, [x29, 408]
orr x1, x1, x4
str x1, [x29, 408]
mov x1, x2
lsl x1, x1, 6
str x1, [x29, 400]
sxtw x1, w0
str x1, [x29, 96]
str xzr, [x29, 104]
ldp x2, x3, [x29, 96]
mov x1, x2
lsr x1, x1, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 392]
ldr x4, [x29, 392]
orr x1, x1, x4
str x1, [x29, 392]
mov x1, x2
lsl x1, x1, 6
str x1, [x29, 384]
sxtw x0, w0
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L1247:
cmp sp, x1
beq .L1248
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1247
.L1248:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L1249
str xzr, [sp, 1024]
.L1249:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 912]
str wzr, [x29, 672]
b .L1250
.L1255:
bl nondet_int
scvtf d0, w0
ldr x0, [x29, 896]
ldrsw x1, [x29, 672]
str d0, [x0, x1, lsl 3]
ldr x0, [x29, 896]
ldrsw x1, [x29, 672]
ldr d1, [x0, x1, lsl 3]
adrp x0, impl
add x0, x0, :lo12:impl
ldr d0, [x0, 16]
fcmpe d1, d0
bge .L1262
b .L1251
.L1262:
ldr x0, [x29, 896]
ldrsw x1, [x29, 672]
ldr d1, [x0, x1, lsl 3]
adrp x0, impl
add x0, x0, :lo12:impl
ldr d0, [x0, 8]
fcmpe d1, d0
bls .L1263
b .L1251
.L1263:
mov w0, 1
b .L1254
.L1251:
mov w0, 0
.L1254:
and w0, w0, 1
and w0, w0, 255
bl __DSVERIFIER_assume
ldr x0, [x29, 896]
ldrsw x1, [x29, 672]
ldr d0, [x0, x1, lsl 3]
ldr x0, [x29, 912]
ldrsw x1, [x29, 672]
str d0, [x0, x1, lsl 3]
ldr w0, [x29, 672]
add w0, w0, 1
str w0, [x29, 672]
.L1250:
ldr w1, [x29, 672]
ldr w0, [x29, 700]
cmp w1, w0
blt .L1255
str wzr, [x29, 672]
b .L1256
.L1257:
ldr w1, [x29, 700]
ldr x0, [x29, 896]
movi d0, #0
bl shiftRDdouble
ldr x0, [x29, 824]
ldrsw x1, [x29, 672]
ldr d0, [x0, x1, lsl 3]
add x1, x29, 920
add x0, x29, 1720
ldr w4, [x29, 692]
ldr w3, [x29, 696]
mov x2, x1
mov x1, x0
ldr x0, [x29, 896]
bl double_direct_form_2
ldr x0, [x29, 808]
ldrsw x1, [x29, 672]
str d0, [x0, x1, lsl 3]
ldr w0, [x29, 672]
add w0, w0, 1
str w0, [x29, 672]
.L1256:
adrp x0, X_SIZE_VALUE
add x0, x0, :lo12:X_SIZE_VALUE
ldr w0, [x0]
ldr w1, [x29, 672]
cmp w1, w0
blt .L1257
adrp x0, X_SIZE_VALUE
add x0, x0, :lo12:X_SIZE_VALUE
ldr w0, [x0]
mov w1, w0
ldr x0, [x29, 808]
bl double_check_persistent_limit_cycle
mov w0, 0
mov sp, x19
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [x29, 2520]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L1259
bl __stack_chk_fail
.L1259:
mov w0, w1
sub sp, x29, #16
.cfi_def_cfa 31, 2544
ldp x19, x20, [sp, 32]
ldp x21, x22, [sp, 48]
ldp x23, x24, [sp, 64]
ldp x25, x26, [sp, 80]
ldr x27, [sp, 96]
ldp x29, x30, [sp, 16]
add sp, sp, 2544
.cfi_restore 29
.cfi_restore 30
.cfi_restore 27
.cfi_restore 25
.cfi_restore 26
.cfi_restore 23
.cfi_restore 24
.cfi_restore 21
.cfi_restore 22
.cfi_restore 19
.cfi_restore 20
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE140:
.size verify_limit_cycle_closed_loop, .-verify_limit_cycle_closed_loop
.align 2
.global verify_error_closedloop
.type verify_error_closedloop, %function
verify_error_closedloop:
.LFB141:
.cfi_startproc
mov x12, 4800
sub sp, sp, x12
.cfi_def_cfa_offset 4800
stp x29, x30, [sp, 16]
.cfi_offset 29, -4784
.cfi_offset 30, -4776
add x29, sp, 16
.cfi_def_cfa 29, 4784
stp x19, x20, [sp, 32]
stp x21, x22, [sp, 48]
stp x23, x24, [sp, 64]
stp x25, x26, [sp, 80]
str x27, [sp, 96]
str d8, [sp, 104]
.cfi_offset 19, -4768
.cfi_offset 20, -4760
.cfi_offset 21, -4752
.cfi_offset 22, -4744
.cfi_offset 23, -4736
.cfi_offset 24, -4728
.cfi_offset 25, -4720
.cfi_offset 26, -4712
.cfi_offset 27, -4704
.cfi_offset 72, -4696
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [x29, 4776]
mov x1, 0
mov x0, sp
mov x19, x0
adrp x0, overflow_mode
add x1, x0, :lo12:overflow_mode
mov w0, 3
str w0, [x1]
adrp x0, :got:controller
ldr x0, [x0, #:got_lo12:controller]
add x0, x0, 808
str x0, [x29, 1224]
adrp x0, :got:controller
ldr x0, [x0, #:got_lo12:controller]
ldr w0, [x0, 1608]
str w0, [x29, 1196]
adrp x0, :got:controller
ldr x0, [x0, #:got_lo12:controller]
str x0, [x29, 1232]
adrp x0, :got:controller
ldr x0, [x0, #:got_lo12:controller]
ldr w0, [x0, 800]
str w0, [x29, 1200]
adrp x0, :got:controller
ldr x0, [x0, #:got_lo12:controller]
ldr w1, [x0, 1608]
sxtw x0, w1
sub x0, x0, #1
str x0, [x29, 1240]
sxtw x0, w1
mov x4, x0
mov x5, 0
lsr x0, x4, 58
lsl x3, x5, 6
orr x3, x0, x3
lsl x2, x4, 6
sxtw x0, w1
mov x8, x0
mov x9, 0
lsr x0, x8, 58
lsl x7, x9, 6
orr x7, x0, x7
lsl x6, x8, 6
sxtw x0, w1
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x1, x0, 4
and x0, x1, -65536
sub x0, sp, x0
.L1265:
cmp sp, x0
beq .L1266
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1265
.L1266:
and x0, x1, 65535
sub sp, sp, x0
str xzr, [sp]
and x0, x1, 65535
cmp x0, 1024
bcc .L1267
str xzr, [sp, 1024]
.L1267:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 1248]
adrp x0, :got:controller
ldr x0, [x0, #:got_lo12:controller]
ldr w0, [x0, 1608]
mov w2, w0
ldr x1, [x29, 1248]
ldr x0, [x29, 1224]
bl fxp_double_to_fxp_array
adrp x0, :got:controller
ldr x0, [x0, #:got_lo12:controller]
ldr w1, [x0, 800]
sxtw x0, w1
sub x0, x0, #1
str x0, [x29, 1256]
sxtw x0, w1
mov x24, x0
mov x25, 0
lsr x0, x24, 58
lsl x21, x25, 6
orr x21, x0, x21
lsl x20, x24, 6
sxtw x0, w1
mov x26, x0
mov x27, 0
lsr x0, x26, 58
lsl x23, x27, 6
orr x23, x0, x23
lsl x22, x26, 6
sxtw x0, w1
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x1, x0, 4
and x0, x1, -65536
sub x0, sp, x0
.L1268:
cmp sp, x0
beq .L1269
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1268
.L1269:
and x0, x1, 65535
sub sp, sp, x0
str xzr, [sp]
and x0, x1, 65535
cmp x0, 1024
bcc .L1270
str xzr, [sp, 1024]
.L1270:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 1264]
adrp x0, :got:controller
ldr x0, [x0, #:got_lo12:controller]
ldr w0, [x0, 800]
mov w2, w0
ldr x1, [x29, 1264]
ldr x0, [x29, 1232]
bl fxp_double_to_fxp_array
adrp x0, :got:controller
ldr x0, [x0, #:got_lo12:controller]
ldr w1, [x0, 1608]
sxtw x0, w1
sub x0, x0, #1
str x0, [x29, 1272]
sxtw x0, w1
str x0, [x29, 624]
str xzr, [x29, 632]
add x0, x29, 512
ldp x2, x3, [x0, 112]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 1176]
ldr x4, [x29, 1176]
orr x0, x0, x4
str x0, [x29, 1176]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 1168]
sxtw x0, w1
str x0, [x29, 608]
str xzr, [x29, 616]
add x0, x29, 512
ldp x2, x3, [x0, 96]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 1160]
ldr x4, [x29, 1160]
orr x0, x0, x4
str x0, [x29, 1160]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 1152]
sxtw x0, w1
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x1, x0, 4
and x0, x1, -65536
sub x0, sp, x0
.L1271:
cmp sp, x0
beq .L1272
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1271
.L1272:
and x0, x1, 65535
sub sp, sp, x0
str xzr, [sp]
and x0, x1, 65535
cmp x0, 1024
bcc .L1273
str xzr, [sp, 1024]
.L1273:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 1280]
adrp x0, :got:controller
ldr x0, [x0, #:got_lo12:controller]
ldr w0, [x0, 1608]
mov w2, w0
ldr x1, [x29, 1248]
ldr x0, [x29, 1280]
bl fxp_to_double_array
adrp x0, :got:controller
ldr x0, [x0, #:got_lo12:controller]
ldr w1, [x0, 800]
sxtw x0, w1
sub x0, x0, #1
str x0, [x29, 1288]
sxtw x0, w1
str x0, [x29, 592]
str xzr, [x29, 600]
add x0, x29, 512
ldp x2, x3, [x0, 80]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 1144]
ldr x4, [x29, 1144]
orr x0, x0, x4
str x0, [x29, 1144]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 1136]
sxtw x0, w1
str x0, [x29, 576]
str xzr, [x29, 584]
add x0, x29, 512
ldp x2, x3, [x0, 64]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 1128]
ldr x4, [x29, 1128]
orr x0, x0, x4
str x0, [x29, 1128]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 1120]
sxtw x0, w1
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x1, x0, 4
and x0, x1, -65536
sub x0, sp, x0
.L1274:
cmp sp, x0
beq .L1275
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1274
.L1275:
and x0, x1, 65535
sub sp, sp, x0
str xzr, [sp]
and x0, x1, 65535
cmp x0, 1024
bcc .L1276
str xzr, [sp, 1024]
.L1276:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 1296]
adrp x0, :got:controller
ldr x0, [x0, #:got_lo12:controller]
ldr w0, [x0, 800]
mov w2, w0
ldr x1, [x29, 1264]
ldr x0, [x29, 1296]
bl fxp_to_double_array
adrp x0, plant_cbmc+808
add x0, x0, :lo12:plant_cbmc+808
str x0, [x29, 1304]
adrp x0, :got:plant
ldr x0, [x0, #:got_lo12:plant]
ldr w0, [x0, 1608]
str w0, [x29, 1204]
adrp x0, plant_cbmc
add x0, x0, :lo12:plant_cbmc
str x0, [x29, 1312]
adrp x0, :got:plant
ldr x0, [x0, #:got_lo12:plant]
ldr w0, [x0, 800]
str w0, [x29, 1208]
adrp x0, :got:controller
ldr x0, [x0, #:got_lo12:controller]
ldr w1, [x0, 1608]
adrp x0, :got:plant
ldr x0, [x0, #:got_lo12:plant]
ldr w0, [x0, 1608]
add w0, w1, w0
sub w0, w0, #1
str w0, [x29, 1212]
adrp x0, :got:controller
ldr x0, [x0, #:got_lo12:controller]
ldr w1, [x0, 800]
adrp x0, :got:plant
ldr x0, [x0, #:got_lo12:plant]
ldr w0, [x0, 800]
add w0, w1, w0
sub w0, w0, #1
str w0, [x29, 1216]
adrp x0, X_SIZE_VALUE
add x0, x0, :lo12:X_SIZE_VALUE
ldr w1, [x0]
sxtw x0, w1
sub x0, x0, #1
str x0, [x29, 1320]
sxtw x0, w1
str x0, [x29, 560]
str xzr, [x29, 568]
add x0, x29, 512
ldp x2, x3, [x0, 48]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 1112]
ldr x4, [x29, 1112]
orr x0, x0, x4
str x0, [x29, 1112]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 1104]
sxtw x0, w1
str x0, [x29, 544]
str xzr, [x29, 552]
add x0, x29, 512
ldp x2, x3, [x0, 32]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 1096]
ldr x4, [x29, 1096]
orr x0, x0, x4
str x0, [x29, 1096]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 1088]
sxtw x0, w1
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x1, x0, 4
and x0, x1, -65536
sub x0, sp, x0
.L1277:
cmp sp, x0
beq .L1278
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1277
.L1278:
and x0, x1, 65535
sub sp, sp, x0
str xzr, [sp]
and x0, x1, 65535
cmp x0, 1024
bcc .L1279
str xzr, [sp, 1024]
.L1279:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 1328]
adrp x0, X_SIZE_VALUE
add x0, x0, :lo12:X_SIZE_VALUE
ldr w1, [x0]
sxtw x0, w1
sub x0, x0, #1
str x0, [x29, 1336]
sxtw x0, w1
str x0, [x29, 528]
str xzr, [x29, 536]
add x0, x29, 512
ldp x2, x3, [x0, 16]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 1080]
ldr x4, [x29, 1080]
orr x0, x0, x4
str x0, [x29, 1080]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 1072]
sxtw x0, w1
str x0, [x29, 512]
str xzr, [x29, 520]
add x0, x29, 512
ldp x2, x3, [x0]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 1064]
ldr x4, [x29, 1064]
orr x0, x0, x4
str x0, [x29, 1064]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 1056]
sxtw x0, w1
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x1, x0, 4
and x0, x1, -65536
sub x0, sp, x0
.L1280:
cmp sp, x0
beq .L1281
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1280
.L1281:
and x0, x1, 65535
sub sp, sp, x0
str xzr, [sp]
and x0, x1, 65535
cmp x0, 1024
bcc .L1282
str xzr, [sp, 1024]
.L1282:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 1344]
adrp x0, X_SIZE_VALUE
add x0, x0, :lo12:X_SIZE_VALUE
ldr w1, [x0]
sxtw x0, w1
sub x0, x0, #1
str x0, [x29, 1352]
sxtw x0, w1
str x0, [x29, 496]
str xzr, [x29, 504]
ldp x2, x3, [x29, 496]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 1048]
ldr x4, [x29, 1048]
orr x0, x0, x4
str x0, [x29, 1048]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 1040]
sxtw x0, w1
str x0, [x29, 480]
str xzr, [x29, 488]
ldp x2, x3, [x29, 480]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 1032]
ldr x4, [x29, 1032]
orr x0, x0, x4
str x0, [x29, 1032]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 1024]
sxtw x0, w1
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x1, x0, 4
and x0, x1, -65536
sub x0, sp, x0
.L1283:
cmp sp, x0
beq .L1284
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1283
.L1284:
and x0, x1, 65535
sub sp, sp, x0
str xzr, [sp]
and x0, x1, 65535
cmp x0, 1024
bcc .L1285
str xzr, [sp, 1024]
.L1285:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 1360]
adrp x0, X_SIZE_VALUE
add x0, x0, :lo12:X_SIZE_VALUE
ldr w1, [x0]
sxtw x0, w1
sub x0, x0, #1
str x0, [x29, 1368]
sxtw x0, w1
str x0, [x29, 464]
str xzr, [x29, 472]
ldp x2, x3, [x29, 464]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 1016]
ldr x4, [x29, 1016]
orr x0, x0, x4
str x0, [x29, 1016]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 1008]
sxtw x0, w1
str x0, [x29, 448]
str xzr, [x29, 456]
ldp x2, x3, [x29, 448]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 1000]
ldr x4, [x29, 1000]
orr x0, x0, x4
str x0, [x29, 1000]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 992]
sxtw x0, w1
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x1, x0, 4
and x0, x1, -65536
sub x0, sp, x0
.L1286:
cmp sp, x0
beq .L1287
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1286
.L1287:
and x0, x1, 65535
sub sp, sp, x0
str xzr, [sp]
and x0, x1, 65535
cmp x0, 1024
bcc .L1288
str xzr, [sp, 1024]
.L1288:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 1376]
ldr w1, [x29, 1212]
sxtw x0, w1
sub x0, x0, #1
str x0, [x29, 1384]
sxtw x0, w1
str x0, [x29, 432]
str xzr, [x29, 440]
ldp x2, x3, [x29, 432]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 984]
ldr x4, [x29, 984]
orr x0, x0, x4
str x0, [x29, 984]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 976]
sxtw x0, w1
str x0, [x29, 416]
str xzr, [x29, 424]
ldp x2, x3, [x29, 416]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 968]
ldr x4, [x29, 968]
orr x0, x0, x4
str x0, [x29, 968]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 960]
sxtw x0, w1
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x1, x0, 4
and x0, x1, -65536
sub x0, sp, x0
.L1289:
cmp sp, x0
beq .L1290
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1289
.L1290:
and x0, x1, 65535
sub sp, sp, x0
str xzr, [sp]
and x0, x1, 65535
cmp x0, 1024
bcc .L1291
str xzr, [sp, 1024]
.L1291:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 1392]
ldr w1, [x29, 1212]
sxtw x0, w1
sub x0, x0, #1
str x0, [x29, 1400]
sxtw x0, w1
str x0, [x29, 400]
str xzr, [x29, 408]
ldp x2, x3, [x29, 400]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 952]
ldr x4, [x29, 952]
orr x0, x0, x4
str x0, [x29, 952]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 944]
sxtw x0, w1
str x0, [x29, 384]
str xzr, [x29, 392]
ldp x2, x3, [x29, 384]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 936]
ldr x4, [x29, 936]
orr x0, x0, x4
str x0, [x29, 936]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 928]
sxtw x0, w1
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x1, x0, 4
and x0, x1, -65536
sub x0, sp, x0
.L1292:
cmp sp, x0
beq .L1293
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1292
.L1293:
and x0, x1, 65535
sub sp, sp, x0
str xzr, [sp]
and x0, x1, 65535
cmp x0, 1024
bcc .L1294
str xzr, [sp, 1024]
.L1294:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 1408]
ldr w1, [x29, 1212]
sxtw x0, w1
sub x0, x0, #1
str x0, [x29, 1416]
sxtw x0, w1
str x0, [x29, 368]
str xzr, [x29, 376]
ldp x2, x3, [x29, 368]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 920]
ldr x4, [x29, 920]
orr x0, x0, x4
str x0, [x29, 920]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 912]
sxtw x0, w1
str x0, [x29, 352]
str xzr, [x29, 360]
ldp x2, x3, [x29, 352]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 904]
ldr x4, [x29, 904]
orr x0, x0, x4
str x0, [x29, 904]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 896]
sxtw x0, w1
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x1, x0, 4
and x0, x1, -65536
sub x0, sp, x0
.L1295:
cmp sp, x0
beq .L1296
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1295
.L1296:
and x0, x1, 65535
sub sp, sp, x0
str xzr, [sp]
and x0, x1, 65535
cmp x0, 1024
bcc .L1297
str xzr, [sp, 1024]
.L1297:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 1424]
bl nondet_double
str d0, [x29, 1432]
adrp x0, impl
add x0, x0, :lo12:impl
ldr d0, [x0, 16]
ldr d1, [x29, 1432]
fcmpe d1, d0
bge .L1340
b .L1298
.L1340:
adrp x0, impl
add x0, x0, :lo12:impl
ldr d0, [x0, 8]
ldr d1, [x29, 1432]
fcmpe d1, d0
bls .L1341
b .L1298
.L1341:
mov w0, 1
b .L1301
.L1298:
mov w0, 0
.L1301:
and w0, w0, 1
and w0, w0, 255
bl __DSVERIFIER_assume
str wzr, [x29, 1192]
b .L1302
.L1303:
ldr x1, [x29, 1360]
ldrsw x0, [x29, 1192]
ldr d0, [x29, 1432]
str d0, [x1, x0, lsl 3]
ldr x1, [x29, 1376]
ldrsw x0, [x29, 1192]
ldr d0, [x29, 1432]
str d0, [x1, x0, lsl 3]
ldr x1, [x29, 1328]
ldrsw x0, [x29, 1192]
str xzr, [x1, x0, lsl 3]
ldr x1, [x29, 1344]
ldrsw x0, [x29, 1192]
str xzr, [x1, x0, lsl 3]
ldr w0, [x29, 1192]
add w0, w0, 1
str w0, [x29, 1192]
.L1302:
adrp x0, X_SIZE_VALUE
add x0, x0, :lo12:X_SIZE_VALUE
ldr w1, [x0]
ldr w0, [x29, 1192]
cmp w0, w1
blt .L1303
str wzr, [x29, 1192]
b .L1304
.L1305:
ldr x1, [x29, 1392]
ldrsw x0, [x29, 1192]
ldr d0, [x29, 1432]
str d0, [x1, x0, lsl 3]
ldr x1, [x29, 1408]
ldrsw x0, [x29, 1192]
ldr d0, [x29, 1432]
str d0, [x1, x0, lsl 3]
ldr w0, [x29, 1192]
add w0, w0, 1
str w0, [x29, 1192]
.L1304:
ldr w1, [x29, 1192]
ldr w0, [x29, 1212]
cmp w1, w0
blt .L1305
ldr w1, [x29, 1216]
sxtw x0, w1
sub x0, x0, #1
str x0, [x29, 1440]
sxtw x0, w1
str x0, [x29, 336]
str xzr, [x29, 344]
ldp x2, x3, [x29, 336]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 888]
ldr x4, [x29, 888]
orr x0, x0, x4
str x0, [x29, 888]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 880]
sxtw x0, w1
str x0, [x29, 320]
str xzr, [x29, 328]
ldp x2, x3, [x29, 320]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 872]
ldr x4, [x29, 872]
orr x0, x0, x4
str x0, [x29, 872]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 864]
sxtw x0, w1
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x1, x0, 4
and x0, x1, -65536
sub x0, sp, x0
.L1306:
cmp sp, x0
beq .L1307
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1306
.L1307:
and x0, x1, 65535
sub sp, sp, x0
str xzr, [sp]
and x0, x1, 65535
cmp x0, 1024
bcc .L1308
str xzr, [sp, 1024]
.L1308:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 1448]
ldr w1, [x29, 1216]
sxtw x0, w1
sub x0, x0, #1
str x0, [x29, 1456]
sxtw x0, w1
str x0, [x29, 304]
str xzr, [x29, 312]
ldp x2, x3, [x29, 304]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 856]
ldr x4, [x29, 856]
orr x0, x0, x4
str x0, [x29, 856]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 848]
sxtw x0, w1
str x0, [x29, 288]
str xzr, [x29, 296]
ldp x2, x3, [x29, 288]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 840]
ldr x4, [x29, 840]
orr x0, x0, x4
str x0, [x29, 840]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 832]
sxtw x0, w1
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x1, x0, 4
and x0, x1, -65536
sub x0, sp, x0
.L1309:
cmp sp, x0
beq .L1310
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1309
.L1310:
and x0, x1, 65535
sub sp, sp, x0
str xzr, [sp]
and x0, x1, 65535
cmp x0, 1024
bcc .L1311
str xzr, [sp, 1024]
.L1311:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 1464]
ldr w1, [x29, 1216]
sxtw x0, w1
sub x0, x0, #1
str x0, [x29, 1472]
sxtw x0, w1
str x0, [x29, 272]
str xzr, [x29, 280]
ldp x2, x3, [x29, 272]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 824]
ldr x4, [x29, 824]
orr x0, x0, x4
str x0, [x29, 824]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 816]
sxtw x0, w1
str x0, [x29, 256]
str xzr, [x29, 264]
ldp x2, x3, [x29, 256]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 808]
ldr x4, [x29, 808]
orr x0, x0, x4
str x0, [x29, 808]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 800]
sxtw x0, w1
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x1, x0, 4
and x0, x1, -65536
sub x0, sp, x0
.L1312:
cmp sp, x0
beq .L1313
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1312
.L1313:
and x0, x1, 65535
sub sp, sp, x0
str xzr, [sp]
and x0, x1, 65535
cmp x0, 1024
bcc .L1314
str xzr, [sp, 1024]
.L1314:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 1480]
ldr w1, [x29, 1216]
sxtw x0, w1
sub x0, x0, #1
str x0, [x29, 1488]
sxtw x0, w1
str x0, [x29, 240]
str xzr, [x29, 248]
ldp x2, x3, [x29, 240]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 792]
ldr x4, [x29, 792]
orr x0, x0, x4
str x0, [x29, 792]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 784]
sxtw x0, w1
str x0, [x29, 224]
str xzr, [x29, 232]
ldp x2, x3, [x29, 224]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 776]
ldr x4, [x29, 776]
orr x0, x0, x4
str x0, [x29, 776]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 768]
sxtw x0, w1
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x1, x0, 4
and x0, x1, -65536
sub x0, sp, x0
.L1315:
cmp sp, x0
beq .L1316
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1315
.L1316:
and x0, x1, 65535
sub sp, sp, x0
str xzr, [sp]
and x0, x1, 65535
cmp x0, 1024
bcc .L1317
str xzr, [sp, 1024]
.L1317:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 1496]
ldr w2, [x29, 1216]
ldr w1, [x29, 1212]
ldr w0, [x29, 1212]
cmp w1, w2
csel w0, w0, w2, ge
str w0, [x29, 1220]
ldr w1, [x29, 1220]
sxtw x0, w1
sub x0, x0, #1
str x0, [x29, 1504]
sxtw x0, w1
str x0, [x29, 208]
str xzr, [x29, 216]
ldp x2, x3, [x29, 208]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 760]
ldr x4, [x29, 760]
orr x0, x0, x4
str x0, [x29, 760]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 752]
sxtw x0, w1
str x0, [x29, 192]
str xzr, [x29, 200]
ldp x2, x3, [x29, 192]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 744]
ldr x4, [x29, 744]
orr x0, x0, x4
str x0, [x29, 744]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 736]
sxtw x0, w1
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L1318:
cmp sp, x1
beq .L1319
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1318
.L1319:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L1320
str xzr, [sp, 1024]
.L1320:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 1512]
ldr w0, [x29, 1220]
sxtw x1, w0
sub x1, x1, #1
str x1, [x29, 1520]
sxtw x1, w0
str x1, [x29, 176]
str xzr, [x29, 184]
ldp x2, x3, [x29, 176]
mov x1, x2
lsr x1, x1, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 728]
ldr x4, [x29, 728]
orr x1, x1, x4
str x1, [x29, 728]
mov x1, x2
lsl x1, x1, 6
str x1, [x29, 720]
sxtw x1, w0
str x1, [x29, 160]
str xzr, [x29, 168]
ldp x2, x3, [x29, 160]
mov x1, x2
lsr x1, x1, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 712]
ldr x4, [x29, 712]
orr x1, x1, x4
str x1, [x29, 712]
mov x1, x2
lsl x1, x1, 6
str x1, [x29, 704]
sxtw x0, w0
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L1321:
cmp sp, x1
beq .L1322
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1321
.L1322:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L1323
str xzr, [sp, 1024]
.L1323:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 1528]
ldr w0, [x29, 1220]
sxtw x1, w0
sub x1, x1, #1
str x1, [x29, 1536]
sxtw x1, w0
str x1, [x29, 144]
str xzr, [x29, 152]
ldp x2, x3, [x29, 144]
mov x1, x2
lsr x1, x1, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 696]
ldr x4, [x29, 696]
orr x1, x1, x4
str x1, [x29, 696]
mov x1, x2
lsl x1, x1, 6
str x1, [x29, 688]
sxtw x1, w0
str x1, [x29, 128]
str xzr, [x29, 136]
ldp x2, x3, [x29, 128]
mov x1, x2
lsr x1, x1, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 680]
ldr x4, [x29, 680]
orr x1, x1, x4
str x1, [x29, 680]
mov x1, x2
lsl x1, x1, 6
str x1, [x29, 672]
sxtw x0, w0
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L1324:
cmp sp, x1
beq .L1325
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1324
.L1325:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L1326
str xzr, [sp, 1024]
.L1326:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 1544]
ldr w0, [x29, 1220]
sxtw x1, w0
sub x1, x1, #1
str x1, [x29, 1552]
sxtw x1, w0
str x1, [x29, 112]
str xzr, [x29, 120]
ldp x2, x3, [x29, 112]
mov x1, x2
lsr x1, x1, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 664]
ldr x4, [x29, 664]
orr x1, x1, x4
str x1, [x29, 664]
mov x1, x2
lsl x1, x1, 6
str x1, [x29, 656]
sxtw x1, w0
str x1, [x29, 96]
str xzr, [x29, 104]
ldp x2, x3, [x29, 96]
mov x1, x2
lsr x1, x1, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 648]
ldr x4, [x29, 648]
orr x1, x1, x4
str x1, [x29, 648]
mov x1, x2
lsl x1, x1, 6
str x1, [x29, 640]
sxtw x0, w0
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L1327:
cmp sp, x1
beq .L1328
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1327
.L1328:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L1329
str xzr, [sp, 1024]
.L1329:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 1560]
str wzr, [x29, 1192]
b .L1330
.L1331:
ldr x0, [x29, 1512]
ldrsw x1, [x29, 1192]
str xzr, [x0, x1, lsl 3]
ldr x0, [x29, 1528]
ldrsw x1, [x29, 1192]
str xzr, [x0, x1, lsl 3]
ldr w0, [x29, 1192]
add w0, w0, 1
str w0, [x29, 1192]
.L1330:
ldr w1, [x29, 1192]
ldr w0, [x29, 1220]
cmp w1, w0
blt .L1331
str wzr, [x29, 1192]
b .L1332
.L1337:
ldr w1, [x29, 1220]
ldr x0, [x29, 1512]
movi d0, #0
bl shiftRDdouble
ldr x0, [x29, 1360]
ldrsw x1, [x29, 1192]
ldr d0, [x0, x1, lsl 3]
add x1, x29, 2376
add x0, x29, 3176
ldr w4, [x29, 1212]
ldr w3, [x29, 1216]
mov x2, x1
mov x1, x0
ldr x0, [x29, 1512]
bl double_direct_form_2
ldr x0, [x29, 1328]
ldrsw x1, [x29, 1192]
str d0, [x0, x1, lsl 3]
ldr w1, [x29, 1220]
ldr x0, [x29, 1528]
movi d0, #0
bl shiftRDdouble
ldr x0, [x29, 1376]
ldrsw x1, [x29, 1192]
ldr d0, [x0, x1, lsl 3]
add x1, x29, 1576
add x0, x29, 3976
ldr w4, [x29, 1212]
ldr w3, [x29, 1216]
mov x2, x1
mov x1, x0
ldr x0, [x29, 1528]
bl double_direct_form_2
ldr x0, [x29, 1344]
ldrsw x1, [x29, 1192]
str d0, [x0, x1, lsl 3]
ldr x0, [x29, 1344]
ldrsw x1, [x29, 1192]
ldr d8, [x0, x1, lsl 3]
ldr x0, [x29, 1328]
ldrsw x1, [x29, 1192]
ldr d0, [x0, x1, lsl 3]
fcvtzs x0, d0
bl fxp_to_double
fsub d0, d8, d0
str d0, [x29, 1568]
adrp x0, impl
add x0, x0, :lo12:impl
ldr d0, [x0, 48]
ldr d1, [x29, 1568]
fcmpe d1, d0
bmi .L1342
b .L1333
.L1342:
adrp x0, impl
add x0, x0, :lo12:impl
ldr d0, [x0, 48]
fneg d0, d0
ldr d1, [x29, 1568]
fcmpe d1, d0
bgt .L1343
b .L1333
.L1343:
mov w0, 1
b .L1336
.L1333:
mov w0, 0
.L1336:
and w0, w0, 1
and w0, w0, 255
bl __DSVERIFIER_assert
ldr w0, [x29, 1192]
add w0, w0, 1
str w0, [x29, 1192]
.L1332:
adrp x0, X_SIZE_VALUE
add x0, x0, :lo12:X_SIZE_VALUE
ldr w0, [x0]
ldr w1, [x29, 1192]
cmp w1, w0
blt .L1337
mov w0, 0
mov sp, x19
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [x29, 4776]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L1339
bl __stack_chk_fail
.L1339:
mov w0, w1
sub sp, x29, #16
.cfi_def_cfa 31, 4800
ldr d8, [sp, 104]
ldp x19, x20, [sp, 32]
ldp x21, x22, [sp, 48]
ldp x23, x24, [sp, 64]
ldp x25, x26, [sp, 80]
ldr x27, [sp, 96]
ldp x29, x30, [sp, 16]
mov x12, 4800
add sp, sp, x12
.cfi_restore 29
.cfi_restore 30
.cfi_restore 27
.cfi_restore 25
.cfi_restore 26
.cfi_restore 23
.cfi_restore 24
.cfi_restore 21
.cfi_restore 22
.cfi_restore 19
.cfi_restore 20
.cfi_restore 72
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE141:
.size verify_error_closedloop, .-verify_error_closedloop
.global new_state
.bss
.align 3
.type new_state, %object
.size new_state, 128
new_state:
.zero 128
.global new_stateFWL
.align 3
.type new_stateFWL, %object
.size new_stateFWL, 128
new_stateFWL:
.zero 128
.global _controller_fxp
.align 3
.type _controller_fxp, %object
.size _controller_fxp, 1040
_controller_fxp:
.zero 1040
.global _controller_double
.align 3
.type _controller_double, %object
.size _controller_double, 1040
_controller_double:
.zero 1040
.text
.align 2
.global ss_system_quantization_error
.type ss_system_quantization_error, %function
ss_system_quantization_error:
.LFB142:
.cfi_startproc
sub sp, sp, #1120
.cfi_def_cfa_offset 1120
stp x29, x30, [sp]
.cfi_offset 29, -1120
.cfi_offset 30, -1112
mov x29, sp
str x0, [sp, 24]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 1112]
mov x1, 0
ldr d0, [sp, 24]
scvtf d0, d0
adrp x0, :got:_controller
ldr x0, [x0, #:got_lo12:_controller]
str d0, [x0, 768]
str wzr, [sp, 40]
b .L1345
.L1348:
str wzr, [sp, 44]
b .L1346
.L1347:
adrp x0, :got:_controller
ldr x0, [x0, #:got_lo12:_controller]
ldrsw x1, [sp, 44]
ldrsw x2, [sp, 40]
lsl x2, x2, 2
add x1, x2, x1
ldr d0, [x0, x1, lsl 3]
ldrsw x0, [sp, 44]
ldrsw x1, [sp, 40]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 72
str d0, [x1, x0]
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L1346:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
ldr w1, [sp, 44]
cmp w1, w0
blt .L1347
ldr w0, [sp, 40]
add w0, w0, 1
str w0, [sp, 40]
.L1345:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
ldr w1, [sp, 40]
cmp w1, w0
blt .L1348
str wzr, [sp, 40]
b .L1349
.L1352:
str wzr, [sp, 44]
b .L1350
.L1351:
adrp x0, :got:_controller
ldr x0, [x0, #:got_lo12:_controller]
ldrsw x1, [sp, 44]
ldrsw x2, [sp, 40]
lsl x2, x2, 2
add x1, x2, x1
add x1, x1, 16
ldr d0, [x0, x1, lsl 3]
ldrsw x0, [sp, 44]
ldrsw x1, [sp, 40]
lsl x1, x1, 2
add x0, x1, x0
add x0, x0, 16
lsl x0, x0, 3
add x1, sp, 72
str d0, [x1, x0]
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L1350:
adrp x0, :got:nInputs
ldr x0, [x0, #:got_lo12:nInputs]
ldr w0, [x0]
ldr w1, [sp, 44]
cmp w1, w0
blt .L1351
ldr w0, [sp, 40]
add w0, w0, 1
str w0, [sp, 40]
.L1349:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
ldr w1, [sp, 40]
cmp w1, w0
blt .L1352
str wzr, [sp, 40]
b .L1353
.L1356:
str wzr, [sp, 44]
b .L1354
.L1355:
adrp x0, :got:_controller
ldr x0, [x0, #:got_lo12:_controller]
ldrsw x1, [sp, 44]
ldrsw x2, [sp, 40]
lsl x2, x2, 2
add x1, x2, x1
add x1, x1, 32
ldr d0, [x0, x1, lsl 3]
ldrsw x0, [sp, 44]
ldrsw x1, [sp, 40]
lsl x1, x1, 2
add x0, x1, x0
add x0, x0, 32
lsl x0, x0, 3
add x1, sp, 72
str d0, [x1, x0]
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L1354:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
ldr w1, [sp, 44]
cmp w1, w0
blt .L1355
ldr w0, [sp, 40]
add w0, w0, 1
str w0, [sp, 40]
.L1353:
adrp x0, :got:nOutputs
ldr x0, [x0, #:got_lo12:nOutputs]
ldr w0, [x0]
ldr w1, [sp, 40]
cmp w1, w0
blt .L1356
str wzr, [sp, 40]
b .L1357
.L1360:
str wzr, [sp, 44]
b .L1358
.L1359:
adrp x0, :got:_controller
ldr x0, [x0, #:got_lo12:_controller]
ldrsw x1, [sp, 44]
ldrsw x2, [sp, 40]
lsl x2, x2, 2
add x1, x2, x1
add x1, x1, 48
ldr d0, [x0, x1, lsl 3]
ldrsw x0, [sp, 44]
ldrsw x1, [sp, 40]
lsl x1, x1, 2
add x0, x1, x0
add x0, x0, 48
lsl x0, x0, 3
add x1, sp, 72
str d0, [x1, x0]
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L1358:
adrp x0, :got:nInputs
ldr x0, [x0, #:got_lo12:nInputs]
ldr w0, [x0]
ldr w1, [sp, 44]
cmp w1, w0
blt .L1359
ldr w0, [sp, 40]
add w0, w0, 1
str w0, [sp, 40]
.L1357:
adrp x0, :got:nOutputs
ldr x0, [x0, #:got_lo12:nOutputs]
ldr w0, [x0]
ldr w1, [sp, 40]
cmp w1, w0
blt .L1360
str wzr, [sp, 40]
b .L1361
.L1364:
str wzr, [sp, 44]
b .L1362
.L1363:
adrp x0, :got:_controller
ldr x0, [x0, #:got_lo12:_controller]
ldrsw x1, [sp, 44]
ldrsw x2, [sp, 40]
lsl x2, x2, 2
add x1, x2, x1
add x1, x1, 64
ldr d0, [x0, x1, lsl 3]
ldrsw x0, [sp, 44]
ldrsw x1, [sp, 40]
lsl x1, x1, 2
add x0, x1, x0
add x0, x0, 64
lsl x0, x0, 3
add x1, sp, 72
str d0, [x1, x0]
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L1362:
ldr w0, [sp, 44]
cmp w0, 0
ble .L1363
ldr w0, [sp, 40]
add w0, w0, 1
str w0, [sp, 40]
.L1361:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
ldr w1, [sp, 40]
cmp w1, w0
blt .L1364
str wzr, [sp, 40]
b .L1365
.L1368:
str wzr, [sp, 44]
b .L1366
.L1367:
adrp x0, :got:_controller
ldr x0, [x0, #:got_lo12:_controller]
ldrsw x1, [sp, 44]
ldrsw x2, [sp, 40]
lsl x2, x2, 2
add x1, x2, x1
add x1, x1, 96
ldr d0, [x0, x1, lsl 3]
ldrsw x0, [sp, 44]
ldrsw x1, [sp, 40]
lsl x1, x1, 2
add x0, x1, x0
add x0, x0, 96
lsl x0, x0, 3
add x1, sp, 72
str d0, [x1, x0]
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L1366:
ldr w0, [sp, 44]
cmp w0, 0
ble .L1367
ldr w0, [sp, 40]
add w0, w0, 1
str w0, [sp, 40]
.L1365:
adrp x0, :got:nInputs
ldr x0, [x0, #:got_lo12:nInputs]
ldr w0, [x0]
ldr w1, [sp, 40]
cmp w1, w0
blt .L1368
str wzr, [sp, 40]
b .L1369
.L1372:
str wzr, [sp, 44]
b .L1370
.L1371:
adrp x0, :got:_controller
ldr x0, [x0, #:got_lo12:_controller]
ldrsw x1, [sp, 44]
ldrsw x2, [sp, 40]
lsl x2, x2, 2
add x1, x2, x1
add x1, x1, 80
ldr d0, [x0, x1, lsl 3]
ldrsw x0, [sp, 44]
ldrsw x1, [sp, 40]
lsl x1, x1, 2
add x0, x1, x0
add x0, x0, 80
lsl x0, x0, 3
add x1, sp, 72
str d0, [x1, x0]
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L1370:
ldr w0, [sp, 44]
cmp w0, 0
ble .L1371
ldr w0, [sp, 40]
add w0, w0, 1
str w0, [sp, 40]
.L1369:
adrp x0, :got:nOutputs
ldr x0, [x0, #:got_lo12:nOutputs]
ldr w0, [x0]
ldr w1, [sp, 40]
cmp w1, w0
blt .L1372
str xzr, [sp, 48]
str wzr, [sp, 40]
b .L1373
.L1376:
str wzr, [sp, 44]
b .L1374
.L1375:
adrp x0, new_state
add x0, x0, :lo12:new_state
ldrsw x1, [sp, 44]
ldrsw x2, [sp, 40]
lsl x2, x2, 2
add x1, x2, x1
ldr d0, [x0, x1, lsl 3]
adrp x0, :got:_controller
ldr x0, [x0, #:got_lo12:_controller]
ldrsw x1, [sp, 44]
ldrsw x2, [sp, 40]
lsl x2, x2, 2
add x1, x2, x1
add x1, x1, 64
str d0, [x0, x1, lsl 3]
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L1374:
ldr w0, [sp, 44]
cmp w0, 0
ble .L1375
ldr w0, [sp, 40]
add w0, w0, 1
str w0, [sp, 40]
.L1373:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
ldr w1, [sp, 40]
cmp w1, w0
blt .L1376
bl double_state_space_representation
str d0, [sp, 56]
str wzr, [sp, 40]
b .L1377
.L1380:
str wzr, [sp, 44]
b .L1378
.L1379:
adrp x0, :got:_controller
ldr x0, [x0, #:got_lo12:_controller]
ldrsw x1, [sp, 44]
ldrsw x2, [sp, 40]
lsl x2, x2, 2
add x1, x2, x1
add x1, x1, 64
ldr d0, [x0, x1, lsl 3]
adrp x0, new_state
add x0, x0, :lo12:new_state
ldrsw x1, [sp, 44]
ldrsw x2, [sp, 40]
lsl x2, x2, 2
add x1, x2, x1
str d0, [x0, x1, lsl 3]
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L1378:
ldr w0, [sp, 44]
cmp w0, 0
ble .L1379
ldr w0, [sp, 40]
add w0, w0, 1
str w0, [sp, 40]
.L1377:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
ldr w1, [sp, 40]
cmp w1, w0
blt .L1380
ldr d0, [sp, 24]
scvtf d0, d0
str d0, [sp, 840]
str wzr, [sp, 40]
b .L1381
.L1384:
str wzr, [sp, 44]
b .L1382
.L1383:
ldrsw x0, [sp, 44]
ldrsw x1, [sp, 40]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 72
ldr d0, [x1, x0]
adrp x0, :got:_controller
ldr x0, [x0, #:got_lo12:_controller]
ldrsw x1, [sp, 44]
ldrsw x2, [sp, 40]
lsl x2, x2, 2
add x1, x2, x1
str d0, [x0, x1, lsl 3]
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L1382:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
ldr w1, [sp, 44]
cmp w1, w0
blt .L1383
ldr w0, [sp, 40]
add w0, w0, 1
str w0, [sp, 40]
.L1381:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
ldr w1, [sp, 40]
cmp w1, w0
blt .L1384
str wzr, [sp, 40]
b .L1385
.L1388:
str wzr, [sp, 44]
b .L1386
.L1387:
ldrsw x0, [sp, 44]
ldrsw x1, [sp, 40]
lsl x1, x1, 2
add x0, x1, x0
add x0, x0, 16
lsl x0, x0, 3
add x1, sp, 72
ldr d0, [x1, x0]
adrp x0, :got:_controller
ldr x0, [x0, #:got_lo12:_controller]
ldrsw x1, [sp, 44]
ldrsw x2, [sp, 40]
lsl x2, x2, 2
add x1, x2, x1
add x1, x1, 16
str d0, [x0, x1, lsl 3]
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L1386:
adrp x0, :got:nInputs
ldr x0, [x0, #:got_lo12:nInputs]
ldr w0, [x0]
ldr w1, [sp, 44]
cmp w1, w0
blt .L1387
ldr w0, [sp, 40]
add w0, w0, 1
str w0, [sp, 40]
.L1385:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
ldr w1, [sp, 40]
cmp w1, w0
blt .L1388
str wzr, [sp, 40]
b .L1389
.L1392:
str wzr, [sp, 44]
b .L1390
.L1391:
ldrsw x0, [sp, 44]
ldrsw x1, [sp, 40]
lsl x1, x1, 2
add x0, x1, x0
add x0, x0, 32
lsl x0, x0, 3
add x1, sp, 72
ldr d0, [x1, x0]
adrp x0, :got:_controller
ldr x0, [x0, #:got_lo12:_controller]
ldrsw x1, [sp, 44]
ldrsw x2, [sp, 40]
lsl x2, x2, 2
add x1, x2, x1
add x1, x1, 32
str d0, [x0, x1, lsl 3]
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L1390:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
ldr w1, [sp, 44]
cmp w1, w0
blt .L1391
ldr w0, [sp, 40]
add w0, w0, 1
str w0, [sp, 40]
.L1389:
adrp x0, :got:nOutputs
ldr x0, [x0, #:got_lo12:nOutputs]
ldr w0, [x0]
ldr w1, [sp, 40]
cmp w1, w0
blt .L1392
str wzr, [sp, 40]
b .L1393
.L1396:
str wzr, [sp, 44]
b .L1394
.L1395:
ldrsw x0, [sp, 44]
ldrsw x1, [sp, 40]
lsl x1, x1, 2
add x0, x1, x0
add x0, x0, 48
lsl x0, x0, 3
add x1, sp, 72
ldr d0, [x1, x0]
adrp x0, :got:_controller
ldr x0, [x0, #:got_lo12:_controller]
ldrsw x1, [sp, 44]
ldrsw x2, [sp, 40]
lsl x2, x2, 2
add x1, x2, x1
add x1, x1, 48
str d0, [x0, x1, lsl 3]
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L1394:
adrp x0, :got:nInputs
ldr x0, [x0, #:got_lo12:nInputs]
ldr w0, [x0]
ldr w1, [sp, 44]
cmp w1, w0
blt .L1395
ldr w0, [sp, 40]
add w0, w0, 1
str w0, [sp, 40]
.L1393:
adrp x0, :got:nOutputs
ldr x0, [x0, #:got_lo12:nOutputs]
ldr w0, [x0]
ldr w1, [sp, 40]
cmp w1, w0
blt .L1396
str wzr, [sp, 40]
b .L1397
.L1400:
str wzr, [sp, 44]
b .L1398
.L1399:
ldrsw x0, [sp, 44]
ldrsw x1, [sp, 40]
lsl x1, x1, 2
add x0, x1, x0
add x0, x0, 64
lsl x0, x0, 3
add x1, sp, 72
ldr d0, [x1, x0]
adrp x0, :got:_controller
ldr x0, [x0, #:got_lo12:_controller]
ldrsw x1, [sp, 44]
ldrsw x2, [sp, 40]
lsl x2, x2, 2
add x1, x2, x1
add x1, x1, 64
str d0, [x0, x1, lsl 3]
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L1398:
ldr w0, [sp, 44]
cmp w0, 0
ble .L1399
ldr w0, [sp, 40]
add w0, w0, 1
str w0, [sp, 40]
.L1397:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
ldr w1, [sp, 40]
cmp w1, w0
blt .L1400
str wzr, [sp, 40]
b .L1401
.L1404:
str wzr, [sp, 44]
b .L1402
.L1403:
ldrsw x0, [sp, 44]
ldrsw x1, [sp, 40]
lsl x1, x1, 2
add x0, x1, x0
add x0, x0, 96
lsl x0, x0, 3
add x1, sp, 72
ldr d0, [x1, x0]
adrp x0, :got:_controller
ldr x0, [x0, #:got_lo12:_controller]
ldrsw x1, [sp, 44]
ldrsw x2, [sp, 40]
lsl x2, x2, 2
add x1, x2, x1
add x1, x1, 96
str d0, [x0, x1, lsl 3]
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L1402:
ldr w0, [sp, 44]
cmp w0, 0
ble .L1403
ldr w0, [sp, 40]
add w0, w0, 1
str w0, [sp, 40]
.L1401:
adrp x0, :got:nInputs
ldr x0, [x0, #:got_lo12:nInputs]
ldr w0, [x0]
ldr w1, [sp, 40]
cmp w1, w0
blt .L1404
str wzr, [sp, 40]
b .L1405
.L1408:
str wzr, [sp, 44]
b .L1406
.L1407:
ldrsw x0, [sp, 44]
ldrsw x1, [sp, 40]
lsl x1, x1, 2
add x0, x1, x0
add x0, x0, 80
lsl x0, x0, 3
add x1, sp, 72
ldr d0, [x1, x0]
adrp x0, :got:_controller
ldr x0, [x0, #:got_lo12:_controller]
ldrsw x1, [sp, 44]
ldrsw x2, [sp, 40]
lsl x2, x2, 2
add x1, x2, x1
add x1, x1, 80
str d0, [x0, x1, lsl 3]
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L1406:
ldr w0, [sp, 44]
cmp w0, 0
ble .L1407
ldr w0, [sp, 40]
add w0, w0, 1
str w0, [sp, 40]
.L1405:
adrp x0, :got:nOutputs
ldr x0, [x0, #:got_lo12:nOutputs]
ldr w0, [x0]
ldr w1, [sp, 40]
cmp w1, w0
blt .L1408
str wzr, [sp, 40]
b .L1409
.L1412:
str wzr, [sp, 44]
b .L1410
.L1411:
adrp x0, new_stateFWL
add x0, x0, :lo12:new_stateFWL
ldrsw x1, [sp, 44]
ldrsw x2, [sp, 40]
lsl x2, x2, 2
add x1, x2, x1
ldr d0, [x0, x1, lsl 3]
adrp x0, :got:_controller
ldr x0, [x0, #:got_lo12:_controller]
ldrsw x1, [sp, 44]
ldrsw x2, [sp, 40]
lsl x2, x2, 2
add x1, x2, x1
add x1, x1, 64
str d0, [x0, x1, lsl 3]
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L1410:
ldr w0, [sp, 44]
cmp w0, 0
ble .L1411
ldr w0, [sp, 40]
add w0, w0, 1
str w0, [sp, 40]
.L1409:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
ldr w1, [sp, 40]
cmp w1, w0
blt .L1412
bl fxp_state_space_representation
str d0, [sp, 64]
str wzr, [sp, 40]
b .L1413
.L1416:
str wzr, [sp, 44]
b .L1414
.L1415:
adrp x0, :got:_controller
ldr x0, [x0, #:got_lo12:_controller]
ldrsw x1, [sp, 44]
ldrsw x2, [sp, 40]
lsl x2, x2, 2
add x1, x2, x1
add x1, x1, 64
ldr d0, [x0, x1, lsl 3]
adrp x0, new_stateFWL
add x0, x0, :lo12:new_stateFWL
ldrsw x1, [sp, 44]
ldrsw x2, [sp, 40]
lsl x2, x2, 2
add x1, x2, x1
str d0, [x0, x1, lsl 3]
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L1414:
ldr w0, [sp, 44]
cmp w0, 0
ble .L1415
ldr w0, [sp, 40]
add w0, w0, 1
str w0, [sp, 40]
.L1413:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
ldr w1, [sp, 40]
cmp w1, w0
blt .L1416
ldr d1, [sp, 56]
ldr d0, [sp, 64]
fsub d0, d1, d0
str d0, [sp, 48]
ldr d0, [sp, 48]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [sp, 1112]
ldr x1, [x0]
subs x2, x2, x1
mov x1, 0
beq .L1418
bl __stack_chk_fail
.L1418:
ldp x29, x30, [sp]
add sp, sp, 1120
.cfi_restore 29
.cfi_restore 30
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE142:
.size ss_system_quantization_error, .-ss_system_quantization_error
.align 2
.global fxp_ss_closed_loop_quantization_error
.type fxp_ss_closed_loop_quantization_error, %function
fxp_ss_closed_loop_quantization_error:
.LFB143:
.cfi_startproc
sub sp, sp, #1088
.cfi_def_cfa_offset 1088
stp x29, x30, [sp]
.cfi_offset 29, -1088
.cfi_offset 30, -1080
mov x29, sp
str d0, [sp, 24]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 1080]
mov x1, 0
strh wzr, [sp, 42]
str wzr, [sp, 44]
b .L1420
.L1424:
str wzr, [sp, 48]
b .L1421
.L1423:
adrp x0, _controller_fxp
add x0, x0, :lo12:_controller_fxp
ldr w1, [sp, 48]
ldr w2, [sp, 44]
lsl x2, x2, 2
add x1, x2, x1
add x1, x1, 48
ldr d0, [x0, x1, lsl 3]
fcmp d0, #0.0
beq .L1422
mov w0, 1
strh w0, [sp, 42]
.L1422:
ldr w0, [sp, 48]
add w0, w0, 1
str w0, [sp, 48]
.L1421:
adrp x0, :got:nInputs
ldr x0, [x0, #:got_lo12:nInputs]
ldr w0, [x0]
mov w1, w0
ldr w0, [sp, 48]
cmp w0, w1
bcc .L1423
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L1420:
adrp x0, :got:nOutputs
ldr x0, [x0, #:got_lo12:nOutputs]
ldr w0, [x0]
mov w1, w0
ldr w0, [sp, 44]
cmp w0, w1
bcc .L1424
str wzr, [sp, 44]
b .L1425
.L1428:
str wzr, [sp, 48]
b .L1426
.L1427:
ldr w0, [sp, 48]
ldr w1, [sp, 44]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 56
str xzr, [x1, x0]
ldr w0, [sp, 48]
ldr w1, [sp, 44]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 440
str xzr, [x1, x0]
ldr w0, [sp, 48]
add w0, w0, 1
str w0, [sp, 48]
.L1426:
ldr w0, [sp, 48]
cmp w0, 3
bls .L1427
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L1425:
ldr w0, [sp, 44]
cmp w0, 3
bls .L1428
str wzr, [sp, 44]
b .L1429
.L1430:
ldr w0, [sp, 44]
lsl x0, x0, 5
add x1, sp, 56
ldr d0, [sp, 24]
str d0, [x1, x0]
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L1429:
adrp x0, :got:nInputs
ldr x0, [x0, #:got_lo12:nInputs]
ldr w0, [x0]
mov w1, w0
ldr w0, [sp, 44]
cmp w0, w1
bcc .L1430
str wzr, [sp, 44]
b .L1431
.L1432:
ldr w0, [sp, 44]
lsl x0, x0, 5
add x1, sp, 568
str xzr, [x1, x0]
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L1431:
ldr w0, [sp, 44]
cmp w0, 3
bls .L1432
str wzr, [sp, 44]
b .L1433
.L1434:
adrp x0, _controller_fxp
add x0, x0, :lo12:_controller_fxp
ldr w1, [sp, 44]
add x1, x1, 112
ldr d0, [x0, x1, lsl 3]
bl fxp_double_to_fxp
mov x2, x0
ldr w0, [sp, 44]
lsl x0, x0, 3
add x1, sp, 440
str x2, [x1, x0]
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L1433:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w1, w0
ldr w0, [sp, 44]
cmp w0, w1
bcc .L1434
str wzr, [sp, 44]
b .L1435
.L1438:
str wzr, [sp, 48]
b .L1436
.L1437:
ldr w0, [sp, 48]
ldr w1, [sp, 44]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 184
str xzr, [x1, x0]
ldr w0, [sp, 48]
ldr w1, [sp, 44]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 312
str xzr, [x1, x0]
ldr w0, [sp, 48]
add w0, w0, 1
str w0, [sp, 48]
.L1436:
ldr w0, [sp, 48]
cmp w0, 3
bls .L1437
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L1435:
ldr w0, [sp, 44]
cmp w0, 3
bls .L1438
str wzr, [sp, 52]
b .L1439
.L1440:
adrp x0, _controller_fxp
add x1, x0, :lo12:_controller_fxp
ldr w0, [sp, 52]
add x0, x0, 16
lsl x0, x0, 5
add x0, x1, x0
ldr d0, [x0]
bl fxp_double_to_fxp
mov x2, x0
ldr w0, [sp, 52]
lsl x0, x0, 5
add x1, sp, 568
str x2, [x1, x0]
ldr w0, [sp, 52]
add w0, w0, 1
str w0, [sp, 52]
.L1439:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w1, w0
ldr w0, [sp, 52]
cmp w0, w1
bcc .L1440
adrp x0, :got:nOutputs
ldr x0, [x0, #:got_lo12:nOutputs]
ldr w0, [x0]
mov w7, w0
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w8, w0
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w9, w0
add x2, sp, 696
add x1, sp, 568
add x0, sp, 440
mov x6, x2
mov x5, x1
mov x4, x0
mov w3, 1
mov w2, w9
mov w1, w8
mov w0, w7
bl fxp_matrix_multiplication
str wzr, [sp, 52]
b .L1441
.L1442:
ldr w0, [sp, 52]
lsl x0, x0, 5
add x1, sp, 56
ldr d0, [x1, x0]
fcvtzs x0, d0
bl fxp_quantize
scvtf d0, x0
bl fxp_double_to_fxp
mov x2, x0
ldr w0, [sp, 52]
lsl x0, x0, 5
add x1, sp, 824
str x2, [x1, x0]
ldr w0, [sp, 52]
add w0, w0, 1
str w0, [sp, 52]
.L1441:
adrp x0, :got:nInputs
ldr x0, [x0, #:got_lo12:nInputs]
ldr w0, [x0]
mov w1, w0
ldr w0, [sp, 52]
cmp w0, w1
bcc .L1442
adrp x0, :got:nInputs
ldr x0, [x0, #:got_lo12:nInputs]
ldr w0, [x0]
mov w5, w0
add x2, sp, 952
add x1, sp, 696
add x0, sp, 824
mov x4, x2
mov x3, x1
mov x2, x0
mov w1, 1
mov w0, w5
bl fxp_sub_matrix
str wzr, [sp, 52]
b .L1443
.L1444:
ldr w0, [sp, 52]
lsl x0, x0, 5
add x1, sp, 952
ldr x0, [x1, x0]
bl fxp_quantize
bl fxp_to_double
adrp x0, _controller_fxp
add x1, x0, :lo12:_controller_fxp
ldr w0, [sp, 52]
add x0, x0, 24
lsl x0, x0, 5
add x0, x1, x0
str d0, [x0]
ldr w0, [sp, 52]
add w0, w0, 1
str w0, [sp, 52]
.L1443:
adrp x0, :got:nInputs
ldr x0, [x0, #:got_lo12:nInputs]
ldr w0, [x0]
mov w1, w0
ldr w0, [sp, 52]
cmp w0, w1
bcc .L1444
adrp x0, :got:nOutputs
ldr x0, [x0, #:got_lo12:nOutputs]
ldr w0, [x0]
mov w7, w0
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w1, w0
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w2, w0
add x0, sp, 184
mov x6, x0
adrp x0, _controller_fxp+512
add x5, x0, :lo12:_controller_fxp+512
adrp x0, _controller_fxp+256
add x4, x0, :lo12:_controller_fxp+256
mov w3, 1
mov w0, w7
bl double_matrix_multiplication
ldrh w0, [sp, 42]
cmp w0, 1
bne .L1445
adrp x0, :got:nOutputs
ldr x0, [x0, #:got_lo12:nOutputs]
ldr w0, [x0]
mov w7, w0
adrp x0, :got:nInputs
ldr x0, [x0, #:got_lo12:nInputs]
ldr w0, [x0]
mov w1, w0
adrp x0, :got:nInputs
ldr x0, [x0, #:got_lo12:nInputs]
ldr w0, [x0]
mov w2, w0
add x0, sp, 312
mov x6, x0
adrp x0, _controller_fxp+768
add x5, x0, :lo12:_controller_fxp+768
adrp x0, _controller_fxp+384
add x4, x0, :lo12:_controller_fxp+384
mov w3, 1
mov w0, w7
bl double_matrix_multiplication
.L1445:
adrp x0, :got:nOutputs
ldr x0, [x0, #:got_lo12:nOutputs]
ldr w0, [x0]
mov w5, w0
add x2, sp, 312
add x1, sp, 184
adrp x0, _controller_fxp+640
add x4, x0, :lo12:_controller_fxp+640
mov x3, x2
mov x2, x1
mov w1, 1
mov w0, w5
bl double_add_matrix
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w7, w0
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w1, w0
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w2, w0
add x0, sp, 184
mov x6, x0
adrp x0, _controller_fxp+512
add x5, x0, :lo12:_controller_fxp+512
adrp x0, _controller_fxp
add x4, x0, :lo12:_controller_fxp
mov w3, 1
mov w0, w7
bl double_matrix_multiplication
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w7, w0
adrp x0, :got:nInputs
ldr x0, [x0, #:got_lo12:nInputs]
ldr w0, [x0]
mov w1, w0
adrp x0, :got:nInputs
ldr x0, [x0, #:got_lo12:nInputs]
ldr w0, [x0]
mov w2, w0
add x0, sp, 312
mov x6, x0
adrp x0, _controller_fxp+768
add x5, x0, :lo12:_controller_fxp+768
adrp x0, _controller_fxp+128
add x4, x0, :lo12:_controller_fxp+128
mov w3, 1
mov w0, w7
bl double_matrix_multiplication
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w5, w0
add x2, sp, 312
add x1, sp, 184
adrp x0, _controller_fxp+512
add x4, x0, :lo12:_controller_fxp+512
mov x3, x2
mov x2, x1
mov w1, 1
mov w0, w5
bl double_add_matrix
adrp x0, _controller_fxp
add x0, x0, :lo12:_controller_fxp
ldr d0, [x0, 640]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [sp, 1080]
ldr x1, [x0]
subs x2, x2, x1
mov x1, 0
beq .L1447
bl __stack_chk_fail
.L1447:
ldp x29, x30, [sp]
add sp, sp, 1088
.cfi_restore 29
.cfi_restore 30
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE143:
.size fxp_ss_closed_loop_quantization_error, .-fxp_ss_closed_loop_quantization_error
.align 2
.global ss_closed_loop_quantization_error
.type ss_closed_loop_quantization_error, %function
ss_closed_loop_quantization_error:
.LFB144:
.cfi_startproc
stp x29, x30, [sp, -448]!
.cfi_def_cfa_offset 448
.cfi_offset 29, -448
.cfi_offset 30, -440
mov x29, sp
str d0, [sp, 24]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 440]
mov x1, 0
strh wzr, [sp, 46]
str wzr, [sp, 48]
b .L1449
.L1453:
str wzr, [sp, 52]
b .L1450
.L1452:
adrp x0, _controller_double
add x0, x0, :lo12:_controller_double
ldr w1, [sp, 52]
ldr w2, [sp, 48]
lsl x2, x2, 2
add x1, x2, x1
add x1, x1, 48
ldr d0, [x0, x1, lsl 3]
fcmp d0, #0.0
beq .L1451
mov w0, 1
strh w0, [sp, 46]
.L1451:
ldr w0, [sp, 52]
add w0, w0, 1
str w0, [sp, 52]
.L1450:
adrp x0, :got:nInputs
ldr x0, [x0, #:got_lo12:nInputs]
ldr w0, [x0]
mov w1, w0
ldr w0, [sp, 52]
cmp w0, w1
bcc .L1452
ldr w0, [sp, 48]
add w0, w0, 1
str w0, [sp, 48]
.L1449:
adrp x0, :got:nOutputs
ldr x0, [x0, #:got_lo12:nOutputs]
ldr w0, [x0]
mov w1, w0
ldr w0, [sp, 48]
cmp w0, w1
bcc .L1453
str wzr, [sp, 48]
b .L1454
.L1457:
str wzr, [sp, 52]
b .L1455
.L1456:
ldr w0, [sp, 52]
ldr w1, [sp, 48]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 56
ldr d0, [sp, 24]
str d0, [x1, x0]
ldr w0, [sp, 52]
add w0, w0, 1
str w0, [sp, 52]
.L1455:
ldr w0, [sp, 52]
cmp w0, 0
beq .L1456
ldr w0, [sp, 48]
add w0, w0, 1
str w0, [sp, 48]
.L1454:
adrp x0, :got:nInputs
ldr x0, [x0, #:got_lo12:nInputs]
ldr w0, [x0]
mov w1, w0
ldr w0, [sp, 48]
cmp w0, w1
bcc .L1457
str wzr, [sp, 48]
b .L1458
.L1461:
str wzr, [sp, 52]
b .L1459
.L1460:
ldr w0, [sp, 52]
ldr w1, [sp, 48]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 184
str xzr, [x1, x0]
ldr w0, [sp, 52]
ldr w1, [sp, 48]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 312
str xzr, [x1, x0]
ldr w0, [sp, 52]
add w0, w0, 1
str w0, [sp, 52]
.L1459:
ldr w0, [sp, 52]
cmp w0, 3
bls .L1460
ldr w0, [sp, 48]
add w0, w0, 1
str w0, [sp, 48]
.L1458:
ldr w0, [sp, 48]
cmp w0, 3
bls .L1461
adrp x0, :got:nOutputs
ldr x0, [x0, #:got_lo12:nOutputs]
ldr w0, [x0]
mov w7, w0
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w1, w0
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w2, w0
add x0, sp, 184
mov x6, x0
adrp x0, _controller_double+512
add x5, x0, :lo12:_controller_double+512
adrp x0, _controller_double+896
add x4, x0, :lo12:_controller_double+896
mov w3, 1
mov w0, w7
bl double_matrix_multiplication
adrp x0, :got:nInputs
ldr x0, [x0, #:got_lo12:nInputs]
ldr w0, [x0]
mov w5, w0
add x2, sp, 184
add x1, sp, 56
adrp x0, _controller_double+768
add x4, x0, :lo12:_controller_double+768
mov x3, x2
mov x2, x1
mov w1, 1
mov w0, w5
bl double_sub_matrix
adrp x0, :got:nOutputs
ldr x0, [x0, #:got_lo12:nOutputs]
ldr w0, [x0]
mov w7, w0
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w1, w0
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w2, w0
add x0, sp, 184
mov x6, x0
adrp x0, _controller_double+512
add x5, x0, :lo12:_controller_double+512
adrp x0, _controller_double+256
add x4, x0, :lo12:_controller_double+256
mov w3, 1
mov w0, w7
bl double_matrix_multiplication
ldrh w0, [sp, 46]
cmp w0, 1
bne .L1462
adrp x0, :got:nOutputs
ldr x0, [x0, #:got_lo12:nOutputs]
ldr w0, [x0]
mov w7, w0
adrp x0, :got:nInputs
ldr x0, [x0, #:got_lo12:nInputs]
ldr w0, [x0]
mov w1, w0
adrp x0, :got:nInputs
ldr x0, [x0, #:got_lo12:nInputs]
ldr w0, [x0]
mov w2, w0
add x0, sp, 312
mov x6, x0
adrp x0, _controller_double+768
add x5, x0, :lo12:_controller_double+768
adrp x0, _controller_double+384
add x4, x0, :lo12:_controller_double+384
mov w3, 1
mov w0, w7
bl double_matrix_multiplication
.L1462:
adrp x0, :got:nOutputs
ldr x0, [x0, #:got_lo12:nOutputs]
ldr w0, [x0]
mov w5, w0
add x2, sp, 312
add x1, sp, 184
adrp x0, _controller_double+640
add x4, x0, :lo12:_controller_double+640
mov x3, x2
mov x2, x1
mov w1, 1
mov w0, w5
bl double_add_matrix
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w7, w0
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w1, w0
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w2, w0
add x0, sp, 184
mov x6, x0
adrp x0, _controller_double+512
add x5, x0, :lo12:_controller_double+512
adrp x0, _controller_double
add x4, x0, :lo12:_controller_double
mov w3, 1
mov w0, w7
bl double_matrix_multiplication
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w7, w0
adrp x0, :got:nInputs
ldr x0, [x0, #:got_lo12:nInputs]
ldr w0, [x0]
mov w1, w0
adrp x0, :got:nInputs
ldr x0, [x0, #:got_lo12:nInputs]
ldr w0, [x0]
mov w2, w0
add x0, sp, 312
mov x6, x0
adrp x0, _controller_double+768
add x5, x0, :lo12:_controller_double+768
adrp x0, _controller_double+128
add x4, x0, :lo12:_controller_double+128
mov w3, 1
mov w0, w7
bl double_matrix_multiplication
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w5, w0
add x2, sp, 312
add x1, sp, 184
adrp x0, _controller_double+512
add x4, x0, :lo12:_controller_double+512
mov x3, x2
mov x2, x1
mov w1, 1
mov w0, w5
bl double_add_matrix
adrp x0, _controller_double
add x0, x0, :lo12:_controller_double
ldr d0, [x0, 640]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [sp, 440]
ldr x1, [x0]
subs x2, x2, x1
mov x1, 0
beq .L1464
bl __stack_chk_fail
.L1464:
ldp x29, x30, [sp], 448
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE144:
.size ss_closed_loop_quantization_error, .-ss_closed_loop_quantization_error
.section .rodata
.align 3
.LC54:
.string "/home/yashchopda/Desktop/dsverifier-v2.0.3-esbmc-v4.0-cbmc-5.6/bmc/engine/verify_error_state_space.h"
.align 3
.LC55:
.string "__quant_error < error_limit && __quant_error > ((-1)*error_limit)"
.text
.align 2
.global verify_error_state_space
.type verify_error_state_space, %function
verify_error_state_space:
.LFB145:
.cfi_startproc
stp x29, x30, [sp, -96]!
.cfi_def_cfa_offset 96
.cfi_offset 29, -96
.cfi_offset 30, -88
mov x29, sp
str d8, [sp, 16]
.cfi_offset 72, -80
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 88]
mov x1, 0
str wzr, [sp, 40]
b .L1466
.L1469:
str wzr, [sp, 44]
b .L1467
.L1468:
adrp x0, :got:_controller
ldr x0, [x0, #:got_lo12:_controller]
ldrsw x1, [sp, 44]
ldrsw x2, [sp, 40]
lsl x2, x2, 2
add x1, x2, x1
add x1, x1, 64
ldr d0, [x0, x1, lsl 3]
adrp x0, new_state
add x0, x0, :lo12:new_state
ldrsw x1, [sp, 44]
ldrsw x2, [sp, 40]
lsl x2, x2, 2
add x1, x2, x1
str d0, [x0, x1, lsl 3]
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L1467:
ldr w0, [sp, 44]
cmp w0, 0
ble .L1468
ldr w0, [sp, 40]
add w0, w0, 1
str w0, [sp, 40]
.L1466:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
ldr w1, [sp, 40]
cmp w1, w0
blt .L1469
str wzr, [sp, 40]
b .L1470
.L1473:
str wzr, [sp, 44]
b .L1471
.L1472:
adrp x0, :got:_controller
ldr x0, [x0, #:got_lo12:_controller]
ldrsw x1, [sp, 44]
ldrsw x2, [sp, 40]
lsl x2, x2, 2
add x1, x2, x1
add x1, x1, 64
ldr d0, [x0, x1, lsl 3]
adrp x0, new_stateFWL
add x0, x0, :lo12:new_stateFWL
ldrsw x1, [sp, 44]
ldrsw x2, [sp, 40]
lsl x2, x2, 2
add x1, x2, x1
str d0, [x0, x1, lsl 3]
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L1471:
ldr w0, [sp, 44]
cmp w0, 0
ble .L1472
ldr w0, [sp, 40]
add w0, w0, 1
str w0, [sp, 40]
.L1470:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
ldr w1, [sp, 40]
cmp w1, w0
blt .L1473
adrp x0, _controller_fxp
add x1, x0, :lo12:_controller_fxp
adrp x0, :got:_controller
ldr x0, [x0, #:got_lo12:_controller]
mov x3, x1
mov x1, x0
mov x0, 1040
mov x2, x0
mov x0, x3
bl memcpy
adrp x0, _controller_double
add x1, x0, :lo12:_controller_double
adrp x0, :got:_controller
ldr x0, [x0, #:got_lo12:_controller]
mov x3, x1
mov x1, x0
mov x0, 1040
mov x2, x0
mov x0, x3
bl memcpy
adrp x0, overflow_mode
add x0, x0, :lo12:overflow_mode
str wzr, [x0]
adrp x0, impl
add x0, x0, :lo12:impl
ldr d0, [x0, 16]
bl fxp_double_to_fxp
str x0, [sp, 48]
adrp x0, impl
add x0, x0, :lo12:impl
ldr d0, [x0, 8]
bl fxp_double_to_fxp
str x0, [sp, 56]
bl nondet_double
str d0, [sp, 64]
ldr d0, [sp, 48]
scvtf d0, d0
ldr d1, [sp, 64]
fcmpe d1, d0
bge .L1496
b .L1474
.L1496:
ldr d0, [sp, 56]
scvtf d0, d0
ldr d1, [sp, 64]
fcmpe d1, d0
bls .L1497
b .L1474
.L1497:
mov w0, 1
b .L1477
.L1474:
mov w0, 0
.L1477:
and w0, w0, 1
and w0, w0, 255
bl __DSVERIFIER_assume
str wzr, [sp, 40]
b .L1478
.L1479:
ldr d0, [sp, 64]
fcvtzs d0, d0
ldrsw x0, [sp, 40]
lsl x0, x0, 3
add x1, sp, 80
str d0, [x1, x0]
ldr w0, [sp, 40]
add w0, w0, 1
str w0, [sp, 40]
.L1478:
ldr w0, [sp, 40]
cmp w0, 0
blt .L1479
adrp x0, :got:closed_loop
ldr x0, [x0, #:got_lo12:closed_loop]
ldr w0, [x0]
cmp w0, 0
beq .L1480
str wzr, [sp, 40]
b .L1481
.L1486:
ldrsw x0, [sp, 40]
lsl x0, x0, 3
add x1, sp, 80
ldr d0, [x1, x0]
scvtf d0, d0
bl ss_closed_loop_quantization_error
fmov d8, d0
ldrsw x0, [sp, 40]
lsl x0, x0, 3
add x1, sp, 80
ldr d0, [x1, x0]
scvtf d0, d0
bl fxp_ss_closed_loop_quantization_error
fsub d0, d8, d0
str d0, [sp, 72]
adrp x0, :got:error_limit
ldr x0, [x0, #:got_lo12:error_limit]
ldr d0, [x0]
ldr d1, [sp, 72]
fcmpe d1, d0
bmi .L1498
b .L1482
.L1498:
adrp x0, :got:error_limit
ldr x0, [x0, #:got_lo12:error_limit]
ldr d0, [x0]
fneg d0, d0
ldr d1, [sp, 72]
fcmpe d1, d0
bgt .L1485
.L1482:
adrp x0, __PRETTY_FUNCTION__.4
add x3, x0, :lo12:__PRETTY_FUNCTION__.4
mov w2, 354
adrp x0, .LC54
add x1, x0, :lo12:.LC54
adrp x0, .LC55
add x0, x0, :lo12:.LC55
bl __assert_fail
.L1485:
ldr w0, [sp, 40]
add w0, w0, 1
str w0, [sp, 40]
.L1481:
ldr w0, [sp, 40]
cmp w0, 0
blt .L1486
b .L1487
.L1480:
str wzr, [sp, 40]
b .L1488
.L1493:
ldrsw x0, [sp, 40]
lsl x0, x0, 3
add x1, sp, 80
ldr x0, [x1, x0]
bl ss_system_quantization_error
str d0, [sp, 72]
adrp x0, :got:error_limit
ldr x0, [x0, #:got_lo12:error_limit]
ldr d0, [x0]
ldr d1, [sp, 72]
fcmpe d1, d0
bmi .L1499
b .L1489
.L1499:
adrp x0, :got:error_limit
ldr x0, [x0, #:got_lo12:error_limit]
ldr d0, [x0]
fneg d0, d0
ldr d1, [sp, 72]
fcmpe d1, d0
bgt .L1492
.L1489:
adrp x0, __PRETTY_FUNCTION__.4
add x3, x0, :lo12:__PRETTY_FUNCTION__.4
mov w2, 361
adrp x0, .LC54
add x1, x0, :lo12:.LC54
adrp x0, .LC55
add x0, x0, :lo12:.LC55
bl __assert_fail
.L1492:
ldr w0, [sp, 40]
add w0, w0, 1
str w0, [sp, 40]
.L1488:
ldr w0, [sp, 40]
cmp w0, 0
blt .L1493
.L1487:
mov w0, 0
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 88]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L1495
bl __stack_chk_fail
.L1495:
mov w0, w1
ldr d8, [sp, 16]
ldp x29, x30, [sp], 96
.cfi_restore 30
.cfi_restore 29
.cfi_restore 72
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE145:
.size verify_error_state_space, .-verify_error_state_space
.align 2
.global fxp_ss_closed_loop_safety
.type fxp_ss_closed_loop_safety, %function
fxp_ss_closed_loop_safety:
.LFB146:
.cfi_startproc
sub sp, sp, #816
.cfi_def_cfa_offset 816
stp x29, x30, [sp]
.cfi_offset 29, -816
.cfi_offset 30, -808
mov x29, sp
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 808]
mov x1, 0
strh wzr, [sp, 30]
str wzr, [sp, 36]
b .L1501
.L1505:
str wzr, [sp, 32]
b .L1502
.L1504:
adrp x0, :got:_controller
ldr x0, [x0, #:got_lo12:_controller]
ldr w1, [sp, 32]
ldr w2, [sp, 36]
lsl x2, x2, 2
add x1, x2, x1
add x1, x1, 48
ldr d0, [x0, x1, lsl 3]
fcmp d0, #0.0
beq .L1503
mov w0, 1
strh w0, [sp, 30]
.L1503:
ldr w0, [sp, 32]
add w0, w0, 1
str w0, [sp, 32]
.L1502:
adrp x0, :got:nInputs
ldr x0, [x0, #:got_lo12:nInputs]
ldr w0, [x0]
mov w1, w0
ldr w0, [sp, 32]
cmp w0, w1
bcc .L1504
ldr w0, [sp, 36]
add w0, w0, 1
str w0, [sp, 36]
.L1501:
adrp x0, :got:nOutputs
ldr x0, [x0, #:got_lo12:nOutputs]
ldr w0, [x0]
mov w1, w0
ldr w0, [sp, 36]
cmp w0, w1
bcc .L1505
str wzr, [sp, 36]
b .L1506
.L1509:
str wzr, [sp, 32]
b .L1507
.L1508:
adrp x0, :got:_controller
ldr x0, [x0, #:got_lo12:_controller]
ldr w1, [sp, 32]
ldr w2, [sp, 36]
lsl x2, x2, 2
add x1, x2, x1
add x1, x1, 96
ldr d0, [x0, x1, lsl 3]
ldr w0, [sp, 32]
ldr w1, [sp, 36]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 40
str d0, [x1, x0]
ldr w0, [sp, 32]
add w0, w0, 1
str w0, [sp, 32]
.L1507:
ldr w0, [sp, 32]
cmp w0, 0
beq .L1508
ldr w0, [sp, 36]
add w0, w0, 1
str w0, [sp, 36]
.L1506:
adrp x0, :got:nInputs
ldr x0, [x0, #:got_lo12:nInputs]
ldr w0, [x0]
mov w1, w0
ldr w0, [sp, 36]
cmp w0, w1
bcc .L1509
str wzr, [sp, 36]
b .L1510
.L1513:
str wzr, [sp, 32]
b .L1511
.L1512:
ldr w0, [sp, 32]
ldr w1, [sp, 36]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 424
str xzr, [x1, x0]
ldr w0, [sp, 32]
add w0, w0, 1
str w0, [sp, 32]
.L1511:
adrp x0, :got:nOutputs
ldr x0, [x0, #:got_lo12:nOutputs]
ldr w0, [x0]
mov w1, w0
ldr w0, [sp, 32]
cmp w0, w1
bcc .L1512
ldr w0, [sp, 36]
add w0, w0, 1
str w0, [sp, 36]
.L1510:
adrp x0, :got:nInputs
ldr x0, [x0, #:got_lo12:nInputs]
ldr w0, [x0]
mov w1, w0
ldr w0, [sp, 36]
cmp w0, w1
bcc .L1513
str wzr, [sp, 36]
b .L1514
.L1517:
str wzr, [sp, 32]
b .L1515
.L1516:
ldr w0, [sp, 32]
ldr w1, [sp, 36]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 552
str xzr, [x1, x0]
ldr w0, [sp, 32]
add w0, w0, 1
str w0, [sp, 32]
.L1515:
ldr w0, [sp, 32]
cmp w0, 0
beq .L1516
ldr w0, [sp, 36]
add w0, w0, 1
str w0, [sp, 36]
.L1514:
adrp x0, :got:nOutputs
ldr x0, [x0, #:got_lo12:nOutputs]
ldr w0, [x0]
mov w1, w0
ldr w0, [sp, 36]
cmp w0, w1
bcc .L1517
str wzr, [sp, 36]
b .L1518
.L1521:
str wzr, [sp, 32]
b .L1519
.L1520:
ldr w0, [sp, 32]
ldr w1, [sp, 36]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 680
str xzr, [x1, x0]
ldr w0, [sp, 32]
add w0, w0, 1
str w0, [sp, 32]
.L1519:
ldr w0, [sp, 32]
cmp w0, 3
bls .L1520
ldr w0, [sp, 36]
add w0, w0, 1
str w0, [sp, 36]
.L1518:
ldr w0, [sp, 36]
cmp w0, 3
bls .L1521
str wzr, [sp, 36]
b .L1522
.L1525:
str wzr, [sp, 32]
b .L1523
.L1524:
adrp x0, :got:_controller
ldr x0, [x0, #:got_lo12:_controller]
ldr w1, [sp, 32]
ldr w2, [sp, 36]
lsl x2, x2, 2
add x1, x2, x1
add x1, x1, 112
ldr d0, [x0, x1, lsl 3]
bl fxp_double_to_fxp
mov x2, x0
ldr w0, [sp, 32]
ldr w1, [sp, 36]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 424
str x2, [x1, x0]
ldr w0, [sp, 32]
add w0, w0, 1
str w0, [sp, 32]
.L1523:
adrp x0, :got:nOutputs
ldr x0, [x0, #:got_lo12:nOutputs]
ldr w0, [x0]
mov w1, w0
ldr w0, [sp, 32]
cmp w0, w1
bcc .L1524
ldr w0, [sp, 36]
add w0, w0, 1
str w0, [sp, 36]
.L1522:
adrp x0, :got:nInputs
ldr x0, [x0, #:got_lo12:nInputs]
ldr w0, [x0]
mov w1, w0
ldr w0, [sp, 36]
cmp w0, w1
bcc .L1525
str wzr, [sp, 36]
b .L1526
.L1529:
str wzr, [sp, 32]
b .L1527
.L1528:
ldr w0, [sp, 32]
ldr w1, [sp, 36]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 168
str xzr, [x1, x0]
ldr w0, [sp, 32]
ldr w1, [sp, 36]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 296
str xzr, [x1, x0]
ldr w0, [sp, 32]
add w0, w0, 1
str w0, [sp, 32]
.L1527:
ldr w0, [sp, 32]
cmp w0, 3
bls .L1528
ldr w0, [sp, 36]
add w0, w0, 1
str w0, [sp, 36]
.L1526:
ldr w0, [sp, 36]
cmp w0, 3
bls .L1529
mov w0, 1
str w0, [sp, 36]
nop
adrp x0, :got:_controller
ldr x0, [x0, #:got_lo12:_controller]
ldr d0, [x0, 640]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [sp, 808]
ldr x1, [x0]
subs x2, x2, x1
mov x1, 0
beq .L1531
bl __stack_chk_fail
.L1531:
ldp x29, x30, [sp]
add sp, sp, 816
.cfi_restore 29
.cfi_restore 30
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE146:
.size fxp_ss_closed_loop_safety, .-fxp_ss_closed_loop_safety
.section .rodata
.align 3
.LC56:
.string "/home/yashchopda/Desktop/dsverifier-v2.0.3-esbmc-v4.0-cbmc-5.6/bmc/engine/verify_safety_state_space.h"
.align 3
.LC57:
.string "output_double <= error_limit"
.text
.align 2
.global verify_safety_state_space
.type verify_safety_state_space, %function
verify_safety_state_space:
.LFB147:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
bl fxp_ss_closed_loop_safety
fcvtzs d0, d0
str d0, [sp, 16]
ldr x0, [sp, 16]
bl fxp_to_double
str d0, [sp, 24]
adrp x0, :got:error_limit
ldr x0, [x0, #:got_lo12:error_limit]
ldr d0, [x0]
ldr d1, [sp, 24]
fcmpe d1, d0
bls .L1533
adrp x0, __PRETTY_FUNCTION__.3
add x3, x0, :lo12:__PRETTY_FUNCTION__.3
mov w2, 140
adrp x0, .LC56
add x1, x0, :lo12:.LC56
adrp x0, .LC57
add x0, x0, :lo12:.LC57
bl __assert_fail
.L1533:
mov w0, 0
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE147:
.size verify_safety_state_space, .-verify_safety_state_space
.section .rodata
.align 3
.LC58:
.string "/home/yashchopda/Desktop/dsverifier-v2.0.3-esbmc-v4.0-cbmc-5.6/bmc/engine/verify_controllability.h"
.align 3
.LC59:
.string "determinant(controllabilityMatrix_double,nStates) != 0"
.text
.align 2
.global verify_controllability
.type verify_controllability, %function
verify_controllability:
.LFB148:
.cfi_startproc
sub sp, sp, #944
.cfi_def_cfa_offset 944
stp x29, x30, [sp]
.cfi_offset 29, -944
.cfi_offset 30, -936
mov x29, sp
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 936]
mov x1, 0
str wzr, [sp, 24]
b .L1536
.L1539:
str wzr, [sp, 28]
b .L1537
.L1538:
ldrsw x0, [sp, 28]
ldrsw x1, [sp, 24]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 40
str xzr, [x1, x0]
ldrsw x0, [sp, 28]
ldrsw x1, [sp, 24]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 168
str xzr, [x1, x0]
ldrsw x0, [sp, 28]
ldrsw x1, [sp, 24]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 296
str xzr, [x1, x0]
ldrsw x0, [sp, 28]
ldrsw x1, [sp, 24]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 424
str xzr, [x1, x0]
ldrsw x0, [sp, 28]
ldrsw x1, [sp, 24]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 552
str xzr, [x1, x0]
ldrsw x0, [sp, 28]
ldrsw x1, [sp, 24]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 680
str xzr, [x1, x0]
ldr w0, [sp, 28]
add w0, w0, 1
str w0, [sp, 28]
.L1537:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w1, [x0]
adrp x0, :got:nInputs
ldr x0, [x0, #:got_lo12:nInputs]
ldr w0, [x0]
mul w0, w1, w0
ldr w1, [sp, 28]
cmp w1, w0
blt .L1538
ldr w0, [sp, 24]
add w0, w0, 1
str w0, [sp, 24]
.L1536:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
ldr w1, [sp, 24]
cmp w1, w0
blt .L1539
str wzr, [sp, 24]
b .L1540
.L1543:
str wzr, [sp, 28]
b .L1541
.L1542:
adrp x0, :got:_controller
ldr x0, [x0, #:got_lo12:_controller]
ldrsw x1, [sp, 28]
ldrsw x2, [sp, 24]
lsl x2, x2, 2
add x1, x2, x1
ldr d0, [x0, x1, lsl 3]
bl fxp_double_to_fxp
mov x2, x0
ldrsw x0, [sp, 28]
ldrsw x1, [sp, 24]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 40
str x2, [x1, x0]
ldr w0, [sp, 28]
add w0, w0, 1
str w0, [sp, 28]
.L1541:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
ldr w1, [sp, 28]
cmp w1, w0
blt .L1542
ldr w0, [sp, 24]
add w0, w0, 1
str w0, [sp, 24]
.L1540:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
ldr w1, [sp, 24]
cmp w1, w0
blt .L1543
str wzr, [sp, 24]
b .L1544
.L1547:
str wzr, [sp, 28]
b .L1545
.L1546:
adrp x0, :got:_controller
ldr x0, [x0, #:got_lo12:_controller]
ldrsw x1, [sp, 28]
ldrsw x2, [sp, 24]
lsl x2, x2, 2
add x1, x2, x1
add x1, x1, 16
ldr d0, [x0, x1, lsl 3]
bl fxp_double_to_fxp
mov x2, x0
ldrsw x0, [sp, 28]
ldrsw x1, [sp, 24]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 168
str x2, [x1, x0]
ldr w0, [sp, 28]
add w0, w0, 1
str w0, [sp, 28]
.L1545:
adrp x0, :got:nInputs
ldr x0, [x0, #:got_lo12:nInputs]
ldr w0, [x0]
ldr w1, [sp, 28]
cmp w1, w0
blt .L1546
ldr w0, [sp, 24]
add w0, w0, 1
str w0, [sp, 24]
.L1544:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
ldr w1, [sp, 24]
cmp w1, w0
blt .L1547
adrp x0, :got:nInputs
ldr x0, [x0, #:got_lo12:nInputs]
ldr w0, [x0]
cmp w0, 1
ble .L1548
str wzr, [sp, 32]
str wzr, [sp, 28]
b .L1549
.L1554:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w5, w0
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w6, w0
ldr w1, [sp, 32]
add x2, sp, 424
add x0, sp, 40
mov x4, x2
mov w3, w1
mov x2, x0
mov w1, w6
mov w0, w5
bl fxp_exp_matrix
ldr w0, [sp, 32]
add w0, w0, 1
str w0, [sp, 32]
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w7, w0
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w8, w0
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w9, w0
adrp x0, :got:nInputs
ldr x0, [x0, #:got_lo12:nInputs]
ldr w0, [x0]
mov w3, w0
add x2, sp, 552
add x1, sp, 168
add x0, sp, 424
mov x6, x2
mov x5, x1
mov x4, x0
mov w2, w9
mov w1, w8
mov w0, w7
bl fxp_matrix_multiplication
str wzr, [sp, 36]
b .L1550
.L1553:
str wzr, [sp, 24]
b .L1551
.L1552:
ldrsw x0, [sp, 36]
ldrsw x1, [sp, 24]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 552
ldr x2, [x1, x0]
ldrsw x0, [sp, 28]
ldrsw x1, [sp, 24]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 296
str x2, [x1, x0]
ldr w0, [sp, 24]
add w0, w0, 1
str w0, [sp, 24]
.L1551:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
ldr w1, [sp, 24]
cmp w1, w0
blt .L1552
ldr w0, [sp, 28]
add w0, w0, 1
str w0, [sp, 28]
ldr w0, [sp, 36]
add w0, w0, 1
str w0, [sp, 36]
.L1550:
adrp x0, :got:nInputs
ldr x0, [x0, #:got_lo12:nInputs]
ldr w0, [x0]
ldr w1, [sp, 36]
cmp w1, w0
blt .L1553
.L1549:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w1, [x0]
adrp x0, :got:nInputs
ldr x0, [x0, #:got_lo12:nInputs]
ldr w0, [x0]
mul w0, w1, w0
ldr w1, [sp, 28]
cmp w1, w0
blt .L1554
str wzr, [sp, 24]
b .L1555
.L1558:
str wzr, [sp, 28]
b .L1556
.L1557:
ldrsw x0, [sp, 28]
ldrsw x1, [sp, 24]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 424
str xzr, [x1, x0]
ldr w0, [sp, 28]
add w0, w0, 1
str w0, [sp, 28]
.L1556:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w1, [x0]
adrp x0, :got:nInputs
ldr x0, [x0, #:got_lo12:nInputs]
ldr w0, [x0]
mul w0, w1, w0
ldr w1, [sp, 28]
cmp w1, w0
blt .L1557
ldr w0, [sp, 24]
add w0, w0, 1
str w0, [sp, 24]
.L1555:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
ldr w1, [sp, 24]
cmp w1, w0
blt .L1558
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w2, [x0]
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w1, [x0]
adrp x0, :got:nInputs
ldr x0, [x0, #:got_lo12:nInputs]
ldr w0, [x0]
mul w3, w1, w0
add x1, sp, 424
add x0, sp, 296
bl fxp_transpose
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w7, w0
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w1, [x0]
adrp x0, :got:nInputs
ldr x0, [x0, #:got_lo12:nInputs]
ldr w0, [x0]
mul w0, w1, w0
mov w8, w0
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w1, [x0]
adrp x0, :got:nInputs
ldr x0, [x0, #:got_lo12:nInputs]
ldr w0, [x0]
mul w0, w1, w0
mov w9, w0
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w3, w0
add x2, sp, 808
add x1, sp, 424
add x0, sp, 296
mov x6, x2
mov x5, x1
mov x4, x0
mov w2, w9
mov w1, w8
mov w0, w7
bl fxp_matrix_multiplication
str wzr, [sp, 24]
b .L1559
.L1562:
str wzr, [sp, 28]
b .L1560
.L1561:
ldrsw x0, [sp, 28]
ldrsw x1, [sp, 24]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 808
ldr x0, [x1, x0]
bl fxp_to_double
ldrsw x0, [sp, 28]
ldrsw x1, [sp, 24]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 680
str d0, [x1, x0]
ldr w0, [sp, 28]
add w0, w0, 1
str w0, [sp, 28]
.L1560:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
ldr w1, [sp, 28]
cmp w1, w0
blt .L1561
ldr w0, [sp, 24]
add w0, w0, 1
str w0, [sp, 24]
.L1559:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
ldr w1, [sp, 24]
cmp w1, w0
blt .L1562
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w1, [x0]
add x0, sp, 680
bl determinant
fcmp d0, #0.0
bne .L1564
adrp x0, __PRETTY_FUNCTION__.2
add x3, x0, :lo12:__PRETTY_FUNCTION__.2
mov w2, 91
adrp x0, .LC58
add x1, x0, :lo12:.LC58
adrp x0, .LC59
add x0, x0, :lo12:.LC59
bl __assert_fail
.L1548:
str wzr, [sp, 28]
b .L1565
.L1568:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w5, w0
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w6, w0
ldr w1, [sp, 28]
add x2, sp, 424
add x0, sp, 40
mov x4, x2
mov w3, w1
mov x2, x0
mov w1, w6
mov w0, w5
bl fxp_exp_matrix
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w7, w0
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w8, w0
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w9, w0
adrp x0, :got:nInputs
ldr x0, [x0, #:got_lo12:nInputs]
ldr w0, [x0]
mov w3, w0
add x2, sp, 552
add x1, sp, 168
add x0, sp, 424
mov x6, x2
mov x5, x1
mov x4, x0
mov w2, w9
mov w1, w8
mov w0, w7
bl fxp_matrix_multiplication
str wzr, [sp, 24]
b .L1566
.L1567:
ldrsw x0, [sp, 24]
lsl x0, x0, 5
add x1, sp, 552
ldr x2, [x1, x0]
ldrsw x0, [sp, 28]
ldrsw x1, [sp, 24]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 296
str x2, [x1, x0]
ldr w0, [sp, 24]
add w0, w0, 1
str w0, [sp, 24]
.L1566:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
ldr w1, [sp, 24]
cmp w1, w0
blt .L1567
ldr w0, [sp, 28]
add w0, w0, 1
str w0, [sp, 28]
.L1565:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
ldr w1, [sp, 28]
cmp w1, w0
blt .L1568
str wzr, [sp, 24]
b .L1569
.L1572:
str wzr, [sp, 28]
b .L1570
.L1571:
ldrsw x0, [sp, 28]
ldrsw x1, [sp, 24]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 296
ldr x0, [x1, x0]
bl fxp_to_double
ldrsw x0, [sp, 28]
ldrsw x1, [sp, 24]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 680
str d0, [x1, x0]
ldr w0, [sp, 28]
add w0, w0, 1
str w0, [sp, 28]
.L1570:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
ldr w1, [sp, 28]
cmp w1, w0
blt .L1571
ldr w0, [sp, 24]
add w0, w0, 1
str w0, [sp, 24]
.L1569:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
ldr w1, [sp, 24]
cmp w1, w0
blt .L1572
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w1, [x0]
add x0, sp, 680
bl determinant
fcmp d0, #0.0
bne .L1564
adrp x0, __PRETTY_FUNCTION__.2
add x3, x0, :lo12:__PRETTY_FUNCTION__.2
mov w2, 113
adrp x0, .LC58
add x1, x0, :lo12:.LC58
adrp x0, .LC59
add x0, x0, :lo12:.LC59
bl __assert_fail
.L1564:
mov w0, 0
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 936]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L1574
bl __stack_chk_fail
.L1574:
mov w0, w1
ldp x29, x30, [sp]
add sp, sp, 944
.cfi_restore 29
.cfi_restore 30
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE148:
.size verify_controllability, .-verify_controllability
.section .rodata
.align 3
.LC60:
.string "determinant(mimo_controllabilityMatrix_double,nStates) != 0"
.align 3
.LC61:
.string "determinant(controllabilityMatrix,nStates) != 0"
.text
.align 2
.global verify_controllability_double
.type verify_controllability_double, %function
verify_controllability_double:
.LFB149:
.cfi_startproc
sub sp, sp, #560
.cfi_def_cfa_offset 560
stp x29, x30, [sp]
.cfi_offset 29, -560
.cfi_offset 30, -552
mov x29, sp
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 552]
mov x1, 0
adrp x0, :got:nInputs
ldr x0, [x0, #:got_lo12:nInputs]
ldr w0, [x0]
cmp w0, 1
ble .L1576
str wzr, [sp, 32]
str wzr, [sp, 28]
b .L1577
.L1582:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w5, w0
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w6, w0
ldr w0, [sp, 32]
add x1, sp, 168
mov x4, x1
mov w3, w0
adrp x0, :got:_controller
ldr x2, [x0, #:got_lo12:_controller]
mov w1, w6
mov w0, w5
bl double_exp_matrix
ldr w0, [sp, 32]
add w0, w0, 1
str w0, [sp, 32]
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w7, w0
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w8, w0
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w2, w0
adrp x0, :got:nInputs
ldr x0, [x0, #:got_lo12:nInputs]
ldr w0, [x0]
mov w3, w0
add x0, sp, 296
add x1, sp, 168
mov x6, x0
adrp x0, :got:_controller
ldr x0, [x0, #:got_lo12:_controller]
add x5, x0, 128
mov x4, x1
mov w1, w8
mov w0, w7
bl double_matrix_multiplication
str wzr, [sp, 36]
b .L1578
.L1581:
str wzr, [sp, 24]
b .L1579
.L1580:
ldrsw x0, [sp, 36]
ldrsw x1, [sp, 24]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 296
ldr d0, [x1, x0]
ldrsw x0, [sp, 28]
ldrsw x1, [sp, 24]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 40
str d0, [x1, x0]
ldr w0, [sp, 24]
add w0, w0, 1
str w0, [sp, 24]
.L1579:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
ldr w1, [sp, 24]
cmp w1, w0
blt .L1580
ldr w0, [sp, 28]
add w0, w0, 1
str w0, [sp, 28]
ldr w0, [sp, 36]
add w0, w0, 1
str w0, [sp, 36]
.L1578:
adrp x0, :got:nInputs
ldr x0, [x0, #:got_lo12:nInputs]
ldr w0, [x0]
ldr w1, [sp, 36]
cmp w1, w0
blt .L1581
.L1577:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w1, [x0]
adrp x0, :got:nInputs
ldr x0, [x0, #:got_lo12:nInputs]
ldr w0, [x0]
mul w0, w1, w0
ldr w1, [sp, 28]
cmp w1, w0
blt .L1582
str wzr, [sp, 24]
b .L1583
.L1586:
str wzr, [sp, 28]
b .L1584
.L1585:
ldrsw x0, [sp, 28]
ldrsw x1, [sp, 24]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 168
str xzr, [x1, x0]
ldr w0, [sp, 28]
add w0, w0, 1
str w0, [sp, 28]
.L1584:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w1, [x0]
adrp x0, :got:nInputs
ldr x0, [x0, #:got_lo12:nInputs]
ldr w0, [x0]
mul w0, w1, w0
ldr w1, [sp, 28]
cmp w1, w0
blt .L1585
ldr w0, [sp, 24]
add w0, w0, 1
str w0, [sp, 24]
.L1583:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
ldr w1, [sp, 24]
cmp w1, w0
blt .L1586
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w2, [x0]
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w1, [x0]
adrp x0, :got:nInputs
ldr x0, [x0, #:got_lo12:nInputs]
ldr w0, [x0]
mul w3, w1, w0
add x1, sp, 168
add x0, sp, 40
bl transpose
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w7, w0
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w1, [x0]
adrp x0, :got:nInputs
ldr x0, [x0, #:got_lo12:nInputs]
ldr w0, [x0]
mul w0, w1, w0
mov w8, w0
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w1, [x0]
adrp x0, :got:nInputs
ldr x0, [x0, #:got_lo12:nInputs]
ldr w0, [x0]
mul w0, w1, w0
mov w9, w0
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w3, w0
add x2, sp, 424
add x1, sp, 168
add x0, sp, 40
mov x6, x2
mov x5, x1
mov x4, x0
mov w2, w9
mov w1, w8
mov w0, w7
bl double_matrix_multiplication
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w1, [x0]
add x0, sp, 424
bl determinant
fcmp d0, #0.0
bne .L1588
adrp x0, __PRETTY_FUNCTION__.1
add x3, x0, :lo12:__PRETTY_FUNCTION__.1
mov w2, 154
adrp x0, .LC58
add x1, x0, :lo12:.LC58
adrp x0, .LC60
add x0, x0, :lo12:.LC60
bl __assert_fail
.L1576:
str wzr, [sp, 28]
b .L1589
.L1592:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w5, w0
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w6, w0
ldr w0, [sp, 28]
add x1, sp, 168
mov x4, x1
mov w3, w0
adrp x0, :got:_controller
ldr x2, [x0, #:got_lo12:_controller]
mov w1, w6
mov w0, w5
bl double_exp_matrix
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w7, w0
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w8, w0
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w2, w0
adrp x0, :got:nInputs
ldr x0, [x0, #:got_lo12:nInputs]
ldr w0, [x0]
mov w3, w0
add x0, sp, 296
add x1, sp, 168
mov x6, x0
adrp x0, :got:_controller
ldr x0, [x0, #:got_lo12:_controller]
add x5, x0, 128
mov x4, x1
mov w1, w8
mov w0, w7
bl double_matrix_multiplication
str wzr, [sp, 24]
b .L1590
.L1591:
ldrsw x0, [sp, 24]
lsl x0, x0, 5
add x1, sp, 296
ldr d0, [x1, x0]
ldrsw x0, [sp, 28]
ldrsw x1, [sp, 24]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 40
str d0, [x1, x0]
ldr w0, [sp, 24]
add w0, w0, 1
str w0, [sp, 24]
.L1590:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
ldr w1, [sp, 24]
cmp w1, w0
blt .L1591
ldr w0, [sp, 28]
add w0, w0, 1
str w0, [sp, 28]
.L1589:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
ldr w1, [sp, 28]
cmp w1, w0
blt .L1592
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w1, [x0]
add x0, sp, 40
bl determinant
fcmp d0, #0.0
bne .L1588
adrp x0, __PRETTY_FUNCTION__.1
add x3, x0, :lo12:__PRETTY_FUNCTION__.1
mov w2, 163
adrp x0, .LC58
add x1, x0, :lo12:.LC58
adrp x0, .LC61
add x0, x0, :lo12:.LC61
bl __assert_fail
.L1588:
mov w0, 0
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 552]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L1594
bl __stack_chk_fail
.L1594:
mov w0, w1
ldp x29, x30, [sp]
add sp, sp, 560
.cfi_restore 29
.cfi_restore 30
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE149:
.size verify_controllability_double, .-verify_controllability_double
.section .rodata
.align 3
.LC62:
.string "/home/yashchopda/Desktop/dsverifier-v2.0.3-esbmc-v4.0-cbmc-5.6/bmc/engine/verify_observability.h"
.align 3
.LC63:
.string "determinant(observabilityMatrix_double,nStates) != 0"
.text
.align 2
.global verify_observability
.type verify_observability, %function
verify_observability:
.LFB150:
.cfi_startproc
sub sp, sp, #944
.cfi_def_cfa_offset 944
stp x29, x30, [sp]
.cfi_offset 29, -944
.cfi_offset 30, -936
mov x29, sp
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 936]
mov x1, 0
str wzr, [sp, 24]
b .L1596
.L1599:
str wzr, [sp, 28]
b .L1597
.L1598:
ldrsw x0, [sp, 28]
ldrsw x1, [sp, 24]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 296
str xzr, [x1, x0]
ldrsw x0, [sp, 28]
ldrsw x1, [sp, 24]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 40
str xzr, [x1, x0]
ldrsw x0, [sp, 28]
ldrsw x1, [sp, 24]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 168
str xzr, [x1, x0]
ldrsw x0, [sp, 28]
ldrsw x1, [sp, 24]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 424
str xzr, [x1, x0]
ldrsw x0, [sp, 28]
ldrsw x1, [sp, 24]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 552
str xzr, [x1, x0]
ldr w0, [sp, 28]
add w0, w0, 1
str w0, [sp, 28]
.L1597:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
ldr w1, [sp, 28]
cmp w1, w0
blt .L1598
ldr w0, [sp, 24]
add w0, w0, 1
str w0, [sp, 24]
.L1596:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
ldr w1, [sp, 24]
cmp w1, w0
blt .L1599
str wzr, [sp, 24]
b .L1600
.L1603:
str wzr, [sp, 28]
b .L1601
.L1602:
adrp x0, :got:_controller
ldr x0, [x0, #:got_lo12:_controller]
ldrsw x1, [sp, 28]
ldrsw x2, [sp, 24]
lsl x2, x2, 2
add x1, x2, x1
ldr d0, [x0, x1, lsl 3]
bl fxp_double_to_fxp
mov x2, x0
ldrsw x0, [sp, 28]
ldrsw x1, [sp, 24]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 40
str x2, [x1, x0]
ldr w0, [sp, 28]
add w0, w0, 1
str w0, [sp, 28]
.L1601:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
ldr w1, [sp, 28]
cmp w1, w0
blt .L1602
ldr w0, [sp, 24]
add w0, w0, 1
str w0, [sp, 24]
.L1600:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
ldr w1, [sp, 24]
cmp w1, w0
blt .L1603
str wzr, [sp, 24]
b .L1604
.L1607:
str wzr, [sp, 28]
b .L1605
.L1606:
adrp x0, :got:_controller
ldr x0, [x0, #:got_lo12:_controller]
ldrsw x1, [sp, 28]
ldrsw x2, [sp, 24]
lsl x2, x2, 2
add x1, x2, x1
add x1, x1, 32
ldr d0, [x0, x1, lsl 3]
bl fxp_double_to_fxp
mov x2, x0
ldrsw x0, [sp, 28]
ldrsw x1, [sp, 24]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 168
str x2, [x1, x0]
ldr w0, [sp, 28]
add w0, w0, 1
str w0, [sp, 28]
.L1605:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
ldr w1, [sp, 28]
cmp w1, w0
blt .L1606
ldr w0, [sp, 24]
add w0, w0, 1
str w0, [sp, 24]
.L1604:
adrp x0, :got:nOutputs
ldr x0, [x0, #:got_lo12:nOutputs]
ldr w0, [x0]
ldr w1, [sp, 24]
cmp w1, w0
blt .L1607
adrp x0, :got:nOutputs
ldr x0, [x0, #:got_lo12:nOutputs]
ldr w0, [x0]
cmp w0, 1
ble .L1608
str wzr, [sp, 28]
str wzr, [sp, 32]
b .L1609
.L1614:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w5, w0
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w6, w0
ldr w1, [sp, 32]
add x2, sp, 424
add x0, sp, 40
mov x4, x2
mov w3, w1
mov x2, x0
mov w1, w6
mov w0, w5
bl fxp_exp_matrix
ldr w0, [sp, 32]
add w0, w0, 1
str w0, [sp, 32]
adrp x0, :got:nOutputs
ldr x0, [x0, #:got_lo12:nOutputs]
ldr w0, [x0]
mov w7, w0
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w8, w0
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w9, w0
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w3, w0
add x2, sp, 552
add x1, sp, 424
add x0, sp, 168
mov x6, x2
mov x5, x1
mov x4, x0
mov w2, w9
mov w1, w8
mov w0, w7
bl fxp_matrix_multiplication
str wzr, [sp, 36]
b .L1610
.L1613:
str wzr, [sp, 24]
b .L1611
.L1612:
ldrsw x0, [sp, 24]
ldrsw x1, [sp, 36]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 552
ldr x2, [x1, x0]
ldrsw x0, [sp, 24]
ldrsw x1, [sp, 28]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 296
str x2, [x1, x0]
ldr w0, [sp, 24]
add w0, w0, 1
str w0, [sp, 24]
.L1611:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
ldr w1, [sp, 24]
cmp w1, w0
blt .L1612
ldr w0, [sp, 28]
add w0, w0, 1
str w0, [sp, 28]
ldr w0, [sp, 36]
add w0, w0, 1
str w0, [sp, 36]
.L1610:
adrp x0, :got:nOutputs
ldr x0, [x0, #:got_lo12:nOutputs]
ldr w0, [x0]
ldr w1, [sp, 36]
cmp w1, w0
blt .L1613
.L1609:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
ldr w1, [sp, 32]
cmp w1, w0
blt .L1614
str wzr, [sp, 24]
b .L1615
.L1618:
str wzr, [sp, 28]
b .L1616
.L1617:
ldrsw x0, [sp, 28]
ldrsw x1, [sp, 24]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 424
str xzr, [x1, x0]
ldr w0, [sp, 28]
add w0, w0, 1
str w0, [sp, 28]
.L1616:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w1, [x0]
adrp x0, :got:nOutputs
ldr x0, [x0, #:got_lo12:nOutputs]
ldr w0, [x0]
mul w0, w1, w0
ldr w1, [sp, 28]
cmp w1, w0
blt .L1617
ldr w0, [sp, 24]
add w0, w0, 1
str w0, [sp, 24]
.L1615:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
ldr w1, [sp, 24]
cmp w1, w0
blt .L1618
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w1, [x0]
adrp x0, :got:nOutputs
ldr x0, [x0, #:got_lo12:nOutputs]
ldr w0, [x0]
mul w2, w1, w0
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w3, [x0]
add x1, sp, 424
add x0, sp, 296
bl fxp_transpose
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w7, w0
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w1, [x0]
adrp x0, :got:nOutputs
ldr x0, [x0, #:got_lo12:nOutputs]
ldr w0, [x0]
mul w0, w1, w0
mov w8, w0
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w1, [x0]
adrp x0, :got:nOutputs
ldr x0, [x0, #:got_lo12:nOutputs]
ldr w0, [x0]
mul w0, w1, w0
mov w9, w0
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w3, w0
add x2, sp, 808
add x1, sp, 296
add x0, sp, 424
mov x6, x2
mov x5, x1
mov x4, x0
mov w2, w9
mov w1, w8
mov w0, w7
bl fxp_matrix_multiplication
str wzr, [sp, 24]
b .L1619
.L1622:
str wzr, [sp, 28]
b .L1620
.L1621:
ldrsw x0, [sp, 28]
ldrsw x1, [sp, 24]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 808
ldr x0, [x1, x0]
bl fxp_to_double
ldrsw x0, [sp, 28]
ldrsw x1, [sp, 24]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 680
str d0, [x1, x0]
ldr w0, [sp, 28]
add w0, w0, 1
str w0, [sp, 28]
.L1620:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
ldr w1, [sp, 28]
cmp w1, w0
blt .L1621
ldr w0, [sp, 24]
add w0, w0, 1
str w0, [sp, 24]
.L1619:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
ldr w1, [sp, 24]
cmp w1, w0
blt .L1622
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w1, [x0]
add x0, sp, 680
bl determinant
fcmp d0, #0.0
bne .L1624
adrp x0, __PRETTY_FUNCTION__.0
add x3, x0, :lo12:__PRETTY_FUNCTION__.0
mov w2, 119
adrp x0, .LC62
add x1, x0, :lo12:.LC62
adrp x0, .LC63
add x0, x0, :lo12:.LC63
bl __assert_fail
.L1608:
str wzr, [sp, 24]
b .L1625
.L1628:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w5, w0
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w6, w0
ldr w1, [sp, 24]
add x2, sp, 424
add x0, sp, 40
mov x4, x2
mov w3, w1
mov x2, x0
mov w1, w6
mov w0, w5
bl fxp_exp_matrix
adrp x0, :got:nOutputs
ldr x0, [x0, #:got_lo12:nOutputs]
ldr w0, [x0]
mov w7, w0
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w8, w0
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w9, w0
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w3, w0
add x2, sp, 552
add x1, sp, 424
add x0, sp, 168
mov x6, x2
mov x5, x1
mov x4, x0
mov w2, w9
mov w1, w8
mov w0, w7
bl fxp_matrix_multiplication
str wzr, [sp, 28]
b .L1626
.L1627:
ldrsw x0, [sp, 28]
lsl x0, x0, 3
add x1, sp, 552
ldr x2, [x1, x0]
ldrsw x0, [sp, 28]
ldrsw x1, [sp, 24]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 296
str x2, [x1, x0]
ldr w0, [sp, 28]
add w0, w0, 1
str w0, [sp, 28]
.L1626:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
ldr w1, [sp, 28]
cmp w1, w0
blt .L1627
ldr w0, [sp, 24]
add w0, w0, 1
str w0, [sp, 24]
.L1625:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
ldr w1, [sp, 24]
cmp w1, w0
blt .L1628
str wzr, [sp, 24]
b .L1629
.L1632:
str wzr, [sp, 28]
b .L1630
.L1631:
ldrsw x0, [sp, 28]
ldrsw x1, [sp, 24]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 296
ldr x0, [x1, x0]
bl fxp_to_double
ldrsw x0, [sp, 28]
ldrsw x1, [sp, 24]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 680
str d0, [x1, x0]
ldr w0, [sp, 28]
add w0, w0, 1
str w0, [sp, 28]
.L1630:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
ldr w1, [sp, 28]
cmp w1, w0
blt .L1631
ldr w0, [sp, 24]
add w0, w0, 1
str w0, [sp, 24]
.L1629:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
ldr w1, [sp, 24]
cmp w1, w0
blt .L1632
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w1, [x0]
add x0, sp, 680
bl determinant
fcmp d0, #0.0
bne .L1624
adrp x0, __PRETTY_FUNCTION__.0
add x3, x0, :lo12:__PRETTY_FUNCTION__.0
mov w2, 134
adrp x0, .LC62
add x1, x0, :lo12:.LC62
adrp x0, .LC63
add x0, x0, :lo12:.LC63
bl __assert_fail
.L1624:
mov w0, 0
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 936]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L1634
bl __stack_chk_fail
.L1634:
mov w0, w1
ldp x29, x30, [sp]
add sp, sp, 944
.cfi_restore 29
.cfi_restore 30
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE150:
.size verify_observability, .-verify_observability
.align 2
.global resp_mag
.type resp_mag, %function
resp_mag:
.LFB151:
.cfi_startproc
stp x29, x30, [sp, -352]!
.cfi_def_cfa_offset 352
.cfi_offset 29, -352
.cfi_offset 30, -344
mov x29, sp
.cfi_def_cfa_register 29
stp x19, x20, [sp, 16]
stp x21, x22, [sp, 32]
stp x23, x24, [sp, 48]
stp x25, x26, [sp, 64]
stp x27, x28, [sp, 80]
str d8, [sp, 96]
sub sp, sp, #16
.cfi_offset 19, -336
.cfi_offset 20, -328
.cfi_offset 21, -320
.cfi_offset 22, -312
.cfi_offset 23, -304
.cfi_offset 24, -296
.cfi_offset 25, -288
.cfi_offset 26, -280
.cfi_offset 27, -272
.cfi_offset 28, -264
.cfi_offset 72, -256
str x0, [x29, 232]
str w1, [x29, 228]
str x2, [x29, 216]
str w3, [x29, 224]
str x4, [x29, 208]
str w5, [x29, 204]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [x29, 344]
mov x1, 0
mov x0, sp
mov x28, x0
ldr w0, [x29, 204]
add w1, w0, 1
sxtw x0, w1
sub x0, x0, #1
str x0, [x29, 264]
sxtw x0, w1
str x0, [x29, 176]
str xzr, [x29, 184]
ldp x2, x3, [x29, 176]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x7, x4, 6
orr x7, x0, x7
mov x0, x2
lsl x6, x0, 6
sxtw x0, w1
str x0, [x29, 160]
str xzr, [x29, 168]
ldp x2, x3, [x29, 160]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x21, x4, 6
orr x21, x0, x21
mov x0, x2
lsl x20, x0, 6
sxtw x0, w1
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L1636:
cmp sp, x1
beq .L1637
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1636
.L1637:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L1638
str xzr, [sp, 1024]
.L1638:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 272]
ldr w0, [x29, 204]
add w0, w0, 1
sxtw x1, w0
sub x1, x1, #1
str x1, [x29, 280]
sxtw x1, w0
str x1, [x29, 144]
str xzr, [x29, 152]
ldp x2, x3, [x29, 144]
mov x1, x2
lsr x1, x1, 58
mov x4, x3
lsl x19, x4, 6
orr x19, x1, x19
mov x1, x2
lsl x18, x1, 6
sxtw x1, w0
str x1, [x29, 128]
str xzr, [x29, 136]
ldp x2, x3, [x29, 128]
mov x1, x2
lsr x1, x1, 58
mov x4, x3
lsl x17, x4, 6
orr x17, x1, x17
mov x1, x2
lsl x16, x1, 6
sxtw x0, w0
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L1639:
cmp sp, x1
beq .L1640
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1639
.L1640:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L1641
str xzr, [sp, 1024]
.L1641:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 288]
ldr w0, [x29, 204]
add w0, w0, 1
sxtw x1, w0
sub x1, x1, #1
str x1, [x29, 296]
sxtw x1, w0
str x1, [x29, 112]
str xzr, [x29, 120]
ldp x2, x3, [x29, 112]
mov x1, x2
lsr x1, x1, 58
mov x4, x3
lsl x15, x4, 6
orr x15, x1, x15
mov x1, x2
lsl x14, x1, 6
sxtw x1, w0
mov x26, x1
mov x27, 0
lsr x1, x26, 58
lsl x13, x27, 6
orr x13, x1, x13
lsl x12, x26, 6
sxtw x0, w0
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L1642:
cmp sp, x1
beq .L1643
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1642
.L1643:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L1644
str xzr, [sp, 1024]
.L1644:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 304]
ldr w0, [x29, 204]
add w0, w0, 1
sxtw x1, w0
sub x1, x1, #1
str x1, [x29, 312]
sxtw x1, w0
mov x24, x1
mov x25, 0
lsr x1, x24, 58
lsl x11, x25, 6
orr x11, x1, x11
lsl x10, x24, 6
sxtw x1, w0
mov x22, x1
mov x23, 0
lsr x1, x22, 58
lsl x9, x23, 6
orr x9, x1, x9
lsl x8, x22, 6
sxtw x0, w0
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L1645:
cmp sp, x1
beq .L1646
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1645
.L1646:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L1647
str xzr, [sp, 1024]
.L1647:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 320]
str xzr, [x29, 256]
str wzr, [x29, 252]
b .L1648
.L1653:
ldr x0, [x29, 232]
ldr d0, [x0]
ldr x0, [x29, 272]
ldrsw x1, [x29, 252]
str d0, [x0, x1, lsl 3]
ldr x0, [x29, 288]
ldrsw x1, [x29, 252]
str xzr, [x0, x1, lsl 3]
mov w0, 1
str w0, [x29, 248]
b .L1649
.L1650:
ldr x0, [x29, 272]
ldrsw x1, [x29, 252]
ldr d0, [x0, x1, lsl 3]
str d0, [x29, 336]
mov w0, 6
ldr d0, [x29, 256]
bl cosTyl
fmov d1, d0
ldr x0, [x29, 272]
ldrsw x1, [x29, 252]
ldr d0, [x0, x1, lsl 3]
fmul d8, d1, d0
mov w0, 6
ldr d0, [x29, 256]
bl sinTyl
fmov d1, d0
ldr x0, [x29, 288]
ldrsw x1, [x29, 252]
ldr d0, [x0, x1, lsl 3]
fmul d0, d1, d0
fsub d1, d8, d0
ldrsw x0, [x29, 248]
lsl x0, x0, 3
ldr x1, [x29, 232]
add x0, x1, x0
ldr d0, [x0]
fadd d0, d1, d0
ldr x0, [x29, 272]
ldrsw x1, [x29, 252]
str d0, [x0, x1, lsl 3]
mov w0, 6
ldr d0, [x29, 256]
bl sinTyl
fmov d1, d0
ldr d0, [x29, 336]
fmul d8, d1, d0
mov w0, 6
ldr d0, [x29, 256]
bl cosTyl
fmov d1, d0
ldr x0, [x29, 288]
ldrsw x1, [x29, 252]
ldr d0, [x0, x1, lsl 3]
fmul d0, d1, d0
fadd d0, d8, d0
ldr x0, [x29, 288]
ldrsw x1, [x29, 252]
str d0, [x0, x1, lsl 3]
ldr w0, [x29, 248]
add w0, w0, 1
str w0, [x29, 248]
.L1649:
ldr w1, [x29, 248]
ldr w0, [x29, 228]
cmp w1, w0
blt .L1650
ldr x0, [x29, 216]
ldr d0, [x0]
ldr x0, [x29, 304]
ldrsw x1, [x29, 252]
str d0, [x0, x1, lsl 3]
ldr x0, [x29, 320]
ldrsw x1, [x29, 252]
str xzr, [x0, x1, lsl 3]
mov w0, 1
str w0, [x29, 248]
b .L1651
.L1652:
ldr x0, [x29, 304]
ldrsw x1, [x29, 252]
ldr d0, [x0, x1, lsl 3]
str d0, [x29, 336]
mov w0, 6
ldr d0, [x29, 256]
bl cosTyl
fmov d1, d0
ldr x0, [x29, 304]
ldrsw x1, [x29, 252]
ldr d0, [x0, x1, lsl 3]
fmul d8, d1, d0
mov w0, 6
ldr d0, [x29, 256]
bl sinTyl
fmov d1, d0
ldr x0, [x29, 320]
ldrsw x1, [x29, 252]
ldr d0, [x0, x1, lsl 3]
fmul d0, d1, d0
fsub d1, d8, d0
ldrsw x0, [x29, 248]
lsl x0, x0, 3
ldr x1, [x29, 216]
add x0, x1, x0
ldr d0, [x0]
fadd d0, d1, d0
ldr x0, [x29, 304]
ldrsw x1, [x29, 252]
str d0, [x0, x1, lsl 3]
mov w0, 6
ldr d0, [x29, 256]
bl sinTyl
fmov d1, d0
ldr d0, [x29, 336]
fmul d8, d1, d0
mov w0, 6
ldr d0, [x29, 256]
bl cosTyl
fmov d1, d0
ldr x0, [x29, 320]
ldrsw x1, [x29, 252]
ldr d0, [x0, x1, lsl 3]
fmul d0, d1, d0
fadd d0, d8, d0
ldr x0, [x29, 320]
ldrsw x1, [x29, 252]
str d0, [x0, x1, lsl 3]
ldr w0, [x29, 248]
add w0, w0, 1
str w0, [x29, 248]
.L1651:
ldr w1, [x29, 248]
ldr w0, [x29, 224]
cmp w1, w0
blt .L1652
ldr x0, [x29, 272]
ldrsw x1, [x29, 252]
ldr d1, [x0, x1, lsl 3]
ldr x0, [x29, 272]
ldrsw x1, [x29, 252]
ldr d0, [x0, x1, lsl 3]
fmul d1, d1, d0
ldr x0, [x29, 288]
ldrsw x1, [x29, 252]
ldr d2, [x0, x1, lsl 3]
ldr x0, [x29, 288]
ldrsw x1, [x29, 252]
ldr d0, [x0, x1, lsl 3]
fmul d0, d2, d0
fadd d0, d1, d0
fcvt s0, d0
bl sqrt3
ldrsw x0, [x29, 252]
lsl x0, x0, 3
ldr x1, [x29, 208]
add x0, x1, x0
fcvt d0, s0
str d0, [x0]
ldr x0, [x29, 304]
ldrsw x1, [x29, 252]
ldr d1, [x0, x1, lsl 3]
ldr x0, [x29, 304]
ldrsw x1, [x29, 252]
ldr d0, [x0, x1, lsl 3]
fmul d1, d1, d0
ldr x0, [x29, 320]
ldrsw x1, [x29, 252]
ldr d2, [x0, x1, lsl 3]
ldr x0, [x29, 320]
ldrsw x1, [x29, 252]
ldr d0, [x0, x1, lsl 3]
fmul d0, d2, d0
fadd d0, d1, d0
fcvt s0, d0
bl sqrt3
fcvt d0, s0
str d0, [x29, 328]
ldr d0, [x29, 328]
fcmp d0, #0.0
cset w0, ne
and w0, w0, 255
bl __DSVERIFIER_assume
ldrsw x0, [x29, 252]
lsl x0, x0, 3
ldr x1, [x29, 208]
add x0, x1, x0
ldr d1, [x0]
ldrsw x0, [x29, 252]
lsl x0, x0, 3
ldr x1, [x29, 208]
add x0, x1, x0
ldr d0, [x29, 328]
fdiv d0, d1, d0
str d0, [x0]
ldr w0, [x29, 204]
scvtf d0, w0
adrp x0, .LC64
ldr d1, [x0, #:lo12:.LC64]
fdiv d0, d1, d0
ldr d1, [x29, 256]
fadd d0, d1, d0
str d0, [x29, 256]
ldr w0, [x29, 252]
add w0, w0, 1
str w0, [x29, 252]
.L1648:
ldr d0, [x29, 256]
adrp x0, .LC64
ldr d1, [x0, #:lo12:.LC64]
fcmpe d0, d1
bls .L1653
mov sp, x28
nop
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [x29, 344]
ldr x1, [x0]
subs x2, x2, x1
mov x1, 0
beq .L1654
bl __stack_chk_fail
.L1654:
mov sp, x29
ldr d8, [sp, 96]
ldp x19, x20, [sp, 16]
ldp x21, x22, [sp, 32]
ldp x23, x24, [sp, 48]
ldp x25, x26, [sp, 64]
ldp x27, x28, [sp, 80]
ldp x29, x30, [sp], 352
.cfi_restore 30
.cfi_restore 29
.cfi_restore 27
.cfi_restore 28
.cfi_restore 25
.cfi_restore 26
.cfi_restore 23
.cfi_restore 24
.cfi_restore 21
.cfi_restore 22
.cfi_restore 19
.cfi_restore 20
.cfi_restore 72
.cfi_def_cfa 31, 0
ret
.cfi_endproc
.LFE151:
.size resp_mag, .-resp_mag
.section .rodata
.align 3
.LC65:
.string "|----------------Passband Failure-------------|"
.align 3
.LC66:
.string "|-------------Cutoff Frequency Failure--------|"
.align 3
.LC67:
.string "|----------------Stopband Failure-------------|"
.text
.align 2
.global verify_magnitude
.type verify_magnitude, %function
verify_magnitude:
.LFB152:
.cfi_startproc
stp x29, x30, [sp, -336]!
.cfi_def_cfa_offset 336
.cfi_offset 29, -336
.cfi_offset 30, -328
mov x29, sp
.cfi_def_cfa_register 29
stp x19, x20, [sp, 16]
stp x21, x22, [sp, 32]
stp x23, x24, [sp, 48]
stp x25, x26, [sp, 64]
str x27, [sp, 80]
sub sp, sp, #16
.cfi_offset 19, -320
.cfi_offset 20, -312
.cfi_offset 21, -304
.cfi_offset 22, -296
.cfi_offset 23, -288
.cfi_offset 24, -280
.cfi_offset 25, -272
.cfi_offset 26, -264
.cfi_offset 27, -256
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [x29, 328]
mov x1, 0
mov x0, sp
mov x19, x0
mov w0, 100
str w0, [x29, 228]
ldr w0, [x29, 228]
scvtf d0, w0
fmov d1, 1.0e+0
fdiv d0, d1, d0
str d0, [x29, 240]
ldr w0, [x29, 228]
add w1, w0, 1
sxtw x0, w1
sub x0, x0, #1
str x0, [x29, 248]
sxtw x0, w1
mov x4, x0
mov x5, 0
lsr x0, x4, 58
lsl x3, x5, 6
orr x3, x0, x3
lsl x2, x4, 6
sxtw x0, w1
mov x8, x0
mov x9, 0
lsr x0, x8, 58
lsl x7, x9, 6
orr x7, x0, x7
lsl x6, x8, 6
sxtw x0, w1
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x1, x0, 4
and x0, x1, -65536
sub x0, sp, x0
.L1656:
cmp sp, x0
beq .L1657
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1656
.L1657:
and x0, x1, 65535
sub sp, sp, x0
str xzr, [sp]
and x0, x1, 65535
cmp x0, 1024
bcc .L1658
str xzr, [sp, 1024]
.L1658:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 256]
adrp x0, ds
add x0, x0, :lo12:ds
ldr w1, [x0, 800]
sxtw x0, w1
sub x0, x0, #1
str x0, [x29, 264]
sxtw x0, w1
mov x16, x0
mov x17, 0
lsr x0, x16, 58
lsl x11, x17, 6
orr x11, x0, x11
lsl x10, x16, 6
sxtw x0, w1
mov x14, x0
mov x15, 0
lsr x0, x14, 58
lsl x13, x15, 6
orr x13, x0, x13
lsl x12, x14, 6
sxtw x0, w1
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L1659:
cmp sp, x1
beq .L1660
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1659
.L1660:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L1661
str xzr, [sp, 1024]
.L1661:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 272]
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 800]
mov w2, w0
ldr x1, [x29, 272]
adrp x0, ds
add x0, x0, :lo12:ds
bl fxp_double_to_fxp_array
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 800]
sxtw x1, w0
sub x1, x1, #1
str x1, [x29, 280]
sxtw x1, w0
str x1, [x29, 176]
str xzr, [x29, 184]
ldp x2, x3, [x29, 176]
mov x1, x2
lsr x1, x1, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 216]
ldr x4, [x29, 216]
orr x1, x1, x4
str x1, [x29, 216]
mov x1, x2
lsl x1, x1, 6
str x1, [x29, 208]
sxtw x1, w0
str x1, [x29, 160]
str xzr, [x29, 168]
ldp x2, x3, [x29, 160]
mov x1, x2
lsr x1, x1, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 200]
ldr x4, [x29, 200]
orr x1, x1, x4
str x1, [x29, 200]
mov x1, x2
lsl x1, x1, 6
str x1, [x29, 192]
sxtw x0, w0
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L1662:
cmp sp, x1
beq .L1663
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1662
.L1663:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L1664
str xzr, [sp, 1024]
.L1664:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 288]
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 800]
mov w2, w0
ldr x1, [x29, 272]
ldr x0, [x29, 288]
bl fxp_to_double_array
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 1608]
sxtw x1, w0
sub x1, x1, #1
str x1, [x29, 296]
sxtw x1, w0
str x1, [x29, 144]
str xzr, [x29, 152]
ldp x2, x3, [x29, 144]
mov x1, x2
lsr x1, x1, 58
mov x4, x3
lsl x27, x4, 6
orr x27, x1, x27
mov x1, x2
lsl x26, x1, 6
sxtw x1, w0
str x1, [x29, 128]
str xzr, [x29, 136]
ldp x2, x3, [x29, 128]
mov x1, x2
lsr x1, x1, 58
mov x4, x3
lsl x25, x4, 6
orr x25, x1, x25
mov x1, x2
lsl x24, x1, 6
sxtw x0, w0
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L1665:
cmp sp, x1
beq .L1666
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1665
.L1666:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L1667
str xzr, [sp, 1024]
.L1667:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 304]
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 1608]
mov w2, w0
ldr x1, [x29, 304]
adrp x0, ds+808
add x0, x0, :lo12:ds+808
bl fxp_double_to_fxp_array
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 1608]
sxtw x1, w0
sub x1, x1, #1
str x1, [x29, 312]
sxtw x1, w0
str x1, [x29, 112]
str xzr, [x29, 120]
ldp x2, x3, [x29, 112]
mov x1, x2
lsr x1, x1, 58
mov x4, x3
lsl x23, x4, 6
orr x23, x1, x23
mov x1, x2
lsl x22, x1, 6
sxtw x1, w0
str x1, [x29, 96]
str xzr, [x29, 104]
ldp x2, x3, [x29, 96]
mov x1, x2
lsr x1, x1, 58
mov x4, x3
lsl x21, x4, 6
orr x21, x1, x21
mov x1, x2
lsl x20, x1, 6
sxtw x0, w0
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L1668:
cmp sp, x1
beq .L1669
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1668
.L1669:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L1670
str xzr, [sp, 1024]
.L1670:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 320]
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 1608]
mov w2, w0
ldr x1, [x29, 304]
ldr x0, [x29, 320]
bl fxp_to_double_array
adrp x0, ds
add x0, x0, :lo12:ds
ldr w1, [x0, 1608]
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 800]
ldr w5, [x29, 228]
ldr x4, [x29, 256]
mov w3, w0
adrp x0, ds
add x2, x0, :lo12:ds
adrp x0, ds+808
add x0, x0, :lo12:ds+808
bl resp_mag
adrp x0, :got:filter
ldr x0, [x0, #:got_lo12:filter]
ldr w0, [x0, 24]
cmp w0, 1
bne .L1671
str wzr, [x29, 224]
str xzr, [x29, 232]
b .L1672
.L1679:
adrp x0, :got:filter
ldr x0, [x0, #:got_lo12:filter]
ldr s0, [x0, 12]
fcvt d0, s0
ldr d1, [x29, 232]
fcmpe d1, d0
bls .L1692
b .L1698
.L1692:
ldr x0, [x29, 256]
ldrsw x1, [x29, 224]
ldr d1, [x0, x1, lsl 3]
adrp x0, :got:filter
ldr x0, [x0, #:got_lo12:filter]
ldr s0, [x0]
fcvt d0, s0
fcmpe d1, d0
cset w0, ge
and w2, w0, 255
adrp x0, .LC65
add x1, x0, :lo12:.LC65
mov w0, w2
bl __DSVERIFIER_assert_msg
b .L1675
.L1698:
adrp x0, :got:filter
ldr x0, [x0, #:got_lo12:filter]
ldr s0, [x0, 16]
fcvt d0, s0
ldr d1, [x29, 232]
fcmp d1, d0
bne .L1676
ldr x0, [x29, 256]
ldrsw x1, [x29, 224]
ldr d1, [x0, x1, lsl 3]
adrp x0, :got:filter
ldr x0, [x0, #:got_lo12:filter]
ldr s0, [x0, 8]
fcvt d0, s0
fcmpe d1, d0
cset w0, ls
and w2, w0, 255
adrp x0, .LC66
add x1, x0, :lo12:.LC66
mov w0, w2
bl __DSVERIFIER_assert_msg
b .L1675
.L1676:
adrp x0, :got:filter
ldr x0, [x0, #:got_lo12:filter]
ldr s0, [x0, 20]
fcvt d0, s0
ldr d1, [x29, 232]
fcmpe d1, d0
bge .L1693
b .L1675
.L1693:
ldr d1, [x29, 232]
fmov d0, 1.0e+0
fcmpe d1, d0
bls .L1694
b .L1675
.L1694:
ldr x0, [x29, 256]
ldrsw x1, [x29, 224]
ldr d1, [x0, x1, lsl 3]
adrp x0, :got:filter
ldr x0, [x0, #:got_lo12:filter]
ldr s0, [x0, 4]
fcvt d0, s0
fcmpe d1, d0
cset w0, ls
and w2, w0, 255
adrp x0, .LC67
add x1, x0, :lo12:.LC67
mov w0, w2
bl __DSVERIFIER_assert_msg
.L1675:
ldr w0, [x29, 224]
add w0, w0, 1
str w0, [x29, 224]
ldr d1, [x29, 232]
ldr d0, [x29, 240]
fadd d0, d1, d0
str d0, [x29, 232]
.L1672:
ldr d1, [x29, 232]
fmov d0, 1.0e+0
fcmpe d1, d0
bls .L1679
b .L1680
.L1671:
adrp x0, :got:filter
ldr x0, [x0, #:got_lo12:filter]
ldr w0, [x0, 24]
cmp w0, 2
bne .L1681
str wzr, [x29, 224]
str xzr, [x29, 232]
b .L1682
.L1689:
adrp x0, :got:filter
ldr x0, [x0, #:got_lo12:filter]
ldr s0, [x0, 20]
fcvt d0, s0
ldr d1, [x29, 232]
fcmpe d1, d0
bls .L1695
b .L1699
.L1695:
ldr x0, [x29, 256]
ldrsw x1, [x29, 224]
ldr d1, [x0, x1, lsl 3]
adrp x0, :got:filter
ldr x0, [x0, #:got_lo12:filter]
ldr s0, [x0, 4]
fcvt d0, s0
fcmpe d1, d0
cset w0, ls
and w2, w0, 255
adrp x0, .LC67
add x1, x0, :lo12:.LC67
mov w0, w2
bl __DSVERIFIER_assert_msg
b .L1685
.L1699:
adrp x0, :got:filter
ldr x0, [x0, #:got_lo12:filter]
ldr s0, [x0, 16]
fcvt d0, s0
ldr d1, [x29, 232]
fcmp d1, d0
bne .L1686
ldr x0, [x29, 256]
ldrsw x1, [x29, 224]
ldr d1, [x0, x1, lsl 3]
adrp x0, :got:filter
ldr x0, [x0, #:got_lo12:filter]
ldr s0, [x0, 8]
fcvt d0, s0
fcmpe d1, d0
cset w0, ls
and w2, w0, 255
adrp x0, .LC66
add x1, x0, :lo12:.LC66
mov w0, w2
bl __DSVERIFIER_assert_msg
b .L1685
.L1686:
adrp x0, :got:filter
ldr x0, [x0, #:got_lo12:filter]
ldr s0, [x0, 12]
fcvt d0, s0
ldr d1, [x29, 232]
fcmpe d1, d0
bgt .L1696
b .L1685
.L1696:
ldr d1, [x29, 232]
fmov d0, 1.0e+0
fcmpe d1, d0
bls .L1697
b .L1685
.L1697:
ldr x0, [x29, 256]
ldrsw x1, [x29, 224]
ldr d1, [x0, x1, lsl 3]
adrp x0, :got:filter
ldr x0, [x0, #:got_lo12:filter]
ldr s0, [x0]
fcvt d0, s0
fcmpe d1, d0
cset w0, ge
and w2, w0, 255
adrp x0, .LC65
add x1, x0, :lo12:.LC65
mov w0, w2
bl __DSVERIFIER_assert_msg
.L1685:
ldr w0, [x29, 224]
add w0, w0, 1
str w0, [x29, 224]
ldr d1, [x29, 232]
ldr d0, [x29, 240]
fadd d0, d1, d0
str d0, [x29, 232]
.L1682:
ldr d1, [x29, 232]
fmov d0, 1.0e+0
fcmpe d1, d0
bls .L1689
b .L1680
.L1681:
mov w0, 0
bl __DSVERIFIER_assert
.L1680:
mov w0, 0
mov sp, x19
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [x29, 328]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L1691
bl __stack_chk_fail
.L1691:
mov w0, w1
mov sp, x29
ldp x19, x20, [sp, 16]
ldp x21, x22, [sp, 32]
ldp x23, x24, [sp, 48]
ldp x25, x26, [sp, 64]
ldr x27, [sp, 80]
ldp x29, x30, [sp], 336
.cfi_restore 30
.cfi_restore 29
.cfi_restore 27
.cfi_restore 25
.cfi_restore 26
.cfi_restore 23
.cfi_restore 24
.cfi_restore 21
.cfi_restore 22
.cfi_restore 19
.cfi_restore 20
.cfi_def_cfa 31, 0
ret
.cfi_endproc
.LFE152:
.size verify_magnitude, .-verify_magnitude
.global plant_cbmc
.bss
.align 3
.type plant_cbmc, %object
.size plant_cbmc, 3224
plant_cbmc:
.zero 3224
.text
.align 2
.global main
.type main, %function
main:
.LFB153:
.cfi_startproc
stp x29, x30, [sp, -16]!
.cfi_def_cfa_offset 16
.cfi_offset 29, -16
.cfi_offset 30, -8
mov x29, sp
bl initialization
bl validation
adrp x0, rounding_mode
add x0, x0, :lo12:rounding_mode
mov w1, 1
str w1, [x0]
adrp x0, verify_overflow
add x0, x0, :lo12:verify_overflow
bl call_verification_task
mov w0, 0
ldp x29, x30, [sp], 16
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE153:
.size main, .-main
.section .rodata
.align 3
.LC68:
.string "\n\n****************************************************************************"
.align 3
.LC69:
.string "* set (ds and impl) parameters to check with DSVerifier *"
.align 3
.LC70:
.string "****************************************************************************"
.text
.align 2
.global validation
.type validation, %function
validation:
.LFB154:
.cfi_startproc
stp x29, x30, [sp, -16]!
.cfi_def_cfa_offset 16
.cfi_offset 29, -16
.cfi_offset 30, -8
mov x29, sp
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 800]
cmp w0, 0
beq .L1703
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 1608]
cmp w0, 0
bne .L1704
.L1703:
adrp x0, .LC68
add x0, x0, :lo12:.LC68
bl puts
adrp x0, .LC69
add x0, x0, :lo12:.LC69
bl puts
adrp x0, .LC70
add x0, x0, :lo12:.LC70
bl puts
mov w0, 0
bl __DSVERIFIER_assert
.L1704:
adrp x0, X_SIZE_VALUE
add x0, x0, :lo12:X_SIZE_VALUE
mov w1, 10
str w1, [x0]
ldp x29, x30, [sp], 16
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE154:
.size validation, .-validation
.align 2
.global call_verification_task
.type call_verification_task, %function
call_verification_task:
.LFB155:
.cfi_startproc
stp x29, x30, [sp, -96]!
.cfi_def_cfa_offset 96
.cfi_offset 29, -96
.cfi_offset 30, -88
mov x29, sp
str x0, [sp, 24]
str wzr, [sp, 40]
strb wzr, [sp, 39]
str wzr, [sp, 44]
str wzr, [sp, 44]
b .L1707
.L1719:
adrp x0, ds
add x1, x0, :lo12:ds
ldrsw x0, [sp, 44]
add x0, x0, 302
lsl x0, x0, 3
add x0, x1, x0
ldr d0, [x0, 8]
fcmpe d0, #0.0
bgt .L1733
b .L1708
.L1733:
adrp x0, ds
add x1, x0, :lo12:ds
ldrsw x0, [sp, 44]
add x0, x0, 100
lsl x0, x0, 3
add x0, x1, x0
ldr d1, [x0, 8]
adrp x0, ds
add x1, x0, :lo12:ds
ldrsw x0, [sp, 44]
add x0, x0, 302
lsl x0, x0, 3
add x0, x1, x0
ldr d0, [x0, 8]
fmul d0, d1, d0
mov x0, 4636737291354636288
fmov d1, x0
fdiv d0, d0, d1
str d0, [sp, 72]
ldr d0, [sp, 72]
fcmpe d0, #0.0
bmi .L1734
b .L1741
.L1734:
ldr d0, [sp, 72]
fneg d0, d0
b .L1712
.L1741:
ldr d0, [sp, 72]
.L1712:
str d0, [sp, 72]
adrp x0, ds
add x1, x0, :lo12:ds
ldrsw x0, [sp, 44]
add x0, x0, 100
lsl x0, x0, 3
add x0, x1, x0
ldr d1, [x0, 8]
ldr d0, [sp, 72]
fsub d0, d1, d0
str d0, [sp, 80]
adrp x0, ds
add x1, x0, :lo12:ds
ldrsw x0, [sp, 44]
add x0, x0, 100
lsl x0, x0, 3
add x0, x1, x0
ldr d0, [x0, 8]
ldr d1, [sp, 72]
fadd d0, d1, d0
str d0, [sp, 88]
ldr d0, [sp, 72]
fcmp d0, #0.0
bne .L1713
ldrb w0, [sp, 39]
cmp w0, 0
bne .L1743
.L1713:
ldr d0, [sp, 72]
fcmp d0, #0.0
bne .L1714
ldrb w0, [sp, 39]
eor w0, w0, 1
and w0, w0, 255
cmp w0, 0
beq .L1714
mov w0, 1
strb w0, [sp, 39]
.L1714:
bl nondet_double
adrp x0, ds
add x1, x0, :lo12:ds
ldrsw x0, [sp, 44]
add x0, x0, 100
lsl x0, x0, 3
add x0, x1, x0
str d0, [x0, 8]
adrp x0, ds
add x1, x0, :lo12:ds
ldrsw x0, [sp, 44]
add x0, x0, 100
lsl x0, x0, 3
add x0, x1, x0
ldr d0, [x0, 8]
ldr d1, [sp, 80]
fcmpe d1, d0
bls .L1735
b .L1715
.L1735:
adrp x0, ds
add x1, x0, :lo12:ds
ldrsw x0, [sp, 44]
add x0, x0, 100
lsl x0, x0, 3
add x0, x1, x0
ldr d0, [x0, 8]
ldr d1, [sp, 88]
fcmpe d1, d0
bge .L1736
b .L1715
.L1736:
mov w0, 1
b .L1718
.L1715:
mov w0, 0
.L1718:
and w0, w0, 1
and w0, w0, 255
bl __DSVERIFIER_assume
b .L1708
.L1743:
nop
.L1708:
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L1707:
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 1608]
ldr w1, [sp, 44]
cmp w1, w0
blt .L1719
str wzr, [sp, 44]
b .L1720
.L1732:
adrp x0, ds
add x1, x0, :lo12:ds
ldrsw x0, [sp, 44]
add x0, x0, 202
lsl x0, x0, 3
add x0, x1, x0
ldr d0, [x0, 8]
fcmpe d0, #0.0
bgt .L1737
b .L1721
.L1737:
adrp x0, ds
add x0, x0, :lo12:ds
ldrsw x1, [sp, 44]
ldr d1, [x0, x1, lsl 3]
adrp x0, ds
add x1, x0, :lo12:ds
ldrsw x0, [sp, 44]
add x0, x0, 202
lsl x0, x0, 3
add x0, x1, x0
ldr d0, [x0, 8]
fmul d0, d1, d0
mov x0, 4636737291354636288
fmov d1, x0
fdiv d0, d0, d1
str d0, [sp, 48]
ldr d0, [sp, 48]
fcmpe d0, #0.0
bmi .L1738
b .L1742
.L1738:
ldr d0, [sp, 48]
fneg d0, d0
b .L1725
.L1742:
ldr d0, [sp, 48]
.L1725:
str d0, [sp, 48]
adrp x0, ds
add x0, x0, :lo12:ds
ldrsw x1, [sp, 44]
ldr d1, [x0, x1, lsl 3]
ldr d0, [sp, 48]
fsub d0, d1, d0
str d0, [sp, 56]
adrp x0, ds
add x0, x0, :lo12:ds
ldrsw x1, [sp, 44]
ldr d0, [x0, x1, lsl 3]
ldr d1, [sp, 48]
fadd d0, d1, d0
str d0, [sp, 64]
ldr d0, [sp, 48]
fcmp d0, #0.0
bne .L1726
ldrb w0, [sp, 39]
cmp w0, 0
bne .L1744
.L1726:
ldr d0, [sp, 48]
fcmp d0, #0.0
bne .L1727
ldrb w0, [sp, 39]
eor w0, w0, 1
and w0, w0, 255
cmp w0, 0
beq .L1727
mov w0, 1
strb w0, [sp, 39]
.L1727:
bl nondet_double
adrp x0, ds
add x0, x0, :lo12:ds
ldrsw x1, [sp, 44]
str d0, [x0, x1, lsl 3]
adrp x0, ds
add x0, x0, :lo12:ds
ldrsw x1, [sp, 44]
ldr d0, [x0, x1, lsl 3]
ldr d1, [sp, 56]
fcmpe d1, d0
bls .L1739
b .L1728
.L1739:
adrp x0, ds
add x0, x0, :lo12:ds
ldrsw x1, [sp, 44]
ldr d0, [x0, x1, lsl 3]
ldr d1, [sp, 64]
fcmpe d1, d0
bge .L1740
b .L1728
.L1740:
mov w0, 1
b .L1731
.L1728:
mov w0, 0
.L1731:
and w0, w0, 1
and w0, w0, 255
bl __DSVERIFIER_assume
b .L1721
.L1744:
nop
.L1721:
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L1720:
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 800]
ldr w1, [sp, 44]
cmp w1, w0
blt .L1732
ldr x0, [sp, 24]
blr x0
nop
ldp x29, x30, [sp], 96
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE155:
.size call_verification_task, .-call_verification_task
.align 2
.global call_closedloop_verification_task
.type call_closedloop_verification_task, %function
call_closedloop_verification_task:
.LFB156:
.cfi_startproc
stp x29, x30, [sp, -96]!
.cfi_def_cfa_offset 96
.cfi_offset 29, -96
.cfi_offset 30, -88
mov x29, sp
str x0, [sp, 24]
strb wzr, [sp, 43]
str wzr, [sp, 44]
str wzr, [sp, 44]
b .L1746
.L1759:
adrp x0, :got:plant
ldr x1, [x0, #:got_lo12:plant]
ldrsw x0, [sp, 44]
add x0, x0, 302
lsl x0, x0, 3
add x0, x1, x0
ldr d0, [x0, 8]
fcmpe d0, #0.0
bgt .L1774
b .L1782
.L1774:
adrp x0, :got:plant
ldr x1, [x0, #:got_lo12:plant]
ldrsw x0, [sp, 44]
add x0, x0, 100
lsl x0, x0, 3
add x0, x1, x0
ldr d1, [x0, 8]
adrp x0, :got:plant
ldr x1, [x0, #:got_lo12:plant]
ldrsw x0, [sp, 44]
add x0, x0, 302
lsl x0, x0, 3
add x0, x1, x0
ldr d0, [x0, 8]
fmul d0, d1, d0
mov x0, 4636737291354636288
fmov d1, x0
fdiv d0, d0, d1
str d0, [sp, 72]
ldr d0, [sp, 72]
fcmpe d0, #0.0
bmi .L1775
b .L1783
.L1775:
ldr d0, [sp, 72]
fneg d0, d0
b .L1751
.L1783:
ldr d0, [sp, 72]
.L1751:
str d0, [sp, 72]
adrp x0, :got:plant
ldr x1, [x0, #:got_lo12:plant]
ldrsw x0, [sp, 44]
add x0, x0, 100
lsl x0, x0, 3
add x0, x1, x0
ldr d1, [x0, 8]
ldr d0, [sp, 72]
fsub d0, d1, d0
str d0, [sp, 80]
adrp x0, :got:plant
ldr x1, [x0, #:got_lo12:plant]
ldrsw x0, [sp, 44]
add x0, x0, 100
lsl x0, x0, 3
add x0, x1, x0
ldr d0, [x0, 8]
ldr d1, [sp, 72]
fadd d0, d1, d0
str d0, [sp, 88]
ldr d0, [sp, 72]
fcmp d0, #0.0
bne .L1752
ldrb w0, [sp, 43]
cmp w0, 0
bne .L1786
.L1752:
ldr d0, [sp, 72]
fcmp d0, #0.0
bne .L1754
ldrb w0, [sp, 43]
eor w0, w0, 1
and w0, w0, 255
cmp w0, 0
beq .L1754
mov w0, 1
strb w0, [sp, 43]
.L1754:
bl nondet_double
adrp x0, plant_cbmc
add x1, x0, :lo12:plant_cbmc
ldrsw x0, [sp, 44]
add x0, x0, 100
lsl x0, x0, 3
add x0, x1, x0
str d0, [x0, 8]
adrp x0, plant_cbmc
add x1, x0, :lo12:plant_cbmc
ldrsw x0, [sp, 44]
add x0, x0, 100
lsl x0, x0, 3
add x0, x1, x0
ldr d0, [x0, 8]
ldr d1, [sp, 80]
fcmpe d1, d0
bls .L1776
b .L1755
.L1776:
adrp x0, plant_cbmc
add x1, x0, :lo12:plant_cbmc
ldrsw x0, [sp, 44]
add x0, x0, 100
lsl x0, x0, 3
add x0, x1, x0
ldr d0, [x0, 8]
ldr d1, [sp, 88]
fcmpe d1, d0
bge .L1777
b .L1755
.L1777:
mov w0, 1
b .L1758
.L1755:
mov w0, 0
.L1758:
and w0, w0, 1
and w0, w0, 255
bl __DSVERIFIER_assume
b .L1753
.L1782:
adrp x0, :got:plant
ldr x1, [x0, #:got_lo12:plant]
ldrsw x0, [sp, 44]
add x0, x0, 100
lsl x0, x0, 3
add x0, x1, x0
ldr d0, [x0, 8]
adrp x0, plant_cbmc
add x1, x0, :lo12:plant_cbmc
ldrsw x0, [sp, 44]
add x0, x0, 100
lsl x0, x0, 3
add x0, x1, x0
str d0, [x0, 8]
b .L1753
.L1786:
nop
.L1753:
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L1746:
adrp x0, :got:plant
ldr x0, [x0, #:got_lo12:plant]
ldr w0, [x0, 1608]
ldr w1, [sp, 44]
cmp w1, w0
blt .L1759
str wzr, [sp, 44]
b .L1760
.L1773:
adrp x0, :got:plant
ldr x1, [x0, #:got_lo12:plant]
ldrsw x0, [sp, 44]
add x0, x0, 202
lsl x0, x0, 3
add x0, x1, x0
ldr d0, [x0, 8]
fcmpe d0, #0.0
bgt .L1778
b .L1784
.L1778:
adrp x0, :got:plant
ldr x0, [x0, #:got_lo12:plant]
ldrsw x1, [sp, 44]
ldr d1, [x0, x1, lsl 3]
adrp x0, :got:plant
ldr x1, [x0, #:got_lo12:plant]
ldrsw x0, [sp, 44]
add x0, x0, 202
lsl x0, x0, 3
add x0, x1, x0
ldr d0, [x0, 8]
fmul d0, d1, d0
mov x0, 4636737291354636288
fmov d1, x0
fdiv d0, d0, d1
str d0, [sp, 48]
ldr d0, [sp, 48]
fcmpe d0, #0.0
bmi .L1779
b .L1785
.L1779:
ldr d0, [sp, 48]
fneg d0, d0
b .L1765
.L1785:
ldr d0, [sp, 48]
.L1765:
str d0, [sp, 48]
adrp x0, :got:plant
ldr x0, [x0, #:got_lo12:plant]
ldrsw x1, [sp, 44]
ldr d1, [x0, x1, lsl 3]
ldr d0, [sp, 48]
fsub d0, d1, d0
str d0, [sp, 56]
adrp x0, :got:plant
ldr x0, [x0, #:got_lo12:plant]
ldrsw x1, [sp, 44]
ldr d0, [x0, x1, lsl 3]
ldr d1, [sp, 48]
fadd d0, d1, d0
str d0, [sp, 64]
ldr d0, [sp, 48]
fcmp d0, #0.0
bne .L1766
ldrb w0, [sp, 43]
cmp w0, 0
bne .L1787
.L1766:
ldr d0, [sp, 48]
fcmp d0, #0.0
bne .L1768
ldrb w0, [sp, 43]
eor w0, w0, 1
and w0, w0, 255
cmp w0, 0
beq .L1768
mov w0, 1
strb w0, [sp, 43]
.L1768:
bl nondet_double
adrp x0, plant_cbmc
add x0, x0, :lo12:plant_cbmc
ldrsw x1, [sp, 44]
str d0, [x0, x1, lsl 3]
adrp x0, plant_cbmc
add x0, x0, :lo12:plant_cbmc
ldrsw x1, [sp, 44]
ldr d0, [x0, x1, lsl 3]
ldr d1, [sp, 56]
fcmpe d1, d0
bls .L1780
b .L1769
.L1780:
adrp x0, plant_cbmc
add x0, x0, :lo12:plant_cbmc
ldrsw x1, [sp, 44]
ldr d0, [x0, x1, lsl 3]
ldr d1, [sp, 64]
fcmpe d1, d0
bge .L1781
b .L1769
.L1781:
mov w0, 1
b .L1772
.L1769:
mov w0, 0
.L1772:
and w0, w0, 1
and w0, w0, 255
bl __DSVERIFIER_assume
b .L1767
.L1784:
adrp x0, :got:plant
ldr x0, [x0, #:got_lo12:plant]
ldrsw x1, [sp, 44]
ldr d0, [x0, x1, lsl 3]
adrp x0, plant_cbmc
add x0, x0, :lo12:plant_cbmc
ldrsw x1, [sp, 44]
str d0, [x0, x1, lsl 3]
b .L1767
.L1787:
nop
.L1767:
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L1760:
adrp x0, :got:plant
ldr x0, [x0, #:got_lo12:plant]
ldr w0, [x0, 800]
ldr w1, [sp, 44]
cmp w1, w0
blt .L1773
ldr x0, [sp, 24]
blr x0
nop
ldp x29, x30, [sp], 96
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE156:
.size call_closedloop_verification_task, .-call_closedloop_verification_task
.global ds
.data
.align 3
.type ds, %object
.size ds, 3224
ds:
.word 0
.word 1072693248
.word 0
.word -1074790400
.zero 784
.word 2
.zero 4
.word -1717986918
.word 1069128089
.word 239143779
.word -1078355894
.zero 784
.word 2
.zero 4
.word 1202590843
.word 1066695393
.zero 1600
.global impl
.align 3
.type impl, %object
.size impl, 56
impl:
.word 10
.word 6
.word 0
.word 1072693248
.word 0
.word -1074790400
.zero 32
.section .rodata
.align 3
.type __PRETTY_FUNCTION__.21, %object
.size __PRETTY_FUNCTION__.21, 20
__PRETTY_FUNCTION__.21:
.string "__DSVERIFIER_assert"
.align 3
.type __PRETTY_FUNCTION__.20, %object
.size __PRETTY_FUNCTION__.20, 24
__PRETTY_FUNCTION__.20:
.string "__DSVERIFIER_assert_msg"
.align 3
.type __PRETTY_FUNCTION__.19, %object
.size __PRETTY_FUNCTION__.19, 26
__PRETTY_FUNCTION__.19:
.string "double_check_oscillations"
.align 3
.type __PRETTY_FUNCTION__.18, %object
.size __PRETTY_FUNCTION__.18, 12
__PRETTY_FUNCTION__.18:
.string "snrVariance"
.align 3
.type __PRETTY_FUNCTION__.17, %object
.size __PRETTY_FUNCTION__.17, 9
__PRETTY_FUNCTION__.17:
.string "snrPower"
.align 3
.type __PRETTY_FUNCTION__.16, %object
.size __PRETTY_FUNCTION__.16, 9
__PRETTY_FUNCTION__.16:
.string "snrPoint"
.align 3
.type __PRETTY_FUNCTION__.15, %object
.size __PRETTY_FUNCTION__.15, 13
__PRETTY_FUNCTION__.15:
.string "iirIIOutTime"
.align 3
.type __PRETTY_FUNCTION__.14, %object
.size __PRETTY_FUNCTION__.14, 14
__PRETTY_FUNCTION__.14:
.string "iirIItOutTime"
.align 3
.type __PRETTY_FUNCTION__.13, %object
.size __PRETTY_FUNCTION__.13, 21
__PRETTY_FUNCTION__.13:
.string "iirIItOutTime_double"
.align 3
.type __PRETTY_FUNCTION__.12, %object
.size __PRETTY_FUNCTION__.12, 28
__PRETTY_FUNCTION__.12:
.string "double_direct_form_1_MSP430"
.align 3
.type __PRETTY_FUNCTION__.11, %object
.size __PRETTY_FUNCTION__.11, 28
__PRETTY_FUNCTION__.11:
.string "double_direct_form_2_MSP430"
.align 3
.type __PRETTY_FUNCTION__.10, %object
.size __PRETTY_FUNCTION__.10, 39
__PRETTY_FUNCTION__.10:
.string "double_transposed_direct_form_2_MSP430"
.align 3
.type __PRETTY_FUNCTION__.9, %object
.size __PRETTY_FUNCTION__.9, 15
__PRETTY_FUNCTION__.9:
.string "initialization"
.align 3
.type __PRETTY_FUNCTION__.8, %object
.size __PRETTY_FUNCTION__.8, 31
__PRETTY_FUNCTION__.8:
.string "verify_limit_cycle_state_space"
.align 3
.type __PRETTY_FUNCTION__.7, %object
.size __PRETTY_FUNCTION__.7, 30
__PRETTY_FUNCTION__.7:
.string "verify_zero_input_limit_cycle"
.align 3
.type __PRETTY_FUNCTION__.6, %object
.size __PRETTY_FUNCTION__.6, 22
__PRETTY_FUNCTION__.6:
.string "verify_generic_timing"
.align 3
.type __PRETTY_FUNCTION__.5, %object
.size __PRETTY_FUNCTION__.5, 17
__PRETTY_FUNCTION__.5:
.string "verify_stability"
.align 3
.type __PRETTY_FUNCTION__.4, %object
.size __PRETTY_FUNCTION__.4, 25
__PRETTY_FUNCTION__.4:
.string "verify_error_state_space"
.align 3
.type __PRETTY_FUNCTION__.3, %object
.size __PRETTY_FUNCTION__.3, 26
__PRETTY_FUNCTION__.3:
.string "verify_safety_state_space"
.align 3
.type __PRETTY_FUNCTION__.2, %object
.size __PRETTY_FUNCTION__.2, 23
__PRETTY_FUNCTION__.2:
.string "verify_controllability"
.align 3
.type __PRETTY_FUNCTION__.1, %object
.size __PRETTY_FUNCTION__.1, 30
__PRETTY_FUNCTION__.1:
.string "verify_controllability_double"
.align 3
.type __PRETTY_FUNCTION__.0, %object
.size __PRETTY_FUNCTION__.0, 21
__PRETTY_FUNCTION__.0:
.string "verify_observability"
.align 3
.LC22:
.word 8388608
.word 1104150400
.align 3
.LC23:
.word -1574947053
.word 1075974094
.align 3
.LC24:
.word -1574947053
.word 1074925518
.align 3
.LC29:
.word 1202590843
.word 1065646817
.align 3
.LC42:
.word -1998362383
.word 1055193269
.align 3
.LC64:
.word 1413754136
.word 1074340347
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.global caCert1_BASE64
.section .rodata
.align 3
.LC0:
.ascii "MIIB0DCCATmgAwIBAgIJAI75TJGxEsCoMA0GCSqGSIb3DQEBCwUAMCExHzAd"
.ascii "BgNVBAMTFlBheW1lbnRSZXF1ZXN0IFRlc3QgQ0EwHhcNMTIxMjEwMTYzNzI0"
.ascii "WhcNMjIxMjA4MTYzNzI0WjAhMR8wHQYDVQQDExZQYXltZW50UmVxdWVzdCBU"
.ascii "ZXN0IENBMIGfMA0GCSqGSIb3DQEBAQUAA4GNADCBiQKBgQCvua59nX9radoq"
.ascii "DYyplcns5qdVDTN17tmcGixmMYOYU3UYMU55VSsJs0dWKnMm3COQDY+N63c0"
.ascii "XSbRqarBcsLTkaNASuPXFCv1VWuEKSyy5xe4zeoDU7CVSzlxtQD9wbZW/s3I"
.ascii "SjgaXBpw"
.string "n6eVmntb0JwYxxPcM1u/hrMD8BDbSQIDAQABoxAwDjAMBgNVHRMEBTADAQH/MA0GCSqGSIb3DQEBCwUAA4GBADSaRgK5xe47XxycXBhHhr0Wgl4pAsFsufqA9aB9r8KNEHJ0yUvvbD/jaJJMRtQcf0AJ9olzUMY4syehxbzUJP6aeXhZEYiMvdvcv9D55clq6+WLLlNT3jBgAaVnp3waRjPD4bUX3nv+ojz5s4puw7Qq5QUZlhGsMzPvwDGCmZkL"
.section .data.rel.local,"aw"
.align 3
.type caCert1_BASE64, %object
.size caCert1_BASE64, 8
caCert1_BASE64:
.xword .LC0
.global caCert2_BASE64
.section .rodata
.align 3
.LC1:
.ascii "MIIC1TCCAb2gAwIBAgIJAPDal+Q412QWMA0GCSqGSIb3DQEBCwUAMCExHzAd"
.ascii "BgNVBAMMFlBheW1lbnRSZXF1ZXN0IFRlc3QgQ0EwHhcNMTUwMTExMTgyMTA2"
.ascii "WhcNMjUwMTA4MTgyMTA2WjAhMR8wHQYDVQQDDBZQYXltZW50UmVxdWVzdCBU"
.ascii "ZXN0IENBMIIBIjANBgkqhkiG9w0BAQEFAAOCAQ8AMIIBCgKCAQEA1S9wVLfT"
.ascii "plJuT/1OaaBgl/MbI392v8S9kHbzYz7B4OTMslaO7piz0v3SO3TKMh0dswji"
.ascii "RdHrIgpO7XdIUQiU/uggxDw0kuNehfz1ycaGedlFFtFHTNXqLyIUF3dlwHhQ"
.ascii "waomM6RXoJmxLny5BhYHEcmkyWwr3Cdjd9gAZpblugVJB9C1e40uyL8ao4PH"
.ascii "dLzOqO27iSe6riP8SwwisJZEbMazAZpgNEEMbIXPJEFvm5HTRXSMtQCOTSZY"
.ascii "MFF0M2yrtmlECnz7hWP19b9bcoDzZQB4ylIsFG/7q2jV7MC/e2STZv+niJiH"
.ascii "L08RUdoFpAgzaxMgqj63C7B55HgNDNHJYQIDAQABoxAwDjAMBgNVHRMEBTAD"
.ascii "AQH/MA0GCSqGSIb3DQEBCwUAA4IBAQBGejPxLxj9+crv6gUeEBMZPiUx7pUg"
.ascii "cI22Wm5yymP96B4fwI3Y0DBehq20d76vbWGPN17Z6pH3ge7PVY1SYqXt"
.string "S6hXTo4olCm/BZADli+2Bs2xCiaa+Ltve4ufVej+bKJXN/YnrhvOKq+klQkuuHywU+GJV/NQeBqToIrSOBgi477NgLFCCCmmx2QWsxHoCFGfuRCBVseTz2k/tMuALCDXGeZBRPTsGHu1y4cj84swAeoDK5QSQcI+Ub7GKc+zkoj02sdDLiMo3wokYPcIy47oclhmb4xubHc+y7nF610yZBoC/zgbhbawnZ65hDDWkdQ/SVAnWZD79PFfmNnYPTQH"
.section .data.rel.local
.align 3
.type caCert2_BASE64, %object
.size caCert2_BASE64, 8
caCert2_BASE64:
.xword .LC1
.global paymentrequest1_cert1_BASE64
.section .rodata
.align 3
.LC2:
.ascii "Egt4NTA5K3NoYTI1NhrxAwruAzCCAeowggFToAMCAQICAQEwDQYJKoZIhvcN"
.ascii "AQELBQAwITEfMB0GA1UEAxMWUGF5bWVudFJlcXVlc3QgVGVzdCBDQTAeFw0x"
.ascii "MjEyMTAxNjM3MjRaFw0yMjEyMDgxNjM3MjRaMEMxGTAXBgNVBAMMEHRlc3Rt"
.ascii "ZXJjaGFudC5vcmcxJjAkBgNVBAoMHVBheW1lbnQgUmVxdWVzdCBUZXN0IE1l"
.ascii "cmNoYW50MIGfMA0GCSqGSIb3DQEBAQUAA4GNADCBiQKBgQDHkMy8W1u6HsWl"
.ascii "SqdWTmMKf54gICxNfxbY+rcMtAftr62hCYx2d2QiSRd1pCUzmo12IiSX3WxS"
.ascii "HwaTnT3MFD6jRx6+zM6XdGarI2zpYle11ANzu4gAthN17uRQHV2O5QxVtzNa"
.ascii "MdKeJLXT2L9tfEdyL++9ZUqoQmdAYG9ix330hQIDAQABoxAwDjAMBgNVHRME"
.ascii "BTADAQH/MA0GCSqGSIb3DQEBCwUAA4GBAIkyO99KC68bi9PFRyQQ7nvn5GlQ"
.ascii "Eb3Ca1bRG5+AKN9N5vc8rZ9G2hejtM8wEXnieGBP+chVMsbTPEHKLrwREn7I"
.ascii "vcyCcbAStaklPC3w0B/2idQSHskb6P3X13OR2bTHa2+6wuhsOZRUrVNr24rM"
.ascii "95DKx/eCC6JN1VW+"
.string "qRPU6fqzIjQSHwiw2wYSGXapFJVgigPI+6XpExtNLO/i1WFV8ZmoiKwYsuHFiwUqC1VuaXRUZXN0T25lKoABS0j59iMUUc9MdIfwsO1BskIET0eJSGNZ7eXb9N62u+qf831PMpEHkmlGpk8rHy92nPcgua/UYt8oZMn3QaTZ5A6HjJbc3A73eLylp1a0SwCl+KDMEvDQhqMn1jAVu2v92AH3uB7nSiWVbw0tX/68iSQEGGfh9n6ee/8Myb3ICdw="
.section .data.rel.local
.align 3
.type paymentrequest1_cert1_BASE64, %object
.size paymentrequest1_cert1_BASE64, 8
paymentrequest1_cert1_BASE64:
.xword .LC2
.global paymentrequest2_cert1_BASE64
.section .rodata
.align 3
.LC3:
.ascii "Egt4NTA5K3NoYTI1NhrsAwrpAzCCAeUwggFOoAMCAQICAQMwDQYJKoZIhvcN"
.ascii "AQELBQAwITEfMB0GA1UEAxMWUGF5bWVudFJlcXVlc3QgVGVzdCBDQTAeFw0x"
.ascii "MzAyMjMyMTI2NDNaFw0xMzAyMjQyMTI2NDNaMD4xHDAaBgNVBAMME2V4cGly"
.ascii "ZWRtZXJjaGFudC5vcmcxHjAcBgNVBAoMFUV4cGlyZWQgVGVzdCBNZXJjaGFu"
.ascii "dDCBnzANBgkqhkiG9w0BAQEFAAOBjQAwgYkCgYEAx5DMvFtbuh7FpUqnVk5j"
.ascii "Cn+eICAsTX8W2Pq3DLQH7a+toQmMdndkIkkXdaQlM5qNdiIkl91sUh8Gk509"
.ascii "zBQ+o0cevszOl3RmqyNs6WJXtdQDc7uIALYTde7kUB1djuUMVbczWjHSniS1"
.ascii "09i/bXxHci/vvWVKqEJnQGBvYsd99IUCAwEAAaMQMA4wDAYDVR0TBAUwAwEB"
.ascii "/zANBgkqhkiG9w0BAQsFAAOBgQAaU137j53rvSjlmYZpZ4RWTP7EdD6fl5Zx"
.ascii "BeXHytN6DQL33H0eD7OFHt+ofc7E6D7keublUfCu+jOvt/MvvPUmtCI9yXZ0"
.ascii "dNC4sjyETv+wQpxO0UNZwOM4uegdCzlo6Bi3pD4/KKLdMkWuUfuPBmoammny"
.ascii "74lZaOVr"
.string "5deKXztTuCI0Eh8IsNsGEhl2qRSVYIoDyPul6RMbTSzv4tVhVfGZqIisGLLhxYsFKgtVbml0VGVzdFR3byqAAXHuo4nZEPniLpkdy30TkwBxVgprWJ18a9z/7Py35Qss/JMbOXbnBhJtmJCdIowHRI0aa+zqt3KKKAXimm+V4seMgxTcxMS+eDDkiTcB/RtWWSyRcS2ANjFeY0T4SLMwiCL9qWPi03hr8j96tejrSPOBNSJ3Mi/q5u2Yl4gJZY2b"
.section .data.rel.local
.align 3
.type paymentrequest2_cert1_BASE64, %object
.size paymentrequest2_cert1_BASE64, 8
paymentrequest2_cert1_BASE64:
.xword .LC3
.global paymentrequest3_cert1_BASE64
.section .rodata
.align 3
.LC4:
.ascii "Egt4NTA5K3NoYTI1Nhq8JAr/AzCCAfswggFkoAMCAQICAQEwDQYJKoZIhvcN"
.ascii "AQELBQAwPzEUMBIGA1UEAwwLdGVzdGNhOC5vcmcxJzAlBgNVBAoMHlBheW1l"
.ascii "bnQgUmVxdWVzdCBJbnRlcm1lZGlhdGUgODAeFw0xMzAyMjMyMjQyMzFaFw0y"
.ascii "MzAyMjEyMjQyMzFaMDYxGjAYBgNVBAMMEXRlc3RtZXJjaGFudDgub3JnMRgw"
.ascii "FgYDVQQKDA9UZXN0IE1lcmNoYW50IDgwgZ8wDQYJKoZIhvcNAQEBBQADgY0A"
.ascii "MIGJAoGBAMMCHA3hiHbSTKZ5K9jHRwE8NxkGp3IOx56PDB2diNkldG8XweTc"
.ascii "Rq7bBm7pdiBt4IVggtfs+6hEhDYIOecyoAnVzPFTdvQ7KQdQ/fD9YLe6lk+o"
.ascii "0edOqutPMyrxLFjSluXxEQyk7fdtURloMMYfp3p1/hFCboA1rAsQ2RW38hR5"
.ascii "AgMBAAGjEDAOMAwGA1UdEwQFMAMBAf8wDQYJKoZIhvcNAQELBQADgYEAPsdF"
.ascii "atnc2RJSpvZsw+nCiPVsllycw5ELglq9vfJznJJucRxgzmqI2iuas1ugwbXn"
.ascii "0BEIRLK7vMF/qBzQR6M/nTxttah+KEu+okjps9vJcIyhfTyGPC5xkHaHZ7sG"
.ascii "+UHOFhPw0/kXn0x+pbVgBZ5315axqcp1R+DTSj/whMArn0AKiAQwggIEMIIB"
.ascii "baADAgECAgECMA0GCSqGSIb3DQEBCwUAMD8xFDASBgNVBAMMC3Rlc3RjYTcu"
.ascii "b3JnMScwJQYDVQQKDB5QYXltZW50IFJlcXVlc3QgSW50ZXJtZWRpYXRlIDcw"
.ascii "HhcNMTMwMjIzMjI0MjMxWhcNMjMwMjIxMjI0MjMxWjA/MRQwEgYDVQQDDAt0"
.ascii "ZXN0Y2E4Lm9yZzEnMCUGA1UECgweUGF5bWVudCBSZXF1ZXN0IEludGVybWVk"
.ascii "aWF0ZSA4MIGfMA0GCSqGSIb3DQEBAQUAA4GNADCBiQKBgQDexUFfxb1sThva"
.ascii "bp7udZz59ciThGmmAW0nP4tjrgEACgvWIInr2dZpTHbiQNF34ycsk0le1JD9"
.ascii "3D7Qb8rd25OrpaO8XS2Li2zjR9cleixXjSLwV/zv8zJ8yPl/27XL++PDTKBX"
.ascii "VpJ8/Syp+9TyplV1BqDhqtIHb/QSHEkTQXjeYQIDAQABoxAwDjAMBgNVHRME"
.ascii "BTADAQH/MA0GCSqGSIb3DQEBCwUAA4GBACMooQVbkbIZ2DaPwHDc4ULwguG3"
.ascii "VI2Kzj50UdExmHtzm2S4MQei+n+HEPjtJAx5OY520+10nfuP+12H2DRLQmWm"
.ascii "dvDpeQ/Cv0yavlw4ZRejRFo7KS83C0wo5rd+qTvvOmAN4UTArWkzYcEUulPd"
.ascii "iXnRamb0WQHTeVdIbHVkMormCogEMIICBDCCAW2gAwIBAgIBAjANBgkqhkiG"
.ascii "9w0BAQsFADA/MRQwEgYDVQQDDAt0ZXN0Y2E2Lm9yZzEnMCUGA1UECgweUGF5"
.ascii "bWVudCBSZXF1ZXN0IEludGVybWVkaWF0ZSA2MB4XDTEzMDIyMzIyNDIzMVoX"
.ascii "DTIzMDIyMTIyNDIzMVowPzEUMBIGA1UEAwwLdGVzdGNhNy5vcmcxJzAlBgNV"
.ascii "BAoMHlBheW1lbnQgUmVxdWVzdCBJbnRlcm1lZGlhdGUgNzCBnzANBgkqhkiG"
.ascii "9w0BAQEFAAOBjQAwgYkCgYEAtjBRazrkebXAhXsbjimrMIRmW/f9SwAHwXfc"
.ascii "042keNtl0t2z6XE6UPcR2v/KrssXuCZgodeYxz6IM6lWosCM1xotC3ChKKFB"
.ascii "fVO30reuKBRUxXfKAFqxaG0YOAEzdZkkY9AGhqWloeSmgxpIfhInU0EFJjCw"
.ascii "rJ6IkijBatGoAAECAwEAAaMQMA4wDAYDVR0TBAUwAwEB/zANBgkqhkiG9w0B"
.ascii "AQsFAAOBgQDBRTi1MolmOA0niHYX0A2lN5QWHkCfX0A7GwyoMA3dvM45m/NY"
.ascii "d4WBX+HwfnfYcI6X9jOg"
.ascii "No5OWmc4GGsld0HlxwMYEKISBS9PbSHPBrb3TBOlw5ztQpXZ91+bOhLux52F"
.ascii "r03sK7v9qExmBM12M8UR2ltpzAMiUgLLMHyPfiWkvQqIBDCCAgQwggFtoAMC"
.ascii "AQICAQIwDQYJKoZIhvcNAQELBQAwPzEUMBIGA1UEAwwLdGVzdGNhNS5vcmcx"
.ascii "JzAlBgNVBAoMHlBheW1lbnQgUmVxdWVzdCBJbnRlcm1lZGlhdGUgNTAeFw0x"
.ascii "MzAyMjMyMjQyMzBaFw0yMzAyMjEyMjQyMzBaMD8xFDASBgNVBAMMC3Rlc3Rj"
.ascii "YTYub3JnMScwJQYDVQQKDB5QYXltZW50IFJlcXVlc3QgSW50ZXJtZWRpYXRl"
.ascii "IDYwgZ8wDQYJKoZIhvcNAQEBBQADgY0AMIGJAoGBANJSH3xivX1t9olIdHsz"
.ascii "nI1aE9SD7t9iSZJsIB0otoETHZRVv9M9LvyzBNK98ZV+kTOlST7PJgC0d9BQ"
.ascii "M9sgYApSRq5oqKDM9FXbOm/yaReAbU3mkFNFw5roTlJ5ThEy0yOGT/DS0YBR"
.ascii "aGIvRPRj2DiqDVdCZZ+w4jo1IYHkZt4FAgMBAAGjEDAOMAwGA1UdEwQFMAMB"
.ascii "Af8wDQYJKoZIhvcNAQELBQADgYEATm6+J1OmbrothO60xALKonWMBKr6hudb"
.ascii "4amkFBqKbA9wMeM3jl+I/yKfz/UfxWuJ071IhiNv6Gxx5YwNvhUe1xMhUqHv"
.ascii "0gpyK1Z47bD+kYS2se5sWNPNo3Y9qZDGIXiGQxwHmrzaFk79Uy1xsmvsEz42"
.ascii "w6hr25Yaw7HkIgrFveoKiAQwggIEMIIBbaADAgECAgECMA0GCSqGSIb3DQEB"
.ascii "CwUAMD8xFDASBgNVBAMMC3Rlc3RjYTQub3JnMScwJQYDVQQKDB5QYXltZW50"
.ascii "IFJlcXVlc3QgSW50ZXJtZWRpYXRlIDQwHhcNMTMwMjIzMjI0MjMwWhcNMjMw"
.ascii "MjIxMjI0MjMwWjA/MRQwEgYDVQQDDAt0ZXN0Y2E1Lm9yZzEnMCUGA1UECgwe"
.ascii "UGF5bWVudCBSZXF1ZXN0IEludGVybWVkaWF0ZSA1MIGfMA0GCSqGSIb3DQEB"
.ascii "AQUAA4GNADCBiQKBgQC7vVUFpxHzz2Tr/xij3k58s8d/BPA0R6D5RXTVvmhA"
.ascii "zc1Zuin4zUKRFs/aCj/0yED8Wu/COfNGF4tVlRNMdl9EcFsxa8XGEL4eAZa+"
.ascii "H/rOHH+7/1EINrrVWhZlUecyhilN8jmCZmqEM3ecuD0NAViqyMrgmaiFmsLo"
.ascii "QZpEGepDUQIDAQABoxAwDjAMBgNVHRMEBTADAQH/MA0GCSqGSIb3DQEBCwUA"
.ascii "A4GBAEdJSs8jWiooja3WZzHXeF95QkBJNjIlpDLGcpl4opOYLSuEl9Uxp//L"
.ascii "aQQiXuzpj4/IpkWGQmMy5HOyH1lqDyiMgXpcG8PE0jEQAoEUGZ0QEqB1mZ6B"
.ascii "CrYvmUuf/5aSVd8Y6lKMR3WzFDYU9Zy0nzuHB/3nvp6MeDRQeRMtYvz4CogE"
.ascii "MIICBDCCAW2gAwIBAgIBAjANBgkqhkiG9w0BAQsFADA/MRQwEgYDVQQDDAt0"
.ascii "ZXN0Y2EzLm9yZzEnMCUGA1UECgweUGF5bWVudCBSZXF1ZXN0IEludGVybWVk"
.ascii "aWF0ZSAzMB4XDTEzMDIyMzIyNDIyOVoXDTIzMDIyMTIyNDIyOVowPzEUMBIG"
.ascii "A1UEAwwLdGVzdGNhNC5vcmcxJzAlBgNVBAoMHlBheW1lbnQgUmVxdWVzdCBJ"
.ascii "bnRlcm1lZGlhdGUgNDCBnzANBgkqhkiG9w0BAQEFAAOBjQAwgYkCgYEAxYYo"
.ascii "3w2UXiYg6O8b4QgwN/vgreTkiW122Ep/z2TiDrhVMhfOOiKdwYESPflfnXnV"
.ascii "aQQzCGexYTQqsvqvzHSyna5hL0zPTRJxSKmTVrXRsWtpdCRhjxCGipS3tlQB"
.ascii "Di7vb+7SNRIBK4dBjjGzALNk7gMCpy+yM8f6I043jTlmGb0CAwEAAaMQMA4w"
.ascii "DAYDVR0TBAUwAwEB/zAN"
.ascii "BgkqhkiG9w0BAQsFAAOBgQDU+IQxt3OhKqaUYWC23+cB2gekvWqwMBnrCNrX"
.ascii "/Dp+kjoJKUoR2Fs3qw53raHES4SIhpGT9l9lrppNQgFe/JMHeYqOZMZO+6ku"
.ascii "U0olJanBJ14tPIc7zlMTQ9OfmZ6v07IpyFbsQDtRhpe80DpuvSFPfJ4fh0Wr"
.ascii "Qf6kn3KDVpGDnAqIBDCCAgQwggFtoAMCAQICAQIwDQYJKoZIhvcNAQELBQAw"
.ascii "PzEUMBIGA1UEAwwLdGVzdGNhMi5vcmcxJzAlBgNVBAoMHlBheW1lbnQgUmVx"
.ascii "dWVzdCBJbnRlcm1lZGlhdGUgMjAeFw0xMzAyMjMyMjQyMjlaFw0yMzAyMjEy"
.ascii "MjQyMjlaMD8xFDASBgNVBAMMC3Rlc3RjYTMub3JnMScwJQYDVQQKDB5QYXlt"
.ascii "ZW50IFJlcXVlc3QgSW50ZXJtZWRpYXRlIDMwgZ8wDQYJKoZIhvcNAQEBBQAD"
.ascii "gY0AMIGJAoGBANzgVP99Qg98e6NsKEz1v5KqRB7NTBRRsYnBvb/TSWipvMQa"
.ascii "CYuEyk1xG57x++QuASKeR3QHRQJOoAhQaj9JLUhSSv9GQ5PrFLLsOFv7L1tp"
.ascii "zXHh2dOBIW92X2yFRW2s39q+Q21yvN+N8uoKdqXhzRA+dDoXh3cavaVeHX1G"
.ascii "+IrlAgMBAAGjEDAOMAwGA1UdEwQFMAMBAf8wDQYJKoZIhvcNAQELBQADgYEA"
.ascii "STwg84cX+1UhOG9sejFV3m34QuI1hPZ+qhqVJlRYUtego8Wng1BburDSwqVA"
.ascii "v4ch2wi3c2s4e8J7AXyLtzSbSQG4RN0oZi0mR8EtTTN+Mix/hBIk79dMZg85"
.ascii "+I29uFA6Zj2d9oAhQv2qkHhc6tcaheNvkQRlCyH68k3iF1Fqf+4KiAQwggIE"
.ascii "MIIBbaADAgECAgECMA0GCSqGSIb3DQEBCwUAMD8xFDASBgNVBAMMC3Rlc3Rj"
.ascii "YTEub3JnMScwJQYDVQQKDB5QYXltZW50IFJlcXVlc3QgSW50ZXJtZWRpYXRl"
.ascii "IDEwHhcNMTMwMjIzMjI0MjI5WhcNMjMwMjIxMjI0MjI5WjA/MRQwEgYDVQQD"
.ascii "DAt0ZXN0Y2EyLm9yZzEnMCUGA1UECgweUGF5bWVudCBSZXF1ZXN0IEludGVy"
.ascii "bWVkaWF0ZSAyMIGfMA0GCSqGSIb3DQEBAQUAA4GNADCBiQKBgQDaV8zhfyQu"
.ascii "Sf/f+fauMfgs3g/RnWy9yxxUkvQneQQPH3uZzCyk3A6q72ipTtwNqiibG945"
.ascii "5L9A7SaUjGtnpUz0NKT/VWUdqbfCl1PqXjEZbDobbAQ5hxLGOTyLRQhLIcge"
.ascii "q2/BnmeCqHsC4md04nUp+nBo1HwKyygvK+9sMbCp/wIDAQABoxAwDjAMBgNV"
.ascii "HRMEBTADAQH/MA0GCSqGSIb3DQEBCwUAA4GBACvYyE+PPmWFkbjyRu9LAt8D"
.ascii "crtyYYLRClKSg6tVvutwukLG2l//kDOohYkJtgTqr6LnCIIIwYdXN+4wxugm"
.ascii "w4cnPIZmP6kovxjhhVM95okilor1zniTAo3RN7JDIfTGNgxLdGu1btt7DOFL"
.ascii "4zTbeSJMb8M1JpPftehH+x/VLyuUCuoDMIIB5jCCAU+gAwIBAgIBBTANBgkq"
.ascii "hkiG9w0BAQsFADAhMR8wHQYDVQQDExZQYXltZW50UmVxdWVzdCBUZXN0IENB"
.ascii "MB4XDTEzMDIyMzIyNDIyOFoXDTIzMDIyMTIyNDIyOFowPzEUMBIGA1UEAwwL"
.ascii "dGVzdGNhMS5vcmcxJzAlBgNVBAoMHlBheW1lbnQgUmVxdWVzdCBJbnRlcm1l"
.ascii "ZGlhdGUgMTCBnzANBgkqhkiG9w0BAQEFAAOBjQAwgYkCgYEAo5Vy9H3nA/OO"
.ascii "kF5Ap89yfVNSiTay/LYCaB0eALpcU690U75O9Q3w2M+2AN8wpbbHsJHZMIjE"
.ascii "eBRoQfjlYXW1ucQTxWKyT+liu0D25mGXX27CBXBd4iXTxVII/iX+u3lcjORj"
.ascii "oHOBy7QgeIDIIS9y0vYu"
.ascii "8eArpjh7m4thrVgIRtMCAwEAAaMQMA4wDAYDVR0TBAUwAwEB/zANBgkqhkiG"
.ascii "9w0BAQsFAAOBgQB9LKcVJK9sjASNzpQlpUp7nCiw5FSjVY+XMRIKK/kavzlK"
.ascii "jZ+InsmmyRVGjDoZi9GrqG9PVHgLBxi2VtVjmokZoNPqao3OfhqORAubC+JR"
.ascii "/JLepM7aDaxDdTHVhSUk4lgNAvi26dGY7nZMsnHlPQ2tPp/HvRRiMq1oDjly"
.string "lc8VTCI2Eh8IsNsGEhl2qRSVYIoDyPul6RMbTSzv4tVhVfGZqIisGLLhxYsFKg1Vbml0VGVzdFRocmVlKoABn2HTsUQtMNI4yNvkfkFNka3pRvTUTydJrvyfmEeLzImfM1BWddZjnywku9RToNFZZNgow5QnljmFchhR/aHOuEMTxmc12K4rNlgYtHCsxLP9zd+6u0cva3TucZ6EzS8PKEib/+r12/52664NuWA9WtsK7QCFrK2K95PnVCRmWl0="
.section .data.rel.local
.align 3
.type paymentrequest3_cert1_BASE64, %object
.size paymentrequest3_cert1_BASE64, 8
paymentrequest3_cert1_BASE64:
.xword .LC4
.global paymentrequest4_cert1_BASE64
.section .rodata
.align 3
.LC5:
.ascii "Egt4NTA5K3NoYTI1NhqeJAr/AzCCAfswggFkoAMCAQICAQEwDQYJKoZIhvcN"
.ascii "AQELBQAwPzEUMBIGA1UEAwwLdGVzdGNhOC5vcmcxJzAlBgNVBAoMHlBheW1l"
.ascii "bnQgUmVxdWVzdCBJbnRlcm1lZGlhdGUgODAeFw0xMzAyMjMyMjQyMzFaFw0y"
.ascii "MzAyMjEyMjQyMzFaMDYxGjAYBgNVBAMMEXRlc3RtZXJjaGFudDgub3JnMRgw"
.ascii "FgYDVQQKDA9UZXN0IE1lcmNoYW50IDgwgZ8wDQYJKoZIhvcNAQEBBQADgY0A"
.ascii "MIGJAoGBAMMCHA3hiHbSTKZ5K9jHRwE8NxkGp3IOx56PDB2diNkldG8XweTc"
.ascii "Rq7bBm7pdiBt4IVggtfs+6hEhDYIOecyoAnVzPFTdvQ7KQdQ/fD9YLe6lk+o"
.ascii "0edOqutPMyrxLFjSluXxEQyk7fdtURloMMYfp3p1/hFCboA1rAsQ2RW38hR5"
.ascii "AgMBAAGjEDAOMAwGA1UdEwQFMAMBAf8wDQYJKoZIhvcNAQELBQADgYEAPsdF"
.ascii "atnc2RJSpvZsw+nCiPVsllycw5ELglq9vfJznJJucRxgzmqI2iuas1ugwbXn"
.ascii "0BEIRLK7vMF/qBzQR6M/nTxttah+KEu+okjps9vJcIyhfTyGPC5xkHaHZ7sG"
.ascii "+UHOFhPw0/kXn0x+pbVgBZ5315axqcp1R+DTSj/whMArn0AKiAQwggIEMIIB"
.ascii "baADAgECAgECMA0GCSqGSIb3DQEBCwUAMD8xFDASBgNVBAMMC3Rlc3RjYTcu"
.ascii "b3JnMScwJQYDVQQKDB5QYXltZW50IFJlcXVlc3QgSW50ZXJtZWRpYXRlIDcw"
.ascii "HhcNMTMwMjIzMjI0MjMxWhcNMjMwMjIxMjI0MjMxWjA/MRQwEgYDVQQDDAt0"
.ascii "ZXN0Y2E4Lm9yZzEnMCUGA1UECgweUGF5bWVudCBSZXF1ZXN0IEludGVybWVk"
.ascii "aWF0ZSA4MIGfMA0GCSqGSIb3DQEBAQUAA4GNADCBiQKBgQDexUFfxb1sThva"
.ascii "bp7udZz59ciThGmmAW0nP4tjrgEACgvWIInr2dZpTHbiQNF34ycsk0le1JD9"
.ascii "3D7Qb8rd25OrpaO8XS2Li2zjR9cleixXjSLwV/zv8zJ8yPl/27XL++PDTKBX"
.ascii "VpJ8/Syp+9TyplV1BqDhqtIHb/QSHEkTQXjeYQIDAQABoxAwDjAMBgNVHRME"
.ascii "BTADAQH/MA0GCSqGSIb3DQEBCwUAA4GBACMooQVbkbIZ2DaPwHDc4ULwguG3"
.ascii "VI2Kzj50UdExmHtzm2S4MQei+n+HEPjtJAx5OY520+10nfuP+12H2DRLQmWm"
.ascii "dvDpeQ/Cv0yavlw4ZRejRFo7KS83C0wo5rd+qTvvOmAN4UTArWkzYcEUulPd"
.ascii "iXnRamb0WQHTeVdIbHVkMormCogEMIICBDCCAW2gAwIBAgIBAjANBgkqhkiG"
.ascii "9w0BAQsFADA/MRQwEgYDVQQDDAt0ZXN0Y2E2Lm9yZzEnMCUGA1UECgweUGF5"
.ascii "bWVudCBSZXF1ZXN0IEludGVybWVkaWF0ZSA2MB4XDTEzMDIyMzIyNDIzMVoX"
.ascii "DTIzMDIyMTIyNDIzMVowPzEUMBIGA1UEAwwLdGVzdGNhNy5vcmcxJzAlBgNV"
.ascii "BAoMHlBheW1lbnQgUmVxdWVzdCBJbnRlcm1lZGlhdGUgNzCBnzANBgkqhkiG"
.ascii "9w0BAQEFAAOBjQAwgYkCgYEAtjBRazrkebXAhXsbjimrMIRmW/f9SwAHwXfc"
.ascii "042keNtl0t2z6XE6UPcR2v/KrssXuCZgodeYxz6IM6lWosCM1xotC3ChKKFB"
.ascii "fVO30reuKBRUxXfKAFqxaG0YOAEzdZkkY9AGhqWloeSmgxpIfhInU0EFJjCw"
.ascii "rJ6IkijBatGoAAECAwEAAaMQMA4wDAYDVR0TBAUwAwEB/zANBgkqhkiG9w0B"
.ascii "AQsFAAOBgQDBRTi1MolmOA0niHYX0A2lN5QWHkCfX0A7GwyoMA3dvM45m/NY"
.ascii "d4WBX+HwfnfYcI6X9jOg"
.ascii "No5OWmc4GGsld0HlxwMYEKISBS9PbSHPBrb3TBOlw5ztQpXZ91+bOhLux52F"
.ascii "r03sK7v9qExmBM12M8UR2ltpzAMiUgLLMHyPfiWkvQqIBDCCAgQwggFtoAMC"
.ascii "AQICAQIwDQYJKoZIhvcNAQELBQAwPzEUMBIGA1UEAwwLdGVzdGNhNS5vcmcx"
.ascii "JzAlBgNVBAoMHlBheW1lbnQgUmVxdWVzdCBJbnRlcm1lZGlhdGUgNTAeFw0x"
.ascii "MzAyMjMyMjQyMzBaFw0yMzAyMjEyMjQyMzBaMD8xFDASBgNVBAMMC3Rlc3Rj"
.ascii "YTYub3JnMScwJQYDVQQKDB5QYXltZW50IFJlcXVlc3QgSW50ZXJtZWRpYXRl"
.ascii "IDYwgZ8wDQYJKoZIhvcNAQEBBQADgY0AMIGJAoGBANJSH3xivX1t9olIdHsz"
.ascii "nI1aE9SD7t9iSZJsIB0otoETHZRVv9M9LvyzBNK98ZV+kTOlST7PJgC0d9BQ"
.ascii "M9sgYApSRq5oqKDM9FXbOm/yaReAbU3mkFNFw5roTlJ5ThEy0yOGT/DS0YBR"
.ascii "aGIvRPRj2DiqDVdCZZ+w4jo1IYHkZt4FAgMBAAGjEDAOMAwGA1UdEwQFMAMB"
.ascii "Af8wDQYJKoZIhvcNAQELBQADgYEATm6+J1OmbrothO60xALKonWMBKr6hudb"
.ascii "4amkFBqKbA9wMeM3jl+I/yKfz/UfxWuJ071IhiNv6Gxx5YwNvhUe1xMhUqHv"
.ascii "0gpyK1Z47bD+kYS2se5sWNPNo3Y9qZDGIXiGQxwHmrzaFk79Uy1xsmvsEz42"
.ascii "w6hr25Yaw7HkIgrFveoK6gMwggHmMIIBT6ADAgECAgEGMA0GCSqGSIb3DQEB"
.ascii "CwUAMCExHzAdBgNVBAMTFlBheW1lbnRSZXF1ZXN0IFRlc3QgQ0EwHhcNMTMw"
.ascii "MjIzMjI1OTUxWhcNMTMwMjI0MjI1OTUxWjA/MRQwEgYDVQQDDAt0ZXN0Y2E1"
.ascii "Lm9yZzEnMCUGA1UECgweUGF5bWVudCBSZXF1ZXN0IEludGVybWVkaWF0ZSA1"
.ascii "MIGfMA0GCSqGSIb3DQEBAQUAA4GNADCBiQKBgQC7vVUFpxHzz2Tr/xij3k58"
.ascii "s8d/BPA0R6D5RXTVvmhAzc1Zuin4zUKRFs/aCj/0yED8Wu/COfNGF4tVlRNM"
.ascii "dl9EcFsxa8XGEL4eAZa+H/rOHH+7/1EINrrVWhZlUecyhilN8jmCZmqEM3ec"
.ascii "uD0NAViqyMrgmaiFmsLoQZpEGepDUQIDAQABoxAwDjAMBgNVHRMEBTADAQH/"
.ascii "MA0GCSqGSIb3DQEBCwUAA4GBAEmcUEnhua/oiXy1fwScLgMqt+jk9mHRpE6S"
.ascii "VsIop23QCY2JfpG6RxhMMzzzhGklEGN6cxG0HCi6B3HJx6PYrFEfTB0rW4K6"
.ascii "m0Tvx3WpS9mNuoEuJHLy18ausI/sYAPDHCL+SfBVcqorpaIG2sSpZouRBjRH"
.ascii "AyqFAYlwlW87uq5nCogEMIICBDCCAW2gAwIBAgIBAjANBgkqhkiG9w0BAQsF"
.ascii "ADA/MRQwEgYDVQQDDAt0ZXN0Y2EzLm9yZzEnMCUGA1UECgweUGF5bWVudCBS"
.ascii "ZXF1ZXN0IEludGVybWVkaWF0ZSAzMB4XDTEzMDIyMzIyNDIyOVoXDTIzMDIy"
.ascii "MTIyNDIyOVowPzEUMBIGA1UEAwwLdGVzdGNhNC5vcmcxJzAlBgNVBAoMHlBh"
.ascii "eW1lbnQgUmVxdWVzdCBJbnRlcm1lZGlhdGUgNDCBnzANBgkqhkiG9w0BAQEF"
.ascii "AAOBjQAwgYkCgYEAxYYo3w2UXiYg6O8b4QgwN/vgreTkiW122Ep/z2TiDrhV"
.ascii "MhfOOiKdwYESPflfnXnVaQQzCGexYTQqsvqvzHSyna5hL0zPTRJxSKmTVrXR"
.ascii "sWtpdCRhjxCGipS3tlQBDi7vb+7SNRIBK4dBjjGzALNk7gMCpy+yM8f6I043"
.ascii "jTlmGb0CAwEAAaMQMA4wDAYDVR0TBAUwAwEB/zANBgkqhkiG9w0BAQsFAAOB"
.ascii "gQDU+IQxt3OhKqaUYWC2"
.ascii "3+cB2gekvWqwMBnrCNrX/Dp+kjoJKUoR2Fs3qw53raHES4SIhpGT9l9lrppN"
.ascii "QgFe/JMHeYqOZMZO+6kuU0olJanBJ14tPIc7zlMTQ9OfmZ6v07IpyFbsQDtR"
.ascii "hpe80DpuvSFPfJ4fh0WrQf6kn3KDVpGDnAqIBDCCAgQwggFtoAMCAQICAQIw"
.ascii "DQYJKoZIhvcNAQELBQAwPzEUMBIGA1UEAwwLdGVzdGNhMi5vcmcxJzAlBgNV"
.ascii "BAoMHlBheW1lbnQgUmVxdWVzdCBJbnRlcm1lZGlhdGUgMjAeFw0xMzAyMjMy"
.ascii "MjQyMjlaFw0yMzAyMjEyMjQyMjlaMD8xFDASBgNVBAMMC3Rlc3RjYTMub3Jn"
.ascii "MScwJQYDVQQKDB5QYXltZW50IFJlcXVlc3QgSW50ZXJtZWRpYXRlIDMwgZ8w"
.ascii "DQYJKoZIhvcNAQEBBQADgY0AMIGJAoGBANzgVP99Qg98e6NsKEz1v5KqRB7N"
.ascii "TBRRsYnBvb/TSWipvMQaCYuEyk1xG57x++QuASKeR3QHRQJOoAhQaj9JLUhS"
.ascii "Sv9GQ5PrFLLsOFv7L1tpzXHh2dOBIW92X2yFRW2s39q+Q21yvN+N8uoKdqXh"
.ascii "zRA+dDoXh3cavaVeHX1G+IrlAgMBAAGjEDAOMAwGA1UdEwQFMAMBAf8wDQYJ"
.ascii "KoZIhvcNAQELBQADgYEASTwg84cX+1UhOG9sejFV3m34QuI1hPZ+qhqVJlRY"
.ascii "Utego8Wng1BburDSwqVAv4ch2wi3c2s4e8J7AXyLtzSbSQG4RN0oZi0mR8Et"
.ascii "TTN+Mix/hBIk79dMZg85+I29uFA6Zj2d9oAhQv2qkHhc6tcaheNvkQRlCyH6"
.ascii "8k3iF1Fqf+4KiAQwggIEMIIBbaADAgECAgECMA0GCSqGSIb3DQEBCwUAMD8x"
.ascii "FDASBgNVBAMMC3Rlc3RjYTEub3JnMScwJQYDVQQKDB5QYXltZW50IFJlcXVl"
.ascii "c3QgSW50ZXJtZWRpYXRlIDEwHhcNMTMwMjIzMjI0MjI5WhcNMjMwMjIxMjI0"
.ascii "MjI5WjA/MRQwEgYDVQQDDAt0ZXN0Y2EyLm9yZzEnMCUGA1UECgweUGF5bWVu"
.ascii "dCBSZXF1ZXN0IEludGVybWVkaWF0ZSAyMIGfMA0GCSqGSIb3DQEBAQUAA4GN"
.ascii "ADCBiQKBgQDaV8zhfyQuSf/f+fauMfgs3g/RnWy9yxxUkvQneQQPH3uZzCyk"
.ascii "3A6q72ipTtwNqiibG9455L9A7SaUjGtnpUz0NKT/VWUdqbfCl1PqXjEZbDob"
.ascii "bAQ5hxLGOTyLRQhLIcgeq2/BnmeCqHsC4md04nUp+nBo1HwKyygvK+9sMbCp"
.ascii "/wIDAQABoxAwDjAMBgNVHRMEBTADAQH/MA0GCSqGSIb3DQEBCwUAA4GBACvY"
.ascii "yE+PPmWFkbjyRu9LAt8DcrtyYYLRClKSg6tVvutwukLG2l//kDOohYkJtgTq"
.ascii "r6LnCIIIwYdXN+4wxugmw4cnPIZmP6kovxjhhVM95okilor1zniTAo3RN7JD"
.ascii "IfTGNgxLdGu1btt7DOFL4zTbeSJMb8M1JpPftehH+x/VLyuUCuoDMIIB5jCC"
.ascii "AU+gAwIBAgIBBTANBgkqhkiG9w0BAQsFADAhMR8wHQYDVQQDExZQYXltZW50"
.ascii "UmVxdWVzdCBUZXN0IENBMB4XDTEzMDIyMzIyNDIyOFoXDTIzMDIyMTIyNDIy"
.ascii "OFowPzEUMBIGA1UEAwwLdGVzdGNhMS5vcmcxJzAlBgNVBAoMHlBheW1lbnQg"
.ascii "UmVxdWVzdCBJbnRlcm1lZGlhdGUgMTCBnzANBgkqhkiG9w0BAQEFAAOBjQAw"
.ascii "gYkCgYEAo5Vy9H3nA/OOkF5Ap89yfVNSiTay/LYCaB0eALpcU690U75O9Q3w"
.ascii "2M+2AN8wpbbHsJHZMIjEeBRoQfjlYXW1ucQTxWKyT+liu0D25mGXX27CBXBd"
.ascii "4iXTxVII/iX+u3lcjORjoHOBy7QgeIDIIS9y0vYu8eArpjh7m4thrVgIRtMC"
.ascii "AwEAAaMQMA4wDAYDVR0T"
.ascii "BAUwAwEB/zANBgkqhkiG9w0BAQsFAAOBgQB9LKcVJK9sjASNzpQlpUp7nCiw"
.ascii "5FSjVY+XMRIKK/kavzlKjZ+InsmmyRVGjDoZi9GrqG9PVHgLBxi2VtVjmokZ"
.ascii "oNPqao3OfhqORAubC+JR/JLepM7aDaxDdTHVhSUk4lgNAvi26dGY7nZMsnHl"
.ascii "PQ2tPp/HvRRiMq1oDjly"
.string "lc8VTCI1Eh8IsNsGEhl2qRSVYIoDyPul6RMbTSzv4tVhVfGZqIisGLLhxYsFKgxVbml0VGVzdEZvdXIqgAEBE1PP93Tkpif35F+dYmXn9kLA/1djcPjCs2o2rwRMM4Uk356O5dguHXQjsfdR58qZQS9CS5DAtRUf0R8+43/wijO/hb49VNaNXmY+/cPHMkahP2aV3tZiFAyZblLik9A7ZvF+UsjeFQiHB5wzWQvbqk5wQ4yabHIXoYv/E0q+eQ=="
.section .data.rel.local
.align 3
.type paymentrequest4_cert1_BASE64, %object
.size paymentrequest4_cert1_BASE64, 8
paymentrequest4_cert1_BASE64:
.xword .LC5
.global paymentrequest5_cert1_BASE64
.section .rodata
.align 3
.LC6:
.ascii "Egt4NTA5K3NoYTI1NhrxAwruAzCCAeowggFToAMCAQICAQEwDQYJKoZIhvcN"
.ascii "AQELBQAwITEfMB0GA1UEAxMWUGF5bWVudFJlcXVlc3QgVGVzdCBDQTAeFw0x"
.ascii "MzA0MTkxNzIwMDZaFw0yMzA0MTcxNzIwMDZaMEMxGTAXBgNVBAMMEHRlc3Rt"
.ascii "ZXJjaGFudC5vcmcxJjAkBgNVBAoMHVBheW1lbnQgUmVxdWVzdCBUZXN0IE1l"
.ascii "cmNoYW50MIGfMA0GCSqGSIb3DQEBAQUAA4GNADCBiQKBgQDhV6Yn47aEEmbl"
.ascii "50YLvXoqGEJA51I/40wrZ6VQGdXYaRqYktagrWDlgYY9h0JQ1bQhm8HgW7ju"
.ascii "0R4NaDTXUqxg4HjprF0z3Mfm/6mmebkLOOptfkVD7ceAteNI7cyuqWGIAZA7"
.ascii "D9mV97mXoCAtTlBUycvkmoiClCCSh0EpF/UTaQIDAQABoxAwDjAMBgNVHRME"
.ascii "BTADAQH/MA0GCSqGSIb3DQEBCwUAA4GBAGIRwW7I0QvLga+RnJoJSZNZQbtu"
.ascii "4rQW3xmoz8WfZMBYXX3QBYg5ftycbdK+/IbPqozfjGW2AS6DNArvpveSPDTK"
.ascii "9+GJBNo1paiNtVqwXkC3Ddscv5AIms1eZGiIOQNCmUvdLkpoXo48WAer3EGs"
.ascii "Z3B15GyNEELc0q9W"
.string "5yUebba1IjUSHwiw2wYSGXapFJVgigPI+6XpExtNLO/i1WFV8ZmoiKwYuPvFiwUqDFVuaXRUZXN0Rml2ZSqAAXdsMgdGssymvca1S/1KeM3n8Ydi2fi1JUzAAr59xPvNJRUeqCLP9upHn5z7br3P12Oz9A205/4wL4ClPRPVnOHgij0bEg+y0tGESqmF1rfOfXDszlo2U92wCxS07kq79YAZJ1ZoXYh860/Q4wvc7lfiTe+dXBzPKAKhMy91yETY"
.section .data.rel.local
.align 3
.type paymentrequest5_cert1_BASE64, %object
.size paymentrequest5_cert1_BASE64, 8
paymentrequest5_cert1_BASE64:
.xword .LC6
.global paymentrequest1_cert2_BASE64
.section .rodata
.align 3
.LC7:
.ascii "Egt4NTA5K3NoYTI1NhrQBArNBDCCAkkwggExoAMCAQICAQEwDQYJKoZIhvcN"
.ascii "AQELBQAwITEfMB0GA1UEAwwWUGF5bWVudFJlcXVlc3QgVGVzdCBDQTAeFw0x"
.ascii "NTAxMTExODIxMDhaFw0yNTAxMDgxODIxMDhaMCExHzAdBgNVBAMMFlBheW1l"
.ascii "bnRSZXF1ZXN0IFRlc3QgQ0EwgZ8wDQYJKoZIhvcNAQEBBQADgY0AMIGJAoGB"
.ascii "AMsZqzkzeBGo+i2NmUak3Ciodr1V7S062VOy7N0OQYNDQHYkgDFAUET7cEb5"
.ascii "VJaHPv5m3ppTBpU9xBcfwbHHUt4VjA+mhRmYrl1khjvZM+X8kEqvWn20BtcM"
.ascii "9R6r0yIYec8UERDDHBleL/P8RkxEnVLjYTV9zigCXfMsgYb3EQShAgMBAAGj"
.ascii "EDAOMAwGA1UdEwQFMAMBAf8wDQYJKoZIhvcNAQELBQADggEBABUJpl3QCqso"
.ascii "DSxAsQdV6zKT4VGV76AzoGj7etQsQY+r+S26VfWh/fMobEzuxFChr0USgLJ6"
.ascii "FoK78hAtoZvt1lrye9yqFv/ig3WLWsJKWHHb3RT6oR03CIwZXFSUasi08QDV"
.ascii "LxafwsU5OMcPLucF3a1lRL1ccYrNgVCCx1+X7BostIgDGRQQ4AyoHTcfVd2h"
.ascii "EGeUv7k14mOxFsAp6851yosHq9Q2kwmdH+rHEJbjof87yyKLagc4owyXBZYk"
.ascii "QmkeHWCNqnuRmO5vUsfVb0UUrkD64o7Th/NjwooA7SCiUXl6dfygT1b7ggpx"
.ascii "7GC+sP2DsIM47IAZ55drjqX5u2f+Ba0iPQoE"
.string "dGVzdBIhCIDWwowEEhl2qRQErGqUUwSsaMpDvWIaGnJGNQqi8oisGNeMy6UFKgxKdXN0IFRlc3RpbmcqgAFwThsozZxkZxzCn4R8WxNiLFV6m0ye9fEtSbolfaW+EjBMpO03lr/dwNnrclhgew+A05xfZztrAt16XKEY7qKJ/eY2nLd0fVAIu/nIt+7/VYVXT83zLrWc150aRS7WAdJbL3JOJLs6Eyp5zrPbfI8faRttFAdONKDrJgIpuW1E3g=="
.section .data.rel.local
.align 3
.type paymentrequest1_cert2_BASE64, %object
.size paymentrequest1_cert2_BASE64, 8
paymentrequest1_cert2_BASE64:
.xword .LC7
.global paymentrequest2_cert2_BASE64
.section .rodata
.align 3
.LC8:
.ascii "Egt4NTA5K3NoYTI1NhrQBArNBDCCAkkwggExoAMCAQICAQEwDQYJKoZIhvcN"
.ascii "AQELBQAwITEfMB0GA1UEAwwWUGF5bWVudFJlcXVlc3QgVGVzdCBDQTAeFw0x"
.ascii "NTAxMTExODIxMDhaFw0yNTAxMDgxODIxMDhaMCExHzAdBgNVBAMMFlBheW1l"
.ascii "bnRSZXF1ZXN0IFRlc3QgQ0EwgZ8wDQYJKoZIhvcNAQEBBQADgY0AMIGJAoGB"
.ascii "AMsZqzkzeBGo+i2NmUak3Ciodr1V7S062VOy7N0OQYNDQHYkgDFAUET7cEb5"
.ascii "VJaHPv5m3ppTBpU9xBcfwbHHUt4VjA+mhRmYrl1khjvZM+X8kEqvWn20BtcM"
.ascii "9R6r0yIYec8UERDDHBleL/P8RkxEnVLjYTV9zigCXfMsgYb3EQShAgMBAAGj"
.ascii "EDAOMAwGA1UdEwQFMAMBAf8wDQYJKoZIhvcNAQELBQADggEBABUJpl3QCqso"
.ascii "DSxAsQdV6zKT4VGV76AzoGj7etQsQY+r+S26VfWh/fMobEzuxFChr0USgLJ6"
.ascii "FoK78hAtoZvt1lrye9yqFv/ig3WLWsJKWHHb3RT6oR03CIwZXFSUasi08QDV"
.ascii "LxafwsU5OMcPLucF3a1lRL1ccYrNgVCCx1+X7BostIgDGRQQ4AyoHTcfVd2h"
.ascii "EGeUv7k14mOxFsAp6851yosHq9Q2kwmdH+rHEJbjof87yyKLagc4owyXBZYk"
.ascii "QmkeHWCNqnuRmO5vUsfVb0UUrkD64o7Th/NjwooA7SCiUXl6dfygT1b7ggpx"
.ascii "7GC+sP2DsIM47IAZ55drjqX5u2f+Ba0iQgoEdGVz"
.string "dBIgCICt4gQSGXapFASsapRTBKxoykO9YhoackY1CqLyiKwYiNLUpQUgASoQVGVzdGluZyB0ZXN0bmV0ISqAATXq9A5nmJgtmee/bQTeHeif4w1YYFPBlKghwx6qbVgXTWnwBJtOQhhVsZdzbTl95ENR7/Y7VJupW9kDWobCK7zUUhLAzUlwmLlcx6itHw8LTUF5HK+AwsZmZs85lISGvOS0NZW/ENa6l+oQRnL87oqVZr/EDGiuqjz6T0ThQi0l"
.section .data.rel.local
.align 3
.type paymentrequest2_cert2_BASE64, %object
.size paymentrequest2_cert2_BASE64, 8
paymentrequest2_cert2_BASE64:
.xword .LC8
.global paymentrequest3_cert2_BASE64
.section .rodata
.align 3
.LC9:
.ascii "Egt4NTA5K3NoYTI1NhrQBArNBDCCAkkwggExoAMCAQICAQEwDQYJKoZIhvcN"
.ascii "AQELBQAwITEfMB0GA1UEAwwWUGF5bWVudFJlcXVlc3QgVGVzdCBDQTAeFw0x"
.ascii "NTAxMTExODIxMDhaFw0yNTAxMDgxODIxMDhaMCExHzAdBgNVBAMMFlBheW1l"
.ascii "bnRSZXF1ZXN0IFRlc3QgQ0EwgZ8wDQYJKoZIhvcNAQEBBQADgY0AMIGJAoGB"
.ascii "AMsZqzkzeBGo+i2NmUak3Ciodr1V7S062VOy7N0OQYNDQHYkgDFAUET7cEb5"
.ascii "VJaHPv5m3ppTBpU9xBcfwbHHUt4VjA+mhRmYrl1khjvZM+X8kEqvWn20BtcM"
.ascii "9R6r0yIYec8UERDDHBleL/P8RkxEnVLjYTV9zigCXfMsgYb3EQShAgMBAAGj"
.ascii "EDAOMAwGA1UdEwQFMAMBAf8wDQYJKoZIhvcNAQELBQADggEBABUJpl3QCqso"
.ascii "DSxAsQdV6zKT4VGV76AzoGj7etQsQY+r+S26VfWh/fMobEzuxFChr0USgLJ6"
.ascii "FoK78hAtoZvt1lrye9yqFv/ig3WLWsJKWHHb3RT6oR03CIwZXFSUasi08QDV"
.ascii "LxafwsU5OMcPLucF3a1lRL1ccYrNgVCCx1+X7BostIgDGRQQ4AyoHTcfVd2h"
.ascii "EGeUv7k14mOxFsAp6851yosHq9Q2kwmdH+rHEJbjof87yyKLagc4owyXBZYk"
.ascii "QmkeHWCNqnuRmO5vUsfVb0UUrkD64o7Th/NjwooA7SCiUXl6dfygT1b7ggpx"
.ascii "7GC+sP2DsIM47IAZ55drjqX5u2f+Ba0iSgoEdGVzdBIgCICt4gQS"
.string "GXapFASsapRTBKxoykO9YhoackY1CqLyiKwYyNfZpQUg//////////9/KhBUZXN0aW5nIHRlc3RuZXQhKoABNwi8WnMW4aMvbmvorTiiWJLFhofLFnsoWCJnj3rWLnLhn3w6q/fZ26p50ERL/noxdTUfeFsKnlECkUu/fOcOrqyYDiwvxI0SZ034DleVyFU1Z3T+X0zcL8oe7bX01Yf+s2V+5JXQXarKnKBrZCGgv2ARjFNSZe7E7vGg5K4Q6Q8="
.section .data.rel.local
.align 3
.type paymentrequest3_cert2_BASE64, %object
.size paymentrequest3_cert2_BASE64, 8
paymentrequest3_cert2_BASE64:
.xword .LC9
.global paymentrequest4_cert2_BASE64
.section .rodata
.align 3
.LC10:
.ascii "Egt4NTA5K3NoYTI1NhrQBArNBDCCAkkwggExoAMCAQICAQEwDQYJKoZIhvcN"
.ascii "AQELBQAwITEfMB0GA1UEAwwWUGF5bWVudFJlcXVlc3QgVGVzdCBDQTAeFw0x"
.ascii "NTAxMTExODIxMDhaFw0yNTAxMDgxODIxMDhaMCExHzAdBgNVBAMMFlBheW1l"
.ascii "bnRSZXF1ZXN0IFRlc3QgQ0EwgZ8wDQYJKoZIhvcNAQEBBQADgY0AMIGJAoGB"
.ascii "AMsZqzkzeBGo+i2NmUak3Ciodr1V7S062VOy7N0OQYNDQHYkgDFAUET7cEb5"
.ascii "VJaHPv5m3ppTBpU9xBcfwbHHUt4VjA+mhRmYrl1khjvZM+X8kEqvWn20BtcM"
.ascii "9R6r0yIYec8UERDDHBleL/P8RkxEnVLjYTV9zigCXfMsgYb3EQShAgMBAAGj"
.ascii "EDAOMAwGA1UdEwQFMAMBAf8wDQYJKoZIhvcNAQELBQADggEBABUJpl3QCqso"
.ascii "DSxAsQdV6zKT4VGV76AzoGj7etQsQY+r+S26VfWh/fMobEzuxFChr0USgLJ6"
.ascii "FoK78hAtoZvt1lrye9yqFv/ig3WLWsJKWHHb3RT6oR03CIwZXFSUasi08QDV"
.ascii "LxafwsU5OMcPLucF3a1lRL1ccYrNgVCCx1+X7BostIgDGRQQ4AyoHTcfVd2h"
.ascii "EGeUv7k14mOxFsAp6851yosHq9Q2kwmdH+rHEJbjof87yyKLagc4owyXBZYk"
.ascii "QmkeHWCNqnuRmO5vUsfVb0UUrkD64o7Th/NjwooA7SCiUXl6dfygT1b7ggpx"
.ascii "7GC+sP2DsIM47IAZ55drjqX5u2f+Ba0iSwoEdGVzdBIgCICt4gQS"
.string "GXapFASsapRTBKxoykO9YhoackY1CqLyiKwYt+HZpQUggICAgICAgICAASoQVGVzdGluZyB0ZXN0bmV0ISqAAXSQG8+GFA18VaKarlYrOz293rNMIub0swKGcQm8jAGXHSLaRgHfUDeEPr4hydy4dtfu59KNwe2xsHOHu/SpO4L8SrA4Dm9A7SlNBVWdcLbwd2hj739GDLz0b5KuJ2SG6VknMRQM976w/m2qlq0ccVGaaZ2zMIGfpzL3p6adwx/5"
.section .data.rel.local
.align 3
.type paymentrequest4_cert2_BASE64, %object
.size paymentrequest4_cert2_BASE64, 8
paymentrequest4_cert2_BASE64:
.xword .LC10
.global paymentrequest5_cert2_BASE64
.section .rodata
.align 3
.LC11:
.ascii "Egt4NTA5K3NoYTI1NhryBArvBDCCAmswggFToAMCAQICAQEwDQYJKoZIhvcN"
.ascii "AQELBQAwITEfMB0GA1UEAwwWUGF5bWVudFJlcXVlc3QgVGVzdCBDQTAeFw0x"
.ascii "NjExMTYwMDU1NTFaFw0yNjExMTQwMDU1NTFaMEMxGTAXBgNVBAMMEHRlc3Rt"
.ascii "ZXJjaGFudC5vcmcxJjAkBgNVBAoMHVBheW1lbnQgUmVxdWVzdCBUZXN0IE1l"
.ascii "cmNoYW50MIGfMA0GCSqGSIb3DQEBAQUAA4GNADCBiQKBgQDQsHxApsShFxVB"
.ascii "sS8EKqCSwQFIPV8fTdTb6a+apXmbiXPuqs8Ga5KmOe+AuYs7bolSoFGqe9tj"
.ascii "FU+W9VEUMmx8y6EDsOrTZuqCZH2Sl4nSW358F6McO2aJftCg7NKpW9Hca/qf"
.ascii "5IZXJ1TDuyEVLmXtJI3RFhgC/likY5u5IjSFbwIDAQABoxAwDjAMBgNVHRME"
.ascii "BTADAQH/MA0GCSqGSIb3DQEBCwUAA4IBAQCyGrRABBP+ONSFjcoQoCx4nVSl"
.ascii "S+YjgR5HR41Mkgy67K7BWexhklz0RLRUtxLF5XOYCfL1ZBB0ZCf22+QBVlhK"
.ascii "lzZldMVRaGvlWIwF3u7Q0hnRTetkBfUunY/7bEF+OIuLAW2C0mvxli+ZQUUx"
.ascii "TWZnNrSn67ZylCpNCt5ssOK2vZqJIcxE2mNlPWqIa9GzUz0lls2Nlx3fYSw9"
.ascii "VlWgoesYl8Un9kyhr9/zPRJ3nVlFcrd0GlfaF3wexhZWViK83tP0AAx3j3wg"
.ascii "8jpDSM24R0xX15EGTB9qFLysaYFeG/YkLa2SNaU9sy/RclHeTFpSprYZy5/E"
.ascii "0R3Zpfg81R2LkJ+IIkYSJAiAwsvwlvj1"
.string "DhIZdqkUcqXt94tkwh5sokNvETxkJlR7FJGIrBj+ia/BBSoYVGVzdGluZyBhbW91bnQgb3ZlcmZsb3chKoABcG6Js7WGhoR2oeePOiH8WF9rNnZYfNR9t26afph2vTTHPMQQoS6o7HeKA9RcPxbdl4414Mt8Ii0Fds+15AUPAfCjQ6YFuYfxO+HuMyhzJh6sFJbpZU7GrBNvqjn5kx52F6nnKuPIpNvaauPm/XqqdoQfqtj+AlQWLZF8pQeTbEU="
.section .data.rel.local
.align 3
.type paymentrequest5_cert2_BASE64, %object
.size paymentrequest5_cert2_BASE64, 8
paymentrequest5_cert2_BASE64:
.xword .LC11
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.local tabstop
.comm tabstop,80,8
.align 2
.global main
.type main, %function
main:
.LFB6:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str w0, [sp, 28]
str x1, [sp, 16]
str wzr, [sp, 40]
str wzr, [sp, 44]
str wzr, [sp, 48]
mov w0, 1
str w0, [sp, 52]
ldr x1, [sp, 16]
ldr w0, [sp, 28]
bl initabstop
b .L2
.L11:
ldr w0, [sp, 40]
add w0, w0, 1
str w0, [sp, 40]
ldr w0, [sp, 60]
cmp w0, 32
bne .L3
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
str wzr, [sp, 52]
b .L2
.L3:
ldr w0, [sp, 52]
cmp w0, 0
bne .L4
mov w0, 1
str w0, [sp, 52]
ldr w0, [sp, 40]
sub w1, w0, #1
ldr w0, [sp, 44]
sub w0, w1, w0
str w0, [sp, 48]
ldr w0, [sp, 48]
bl col2nts
str w0, [sp, 56]
ldr w0, [sp, 56]
cmp w0, 0
bge .L7
ldr w1, [sp, 44]
mov w0, 95
bl print_char
b .L6
.L9:
ldr w1, [sp, 56]
mov w0, 43
bl print_char
ldr w1, [sp, 48]
ldr w0, [sp, 56]
add w0, w1, w0
str w0, [sp, 48]
ldr w0, [sp, 48]
bl col2nts
str w0, [sp, 56]
.L7:
ldr w0, [sp, 56]
cmp w0, 0
ble .L8
ldr w1, [sp, 48]
ldr w0, [sp, 56]
add w0, w1, w0
ldr w1, [sp, 40]
cmp w1, w0
bgt .L9
.L8:
ldr w0, [sp, 40]
sub w0, w0, #1
ldr w1, [sp, 48]
cmp w1, w0
bge .L6
ldr w0, [sp, 40]
sub w1, w0, #1
ldr w0, [sp, 48]
sub w0, w1, w0
mov w1, w0
mov w0, 95
bl print_char
.L6:
str wzr, [sp, 44]
.L4:
ldr w0, [sp, 60]
cmp w0, 10
bne .L10
str wzr, [sp, 40]
.L10:
ldr w0, [sp, 60]
bl putchar
.L2:
bl getchar
str w0, [sp, 60]
ldr w0, [sp, 60]
cmn w0, #1
bne .L11
mov w0, 0
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE6:
.size main, .-main
.align 2
.global print_char
.type print_char, %function
print_char:
.LFB7:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str w0, [sp, 28]
str w1, [sp, 24]
str wzr, [sp, 44]
b .L14
.L15:
ldr w0, [sp, 28]
bl putchar
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L14:
ldr w1, [sp, 44]
ldr w0, [sp, 24]
cmp w1, w0
blt .L15
nop
nop
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE7:
.size print_char, .-print_char
.align 2
.global col2nts
.type col2nts, %function
col2nts:
.LFB8:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str w0, [sp, 12]
str wzr, [sp, 20]
str wzr, [sp, 24]
b .L17
.L19:
adrp x0, tabstop
add x0, x0, :lo12:tabstop
ldrsw x1, [sp, 24]
ldr w0, [x0, x1, lsl 2]
ldr w1, [sp, 20]
add w0, w1, w0
str w0, [sp, 20]
ldr w0, [sp, 24]
add w0, w0, 1
str w0, [sp, 24]
.L17:
ldr w0, [sp, 24]
cmp w0, 19
bgt .L18
ldr w1, [sp, 20]
ldr w0, [sp, 12]
cmp w1, w0
ble .L19
.L18:
ldr w1, [sp, 20]
ldr w0, [sp, 12]
sub w0, w1, w0
str w0, [sp, 28]
ldr w2, [sp, 28]
ldr w1, [sp, 28]
mov w0, -1
cmp w2, 0
csel w0, w1, w0, ge
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE8:
.size col2nts, .-col2nts
.section .rodata
.align 3
.LC0:
.string "-t"
.align 3
.LC1:
.string ","
.align 3
.LC2:
.string "tabstops"
.align 3
.LC3:
.string "%s: "
.align 3
.LC4:
.string " %i"
.text
.align 2
.global initabstop
.type initabstop, %function
initabstop:
.LFB9:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str w0, [sp, 28]
str x1, [sp, 16]
str wzr, [sp, 36]
str wzr, [sp, 32]
b .L22
.L23:
adrp x0, tabstop
add x0, x0, :lo12:tabstop
ldrsw x1, [sp, 32]
mov w2, 4
str w2, [x0, x1, lsl 2]
ldr w0, [sp, 32]
add w0, w0, 1
str w0, [sp, 32]
.L22:
ldr w0, [sp, 32]
cmp w0, 19
ble .L23
mov w0, 1
str w0, [sp, 32]
b .L24
.L28:
ldrsw x0, [sp, 32]
lsl x0, x0, 3
ldr x1, [sp, 16]
add x0, x1, x0
ldr x0, [x0]
mov x2, 2
mov x1, x0
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl strncmp
cmp w0, 0
bne .L25
ldr w0, [sp, 32]
add w0, w0, 1
str w0, [sp, 32]
ldr w1, [sp, 32]
ldr w0, [sp, 28]
cmp w1, w0
bge .L25
adrp x0, .LC1
add x0, x0, :lo12:.LC1
str x0, [sp, 56]
ldrsw x0, [sp, 32]
lsl x0, x0, 3
ldr x1, [sp, 16]
add x0, x1, x0
ldr x0, [x0]
ldr x1, [sp, 56]
bl strtok
str x0, [sp, 48]
b .L26
.L27:
ldr x0, [sp, 48]
bl atoi
str w0, [sp, 44]
adrp x0, tabstop
add x0, x0, :lo12:tabstop
ldrsw x1, [sp, 36]
ldr w2, [sp, 44]
str w2, [x0, x1, lsl 2]
ldr w0, [sp, 36]
add w0, w0, 1
str w0, [sp, 36]
ldr x1, [sp, 56]
mov x0, 0
bl strtok
str x0, [sp, 48]
.L26:
ldr x0, [sp, 48]
cmp x0, 0
beq .L25
ldr w0, [sp, 36]
cmp w0, 19
ble .L27
.L25:
ldr w0, [sp, 32]
add w0, w0, 1
str w0, [sp, 32]
.L24:
ldr w1, [sp, 32]
ldr w0, [sp, 28]
cmp w1, w0
blt .L28
adrp x0, .LC2
add x1, x0, :lo12:.LC2
adrp x0, .LC3
add x0, x0, :lo12:.LC3
bl printf
str wzr, [sp, 40]
b .L29
.L30:
adrp x0, tabstop
add x0, x0, :lo12:tabstop
ldrsw x1, [sp, 40]
ldr w0, [x0, x1, lsl 2]
mov w1, w0
adrp x0, .LC4
add x0, x0, :lo12:.LC4
bl printf
ldr w0, [sp, 40]
add w0, w0, 1
str w0, [sp, 40]
.L29:
ldr w0, [sp, 40]
cmp w0, 19
ble .L30
mov w0, 10
bl putchar
nop
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE9:
.size initabstop, .-initabstop
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC0:
.string "chapo"
.align 3
.LC1:
.string "Pancho"
.align 3
.LC2:
.string "Miltoooon"
.align 3
.LC3:
.string "Maria"
.align 3
.LC4:
.string "La lista entera es:"
.align 3
.LC5:
.string "\nLa primer pila(mayores de 21) es :"
.align 3
.LC6:
.string "\nLa segunda pila(menores o con 21) es:"
.text
.align 2
.global main
.type main, %function
main:
.LFB6:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 40]
mov x1, 0
str xzr, [sp, 16]
str xzr, [sp, 24]
str xzr, [sp, 32]
add x4, sp, 16
mov w3, 45558
movk w3, 0x1, lsl 16
mov w2, 18
adrp x0, .LC0
add x1, x0, :lo12:.LC0
mov x0, x4
bl agregar
add x4, sp, 16
mov w3, 12594
mov w2, 18
adrp x0, .LC1
add x1, x0, :lo12:.LC1
mov x0, x4
bl agregar
add x4, sp, 16
mov w3, 4184
movk w3, 0x3, lsl 16
mov w2, 19
adrp x0, .LC2
add x1, x0, :lo12:.LC2
mov x0, x4
bl agregar
add x4, sp, 16
mov w3, 15354
movk w3, 0x1, lsl 16
mov w2, 22
adrp x0, .LC3
add x1, x0, :lo12:.LC3
mov x0, x4
bl agregar
adrp x0, .LC4
add x0, x0, :lo12:.LC4
bl puts
ldr x0, [sp, 16]
bl imprimir
adrp x0, .LC5
add x0, x0, :lo12:.LC5
bl puts
ldr x0, [sp, 24]
bl imprimir
adrp x0, .LC6
add x0, x0, :lo12:.LC6
bl puts
ldr x0, [sp, 32]
bl imprimir
mov w0, 0
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 40]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L3
bl __stack_chk_fail
.L3:
mov w0, w1
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE6:
.size main, .-main
.align 2
.global agregar
.type agregar, %function
agregar:
.LFB7:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 40]
str x1, [sp, 32]
str w2, [sp, 28]
str w3, [sp, 24]
ldr x0, [sp, 40]
ldr x0, [x0]
cmp x0, 0
beq .L5
ldr x0, [sp, 40]
ldr x0, [x0]
add x0, x0, 40
ldr w3, [sp, 24]
ldr w2, [sp, 28]
ldr x1, [sp, 32]
bl agregar
b .L4
.L5:
mov x0, 48
bl malloc
mov x1, x0
ldr x0, [sp, 40]
str x1, [x0]
ldr x0, [sp, 40]
ldr x0, [x0]
cmp x0, 0
beq .L7
ldr x0, [sp, 40]
ldr x0, [x0]
ldr x1, [sp, 32]
ldrb w1, [x1]
strb w1, [x0, 25]
ldr x0, [sp, 40]
ldr x0, [x0]
ldr w1, [sp, 28]
str w1, [x0, 28]
ldr x0, [sp, 40]
ldr x0, [x0]
ldr w1, [sp, 24]
str w1, [x0, 32]
ldr x0, [sp, 40]
ldr x0, [x0]
str xzr, [x0, 40]
b .L4
.L7:
mov w0, 0
bl exit
.L4:
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE7:
.size agregar, .-agregar
.align 2
.global cargar
.type cargar, %function
cargar:
.LFB8:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 40]
str x1, [sp, 32]
str x2, [sp, 24]
ldr x0, [sp, 40]
ldr x0, [x0]
ldr w0, [x0, 28]
cmp w0, 21
ble .L12
mov x0, 48
bl malloc
str x0, [sp, 32]
ldr x0, [sp, 32]
cmp x0, 0
beq .L10
ldr x0, [sp, 40]
ldr x1, [x0]
ldr x0, [sp, 32]
ldp q0, q1, [x1]
stp q0, q1, [x0]
ldr w1, [x1, 32]
str w1, [x0, 32]
b .L8
.L10:
ldr x0, [sp, 40]
ldr x1, [x0]
ldr x0, [sp, 24]
ldp q0, q1, [x1]
stp q0, q1, [x0]
ldr w1, [x1, 32]
str w1, [x0, 32]
b .L8
.L12:
nop
.L8:
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE8:
.size cargar, .-cargar
.section .rodata
.align 3
.LC7:
.string "edad: %d \n"
.align 3
.LC8:
.string "f. nacimiento: %d\n "
.align 3
.LC9:
.string "nombre: %s\n "
.align 3
.LC10:
.string "edad: %d\n "
.text
.align 2
.global imprimir
.type imprimir, %function
imprimir:
.LFB9:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str x0, [sp, 24]
ldr x0, [sp, 24]
ldr x0, [x0, 40]
cmp x0, 0
beq .L14
ldr x0, [sp, 24]
ldr w0, [x0, 28]
mov w1, w0
adrp x0, .LC7
add x0, x0, :lo12:.LC7
bl printf
ldr x0, [sp, 24]
ldr w0, [x0, 32]
mov w1, w0
adrp x0, .LC8
add x0, x0, :lo12:.LC8
bl printf
ldr x0, [sp, 24]
mov x1, x0
adrp x0, .LC9
add x0, x0, :lo12:.LC9
bl printf
ldr x0, [sp, 24]
ldr x0, [x0, 40]
bl imprimir
b .L16
.L14:
ldr x0, [sp, 24]
ldr w0, [x0, 28]
mov w1, w0
adrp x0, .LC10
add x0, x0, :lo12:.LC10
bl printf
ldr x0, [sp, 24]
ldr w0, [x0, 32]
mov w1, w0
adrp x0, .LC8
add x0, x0, :lo12:.LC8
bl printf
ldr x0, [sp, 24]
mov x1, x0
adrp x0, .LC9
add x0, x0, :lo12:.LC9
bl printf
.L16:
nop
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE9:
.size imprimir, .-imprimir
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC0:
.string "Content-type: text/plain\n"
.align 3
.LC1:
.string "r"
.align 3
.LC2:
.string "tcount.dat"
.align 3
.LC3:
.string "Error opening tcount.dat for reading!"
.align 3
.LC4:
.string "Error 001: Exiting."
.align 3
.LC5:
.string "%i\n"
.align 3
.LC6:
.string "w"
.align 3
.LC7:
.string "Error opening tcount.dat for writing!"
.align 3
.LC8:
.string "Error 002: Exiting."
.text
.align 2
.global count
.type count, %function
count:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 40]
mov x1, 0
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl puts
adrp x0, .LC1
add x1, x0, :lo12:.LC1
adrp x0, .LC2
add x0, x0, :lo12:.LC2
bl fopen
str x0, [sp, 32]
ldr x0, [sp, 32]
cmp x0, 0
bne .L2
adrp x0, .LC3
add x0, x0, :lo12:.LC3
bl puts
adrp x0, .LC4
add x0, x0, :lo12:.LC4
bl puts
mov w0, 1
b .L5
.L2:
add x0, sp, 28
mov x2, x0
adrp x0, .LC5
add x1, x0, :lo12:.LC5
ldr x0, [sp, 32]
bl __isoc99_fscanf
ldr w0, [sp, 28]
add w0, w0, 1
str w0, [sp, 28]
ldr w0, [sp, 28]
mov w1, w0
adrp x0, .LC5
add x0, x0, :lo12:.LC5
bl printf
ldr x0, [sp, 32]
bl fclose
adrp x0, .LC6
add x1, x0, :lo12:.LC6
adrp x0, .LC2
add x0, x0, :lo12:.LC2
bl fopen
str x0, [sp, 32]
ldr x0, [sp, 32]
cmp x0, 0
bne .L4
adrp x0, .LC7
add x0, x0, :lo12:.LC7
bl puts
adrp x0, .LC8
add x0, x0, :lo12:.LC8
bl puts
mov w0, 2
b .L5
.L4:
ldr w0, [sp, 28]
mov w2, w0
adrp x0, .LC5
add x1, x0, :lo12:.LC5
ldr x0, [sp, 32]
bl fprintf
mov w0, 0
.L5:
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 40]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L6
bl __stack_chk_fail
.L6:
mov w0, w1
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size count, .-count
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC0:
.string "Signals are blocked"
.text
.align 2
.global main
.type main, %function
main:
.LFB6:
.cfi_startproc
stp x29, x30, [sp, -160]!
.cfi_def_cfa_offset 160
.cfi_offset 29, -160
.cfi_offset 30, -152
mov x29, sp
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 152]
mov x1, 0
add x0, sp, 24
bl sigfillset
add x0, sp, 24
mov w1, 14
bl sigdelset
add x0, sp, 24
mov x2, 0
mov x1, x0
mov w0, 2
bl sigprocmask
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl puts
adrp x0, :got:stdout
ldr x0, [x0, #:got_lo12:stdout]
ldr x0, [x0]
bl fflush
mov w0, 60
bl alarm
.L2:
b .L2
.cfi_endproc
.LFE6:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC0:
.string "Please enter a line:"
.align 3
.LC1:
.string "That line has %d punctuation characters.\n"
.text
.align 2
.global main
.type main, %function
main:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -128]!
.cfi_def_cfa_offset 128
.cfi_offset 29, -128
.cfi_offset 30, -120
mov x29, sp
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 120]
mov x1, 0
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl puts
adrp x0, :got:stdin
ldr x0, [x0, #:got_lo12:stdin]
ldr x1, [x0]
add x0, sp, 32
mov x2, x1
mov w1, 81
bl fgets
add x0, sp, 32
mov w1, 10
bl strchr
str x0, [sp, 24]
ldr x0, [sp, 24]
cmp x0, 0
beq .L2
ldr x0, [sp, 24]
strb wzr, [x0]
.L2:
add x0, sp, 32
bl ToUpper
add x0, sp, 32
bl puts
add x0, sp, 32
bl PunctCount
mov w1, w0
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl printf
mov w0, 0
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 120]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L4
bl __stack_chk_fail
.L4:
mov w0, w1
ldp x29, x30, [sp], 128
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size main, .-main
.align 2
.global ToUpper
.type ToUpper, %function
ToUpper:
.LFB1:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str x0, [sp, 24]
b .L6
.L7:
ldr x0, [sp, 24]
ldrb w0, [x0]
bl toupper
and w1, w0, 255
ldr x0, [sp, 24]
strb w1, [x0]
ldr x0, [sp, 24]
add x0, x0, 1
str x0, [sp, 24]
.L6:
ldr x0, [sp, 24]
ldrb w0, [x0]
cmp w0, 0
bne .L7
nop
nop
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE1:
.size ToUpper, .-ToUpper
.align 2
.global PunctCount
.type PunctCount, %function
PunctCount:
.LFB2:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
str wzr, [sp, 44]
b .L9
.L11:
bl __ctype_b_loc
ldr x1, [x0]
ldr x0, [sp, 24]
ldrb w0, [x0]
and x0, x0, 255
lsl x0, x0, 1
add x0, x1, x0
ldrh w0, [x0]
and w0, w0, 4
cmp w0, 0
beq .L10
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L10:
ldr x0, [sp, 24]
add x0, x0, 1
str x0, [sp, 24]
.L9:
ldr x0, [sp, 24]
ldrb w0, [x0]
cmp w0, 0
bne .L11
ldr w0, [sp, 44]
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE2:
.size PunctCount, .-PunctCount
``` |